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Adapt print/messaget API, get_error_found
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Matthias Güdemann committed May 30, 2017
1 parent c14c55f commit e9e73f9
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Showing 5 changed files with 15 additions and 9 deletions.
10 changes: 6 additions & 4 deletions src/vcegar/abstractor.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -572,8 +572,9 @@ void abstractort::calc_abstract_trans_rel(
throw "unexpected result from predabs_sat1.solve()";
}

print(9, "Generated "+
i2string(trans_cube_set.no_insertions())+" cube(s)");
debug() <<"Generated "
<< i2string(trans_cube_set.no_insertions()) << " cube(s)"
<< eom;

if(show_cubes)
std::cout << trans_cube_set;
Expand Down Expand Up @@ -693,8 +694,9 @@ void abstractort::calc_abstract_initial_states(
}

// std::cout<<" The abstract transition relation \n";
print(9, "Generated "+
i2string(initial.no_insertions())+" cube(s)\n");
debug() << "Generated " <<
<< i2string(initial.no_insertions()) <, " cube(s)\n"
<< eom;

if(show_cubes)
std::cout << initial;
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2 changes: 1 addition & 1 deletion src/vcegar/modelchecker_smv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -164,7 +164,7 @@ bool modelchecker_smvt::read_result_cadence_smv(
counterexample);


print(9, "Cadence SMV counterexample sucessfully read");
debug() << "Cadence SMV counterexample sucessfully read" << eom;

return false;
}
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2 changes: 1 addition & 1 deletion src/verilog/verilog_language.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -162,7 +162,7 @@ bool verilog_languaget::typecheck(
if(verilog_typecheck(parse_tree, symbol_table, module, get_message_handler()))
return true;

print(9, "Synthesis "+module);
debug() << "Synthesis " << module << eom;

if(verilog_synthesis(symbol_table, module, get_message_handler(), options))
return true;
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7 changes: 5 additions & 2 deletions src/verilog/verilog_typecheck_expr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2026,6 +2026,9 @@ bool verilog_typecheck(
message_handlert &message_handler,
const namespacet &ns)
{
const unsigned errors_before=
message_handler.get_message_count(messaget::M_ERROR);

verilog_typecheck_exprt verilog_typecheck_expr(
ns, module_identifier, message_handler);

Expand All @@ -2048,6 +2051,6 @@ bool verilog_typecheck(
{
verilog_typecheck_expr.error() << e << messaget::eom;
}
return verilog_typecheck_expr.get_error_found();

return message_handler.get_message_count(messaget::M_ERROR)!=errors_before;
}
3 changes: 2 additions & 1 deletion src/vhdl/parser.y
Original file line number Diff line number Diff line change
Expand Up @@ -53,7 +53,8 @@ int yyvhdlerror(const char *error_str)
source_location.set_line(yyvhdllval.line);
source_location.set_file(yyvhdllval.file);

PARSER.print(1, tmp, -1, source_location);
PARSER.error().source_location=source_location;
PARSER.error() << tmp << messaget::eom;

return strlen(error_str)+1;
}
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