Merge pull request #853 from diffblue/constants2-comments

SystemVerilog: propagation for `<->`, `===`, `!==` works
diffblue · Nov 26, 2024 · d3d0bcd · d3d0bcd
2 parents 17c7133 + ade04c3
commit d3d0bcd
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/regression/verilog/expressions/constants2.sv b/regression/verilog/expressions/constants2.sv
@@ -32,13 +32,13 @@ module main;
   parameter p28 = 1&&1;
   parameter p29 = 1||1;
   parameter p30 = 1->1;
-//  parameter p31 = 1<->1;
+  parameter p31 = 1<->1;
   parameter p32 = 1<1;
   parameter p33 = 1<=1;
   parameter p34 = 1>1;
   parameter p35 = 1>=1;
-//  parameter p36 = 1===1;
-//  parameter p37 = 1!==1;
+  parameter p36 = 1===1;
+  parameter p37 = 1!==1;
   parameter p38 = 1==1;
   parameter p39 = 1!=1;
   parameter p40 = 1==?1;