Verilog: KNOWNBUG test for file in subdirectory with local include

This adds a KNOWNBUG test for the case where a Verilog file is in a subdirectory and a local include is in the same subdirectory.
diffblue · Apr 22, 2024 · 7766725 · 7766725
1 parent 2a129e6
commit 7766725
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diff --git a/regression/verilog/preprocessor/in_subdir.desc b/regression/verilog/preprocessor/in_subdir.desc
@@ -0,0 +1,7 @@
+KNOWNBUG
+subdir/in_subdir.v
+--preprocess
+^EXIT=0$
+^SIGNAL=0$
+--
+include file in subdirectory not found
diff --git a/regression/verilog/preprocessor/subdir/in_subdir.v b/regression/verilog/preprocessor/subdir/in_subdir.v
@@ -0,0 +1 @@
+`include "include_file.vh"