diff --git a/CondFormats/L1TObjects/BuildFile.xml b/CondFormats/L1TObjects/BuildFile.xml index 60e0c716ce9f3..7dedd5a1331c3 100644 --- a/CondFormats/L1TObjects/BuildFile.xml +++ b/CondFormats/L1TObjects/BuildFile.xml @@ -7,7 +7,6 @@ - diff --git a/CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h b/CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h index eb1747e14136a..42bb72cfa0142 100644 --- a/CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h +++ b/CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h @@ -4,7 +4,6 @@ #include "CondFormats/Serialization/interface/Serializable.h" #include -#include class L1MuCSCTFConfiguration { private: @@ -13,7 +12,11 @@ class L1MuCSCTFConfiguration { public: const std::string* configAsText(void) const throw() { return registers; } - edm::ParameterSet parameters(int sp) const; + using const_iterator = const std::string*; + const_iterator begin() const { return registers; } + const_iterator end() const { return registers + 12; } + + const std::string& operator[](int iIndex) const { return registers[iIndex]; } L1MuCSCTFConfiguration& operator=(const L1MuCSCTFConfiguration& conf) { for (int sp = 0; sp < 12; sp++) diff --git a/CondFormats/L1TObjects/src/L1MuCSCTFConfiguration.cc b/CondFormats/L1TObjects/src/L1MuCSCTFConfiguration.cc index 17f52fefbc23c..f9f278c100933 100644 --- a/CondFormats/L1TObjects/src/L1MuCSCTFConfiguration.cc +++ b/CondFormats/L1TObjects/src/L1MuCSCTFConfiguration.cc @@ -1,508 +1,6 @@ #include "CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h" -#include #include #include -#include "FWCore/MessageLogger/interface/MessageLogger.h" - -edm::ParameterSet L1MuCSCTFConfiguration::parameters(int sp) const { - LogDebug("L1MuCSCTFConfiguration") << "SP:" << int(sp) << std::endl; - - edm::ParameterSet pset; - if (sp >= 12) - return pset; - - // ------------------------------------------------------ - // core configuration - // by default everything is disabled: we need to set them - // coincidence and singles - bool run_core = false; - bool trigger_on_ME1a = false; - bool trigger_on_ME1b = false; - bool trigger_on_ME2 = false; - bool trigger_on_ME3 = false; - bool trigger_on_ME4 = false; - bool trigger_on_MB1a = false; - bool trigger_on_MB1d = false; - - unsigned int BXAdepth = 0; - unsigned int useDT = 0; - unsigned int widePhi = 0; - unsigned int PreTrigger = 0; - // ------------------------------------------------------ - - // ------------------------------------------------------ - // these are very important parameters. - // Double check with Alex - unsigned int CoreLatency = 7; - bool rescaleSinglesPhi = true; - - // ask Alex if use or remove them or what - bool AllowALCTonly = false; - bool AllowCLCTonly = false; - - // other useful parameters in general not set in the OMDS - unsigned int QualityEnableME1a = 0xFFFF; - unsigned int QualityEnableME1b = 0xFFFF; - unsigned int QualityEnableME1c = 0xFFFF; - unsigned int QualityEnableME1d = 0xFFFF; - unsigned int QualityEnableME1e = 0xFFFF; - unsigned int QualityEnableME1f = 0xFFFF; - unsigned int QualityEnableME2a = 0xFFFF; - unsigned int QualityEnableME2b = 0xFFFF; - unsigned int QualityEnableME2c = 0xFFFF; - unsigned int QualityEnableME3a = 0xFFFF; - unsigned int QualityEnableME3b = 0xFFFF; - unsigned int QualityEnableME3c = 0xFFFF; - unsigned int QualityEnableME4a = 0xFFFF; - unsigned int QualityEnableME4b = 0xFFFF; - unsigned int QualityEnableME4c = 0xFFFF; - - unsigned int kill_fiber = 0; - unsigned int singlesTrackOutput = 1; - // ------------------------------------------------------ - - //initialization of the DAT_ETA registers with default values - //the DAT_ETA registers meaning are explained at Table 2 of - //http://www.phys.ufl.edu/~uvarov/SP05/LU-SP_ReferenceGuide_090915_Update.pdf - std::vector etamin(8), etamax(8), etawin(7); - - unsigned int mindetap = 8; - unsigned int mindetap_halo = 8; - - etamin[0] = 22; - etamin[1] = 22; - etamin[2] = 14; - etamin[3] = 14; - etamin[4] = 14; - etamin[5] = 14; - etamin[6] = 10; - etamin[7] = 22; - - unsigned int mindeta12_accp = 8; - unsigned int mindeta13_accp = 19; - unsigned int mindeta112_accp = 19; - unsigned int mindeta113_accp = 30; - - etamax[0] = 127; - etamax[1] = 127; - etamax[2] = 127; - etamax[3] = 127; - etamax[4] = 127; - etamax[5] = 24; - etamax[6] = 24; - etamax[7] = 127; - - unsigned int maxdeta12_accp = 14; - unsigned int maxdeta13_accp = 25; - unsigned int maxdeta112_accp = 25; - unsigned int maxdeta113_accp = 36; - - etawin[0] = 4; - etawin[1] = 4; - etawin[2] = 4; - etawin[3] = 4; - etawin[4] = 4; - etawin[5] = 4; - etawin[6] = 4; - - unsigned int maxdphi12_accp = 64; - unsigned int maxdphi13_accp = 64; - unsigned int maxdphi112_accp = 64; - unsigned int maxdphi113_accp = 64; - - unsigned int mindphip = 128; - unsigned int mindphip_halo = 128; - - unsigned int straightp = 60; - unsigned int curvedp = 200; - - unsigned int mbaPhiOff = 0; - // this differ from the default value in the documentation because during - // craft 09 it mbbPhiOff, as well as mbaPhiOff were not existing, thus set to 0 (they are offsets) - // and for backward compatibility it needs to be set to 0. Anyway mbbPhiOff since its introduction in the - // core will have to be ALWAYS part of the configuration, so it won't be never initialized to the - // default value 2048. - unsigned int mbbPhiOff = 0; - - int eta_cnt = 0; - - // default firmware versions (the ones used from run 132440) - unsigned int firmwareSP = 20100210; - unsigned int firmwareFA = 20090521; - unsigned int firmwareDD = 20090521; - unsigned int firmwareVM = 20090521; - - // default printout - LogDebug("L1MuCSCTFConfiguration") - << "\nCORE CONFIGURATION DEFAULT VALUES" - << "\nrun_core=" << run_core << "\ntrigger_on_ME1a=" << trigger_on_ME1a << "\ntrigger_on_ME1b=" << trigger_on_ME1b - << "\ntrigger_on_ME2=" << trigger_on_ME2 << "\ntrigger_on_ME3=" << trigger_on_ME3 - << "\ntrigger_on_ME4=" << trigger_on_ME4 << "\ntrigger_on_MB1a=" << trigger_on_MB1a - << "\ntrigger_on_MB1d=" << trigger_on_MB1d - - << "\nBXAdepth=" << BXAdepth << "\nuseDT=" << useDT << "\nwidePhi=" << widePhi << "\nPreTrigger=" << PreTrigger - - << "\nCoreLatency=" << CoreLatency << "\nrescaleSinglesPhi=" << rescaleSinglesPhi - - << "\n\nVARIOUS CONFIGURATION PARAMETERS DEFAULT VALUES" - << "\nAllowALCTonly=" << AllowALCTonly << "\nAllowCLCTonly=" << AllowCLCTonly - - << "\nQualityEnableME1a=" << QualityEnableME1a << "\nQualityEnableME1b=" << QualityEnableME1b - << "\nQualityEnableME1c=" << QualityEnableME1c << "\nQualityEnableME1d=" << QualityEnableME1d - << "\nQualityEnableME1e=" << QualityEnableME1e << "\nQualityEnableME1f=" << QualityEnableME1f - << "\nQualityEnableME2a=" << QualityEnableME2a << "\nQualityEnableME2b=" << QualityEnableME2b - << "\nQualityEnableME2c=" << QualityEnableME2c << "\nQualityEnableME3a=" << QualityEnableME3a - << "\nQualityEnableME3b=" << QualityEnableME3b << "\nQualityEnableME3c=" << QualityEnableME3c - << "\nQualityEnableME4a=" << QualityEnableME4a << "\nQualityEnableME4b=" << QualityEnableME4b - << "\nQualityEnableME4c=" << QualityEnableME4c - - << "\nkill_fiber=" << kill_fiber << "\nsinglesTrackOutput=" << singlesTrackOutput - - << "\n\nDEFAULT VALUES FOR DAT_ETA" - << "\nmindetap =" << mindetap << "\nmindetap_halo=" << mindetap_halo - - << "\netamin[0]=" << etamin[0] << "\netamin[1]=" << etamin[1] << "\netamin[2]=" << etamin[2] - << "\netamin[3]=" << etamin[3] << "\netamin[4]=" << etamin[4] << "\netamin[5]=" << etamin[5] - << "\netamin[6]=" << etamin[6] << "\netamin[7]=" << etamin[7] - - << "\nmindeta12_accp =" << mindeta12_accp << "\nmindeta13_accp =" << mindeta13_accp - << "\nmindeta112_accp=" << mindeta112_accp << "\nmindeta113_accp=" << mindeta113_accp - - << "\netamax[0]=" << etamax[0] << "\netamax[1]=" << etamax[1] << "\netamax[2]=" << etamax[2] - << "\netamax[3]=" << etamax[3] << "\netamax[4]=" << etamax[4] << "\netamax[5]=" << etamax[5] - << "\netamax[6]=" << etamax[6] << "\netamax[7]=" << etamax[7] - - << "\nmaxdeta12_accp =" << maxdeta12_accp << "\nmaxdeta13_accp =" << maxdeta13_accp - << "\nmaxdeta112_accp=" << maxdeta112_accp << "\nmaxdeta113_accp=" << maxdeta113_accp - - << "\netawin[0]=" << etawin[0] << "\netawin[1]=" << etawin[1] << "\netawin[2]=" << etawin[2] - << "\netawin[3]=" << etawin[3] << "\netawin[4]=" << etawin[4] << "\netawin[5]=" << etawin[5] - << "\netawin[6]=" << etawin[6] - - << "\nmaxdphi12_accp =" << maxdphi12_accp << "\nmaxdphi13_accp =" << maxdphi13_accp - << "\nmaxdphi112_accp=" << maxdphi112_accp << "\nmaxdphi113_accp=" << maxdphi113_accp - - << "\nmindphip =" << mindphip << "\nmindphip_halo=" << mindphip_halo - - << "\nstraightp=" << straightp << "\ncurvedp =" << curvedp << "\nmbaPhiOff=" << mbaPhiOff - << "\nmbbPhiOff=" << mbbPhiOff - - << "\n\nFIRMWARE VERSIONS" - << "\nSP: " << firmwareSP << "\nFA: " << firmwareFA << "\nDD: " << firmwareDD << "\nVM: " << firmwareVM; - - // start filling the registers with the values in the DBS - std::stringstream conf(registers[sp]); - while (!conf.eof()) { - char buff[1024]; - conf.getline(buff, 1024); - std::stringstream line(buff); - //std::cout<<"buff:"<> register_; - std::string chip_; - line >> chip_; - std::string muon_; - line >> muon_; - std::string writeValue_; - line >> writeValue_; - std::string comments_; - std::getline(line, comments_); - - if (register_ == "CSR_REQ" && chip_ == "SP") { - unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); - run_core = (value & 0x8000); - trigger_on_ME1a = (value & 0x0001); - trigger_on_ME1b = (value & 0x0002); - trigger_on_ME2 = (value & 0x0004); - trigger_on_ME3 = (value & 0x0008); - trigger_on_ME4 = (value & 0x0010); - trigger_on_MB1a = (value & 0x0100); - trigger_on_MB1d = (value & 0x0200); - } - - if (register_ == "CSR_SCC" && chip_ == "SP") { - unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); - - BXAdepth = (value & 0x3); - useDT = ((value & 0x80) >> 7); - widePhi = ((value & 0x40) >> 6); - PreTrigger = ((value & 0x300) >> 8); - } - - if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M1") - QualityEnableME1a = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M2") - QualityEnableME1b = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M3") - QualityEnableME1c = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M1") - QualityEnableME1d = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M2") - QualityEnableME1e = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M3") - QualityEnableME1f = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M1") - QualityEnableME2a = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M2") - QualityEnableME2b = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M3") - QualityEnableME2c = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M1") - QualityEnableME3a = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M2") - QualityEnableME3b = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M3") - QualityEnableME3c = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M1") - QualityEnableME4a = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M2") - QualityEnableME4b = ::strtol(writeValue_.c_str(), nullptr, 16); - if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M3") - QualityEnableME4c = ::strtol(writeValue_.c_str(), nullptr, 16); - - if (register_ == "CSR_KFL") - kill_fiber = ::strtol(writeValue_.c_str(), nullptr, 16); - - if (register_ == "CSR_SFC" && chip_ == "SP") { - unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); - singlesTrackOutput = ((value & 0x3000) >> 12); - } - - if (register_ == "CNT_ETA" && chip_ == "SP") { - unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); - eta_cnt = value; - } - - // LATEST VERSION FROM CORE 2010-01-22 at http://www.phys.ufl.edu/~madorsky/sp/2010-01-22 - if (register_ == "DAT_ETA" && chip_ == "SP") { - unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); - - //std::cout<<"DAT_ETA SP value:"<= 2 && eta_cnt < 10) - etamin[eta_cnt - 2] = value; - - if (eta_cnt == 10) - mindeta12_accp = value; - if (eta_cnt == 11) - mindeta13_accp = value; - if (eta_cnt == 12) - mindeta112_accp = value; - if (eta_cnt == 13) - mindeta113_accp = value; - - if (eta_cnt >= 14 && eta_cnt < 22) - etamax[eta_cnt - 14] = value; - - if (eta_cnt == 22) - maxdeta12_accp = value; - if (eta_cnt == 23) - maxdeta13_accp = value; - if (eta_cnt == 24) - maxdeta112_accp = value; - if (eta_cnt == 25) - maxdeta113_accp = value; - - if (eta_cnt >= 26 && eta_cnt < 33) - etawin[eta_cnt - 26] = value; - - if (eta_cnt == 33) - maxdphi12_accp = value; - if (eta_cnt == 34) - maxdphi13_accp = value; - if (eta_cnt == 35) - maxdphi112_accp = value; - if (eta_cnt == 36) - maxdphi113_accp = value; - - if (eta_cnt == 37) - mindphip = value; - if (eta_cnt == 38) - mindphip_halo = value; - - if (eta_cnt == 39) - straightp = value; - if (eta_cnt == 40) - curvedp = value; - if (eta_cnt == 41) - mbaPhiOff = value; - if (eta_cnt == 42) - mbbPhiOff = value; - - eta_cnt++; - } - - // filling the firmware variables: SP MEZZANINE - if (register_ == "FIRMWARE" && muon_ == "SP") { - unsigned int value = atoi(writeValue_.c_str()); - firmwareSP = value; - } - - // filling the firmware variables: Front FPGAs - if (register_ == "FIRMWARE" && muon_ == "FA") { - unsigned int value = atoi(writeValue_.c_str()); - firmwareFA = value; - } - - // filling the firmware variables: DDU - if (register_ == "FIRMWARE" && muon_ == "DD") { - unsigned int value = atoi(writeValue_.c_str()); - firmwareDD = value; - } - - // filling the firmware variables: VM - if (register_ == "FIRMWARE" && muon_ == "VM") { - unsigned int value = atoi(writeValue_.c_str()); - firmwareVM = value; - } - } - - pset.addParameter("run_core", run_core); - pset.addParameter("trigger_on_ME1a", trigger_on_ME1a); - pset.addParameter("trigger_on_ME1b", trigger_on_ME1b); - pset.addParameter("trigger_on_ME2", trigger_on_ME2); - pset.addParameter("trigger_on_ME3", trigger_on_ME3); - pset.addParameter("trigger_on_ME4", trigger_on_ME4); - pset.addParameter("trigger_on_MB1a", trigger_on_MB1a); - pset.addParameter("trigger_on_MB1d", trigger_on_MB1d); - - pset.addParameter("BXAdepth", BXAdepth); - pset.addParameter("useDT", useDT); - pset.addParameter("widePhi", widePhi); - pset.addParameter("PreTrigger", PreTrigger); - - // this were two old settings, not used anymore. Set them to zero - // ask Alex if he can remove them altogether - pset.addParameter("AllowALCTonly", AllowALCTonly); - pset.addParameter("AllowCLCTonly", AllowCLCTonly); - - pset.addParameter("CoreLatency", CoreLatency); - pset.addParameter("rescaleSinglesPhi", rescaleSinglesPhi); - - pset.addParameter("QualityEnableME1a", QualityEnableME1a); - pset.addParameter("QualityEnableME1b", QualityEnableME1b); - pset.addParameter("QualityEnableME1c", QualityEnableME1c); - pset.addParameter("QualityEnableME1d", QualityEnableME1d); - pset.addParameter("QualityEnableME1e", QualityEnableME1e); - pset.addParameter("QualityEnableME1f", QualityEnableME1f); - pset.addParameter("QualityEnableME2a", QualityEnableME2a); - pset.addParameter("QualityEnableME2b", QualityEnableME2b); - pset.addParameter("QualityEnableME2c", QualityEnableME2c); - pset.addParameter("QualityEnableME3a", QualityEnableME3a); - pset.addParameter("QualityEnableME3b", QualityEnableME3b); - pset.addParameter("QualityEnableME3c", QualityEnableME3c); - pset.addParameter("QualityEnableME4a", QualityEnableME4a); - pset.addParameter("QualityEnableME4b", QualityEnableME4b); - pset.addParameter("QualityEnableME4c", QualityEnableME4c); - - pset.addParameter("kill_fiber", kill_fiber); - pset.addParameter("singlesTrackOutput", singlesTrackOutput); - - // add the DAT_ETA registers to the pset - pset.addParameter("mindetap", mindetap); - pset.addParameter("mindetap_halo", mindetap_halo); - - pset.addParameter >("EtaMin", etamin); - - pset.addParameter("mindeta12_accp", mindeta12_accp); - pset.addParameter("mindeta13_accp", mindeta13_accp); - pset.addParameter("mindeta112_accp", mindeta112_accp); - pset.addParameter("mindeta113_accp", mindeta113_accp); - - pset.addParameter >("EtaMax", etamax); - - pset.addParameter("maxdeta12_accp", maxdeta12_accp); - pset.addParameter("maxdeta13_accp", maxdeta13_accp); - pset.addParameter("maxdeta112_accp", maxdeta112_accp); - pset.addParameter("maxdeta113_accp", maxdeta113_accp); - - pset.addParameter >("EtaWindows", etawin); - - pset.addParameter("maxdphi12_accp", maxdphi12_accp); - pset.addParameter("maxdphi13_accp", maxdphi13_accp); - pset.addParameter("maxdphi112_accp", maxdphi112_accp); - pset.addParameter("maxdphi113_accp", maxdphi113_accp); - - pset.addParameter("mindphip", mindphip); - pset.addParameter("mindphip_halo", mindphip_halo); - - pset.addParameter("straightp", straightp); - pset.addParameter("curvedp", curvedp); - pset.addParameter("mbaPhiOff", mbaPhiOff); - pset.addParameter("mbbPhiOff", mbbPhiOff); - - pset.addParameter("firmwareSP", firmwareSP); - pset.addParameter("firmwareFA", firmwareFA); - pset.addParameter("firmwareDD", firmwareDD); - pset.addParameter("firmwareVM", firmwareVM); - - // printout - LogDebug("L1MuCSCTFConfiguration") - << "\nCORE CONFIGURATION AFTER READING THE DBS VALUES" - << "\nrun_core=" << run_core << "\ntrigger_on_ME1a=" << trigger_on_ME1a << "\ntrigger_on_ME1b=" << trigger_on_ME1b - << "\ntrigger_on_ME2=" << trigger_on_ME2 << "\ntrigger_on_ME3=" << trigger_on_ME3 - << "\ntrigger_on_ME4=" << trigger_on_ME4 << "\ntrigger_on_MB1a=" << trigger_on_MB1a - << "\ntrigger_on_MB1d=" << trigger_on_MB1d - - << "\nBXAdepth=" << BXAdepth << "\nuseDT=" << useDT << "\nwidePhi=" << widePhi << "\nPreTrigger=" << PreTrigger - - << "\nCoreLatency=" << CoreLatency << "\nrescaleSinglesPhi=" << rescaleSinglesPhi - - << "\n\nVARIOUS CONFIGURATION PARAMETERS AFTER READING THE DBS VALUES" - << "\nAllowALCTonly=" << AllowALCTonly << "\nAllowCLCTonly=" << AllowCLCTonly - - << "\nQualityEnableME1a=" << QualityEnableME1a << "\nQualityEnableME1b=" << QualityEnableME1b - << "\nQualityEnableME1c=" << QualityEnableME1c << "\nQualityEnableME1d=" << QualityEnableME1d - << "\nQualityEnableME1e=" << QualityEnableME1e << "\nQualityEnableME1f=" << QualityEnableME1f - << "\nQualityEnableME2a=" << QualityEnableME2a << "\nQualityEnableME2b=" << QualityEnableME2b - << "\nQualityEnableME2c=" << QualityEnableME2c << "\nQualityEnableME3a=" << QualityEnableME3a - << "\nQualityEnableME3b=" << QualityEnableME3b << "\nQualityEnableME3c=" << QualityEnableME3c - << "\nQualityEnableME4a=" << QualityEnableME4a << "\nQualityEnableME4b=" << QualityEnableME4b - << "\nQualityEnableME4c=" << QualityEnableME4c - - << "\nkill_fiber=" << kill_fiber << "\nsinglesTrackOutput=" << singlesTrackOutput - - << "\n\nDAT_ETA AFTER READING THE DBS VALUES" - << "\nmindetap =" << mindetap << "\nmindetap_halo=" << mindetap_halo - - << "\netamin[0]=" << etamin[0] << "\netamin[1]=" << etamin[1] << "\netamin[2]=" << etamin[2] - << "\netamin[3]=" << etamin[3] << "\netamin[4]=" << etamin[4] << "\netamin[5]=" << etamin[5] - << "\netamin[6]=" << etamin[6] << "\netamin[7]=" << etamin[7] - - << "\nmindeta12_accp =" << mindeta12_accp << "\nmindeta13_accp =" << mindeta13_accp - << "\nmindeta112_accp=" << mindeta112_accp << "\nmindeta113_accp=" << mindeta113_accp - - << "\netamax[0]=" << etamax[0] << "\netamax[1]=" << etamax[1] << "\netamax[2]=" << etamax[2] - << "\netamax[3]=" << etamax[3] << "\netamax[4]=" << etamax[4] << "\netamax[5]=" << etamax[5] - << "\netamax[6]=" << etamax[6] << "\netamax[7]=" << etamax[7] - - << "\nmaxdeta12_accp =" << maxdeta12_accp << "\nmaxdeta13_accp =" << maxdeta13_accp - << "\nmaxdeta112_accp=" << maxdeta112_accp << "\nmaxdeta113_accp=" << maxdeta113_accp - - << "\netawin[0]=" << etawin[0] << "\netawin[1]=" << etawin[1] << "\netawin[2]=" << etawin[2] - << "\netawin[3]=" << etawin[3] << "\netawin[4]=" << etawin[4] << "\netawin[5]=" << etawin[5] - << "\netawin[6]=" << etawin[6] - - << "\nmaxdphi12_accp =" << maxdphi12_accp << "\nmaxdphi13_accp =" << maxdphi13_accp - << "\nmaxdphi112_accp=" << maxdphi112_accp << "\nmaxdphi113_accp=" << maxdphi113_accp - - << "\nmindphip =" << mindphip << "\nmindphip_halo=" << mindphip_halo - - << "\nstraightp=" << straightp << "\ncurvedp =" << curvedp << "\nmbaPhiOff=" << mbaPhiOff - << "\nmbbPhiOff=" << mbbPhiOff - - << "\n\nFIRMWARE VERSIONS AFTER READING THE DBS VALUES" - << "\nSP: " << firmwareSP << "\nFA: " << firmwareFA << "\nDD: " << firmwareDD << "\nVM: " << firmwareVM; - - // --------------------------------------------------------- - - return pset; -} void L1MuCSCTFConfiguration::print(std::ostream& myStr) const { myStr << "\nL1 Mu CSCTF Parameters \n" << std::endl; diff --git a/CondFormats/L1TObjects/src/L1TUtmAlgorithmRcd.h b/CondFormats/L1TObjects/src/L1TUtmAlgorithmRcd.h deleted file mode 100644 index 7605849a16f2d..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmAlgorithmRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmAlgorithmRcd_h -#define CondFormatsDataRecord_L1TUtmAlgorithmRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmAlgorithmRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmBinRcd.h b/CondFormats/L1TObjects/src/L1TUtmBinRcd.h deleted file mode 100644 index 5f005718c8c5c..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmBinRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmBinRcd_h -#define CondFormatsDataRecord_L1TUtmBinRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmBinRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmConditionRcd.h b/CondFormats/L1TObjects/src/L1TUtmConditionRcd.h deleted file mode 100644 index d397bf144283a..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmConditionRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmConditionRcd_h -#define CondFormatsDataRecord_L1TUtmConditionRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmConditionRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmCutRcd.h b/CondFormats/L1TObjects/src/L1TUtmCutRcd.h deleted file mode 100644 index 4486972a3c8be..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmCutRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmCutRcd_h -#define CondFormatsDataRecord_L1TUtmCutRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmCutRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmCutValueRcd.h b/CondFormats/L1TObjects/src/L1TUtmCutValueRcd.h deleted file mode 100644 index a916720198c2e..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmCutValueRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmCutValueRcd_h -#define CondFormatsDataRecord_L1TUtmCutValueRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmCutValueRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmObjectRcd.h b/CondFormats/L1TObjects/src/L1TUtmObjectRcd.h deleted file mode 100644 index 7df2f28f33c8e..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmObjectRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmObjectRcd_h -#define CondFormatsDataRecord_L1TUtmObjectRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmObjectRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmScaleRcd.h b/CondFormats/L1TObjects/src/L1TUtmScaleRcd.h deleted file mode 100644 index e9dd4a99b1069..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmScaleRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmScaleRcd_h -#define CondFormatsDataRecord_L1TUtmScaleRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmScaleRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/CondFormats/L1TObjects/src/L1TUtmTriggerMenuRcd.h b/CondFormats/L1TObjects/src/L1TUtmTriggerMenuRcd.h deleted file mode 100644 index 93ec18e3f94e0..0000000000000 --- a/CondFormats/L1TObjects/src/L1TUtmTriggerMenuRcd.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef CondFormatsDataRecord_L1TUtmTriggerMenuRcd_h -#define CondFormatsDataRecord_L1TUtmTriggerMenuRcd_h -#include "FWCore/Framework/interface/EventSetupRecordImplementation.h -class L1TUtmTriggerMenuRcd : public edm::eventsetup::EventSetupRecordImplementation {}; -#endif diff --git a/L1Trigger/CSCTrackFinder/src/CSCTFSectorProcessor.cc b/L1Trigger/CSCTrackFinder/src/CSCTFSectorProcessor.cc index da2d720eab0ea..c72842335ffa6 100644 --- a/L1Trigger/CSCTrackFinder/src/CSCTFSectorProcessor.cc +++ b/L1Trigger/CSCTrackFinder/src/CSCTFSectorProcessor.cc @@ -1,8 +1,9 @@ -#include -#include -#include +#include "L1Trigger/CSCTrackFinder/interface/CSCTFSectorProcessor.h" +#include "L1Trigger/CSCTrackFinder/interface/CSCTrackFinderDataTypes.h" +#include "DataFormats/MuonDetId/interface/CSCTriggerNumbering.h" +#include "parameters.h" -#include +#include "FWCore/MessageLogger/interface/MessageLogger.h" #include #include @@ -198,7 +199,7 @@ void CSCTFSectorProcessor::initialize(const edm::EventSetup& c, const Tokens& to // Extract from EventSetup alternative (to the one, used in constructor) ParameterSet const L1MuCSCTFConfiguration& config = c.getData(tokens.config); // And initialize only those parameters, which left uninitialized during construction - readParameters(config.parameters((m_endcap - 1) * 6 + (m_sector - 1))); + readParameters(parameters(config, (m_endcap - 1) * 6 + (m_sector - 1))); } // --------------------------------------------------------------------------- diff --git a/L1Trigger/CSCTrackFinder/src/parameters.cc b/L1Trigger/CSCTrackFinder/src/parameters.cc new file mode 100644 index 0000000000000..49aa5a666e6cc --- /dev/null +++ b/L1Trigger/CSCTrackFinder/src/parameters.cc @@ -0,0 +1,521 @@ +// -*- C++ -*- +// +// Package: L1Trigger/CSCTrackFinder +// Class : parameters +// +// Implementation: +// [Notes on implementation] +// +// Original Author: Christopher Jones +// Created: Thu, 27 May 2021 20:02:26 GMT +// + +// system include files + +// user include files +#include "parameters.h" +#include "CondFormats/L1TObjects/interface/L1MuCSCTFConfiguration.h" +#include "FWCore/ParameterSet/interface/ParameterSet.h" +#include "FWCore/MessageLogger/interface/MessageLogger.h" + +#include + +edm::ParameterSet parameters(L1MuCSCTFConfiguration const& iConfig, int sp) { + LogDebug("L1MuCSCTFConfiguration") << "SP:" << int(sp) << std::endl; + + edm::ParameterSet pset; + if (sp >= 12) + return pset; + + // ------------------------------------------------------ + // core configuration + // by default everything is disabled: we need to set them + // coincidence and singles + bool run_core = false; + bool trigger_on_ME1a = false; + bool trigger_on_ME1b = false; + bool trigger_on_ME2 = false; + bool trigger_on_ME3 = false; + bool trigger_on_ME4 = false; + bool trigger_on_MB1a = false; + bool trigger_on_MB1d = false; + + unsigned int BXAdepth = 0; + unsigned int useDT = 0; + unsigned int widePhi = 0; + unsigned int PreTrigger = 0; + // ------------------------------------------------------ + + // ------------------------------------------------------ + // these are very important parameters. + // Double check with Alex + unsigned int CoreLatency = 7; + bool rescaleSinglesPhi = true; + + // ask Alex if use or remove them or what + bool AllowALCTonly = false; + bool AllowCLCTonly = false; + + // other useful parameters in general not set in the OMDS + unsigned int QualityEnableME1a = 0xFFFF; + unsigned int QualityEnableME1b = 0xFFFF; + unsigned int QualityEnableME1c = 0xFFFF; + unsigned int QualityEnableME1d = 0xFFFF; + unsigned int QualityEnableME1e = 0xFFFF; + unsigned int QualityEnableME1f = 0xFFFF; + unsigned int QualityEnableME2a = 0xFFFF; + unsigned int QualityEnableME2b = 0xFFFF; + unsigned int QualityEnableME2c = 0xFFFF; + unsigned int QualityEnableME3a = 0xFFFF; + unsigned int QualityEnableME3b = 0xFFFF; + unsigned int QualityEnableME3c = 0xFFFF; + unsigned int QualityEnableME4a = 0xFFFF; + unsigned int QualityEnableME4b = 0xFFFF; + unsigned int QualityEnableME4c = 0xFFFF; + + unsigned int kill_fiber = 0; + unsigned int singlesTrackOutput = 1; + // ------------------------------------------------------ + + //initialization of the DAT_ETA registers with default values + //the DAT_ETA registers meaning are explained at Table 2 of + //http://www.phys.ufl.edu/~uvarov/SP05/LU-SP_ReferenceGuide_090915_Update.pdf + std::vector etamin(8), etamax(8), etawin(7); + + unsigned int mindetap = 8; + unsigned int mindetap_halo = 8; + + etamin[0] = 22; + etamin[1] = 22; + etamin[2] = 14; + etamin[3] = 14; + etamin[4] = 14; + etamin[5] = 14; + etamin[6] = 10; + etamin[7] = 22; + + unsigned int mindeta12_accp = 8; + unsigned int mindeta13_accp = 19; + unsigned int mindeta112_accp = 19; + unsigned int mindeta113_accp = 30; + + etamax[0] = 127; + etamax[1] = 127; + etamax[2] = 127; + etamax[3] = 127; + etamax[4] = 127; + etamax[5] = 24; + etamax[6] = 24; + etamax[7] = 127; + + unsigned int maxdeta12_accp = 14; + unsigned int maxdeta13_accp = 25; + unsigned int maxdeta112_accp = 25; + unsigned int maxdeta113_accp = 36; + + etawin[0] = 4; + etawin[1] = 4; + etawin[2] = 4; + etawin[3] = 4; + etawin[4] = 4; + etawin[5] = 4; + etawin[6] = 4; + + unsigned int maxdphi12_accp = 64; + unsigned int maxdphi13_accp = 64; + unsigned int maxdphi112_accp = 64; + unsigned int maxdphi113_accp = 64; + + unsigned int mindphip = 128; + unsigned int mindphip_halo = 128; + + unsigned int straightp = 60; + unsigned int curvedp = 200; + + unsigned int mbaPhiOff = 0; + // this differ from the default value in the documentation because during + // craft 09 it mbbPhiOff, as well as mbaPhiOff were not existing, thus set to 0 (they are offsets) + // and for backward compatibility it needs to be set to 0. Anyway mbbPhiOff since its introduction in the + // core will have to be ALWAYS part of the configuration, so it won't be never initialized to the + // default value 2048. + unsigned int mbbPhiOff = 0; + + int eta_cnt = 0; + + // default firmware versions (the ones used from run 132440) + unsigned int firmwareSP = 20100210; + unsigned int firmwareFA = 20090521; + unsigned int firmwareDD = 20090521; + unsigned int firmwareVM = 20090521; + + // default printout + LogDebug("L1MuCSCTFConfiguration") + << "\nCORE CONFIGURATION DEFAULT VALUES" + << "\nrun_core=" << run_core << "\ntrigger_on_ME1a=" << trigger_on_ME1a << "\ntrigger_on_ME1b=" << trigger_on_ME1b + << "\ntrigger_on_ME2=" << trigger_on_ME2 << "\ntrigger_on_ME3=" << trigger_on_ME3 + << "\ntrigger_on_ME4=" << trigger_on_ME4 << "\ntrigger_on_MB1a=" << trigger_on_MB1a + << "\ntrigger_on_MB1d=" << trigger_on_MB1d + + << "\nBXAdepth=" << BXAdepth << "\nuseDT=" << useDT << "\nwidePhi=" << widePhi << "\nPreTrigger=" << PreTrigger + + << "\nCoreLatency=" << CoreLatency << "\nrescaleSinglesPhi=" << rescaleSinglesPhi + + << "\n\nVARIOUS CONFIGURATION PARAMETERS DEFAULT VALUES" + << "\nAllowALCTonly=" << AllowALCTonly << "\nAllowCLCTonly=" << AllowCLCTonly + + << "\nQualityEnableME1a=" << QualityEnableME1a << "\nQualityEnableME1b=" << QualityEnableME1b + << "\nQualityEnableME1c=" << QualityEnableME1c << "\nQualityEnableME1d=" << QualityEnableME1d + << "\nQualityEnableME1e=" << QualityEnableME1e << "\nQualityEnableME1f=" << QualityEnableME1f + << "\nQualityEnableME2a=" << QualityEnableME2a << "\nQualityEnableME2b=" << QualityEnableME2b + << "\nQualityEnableME2c=" << QualityEnableME2c << "\nQualityEnableME3a=" << QualityEnableME3a + << "\nQualityEnableME3b=" << QualityEnableME3b << "\nQualityEnableME3c=" << QualityEnableME3c + << "\nQualityEnableME4a=" << QualityEnableME4a << "\nQualityEnableME4b=" << QualityEnableME4b + << "\nQualityEnableME4c=" << QualityEnableME4c + + << "\nkill_fiber=" << kill_fiber << "\nsinglesTrackOutput=" << singlesTrackOutput + + << "\n\nDEFAULT VALUES FOR DAT_ETA" + << "\nmindetap =" << mindetap << "\nmindetap_halo=" << mindetap_halo + + << "\netamin[0]=" << etamin[0] << "\netamin[1]=" << etamin[1] << "\netamin[2]=" << etamin[2] + << "\netamin[3]=" << etamin[3] << "\netamin[4]=" << etamin[4] << "\netamin[5]=" << etamin[5] + << "\netamin[6]=" << etamin[6] << "\netamin[7]=" << etamin[7] + + << "\nmindeta12_accp =" << mindeta12_accp << "\nmindeta13_accp =" << mindeta13_accp + << "\nmindeta112_accp=" << mindeta112_accp << "\nmindeta113_accp=" << mindeta113_accp + + << "\netamax[0]=" << etamax[0] << "\netamax[1]=" << etamax[1] << "\netamax[2]=" << etamax[2] + << "\netamax[3]=" << etamax[3] << "\netamax[4]=" << etamax[4] << "\netamax[5]=" << etamax[5] + << "\netamax[6]=" << etamax[6] << "\netamax[7]=" << etamax[7] + + << "\nmaxdeta12_accp =" << maxdeta12_accp << "\nmaxdeta13_accp =" << maxdeta13_accp + << "\nmaxdeta112_accp=" << maxdeta112_accp << "\nmaxdeta113_accp=" << maxdeta113_accp + + << "\netawin[0]=" << etawin[0] << "\netawin[1]=" << etawin[1] << "\netawin[2]=" << etawin[2] + << "\netawin[3]=" << etawin[3] << "\netawin[4]=" << etawin[4] << "\netawin[5]=" << etawin[5] + << "\netawin[6]=" << etawin[6] + + << "\nmaxdphi12_accp =" << maxdphi12_accp << "\nmaxdphi13_accp =" << maxdphi13_accp + << "\nmaxdphi112_accp=" << maxdphi112_accp << "\nmaxdphi113_accp=" << maxdphi113_accp + + << "\nmindphip =" << mindphip << "\nmindphip_halo=" << mindphip_halo + + << "\nstraightp=" << straightp << "\ncurvedp =" << curvedp << "\nmbaPhiOff=" << mbaPhiOff + << "\nmbbPhiOff=" << mbbPhiOff + + << "\n\nFIRMWARE VERSIONS" + << "\nSP: " << firmwareSP << "\nFA: " << firmwareFA << "\nDD: " << firmwareDD << "\nVM: " << firmwareVM; + + // start filling the registers with the values in the DBS + std::stringstream conf(iConfig[sp]); + while (!conf.eof()) { + char buff[1024]; + conf.getline(buff, 1024); + std::stringstream line(buff); + //std::cout<<"buff:"<> register_; + std::string chip_; + line >> chip_; + std::string muon_; + line >> muon_; + std::string writeValue_; + line >> writeValue_; + std::string comments_; + std::getline(line, comments_); + + if (register_ == "CSR_REQ" && chip_ == "SP") { + unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); + run_core = (value & 0x8000); + trigger_on_ME1a = (value & 0x0001); + trigger_on_ME1b = (value & 0x0002); + trigger_on_ME2 = (value & 0x0004); + trigger_on_ME3 = (value & 0x0008); + trigger_on_ME4 = (value & 0x0010); + trigger_on_MB1a = (value & 0x0100); + trigger_on_MB1d = (value & 0x0200); + } + + if (register_ == "CSR_SCC" && chip_ == "SP") { + unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); + + BXAdepth = (value & 0x3); + useDT = ((value & 0x80) >> 7); + widePhi = ((value & 0x40) >> 6); + PreTrigger = ((value & 0x300) >> 8); + } + + if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M1") + QualityEnableME1a = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M2") + QualityEnableME1b = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F1" && muon_ == "M3") + QualityEnableME1c = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M1") + QualityEnableME1d = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M2") + QualityEnableME1e = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F2" && muon_ == "M3") + QualityEnableME1f = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M1") + QualityEnableME2a = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M2") + QualityEnableME2b = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F3" && muon_ == "M3") + QualityEnableME2c = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M1") + QualityEnableME3a = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M2") + QualityEnableME3b = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F4" && muon_ == "M3") + QualityEnableME3c = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M1") + QualityEnableME4a = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M2") + QualityEnableME4b = ::strtol(writeValue_.c_str(), nullptr, 16); + if (register_ == "CSR_LQE" && chip_ == "F5" && muon_ == "M3") + QualityEnableME4c = ::strtol(writeValue_.c_str(), nullptr, 16); + + if (register_ == "CSR_KFL") + kill_fiber = ::strtol(writeValue_.c_str(), nullptr, 16); + + if (register_ == "CSR_SFC" && chip_ == "SP") { + unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); + singlesTrackOutput = ((value & 0x3000) >> 12); + } + + if (register_ == "CNT_ETA" && chip_ == "SP") { + unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); + eta_cnt = value; + } + + // LATEST VERSION FROM CORE 2010-01-22 at http://www.phys.ufl.edu/~madorsky/sp/2010-01-22 + if (register_ == "DAT_ETA" && chip_ == "SP") { + unsigned int value = ::strtol(writeValue_.c_str(), nullptr, 16); + + //std::cout<<"DAT_ETA SP value:"<= 2 && eta_cnt < 10) + etamin[eta_cnt - 2] = value; + + if (eta_cnt == 10) + mindeta12_accp = value; + if (eta_cnt == 11) + mindeta13_accp = value; + if (eta_cnt == 12) + mindeta112_accp = value; + if (eta_cnt == 13) + mindeta113_accp = value; + + if (eta_cnt >= 14 && eta_cnt < 22) + etamax[eta_cnt - 14] = value; + + if (eta_cnt == 22) + maxdeta12_accp = value; + if (eta_cnt == 23) + maxdeta13_accp = value; + if (eta_cnt == 24) + maxdeta112_accp = value; + if (eta_cnt == 25) + maxdeta113_accp = value; + + if (eta_cnt >= 26 && eta_cnt < 33) + etawin[eta_cnt - 26] = value; + + if (eta_cnt == 33) + maxdphi12_accp = value; + if (eta_cnt == 34) + maxdphi13_accp = value; + if (eta_cnt == 35) + maxdphi112_accp = value; + if (eta_cnt == 36) + maxdphi113_accp = value; + + if (eta_cnt == 37) + mindphip = value; + if (eta_cnt == 38) + mindphip_halo = value; + + if (eta_cnt == 39) + straightp = value; + if (eta_cnt == 40) + curvedp = value; + if (eta_cnt == 41) + mbaPhiOff = value; + if (eta_cnt == 42) + mbbPhiOff = value; + + eta_cnt++; + } + + // filling the firmware variables: SP MEZZANINE + if (register_ == "FIRMWARE" && muon_ == "SP") { + unsigned int value = atoi(writeValue_.c_str()); + firmwareSP = value; + } + + // filling the firmware variables: Front FPGAs + if (register_ == "FIRMWARE" && muon_ == "FA") { + unsigned int value = atoi(writeValue_.c_str()); + firmwareFA = value; + } + + // filling the firmware variables: DDU + if (register_ == "FIRMWARE" && muon_ == "DD") { + unsigned int value = atoi(writeValue_.c_str()); + firmwareDD = value; + } + + // filling the firmware variables: VM + if (register_ == "FIRMWARE" && muon_ == "VM") { + unsigned int value = atoi(writeValue_.c_str()); + firmwareVM = value; + } + } + + pset.addParameter("run_core", run_core); + pset.addParameter("trigger_on_ME1a", trigger_on_ME1a); + pset.addParameter("trigger_on_ME1b", trigger_on_ME1b); + pset.addParameter("trigger_on_ME2", trigger_on_ME2); + pset.addParameter("trigger_on_ME3", trigger_on_ME3); + pset.addParameter("trigger_on_ME4", trigger_on_ME4); + pset.addParameter("trigger_on_MB1a", trigger_on_MB1a); + pset.addParameter("trigger_on_MB1d", trigger_on_MB1d); + + pset.addParameter("BXAdepth", BXAdepth); + pset.addParameter("useDT", useDT); + pset.addParameter("widePhi", widePhi); + pset.addParameter("PreTrigger", PreTrigger); + + // this were two old settings, not used anymore. Set them to zero + // ask Alex if he can remove them altogether + pset.addParameter("AllowALCTonly", AllowALCTonly); + pset.addParameter("AllowCLCTonly", AllowCLCTonly); + + pset.addParameter("CoreLatency", CoreLatency); + pset.addParameter("rescaleSinglesPhi", rescaleSinglesPhi); + + pset.addParameter("QualityEnableME1a", QualityEnableME1a); + pset.addParameter("QualityEnableME1b", QualityEnableME1b); + pset.addParameter("QualityEnableME1c", QualityEnableME1c); + pset.addParameter("QualityEnableME1d", QualityEnableME1d); + pset.addParameter("QualityEnableME1e", QualityEnableME1e); + pset.addParameter("QualityEnableME1f", QualityEnableME1f); + pset.addParameter("QualityEnableME2a", QualityEnableME2a); + pset.addParameter("QualityEnableME2b", QualityEnableME2b); + pset.addParameter("QualityEnableME2c", QualityEnableME2c); + pset.addParameter("QualityEnableME3a", QualityEnableME3a); + pset.addParameter("QualityEnableME3b", QualityEnableME3b); + pset.addParameter("QualityEnableME3c", QualityEnableME3c); + pset.addParameter("QualityEnableME4a", QualityEnableME4a); + pset.addParameter("QualityEnableME4b", QualityEnableME4b); + pset.addParameter("QualityEnableME4c", QualityEnableME4c); + + pset.addParameter("kill_fiber", kill_fiber); + pset.addParameter("singlesTrackOutput", singlesTrackOutput); + + // add the DAT_ETA registers to the pset + pset.addParameter("mindetap", mindetap); + pset.addParameter("mindetap_halo", mindetap_halo); + + pset.addParameter >("EtaMin", etamin); + + pset.addParameter("mindeta12_accp", mindeta12_accp); + pset.addParameter("mindeta13_accp", mindeta13_accp); + pset.addParameter("mindeta112_accp", mindeta112_accp); + pset.addParameter("mindeta113_accp", mindeta113_accp); + + pset.addParameter >("EtaMax", etamax); + + pset.addParameter("maxdeta12_accp", maxdeta12_accp); + pset.addParameter("maxdeta13_accp", maxdeta13_accp); + pset.addParameter("maxdeta112_accp", maxdeta112_accp); + pset.addParameter("maxdeta113_accp", maxdeta113_accp); + + pset.addParameter >("EtaWindows", etawin); + + pset.addParameter("maxdphi12_accp", maxdphi12_accp); + pset.addParameter("maxdphi13_accp", maxdphi13_accp); + pset.addParameter("maxdphi112_accp", maxdphi112_accp); + pset.addParameter("maxdphi113_accp", maxdphi113_accp); + + pset.addParameter("mindphip", mindphip); + pset.addParameter("mindphip_halo", mindphip_halo); + + pset.addParameter("straightp", straightp); + pset.addParameter("curvedp", curvedp); + pset.addParameter("mbaPhiOff", mbaPhiOff); + pset.addParameter("mbbPhiOff", mbbPhiOff); + + pset.addParameter("firmwareSP", firmwareSP); + pset.addParameter("firmwareFA", firmwareFA); + pset.addParameter("firmwareDD", firmwareDD); + pset.addParameter("firmwareVM", firmwareVM); + + // printout + LogDebug("L1MuCSCTFConfiguration") + << "\nCORE CONFIGURATION AFTER READING THE DBS VALUES" + << "\nrun_core=" << run_core << "\ntrigger_on_ME1a=" << trigger_on_ME1a << "\ntrigger_on_ME1b=" << trigger_on_ME1b + << "\ntrigger_on_ME2=" << trigger_on_ME2 << "\ntrigger_on_ME3=" << trigger_on_ME3 + << "\ntrigger_on_ME4=" << trigger_on_ME4 << "\ntrigger_on_MB1a=" << trigger_on_MB1a + << "\ntrigger_on_MB1d=" << trigger_on_MB1d + + << "\nBXAdepth=" << BXAdepth << "\nuseDT=" << useDT << "\nwidePhi=" << widePhi << "\nPreTrigger=" << PreTrigger + + << "\nCoreLatency=" << CoreLatency << "\nrescaleSinglesPhi=" << rescaleSinglesPhi + + << "\n\nVARIOUS CONFIGURATION PARAMETERS AFTER READING THE DBS VALUES" + << "\nAllowALCTonly=" << AllowALCTonly << "\nAllowCLCTonly=" << AllowCLCTonly + + << "\nQualityEnableME1a=" << QualityEnableME1a << "\nQualityEnableME1b=" << QualityEnableME1b + << "\nQualityEnableME1c=" << QualityEnableME1c << "\nQualityEnableME1d=" << QualityEnableME1d + << "\nQualityEnableME1e=" << QualityEnableME1e << "\nQualityEnableME1f=" << QualityEnableME1f + << "\nQualityEnableME2a=" << QualityEnableME2a << "\nQualityEnableME2b=" << QualityEnableME2b + << "\nQualityEnableME2c=" << QualityEnableME2c << "\nQualityEnableME3a=" << QualityEnableME3a + << "\nQualityEnableME3b=" << QualityEnableME3b << "\nQualityEnableME3c=" << QualityEnableME3c + << "\nQualityEnableME4a=" << QualityEnableME4a << "\nQualityEnableME4b=" << QualityEnableME4b + << "\nQualityEnableME4c=" << QualityEnableME4c + + << "\nkill_fiber=" << kill_fiber << "\nsinglesTrackOutput=" << singlesTrackOutput + + << "\n\nDAT_ETA AFTER READING THE DBS VALUES" + << "\nmindetap =" << mindetap << "\nmindetap_halo=" << mindetap_halo + + << "\netamin[0]=" << etamin[0] << "\netamin[1]=" << etamin[1] << "\netamin[2]=" << etamin[2] + << "\netamin[3]=" << etamin[3] << "\netamin[4]=" << etamin[4] << "\netamin[5]=" << etamin[5] + << "\netamin[6]=" << etamin[6] << "\netamin[7]=" << etamin[7] + + << "\nmindeta12_accp =" << mindeta12_accp << "\nmindeta13_accp =" << mindeta13_accp + << "\nmindeta112_accp=" << mindeta112_accp << "\nmindeta113_accp=" << mindeta113_accp + + << "\netamax[0]=" << etamax[0] << "\netamax[1]=" << etamax[1] << "\netamax[2]=" << etamax[2] + << "\netamax[3]=" << etamax[3] << "\netamax[4]=" << etamax[4] << "\netamax[5]=" << etamax[5] + << "\netamax[6]=" << etamax[6] << "\netamax[7]=" << etamax[7] + + << "\nmaxdeta12_accp =" << maxdeta12_accp << "\nmaxdeta13_accp =" << maxdeta13_accp + << "\nmaxdeta112_accp=" << maxdeta112_accp << "\nmaxdeta113_accp=" << maxdeta113_accp + + << "\netawin[0]=" << etawin[0] << "\netawin[1]=" << etawin[1] << "\netawin[2]=" << etawin[2] + << "\netawin[3]=" << etawin[3] << "\netawin[4]=" << etawin[4] << "\netawin[5]=" << etawin[5] + << "\netawin[6]=" << etawin[6] + + << "\nmaxdphi12_accp =" << maxdphi12_accp << "\nmaxdphi13_accp =" << maxdphi13_accp + << "\nmaxdphi112_accp=" << maxdphi112_accp << "\nmaxdphi113_accp=" << maxdphi113_accp + + << "\nmindphip =" << mindphip << "\nmindphip_halo=" << mindphip_halo + + << "\nstraightp=" << straightp << "\ncurvedp =" << curvedp << "\nmbaPhiOff=" << mbaPhiOff + << "\nmbbPhiOff=" << mbbPhiOff + + << "\n\nFIRMWARE VERSIONS AFTER READING THE DBS VALUES" + << "\nSP: " << firmwareSP << "\nFA: " << firmwareFA << "\nDD: " << firmwareDD << "\nVM: " << firmwareVM; + + // --------------------------------------------------------- + + return pset; +} diff --git a/L1Trigger/CSCTrackFinder/src/parameters.h b/L1Trigger/CSCTrackFinder/src/parameters.h new file mode 100644 index 0000000000000..2c320da0f3b04 --- /dev/null +++ b/L1Trigger/CSCTrackFinder/src/parameters.h @@ -0,0 +1,30 @@ +#ifndef L1Trigger_CSCTrackFinder_parameters_h +#define L1Trigger_CSCTrackFinder_parameters_h +// -*- C++ -*- +// +// Package: L1Trigger/CSCTrackFinders +// Class : parameters +// +/**\function parameters parameters.h + + Description: Converts info in L1MuCSCTFConfiguration to a edm::ParameterSet + + Usage: + +*/ +// +// Original Author: Christopher Jones +// Created: Thu, 27 May 2021 20:02:19 GMT +// + +// system include files + +// user include files +#include "FWCore/ParameterSet/interface/ParameterSetfwd.h" + +class L1MuCSCTFConfiguration; + +// forward declarations +edm::ParameterSet parameters(L1MuCSCTFConfiguration const&, int sp); + +#endif