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fixing headers in new shell files (#307)
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+154
-19
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11 files changed

+154
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‎hdk/cl/examples/cl_dram_dma/build/scripts/prohibit_tr.tcl

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# Amazon FPGA Hardware Development Kit
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#
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# Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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#
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# Licensed under the Amazon Software License (the "License"). You may not use
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# this file except in compliance with the License. A copy of the License is
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# located at
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#
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# http://aws.amazon.com/asl/
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#
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# or in the "license" file accompanying this file. This file is distributed on
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# an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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# implied. See the License for the specific language governing permissions and
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# limitations under the License.
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if [string match "2017.1" [version -short]] {
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puts "Running LUT utilization analysis"
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set lutDemand [llength [get_cells -hierarchical -filter { PRIMITIVE_TYPE =~ CLB.LUT.* } ]]

‎hdk/common/shell_v04151701/build/scripts/prohibit_tr.tcl

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# Amazon FPGA Hardware Development Kit
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#
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# Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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#
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# Licensed under the Amazon Software License (the "License"). You may not use
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# this file except in compliance with the License. A copy of the License is
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# located at
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#
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# http://aws.amazon.com/asl/
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#
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# or in the "license" file accompanying this file. This file is distributed on
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# an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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# implied. See the License for the specific language governing permissions and
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# limitations under the License.
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if [string match "2017.1" [version -short]] {
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puts "Running LUT utilization analysis"
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set lutDemand [llength [get_cells -hierarchical -filter { PRIMITIVE_TYPE =~ CLB.LUT.* } ]]

‎hdk/common/shell_v04151701/build/scripts/step.tcl

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# Amazon FPGA Hardware Development Kit
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#
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# Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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#
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# Licensed under the Amazon Software License (the "License"). You may not use
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# this file except in compliance with the License. A copy of the License is
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# located at
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#
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# http://aws.amazon.com/asl/
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#
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# or in the "license" file accompanying this file. This file is distributed on
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# an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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# implied. See the License for the specific language governing permissions and
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# limitations under the License.
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proc impl_step {phase top {options none} {directive none} {pre none} } {
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upvar bitDir bitDir
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upvar implDir implDir

‎hdk/common/shell_v04151701/design/interfaces/cl_ports.vh

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//---------------------------------------------------------------------------------------
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// Amazon FGPA Hardware Development Kit
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//
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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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//
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// http://aws.amazon.com/asl/
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//
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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//---------------------------------------------------------------------------------------
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//--------------------------------
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// Globals

‎hdk/common/shell_v04151701/design/lib/bram_2rw.sv

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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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//----------------------------------------------------
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// This is a dual ported BRAM
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//----------------------------------------------------

‎hdk/common/shell_v04151701/design/sh_ddr/sim/mgt_acc_axl.sv

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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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`pragma protect begin_protected
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`pragma protect version = 1
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`pragma protect encrypt_agent = "XILINX"

‎hdk/common/shell_v04151701/design/sh_ddr/sim/mgt_gen_axl.sv

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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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`pragma protect begin_protected
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`pragma protect version = 1
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`pragma protect encrypt_agent = "XILINX"

‎hdk/common/shell_v04151701/design/sh_ddr/sim/sh_ddr.sv

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// =============================================================================
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// Copyright 2016 Amazon.com, Inc. or its affiliates.
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// All Rights Reserved Worldwide.
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// Amazon Confidential information
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// Restricted NDA Material
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// =============================================================================
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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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module sh_ddr #( parameter DDR_A_PRESENT = 1,
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parameter DDR_B_PRESENT = 1,

‎hdk/common/shell_v04151701/design/sh_ddr/synth/mgt_acc_axl.sv

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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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`pragma protect begin_protected
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`pragma protect version = 2
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`pragma protect encrypt_agent = "XILINX"

‎hdk/common/shell_v04151701/design/sh_ddr/synth/mgt_gen_axl.sv

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// Amazon FPGA Hardware Development Kit
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//
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// Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Licensed under the Amazon Software License (the "License"). You may not use
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// this file except in compliance with the License. A copy of the License is
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// located at
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//
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// http://aws.amazon.com/asl/
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//
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// or in the "license" file accompanying this file. This file is distributed on
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// an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or
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// implied. See the License for the specific language governing permissions and
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// limitations under the License.
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`pragma protect begin_protected
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`pragma protect version = 2
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`pragma protect encrypt_agent = "XILINX"

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