From ef1f669cb7db5e3aebc390f5bd228cd88ed31a66 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 Dec 2018 18:23:52 +0530
Subject: [PATCH 0001/1765] top: More detailed top-level README.md

This patch adds more details to top-level README.md based on
current state of OpenSBI.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 86 +++++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 65 insertions(+), 21 deletions(-)

diff --git a/README.md b/README.md
index 38922731b7c..82084c3d8c9 100644
--- a/README.md
+++ b/README.md
@@ -1,37 +1,81 @@
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
-The RISC-V Supervisor Binary Interface (SBI) is a recommended
+The **RISC-V Supervisor Binary Interface (SBI)** is a recommended
 interface between:
-1. platform specific firmware running in M-mode and bootloader
-   running in S-mode
-2. platform specific firmware running in M-mode and general
-   purpose operating system running in S-mode
-3. hypervisor runnng in HS-mode and general purpose operating
-   system running in VS-mode.
 
-The RISC-V SBI spec is maintained as independent project by
-RISC-V Foundation at https://github.com/riscv/riscv-sbi-doc
+1. Platform specific firmware running in M-mode and
+   general-purpose-os/hypervisor/bootloader running in S-mode/HS-mode
+2. Hypervisor runnng in HS-mode and general-purpose-os/bootloader
+   running in VS-mode
 
-The RISC-V OpenSBI project aims to provides an open-source and
-extensible implementation of the SBI spec. This project can be
-easily extended by RISC-V platform or RISC-V System-on-Chip vendors.
+The **RISC-V SBI specification** is maintained as independent project
+by RISC-V Foundation on [Github](https://github.com/riscv/riscv-sbi-doc)
 
+The **RISC-V OpenSBI project** aims to provides an open-source and
+extensible implementation of the **RISC-V SBI specification** for
+point 1) mentioned above. It can be easily extended by RISC-V platform
+or RISC-V System-on-Chip vendors.
+
+We can create three things using the RISC-V OpenSBI project:
+
+1. **libsbi.a** - Generic OpenSBI static library
+2. **libplatsbi.a** - Platform specific OpenSBI static library
+   (It is libsbi.a plus platform specific hooks represented
+    by "platform" symbol)
+3. **blobs** - Platform specific firware blobs
 
 How to Build?
 -------------
 
-Below are the steps to cross-compile and install RISC-V OpenSBI:
+For cross-compiling, please ensure that CROSS_COMPILE environment
+variable is set before starting build system.
+
+The libplatsbi.a and blobs are optional and only built when
+`PLAT=<platform_subdir>` parameter is specified to top-level make.
+(**NOTE**: `<platform_subdir>` is sub-directory under plat/ directory)
 
-1. Setup build environment
-$ CROSS_COMPILE=riscv64-unknown-linux-gnu-
+To build and install Generic OpenSBI library do the following:
 
-2. Build sources
-$ make PLAT=<platform_name>
+1. Build **libsbi.a**:
+`make`
 OR
-$ make PLAT=<platform_name> O=<build_directory>
+`make O=<build_directory>`
+2. Install **libsbi.a and headers**:
+`make install`
+OR
+`make I=<install_directory> install`
+
+To build and install platform specific OpenSBI library and blobs
+do the following:
 
-3. Install blobs
-$ make PLAT=<platform_name> install
+1. Build **libsbi, libplatsbi, and blobs**:
+`make PLAT=<platform_subdir>`
+OR
+`make PLAT=<platform_subdir> O=<build_directory>`
+2. Install **libsbi, headers, libplatsbi, and blobs**:
+`make PLAT=<platform_subdir> install`
 OR
-$ make PLAT=<platform_name> I=<install_directory> install
+`make PLAT=<platform_subdir> I=<install_directory> install`
+
+In addition, we can also specify platform specific command-line
+options to top-level make (such as `PLAT_<xyz>` or `FW_<abc>`)
+which are described under `docs/plat/<platform_name>.md` OR
+`docs/blob/<blob_name>.md`.
+
+Documentation
+-------------
+
+All our documenation is under `docs` directory organized in following
+manner:
+
+* `docs/platform_guide.md` - Guidelines for adding new platform support
+* `docs/library_usage.md` - Guidelines for using static library
+* `docs/plat/<platform_name>.md` - Documentation for `<platform_name>` platform
+* `docs/blob/<blob_name>.md` - Documentation for firmware blob `<blob_name>`
+
+We also prefer source level documentation, so wherever possible we describe
+stuff directly in the source code. This helps us maintain source and its
+documentation at the same place. For source level documentation we strictly
+follow Doxygen style. Please refer [Doxygen manual]
+(http://www.stack.nl/~dimitri/doxygen/manual.html) for details.
\ No newline at end of file

From 33ec85c9ab234f546b5814a8bd1dad9ab698a6b0 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 Dec 2018 21:04:38 +0530
Subject: [PATCH 0002/1765] docs: Add documentation for firmware blobs

This patch adds documentation for fw_jump and fw_payload
firmware blobs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/blob/fw_jump.md    | 37 ++++++++++++++++++++++++++++++
 docs/blob/fw_payload.md | 51 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100644 docs/blob/fw_jump.md
 create mode 100644 docs/blob/fw_payload.md

diff --git a/docs/blob/fw_jump.md b/docs/blob/fw_jump.md
new file mode 100644
index 00000000000..ee6ad0d8780
--- /dev/null
+++ b/docs/blob/fw_jump.md
@@ -0,0 +1,37 @@
+OpenSBI Firmware with Jump Address(FW_JUMP)
+===========================================
+
+The **OpenSBI firmware with Jump Address (FW_JUMP)** is a
+firmware which only know the address of next booting stage
+(i.e. bootloader/kernel).
+
+This **FW_JUMP** firmware is particularly useful when booting
+stage prior to OpenSBI firmware is capable of loading OpenSBI
+firmware and booting stage after OpenSBI firmware separately.
+
+How to Enable?
+--------------
+
+The **FW_JUMP** firmware can be enabled by any of the following
+methods:
+
+1. Passing `FW_JUMP=y` command-line parameter to
+top-level `make`
+2. Setting `FW_JUMP=y` in platform `config.mk`
+
+Config Options
+--------------
+
+We need more config details for **FW_JUMP** firmware to work
+correctly. These config details can be passed as paramter to
+top-level `make` or can be set in platform `config.mk`.
+
+Following are the config options for **FW_JUMP** firmware:
+
+* **FW_JUMP_ADDR** - Address where next booting stage is
+located. This is a mandatory config option and will result
+in compile error if not provided.
+* **FW_JUMP_FDT_ADDR** - Address where FDT passed by prior
+booting stage will be placed before passing to next booting
+stage. If this option is not provided then firmware will pass
+zero as FDT address to next booting stage.
\ No newline at end of file
diff --git a/docs/blob/fw_payload.md b/docs/blob/fw_payload.md
new file mode 100644
index 00000000000..2fab092cc68
--- /dev/null
+++ b/docs/blob/fw_payload.md
@@ -0,0 +1,51 @@
+OpenSBI Firmware with Payload (FW_PAYLOAD)
+==========================================
+
+The **OpenSBI firmware with Payload (FW_PAYLOAD)** is a
+firmware which includes next booting stage binary (i.e.
+bootloader/kernel) as payload in the OpenSBI firmware binary.
+
+This **FW_PAYLOAD** firmware is particularly useful when
+booting stage prior to OpenSBI firmware is not capable of
+loading OpenSBI firmware and booting stage after OpenSBI
+firmware separately.
+
+It is also possible that booting stage prior to OpenSBI
+firmware does not pass **flattened device tree (FDT)**. In
+this case, we have provision to embed FDT in .text section
+of **FW_PAYLOAD** firmware.
+
+How to Enable?
+--------------
+
+The **FW_PAYLOAD** firmware can be enabled by any of the
+following methods:
+
+1. Passing `FW_PAYLOAD=y` command-line parameter to
+top-level `make`
+2. Setting `FW_PAYLOAD=y` in platform `config.mk`
+
+Config Options
+--------------
+
+We need more config details for **FW_PAYLOAD** firmware to
+work correctly. These config details can be passed as paramter
+to top-level `make` or can be set in platform `config.mk`.
+
+Following are the config options for **FW_PAYLOAD** firmware:
+
+* **FW_PAYLOAD_OFFSET** - Offset from FW_TEXT_BASE where next
+booting stage binary will be linked to **FW_PAYLOAD** firmware.
+This is a mandatory config option and will result in compile
+error if not provided.
+* **FW_PAYLOAD_PATH** - Path to the next booting stage binary.
+If this option is not provided then **`while (1)`** is taken as
+payload.
+* **FW_PAYLOAD_FDT_PATH** - Path to the FDT binary to be embedded
+in .text section of **FW_PAYLOAD** firmware. If this option is
+not provided then firmware will expect FDT to be passed by prior
+booting stage.
+* **FW_PAYLOAD_FDT_ADDR** - Address where FDT passed by prior
+booting stage (or embedded FDT) will be placed before passing
+to next booting stage. If this option is not provided then
+firmware will pass zero as FDT address to next booting stage.
\ No newline at end of file

From ab5b228ff596657dffce4a2ed96cd73a95e1864b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 07:51:59 +0530
Subject: [PATCH 0003/1765] lib: sbi_hart: Remove unwanted sbi_printf()

This patch removes unwanted sbi_printf() from
sbi_hart_wait_for_coldboot().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_hart.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 30f4f03f014..fd6d4d40695 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -270,7 +270,6 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	unsigned long mipval;
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	sbi_printf("%s: In hartid = [%d]\n", __func__, hartid);
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
 	    (NO_HOTPLUG_BITMAP_SIZE <= hartid))
 		sbi_hart_hang();
@@ -287,11 +286,10 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	int max_hart = sbi_platform_hart_count(plat);
-	
+
 	for(int i = 0; i < max_hart ; i++) {
 		/* send an IPI to every other hart */
 		if (i != hartid)
-			sbi_platform_ipi_inject(plat, i, hartid);	
-	}		
-
+			sbi_platform_ipi_inject(plat, i, hartid);
+	}
 }

From b023176c17e655f9371df65f6fddc0c1bcbb1fc7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 09:52:27 +0530
Subject: [PATCH 0004/1765] top: Rename "blob" to "firmware" everywhere

This patch renames "blob" to "firmware" everywhere for better
and intutive naming.

Signed-off-by: Anup Patel <anup@brainfault.org>
---
 Makefile                              | 34 +++++++++++------------
 README.md                             | 14 +++++-----
 blob/objects.mk                       | 39 ---------------------------
 docs/{blob => firmware}/fw_jump.md    |  0
 docs/{blob => firmware}/fw_payload.md |  0
 {blob => firmware}/fw_common.S        |  0
 {blob => firmware}/fw_common.ldS      |  0
 {blob => firmware}/fw_jump.S          |  0
 {blob => firmware}/fw_jump.elf.ldS    |  0
 {blob => firmware}/fw_payload.S       |  0
 {blob => firmware}/fw_payload.elf.ldS |  0
 firmware/objects.mk                   | 39 +++++++++++++++++++++++++++
 12 files changed, 63 insertions(+), 63 deletions(-)
 delete mode 100644 blob/objects.mk
 rename docs/{blob => firmware}/fw_jump.md (100%)
 rename docs/{blob => firmware}/fw_payload.md (100%)
 rename {blob => firmware}/fw_common.S (100%)
 rename {blob => firmware}/fw_common.ldS (100%)
 rename {blob => firmware}/fw_jump.S (100%)
 rename {blob => firmware}/fw_jump.elf.ldS (100%)
 rename {blob => firmware}/fw_payload.S (100%)
 rename {blob => firmware}/fw_payload.elf.ldS (100%)
 create mode 100644 firmware/objects.mk

diff --git a/Makefile b/Makefile
index ff416744e2d..112d3722b65 100644
--- a/Makefile
+++ b/Makefile
@@ -62,7 +62,7 @@ export plat_dir=$(CURDIR)/$(plat_subdir)
 export plat_common_dir=$(CURDIR)/plat/common
 export include_dir=$(CURDIR)/include
 export lib_dir=$(CURDIR)/lib
-export blob_dir=$(CURDIR)/blob
+export firmware_dir=$(CURDIR)/firmware
 
 # Setup list of objects.mk files
 ifdef PLAT
@@ -70,7 +70,7 @@ plat-object-mks=$(shell if [ -d $(plat_dir) ]; then find $(plat_dir) -iname "obj
 plat-common-object-mks=$(shell if [ -d $(plat_common_dir) ]; then find $(plat_common_dir) -iname "objects.mk" | sort -r; fi)
 endif
 lib-object-mks=$(shell if [ -d $(lib_dir) ]; then find $(lib_dir) -iname "objects.mk" | sort -r; fi)
-blob-object-mks=$(shell if [ -d $(blob_dir) ]; then find $(blob_dir) -iname "objects.mk" | sort -r; fi)
+firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
 # Include platform specifig config.mk
 ifdef PLAT
@@ -83,23 +83,23 @@ include $(plat-object-mks)
 include $(plat-common-object-mks)
 endif
 include $(lib-object-mks)
-include $(blob-object-mks)
+include $(firmware-object-mks)
 
 # Setup list of objects
 lib-objs-path-y=$(foreach obj,$(lib-objs-y),$(build_dir)/lib/$(obj))
 ifdef PLAT
 plat-objs-path-y=$(foreach obj,$(plat-objs-y),$(build_dir)/$(plat_subdir)/$(obj))
 plat-common-objs-path-y=$(foreach obj,$(plat-common-objs-y),$(build_dir)/plat/common/$(obj))
-blob-bins-path-y=$(foreach bin,$(blob-bins-y),$(build_dir)/$(plat_subdir)/blob/$(bin))
+firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(build_dir)/$(plat_subdir)/firmware/$(bin))
 endif
-blob-elfs-path-y=$(blob-bins-path-y:.bin=.elf)
-blob-objs-path-y=$(blob-bins-path-y:.bin=.o)
+firmware-elfs-path-y=$(firmware-bins-path-y:.bin=.elf)
+firmware-objs-path-y=$(firmware-bins-path-y:.bin=.o)
 
 # Setup list of deps files for objects
 deps-y=$(plat-objs-path-y:.o=.dep)
 deps-y+=$(plat-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
-deps-y+=$(blob-objs-path-y:.o=.dep)
+deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup compilation environment
 cpp=$(CROSS_COMPILE)cpp
@@ -109,14 +109,14 @@ cppflags+=-I$(plat_dir)/include
 cppflags+=-I$(plat_common_dir)/include
 cppflags+=-I$(include_dir)
 cppflags+=$(plat-cppflags-y)
-cppflags+=$(blob-cppflags-y)
+cppflags+=$(firmware-cppflags-y)
 cc=$(CROSS_COMPILE)gcc
 cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 cflags+=-mno-save-restore -mstrict-align
 cflags+=$(cppflags)
 cflags+=$(plat-cflags-y)
-cflags+=$(blob-cflags-y)
+cflags+=$(firmware-cflags-y)
 cflags+=$(EXTRA_CFLAGS)
 as=$(CROSS_COMPILE)gcc
 asflags=-g -Wall -nostdlib -D__ASSEMBLY__
@@ -124,14 +124,14 @@ asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 asflags+=-mno-save-restore -mstrict-align
 asflags+=$(cppflags)
 asflags+=$(plat-asflags-y)
-asflags+=$(blob-asflags-y)
+asflags+=$(firmware-asflags-y)
 asflags+=$(EXTRA_ASFLAGS)
 ar=$(CROSS_COMPILE)ar
 arflags=rcs
 ld=$(CROSS_COMPILE)gcc
 ldflags=-g -Wall -nostdlib -Wl,--build-id=none
 ldflags+=$(plat-ldflags-y)
-ldflags+=$(blob-ldflags-y)
+ldflags+=$(firmware-ldflags-y)
 merge=$(CROSS_COMPILE)ld
 mergeflags=-r
 objcopy=$(CROSS_COMPILE)objcopy
@@ -195,7 +195,7 @@ targets-y  = $(build_dir)/lib/libsbi.a
 ifdef PLAT
 targets-y += $(build_dir)/$(plat_subdir)/lib/libplatsbi.a
 endif
-targets-y += $(blob-bins-path-y)
+targets-y += $(firmware-bins-path-y)
 
 # Default rule "make" should always be first rule
 .PHONY: all
@@ -252,7 +252,7 @@ all-deps-2 = $(if $(findstring clean,$(MAKECMDGOALS)),,$(all-deps-1))
 install_targets-y  = install_libsbi
 ifdef PLAT
 install_targets-y += install_libplatsbi
-install_targets-y += install_blobs
+install_targets-y += install_firmwares
 endif
 
 # Rule for "make install"
@@ -269,10 +269,10 @@ install_libplatsbi: $(build_dir)/$(plat_subdir)/lib/libplatsbi.a $(build_dir)/li
 	$(call inst_header_dir,$(install_dir)/$(plat_subdir)/include,$(include_dir)/sbi)
 	$(call inst_file,$(install_dir)/$(plat_subdir)/lib/libplatsbi.a,$(build_dir)/$(plat_subdir)/lib/libplatsbi.a)
 
-.PHONY: install_blobs
-install_blobs: $(build_dir)/$(plat_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(blob-bins-path-y)
-	$(call inst_file_list,$(install_dir)/$(plat_subdir)/blob,$(plat_subdir)/blob,$(blob-elfs-path-y))
-	$(call inst_file_list,$(install_dir)/$(plat_subdir)/blob,$(plat_subdir)/blob,$(blob-bins-path-y))
+.PHONY: install_firmwares
+install_firmwares: $(build_dir)/$(plat_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
+	$(call inst_file_list,$(install_dir)/$(plat_subdir)/firmware,$(plat_subdir)/firmware,$(firmware-elfs-path-y))
+	$(call inst_file_list,$(install_dir)/$(plat_subdir)/firmware,$(plat_subdir)/firmware,$(firmware-bins-path-y))
 
 # Rule for "make clean"
 .PHONY: clean
diff --git a/README.md b/README.md
index 82084c3d8c9..ca70e0eff46 100644
--- a/README.md
+++ b/README.md
@@ -23,7 +23,7 @@ We can create three things using the RISC-V OpenSBI project:
 2. **libplatsbi.a** - Platform specific OpenSBI static library
    (It is libsbi.a plus platform specific hooks represented
     by "platform" symbol)
-3. **blobs** - Platform specific firware blobs
+3. **firmwares** - Platform specific firmware binaries
 
 How to Build?
 -------------
@@ -31,7 +31,7 @@ How to Build?
 For cross-compiling, please ensure that CROSS_COMPILE environment
 variable is set before starting build system.
 
-The libplatsbi.a and blobs are optional and only built when
+The libplatsbi.a and firmwares are optional and only built when
 `PLAT=<platform_subdir>` parameter is specified to top-level make.
 (**NOTE**: `<platform_subdir>` is sub-directory under plat/ directory)
 
@@ -46,14 +46,14 @@ OR
 OR
 `make I=<install_directory> install`
 
-To build and install platform specific OpenSBI library and blobs
+To build and install platform specific OpenSBI library and firmwares
 do the following:
 
-1. Build **libsbi, libplatsbi, and blobs**:
+1. Build **libsbi, libplatsbi, and firmwares**:
 `make PLAT=<platform_subdir>`
 OR
 `make PLAT=<platform_subdir> O=<build_directory>`
-2. Install **libsbi, headers, libplatsbi, and blobs**:
+2. Install **libsbi, headers, libplatsbi, and firmwares**:
 `make PLAT=<platform_subdir> install`
 OR
 `make PLAT=<platform_subdir> I=<install_directory> install`
@@ -61,7 +61,7 @@ OR
 In addition, we can also specify platform specific command-line
 options to top-level make (such as `PLAT_<xyz>` or `FW_<abc>`)
 which are described under `docs/plat/<platform_name>.md` OR
-`docs/blob/<blob_name>.md`.
+`docs/firmware/<firmware_name>.md`.
 
 Documentation
 -------------
@@ -72,7 +72,7 @@ manner:
 * `docs/platform_guide.md` - Guidelines for adding new platform support
 * `docs/library_usage.md` - Guidelines for using static library
 * `docs/plat/<platform_name>.md` - Documentation for `<platform_name>` platform
-* `docs/blob/<blob_name>.md` - Documentation for firmware blob `<blob_name>`
+* `docs/firmware/<firmware_name>.md` - Documentation for firmware `<firmware_name>`
 
 We also prefer source level documentation, so wherever possible we describe
 stuff directly in the source code. This helps us maintain source and its
diff --git a/blob/objects.mk b/blob/objects.mk
deleted file mode 100644
index 717f4550552..00000000000
--- a/blob/objects.mk
+++ /dev/null
@@ -1,39 +0,0 @@
-#
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-
-blob-cppflags-y =
-blob-cflags-y =
-blob-asflags-y =
-blob-ldflags-y =
-
-ifdef FW_TEXT_START
-blob-cppflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
-endif
-
-blob-bins-$(FW_JUMP) += fw_jump.bin
-ifdef FW_JUMP_ADDR
-blob-cppflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
-endif
-ifdef FW_JUMP_FDT_ADDR
-blob-cppflags-$(FW_JUMP) += -DFW_JUMP_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
-endif
-
-blob-bins-$(FW_PAYLOAD) += fw_payload.bin
-ifdef FW_PAYLOAD_PATH
-blob-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH)
-endif
-ifdef FW_PAYLOAD_OFFSET
-blob-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
-endif
-ifdef FW_PAYLOAD_FDT_PATH
-blob-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
-endif
-ifdef FW_PAYLOAD_FDT_ADDR
-blob-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
-endif
diff --git a/docs/blob/fw_jump.md b/docs/firmware/fw_jump.md
similarity index 100%
rename from docs/blob/fw_jump.md
rename to docs/firmware/fw_jump.md
diff --git a/docs/blob/fw_payload.md b/docs/firmware/fw_payload.md
similarity index 100%
rename from docs/blob/fw_payload.md
rename to docs/firmware/fw_payload.md
diff --git a/blob/fw_common.S b/firmware/fw_common.S
similarity index 100%
rename from blob/fw_common.S
rename to firmware/fw_common.S
diff --git a/blob/fw_common.ldS b/firmware/fw_common.ldS
similarity index 100%
rename from blob/fw_common.ldS
rename to firmware/fw_common.ldS
diff --git a/blob/fw_jump.S b/firmware/fw_jump.S
similarity index 100%
rename from blob/fw_jump.S
rename to firmware/fw_jump.S
diff --git a/blob/fw_jump.elf.ldS b/firmware/fw_jump.elf.ldS
similarity index 100%
rename from blob/fw_jump.elf.ldS
rename to firmware/fw_jump.elf.ldS
diff --git a/blob/fw_payload.S b/firmware/fw_payload.S
similarity index 100%
rename from blob/fw_payload.S
rename to firmware/fw_payload.S
diff --git a/blob/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
similarity index 100%
rename from blob/fw_payload.elf.ldS
rename to firmware/fw_payload.elf.ldS
diff --git a/firmware/objects.mk b/firmware/objects.mk
new file mode 100644
index 00000000000..9bed733de64
--- /dev/null
+++ b/firmware/objects.mk
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+firmware-cppflags-y =
+firmware-cflags-y =
+firmware-asflags-y =
+firmware-ldflags-y =
+
+ifdef FW_TEXT_START
+firmware-cppflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
+endif
+
+firmware-bins-$(FW_JUMP) += fw_jump.bin
+ifdef FW_JUMP_ADDR
+firmware-cppflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
+endif
+ifdef FW_JUMP_FDT_ADDR
+firmware-cppflags-$(FW_JUMP) += -DFW_JUMP_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
+endif
+
+firmware-bins-$(FW_PAYLOAD) += fw_payload.bin
+ifdef FW_PAYLOAD_PATH
+firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH)
+endif
+ifdef FW_PAYLOAD_OFFSET
+firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
+endif
+ifdef FW_PAYLOAD_FDT_PATH
+firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
+endif
+ifdef FW_PAYLOAD_FDT_ADDR
+firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
+endif

From 6f02b6938f8e607d38ee8de5a59581d554af0d3f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 10:09:33 +0530
Subject: [PATCH 0005/1765] lib: Introduce bitmap to track HARTs waiting for
 coldboot

On QEMU Virt, max supported HARTs are 8 but number of HARTs
actually depend on "-smp" command-line parameter passed to
QEMU. This creates problems in sbi_hart_wake_coldboot_harts()
because when number of HARTs are less than 8.

To tackle this, we introduce a bitmap to track HARTs waiting
for coldboot to finish. We wake only those HARTs who have
set their bit in coldboot bitmap.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_hart.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index fd6d4d40695..5b26aead51b 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -263,7 +263,9 @@ struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 	return ((h2s)scratch->hartid_to_scratch)(hartid);
 }
 
-#define NO_HOTPLUG_BITMAP_SIZE	__riscv_xlen
+#define COLDBOOT_WAIT_BITMAP_SIZE	__riscv_xlen
+static spinlock_t coldboot_wait_bitmap_lock = SPIN_LOCK_INITIALIZER;
+static unsigned long coldboot_wait_bitmap = 0;
 
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
@@ -271,13 +273,20 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
-	    (NO_HOTPLUG_BITMAP_SIZE <= hartid))
+	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
 		sbi_hart_hang();
 	do {
+		spin_lock(&coldboot_wait_bitmap_lock);
+		coldboot_wait_bitmap |= (1UL << hartid);
+		spin_unlock(&coldboot_wait_bitmap_lock);
+
 		wfi();
 		mipval = csr_read(mip);
-		/* Make sure the hart woke because of ipi */
-	} while (!(mipval && MIP_MSIP) );
+
+		spin_lock(&coldboot_wait_bitmap_lock);
+		coldboot_wait_bitmap &= ~(1UL << hartid);
+		spin_unlock(&coldboot_wait_bitmap_lock);
+	} while (!(mipval && MIP_MSIP));
 
 	csr_clear(mip, MIP_MSIP);
 }
@@ -289,7 +298,9 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 
 	for(int i = 0; i < max_hart ; i++) {
 		/* send an IPI to every other hart */
-		if (i != hartid)
+		spin_lock(&coldboot_wait_bitmap_lock);
+		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
 			sbi_platform_ipi_inject(plat, i, hartid);
+		spin_unlock(&coldboot_wait_bitmap_lock);
 	}
 }

From 089f70a1798b5c631e87eeb26b7eb2593571c63d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 10:35:04 +0530
Subject: [PATCH 0006/1765] top: Rename "plat" to "platform" everywhere

This patch renames "plat" to "platform" everywhere for better
readablility.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                                      | 80 +++++++++----------
 README.md                                     | 16 ++--
 {plat => platform}/common/fdt.c               |  0
 {plat => platform}/common/include/plat/fdt.h  |  0
 .../common/include/plat/irqchip/plic.h        |  0
 .../common/include/plat/serial/sifive-uart.h  |  0
 .../common/include/plat/serial/uart8250.h     |  0
 .../common/include/plat/sys/clint.h           |  0
 .../common/irqchip}/objects.mk                |  2 +-
 {plat => platform}/common/irqchip/plic.c      |  0
 .../qemu/virt => platform/common}/objects.mk  |  2 +-
 {plat => platform}/common/serial/objects.mk   |  4 +-
 .../common/serial/sifive-uart.c               |  0
 {plat => platform}/common/serial/uart8250.c   |  0
 {plat => platform}/common/sys/clint.c         |  0
 .../common/sys}/objects.mk                    |  2 +-
 {plat => platform}/kendryte/k210/config.mk    | 16 ++--
 {plat => platform}/kendryte/k210/objects.mk   |  2 +-
 {plat => platform}/kendryte/k210/platform.c   |  0
 {plat => platform}/kendryte/k210/platform.h   |  0
 {plat => platform}/kendryte/k210/sysctl.c     |  0
 {plat => platform}/kendryte/k210/sysctl.h     |  0
 {plat => platform}/kendryte/k210/uarths.c     |  0
 {plat => platform}/kendryte/k210/uarths.h     |  0
 .../qemu/sifive_u}/config.mk                  | 18 ++---
 {plat => platform}/qemu/sifive_u/objects.mk   |  2 +-
 {plat => platform}/qemu/sifive_u/platform.c   |  0
 .../sifive_u => platform/qemu/virt}/config.mk | 18 ++---
 .../common => platform/qemu/virt}/objects.mk  |  2 +-
 {plat => platform}/qemu/virt/platform.c       |  0
 .../sifive/hifive_u540}/config.mk             | 18 ++---
 .../sifive/hifive_u540/objects.mk             |  2 +-
 .../sifive/hifive_u540/platform.c             |  0
 33 files changed, 92 insertions(+), 92 deletions(-)
 rename {plat => platform}/common/fdt.c (100%)
 rename {plat => platform}/common/include/plat/fdt.h (100%)
 rename {plat => platform}/common/include/plat/irqchip/plic.h (100%)
 rename {plat => platform}/common/include/plat/serial/sifive-uart.h (100%)
 rename {plat => platform}/common/include/plat/serial/uart8250.h (100%)
 rename {plat => platform}/common/include/plat/sys/clint.h (100%)
 rename {plat/common/sys => platform/common/irqchip}/objects.mk (71%)
 rename {plat => platform}/common/irqchip/plic.c (100%)
 rename {plat/qemu/virt => platform/common}/objects.mk (83%)
 rename {plat => platform}/common/serial/objects.mk (52%)
 rename {plat => platform}/common/serial/sifive-uart.c (100%)
 rename {plat => platform}/common/serial/uart8250.c (100%)
 rename {plat => platform}/common/sys/clint.c (100%)
 rename {plat/common/irqchip => platform/common/sys}/objects.mk (73%)
 rename {plat => platform}/kendryte/k210/config.mk (52%)
 rename {plat => platform}/kendryte/k210/objects.mk (77%)
 rename {plat => platform}/kendryte/k210/platform.c (100%)
 rename {plat => platform}/kendryte/k210/platform.h (100%)
 rename {plat => platform}/kendryte/k210/sysctl.c (100%)
 rename {plat => platform}/kendryte/k210/sysctl.h (100%)
 rename {plat => platform}/kendryte/k210/uarths.c (100%)
 rename {plat => platform}/kendryte/k210/uarths.h (100%)
 rename {plat/sifive/hifive_u540 => platform/qemu/sifive_u}/config.mk (53%)
 rename {plat => platform}/qemu/sifive_u/objects.mk (84%)
 rename {plat => platform}/qemu/sifive_u/platform.c (100%)
 rename {plat/qemu/sifive_u => platform/qemu/virt}/config.mk (53%)
 rename {plat/common => platform/qemu/virt}/objects.mk (84%)
 rename {plat => platform}/qemu/virt/platform.c (100%)
 rename {plat/qemu/virt => platform/sifive/hifive_u540}/config.mk (53%)
 rename {plat => platform}/sifive/hifive_u540/objects.mk (84%)
 rename {plat => platform}/sifive/hifive_u540/platform.c (100%)

diff --git a/Makefile b/Makefile
index 112d3722b65..f544a6488be 100644
--- a/Makefile
+++ b/Makefile
@@ -57,47 +57,47 @@ else
 endif
 
 # Setup path of directories
-export plat_subdir=plat/$(PLAT)
-export plat_dir=$(CURDIR)/$(plat_subdir)
-export plat_common_dir=$(CURDIR)/plat/common
+export platform_subdir=platform/$(PLATFORM)
+export platform_dir=$(CURDIR)/$(platform_subdir)
+export platform_common_dir=$(CURDIR)/platform/common
 export include_dir=$(CURDIR)/include
 export lib_dir=$(CURDIR)/lib
 export firmware_dir=$(CURDIR)/firmware
 
 # Setup list of objects.mk files
-ifdef PLAT
-plat-object-mks=$(shell if [ -d $(plat_dir) ]; then find $(plat_dir) -iname "objects.mk" | sort -r; fi)
-plat-common-object-mks=$(shell if [ -d $(plat_common_dir) ]; then find $(plat_common_dir) -iname "objects.mk" | sort -r; fi)
+ifdef PLATFORM
+platform-object-mks=$(shell if [ -d $(platform_dir) ]; then find $(platform_dir) -iname "objects.mk" | sort -r; fi)
+platform-common-object-mks=$(shell if [ -d $(platform_common_dir) ]; then find $(platform_common_dir) -iname "objects.mk" | sort -r; fi)
 endif
 lib-object-mks=$(shell if [ -d $(lib_dir) ]; then find $(lib_dir) -iname "objects.mk" | sort -r; fi)
 firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
 # Include platform specifig config.mk
-ifdef PLAT
-include $(plat_dir)/config.mk
+ifdef PLATFORM
+include $(platform_dir)/config.mk
 endif
 
 # Include all object.mk files
-ifdef PLAT
-include $(plat-object-mks)
-include $(plat-common-object-mks)
+ifdef PLATFORM
+include $(platform-object-mks)
+include $(platform-common-object-mks)
 endif
 include $(lib-object-mks)
 include $(firmware-object-mks)
 
 # Setup list of objects
 lib-objs-path-y=$(foreach obj,$(lib-objs-y),$(build_dir)/lib/$(obj))
-ifdef PLAT
-plat-objs-path-y=$(foreach obj,$(plat-objs-y),$(build_dir)/$(plat_subdir)/$(obj))
-plat-common-objs-path-y=$(foreach obj,$(plat-common-objs-y),$(build_dir)/plat/common/$(obj))
-firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(build_dir)/$(plat_subdir)/firmware/$(bin))
+ifdef PLATFORM
+platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(build_dir)/$(platform_subdir)/$(obj))
+platform-common-objs-path-y=$(foreach obj,$(platform-common-objs-y),$(build_dir)/platform/common/$(obj))
+firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(build_dir)/$(platform_subdir)/firmware/$(bin))
 endif
 firmware-elfs-path-y=$(firmware-bins-path-y:.bin=.elf)
 firmware-objs-path-y=$(firmware-bins-path-y:.bin=.o)
 
 # Setup list of deps files for objects
-deps-y=$(plat-objs-path-y:.o=.dep)
-deps-y+=$(plat-common-objs-path-y:.o=.dep)
+deps-y=$(platform-objs-path-y:.o=.dep)
+deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
@@ -105,17 +105,17 @@ deps-y+=$(firmware-objs-path-y:.o=.dep)
 cpp=$(CROSS_COMPILE)cpp
 cppflags+=-DOPENSBI_MAJOR=$(MAJOR)
 cppflags+=-DOPENSBI_MINOR=$(MINOR)
-cppflags+=-I$(plat_dir)/include
-cppflags+=-I$(plat_common_dir)/include
+cppflags+=-I$(platform_dir)/include
+cppflags+=-I$(platform_common_dir)/include
 cppflags+=-I$(include_dir)
-cppflags+=$(plat-cppflags-y)
+cppflags+=$(platform-cppflags-y)
 cppflags+=$(firmware-cppflags-y)
 cc=$(CROSS_COMPILE)gcc
 cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 cflags+=-mno-save-restore -mstrict-align
 cflags+=$(cppflags)
-cflags+=$(plat-cflags-y)
+cflags+=$(platform-cflags-y)
 cflags+=$(firmware-cflags-y)
 cflags+=$(EXTRA_CFLAGS)
 as=$(CROSS_COMPILE)gcc
@@ -123,14 +123,14 @@ asflags=-g -Wall -nostdlib -D__ASSEMBLY__
 asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 asflags+=-mno-save-restore -mstrict-align
 asflags+=$(cppflags)
-asflags+=$(plat-asflags-y)
+asflags+=$(platform-asflags-y)
 asflags+=$(firmware-asflags-y)
 asflags+=$(EXTRA_ASFLAGS)
 ar=$(CROSS_COMPILE)ar
 arflags=rcs
 ld=$(CROSS_COMPILE)gcc
 ldflags=-g -Wall -nostdlib -Wl,--build-id=none
-ldflags+=$(plat-ldflags-y)
+ldflags+=$(platform-ldflags-y)
 ldflags+=$(firmware-ldflags-y)
 merge=$(CROSS_COMPILE)ld
 mergeflags=-r
@@ -192,8 +192,8 @@ compile_objcopy = $(V)mkdir -p `dirname $(1)`; \
 	     $(objcopy) -S -O binary $(2) $(1)
 
 targets-y  = $(build_dir)/lib/libsbi.a
-ifdef PLAT
-targets-y += $(build_dir)/$(plat_subdir)/lib/libplatsbi.a
+ifdef PLATFORM
+targets-y += $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
 endif
 targets-y += $(firmware-bins-path-y)
 
@@ -207,16 +207,16 @@ all: $(targets-y)
 $(build_dir)/%.bin: $(build_dir)/%.elf
 	$(call compile_objcopy,$@,$<)
 
-$(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(build_dir)/$(plat_subdir)/lib/libplatsbi.a
-	$(call compile_ld,$@,$@.ld,$< $(build_dir)/$(plat_subdir)/lib/libplatsbi.a)
+$(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
+	$(call compile_ld,$@,$@.ld,$< $(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
 
-$(build_dir)/$(plat_subdir)/%.ld: $(src_dir)/%.ldS
+$(build_dir)/$(platform_subdir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 
 $(build_dir)/lib/libsbi.a: $(lib-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(build_dir)/$(plat_subdir)/lib/libplatsbi.a: $(lib-objs-path-y) $(plat-common-objs-path-y) $(plat-objs-path-y)
+$(build_dir)/$(platform_subdir)/lib/libplatsbi.a: $(lib-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
 $(build_dir)/%.dep: $(src_dir)/%.c
@@ -231,16 +231,16 @@ $(build_dir)/%.dep: $(src_dir)/%.S
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(build_dir)/$(plat_subdir)/%.dep: $(src_dir)/%.c
+$(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.c
 	$(call compile_cc_dep,$@,$<)
 
-$(build_dir)/$(plat_subdir)/%.o: $(src_dir)/%.c
+$(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
-$(build_dir)/$(plat_subdir)/%.dep: $(src_dir)/%.S
+$(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.S
 	$(call compile_as_dep,$@,$<)
 
-$(build_dir)/$(plat_subdir)/%.o: $(src_dir)/%.S
+$(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
 # Dependency files should only be included after default Makefile rule
@@ -250,7 +250,7 @@ all-deps-2 = $(if $(findstring clean,$(MAKECMDGOALS)),,$(all-deps-1))
 -include $(all-deps-2)
 
 install_targets-y  = install_libsbi
-ifdef PLAT
+ifdef PLATFORM
 install_targets-y += install_libplatsbi
 install_targets-y += install_firmwares
 endif
@@ -265,14 +265,14 @@ install_libsbi: $(build_dir)/lib/libsbi.a
 	$(call inst_file,$(install_dir)/lib/libsbi.a,$(build_dir)/lib/libsbi.a)
 
 .PHONY: install_libplatsbi
-install_libplatsbi: $(build_dir)/$(plat_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
-	$(call inst_header_dir,$(install_dir)/$(plat_subdir)/include,$(include_dir)/sbi)
-	$(call inst_file,$(install_dir)/$(plat_subdir)/lib/libplatsbi.a,$(build_dir)/$(plat_subdir)/lib/libplatsbi.a)
+install_libplatsbi: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
+	$(call inst_header_dir,$(install_dir)/$(platform_subdir)/include,$(include_dir)/sbi)
+	$(call inst_file,$(install_dir)/$(platform_subdir)/lib/libplatsbi.a,$(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares
-install_firmwares: $(build_dir)/$(plat_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
-	$(call inst_file_list,$(install_dir)/$(plat_subdir)/firmware,$(plat_subdir)/firmware,$(firmware-elfs-path-y))
-	$(call inst_file_list,$(install_dir)/$(plat_subdir)/firmware,$(plat_subdir)/firmware,$(firmware-bins-path-y))
+install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
+	$(call inst_file_list,$(install_dir)/$(platform_subdir)/firmware,$(platform_subdir)/firmware,$(firmware-elfs-path-y))
+	$(call inst_file_list,$(install_dir)/$(platform_subdir)/firmware,$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
 # Rule for "make clean"
 .PHONY: clean
diff --git a/README.md b/README.md
index ca70e0eff46..db6c77b1946 100644
--- a/README.md
+++ b/README.md
@@ -32,8 +32,8 @@ For cross-compiling, please ensure that CROSS_COMPILE environment
 variable is set before starting build system.
 
 The libplatsbi.a and firmwares are optional and only built when
-`PLAT=<platform_subdir>` parameter is specified to top-level make.
-(**NOTE**: `<platform_subdir>` is sub-directory under plat/ directory)
+`PLATFORM=<platform_subdir>` parameter is specified to top-level make.
+(**NOTE**: `<platform_subdir>` is sub-directory under platform/ directory)
 
 To build and install Generic OpenSBI library do the following:
 
@@ -50,17 +50,17 @@ To build and install platform specific OpenSBI library and firmwares
 do the following:
 
 1. Build **libsbi, libplatsbi, and firmwares**:
-`make PLAT=<platform_subdir>`
+`make PLATFORM=<platform_subdir>`
 OR
-`make PLAT=<platform_subdir> O=<build_directory>`
+`make PLATFORM=<platform_subdir> O=<build_directory>`
 2. Install **libsbi, headers, libplatsbi, and firmwares**:
-`make PLAT=<platform_subdir> install`
+`make PLATFORM=<platform_subdir> install`
 OR
-`make PLAT=<platform_subdir> I=<install_directory> install`
+`make PLATFORM=<platform_subdir> I=<install_directory> install`
 
 In addition, we can also specify platform specific command-line
 options to top-level make (such as `PLAT_<xyz>` or `FW_<abc>`)
-which are described under `docs/plat/<platform_name>.md` OR
+which are described under `docs/platform/<platform_name>.md` OR
 `docs/firmware/<firmware_name>.md`.
 
 Documentation
@@ -71,7 +71,7 @@ manner:
 
 * `docs/platform_guide.md` - Guidelines for adding new platform support
 * `docs/library_usage.md` - Guidelines for using static library
-* `docs/plat/<platform_name>.md` - Documentation for `<platform_name>` platform
+* `docs/platform/<platform_name>.md` - Documentation for `<platform_name>` platform
 * `docs/firmware/<firmware_name>.md` - Documentation for firmware `<firmware_name>`
 
 We also prefer source level documentation, so wherever possible we describe
diff --git a/plat/common/fdt.c b/platform/common/fdt.c
similarity index 100%
rename from plat/common/fdt.c
rename to platform/common/fdt.c
diff --git a/plat/common/include/plat/fdt.h b/platform/common/include/plat/fdt.h
similarity index 100%
rename from plat/common/include/plat/fdt.h
rename to platform/common/include/plat/fdt.h
diff --git a/plat/common/include/plat/irqchip/plic.h b/platform/common/include/plat/irqchip/plic.h
similarity index 100%
rename from plat/common/include/plat/irqchip/plic.h
rename to platform/common/include/plat/irqchip/plic.h
diff --git a/plat/common/include/plat/serial/sifive-uart.h b/platform/common/include/plat/serial/sifive-uart.h
similarity index 100%
rename from plat/common/include/plat/serial/sifive-uart.h
rename to platform/common/include/plat/serial/sifive-uart.h
diff --git a/plat/common/include/plat/serial/uart8250.h b/platform/common/include/plat/serial/uart8250.h
similarity index 100%
rename from plat/common/include/plat/serial/uart8250.h
rename to platform/common/include/plat/serial/uart8250.h
diff --git a/plat/common/include/plat/sys/clint.h b/platform/common/include/plat/sys/clint.h
similarity index 100%
rename from plat/common/include/plat/sys/clint.h
rename to platform/common/include/plat/sys/clint.h
diff --git a/plat/common/sys/objects.mk b/platform/common/irqchip/objects.mk
similarity index 71%
rename from plat/common/sys/objects.mk
rename to platform/common/irqchip/objects.mk
index 451adbb722d..84fffa604cb 100644
--- a/plat/common/sys/objects.mk
+++ b/platform/common/irqchip/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-common-objs-$(PLAT_SYS_CLINT) += sys/clint.o
+platform-common-objs-$(PLATFORM_IRQCHIP_PLIC) += irqchip/plic.o
diff --git a/plat/common/irqchip/plic.c b/platform/common/irqchip/plic.c
similarity index 100%
rename from plat/common/irqchip/plic.c
rename to platform/common/irqchip/plic.c
diff --git a/plat/qemu/virt/objects.mk b/platform/common/objects.mk
similarity index 83%
rename from plat/qemu/virt/objects.mk
rename to platform/common/objects.mk
index 03ee2fe5f07..712e9508338 100644
--- a/plat/qemu/virt/objects.mk
+++ b/platform/common/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-objs-y += platform.o
+platform-common-objs-y += fdt.o
diff --git a/plat/common/serial/objects.mk b/platform/common/serial/objects.mk
similarity index 52%
rename from plat/common/serial/objects.mk
rename to platform/common/serial/objects.mk
index 61d5d377e66..cb6062db906 100644
--- a/plat/common/serial/objects.mk
+++ b/platform/common/serial/objects.mk
@@ -7,5 +7,5 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-common-objs-$(PLAT_SERIAL_UART8250) += serial/uart8250.o
-plat-common-objs-$(PLAT_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
+platform-common-objs-$(PLATFORM_SERIAL_UART8250) += serial/uart8250.o
+platform-common-objs-$(PLATFORM_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
diff --git a/plat/common/serial/sifive-uart.c b/platform/common/serial/sifive-uart.c
similarity index 100%
rename from plat/common/serial/sifive-uart.c
rename to platform/common/serial/sifive-uart.c
diff --git a/plat/common/serial/uart8250.c b/platform/common/serial/uart8250.c
similarity index 100%
rename from plat/common/serial/uart8250.c
rename to platform/common/serial/uart8250.c
diff --git a/plat/common/sys/clint.c b/platform/common/sys/clint.c
similarity index 100%
rename from plat/common/sys/clint.c
rename to platform/common/sys/clint.c
diff --git a/plat/common/irqchip/objects.mk b/platform/common/sys/objects.mk
similarity index 73%
rename from plat/common/irqchip/objects.mk
rename to platform/common/sys/objects.mk
index 3950734f25b..183d8db6541 100644
--- a/plat/common/irqchip/objects.mk
+++ b/platform/common/sys/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-common-objs-$(PLAT_IRQCHIP_PLIC) += irqchip/plic.o
+platform-common-objs-$(PLATFORM_SYS_CLINT) += sys/clint.o
diff --git a/plat/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
similarity index 52%
rename from plat/kendryte/k210/config.mk
rename to platform/kendryte/k210/config.mk
index 07cbf84f937..e0e0247bd79 100644
--- a/plat/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -8,18 +8,18 @@
 #
 
 # Essential defines required by SBI platform
-plat-cppflags-y = -DPLAT_NAME="Kendryte K210"
-plat-cppflags-y+= -DPLAT_HART_COUNT=2
-plat-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
+platform-cppflags-y = -DPLAT_NAME="Kendryte K210"
+platform-cppflags-y+= -DPLAT_HART_COUNT=2
+platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
 # Compiler flags
-plat-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-ldflags-y =
+platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-ldflags-y =
 
 # Common drivers to enable
-PLAT_IRQCHIP_PLIC=y
-PLAT_SYS_CLINT=y
+PLATFORM_IRQCHIP_PLIC=y
+PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
diff --git a/plat/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
similarity index 77%
rename from plat/kendryte/k210/objects.mk
rename to platform/kendryte/k210/objects.mk
index c2103f05059..3e16abe63a8 100644
--- a/plat/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-objs-y += uarths.o sysctl.o platform.o
+platform-objs-y += uarths.o sysctl.o platform.o
diff --git a/plat/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
similarity index 100%
rename from plat/kendryte/k210/platform.c
rename to platform/kendryte/k210/platform.c
diff --git a/plat/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
similarity index 100%
rename from plat/kendryte/k210/platform.h
rename to platform/kendryte/k210/platform.h
diff --git a/plat/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
similarity index 100%
rename from plat/kendryte/k210/sysctl.c
rename to platform/kendryte/k210/sysctl.c
diff --git a/plat/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
similarity index 100%
rename from plat/kendryte/k210/sysctl.h
rename to platform/kendryte/k210/sysctl.h
diff --git a/plat/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
similarity index 100%
rename from plat/kendryte/k210/uarths.c
rename to platform/kendryte/k210/uarths.c
diff --git a/plat/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
similarity index 100%
rename from plat/kendryte/k210/uarths.h
rename to platform/kendryte/k210/uarths.h
diff --git a/plat/sifive/hifive_u540/config.mk b/platform/qemu/sifive_u/config.mk
similarity index 53%
rename from plat/sifive/hifive_u540/config.mk
rename to platform/qemu/sifive_u/config.mk
index 165c80a4e61..d4470cd0ad5 100644
--- a/plat/sifive/hifive_u540/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -8,19 +8,19 @@
 #
 
 # Essential defines required by SBI platform
-plat-cppflags-y = -DPLAT_NAME="SiFive HiFive U540"
-plat-cppflags-y+= -DPLAT_HART_COUNT=5
-plat-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
+platform-cppflags-y = -DPLAT_NAME="QEMU SiFive Unleashed"
+platform-cppflags-y+= -DPLAT_HART_COUNT=1
+platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
 # Compiler flags
-plat-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-ldflags-y =
+platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-ldflags-y =
 
 # Common drivers to enable
-PLAT_IRQCHIP_PLIC=y
-PLAT_SERIAL_SIFIVE_UART=y
-PLAT_SYS_CLINT=y
+PLATFORM_IRQCHIP_PLIC=y
+PLATFORM_SERIAL_SIFIVE_UART=y
+PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
diff --git a/plat/qemu/sifive_u/objects.mk b/platform/qemu/sifive_u/objects.mk
similarity index 84%
rename from plat/qemu/sifive_u/objects.mk
rename to platform/qemu/sifive_u/objects.mk
index 03ee2fe5f07..7e96bad0cef 100644
--- a/plat/qemu/sifive_u/objects.mk
+++ b/platform/qemu/sifive_u/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-objs-y += platform.o
+platform-objs-y += platform.o
diff --git a/plat/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
similarity index 100%
rename from plat/qemu/sifive_u/platform.c
rename to platform/qemu/sifive_u/platform.c
diff --git a/plat/qemu/sifive_u/config.mk b/platform/qemu/virt/config.mk
similarity index 53%
rename from plat/qemu/sifive_u/config.mk
rename to platform/qemu/virt/config.mk
index 97a08f511d4..8496e2d4804 100644
--- a/plat/qemu/sifive_u/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -8,19 +8,19 @@
 #
 
 # Essential defines required by SBI platform
-plat-cppflags-y = -DPLAT_NAME="QEMU SiFive Unleashed"
-plat-cppflags-y+= -DPLAT_HART_COUNT=1
-plat-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
+platform-cppflags-y = -DPLAT_NAME="QEMU Virt Machine"
+platform-cppflags-y+= -DPLAT_HART_COUNT=8
+platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
 # Compiler flags
-plat-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-ldflags-y =
+platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-ldflags-y =
 
 # Common drivers to enable
-PLAT_IRQCHIP_PLIC=y
-PLAT_SERIAL_SIFIVE_UART=y
-PLAT_SYS_CLINT=y
+PLATFORM_IRQCHIP_PLIC=y
+PLATFORM_SERIAL_UART8250=y
+PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
diff --git a/plat/common/objects.mk b/platform/qemu/virt/objects.mk
similarity index 84%
rename from plat/common/objects.mk
rename to platform/qemu/virt/objects.mk
index 18fcd0c4718..7e96bad0cef 100644
--- a/plat/common/objects.mk
+++ b/platform/qemu/virt/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-common-objs-y += fdt.o
+platform-objs-y += platform.o
diff --git a/plat/qemu/virt/platform.c b/platform/qemu/virt/platform.c
similarity index 100%
rename from plat/qemu/virt/platform.c
rename to platform/qemu/virt/platform.c
diff --git a/plat/qemu/virt/config.mk b/platform/sifive/hifive_u540/config.mk
similarity index 53%
rename from plat/qemu/virt/config.mk
rename to platform/sifive/hifive_u540/config.mk
index 0b10613006c..f411fa9a180 100644
--- a/plat/qemu/virt/config.mk
+++ b/platform/sifive/hifive_u540/config.mk
@@ -8,19 +8,19 @@
 #
 
 # Essential defines required by SBI platform
-plat-cppflags-y = -DPLAT_NAME="QEMU Virt Machine"
-plat-cppflags-y+= -DPLAT_HART_COUNT=8
-plat-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
+platform-cppflags-y = -DPLAT_NAME="SiFive HiFive U540"
+platform-cppflags-y+= -DPLAT_HART_COUNT=5
+platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
 # Compiler flags
-plat-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-plat-ldflags-y =
+platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-ldflags-y =
 
 # Common drivers to enable
-PLAT_IRQCHIP_PLIC=y
-PLAT_SERIAL_UART8250=y
-PLAT_SYS_CLINT=y
+PLATFORM_IRQCHIP_PLIC=y
+PLATFORM_SERIAL_SIFIVE_UART=y
+PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
diff --git a/plat/sifive/hifive_u540/objects.mk b/platform/sifive/hifive_u540/objects.mk
similarity index 84%
rename from plat/sifive/hifive_u540/objects.mk
rename to platform/sifive/hifive_u540/objects.mk
index 03ee2fe5f07..7e96bad0cef 100644
--- a/plat/sifive/hifive_u540/objects.mk
+++ b/platform/sifive/hifive_u540/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-plat-objs-y += platform.o
+platform-objs-y += platform.o
diff --git a/plat/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
similarity index 100%
rename from plat/sifive/hifive_u540/platform.c
rename to platform/sifive/hifive_u540/platform.c

From f003787455709a1a6c69c1b6ab6a02d4d767c325 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Dec 2018 11:06:20 +0530
Subject: [PATCH 0007/1765] lib: Hang in sbi_hart_boot_next() if next mode is
 not supported

We should not jump to next stage if next mode (S-mode or U-mode)
is not supported by HART.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_hart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 5b26aead51b..a375ecf663a 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -203,6 +203,10 @@ void __attribute__((noreturn)) sbi_hart_boot_next(unsigned long arg0,
 
 	if (next_mode != PRV_S && next_mode != PRV_M && next_mode != PRV_U)
 		sbi_hart_hang();
+	if (next_mode == PRV_S && !misa_extension('S'))
+		sbi_hart_hang();
+	if (next_mode == PRV_U && !misa_extension('U'))
+		sbi_hart_hang();
 
 	val = csr_read(mstatus);
 	val = INSERT_FIELD(val, MSTATUS_MPP, next_mode);

From aa68f0252f2a0749dee35bda309c397f79ae26a0 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 09:13:37 +0900
Subject: [PATCH 0008/1765] Refine platform features control

Allow a platform to report its supported features in more details.
The new features defined are:
* SBI_PLATFORM_HAS_PMP
* SBI_PLATFORM_HAS_SCOUNTEREN
* SBI_PLATFORM_HAS_MCOUNTEREN

In addition, define the macro SBI_PLATFORM_DEFAULT_FEATURES as the set
of features that are generally expected to be supported by a Linux
capable platform.

Operations touching the features controlled with these falgs are not
executed if the platform does not set the corresponding feature flags.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 include/sbi/sbi_hart.h                 |  2 +-
 include/sbi/sbi_platform.h             | 34 +++++++++++++++++---------
 lib/sbi_hart.c                         | 27 ++++++++++++--------
 lib/sbi_init.c                         |  2 +-
 platform/qemu/sifive_u/platform.c      |  2 +-
 platform/qemu/virt/platform.c          |  2 +-
 platform/sifive/hifive_u540/platform.c |  2 +-
 7 files changed, 45 insertions(+), 26 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index c77ffd23231..90161f0be69 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -16,7 +16,7 @@ struct sbi_scratch;
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid);
 
-void sbi_hart_pmp_dump(void);
+void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 57b8e6be919..39dfb499d9a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -13,10 +13,19 @@
 #include <sbi/sbi_scratch.h>
 
 enum sbi_platform_features {
-	SBI_PLATFORM_HAS_MMIO_TIMER_VALUE = (1 << 0),
-	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1),
+	SBI_PLATFORM_HAS_MMIO_TIMER_VALUE	= (1 << 0),
+	SBI_PLATFORM_HAS_HART_HOTPLUG		= (1 << 1),
+	SBI_PLATFORM_HAS_PMP			= (1 << 2),
+	SBI_PLATFORM_HAS_SCOUNTEREN		= (1 << 3),
+	SBI_PLATFORM_HAS_MCOUNTEREN		= (1 << 4),
 };
 
+#define SBI_PLATFORM_DEFAULT_FEATURES	\
+	(SBI_PLATFORM_HAS_MMIO_TIMER_VALUE | \
+	 SBI_PLATFORM_HAS_PMP | \
+	 SBI_PLATFORM_HAS_SCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MCOUNTEREN)
+
 struct sbi_platform {
 	char name[64];
 	u64 features;
@@ -48,17 +57,20 @@ struct sbi_platform {
 	int (*system_shutdown)(u32 type);
 } __attribute__((packed));
 
-#define sbi_platform_ptr(__s)			\
-((struct sbi_platform *)((__s)->platform_addr))
-
-#define sbi_platform_thishart_ptr()			\
-((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
-
+#define sbi_platform_ptr(__s)	\
+	((struct sbi_platform *)((__s)->platform_addr))
+#define sbi_platform_thishart_ptr()	\
+	((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
 #define sbi_platform_has_mmio_timer_value(__p)	\
-((__p)->features & SBI_PLATFORM_HAS_MMIO_TIMER_VALUE)
-
+	((__p)->features & SBI_PLATFORM_HAS_MMIO_TIMER_VALUE)
 #define sbi_platform_has_hart_hotplug(__p)	\
-((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
+	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
+#define sbi_platform_has_pmp(__p)	\
+	((__p)->features & SBI_PLATFORM_HAS_PMP)
+#define sbi_platform_has_scounteren(__p)	\
+	((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN)
+#define sbi_platform_has_mcounteren(__p)	\
+	((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN)
 
 static inline const char *sbi_platform_name(struct sbi_platform *plat)
 {
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index a375ecf663a..26d435bdf97 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -17,16 +17,20 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 
-static int mstatus_init(u32 hartid)
+static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
+	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
 		csr_write(mstatus, MSTATUS_FS);
 
 	/* Enable user/supervisor use of perf counters */
-	if (misa_extension('S'))
+	if (misa_extension('S') &&
+	     sbi_platform_has_scounteren(plat))
 		csr_write(scounteren, -1);
-	csr_write(mcounteren, -1);
+	if (sbi_platform_has_mcounteren(plat))
+		csr_write(mcounteren, -1);
 
 	/* Disable all interrupts */
 	csr_write(mie, 0);
@@ -34,8 +38,6 @@ static int mstatus_init(u32 hartid)
 	/* Disable S-mode paging */
 	if (misa_extension('S'))
 		csr_write(sptbr, 0);
-
-	return 0;
 }
 
 #ifdef __riscv_flen
@@ -111,10 +113,14 @@ unsigned long log2roundup(unsigned long x)
 	return ret;
 }
 
-void sbi_hart_pmp_dump(void)
+void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
-	unsigned int i;
+	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long prot, addr, size, l2l;
+	unsigned int i;
+
+	if (!sbi_platform_has_pmp(plat))
+		return;
 
 	for (i = 0; i < PMP_COUNT; i++) {
 		pmp_get(i, &prot, &addr, &l2l);
@@ -149,6 +155,9 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	ulong prot, addr, log2size;
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	if (!sbi_platform_has_pmp(plat))
+		return 0;
+
 	fw_size_log2 = log2roundup(scratch->fw_size);
 	fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
 
@@ -172,9 +181,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
 
-	rc = mstatus_init(hartid);
-	if (rc)
-		return rc;
+	mstatus_init(scratch, hartid);
 
 	rc = fp_init(hartid);
 	if (rc)
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 82384b39873..3e7bda35e6e 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -91,7 +91,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
 
-	sbi_hart_pmp_dump();
+	sbi_hart_pmp_dump(scratch);
 
 	sbi_hart_mark_available(hartid);
 
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index a4a401ecba8..d9168255ec6 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -88,7 +88,7 @@ static int sifive_u_system_down(u32 type)
 
 struct sbi_platform platform = {
 	.name = STRINGIFY(PLAT_NAME),
-	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
 	.pmp_region_count = sifive_u_pmp_region_count,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index e59cdfd1360..fe91fc8f664 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -86,7 +86,7 @@ static int virt_system_down(u32 type)
 
 struct sbi_platform platform = {
 	.name = STRINGIFY(PLAT_NAME),
-	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
 	.pmp_region_count = virt_pmp_region_count,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 5b1c989ffa0..46613e60073 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -105,7 +105,7 @@ static int sifive_u_system_down(u32 type)
 
 struct sbi_platform platform = {
 	.name = STRINGIFY(PLAT_NAME),
-	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
+	.features = SBI_PLATFORM_DEFAULT_FEATURES;
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
 	.pmp_region_count = sifive_u_pmp_region_count,

From 513474cd1b6f3481ee72ec71df916880d7bc0232 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 10:03:56 +0900
Subject: [PATCH 0009/1765] Fix FDT relocation

Or rather, disable it if FW_PAYLOAD_FDT_ADDR is not defined. This
correspond to cases where the underlying FW that loaded and started
opensbi did not provide any FDT. In such case, the platform code will
need to prepare one.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 firmware/fw_common.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index a2685cf21b2..9963fdd9539 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -41,6 +41,7 @@ _bss_zero:
 	add	a1, t1, zero
 _prev_arg1_override_done:
 
+#ifdef FW_PAYLOAD_FDT_ADDR
 	/*
 	 * Relocate Flatened Device Tree (FDT)
 	 * source FDT address = previous arg1
@@ -99,6 +100,7 @@ _fdt_reloc_again:
 	add	t1, t1, __SIZEOF_POINTER__
 	blt	t1, t2, _fdt_reloc_again
 _fdt_reloc_done:
+#endif
 
 	/* Update boot hart flag */
 	la	a4, _boot_hart_done

From 8f91d1142e241d3319cdafd9810928870bc71970 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 14:48:42 +0900
Subject: [PATCH 0010/1765] fw: Disable delegation

Also disable interrupts and exceptions delegation when clearing mie and
mip.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 firmware/fw_common.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index 9963fdd9539..afe14a1bc81 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -121,6 +121,8 @@ _wait_for_boot_hart:
 
 _start_warm:
 	/* Disable and clear all interrupts */
+	csrw	mideleg, zero
+	csrw	medeleg, zero
 	csrw	mie, zero
 	csrw	mip, zero
 

From 84df181c84921c4411eac7debce94316eb4a1132 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 14:58:23 +0900
Subject: [PATCH 0011/1765] Add a banner

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_init.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 3e7bda35e6e..72f2c19b233 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -17,6 +17,16 @@
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 
+static const char *logo =
+	"   ____                    _____ ____ _____\n"
+	"  / __ \\                  / ____|  _ \\_   _|\n"
+	" | |  | |_ __   ___ _ __ | (___ | |_) || |\n"
+	" | |  | | '_ \\ / _ \\ '_ \\ \\___ \\|  _ < | |\n"
+	" | |__| | |_) |  __/ | | |____) | |_) || |_\n"
+	"  \\____/| .__/ \\___|_| |_|_____/|____/_____|\n"
+	"        | |\n"
+	"        |_|\n";
+
 static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 						    u32 hartid)
 {
@@ -76,7 +86,10 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	sbi_printf("OpenSBI v%d.%d (%s %s)\n",
 		   OPENSBI_MAJOR, OPENSBI_MINOR,
 		   __DATE__, __TIME__);
-	sbi_printf("\n");
+	sbi_printf("Running on Hart %u\n", hartid);
+
+	sbi_printf("%s\n", logo);
+
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
 	sbi_printf("Platform HART Features : RV%d%s\n", misa_xlen(), str);

From 9c183df632ee91560e160d6011c7ece56ee1f9b0 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 15:04:16 +0900
Subject: [PATCH 0012/1765] Add a hang message

Make it clear that the end of the FW execution was reached without the
hand being passed to any payload.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_hart.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 26d435bdf97..b30250b3268 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -196,6 +196,8 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
+	sbi_printf("\nHang !!\n");
+
 	while (1)
 		wfi();
 	__builtin_unreachable();

From d403c70fb11fb55042ca3cef0dbe399ed87cc79b Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 15:05:33 +0900
Subject: [PATCH 0013/1765] Fix interrupt and exception delegation

When S mode is not supported, simply clear mideleg and medeleg.
Otherwise, set delegation from M-mode to S-mode, removing the page
fault exceptions as those would not happen in M-mode.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_hart.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index b30250b3268..12c5c55ba2e 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -77,17 +77,19 @@ static int fp_init(u32 hartid)
 
 static int delegate_traps(u32 hartid)
 {
-	/* send S-mode interrupts and most exceptions straight to S-mode */
-	unsigned long interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
-	unsigned long exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
-				   (1U << CAUSE_FETCH_PAGE_FAULT) |
-				   (1U << CAUSE_BREAKPOINT) |
-				   (1U << CAUSE_LOAD_PAGE_FAULT) |
-				   (1U << CAUSE_STORE_PAGE_FAULT) |
-				   (1U << CAUSE_USER_ECALL);
-
-	if (!misa_extension('S'))
-		return 0;
+	unsigned long interrupts, exceptions;
+
+	if (!misa_extension('S')) {
+		/* No delegation possible */
+		interrupts = 0;
+		exceptions = 0;
+	} else {
+		/* Send M-mode interrupts and most exceptions to S-mode */
+		interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
+		exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
+			     (1U << CAUSE_BREAKPOINT) |
+			     (1U << CAUSE_USER_ECALL);
+	}
 
 	csr_write(mideleg, interrupts);
 	csr_write(medeleg, exceptions);

From 745ae45e6570985682e8072c852e56e73219d182 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 09:14:44 +0900
Subject: [PATCH 0014/1765] Update Kendryte k210 support

Booting now.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/config.mk  |    6 +-
 platform/kendryte/k210/platform.c |   78 +-
 platform/kendryte/k210/platform.h | 1493 +++--------------------------
 platform/kendryte/k210/sysctl.c   |    7 +-
 platform/kendryte/k210/sysctl.h   |    6 +-
 platform/kendryte/k210/uarths.c   |    4 +-
 platform/kendryte/k210/uarths.h   |   16 +-
 7 files changed, 169 insertions(+), 1441 deletions(-)

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index e0e0247bd79..c0c36ea054b 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -10,7 +10,7 @@
 # Essential defines required by SBI platform
 platform-cppflags-y = -DPLAT_NAME="Kendryte K210"
 platform-cppflags-y+= -DPLAT_HART_COUNT=2
-platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
+platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=4096
 
 # Compiler flags
 platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
@@ -25,6 +25,6 @@ PLATFORM_SYS_CLINT=y
 FW_TEXT_START=0x80000000
 FW_JUMP=n
 FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x200000
-FW_PAYLOAD_FDT_ADDR=0x80040000
+FW_PAYLOAD_OFFSET=0x10000
+#FW_PAYLOAD_FDT_ADDR=0x80040000
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 6f9297ef640..03c2c2d7693 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -10,25 +10,20 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_console.h>
 #include <plat/irqchip/plic.h>
 #include <plat/sys/clint.h>
 #include "platform.h"
 #include "uarths.h"
 
-#define K210_U_SYS_CLK			1000000000
-#define K210_U_PERIPH_CLK		(K210_U_SYS_CLK / 2)
-
-#define K210_U_PLIC_NUM_SOURCES		0x35
-#define K210_U_PLIC_NUM_PRIORITIES	7
-
-static int k210_console_init(void)
+int k210_console_init(void)
 {
 	uarths_init(115200, UARTHS_STOP_1);
 
 	return 0;
 }
 
-static void k210_console_putc(char c)
+void k210_console_putc(char c)
 {
 	uarths_putc(c);
 }
@@ -38,57 +33,40 @@ static char k210_console_getc(void)
 	return uarths_getc();
 }
 
-static u32 k210_pmp_region_count(u32 target_hart)
-{
-	return 1;
-}
-
-static int k210_pmp_region_info(u32 target_hart, u32 index,
-				  ulong *prot, ulong *addr, ulong *log2size)
+static int k210_cold_irqchip_init(void)
 {
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot = PMP_R | PMP_W | PMP_X;
-		*addr = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
+	return plic_cold_irqchip_init(PLIC_BASE_ADDR, PLIC_NUM_SOURCES,
+				      PLAT_HART_COUNT);
 }
 
-static int k210_cold_irqchip_init(void)
+static int k210_warm_irqchip_init(u32 core_id)
 {
-	return plic_cold_irqchip_init(PLIC_BASE_ADDR,
-				      K210_U_PLIC_NUM_SOURCES,
-				      PLAT_HART_COUNT);
+	return plic_warm_irqchip_init(core_id);
 }
 
 static int k210_cold_ipi_init(void)
 {
-	return clint_cold_ipi_init(CLINT_BASE_ADDR,
-				   PLAT_HART_COUNT);
+	return clint_cold_ipi_init(CLINT_BASE_ADDR, PLAT_HART_COUNT);
 }
 
 static int k210_cold_timer_init(void)
 {
-	return clint_cold_timer_init(CLINT_BASE_ADDR,
-				     PLAT_HART_COUNT);
+	return clint_cold_timer_init(CLINT_BASE_ADDR, PLAT_HART_COUNT);
 }
 
-static int k210_cold_final_init(void)
+static int k210_system_reboot(u32 type)
 {
-	return plic_fdt_fixup(sbi_scratch_thishart_arg1_ptr(), "riscv,plic0");
+	/* For now nothing to do. */
+	sbi_printf("System reboot\n");
+
+	return 0;
 }
 
-static int k210_system_down(u32 type)
+static int k210_system_shutdown(u32 type)
 {
 	/* For now nothing to do. */
+	sbi_printf("System shutdown\n");
+
 	return 0;
 }
 
@@ -100,29 +78,27 @@ struct sbi_platform platform = {
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
 
-	.pmp_region_count = k210_pmp_region_count,
-	.pmp_region_info = k210_pmp_region_info,
-
-
 	.console_init = k210_console_init,
 	.console_putc = k210_console_putc,
 	.console_getc = k210_console_getc,
 
 	.cold_irqchip_init = k210_cold_irqchip_init,
-	.warm_irqchip_init = plic_warm_irqchip_init,
+	.warm_irqchip_init = k210_warm_irqchip_init,
+
+	.cold_ipi_init = k210_cold_ipi_init,
+	.warm_ipi_init = clint_warm_ipi_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
-	.warm_ipi_init = clint_warm_ipi_init,
-	.cold_ipi_init = k210_cold_ipi_init,
-	.cold_final_init = k210_cold_final_init,
 
+	.cold_timer_init = k210_cold_timer_init,
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
 	.warm_timer_init = clint_warm_timer_init,
-	.cold_timer_init = k210_cold_timer_init,
 
-	.system_reboot = k210_system_down,
-	.system_shutdown = k210_system_down
+	.cold_final_init = NULL,
+
+	.system_reboot = k210_system_reboot,
+	.system_shutdown = k210_system_shutdown
 };
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 4aa15d76b10..14a4bbdfba4 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -19,69 +19,69 @@
 /* Register base address */
 
 /* Under Coreplex */
-#define CLINT_BASE_ADDR     (0x02000000U)
-#define PLIC_BASE_ADDR      (0x0C000000U)
+#define CLINT_BASE_ADDR		(0x02000000U)
+#define PLIC_BASE_ADDR		(0x0C000000U)
+#define PLIC_NUM_CORES		(PLAT_HART_COUNT)
 
 /* Under TileLink */
-#define UARTHS_BASE_ADDR    (0x38000000U)
-#define GPIOHS_BASE_ADDR    (0x38001000U)
+#define GPIOHS_BASE_ADDR	(0x38001000U)
 
 /* Under AXI 64 bit */
-#define RAM_BASE_ADDR       (0x80000000U)
-#define RAM_SIZE            (6 * 1024 * 1024U)
+#define RAM_BASE_ADDR		(0x80000000U)
+#define RAM_SIZE		(6 * 1024 * 1024U)
 
-#define IO_BASE_ADDR        (0x40000000U)
-#define IO_SIZE             (6 * 1024 * 1024U)
+#define IO_BASE_ADDR		(0x40000000U)
+#define IO_SIZE			(6 * 1024 * 1024U)
 
-#define AI_RAM_BASE_ADDR    (0x80600000U)
-#define AI_RAM_SIZE         (2 * 1024 * 1024U)
+#define AI_RAM_BASE_ADDR	(0x80600000U)
+#define AI_RAM_SIZE		(2 * 1024 * 1024U)
 
-#define AI_IO_BASE_ADDR     (0x40600000U)
-#define AI_IO_SIZE          (2 * 1024 * 1024U)
+#define AI_IO_BASE_ADDR		(0x40600000U)
+#define AI_IO_SIZE		(2 * 1024 * 1024U)
 
-#define AI_BASE_ADDR        (0x40800000U)
-#define AI_SIZE             (12 * 1024 * 1024U)
+#define AI_BASE_ADDR		(0x40800000U)
+#define AI_SIZE			(12 * 1024 * 1024U)
 
-#define FFT_BASE_ADDR       (0x42000000U)
-#define FFT_SIZE            (4 * 1024 * 1024U)
+#define FFT_BASE_ADDR		(0x42000000U)
+#define FFT_SIZE		(4 * 1024 * 1024U)
 
-#define ROM_BASE_ADDR       (0x88000000U)
-#define ROM_SIZE            (128 * 1024U)
+#define ROM_BASE_ADDR		(0x88000000U)
+#define ROM_SIZE		(128 * 1024U)
 
 /* Under AHB 32 bit */
-#define DMAC_BASE_ADDR      (0x50000000U)
+#define DMAC_BASE_ADDR		(0x50000000U)
 
 /* Under APB1 32 bit */
-#define GPIO_BASE_ADDR      (0x50200000U)
-#define UART1_BASE_ADDR     (0x50210000U)
-#define UART2_BASE_ADDR     (0x50220000U)
-#define UART3_BASE_ADDR     (0x50230000U)
-#define SPI_SLAVE_BASE_ADDR (0x50240000U)
-#define I2S0_BASE_ADDR      (0x50250000U)
-#define I2S1_BASE_ADDR      (0x50260000U)
-#define I2S2_BASE_ADDR      (0x50270000U)
-#define I2C0_BASE_ADDR      (0x50280000U)
-#define I2C1_BASE_ADDR      (0x50290000U)
-#define I2C2_BASE_ADDR      (0x502A0000U)
-#define FPIOA_BASE_ADDR     (0x502B0000U)
-#define SHA256_BASE_ADDR    (0x502C0000U)
-#define TIMER0_BASE_ADDR    (0x502D0000U)
-#define TIMER1_BASE_ADDR    (0x502E0000U)
-#define TIMER2_BASE_ADDR    (0x502F0000U)
+#define GPIO_BASE_ADDR		(0x50200000U)
+#define UART1_BASE_ADDR		(0x50210000U)
+#define UART2_BASE_ADDR		(0x50220000U)
+#define UART3_BASE_ADDR		(0x50230000U)
+#define SPI_SLAVE_BASE_ADDR	(0x50240000U)
+#define I2S0_BASE_ADDR		(0x50250000U)
+#define I2S1_BASE_ADDR		(0x50260000U)
+#define I2S2_BASE_ADDR		(0x50270000U)
+#define I2C0_BASE_ADDR		(0x50280000U)
+#define I2C1_BASE_ADDR		(0x50290000U)
+#define I2C2_BASE_ADDR		(0x502A0000U)
+#define FPIOA_BASE_ADDR		(0x502B0000U)
+#define SHA256_BASE_ADDR	(0x502C0000U)
+#define TIMER0_BASE_ADDR	(0x502D0000U)
+#define TIMER1_BASE_ADDR	(0x502E0000U)
+#define TIMER2_BASE_ADDR	(0x502F0000U)
 
 /* Under APB2 32 bit */
-#define WDT0_BASE_ADDR      (0x50400000U)
-#define WDT1_BASE_ADDR      (0x50410000U)
-#define OTP_BASE_ADDR       (0x50420000U)
-#define DVP_BASE_ADDR       (0x50430000U)
-#define SYSCTL_BASE_ADDR    (0x50440000U)
-#define AES_BASE_ADDR       (0x50450000U)
-#define RTC_BASE_ADDR       (0x50460000U)
+#define WDT0_BASE_ADDR		(0x50400000U)
+#define WDT1_BASE_ADDR		(0x50410000U)
+#define OTP_BASE_ADDR		(0x50420000U)
+#define DVP_BASE_ADDR		(0x50430000U)
+#define SYSCTL_BASE_ADDR	(0x50440000U)
+#define AES_BASE_ADDR		(0x50450000U)
+#define RTC_BASE_ADDR		(0x50460000U)
 
 /* Under APB3 32 bit */
-#define SPI0_BASE_ADDR      (0x52000000U)
-#define SPI1_BASE_ADDR      (0x53000000U)
-#define SPI3_BASE_ADDR      (0x54000000U)
+#define SPI0_BASE_ADDR		(0x52000000U)
+#define SPI1_BASE_ADDR		(0x53000000U)
+#define SPI3_BASE_ADDR		(0x54000000U)
 
 #define read_csr(reg) ({ unsigned long __tmp; \
   asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
@@ -118,1331 +118,82 @@
 #define read_cycle()		read_csr(mcycle)
 #define current_coreid()	read_csr(mhartid)
 
-#endif /* _PLATFORM_H_ */
-
-
-
-
-
-
-
-
-#if 0
-
-/* From Kendryte SDK encoding.h file */
-
-#ifndef RISCV_CSR_ENCODING_H
-#define RISCV_CSR_ENCODING_H
-
-#define MSTATUS_UIE         0x00000001U
-#define MSTATUS_SIE         0x00000002U
-#define MSTATUS_HIE         0x00000004U
-#define MSTATUS_MIE         0x00000008U
-#define MSTATUS_UPIE        0x00000010U
-#define MSTATUS_SPIE        0x00000020U
-#define MSTATUS_HPIE        0x00000040U
-#define MSTATUS_MPIE        0x00000080U
-#define MSTATUS_SPP         0x00000100U
-#define MSTATUS_HPP         0x00000600U
-#define MSTATUS_MPP         0x00001800U
-#define MSTATUS_FS          0x00006000U
-#define MSTATUS_XS          0x00018000U
-#define MSTATUS_MPRV        0x00020000U
-#define MSTATUS_PUM         0x00040000U
-#define MSTATUS_MXR         0x00080000U
-#define MSTATUS_VM          0x1F000000U
-#define MSTATUS32_SD        0x80000000U
-#define MSTATUS64_SD        0x8000000000000000U
-
-#define SSTATUS_UIE         0x00000001U
-#define SSTATUS_SIE         0x00000002U
-#define SSTATUS_UPIE        0x00000010U
-#define SSTATUS_SPIE        0x00000020U
-#define SSTATUS_SPP         0x00000100U
-#define SSTATUS_FS          0x00006000U
-#define SSTATUS_XS          0x00018000U
-#define SSTATUS_PUM         0x00040000U
-#define SSTATUS32_SD        0x80000000U
-#define SSTATUS64_SD        0x8000000000000000U
-
-#define DCSR_XDEBUGVER      (3U<<30)
-#define DCSR_NDRESET        (1U<<29)
-#define DCSR_FULLRESET      (1U<<28)
-#define DCSR_EBREAKM        (1U<<15)
-#define DCSR_EBREAKH        (1U<<14)
-#define DCSR_EBREAKS        (1U<<13)
-#define DCSR_EBREAKU        (1U<<12)
-#define DCSR_STOPCYCLE      (1U<<10)
-#define DCSR_STOPTIME       (1U<<9)
-#define DCSR_CAUSE          (7U<<6)
-#define DCSR_DEBUGINT       (1U<<5)
-#define DCSR_HALT           (1U<<3)
-#define DCSR_STEP           (1U<<2)
-#define DCSR_PRV            (3U<<0)
-
-#define DCSR_CAUSE_NONE     0
-#define DCSR_CAUSE_SWBP     1
-#define DCSR_CAUSE_HWBP     2
-#define DCSR_CAUSE_DEBUGINT 3
-#define DCSR_CAUSE_STEP     4
-#define DCSR_CAUSE_HALT     5
-
-#define MCONTROL_SELECT     (1U<<19)
-#define MCONTROL_TIMING     (1U<<18)
-#define MCONTROL_ACTION     (0x3fU<<12)
-#define MCONTROL_CHAIN      (1U<<11)
-#define MCONTROL_MATCH      (0xfU<<7)
-#define MCONTROL_M          (1U<<6)
-#define MCONTROL_H          (1U<<5)
-#define MCONTROL_S          (1U<<4)
-#define MCONTROL_U          (1U<<3)
-#define MCONTROL_EXECUTE    (1U<<2)
-#define MCONTROL_STORE      (1U<<1)
-#define MCONTROL_LOAD       (1U<<0)
-
-#define MCONTROL_TYPE_NONE      0
-#define MCONTROL_TYPE_MATCH     2
-
-#define MCONTROL_ACTION_DEBUG_EXCEPTION   0
-#define MCONTROL_ACTION_DEBUG_MODE        1
-#define MCONTROL_ACTION_TRACE_START       2
-#define MCONTROL_ACTION_TRACE_STOP        3
-#define MCONTROL_ACTION_TRACE_EMIT        4
-
-#define MCONTROL_MATCH_EQUAL     0
-#define MCONTROL_MATCH_NAPOT     1
-#define MCONTROL_MATCH_GE        2
-#define MCONTROL_MATCH_LT        3
-#define MCONTROL_MATCH_MASK_LOW  4
-#define MCONTROL_MATCH_MASK_HIGH 5
-
-#define MIP_SSIP            (1U << IRQ_S_SOFT)
-#define MIP_HSIP            (1U << IRQ_H_SOFT)
-#define MIP_MSIP            (1U << IRQ_M_SOFT)
-#define MIP_STIP            (1U << IRQ_S_TIMER)
-#define MIP_HTIP            (1U << IRQ_H_TIMER)
-#define MIP_MTIP            (1U << IRQ_M_TIMER)
-#define MIP_SEIP            (1U << IRQ_S_EXT)
-#define MIP_HEIP            (1U << IRQ_H_EXT)
-#define MIP_MEIP            (1U << IRQ_M_EXT)
-
-#define SIP_SSIP MIP_SSIP
-#define SIP_STIP MIP_STIP
-
-#define PRV_U 0
-#define PRV_S 1
-#define PRV_H 2
-#define PRV_M 3
-
-#define VM_MBARE 0
-#define VM_MBB   1
-#define VM_MBBID 2
-#define VM_SV32  8
-#define VM_SV39  9
-#define VM_SV48  10
-
-#define IRQ_S_SOFT   1
-#define IRQ_H_SOFT   2
-#define IRQ_M_SOFT   3
-#define IRQ_S_TIMER  5
-#define IRQ_H_TIMER  6
-#define IRQ_M_TIMER  7
-#define IRQ_S_EXT    9
-#define IRQ_H_EXT    10
-#define IRQ_M_EXT    11
-#define IRQ_COP      12
-#define IRQ_HOST     13
-
-#define DEFAULT_RSTVEC     0x00001000U
-#define DEFAULT_NMIVEC     0x00001004U
-#define DEFAULT_MTVEC      0x00001010U
-#define CONFIG_STRING_ADDR 0x0000100CU
-#define EXT_IO_BASE        0x40000000U
-#define DRAM_BASE          0x80000000U
-
-/* page table entry (PTE) fields */
-#define PTE_V     0x001U /* Valid */
-#define PTE_R     0x002U /* Read */
-#define PTE_W     0x004U /* Write */
-#define PTE_X     0x008U /* Execute */
-#define PTE_U     0x010U /* User */
-#define PTE_G     0x020U /* Global */
-#define PTE_A     0x040U /* Accessed */
-#define PTE_D     0x080U /* Dirty */
-#define PTE_SOFT  0x300U /* Reserved for Software */
-
-#define PTE_PPN_SHIFT 10
-
-#define MCONTROL_TYPE(xlen)    (0xfULL<<((xlen)-4))
-#define MCONTROL_DMODE(xlen)   (1ULL<<((xlen)-5))
-#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
-
-#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
-
-#if defined(__riscv)
-
-#if defined(__riscv64)
-# define MSTATUS_SD MSTATUS64_SD
-# define SSTATUS_SD SSTATUS64_SD
-# define RISCV_PGLEVEL_BITS 9
-#else
-# define MSTATUS_SD MSTATUS32_SD
-# define SSTATUS_SD SSTATUS32_SD
-# define RISCV_PGLEVEL_BITS 10
-#endif
-
-#define RISCV_PGSHIFT 12
-#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
-
-#ifndef __ASSEMBLER__
-
-#if defined(__GNUC__)
-
-#define read_csr(reg) ({ unsigned long __tmp; \
-  asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
-  __tmp; })
-
-#define write_csr(reg, val) ({ \
-  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
-	  asm volatile ("csrw " #reg ", %0" :: "i"(val));     \
-  else \
-	  asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
-
-#define swap_csr(reg, val) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
-	  asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
-  else \
-	  asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
-  __tmp; })
-
-#define set_csr(reg, bit) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
-	  asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
-  else \
-	  asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; })
-
-#define clear_csr(reg, bit) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
-	  asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
-  else \
-	  asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; })
-
-#define read_time()		read_csr(mtime)
-#define read_cycle()		read_csr(mcycle)
-#define current_coreid()	read_csr(mhartid)
-
-#endif
-
-#endif
-
-#endif
-
-#endif
-
-#ifndef RISCV_ENCODING_H
-#define RISCV_ENCODING_H
-#define MATCH_BEQ                  0x63U
-#define MASK_BEQ                   0x707fU
-#define MATCH_BNE                  0x1063U
-#define MASK_BNE                   0x707fU
-#define MATCH_BLT                  0x4063U
-#define MASK_BLT                   0x707fU
-#define MATCH_BGE                  0x5063U
-#define MASK_BGE                   0x707fU
-#define MATCH_BLTU                 0x6063U
-#define MASK_BLTU                  0x707fU
-#define MATCH_BGEU                 0x7063U
-#define MASK_BGEU                  0x707fU
-#define MATCH_JALR                 0x67U
-#define MASK_JALR                  0x707fU
-#define MATCH_JAL                  0x6fU
-#define MASK_JAL                   0x7fU
-#define MATCH_LUI                  0x37U
-#define MASK_LUI                   0x7fU
-#define MATCH_AUIPC                0x17U
-#define MASK_AUIPC                 0x7fU
-#define MATCH_ADDI                 0x13U
-#define MASK_ADDI                  0x707fU
-#define MATCH_SLLI                 0x1013U
-#define MASK_SLLI                  0xfc00707fU
-#define MATCH_SLTI                 0x2013U
-#define MASK_SLTI                  0x707fU
-#define MATCH_SLTIU                0x3013U
-#define MASK_SLTIU                 0x707fU
-#define MATCH_XORI                 0x4013U
-#define MASK_XORI                  0x707fU
-#define MATCH_SRLI                 0x5013U
-#define MASK_SRLI                  0xfc00707fU
-#define MATCH_SRAI                 0x40005013U
-#define MASK_SRAI                  0xfc00707fU
-#define MATCH_ORI                  0x6013U
-#define MASK_ORI                   0x707fU
-#define MATCH_ANDI                 0x7013U
-#define MASK_ANDI                  0x707fU
-#define MATCH_ADD                  0x33U
-#define MASK_ADD                   0xfe00707fU
-#define MATCH_SUB                  0x40000033U
-#define MASK_SUB                   0xfe00707fU
-#define MATCH_SLL                  0x1033U
-#define MASK_SLL                   0xfe00707fU
-#define MATCH_SLT                  0x2033U
-#define MASK_SLT                   0xfe00707fU
-#define MATCH_SLTU                 0x3033U
-#define MASK_SLTU                  0xfe00707fU
-#define MATCH_XOR                  0x4033U
-#define MASK_XOR                   0xfe00707fU
-#define MATCH_SRL                  0x5033U
-#define MASK_SRL                   0xfe00707fU
-#define MATCH_SRA                  0x40005033U
-#define MASK_SRA                   0xfe00707fU
-#define MATCH_OR                   0x6033U
-#define MASK_OR                    0xfe00707fU
-#define MATCH_AND                  0x7033U
-#define MASK_AND                   0xfe00707fU
-#define MATCH_ADDIW                0x1bU
-#define MASK_ADDIW                 0x707fU
-#define MATCH_SLLIW                0x101bU
-#define MASK_SLLIW                 0xfe00707fU
-#define MATCH_SRLIW                0x501bU
-#define MASK_SRLIW                 0xfe00707fU
-#define MATCH_SRAIW                0x4000501bU
-#define MASK_SRAIW                 0xfe00707fU
-#define MATCH_ADDW                 0x3bU
-#define MASK_ADDW                  0xfe00707fU
-#define MATCH_SUBW                 0x4000003bU
-#define MASK_SUBW                  0xfe00707fU
-#define MATCH_SLLW                 0x103bU
-#define MASK_SLLW                  0xfe00707fU
-#define MATCH_SRLW                 0x503bU
-#define MASK_SRLW                  0xfe00707fU
-#define MATCH_SRAW                 0x4000503bU
-#define MASK_SRAW                  0xfe00707fU
-#define MATCH_LB                   0x3U
-#define MASK_LB                    0x707fU
-#define MATCH_LH                   0x1003U
-#define MASK_LH                    0x707fU
-#define MATCH_LW                   0x2003U
-#define MASK_LW                    0x707fU
-#define MATCH_LD                   0x3003U
-#define MASK_LD                    0x707fU
-#define MATCH_LBU                  0x4003U
-#define MASK_LBU                   0x707fU
-#define MATCH_LHU                  0x5003U
-#define MASK_LHU                   0x707fU
-#define MATCH_LWU                  0x6003U
-#define MASK_LWU                   0x707fU
-#define MATCH_SB                   0x23U
-#define MASK_SB                    0x707fU
-#define MATCH_SH                   0x1023U
-#define MASK_SH                    0x707fU
-#define MATCH_SW                   0x2023U
-#define MASK_SW                    0x707fU
-#define MATCH_SD                   0x3023U
-#define MASK_SD                    0x707fU
-#define MATCH_FENCE                0xfU
-#define MASK_FENCE                 0x707fU
-#define MATCH_FENCE_I              0x100fU
-#define MASK_FENCE_I               0x707fU
-#define MATCH_MUL                  0x2000033U
-#define MASK_MUL                   0xfe00707fU
-#define MATCH_MULH                 0x2001033U
-#define MASK_MULH                  0xfe00707fU
-#define MATCH_MULHSU               0x2002033U
-#define MASK_MULHSU                0xfe00707fU
-#define MATCH_MULHU                0x2003033U
-#define MASK_MULHU                 0xfe00707fU
-#define MATCH_DIV                  0x2004033U
-#define MASK_DIV                   0xfe00707fU
-#define MATCH_DIVU                 0x2005033U
-#define MASK_DIVU                  0xfe00707fU
-#define MATCH_REM                  0x2006033U
-#define MASK_REM                   0xfe00707fU
-#define MATCH_REMU                 0x2007033U
-#define MASK_REMU                  0xfe00707fU
-#define MATCH_MULW                 0x200003bU
-#define MASK_MULW                  0xfe00707fU
-#define MATCH_DIVW                 0x200403bU
-#define MASK_DIVW                  0xfe00707fU
-#define MATCH_DIVUW                0x200503bU
-#define MASK_DIVUW                 0xfe00707fU
-#define MATCH_REMW                 0x200603bU
-#define MASK_REMW                  0xfe00707fU
-#define MATCH_REMUW                0x200703bU
-#define MASK_REMUW                 0xfe00707fU
-#define MATCH_AMOADD_W             0x202fU
-#define MASK_AMOADD_W              0xf800707fU
-#define MATCH_AMOXOR_W             0x2000202fU
-#define MASK_AMOXOR_W              0xf800707fU
-#define MATCH_AMOOR_W              0x4000202fU
-#define MASK_AMOOR_W               0xf800707fU
-#define MATCH_AMOAND_W             0x6000202fU
-#define MASK_AMOAND_W              0xf800707fU
-#define MATCH_AMOMIN_W             0x8000202fU
-#define MASK_AMOMIN_W              0xf800707fU
-#define MATCH_AMOMAX_W             0xa000202fU
-#define MASK_AMOMAX_W              0xf800707fU
-#define MATCH_AMOMINU_W            0xc000202fU
-#define MASK_AMOMINU_W             0xf800707fU
-#define MATCH_AMOMAXU_W            0xe000202fU
-#define MASK_AMOMAXU_W             0xf800707fU
-#define MATCH_AMOSWAP_W            0x800202fU
-#define MASK_AMOSWAP_W             0xf800707fU
-#define MATCH_LR_W                 0x1000202fU
-#define MASK_LR_W                  0xf9f0707fU
-#define MATCH_SC_W                 0x1800202fU
-#define MASK_SC_W                  0xf800707fU
-#define MATCH_AMOADD_D             0x302fU
-#define MASK_AMOADD_D              0xf800707fU
-#define MATCH_AMOXOR_D             0x2000302fU
-#define MASK_AMOXOR_D              0xf800707fU
-#define MATCH_AMOOR_D              0x4000302fU
-#define MASK_AMOOR_D               0xf800707fU
-#define MATCH_AMOAND_D             0x6000302fU
-#define MASK_AMOAND_D              0xf800707fU
-#define MATCH_AMOMIN_D             0x8000302fU
-#define MASK_AMOMIN_D              0xf800707fU
-#define MATCH_AMOMAX_D             0xa000302fU
-#define MASK_AMOMAX_D              0xf800707fU
-#define MATCH_AMOMINU_D            0xc000302fU
-#define MASK_AMOMINU_D             0xf800707fU
-#define MATCH_AMOMAXU_D            0xe000302fU
-#define MASK_AMOMAXU_D             0xf800707fU
-#define MATCH_AMOSWAP_D            0x800302fU
-#define MASK_AMOSWAP_D             0xf800707fU
-#define MATCH_LR_D                 0x1000302fU
-#define MASK_LR_D                  0xf9f0707fU
-#define MATCH_SC_D                 0x1800302fU
-#define MASK_SC_D                  0xf800707fU
-#define MATCH_ECALL                0x73U
-#define MASK_ECALL                 0xffffffffU
-#define MATCH_EBREAK               0x100073U
-#define MASK_EBREAK                0xffffffffU
-#define MATCH_URET                 0x200073U
-#define MASK_URET                  0xffffffffU
-#define MATCH_SRET                 0x10200073U
-#define MASK_SRET                  0xffffffffU
-#define MATCH_HRET                 0x20200073U
-#define MASK_HRET                  0xffffffffU
-#define MATCH_MRET                 0x30200073U
-#define MASK_MRET                  0xffffffffU
-#define MATCH_DRET                 0x7b200073U
-#define MASK_DRET                  0xffffffffU
-#define MATCH_SFENCE_VM            0x10400073U
-#define MASK_SFENCE_VM             0xfff07fffU
-#define MATCH_WFI                  0x10500073U
-#define MASK_WFI                   0xffffffffU
-#define MATCH_CSRRW                0x1073U
-#define MASK_CSRRW                 0x707fU
-#define MATCH_CSRRS                0x2073U
-#define MASK_CSRRS                 0x707fU
-#define MATCH_CSRRC                0x3073U
-#define MASK_CSRRC                 0x707fU
-#define MATCH_CSRRWI               0x5073U
-#define MASK_CSRRWI                0x707fU
-#define MATCH_CSRRSI               0x6073U
-#define MASK_CSRRSI                0x707fU
-#define MATCH_CSRRCI               0x7073U
-#define MASK_CSRRCI                0x707fU
-#define MATCH_FADD_S               0x53U
-#define MASK_FADD_S                0xfe00007fU
-#define MATCH_FSUB_S               0x8000053U
-#define MASK_FSUB_S                0xfe00007fU
-#define MATCH_FMUL_S               0x10000053U
-#define MASK_FMUL_S                0xfe00007fU
-#define MATCH_FDIV_S               0x18000053U
-#define MASK_FDIV_S                0xfe00007fU
-#define MATCH_FSGNJ_S              0x20000053U
-#define MASK_FSGNJ_S               0xfe00707fU
-#define MATCH_FSGNJN_S             0x20001053U
-#define MASK_FSGNJN_S              0xfe00707fU
-#define MATCH_FSGNJX_S             0x20002053U
-#define MASK_FSGNJX_S              0xfe00707fU
-#define MATCH_FMIN_S               0x28000053U
-#define MASK_FMIN_S                0xfe00707fU
-#define MATCH_FMAX_S               0x28001053U
-#define MASK_FMAX_S                0xfe00707fU
-#define MATCH_FSQRT_S              0x58000053U
-#define MASK_FSQRT_S               0xfff0007fU
-#define MATCH_FADD_D               0x2000053U
-#define MASK_FADD_D                0xfe00007fU
-#define MATCH_FSUB_D               0xa000053U
-#define MASK_FSUB_D                0xfe00007fU
-#define MATCH_FMUL_D               0x12000053U
-#define MASK_FMUL_D                0xfe00007fU
-#define MATCH_FDIV_D               0x1a000053U
-#define MASK_FDIV_D                0xfe00007fU
-#define MATCH_FSGNJ_D              0x22000053U
-#define MASK_FSGNJ_D               0xfe00707fU
-#define MATCH_FSGNJN_D             0x22001053U
-#define MASK_FSGNJN_D              0xfe00707fU
-#define MATCH_FSGNJX_D             0x22002053U
-#define MASK_FSGNJX_D              0xfe00707fU
-#define MATCH_FMIN_D               0x2a000053U
-#define MASK_FMIN_D                0xfe00707fU
-#define MATCH_FMAX_D               0x2a001053U
-#define MASK_FMAX_D                0xfe00707fU
-#define MATCH_FCVT_S_D             0x40100053U
-#define MASK_FCVT_S_D              0xfff0007fU
-#define MATCH_FCVT_D_S             0x42000053U
-#define MASK_FCVT_D_S              0xfff0007fU
-#define MATCH_FSQRT_D              0x5a000053U
-#define MASK_FSQRT_D               0xfff0007fU
-#define MATCH_FLE_S                0xa0000053U
-#define MASK_FLE_S                 0xfe00707fU
-#define MATCH_FLT_S                0xa0001053U
-#define MASK_FLT_S                 0xfe00707fU
-#define MATCH_FEQ_S                0xa0002053U
-#define MASK_FEQ_S                 0xfe00707fU
-#define MATCH_FLE_D                0xa2000053U
-#define MASK_FLE_D                 0xfe00707fU
-#define MATCH_FLT_D                0xa2001053U
-#define MASK_FLT_D                 0xfe00707fU
-#define MATCH_FEQ_D                0xa2002053U
-#define MASK_FEQ_D                 0xfe00707fU
-#define MATCH_FCVT_W_S             0xc0000053U
-#define MASK_FCVT_W_S              0xfff0007fU
-#define MATCH_FCVT_WU_S            0xc0100053U
-#define MASK_FCVT_WU_S             0xfff0007fU
-#define MATCH_FCVT_L_S             0xc0200053U
-#define MASK_FCVT_L_S              0xfff0007fU
-#define MATCH_FCVT_LU_S            0xc0300053U
-#define MASK_FCVT_LU_S             0xfff0007fU
-#define MATCH_FMV_X_S              0xe0000053U
-#define MASK_FMV_X_S               0xfff0707fU
-#define MATCH_FCLASS_S             0xe0001053U
-#define MASK_FCLASS_S              0xfff0707fU
-#define MATCH_FCVT_W_D             0xc2000053U
-#define MASK_FCVT_W_D              0xfff0007fU
-#define MATCH_FCVT_WU_D            0xc2100053U
-#define MASK_FCVT_WU_D             0xfff0007fU
-#define MATCH_FCVT_L_D             0xc2200053U
-#define MASK_FCVT_L_D              0xfff0007fU
-#define MATCH_FCVT_LU_D            0xc2300053U
-#define MASK_FCVT_LU_D             0xfff0007fU
-#define MATCH_FMV_X_D              0xe2000053U
-#define MASK_FMV_X_D               0xfff0707fU
-#define MATCH_FCLASS_D             0xe2001053U
-#define MASK_FCLASS_D              0xfff0707fU
-#define MATCH_FCVT_S_W             0xd0000053U
-#define MASK_FCVT_S_W              0xfff0007fU
-#define MATCH_FCVT_S_WU            0xd0100053U
-#define MASK_FCVT_S_WU             0xfff0007fU
-#define MATCH_FCVT_S_L             0xd0200053U
-#define MASK_FCVT_S_L              0xfff0007fU
-#define MATCH_FCVT_S_LU            0xd0300053U
-#define MASK_FCVT_S_LU             0xfff0007fU
-#define MATCH_FMV_S_X              0xf0000053U
-#define MASK_FMV_S_X               0xfff0707fU
-#define MATCH_FCVT_D_W             0xd2000053U
-#define MASK_FCVT_D_W              0xfff0007fU
-#define MATCH_FCVT_D_WU            0xd2100053U
-#define MASK_FCVT_D_WU             0xfff0007fU
-#define MATCH_FCVT_D_L             0xd2200053U
-#define MASK_FCVT_D_L              0xfff0007fU
-#define MATCH_FCVT_D_LU            0xd2300053U
-#define MASK_FCVT_D_LU             0xfff0007fU
-#define MATCH_FMV_D_X              0xf2000053U
-#define MASK_FMV_D_X               0xfff0707fU
-#define MATCH_FLW                  0x2007U
-#define MASK_FLW                   0x707fU
-#define MATCH_FLD                  0x3007U
-#define MASK_FLD                   0x707fU
-#define MATCH_FSW                  0x2027U
-#define MASK_FSW                   0x707fU
-#define MATCH_FSD                  0x3027U
-#define MASK_FSD                   0x707fU
-#define MATCH_FMADD_S              0x43U
-#define MASK_FMADD_S               0x600007fU
-#define MATCH_FMSUB_S              0x47U
-#define MASK_FMSUB_S               0x600007fU
-#define MATCH_FNMSUB_S             0x4bU
-#define MASK_FNMSUB_S              0x600007fU
-#define MATCH_FNMADD_S             0x4fU
-#define MASK_FNMADD_S              0x600007fU
-#define MATCH_FMADD_D              0x2000043U
-#define MASK_FMADD_D               0x600007fU
-#define MATCH_FMSUB_D              0x2000047U
-#define MASK_FMSUB_D               0x600007fU
-#define MATCH_FNMSUB_D             0x200004bU
-#define MASK_FNMSUB_D              0x600007fU
-#define MATCH_FNMADD_D             0x200004fU
-#define MASK_FNMADD_D              0x600007fU
-#define MATCH_C_NOP                0x1U
-#define MASK_C_NOP                 0xffffU
-#define MATCH_C_ADDI16SP           0x6101U
-#define MASK_C_ADDI16SP            0xef83U
-#define MATCH_C_JR                 0x8002U
-#define MASK_C_JR                  0xf07fU
-#define MATCH_C_JALR               0x9002U
-#define MASK_C_JALR                0xf07fU
-#define MATCH_C_EBREAK             0x9002U
-#define MASK_C_EBREAK              0xffffU
-#define MATCH_C_LD                 0x6000U
-#define MASK_C_LD                  0xe003U
-#define MATCH_C_SD                 0xe000U
-#define MASK_C_SD                  0xe003U
-#define MATCH_C_ADDIW              0x2001U
-#define MASK_C_ADDIW               0xe003U
-#define MATCH_C_LDSP               0x6002U
-#define MASK_C_LDSP                0xe003U
-#define MATCH_C_SDSP               0xe002U
-#define MASK_C_SDSP                0xe003U
-#define MATCH_C_ADDI4SPN           0x0U
-#define MASK_C_ADDI4SPN            0xe003U
-#define MATCH_C_FLD                0x2000U
-#define MASK_C_FLD                 0xe003U
-#define MATCH_C_LW                 0x4000U
-#define MASK_C_LW                  0xe003U
-#define MATCH_C_FLW                0x6000U
-#define MASK_C_FLW                 0xe003U
-#define MATCH_C_FSD                0xa000U
-#define MASK_C_FSD                 0xe003U
-#define MATCH_C_SW                 0xc000U
-#define MASK_C_SW                  0xe003U
-#define MATCH_C_FSW                0xe000U
-#define MASK_C_FSW                 0xe003U
-#define MATCH_C_ADDI               0x1U
-#define MASK_C_ADDI                0xe003U
-#define MATCH_C_JAL                0x2001U
-#define MASK_C_JAL                 0xe003U
-#define MATCH_C_LI                 0x4001U
-#define MASK_C_LI                  0xe003U
-#define MATCH_C_LUI                0x6001U
-#define MASK_C_LUI                 0xe003U
-#define MATCH_C_SRLI               0x8001U
-#define MASK_C_SRLI                0xec03U
-#define MATCH_C_SRAI               0x8401U
-#define MASK_C_SRAI                0xec03U
-#define MATCH_C_ANDI               0x8801U
-#define MASK_C_ANDI                0xec03U
-#define MATCH_C_SUB                0x8c01U
-#define MASK_C_SUB                 0xfc63U
-#define MATCH_C_XOR                0x8c21U
-#define MASK_C_XOR                 0xfc63U
-#define MATCH_C_OR                 0x8c41U
-#define MASK_C_OR                  0xfc63U
-#define MATCH_C_AND                0x8c61U
-#define MASK_C_AND                 0xfc63U
-#define MATCH_C_SUBW               0x9c01U
-#define MASK_C_SUBW                0xfc63U
-#define MATCH_C_ADDW               0x9c21U
-#define MASK_C_ADDW                0xfc63U
-#define MATCH_C_J                  0xa001U
-#define MASK_C_J                   0xe003U
-#define MATCH_C_BEQZ               0xc001U
-#define MASK_C_BEQZ                0xe003U
-#define MATCH_C_BNEZ               0xe001U
-#define MASK_C_BNEZ                0xe003U
-#define MATCH_C_SLLI               0x2U
-#define MASK_C_SLLI                0xe003U
-#define MATCH_C_FLDSP              0x2002U
-#define MASK_C_FLDSP               0xe003U
-#define MATCH_C_LWSP               0x4002U
-#define MASK_C_LWSP                0xe003U
-#define MATCH_C_FLWSP              0x6002U
-#define MASK_C_FLWSP               0xe003U
-#define MATCH_C_MV                 0x8002U
-#define MASK_C_MV                  0xf003U
-#define MATCH_C_ADD                0x9002U
-#define MASK_C_ADD                 0xf003U
-#define MATCH_C_FSDSP              0xa002U
-#define MASK_C_FSDSP               0xe003U
-#define MATCH_C_SWSP               0xc002U
-#define MASK_C_SWSP                0xe003U
-#define MATCH_C_FSWSP              0xe002U
-#define MASK_C_FSWSP               0xe003U
-#define MATCH_CUSTOM0              0xbU
-#define MASK_CUSTOM0               0x707fU
-#define MATCH_CUSTOM0_RS1          0x200bU
-#define MASK_CUSTOM0_RS1           0x707fU
-#define MATCH_CUSTOM0_RS1_RS2      0x300bU
-#define MASK_CUSTOM0_RS1_RS2       0x707fU
-#define MATCH_CUSTOM0_RD           0x400bU
-#define MASK_CUSTOM0_RD            0x707fU
-#define MATCH_CUSTOM0_RD_RS1       0x600bU
-#define MASK_CUSTOM0_RD_RS1        0x707fU
-#define MATCH_CUSTOM0_RD_RS1_RS2   0x700bU
-#define MASK_CUSTOM0_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM1              0x2bU
-#define MASK_CUSTOM1               0x707fU
-#define MATCH_CUSTOM1_RS1          0x202bU
-#define MASK_CUSTOM1_RS1           0x707fU
-#define MATCH_CUSTOM1_RS1_RS2      0x302bU
-#define MASK_CUSTOM1_RS1_RS2       0x707fU
-#define MATCH_CUSTOM1_RD           0x402bU
-#define MASK_CUSTOM1_RD            0x707fU
-#define MATCH_CUSTOM1_RD_RS1       0x602bU
-#define MASK_CUSTOM1_RD_RS1        0x707fU
-#define MATCH_CUSTOM1_RD_RS1_RS2   0x702bU
-#define MASK_CUSTOM1_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM2              0x5bU
-#define MASK_CUSTOM2               0x707fU
-#define MATCH_CUSTOM2_RS1          0x205bU
-#define MASK_CUSTOM2_RS1           0x707fU
-#define MATCH_CUSTOM2_RS1_RS2      0x305bU
-#define MASK_CUSTOM2_RS1_RS2       0x707fU
-#define MATCH_CUSTOM2_RD           0x405bU
-#define MASK_CUSTOM2_RD            0x707fU
-#define MATCH_CUSTOM2_RD_RS1       0x605bU
-#define MASK_CUSTOM2_RD_RS1        0x707fU
-#define MATCH_CUSTOM2_RD_RS1_RS2   0x705bU
-#define MASK_CUSTOM2_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM3              0x7bU
-#define MASK_CUSTOM3               0x707fU
-#define MATCH_CUSTOM3_RS1          0x207bU
-#define MASK_CUSTOM3_RS1           0x707fU
-#define MATCH_CUSTOM3_RS1_RS2      0x307bU
-#define MASK_CUSTOM3_RS1_RS2       0x707fU
-#define MATCH_CUSTOM3_RD           0x407bU
-#define MASK_CUSTOM3_RD            0x707fU
-#define MATCH_CUSTOM3_RD_RS1       0x607bU
-#define MASK_CUSTOM3_RD_RS1        0x707fU
-#define MATCH_CUSTOM3_RD_RS1_RS2   0x707bU
-#define MASK_CUSTOM3_RD_RS1_RS2    0x707fU
-#define CSR_FFLAGS                 0x1U
-#define CSR_FRM                    0x2U
-#define CSR_FCSR                   0x3U
-#define CSR_CYCLE                  0xc00U
-#define CSR_TIME                   0xc01U
-#define CSR_INSTRET                0xc02U
-#define CSR_HPMCOUNTER3            0xc03U
-#define CSR_HPMCOUNTER4            0xc04U
-#define CSR_HPMCOUNTER5            0xc05U
-#define CSR_HPMCOUNTER6            0xc06U
-#define CSR_HPMCOUNTER7            0xc07U
-#define CSR_HPMCOUNTER8            0xc08U
-#define CSR_HPMCOUNTER9            0xc09U
-#define CSR_HPMCOUNTER10           0xc0aU
-#define CSR_HPMCOUNTER11           0xc0bU
-#define CSR_HPMCOUNTER12           0xc0cU
-#define CSR_HPMCOUNTER13           0xc0dU
-#define CSR_HPMCOUNTER14           0xc0eU
-#define CSR_HPMCOUNTER15           0xc0fU
-#define CSR_HPMCOUNTER16           0xc10U
-#define CSR_HPMCOUNTER17           0xc11U
-#define CSR_HPMCOUNTER18           0xc12U
-#define CSR_HPMCOUNTER19           0xc13U
-#define CSR_HPMCOUNTER20           0xc14U
-#define CSR_HPMCOUNTER21           0xc15U
-#define CSR_HPMCOUNTER22           0xc16U
-#define CSR_HPMCOUNTER23           0xc17U
-#define CSR_HPMCOUNTER24           0xc18U
-#define CSR_HPMCOUNTER25           0xc19U
-#define CSR_HPMCOUNTER26           0xc1aU
-#define CSR_HPMCOUNTER27           0xc1bU
-#define CSR_HPMCOUNTER28           0xc1cU
-#define CSR_HPMCOUNTER29           0xc1dU
-#define CSR_HPMCOUNTER30           0xc1eU
-#define CSR_HPMCOUNTER31           0xc1fU
-#define CSR_SSTATUS                0x100U
-#define CSR_SIE                    0x104U
-#define CSR_STVEC                  0x105U
-#define CSR_SSCRATCH               0x140U
-#define CSR_SEPC                   0x141U
-#define CSR_SCAUSE                 0x142U
-#define CSR_SBADADDR               0x143U
-#define CSR_SIP                    0x144U
-#define CSR_SPTBR                  0x180U
-#define CSR_MSTATUS                0x300U
-#define CSR_MISA                   0x301U
-#define CSR_MEDELEG                0x302U
-#define CSR_MIDELEG                0x303U
-#define CSR_MIE                    0x304U
-#define CSR_MTVEC                  0x305U
-#define CSR_MSCRATCH               0x340U
-#define CSR_MEPC                   0x341U
-#define CSR_MCAUSE                 0x342U
-#define CSR_MBADADDR               0x343U
-#define CSR_MIP                    0x344U
-#define CSR_TSELECT                0x7a0U
-#define CSR_TDATA1                 0x7a1U
-#define CSR_TDATA2                 0x7a2U
-#define CSR_TDATA3                 0x7a3U
-#define CSR_DCSR                   0x7b0U
-#define CSR_DPC                    0x7b1U
-#define CSR_DSCRATCH               0x7b2U
-#define CSR_MCYCLE                 0xb00U
-#define CSR_MINSTRET               0xb02U
-#define CSR_MHPMCOUNTER3           0xb03U
-#define CSR_MHPMCOUNTER4           0xb04U
-#define CSR_MHPMCOUNTER5           0xb05U
-#define CSR_MHPMCOUNTER6           0xb06U
-#define CSR_MHPMCOUNTER7           0xb07U
-#define CSR_MHPMCOUNTER8           0xb08U
-#define CSR_MHPMCOUNTER9           0xb09U
-#define CSR_MHPMCOUNTER10          0xb0aU
-#define CSR_MHPMCOUNTER11          0xb0bU
-#define CSR_MHPMCOUNTER12          0xb0cU
-#define CSR_MHPMCOUNTER13          0xb0dU
-#define CSR_MHPMCOUNTER14          0xb0eU
-#define CSR_MHPMCOUNTER15          0xb0fU
-#define CSR_MHPMCOUNTER16          0xb10U
-#define CSR_MHPMCOUNTER17          0xb11U
-#define CSR_MHPMCOUNTER18          0xb12U
-#define CSR_MHPMCOUNTER19          0xb13U
-#define CSR_MHPMCOUNTER20          0xb14U
-#define CSR_MHPMCOUNTER21          0xb15U
-#define CSR_MHPMCOUNTER22          0xb16U
-#define CSR_MHPMCOUNTER23          0xb17U
-#define CSR_MHPMCOUNTER24          0xb18U
-#define CSR_MHPMCOUNTER25          0xb19U
-#define CSR_MHPMCOUNTER26          0xb1aU
-#define CSR_MHPMCOUNTER27          0xb1bU
-#define CSR_MHPMCOUNTER28          0xb1cU
-#define CSR_MHPMCOUNTER29          0xb1dU
-#define CSR_MHPMCOUNTER30          0xb1eU
-#define CSR_MHPMCOUNTER31          0xb1fU
-#define CSR_MUCOUNTEREN            0x320U
-#define CSR_MSCOUNTEREN            0x321U
-#define CSR_MHPMEVENT3             0x323U
-#define CSR_MHPMEVENT4             0x324U
-#define CSR_MHPMEVENT5             0x325U
-#define CSR_MHPMEVENT6             0x326U
-#define CSR_MHPMEVENT7             0x327U
-#define CSR_MHPMEVENT8             0x328U
-#define CSR_MHPMEVENT9             0x329U
-#define CSR_MHPMEVENT10            0x32aU
-#define CSR_MHPMEVENT11            0x32bU
-#define CSR_MHPMEVENT12            0x32cU
-#define CSR_MHPMEVENT13            0x32dU
-#define CSR_MHPMEVENT14            0x32eU
-#define CSR_MHPMEVENT15            0x32fU
-#define CSR_MHPMEVENT16            0x330U
-#define CSR_MHPMEVENT17            0x331U
-#define CSR_MHPMEVENT18            0x332U
-#define CSR_MHPMEVENT19            0x333U
-#define CSR_MHPMEVENT20            0x334U
-#define CSR_MHPMEVENT21            0x335U
-#define CSR_MHPMEVENT22            0x336U
-#define CSR_MHPMEVENT23            0x337U
-#define CSR_MHPMEVENT24            0x338U
-#define CSR_MHPMEVENT25            0x339U
-#define CSR_MHPMEVENT26            0x33aU
-#define CSR_MHPMEVENT27            0x33bU
-#define CSR_MHPMEVENT28            0x33cU
-#define CSR_MHPMEVENT29            0x33dU
-#define CSR_MHPMEVENT30            0x33eU
-#define CSR_MHPMEVENT31            0x33fU
-#define CSR_MVENDORID              0xf11U
-#define CSR_MARCHID                0xf12U
-#define CSR_MIMPID                 0xf13U
-#define CSR_MHARTID                0xf14U
-#define CSR_CYCLEH                 0xc80U
-#define CSR_TIMEH                  0xc81U
-#define CSR_INSTRETH               0xc82U
-#define CSR_HPMCOUNTER3H           0xc83U
-#define CSR_HPMCOUNTER4H           0xc84U
-#define CSR_HPMCOUNTER5H           0xc85U
-#define CSR_HPMCOUNTER6H           0xc86U
-#define CSR_HPMCOUNTER7H           0xc87U
-#define CSR_HPMCOUNTER8H           0xc88U
-#define CSR_HPMCOUNTER9H           0xc89U
-#define CSR_HPMCOUNTER10H          0xc8aU
-#define CSR_HPMCOUNTER11H          0xc8bU
-#define CSR_HPMCOUNTER12H          0xc8cU
-#define CSR_HPMCOUNTER13H          0xc8dU
-#define CSR_HPMCOUNTER14H          0xc8eU
-#define CSR_HPMCOUNTER15H          0xc8fU
-#define CSR_HPMCOUNTER16H          0xc90U
-#define CSR_HPMCOUNTER17H          0xc91U
-#define CSR_HPMCOUNTER18H          0xc92U
-#define CSR_HPMCOUNTER19H          0xc93U
-#define CSR_HPMCOUNTER20H          0xc94U
-#define CSR_HPMCOUNTER21H          0xc95U
-#define CSR_HPMCOUNTER22H          0xc96U
-#define CSR_HPMCOUNTER23H          0xc97U
-#define CSR_HPMCOUNTER24H          0xc98U
-#define CSR_HPMCOUNTER25H          0xc99U
-#define CSR_HPMCOUNTER26H          0xc9aU
-#define CSR_HPMCOUNTER27H          0xc9bU
-#define CSR_HPMCOUNTER28H          0xc9cU
-#define CSR_HPMCOUNTER29H          0xc9dU
-#define CSR_HPMCOUNTER30H          0xc9eU
-#define CSR_HPMCOUNTER31H          0xc9fU
-#define CSR_MCYCLEH                0xb80U
-#define CSR_MINSTRETH              0xb82U
-#define CSR_MHPMCOUNTER3H          0xb83U
-#define CSR_MHPMCOUNTER4H          0xb84U
-#define CSR_MHPMCOUNTER5H          0xb85U
-#define CSR_MHPMCOUNTER6H          0xb86U
-#define CSR_MHPMCOUNTER7H          0xb87U
-#define CSR_MHPMCOUNTER8H          0xb88U
-#define CSR_MHPMCOUNTER9H          0xb89U
-#define CSR_MHPMCOUNTER10H         0xb8aU
-#define CSR_MHPMCOUNTER11H         0xb8bU
-#define CSR_MHPMCOUNTER12H         0xb8cU
-#define CSR_MHPMCOUNTER13H         0xb8dU
-#define CSR_MHPMCOUNTER14H         0xb8eU
-#define CSR_MHPMCOUNTER15H         0xb8fU
-#define CSR_MHPMCOUNTER16H         0xb90U
-#define CSR_MHPMCOUNTER17H         0xb91U
-#define CSR_MHPMCOUNTER18H         0xb92U
-#define CSR_MHPMCOUNTER19H         0xb93U
-#define CSR_MHPMCOUNTER20H         0xb94U
-#define CSR_MHPMCOUNTER21H         0xb95U
-#define CSR_MHPMCOUNTER22H         0xb96U
-#define CSR_MHPMCOUNTER23H         0xb97U
-#define CSR_MHPMCOUNTER24H         0xb98U
-#define CSR_MHPMCOUNTER25H         0xb99U
-#define CSR_MHPMCOUNTER26H         0xb9aU
-#define CSR_MHPMCOUNTER27H         0xb9bU
-#define CSR_MHPMCOUNTER28H         0xb9cU
-#define CSR_MHPMCOUNTER29H         0xb9dU
-#define CSR_MHPMCOUNTER30H         0xb9eU
-#define CSR_MHPMCOUNTER31H         0xb9fU
-#define CAUSE_MISALIGNED_FETCH     0x0
-#define CAUSE_FAULT_FETCH          0x1
-#define CAUSE_ILLEGAL_INSTRUCTION  0x2
-#define CAUSE_BREAKPOINT           0x3
-#define CAUSE_MISALIGNED_LOAD      0x4
-#define CAUSE_FAULT_LOAD           0x5
-#define CAUSE_MISALIGNED_STORE     0x6
-#define CAUSE_FAULT_STORE          0x7
-#define CAUSE_USER_ECALL           0x8
-#define CAUSE_SUPERVISOR_ECALL     0x9
-#define CAUSE_HYPERVISOR_ECALL     0xa
-#define CAUSE_MACHINE_ECALL        0xb
-#endif
-#if defined(DECLARE_INSN)
-DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
-DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
-DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
-DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
-DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
-DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
-DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
-DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
-DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
-DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
-DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
-DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
-DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI)
-DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
-DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
-DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
-DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
-DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
-DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
-DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
-DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
-DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
-DECLARE_INSN(slt, MATCH_SLT, MASK_SLT)
-DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
-DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
-DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
-DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
-DECLARE_INSN(or, MATCH_OR, MASK_OR)
-DECLARE_INSN(and, MATCH_AND, MASK_AND)
-DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
-DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
-DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
-DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
-DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
-DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
-DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
-DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
-DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
-DECLARE_INSN(lb, MATCH_LB, MASK_LB)
-DECLARE_INSN(lh, MATCH_LH, MASK_LH)
-DECLARE_INSN(lw, MATCH_LW, MASK_LW)
-DECLARE_INSN(ld, MATCH_LD, MASK_LD)
-DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
-DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
-DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
-DECLARE_INSN(sb, MATCH_SB, MASK_SB)
-DECLARE_INSN(sh, MATCH_SH, MASK_SH)
-DECLARE_INSN(sw, MATCH_SW, MASK_SW)
-DECLARE_INSN(sd, MATCH_SD, MASK_SD)
-DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
-DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
-DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
-DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
-DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
-DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
-DECLARE_INSN(div, MATCH_DIV, MASK_DIV)
-DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU)
-DECLARE_INSN(rem, MATCH_REM, MASK_REM)
-DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
-DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW)
-DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
-DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
-DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
-DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
-DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
-DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
-DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
-DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
-DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W)
-DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W)
-DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W)
-DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W)
-DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W)
-DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
-DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
-DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D)
-DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
-DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D)
-DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
-DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D)
-DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
-DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
-DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
-DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
-DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
-DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
-DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
-DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
-DECLARE_INSN(uret, MATCH_URET, MASK_URET)
-DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
-DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
-DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
-DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
-DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
-DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
-DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
-DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
-DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
-DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
-DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
-DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
-DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
-DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
-DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
-DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S)
-DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S)
-DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S)
-DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
-DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
-DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
-DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
-DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
-DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
-DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D)
-DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D)
-DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D)
-DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
-DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D)
-DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
-DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
-DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
-DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
-DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
-DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
-DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S)
-DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
-DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
-DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
-DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
-DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S)
-DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S)
-DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S)
-DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S)
-DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S)
-DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
-DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D)
-DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
-DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
-DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
-DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
-DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
-DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
-DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU)
-DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L)
-DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU)
-DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
-DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
-DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
-DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
-DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
-DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
-DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
-DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
-DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
-DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
-DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S)
-DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S)
-DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S)
-DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S)
-DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
-DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
-DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
-DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
-DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
-DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
-DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
-DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
-DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
-DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
-DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
-DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
-DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
-DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
-DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN)
-DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD)
-DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
-DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW)
-DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD)
-DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW)
-DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW)
-DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI)
-DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL)
-DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
-DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
-DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
-DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
-DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI)
-DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
-DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR)
-DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
-DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND)
-DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
-DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW)
-DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J)
-DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ)
-DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
-DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
-DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP)
-DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
-DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP)
-DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
-DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD)
-DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP)
-DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP)
-DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP)
-DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0)
-DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1)
-DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2)
-DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD)
-DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1)
-DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, MASK_CUSTOM0_RD_RS1_RS2)
-DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1)
-DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1)
-DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2)
-DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD)
-DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1)
-DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, MASK_CUSTOM1_RD_RS1_RS2)
-DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2)
-DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1)
-DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2)
-DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD)
-DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1)
-DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, MASK_CUSTOM2_RD_RS1_RS2)
-DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3)
-DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1)
-DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2)
-DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD)
-DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
-DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
-#endif
-#if defined(DECLARE_CSR)
-DECLARE_CSR(fflags, CSR_FFLAGS)
-DECLARE_CSR(frm, CSR_FRM)
-DECLARE_CSR(fcsr, CSR_FCSR)
-DECLARE_CSR(cycle, CSR_CYCLE)
-DECLARE_CSR(time, CSR_TIME)
-DECLARE_CSR(instret, CSR_INSTRET)
-DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3)
-DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4)
-DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5)
-DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6)
-DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7)
-DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8)
-DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9)
-DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10)
-DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11)
-DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)
-DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13)
-DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14)
-DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)
-DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16)
-DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)
-DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18)
-DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19)
-DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20)
-DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21)
-DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22)
-DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23)
-DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)
-DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25)
-DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26)
-DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27)
-DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28)
-DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)
-DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30)
-DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
-DECLARE_CSR(sstatus, CSR_SSTATUS)
-DECLARE_CSR(sie, CSR_SIE)
-DECLARE_CSR(stvec, CSR_STVEC)
-DECLARE_CSR(sscratch, CSR_SSCRATCH)
-DECLARE_CSR(sepc, CSR_SEPC)
-DECLARE_CSR(scause, CSR_SCAUSE)
-DECLARE_CSR(sbadaddr, CSR_SBADADDR)
-DECLARE_CSR(sip, CSR_SIP)
-DECLARE_CSR(sptbr, CSR_SPTBR)
-DECLARE_CSR(mstatus, CSR_MSTATUS)
-DECLARE_CSR(misa, CSR_MISA)
-DECLARE_CSR(medeleg, CSR_MEDELEG)
-DECLARE_CSR(mideleg, CSR_MIDELEG)
-DECLARE_CSR(mie, CSR_MIE)
-DECLARE_CSR(mtvec, CSR_MTVEC)
-DECLARE_CSR(mscratch, CSR_MSCRATCH)
-DECLARE_CSR(mepc, CSR_MEPC)
-DECLARE_CSR(mcause, CSR_MCAUSE)
-DECLARE_CSR(mbadaddr, CSR_MBADADDR)
-DECLARE_CSR(mip, CSR_MIP)
-DECLARE_CSR(tselect, CSR_TSELECT)
-DECLARE_CSR(tdata1, CSR_TDATA1)
-DECLARE_CSR(tdata2, CSR_TDATA2)
-DECLARE_CSR(tdata3, CSR_TDATA3)
-DECLARE_CSR(dcsr, CSR_DCSR)
-DECLARE_CSR(dpc, CSR_DPC)
-DECLARE_CSR(dscratch, CSR_DSCRATCH)
-DECLARE_CSR(mcycle, CSR_MCYCLE)
-DECLARE_CSR(minstret, CSR_MINSTRET)
-DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3)
-DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4)
-DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5)
-DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6)
-DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7)
-DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8)
-DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9)
-DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10)
-DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11)
-DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)
-DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13)
-DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)
-DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15)
-DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)
-DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)
-DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18)
-DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19)
-DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)
-DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21)
-DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22)
-DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23)
-DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24)
-DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25)
-DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26)
-DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27)
-DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28)
-DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)
-DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30)
-DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31)
-DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN)
-DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN)
-DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3)
-DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4)
-DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5)
-DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6)
-DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7)
-DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8)
-DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9)
-DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10)
-DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11)
-DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12)
-DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13)
-DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14)
-DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15)
-DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16)
-DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17)
-DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18)
-DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)
-DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20)
-DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21)
-DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22)
-DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)
-DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24)
-DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25)
-DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26)
-DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27)
-DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28)
-DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29)
-DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30)
-DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31)
-DECLARE_CSR(mvendorid, CSR_MVENDORID)
-DECLARE_CSR(marchid, CSR_MARCHID)
-DECLARE_CSR(mimpid, CSR_MIMPID)
-DECLARE_CSR(mhartid, CSR_MHARTID)
-DECLARE_CSR(cycleh, CSR_CYCLEH)
-DECLARE_CSR(timeh, CSR_TIMEH)
-DECLARE_CSR(instreth, CSR_INSTRETH)
-DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H)
-DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H)
-DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H)
-DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H)
-DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H)
-DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H)
-DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H)
-DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H)
-DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H)
-DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H)
-DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H)
-DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H)
-DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H)
-DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H)
-DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H)
-DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H)
-DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H)
-DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H)
-DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H)
-DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H)
-DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H)
-DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H)
-DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H)
-DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H)
-DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H)
-DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H)
-DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H)
-DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H)
-DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H)
-DECLARE_CSR(mcycleh, CSR_MCYCLEH)
-DECLARE_CSR(minstreth, CSR_MINSTRETH)
-DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H)
-DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H)
-DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H)
-DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H)
-DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H)
-DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H)
-DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H)
-DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H)
-DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H)
-DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H)
-DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H)
-DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H)
-DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H)
-DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H)
-DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H)
-DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H)
-DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H)
-DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H)
-DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H)
-DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H)
-DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H)
-DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H)
-DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H)
-DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H)
-DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H)
-DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
-DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
-DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
-DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
-#endif
-#if defined(DECLARE_CAUSE)
-DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
-DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH)
-DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION)
-DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT)
-DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD)
-DECLARE_CAUSE("fault load", CAUSE_FAULT_LOAD)
-DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE)
-DECLARE_CAUSE("fault store", CAUSE_FAULT_STORE)
-DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL)
-DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
-DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
-DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
-#endif
+/*
+ * PLIC External Interrupt Numbers
+ */
+enum plic_irq {
+	IRQN_NO_INTERRUPT        = 0, /*!< The non-existent interrupt */
+	IRQN_SPI0_INTERRUPT      = 1, /*!< SPI0 interrupt */
+	IRQN_SPI1_INTERRUPT      = 2, /*!< SPI1 interrupt */
+	IRQN_SPI_SLAVE_INTERRUPT = 3, /*!< SPI_SLAVE interrupt */
+	IRQN_SPI3_INTERRUPT      = 4, /*!< SPI3 interrupt */
+	IRQN_I2S0_INTERRUPT      = 5, /*!< I2S0 interrupt */
+	IRQN_I2S1_INTERRUPT      = 6, /*!< I2S1 interrupt */
+	IRQN_I2S2_INTERRUPT      = 7, /*!< I2S2 interrupt */
+	IRQN_I2C0_INTERRUPT      = 8, /*!< I2C0 interrupt */
+	IRQN_I2C1_INTERRUPT      = 9, /*!< I2C1 interrupt */
+	IRQN_I2C2_INTERRUPT      = 10, /*!< I2C2 interrupt */
+	IRQN_UART1_INTERRUPT     = 11, /*!< UART1 interrupt */
+	IRQN_UART2_INTERRUPT     = 12, /*!< UART2 interrupt */
+	IRQN_UART3_INTERRUPT     = 13, /*!< UART3 interrupt */
+	IRQN_TIMER0A_INTERRUPT   = 14, /*!< TIMER0 channel 0 or 1 interrupt */
+	IRQN_TIMER0B_INTERRUPT   = 15, /*!< TIMER0 channel 2 or 3 interrupt */
+	IRQN_TIMER1A_INTERRUPT   = 16, /*!< TIMER1 channel 0 or 1 interrupt */
+	IRQN_TIMER1B_INTERRUPT   = 17, /*!< TIMER1 channel 2 or 3 interrupt */
+	IRQN_TIMER2A_INTERRUPT   = 18, /*!< TIMER2 channel 0 or 1 interrupt */
+	IRQN_TIMER2B_INTERRUPT   = 19, /*!< TIMER2 channel 2 or 3 interrupt */
+	IRQN_RTC_INTERRUPT       = 20, /*!< RTC tick and alarm interrupt */
+	IRQN_WDT0_INTERRUPT      = 21, /*!< Watching dog timer0 interrupt */
+	IRQN_WDT1_INTERRUPT      = 22, /*!< Watching dog timer1 interrupt */
+	IRQN_APB_GPIO_INTERRUPT  = 23, /*!< APB GPIO interrupt */
+	IRQN_DVP_INTERRUPT       = 24, /*!< Digital video port interrupt */
+	IRQN_AI_INTERRUPT        = 25, /*!< AI accelerator interrupt */
+	IRQN_FFT_INTERRUPT       = 26, /*!< FFT accelerator interrupt */
+	IRQN_DMA0_INTERRUPT      = 27, /*!< DMA channel0 interrupt */
+	IRQN_DMA1_INTERRUPT      = 28, /*!< DMA channel1 interrupt */
+	IRQN_DMA2_INTERRUPT      = 29, /*!< DMA channel2 interrupt */
+	IRQN_DMA3_INTERRUPT      = 30, /*!< DMA channel3 interrupt */
+	IRQN_DMA4_INTERRUPT      = 31, /*!< DMA channel4 interrupt */
+	IRQN_DMA5_INTERRUPT      = 32, /*!< DMA channel5 interrupt */
+	IRQN_UARTHS_INTERRUPT    = 33, /*!< Hi-speed UART0 interrupt */
+	IRQN_GPIOHS0_INTERRUPT   = 34, /*!< Hi-speed GPIO0 interrupt */
+	IRQN_GPIOHS1_INTERRUPT   = 35, /*!< Hi-speed GPIO1 interrupt */
+	IRQN_GPIOHS2_INTERRUPT   = 36, /*!< Hi-speed GPIO2 interrupt */
+	IRQN_GPIOHS3_INTERRUPT   = 37, /*!< Hi-speed GPIO3 interrupt */
+	IRQN_GPIOHS4_INTERRUPT   = 38, /*!< Hi-speed GPIO4 interrupt */
+	IRQN_GPIOHS5_INTERRUPT   = 39, /*!< Hi-speed GPIO5 interrupt */
+	IRQN_GPIOHS6_INTERRUPT   = 40, /*!< Hi-speed GPIO6 interrupt */
+	IRQN_GPIOHS7_INTERRUPT   = 41, /*!< Hi-speed GPIO7 interrupt */
+	IRQN_GPIOHS8_INTERRUPT   = 42, /*!< Hi-speed GPIO8 interrupt */
+	IRQN_GPIOHS9_INTERRUPT   = 43, /*!< Hi-speed GPIO9 interrupt */
+	IRQN_GPIOHS10_INTERRUPT  = 44, /*!< Hi-speed GPIO10 interrupt */
+	IRQN_GPIOHS11_INTERRUPT  = 45, /*!< Hi-speed GPIO11 interrupt */
+	IRQN_GPIOHS12_INTERRUPT  = 46, /*!< Hi-speed GPIO12 interrupt */
+	IRQN_GPIOHS13_INTERRUPT  = 47, /*!< Hi-speed GPIO13 interrupt */
+	IRQN_GPIOHS14_INTERRUPT  = 48, /*!< Hi-speed GPIO14 interrupt */
+	IRQN_GPIOHS15_INTERRUPT  = 49, /*!< Hi-speed GPIO15 interrupt */
+	IRQN_GPIOHS16_INTERRUPT  = 50, /*!< Hi-speed GPIO16 interrupt */
+	IRQN_GPIOHS17_INTERRUPT  = 51, /*!< Hi-speed GPIO17 interrupt */
+	IRQN_GPIOHS18_INTERRUPT  = 52, /*!< Hi-speed GPIO18 interrupt */
+	IRQN_GPIOHS19_INTERRUPT  = 53, /*!< Hi-speed GPIO19 interrupt */
+	IRQN_GPIOHS20_INTERRUPT  = 54, /*!< Hi-speed GPIO20 interrupt */
+	IRQN_GPIOHS21_INTERRUPT  = 55, /*!< Hi-speed GPIO21 interrupt */
+	IRQN_GPIOHS22_INTERRUPT  = 56, /*!< Hi-speed GPIO22 interrupt */
+	IRQN_GPIOHS23_INTERRUPT  = 57, /*!< Hi-speed GPIO23 interrupt */
+	IRQN_GPIOHS24_INTERRUPT  = 58, /*!< Hi-speed GPIO24 interrupt */
+	IRQN_GPIOHS25_INTERRUPT  = 59, /*!< Hi-speed GPIO25 interrupt */
+	IRQN_GPIOHS26_INTERRUPT  = 60, /*!< Hi-speed GPIO26 interrupt */
+	IRQN_GPIOHS27_INTERRUPT  = 61, /*!< Hi-speed GPIO27 interrupt */
+	IRQN_GPIOHS28_INTERRUPT  = 62, /*!< Hi-speed GPIO28 interrupt */
+	IRQN_GPIOHS29_INTERRUPT  = 63, /*!< Hi-speed GPIO29 interrupt */
+	IRQN_GPIOHS30_INTERRUPT  = 64, /*!< Hi-speed GPIO30 interrupt */
+	IRQN_GPIOHS31_INTERRUPT  = 65, /*!< Hi-speed GPIO31 interrupt */
+	IRQN_MAX
+};
+
+/* IRQ number settings */
+#define PLIC_NUM_SOURCES    (IRQN_MAX - 1)
+#define PLIC_NUM_PRIORITIES (7)
 
-#endif /* if 0 */
+#endif /* _PLATFORM_H_ */
 
diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index c19859d3ec2..3e855a58833 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -973,10 +973,12 @@ u32 sysctl_pll_get_freq(sysctl_pll_t pll)
 	/*
 	 * Get final PLL output freq
 	 * FOUT = FIN / NR * NF / OD
+	 *      = (FIN * NF) / (NR * OD)
 	 */
-	return (double)freq_in / (double)nr * (double)nf / (double)od;
+	return ((u64)freq_in * (u64)nf) / ((u64)nr * (u64)od);
 }
 
+#if 0
 static u32 sysctl_pll_source_set_freq(sysctl_pll_t pll,
 				      sysctl_clock_source_t source, u32 freq)
 {
@@ -1229,6 +1231,7 @@ static u32 sysctl_pll_source_set_freq(sysctl_pll_t pll,
 
 	return sysctl_pll_get_freq(pll);
 }
+#endif
 
 u32 sysctl_clock_get_freq(sysctl_clock_t clock)
 {
@@ -1683,6 +1686,7 @@ void sysctl_set_power_mode(sysctl_power_bank_t power_bank, sysctl_io_power_mode_
 		*((u32 *)(&sysctl->power_sel)) &= ~(1 << power_bank);
 }
 
+#if 0
 u32 sysctl_pll_set_freq(sysctl_pll_t pll, u32 pll_freq)
 {
 	u32 result;
@@ -1755,6 +1759,7 @@ u32 sysctl_cpu_set_freq(u32 freq)
 
 	return sysctl_pll_set_freq(SYSCTL_PLL0, (sysctl->clk_sel0.aclk_divider_sel + 1) * 2 * freq);
 }
+#endif
 
 void sysctl_enable_irq(void)
 {
diff --git a/platform/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
index 1fba1c5b318..09d81aeca8d 100644
--- a/platform/kendryte/k210/sysctl.h
+++ b/platform/kendryte/k210/sysctl.h
@@ -12,8 +12,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-#ifndef _SYSCTL_H_
-#define _SYSCTL_H_
+#ifndef _K210_SYSCTL_H_
+#define _K210_SYSCTL_H_
 
 #include <sbi/sbi_types.h>
 #include "platform.h"
@@ -942,4 +942,4 @@ u64 sysctl_get_time_us(void);
 
 void sysctl_usleep(u64 usec);
 
-#endif /* _SYSCTL_H_ */
+#endif /* _K210_SYSCTL_H_ */
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index 1d07ad07f95..6551de76e37 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -31,9 +31,9 @@ void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
 	uarths->rxctrl.rxen = 1;
 	uarths->txctrl.txcnt = 0;
 	uarths->rxctrl.rxcnt = 0;
-	uarths->ip.txwm = 0;
+	uarths->ip.txwm = 1;
 	uarths->ip.rxwm = 0;
-	uarths->ie.txwm = 0;
+	uarths->ie.txwm = 1;
 	uarths->ie.rxwm = 0;
 }
 
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
index ab539cdf874..dd0433cf7cc 100644
--- a/platform/kendryte/k210/uarths.h
+++ b/platform/kendryte/k210/uarths.h
@@ -41,11 +41,13 @@
  * | 0x018     | div      | Baud rate divisor               |
  */
 
-#ifndef _UARTHS_H_
-#define _UARTHS_H_
+#ifndef _K210_UARTHS_H_
+#define _K210_UARTHS_H_
 
 #include <sbi/sbi_types.h>
-#include "platform.h"
+
+/* Base register address */
+#define UARTHS_BASE_ADDR	(0x38000000U)
 
 /* Register address offsets */
 #define UARTHS_REG_TXFIFO	0x00
@@ -152,12 +154,6 @@ struct uarths {
 	struct uarths_div div;
 } __attribute__((packed, aligned(4)));
 
-enum uarths_interrupt_mode {
-	UARTHS_SEND = 1,
-	UARTHS_RECEIVE = 2,
-	UARTHS_SEND_RECEIVE = 3,
-};
-
 enum uarths_stopbit {
 	UARTHS_STOP_1,
 	UARTHS_STOP_2
@@ -167,4 +163,4 @@ void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit);
 void uarths_putc(char c);
 char uarths_getc(void);
 
-#endif /* _UARTHS_H_ */
+#endif /* _K210_UARTHS_H_ */

From 4fb23c49ebbb012955ba7128d1dc742adb8d85b5 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 16:35:33 +0900
Subject: [PATCH 0015/1765] Fiw comment typo

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 firmware/fw_common.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index afe14a1bc81..d7074f8bc77 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -129,7 +129,7 @@ _start_warm:
 	/* set MSIE bit to receive IPI */
 	li	a2, MIP_MSIP
 	csrw	mie, a2
-	/* HART ID should be withing expected limit */
+	/* HART ID should be within expected limit */
 	csrr	a6, mhartid
 	li	a5, PLAT_HART_COUNT
 	bge	a6, a5, _start_hang

From 426adf9f6025fe70470476166db63ea7c0c1514b Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 16:44:53 +0900
Subject: [PATCH 0016/1765] Cleanup and rename sbi_hart_boot_next()

Cleanup sbi_hart_boot_nexti() code, adding messages for clarity and
rename the function to sbi_hart_switch_mode() to reflect what the
function actually does.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 include/sbi/sbi_hart.h |  8 ++++----
 lib/sbi_hart.c         | 35 +++++++++++++++++++++++++----------
 lib/sbi_init.c         |  8 ++++----
 3 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 90161f0be69..e369779d869 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -20,10 +20,10 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
-void __attribute__((noreturn)) sbi_hart_boot_next(unsigned long arg0,
-						  unsigned long arg1,
-						  unsigned long next_addr,
-						  unsigned long next_mode);
+void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
+						    unsigned long arg1,
+						    unsigned long next_addr,
+						    unsigned long next_mode);
 
 void sbi_hart_mark_available(u32 hartid);
 
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 12c5c55ba2e..32dcfe41d1c 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -205,37 +205,52 @@ void __attribute__((noreturn)) sbi_hart_hang(void)
 	__builtin_unreachable();
 }
 
-void __attribute__((noreturn)) sbi_hart_boot_next(unsigned long arg0,
-					     unsigned long arg1,
-					     unsigned long next_addr,
-					     unsigned long next_mode)
+void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
+						    unsigned long arg1,
+						    unsigned long next_addr,
+						    unsigned long next_mode)
 {
 	unsigned long val;
-
-	if (next_mode != PRV_S && next_mode != PRV_M && next_mode != PRV_U)
-		sbi_hart_hang();
-	if (next_mode == PRV_S && !misa_extension('S'))
-		sbi_hart_hang();
-	if (next_mode == PRV_U && !misa_extension('U'))
+	char mode = 'M';
+
+	switch (next_mode) {
+	case PRV_M:
+		break;
+	case PRV_S:
+		if (!misa_extension('S'))
+			sbi_hart_hang();
+		break;
+	case PRV_U:
+		if (!misa_extension('U'))
+			sbi_hart_hang();
+		break;
+	default:
+		sbi_printf("\nTrying to switch to unsupported mode\n");
 		sbi_hart_hang();
+	}
 
 	val = csr_read(mstatus);
 	val = INSERT_FIELD(val, MSTATUS_MPP, next_mode);
 	val = INSERT_FIELD(val, MSTATUS_MPIE, 0);
+
 	csr_write(mstatus, val);
 	csr_write(mepc, next_addr);
 
 	if (next_mode == PRV_S) {
+		mode = 'S';
 		csr_write(stvec, next_addr);
 		csr_write(sscratch, 0);
 		csr_write(sie, 0);
 		csr_write(satp, 0);
 	} else if (next_mode == PRV_U) {
+		mode = 'U';
 		csr_write(utvec, next_addr);
 		csr_write(uscratch, 0);
 		csr_write(uie, 0);
 	}
 
+	sbi_printf("\nSwitching to %c-mode...\n\n", mode);
+
 	register unsigned long a0 asm ("a0") = arg0;
 	register unsigned long a1 asm ("a1") = arg1;
 	__asm__ __volatile__ ("mret" : : "r" (a0), "r" (a1));
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 72f2c19b233..f8451d18a63 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -111,8 +111,8 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wake_coldboot_harts(scratch, hartid);
 
-	sbi_hart_boot_next(hartid, scratch->next_arg1,
-			   scratch->next_addr, scratch->next_mode);
+	sbi_hart_switch_mode(hartid, scratch->next_arg1,
+			     scratch->next_addr, scratch->next_mode);
 }
 
 static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
@@ -154,8 +154,8 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 		/* TODO: To be implemented in-future. */
 		sbi_hart_hang();
 	else
-		sbi_hart_boot_next(hartid, scratch->next_arg1,
-				   scratch->next_addr, scratch->next_mode);
+		sbi_hart_switch_mode(hartid, scratch->next_arg1,
+				     scratch->next_addr, scratch->next_mode);
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);

From 5563a0335421c3e1d69dc62a1b58675ddf3d1e5b Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 17:06:59 +0900
Subject: [PATCH 0017/1765] Introduce sbi_current_hartid()

Use this helper instead of hardcoding csr_read(mhartid).

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 include/sbi/sbi_hart.h |  2 ++
 lib/sbi_hart.c         | 13 +++++++++++--
 lib/sbi_init.c         |  2 +-
 lib/sbi_trap.c         |  2 +-
 4 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index e369779d869..70416430da9 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -38,4 +38,6 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid);
 
 void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid);
 
+u32 sbi_current_hartid(void);
+
 #endif
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 32dcfe41d1c..09739b922a6 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -17,6 +17,14 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 
+/**
+ * Return HART ID of the caller.
+ */
+unsigned int sbi_current_hartid()
+{
+	return (u32)csr_read(mhartid);
+}
+
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -198,7 +206,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
-	sbi_printf("\nHang !!\n");
+	sbi_printf("\nHART %u Hang !!\n\n", sbi_current_hartid());
 
 	while (1)
 		wfi();
@@ -249,7 +257,8 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 		csr_write(uie, 0);
 	}
 
-	sbi_printf("\nSwitching to %c-mode...\n\n", mode);
+	sbi_printf("HART %u switching to %c-mode...\n\n",
+		   sbi_current_hartid(), mode);
 
 	register unsigned long a0 asm ("a0") = arg0;
 	register unsigned long a1 asm ("a1") = arg1;
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index f8451d18a63..da78a7efe7a 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -163,7 +163,7 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
 void __attribute__((noreturn)) sbi_init(struct sbi_scratch *scratch)
 {
 	bool coldboot = FALSE;
-	u32 hartid = csr_read(mhartid);
+	u32 hartid = sbi_current_hartid();
 
 	if (atomic_add_return(&coldboot_lottery, 1) == 1)
 		coldboot = TRUE;
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index f9c70a63fe9..284bb74f009 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -68,7 +68,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 {
 	int rc;
 	const char *msg;
-	u32 hartid = csr_read(mhartid);
+	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(mcause);
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {

From 07ee5f2e328b7ee3ed57b51f98f2765ae1701a99 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 17:20:56 +0900
Subject: [PATCH 0018/1765] Kendryte-k210: Remove unnecessary asm functions

Use functions defined in sbi/riscv_asm.h.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/platform.h | 37 +++----------------------------
 platform/kendryte/k210/sysctl.c   | 14 ++++++------
 2 files changed, 10 insertions(+), 41 deletions(-)

diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 14a4bbdfba4..6b520cf7b15 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -16,6 +16,8 @@
 #ifndef _PLATFORM_H_
 #define _PLATFORM_H_
 
+#include <sbi/riscv_asm.h>
+
 /* Register base address */
 
 /* Under Coreplex */
@@ -83,40 +85,7 @@
 #define SPI1_BASE_ADDR		(0x53000000U)
 #define SPI3_BASE_ADDR		(0x54000000U)
 
-#define read_csr(reg) ({ unsigned long __tmp; \
-  asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
-  __tmp; })
-
-#define write_csr(reg, val) ({ \
-  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
-	  asm volatile ("csrw " #reg ", %0" :: "i"(val));     \
-  else \
-	  asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
-
-#define swap_csr(reg, val) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
-	  asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
-  else \
-	  asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
-  __tmp; })
-
-#define set_csr(reg, bit) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
-	  asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
-  else \
-	  asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; })
-
-#define clear_csr(reg, bit) ({ unsigned long __tmp; \
-  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
-	  asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
-  else \
-	  asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; })
-
-#define read_time()		read_csr(mtime)
-#define read_cycle()		read_csr(mcycle)
-#define current_coreid()	read_csr(mhartid)
+#define read_cycle()		csr_read(mcycle)
 
 /*
  * PLIC External Interrupt Numbers
diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index 3e855a58833..8039f6e7d06 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -1763,14 +1763,14 @@ u32 sysctl_cpu_set_freq(u32 freq)
 
 void sysctl_enable_irq(void)
 {
-	set_csr(mie, MIP_MEIP);
-	set_csr(mstatus, MSTATUS_MIE);
+	csr_read_set(mie, MIP_MEIP);
+	csr_read_set(mstatus, MSTATUS_MIE);
 }
 
 void sysctl_disable_irq(void)
 {
-	clear_csr(mie, MIP_MEIP);
-	clear_csr(mstatus, MSTATUS_MIE);
+	csr_read_clear(mie, MIP_MEIP);
+	csr_read_clear(mstatus, MSTATUS_MIE);
 }
 
 u64 sysctl_get_time_us(void)
@@ -1782,8 +1782,8 @@ u64 sysctl_get_time_us(void)
 
 void sysctl_usleep(u64 usec)
 {
-    u64 nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
-    u64 cycle = read_cycle();
+	u64 nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
+	u64 cycle = read_cycle();
 
-    while (read_cycle() - cycle < nop_all);
+	while (read_cycle() - cycle < nop_all);
 }

From e1e8f1813080958ed3547e0cd03f940859f20a60 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 18:12:58 +0900
Subject: [PATCH 0019/1765] console: protect output with a spinlock

Avoid getting messages from multiple harts mingled into garbage text
with a spinlock serializing calls to sbi_puts() and sbi_printf().

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_console.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index 3d17340a6f1..6923b9a7247 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -9,8 +9,10 @@
 
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_console.h>
+#include <sbi/riscv_locks.h>
 
 static struct sbi_platform *console_plat = NULL;
+static spinlock_t console_out_lock = SPIN_LOCK_INITIALIZER;
 
 bool sbi_isprintable(char c)
 {
@@ -38,28 +40,24 @@ void sbi_putc(char ch)
 
 void sbi_puts(const char *str)
 {
+	spin_lock(&console_out_lock);
 	while (*str) {
 		sbi_putc(*str);
 		str++;
 	}
+	spin_unlock(&console_out_lock);
 }
 
 void sbi_gets(char *s, int maxwidth, char endchar)
 {
-	char *retval;
-	char ch;
-	retval = s;
-	ch = sbi_getc();
-	while (ch != endchar && maxwidth > 0) {
+	char ch, *retval = s;
+
+	while ((ch = sbi_getc()) != endchar && maxwidth > 1) {
 		*retval = ch;
 		retval++;
 		maxwidth--;
-		if (maxwidth == 0)
-			break;
-		ch = sbi_getc();
 	}
 	*retval = '\0';
-	return;
 }
 
 #define PAD_RIGHT	1
@@ -360,9 +358,13 @@ int sbi_printf(const char *format, ...)
 {
 	va_list args;
 	int retval;
+
+	spin_lock(&console_out_lock);
 	va_start(args, format);
 	retval = print(NULL, NULL, format, args);
 	va_end(args);
+	spin_unlock(&console_out_lock);
+
 	return retval;
 }
 

From 1bfa2445059a4248f82f097a94e4746b5adf2137 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 14:06:17 +0530
Subject: [PATCH 0020/1765] lib: Fix delegate_traps() for Linux boot

commit d403c70fb11fb55042ca3cef0dbe399ed87cc79b breaks Linux
booting because of fewer exceptions delegated to S-mode. This
patch fixes Linux booting by having all required exceptions
delegated to S-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_hart.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 09739b922a6..fae82c9f46c 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -95,7 +95,10 @@ static int delegate_traps(u32 hartid)
 		/* Send M-mode interrupts and most exceptions to S-mode */
 		interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
 		exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
+			     (1U << CAUSE_FETCH_PAGE_FAULT) |
 			     (1U << CAUSE_BREAKPOINT) |
+			     (1U << CAUSE_LOAD_PAGE_FAULT) |
+			     (1U << CAUSE_STORE_PAGE_FAULT) |
 			     (1U << CAUSE_USER_ECALL);
 	}
 

From a18913200a34c6da44c634578214db7830cdd036 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 14:12:10 +0530
Subject: [PATCH 0021/1765] lib: Remove prints from sbi_hart_switch_mode()

The sbi_hart_switch_mode() will be used by CPU hotplug. This means
if we have prints in sbi_hart_switch_mode() then these prints will
mix with Linux prints.

Being a runtime firmware, we should be verbose only at coldboot
time and error situations.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_hart.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index fae82c9f46c..01362dd73f3 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -209,7 +209,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
-	sbi_printf("\nHART %u Hang !!\n\n", sbi_current_hartid());
+	sbi_printf("\nHART%u Hang !!\n\n", sbi_current_hartid());
 
 	while (1)
 		wfi();
@@ -222,7 +222,6 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 						    unsigned long next_mode)
 {
 	unsigned long val;
-	char mode = 'M';
 
 	switch (next_mode) {
 	case PRV_M:
@@ -236,7 +235,6 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 			sbi_hart_hang();
 		break;
 	default:
-		sbi_printf("\nTrying to switch to unsupported mode\n");
 		sbi_hart_hang();
 	}
 
@@ -248,21 +246,16 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 	csr_write(mepc, next_addr);
 
 	if (next_mode == PRV_S) {
-		mode = 'S';
 		csr_write(stvec, next_addr);
 		csr_write(sscratch, 0);
 		csr_write(sie, 0);
 		csr_write(satp, 0);
 	} else if (next_mode == PRV_U) {
-		mode = 'U';
 		csr_write(utvec, next_addr);
 		csr_write(uscratch, 0);
 		csr_write(uie, 0);
 	}
 
-	sbi_printf("HART %u switching to %c-mode...\n\n",
-		   sbi_current_hartid(), mode);
-
 	register unsigned long a0 asm ("a0") = arg0;
 	register unsigned long a1 asm ("a1") = arg1;
 	__asm__ __volatile__ ("mret" : : "r" (a0), "r" (a1));

From 4e15d79419a63c8bd08045fab8f15d2daa3bb353 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 14:45:14 +0530
Subject: [PATCH 0022/1765] Revert "Fix FDT relocation"

This patch reverts "Fix FDT relocation" because it breaks
fw_jump firmware.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_common.S | 2 --
 1 file changed, 2 deletions(-)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index d7074f8bc77..b5e1f904558 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -41,7 +41,6 @@ _bss_zero:
 	add	a1, t1, zero
 _prev_arg1_override_done:
 
-#ifdef FW_PAYLOAD_FDT_ADDR
 	/*
 	 * Relocate Flatened Device Tree (FDT)
 	 * source FDT address = previous arg1
@@ -100,7 +99,6 @@ _fdt_reloc_again:
 	add	t1, t1, __SIZEOF_POINTER__
 	blt	t1, t2, _fdt_reloc_again
 _fdt_reloc_done:
-#endif
 
 	/* Update boot hart flag */
 	la	a4, _boot_hart_done

From ef5f4e149c9f6f354d48463f30f7bf0f759d8028 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 15:05:59 +0530
Subject: [PATCH 0023/1765] firmware: Remove redundant write to mideleg and
 medeleg

The mideleg and medeleg are already programmed in delegate_traps()
so no need to set it here.

Any CSR setup in our reference firmware becomes a requirement
for bootloader linking to libsbi.a so we should have minimum
possible CSR setup in our reference firmware.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_common.S | 2 --
 1 file changed, 2 deletions(-)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index b5e1f904558..198aa0b9925 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -119,8 +119,6 @@ _wait_for_boot_hart:
 
 _start_warm:
 	/* Disable and clear all interrupts */
-	csrw	mideleg, zero
-	csrw	medeleg, zero
 	csrw	mie, zero
 	csrw	mip, zero
 

From db6c1fe78bebc103670becba39e1c34bcdc48185 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 15:32:28 +0530
Subject: [PATCH 0024/1765] platform: kendryte/k210: Don't include math.h

The math.h is not required anymore and it also gives
compile error for certain toolchains hence thsi patch
removes math.h include from kendryte/k210/sysctl.c.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/sysctl.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index 8039f6e7d06..90aa0e2355e 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -13,7 +13,6 @@
  * limitations under the License.
  */
 #include <sbi/riscv_encoding.h>
-#include <math.h>
 #include "sysctl.h"
 
 #define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)

From 27332e63faaf6d3220a9d56bcfb280921114f012 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 21 Dec 2018 19:19:54 +0900
Subject: [PATCH 0025/1765] Introduce HAS_MFAULTS_DELEGATION feature

Conditionnally delegate page fault exceptions from M mode to S mode
based on the platform features.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 include/sbi/sbi_platform.h             |  6 +++++-
 lib/sbi_hart.c                         | 12 +++++++-----
 platform/sifive/hifive_u540/platform.c |  2 +-
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 39dfb499d9a..6de52f63a6f 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -18,13 +18,15 @@ enum sbi_platform_features {
 	SBI_PLATFORM_HAS_PMP			= (1 << 2),
 	SBI_PLATFORM_HAS_SCOUNTEREN		= (1 << 3),
 	SBI_PLATFORM_HAS_MCOUNTEREN		= (1 << 4),
+	SBI_PLATFORM_HAS_MFAULTS_DELEGATION	= (1 << 5),
 };
 
 #define SBI_PLATFORM_DEFAULT_FEATURES	\
 	(SBI_PLATFORM_HAS_MMIO_TIMER_VALUE | \
 	 SBI_PLATFORM_HAS_PMP | \
 	 SBI_PLATFORM_HAS_SCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MCOUNTEREN)
+	 SBI_PLATFORM_HAS_MCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 struct sbi_platform {
 	char name[64];
@@ -71,6 +73,8 @@ struct sbi_platform {
 	((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN)
 #define sbi_platform_has_mcounteren(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN)
+#define sbi_platform_has_mfaults_delegation(__p)	\
+	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 static inline const char *sbi_platform_name(struct sbi_platform *plat)
 {
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 01362dd73f3..be114d693ff 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -83,8 +83,9 @@ static int fp_init(u32 hartid)
 	return 0;
 }
 
-static int delegate_traps(u32 hartid)
+static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 {
+	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long interrupts, exceptions;
 
 	if (!misa_extension('S')) {
@@ -95,11 +96,12 @@ static int delegate_traps(u32 hartid)
 		/* Send M-mode interrupts and most exceptions to S-mode */
 		interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
 		exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
-			     (1U << CAUSE_FETCH_PAGE_FAULT) |
 			     (1U << CAUSE_BREAKPOINT) |
-			     (1U << CAUSE_LOAD_PAGE_FAULT) |
-			     (1U << CAUSE_STORE_PAGE_FAULT) |
 			     (1U << CAUSE_USER_ECALL);
+		if (sbi_platform_has_mfaults_delegation(plat))
+			exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
+				      (1U << CAUSE_LOAD_PAGE_FAULT) |
+				      (1U << CAUSE_STORE_PAGE_FAULT);
 	}
 
 	csr_write(mideleg, interrupts);
@@ -200,7 +202,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		return rc;
 
-	rc = delegate_traps(hartid);
+	rc = delegate_traps(scratch, hartid);
 	if (rc)
 		return rc;
 
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 46613e60073..338cc2cc286 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -105,7 +105,7 @@ static int sifive_u_system_down(u32 type)
 
 struct sbi_platform platform = {
 	.name = STRINGIFY(PLAT_NAME),
-	.features = SBI_PLATFORM_DEFAULT_FEATURES;
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
 	.pmp_region_count = sifive_u_pmp_region_count,

From 95fbe7d49587beb4f92b6e5e7b8adb5e54b81366 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Dec 2018 15:16:59 -0800
Subject: [PATCH 0026/1765] Move hardcoded uart constant to macros.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/platform.c | 4 +++-
 platform/qemu/virt/platform.c     | 5 ++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 03c2c2d7693..487b7cc935f 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -16,9 +16,11 @@
 #include "platform.h"
 #include "uarths.h"
 
+#define K210_UART_BAUDRATE		115200
+
 int k210_console_init(void)
 {
-	uarths_init(115200, UARTHS_STOP_1);
+	uarths_init(K210_UART_BAUDRATE, UARTHS_STOP_1);
 
 	return 0;
 }
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index fe91fc8f664..84ea58f1a2a 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -23,6 +23,8 @@
 #define VIRT_PLIC_NUM_PRIORITIES	7
 
 #define VIRT_UART16550_ADDR		0x10000000
+#define VIRT_UART_BAUDRATE		115200
+#define VIRT_UART_SHIFTREG_ADDR		1843200
 
 static int virt_cold_final_init(void)
 {
@@ -56,7 +58,8 @@ static int virt_pmp_region_info(u32 target_hart, u32 index,
 static int virt_console_init(void)
 {
 	return uart8250_init(VIRT_UART16550_ADDR,
-			     1843200, 115200, 0, 1);
+			     VIRT_UART_SHIFTREG_ADDR,
+			     VIRT_UART_BAUDRATE, 0, 1);
 }
 
 static int virt_cold_irqchip_init(void)

From 5148499e0393737609baa5ada55284ad91c8be86 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 15:45:14 -0800
Subject: [PATCH 0027/1765] Fix plic warm init in common code.

Unleashed doesn't have S mode for hart 0.
PLIC register base calculation is current wrong because of that.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/common/include/plat/irqchip/plic.h |  5 ++-
 platform/common/irqchip/plic.c              | 47 ++++++++++-----------
 2 files changed, 25 insertions(+), 27 deletions(-)

diff --git a/platform/common/include/plat/irqchip/plic.h b/platform/common/include/plat/irqchip/plic.h
index 7c062aa53de..d3094acc6af 100644
--- a/platform/common/include/plat/irqchip/plic.h
+++ b/platform/common/include/plat/irqchip/plic.h
@@ -12,9 +12,10 @@
 
 #include <sbi/sbi_types.h>
 
-int plic_fdt_fixup(void *fdt, const char *compat);
+void plic_fdt_fixup(void *fdt, const char *compat, u32 cntx_id);
 
-int plic_warm_irqchip_init(u32 target_hart);
+int plic_warm_irqchip_init(u32 target_hart,
+			   int m_cntx_id, int s_cntx_id);
 
 int plic_cold_irqchip_init(unsigned long base,
 			   u32 num_sources, u32 hart_count);
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 404d1b7e6cb..ece86a7ef01 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -27,28 +27,20 @@ static void plic_set_priority(u32 source, u32 val)
 	writel(val, plic_base);
 }
 
-static void plic_set_m_thresh(u32 hartid, u32 val)
+static void plic_set_thresh(u32 cntxid, u32 val)
 {
-	volatile void *plic_m_thresh = plic_base +
+	volatile void *plic_thresh = plic_base +
 				PLIC_CONTEXT_BASE +
-				PLIC_CONTEXT_STRIDE * (2 * hartid);
-	writel(val, plic_m_thresh);
+				PLIC_CONTEXT_STRIDE * cntxid;
+	writel(val, plic_thresh);
 }
 
-static void plic_set_s_thresh(u32 hartid, u32 val)
+static void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 {
-	volatile void *plic_s_thresh = plic_base +
-				PLIC_CONTEXT_BASE +
-				PLIC_CONTEXT_STRIDE * (2 * hartid + 1);
-	writel(val, plic_s_thresh);
-}
-
-static void plic_set_s_ie(u32 hartid, u32 word_index, u32 val)
-{
-	volatile void *plic_s_ie = plic_base +
+	volatile void *plic_ie = plic_base +
 				PLIC_ENABLE_BASE +
-				PLIC_ENABLE_STRIDE * (2 * hartid + 1);
-	writel(val, plic_s_ie + word_index * 4);
+				PLIC_ENABLE_STRIDE * cntxid;
+	writel(val, plic_ie + word_index * 4);
 }
 
 static void plic_fdt_fixup_prop(const struct fdt_node *node,
@@ -57,6 +49,7 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 {
 	u32 *cells;
 	u32 i, cells_count;
+	u32 *cntx_id = priv;
 
 	if (!prop)
 		return;
@@ -70,18 +63,18 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 		return;
 
 	for (i = 0; i < cells_count; i++) {
-		if (i % 4 == 1)
+		if (((i % 2) == 1) && ((i / 2) == *cntx_id))
 			cells[i] = fdt_rev32(0xffffffff);
 	}
 }
 
-int plic_fdt_fixup(void *fdt, const char *compat)
+void plic_fdt_fixup(void *fdt, const char *compat, u32 cntx_id)
 {
-	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, NULL);
-	return 0;
+	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, &cntx_id);
 }
 
-int plic_warm_irqchip_init(u32 target_hart)
+int plic_warm_irqchip_init(u32 target_hart,
+			   int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic_num_sources / 32 + 1;
 
@@ -89,14 +82,18 @@ int plic_warm_irqchip_init(u32 target_hart)
 		return -1;
 
 	/* By default, enable all IRQs for S-mode of target HART */
-	for (i = 0; i < ie_words; i++)
-		plic_set_s_ie(target_hart, i, -1);
+	if (s_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(s_cntx_id, i, -1);
+	}
 
 	/* By default, enable M-mode threshold */
-	plic_set_m_thresh(target_hart, 1);
+	if (m_cntx_id > -1)
+		plic_set_thresh(m_cntx_id, 1);
 
 	/* By default, disable S-mode threshold */
-	plic_set_s_thresh(target_hart, 0);
+	if (s_cntx_id > -1)
+		plic_set_thresh(s_cntx_id, 0);
 
 	return 0;
 }

From a6a5bb22a8c97f6191a0271f3dfe529038161675 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Dec 2018 15:46:37 -0800
Subject: [PATCH 0028/1765] Fix plic warm init in platform code.

Pass S-Mode and M-mode context id separately to common warm init.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/platform.c      |  4 +++-
 platform/qemu/sifive_u/platform.c      | 17 +++++++++++++++--
 platform/qemu/virt/platform.c          | 17 +++++++++++++++--
 platform/sifive/hifive_u540/platform.c | 18 ++++++++++++++++--
 4 files changed, 49 insertions(+), 7 deletions(-)

diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 487b7cc935f..8e565dd85e4 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -43,7 +43,9 @@ static int k210_cold_irqchip_init(void)
 
 static int k210_warm_irqchip_init(u32 core_id)
 {
-	return plic_warm_irqchip_init(core_id);
+	return plic_warm_irqchip_init(core_id,
+				      (2 * core_id),
+				      (2 * core_id + 1));
 }
 
 static int k210_cold_ipi_init(void)
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index d9168255ec6..10db5db12b3 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -28,7 +28,13 @@
 
 static int sifive_u_cold_final_init(void)
 {
-	return plic_fdt_fixup(sbi_scratch_thishart_arg1_ptr(), "riscv,plic0");
+	u32 i;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (i = 0; i < PLAT_HART_COUNT; i++)
+		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
+
+	return 0;
 }
 
 static u32 sifive_u_pmp_region_count(u32 target_hart)
@@ -68,6 +74,13 @@ static int sifive_u_cold_irqchip_init(void)
 				      PLAT_HART_COUNT);
 }
 
+static int sifive_u_warm_irqchip_init(u32 target_hart)
+{
+	return plic_warm_irqchip_init(target_hart,
+				      (2 * target_hart),
+				      (2 * target_hart + 1));
+}
+
 static int sifive_u_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
@@ -98,7 +111,7 @@ struct sbi_platform platform = {
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
 	.cold_irqchip_init = sifive_u_cold_irqchip_init,
-	.warm_irqchip_init = plic_warm_irqchip_init,
+	.warm_irqchip_init = sifive_u_warm_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 84ea58f1a2a..de407732a68 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -28,7 +28,13 @@
 
 static int virt_cold_final_init(void)
 {
-	return plic_fdt_fixup(sbi_scratch_thishart_arg1_ptr(), "riscv,plic0");
+	u32 i;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (i = 0; i < PLAT_HART_COUNT; i++)
+		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
+
+	return 0;
 }
 
 static u32 virt_pmp_region_count(u32 target_hart)
@@ -69,6 +75,13 @@ static int virt_cold_irqchip_init(void)
 				      PLAT_HART_COUNT);
 }
 
+static int virt_warm_irqchip_init(u32 target_hart)
+{
+	return plic_warm_irqchip_init(target_hart,
+				      (2 * target_hart),
+				      (2 * target_hart + 1));
+}
+
 static int virt_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(VIRT_CLINT_ADDR,
@@ -99,7 +112,7 @@ struct sbi_platform platform = {
 	.console_getc = uart8250_getc,
 	.console_init = virt_console_init,
 	.cold_irqchip_init = virt_cold_irqchip_init,
-	.warm_irqchip_init = plic_warm_irqchip_init,
+	.warm_irqchip_init = virt_warm_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 338cc2cc286..d3ed8042dc0 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -35,7 +35,14 @@
 
 static int sifive_u_cold_final_init(void)
 {
-	return plic_fdt_fixup(sbi_scratch_thishart_arg1_ptr(), "riscv,plic0");
+	u32 i;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	plic_fdt_fixup(fdt, "riscv,plic0", 0);
+	for (i = 1; i < PLAT_HART_COUNT; i++)
+		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
+
+	return 0;
 }
 
 static u32 sifive_u_pmp_region_count(u32 target_hart)
@@ -85,6 +92,13 @@ static int sifive_u_cold_irqchip_init(void)
 				      PLAT_HART_COUNT);
 }
 
+static int sifive_u_warm_irqchip_init(u32 target_hart)
+{
+	return plic_warm_irqchip_init(target_hart,
+			(target_hart) ? (2 * target_hart - 1) : 0,
+			(target_hart) ? (2 * target_hart) : -1);
+}
+
 static int sifive_u_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
@@ -115,7 +129,7 @@ struct sbi_platform platform = {
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
 	.cold_irqchip_init = sifive_u_cold_irqchip_init,
-	.warm_irqchip_init = plic_warm_irqchip_init,
+	.warm_irqchip_init = sifive_u_warm_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,

From 88b173b33b0810fbeff91ee589073efb9099a904 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Dec 2018 11:29:28 -0800
Subject: [PATCH 0029/1765] Introduce hart disabled parameter in platform.

As of now, uboot doesn't have support for SMP.
Moreover, unleashed board has a E51 hart which
doesn't not support S mode.

We should only boot only 1 non-zero hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h             |  8 ++++++++
 lib/sbi_hart.c                         |  2 --
 lib/sbi_init.c                         | 13 +++++++++----
 lib/sbi_ipi.c                          |  2 +-
 platform/kendryte/k210/platform.c      |  1 +
 platform/qemu/sifive_u/platform.c      |  1 +
 platform/qemu/virt/platform.c          |  1 +
 platform/sifive/hifive_u540/platform.c |  3 +++
 8 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 6de52f63a6f..00fadde912e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -33,6 +33,7 @@ struct sbi_platform {
 	u64 features;
 	u32 hart_count;
 	u32 hart_stack_size;
+	u64 disabled_hart_mask;
 	int (*cold_early_init)(void);
 	int (*cold_final_init)(void);
 	int (*warm_early_init)(u32 target_hart);
@@ -83,6 +84,13 @@ static inline const char *sbi_platform_name(struct sbi_platform *plat)
 	return NULL;
 }
 
+static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat, u32 hartid)
+{
+	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
+		return 1;
+	else
+		return 0;
+}
 static inline u32 sbi_platform_hart_count(struct sbi_platform *plat)
 {
 	if (plat)
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index be114d693ff..1e5465f5d31 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -211,8 +211,6 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
-	sbi_printf("\nHART%u Hang !!\n\n", sbi_current_hartid());
-
 	while (1)
 		wfi();
 	__builtin_unreachable();
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index da78a7efe7a..68113b4913f 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -86,7 +86,6 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	sbi_printf("OpenSBI v%d.%d (%s %s)\n",
 		   OPENSBI_MAJOR, OPENSBI_MINOR,
 		   __DATE__, __TIME__);
-	sbi_printf("Running on Hart %u\n", hartid);
 
 	sbi_printf("%s\n", logo);
 
@@ -95,6 +94,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	sbi_printf("Platform HART Features : RV%d%s\n", misa_xlen(), str);
 	sbi_printf("Platform Max HARTs     : %d\n",
 		   sbi_platform_hart_count(plat));
+	sbi_printf("Current Hart           : %u\n", hartid);
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size          : %d KB\n",
@@ -106,11 +106,9 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 
 	sbi_hart_pmp_dump(scratch);
 
-	sbi_hart_mark_available(hartid);
-
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wake_coldboot_harts(scratch, hartid);
-
+	sbi_hart_mark_available(hartid);
 	sbi_hart_switch_mode(hartid, scratch->next_arg1,
 			     scratch->next_addr, scratch->next_mode);
 }
@@ -124,6 +122,9 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wait_for_coldboot(scratch, hartid);
 
+	if (sbi_platform_hart_disabled(plat, hartid))
+		sbi_hart_hang();
+
 	rc = sbi_system_warm_early_init(scratch, hartid);
 	if (rc)
 		sbi_hart_hang();
@@ -164,7 +165,11 @@ void __attribute__((noreturn)) sbi_init(struct sbi_scratch *scratch)
 {
 	bool coldboot = FALSE;
 	u32 hartid = sbi_current_hartid();
+	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	if (sbi_platform_hart_disabled(plat, hartid))
+		sbi_hart_hang();
+		
 	if (atomic_add_return(&coldboot_lottery, 1) == 1)
 		coldboot = TRUE;
 
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index f3e68de1d99..d21ea4a2f05 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -28,7 +28,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 
 	/* send IPIs to everyone */
 	for (i = 0, m = mask; m; i++, m >>= 1) {
-		if ((m & 1) && (i != hartid)) {
+		if ((m & 1) && (i != hartid) && !sbi_platform_hart_disabled(plat, hartid)) {
 			oth = sbi_hart_id_to_scratch(scratch, i);
 			oth->ipi_type = event;
 			mb();
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 8e565dd85e4..d3765d0e96c 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -81,6 +81,7 @@ struct sbi_platform platform = {
 
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.disabled_hart_mask = 0,
 
 	.console_init = k210_console_init,
 	.console_putc = k210_console_putc,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 10db5db12b3..f01df1efaf2 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -104,6 +104,7 @@ struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.disabled_hart_mask = 0,
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,
 	.cold_final_init = sifive_u_cold_final_init,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index de407732a68..9e006744bf0 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -105,6 +105,7 @@ struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.disabled_hart_mask = 0,
 	.pmp_region_count = virt_pmp_region_count,
 	.pmp_region_info = virt_pmp_region_info,
 	.cold_final_init = virt_cold_final_init,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index d3ed8042dc0..646ce27341d 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -27,6 +27,8 @@
 #define SIFIVE_U_UART1_ADDR			0x10011000
 #define SIFIVE_UART_BAUDRATE			115200
 
+#define SIFIVE_U_HARITD_ENABLED			1
+
 /* PRCI clock related macros */
 //TODO: Do we need a separate driver for this ?
 #define SIFIVE_PRCI_BASE_ADDR			0x10000000
@@ -122,6 +124,7 @@ struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.disabled_hart_mask = ~(1 << SIFIVE_U_HARITD_ENABLED),
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,
 	.cold_final_init = sifive_u_cold_final_init,

From 8304ee9424cc7700f2b08ba17553c2e48e0bafa8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Dec 2018 21:31:12 -0800
Subject: [PATCH 0030/1765] Disable all interrupts during warm irqchip init.

M mode is not expected to recieve any interrupts.
S mode interrupts shouldn't be enabled in M mode.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/common/irqchip/plic.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index ece86a7ef01..61a6bd01fd7 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -80,11 +80,16 @@ int plic_warm_irqchip_init(u32 target_hart,
 
 	if (plic_hart_count <= target_hart)
 		return -1;
+	
+	if (m_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(m_cntx_id, i, 0);
+	}
 
 	/* By default, enable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(s_cntx_id, i, -1);
+			plic_set_ie(s_cntx_id, i, 0);
 	}
 
 	/* By default, enable M-mode threshold */

From 24b4d48674ad2dc088949cdf852231ab1e81f56b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Dec 2018 11:15:37 +0530
Subject: [PATCH 0031/1765] platform: Remove PLAT_NAME from all platforms

The PLAT_NAME is used only in platform.c for all platforms hence
remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/config.mk       | 1 -
 platform/kendryte/k210/platform.c      | 2 +-
 platform/qemu/sifive_u/config.mk       | 1 -
 platform/qemu/sifive_u/platform.c      | 2 +-
 platform/qemu/virt/config.mk           | 1 -
 platform/qemu/virt/platform.c          | 2 +-
 platform/sifive/hifive_u540/config.mk  | 1 -
 platform/sifive/hifive_u540/platform.c | 2 +-
 8 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index c0c36ea054b..f800a41fa57 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -8,7 +8,6 @@
 #
 
 # Essential defines required by SBI platform
-platform-cppflags-y = -DPLAT_NAME="Kendryte K210"
 platform-cppflags-y+= -DPLAT_HART_COUNT=2
 platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=4096
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index d3765d0e96c..4ef1a249552 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -76,7 +76,7 @@ static int k210_system_shutdown(u32 type)
 
 struct sbi_platform platform = {
 
-	.name = STRINGIFY(PLAT_NAME),
+	.name = "Kendryte K210",
 	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
 
 	.hart_count = PLAT_HART_COUNT,
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index d4470cd0ad5..c2668a8f774 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -8,7 +8,6 @@
 #
 
 # Essential defines required by SBI platform
-platform-cppflags-y = -DPLAT_NAME="QEMU SiFive Unleashed"
 platform-cppflags-y+= -DPLAT_HART_COUNT=1
 platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index f01df1efaf2..c2dcafc8dab 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -100,7 +100,7 @@ static int sifive_u_system_down(u32 type)
 }
 
 struct sbi_platform platform = {
-	.name = STRINGIFY(PLAT_NAME),
+	.name = "QEMU SiFive Unleashed",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 8496e2d4804..467b0576126 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -8,7 +8,6 @@
 #
 
 # Essential defines required by SBI platform
-platform-cppflags-y = -DPLAT_NAME="QEMU Virt Machine"
 platform-cppflags-y+= -DPLAT_HART_COUNT=8
 platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 9e006744bf0..7b82e4e2d18 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -101,7 +101,7 @@ static int virt_system_down(u32 type)
 }
 
 struct sbi_platform platform = {
-	.name = STRINGIFY(PLAT_NAME),
+	.name = "QEMU Virt Machine",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,
diff --git a/platform/sifive/hifive_u540/config.mk b/platform/sifive/hifive_u540/config.mk
index f411fa9a180..ecbf88c39ac 100644
--- a/platform/sifive/hifive_u540/config.mk
+++ b/platform/sifive/hifive_u540/config.mk
@@ -8,7 +8,6 @@
 #
 
 # Essential defines required by SBI platform
-platform-cppflags-y = -DPLAT_NAME="SiFive HiFive U540"
 platform-cppflags-y+= -DPLAT_HART_COUNT=5
 platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
 
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 646ce27341d..395ad4ed1ae 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -120,7 +120,7 @@ static int sifive_u_system_down(u32 type)
 }
 
 struct sbi_platform platform = {
-	.name = STRINGIFY(PLAT_NAME),
+	.name = "SiFive HiFive U540",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = PLAT_HART_COUNT,
 	.hart_stack_size = PLAT_HART_STACK_SIZE,

From 1cf7ec9e3bbf287fc9d601d2346b9e73fda40a84 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Dec 2018 12:02:31 +0530
Subject: [PATCH 0032/1765] firmware: Remove stack section from common linker
 script

We don't need a separate stack section for per-HART stack
instead we create per-HART stack at the end of firmware
(i.e. after _fw_end symbol).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_common.S   | 61 +++++++++++++++++++++++++++++-------------
 firmware/fw_common.ldS | 12 ---------
 2 files changed, 42 insertions(+), 31 deletions(-)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index 198aa0b9925..4c11e852c73 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -122,18 +122,28 @@ _start_warm:
 	csrw	mie, zero
 	csrw	mip, zero
 
-	/* set MSIE bit to receive IPI */
+	/* Set MSIE bit to receive IPI */
 	li	a2, MIP_MSIP
 	csrw	mie, a2
+
+	/* Preload per-HART details
+	 * s6 -> HART ID
+	 * s7 -> HART Count
+	 * s8 -> HART Stack Size
+	 */
+	csrr	s6, mhartid
+	li	s7, PLAT_HART_COUNT
+	li	s8, PLAT_HART_STACK_SIZE
+
 	/* HART ID should be within expected limit */
-	csrr	a6, mhartid
-	li	a5, PLAT_HART_COUNT
-	bge	a6, a5, _start_hang
+	csrr	s6, mhartid
+	bge	s6, s7, _start_hang
 
 	/* Setup scratch space */
-	li	a5, PLAT_HART_STACK_SIZE
-	la	tp, _stack_end
-	mul	a5, a5, a6
+	la	tp, _fw_end
+	mul	a5, s7, s8
+	add	tp, tp, a5
+	mul	a5, s8, s6
 	sub	tp, tp, a5
 	li	a5, RISCV_SCRATCH_SIZE
 	sub	tp, tp, a5
@@ -143,6 +153,8 @@ _start_warm:
 	REG_S	zero, RISCV_SCRATCH_TMP0_OFFSET(tp)
 	la	a4, _fw_start
 	la	a5, _fw_end
+	mul	t0, s7, s8
+	add	a5, a5, t0
 	sub	a5, a5, a4
 	REG_S	a4, RISCV_SCRATCH_FW_START_OFFSET(tp)
 	REG_S	a5, RISCV_SCRATCH_FW_SIZE_OFFSET(tp)
@@ -180,18 +192,29 @@ _start_warm:
 	.section .entry, "ax", %progbits
 	.globl _hartid_to_scratch
 _hartid_to_scratch:
-	add	sp, sp, -(2 * __SIZEOF_POINTER__)
-	REG_S	a1, (sp)
-	REG_S	a2, (__SIZEOF_POINTER__)(sp)
-	li	a1, PLAT_HART_STACK_SIZE
-	la	a2, _stack_end
-	mul	a1, a1, a0
-	sub	a2, a2, a1
-	li	a1, RISCV_SCRATCH_SIZE
-	sub	a0, a2, a1
-	REG_L	a1, (sp)
-	REG_L	a2, (__SIZEOF_POINTER__)(sp)
-	add	sp, sp, (2 * __SIZEOF_POINTER__)
+	add	sp, sp, -(3 * __SIZEOF_POINTER__)
+	REG_S	s0, (sp)
+	REG_S	s1, (__SIZEOF_POINTER__)(sp)
+	REG_S	s2, (__SIZEOF_POINTER__ * 2)(sp)
+	/*
+	 * a0 -> HART ID (passed by caller)
+	 * s0 -> HART Stack Size
+	 * s1 -> HART Stack End
+	 * s2 -> Temporary
+	 */
+	li	s0, PLAT_HART_STACK_SIZE
+	li	s2, PLAT_HART_COUNT
+	mul	s2, s2, s0
+	la	s1, _fw_end
+	add	s1, s1, s2
+	mul	s2, s0, a0
+	sub	s1, s1, s2
+	li	s2, RISCV_SCRATCH_SIZE
+	sub	a0, s1, s2
+	REG_L	s0, (sp)
+	REG_L	s1, (__SIZEOF_POINTER__)(sp)
+	REG_L	s2, (__SIZEOF_POINTER__ * 2)(sp)
+	add	sp, sp, (3 * __SIZEOF_POINTER__)
 	ret
 
 	.align 3
diff --git a/firmware/fw_common.ldS b/firmware/fw_common.ldS
index 3761d62fa7d..52771f8bdda 100644
--- a/firmware/fw_common.ldS
+++ b/firmware/fw_common.ldS
@@ -61,18 +61,6 @@
 
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
-	.stack :
-	{
-		PROVIDE(_stack_start = .);
-		*(.stack)
-		*(.stack.*)
-		. = . + (PLAT_HART_STACK_SIZE * PLAT_HART_COUNT);
-		. = ALIGN(8);
-		PROVIDE(_stack_end = .);
-	}
-
-	. = ALIGN(0x1000); /* Ensure next section is page aligned */
-
 	.bss :
 	{
 		PROVIDE(_bss_start = .);

From 58ca525a7d35b2d4cd7045fd343fb6d85567f01d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Dec 2018 12:40:54 +0530
Subject: [PATCH 0033/1765] firmware: Don't depend on PLAT_HART_COUNT and
 PLAT_HART_STACK_SIZE

The hart_count and hart_stack_size information is already available
in "struct sbi_platform" so we use that instead of depending on
PLAT_HART_COUNT and PLAT_HART_STACK_SIZE.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_common.S    | 10 ++++++----
 include/sbi/riscv_asm.h |  5 +++++
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_common.S b/firmware/fw_common.S
index 4c11e852c73..d426f15f753 100644
--- a/firmware/fw_common.S
+++ b/firmware/fw_common.S
@@ -132,8 +132,9 @@ _start_warm:
 	 * s8 -> HART Stack Size
 	 */
 	csrr	s6, mhartid
-	li	s7, PLAT_HART_COUNT
-	li	s8, PLAT_HART_STACK_SIZE
+	la	a4, platform
+	lwu	s7, RISCV_PLATFORM_HART_COUNT_OFFSET(a4)
+	lwu	s8, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 
 	/* HART ID should be within expected limit */
 	csrr	s6, mhartid
@@ -202,8 +203,9 @@ _hartid_to_scratch:
 	 * s1 -> HART Stack End
 	 * s2 -> Temporary
 	 */
-	li	s0, PLAT_HART_STACK_SIZE
-	li	s2, PLAT_HART_COUNT
+	la	s2, platform
+	lwu	s0, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+	lwu	s2, RISCV_PLATFORM_HART_COUNT_OFFSET(s2)
 	mul	s2, s2, s0
 	la	s1, _fw_end
 	add	s1, s1, s2
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 516bf6f9a94..045310b5d5a 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -81,6 +81,11 @@
 #define RISCV_SCRATCH_IPI_TYPE_OFFSET		(9 * __SIZEOF_POINTER__)
 #define RISCV_SCRATCH_SIZE			256
 
+#define RISCV_PLATFORM_NAME_OFFSET		(0x0)
+#define RISCV_PLATFORM_FEATURES_OFFSET		(0x40)
+#define RISCV_PLATFORM_HART_COUNT_OFFSET	(0x48)
+#define RISCV_PLATFORM_HART_STACK_SIZE_OFFSET	(0x4c)
+
 #define RISCV_TRAP_REGS_zero			0
 #define RISCV_TRAP_REGS_ra			1
 #define RISCV_TRAP_REGS_sp			2

From 472d3f4e170814a2eda663a97b84728557a71757 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Dec 2018 21:01:40 +0530
Subject: [PATCH 0034/1765] platform: Remove PLAT_HART_COUNT and
 PLAT_HART_STACK_SIZE

The PLAT_HART_COUNT and PLAT_HART_STACK_SIZE are only used
by platform code so no need of exposing these to everyone
by adding it to platform-cppflags-y.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/config.mk       |  5 +----
 platform/kendryte/k210/platform.c      | 10 +++++-----
 platform/kendryte/k210/platform.h      |  5 ++++-
 platform/qemu/sifive_u/config.mk       |  5 +----
 platform/qemu/sifive_u/platform.c      | 15 +++++++++------
 platform/qemu/virt/config.mk           |  5 +----
 platform/qemu/virt/platform.c          | 15 +++++++++------
 platform/sifive/hifive_u540/config.mk  |  5 +----
 platform/sifive/hifive_u540/platform.c | 15 +++++++++------
 9 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index f800a41fa57..512fc2abe86 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -7,11 +7,8 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-# Essential defines required by SBI platform
-platform-cppflags-y+= -DPLAT_HART_COUNT=2
-platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=4096
-
 # Compiler flags
+platform-cppflags-y =
 platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-ldflags-y =
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 4ef1a249552..226cb775ca2 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -38,7 +38,7 @@ static char k210_console_getc(void)
 static int k210_cold_irqchip_init(void)
 {
 	return plic_cold_irqchip_init(PLIC_BASE_ADDR, PLIC_NUM_SOURCES,
-				      PLAT_HART_COUNT);
+				      K210_HART_COUNT);
 }
 
 static int k210_warm_irqchip_init(u32 core_id)
@@ -50,12 +50,12 @@ static int k210_warm_irqchip_init(u32 core_id)
 
 static int k210_cold_ipi_init(void)
 {
-	return clint_cold_ipi_init(CLINT_BASE_ADDR, PLAT_HART_COUNT);
+	return clint_cold_ipi_init(CLINT_BASE_ADDR, K210_HART_COUNT);
 }
 
 static int k210_cold_timer_init(void)
 {
-	return clint_cold_timer_init(CLINT_BASE_ADDR, PLAT_HART_COUNT);
+	return clint_cold_timer_init(CLINT_BASE_ADDR, K210_HART_COUNT);
 }
 
 static int k210_system_reboot(u32 type)
@@ -79,8 +79,8 @@ struct sbi_platform platform = {
 	.name = "Kendryte K210",
 	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
 
-	.hart_count = PLAT_HART_COUNT,
-	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.hart_count = K210_HART_COUNT,
+	.hart_stack_size = K210_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
 
 	.console_init = k210_console_init,
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 6b520cf7b15..ddfdf15ba15 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -18,12 +18,15 @@
 
 #include <sbi/riscv_asm.h>
 
+#define K210_HART_COUNT		2
+#define K210_HART_STACK_SIZE	4096
+
 /* Register base address */
 
 /* Under Coreplex */
 #define CLINT_BASE_ADDR		(0x02000000U)
 #define PLIC_BASE_ADDR		(0x0C000000U)
-#define PLIC_NUM_CORES		(PLAT_HART_COUNT)
+#define PLIC_NUM_CORES		(K210_HART_COUNT)
 
 /* Under TileLink */
 #define GPIOHS_BASE_ADDR	(0x38001000U)
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index c2668a8f774..630098e54b7 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -7,11 +7,8 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-# Essential defines required by SBI platform
-platform-cppflags-y+= -DPLAT_HART_COUNT=1
-platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
-
 # Compiler flags
+platform-cppflags-y =
 platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-ldflags-y =
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index c2dcafc8dab..f593323a8fc 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -14,6 +14,9 @@
 #include <plat/serial/sifive-uart.h>
 #include <plat/sys/clint.h>
 
+#define SIFIVE_U_HART_COUNT			1
+#define SIFIVE_U_HART_STACK_SIZE		8192
+
 #define SIFIVE_U_SYS_CLK			1000000000
 #define SIFIVE_U_PERIPH_CLK			(SIFIVE_U_SYS_CLK / 2)
 
@@ -31,7 +34,7 @@ static int sifive_u_cold_final_init(void)
 	u32 i;
 	void *fdt = sbi_scratch_thishart_arg1_ptr();
 
-	for (i = 0; i < PLAT_HART_COUNT; i++)
+	for (i = 0; i < SIFIVE_U_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
 
 	return 0;
@@ -71,7 +74,7 @@ static int sifive_u_cold_irqchip_init(void)
 {
 	return plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
 				      SIFIVE_U_PLIC_NUM_SOURCES,
-				      PLAT_HART_COUNT);
+				      SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_warm_irqchip_init(u32 target_hart)
@@ -84,13 +87,13 @@ static int sifive_u_warm_irqchip_init(u32 target_hart)
 static int sifive_u_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-				   PLAT_HART_COUNT);
+				   SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_cold_timer_init(void)
 {
 	return clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-				     PLAT_HART_COUNT);
+				     SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_system_down(u32 type)
@@ -102,8 +105,8 @@ static int sifive_u_system_down(u32 type)
 struct sbi_platform platform = {
 	.name = "QEMU SiFive Unleashed",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = PLAT_HART_COUNT,
-	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.hart_count = SIFIVE_U_HART_COUNT,
+	.hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 467b0576126..927422c16d1 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -7,11 +7,8 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-# Essential defines required by SBI platform
-platform-cppflags-y+= -DPLAT_HART_COUNT=8
-platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
-
 # Compiler flags
+platform-cppflags-y =
 platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-ldflags-y =
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 7b82e4e2d18..98357cfc680 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -14,6 +14,9 @@
 #include <plat/serial/uart8250.h>
 #include <plat/sys/clint.h>
 
+#define VIRT_HART_COUNT			8
+#define VIRT_HART_STACK_SIZE		8192
+
 #define VIRT_TEST_ADDR			0x100000
 
 #define VIRT_CLINT_ADDR			0x2000000
@@ -31,7 +34,7 @@ static int virt_cold_final_init(void)
 	u32 i;
 	void *fdt = sbi_scratch_thishart_arg1_ptr();
 
-	for (i = 0; i < PLAT_HART_COUNT; i++)
+	for (i = 0; i < VIRT_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
 
 	return 0;
@@ -72,7 +75,7 @@ static int virt_cold_irqchip_init(void)
 {
 	return plic_cold_irqchip_init(VIRT_PLIC_ADDR,
 				      VIRT_PLIC_NUM_SOURCES,
-				      PLAT_HART_COUNT);
+				      VIRT_HART_COUNT);
 }
 
 static int virt_warm_irqchip_init(u32 target_hart)
@@ -85,13 +88,13 @@ static int virt_warm_irqchip_init(u32 target_hart)
 static int virt_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(VIRT_CLINT_ADDR,
-				   PLAT_HART_COUNT);
+				   VIRT_HART_COUNT);
 }
 
 static int virt_cold_timer_init(void)
 {
 	return clint_cold_timer_init(VIRT_CLINT_ADDR,
-				     PLAT_HART_COUNT);
+				     VIRT_HART_COUNT);
 }
 
 static int virt_system_down(u32 type)
@@ -103,8 +106,8 @@ static int virt_system_down(u32 type)
 struct sbi_platform platform = {
 	.name = "QEMU Virt Machine",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = PLAT_HART_COUNT,
-	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.hart_count = VIRT_HART_COUNT,
+	.hart_stack_size = VIRT_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
 	.pmp_region_count = virt_pmp_region_count,
 	.pmp_region_info = virt_pmp_region_info,
diff --git a/platform/sifive/hifive_u540/config.mk b/platform/sifive/hifive_u540/config.mk
index ecbf88c39ac..630098e54b7 100644
--- a/platform/sifive/hifive_u540/config.mk
+++ b/platform/sifive/hifive_u540/config.mk
@@ -7,11 +7,8 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-# Essential defines required by SBI platform
-platform-cppflags-y+= -DPLAT_HART_COUNT=5
-platform-cppflags-y+= -DPLAT_HART_STACK_SIZE=8192
-
 # Compiler flags
+platform-cppflags-y =
 platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-ldflags-y =
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 395ad4ed1ae..1e600a3e34d 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -15,6 +15,9 @@
 #include <plat/serial/sifive-uart.h>
 #include <plat/sys/clint.h>
 
+#define SIFIVE_U_HART_COUNT			5
+#define SIFIVE_U_HART_STACK_SIZE		8192
+
 #define SIFIVE_U_SYS_CLK			1000000000
 
 #define SIFIVE_U_CLINT_ADDR			0x2000000
@@ -41,7 +44,7 @@ static int sifive_u_cold_final_init(void)
 	void *fdt = sbi_scratch_thishart_arg1_ptr();
 
 	plic_fdt_fixup(fdt, "riscv,plic0", 0);
-	for (i = 1; i < PLAT_HART_COUNT; i++)
+	for (i = 1; i < SIFIVE_U_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
 
 	return 0;
@@ -91,7 +94,7 @@ static int sifive_u_cold_irqchip_init(void)
 {
 	return plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
 				      SIFIVE_U_PLIC_NUM_SOURCES,
-				      PLAT_HART_COUNT);
+				      SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_warm_irqchip_init(u32 target_hart)
@@ -104,13 +107,13 @@ static int sifive_u_warm_irqchip_init(u32 target_hart)
 static int sifive_u_cold_ipi_init(void)
 {
 	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-				   PLAT_HART_COUNT);
+				   SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_cold_timer_init(void)
 {
 	return clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-				     PLAT_HART_COUNT);
+				     SIFIVE_U_HART_COUNT);
 }
 
 static int sifive_u_system_down(u32 type)
@@ -122,8 +125,8 @@ static int sifive_u_system_down(u32 type)
 struct sbi_platform platform = {
 	.name = "SiFive HiFive U540",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = PLAT_HART_COUNT,
-	.hart_stack_size = PLAT_HART_STACK_SIZE,
+	.hart_count = SIFIVE_U_HART_COUNT,
+	.hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
 	.disabled_hart_mask = ~(1 << SIFIVE_U_HARITD_ENABLED),
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,

From 4e8d078613ee670a8577ec76d7b0a05944e07f1b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Dec 2018 21:14:23 +0530
Subject: [PATCH 0035/1765] top: Typo fix in top-level README.md

The platform specific options will be PLATFORM_<xyz> and not
PLAT_<xyz> hence this patch fixes typo in top-level README.md.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index db6c77b1946..8d5b7233ee1 100644
--- a/README.md
+++ b/README.md
@@ -59,7 +59,7 @@ OR
 `make PLATFORM=<platform_subdir> I=<install_directory> install`
 
 In addition, we can also specify platform specific command-line
-options to top-level make (such as `PLAT_<xyz>` or `FW_<abc>`)
+options to top-level make (such as `PLATFORM_<xyz>` or `FW_<abc>`)
 which are described under `docs/platform/<platform_name>.md` OR
 `docs/firmware/<firmware_name>.md`.
 

From d06dca9bcc470472337571c8ecc2742832713693 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Tue, 25 Dec 2018 15:37:48 +0900
Subject: [PATCH 0036/1765] Makefile: Rename CROSS_COMPILE to
 CROSS_COMPILE_PREFIX

Make it clear what this environment variable defines and update
the README.md file to explain that.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 Makefile  | 14 +++++++-------
 README.md |  7 ++++---
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/Makefile b/Makefile
index f544a6488be..ee00d65e760 100644
--- a/Makefile
+++ b/Makefile
@@ -102,7 +102,7 @@ deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup compilation environment
-cpp=$(CROSS_COMPILE)cpp
+cpp=$(CROSS_COMPILE_PREFIX)cpp
 cppflags+=-DOPENSBI_MAJOR=$(MAJOR)
 cppflags+=-DOPENSBI_MINOR=$(MINOR)
 cppflags+=-I$(platform_dir)/include
@@ -110,7 +110,7 @@ cppflags+=-I$(platform_common_dir)/include
 cppflags+=-I$(include_dir)
 cppflags+=$(platform-cppflags-y)
 cppflags+=$(firmware-cppflags-y)
-cc=$(CROSS_COMPILE)gcc
+cc=$(CROSS_COMPILE_PREFIX)gcc
 cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 cflags+=-mno-save-restore -mstrict-align
@@ -118,7 +118,7 @@ cflags+=$(cppflags)
 cflags+=$(platform-cflags-y)
 cflags+=$(firmware-cflags-y)
 cflags+=$(EXTRA_CFLAGS)
-as=$(CROSS_COMPILE)gcc
+as=$(CROSS_COMPILE_PREFIX)gcc
 asflags=-g -Wall -nostdlib -D__ASSEMBLY__
 asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 asflags+=-mno-save-restore -mstrict-align
@@ -126,15 +126,15 @@ asflags+=$(cppflags)
 asflags+=$(platform-asflags-y)
 asflags+=$(firmware-asflags-y)
 asflags+=$(EXTRA_ASFLAGS)
-ar=$(CROSS_COMPILE)ar
+ar=$(CROSS_COMPILE_PREFIX)ar
 arflags=rcs
-ld=$(CROSS_COMPILE)gcc
+ld=$(CROSS_COMPILE_PREFIX)gcc
 ldflags=-g -Wall -nostdlib -Wl,--build-id=none
 ldflags+=$(platform-ldflags-y)
 ldflags+=$(firmware-ldflags-y)
-merge=$(CROSS_COMPILE)ld
+merge=$(CROSS_COMPILE_PREFIX)ld
 mergeflags=-r
-objcopy=$(CROSS_COMPILE)objcopy
+objcopy=$(CROSS_COMPILE_PREFIX)objcopy
 
 # Setup functions for compilation
 define dynamic_flags
diff --git a/README.md b/README.md
index 8d5b7233ee1..0588aa8d639 100644
--- a/README.md
+++ b/README.md
@@ -28,8 +28,9 @@ We can create three things using the RISC-V OpenSBI project:
 How to Build?
 -------------
 
-For cross-compiling, please ensure that CROSS_COMPILE environment
-variable is set before starting build system.
+For cross-compiling, the environment variable CROSS_COMPILE_PREFIX must be
+defined to specify the toolchain executable name prefix, e.g.
+"riscv64-unknown-elf-" for riscv64-unknown-elf-gcc.
 
 The libplatsbi.a and firmwares are optional and only built when
 `PLATFORM=<platform_subdir>` parameter is specified to top-level make.
@@ -78,4 +79,4 @@ We also prefer source level documentation, so wherever possible we describe
 stuff directly in the source code. This helps us maintain source and its
 documentation at the same place. For source level documentation we strictly
 follow Doxygen style. Please refer [Doxygen manual]
-(http://www.stack.nl/~dimitri/doxygen/manual.html) for details.
\ No newline at end of file
+(http://www.stack.nl/~dimitri/doxygen/manual.html) for details.

From fb3cbe6481e1a9dff80857ab2aa4812d4211c188 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Tue, 25 Dec 2018 15:50:29 +0900
Subject: [PATCH 0037/1765] Makefile: Fix clean

Clean was doing nothing. Fix it to remove all compiled files, leaving
only dependency files.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index ee00d65e760..bbd18f64291 100644
--- a/Makefile
+++ b/Makefile
@@ -280,7 +280,7 @@ clean:
 ifeq ($(build_dir),$(CURDIR)/build)
 	$(V)mkdir -p $(build_dir)
 	$(if $(V), @echo " CLEAN     $(build_dir)")
-	$(V)find $(build_dir) -maxdepth 1 -type f -exec rm -rf {} +
+	$(V)find $(build_dir) -regex ".*\.\(o\|a\|elf\|bin\)" -type f -exec rm -rf {} +
 endif
 
 # Rule for "make distclean"

From 23e2c594cc9ef3a51655252871ff3016f534cfe3 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Tue, 25 Dec 2018 15:37:04 +0900
Subject: [PATCH 0038/1765] README: Update

Some rewrite with a more formal style.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 README.md | 170 ++++++++++++++++++++++++++++++++----------------------
 1 file changed, 100 insertions(+), 70 deletions(-)

diff --git a/README.md b/README.md
index 0588aa8d639..69a65c16773 100644
--- a/README.md
+++ b/README.md
@@ -4,79 +4,109 @@ RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 The **RISC-V Supervisor Binary Interface (SBI)** is a recommended
 interface between:
 
-1. Platform specific firmware running in M-mode and
-   general-purpose-os/hypervisor/bootloader running in S-mode/HS-mode
-2. Hypervisor runnng in HS-mode and general-purpose-os/bootloader
-   running in VS-mode
-
-The **RISC-V SBI specification** is maintained as independent project
-by RISC-V Foundation on [Github](https://github.com/riscv/riscv-sbi-doc)
-
-The **RISC-V OpenSBI project** aims to provides an open-source and
-extensible implementation of the **RISC-V SBI specification** for
-point 1) mentioned above. It can be easily extended by RISC-V platform
-or RISC-V System-on-Chip vendors.
-
-We can create three things using the RISC-V OpenSBI project:
-
-1. **libsbi.a** - Generic OpenSBI static library
-2. **libplatsbi.a** - Platform specific OpenSBI static library
-   (It is libsbi.a plus platform specific hooks represented
-    by "platform" symbol)
-3. **firmwares** - Platform specific firmware binaries
-
-How to Build?
--------------
-
-For cross-compiling, the environment variable CROSS_COMPILE_PREFIX must be
-defined to specify the toolchain executable name prefix, e.g.
-"riscv64-unknown-elf-" for riscv64-unknown-elf-gcc.
-
-The libplatsbi.a and firmwares are optional and only built when
-`PLATFORM=<platform_subdir>` parameter is specified to top-level make.
-(**NOTE**: `<platform_subdir>` is sub-directory under platform/ directory)
-
-To build and install Generic OpenSBI library do the following:
-
-1. Build **libsbi.a**:
-`make`
-OR
-`make O=<build_directory>`
-2. Install **libsbi.a and headers**:
-`make install`
-OR
-`make I=<install_directory> install`
-
-To build and install platform specific OpenSBI library and firmwares
-do the following:
-
-1. Build **libsbi, libplatsbi, and firmwares**:
-`make PLATFORM=<platform_subdir>`
-OR
-`make PLATFORM=<platform_subdir> O=<build_directory>`
-2. Install **libsbi, headers, libplatsbi, and firmwares**:
-`make PLATFORM=<platform_subdir> install`
-OR
-`make PLATFORM=<platform_subdir> I=<install_directory> install`
-
-In addition, we can also specify platform specific command-line
-options to top-level make (such as `PLATFORM_<xyz>` or `FW_<abc>`)
-which are described under `docs/platform/<platform_name>.md` OR
-`docs/firmware/<firmware_name>.md`.
+1. A pplatform specific firmware executed in M-mode and a general purpose
+   OS hypervisor or bootloader executed in S-mode or HS-mode.
+2. A hypervisor executed in HS-mode and a general purpose OS or bootloader
+   executed in VS-mode
+
+The *RISC-V SBI specification* is maintained as an independent project
+by the RISC-V Foundation in [Github](https://github.com/riscv/riscv-sbi-doc)
+
+OpenSBI aims to provides an open-source and extensible implementation of
+the RISC-V SBI specification for case 1 mentioned above. OpenSBI
+implementation can be easily extended by RISC-V platform or System-on-Chip
+vendors to fit a particular hadware configuration.
+
+OpenSBI provides three components:
+
+1. *libsbi.a* - A generic OpenSBI static library
+2. *libplatsbi.a* - Platform specific OpenSBI static library, that is,
+                    libsbi.a plus platform specific hooks
+3. *firmwares* - Platform specific bootable firmware binaries
+
+Building and Installing generic *libsbi.a*
+------------------------------------------
+
+For cross-compiling, the environment variable *CROSS_COMPILE_PREFIX* must
+be defined to specify the toolchain executable name prefix, e.g.
+*riscv64-unknown-elf-* if the gcc executable used is
+*riscv64-unknown-elf-gcc*.
+
+To build the generic OpenSBI library *libsbi.a*, simply execute:
+```
+make
+```
+
+All compiled binaries will be placed in the *build* directory.
+To specify an alternate build directory target, run:
+```
+make O=<build_directory>
+```
+
+To generate files to be installed for using *libsbi.a* in other projects,
+run:
+```
+make install
+```
+This will create the *install* directory with all necessary include files
+and binary files under it. To specify an alternate installation directory,
+run:
+```
+make I=<install_directory> install
+```
+
+Building and Installing platform specific *libsbi.a* and firmwares
+------------------------------------------------------------------
+
+The libplatsbi.a and firmware files are only built if the
+*PLATFORM=<platform path>* argument is specified on make command lines.
+*<platform path>* must specify the path to one of the leaf directories
+under the *platform* directory. For example, to compile the library and
+firmware for QEMU generic RISC-V *virt* machine, *<platform path>*
+should be *qemu/virt*.
+
+To build *libsbi, libplatsbi, and firmwares* for a specific platform, run:
+```
+make PLATFORM=<platform_subdir>
+```
+
+or
+
+```
+make PLATFORM=<platform_subdir> O=<build_directory>
+```
+
+To install *libsbi, headers, libplatsbi, and firmwares*, run:
+```
+make PLATFORM=<platform_subdir> install
+```
+
+or
+
+```
+make PLATFORM=<platform_subdir> I=<install_directory> install`
+```
+
+In addition, platform specific make command-line options to top-level make
+,such as *PLATFORM_<xyz>* or *FW_<abc>* can also be specified. These
+options are described under *docs/platform/<platform_name>.md* and
+*docs/firmware/<firmware_name>.md*.
 
 Documentation
 -------------
 
-All our documenation is under `docs` directory organized in following
-manner:
+A more detailed documenation is under the *docs* directory and organized
+as follows.
+
+* *docs/platform_guide.md* - Guidelines for adding new platform support
+* *docs/library_usage.md* - Guidelines for using the static library
+* *docs/platform/<platform_name>.md* - Platform specific documentation for
+                                       the platform *<platform_name>*
+* *docs/firmware/<firmware_name>.md* - Platform specific documentation for
+                                       the firmware *<firmware_name>*
 
-* `docs/platform_guide.md` - Guidelines for adding new platform support
-* `docs/library_usage.md` - Guidelines for using static library
-* `docs/platform/<platform_name>.md` - Documentation for `<platform_name>` platform
-* `docs/firmware/<firmware_name>.md` - Documentation for firmware `<firmware_name>`
+The source code is also well documented. For source level documentation,
+doxygen style is used. Please refer to [Doxygen manual]
+(http://www.stack.nl/~dimitri/doxygen/manual.html) for details on this
+format.
 
-We also prefer source level documentation, so wherever possible we describe
-stuff directly in the source code. This helps us maintain source and its
-documentation at the same place. For source level documentation we strictly
-follow Doxygen style. Please refer [Doxygen manual]
-(http://www.stack.nl/~dimitri/doxygen/manual.html) for details.

From fd7199920ed9cee84b07234db85b8fb3943664c2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 10:57:15 +0530
Subject: [PATCH 0039/1765] top: Rename back CROSS_COMPILE_PREFIX to
 CROSS_COMPILE

The name CROSS_COMPILE is an industry standard used across
open-source project to specify cross-compiler prefix.

In fact, distro build systems such as buildroot and yocto
assume CROSS_COMPILE to be supported by projects added
as packages to these build systems.

This patch rename back CROSS_COMPILE_PREFIX to CROSS_COMPILE.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile  | 14 +++++++-------
 README.md |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index bbd18f64291..9c55559aa3d 100644
--- a/Makefile
+++ b/Makefile
@@ -102,7 +102,7 @@ deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup compilation environment
-cpp=$(CROSS_COMPILE_PREFIX)cpp
+cpp=$(CROSS_COMPILE)cpp
 cppflags+=-DOPENSBI_MAJOR=$(MAJOR)
 cppflags+=-DOPENSBI_MINOR=$(MINOR)
 cppflags+=-I$(platform_dir)/include
@@ -110,7 +110,7 @@ cppflags+=-I$(platform_common_dir)/include
 cppflags+=-I$(include_dir)
 cppflags+=$(platform-cppflags-y)
 cppflags+=$(firmware-cppflags-y)
-cc=$(CROSS_COMPILE_PREFIX)gcc
+cc=$(CROSS_COMPILE)gcc
 cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 cflags+=-mno-save-restore -mstrict-align
@@ -118,7 +118,7 @@ cflags+=$(cppflags)
 cflags+=$(platform-cflags-y)
 cflags+=$(firmware-cflags-y)
 cflags+=$(EXTRA_CFLAGS)
-as=$(CROSS_COMPILE_PREFIX)gcc
+as=$(CROSS_COMPILE)gcc
 asflags=-g -Wall -nostdlib -D__ASSEMBLY__
 asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 asflags+=-mno-save-restore -mstrict-align
@@ -126,15 +126,15 @@ asflags+=$(cppflags)
 asflags+=$(platform-asflags-y)
 asflags+=$(firmware-asflags-y)
 asflags+=$(EXTRA_ASFLAGS)
-ar=$(CROSS_COMPILE_PREFIX)ar
+ar=$(CROSS_COMPILE)ar
 arflags=rcs
-ld=$(CROSS_COMPILE_PREFIX)gcc
+ld=$(CROSS_COMPILE)gcc
 ldflags=-g -Wall -nostdlib -Wl,--build-id=none
 ldflags+=$(platform-ldflags-y)
 ldflags+=$(firmware-ldflags-y)
-merge=$(CROSS_COMPILE_PREFIX)ld
+merge=$(CROSS_COMPILE)ld
 mergeflags=-r
-objcopy=$(CROSS_COMPILE_PREFIX)objcopy
+objcopy=$(CROSS_COMPILE)objcopy
 
 # Setup functions for compilation
 define dynamic_flags
diff --git a/README.md b/README.md
index 69a65c16773..7b142d56e98 100644
--- a/README.md
+++ b/README.md
@@ -27,7 +27,7 @@ OpenSBI provides three components:
 Building and Installing generic *libsbi.a*
 ------------------------------------------
 
-For cross-compiling, the environment variable *CROSS_COMPILE_PREFIX* must
+For cross-compiling, the environment variable *CROSS_COMPILE* must
 be defined to specify the toolchain executable name prefix, e.g.
 *riscv64-unknown-elf-* if the gcc executable used is
 *riscv64-unknown-elf-gcc*.

From 96f66f79ca022eb4b591d319675b5ee0854ca45f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 24 Dec 2018 16:45:00 +0530
Subject: [PATCH 0040/1765] lib: Move instruction encoding macros to
 riscv_encoding.h

This patch moves all instruction encoding macros to
riscv_encoding.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h | 117 +++++++++++++++++++++++++++++++++++
 include/sbi/sbi_bits.h       |  15 -----
 lib/sbi_illegal_insn.c       |  50 ---------------
 3 files changed, 117 insertions(+), 65 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a4407d2c002..1adc0c55b1a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -420,4 +420,121 @@
 #define CAUSE_LOAD_PAGE_FAULT		0xd
 #define CAUSE_STORE_PAGE_FAULT		0xf
 
+#define INSN_MATCH_LB			0x3
+#define INSN_MASK_LB			0x707f
+#define INSN_MATCH_LH			0x1003
+#define INSN_MASK_LH			0x707f
+#define INSN_MATCH_LW			0x2003
+#define INSN_MASK_LW			0x707f
+#define INSN_MATCH_LD			0x3003
+#define INSN_MASK_LD			0x707f
+#define INSN_MATCH_LBU			0x4003
+#define INSN_MASK_LBU			0x707f
+#define INSN_MATCH_LHU			0x5003
+#define INSN_MASK_LHU			0x707f
+#define INSN_MATCH_LWU			0x6003
+#define INSN_MASK_LWU			0x707f
+#define INSN_MATCH_SB			0x23
+#define INSN_MASK_SB			0x707f
+#define INSN_MATCH_SH			0x1023
+#define INSN_MASK_SH			0x707f
+#define INSN_MATCH_SW			0x2023
+#define INSN_MASK_SW			0x707f
+#define INSN_MATCH_SD			0x3023
+#define INSN_MASK_SD			0x707f
+
+#define INSN_MATCH_C_LD			0x6000
+#define INSN_MASK_C_LD			0xe003
+#define INSN_MATCH_C_SD			0xe000
+#define INSN_MASK_C_SD			0xe003
+#define INSN_MATCH_C_LW			0x4000
+#define INSN_MASK_C_LW			0xe003
+#define INSN_MATCH_C_SW			0xc000
+#define INSN_MASK_C_SW			0xe003
+#define INSN_MATCH_C_LDSP		0x6002
+#define INSN_MASK_C_LDSP		0xe003
+#define INSN_MATCH_C_SDSP		0xe002
+#define INSN_MASK_C_SDSP		0xe003
+#define INSN_MATCH_C_LWSP		0x4002
+#define INSN_MASK_C_LWSP		0xe003
+#define INSN_MATCH_C_SWSP		0xc002
+#define INSN_MASK_C_SWSP		0xe003
+
+#define INSN_MATCH_C_FLD		0x2000
+#define INSN_MASK_C_FLD			0xe003
+#define INSN_MATCH_C_FLW		0x6000
+#define INSN_MASK_C_FLW			0xe003
+#define INSN_MATCH_C_FSD		0xa000
+#define INSN_MASK_C_FSD			0xe003
+#define INSN_MATCH_C_FSW		0xe000
+#define INSN_MASK_C_FSW			0xe003
+#define INSN_MATCH_C_FLDSP		0x2002
+#define INSN_MASK_C_FLDSP		0xe003
+#define INSN_MATCH_C_FSDSP		0xa002
+#define INSN_MASK_C_FSDSP		0xe003
+#define INSN_MATCH_C_FLWSP		0x6002
+#define INSN_MASK_C_FLWSP		0xe003
+#define INSN_MATCH_C_FSWSP		0xe002
+#define INSN_MASK_C_FSWSP		0xe003
+
+#define INSN_LEN(insn)			((((insn) & 0x3) < 0x3) ? 2 : 4)
+
+#if __riscv_xlen == 64
+#define LOG_REGBYTES			3
+#else
+#define LOG_REGBYTES			2
+#endif
+#define REGBYTES			(1 << LOG_REGBYTES)
+
+#define SH_RD				7
+#define SH_RS1				15
+#define SH_RS2				20
+#define SH_RS2C				2
+
+#define RV_X(x, s, n)			(((x) >> (s)) & ((1 << (n)) - 1))
+#define RVC_LW_IMM(x)			((RV_X(x, 6, 1) << 2) | \
+					 (RV_X(x, 10, 3) << 3) | \
+					 (RV_X(x, 5, 1) << 6))
+#define RVC_LD_IMM(x)			((RV_X(x, 10, 3) << 3) | \
+					 (RV_X(x, 5, 2) << 6))
+#define RVC_LWSP_IMM(x)			((RV_X(x, 4, 3) << 2) | \
+					 (RV_X(x, 12, 1) << 5) | \
+					 (RV_X(x, 2, 2) << 6))
+#define RVC_LDSP_IMM(x)			((RV_X(x, 5, 2) << 3) | \
+					 (RV_X(x, 12, 1) << 5) | \
+					 (RV_X(x, 2, 3) << 6))
+#define RVC_SWSP_IMM(x)			((RV_X(x, 9, 4) << 2) | \
+					 (RV_X(x, 7, 2) << 6))
+#define RVC_SDSP_IMM(x)			((RV_X(x, 10, 3) << 3) | \
+					 (RV_X(x, 7, 3) << 6))
+#define RVC_RS1S(insn)			(8 + RV_X(insn, SH_RD, 3))
+#define RVC_RS2S(insn)			(8 + RV_X(insn, SH_RS2C, 3))
+#define RVC_RS2(insn)			RV_X(insn, SH_RS2C, 5)
+
+#define SHIFT_RIGHT(x, y)		\
+	((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
+
+#define REG_MASK			\
+	((1 << (5 + LOG_REGBYTES)) - (1 << LOG_REGBYTES))
+
+#define REG_OFFSET(insn, pos)		\
+	(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
+
+#define REG_PTR(insn, pos, regs)	\
+	(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
+
+#define GET_RM(insn)			(((insn) >> 12) & 7)
+
+#define GET_RS1(insn, regs)		(*REG_PTR(insn, SH_RS1, regs))
+#define GET_RS2(insn, regs)		(*REG_PTR(insn, SH_RS2, regs))
+#define GET_RS1S(insn, regs)		(*REG_PTR(RVC_RS1S(insn), 0, regs))
+#define GET_RS2S(insn, regs)		(*REG_PTR(RVC_RS2S(insn), 0, regs))
+#define GET_RS2C(insn, regs)		(*REG_PTR(insn, SH_RS2C, regs))
+#define GET_SP(regs)			(*REG_PTR(2, 0, regs))
+#define SET_RD(insn, regs, val)		(*REG_PTR(insn, SH_RD, regs) = (val))
+#define IMM_I(insn)			((s32)(insn) >> 20)
+#define IMM_S(insn)			(((s32)(insn) >> 25 << 5) | \
+					 (s32)(((insn) >> 7) & 0x1f))
+#define MASK_FUNCT3			0x7000
+
 #endif
diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
index 118fab23c9f..2a2f2a5c63b 100644
--- a/include/sbi/sbi_bits.h
+++ b/include/sbi/sbi_bits.h
@@ -26,19 +26,4 @@
 #define STR(x) XSTR(x)
 #define XSTR(x) #x
 
-#if __riscv_xlen == 64
-#define SLL32    sllw
-#define STORE    sd
-#define LOAD     ld
-#define LWU      lwu
-#define LOG_REGBYTES 3
-#else
-#define SLL32    sll
-#define STORE    sw
-#define LOAD     lw
-#define LWU      lw
-#define LOG_REGBYTES 2
-#endif
-#define REGBYTES (1 << LOG_REGBYTES)
-
 #endif
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index e8edd0e4bc2..9383df47e4c 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -16,56 +16,6 @@
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
-#define SH_RD			7
-#define SH_RS1			15
-#define SH_RS2			20
-#define SH_RS2C			2
-
-#define RV_X(x, s, n)		(((x) >> (s)) & ((1 << (n)) - 1))
-#define RVC_LW_IMM(x)		((RV_X(x, 6, 1) << 2) | \
-				 (RV_X(x, 10, 3) << 3) | \
-				 (RV_X(x, 5, 1) << 6))
-#define RVC_LD_IMM(x)		((RV_X(x, 10, 3) << 3) | \
-				 (RV_X(x, 5, 2) << 6))
-#define RVC_LWSP_IMM(x)		((RV_X(x, 4, 3) << 2) | \
-				 (RV_X(x, 12, 1) << 5) | \
-				 (RV_X(x, 2, 2) << 6))
-#define RVC_LDSP_IMM(x)		((RV_X(x, 5, 2) << 3) | \
-				 (RV_X(x, 12, 1) << 5) | \
-				 (RV_X(x, 2, 3) << 6))
-#define RVC_SWSP_IMM(x)		((RV_X(x, 9, 4) << 2) | \
-				 (RV_X(x, 7, 2) << 6))
-#define RVC_SDSP_IMM(x)		((RV_X(x, 10, 3) << 3) | \
-				 (RV_X(x, 7, 3) << 6))
-#define RVC_RS1S(insn)		(8 + RV_X(insn, SH_RD, 3))
-#define RVC_RS2S(insn)		(8 + RV_X(insn, SH_RS2C, 3))
-#define RVC_RS2(insn)		RV_X(insn, SH_RS2C, 5)
-
-#define SHIFT_RIGHT(x, y)	((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
-
-#define REG_MASK		\
-((1 << (5 + LOG_REGBYTES)) - (1 << LOG_REGBYTES))
-
-#define REG_OFFSET(insn, pos)	\
-(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
-
-#define REG_PTR(insn, pos, regs)\
-(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
-
-#define GET_RM(insn)		(((insn) >> 12) & 7)
-
-#define GET_RS1(insn, regs)	(*REG_PTR(insn, SH_RS1, regs))
-#define GET_RS2(insn, regs)	(*REG_PTR(insn, SH_RS2, regs))
-#define GET_RS1S(insn, regs)	(*REG_PTR(RVC_RS1S(insn), 0, regs))
-#define GET_RS2S(insn, regs)	(*REG_PTR(RVC_RS2S(insn), 0, regs))
-#define GET_RS2C(insn, regs)	(*REG_PTR(insn, SH_RS2C, regs))
-#define GET_SP(regs)		(*REG_PTR(2, 0, regs))
-#define SET_RD(insn, regs, val)	(*REG_PTR(insn, SH_RD, regs) = (val))
-#define IMM_I(insn)		((s32)(insn) >> 20)
-#define IMM_S(insn)		(((s32)(insn) >> 25 << 5) | \
-				 (s32)(((insn) >> 7) & 0x1f))
-#define MASK_FUNCT3		0x7000
-
 typedef int (*illegal_insn_func)(ulong insn,
 				 u32 hartid, ulong mcause,
 				 struct sbi_trap_regs *regs,

From b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 24 Dec 2018 16:49:01 +0530
Subject: [PATCH 0041/1765] lib: Add misaligned load/store trap handling

We generally don't get misaligned load/store traps from Linux/U-Boot
compiled using GCC 8.2 or higher but this is not true with older
GCC toolchains. To tackle this we add misaligned load/store trap
handling adopted from BBL sources but much more simpler.
(Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git)

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_misaligned_ldst.h |  26 ++++++
 lib/objects.mk                    |   1 +
 lib/sbi_misaligned_ldst.c         | 129 ++++++++++++++++++++++++++++++
 lib/sbi_trap.c                    |  11 ++-
 4 files changed, 166 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi/sbi_misaligned_ldst.h
 create mode 100644 lib/sbi_misaligned_ldst.c

diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h
new file mode 100644
index 00000000000..16419586368
--- /dev/null
+++ b/include/sbi/sbi_misaligned_ldst.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __SBI_MISALIGNED_LDST_H__
+#define __SBI_MISALIGNED_LDST_H__
+
+#include <sbi/sbi_types.h>
+
+struct sbi_trap_regs;
+struct sbi_scratch;
+
+int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
+				struct sbi_trap_regs *regs,
+				struct sbi_scratch *scratch);
+
+int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
+				 struct sbi_trap_regs *regs,
+				 struct sbi_scratch *scratch);
+
+#endif
diff --git a/lib/objects.mk b/lib/objects.mk
index ed14677f2a9..b70557ddad7 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -18,6 +18,7 @@ lib-objs-y += sbi_hart.o
 lib-objs-y += sbi_illegal_insn.o
 lib-objs-y += sbi_init.o
 lib-objs-y += sbi_ipi.o
+lib-objs-y += sbi_misaligned_ldst.o
 lib-objs-y += sbi_system.o
 lib-objs-y += sbi_timer.o
 lib-objs-y += sbi_trap.o
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
new file mode 100644
index 00000000000..b35e919ac70
--- /dev/null
+++ b/lib/sbi_misaligned_ldst.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
+
+union reg_data {
+	u8 data_bytes[8];
+	ulong data_ulong;
+	u64 data_u64;
+};
+
+int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
+				struct sbi_trap_regs *regs,
+				struct sbi_scratch *scratch)
+{
+	union reg_data val;
+	ulong mstatus = csr_read(mstatus);
+	ulong insn = get_insn(regs->mepc, &mstatus);
+	ulong addr = csr_read(mtval);
+	int i, shift = 0, len = 0;
+
+	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
+		len = 4;
+		shift = 8 * (sizeof(ulong) - len);
+#if __riscv_xlen == 64
+	} else if ((insn & INSN_MASK_LD) == INSN_MATCH_LD) {
+		len = 8;
+		shift = 8 * (sizeof(ulong) - len);
+	} else if ((insn & INSN_MASK_LWU) == INSN_MATCH_LWU) {
+		len = 4;
+#endif
+	} else if ((insn & INSN_MASK_LH) == INSN_MATCH_LH) {
+		len = 2;
+		shift = 8 * (sizeof(ulong) - len);
+	} else if ((insn & INSN_MASK_LHU) == INSN_MATCH_LHU) {
+		len = 2;
+#ifdef __riscv_compressed
+# if __riscv_xlen >= 64
+	} else if ((insn & INSN_MASK_C_LD) == INSN_MATCH_C_LD) {
+		len = 8;
+		shift = 8 * (sizeof(ulong) - len);
+		insn = RVC_RS2S(insn) << SH_RD;
+	} else if ((insn & INSN_MASK_C_LDSP) == INSN_MATCH_C_LDSP &&
+		   ((insn >> SH_RD) & 0x1f)) {
+		len = 8;
+		shift = 8 * (sizeof(ulong) - len);
+# endif
+	} else if ((insn & INSN_MASK_C_LW) ==INSN_MATCH_C_LW) {
+		len = 4;
+		shift = 8 * (sizeof(ulong) - len);
+		insn = RVC_RS2S(insn) << SH_RD;
+	} else if ((insn & INSN_MASK_C_LWSP) == INSN_MATCH_C_LWSP &&
+		   ((insn >> SH_RD) & 0x1f)) {
+		len = 4;
+		shift = 8 * (sizeof(ulong) - len);
+#endif
+	} else
+		return SBI_EILL;
+
+	val.data_u64 = 0;
+	for (i = 0; i < len; i++)
+		val.data_bytes[i] = load_u8((void *)(addr + i), regs->mepc);
+
+	SET_RD(insn, regs, val.data_ulong << shift >> shift);
+
+	regs->mepc += INSN_LEN(insn);
+
+	return 0;
+}
+
+int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
+				 struct sbi_trap_regs *regs,
+				 struct sbi_scratch *scratch)
+{
+	union reg_data val;
+	ulong mstatus = csr_read(mstatus);
+	ulong insn = get_insn(regs->mepc, &mstatus);
+	ulong addr = csr_read(mtval);
+	int i, len = 0;
+
+	val.data_ulong = GET_RS2(insn, regs);
+
+	if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
+		len = 4;
+#if __riscv_xlen == 64
+	} else if ((insn & INSN_MASK_SD) == INSN_MATCH_SD) {
+		len = 8;
+#endif
+	} else if ((insn & INSN_MASK_SH) == INSN_MATCH_SH) {
+		len = 2;
+#ifdef __riscv_compressed
+# if __riscv_xlen >= 64
+	} else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
+		len = 8;
+		val.data_ulong = GET_RS2S(insn, regs);
+	} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP &&
+		   ((insn >> SH_RD) & 0x1f)) {
+		len = 8;
+		val.data_ulong = GET_RS2C(insn, regs);
+# endif
+	} else if ((insn & INSN_MASK_C_SW) == INSN_MATCH_C_SW) {
+		len = 4;
+		val.data_ulong = GET_RS2S(insn, regs);
+	} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP &&
+		   ((insn >> SH_RD) & 0x1f)) {
+		len = 4;
+		val.data_ulong = GET_RS2C(insn, regs);
+#endif
+	} else
+		return SBI_EILL;
+
+	for (i = 0; i < len; i++)
+		store_u8((void *)(addr + i), val.data_bytes[i], regs->mepc);
+
+	regs->mepc += INSN_LEN(insn);
+
+	return 0;
+}
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 284bb74f009..012a9a001a2 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -12,9 +12,10 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_misaligned_ldst.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
@@ -95,6 +96,14 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		rc = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
 		msg = "illegal instruction handler failed";
 		break;
+	case CAUSE_MISALIGNED_LOAD:
+		rc = sbi_misaligned_load_handler(hartid, mcause, regs, scratch);
+		msg = "misaligned load handler failed";
+		break;
+	case CAUSE_MISALIGNED_STORE:
+		rc = sbi_misaligned_store_handler(hartid, mcause, regs, scratch);
+		msg = "misaligned store handler failed";
+		break;
 	case CAUSE_SUPERVISOR_ECALL:
 	case CAUSE_HYPERVISOR_ECALL:
 		rc = sbi_ecall_handler(hartid, mcause, regs, scratch);

From b46970b47e63dce030ef6d4196f7c395a9ea23c1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 09:42:26 +0530
Subject: [PATCH 0042/1765] lib: Move ECALL defines to sbi_ecall_interface.h

This patch moves all ECALL defines to sbi_ecall_interface.h so
that it can be shared with firmware payloads.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 39 +++++++++++++++++++++++++++++++
 lib/sbi_ecall.c                   | 11 +--------
 2 files changed, 40 insertions(+), 10 deletions(-)
 create mode 100644 include/sbi/sbi_ecall_interface.h

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
new file mode 100644
index 00000000000..53de6a4de8c
--- /dev/null
+++ b/include/sbi/sbi_ecall_interface.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __SBI_ECALL_INTERFACE_H__
+#define __SBI_ECALL_INTERFACE_H__
+
+#define SBI_ECALL_SET_TIMER			0
+#define SBI_ECALL_CONSOLE_PUTCHAR		1
+#define SBI_ECALL_CONSOLE_GETCHAR		2
+#define SBI_ECALL_CLEAR_IPI			3
+#define SBI_ECALL_SEND_IPI			4
+#define SBI_ECALL_REMOTE_FENCE_I		5
+#define SBI_ECALL_REMOTE_SFENCE_VMA		6
+#define SBI_ECALL_REMOTE_SFENCE_VMA_ASID	7
+#define SBI_ECALL_SHUTDOWN			8
+
+#define SBI_ECALL(__num, __a0, __a1, __a2) ({				\
+	register unsigned long a0 asm ("a0") = (unsigned long)(__a0);	\
+	register unsigned long a1 asm ("a1") = (unsigned long)(__a1);	\
+	register unsigned long a2 asm ("a2") = (unsigned long)(__a2);	\
+	register unsigned long a7 asm ("a7") = (unsigned long)(__num);\
+	asm volatile ("ecall"						\
+		      : "+r" (a0)					\
+		      : "r" (a1), "r" (a2), "r" (a7)			\
+		      : "memory");					\
+	a0;								\
+})
+
+#define SBI_ECALL_0(__num)			SBI_ECALL(__num, 0, 0, 0)
+#define SBI_ECALL_1(__num, __a0)		SBI_ECALL(__num, __a0, 0, 0)
+#define SBI_ECALL_2(__num, __a0, __a1)		SBI_ECALL(__num, __a0, __a1, 0)
+
+#endif
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 928a8b757be..731a6652a7b 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -9,6 +9,7 @@
 
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_system.h>
@@ -18,16 +19,6 @@
 #define SBI_ECALL_VERSION_MAJOR			0
 #define SBI_ECALL_VERSION_MINOR			1
 
-#define SBI_ECALL_SET_TIMER			0
-#define SBI_ECALL_CONSOLE_PUTCHAR		1
-#define SBI_ECALL_CONSOLE_GETCHAR		2
-#define SBI_ECALL_CLEAR_IPI			3
-#define SBI_ECALL_SEND_IPI			4
-#define SBI_ECALL_REMOTE_FENCE_I		5
-#define SBI_ECALL_REMOTE_SFENCE_VMA		6
-#define SBI_ECALL_REMOTE_SFENCE_VMA_ASID	7
-#define SBI_ECALL_SHUTDOWN			8
-
 u16 sbi_ecall_version_major(void)
 {
 	return SBI_ECALL_VERSION_MAJOR;

From bb3665d0f097745f5f081e687b7487f3bbed3500 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 09:44:49 +0530
Subject: [PATCH 0043/1765] firmware: Add separate dummy payload for FW_PAYLOAD

Currently, the default payload for FW_PAYLOAD is embedded
fw_payload.S itself. This means people have to hack fw_payload.S
if they want to have some temporary S-mode test code.

This patch adds a separate dummy payload for FW_PAYLOAD which
can be easily hacked for some S-mode testing.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/payloads/dummy.elf.ldS | 83 +++++++++++++++++++++++++++++++
 firmware/payloads/dummy_head.S  | 87 +++++++++++++++++++++++++++++++++
 firmware/payloads/dummy_main.c  | 31 ++++++++++++
 firmware/payloads/objects.mk    | 19 +++++++
 4 files changed, 220 insertions(+)
 create mode 100644 firmware/payloads/dummy.elf.ldS
 create mode 100644 firmware/payloads/dummy_head.S
 create mode 100644 firmware/payloads/dummy_main.c
 create mode 100644 firmware/payloads/objects.mk

diff --git a/firmware/payloads/dummy.elf.ldS b/firmware/payloads/dummy.elf.ldS
new file mode 100644
index 00000000000..b4d9f757841
--- /dev/null
+++ b/firmware/payloads/dummy.elf.ldS
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+
+SECTIONS
+{
+	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
+
+	PROVIDE(_payload_start = .);
+
+	. = ALIGN(0x1000); /* Need this to create proper sections */
+
+	/* Beginning of the code section */
+
+	.text :
+	{
+		PROVIDE(_text_start = .);
+		*(.entry)
+		*(.text)
+		. = ALIGN(8);
+		PROVIDE(_text_end = .);
+	}
+
+	. = ALIGN(0x1000); /* Ensure next section is page aligned */
+
+	/* End of the code sections */
+
+	/* Beginning of the read-only data sections */
+
+	. = ALIGN(0x1000); /* Ensure next section is page aligned */
+
+	.rodata :
+	{
+		PROVIDE(_rodata_start = .);
+		*(.rodata .rodata.*)
+		. = ALIGN(8);
+		PROVIDE(_rodata_end = .);
+	}
+
+	/* End of the read-only data sections */
+
+	/* Beginning of the read-write data sections */
+
+	. = ALIGN(0x1000); /* Ensure next section is page aligned */
+
+	.data :
+	{
+		PROVIDE(_data_start = .);
+
+		*(.data)
+		*(.data.*)
+		*(.readmostly.data)
+		*(*.data)
+		. = ALIGN(8);
+
+		PROVIDE(_data_end = .);
+	}
+
+	. = ALIGN(0x1000); /* Ensure next section is page aligned */
+
+	.bss :
+	{
+		PROVIDE(_bss_start = .);
+		*(.bss)
+		*(.bss.*)
+		. = ALIGN(8);
+		PROVIDE(_bss_end = .);
+	}
+
+	/* End of the read-write data sections */
+
+	. = ALIGN(0x1000); /* Need this to create proper sections */
+
+	PROVIDE(_payload_end = .);
+}
diff --git a/firmware/payloads/dummy_head.S b/firmware/payloads/dummy_head.S
new file mode 100644
index 00000000000..1b36319e84b
--- /dev/null
+++ b/firmware/payloads/dummy_head.S
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#define __ASM_STR(x)	x
+
+#if __riscv_xlen == 64
+#define __REG_SEL(a, b)		__ASM_STR(a)
+#define RISCV_PTR		.dword
+#elif __riscv_xlen == 32
+#define __REG_SEL(a, b)		__ASM_STR(b)
+#define RISCV_PTR		.word
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+#define REG_L		__REG_SEL(ld, lw)
+#define REG_S		__REG_SEL(sd, sw)
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.globl _start
+_start:
+	/* Pick one hart to run the main boot sequence */
+	la	a3, _hart_lottery
+	li	a2, 1
+	amoadd.w a3, a2, (a3)
+	bnez	a3, _start_hang
+
+	/* Save a0 and a1 */
+	la	a3, _boot_a0
+	REG_S	a0, 0(a3)
+	la	a3, _boot_a1
+	REG_S	a1, 0(a3)
+
+	/* Zero-out BSS */
+	la	a4, _bss_start
+	la	a5, _bss_end
+_bss_zero:
+	REG_S	zero, (a4)
+	add	a4, a4, __SIZEOF_POINTER__
+	blt	a4, a5, _bss_zero
+
+_start_warm:
+	/* Disable and clear all interrupts */
+	csrw	sie, zero
+	csrw	sip, zero
+
+	/* Setup exception vectors */
+	la	a3, _start_hang
+	csrw	stvec, a3
+
+	/* Setup stack */
+	la	a3, _payload_end
+	li	a4, 0x2000
+	add	sp, a3, a4
+
+	/* Jump to C main */
+	la	a3, _boot_a0
+	REG_L	a0, 0(a3)
+	la	a3, _boot_a1
+	REG_L	a1, 0(a3)
+	call	dummy_main
+
+	/* We don't expect to reach here hence just hang */
+	j	_start_hang
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.globl _start_hang
+_start_hang:
+	wfi
+	j	_start_hang
+
+	.align	3
+	.section .entry, "ax", %progbits
+_hart_lottery:
+	RISCV_PTR	0
+_boot_a0:
+	RISCV_PTR	0
+_boot_a1:
+	RISCV_PTR	0
diff --git a/firmware/payloads/dummy_main.c b/firmware/payloads/dummy_main.c
new file mode 100644
index 00000000000..d4bc3603b02
--- /dev/null
+++ b/firmware/payloads/dummy_main.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <sbi/sbi_ecall_interface.h>
+
+#define wfi()						\
+do {							\
+	__asm__ __volatile__ ("wfi" ::: "memory");	\
+} while (0)
+
+static void sbi_puts(const char *str)
+{
+	while (*str) {
+		SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, *str);
+		str++;
+	}
+}
+
+void dummy_main(unsigned long a0, unsigned long a1)
+{
+	sbi_puts("\nDummy Payload\n");
+
+	while (1)
+		wfi();
+}
diff --git a/firmware/payloads/objects.mk b/firmware/payloads/objects.mk
new file mode 100644
index 00000000000..7e82b773055
--- /dev/null
+++ b/firmware/payloads/objects.mk
@@ -0,0 +1,19 @@
+#
+# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+firmware-bins-$(FW_PAYLOAD) += payloads/dummy.bin
+
+dummy-y += dummy_head.o
+dummy-y += dummy_main.o
+
+%/dummy.o: $(foreach obj,$(dummy-y),%/$(obj))
+	$(call merge_objs,$@,$^)
+
+%/dummy.dep: $(foreach dep,$(dummy-y:.o=.dep),%/$(dep))
+	$(call merge_deps,$@,$^)

From 2d90226e04a6b886e9f09e6e1328600134f1a754 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 24 Dec 2018 10:53:10 +0530
Subject: [PATCH 0044/1765] firmware: Use dummy payload for FW_PAYLOAD

We use recently added separate dummy payload for FW_PAYLOAD
when FW_PAYLOAD_PATH is not specified.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                  |  5 ++++-
 firmware/external_deps.mk | 10 ++++++++++
 firmware/objects.mk       | 13 ++++++++-----
 3 files changed, 22 insertions(+), 6 deletions(-)
 create mode 100644 firmware/external_deps.mk

diff --git a/Makefile b/Makefile
index 9c55559aa3d..9c19729e24b 100644
--- a/Makefile
+++ b/Makefile
@@ -243,12 +243,15 @@ $(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.S
 $(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-# Dependency files should only be included after default Makefile rule
+# Dependency files should only be included after default Makefile rules
 # They should not be included for any "xxxconfig" or "xxxclean" rule
 all-deps-1 = $(if $(findstring config,$(MAKECMDGOALS)),,$(deps-y))
 all-deps-2 = $(if $(findstring clean,$(MAKECMDGOALS)),,$(all-deps-1))
 -include $(all-deps-2)
 
+# Include external dependency of firmwares after default Makefile rules
+include $(src_dir)/firmware/external_deps.mk
+
 install_targets-y  = install_libsbi
 ifdef PLATFORM
 install_targets-y += install_libplatsbi
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
new file mode 100644
index 00000000000..3a0847e9367
--- /dev/null
+++ b/firmware/external_deps.mk
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+$(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 9bed733de64..a8275f9f40b 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -7,10 +7,10 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-firmware-cppflags-y =
-firmware-cflags-y =
-firmware-asflags-y =
-firmware-ldflags-y =
+firmware-cppflags-y +=
+firmware-cflags-y +=
+firmware-asflags-y +=
+firmware-ldflags-y +=
 
 ifdef FW_TEXT_START
 firmware-cppflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
@@ -26,8 +26,11 @@ endif
 
 firmware-bins-$(FW_PAYLOAD) += fw_payload.bin
 ifdef FW_PAYLOAD_PATH
-firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH)
+FW_PAYLOAD_PATH_FINAL=$(FW_PAYLOAD_PATH)
+else
+FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/dummy.bin
 endif
+firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
 ifdef FW_PAYLOAD_OFFSET
 firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
 endif

From a4ce7931212dd71af0b1e30379eddfa4adac21f7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 24 Dec 2018 12:15:32 +0530
Subject: [PATCH 0045/1765] top: Improve inst_file_list() in Makefile for
 payloads installation

We now have payloads sub-directory under firmware directory which
means payload BINs and ELFs should be installed under firmware/payloads.

This patch improves inst_file_list() to handle payloads sub-directory
under firmware installation directory.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 9c19729e24b..33f4de6ba55 100644
--- a/Makefile
+++ b/Makefile
@@ -152,11 +152,15 @@ copy_file =  $(V)mkdir -p `dirname $(1)`; \
 inst_file =  $(V)mkdir -p `dirname $(1)`; \
 	     echo " INSTALL   $(subst $(install_dir)/,,$(1))"; \
 	     cp -f $(2) $(1)
-inst_file_list = $(V)if [ ! -z "$(3)" ]; then \
-	     mkdir -p $(1); \
-	     for f in $(3) ; do \
-	     echo " INSTALL   "$(2)"/"`basename $$f`; \
-	     cp -f $$f $(1); \
+inst_file_list = $(V)if [ ! -z "$(4)" ]; then \
+	     mkdir -p $(1)/$(3); \
+	     for file in $(4) ; do \
+	     rel_file=`echo $$file | sed -e 's@$(2)/$(3)/@@'`; \
+	     dest_file=$(1)"/"$(3)"/"`echo $$rel_file`; \
+	     dest_dir=`dirname $$dest_file`; \
+	     echo " INSTALL   "$(3)"/"`echo $$rel_file`; \
+	     mkdir -p $$dest_dir; \
+	     cp -f $$file $$dest_file; \
 	     done \
 	     fi
 inst_header_dir =  $(V)mkdir -p $(1); \
@@ -274,8 +278,8 @@ install_libplatsbi: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir
 
 .PHONY: install_firmwares
 install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
-	$(call inst_file_list,$(install_dir)/$(platform_subdir)/firmware,$(platform_subdir)/firmware,$(firmware-elfs-path-y))
-	$(call inst_file_list,$(install_dir)/$(platform_subdir)/firmware,$(platform_subdir)/firmware,$(firmware-bins-path-y))
+	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-elfs-path-y))
+	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
 # Rule for "make clean"
 .PHONY: clean

From 4c1d5a5d2dad51a90d2617cd9f4187e6eb8f4159 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 11:06:54 +0530
Subject: [PATCH 0046/1765] top: Improve 'clean' and 'distclean' makefile
 targets

This improves 'clean' and 'distclean' makefile target as follows:
1. Remove only .o, .a, .elf, and .bin files for 'clean'
2. Remove .dep in-addition to what 'clean' does for 'distclean'
3. Remove default build and install directory for 'distclean'

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 33f4de6ba55..346456548b1 100644
--- a/Makefile
+++ b/Makefile
@@ -284,20 +284,27 @@ install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)
 # Rule for "make clean"
 .PHONY: clean
 clean:
-ifeq ($(build_dir),$(CURDIR)/build)
 	$(V)mkdir -p $(build_dir)
-	$(if $(V), @echo " CLEAN     $(build_dir)")
-	$(V)find $(build_dir) -regex ".*\.\(o\|a\|elf\|bin\)" -type f -exec rm -rf {} +
-endif
+	$(if $(V), @echo " RM        <build_directory>/*.o")
+	$(V)find $(build_dir) -type f -name "*.o" -exec rm -rf {} +
+	$(if $(V), @echo " RM        <build_directory>/*.a")
+	$(V)find $(build_dir) -type f -name "*.a" -exec rm -rf {} +
+	$(if $(V), @echo " RM        <build_directory>/*.elf")
+	$(V)find $(build_dir) -type f -name "*.elf" -exec rm -rf {} +
+	$(if $(V), @echo " RM        <build_directory>/*.bin")
+	$(V)find $(build_dir) -type f -name "*.bin" -exec rm -rf {} +
 
 # Rule for "make distclean"
 .PHONY: distclean
-distclean:
+distclean: clean
+	$(V)mkdir -p $(build_dir)
+	$(if $(V), @echo " RM        <build_directory>/*.dep")
+	$(V)find $(build_dir) -type f -name "*.dep" -exec rm -rf {} +
 ifeq ($(build_dir),$(CURDIR)/build)
-	$(if $(V), @echo " RM        $(build_dir)")
+	$(if $(V), @echo " RM        <build_directory>")
 	$(V)rm -rf $(build_dir)
 endif
 ifeq ($(install_dir),$(CURDIR)/install)
-	$(if $(V), @echo " RM        $(install_dir)")
+	$(if $(V), @echo " RM        <install_directory>")
 	$(V)rm -rf $(install_dir)
 endif

From cfa3fba14f27f1fabaa8194d1ea1a6a21c2cc83a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 10:43:15 +0530
Subject: [PATCH 0047/1765] firmware: Rename fw_common.S to fw_base.S

The fw_common.S is the base firmware extendend by fw_jump and
fw_payload. This patch renames fw_common.S to fw_base.S to
have more clear/intutive name for base firmware.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/{fw_common.S => fw_base.S}     | 0
 firmware/{fw_common.ldS => fw_base.ldS} | 0
 firmware/fw_jump.S                      | 2 +-
 firmware/fw_jump.elf.ldS                | 2 +-
 firmware/fw_payload.S                   | 2 +-
 firmware/fw_payload.elf.ldS             | 2 +-
 6 files changed, 4 insertions(+), 4 deletions(-)
 rename firmware/{fw_common.S => fw_base.S} (100%)
 rename firmware/{fw_common.ldS => fw_base.ldS} (100%)

diff --git a/firmware/fw_common.S b/firmware/fw_base.S
similarity index 100%
rename from firmware/fw_common.S
rename to firmware/fw_base.S
diff --git a/firmware/fw_common.ldS b/firmware/fw_base.ldS
similarity index 100%
rename from firmware/fw_common.ldS
rename to firmware/fw_base.ldS
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index d05d87fe6fb..be9c296704b 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -7,7 +7,7 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
-#include "fw_common.S"
+#include "fw_base.S"
 
 	.align 3
 	.section .entry, "ax", %progbits
diff --git a/firmware/fw_jump.elf.ldS b/firmware/fw_jump.elf.ldS
index dfffbf6013e..8df45ab10a1 100644
--- a/firmware/fw_jump.elf.ldS
+++ b/firmware/fw_jump.elf.ldS
@@ -12,5 +12,5 @@ ENTRY(_start)
 
 SECTIONS
 {
-	#include "fw_common.ldS"
+	#include "fw_base.ldS"
 }
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index b6f3cb9642a..7cbd57b421b 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -7,7 +7,7 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
-#include "fw_common.S"
+#include "fw_base.S"
 
 	.align 3
 	.section .entry, "ax", %progbits
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index 201338b5a12..0713f436606 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -12,7 +12,7 @@ ENTRY(_start)
 
 SECTIONS
 {
-	#include "fw_common.ldS"
+	#include "fw_base.ldS"
 
 	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
 

From 7b59571758a5dec75c89928a60d982b29629cee6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 18:21:22 +0530
Subject: [PATCH 0048/1765] lib: Simplify sbi_platform early_init() and
 final_init() hooks

Instead of having separate early_init() and final_init() hooks
for cold and warm boot, this patch updates struct sbi_platform
to have just one early_init() and one final_init() hook. The
type of boot (cold or warm) is now a boolean flag parameter for
the updated early_init() and final_init() hooks.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h             | 36 +++++++-------------------
 include/sbi/sbi_system.h               | 10 +++----
 lib/sbi_init.c                         | 16 +++---------
 lib/sbi_system.c                       | 22 ++++++----------
 platform/kendryte/k210/platform.c      |  2 --
 platform/qemu/sifive_u/platform.c      | 10 ++++---
 platform/qemu/virt/platform.c          | 10 ++++---
 platform/sifive/hifive_u540/platform.c | 10 ++++---
 8 files changed, 47 insertions(+), 69 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 00fadde912e..e5c1896574c 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -34,10 +34,8 @@ struct sbi_platform {
 	u32 hart_count;
 	u32 hart_stack_size;
 	u64 disabled_hart_mask;
-	int (*cold_early_init)(void);
-	int (*cold_final_init)(void);
-	int (*warm_early_init)(u32 target_hart);
-	int (*warm_final_init)(u32 target_hart);
+	int (*early_init)(u32 hartid, bool cold_boot);
+	int (*final_init)(u32 hartid, bool cold_boot);
 	u32 (*pmp_region_count)(u32 target_hart);
 	int (*pmp_region_info)(u32 target_hart, u32 index,
 			       ulong *prot, ulong *addr, ulong *log2size);
@@ -105,33 +103,19 @@ static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
 	return 0;
 }
 
-static inline int sbi_platform_cold_early_init(struct sbi_platform *plat)
+static inline int sbi_platform_early_init(struct sbi_platform *plat,
+					  u32 hartid, bool cold_boot)
 {
-	if (plat && plat->cold_early_init)
-		return plat->cold_early_init();
+	if (plat && plat->early_init)
+		return plat->early_init(hartid, cold_boot);
 	return 0;
 }
 
-static inline int sbi_platform_cold_final_init(struct sbi_platform *plat)
+static inline int sbi_platform_final_init(struct sbi_platform *plat,
+					  u32 hartid, bool cold_boot)
 {
-	if (plat && plat->cold_final_init)
-		return plat->cold_final_init();
-	return 0;
-}
-
-static inline int sbi_platform_warm_early_init(struct sbi_platform *plat,
-					       u32 target_hart)
-{
-	if (plat && plat->warm_early_init)
-		return plat->warm_early_init(target_hart);
-	return 0;
-}
-
-static inline int sbi_platform_warm_final_init(struct sbi_platform *plat,
-					       u32 target_hart)
-{
-	if (plat && plat->warm_final_init)
-		return plat->warm_final_init(target_hart);
+	if (plat && plat->final_init)
+		return plat->final_init(hartid, cold_boot);
 	return 0;
 }
 
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index ac1fb361617..f37445ee1b3 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -14,13 +14,11 @@
 
 struct sbi_scratch;
 
-int sbi_system_warm_early_init(struct sbi_scratch *scratch, u32 hartid);
+int sbi_system_early_init(struct sbi_scratch *scratch, u32 hartid,
+			  bool cold_boot);
 
-int sbi_system_warm_final_init(struct sbi_scratch *scratch, u32 hartid);
-
-int sbi_system_cold_early_init(struct sbi_scratch *scratch);
-
-int sbi_system_cold_final_init(struct sbi_scratch *scratch);
+int sbi_system_final_init(struct sbi_scratch *scratch, u32 hartid,
+			  bool cold_boot);
 
 void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
 						 u32 type);
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 68113b4913f..1f5d923ef56 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -34,11 +34,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	char str[64];
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	rc = sbi_system_cold_early_init(scratch);
-	if (rc)
-		sbi_hart_hang();
-
-	rc = sbi_system_warm_early_init(scratch, hartid);
+	rc = sbi_system_early_init(scratch, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -74,11 +70,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_cold_final_init(scratch);
-	if (rc)
-		sbi_hart_hang();
-
-	rc = sbi_system_warm_final_init(scratch, hartid);
+	rc = sbi_system_final_init(scratch, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -125,7 +117,7 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 
-	rc = sbi_system_warm_early_init(scratch, hartid);
+	rc = sbi_system_early_init(scratch, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -145,7 +137,7 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_warm_final_init(scratch, hartid);
+	rc = sbi_system_final_init(scratch, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index cd250f54df9..f543cef25da 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -11,24 +11,18 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 
-int sbi_system_warm_early_init(struct sbi_scratch *scratch, u32 hartid)
+int sbi_system_early_init(struct sbi_scratch *scratch, u32 hartid,
+			  bool cold_boot)
 {
-	return sbi_platform_warm_early_init(sbi_platform_ptr(scratch), hartid);
+	return sbi_platform_early_init(sbi_platform_ptr(scratch),
+					hartid, cold_boot);
 }
 
-int sbi_system_warm_final_init(struct sbi_scratch *scratch, u32 hartid)
+int sbi_system_final_init(struct sbi_scratch *scratch, u32 hartid,
+			  bool cold_boot)
 {
-	return sbi_platform_warm_final_init(sbi_platform_ptr(scratch), hartid);
-}
-
-int sbi_system_cold_early_init(struct sbi_scratch *scratch)
-{
-	return sbi_platform_cold_early_init(sbi_platform_ptr(scratch));
-}
-
-int sbi_system_cold_final_init(struct sbi_scratch *scratch)
-{
-	return sbi_platform_cold_final_init(sbi_platform_ptr(scratch));
+	return sbi_platform_final_init(sbi_platform_ptr(scratch),
+					hartid, cold_boot);
 }
 
 void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 226cb775ca2..ccb0ad6692b 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -102,8 +102,6 @@ struct sbi_platform platform = {
 	.timer_event_start = clint_timer_event_start,
 	.warm_timer_init = clint_warm_timer_init,
 
-	.cold_final_init = NULL,
-
 	.system_reboot = k210_system_reboot,
 	.system_shutdown = k210_system_shutdown
 };
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index f593323a8fc..bbbe055a124 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -29,11 +29,15 @@
 #define SIFIVE_U_UART0_ADDR			0x10013000
 #define SIFIVE_U_UART1_ADDR			0x10023000
 
-static int sifive_u_cold_final_init(void)
+static int sifive_u_final_init(u32 hartid, bool cold_boot)
 {
 	u32 i;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt;
 
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
 	for (i = 0; i < SIFIVE_U_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
 
@@ -110,7 +114,7 @@ struct sbi_platform platform = {
 	.disabled_hart_mask = 0,
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,
-	.cold_final_init = sifive_u_cold_final_init,
+	.final_init = sifive_u_final_init,
 	.console_putc = sifive_uart_putc,
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 98357cfc680..9e0d21a2bf3 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -29,11 +29,15 @@
 #define VIRT_UART_BAUDRATE		115200
 #define VIRT_UART_SHIFTREG_ADDR		1843200
 
-static int virt_cold_final_init(void)
+static int virt_final_init(u32 hartid, bool cold_boot)
 {
 	u32 i;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt;
 
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
 	for (i = 0; i < VIRT_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
 
@@ -111,7 +115,7 @@ struct sbi_platform platform = {
 	.disabled_hart_mask = 0,
 	.pmp_region_count = virt_pmp_region_count,
 	.pmp_region_info = virt_pmp_region_info,
-	.cold_final_init = virt_cold_final_init,
+	.final_init = virt_final_init,
 	.console_putc = uart8250_putc,
 	.console_getc = uart8250_getc,
 	.console_init = virt_console_init,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 1e600a3e34d..2db5dae8ef4 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -38,11 +38,15 @@
 #define SIFIVE_PRCI_CLKMUXSTATUSREG    		0x002C
 #define SIFIVE_PRCI_CLKMUX_STATUS_TLCLKSEL      (0x1 << 1)
 
-static int sifive_u_cold_final_init(void)
+static int sifive_u_final_init(u32 hartid, bool cold_boot)
 {
 	u32 i;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt;
 
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
 	plic_fdt_fixup(fdt, "riscv,plic0", 0);
 	for (i = 1; i < SIFIVE_U_HART_COUNT; i++)
 		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
@@ -130,7 +134,7 @@ struct sbi_platform platform = {
 	.disabled_hart_mask = ~(1 << SIFIVE_U_HARITD_ENABLED),
 	.pmp_region_count = sifive_u_pmp_region_count,
 	.pmp_region_info = sifive_u_pmp_region_info,
-	.cold_final_init = sifive_u_cold_final_init,
+	.final_init = sifive_u_final_init,
 	.console_putc = sifive_uart_putc,
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,

From e34aa8a6719dd6c225e576e0617d05735776af6f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 18:27:35 +0530
Subject: [PATCH 0049/1765] lib: Simplify sbi_platform irqchip_init() hooks

Instead of having separate irqchip_init() hooks for cold and
warm boot, this patch updates struct sbi_platform to have just
one irqchip_init() hook. The type of boot (cold or warm) is now
a boolean flag parameter for the updated irqchip_init() hook.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h             | 18 +++++------------
 lib/sbi_init.c                         |  8 ++------
 platform/kendryte/k210/platform.c      | 27 ++++++++++++++-----------
 platform/qemu/sifive_u/platform.c      | 28 ++++++++++++++------------
 platform/qemu/virt/platform.c          | 28 ++++++++++++++------------
 platform/sifive/hifive_u540/platform.c | 26 +++++++++++++-----------
 6 files changed, 66 insertions(+), 69 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e5c1896574c..503669b3596 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -42,8 +42,7 @@ struct sbi_platform {
 	void (*console_putc)(char ch);
 	char (*console_getc)(void);
 	int (*console_init)(void);
-	int (*cold_irqchip_init)(void);
-	int (*warm_irqchip_init)(u32 target_hart);
+	int (*irqchip_init)(u32 hartid, bool cold_boot);
 	void (*ipi_inject)(u32 target_hart, u32 source_hart);
 	void (*ipi_sync)(u32 target_hart, u32 source_hart);
 	void (*ipi_clear)(u32 target_hart);
@@ -159,18 +158,11 @@ static inline int sbi_platform_console_init(struct sbi_platform *plat)
 	return 0;
 }
 
-static inline int sbi_platform_warm_irqchip_init(struct sbi_platform *plat,
-						 u32 target_hart)
-{
-	if (plat && plat->warm_irqchip_init)
-		return plat->warm_irqchip_init(target_hart);
-	return 0;
-}
-
-static inline int sbi_platform_cold_irqchip_init(struct sbi_platform *plat)
+static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
+					    u32 hartid, bool cold_boot)
 {
-	if (plat && plat->cold_irqchip_init)
-		return plat->cold_irqchip_init();
+	if (plat && plat->irqchip_init)
+		return plat->irqchip_init(hartid, cold_boot);
 	return 0;
 }
 
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 1f5d923ef56..448102e504d 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -46,11 +46,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_cold_irqchip_init(plat);
-	if (rc)
-		sbi_hart_hang();
-
-	rc = sbi_platform_warm_irqchip_init(plat, hartid);
+	rc = sbi_platform_irqchip_init(plat, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -125,7 +121,7 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_warm_irqchip_init(plat, hartid);
+	rc = sbi_platform_irqchip_init(plat, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index ccb0ad6692b..43c32440bad 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -35,17 +35,21 @@ static char k210_console_getc(void)
 	return uarths_getc();
 }
 
-static int k210_cold_irqchip_init(void)
+static int k210_irqchip_init(u32 hartid, bool cold_boot)
 {
-	return plic_cold_irqchip_init(PLIC_BASE_ADDR, PLIC_NUM_SOURCES,
-				      K210_HART_COUNT);
-}
-
-static int k210_warm_irqchip_init(u32 core_id)
-{
-	return plic_warm_irqchip_init(core_id,
-				      (2 * core_id),
-				      (2 * core_id + 1));
+	int rc;
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(PLIC_BASE_ADDR,
+					    PLIC_NUM_SOURCES,
+					    K210_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return plic_warm_irqchip_init(hartid,
+				      (2 * hartid),
+				      (2 * hartid + 1));
 }
 
 static int k210_cold_ipi_init(void)
@@ -87,8 +91,7 @@ struct sbi_platform platform = {
 	.console_putc = k210_console_putc,
 	.console_getc = k210_console_getc,
 
-	.cold_irqchip_init = k210_cold_irqchip_init,
-	.warm_irqchip_init = k210_warm_irqchip_init,
+	.irqchip_init = k210_irqchip_init,
 
 	.cold_ipi_init = k210_cold_ipi_init,
 	.warm_ipi_init = clint_warm_ipi_init,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index bbbe055a124..db6dccd5b98 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -74,18 +74,21 @@ static int sifive_u_console_init(void)
 				SIFIVE_U_PERIPH_CLK, 115200);
 }
 
-static int sifive_u_cold_irqchip_init(void)
+static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
 {
-	return plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
-				      SIFIVE_U_PLIC_NUM_SOURCES,
-				      SIFIVE_U_HART_COUNT);
-}
-
-static int sifive_u_warm_irqchip_init(u32 target_hart)
-{
-	return plic_warm_irqchip_init(target_hart,
-				      (2 * target_hart),
-				      (2 * target_hart + 1));
+	int rc;
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
+					    SIFIVE_U_PLIC_NUM_SOURCES,
+					    SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return plic_warm_irqchip_init(hartid,
+				      (2 * hartid),
+				      (2 * hartid + 1));
 }
 
 static int sifive_u_cold_ipi_init(void)
@@ -118,8 +121,7 @@ struct sbi_platform platform = {
 	.console_putc = sifive_uart_putc,
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
-	.cold_irqchip_init = sifive_u_cold_irqchip_init,
-	.warm_irqchip_init = sifive_u_warm_irqchip_init,
+	.irqchip_init = sifive_u_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 9e0d21a2bf3..986dfc57e57 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -75,18 +75,21 @@ static int virt_console_init(void)
 			     VIRT_UART_BAUDRATE, 0, 1);
 }
 
-static int virt_cold_irqchip_init(void)
+static int virt_irqchip_init(u32 hartid, bool cold_boot)
 {
-	return plic_cold_irqchip_init(VIRT_PLIC_ADDR,
-				      VIRT_PLIC_NUM_SOURCES,
-				      VIRT_HART_COUNT);
-}
-
-static int virt_warm_irqchip_init(u32 target_hart)
-{
-	return plic_warm_irqchip_init(target_hart,
-				      (2 * target_hart),
-				      (2 * target_hart + 1));
+	int rc;
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(VIRT_PLIC_ADDR,
+					    VIRT_PLIC_NUM_SOURCES,
+					    VIRT_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return plic_warm_irqchip_init(hartid,
+				      (2 * hartid),
+				      (2 * hartid + 1));
 }
 
 static int virt_cold_ipi_init(void)
@@ -119,8 +122,7 @@ struct sbi_platform platform = {
 	.console_putc = uart8250_putc,
 	.console_getc = uart8250_getc,
 	.console_init = virt_console_init,
-	.cold_irqchip_init = virt_cold_irqchip_init,
-	.warm_irqchip_init = virt_warm_irqchip_init,
+	.irqchip_init = virt_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 2db5dae8ef4..6d6ac182336 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -94,18 +94,21 @@ static int sifive_u_console_init(void)
 				peri_in_freq, SIFIVE_UART_BAUDRATE);
 }
 
-static int sifive_u_cold_irqchip_init(void)
+static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
 {
-	return plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
-				      SIFIVE_U_PLIC_NUM_SOURCES,
-				      SIFIVE_U_HART_COUNT);
-}
+	int rc;
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
+					    SIFIVE_U_PLIC_NUM_SOURCES,
+					    SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+	}
 
-static int sifive_u_warm_irqchip_init(u32 target_hart)
-{
-	return plic_warm_irqchip_init(target_hart,
-			(target_hart) ? (2 * target_hart - 1) : 0,
-			(target_hart) ? (2 * target_hart) : -1);
+	return plic_warm_irqchip_init(hartid,
+			(hartid) ? (2 * hartid - 1) : 0,
+			(hartid) ? (2 * hartid) : -1);
 }
 
 static int sifive_u_cold_ipi_init(void)
@@ -138,8 +141,7 @@ struct sbi_platform platform = {
 	.console_putc = sifive_uart_putc,
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
-	.cold_irqchip_init = sifive_u_cold_irqchip_init,
-	.warm_irqchip_init = sifive_u_warm_irqchip_init,
+	.irqchip_init = sifive_u_irqchip_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,

From c1b6200653c51642e544c66fab8bb320969b818e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 18:36:11 +0530
Subject: [PATCH 0050/1765] lib: Simplify sbi_platform ipi_init() hooks

Instead of having separate ipi_init() hooks for cold and warm boot,
this patch updates struct sbi_platform to have just one ipi_init()
hook. The type of boot (cold or warm) is now a boolean flag parameter
for the updated ipi_init() hook.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ipi.h                  |  4 +---
 include/sbi/sbi_platform.h             | 18 +++++-------------
 lib/sbi_init.c                         |  8 ++------
 lib/sbi_ipi.c                          | 10 +++-------
 platform/kendryte/k210/platform.c      | 16 ++++++++++++----
 platform/qemu/sifive_u/platform.c      | 17 ++++++++++++-----
 platform/qemu/virt/platform.c          | 17 ++++++++++++-----
 platform/sifive/hifive_u540/platform.c | 18 +++++++++++++-----
 8 files changed, 60 insertions(+), 48 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 40581946af9..d7c05765def 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -26,8 +26,6 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid);
 
 void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid);
 
-int sbi_ipi_warm_init(struct sbi_scratch *scratch, u32 hartid);
-
-int sbi_ipi_cold_init(struct sbi_scratch *scratch);
+int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 
 #endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 503669b3596..13c9ffc7484 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -46,8 +46,7 @@ struct sbi_platform {
 	void (*ipi_inject)(u32 target_hart, u32 source_hart);
 	void (*ipi_sync)(u32 target_hart, u32 source_hart);
 	void (*ipi_clear)(u32 target_hart);
-	int (*cold_ipi_init)(void);
-	int (*warm_ipi_init)(u32 target_hart);
+	int (*ipi_init)(u32 hartid, bool cold_boot);
 	u64 (*timer_value)(void);
 	void (*timer_event_stop)(u32 target_hart);
 	void (*timer_event_start)(u32 target_hart, u64 next_event);
@@ -187,18 +186,11 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
 		plat->ipi_clear(target_hart);
 }
 
-static inline int sbi_platform_warm_ipi_init(struct sbi_platform *plat,
-					     u32 target_hart)
+static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
+					u32 hartid, bool cold_boot)
 {
-	if (plat && plat->warm_ipi_init)
-		return plat->warm_ipi_init(target_hart);
-	return 0;
-}
-
-static inline int sbi_platform_cold_ipi_init(struct sbi_platform *plat)
-{
-	if (plat && plat->cold_ipi_init)
-		return plat->cold_ipi_init();
+	if (plat && plat->ipi_init)
+		return plat->ipi_init(hartid, cold_boot);
 	return 0;
 }
 
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 448102e504d..989cb7d79b3 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -50,11 +50,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_ipi_cold_init(scratch);
-	if (rc)
-		sbi_hart_hang();
-
-	rc = sbi_ipi_warm_init(scratch, hartid);
+	rc = sbi_ipi_init(scratch, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -125,7 +121,7 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_ipi_warm_init(scratch, hartid);
+	rc = sbi_ipi_init(scratch, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index d21ea4a2f05..423a9a0984d 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -68,15 +68,11 @@ void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid)
 	scratch->ipi_type = 0;
 }
 
-int sbi_ipi_warm_init(struct sbi_scratch *scratch, u32 hartid)
+int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	/* Enable software interrupts */
 	csr_set(mie, MIP_MSIP);
 
-	return sbi_platform_warm_ipi_init(sbi_platform_ptr(scratch), hartid);
-}
-
-int sbi_ipi_cold_init(struct sbi_scratch *scratch)
-{
-	return sbi_platform_cold_ipi_init(sbi_platform_ptr(scratch));
+	return sbi_platform_ipi_init(sbi_platform_ptr(scratch),
+				     hartid, cold_boot);
 }
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 43c32440bad..d11dd66e4f1 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -52,9 +52,18 @@ static int k210_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int k210_cold_ipi_init(void)
+static int k210_ipi_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_ipi_init(CLINT_BASE_ADDR, K210_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(CLINT_BASE_ADDR,
+					 K210_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_ipi_init(hartid);
 }
 
 static int k210_cold_timer_init(void)
@@ -93,8 +102,7 @@ struct sbi_platform platform = {
 
 	.irqchip_init = k210_irqchip_init,
 
-	.cold_ipi_init = k210_cold_ipi_init,
-	.warm_ipi_init = clint_warm_ipi_init,
+	.ipi_init = k210_ipi_init,
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index db6dccd5b98..4e6ac4832e7 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -91,10 +91,18 @@ static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int sifive_u_cold_ipi_init(void)
+static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-				   SIFIVE_U_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
+					 SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_ipi_init(hartid);
 }
 
 static int sifive_u_cold_timer_init(void)
@@ -125,8 +133,7 @@ struct sbi_platform platform = {
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
-	.warm_ipi_init = clint_warm_ipi_init,
-	.cold_ipi_init = sifive_u_cold_ipi_init,
+	.ipi_init = sifive_u_ipi_init,
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 986dfc57e57..f9dce4a7235 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -92,10 +92,18 @@ static int virt_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int virt_cold_ipi_init(void)
+static int virt_ipi_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_ipi_init(VIRT_CLINT_ADDR,
-				   VIRT_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(VIRT_CLINT_ADDR,
+					 VIRT_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_ipi_init(hartid);
 }
 
 static int virt_cold_timer_init(void)
@@ -126,8 +134,7 @@ struct sbi_platform platform = {
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
-	.warm_ipi_init = clint_warm_ipi_init,
-	.cold_ipi_init = virt_cold_ipi_init,
+	.ipi_init = virt_ipi_init,
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index 6d6ac182336..fabb73e8eb3 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -111,10 +111,19 @@ static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
 			(hartid) ? (2 * hartid) : -1);
 }
 
-static int sifive_u_cold_ipi_init(void)
+static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-				   SIFIVE_U_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
+					 SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+
+	}
+
+	return clint_warm_ipi_init(hartid);
 }
 
 static int sifive_u_cold_timer_init(void)
@@ -145,8 +154,7 @@ struct sbi_platform platform = {
 	.ipi_inject = clint_ipi_inject,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
-	.warm_ipi_init = clint_warm_ipi_init,
-	.cold_ipi_init = sifive_u_cold_ipi_init,
+	.ipi_init = sifive_u_ipi_init,
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,

From 52ed1d17092bbe93a34802a55ff19cc7cbb7f85d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 18:44:54 +0530
Subject: [PATCH 0051/1765] lib: Simplify sbi_platform timer_init() hooks

Instead of having separate timer_init() hooks for cold and
warm boot, this patch updates struct sbi_platform to have just
one timer_init() hook. The type of boot (cold or warm) is now
a boolean flag parameter for the updated timer_init() hook.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h             | 18 +++++-------------
 include/sbi/sbi_timer.h                |  5 ++---
 lib/sbi_init.c                         |  8 ++------
 lib/sbi_timer.c                        | 11 ++++-------
 platform/kendryte/k210/platform.c      | 16 ++++++++++++----
 platform/qemu/sifive_u/platform.c      | 17 ++++++++++++-----
 platform/qemu/virt/platform.c          | 17 ++++++++++++-----
 platform/sifive/hifive_u540/platform.c | 17 ++++++++++++-----
 8 files changed, 61 insertions(+), 48 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 13c9ffc7484..29e66102c1b 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -50,8 +50,7 @@ struct sbi_platform {
 	u64 (*timer_value)(void);
 	void (*timer_event_stop)(u32 target_hart);
 	void (*timer_event_start)(u32 target_hart, u64 next_event);
-	int (*cold_timer_init)(void);
-	int (*warm_timer_init)(u32 target_hart);
+	int (*timer_init)(u32 hartid, bool cold_boot);
 	int (*system_reboot)(u32 type);
 	int (*system_shutdown)(u32 type);
 } __attribute__((packed));
@@ -216,18 +215,11 @@ static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
 		plat->timer_event_start(target_hart, next_event);
 }
 
-static inline int sbi_platform_warm_timer_init(struct sbi_platform *plat,
-					       u32 target_hart)
-{
-	if (plat && plat->warm_timer_init)
-		return plat->warm_timer_init(target_hart);
-	return 0;
-}
-
-static inline int sbi_platform_cold_timer_init(struct sbi_platform *plat)
+static inline int sbi_platform_timer_init(struct sbi_platform *plat,
+					  u32 hartid, bool cold_boot)
 {
-	if (plat && plat->cold_timer_init)
-		return plat->cold_timer_init();
+	if (plat && plat->timer_init)
+		return plat->timer_init(hartid, cold_boot);
 	return 0;
 }
 
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 914e9c01b7e..601c27c8a71 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -23,8 +23,7 @@ void sbi_timer_event_start(struct sbi_scratch *scratch, u32 hartid,
 
 void sbi_timer_process(struct sbi_scratch *scratch, u32 hartid);
 
-int sbi_timer_warm_init(struct sbi_scratch *scratch, u32 hartid);
-
-int sbi_timer_cold_init(struct sbi_scratch *scratch);
+int sbi_timer_init(struct sbi_scratch *scratch, u32 hartid,
+		   bool cold_boot);
 
 #endif
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 989cb7d79b3..f9429719fc7 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -54,11 +54,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_timer_cold_init(scratch);
-	if (rc)
-		sbi_hart_hang();
-
-	rc = sbi_timer_warm_init(scratch, hartid);
+	rc = sbi_timer_init(scratch, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -125,7 +121,7 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_timer_warm_init(scratch, hartid);
+	rc = sbi_timer_init(scratch, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index 355bc64ea21..8dfc7534491 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -67,12 +67,9 @@ void sbi_timer_process(struct sbi_scratch *scratch, u32 hartid)
 	csr_set(mip, MIP_STIP);
 }
 
-int sbi_timer_warm_init(struct sbi_scratch *scratch, u32 hartid)
+int sbi_timer_init(struct sbi_scratch *scratch, u32 hartid,
+		   bool cold_boot)
 {
-	return sbi_platform_warm_timer_init(sbi_platform_ptr(scratch), hartid);
-}
-
-int sbi_timer_cold_init(struct sbi_scratch *scratch)
-{
-	return sbi_platform_cold_timer_init(sbi_platform_ptr(scratch));
+	return sbi_platform_timer_init(sbi_platform_ptr(scratch),
+					hartid, cold_boot);
 }
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index d11dd66e4f1..141c98e30ba 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -66,9 +66,18 @@ static int k210_ipi_init(u32 hartid, bool cold_boot)
 	return clint_warm_ipi_init(hartid);
 }
 
-static int k210_cold_timer_init(void)
+static int k210_timer_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_timer_init(CLINT_BASE_ADDR, K210_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(CLINT_BASE_ADDR,
+					   K210_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init(hartid);
 }
 
 static int k210_system_reboot(u32 type)
@@ -107,11 +116,10 @@ struct sbi_platform platform = {
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 
-	.cold_timer_init = k210_cold_timer_init,
+	.timer_init = k210_timer_init,
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
-	.warm_timer_init = clint_warm_timer_init,
 
 	.system_reboot = k210_system_reboot,
 	.system_shutdown = k210_system_shutdown
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 4e6ac4832e7..7f41fe15cc2 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -105,10 +105,18 @@ static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
 	return clint_warm_ipi_init(hartid);
 }
 
-static int sifive_u_cold_timer_init(void)
+static int sifive_u_timer_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-				     SIFIVE_U_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
+					   SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init(hartid);
 }
 
 static int sifive_u_system_down(u32 type)
@@ -137,8 +145,7 @@ struct sbi_platform platform = {
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
-	.warm_timer_init = clint_warm_timer_init,
-	.cold_timer_init = sifive_u_cold_timer_init,
+	.timer_init = sifive_u_timer_init,
 	.system_reboot = sifive_u_system_down,
 	.system_shutdown = sifive_u_system_down
 };
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index f9dce4a7235..c83f8f2ba3c 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -106,10 +106,18 @@ static int virt_ipi_init(u32 hartid, bool cold_boot)
 	return clint_warm_ipi_init(hartid);
 }
 
-static int virt_cold_timer_init(void)
+static int virt_timer_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_timer_init(VIRT_CLINT_ADDR,
-				     VIRT_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(VIRT_CLINT_ADDR,
+					   VIRT_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init(hartid);
 }
 
 static int virt_system_down(u32 type)
@@ -138,8 +146,7 @@ struct sbi_platform platform = {
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
-	.warm_timer_init = clint_warm_timer_init,
-	.cold_timer_init = virt_cold_timer_init,
+	.timer_init = virt_timer_init,
 	.system_reboot = virt_system_down,
 	.system_shutdown = virt_system_down
 };
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index fabb73e8eb3..c81697f1825 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -126,10 +126,18 @@ static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
 	return clint_warm_ipi_init(hartid);
 }
 
-static int sifive_u_cold_timer_init(void)
+static int sifive_u_timer_init(u32 hartid, bool cold_boot)
 {
-	return clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-				     SIFIVE_U_HART_COUNT);
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
+					   SIFIVE_U_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init(hartid);
 }
 
 static int sifive_u_system_down(u32 type)
@@ -158,8 +166,7 @@ struct sbi_platform platform = {
 	.timer_value = clint_timer_value,
 	.timer_event_stop = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
-	.warm_timer_init = clint_warm_timer_init,
-	.cold_timer_init = sifive_u_cold_timer_init,
+	.timer_init = sifive_u_timer_init,
 	.system_reboot = sifive_u_system_down,
 	.system_shutdown = sifive_u_system_down
 };

From 45f874da6ccae5294625c9d5b71fafa47299f1d7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 26 Dec 2018 18:49:55 +0530
Subject: [PATCH 0052/1765] lib: Rename target_hart parameter to hartid for PMP
 platform callbacks

We rename target_hart parameter of PMP platform callbacks to
hartid for clarity because the parameter represents current
hartid.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h             | 14 +++++++-------
 platform/qemu/sifive_u/platform.c      |  4 ++--
 platform/qemu/virt/platform.c          |  4 ++--
 platform/sifive/hifive_u540/platform.c |  4 ++--
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 29e66102c1b..8532c03bb20 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -36,8 +36,8 @@ struct sbi_platform {
 	u64 disabled_hart_mask;
 	int (*early_init)(u32 hartid, bool cold_boot);
 	int (*final_init)(u32 hartid, bool cold_boot);
-	u32 (*pmp_region_count)(u32 target_hart);
-	int (*pmp_region_info)(u32 target_hart, u32 index,
+	u32 (*pmp_region_count)(u32 hartid);
+	int (*pmp_region_info)(u32 hartid, u32 index,
 			       ulong *prot, ulong *addr, ulong *log2size);
 	void (*console_putc)(char ch);
 	char (*console_getc)(void);
@@ -117,21 +117,21 @@ static inline int sbi_platform_final_init(struct sbi_platform *plat,
 }
 
 static inline u32 sbi_platform_pmp_region_count(struct sbi_platform *plat,
-						u32 target_hart)
+						u32 hartid)
 {
 	if (plat && plat->pmp_region_count)
-		return plat->pmp_region_count(target_hart);
+		return plat->pmp_region_count(hartid);
 	return 0;
 }
 
 static inline int sbi_platform_pmp_region_info(struct sbi_platform *plat,
-					       u32 target_hart, u32 index,
+					       u32 hartid, u32 index,
 					       ulong *prot, ulong *addr,
 					       ulong *log2size)
 {
 	if (plat && plat->pmp_region_info)
-		return plat->pmp_region_info(target_hart, index,
-					      prot, addr, log2size);
+		return plat->pmp_region_info(hartid, index,
+					     prot, addr, log2size);
 	return 0;
 }
 
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 7f41fe15cc2..cf6efbdabdb 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -44,12 +44,12 @@ static int sifive_u_final_init(u32 hartid, bool cold_boot)
 	return 0;
 }
 
-static u32 sifive_u_pmp_region_count(u32 target_hart)
+static u32 sifive_u_pmp_region_count(u32 hartid)
 {
 	return 1;
 }
 
-static int sifive_u_pmp_region_info(u32 target_hart, u32 index,
+static int sifive_u_pmp_region_info(u32 hartid, u32 index,
 				    ulong *prot, ulong *addr, ulong *log2size)
 {
 	int ret = 0;
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index c83f8f2ba3c..71ddc759aa7 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -44,12 +44,12 @@ static int virt_final_init(u32 hartid, bool cold_boot)
 	return 0;
 }
 
-static u32 virt_pmp_region_count(u32 target_hart)
+static u32 virt_pmp_region_count(u32 hartid)
 {
 	return 1;
 }
 
-static int virt_pmp_region_info(u32 target_hart, u32 index,
+static int virt_pmp_region_info(u32 hartid, u32 index,
 				ulong *prot, ulong *addr, ulong *log2size)
 {
 	int ret = 0;
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
index c81697f1825..5528b0c0aa0 100644
--- a/platform/sifive/hifive_u540/platform.c
+++ b/platform/sifive/hifive_u540/platform.c
@@ -54,12 +54,12 @@ static int sifive_u_final_init(u32 hartid, bool cold_boot)
 	return 0;
 }
 
-static u32 sifive_u_pmp_region_count(u32 target_hart)
+static u32 sifive_u_pmp_region_count(u32 hartid)
 {
 	return 1;
 }
 
-static int sifive_u_pmp_region_info(u32 target_hart, u32 index,
+static int sifive_u_pmp_region_info(u32 hartid, u32 index,
 				    ulong *prot, ulong *addr, ulong *log2size)
 {
 	int ret = 0;

From f2d4c5f2915e805e660a533d30cda6edf97b8bcd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 27 Dec 2018 10:06:38 +0530
Subject: [PATCH 0053/1765] lib: Print mtval in sbi_trap_error()

The mtval CSR is very useful information when debugging hence
print it upon trap error in sbi_trap_error().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_trap.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 012a9a001a2..ab78b576888 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -21,13 +21,15 @@
 
 static void __attribute__((noreturn)) sbi_trap_error(const char *msg,
 						int rc, u32 hartid,
-						ulong mcause,
+						ulong mcause, ulong mtval,
 						struct sbi_trap_regs *regs)
 {
 	sbi_printf("%s: hart%d: %s (error %d)\n",
 		   __func__, hartid, msg, rc);
-	sbi_printf("%s: hart%d: mcause=0x%lx mepc=0x%lx mstatus=0x%lx\n",
-		   __func__, hartid, mcause, regs->mepc, regs->mstatus);
+	sbi_printf("%s: hart%d: mcause=0x%lx mtval=0x%lx\n",
+		   __func__, hartid, mcause, mtval);
+	sbi_printf("%s: hart%d: mepc=0x%lx mstatus=0x%lx\n",
+		   __func__, hartid, regs->mepc, regs->mstatus);
 	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
 		   __func__, hartid, "ra", regs->ra, "sp", regs->sp);
 	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
@@ -67,8 +69,8 @@ static void __attribute__((noreturn)) sbi_trap_error(const char *msg,
 void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
-	int rc;
-	const char *msg;
+	int rc = SBI_ENOTSUPP;
+	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(mcause);
 
@@ -82,15 +84,12 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 			sbi_ipi_process(scratch, hartid);
 			break;
 		default:
-			sbi_trap_error("unhandled external interrupt",
-					SBI_ENOTSUPP, hartid, mcause, regs);
-			break;
+			msg = "unhandled external interrupt";
+			goto trap_error;
 		};
 		return;
 	}
 
-	rc = SBI_ENOTSUPP;
-	msg = "trap handler failed";
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
 		rc = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
@@ -113,7 +112,8 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		break;
 	};
 
+trap_error:
 	if (rc) {
-		sbi_trap_error(msg, rc, hartid, mcause, regs);
+		sbi_trap_error(msg, rc, hartid, mcause, csr_read(mtval), regs);
 	}
 }

From d461d5b790bba2884dfdd02ab117375e9bfaae4c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.pate@wdc.com>
Date: Fri, 28 Dec 2018 10:51:15 +0530
Subject: [PATCH 0054/1765] platform: Rename sifive/hifive_u540 to sifive/fu540

We rename sifive/hifive_u540 platform support to sifive/fu540
to match the SoC name which is SiFive FU540 (as-per user manual).

In fact, we can expect no (or very minimal) board specific
quirks in sifive/fu540 platform support. These board specific
quirks can be turned on/off in-future using PLATFORM_<xyz>
make command-line option.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 .../sifive/{hifive_u540 => fu540}/config.mk   |   2 +-
 .../sifive/{hifive_u540 => fu540}/objects.mk  |   2 +-
 platform/sifive/fu540/platform.c              | 172 ++++++++++++++++++
 platform/sifive/hifive_u540/platform.c        | 172 ------------------
 4 files changed, 174 insertions(+), 174 deletions(-)
 rename platform/sifive/{hifive_u540 => fu540}/config.mk (94%)
 rename platform/sifive/{hifive_u540 => fu540}/objects.mk (80%)
 create mode 100644 platform/sifive/fu540/platform.c
 delete mode 100644 platform/sifive/hifive_u540/platform.c

diff --git a/platform/sifive/hifive_u540/config.mk b/platform/sifive/fu540/config.mk
similarity index 94%
rename from platform/sifive/hifive_u540/config.mk
rename to platform/sifive/fu540/config.mk
index 630098e54b7..07419b64e44 100644
--- a/platform/sifive/hifive_u540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -2,7 +2,7 @@
 # Copyright (c) 2018 Western Digital Corporation or its affiliates.
 #
 # Authors:
-#   Anup Patel <anup.patel@wdc.com>
+#   Atish Patra <atish.patra@wdc.com>
 #
 # SPDX-License-Identifier: BSD-2-Clause
 #
diff --git a/platform/sifive/hifive_u540/objects.mk b/platform/sifive/fu540/objects.mk
similarity index 80%
rename from platform/sifive/hifive_u540/objects.mk
rename to platform/sifive/fu540/objects.mk
index 7e96bad0cef..0a4dfa7e83f 100644
--- a/platform/sifive/hifive_u540/objects.mk
+++ b/platform/sifive/fu540/objects.mk
@@ -2,7 +2,7 @@
 # Copyright (c) 2018 Western Digital Corporation or its affiliates.
 #
 # Authors:
-#   Anup Patel <anup.patel@wdc.com>
+#   Atish Patra <atish.patra@wdc.com>
 #
 # SPDX-License-Identifier: BSD-2-Clause
 #
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
new file mode 100644
index 00000000000..393509b4796
--- /dev/null
+++ b/platform/sifive/fu540/platform.c
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/riscv_io.h>
+#include <plat/irqchip/plic.h>
+#include <plat/serial/sifive-uart.h>
+#include <plat/sys/clint.h>
+
+#define FU540_HART_COUNT			5
+#define FU540_HART_STACK_SIZE			8192
+
+#define FU540_SYS_CLK				1000000000
+
+#define FU540_CLINT_ADDR			0x2000000
+
+#define FU540_PLIC_ADDR				0xc000000
+#define FU540_PLIC_NUM_SOURCES			0x35
+#define FU540_PLIC_NUM_PRIORITIES		7
+
+#define FU540_UART0_ADDR			0x10010000
+#define FU540_UART1_ADDR			0x10011000
+#define FU540_UART_BAUDRATE			115200
+
+#define FU540_HARITD_ENABLED			1
+
+/* PRCI clock related macros */
+//TODO: Do we need a separate driver for this ?
+#define FU540_PRCI_BASE_ADDR			0x10000000
+#define FU540_PRCI_CLKMUXSTATUSREG    		0x002C
+#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL      (0x1 << 1)
+
+static int fu540_final_init(u32 hartid, bool cold_boot)
+{
+	u32 i;
+	void *fdt;
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	plic_fdt_fixup(fdt, "riscv,plic0", 0);
+	for (i = 1; i < FU540_HART_COUNT; i++)
+		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
+
+	return 0;
+}
+
+static u32 fu540_pmp_region_count(u32 hartid)
+{
+	return 1;
+}
+
+static int fu540_pmp_region_info(u32 hartid, u32 index,
+				 ulong *prot, ulong *addr, ulong *log2size)
+{
+	int ret = 0;
+
+	switch (index) {
+	case 0:
+		*prot = PMP_R | PMP_W | PMP_X;
+		*addr = 0;
+		*log2size = __riscv_xlen;
+		break;
+	default:
+		ret = -1;
+		break;
+	};
+
+	return ret;
+}
+
+static int fu540_console_init(void)
+{
+	unsigned long peri_in_freq;
+
+	if (readl((volatile void *)FU540_PRCI_BASE_ADDR +
+		  FU540_PRCI_CLKMUXSTATUSREG) &
+		  FU540_PRCI_CLKMUX_STATUS_TLCLKSEL) {
+		peri_in_freq = FU540_SYS_CLK;
+	} else {
+		peri_in_freq = FU540_SYS_CLK / 2;
+	}
+
+	return sifive_uart_init(FU540_UART0_ADDR,
+				peri_in_freq, FU540_UART_BAUDRATE);
+}
+
+static int fu540_irqchip_init(u32 hartid, bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
+					    FU540_PLIC_NUM_SOURCES,
+					    FU540_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return plic_warm_irqchip_init(hartid,
+			(hartid) ? (2 * hartid - 1) : 0,
+			(hartid) ? (2 * hartid) : -1);
+}
+
+static int fu540_ipi_init(u32 hartid, bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(FU540_CLINT_ADDR,
+					 FU540_HART_COUNT);
+		if (rc)
+			return rc;
+
+	}
+
+	return clint_warm_ipi_init(hartid);
+}
+
+static int fu540_timer_init(u32 hartid, bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(FU540_CLINT_ADDR,
+					   FU540_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init(hartid);
+}
+
+static int fu540_system_down(u32 type)
+{
+	/* For now nothing to do. */
+	return 0;
+}
+
+struct sbi_platform platform = {
+	.name = "SiFive Freedom U540",
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count = FU540_HART_COUNT,
+	.hart_stack_size = FU540_HART_STACK_SIZE,
+	.disabled_hart_mask = ~(1 << FU540_HARITD_ENABLED),
+	.pmp_region_count = fu540_pmp_region_count,
+	.pmp_region_info = fu540_pmp_region_info,
+	.final_init = fu540_final_init,
+	.console_putc = sifive_uart_putc,
+	.console_getc = sifive_uart_getc,
+	.console_init = fu540_console_init,
+	.irqchip_init = fu540_irqchip_init,
+	.ipi_inject = clint_ipi_inject,
+	.ipi_sync = clint_ipi_sync,
+	.ipi_clear = clint_ipi_clear,
+	.ipi_init = fu540_ipi_init,
+	.timer_value = clint_timer_value,
+	.timer_event_stop = clint_timer_event_stop,
+	.timer_event_start = clint_timer_event_start,
+	.timer_init = fu540_timer_init,
+	.system_reboot = fu540_system_down,
+	.system_shutdown = fu540_system_down
+};
diff --git a/platform/sifive/hifive_u540/platform.c b/platform/sifive/hifive_u540/platform.c
deleted file mode 100644
index 5528b0c0aa0..00000000000
--- a/platform/sifive/hifive_u540/platform.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_platform.h>
-#include <sbi/riscv_io.h>
-#include <plat/irqchip/plic.h>
-#include <plat/serial/sifive-uart.h>
-#include <plat/sys/clint.h>
-
-#define SIFIVE_U_HART_COUNT			5
-#define SIFIVE_U_HART_STACK_SIZE		8192
-
-#define SIFIVE_U_SYS_CLK			1000000000
-
-#define SIFIVE_U_CLINT_ADDR			0x2000000
-
-#define SIFIVE_U_PLIC_ADDR			0xc000000
-#define SIFIVE_U_PLIC_NUM_SOURCES		0x35
-#define SIFIVE_U_PLIC_NUM_PRIORITIES		7
-
-#define SIFIVE_U_UART0_ADDR			0x10010000
-#define SIFIVE_U_UART1_ADDR			0x10011000
-#define SIFIVE_UART_BAUDRATE			115200
-
-#define SIFIVE_U_HARITD_ENABLED			1
-
-/* PRCI clock related macros */
-//TODO: Do we need a separate driver for this ?
-#define SIFIVE_PRCI_BASE_ADDR			0x10000000
-#define SIFIVE_PRCI_CLKMUXSTATUSREG    		0x002C
-#define SIFIVE_PRCI_CLKMUX_STATUS_TLCLKSEL      (0x1 << 1)
-
-static int sifive_u_final_init(u32 hartid, bool cold_boot)
-{
-	u32 i;
-	void *fdt;
-
-	if (!cold_boot)
-		return 0;
-
-	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0", 0);
-	for (i = 1; i < SIFIVE_U_HART_COUNT; i++)
-		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
-
-	return 0;
-}
-
-static u32 sifive_u_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-static int sifive_u_pmp_region_info(u32 hartid, u32 index,
-				    ulong *prot, ulong *addr, ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot = PMP_R | PMP_W | PMP_X;
-		*addr = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
-static int sifive_u_console_init(void)
-{
-	unsigned long peri_in_freq;
-
-	if (readl((volatile void *)SIFIVE_PRCI_BASE_ADDR +
-		  SIFIVE_PRCI_CLKMUXSTATUSREG) &
-		  SIFIVE_PRCI_CLKMUX_STATUS_TLCLKSEL){
-		peri_in_freq = SIFIVE_U_SYS_CLK;
-	} else {
-		peri_in_freq = SIFIVE_U_SYS_CLK / 2;
-	}
-
-	return sifive_uart_init(SIFIVE_U_UART0_ADDR,
-				peri_in_freq, SIFIVE_UART_BAUDRATE);
-}
-
-static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
-					    SIFIVE_U_PLIC_NUM_SOURCES,
-					    SIFIVE_U_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return plic_warm_irqchip_init(hartid,
-			(hartid) ? (2 * hartid - 1) : 0,
-			(hartid) ? (2 * hartid) : -1);
-}
-
-static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-					 SIFIVE_U_HART_COUNT);
-		if (rc)
-			return rc;
-
-	}
-
-	return clint_warm_ipi_init(hartid);
-}
-
-static int sifive_u_timer_init(u32 hartid, bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-					   SIFIVE_U_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_timer_init(hartid);
-}
-
-static int sifive_u_system_down(u32 type)
-{
-	/* For now nothing to do. */
-	return 0;
-}
-
-struct sbi_platform platform = {
-	.name = "SiFive HiFive U540",
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = SIFIVE_U_HART_COUNT,
-	.hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
-	.disabled_hart_mask = ~(1 << SIFIVE_U_HARITD_ENABLED),
-	.pmp_region_count = sifive_u_pmp_region_count,
-	.pmp_region_info = sifive_u_pmp_region_info,
-	.final_init = sifive_u_final_init,
-	.console_putc = sifive_uart_putc,
-	.console_getc = sifive_uart_getc,
-	.console_init = sifive_u_console_init,
-	.irqchip_init = sifive_u_irqchip_init,
-	.ipi_inject = clint_ipi_inject,
-	.ipi_sync = clint_ipi_sync,
-	.ipi_clear = clint_ipi_clear,
-	.ipi_init = sifive_u_ipi_init,
-	.timer_value = clint_timer_value,
-	.timer_event_stop = clint_timer_event_stop,
-	.timer_event_start = clint_timer_event_start,
-	.timer_init = sifive_u_timer_init,
-	.system_reboot = sifive_u_system_down,
-	.system_shutdown = sifive_u_system_down
-};

From 56e41f7a8db2c9bcfd1116748d496e5d40d2397b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 28 Dec 2018 11:01:37 +0530
Subject: [PATCH 0055/1765] platform: Fix author name for Kendryte K210
 platform

The Kendryte K210 platform support was contributed by Damien
hence fix author name.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/config.mk  | 2 +-
 platform/kendryte/k210/objects.mk | 2 +-
 platform/kendryte/k210/platform.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index 512fc2abe86..4a5b5920df6 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -2,7 +2,7 @@
 # Copyright (c) 2018 Western Digital Corporation or its affiliates.
 #
 # Authors:
-#   Anup Patel <anup.patel@wdc.com>
+#   Damien Le Moal <damien.lemoal@wdc.com>
 #
 # SPDX-License-Identifier: BSD-2-Clause
 #
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 3e16abe63a8..1f0a20b7f8c 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -2,7 +2,7 @@
 # Copyright (c) 2018 Western Digital Corporation or its affiliates.
 #
 # Authors:
-#   Anup Patel <anup.patel@wdc.com>
+#   Damien Le Moal <damien.lemoal@wdc.com>
 #
 # SPDX-License-Identifier: BSD-2-Clause
 #
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 141c98e30ba..35119dbc317 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Western Digital Corporation or its affiliates.
  *
  * Authors:
- *   Anup Patel <anup.patel@wdc.com>
+ *   Damien Le Moal <damien.lemoal@wdc.com>
  *
  * SPDX-License-Identifier: BSD-2-Clause
  */

From 5959312a5c26df64ebfdd9b4d926e88cf3d87840 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 27 Dec 2018 21:39:13 +0530
Subject: [PATCH 0056/1765] lib: Redirect illegal instruction trap to S-mode
 when not handled

Currently, we fail with error SBI_ENOTSUPP when we are not able
to handle illegal instruction trap. Instead, we should just
redirect illegal instruction trap to S-mode when not handled.

This redirection of illegal instruction trap will help lazy
save/restore of floating point registers to work correctly in
Linux kernel.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h |  9 +++++---
 include/sbi/sbi_trap.h       |  4 ++++
 lib/sbi_illegal_insn.c       |  6 ++---
 lib/sbi_trap.c               | 43 ++++++++++++++++++++++++++++++++++++
 4 files changed, 56 insertions(+), 6 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 1adc0c55b1a..381f3058960 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -19,12 +19,15 @@
 #define MSTATUS_HIE			0x00000004
 #define MSTATUS_MIE			0x00000008
 #define MSTATUS_UPIE			0x00000010
-#define MSTATUS_SPIE			0x00000020
+#define MSTATUS_SPIE_SHIFT		5
+#define MSTATUS_SPIE			(1UL << MSTATUS_SPIE_SHIFT)
 #define MSTATUS_HPIE			0x00000040
 #define MSTATUS_MPIE			0x00000080
-#define MSTATUS_SPP			0x00000100
+#define MSTATUS_SPP_SHIFT		8
+#define MSTATUS_SPP			(1UL << MSTATUS_SPP_SHIFT)
 #define MSTATUS_HPP			0x00000600
-#define MSTATUS_MPP			0x00001800
+#define MSTATUS_MPP_SHIFT		11
+#define MSTATUS_MPP			(3UL << MSTATUS_MPP_SHIFT)
 #define MSTATUS_FS			0x00006000
 #define MSTATUS_XS			0x00018000
 #define MSTATUS_MPRV			0x00020000
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index a6b22e48945..4e5a054c0ef 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -51,6 +51,10 @@ struct sbi_trap_regs {
 
 struct sbi_scratch;
 
+int sbi_trap_redirect(struct sbi_trap_regs *regs,
+		      struct sbi_scratch *scratch,
+		      ulong epc, ulong cause, ulong tval);
+
 void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch);
 
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 9383df47e4c..1bdc75902a9 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -26,8 +26,7 @@ static int truly_illegal_insn(ulong insn,
 			      struct sbi_trap_regs *regs,
 			      struct sbi_scratch *scratch)
 {
-	/* For now, always fails */
-	return SBI_ENOTSUPP;
+	return sbi_trap_redirect(regs, scratch, regs->mepc, mcause, insn);
 }
 
 static int system_opcode_insn(ulong insn,
@@ -132,7 +131,8 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			insn = get_insn(regs->mepc, &mstatus);
 		}
 		if ((insn & 3) != 3)
-			return SBI_ENOTSUPP;
+			return truly_illegal_insn(insn, hartid, mcause,
+						  regs, scratch);
 	}
 
 	return illegal_insn_table[(insn & 0x7c) >> 2](insn, hartid, mcause,
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index ab78b576888..0e731e46f77 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -66,6 +66,49 @@ static void __attribute__((noreturn)) sbi_trap_error(const char *msg,
 	sbi_hart_hang();
 }
 
+int sbi_trap_redirect(struct sbi_trap_regs *regs,
+		      struct sbi_scratch *scratch,
+		      ulong epc, ulong cause, ulong tval)
+{
+	ulong new_mstatus, prev_mode;
+
+	/* Sanity check on previous mode */
+	prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	if (prev_mode != PRV_S && prev_mode != PRV_U)
+		return SBI_ENOTSUPP;
+
+	/* Update S-mode exception info */
+	csr_write(stval, tval);
+	csr_write(sepc, epc);
+	csr_write(scause, cause);
+
+	/* Set MEPC to S-mode exception vector base */
+	regs->mepc = csr_read(stvec);
+
+	/* Initial value of new MSTATUS */
+	new_mstatus = regs->mstatus;
+
+	/* Clear MPP, SPP, SPIE, and SIE */
+	new_mstatus &= ~(MSTATUS_MPP |
+			 MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE);
+
+	/* Set SPP */
+	if (prev_mode == PRV_S)
+		new_mstatus |= (1UL << MSTATUS_SPP_SHIFT);
+
+	/* Set SPIE */
+	if (regs->mstatus & MSTATUS_SIE)
+		new_mstatus |= (1UL << MSTATUS_SPIE_SHIFT);
+
+	/* Set MPP */
+	new_mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
+
+	/* Set new value in MSTATUS */
+	regs->mstatus = new_mstatus;
+
+	return 0;
+}
+
 void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {

From 5688b4d8fcd39eaf504e73279bbe42b9700369da Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 28 Dec 2018 14:20:25 +0530
Subject: [PATCH 0057/1765] top: Minor typo fixes in top-level README.md

This patch does minor typo fixes in top-level README.md.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/README.md b/README.md
index 7b142d56e98..c38f54320fe 100644
--- a/README.md
+++ b/README.md
@@ -4,10 +4,9 @@ RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 The **RISC-V Supervisor Binary Interface (SBI)** is a recommended
 interface between:
 
-1. A pplatform specific firmware executed in M-mode and a general purpose
-   OS hypervisor or bootloader executed in S-mode or HS-mode.
-2. A hypervisor executed in HS-mode and a general purpose OS or bootloader
-   executed in VS-mode
+1. A platform specific firmware (M-mode) and a general purpose
+   OS or hypervisor or bootloader (S-mode or HS-mode).
+2. A hypervisor (HS-mode) and a general purpose OS or bootloader (VS-mode)
 
 The *RISC-V SBI specification* is maintained as an independent project
 by the RISC-V Foundation in [Github](https://github.com/riscv/riscv-sbi-doc)
@@ -59,17 +58,16 @@ Building and Installing platform specific *libsbi.a* and firmwares
 ------------------------------------------------------------------
 
 The libplatsbi.a and firmware files are only built if the
-*PLATFORM=<platform path>* argument is specified on make command lines.
-*<platform path>* must specify the path to one of the leaf directories
-under the *platform* directory. For example, to compile the library and
-firmware for QEMU generic RISC-V *virt* machine, *<platform path>*
-should be *qemu/virt*.
+*`PLATFORM=<platform_subdir>`* argument is specified on make command lines.
+*`<platform_subdir>`* must specify the path to one of the leaf directories
+under the *`platform`* directory. For example, to compile the library and
+firmware for QEMU RISC-V *virt* machine, *`<platform_subdir>`*
+should be *`qemu/virt`*.
 
 To build *libsbi, libplatsbi, and firmwares* for a specific platform, run:
 ```
 make PLATFORM=<platform_subdir>
 ```
-
 or
 
 ```
@@ -80,7 +78,6 @@ To install *libsbi, headers, libplatsbi, and firmwares*, run:
 ```
 make PLATFORM=<platform_subdir> install
 ```
-
 or
 
 ```
@@ -88,7 +85,7 @@ make PLATFORM=<platform_subdir> I=<install_directory> install`
 ```
 
 In addition, platform specific make command-line options to top-level make
-,such as *PLATFORM_<xyz>* or *FW_<abc>* can also be specified. These
+, such as *PLATFORM_<xyz>* or *FW_<abc>* can also be specified. These
 options are described under *docs/platform/<platform_name>.md* and
 *docs/firmware/<firmware_name>.md*.
 

From d0bbbbb8fdf059b2e49235af271db0d67ade2fc9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 28 Dec 2018 14:21:57 +0530
Subject: [PATCH 0058/1765] docs: Add documenation for QEMU platforms

This patch adds documentation for qemu/virt and
qemu/sifive_u platform supports.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/qemu_sifive_u.md | 42 ++++++++++++++++++++++++
 docs/platform/qemu_virt.md     | 59 ++++++++++++++++++++++++++++++++++
 2 files changed, 101 insertions(+)
 create mode 100644 docs/platform/qemu_sifive_u.md
 create mode 100644 docs/platform/qemu_virt.md

diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
new file mode 100644
index 00000000000..da1315bc4cc
--- /dev/null
+++ b/docs/platform/qemu_sifive_u.md
@@ -0,0 +1,42 @@
+QEMU SiFive Unleashed Machine
+=============================
+
+The **QEMU SiFive Unleashed Machine** is an emulation of
+SiFive Unleashed platform.
+
+To build platform specific library and firmwares, provide
+`PLATFORM=qemu/sifive_u` parameter to top-level make.
+
+Platform Options
+----------------
+
+We don't have any platform specific options for this platform.
+
+Try on QEMU RISC-V 64bit
+------------------------
+
+**No Payload**
+
+*Build*:
+```
+    make PLATFORM=qemu/virt
+```
+*Run*:
+```
+    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
+```
+
+**U-Boot Payload**
+
+*Note*: We assume that U-Boot is compiled using `qemu-riscv64_smode_defconfig`.
+
+*Build*:
+```
+    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+```
+*Run*:
+```
+    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
+    or
+    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_jump.elf -device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
+```
\ No newline at end of file
diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
new file mode 100644
index 00000000000..c9a4a2c9864
--- /dev/null
+++ b/docs/platform/qemu_virt.md
@@ -0,0 +1,59 @@
+QEMU RISC-V Virt Machine
+========================
+
+The **QEMU RISC-V Virt Machine** is virtual platform created
+for RISC-V software development. It is also referred to as
+QEMU RISC-V VirtIO machine because it uses VirtIO devices
+for network, storage, and other types of IO.
+
+To build platform specific library and firmwares, provide
+`PLATFORM=qemu/virt` parameter to top-level make.
+
+Platform Options
+----------------
+
+We don't have any platform specific options for this platform.
+
+Try on QEMU RISC-V 64bit
+------------------------
+
+**No Payload**
+
+*Build*:
+```
+    make PLATFORM=qemu/virt
+```
+*Run*:
+```
+    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf
+```
+
+**U-Boot Payload**
+
+*Note*: We assume that U-Boot is compiled using `qemu-riscv64_smode_defconfig`.
+
+*Build*:
+```
+    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+```
+*Run*:
+```
+    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf
+    or
+    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_jump.elf -device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
+```
+
+**Linux Payload**
+
+*Note*: We assume that Linux is compiled using `defconfig`.
+
+*Build*:
+```
+    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+*Run*:
+```
+    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf -drive file=<path_to_linux_rootfs>,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -append "root=/dev/vda rw console=ttyS0"
+    or
+    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_jump.elf -device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 -drive file=<path_to_linux_rootfs>,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -append "root=/dev/vda rw console=ttyS0"
+```
\ No newline at end of file

From 81e8950abeb649a0842726fdfc1aa4e60b1008f5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 31 Dec 2018 10:25:42 +0530
Subject: [PATCH 0059/1765] include: Remove redundant csr_read_n() and
 csr_write_n()

The patch removes redundant csr_read_n() and csr_write_n()
because same thing can be achieved by using __ASM_STR()
macro in csr_read() and csr_write() macros.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h | 21 ++---------
 lib/riscv_asm.c         | 80 ++++++++++++++++++++---------------------
 2 files changed, 42 insertions(+), 59 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 045310b5d5a..c7a89379c74 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -140,16 +140,7 @@
 #define csr_read(csr)						\
 ({								\
 	register unsigned long __v;				\
-	__asm__ __volatile__ ("csrr %0, " #csr			\
-			      : "=r" (__v) :			\
-			      : "memory");			\
-	__v;							\
-})
-
-#define csr_read_n(csr_num)					\
-({								\
-	register unsigned long __v;				\
-	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr_num)	\
+	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)	\
 			      : "=r" (__v) :			\
 			      : "memory");			\
 	__v;							\
@@ -158,15 +149,7 @@
 #define csr_write(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrw " #csr ", %0"		\
-			      : : "rK" (__v)			\
-			      : "memory");			\
-})
-
-#define csr_write_n(csr_num, val)				\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrw " __ASM_STR(csr_num) ", %0"	\
+	__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"	\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })
diff --git a/lib/riscv_asm.c b/lib/riscv_asm.c
index 0fbdb315e72..4ffd7547b65 100644
--- a/lib/riscv_asm.c
+++ b/lib/riscv_asm.c
@@ -17,64 +17,64 @@ unsigned long csr_read_num(int csr_num)
 
 	switch (csr_num) {
 	case CSR_PMPCFG0:
-		ret = csr_read_n(CSR_PMPCFG0);
+		ret = csr_read(CSR_PMPCFG0);
 		break;
 	case CSR_PMPCFG1:
-		ret = csr_read_n(CSR_PMPCFG1);
+		ret = csr_read(CSR_PMPCFG1);
 		break;
 	case CSR_PMPCFG2:
-		ret = csr_read_n(CSR_PMPCFG2);
+		ret = csr_read(CSR_PMPCFG2);
 		break;
 	case CSR_PMPCFG3:
-		ret = csr_read_n(CSR_PMPCFG3);
+		ret = csr_read(CSR_PMPCFG3);
 		break;
 	case CSR_PMPADDR0:
-		ret = csr_read_n(CSR_PMPADDR0);
+		ret = csr_read(CSR_PMPADDR0);
 		break;
 	case CSR_PMPADDR1:
-		ret = csr_read_n(CSR_PMPADDR1);
+		ret = csr_read(CSR_PMPADDR1);
 		break;
 	case CSR_PMPADDR2:
-		ret = csr_read_n(CSR_PMPADDR2);
+		ret = csr_read(CSR_PMPADDR2);
 		break;
 	case CSR_PMPADDR3:
-		ret = csr_read_n(CSR_PMPADDR3);
+		ret = csr_read(CSR_PMPADDR3);
 		break;
 	case CSR_PMPADDR4:
-		ret = csr_read_n(CSR_PMPADDR4);
+		ret = csr_read(CSR_PMPADDR4);
 		break;
 	case CSR_PMPADDR5:
-		ret = csr_read_n(CSR_PMPADDR5);
+		ret = csr_read(CSR_PMPADDR5);
 		break;
 	case CSR_PMPADDR6:
-		ret = csr_read_n(CSR_PMPADDR6);
+		ret = csr_read(CSR_PMPADDR6);
 		break;
 	case CSR_PMPADDR7:
-		ret = csr_read_n(CSR_PMPADDR7);
+		ret = csr_read(CSR_PMPADDR7);
 		break;
 	case CSR_PMPADDR8:
-		ret = csr_read_n(CSR_PMPADDR8);
+		ret = csr_read(CSR_PMPADDR8);
 		break;
 	case CSR_PMPADDR9:
-		ret = csr_read_n(CSR_PMPADDR9);
+		ret = csr_read(CSR_PMPADDR9);
 		break;
 	case CSR_PMPADDR10:
-		ret = csr_read_n(CSR_PMPADDR10);
+		ret = csr_read(CSR_PMPADDR10);
 		break;
 	case CSR_PMPADDR11:
-		ret = csr_read_n(CSR_PMPADDR11);
+		ret = csr_read(CSR_PMPADDR11);
 		break;
 	case CSR_PMPADDR12:
-		ret = csr_read_n(CSR_PMPADDR12);
+		ret = csr_read(CSR_PMPADDR12);
 		break;
 	case CSR_PMPADDR13:
-		ret = csr_read_n(CSR_PMPADDR13);
+		ret = csr_read(CSR_PMPADDR13);
 		break;
 	case CSR_PMPADDR14:
-		ret = csr_read_n(CSR_PMPADDR14);
+		ret = csr_read(CSR_PMPADDR14);
 		break;
 	case CSR_PMPADDR15:
-		ret = csr_read_n(CSR_PMPADDR15);
+		ret = csr_read(CSR_PMPADDR15);
 		break;
 	default:
 		break;
@@ -87,64 +87,64 @@ void csr_write_num(int csr_num, unsigned long val)
 {
 	switch (csr_num) {
 	case CSR_PMPCFG0:
-		csr_write_n(CSR_PMPCFG0, val);
+		csr_write(CSR_PMPCFG0, val);
 		break;
 	case CSR_PMPCFG1:
-		csr_write_n(CSR_PMPCFG1, val);
+		csr_write(CSR_PMPCFG1, val);
 		break;
 	case CSR_PMPCFG2:
-		csr_write_n(CSR_PMPCFG2, val);
+		csr_write(CSR_PMPCFG2, val);
 		break;
 	case CSR_PMPCFG3:
-		csr_write_n(CSR_PMPCFG3, val);
+		csr_write(CSR_PMPCFG3, val);
 		break;
 	case CSR_PMPADDR0:
-		csr_write_n(CSR_PMPADDR0, val);
+		csr_write(CSR_PMPADDR0, val);
 		break;
 	case CSR_PMPADDR1:
-		csr_write_n(CSR_PMPADDR1, val);
+		csr_write(CSR_PMPADDR1, val);
 		break;
 	case CSR_PMPADDR2:
-		csr_write_n(CSR_PMPADDR2, val);
+		csr_write(CSR_PMPADDR2, val);
 		break;
 	case CSR_PMPADDR3:
-		csr_write_n(CSR_PMPADDR3, val);
+		csr_write(CSR_PMPADDR3, val);
 		break;
 	case CSR_PMPADDR4:
-		csr_write_n(CSR_PMPADDR4, val);
+		csr_write(CSR_PMPADDR4, val);
 		break;
 	case CSR_PMPADDR5:
-		csr_write_n(CSR_PMPADDR5, val);
+		csr_write(CSR_PMPADDR5, val);
 		break;
 	case CSR_PMPADDR6:
-		csr_write_n(CSR_PMPADDR6, val);
+		csr_write(CSR_PMPADDR6, val);
 		break;
 	case CSR_PMPADDR7:
-		csr_write_n(CSR_PMPADDR7, val);
+		csr_write(CSR_PMPADDR7, val);
 		break;
 	case CSR_PMPADDR8:
-		csr_write_n(CSR_PMPADDR8, val);
+		csr_write(CSR_PMPADDR8, val);
 		break;
 	case CSR_PMPADDR9:
-		csr_write_n(CSR_PMPADDR9, val);
+		csr_write(CSR_PMPADDR9, val);
 		break;
 	case CSR_PMPADDR10:
-		csr_write_n(CSR_PMPADDR10, val);
+		csr_write(CSR_PMPADDR10, val);
 		break;
 	case CSR_PMPADDR11:
-		csr_write_n(CSR_PMPADDR11, val);
+		csr_write(CSR_PMPADDR11, val);
 		break;
 	case CSR_PMPADDR12:
-		csr_write_n(CSR_PMPADDR12, val);
+		csr_write(CSR_PMPADDR12, val);
 		break;
 	case CSR_PMPADDR13:
-		csr_write_n(CSR_PMPADDR13, val);
+		csr_write(CSR_PMPADDR13, val);
 		break;
 	case CSR_PMPADDR14:
-		csr_write_n(CSR_PMPADDR14, val);
+		csr_write(CSR_PMPADDR14, val);
 		break;
 	case CSR_PMPADDR15:
-		csr_write_n(CSR_PMPADDR15, val);
+		csr_write(CSR_PMPADDR15, val);
 		break;
 	default:
 		break;

From 24bfa687fc85f0c8b0b2ed60151e44e9b7c43d3b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 31 Dec 2018 10:29:49 +0530
Subject: [PATCH 0060/1765] include: Replace #csr with __ASM_STR(csr) in
 csr_xyz() macros

We replace #csr with __ASM_STR(csr) in all csr_xyz() macros
so that we can pass CSR number instead of CSR name when GCC
is not aware of CSR name.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index c7a89379c74..edf35ece6e0 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -131,7 +131,7 @@
 #define csr_swap(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrw %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -157,7 +157,7 @@
 #define csr_read_set(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrs %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -166,7 +166,7 @@
 #define csr_set(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrs " #csr ", %0"		\
+	__asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"	\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })
@@ -174,7 +174,7 @@
 #define csr_read_clear(csr, val)				\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrc %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -183,7 +183,7 @@
 #define csr_clear(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrc " #csr ", %0"		\
+	__asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"	\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })

From e0d6914b3c40c1609ccf196fa448ea6880ff23d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 31 Dec 2018 11:19:20 +0530
Subject: [PATCH 0061/1765] include: Move RISCV_SCRATCH_xyz defines to
 sbi_scratch.h

The struct sbi_scratch related defines RISCV_SCRATCH_xyz should
be in sbi_scratch.h so that we can keep these defines in-sync
with changes in struct sbi_scratch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S        | 25 +++++++++++++------------
 include/sbi/riscv_asm.h   | 12 ------------
 include/sbi/sbi_scratch.h | 17 +++++++++++++++++
 3 files changed, 30 insertions(+), 24 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d426f15f753..d872061dce6 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_scratch.h>
 
 	.align 3
 	.section .entry, "ax", %progbits
@@ -146,34 +147,34 @@ _start_warm:
 	add	tp, tp, a5
 	mul	a5, s8, s6
 	sub	tp, tp, a5
-	li	a5, RISCV_SCRATCH_SIZE
+	li	a5, SBI_SCRATCH_SIZE
 	sub	tp, tp, a5
 	csrw	mscratch, tp
 
 	/* Initialize scratch space */
-	REG_S	zero, RISCV_SCRATCH_TMP0_OFFSET(tp)
+	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 	la	a4, _fw_start
 	la	a5, _fw_end
 	mul	t0, s7, s8
 	add	a5, a5, t0
 	sub	a5, a5, a4
-	REG_S	a4, RISCV_SCRATCH_FW_START_OFFSET(tp)
-	REG_S	a5, RISCV_SCRATCH_FW_SIZE_OFFSET(tp)
+	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
+	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
 	/* Note: fw_next_arg1() uses a0, a1, and ra */
 	call	fw_next_arg1
-	REG_S	a0, RISCV_SCRATCH_NEXT_ARG1_OFFSET(tp)
+	REG_S	a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp)
 	/* Note: fw_next_addr() uses a0, a1, and ra */
 	call	fw_next_addr
-	REG_S	a0, RISCV_SCRATCH_NEXT_ADDR_OFFSET(tp)
+	REG_S	a0, SBI_SCRATCH_NEXT_ADDR_OFFSET(tp)
 	li	a4, PRV_S
-	REG_S	a4, RISCV_SCRATCH_NEXT_MODE_OFFSET(tp)
+	REG_S	a4, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
 	la	a4, _start_warm
-	REG_S	a4, RISCV_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
+	REG_S	a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
 	la	a4, platform
-	REG_S	a4, RISCV_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
+	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
 	la	a4, _hartid_to_scratch
-	REG_S	a4, RISCV_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
-	REG_S	zero, RISCV_SCRATCH_IPI_TYPE_OFFSET(tp)
+	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
+	REG_S	zero, SBI_SCRATCH_IPI_TYPE_OFFSET(tp)
 
 	/* Setup stack */
 	add	sp, tp, zero
@@ -211,7 +212,7 @@ _hartid_to_scratch:
 	add	s1, s1, s2
 	mul	s2, s0, a0
 	sub	s1, s1, s2
-	li	s2, RISCV_SCRATCH_SIZE
+	li	s2, SBI_SCRATCH_SIZE
 	sub	a0, s1, s2
 	REG_L	s0, (sp)
 	REG_L	s1, (__SIZEOF_POINTER__)(sp)
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index edf35ece6e0..c169d93c49c 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -69,18 +69,6 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
-#define RISCV_SCRATCH_TMP0_OFFSET		(0 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_FW_START_OFFSET		(1 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_FW_SIZE_OFFSET		(2 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_NEXT_ARG1_OFFSET		(3 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_NEXT_ADDR_OFFSET		(4 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_NEXT_MODE_OFFSET		(5 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_WARMBOOT_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_PLATFORM_ADDR_OFFSET	(7 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(8 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_IPI_TYPE_OFFSET		(9 * __SIZEOF_POINTER__)
-#define RISCV_SCRATCH_SIZE			256
-
 #define RISCV_PLATFORM_NAME_OFFSET		(0x0)
 #define RISCV_PLATFORM_FEATURES_OFFSET		(0x40)
 #define RISCV_PLATFORM_HART_COUNT_OFFSET	(0x48)
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index d5c6f353c75..14c72a853dc 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -11,6 +11,21 @@
 #define __SBI_SCRATCH_H__
 
 #include <sbi/riscv_asm.h>
+
+#define SBI_SCRATCH_TMP0_OFFSET			(0 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_FW_START_OFFSET		(1 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_FW_SIZE_OFFSET		(2 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(3 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(4 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_MODE_OFFSET		(5 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(7 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(8 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_IPI_TYPE_OFFSET		(9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_SIZE			256
+
+#ifndef __ASSEMBLY__
+
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch {
@@ -33,3 +48,5 @@ struct sbi_scratch {
 ((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
 #endif
+
+#endif

From 5ed3cf37073125a38ac839ad11de687f20286b33 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 31 Dec 2018 11:30:55 +0530
Subject: [PATCH 0062/1765] include: Move RISCV_PLATFORM_xyz defines to
 sbi_platform.h

The struct sbi_platform related defines RISCV_PLATFORM_xyz should
be in sbi_platform.h so that we can keep these defines in-sync
with changes in struct sbi_platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S         | 9 +++++----
 include/sbi/riscv_asm.h    | 5 -----
 include/sbi/sbi_platform.h | 9 +++++++++
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d872061dce6..d927c3e06e1 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 
 	.align 3
@@ -134,8 +135,8 @@ _start_warm:
 	 */
 	csrr	s6, mhartid
 	la	a4, platform
-	lwu	s7, RISCV_PLATFORM_HART_COUNT_OFFSET(a4)
-	lwu	s8, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 
 	/* HART ID should be within expected limit */
 	csrr	s6, mhartid
@@ -205,8 +206,8 @@ _hartid_to_scratch:
 	 * s2 -> Temporary
 	 */
 	la	s2, platform
-	lwu	s0, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
-	lwu	s2, RISCV_PLATFORM_HART_COUNT_OFFSET(s2)
+	lwu	s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+	lwu	s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
 	mul	s2, s2, s0
 	la	s1, _fw_end
 	add	s1, s1, s2
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index c169d93c49c..6fd7d5d75c4 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -69,11 +69,6 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
-#define RISCV_PLATFORM_NAME_OFFSET		(0x0)
-#define RISCV_PLATFORM_FEATURES_OFFSET		(0x40)
-#define RISCV_PLATFORM_HART_COUNT_OFFSET	(0x48)
-#define RISCV_PLATFORM_HART_STACK_SIZE_OFFSET	(0x4c)
-
 #define RISCV_TRAP_REGS_zero			0
 #define RISCV_TRAP_REGS_ra			1
 #define RISCV_TRAP_REGS_sp			2
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 8532c03bb20..43fb4ea8c5f 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -10,6 +10,13 @@
 #ifndef __SBI_PLATFORM_H__
 #define __SBI_PLATFORM_H__
 
+#define SBI_PLATFORM_NAME_OFFSET		(0x0)
+#define SBI_PLATFORM_FEATURES_OFFSET		(0x40)
+#define SBI_PLATFORM_HART_COUNT_OFFSET		(0x48)
+#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET	(0x4c)
+
+#ifndef __ASSEMBLY__
+
 #include <sbi/sbi_scratch.h>
 
 enum sbi_platform_features {
@@ -240,3 +247,5 @@ static inline int sbi_platform_system_shutdown(struct sbi_platform *plat,
 }
 
 #endif
+
+#endif

From dc7be34d523f93d2834f4aff49d640cdec16a509 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 31 Dec 2018 12:37:28 +0530
Subject: [PATCH 0063/1765] include: Move RISCV_TRAP_REGS_xyz defines to
 sbi_trap.h

The struct sbi_trap_regs related defines RISCV_TRAP_REGS_xyz should
be in sbi_trap.h so that we can keep these defines in-sync with changes
in struct sbi_trap_regs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S      | 139 ++++++++++++++++++++--------------------
 include/sbi/riscv_asm.h |  40 ------------
 include/sbi/sbi_trap.h  |  44 +++++++++++++
 3 files changed, 114 insertions(+), 109 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d927c3e06e1..ab67a705271 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -11,6 +11,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_trap.h>
 
 	.align 3
 	.section .entry, "ax", %progbits
@@ -236,18 +237,18 @@ _trap_handler:
 	csrrw	sp, mscratch, sp
 
 	/* Setup exception stack */
-	add	sp, sp, -(RISCV_TRAP_REGS_SIZE)
+	add	sp, sp, -(SBI_TRAP_REGS_SIZE)
 
 	/* Save RA, T0, T1, and T2 */
-	REG_S	ra, RISCV_TRAP_REGS_OFFSET(ra)(sp)
-	REG_S	t0, RISCV_TRAP_REGS_OFFSET(t0)(sp)
-	REG_S	t1, RISCV_TRAP_REGS_OFFSET(t1)(sp)
-	REG_S	t2, RISCV_TRAP_REGS_OFFSET(t2)(sp)
+	REG_S	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+	REG_S	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+	REG_S	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
 
 	/* Save original SP and restore MSCRATCH */
-	add	t0, sp, RISCV_TRAP_REGS_SIZE
+	add	t0, sp, SBI_TRAP_REGS_SIZE
 	csrrw	t0, mscratch, t0
-	REG_S	t0, RISCV_TRAP_REGS_OFFSET(sp)(sp)
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(sp)(sp)
 
 	/* Save MEPC and MSTATUS CSRs */
 	csrr	t0, mepc
@@ -261,37 +262,37 @@ _trap_handler:
 	 */
 
 	/* Save MEPC and MSTATUS CSRs */
-	REG_S	t0, RISCV_TRAP_REGS_OFFSET(mepc)(sp)
-	REG_S	t1, RISCV_TRAP_REGS_OFFSET(mstatus)(sp)
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
+	REG_S	t1, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
 
 	/* Save all general regisers except SP, RA, T0, T1, and T2 */
-	REG_S	zero, RISCV_TRAP_REGS_OFFSET(zero)(sp)
-	REG_S	gp, RISCV_TRAP_REGS_OFFSET(gp)(sp)
-	REG_S	tp, RISCV_TRAP_REGS_OFFSET(tp)(sp)
-	REG_S	s0, RISCV_TRAP_REGS_OFFSET(s0)(sp)
-	REG_S	s1, RISCV_TRAP_REGS_OFFSET(s1)(sp)
-	REG_S	a0, RISCV_TRAP_REGS_OFFSET(a0)(sp)
-	REG_S	a1, RISCV_TRAP_REGS_OFFSET(a1)(sp)
-	REG_S	a2, RISCV_TRAP_REGS_OFFSET(a2)(sp)
-	REG_S	a3, RISCV_TRAP_REGS_OFFSET(a3)(sp)
-	REG_S	a4, RISCV_TRAP_REGS_OFFSET(a4)(sp)
-	REG_S	a5, RISCV_TRAP_REGS_OFFSET(a5)(sp)
-	REG_S	a6, RISCV_TRAP_REGS_OFFSET(a6)(sp)
-	REG_S	a7, RISCV_TRAP_REGS_OFFSET(a7)(sp)
-	REG_S	s2, RISCV_TRAP_REGS_OFFSET(s2)(sp)
-	REG_S	s3, RISCV_TRAP_REGS_OFFSET(s3)(sp)
-	REG_S	s4, RISCV_TRAP_REGS_OFFSET(s4)(sp)
-	REG_S	s5, RISCV_TRAP_REGS_OFFSET(s5)(sp)
-	REG_S	s6, RISCV_TRAP_REGS_OFFSET(s6)(sp)
-	REG_S	s7, RISCV_TRAP_REGS_OFFSET(s7)(sp)
-	REG_S	s8, RISCV_TRAP_REGS_OFFSET(s8)(sp)
-	REG_S	s9, RISCV_TRAP_REGS_OFFSET(s9)(sp)
-	REG_S	s10, RISCV_TRAP_REGS_OFFSET(s10)(sp)
-	REG_S	s11, RISCV_TRAP_REGS_OFFSET(s11)(sp)
-	REG_S	t3, RISCV_TRAP_REGS_OFFSET(t3)(sp)
-	REG_S	t4, RISCV_TRAP_REGS_OFFSET(t4)(sp)
-	REG_S	t5, RISCV_TRAP_REGS_OFFSET(t5)(sp)
-	REG_S	t6, RISCV_TRAP_REGS_OFFSET(t6)(sp)
+	REG_S	zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
+	REG_S	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
+	REG_S	tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+	REG_S	s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
+	REG_S	s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
+	REG_S	a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
+	REG_S	a1, SBI_TRAP_REGS_OFFSET(a1)(sp)
+	REG_S	a2, SBI_TRAP_REGS_OFFSET(a2)(sp)
+	REG_S	a3, SBI_TRAP_REGS_OFFSET(a3)(sp)
+	REG_S	a4, SBI_TRAP_REGS_OFFSET(a4)(sp)
+	REG_S	a5, SBI_TRAP_REGS_OFFSET(a5)(sp)
+	REG_S	a6, SBI_TRAP_REGS_OFFSET(a6)(sp)
+	REG_S	a7, SBI_TRAP_REGS_OFFSET(a7)(sp)
+	REG_S	s2, SBI_TRAP_REGS_OFFSET(s2)(sp)
+	REG_S	s3, SBI_TRAP_REGS_OFFSET(s3)(sp)
+	REG_S	s4, SBI_TRAP_REGS_OFFSET(s4)(sp)
+	REG_S	s5, SBI_TRAP_REGS_OFFSET(s5)(sp)
+	REG_S	s6, SBI_TRAP_REGS_OFFSET(s6)(sp)
+	REG_S	s7, SBI_TRAP_REGS_OFFSET(s7)(sp)
+	REG_S	s8, SBI_TRAP_REGS_OFFSET(s8)(sp)
+	REG_S	s9, SBI_TRAP_REGS_OFFSET(s9)(sp)
+	REG_S	s10, SBI_TRAP_REGS_OFFSET(s10)(sp)
+	REG_S	s11, SBI_TRAP_REGS_OFFSET(s11)(sp)
+	REG_S	t3, SBI_TRAP_REGS_OFFSET(t3)(sp)
+	REG_S	t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
+	REG_S	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
+	REG_S	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
 
 	/* Call C routine */
 	add	a0, sp, zero
@@ -299,36 +300,36 @@ _trap_handler:
 	call	sbi_trap_handler
 
 	/* Restore all general regisers except SP, RA, T0, T1, T2, and T3 */
-	REG_L	gp, RISCV_TRAP_REGS_OFFSET(gp)(sp)
-	REG_L	tp, RISCV_TRAP_REGS_OFFSET(tp)(sp)
-	REG_L	s0, RISCV_TRAP_REGS_OFFSET(s0)(sp)
-	REG_L	s1, RISCV_TRAP_REGS_OFFSET(s1)(sp)
-	REG_L	a0, RISCV_TRAP_REGS_OFFSET(a0)(sp)
-	REG_L	a1, RISCV_TRAP_REGS_OFFSET(a1)(sp)
-	REG_L	a2, RISCV_TRAP_REGS_OFFSET(a2)(sp)
-	REG_L	a3, RISCV_TRAP_REGS_OFFSET(a3)(sp)
-	REG_L	a4, RISCV_TRAP_REGS_OFFSET(a4)(sp)
-	REG_L	a5, RISCV_TRAP_REGS_OFFSET(a5)(sp)
-	REG_L	a6, RISCV_TRAP_REGS_OFFSET(a6)(sp)
-	REG_L	a7, RISCV_TRAP_REGS_OFFSET(a7)(sp)
-	REG_L	s2, RISCV_TRAP_REGS_OFFSET(s2)(sp)
-	REG_L	s3, RISCV_TRAP_REGS_OFFSET(s3)(sp)
-	REG_L	s4, RISCV_TRAP_REGS_OFFSET(s4)(sp)
-	REG_L	s5, RISCV_TRAP_REGS_OFFSET(s5)(sp)
-	REG_L	s6, RISCV_TRAP_REGS_OFFSET(s6)(sp)
-	REG_L	s7, RISCV_TRAP_REGS_OFFSET(s7)(sp)
-	REG_L	s8, RISCV_TRAP_REGS_OFFSET(s8)(sp)
-	REG_L	s9, RISCV_TRAP_REGS_OFFSET(s9)(sp)
-	REG_L	s10, RISCV_TRAP_REGS_OFFSET(s10)(sp)
-	REG_L	s11, RISCV_TRAP_REGS_OFFSET(s11)(sp)
-	REG_L	t3, RISCV_TRAP_REGS_OFFSET(t3)(sp)
-	REG_L	t4, RISCV_TRAP_REGS_OFFSET(t4)(sp)
-	REG_L	t5, RISCV_TRAP_REGS_OFFSET(t5)(sp)
-	REG_L	t6, RISCV_TRAP_REGS_OFFSET(t6)(sp)
+	REG_L	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
+	REG_L	tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+	REG_L	s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
+	REG_L	s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
+	REG_L	a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
+	REG_L	a1, SBI_TRAP_REGS_OFFSET(a1)(sp)
+	REG_L	a2, SBI_TRAP_REGS_OFFSET(a2)(sp)
+	REG_L	a3, SBI_TRAP_REGS_OFFSET(a3)(sp)
+	REG_L	a4, SBI_TRAP_REGS_OFFSET(a4)(sp)
+	REG_L	a5, SBI_TRAP_REGS_OFFSET(a5)(sp)
+	REG_L	a6, SBI_TRAP_REGS_OFFSET(a6)(sp)
+	REG_L	a7, SBI_TRAP_REGS_OFFSET(a7)(sp)
+	REG_L	s2, SBI_TRAP_REGS_OFFSET(s2)(sp)
+	REG_L	s3, SBI_TRAP_REGS_OFFSET(s3)(sp)
+	REG_L	s4, SBI_TRAP_REGS_OFFSET(s4)(sp)
+	REG_L	s5, SBI_TRAP_REGS_OFFSET(s5)(sp)
+	REG_L	s6, SBI_TRAP_REGS_OFFSET(s6)(sp)
+	REG_L	s7, SBI_TRAP_REGS_OFFSET(s7)(sp)
+	REG_L	s8, SBI_TRAP_REGS_OFFSET(s8)(sp)
+	REG_L	s9, SBI_TRAP_REGS_OFFSET(s9)(sp)
+	REG_L	s10, SBI_TRAP_REGS_OFFSET(s10)(sp)
+	REG_L	s11, SBI_TRAP_REGS_OFFSET(s11)(sp)
+	REG_L	t3, SBI_TRAP_REGS_OFFSET(t3)(sp)
+	REG_L	t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
+	REG_L	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
+	REG_L	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
 
 	/* Load T0 and T1 with MEPC and MSTATUS */
-	REG_L	t0, RISCV_TRAP_REGS_OFFSET(mepc)(sp)
-	REG_L	t1, RISCV_TRAP_REGS_OFFSET(mstatus)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
+	REG_L	t1, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
 
 	/*
 	 * Note: Jump here after fast trap handling
@@ -342,12 +343,12 @@ _trap_handler:
 	csrw	mstatus, t1
 
 	/* Restore RA, T0, T1, and T2 */
-	REG_L	ra, RISCV_TRAP_REGS_OFFSET(ra)(sp)
-	REG_L	t0, RISCV_TRAP_REGS_OFFSET(t0)(sp)
-	REG_L	t1, RISCV_TRAP_REGS_OFFSET(t1)(sp)
-	REG_L	t2, RISCV_TRAP_REGS_OFFSET(t2)(sp)
+	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+	REG_L	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+	REG_L	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
 
 	/* Restore SP */
-	REG_L	sp, RISCV_TRAP_REGS_OFFSET(sp)(sp)
+	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
 
 	mret
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 6fd7d5d75c4..6e1bff75fbc 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -69,46 +69,6 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
-#define RISCV_TRAP_REGS_zero			0
-#define RISCV_TRAP_REGS_ra			1
-#define RISCV_TRAP_REGS_sp			2
-#define RISCV_TRAP_REGS_gp			3
-#define RISCV_TRAP_REGS_tp			4
-#define RISCV_TRAP_REGS_t0			5
-#define RISCV_TRAP_REGS_t1			6
-#define RISCV_TRAP_REGS_t2			7
-#define RISCV_TRAP_REGS_s0			8
-#define RISCV_TRAP_REGS_s1			9
-#define RISCV_TRAP_REGS_a0			10
-#define RISCV_TRAP_REGS_a1			11
-#define RISCV_TRAP_REGS_a2			12
-#define RISCV_TRAP_REGS_a3			13
-#define RISCV_TRAP_REGS_a4			14
-#define RISCV_TRAP_REGS_a5			15
-#define RISCV_TRAP_REGS_a6			16
-#define RISCV_TRAP_REGS_a7			17
-#define RISCV_TRAP_REGS_s2			18
-#define RISCV_TRAP_REGS_s3			19
-#define RISCV_TRAP_REGS_s4			20
-#define RISCV_TRAP_REGS_s5			21
-#define RISCV_TRAP_REGS_s6			22
-#define RISCV_TRAP_REGS_s7			23
-#define RISCV_TRAP_REGS_s8			24
-#define RISCV_TRAP_REGS_s9			25
-#define RISCV_TRAP_REGS_s10			26
-#define RISCV_TRAP_REGS_s11			27
-#define RISCV_TRAP_REGS_t3			28
-#define RISCV_TRAP_REGS_t4			29
-#define RISCV_TRAP_REGS_t5			30
-#define RISCV_TRAP_REGS_t6			31
-#define RISCV_TRAP_REGS_mepc			32
-#define RISCV_TRAP_REGS_mstatus			33
-#define RISCV_TRAP_REGS_last			34
-
-#define RISCV_TRAP_REGS_OFFSET(x)		\
-				((RISCV_TRAP_REGS_##x) * __SIZEOF_POINTER__)
-#define RISCV_TRAP_REGS_SIZE			RISCV_TRAP_REGS_OFFSET(last)
-
 #ifndef __ASSEMBLY__
 
 #define csr_swap(csr, val)					\
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 4e5a054c0ef..67f7f38329c 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -10,6 +10,48 @@
 #ifndef __SBI_TRAP_H__
 #define __SBI_TRAP_H__
 
+#define SBI_TRAP_REGS_zero			0
+#define SBI_TRAP_REGS_ra			1
+#define SBI_TRAP_REGS_sp			2
+#define SBI_TRAP_REGS_gp			3
+#define SBI_TRAP_REGS_tp			4
+#define SBI_TRAP_REGS_t0			5
+#define SBI_TRAP_REGS_t1			6
+#define SBI_TRAP_REGS_t2			7
+#define SBI_TRAP_REGS_s0			8
+#define SBI_TRAP_REGS_s1			9
+#define SBI_TRAP_REGS_a0			10
+#define SBI_TRAP_REGS_a1			11
+#define SBI_TRAP_REGS_a2			12
+#define SBI_TRAP_REGS_a3			13
+#define SBI_TRAP_REGS_a4			14
+#define SBI_TRAP_REGS_a5			15
+#define SBI_TRAP_REGS_a6			16
+#define SBI_TRAP_REGS_a7			17
+#define SBI_TRAP_REGS_s2			18
+#define SBI_TRAP_REGS_s3			19
+#define SBI_TRAP_REGS_s4			20
+#define SBI_TRAP_REGS_s5			21
+#define SBI_TRAP_REGS_s6			22
+#define SBI_TRAP_REGS_s7			23
+#define SBI_TRAP_REGS_s8			24
+#define SBI_TRAP_REGS_s9			25
+#define SBI_TRAP_REGS_s10			26
+#define SBI_TRAP_REGS_s11			27
+#define SBI_TRAP_REGS_t3			28
+#define SBI_TRAP_REGS_t4			29
+#define SBI_TRAP_REGS_t5			30
+#define SBI_TRAP_REGS_t6			31
+#define SBI_TRAP_REGS_mepc			32
+#define SBI_TRAP_REGS_mstatus			33
+#define SBI_TRAP_REGS_last			34
+
+#define SBI_TRAP_REGS_OFFSET(x)			\
+				((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__)
+#define SBI_TRAP_REGS_SIZE			SBI_TRAP_REGS_OFFSET(last)
+
+#ifndef __ASSEMBLY__
+
 #include <sbi/sbi_types.h>
 
 struct sbi_trap_regs {
@@ -59,3 +101,5 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch);
 
 #endif
+
+#endif

From 5797ae203555254c36fd21bc5aaa76a92ac4bd6c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 2 Jan 2019 14:51:30 +0530
Subject: [PATCH 0064/1765] include: Remove redundant tmp0 from struct
 sbi_scratch

The tmp0 member was added in struct sbi_scratch to assist
register save/restore at time of trap handling. This tmp0
is not unsed any more hence removing it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S        |  1 -
 include/sbi/sbi_scratch.h | 20 +++++++++-----------
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ab67a705271..ad6371bbb1e 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -154,7 +154,6 @@ _start_warm:
 	csrw	mscratch, tp
 
 	/* Initialize scratch space */
-	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 	la	a4, _fw_start
 	la	a5, _fw_end
 	mul	t0, s7, s8
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 14c72a853dc..25b00c32af3 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -12,16 +12,15 @@
 
 #include <sbi/riscv_asm.h>
 
-#define SBI_SCRATCH_TMP0_OFFSET			(0 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_FW_START_OFFSET		(1 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_FW_SIZE_OFFSET		(2 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(3 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(4 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_NEXT_MODE_OFFSET		(5 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(7 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(8 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_IPI_TYPE_OFFSET		(9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_FW_START_OFFSET		(0 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_FW_SIZE_OFFSET		(1 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(2 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(3 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_MODE_OFFSET		(4 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(5 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_IPI_TYPE_OFFSET		(8 * __SIZEOF_POINTER__)
 #define SBI_SCRATCH_SIZE			256
 
 #ifndef __ASSEMBLY__
@@ -29,7 +28,6 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch {
-	unsigned long tmp0;
 	unsigned long fw_start;
 	unsigned long fw_size;
 	unsigned long next_arg1;

From da86853a51e3cdddc12cff8c29116c2e87da525c Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Mon, 31 Dec 2018 13:00:39 +0900
Subject: [PATCH 0065/1765] Makefile: Fix messages

Instead of printing the generic "<build_directory>" and
"<install_directory>" strings, print the actual paths for the build
and install directories during "make clean" and "make distclean".

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 Makefile | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 346456548b1..0a8accffdaa 100644
--- a/Makefile
+++ b/Makefile
@@ -285,26 +285,26 @@ install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)
 .PHONY: clean
 clean:
 	$(V)mkdir -p $(build_dir)
-	$(if $(V), @echo " RM        <build_directory>/*.o")
+	$(if $(V), @echo " RM        $(build_dir)/*.o")
 	$(V)find $(build_dir) -type f -name "*.o" -exec rm -rf {} +
-	$(if $(V), @echo " RM        <build_directory>/*.a")
+	$(if $(V), @echo " RM        $(build_dir)/*.a")
 	$(V)find $(build_dir) -type f -name "*.a" -exec rm -rf {} +
-	$(if $(V), @echo " RM        <build_directory>/*.elf")
+	$(if $(V), @echo " RM        $(build_dir)/*.elf")
 	$(V)find $(build_dir) -type f -name "*.elf" -exec rm -rf {} +
-	$(if $(V), @echo " RM        <build_directory>/*.bin")
+	$(if $(V), @echo " RM        $(build_dir)/*.bin")
 	$(V)find $(build_dir) -type f -name "*.bin" -exec rm -rf {} +
 
 # Rule for "make distclean"
 .PHONY: distclean
 distclean: clean
 	$(V)mkdir -p $(build_dir)
-	$(if $(V), @echo " RM        <build_directory>/*.dep")
+	$(if $(V), @echo " RM        $(build_dir)/*.dep")
 	$(V)find $(build_dir) -type f -name "*.dep" -exec rm -rf {} +
 ifeq ($(build_dir),$(CURDIR)/build)
-	$(if $(V), @echo " RM        <build_directory>")
+	$(if $(V), @echo " RM        $(build_dir)")
 	$(V)rm -rf $(build_dir)
 endif
 ifeq ($(install_dir),$(CURDIR)/install)
-	$(if $(V), @echo " RM        <install_directory>")
+	$(if $(V), @echo " RM        $(install_dir)")
 	$(V)rm -rf $(install_dir)
 endif

From 4079df63a7a081c649a350eafd92af51d99df448 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 3 Jan 2019 13:34:32 +0900
Subject: [PATCH 0066/1765] platform: kendryte/k210: Declare local function
 static

k210_console_putc() and k210_console_init() are local functions. Declare
them as static.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 35119dbc317..fd0b31adff2 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -18,14 +18,14 @@
 
 #define K210_UART_BAUDRATE		115200
 
-int k210_console_init(void)
+static int k210_console_init(void)
 {
 	uarths_init(K210_UART_BAUDRATE, UARTHS_STOP_1);
 
 	return 0;
 }
 
-void k210_console_putc(char c)
+static void k210_console_putc(char c)
 {
 	uarths_putc(c);
 }

From c37a8508d14dae5b0d09c74b5de905bc585abbe3 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 3 Jan 2019 14:32:25 +0900
Subject: [PATCH 0067/1765] platform: kendryte/k210: Simplify sysctl code

Simplify sysctl.c code to only the used CPU freqency function.
This reduces the size of the final firmware by 4KB.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/sysctl.c | 1766 +------------------------------
 platform/kendryte/k210/sysctl.h |  161 +--
 platform/kendryte/k210/uarths.c |    2 +-
 3 files changed, 20 insertions(+), 1909 deletions(-)

diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index 90aa0e2355e..5977e33086b 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -15,959 +15,18 @@
 #include <sbi/riscv_encoding.h>
 #include "sysctl.h"
 
-#define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
-
-const u8 get_select_pll2[] = {
-	[SYSCTL_SOURCE_IN0] = 0,
-	[SYSCTL_SOURCE_PLL0] = 1,
-	[SYSCTL_SOURCE_PLL1] = 2,
-};
-
-const u8 get_source_pll2[] = {
-	[0] = SYSCTL_SOURCE_IN0,
-	[1] = SYSCTL_SOURCE_PLL0,
-	[2] = SYSCTL_SOURCE_PLL1,
-};
-
-const u8 get_select_aclk[] = {
-	[SYSCTL_SOURCE_IN0] = 0,
-	[SYSCTL_SOURCE_PLL0] = 1,
-};
-
-const u8 get_source_aclk[] = {
-	[0] = SYSCTL_SOURCE_IN0,
-	[1] = SYSCTL_SOURCE_PLL0,
-};
-
 volatile sysctl_t *const sysctl = (volatile sysctl_t *)SYSCTL_BASE_ADDR;
 
-u32 sysctl_get_git_id(void)
-{
-	return sysctl->git_id.git_id;
-}
-
-u32 sysctl_get_freq(void)
-{
-	return sysctl->clk_freq.clk_freq;
-}
-
-static void sysctl_reset_ctl(sysctl_reset_t reset, u8 rst_value)
-{
-	switch (reset) {
-	case SYSCTL_RESET_SOC:
-		sysctl->soft_reset.soft_reset = rst_value;
-		break;
-	case SYSCTL_RESET_ROM:
-		sysctl->peri_reset.rom_reset = rst_value;
-		break;
-	case SYSCTL_RESET_DMA:
-		sysctl->peri_reset.dma_reset = rst_value;
-		break;
-	case SYSCTL_RESET_AI:
-		sysctl->peri_reset.ai_reset = rst_value;
-		break;
-	case SYSCTL_RESET_DVP:
-		sysctl->peri_reset.dvp_reset = rst_value;
-		break;
-	case SYSCTL_RESET_FFT:
-		sysctl->peri_reset.fft_reset = rst_value;
-		break;
-	case SYSCTL_RESET_GPIO:
-		sysctl->peri_reset.gpio_reset = rst_value;
-		break;
-	case SYSCTL_RESET_SPI0:
-		sysctl->peri_reset.spi0_reset = rst_value;
-		break;
-	case SYSCTL_RESET_SPI1:
-		sysctl->peri_reset.spi1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_SPI2:
-		sysctl->peri_reset.spi2_reset = rst_value;
-		break;
-	case SYSCTL_RESET_SPI3:
-		sysctl->peri_reset.spi3_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2S0:
-		sysctl->peri_reset.i2s0_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2S1:
-		sysctl->peri_reset.i2s1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2S2:
-		sysctl->peri_reset.i2s2_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2C0:
-		sysctl->peri_reset.i2c0_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2C1:
-		sysctl->peri_reset.i2c1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_I2C2:
-		sysctl->peri_reset.i2c2_reset = rst_value;
-		break;
-	case SYSCTL_RESET_UART1:
-		sysctl->peri_reset.uart1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_UART2:
-		sysctl->peri_reset.uart2_reset = rst_value;
-		break;
-	case SYSCTL_RESET_UART3:
-		sysctl->peri_reset.uart3_reset = rst_value;
-		break;
-	case SYSCTL_RESET_AES:
-		sysctl->peri_reset.aes_reset = rst_value;
-		break;
-	case SYSCTL_RESET_FPIOA:
-		sysctl->peri_reset.fpioa_reset = rst_value;
-		break;
-	case SYSCTL_RESET_TIMER0:
-		sysctl->peri_reset.timer0_reset = rst_value;
-		break;
-	case SYSCTL_RESET_TIMER1:
-		sysctl->peri_reset.timer1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_TIMER2:
-		sysctl->peri_reset.timer2_reset = rst_value;
-		break;
-	case SYSCTL_RESET_WDT0:
-		sysctl->peri_reset.wdt0_reset = rst_value;
-		break;
-	case SYSCTL_RESET_WDT1:
-		sysctl->peri_reset.wdt1_reset = rst_value;
-		break;
-	case SYSCTL_RESET_SHA:
-		sysctl->peri_reset.sha_reset = rst_value;
-		break;
-	case SYSCTL_RESET_RTC:
-		sysctl->peri_reset.rtc_reset = rst_value;
-		break;
-
-	default:
-		break;
-	}
-}
-
-void sysctl_reset(sysctl_reset_t reset)
-{
-	sysctl_reset_ctl(reset, 1);
-	sysctl_reset_ctl(reset, 0);
-}
-
-static int sysctl_clock_bus_en(sysctl_clock_t clock, u8 en)
-{
-	/*
-	 * The timer is under APB0, to prevent apb0_clk_en1 and apb0_clk_en0
-	 * on same register, we split it to peripheral and central two
-	 * registers, to protect CPU close apb0 clock accidentally.
-	 *
-	 * The apb0_clk_en0 and apb0_clk_en1 have same function,
-	 * one of them set, the APB0 clock enable.
-	 */
-
-	/* The APB clock should carefully disable */
-	if (en) {
-		switch (clock) {
-		/*
-		 * These peripheral devices are under APB0
-		 * GPIO, UART1, UART2, UART3, SPI_SLAVE, I2S0, I2S1,
-		 * I2S2, I2C0, I2C1, I2C2, FPIOA, SHA256, TIMER0,
-		 * TIMER1, TIMER2
-		 */
-		case SYSCTL_CLOCK_GPIO:
-		case SYSCTL_CLOCK_SPI2:
-		case SYSCTL_CLOCK_I2S0:
-		case SYSCTL_CLOCK_I2S1:
-		case SYSCTL_CLOCK_I2S2:
-		case SYSCTL_CLOCK_I2C0:
-		case SYSCTL_CLOCK_I2C1:
-		case SYSCTL_CLOCK_I2C2:
-		case SYSCTL_CLOCK_UART1:
-		case SYSCTL_CLOCK_UART2:
-		case SYSCTL_CLOCK_UART3:
-		case SYSCTL_CLOCK_FPIOA:
-		case SYSCTL_CLOCK_TIMER0:
-		case SYSCTL_CLOCK_TIMER1:
-		case SYSCTL_CLOCK_TIMER2:
-		case SYSCTL_CLOCK_SHA:
-			sysctl->clk_en_cent.apb0_clk_en = en;
-			break;
-
-		/*
-		 * These peripheral devices are under APB1
-		 * WDT, AES, OTP, DVP, SYSCTL
-		 */
-		case SYSCTL_CLOCK_AES:
-		case SYSCTL_CLOCK_WDT0:
-		case SYSCTL_CLOCK_WDT1:
-		case SYSCTL_CLOCK_OTP:
-		case SYSCTL_CLOCK_RTC:
-			sysctl->clk_en_cent.apb1_clk_en = en;
-			break;
-
-		/*
-		 * These peripheral devices are under APB2
-		 * SPI0, SPI1
-		 */
-		case SYSCTL_CLOCK_SPI0:
-		case SYSCTL_CLOCK_SPI1:
-			sysctl->clk_en_cent.apb2_clk_en = en;
-			break;
-
-		default:
-			break;
-		}
-	}
-
-	return 0;
-}
-
-static int sysctl_clock_device_en(sysctl_clock_t clock, u8 en)
-{
-	switch (clock) {
-	/*
-	 * These devices are PLL
-	 */
-	case SYSCTL_CLOCK_PLL0:
-		sysctl->pll0.pll_out_en0 = en;
-		break;
-	case SYSCTL_CLOCK_PLL1:
-		sysctl->pll1.pll_out_en1 = en;
-		break;
-	case SYSCTL_CLOCK_PLL2:
-		sysctl->pll2.pll_out_en2 = en;
-		break;
-
-	/*
-	 * These devices are CPU, SRAM, APB bus, ROM, DMA, AI
-	 */
-	case SYSCTL_CLOCK_CPU:
-		sysctl->clk_en_cent.cpu_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SRAM0:
-		sysctl->clk_en_cent.sram0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SRAM1:
-		sysctl->clk_en_cent.sram1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_APB0:
-		sysctl->clk_en_cent.apb0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_APB1:
-		sysctl->clk_en_cent.apb1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_APB2:
-		sysctl->clk_en_cent.apb2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_ROM:
-		sysctl->clk_en_peri.rom_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_DMA:
-		sysctl->clk_en_peri.dma_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_AI:
-		sysctl->clk_en_peri.ai_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_DVP:
-		sysctl->clk_en_peri.dvp_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_FFT:
-		sysctl->clk_en_peri.fft_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SPI3:
-		sysctl->clk_en_peri.spi3_clk_en = en;
-		break;
-
-	/*
-	 * These peripheral devices are under APB0
-	 * GPIO, UART1, UART2, UART3, SPI_SLAVE, I2S0, I2S1,
-	 * I2S2, I2C0, I2C1, I2C2, FPIOA, SHA256, TIMER0,
-	 * TIMER1, TIMER2
-	 */
-	case SYSCTL_CLOCK_GPIO:
-		sysctl->clk_en_peri.gpio_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SPI2:
-		sysctl->clk_en_peri.spi2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2S0:
-		sysctl->clk_en_peri.i2s0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2S1:
-		sysctl->clk_en_peri.i2s1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2S2:
-		sysctl->clk_en_peri.i2s2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2C0:
-		sysctl->clk_en_peri.i2c0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2C1:
-		sysctl->clk_en_peri.i2c1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_I2C2:
-		sysctl->clk_en_peri.i2c2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_UART1:
-		sysctl->clk_en_peri.uart1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_UART2:
-		sysctl->clk_en_peri.uart2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_UART3:
-		sysctl->clk_en_peri.uart3_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_FPIOA:
-		sysctl->clk_en_peri.fpioa_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_TIMER0:
-		sysctl->clk_en_peri.timer0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_TIMER1:
-		sysctl->clk_en_peri.timer1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_TIMER2:
-		sysctl->clk_en_peri.timer2_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SHA:
-		sysctl->clk_en_peri.sha_clk_en = en;
-		break;
-
-	/*
-	 * These peripheral devices are under APB1
-	 * WDT, AES, OTP, DVP, SYSCTL
-	 */
-	case SYSCTL_CLOCK_AES:
-		sysctl->clk_en_peri.aes_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_WDT0:
-		sysctl->clk_en_peri.wdt0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_WDT1:
-		sysctl->clk_en_peri.wdt1_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_OTP:
-		sysctl->clk_en_peri.otp_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_RTC:
-		sysctl->clk_en_peri.rtc_clk_en = en;
-		break;
-
-	/*
-	 * These peripheral devices are under APB2
-	 * SPI0, SPI1
-	 */
-	case SYSCTL_CLOCK_SPI0:
-		sysctl->clk_en_peri.spi0_clk_en = en;
-		break;
-	case SYSCTL_CLOCK_SPI1:
-		sysctl->clk_en_peri.spi1_clk_en = en;
-		break;
-
-	default:
-		break;
-	}
-
-	return 0;
-}
-
-int sysctl_clock_enable(sysctl_clock_t clock)
-{
-	if (clock >= SYSCTL_CLOCK_MAX)
-		return -1;
-
-	sysctl_clock_bus_en(clock, 1);
-	sysctl_clock_device_en(clock, 1);
-
-	return 0;
-}
-
-int sysctl_clock_disable(sysctl_clock_t clock)
-{
-	if (clock >= SYSCTL_CLOCK_MAX)
-		return -1;
-
-	sysctl_clock_bus_en(clock, 0);
-	sysctl_clock_device_en(clock, 0);
-
-	return 0;
-}
-
-int sysctl_clock_set_threshold(sysctl_threshold_t which, int threshold)
-{
-	int result = 0;
-
-	switch (which) {
-	/*
-	 * These threshold is 2 bit width
-	 */
-	case SYSCTL_THRESHOLD_ACLK:
-		sysctl->clk_sel0.aclk_divider_sel = (u8)threshold & 0x03;
-		break;
-
-	/*
-	 * These threshold is 3 bit width
-	 */
-	case SYSCTL_THRESHOLD_APB0:
-		sysctl->clk_sel0.apb0_clk_sel = (u8)threshold & 0x07;
-		break;
-	case SYSCTL_THRESHOLD_APB1:
-		sysctl->clk_sel0.apb1_clk_sel = (u8)threshold & 0x07;
-		break;
-	case SYSCTL_THRESHOLD_APB2:
-		sysctl->clk_sel0.apb2_clk_sel = (u8)threshold & 0x07;
-		break;
-
-	/*
-	 * These threshold is 4 bit width
-	 */
-	case SYSCTL_THRESHOLD_SRAM0:
-		sysctl->clk_th0.sram0_gclk_threshold = (u8)threshold & 0x0F;
-		break;
-	case SYSCTL_THRESHOLD_SRAM1:
-		sysctl->clk_th0.sram1_gclk_threshold = (u8)threshold & 0x0F;
-		break;
-	case SYSCTL_THRESHOLD_AI:
-		sysctl->clk_th0.ai_gclk_threshold = (u8)threshold & 0x0F;
-		break;
-	case SYSCTL_THRESHOLD_DVP:
-		sysctl->clk_th0.dvp_gclk_threshold = (u8)threshold & 0x0F;
-		break;
-	case SYSCTL_THRESHOLD_ROM:
-		sysctl->clk_th0.rom_gclk_threshold = (u8)threshold & 0x0F;
-		break;
-
-	/*
-	 * These threshold is 8 bit width
-	 */
-	case SYSCTL_THRESHOLD_SPI0:
-		sysctl->clk_th1.spi0_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI1:
-		sysctl->clk_th1.spi1_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI2:
-		sysctl->clk_th1.spi2_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI3:
-		sysctl->clk_th1.spi3_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER0:
-		sysctl->clk_th2.timer0_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER1:
-		sysctl->clk_th2.timer1_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER2:
-		sysctl->clk_th2.timer2_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S0_M:
-		sysctl->clk_th4.i2s0_mclk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S1_M:
-		sysctl->clk_th4.i2s1_mclk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S2_M:
-		sysctl->clk_th5.i2s2_mclk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C0:
-		sysctl->clk_th5.i2c0_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C1:
-		sysctl->clk_th5.i2c1_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C2:
-		sysctl->clk_th5.i2c2_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_WDT0:
-		sysctl->clk_th6.wdt0_clk_threshold = (u8)threshold;
-		break;
-	case SYSCTL_THRESHOLD_WDT1:
-		sysctl->clk_th6.wdt1_clk_threshold = (u8)threshold;
-		break;
-
-	/*
-	 * These threshold is 16 bit width
-	 */
-	case SYSCTL_THRESHOLD_I2S0:
-		sysctl->clk_th3.i2s0_clk_threshold = (u16)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S1:
-		sysctl->clk_th3.i2s1_clk_threshold = (u16)threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S2:
-		sysctl->clk_th4.i2s2_clk_threshold = (u16)threshold;
-		break;
-
-	default:
-		result = -1;
-		break;
-	}
-
-	return result;
-}
-
-int sysctl_clock_get_threshold(sysctl_threshold_t which)
-{
-	int threshold = 0;
-
-	switch (which) {
-	/*
-	 * Select and get threshold value
-	 */
-	case SYSCTL_THRESHOLD_ACLK:
-		threshold = (int)sysctl->clk_sel0.aclk_divider_sel;
-		break;
-	case SYSCTL_THRESHOLD_APB0:
-		threshold = (int)sysctl->clk_sel0.apb0_clk_sel;
-		break;
-	case SYSCTL_THRESHOLD_APB1:
-		threshold = (int)sysctl->clk_sel0.apb1_clk_sel;
-		break;
-	case SYSCTL_THRESHOLD_APB2:
-		threshold = (int)sysctl->clk_sel0.apb2_clk_sel;
-		break;
-	case SYSCTL_THRESHOLD_SRAM0:
-		threshold = (int)sysctl->clk_th0.sram0_gclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_SRAM1:
-		threshold = (int)sysctl->clk_th0.sram1_gclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_AI:
-		threshold = (int)sysctl->clk_th0.ai_gclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_DVP:
-		threshold = (int)sysctl->clk_th0.dvp_gclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_ROM:
-		threshold = (int)sysctl->clk_th0.rom_gclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI0:
-		threshold = (int)sysctl->clk_th1.spi0_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI1:
-		threshold = (int)sysctl->clk_th1.spi1_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI2:
-		threshold = (int)sysctl->clk_th1.spi2_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_SPI3:
-		threshold = (int)sysctl->clk_th1.spi3_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER0:
-		threshold = (int)sysctl->clk_th2.timer0_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER1:
-		threshold = (int)sysctl->clk_th2.timer1_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_TIMER2:
-		threshold = (int)sysctl->clk_th2.timer2_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S0:
-		threshold = (int)sysctl->clk_th3.i2s0_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S1:
-		threshold = (int)sysctl->clk_th3.i2s1_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S2:
-		threshold = (int)sysctl->clk_th4.i2s2_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S0_M:
-		threshold = (int)sysctl->clk_th4.i2s0_mclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S1_M:
-		threshold = (int)sysctl->clk_th4.i2s1_mclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2S2_M:
-		threshold = (int)sysctl->clk_th5.i2s2_mclk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C0:
-		threshold = (int)sysctl->clk_th5.i2c0_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C1:
-		threshold = (int)sysctl->clk_th5.i2c1_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_I2C2:
-		threshold = (int)sysctl->clk_th5.i2c2_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_WDT0:
-		threshold = (int)sysctl->clk_th6.wdt0_clk_threshold;
-		break;
-	case SYSCTL_THRESHOLD_WDT1:
-		threshold = (int)sysctl->clk_th6.wdt1_clk_threshold;
-		break;
-
-	default:
-		break;
-	}
-
-	return threshold;
-}
-
-int sysctl_clock_set_clock_select(sysctl_clock_select_t which, int select)
-{
-	int result = 0;
-
-	switch (which) {
-	/*
-	 * These clock select is 1 bit width
-	 */
-	case SYSCTL_CLOCK_SELECT_PLL0_BYPASS:
-		sysctl->pll0.pll_bypass0 = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_PLL1_BYPASS:
-		sysctl->pll1.pll_bypass1 = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_PLL2_BYPASS:
-		sysctl->pll2.pll_bypass2 = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_ACLK:
-		sysctl->clk_sel0.aclk_sel = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_SPI3:
-		sysctl->clk_sel0.spi3_clk_sel = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER0:
-		sysctl->clk_sel0.timer0_clk_sel = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER1:
-		sysctl->clk_sel0.timer1_clk_sel = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER2:
-		sysctl->clk_sel0.timer2_clk_sel = select & 0x01;
-		break;
-	case SYSCTL_CLOCK_SELECT_SPI3_SAMPLE:
-		sysctl->clk_sel1.spi3_sample_clk_sel = select & 0x01;
-		break;
-
-	/*
-	 * These clock select is 2 bit width
-	 */
-	case SYSCTL_CLOCK_SELECT_PLL2:
-		sysctl->pll2.pll_ckin_sel2 = select & 0x03;
-		break;
-
-	default:
-		result = -1;
-		break;
-	}
-
-	return result;
-}
-
-int sysctl_clock_get_clock_select(sysctl_clock_select_t which)
-{
-	int clock_select = 0;
-
-	switch (which) {
-	/*
-	 * Select and get clock select value
-	 */
-	case SYSCTL_CLOCK_SELECT_PLL0_BYPASS:
-		clock_select = (int)sysctl->pll0.pll_bypass0;
-		break;
-	case SYSCTL_CLOCK_SELECT_PLL1_BYPASS:
-		clock_select = (int)sysctl->pll1.pll_bypass1;
-		break;
-	case SYSCTL_CLOCK_SELECT_PLL2_BYPASS:
-		clock_select = (int)sysctl->pll2.pll_bypass2;
-		break;
-	case SYSCTL_CLOCK_SELECT_PLL2:
-		clock_select = (int)sysctl->pll2.pll_ckin_sel2;
-		break;
-	case SYSCTL_CLOCK_SELECT_ACLK:
-		clock_select = (int)sysctl->clk_sel0.aclk_sel;
-		break;
-	case SYSCTL_CLOCK_SELECT_SPI3:
-		clock_select = (int)sysctl->clk_sel0.spi3_clk_sel;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER0:
-		clock_select = (int)sysctl->clk_sel0.timer0_clk_sel;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER1:
-		clock_select = (int)sysctl->clk_sel0.timer1_clk_sel;
-		break;
-	case SYSCTL_CLOCK_SELECT_TIMER2:
-		clock_select = (int)sysctl->clk_sel0.timer2_clk_sel;
-		break;
-	case SYSCTL_CLOCK_SELECT_SPI3_SAMPLE:
-		clock_select = (int)sysctl->clk_sel1.spi3_sample_clk_sel;
-		break;
-
-	default:
-		break;
-	}
-
-	return clock_select;
-}
-
-u32 sysctl_clock_source_get_freq(sysctl_clock_source_t input)
-{
-	u32 result;
-
-	switch (input) {
-	case SYSCTL_SOURCE_IN0:
-		result = SYSCTRL_CLOCK_FREQ_IN0;
-		break;
-	case SYSCTL_SOURCE_PLL0:
-		result = sysctl_pll_get_freq(SYSCTL_PLL0);
-		break;
-	case SYSCTL_SOURCE_PLL1:
-		result = sysctl_pll_get_freq(SYSCTL_PLL1);
-		break;
-	case SYSCTL_SOURCE_PLL2:
-		result = sysctl_pll_get_freq(SYSCTL_PLL2);
-		break;
-	case SYSCTL_SOURCE_ACLK:
-		result = sysctl_clock_get_freq(SYSCTL_CLOCK_ACLK);
-		break;
-	default:
-		result = 0;
-		break;
-	}
-
-	return result;
-}
-
-static int sysctl_pll_is_lock(sysctl_pll_t pll)
-{
-	/*
-	 * All bit enable means PLL lock
-	 *
-	 * struct pll_lock_t
-	 * {
-	 *         u8 overflow : 1;
-	 *         u8 rfslip : 1;
-	 *         u8 fbslip : 1;
-	 * };
-	 *
-	 */
-
-	if (pll >= SYSCTL_PLL_MAX)
-		return 0;
-
-	switch (pll) {
-	case SYSCTL_PLL0:
-		return sysctl->pll_lock.pll_lock0 == 3;
-
-	case SYSCTL_PLL1:
-		return sysctl->pll_lock.pll_lock1 & 1;
-
-	case SYSCTL_PLL2:
-		return sysctl->pll_lock.pll_lock2 & 1;
-
-	default:
-		break;
-	}
-
-	return 0;
-}
-
-static int sysctl_pll_clear_slip(sysctl_pll_t pll)
-{
-	if (pll >= SYSCTL_PLL_MAX)
-		return -1;
-
-	switch (pll) {
-	case SYSCTL_PLL0:
-		sysctl->pll_lock.pll_slip_clear0 = 1;
-		break;
-
-	case SYSCTL_PLL1:
-		sysctl->pll_lock.pll_slip_clear1 = 1;
-		break;
-
-	case SYSCTL_PLL2:
-		sysctl->pll_lock.pll_slip_clear2 = 1;
-		break;
-
-	default:
-		break;
-	}
-
-	return sysctl_pll_is_lock(pll) ? 0 : -1;
-}
-
-int sysctl_pll_enable(sysctl_pll_t pll)
-{
-	/*
-	 *       ---+
-	 * PWRDN    |
-	 *          +-------------------------------------------------------------
-	 *          ^
-	 *          |
-	 *          |
-	 *          t1
-	 *                 +------------------+
-	 * RESET           |                  |
-	 *       ----------+                  +-----------------------------------
-	 *                 ^                  ^                              ^
-	 *                 |<----- t_rst ---->|<---------- t_lock ---------->|
-	 *                 |                  |                              |
-	 *                 t2                 t3                             t4
-	 */
-
-	if (pll >= SYSCTL_PLL_MAX)
-		return -1;
-
-	switch (pll) {
-	case SYSCTL_PLL0:
-		/* Do not bypass PLL */
-		sysctl->pll0.pll_bypass0 = 0;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll0.pll_pwrd0 = 1;
-		/*
-		 * Reset trigger of the PLL, connected RESET
-		 * 0 is free
-		 * 1 is reset
-		 */
-		sysctl->pll0.pll_reset0 = 0;
-		sysctl->pll0.pll_reset0 = 1;
-		asm volatile ("nop");
-		asm volatile ("nop");
-		sysctl->pll0.pll_reset0 = 0;
-		break;
-
-	case SYSCTL_PLL1:
-		/* Do not bypass PLL */
-		sysctl->pll1.pll_bypass1 = 0;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll1.pll_pwrd1 = 1;
-		/*
-		 * Reset trigger of the PLL, connected RESET
-		 * 0 is free
-		 * 1 is reset
-		 */
-		sysctl->pll1.pll_reset1 = 0;
-		sysctl->pll1.pll_reset1 = 1;
-		asm volatile ("nop");
-		asm volatile ("nop");
-		sysctl->pll1.pll_reset1 = 0;
-		break;
-
-	case SYSCTL_PLL2:
-		/* Do not bypass PLL */
-		sysctl->pll2.pll_bypass2 = 0;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll2.pll_pwrd2 = 1;
-		/*
-		 * Reset trigger of the PLL, connected RESET
-		 * 0 is free
-		 * 1 is reset
-		 */
-		sysctl->pll2.pll_reset2 = 0;
-		sysctl->pll2.pll_reset2 = 1;
-		asm volatile ("nop");
-		asm volatile ("nop");
-		sysctl->pll2.pll_reset2 = 0;
-		break;
-
-	default:
-		break;
-	}
-
-	return 0;
-}
-
-int sysctl_pll_disable(sysctl_pll_t pll)
-{
-	if (pll >= SYSCTL_PLL_MAX)
-		return -1;
-
-	switch (pll) {
-	case SYSCTL_PLL0:
-		/* Bypass PLL */
-		sysctl->pll0.pll_bypass0 = 1;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll0.pll_pwrd0 = 0;
-		break;
-
-	case SYSCTL_PLL1:
-		/* Bypass PLL */
-		sysctl->pll1.pll_bypass1 = 1;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll1.pll_pwrd1 = 0;
-		break;
-
-	case SYSCTL_PLL2:
-		/* Bypass PLL */
-		sysctl->pll2.pll_bypass2 = 1;
-		/*
-		 * Power on the PLL, negtive from PWRDN
-		 * 0 is power off
-		 * 1 is power on
-		 */
-		sysctl->pll2.pll_pwrd2 = 0;
-		break;
-
-	default:
-		break;
-	}
-
-	return 0;
-}
+#define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
 
-u32 sysctl_pll_get_freq(sysctl_pll_t pll)
+static u32 sysctl_pll0_get_freq(void)
 {
-	u32 freq_in = 0;
-	u32 nr = 0, nf = 0, od = 0;
-	u8 select = 0;
-
-	if (pll >= SYSCTL_PLL_MAX)
-		return 0;
+	u32 freq_in, nr, nf, od;
 
-	switch (pll) {
-	case SYSCTL_PLL0:
-		freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		nr      = sysctl->pll0.clkr0 + 1;
-		nf      = sysctl->pll0.clkf0 + 1;
-		od      = sysctl->pll0.clkod0 + 1;
-		break;
-
-	case SYSCTL_PLL1:
-		freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		nr      = sysctl->pll1.clkr1 + 1;
-		nf      = sysctl->pll1.clkf1 + 1;
-		od      = sysctl->pll1.clkod1 + 1;
-		break;
-
-	case SYSCTL_PLL2:
-		/*
-		 * Get input freq accroding select register
-		 */
-		select = sysctl->pll2.pll_ckin_sel2;
-		if (select < sizeof(get_source_pll2))
-			freq_in = sysctl_clock_source_get_freq(get_source_pll2[select]);
-		else
-			return 0;
-
-		nr      = sysctl->pll2.clkr2 + 1;
-		nf      = sysctl->pll2.clkf2 + 1;
-		od      = sysctl->pll2.clkod2 + 1;
-		break;
-
-	default:
-		break;
-	}
+	freq_in = SYSCTRL_CLOCK_FREQ_IN0;
+	nr      = sysctl->pll0.clkr0 + 1;
+	nf      = sysctl->pll0.clkf0 + 1;
+	od      = sysctl->pll0.clkod0 + 1;
 
 	/*
 	 * Get final PLL output freq
@@ -977,812 +36,19 @@ u32 sysctl_pll_get_freq(sysctl_pll_t pll)
 	return ((u64)freq_in * (u64)nf) / ((u64)nr * (u64)od);
 }
 
-#if 0
-static u32 sysctl_pll_source_set_freq(sysctl_pll_t pll,
-				      sysctl_clock_source_t source, u32 freq)
-{
-
-	const double vco_min = 3.5e+08;
-	const double vco_max = 1.75e+09;
-	const double ref_min = 1.36719e+07;
-	const double ref_max = 1.75e+09;
-	const int nr_min     = 1;
-	const int nr_max     = 16;
-	const int nf_min     = 1;
-	const int nf_max     = 64;
-	const int no_min     = 1;
-	const int no_max     = 16;
-	const int nb_min     = 1;
-	const int nb_max     = 64;
-	const int max_vco    = 1;
-	const int ref_rng    = 1;
-	int nr     = 0;
-	int nrx    = 0;
-	int nf     = 0;
-	int nfi    = 0;
-	int no     = 0;
-	int noe    = 0;
-	int not    = 0;
-	int nor    = 0;
-	int nore   = 0;
-	int nb     = 0;
-	int first  = 0;
-	int firstx = 0;
-	int found  = 0;
-	long long nfx = 0;
-	double fin = 0, fout = 0, fvco = 0;
-	double val = 0, nval = 0, err = 0, merr = 0, terr = 0;
-	int x_nrx = 0, x_no = 0, x_nb = 0;
-	long long x_nfx = 0;
-	double x_fvco = 0, x_err = 0;
-	sysctl_pll0_t pll0;
-	sysctl_pll1_t pll1;
-	sysctl_pll2_t pll2;
-	u32 freq_in = 0;
-
-	if (pll >= SYSCTL_PLL_MAX)
-		return 0;
-
-	if (source >= SYSCTL_SOURCE_MAX)
-		return 0;
-
-	switch (pll) {
-	case SYSCTL_PLL0:
-	case SYSCTL_PLL1:
-		/*
-		 * Check input clock source
-		 */
-		if (source != SYSCTL_SOURCE_IN0)
-			return 0;
-		freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		/*
-		 * Check input clock freq
-		 */
-		if (freq_in == 0)
-			return 0;
-		break;
-
-	case SYSCTL_PLL2:
-		/*
-		 * Check input clock source
-		 */
-		if (source < sizeof(get_select_pll2))
-			freq_in = sysctl_clock_source_get_freq(source);
-		/*
-		 * Check input clock freq
-		 */
-		if (freq_in == 0)
-			return 0;
-		break;
-
-	default:
-		return 0;
-	}
-
-	/*
-	 * Begin calculate PLL registers' value
-	 */
-	fin   = freq_in;
-	fout  = freq;
-	val   = fout / fin;
-	terr  = 0.5 / ((double)(nf_max / 2));
-	first = firstx = 1;
-	if (terr != -2) {
-		first = 0;
-		if (terr == 0)
-			terr = 1e-16;
-		merr = fabs(terr);
-	}
-	found = 0;
-	for (nfi = val; nfi < nf_max; ++nfi) {
-		nr = rint(((double)nfi) / val);
-		if (nr == 0)
-			continue;
-		if ((ref_rng) && (nr < nr_min))
-			continue;
-		if (fin / ((double)nr) > ref_max)
-			continue;
-		nrx = nr;
-		nf = nfx = nfi;
-		nval = ((double)nfx) / ((double)nr);
-		if (nf == 0)
-			nf = 1;
-		err = 1 - nval / val;
-
-		if ((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16)) {
-			not = floor(vco_max / fout);
-			for (no = (not > no_max) ? no_max : not; no > no_min; --no) {
-				if ((ref_rng) && ((nr / no) < nr_min))
-					continue;
-				if ((nr % no) == 0)
-					break;
-			}
-			if ((nr % no) != 0)
-				continue;
-			nor  = ((not > no_max) ? no_max : not) / no;
-			nore = nf_max / nf;
-			if (nor > nore)
-				nor = nore;
-			noe  = ceil(vco_min / fout);
-			if (!max_vco) {
-				nore = (noe - 1) / no + 1;
-				nor  = nore;
-				not  = 0; /* force next if to fail */
-			}
-			if ((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf))) {
-				no = nf_max / nf;
-				if (no > no_max)
-					no = no_max;
-				if (no > not)
-					no = not;
-				nfx *= no;
-				nf *= no;
-				if ((no > 1) && (!firstx))
-					continue;
-				/* wait for larger nf in later iterations */
-			} else {
-				nrx /= no;
-				nfx *= nor;
-				nf *= nor;
-				no *= nor;
-				if (no > no_max)
-					continue;
-				if ((nor > 1) && (!firstx))
-					continue;
-				/* wait for larger nf in later iterations */
-			}
-
-			nb = nfx;
-			if (nb < nb_min)
-				nb = nb_min;
-			if (nb > nb_max)
-				continue;
-
-			fvco = fin / ((double)nrx) * ((double)nfx);
-			if (fvco < vco_min)
-				continue;
-			if (fvco > vco_max)
-				continue;
-			if (nf < nf_min)
-				continue;
-			if ((ref_rng) && (fin / ((double)nrx) < ref_min))
-				continue;
-			if ((ref_rng) && (nrx > nr_max))
-				continue;
-			if (!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
-				continue;
-			if ((!firstx) && (terr >= 0) && (nrx > x_nrx))
-				continue;
-
-			found  = 1;
-			x_no   = no;
-			x_nrx  = nrx;
-			x_nfx  = nfx;
-			x_nb   = nb;
-			x_fvco = fvco;
-			x_err  = err;
-			first  = firstx = 0;
-			merr   = fabs(err);
-			if (terr != -1)
-				continue;
-		}
-	}
-
-	if (!found)
-		return 0;
-
-	nrx  = x_nrx;
-	nfx  = x_nfx;
-	no   = x_no;
-	nb   = x_nb;
-	fvco = x_fvco;
-	err  = x_err;
-	if ((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
-		return 0;
-
-	/*
-	 * Begin write PLL registers' value,
-	 * Using atomic write method.
-	 */
-	switch (pll) {
-	case SYSCTL_PLL0:
-		/* Read register from bus */
-		pll0 = sysctl->pll0;
-		/* Set register temporary value */
-		pll0.clkr0  = nrx - 1;
-		pll0.clkf0  = nfx - 1;
-		pll0.clkod0 = no - 1;
-		pll0.bwadj0 = nb - 1;
-		/* Write register back to bus */
-		sysctl->pll0 = pll0;
-		break;
-
-	case SYSCTL_PLL1:
-		/* Read register from bus */
-		pll1 = sysctl->pll1;
-		/* Set register temporary value */
-		pll1.clkr1  = nrx - 1;
-		pll1.clkf1  = nfx - 1;
-		pll1.clkod1 = no - 1;
-		pll1.bwadj1 = nb - 1;
-		/* Write register back to bus */
-		sysctl->pll1 = pll1;
-		break;
-
-	case SYSCTL_PLL2:
-		/* Read register from bus */
-		pll2 = sysctl->pll2;
-		/* Set register temporary value */
-		if (source < sizeof(get_select_pll2))
-			pll2.pll_ckin_sel2 = get_select_pll2[source];
-
-		pll2.clkr2  = nrx - 1;
-		pll2.clkf2  = nfx - 1;
-		pll2.clkod2 = no - 1;
-		pll2.bwadj2 = nb - 1;
-		/* Write register back to bus */
-		sysctl->pll2 = pll2;
-		break;
-
-	default:
-		return 0;
-	}
-
-	return sysctl_pll_get_freq(pll);
-}
-#endif
-
-u32 sysctl_clock_get_freq(sysctl_clock_t clock)
-{
-	u32 source = 0;
-	u32 result = 0;
-
-	switch (clock) {
-	/*
-	 * The clock IN0
-	 */
-	case SYSCTL_CLOCK_IN0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		result = source;
-		break;
-
-	/*
-	 * These clock directly under PLL clock domain
-	 * They are using gated divider.
-	 */
-	case SYSCTL_CLOCK_PLL0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_PLL1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL1);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_PLL2:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL2);
-		result = source;
-		break;
-
-	/*
-	 * These clock directly under ACLK clock domain
-	 */
-	case SYSCTL_CLOCK_CPU:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-				(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
-			break;
-		default:
-			break;
-		}
-		result = source;
-		break;
-	case SYSCTL_CLOCK_DMA:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-				(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
-			break;
-		default:
-			break;
-		}
-		result = source;
-		break;
-	case SYSCTL_CLOCK_FFT:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-				(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
-			break;
-		default:
-			break;
-		}
-		result = source;
-		break;
-	case SYSCTL_CLOCK_ACLK:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-				(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
-			break;
-		default:
-			break;
-		}
-		result = source;
-		break;
-	case SYSCTL_CLOCK_HCLK:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-				(2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
-			break;
-		default:
-			break;
-		}
-		result = source;
-		break;
-
-	/*
-	 * These clock under ACLK clock domain.
-	 * They are using gated divider.
-	 */
-	case SYSCTL_CLOCK_SRAM0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SRAM0) + 1);
-		break;
-	case SYSCTL_CLOCK_SRAM1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SRAM1) + 1);
-		break;
-	case SYSCTL_CLOCK_ROM:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ROM) + 1);
-		break;
-	case SYSCTL_CLOCK_DVP:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_DVP) + 1);
-		break;
-
-	/*
-	 * These clock under ACLK clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_APB0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_APB0) + 1);
-		break;
-	case SYSCTL_CLOCK_APB1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_APB1) + 1);
-		break;
-	case SYSCTL_CLOCK_APB2:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_ACLK);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_APB2) + 1);
-		break;
-
-	/*
-	 * These clock under AI clock domain.
-	 * They are using gated divider.
-	 */
-	case SYSCTL_CLOCK_AI:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL1);
-		result = source / (sysctl_clock_get_threshold(SYSCTL_THRESHOLD_AI) + 1);
-		break;
-
-	/*
-	 * These clock under I2S clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_I2S0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL2);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2S0) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_I2S1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL2);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2S1) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_I2S2:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL2);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2S2) + 1) * 2);
-		break;
-
-	/*
-	 * These clock under WDT clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_WDT0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_WDT0) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_WDT1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_WDT1) + 1) * 2);
-		break;
-
-	/*
-	 * These clock under PLL0 clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_SPI0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI0) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_SPI1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI1) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_SPI2:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI2) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_I2C0:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2C0) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_I2C1:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2C1) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_I2C2:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_I2C2) + 1) * 2);
-		break;
-
-	/*
-	 * These clock under PLL0_SEL clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_SPI3:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-			break;
-		default:
-			break;
-		}
-
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI3) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_TIMER0:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-			break;
-		default:
-			break;
-		}
-
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER0) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_TIMER1:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-			break;
-		default:
-			break;
-		}
-
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER1) + 1) * 2);
-		break;
-	case SYSCTL_CLOCK_TIMER2:
-		switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2)) {
-		case 0:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-			break;
-		case 1:
-			source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0);
-			break;
-		default:
-			break;
-		}
-
-		result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER2) + 1) * 2);
-		break;
-
-	/*
-	 * These clock under MISC clock domain.
-	 * They are using even divider.
-	 */
-
-	/*
-	 * These clock under APB0 clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_GPIO:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_UART1:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_UART2:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_UART3:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_FPIOA:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_SHA:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
-		result = source;
-		break;
-
-	/*
-	 * These clock under APB1 clock domain.
-	 * They are using even divider.
-	 */
-	case SYSCTL_CLOCK_AES:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_OTP:
-		source = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1);
-		result = source;
-		break;
-	case SYSCTL_CLOCK_RTC:
-		source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-		result = source;
-		break;
-
-	/*
-	 * These clock under APB2 clock domain.
-	 * They are using even divider.
-	 */
-	default:
-		break;
-	}
-
-	return result;
-}
-
-int sysctl_dma_select(sysctl_dma_channel_t channel, sysctl_dma_select_t select)
-{
-	sysctl_dma_sel0_t dma_sel0;
-	sysctl_dma_sel1_t dma_sel1;
-
-	/* Read register from bus */
-	dma_sel0 = sysctl->dma_sel0;
-	dma_sel1 = sysctl->dma_sel1;
-	switch (channel) {
-	case SYSCTL_DMA_CHANNEL_0:
-		dma_sel0.dma_sel0 = select;
-		break;
-
-	case SYSCTL_DMA_CHANNEL_1:
-		dma_sel0.dma_sel1 = select;
-		break;
-
-	case SYSCTL_DMA_CHANNEL_2:
-		dma_sel0.dma_sel2 = select;
-		break;
-
-	case SYSCTL_DMA_CHANNEL_3:
-		dma_sel0.dma_sel3 = select;
-		break;
-
-	case SYSCTL_DMA_CHANNEL_4:
-		dma_sel0.dma_sel4 = select;
-		break;
-
-	case SYSCTL_DMA_CHANNEL_5:
-		dma_sel1.dma_sel5 = select;
-		break;
-
-	default:
-		return -1;
-	}
-
-	/* Write register back to bus */
-	sysctl->dma_sel0 = dma_sel0;
-	sysctl->dma_sel1 = dma_sel1;
-
-	return 0;
-}
-
-u32 sysctl_pll_fast_enable_pll(void)
-{
-	sysctl_pll0_t pll0;
-	sysctl_pll1_t pll1;
-	sysctl_pll2_t pll2;
-
-	/* Read register from bus */
-	pll0 = sysctl->pll0;
-	pll1 = sysctl->pll1;
-	pll2 = sysctl->pll2;
-
-	/*
-	 * Begin write PLL registers' value,
-	 * Using atomic write method.
-	 */
-	/* PLL VCO MAX freq: 1.8GHz */
-
-	/* PLL0: 26M reference clk get 793M output clock */
-	pll0.clkr0  = 0;
-	pll0.clkf0  = 60;
-	pll0.clkod0 = 1;
-	pll0.bwadj0 = 60;
-
-	/* PLL1: 26M reference clk get 390M output clock */
-	pll1.clkr1  = 0;
-	pll1.clkf1  = 59;
-	pll1.clkod1 = 3;
-	pll1.bwadj1 = 59;
-
-	/* PLL2: 26M reference clk get 390M output clock */
-	pll2.clkr2  = 0;
-	pll2.clkf2  = 59;
-	pll2.clkod2 = 3;
-	pll2.bwadj2 = 59;
-
-	/* Write register to bus */
-	sysctl->pll0 = pll0;
-	sysctl->pll1 = pll1;
-	sysctl->pll2 = pll2;
-
-	sysctl_pll_enable(SYSCTL_PLL0);
-	sysctl_pll_enable(SYSCTL_PLL1);
-	sysctl_pll_enable(SYSCTL_PLL2);
-
-	while (sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
-		sysctl_pll_clear_slip(SYSCTL_PLL0);
-	while (sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
-		sysctl_pll_clear_slip(SYSCTL_PLL1);
-	while (sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
-		sysctl_pll_clear_slip(SYSCTL_PLL2);
-
-	sysctl_clock_enable(SYSCTL_CLOCK_PLL0);
-	sysctl_clock_enable(SYSCTL_CLOCK_PLL1);
-	sysctl_clock_enable(SYSCTL_CLOCK_PLL2);
-
-	/* Set ACLK to PLL0 */
-	sysctl_clock_set_clock_select(SYSCTL_CLOCK_SELECT_ACLK, SYSCTL_SOURCE_PLL0);
-
-	return 0;
-}
-
-u32 sysctl_set_spi0_dvp_data(u8 en)
+u32 sysctl_get_cpu_freq(void)
 {
-	sysctl->misc.spi_dvp_data_enable = en;
-	return 0;
-}
+	int clock_source;
 
-void sysctl_set_power_mode(sysctl_power_bank_t power_bank, sysctl_io_power_mode_t io_power_mode)
-{
-	if(io_power_mode)
-		*((u32 *)(&sysctl->power_sel)) |= (1 << power_bank);
-	else
-		*((u32 *)(&sysctl->power_sel)) &= ~(1 << power_bank);
-}
-
-#if 0
-u32 sysctl_pll_set_freq(sysctl_pll_t pll, u32 pll_freq)
-{
-	u32 result;
-
-	if(pll_freq == 0)
-		return 0;
-
-	volatile sysctl_general_pll_t *v_pll_t;
-	switch(pll) {
-	case SYSCTL_PLL0:
-		v_pll_t = (sysctl_general_pll_t *)(&sysctl->pll0);
-		break;
-	case SYSCTL_PLL1:
-		v_pll_t = (sysctl_general_pll_t *)(&sysctl->pll1);
-		break;
-	case SYSCTL_PLL2:
-		v_pll_t = (sysctl_general_pll_t *)(&sysctl->pll2);
-		break;
+	clock_source = (int)sysctl->clk_sel0.aclk_sel;
+	switch (clock_source) {
+	case 0:
+		return SYSCTRL_CLOCK_FREQ_IN0;
+	case 1:
+		return sysctl_pll0_get_freq() /
+			(2ULL << (int)sysctl->clk_sel0.aclk_divider_sel);
 	default:
 		return 0;
-		break;
 	}
-
-	/* 1. Change CPU CLK to XTAL */
-	if (pll == SYSCTL_PLL0)
-		sysctl_clock_set_clock_select(SYSCTL_CLOCK_SELECT_ACLK, SYSCTL_SOURCE_IN0);
-
-	/* 2. Disable PLL output */
-	v_pll_t->pll_out_en = 0;
-
-	/* 3. Turn off PLL */
-	v_pll_t->pll_pwrd = 0;
-
-	/* 4. Set PLL new value */
-	if (pll == SYSCTL_PLL2)
-		result = sysctl_pll_source_set_freq(pll, v_pll_t->pll_ckin_sel, pll_freq);
-	else
-		result = sysctl_pll_source_set_freq(pll, SYSCTL_SOURCE_IN0, pll_freq);
-
-	/* 5. Power on PLL */
-	v_pll_t->pll_pwrd = 1;
-	/* wait >100ns */
-	sysctl_usleep(1);
-
-	/* 6. Reset PLL then Release Reset*/
-	v_pll_t->pll_reset = 0;
-	v_pll_t->pll_reset = 1;
-	/* wait >100ns */
-	sysctl_usleep(1);
-	v_pll_t->pll_reset = 0;
-
-	/* 7. Get lock status, wait PLL stable */
-	while (sysctl_pll_is_lock(pll) == 0)
-		sysctl_pll_clear_slip(pll);
-
-	/* 8. Enable PLL output */
-	v_pll_t->pll_out_en = 1;
-
-	/* 9. Change CPU CLK to PLL */
-	if (pll == SYSCTL_PLL0)
-		sysctl_clock_set_clock_select(SYSCTL_CLOCK_SELECT_ACLK, SYSCTL_SOURCE_PLL0);
-
-	return result;
-}
-
-u32 sysctl_cpu_set_freq(u32 freq)
-{
-	if (freq == 0)
-		return 0;
-
-	return sysctl_pll_set_freq(SYSCTL_PLL0, (sysctl->clk_sel0.aclk_divider_sel + 1) * 2 * freq);
-}
-#endif
-
-void sysctl_enable_irq(void)
-{
-	csr_read_set(mie, MIP_MEIP);
-	csr_read_set(mstatus, MSTATUS_MIE);
 }
 
-void sysctl_disable_irq(void)
-{
-	csr_read_clear(mie, MIP_MEIP);
-	csr_read_clear(mstatus, MSTATUS_MIE);
-}
-
-u64 sysctl_get_time_us(void)
-{
-	u64 v_cycle = read_cycle();
-
-	return v_cycle * 1000000 / sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
-}
-
-void sysctl_usleep(u64 usec)
-{
-	u64 nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
-	u64 cycle = read_cycle();
-
-	while (read_cycle() - cycle < nop_all);
-}
diff --git a/platform/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
index 09d81aeca8d..aa95d628e22 100644
--- a/platform/kendryte/k210/sysctl.h
+++ b/platform/kendryte/k210/sysctl.h
@@ -782,164 +782,9 @@ typedef struct _sysctl_general_pll {
 } __attribute__((packed, aligned(4))) sysctl_general_pll_t;
 
 /**
- * System controller object instanse
+ * Get frequency of CPU
+ * @return      The frequency of the CPU
  */
-extern volatile sysctl_t *const sysctl;
-
-/**
- * Enable clock for peripheral
- * @param[in]   clock       The clock to be enable
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_clock_enable(sysctl_clock_t clock);
-
-/**
- * Enable clock for peripheral
- * @param[in]   clock       The clock to be disable
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_clock_disable(sysctl_clock_t clock);
-
-/**
- * Sysctl clock set threshold
- * @param[in]   which           Which threshold to set
- * @param[in]   threshold       The threshold value
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_clock_set_threshold(sysctl_threshold_t which, int threshold);
-
-/**
- * Sysctl clock get threshold
- * @param[in]   which       Which threshold to get
- * @return      The threshold value
- *     - Other  Value of threshold
- *     - -1     Fail
- */
-int sysctl_clock_get_threshold(sysctl_threshold_t which);
-
-/**
- * Sysctl clock set clock select
- * @param[in]   which       Which clock select to set
- * @param[in]   select      The clock select value
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_clock_set_clock_select(sysctl_clock_select_t which, int select);
-
-/**
- * Sysctl clock get clock select
- * @param[in]   which  Which clock select to get
- * @return      The clock select value
- *     - Other  Value of clock select
- *     - -1     Fail
- */
-int sysctl_clock_get_clock_select(sysctl_clock_select_t which);
-
-/**
- * Get PLL frequency
- * @param[in]   pll     The PLL id
- * @return      The frequency of PLL
- */
-u32 sysctl_pll_get_freq(sysctl_pll_t pll);
-
-/**
- * Get base clock frequency by clock id
- * @param[in]   clock       The clock id
- * @return      The clock frequency
- */
-u32 sysctl_clock_get_freq(sysctl_clock_t clock);
-
-/**
- * Reset device by reset controller
- * @param[in]   reset       The reset signal
- */
-void sysctl_reset(sysctl_reset_t reset);
-
-/**
- * Enable the PLL and power on with reset
- * @param[in]   pll     The pll id
- * @return      Result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_pll_enable(sysctl_pll_t pll);
-
-/**
- * Disable the PLL and power off
- * @param[in]   pll     The pll id
- * @return      Result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_pll_disable(sysctl_pll_t pll);
-
-/**
- * Select DMA channel handshake peripheral signal
- * @param[in]   channel     The DMA channel
- * @param[in]   select      The peripheral select
- * @return      Result
- *     - 0      Success
- *     - Other  Fail
- */
-int sysctl_dma_select(sysctl_dma_channel_t channel, sysctl_dma_select_t select);
-
-/**
- * Set SPI0_D0-D7 DVP_D0-D7 as spi and dvp data pin
- * @param[in]   en     Enable or not
- * @return      Result
- *     - 0      Success
- *     - Other  Fail
- */
-u32 sysctl_set_spi0_dvp_data(u8 en);
-
-/**
- * Set io power mode
- * @param[in]   power_bank          IO power bank
- * @param[in]   io_power_mode       Set power mode 3.3v or 1.8
- * @return      Result
- *     - 0      Success
- *     - Other  Fail
- */
-void sysctl_set_power_mode(sysctl_power_bank_t power_bank, sysctl_io_power_mode_t io_power_mode);
-
-/**
- * Set frequency of CPU
- * @param[in]   freq       The desired frequency in Hz
- * @return      The actual frequency of CPU after set
- */
-u32 sysctl_cpu_set_freq(u32 freq);
-
-/**
- * Init PLL freqency
- * @param[in]   pll            The PLL id
- * @param[in]   pll_freq       The desired frequency in Hz
-
- */
-u32 sysctl_pll_set_freq(sysctl_pll_t pll, u32 pll_freq);
-
-/**
- * Enable interrupt
- */
-void sysctl_enable_irq(void);
-
-/**
- * Disable interrupt
- */
-void sysctl_disable_irq(void);
-
-/**
- * Get the time start up to now
- * @return      The time of microsecond
- */
-u64 sysctl_get_time_us(void);
-
-void sysctl_usleep(u64 usec);
+u32 sysctl_get_cpu_freq(void);
 
 #endif /* _K210_SYSCTL_H_ */
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index 6551de76e37..2a189aaddd9 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -21,7 +21,7 @@ static volatile struct uarths *const uarths =
 
 void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
 {
-	u32 freq = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
+	u32 freq = sysctl_get_cpu_freq();
 	u16 div = freq / baud_rate - 1;
 
 	/* Set UART registers */

From 4d1eccc41d96413fae25cea5f941f7860429340b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 3 Jan 2019 10:37:43 +0530
Subject: [PATCH 0068/1765] include: Add hard FP access macros and defines

This patch adds hardware floating-point (hard FP) access
macros and defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h |  13 +++
 include/sbi/riscv_fp.h       |  73 +++++++++++++++
 lib/objects.mk               |   1 +
 lib/riscv_hardfp.S           | 171 +++++++++++++++++++++++++++++++++++
 lib/sbi_hart.c               |   8 +-
 5 files changed, 259 insertions(+), 7 deletions(-)
 create mode 100644 include/sbi/riscv_fp.h
 create mode 100644 lib/riscv_hardfp.S

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 381f3058960..a6651a15107 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -446,6 +446,19 @@
 #define INSN_MATCH_SD			0x3023
 #define INSN_MASK_SD			0x707f
 
+#define INSN_MATCH_FLW			0x2007
+#define INSN_MASK_FLW			0x707f
+#define INSN_MATCH_FLD			0x3007
+#define INSN_MASK_FLD			0x707f
+#define INSN_MATCH_FLQ			0x4007
+#define INSN_MASK_FLQ			0x707f
+#define INSN_MATCH_FSW			0x2027
+#define INSN_MASK_FSW			0x707f
+#define INSN_MATCH_FSD			0x3027
+#define INSN_MASK_FSD			0x707f
+#define INSN_MATCH_FSQ			0x4027
+#define INSN_MASK_FSQ			0x707f
+
 #define INSN_MATCH_C_LD			0x6000
 #define INSN_MASK_C_LD			0xe003
 #define INSN_MATCH_C_SD			0xe000
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
new file mode 100644
index 00000000000..0deb8e4a00c
--- /dev/null
+++ b/include/sbi/riscv_fp.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __RISCV_FP_H__
+#define __RISCV_FP_H__
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_types.h>
+
+#define GET_PRECISION(insn) (((insn) >> 25) & 3)
+#define GET_RM(insn) (((insn) >> 12) & 7)
+#define PRECISION_S 0
+#define PRECISION_D 1
+
+#ifdef __riscv_flen
+
+#define GET_F32_REG(insn, pos, regs) ({ \
+  register s32 value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
+  ulong tmp; \
+  asm ("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
+  value; })
+#define SET_F32_REG(insn, pos, regs, val) ({ \
+  register u32 value asm("a0") = (val); \
+  ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
+  ulong tmp; \
+  asm volatile ("1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
+#define init_fp_reg(i) SET_F32_REG((i) << 3, 3, 0, 0)
+#define GET_F64_REG(insn, pos, regs) ({ \
+  register ulong value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
+  ulong tmp; \
+  asm ("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
+  sizeof(ulong) == 4 ? *(int64_t*)value : (int64_t)value; })
+#define SET_F64_REG(insn, pos, regs, val) ({ \
+  uint64_t __val = (val); \
+  register ulong value asm("a0") = sizeof(ulong) == 4 ? (ulong)&__val : (ulong)__val; \
+  ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
+  ulong tmp; \
+  asm volatile ("1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
+#define GET_FCSR() csr_read(fcsr)
+#define SET_FCSR(value) csr_write(fcsr, (value))
+#define GET_FRM() csr_read(frm)
+#define SET_FRM(value) csr_write(frm, (value))
+#define GET_FFLAGS() csr_read(fflags)
+#define SET_FFLAGS(value) csr_write(fflags, (value))
+
+#define SET_FS_DIRTY() ((void) 0)
+
+#else
+#error "Floating point emulation not supported.\n"
+#endif
+
+#define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs))
+#define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs))
+#define GET_F32_RS3(insn, regs) (GET_F32_REG(insn, 27, regs))
+#define GET_F64_RS1(insn, regs) (GET_F64_REG(insn, 15, regs))
+#define GET_F64_RS2(insn, regs) (GET_F64_REG(insn, 20, regs))
+#define GET_F64_RS3(insn, regs) (GET_F64_REG(insn, 27, regs))
+#define SET_F32_RD(insn, regs, val) (SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY())
+#define SET_F64_RD(insn, regs, val) (SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY())
+
+#define GET_F32_RS2C(insn, regs) (GET_F32_REG(insn, 2, regs))
+#define GET_F32_RS2S(insn, regs) (GET_F32_REG(RVC_RS2S(insn), 0, regs))
+#define GET_F64_RS2C(insn, regs) (GET_F64_REG(insn, 2, regs))
+#define GET_F64_RS2S(insn, regs) (GET_F64_REG(RVC_RS2S(insn), 0, regs))
+
+#endif
diff --git a/lib/objects.mk b/lib/objects.mk
index b70557ddad7..2ce6328f591 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -9,6 +9,7 @@
 
 lib-objs-y += riscv_asm.o
 lib-objs-y += riscv_atomic.o
+lib-objs-y += riscv_hardfp.o
 lib-objs-y += riscv_locks.o
 
 lib-objs-y += sbi_console.o
diff --git a/lib/riscv_hardfp.S b/lib/riscv_hardfp.S
new file mode 100644
index 00000000000..11f3e41e613
--- /dev/null
+++ b/lib/riscv_hardfp.S
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifdef __riscv_flen
+
+#if __riscv_flen != 64
+# error single-float only is not supported
+#endif
+
+#define get_f32(which) fmv.x.s a0, which; jr t0
+#define put_f32(which) fmv.s.x which, a0; jr t0
+#if __riscv_xlen == 64
+# define get_f64(which) fmv.x.d a0, which; jr t0
+# define put_f64(which) fmv.d.x which, a0; jr t0
+#else
+# define get_f64(which) fsd which, 0(a0); jr t0
+# define put_f64(which) fld which, 0(a0); jr t0
+#endif
+
+	.text
+	.option norvc
+	.globl get_f32_reg
+	get_f32_reg:
+		get_f32(f0)
+		get_f32(f1)
+		get_f32(f2)
+		get_f32(f3)
+		get_f32(f4)
+		get_f32(f5)
+		get_f32(f6)
+		get_f32(f7)
+		get_f32(f8)
+		get_f32(f9)
+		get_f32(f10)
+		get_f32(f11)
+		get_f32(f12)
+		get_f32(f13)
+		get_f32(f14)
+		get_f32(f15)
+		get_f32(f16)
+		get_f32(f17)
+		get_f32(f18)
+		get_f32(f19)
+		get_f32(f20)
+		get_f32(f21)
+		get_f32(f22)
+		get_f32(f23)
+		get_f32(f24)
+		get_f32(f25)
+		get_f32(f26)
+		get_f32(f27)
+		get_f32(f28)
+		get_f32(f29)
+		get_f32(f30)
+		get_f32(f31)
+
+	.text
+	.globl put_f32_reg
+	put_f32_reg:
+		put_f32(f0)
+		put_f32(f1)
+		put_f32(f2)
+		put_f32(f3)
+		put_f32(f4)
+		put_f32(f5)
+		put_f32(f6)
+		put_f32(f7)
+		put_f32(f8)
+		put_f32(f9)
+		put_f32(f10)
+		put_f32(f11)
+		put_f32(f12)
+		put_f32(f13)
+		put_f32(f14)
+		put_f32(f15)
+		put_f32(f16)
+		put_f32(f17)
+		put_f32(f18)
+		put_f32(f19)
+		put_f32(f20)
+		put_f32(f21)
+		put_f32(f22)
+		put_f32(f23)
+		put_f32(f24)
+		put_f32(f25)
+		put_f32(f26)
+		put_f32(f27)
+		put_f32(f28)
+		put_f32(f29)
+		put_f32(f30)
+		put_f32(f31)
+
+	.text
+	.globl get_f64_reg
+	get_f64_reg:
+		get_f64(f0)
+		get_f64(f1)
+		get_f64(f2)
+		get_f64(f3)
+		get_f64(f4)
+		get_f64(f5)
+		get_f64(f6)
+		get_f64(f7)
+		get_f64(f8)
+		get_f64(f9)
+		get_f64(f10)
+		get_f64(f11)
+		get_f64(f12)
+		get_f64(f13)
+		get_f64(f14)
+		get_f64(f15)
+		get_f64(f16)
+		get_f64(f17)
+		get_f64(f18)
+		get_f64(f19)
+		get_f64(f20)
+		get_f64(f21)
+		get_f64(f22)
+		get_f64(f23)
+		get_f64(f24)
+		get_f64(f25)
+		get_f64(f26)
+		get_f64(f27)
+		get_f64(f28)
+		get_f64(f29)
+		get_f64(f30)
+		get_f64(f31)
+
+	.text
+	.globl put_f64_reg
+	put_f64_reg:
+		put_f64(f0)
+		put_f64(f1)
+		put_f64(f2)
+		put_f64(f3)
+		put_f64(f4)
+		put_f64(f5)
+		put_f64(f6)
+		put_f64(f7)
+		put_f64(f8)
+		put_f64(f9)
+		put_f64(f10)
+		put_f64(f11)
+		put_f64(f12)
+		put_f64(f13)
+		put_f64(f14)
+		put_f64(f15)
+		put_f64(f16)
+		put_f64(f17)
+		put_f64(f18)
+		put_f64(f19)
+		put_f64(f20)
+		put_f64(f21)
+		put_f64(f22)
+		put_f64(f23)
+		put_f64(f24)
+		put_f64(f25)
+		put_f64(f26)
+		put_f64(f27)
+		put_f64(f28)
+		put_f64(f29)
+		put_f64(f30)
+		put_f64(f31)
+
+#endif
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 1e5465f5d31..e8a689ed282 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -10,6 +10,7 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_fp.h>
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_console.h>
@@ -48,13 +49,6 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 		csr_write(sptbr, 0);
 }
 
-#ifdef __riscv_flen
-static void init_fp_reg(int i)
-{
-	/* TODO: */
-}
-#endif
-
 static int fp_init(u32 hartid)
 {
 #ifdef __riscv_flen

From 48dc50df8f8693f86500f71a4b701b4dd0c841d7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 3 Jan 2019 12:18:47 +0530
Subject: [PATCH 0069/1765] lib: Handle misaligned load/store on FP regs

This patch extends misaligned load/store trap handling to
handle FP regs as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_misaligned_ldst.c | 52 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index b35e919ac70..bde960740f0 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_misaligned_ldst.h>
 #include <sbi/sbi_trap.h>
@@ -28,7 +29,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	ulong mstatus = csr_read(mstatus);
 	ulong insn = get_insn(regs->mepc, &mstatus);
 	ulong addr = csr_read(mtval);
-	int i, shift = 0, len = 0;
+	int i, fp = 0, shift = 0, len = 0;
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
 		len = 4;
@@ -40,6 +41,12 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	} else if ((insn & INSN_MASK_LWU) == INSN_MATCH_LWU) {
 		len = 4;
 #endif
+	} else if ((insn & INSN_MASK_FLD) == INSN_MATCH_FLD) {
+		fp = 1;
+		len = 8;
+	} else if ((insn & INSN_MASK_FLW) == INSN_MATCH_FLW) {
+		fp = 1;
+		len = 4;
 	} else if ((insn & INSN_MASK_LH) == INSN_MATCH_LH) {
 		len = 2;
 		shift = 8 * (sizeof(ulong) - len);
@@ -64,6 +71,22 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		   ((insn >> SH_RD) & 0x1f)) {
 		len = 4;
 		shift = 8 * (sizeof(ulong) - len);
+	} else if ((insn & INSN_MASK_C_FLD) == INSN_MATCH_C_FLD) {
+		fp = 1;
+		len = 8;
+		insn = RVC_RS2S(insn) << SH_RD;
+	} else if ((insn & INSN_MASK_C_FLDSP) == INSN_MATCH_C_FLDSP) {
+		fp = 1;
+		len = 8;
+# if __riscv_xlen == 32
+	} else if ((insn & INSN_MASK_C_FLW) == INSN_MATCH_C_FLW) {
+		fp = 1;
+		len = 4;
+		insn = RVC_RS2S(insn) << SH_RD;
+	} else if ((insn & INSN_MASK_C_FLWSP) == INSN_MATCH_C_FLWSP) {
+		fp = 1;
+		len = 4;
+# endif
 #endif
 	} else
 		return SBI_EILL;
@@ -72,7 +95,12 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	for (i = 0; i < len; i++)
 		val.data_bytes[i] = load_u8((void *)(addr + i), regs->mepc);
 
-	SET_RD(insn, regs, val.data_ulong << shift >> shift);
+	if (!fp)
+		SET_RD(insn, regs, val.data_ulong << shift >> shift);
+	else if (len == 8)
+		SET_F64_RD(insn, regs, val.data_u64);
+	else
+		SET_F32_RD(insn, regs, val.data_ulong);
 
 	regs->mepc += INSN_LEN(insn);
 
@@ -97,6 +125,12 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	} else if ((insn & INSN_MASK_SD) == INSN_MATCH_SD) {
 		len = 8;
 #endif
+	} else if ((insn & INSN_MASK_FSD) == INSN_MATCH_FSD) {
+		len = 8;
+		val.data_u64 = GET_F64_RS2(insn, regs);
+	} else if ((insn & INSN_MASK_FSW) == INSN_MATCH_FSW) {
+		len = 4;
+		val.data_ulong = GET_F32_RS2(insn, regs);
 	} else if ((insn & INSN_MASK_SH) == INSN_MATCH_SH) {
 		len = 2;
 #ifdef __riscv_compressed
@@ -116,6 +150,20 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		   ((insn >> SH_RD) & 0x1f)) {
 		len = 4;
 		val.data_ulong = GET_RS2C(insn, regs);
+	} else if ((insn & INSN_MASK_C_FSD) == INSN_MATCH_C_FSD) {
+		len = 8;
+		val.data_u64 = GET_F64_RS2S(insn, regs);
+	} else if ((insn & INSN_MASK_C_FSDSP) == INSN_MATCH_C_FSDSP) {
+		len = 8;
+		val.data_u64 = GET_F64_RS2C(insn, regs);
+# if __riscv_xlen == 32
+	} else if ((insn & INSN_MASK_C_FSW) == INSN_MATCH_C_FSW) {
+		len = 4;
+		val.data_ulong = GET_F32_RS2S(insn, regs);
+	} else if ((insn & INSN_MASK_C_FSWSP) == INSN_MATCH_C_FSWSP) {
+		len = 4;
+		val.data_ulong = GET_F32_RS2C(insn, regs);
+# endif
 #endif
 	} else
 		return SBI_EILL;

From 6d9e390f5b9e96972aa010b4ef4e0291c14623b5 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 2 Jan 2019 10:14:40 -0800
Subject: [PATCH 0070/1765] Makefile: Support verbosity using standard V=1

Instead of using a confusing and custom option, allow verbose Makefile
with the standard V=1.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 62 ++++++++++++++++++++++++--------------------------------
 1 file changed, 26 insertions(+), 36 deletions(-)

diff --git a/Makefile b/Makefile
index 0a8accffdaa..2a5285f11bc 100644
--- a/Makefile
+++ b/Makefile
@@ -39,21 +39,11 @@ $(error Install directory is same as build directory.)
 endif
 
 # Check if verbosity is ON for build process
-VERBOSE_DEFAULT    := 0
 CMD_PREFIX_DEFAULT := @
-ifdef VERBOSE
-	ifeq ("$(origin VERBOSE)", "command line")
-		VB := $(VERBOSE)
-	else
-		VB := $(VERBOSE_DEFAULT)
-	endif
+ifeq ($(V), 1)
+	CMD_PREFIX :=
 else
-	VB := $(VERBOSE_DEFAULT)
-endif
-ifeq ($(VB), 1)
-	override V :=
-else
-	override V := $(CMD_PREFIX_DEFAULT)
+	CMD_PREFIX := $(CMD_PREFIX_DEFAULT)
 endif
 
 # Setup path of directories
@@ -140,19 +130,19 @@ objcopy=$(CROSS_COMPILE)objcopy
 define dynamic_flags
 -I$(shell dirname $(2)) -D__OBJNAME__=$(subst -,_,$(shell basename $(1) .o))
 endef
-merge_objs = $(V)mkdir -p `dirname $(1)`; \
+merge_objs = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " MERGE     $(subst $(build_dir)/,,$(1))"; \
 	     $(merge) $(mergeflags) $(2) -o $(1)
-merge_deps = $(V)mkdir -p `dirname $(1)`; \
+merge_deps = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " MERGE-DEP $(subst $(build_dir)/,,$(1))"; \
 	     cat $(2) > $(1)
-copy_file =  $(V)mkdir -p `dirname $(1)`; \
+copy_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " COPY      $(subst $(build_dir)/,,$(1))"; \
 	     cp -f $(2) $(1)
-inst_file =  $(V)mkdir -p `dirname $(1)`; \
+inst_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " INSTALL   $(subst $(install_dir)/,,$(1))"; \
 	     cp -f $(2) $(1)
-inst_file_list = $(V)if [ ! -z "$(4)" ]; then \
+inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 	     mkdir -p $(1)/$(3); \
 	     for file in $(4) ; do \
 	     rel_file=`echo $$file | sed -e 's@$(2)/$(3)/@@'`; \
@@ -163,35 +153,35 @@ inst_file_list = $(V)if [ ! -z "$(4)" ]; then \
 	     cp -f $$file $$dest_file; \
 	     done \
 	     fi
-inst_header_dir =  $(V)mkdir -p $(1); \
+inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
 	     echo " INSTALL   $(subst $(install_dir)/,,$(1))"; \
 	     cp -rf $(2) $(1)
-compile_cpp = $(V)mkdir -p `dirname $(1)`; \
+compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP       $(subst $(build_dir)/,,$(1))"; \
 	     $(cpp) $(cppflags) $(2) | grep -v "\#" > $(1)
-compile_cc_dep = $(V)mkdir -p `dirname $(1)`; \
+compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC-DEP    $(subst $(build_dir)/,,$(1))"; \
 	     echo -n `dirname $(1)`/ > $(1) && \
 	     $(cc) $(cflags) $(call dynamic_flags,$(1),$(2))   \
 	       -MM $(2) >> $(1) || rm -f $(1)
-compile_cc = $(V)mkdir -p `dirname $(1)`; \
+compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC        $(subst $(build_dir)/,,$(1))"; \
 	     $(cc) $(cflags) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
-compile_as_dep = $(V)mkdir -p `dirname $(1)`; \
+compile_as_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS-DEP    $(subst $(build_dir)/,,$(1))"; \
 	     echo -n `dirname $(1)`/ > $(1) && \
 	     $(as) $(asflags) $(call dynamic_flags,$(1),$(2))  \
 	       -MM $(2) >> $(1) || rm -f $(1)
-compile_as = $(V)mkdir -p `dirname $(1)`; \
+compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS        $(subst $(build_dir)/,,$(1))"; \
 	     $(as) $(asflags) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
-compile_ld = $(V)mkdir -p `dirname $(1)`; \
+compile_ld = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " LD        $(subst $(build_dir)/,,$(1))"; \
 	     $(ld) $(3) $(ldflags) -Wl,-T$(2) -o $(1)
-compile_ar = $(V)mkdir -p `dirname $(1)`; \
+compile_ar = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AR        $(subst $(build_dir)/,,$(1))"; \
 	     $(ar) $(arflags) $(1) $(2)
-compile_objcopy = $(V)mkdir -p `dirname $(1)`; \
+compile_objcopy = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " OBJCOPY   $(subst $(build_dir)/,,$(1))"; \
 	     $(objcopy) -S -O binary $(2) $(1)
 
@@ -284,27 +274,27 @@ install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)
 # Rule for "make clean"
 .PHONY: clean
 clean:
-	$(V)mkdir -p $(build_dir)
+	$(CMD_PREFIX)mkdir -p $(build_dir)
 	$(if $(V), @echo " RM        $(build_dir)/*.o")
-	$(V)find $(build_dir) -type f -name "*.o" -exec rm -rf {} +
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.o" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.a")
-	$(V)find $(build_dir) -type f -name "*.a" -exec rm -rf {} +
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.a" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.elf")
-	$(V)find $(build_dir) -type f -name "*.elf" -exec rm -rf {} +
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.elf" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.bin")
-	$(V)find $(build_dir) -type f -name "*.bin" -exec rm -rf {} +
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.bin" -exec rm -rf {} +
 
 # Rule for "make distclean"
 .PHONY: distclean
 distclean: clean
-	$(V)mkdir -p $(build_dir)
+	$(CMD_PREFIX)mkdir -p $(build_dir)
 	$(if $(V), @echo " RM        $(build_dir)/*.dep")
-	$(V)find $(build_dir) -type f -name "*.dep" -exec rm -rf {} +
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.dep" -exec rm -rf {} +
 ifeq ($(build_dir),$(CURDIR)/build)
 	$(if $(V), @echo " RM        $(build_dir)")
-	$(V)rm -rf $(build_dir)
+	$(CMD_PREFIX)rm -rf $(build_dir)
 endif
 ifeq ($(install_dir),$(CURDIR)/install)
 	$(if $(V), @echo " RM        $(install_dir)")
-	$(V)rm -rf $(install_dir)
+	$(CMD_PREFIX)rm -rf $(install_dir)
 endif

From 116f10973b539f056be55a24d2855a7a8b985c27 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 2 Jan 2019 10:16:15 -0800
Subject: [PATCH 0071/1765] Makefile: Use generic flags for the platform

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 2a5285f11bc..9c6ea8d34f8 100644
--- a/Makefile
+++ b/Makefile
@@ -91,20 +91,23 @@ deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
+GENFLAGS	=	-DOPENSBI_MAJOR=$(MAJOR)
+GENFLAGS	+=	-DOPENSBI_MINOR=$(MINOR)
+GENFLAGS	+=	-I$(platform_dir)/include
+GENFLAGS	+=	-I$(platform_common_dir)/include
+GENFLAGS	+=	-I$(include_dir)
+GENFLAGS	+=	$(platform-genflags-y)
+
 # Setup compilation environment
 cpp=$(CROSS_COMPILE)cpp
-cppflags+=-DOPENSBI_MAJOR=$(MAJOR)
-cppflags+=-DOPENSBI_MINOR=$(MINOR)
-cppflags+=-I$(platform_dir)/include
-cppflags+=-I$(platform_common_dir)/include
-cppflags+=-I$(include_dir)
+cppflags+=$(GENFLAGS)
 cppflags+=$(platform-cppflags-y)
 cppflags+=$(firmware-cppflags-y)
 cc=$(CROSS_COMPILE)gcc
 cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 cflags+=-mno-save-restore -mstrict-align
-cflags+=$(cppflags)
+cflags+=$(GENFLAGS)
 cflags+=$(platform-cflags-y)
 cflags+=$(firmware-cflags-y)
 cflags+=$(EXTRA_CFLAGS)
@@ -112,7 +115,7 @@ as=$(CROSS_COMPILE)gcc
 asflags=-g -Wall -nostdlib -D__ASSEMBLY__
 asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
 asflags+=-mno-save-restore -mstrict-align
-asflags+=$(cppflags)
+asflags+=$(GENFLAGS)
 asflags+=$(platform-asflags-y)
 asflags+=$(firmware-asflags-y)
 asflags+=$(EXTRA_ASFLAGS)

From d6ddfdce3975c9484f8b7f9a364b3e75da780b2a Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 21 Dec 2018 16:09:03 -0800
Subject: [PATCH 0072/1765] Makefile: Use generic flags for the firmware

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile            |  1 +
 firmware/objects.mk | 15 ++++++++-------
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 9c6ea8d34f8..cdcb3c46b79 100644
--- a/Makefile
+++ b/Makefile
@@ -97,6 +97,7 @@ GENFLAGS	+=	-I$(platform_dir)/include
 GENFLAGS	+=	-I$(platform_common_dir)/include
 GENFLAGS	+=	-I$(include_dir)
 GENFLAGS	+=	$(platform-genflags-y)
+GENFLAGS	+=	$(firmware-genflags-y)
 
 # Setup compilation environment
 cpp=$(CROSS_COMPILE)cpp
diff --git a/firmware/objects.mk b/firmware/objects.mk
index a8275f9f40b..18a1fbc967d 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -7,21 +7,22 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
+firmware-genflags-y =
 firmware-cppflags-y +=
 firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
 ifdef FW_TEXT_START
-firmware-cppflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
+firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
 endif
 
 firmware-bins-$(FW_JUMP) += fw_jump.bin
 ifdef FW_JUMP_ADDR
-firmware-cppflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
+firmware-genflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
 endif
 ifdef FW_JUMP_FDT_ADDR
-firmware-cppflags-$(FW_JUMP) += -DFW_JUMP_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
+firmware-genflags-$(FW_JUMP) += -DFW_JUMP_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
 endif
 
 firmware-bins-$(FW_PAYLOAD) += fw_payload.bin
@@ -30,13 +31,13 @@ FW_PAYLOAD_PATH_FINAL=$(FW_PAYLOAD_PATH)
 else
 FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/dummy.bin
 endif
-firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
 ifdef FW_PAYLOAD_OFFSET
-firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
 endif
 ifdef FW_PAYLOAD_FDT_PATH
-firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
 endif
 ifdef FW_PAYLOAD_FDT_ADDR
-firmware-cppflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
 endif

From eeab92f2423ef907629f784658663baf66b5df78 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 21 Dec 2018 16:44:55 -0800
Subject: [PATCH 0073/1765] Makefile: Convert to a more standard format

Convert the Makefile to a more standard format and don't forcefully
overwrite a users enviroment.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 79 +++++++++++++++++++++++++++++---------------------------
 1 file changed, 41 insertions(+), 38 deletions(-)

diff --git a/Makefile b/Makefile
index cdcb3c46b79..fd3ed44354a 100644
--- a/Makefile
+++ b/Makefile
@@ -100,35 +100,38 @@ GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
 # Setup compilation environment
-cpp=$(CROSS_COMPILE)cpp
-cppflags+=$(GENFLAGS)
-cppflags+=$(platform-cppflags-y)
-cppflags+=$(firmware-cppflags-y)
-cc=$(CROSS_COMPILE)gcc
-cflags=-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
-cflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
-cflags+=-mno-save-restore -mstrict-align
-cflags+=$(GENFLAGS)
-cflags+=$(platform-cflags-y)
-cflags+=$(firmware-cflags-y)
-cflags+=$(EXTRA_CFLAGS)
-as=$(CROSS_COMPILE)gcc
-asflags=-g -Wall -nostdlib -D__ASSEMBLY__
-asflags+=-fno-omit-frame-pointer -fno-optimize-sibling-calls
-asflags+=-mno-save-restore -mstrict-align
-asflags+=$(GENFLAGS)
-asflags+=$(platform-asflags-y)
-asflags+=$(firmware-asflags-y)
-asflags+=$(EXTRA_ASFLAGS)
-ar=$(CROSS_COMPILE)ar
-arflags=rcs
-ld=$(CROSS_COMPILE)gcc
-ldflags=-g -Wall -nostdlib -Wl,--build-id=none
-ldflags+=$(platform-ldflags-y)
-ldflags+=$(firmware-ldflags-y)
-merge=$(CROSS_COMPILE)ld
-mergeflags=-r
-objcopy=$(CROSS_COMPILE)objcopy
+CC			?=	$(CROSS_COMPILE)gcc
+CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
+CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+CFLAGS		+=	-mno-save-restore -mstrict-align
+CFLAGS		+=	$(GENFLAGS)
+CFLAGS		+=	$(platform-cflags-y)
+CFLAGS		+=	$(firmware-cflags-y)
+
+CPP			?=	$(CROSS_COMPILE)cpp
+CPPFLAGS	+=	$(GENFLAGS)
+CPPFLAGS	+=	$(platform-cppflags-y)
+CPPFLAGS	+=	$(firmware-cppflags-y)
+
+AS			=	$(CC)
+ASFLAGS		=	-g -Wall -nostdlib -D__ASSEMBLY__
+ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+ASFLAGS		+=	-mno-save-restore -mstrict-align
+ASFLAGS		+=	$(GENFLAGS)
+ASFLAGS		+=	$(platform-asflags-y)
+ASFLAGS		+=	$(firmware-asflags-y)
+
+AR			?= $(CROSS_COMPILE)ar
+ARFLAGS		=	rcs
+
+LD			?=	$(CROSS_COMPILE)ld
+LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N
+LDFLAGS		+=	$(platform-ldflags-y)
+LDFLAGS		+=	$(firmware-ldflags-y)
+
+MERGEFLAGS	+=	-r
+
+OBJCOPY	?=	$(CROSS_COMPILE)objcopy
 
 # Setup functions for compilation
 define dynamic_flags
@@ -136,7 +139,7 @@ define dynamic_flags
 endef
 merge_objs = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " MERGE     $(subst $(build_dir)/,,$(1))"; \
-	     $(merge) $(mergeflags) $(2) -o $(1)
+	     $(LD) $(MERGEFLAGS) $(2) -o $(1)
 merge_deps = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " MERGE-DEP $(subst $(build_dir)/,,$(1))"; \
 	     cat $(2) > $(1)
@@ -162,32 +165,32 @@ inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
 	     cp -rf $(2) $(1)
 compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP       $(subst $(build_dir)/,,$(1))"; \
-	     $(cpp) $(cppflags) $(2) | grep -v "\#" > $(1)
+	     $(CPP) $(CPPFLAGS) $(2) | grep -v "\#" > $(1)
 compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC-DEP    $(subst $(build_dir)/,,$(1))"; \
 	     echo -n `dirname $(1)`/ > $(1) && \
-	     $(cc) $(cflags) $(call dynamic_flags,$(1),$(2))   \
+	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2))   \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC        $(subst $(build_dir)/,,$(1))"; \
-	     $(cc) $(cflags) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
+	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
 compile_as_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS-DEP    $(subst $(build_dir)/,,$(1))"; \
 	     echo -n `dirname $(1)`/ > $(1) && \
-	     $(as) $(asflags) $(call dynamic_flags,$(1),$(2))  \
+	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS        $(subst $(build_dir)/,,$(1))"; \
-	     $(as) $(asflags) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
+	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
 compile_ld = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " LD        $(subst $(build_dir)/,,$(1))"; \
-	     $(ld) $(3) $(ldflags) -Wl,-T$(2) -o $(1)
+	     $(CC) $(3) $(LDFLAGS) -Wl,-T$(2) -o $(1)
 compile_ar = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AR        $(subst $(build_dir)/,,$(1))"; \
-	     $(ar) $(arflags) $(1) $(2)
+	     $(AR) $(ARFLAGS) $(1) $(2)
 compile_objcopy = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " OBJCOPY   $(subst $(build_dir)/,,$(1))"; \
-	     $(objcopy) -S -O binary $(2) $(1)
+	     $(OBJCOPY) -S -O binary $(2) $(1)
 
 targets-y  = $(build_dir)/lib/libsbi.a
 ifdef PLATFORM

From 5cbc24b95a541dba3f2b842b54d76435ba4566a7 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 2 Jan 2019 13:59:49 -0800
Subject: [PATCH 0074/1765] Makefile: Force GCC to preprocess the linker file

To avoid this message (and subsequent errors):
    warning: linker input file unused because linking not done
force GCC to treat the linker script preprocessing as a C file.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index fd3ed44354a..139ca460b2c 100644
--- a/Makefile
+++ b/Makefile
@@ -165,7 +165,7 @@ inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
 	     cp -rf $(2) $(1)
 compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP       $(subst $(build_dir)/,,$(1))"; \
-	     $(CPP) $(CPPFLAGS) $(2) | grep -v "\#" > $(1)
+	     $(CPP) $(CPPFLAGS) -x c $(2) | grep -v "\#" > $(1)
 compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC-DEP    $(subst $(build_dir)/,,$(1))"; \
 	     echo -n `dirname $(1)`/ > $(1) && \

From 45c9e14a2f329950645fa7eb30306913650642d8 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 2 Jan 2019 14:44:35 -0800
Subject: [PATCH 0075/1765] docs: Add a contributing document

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/contributing.md | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 docs/contributing.md

diff --git a/docs/contributing.md b/docs/contributing.md
new file mode 100644
index 00000000000..46a0ad9737e
--- /dev/null
+++ b/docs/contributing.md
@@ -0,0 +1,13 @@
+Contrubuting to OpenSBI
+========================
+
+All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to the main repo avaliable at: https://github.com/riscv/opensbi
+
+As well as that all work must follow the following rules:
+1. We follow the [Linux coding style](https://www.kernel.org/doc/html/v4.10/process/coding-style.html). This means that ALL patches must include the Signed-off-by line.
+2. Commit subject must have atleast one ":" prefix. Common ones are "lib:", "platform:", "firmware:", "docs:" and "top:".
+3. Maintainer should prefer "Rebase and Merge" when using GitHub to merge pull requests. Avoid create extra merge commits.
+4. Maintainer should avoid creating branches directly in main riscv/opensbi repo. Instead prefer fork of GitHub riscv/opensbi repo and create branches in your own fork for pull requests.
+5. Maintainer cannot merge his own pull requests on GitHub.
+6. A pull request must get atleast one review from relevant maintainer.
+7. A pull request must spend atleast 24 hours in review so that everyone gets a chance to review.

From 2e5ede82796960435fff80b27b21dfb399d2e2fb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 4 Jan 2019 08:45:36 +0530
Subject: [PATCH 0076/1765] Makefile: Use '=' instead of '?=' for make
 variables

The '?=' will not assign value if the target make variable is
overriden via command-line or is set in environment variable.
On other hand, '=' will not assign value only if variable is
overriden via command-line parameter.

It is quite common to have CC, AS, CPP, LD, etc to be set as
environment variables pointing to native compiler and binutils.
If '-rR' option is not set in MAKEFLAGS then this results in
compile error because '?=' will use the native compiler and
binutils. If '-rR' option is set in MAKEFLAGS then this again
results in compile error because CC, AS, CPP, etc are set to
empty strings which causes '?=' to use empty string as compiler
and binutils.

To handle this, we use '?=' only when CROSS_COMPILE is not
defined and we use '=' when CROSS_COMPILE is defined.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 32 ++++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 139ca460b2c..5c7d4fb4d8d 100644
--- a/Makefile
+++ b/Makefile
@@ -100,7 +100,11 @@ GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
 # Setup compilation environment
-CC			?=	$(CROSS_COMPILE)gcc
+ifdef CROSS_COMPILE
+CC		=	$(CROSS_COMPILE)gcc
+else
+CC		?=	gcc
+endif
 CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
@@ -108,12 +112,16 @@ CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
 CFLAGS		+=	$(firmware-cflags-y)
 
-CPP			?=	$(CROSS_COMPILE)cpp
+ifdef CROSS_COMPILE
+CPP		=	$(CROSS_COMPILE)cpp
+else
+CPP		?=	cpp
+endif
 CPPFLAGS	+=	$(GENFLAGS)
 CPPFLAGS	+=	$(platform-cppflags-y)
 CPPFLAGS	+=	$(firmware-cppflags-y)
 
-AS			=	$(CC)
+AS		=	$(CC)
 ASFLAGS		=	-g -Wall -nostdlib -D__ASSEMBLY__
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-mno-save-restore -mstrict-align
@@ -121,17 +129,29 @@ ASFLAGS		+=	$(GENFLAGS)
 ASFLAGS		+=	$(platform-asflags-y)
 ASFLAGS		+=	$(firmware-asflags-y)
 
-AR			?= $(CROSS_COMPILE)ar
+ifdef CROSS_COMPILE
+AR		=	$(CROSS_COMPILE)ar
+else
+AR		?=	ar
+endif
 ARFLAGS		=	rcs
 
-LD			?=	$(CROSS_COMPILE)ld
+ifdef CROSS_COMPILE
+LD		=	$(CROSS_COMPILE)ld
+else
+LD		?=	ld
+endif
 LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N
 LDFLAGS		+=	$(platform-ldflags-y)
 LDFLAGS		+=	$(firmware-ldflags-y)
 
 MERGEFLAGS	+=	-r
 
-OBJCOPY	?=	$(CROSS_COMPILE)objcopy
+ifdef CROSS_COMPILE
+OBJCOPY		=	$(CROSS_COMPILE)objcopy
+else
+OBJCOPY		?=	objcopy
+endif
 
 # Setup functions for compilation
 define dynamic_flags

From c2e0b0291475a49f6c923ee7fda864fb2c3c2c6d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 12:25:01 +0530
Subject: [PATCH 0077/1765] Makefile: Add make targets to build and install
 documentation

This patch extends top-level makefile to build and install
documentation. The 'docs' make target is for building the
documentation PDF whereas 'install_docs' make target is for
installing the documentation PDF.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile         |   17 +
 docs/doxygen.cfg | 2458 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 2475 insertions(+)
 create mode 100644 docs/doxygen.cfg

diff --git a/Makefile b/Makefile
index 5c7d4fb4d8d..f622c812f77 100644
--- a/Makefile
+++ b/Makefile
@@ -264,6 +264,19 @@ $(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.S
 $(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+# Rule for "make docs"
+$(build_dir)/docs/latex/refman.pdf: $(build_dir)/docs/latex/refman.tex
+	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
+	$(CMD_PREFIX)$(MAKE) -C $(build_dir)/docs/latex
+$(build_dir)/docs/latex/refman.tex: $(build_dir)/docs/doxygen.cfg
+	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
+	$(CMD_PREFIX)doxygen $(build_dir)/docs/doxygen.cfg
+$(build_dir)/docs/doxygen.cfg: $(src_dir)/docs/doxygen.cfg
+	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
+	$(CMD_PREFIX)cat docs/doxygen.cfg | sed -e "s#@@SRC_DIR@@#$(src_dir)#" -e "s#@@BUILD_DIR@@#$(build_dir)#" > $(build_dir)/docs/doxygen.cfg
+.PHONY: docs
+docs: $(build_dir)/docs/latex/refman.pdf
+
 # Dependency files should only be included after default Makefile rules
 # They should not be included for any "xxxconfig" or "xxxclean" rule
 all-deps-1 = $(if $(findstring config,$(MAKECMDGOALS)),,$(deps-y))
@@ -298,6 +311,10 @@ install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)
 	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-elfs-path-y))
 	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
+.PHONY: install_docs
+install_docs: $(build_dir)/docs/latex/refman.pdf
+	$(call inst_file,$(install_dir)/docs/refman.pdf,$(build_dir)/docs/latex/refman.pdf)
+
 # Rule for "make clean"
 .PHONY: clean
 clean:
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
new file mode 100644
index 00000000000..344b0851f80
--- /dev/null
+++ b/docs/doxygen.cfg
@@ -0,0 +1,2458 @@
+# Doxyfile 1.8.13
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project.
+#
+# All text after a double hash (##) is considered a comment and is placed in
+# front of the TAG it is preceding.
+#
+# All text after a single hash (#) is considered a comment and will be ignored.
+# The format is:
+# TAG = value [value, ...]
+# For lists, items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (\" \").
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all text
+# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv
+# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv
+# for the list of possible encodings.
+# The default value is: UTF-8.
+
+DOXYFILE_ENCODING      = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
+# double-quotes, unless you are using Doxywizard) that should identify the
+# project for which the documentation is generated. This name is used in the
+# title of most generated pages and in a few other places.
+# The default value is: My Project.
+
+PROJECT_NAME           = "RISC-V OpenSBI"
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
+# could be handy for archiving the generated documentation or if some version
+# control system is used.
+
+PROJECT_NUMBER         = 
+
+# Using the PROJECT_BRIEF tag one can provide an optional one line description
+# for a project that appears at the top of each page and should give viewer a
+# quick idea about the purpose of the project. Keep the description short.
+
+PROJECT_BRIEF          = "Open source implemenation of supervisor binary interface"
+
+# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
+# in the documentation. The maximum height of the logo should not exceed 55
+# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy
+# the logo to the output directory.
+
+PROJECT_LOGO           = 
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
+# into which the generated documentation will be written. If a relative path is
+# entered, it will be relative to the location where doxygen was started. If
+# left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = @@BUILD_DIR@@/docs
+
+# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
+# directories (in 2 levels) under the output directory of each output format and
+# will distribute the generated files over these directories. Enabling this
+# option can be useful when feeding doxygen a huge amount of source files, where
+# putting all generated files in the same directory would otherwise causes
+# performance problems for the file system.
+# The default value is: NO.
+
+CREATE_SUBDIRS         = NO
+
+# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
+# characters to appear in the names of generated files. If set to NO, non-ASCII
+# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode
+# U+3044.
+# The default value is: NO.
+
+ALLOW_UNICODE_NAMES    = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
+# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
+# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
+# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
+# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
+# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
+# Ukrainian and Vietnamese.
+# The default value is: English.
+
+OUTPUT_LANGUAGE        = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member
+# descriptions after the members that are listed in the file and class
+# documentation (similar to Javadoc). Set to NO to disable this.
+# The default value is: YES.
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief
+# description of a member or function before the detailed description
+#
+# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+# The default value is: YES.
+
+REPEAT_BRIEF           = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator that is
+# used to form the text in various listings. Each string in this list, if found
+# as the leading text of the brief description, will be stripped from the text
+# and the result, after processing the whole list, is used as the annotated
+# text. Otherwise, the brief description is used as-is. If left blank, the
+# following values are used ($name is automatically replaced with the name of
+# the entity):The $name class, The $name widget, The $name file, is, provides,
+# specifies, contains, represents, a, an and the.
+
+ABBREVIATE_BRIEF       = "The $name class" \
+                         "The $name widget" \
+                         "The $name file" \
+                         is \
+                         provides \
+                         specifies \
+                         contains \
+                         represents \
+                         a \
+                         an \
+                         the
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# doxygen will generate a detailed section even if there is only a brief
+# description.
+# The default value is: NO.
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+# The default value is: NO.
+
+INLINE_INHERITED_MEMB  = NO
+
+# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path
+# before files name in the file list and in the header files. If set to NO the
+# shortest path that makes the file name unique will be used
+# The default value is: YES.
+
+FULL_PATH_NAMES        = YES
+
+# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path.
+# Stripping is only done if one of the specified strings matches the left-hand
+# part of the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the path to
+# strip.
+#
+# Note that you can specify absolute paths here, but also relative paths, which
+# will be relative from the directory where doxygen is started.
+# This tag requires that the tag FULL_PATH_NAMES is set to YES.
+
+STRIP_FROM_PATH        = 
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
+# path mentioned in the documentation of a class, which tells the reader which
+# header file to include in order to use a class. If left blank only the name of
+# the header file containing the class definition is used. Otherwise one should
+# specify the list of include paths that are normally passed to the compiler
+# using the -I flag.
+
+STRIP_FROM_INC_PATH    = 
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
+# less readable) file names. This can be useful is your file systems doesn't
+# support long names like on DOS, Mac, or CD-ROM.
+# The default value is: NO.
+
+SHORT_NAMES            = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the
+# first line (until the first dot) of a Javadoc-style comment as the brief
+# description. If set to NO, the Javadoc-style will behave just like regular Qt-
+# style comments (thus requiring an explicit @brief command for a brief
+# description.)
+# The default value is: NO.
+
+JAVADOC_AUTOBRIEF      = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
+# line (until the first dot) of a Qt-style comment as the brief description. If
+# set to NO, the Qt-style will behave just like regular Qt-style comments (thus
+# requiring an explicit \brief command for a brief description.)
+# The default value is: NO.
+
+QT_AUTOBRIEF           = NO
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a
+# multi-line C++ special comment block (i.e. a block of //! or /// comments) as
+# a brief description. This used to be the default behavior. The new default is
+# to treat a multi-line C++ comment block as a detailed description. Set this
+# tag to YES if you prefer the old behavior instead.
+#
+# Note that setting this tag to YES also means that rational rose comments are
+# not recognized any more.
+# The default value is: NO.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
+# documentation from any documented member that it re-implements.
+# The default value is: YES.
+
+INHERIT_DOCS           = YES
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new
+# page for each member. If set to NO, the documentation of a member will be part
+# of the file/class/namespace that contains it.
+# The default value is: NO.
+
+SEPARATE_MEMBER_PAGES  = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen
+# uses this value to replace tabs by spaces in code fragments.
+# Minimum value: 1, maximum value: 16, default value: 4.
+
+TAB_SIZE               = 4
+
+# This tag can be used to specify a number of aliases that act as commands in
+# the documentation. An alias has the form:
+# name=value
+# For example adding
+# "sideeffect=@par Side Effects:\n"
+# will allow you to put the command \sideeffect (or @sideeffect) in the
+# documentation, which will result in a user-defined paragraph with heading
+# "Side Effects:". You can put \n's in the value part of an alias to insert
+# newlines.
+
+ALIASES                = 
+
+# This tag can be used to specify a number of word-keyword mappings (TCL only).
+# A mapping has the form "name=value". For example adding "class=itcl::class"
+# will allow you to use the command class in the itcl::class meaning.
+
+TCL_SUBST              = 
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
+# only. Doxygen will then generate output that is more tailored for C. For
+# instance, some of the names that are used will be different. The list of all
+# members will be omitted, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_FOR_C  = YES
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or
+# Python sources only. Doxygen will then generate output that is more tailored
+# for that language. For instance, namespaces will be presented as packages,
+# qualified scopes will look different, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_JAVA   = NO
+
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources. Doxygen will then generate output that is tailored for Fortran.
+# The default value is: NO.
+
+OPTIMIZE_FOR_FORTRAN   = NO
+
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for VHDL.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_VHDL   = NO
+
+# Doxygen selects the parser to use depending on the extension of the files it
+# parses. With this tag you can assign which parser to use for a given
+# extension. Doxygen has a built-in mapping, but you can override or extend it
+# using this tag. The format is ext=language, where ext is a file extension, and
+# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
+# C#, C, C++, D, PHP, Objective-C, Python, Fortran (fixed format Fortran:
+# FortranFixed, free formatted Fortran: FortranFree, unknown formatted Fortran:
+# Fortran. In the later case the parser tries to guess whether the code is fixed
+# or free formatted code, this is the default for Fortran type files), VHDL. For
+# instance to make doxygen treat .inc files as Fortran files (default is PHP),
+# and .f files as C (default is Fortran), use: inc=Fortran f=C.
+#
+# Note: For files without extension you can use no_extension as a placeholder.
+#
+# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
+# the files are not read by doxygen.
+
+EXTENSION_MAPPING      = 
+
+# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
+# according to the Markdown format, which allows for more readable
+# documentation. See http://daringfireball.net/projects/markdown/ for details.
+# The output of markdown processing is further processed by doxygen, so you can
+# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
+# case of backward compatibilities issues.
+# The default value is: YES.
+
+MARKDOWN_SUPPORT       = YES
+
+# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
+# to that level are automatically included in the table of contents, even if
+# they do not have an id attribute.
+# Note: This feature currently applies only to Markdown headings.
+# Minimum value: 0, maximum value: 99, default value: 0.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+TOC_INCLUDE_HEADINGS   = 0
+
+# When enabled doxygen tries to link words that correspond to documented
+# classes, or namespaces to their corresponding documentation. Such a link can
+# be prevented in individual cases by putting a % sign in front of the word or
+# globally by setting AUTOLINK_SUPPORT to NO.
+# The default value is: YES.
+
+AUTOLINK_SUPPORT       = YES
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should set this
+# tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string);
+# versus func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+# The default value is: NO.
+
+BUILTIN_STL_SUPPORT    = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+# The default value is: NO.
+
+CPP_CLI_SUPPORT        = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
+# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen
+# will parse them like normal C++ but will assume all classes use public instead
+# of private inheritance when no explicit protection keyword is present.
+# The default value is: NO.
+
+SIP_SUPPORT            = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate
+# getter and setter methods for a property. Setting this option to YES will make
+# doxygen to replace the get and set methods by a property in the documentation.
+# This will only work if the methods are indeed getting or setting a simple
+# type. If this is not the case, or you want to show the methods anyway, you
+# should set this option to NO.
+# The default value is: YES.
+
+IDL_PROPERTY_SUPPORT   = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+# The default value is: NO.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# If one adds a struct or class to a group and this option is enabled, then also
+# any nested class or struct is added to the same group. By default this option
+# is disabled and one has to add nested compounds explicitly via \ingroup.
+# The default value is: NO.
+
+GROUP_NESTED_COMPOUNDS = NO
+
+# Set the SUBGROUPING tag to YES to allow class member groups of the same type
+# (for instance a group of public functions) to be put as a subgroup of that
+# type (e.g. under the Public Functions section). Set it to NO to prevent
+# subgrouping. Alternatively, this can be done per class using the
+# \nosubgrouping command.
+# The default value is: YES.
+
+SUBGROUPING            = YES
+
+# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
+# are shown inside the group in which they are included (e.g. using \ingroup)
+# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
+# and RTF).
+#
+# Note that this feature does not work in combination with
+# SEPARATE_MEMBER_PAGES.
+# The default value is: NO.
+
+INLINE_GROUPED_CLASSES = NO
+
+# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
+# with only public data fields or simple typedef fields will be shown inline in
+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
+
+INLINE_SIMPLE_STRUCTS  = NO
+
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
+
+TYPEDEF_HIDES_STRUCT   = NO
+
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
+
+LOOKUP_CACHE_SIZE      = 0
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
+# scope will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PACKAGE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
+
+EXTRACT_STATIC         = YES
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO,
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
+
+EXTRACT_LOCAL_CLASSES  = NO
+
+# This flag is only useful for Objective-C code. If set to YES, local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO, only methods in the interface are
+# included.
+# The default value is: NO.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
+
+EXTRACT_ANON_NSPACES   = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO, these classes will be included in the various overviews. This option
+# has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_CLASSES     = YES
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# (class|struct|union) declarations. If set to NO, these declarations will be
+# included in the documentation.
+# The default value is: NO.
+
+HIDE_FRIEND_COMPOUNDS  = YES
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO, these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
+
+HIDE_IN_BODY_DOCS      = NO
+
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
+# names in lower-case letters. If set to YES, upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+# The default value is: system dependent.
+
+CASE_SENSE_NAMES       = NO
+
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES, the
+# scope will be hidden.
+# The default value is: NO.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will
+# append additional text to a page's title, such as Class Reference. If set to
+# YES the compound reference will be hidden.
+# The default value is: NO.
+
+HIDE_COMPOUND_REFERENCE= NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
+# grouped member an include statement to the documentation, telling the reader
+# which file to include in order to use the member.
+# The default value is: NO.
+
+SHOW_GROUPED_MEMB_INC  = NO
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
+
+FORCE_LOCAL_INCLUDES   = NO
+
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
+
+SORT_MEMBERS_CTORS_1ST = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
+
+SORT_GROUP_NAMES       = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
+
+STRICT_PROTO_MATCHING  = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo
+# list. This list is created by putting \todo commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test
+# list. This list is created by putting \test commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
+
+ENABLED_SECTIONS       = 
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES, the
+# list will mention the files that were used to generate the documentation.
+# The default value is: YES.
+
+SHOW_USED_FILES        = YES
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
+
+SHOW_FILES             = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
+
+SHOW_NAMESPACES        = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
+
+FILE_VERSION_FILTER    = 
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. To create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
+
+LAYOUT_FILE            = 
+
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. See also \cite for info how to create references.
+
+CITE_BIB_FILES         = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
+
+QUIET                  = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
+
+WARNINGS               = YES
+
+# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some parameters
+# in a documented function, or documenting parameters that don't exist or using
+# markup commands wrongly.
+# The default value is: YES.
+
+WARN_IF_DOC_ERROR      = YES
+
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO, doxygen will only warn about wrong or incomplete
+# parameter documentation, but not about the absence of documentation.
+# The default value is: NO.
+
+WARN_NO_PARAMDOC       = NO
+
+# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
+# a warning is encountered.
+# The default value is: NO.
+
+WARN_AS_ERROR          = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# The default value is: $file:$line: $text.
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr).
+
+WARN_LOGFILE           = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
+# Note: If this tag is empty the current directory is searched.
+
+INPUT                  = @@SRC_DIR@@/README.md \
+                         @@SRC_DIR@@/docs/contributing.md \
+                         @@SRC_DIR@@/docs/firmware \
+                         @@SRC_DIR@@/docs/platform \
+                         @@SRC_DIR@@/include \
+                         @@SRC_DIR@@/lib
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see: http://www.gnu.org/software/libiconv) for the list of
+# possible encodings.
+# The default value is: UTF-8.
+
+INPUT_ENCODING         = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# read by doxygen.
+#
+# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp,
+# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h,
+# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc,
+# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f95, *.f03, *.f08,
+# *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf and *.qsf.
+
+FILE_PATTERNS          = *.c \
+                         *.h \
+                         *.md
+
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
+
+RECURSIVE              = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should be
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
+# Note that relative paths are relative to the directory from which doxygen is
+# run.
+
+EXCLUDE                = 
+
+# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
+# directories that are symbolic links (a Unix file system feature) are excluded
+# from the input.
+# The default value is: NO.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
+
+EXCLUDE_PATTERNS       = 
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories use the pattern */test/*
+
+EXCLUDE_SYMBOLS        = 
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
+
+EXAMPLE_PATH           = 
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
+
+EXAMPLE_PATTERNS       = *
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
+
+IMAGE_PATH             = 
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+INPUT_FILTER           = 
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+FILTER_PATTERNS        = 
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
+
+FILTER_SOURCE_FILES    = NO
+
+# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
+
+FILTER_SOURCE_PATTERNS = 
+
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
+
+USE_MDFILE_AS_MAINPAGE = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
+
+SOURCE_BROWSER         = NO
+
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
+
+INLINE_SOURCES         = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
+
+STRIP_CODE_COMMENTS    = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# function all documented functions referencing it will be listed.
+# The default value is: NO.
+
+REFERENCED_BY_RELATION = NO
+
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
+
+REFERENCES_RELATION    = NO
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+SOURCE_TOOLTIPS        = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see http://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+USE_HTAGS              = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS       = YES
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the
+# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the
+# cost of reduced performance. This can be particularly helpful with template
+# rich C++ code for which doxygen's built-in parser lacks the necessary type
+# information.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse-libclang=ON option for CMake.
+# The default value is: NO.
+
+CLANG_ASSISTED_PARSING = NO
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_OPTIONS          = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
+
+ALPHABETICAL_INDEX     = YES
+
+# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
+# which the alphabetical index list will be split.
+# Minimum value: 1, maximum value: 20, default value: 5.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all classes will
+# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
+# can be used to specify a prefix (or a list of prefixes) that should be ignored
+# while generating the index headers.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+IGNORE_PREFIX          = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output
+# The default value is: YES.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_OUTPUT            = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_HEADER            = 
+
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FOOTER            = 
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_STYLESHEET        = 
+
+# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# cascading style sheets that are included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefore more robust against future updates.
+# Doxygen will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list). For an example see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_STYLESHEET  = 
+
+# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the HTML output directory. Note
+# that these files will be copied to the base HTML output directory. Use the
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_FILES       = 
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the style sheet and background images according to
+# this color. Hue is specified as an angle on a colorwheel, see
+# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_HUE    = 220
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use grayscales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_SAT    = 100
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_GAMMA  = 80
+
+# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
+# page will contain the date and time when the page was generated. Setting this
+# to YES can help to show when doxygen was last run and thus if the
+# documentation is up to date.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_TIMESTAMP         = NO
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_SECTIONS  = NO
+
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_INDEX_NUM_ENTRIES = 100
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see: http://developer.apple.com/tools/xcode/), introduced with
+# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
+# Makefile in the HTML output directory. Running make will produce the docset in
+# that directory and running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_DOCSET        = NO
+
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDNAME        = "Doxygen generated docs"
+
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_BUNDLE_ID       = org.doxygen.Project
+
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_ID    = org.doxygen.Publisher
+
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_NAME  = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
+# Windows.
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_HTMLHELP      = NO
+
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
+# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_FILE               = 
+
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler (hhc.exe). If non-empty,
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+HHC_LOCATION           = 
+
+# The GENERATE_CHI flag controls if a separate .chi index file is generated
+# (YES) or that it should be included in the master .chm file (NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+GENERATE_CHI           = NO
+
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_INDEX_ENCODING     = 
+
+# The BINARY_TOC flag controls whether a binary table of contents is generated
+# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
+# enables the Previous and Next buttons.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+TOC_EXPAND             = NO
+
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_QHP           = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QCH_FILE               = 
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_NAMESPACE          = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
+# folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_VIRTUAL_FOLDER     = doc
+
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_NAME   = 
+
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_ATTRS  = 
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_SECT_FILTER_ATTRS  = 
+
+# The QHG_LOCATION tag can be used to specify the location of Qt's
+# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
+# generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHG_LOCATION           = 
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_ECLIPSEHELP   = NO
+
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
+
+ECLIPSE_DOC_ID         = org.doxygen.Project
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+DISABLE_INDEX          = NO
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine-tune the look of the index. As an example, the default style
+# sheet generated by doxygen has an example that shows how to put an image at
+# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
+# the same information as the tab index, you could consider setting
+# DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_TREEVIEW      = NO
+
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+TREEVIEW_WIDTH         = 250
+
+# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+EXT_LINKS_IN_WINDOW    = NO
+
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_FONTSIZE       = 10
+
+# Use the FORMULA_TRANPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are not
+# supported properly for IE 6.0, but are supported on all modern browsers.
+#
+# Note that when changing this option you need to delete any form_*.png files in
+# the HTML output directory before the changes have effect.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_TRANSPARENT    = YES
+
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# http://www.mathjax.org) which uses client side Javascript for the rendering
+# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+USE_MATHJAX            = NO
+
+# When MathJax is enabled you can set the default output format to be used for
+# the MathJax output. See the MathJax site (see:
+# http://docs.mathjax.org/en/latest/output.html) for more details.
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility), NativeMML (i.e. MathML) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_FORMAT         = HTML-CSS
+
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from http://www.mathjax.org before deployment.
+# The default value is: http://cdn.mathjax.org/mathjax/latest.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_RELPATH        = http://cdn.mathjax.org/mathjax/latest
+
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_EXTENSIONS     = 
+
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_CODEFILE       = 
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE           = YES
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a web server instead of a web client using Javascript. There
+# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
+# setting. When disabled, doxygen will generate a PHP script for searching and
+# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
+# and searching needs to be provided by external tools. See the section
+# "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SERVER_BASED_SEARCH    = NO
+
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
+# script for searching. Instead the search results are written to an XML file
+# which needs to be processed by an external indexer. Doxygen will invoke an
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH        = NO
+
+# The SEARCHENGINE_URL should point to a search engine hosted by a web server
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/). See the section "External Indexing and
+# Searching" for details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHENGINE_URL       = 
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
+# search data is written to a file for indexing by an external tool. With the
+# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHDATA_FILE        = searchdata.xml
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
+# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
+# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
+# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH_ID     = 
+
+# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
+# projects other than the one defined by this configuration file, but that are
+# all added to the same external search index. Each project needs to have a
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTRA_SEARCH_MAPPINGS  = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output.
+# The default value is: YES.
+
+GENERATE_LATEX         = YES
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked.
+#
+# Note that when enabling USE_PDFLATEX this option is only used for generating
+# bitmaps for formulas in the HTML output, but not in the Makefile that is
+# written to the output directory.
+# The default file is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PAPER_TYPE             = a4
+
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. The package can be specified just
+# by its name or with the correct syntax as to be used with the LaTeX
+# \usepackage command. To get the times font for instance you can specify :
+# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times}
+# To use the option intlimits with the amsmath package you can specify:
+# EXTRA_PACKAGES=[intlimits]{amsmath}
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+EXTRA_PACKAGES         = 
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
+# generated LaTeX document. The header should contain everything until the first
+# chapter. If it is left blank doxygen will generate a standard header. See
+# section "Doxygen usage" for information on how to let doxygen write the
+# default header to a separate file.
+#
+# Note: Only use a user-defined header if you know what you are doing! The
+# following commands have a special meaning inside the header: $title,
+# $datetime, $date, $doxygenversion, $projectname, $projectnumber,
+# $projectbrief, $projectlogo. Doxygen will replace $title with the empty
+# string, for the replacement values of the other commands the user is referred
+# to HTML_HEADER.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HEADER           = 
+
+# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
+# generated LaTeX document. The footer should contain everything after the last
+# chapter. If it is left blank doxygen will generate a standard footer. See
+# LATEX_HEADER for more information on how to generate a default footer and what
+# special commands can be used inside the footer.
+#
+# Note: Only use a user-defined footer if you know what you are doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_FOOTER           = 
+
+# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# LaTeX style sheets that are included after the standard style sheets created
+# by doxygen. Using this option one can overrule certain style aspects. Doxygen
+# will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_STYLESHEET = 
+
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_FILES      = 
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS         = YES
+
+# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
+# the PDF file directly from the LaTeX files. Set this option to YES, to get a
+# higher quality PDF documentation.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+USE_PDFLATEX           = YES
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
+# command to the generated LaTeX files. This will instruct LaTeX to keep running
+# if errors occur, instead of asking the user for help. This option is also used
+# when generating formulas in HTML.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BATCHMODE        = NO
+
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HIDE_INDICES     = NO
+
+# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
+# code with syntax highlighting in the LaTeX output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_SOURCE_CODE      = NO
+
+# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
+# bibliography, e.g. plainnat, or ieeetr. See
+# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BIB_STYLE        = plain
+
+# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated
+# page will contain the date and time when the page was generated. Setting this
+# to NO can help when comparing the output of multiple runs.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_TIMESTAMP        = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's config
+# file, i.e. a series of assignments. You only have to provide replacements,
+# missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_STYLESHEET_FILE    = 
+
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's config file. A template extensions file can be generated
+# using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_EXTENSIONS_FILE    = 
+
+# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code
+# with syntax highlighting in the RTF output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_SOURCE_CODE        = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for
+# classes and files.
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+UML_LIMIT_NUM_FIELDS   = 10
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+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
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+GRAPHICAL_HIERARCHY    = YES
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+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
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+DIRECTORY_GRAPH        = YES
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+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
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+# http://www.graphviz.org/)).
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_IMAGE_FORMAT       = png
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+# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
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+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INTERACTIVE_SVG        = NO
+
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_PATH               = 
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
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+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOTFILE_DIRS           = 
+
+# The MSCFILE_DIRS tag can be used to specify one or more directories that
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
+
+MSCFILE_DIRS           = 
+
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
+
+DIAFILE_DIRS           = 
+
+# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
+# path where java can find the plantuml.jar file. If left blank, it is assumed
+# PlantUML is not used or called during a preprocessing step. Doxygen will
+# generate a warning when it encounters a \startuml command in this case and
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+
+PLANTUML_JAR_PATH      = 
+
+# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
+# configuration file for plantuml.
+
+PLANTUML_CFG_FILE      = 
+
+# When using plantuml, the specified paths are searched for files specified by
+# the !include statement in a plantuml block.
+
+PLANTUML_INCLUDE_PATH  = 
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
+# larger than this value, doxygen will truncate the graph, which is visualized
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+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_GRAPH_MAX_NODES    = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
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+# note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
+MAX_DOT_GRAPH_DEPTH    = 0
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+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
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+# to support this out of the box.
+#
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_TRANSPARENT        = NO
+
+# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_MULTI_TARGETS      = NO
+
+# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
+# explaining the meaning of the various boxes and arrows in the dot generated
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+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate dot
+# files that are used to generate the various graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_CLEANUP            = YES

From 64c68c03f31b58d3a4bfcbe615d01fbf0d9a8fde Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 11:48:38 +0530
Subject: [PATCH 0078/1765] top: Update top-level README.md to build/install
 documentation PDF

This patch updates top-level README.md for steps required to build
and install documentation PDF.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 45 ++++++++++++++++++++++++++++++---------------
 1 file changed, 30 insertions(+), 15 deletions(-)

diff --git a/README.md b/README.md
index c38f54320fe..2e45521258a 100644
--- a/README.md
+++ b/README.md
@@ -67,27 +67,21 @@ should be *`qemu/virt`*.
 To build *libsbi, libplatsbi, and firmwares* for a specific platform, run:
 ```
 make PLATFORM=<platform_subdir>
-```
 or
-
-```
 make PLATFORM=<platform_subdir> O=<build_directory>
 ```
 
 To install *libsbi, headers, libplatsbi, and firmwares*, run:
 ```
 make PLATFORM=<platform_subdir> install
-```
 or
-
-```
-make PLATFORM=<platform_subdir> I=<install_directory> install`
+make PLATFORM=<platform_subdir> I=<install_directory> install
 ```
 
 In addition, platform specific make command-line options to top-level make
 , such as *PLATFORM_<xyz>* or *FW_<abc>* can also be specified. These
-options are described under *docs/platform/<platform_name>.md* and
-*docs/firmware/<firmware_name>.md*.
+options are described under *`docs/platform/<platform_name>.md`* and
+*`docs/firmware/<firmware_name>.md`*.
 
 Documentation
 -------------
@@ -95,15 +89,36 @@ Documentation
 A more detailed documenation is under the *docs* directory and organized
 as follows.
 
-* *docs/platform_guide.md* - Guidelines for adding new platform support
-* *docs/library_usage.md* - Guidelines for using the static library
-* *docs/platform/<platform_name>.md* - Platform specific documentation for
-                                       the platform *<platform_name>*
-* *docs/firmware/<firmware_name>.md* - Platform specific documentation for
-                                       the firmware *<firmware_name>*
+* *`docs/contributing.md`* - Guidelines for contributing to OpenSBI project
+* *`docs/platform_guide.md`* - Guidelines for adding new platform support
+* *`docs/library_usage.md`* - Guidelines for using the static library
+* *`docs/platform/<platform_name>.md`* - Documentation for the platform *<platform_name>*
+* *`docs/firmware/<firmware_name>.md`* - Documentation for the firmware *<firmware_name>*
 
 The source code is also well documented. For source level documentation,
 doxygen style is used. Please refer to [Doxygen manual]
 (http://www.stack.nl/~dimitri/doxygen/manual.html) for details on this
 format.
 
+The Doxygen can be installed on your debian build system using following:
+```
+sudo apt-get install doxygen doxygen-latex doxygen-doc doxygen-gui graphviz
+```
+
+To build a consolidated `refman.pdf` of all documenation, run:
+```
+make docs
+or
+make O=<build_directory> docs
+```
+
+**NOTE:** `refman.pdf` will be available under `<build_directory>/docs/latex`.
+
+To install a consolidated `refman.pdf` of all documenation, run:
+```
+make install_docs
+or
+make I=<install_directory> install_docs
+```
+
+**NOTE:** `refman.pdf` will be installed under `<install_directory>/docs`.
\ No newline at end of file

From 647f36f5f97f727d5fbe0d969e17c75ddfd4053e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 12:26:32 +0530
Subject: [PATCH 0079/1765] docs: Update title in contributing.md

The patch updates title in contributing.md to match
other .md files under docs/ directory.

Signed-off-by: Anup Patel <anup.pate@wdc.com>
---
 docs/contributing.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index 46a0ad9737e..6f0de1b0c8f 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,5 +1,5 @@
-Contrubuting to OpenSBI
-========================
+OpenSBI Contributing Guidelines
+===============================
 
 All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to the main repo avaliable at: https://github.com/riscv/opensbi
 

From 5ef104062d52e9c5aeab7bc0d1eaa7e7e6d86ff3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 13:55:35 +0530
Subject: [PATCH 0080/1765] include: Add __noreturn define for noreturn
 function attribute

There are quite a few noreturn functions in OpenSBI hence
we add commong __noreturn define for noreturn functin attribute.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index ddcdea28228..136cd47eabf 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -54,4 +54,6 @@ typedef unsigned long		physical_size_t;
 
 #define NULL			((void *)0)
 
+#define __noreturn		__attribute__((noreturn))
+
 #endif

From 5f097cbf0715e217cd2fb67731b10ec9a54ed4f3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 13:58:29 +0530
Subject: [PATCH 0081/1765] lib: Add documentation for sbi_init() API

This patch adds doxygen style documentation for sbi_init() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_init.h |  2 +-
 lib/sbi_init.c         | 19 ++++++++++++++-----
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index b3aafdc1a68..7c4267ba69c 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -14,6 +14,6 @@
 
 struct sbi_scratch;
 
-void __attribute__((noreturn)) sbi_init(struct sbi_scratch *scratch);
+void __noreturn sbi_init(struct sbi_scratch *scratch);
 
 #endif
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index f9429719fc7..b0d4494170b 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -27,8 +27,7 @@ static const char *logo =
 	"        | |\n"
 	"        |_|\n";
 
-static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
-						    u32 hartid)
+static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
 	char str[64];
@@ -93,8 +92,7 @@ static void __attribute__((noreturn)) init_coldboot(struct sbi_scratch *scratch,
 			     scratch->next_addr, scratch->next_mode);
 }
 
-static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
-						    u32 hartid)
+static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -141,7 +139,18 @@ static void __attribute__((noreturn)) init_warmboot(struct sbi_scratch *scratch,
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
 
-void __attribute__((noreturn)) sbi_init(struct sbi_scratch *scratch)
+/**
+ * Initialize OpenSBI library for current HART and jump to next
+ * booting stage.
+ *
+ * The function expects following:
+ * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
+ * 2. Stack pointer (SP) is setup for current HART
+ * 3. All interrupts are disabled in MIE CSR except MSIP
+ *
+ * @param scratch pointer to sbi_scratch of current HART
+ */
+void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
 	bool coldboot = FALSE;
 	u32 hartid = sbi_current_hartid();

From 924a26d82fd948318619c6645865eaa0691640f9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 14:00:32 +0530
Subject: [PATCH 0082/1765] include: Add documentation for sbi_scratch and
 friends

This patch adds doxygen style documentation for struct sbi_scratch
and related helper macros/defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_scratch.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 25b00c32af3..ace1a0dee2e 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -12,36 +12,58 @@
 
 #include <sbi/riscv_asm.h>
 
+/** Offset of fw_start member in sbi_scratch */
 #define SBI_SCRATCH_FW_START_OFFSET		(0 * __SIZEOF_POINTER__)
+/** Offset of fw_size member in sbi_scratch */
 #define SBI_SCRATCH_FW_SIZE_OFFSET		(1 * __SIZEOF_POINTER__)
+/** Offset of next_arg1 member in sbi_scratch */
 #define SBI_SCRATCH_NEXT_ARG1_OFFSET		(2 * __SIZEOF_POINTER__)
+/** Offset of next_addr member in sbi_scratch */
 #define SBI_SCRATCH_NEXT_ADDR_OFFSET		(3 * __SIZEOF_POINTER__)
+/** Offset of next_mode member in sbi_scratch */
 #define SBI_SCRATCH_NEXT_MODE_OFFSET		(4 * __SIZEOF_POINTER__)
+/** Offset of warmboot_addr member in sbi_scratch */
 #define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(5 * __SIZEOF_POINTER__)
+/** Offset of platform_addr member in sbi_scratch */
 #define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
+/** Offset of hartid_to_scratch member in sbi_scratch */
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
+/** Offset of ipi_type member in sbi_scratch */
 #define SBI_SCRATCH_IPI_TYPE_OFFSET		(8 * __SIZEOF_POINTER__)
+/** Maximum size of sbi_scratch */
 #define SBI_SCRATCH_SIZE			256
 
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
 
+/** Representation of per-HART scratch space */
 struct sbi_scratch {
+	/** Start (or base) address of firmware linked to OpenSBI library */
 	unsigned long fw_start;
+	/** Size (in bytes) of firmware linked to OpenSBI library */
 	unsigned long fw_size;
+	/** Arg1 (or 'a1' register) of next booting stage for this HART */
 	unsigned long next_arg1;
+	/** Address of next booting stage for this HART */
 	unsigned long next_addr;
+	/** Priviledge mode of next booting stage for this HART */
 	unsigned long next_mode;
+	/** Warm boot entry point address for this HART */
 	unsigned long warmboot_addr;
+	/** Address of sbi_platform */
 	unsigned long platform_addr;
+	/** Address of HART ID to sbi_scratch conversion function */
 	unsigned long hartid_to_scratch;
+	/** IPI type (or flags) */
 	unsigned long ipi_type;
 } __attribute__((packed));
 
+/** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr()	\
 ((struct sbi_scratch *)csr_read(mscratch))
 
+/** Get Arg1 of next booting stage for current HART */
 #define sbi_scratch_thishart_arg1_ptr()	\
 ((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 

From 4485b5cba86a2488c326c0dee9a1fec2d788b6e8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 14:53:52 +0530
Subject: [PATCH 0083/1765] include: Add __packed define for packed structures

This patch adds __packed define for specifying packed
attribute of structures.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 136cd47eabf..399384206ba 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -54,6 +54,7 @@ typedef unsigned long		physical_size_t;
 
 #define NULL			((void *)0)
 
+#define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 
 #endif

From 3298251f0c56b556a8f53632e46020861a2f4f8a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 14 Jan 2019 15:00:15 +0530
Subject: [PATCH 0084/1765] include: Add documentation for sbi_trap_regs and
 friends

This patch adds doxygen style documentation for struct sbi_trap_regs
and related macros/defines/functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_scratch.h |  2 +-
 include/sbi/sbi_trap.h    | 74 ++++++++++++++++++++++++++++++++++++++-
 lib/sbi_init.c            |  3 +-
 lib/sbi_trap.c            | 34 +++++++++++++++---
 4 files changed, 106 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index ace1a0dee2e..562f7bb0ccb 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -57,7 +57,7 @@ struct sbi_scratch {
 	unsigned long hartid_to_scratch;
 	/** IPI type (or flags) */
 	unsigned long ipi_type;
-} __attribute__((packed));
+} __packed;
 
 /** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr()	\
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 67f7f38329c..ab94d1961eb 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -10,86 +10,158 @@
 #ifndef __SBI_TRAP_H__
 #define __SBI_TRAP_H__
 
+/** Index of zero member in sbi_trap_regs */
 #define SBI_TRAP_REGS_zero			0
+/** Index of ra member in sbi_trap_regs */
 #define SBI_TRAP_REGS_ra			1
+/** Index of sp member in sbi_trap_regs */
 #define SBI_TRAP_REGS_sp			2
+/** Index of gp member in sbi_trap_regs */
 #define SBI_TRAP_REGS_gp			3
+/** Index of tp member in sbi_trap_regs */
 #define SBI_TRAP_REGS_tp			4
+/** Index of t0 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t0			5
+/** Index of t1 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t1			6
+/** Index of t2 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t2			7
+/** Index of s0 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s0			8
+/** Index of s1 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s1			9
+/** Index of a0 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a0			10
+/** Index of a1 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a1			11
+/** Index of a2 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a2			12
+/** Index of a3 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a3			13
+/** Index of a4 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a4			14
+/** Index of a5 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a5			15
+/** Index of a6 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a6			16
+/** Index of a7 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_a7			17
+/** Index of s2 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s2			18
+/** Index of s3 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s3			19
+/** Index of s4 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s4			20
+/** Index of s5 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s5			21
+/** Index of s6 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s6			22
+/** Index of s7 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s7			23
+/** Index of s8 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s8			24
+/** Index of s9 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s9			25
+/** Index of s10 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s10			26
+/** Index of s11 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_s11			27
+/** Index of t3 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t3			28
+/** Index of t4 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t4			29
+/** Index of t5 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t5			30
+/** Index of t6 member in sbi_trap_regs */
 #define SBI_TRAP_REGS_t6			31
+/** Index of mepc member in sbi_trap_regs */
 #define SBI_TRAP_REGS_mepc			32
+/** Index of mstatus member in sbi_trap_regs */
 #define SBI_TRAP_REGS_mstatus			33
+/** Last member index in sbi_trap_regs */
 #define SBI_TRAP_REGS_last			34
 
+/** Get offset of member with name 'x' in sbi_trap_regs */
 #define SBI_TRAP_REGS_OFFSET(x)			\
 				((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__)
+/** Size (in bytes) of sbi_trap_regs */
 #define SBI_TRAP_REGS_SIZE			SBI_TRAP_REGS_OFFSET(last)
 
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
 
+/** Representation of register state at time of trap/interrupt */
 struct sbi_trap_regs {
+	/** zero register state */
 	unsigned long zero;
+	/** ra register state */
 	unsigned long ra;
+	/** sp register state */
 	unsigned long sp;
+	/** gp register state */
 	unsigned long gp;
+	/** tp register state */
 	unsigned long tp;
+	/** t0 register state */
 	unsigned long t0;
+	/** t1 register state */
 	unsigned long t1;
+	/** t2 register state */
 	unsigned long t2;
+	/** s0 register state */
 	unsigned long s0;
+	/** s1 register state */
 	unsigned long s1;
+	/** a0 register state */
 	unsigned long a0;
+	/** a1 register state */
 	unsigned long a1;
+	/** a2 register state */
 	unsigned long a2;
+	/** a3 register state */
 	unsigned long a3;
+	/** a4 register state */
 	unsigned long a4;
+	/** a5 register state */
 	unsigned long a5;
+	/** a6 register state */
 	unsigned long a6;
+	/** a7 register state */
 	unsigned long a7;
+	/** s2 register state */
 	unsigned long s2;
+	/** s3 register state */
 	unsigned long s3;
+	/** s4 register state */
 	unsigned long s4;
+	/** s5 register state */
 	unsigned long s5;
+	/** s6 register state */
 	unsigned long s6;
+	/** s7 register state */
 	unsigned long s7;
+	/** s8 register state */
 	unsigned long s8;
+	/** s9 register state */
 	unsigned long s9;
+	/** s10 register state */
 	unsigned long s10;
+	/** s11 register state */
 	unsigned long s11;
+	/** t3 register state */
 	unsigned long t3;
+	/** t4 register state */
 	unsigned long t4;
+	/** t5 register state */
 	unsigned long t5;
+	/** t6 register state */
 	unsigned long t6;
+	/** mepc register state */
 	unsigned long mepc;
+	/** mstatus register state */
 	unsigned long mstatus;
-} __attribute__((packed));
+} __packed;
 
 struct sbi_scratch;
 
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index b0d4494170b..b92c1fd6e6f 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -146,7 +146,8 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  * The function expects following:
  * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
  * 2. Stack pointer (SP) is setup for current HART
- * 3. All interrupts are disabled in MIE CSR except MSIP
+ * 3. Interrupts are disabled in MSTATUS CSR
+ * 4. All interrupts are disabled in MIE CSR except MSIP
  *
  * @param scratch pointer to sbi_scratch of current HART
  */
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 0e731e46f77..9f212c1fd7f 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -19,10 +19,10 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-static void __attribute__((noreturn)) sbi_trap_error(const char *msg,
-						int rc, u32 hartid,
-						ulong mcause, ulong mtval,
-						struct sbi_trap_regs *regs)
+static void __noreturn sbi_trap_error(const char *msg,
+				      int rc, u32 hartid,
+				      ulong mcause, ulong mtval,
+				      struct sbi_trap_regs *regs)
 {
 	sbi_printf("%s: hart%d: %s (error %d)\n",
 		   __func__, hartid, msg, rc);
@@ -66,6 +66,17 @@ static void __attribute__((noreturn)) sbi_trap_error(const char *msg,
 	sbi_hart_hang();
 }
 
+/**
+ * Redirect trap to lower privledge mode (S-mode or U-mode)
+ *
+ * @param regs pointer to register state
+ * @param scratch pointer to sbi_scratch of current HART
+ * @param epc error PC for lower privledge mode
+ * @param cause exception cause for lower privledge mode
+ * @param tval trap value for lower privledge mode
+ *
+ * Returns 0 on success and error code (< 0) on failure
+ */
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch,
 		      ulong epc, ulong cause, ulong tval)
@@ -109,6 +120,21 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	return 0;
 }
 
+/**
+ * Handle trap/interrupt
+ *
+ * This function is called by firmware linked to OpenSBI
+ * library for handling trap/interrupt. It expects the
+ * following:
+ * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
+ * 2. The 'mcause' CSR is having exception/interrupt cause
+ * 3. The 'mtval' CSR is having additional trap information
+ * 4. Stack pointer (SP) is setup for current HART
+ * 5. Interrupts are disabled in MSTATUS CSR
+ *
+ * @param regs pointer to register state
+ * @param scratch pointer to sbi_scratch of current HART
+ */
 void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {

From 1901e8a287bcf7edeeb7aeef05df00675754f2a9 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 17 Jan 2019 16:38:55 -0800
Subject: [PATCH 0085/1765] platform: Add minimal libc support.

libfdt requires minimal libc support. Absoultely
minimum functions are added in libc.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/common/libc/objects.mk |  15 +++
 platform/common/libc/string.c   | 170 ++++++++++++++++++++++++++++++++
 2 files changed, 185 insertions(+)
 create mode 100644 platform/common/libc/objects.mk
 create mode 100644 platform/common/libc/string.c

diff --git a/platform/common/libc/objects.mk b/platform/common/libc/objects.mk
new file mode 100644
index 00000000000..9da0b0e70ec
--- /dev/null
+++ b/platform/common/libc/objects.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Atish Patra<atish.patra@wdc.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+libc_files = string.o
+
+$(foreach file, $(libc_files), \
+	$(eval CFLAGS_$(file) = -I$(src)/../../common/libc))
+
+platform-common-objs-$(PLATFORM_INCLUDE_LIBC) += $(addprefix libc/,$(libc_files))
diff --git a/platform/common/libc/string.c b/platform/common/libc/string.c
new file mode 100644
index 00000000000..cb467a6bad7
--- /dev/null
+++ b/platform/common/libc/string.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+/*
+ * Simple libc functions. These are not optimized at all and might have some
+ * bugs as well. Use any optimized routines from newlib or glibc if required.
+ */
+
+#include <string.h>
+
+int strcmp(const char *a, const char *b)
+{
+	/* search first diff or end of string */
+	for (; *a == *b && *a != '\0'; a++, b++);
+	return *a - *b;
+}
+
+size_t strlen(const char *str)
+{
+	unsigned long ret = 0;
+
+	while (*str != '\0') {
+		ret++;
+		str++;
+	}
+
+	return ret;
+}
+
+size_t strnlen(const char *str, size_t count)
+{
+	unsigned long ret = 0;
+
+	while (*str != '\0' && ret < count) {
+		ret++;
+		str++;
+		count--;
+	}
+
+	return ret;
+}
+
+char * strcpy(char * dest,const char *src)
+{
+	char *ret = dest;
+
+	while(*src != '\0') {
+		*dest++ = *src++;
+	}
+
+	return ret;
+}
+
+char * strncpy(char * dest,const char *src,size_t count)
+{
+	char *ret = dest;
+
+	while(count-- && *src != '\0') {
+		*dest++ = *src++;
+	}
+
+	return ret;
+}
+
+char * strchr(const char * s, int c)
+{
+	while(*s != '\0' && *s != (char)c)
+		s++;
+
+	if (*s == '\0')
+		return NULL;
+	else
+		return (char *)s;
+}
+
+char * strrchr(const char * s, int c)
+{
+	const char *last = s + strlen(s);
+
+	while (last > s && *last != (char)c)
+		last--;
+
+	if (*last != (char)c)
+		return NULL;
+	else
+		return (char *)last;
+}
+void * memset(void * s,int c,size_t count)
+{
+	char *temp = s;
+
+	while(count > 0 ){
+		count--;
+		*temp++ = c;
+	}
+
+	return s;
+}
+
+void * memcpy(void *dest, const void *src, size_t count)
+{
+	char *temp1 = dest;
+	const char *temp2 = src;
+
+	while (count > 0) {
+		*temp1++ = *temp2++;
+		count--;
+	}
+
+	return dest;
+}
+
+void * memmove(void * dest,const void *src,size_t count)
+{
+	char *temp1 = (char *)dest;
+	const char *temp2 = (char *)src;
+
+	if (src == dest)
+		return dest;
+
+	if (dest < src) {
+		while(count > 0) {
+			*temp1++ = *temp2++;
+			count--;
+		}
+	} else {
+		temp1 = dest + count - 1;
+		temp2 = src + count - 1;
+
+		while(count > 0) {
+			*temp1-- = *temp2--;
+			count--;
+		}
+	}
+	return dest;
+}
+
+int memcmp(const void * s1,const void * s2,size_t count)
+{
+	const char *temp1 = s1;
+	const char *temp2 = s2;
+	for (; count > 0 && (*temp1 == *temp2); count--) {
+		temp1++;
+		temp2++;
+	}
+
+	if (count > 0)
+		return *(unsigned char *)temp1 - *(unsigned char *)temp2;
+	else
+		return 0;
+}
+
+void *memchr(const void *s, int c, size_t count)
+{
+	const unsigned char *temp = s;
+
+	while (count > 0) {
+		if ((unsigned char)c == *temp++) {
+			return (void *)(temp-1);
+		}
+		count--;
+	}
+	return NULL;
+}

From e2ce15cb3be93c3ba8d380a1f0348a6df8606e2a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 00:42:37 -0800
Subject: [PATCH 0086/1765] platform: Add libfdt support.

Some of the platform (i.e. SiFive FU540) requires Device
Tree modification before it is passed to higher stages.
Add libfdt support now to help this process. Libfdt should
only be included per platform basis.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_types.h                  |    1 -
 platform/common/libfdt/Makefile.libfdt   |   15 +
 platform/common/libfdt/TODO              |    3 +
 platform/common/libfdt/fdt.c             |  331 ++++
 platform/common/libfdt/fdt.h             |  111 ++
 platform/common/libfdt/fdt_addresses.c   |   97 ++
 platform/common/libfdt/fdt_empty_tree.c  |   83 +
 platform/common/libfdt/fdt_overlay.c     |  912 ++++++++++
 platform/common/libfdt/fdt_ro.c          |  922 ++++++++++
 platform/common/libfdt/fdt_rw.c          |  505 ++++++
 platform/common/libfdt/fdt_strerror.c    |  102 ++
 platform/common/libfdt/fdt_sw.c          |  365 ++++
 platform/common/libfdt/fdt_wip.c         |  139 ++
 platform/common/libfdt/libfdt.h          | 1968 ++++++++++++++++++++++
 platform/common/libfdt/libfdt_env.h      |  140 ++
 platform/common/libfdt/libfdt_internal.h |   96 ++
 platform/common/libfdt/objects.mk        |   15 +
 platform/common/libfdt/version.lds       |   71 +
 18 files changed, 5875 insertions(+), 1 deletion(-)
 create mode 100644 platform/common/libfdt/Makefile.libfdt
 create mode 100644 platform/common/libfdt/TODO
 create mode 100644 platform/common/libfdt/fdt.c
 create mode 100644 platform/common/libfdt/fdt.h
 create mode 100644 platform/common/libfdt/fdt_addresses.c
 create mode 100644 platform/common/libfdt/fdt_empty_tree.c
 create mode 100644 platform/common/libfdt/fdt_overlay.c
 create mode 100644 platform/common/libfdt/fdt_ro.c
 create mode 100644 platform/common/libfdt/fdt_rw.c
 create mode 100644 platform/common/libfdt/fdt_strerror.c
 create mode 100644 platform/common/libfdt/fdt_sw.c
 create mode 100644 platform/common/libfdt/fdt_wip.c
 create mode 100644 platform/common/libfdt/libfdt.h
 create mode 100644 platform/common/libfdt/libfdt_env.h
 create mode 100644 platform/common/libfdt/libfdt_internal.h
 create mode 100644 platform/common/libfdt/objects.mk
 create mode 100644 platform/common/libfdt/version.lds

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 399384206ba..c6cdf18c4c1 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -12,7 +12,6 @@
 
 typedef char			s8;
 typedef unsigned char		u8;
-typedef char			int8_t;
 typedef unsigned char		uint8_t;
 
 typedef short			s16;
diff --git a/platform/common/libfdt/Makefile.libfdt b/platform/common/libfdt/Makefile.libfdt
new file mode 100644
index 00000000000..3af3656df80
--- /dev/null
+++ b/platform/common/libfdt/Makefile.libfdt
@@ -0,0 +1,15 @@
+# Makefile.libfdt
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+LIBFDT_soname = libfdt.$(SHAREDLIB_EXT).1
+LIBFDT_INCLUDES = fdt.h libfdt.h libfdt_env.h
+LIBFDT_VERSION = version.lds
+LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
+	fdt_addresses.c fdt_overlay.c
+LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
+
+libfdt_clean:
+	@$(VECHO) CLEAN "(libfdt)"
+	rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%)
diff --git a/platform/common/libfdt/TODO b/platform/common/libfdt/TODO
new file mode 100644
index 00000000000..288437e394f
--- /dev/null
+++ b/platform/common/libfdt/TODO
@@ -0,0 +1,3 @@
+- Tree traversal functions
+- Graft function
+- Complete libfdt.h documenting comments
diff --git a/platform/common/libfdt/fdt.c b/platform/common/libfdt/fdt.c
new file mode 100644
index 00000000000..ae03b111296
--- /dev/null
+++ b/platform/common/libfdt/fdt.c
@@ -0,0 +1,331 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+/*
+ * Minimal sanity check for a read-only tree. fdt_ro_probe_() checks
+ * that the given buffer contains what appears to be a flattened
+ * device tree with sane information in its header.
+ */
+int fdt_ro_probe_(const void *fdt)
+{
+	if (fdt_magic(fdt) == FDT_MAGIC) {
+		/* Complete tree */
+		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
+		/* Unfinished sequential-write blob */
+		if (fdt_size_dt_struct(fdt) == 0)
+			return -FDT_ERR_BADSTATE;
+	} else {
+		return -FDT_ERR_BADMAGIC;
+	}
+
+	return 0;
+}
+
+static int check_off_(uint32_t hdrsize, uint32_t totalsize, uint32_t off)
+{
+	return (off >= hdrsize) && (off <= totalsize);
+}
+
+static int check_block_(uint32_t hdrsize, uint32_t totalsize,
+			uint32_t base, uint32_t size)
+{
+	if (!check_off_(hdrsize, totalsize, base))
+		return 0; /* block start out of bounds */
+	if ((base + size) < base)
+		return 0; /* overflow */
+	if (!check_off_(hdrsize, totalsize, base + size))
+		return 0; /* block end out of bounds */
+	return 1;
+}
+
+size_t fdt_header_size_(uint32_t version)
+{
+	if (version <= 1)
+		return FDT_V1_SIZE;
+	else if (version <= 2)
+		return FDT_V2_SIZE;
+	else if (version <= 3)
+		return FDT_V3_SIZE;
+	else if (version <= 16)
+		return FDT_V16_SIZE;
+	else
+		return FDT_V17_SIZE;
+}
+
+int fdt_check_header(const void *fdt)
+{
+	size_t hdrsize;
+
+	if (fdt_magic(fdt) != FDT_MAGIC)
+		return -FDT_ERR_BADMAGIC;
+	hdrsize = fdt_header_size(fdt);
+	if ((fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+	    || (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION))
+		return -FDT_ERR_BADVERSION;
+	if (fdt_version(fdt) < fdt_last_comp_version(fdt))
+		return -FDT_ERR_BADVERSION;
+
+	if ((fdt_totalsize(fdt) < hdrsize)
+	    || (fdt_totalsize(fdt) > INT_MAX))
+		return -FDT_ERR_TRUNCATED;
+
+	/* Bounds check memrsv block */
+	if (!check_off_(hdrsize, fdt_totalsize(fdt), fdt_off_mem_rsvmap(fdt)))
+		return -FDT_ERR_TRUNCATED;
+
+	/* Bounds check structure block */
+	if (fdt_version(fdt) < 17) {
+		if (!check_off_(hdrsize, fdt_totalsize(fdt),
+				fdt_off_dt_struct(fdt)))
+			return -FDT_ERR_TRUNCATED;
+	} else {
+		if (!check_block_(hdrsize, fdt_totalsize(fdt),
+				  fdt_off_dt_struct(fdt),
+				  fdt_size_dt_struct(fdt)))
+			return -FDT_ERR_TRUNCATED;
+	}
+
+	/* Bounds check strings block */
+	if (!check_block_(hdrsize, fdt_totalsize(fdt),
+			  fdt_off_dt_strings(fdt), fdt_size_dt_strings(fdt)))
+		return -FDT_ERR_TRUNCATED;
+
+	return 0;
+}
+
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
+{
+	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
+
+	if ((absoffset < offset)
+	    || ((absoffset + len) < absoffset)
+	    || (absoffset + len) > fdt_totalsize(fdt))
+		return NULL;
+
+	if (fdt_version(fdt) >= 0x11)
+		if (((offset + len) < offset)
+		    || ((offset + len) > fdt_size_dt_struct(fdt)))
+			return NULL;
+
+	return fdt_offset_ptr_(fdt, offset);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
+{
+	const fdt32_t *tagp, *lenp;
+	uint32_t tag;
+	int offset = startoffset;
+	const char *p;
+
+	*nextoffset = -FDT_ERR_TRUNCATED;
+	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
+	if (!tagp)
+		return FDT_END; /* premature end */
+	tag = fdt32_to_cpu(*tagp);
+	offset += FDT_TAGSIZE;
+
+	*nextoffset = -FDT_ERR_BADSTRUCTURE;
+	switch (tag) {
+	case FDT_BEGIN_NODE:
+		/* skip name */
+		do {
+			p = fdt_offset_ptr(fdt, offset++, 1);
+		} while (p && (*p != '\0'));
+		if (!p)
+			return FDT_END; /* premature end */
+		break;
+
+	case FDT_PROP:
+		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
+		if (!lenp)
+			return FDT_END; /* premature end */
+		/* skip-name offset, length and value */
+		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
+			+ fdt32_to_cpu(*lenp);
+		if (fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 &&
+		    ((offset - fdt32_to_cpu(*lenp)) % 8) != 0)
+			offset += 4;
+		break;
+
+	case FDT_END:
+	case FDT_END_NODE:
+	case FDT_NOP:
+		break;
+
+	default:
+		return FDT_END;
+	}
+
+	if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
+		return FDT_END; /* premature end */
+
+	*nextoffset = FDT_TAGALIGN(offset);
+	return tag;
+}
+
+int fdt_check_node_offset_(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int fdt_check_prop_offset_(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int fdt_next_node(const void *fdt, int offset, int *depth)
+{
+	int nextoffset = 0;
+	uint32_t tag;
+
+	if (offset >= 0)
+		if ((nextoffset = fdt_check_node_offset_(fdt, offset)) < 0)
+			return nextoffset;
+
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_PROP:
+		case FDT_NOP:
+			break;
+
+		case FDT_BEGIN_NODE:
+			if (depth)
+				(*depth)++;
+			break;
+
+		case FDT_END_NODE:
+			if (depth && ((--(*depth)) < 0))
+				return nextoffset;
+			break;
+
+		case FDT_END:
+			if ((nextoffset >= 0)
+			    || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
+				return -FDT_ERR_NOTFOUND;
+			else
+				return nextoffset;
+		}
+	} while (tag != FDT_BEGIN_NODE);
+
+	return offset;
+}
+
+int fdt_first_subnode(const void *fdt, int offset)
+{
+	int depth = 0;
+
+	offset = fdt_next_node(fdt, offset, &depth);
+	if (offset < 0 || depth != 1)
+		return -FDT_ERR_NOTFOUND;
+
+	return offset;
+}
+
+int fdt_next_subnode(const void *fdt, int offset)
+{
+	int depth = 1;
+
+	/*
+	 * With respect to the parent, the depth of the next subnode will be
+	 * the same as the last.
+	 */
+	do {
+		offset = fdt_next_node(fdt, offset, &depth);
+		if (offset < 0 || depth < 1)
+			return -FDT_ERR_NOTFOUND;
+	} while (depth > 1);
+
+	return offset;
+}
+
+const char *fdt_find_string_(const char *strtab, int tabsize, const char *s)
+{
+	int len = strlen(s) + 1;
+	const char *last = strtab + tabsize - len;
+	const char *p;
+
+	for (p = strtab; p <= last; p++)
+		if (memcmp(p, s, len) == 0)
+			return p;
+	return NULL;
+}
+
+int fdt_move(const void *fdt, void *buf, int bufsize)
+{
+	FDT_RO_PROBE(fdt);
+
+	if (fdt_totalsize(fdt) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	memmove(buf, fdt, fdt_totalsize(fdt));
+	return 0;
+}
diff --git a/platform/common/libfdt/fdt.h b/platform/common/libfdt/fdt.h
new file mode 100644
index 00000000000..74961f9026d
--- /dev/null
+++ b/platform/common/libfdt/fdt.h
@@ -0,0 +1,111 @@
+#ifndef FDT_H
+#define FDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ASSEMBLY__
+
+struct fdt_header {
+	fdt32_t magic;			 /* magic word FDT_MAGIC */
+	fdt32_t totalsize;		 /* total size of DT block */
+	fdt32_t off_dt_struct;		 /* offset to structure */
+	fdt32_t off_dt_strings;		 /* offset to strings */
+	fdt32_t off_mem_rsvmap;		 /* offset to memory reserve map */
+	fdt32_t version;		 /* format version */
+	fdt32_t last_comp_version;	 /* last compatible version */
+
+	/* version 2 fields below */
+	fdt32_t boot_cpuid_phys;	 /* Which physical CPU id we're
+					    booting on */
+	/* version 3 fields below */
+	fdt32_t size_dt_strings;	 /* size of the strings block */
+
+	/* version 17 fields below */
+	fdt32_t size_dt_struct;		 /* size of the structure block */
+};
+
+struct fdt_reserve_entry {
+	fdt64_t address;
+	fdt64_t size;
+};
+
+struct fdt_node_header {
+	fdt32_t tag;
+	char name[0];
+};
+
+struct fdt_property {
+	fdt32_t tag;
+	fdt32_t len;
+	fdt32_t nameoff;
+	char data[0];
+};
+
+#endif /* !__ASSEMBLY */
+
+#define FDT_MAGIC	0xd00dfeed	/* 4: version, 4: total size */
+#define FDT_TAGSIZE	sizeof(fdt32_t)
+
+#define FDT_BEGIN_NODE	0x1		/* Start node: full name */
+#define FDT_END_NODE	0x2		/* End node */
+#define FDT_PROP	0x3		/* Property: name off,
+					   size, content */
+#define FDT_NOP		0x4		/* nop */
+#define FDT_END		0x9
+
+#define FDT_V1_SIZE	(7*sizeof(fdt32_t))
+#define FDT_V2_SIZE	(FDT_V1_SIZE + sizeof(fdt32_t))
+#define FDT_V3_SIZE	(FDT_V2_SIZE + sizeof(fdt32_t))
+#define FDT_V16_SIZE	FDT_V3_SIZE
+#define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
+
+#endif /* FDT_H */
diff --git a/platform/common/libfdt/fdt_addresses.c b/platform/common/libfdt/fdt_addresses.c
new file mode 100644
index 00000000000..f13a87dfa06
--- /dev/null
+++ b/platform/common/libfdt/fdt_addresses.c
@@ -0,0 +1,97 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
+ * Copyright (C) 2018 embedded brains GmbH
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int fdt_cells(const void *fdt, int nodeoffset, const char *name)
+{
+	const fdt32_t *c;
+	int val;
+	int len;
+
+	c = fdt_getprop(fdt, nodeoffset, name, &len);
+	if (!c)
+		return len;
+
+	if (len != sizeof(*c))
+		return -FDT_ERR_BADNCELLS;
+
+	val = fdt32_to_cpu(*c);
+	if ((val <= 0) || (val > FDT_MAX_NCELLS))
+		return -FDT_ERR_BADNCELLS;
+
+	return val;
+}
+
+int fdt_address_cells(const void *fdt, int nodeoffset)
+{
+	int val;
+
+	val = fdt_cells(fdt, nodeoffset, "#address-cells");
+	if (val == -FDT_ERR_NOTFOUND)
+		return 2;
+	return val;
+}
+
+int fdt_size_cells(const void *fdt, int nodeoffset)
+{
+	int val;
+
+	val = fdt_cells(fdt, nodeoffset, "#size-cells");
+	if (val == -FDT_ERR_NOTFOUND)
+		return 1;
+	return val;
+}
diff --git a/platform/common/libfdt/fdt_empty_tree.c b/platform/common/libfdt/fdt_empty_tree.c
new file mode 100644
index 00000000000..f2ae9b77c28
--- /dev/null
+++ b/platform/common/libfdt/fdt_empty_tree.c
@@ -0,0 +1,83 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2012 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_create_empty_tree(void *buf, int bufsize)
+{
+	int err;
+
+	err = fdt_create(buf, bufsize);
+	if (err)
+		return err;
+
+	err = fdt_finish_reservemap(buf);
+	if (err)
+		return err;
+
+	err = fdt_begin_node(buf, "");
+	if (err)
+		return err;
+
+	err =  fdt_end_node(buf);
+	if (err)
+		return err;
+
+	err = fdt_finish(buf);
+	if (err)
+		return err;
+
+	return fdt_open_into(buf, buf, bufsize);
+}
diff --git a/platform/common/libfdt/fdt_overlay.c b/platform/common/libfdt/fdt_overlay.c
new file mode 100644
index 00000000000..5fdab6c6371
--- /dev/null
+++ b/platform/common/libfdt/fdt_overlay.c
@@ -0,0 +1,912 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2016 Free Electrons
+ * Copyright (C) 2016 NextThing Co.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+/**
+ * overlay_get_target_phandle - retrieves the target phandle of a fragment
+ * @fdto: pointer to the device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ *
+ * overlay_get_target_phandle() retrieves the target phandle of an
+ * overlay fragment when that fragment uses a phandle (target
+ * property) instead of a path (target-path property).
+ *
+ * returns:
+ *      the phandle pointed by the target property
+ *      0, if the phandle was not found
+ *	-1, if the phandle was malformed
+ */
+static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
+{
+	const fdt32_t *val;
+	int len;
+
+	val = fdt_getprop(fdto, fragment, "target", &len);
+	if (!val)
+		return 0;
+
+	if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
+		return (uint32_t)-1;
+
+	return fdt32_to_cpu(*val);
+}
+
+/**
+ * overlay_get_target - retrieves the offset of a fragment's target
+ * @fdt: Base device tree blob
+ * @fdto: Device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
+ *
+ * overlay_get_target() retrieves the target offset in the base
+ * device tree of a fragment, no matter how the actual targetting is
+ * done (through a phandle or a path)
+ *
+ * returns:
+ *      the targetted node offset in the base device tree
+ *      Negative error code on error
+ */
+static int overlay_get_target(const void *fdt, const void *fdto,
+			      int fragment, char const **pathp)
+{
+	uint32_t phandle;
+	const char *path = NULL;
+	int path_len = 0, ret;
+
+	/* Try first to do a phandle based lookup */
+	phandle = overlay_get_target_phandle(fdto, fragment);
+	if (phandle == (uint32_t)-1)
+		return -FDT_ERR_BADPHANDLE;
+
+	/* no phandle, try path */
+	if (!phandle) {
+		/* And then a path based lookup */
+		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
+		if (path)
+			ret = fdt_path_offset(fdt, path);
+		else
+			ret = path_len;
+	} else
+		ret = fdt_node_offset_by_phandle(fdt, phandle);
+
+	/*
+	* If we haven't found either a target or a
+	* target-path property in a node that contains a
+	* __overlay__ subnode (we wouldn't be called
+	* otherwise), consider it a improperly written
+	* overlay
+	*/
+	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
+		ret = -FDT_ERR_BADOVERLAY;
+
+	/* return on error */
+	if (ret < 0)
+		return ret;
+
+	/* return pointer to path (if available) */
+	if (pathp)
+		*pathp = path ? path : NULL;
+
+	return ret;
+}
+
+/**
+ * overlay_phandle_add_offset - Increases a phandle by an offset
+ * @fdt: Base device tree blob
+ * @node: Device tree overlay blob
+ * @name: Name of the property to modify (phandle or linux,phandle)
+ * @delta: offset to apply
+ *
+ * overlay_phandle_add_offset() increments a node phandle by a given
+ * offset.
+ *
+ * returns:
+ *      0 on success.
+ *      Negative error code on error
+ */
+static int overlay_phandle_add_offset(void *fdt, int node,
+				      const char *name, uint32_t delta)
+{
+	const fdt32_t *val;
+	uint32_t adj_val;
+	int len;
+
+	val = fdt_getprop(fdt, node, name, &len);
+	if (!val)
+		return len;
+
+	if (len != sizeof(*val))
+		return -FDT_ERR_BADPHANDLE;
+
+	adj_val = fdt32_to_cpu(*val);
+	if ((adj_val + delta) < adj_val)
+		return -FDT_ERR_NOPHANDLES;
+
+	adj_val += delta;
+	if (adj_val == (uint32_t)-1)
+		return -FDT_ERR_NOPHANDLES;
+
+	return fdt_setprop_inplace_u32(fdt, node, name, adj_val);
+}
+
+/**
+ * overlay_adjust_node_phandles - Offsets the phandles of a node
+ * @fdto: Device tree overlay blob
+ * @node: Offset of the node we want to adjust
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_node_phandles() adds a constant to all the phandles
+ * of a given node. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_node_phandles(void *fdto, int node,
+					uint32_t delta)
+{
+	int child;
+	int ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "linux,phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	fdt_for_each_subnode(child, fdto, node) {
+		ret = overlay_adjust_node_phandles(fdto, child, delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_adjust_local_phandles - Adjust the phandles of a whole overlay
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_local_phandles() adds a constant to all the
+ * phandles of an overlay. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)
+{
+	/*
+	 * Start adjusting the phandles from the overlay root
+	 */
+	return overlay_adjust_node_phandles(fdto, 0, delta);
+}
+
+/**
+ * overlay_update_local_node_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @tree_node: Node offset of the node to operate on
+ * @fixup_node: Node offset of the matching local fixups node
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_nodes_references() update the phandles
+ * pointing to a node within the device tree overlay by adding a
+ * constant delta.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_node_references(void *fdto,
+						int tree_node,
+						int fixup_node,
+						uint32_t delta)
+{
+	int fixup_prop;
+	int fixup_child;
+	int ret;
+
+	fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
+		const fdt32_t *fixup_val;
+		const char *tree_val;
+		const char *name;
+		int fixup_len;
+		int tree_len;
+		int i;
+
+		fixup_val = fdt_getprop_by_offset(fdto, fixup_prop,
+						  &name, &fixup_len);
+		if (!fixup_val)
+			return fixup_len;
+
+		if (fixup_len % sizeof(uint32_t))
+			return -FDT_ERR_BADOVERLAY;
+
+		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
+		if (!tree_val) {
+			if (tree_len == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_BADOVERLAY;
+
+			return tree_len;
+		}
+
+		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
+			fdt32_t adj_val;
+			uint32_t poffset;
+
+			poffset = fdt32_to_cpu(fixup_val[i]);
+
+			/*
+			 * phandles to fixup can be unaligned.
+			 *
+			 * Use a memcpy for the architectures that do
+			 * not support unaligned accesses.
+			 */
+			memcpy(&adj_val, tree_val + poffset, sizeof(adj_val));
+
+			adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
+
+			ret = fdt_setprop_inplace_namelen_partial(fdto,
+								  tree_node,
+								  name,
+								  strlen(name),
+								  poffset,
+								  &adj_val,
+								  sizeof(adj_val));
+			if (ret == -FDT_ERR_NOSPACE)
+				return -FDT_ERR_BADOVERLAY;
+
+			if (ret)
+				return ret;
+		}
+	}
+
+	fdt_for_each_subnode(fixup_child, fdto, fixup_node) {
+		const char *fixup_child_name = fdt_get_name(fdto, fixup_child,
+							    NULL);
+		int tree_child;
+
+		tree_child = fdt_subnode_offset(fdto, tree_node,
+						fixup_child_name);
+		if (tree_child == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_BADOVERLAY;
+		if (tree_child < 0)
+			return tree_child;
+
+		ret = overlay_update_local_node_references(fdto,
+							   tree_child,
+							   fixup_child,
+							   delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_update_local_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_references() update all the phandles pointing
+ * to a node within the device tree overlay by adding a constant
+ * delta to not conflict with the base overlay.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_references(void *fdto, uint32_t delta)
+{
+	int fixups;
+
+	fixups = fdt_path_offset(fdto, "/__local_fixups__");
+	if (fixups < 0) {
+		/* There's no local phandles to adjust, bail out */
+		if (fixups == -FDT_ERR_NOTFOUND)
+			return 0;
+
+		return fixups;
+	}
+
+	/*
+	 * Update our local references from the root of the tree
+	 */
+	return overlay_update_local_node_references(fdto, 0, fixups,
+						    delta);
+}
+
+/**
+ * overlay_fixup_one_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @path: Path to a node holding a phandle in the overlay
+ * @path_len: number of path characters to consider
+ * @name: Name of the property holding the phandle reference in the overlay
+ * @name_len: number of name characters to consider
+ * @poffset: Offset within the overlay property where the phandle is stored
+ * @label: Label of the node referenced by the phandle
+ *
+ * overlay_fixup_one_phandle() resolves an overlay phandle pointing to
+ * a node in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_one_phandle(void *fdt, void *fdto,
+				     int symbols_off,
+				     const char *path, uint32_t path_len,
+				     const char *name, uint32_t name_len,
+				     int poffset, const char *label)
+{
+	const char *symbol_path;
+	uint32_t phandle;
+	fdt32_t phandle_prop;
+	int symbol_off, fixup_off;
+	int prop_len;
+
+	if (symbols_off < 0)
+		return symbols_off;
+
+	symbol_path = fdt_getprop(fdt, symbols_off, label,
+				  &prop_len);
+	if (!symbol_path)
+		return prop_len;
+
+	symbol_off = fdt_path_offset(fdt, symbol_path);
+	if (symbol_off < 0)
+		return symbol_off;
+
+	phandle = fdt_get_phandle(fdt, symbol_off);
+	if (!phandle)
+		return -FDT_ERR_NOTFOUND;
+
+	fixup_off = fdt_path_offset_namelen(fdto, path, path_len);
+	if (fixup_off == -FDT_ERR_NOTFOUND)
+		return -FDT_ERR_BADOVERLAY;
+	if (fixup_off < 0)
+		return fixup_off;
+
+	phandle_prop = cpu_to_fdt32(phandle);
+	return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
+						   name, name_len, poffset,
+						   &phandle_prop,
+						   sizeof(phandle_prop));
+};
+
+/**
+ * overlay_fixup_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @property: Property offset in the overlay holding the list of fixups
+ *
+ * overlay_fixup_phandle() resolves all the overlay phandles pointed
+ * to in a __fixups__ property, and updates them to match the phandles
+ * in use in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,
+				 int property)
+{
+	const char *value;
+	const char *label;
+	int len;
+
+	value = fdt_getprop_by_offset(fdto, property,
+				      &label, &len);
+	if (!value) {
+		if (len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+
+		return len;
+	}
+
+	do {
+		const char *path, *name, *fixup_end;
+		const char *fixup_str = value;
+		uint32_t path_len, name_len;
+		uint32_t fixup_len;
+		char *sep, *endptr;
+		int poffset, ret;
+
+		fixup_end = memchr(value, '\0', len);
+		if (!fixup_end)
+			return -FDT_ERR_BADOVERLAY;
+		fixup_len = fixup_end - fixup_str;
+
+		len -= fixup_len + 1;
+		value += fixup_len + 1;
+
+		path = fixup_str;
+		sep = memchr(fixup_str, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		path_len = sep - path;
+		if (path_len == (fixup_len - 1))
+			return -FDT_ERR_BADOVERLAY;
+
+		fixup_len -= path_len + 1;
+		name = sep + 1;
+		sep = memchr(name, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		name_len = sep - name;
+		if (!name_len)
+			return -FDT_ERR_BADOVERLAY;
+
+		poffset = strtoul(sep + 1, &endptr, 10);
+		if ((*endptr != '\0') || (endptr <= (sep + 1)))
+			return -FDT_ERR_BADOVERLAY;
+
+		ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off,
+						path, path_len, name, name_len,
+						poffset, label);
+		if (ret)
+			return ret;
+	} while (len > 0);
+
+	return 0;
+}
+
+/**
+ * overlay_fixup_phandles - Resolve the overlay phandles to the base
+ *                          device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_fixup_phandles() resolves all the overlay phandles pointing
+ * to nodes in the base device tree.
+ *
+ * This is one of the steps of the device tree overlay application
+ * process, when you want all the phandles in the overlay to point to
+ * the actual base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandles(void *fdt, void *fdto)
+{
+	int fixups_off, symbols_off;
+	int property;
+
+	/* We can have overlays without any fixups */
+	fixups_off = fdt_path_offset(fdto, "/__fixups__");
+	if (fixups_off == -FDT_ERR_NOTFOUND)
+		return 0; /* nothing to do */
+	if (fixups_off < 0)
+		return fixups_off;
+
+	/* And base DTs without symbols */
+	symbols_off = fdt_path_offset(fdt, "/__symbols__");
+	if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
+		return symbols_off;
+
+	fdt_for_each_property_offset(property, fdto, fixups_off) {
+		int ret;
+
+		ret = overlay_fixup_phandle(fdt, fdto, symbols_off, property);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_apply_node - Merges a node into the base device tree
+ * @fdt: Base Device Tree blob
+ * @target: Node offset in the base device tree to apply the fragment to
+ * @fdto: Device tree overlay blob
+ * @node: Node offset in the overlay holding the changes to merge
+ *
+ * overlay_apply_node() merges a node into a target base device tree
+ * node pointed.
+ *
+ * This is part of the final step in the device tree overlay
+ * application process, when all the phandles have been adjusted and
+ * resolved and you just have to merge overlay into the base device
+ * tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_apply_node(void *fdt, int target,
+			      void *fdto, int node)
+{
+	int property;
+	int subnode;
+
+	fdt_for_each_property_offset(property, fdto, node) {
+		const char *name;
+		const void *prop;
+		int prop_len;
+		int ret;
+
+		prop = fdt_getprop_by_offset(fdto, property, &name,
+					     &prop_len);
+		if (prop_len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+		if (prop_len < 0)
+			return prop_len;
+
+		ret = fdt_setprop(fdt, target, name, prop, prop_len);
+		if (ret)
+			return ret;
+	}
+
+	fdt_for_each_subnode(subnode, fdto, node) {
+		const char *name = fdt_get_name(fdto, subnode, NULL);
+		int nnode;
+		int ret;
+
+		nnode = fdt_add_subnode(fdt, target, name);
+		if (nnode == -FDT_ERR_EXISTS) {
+			nnode = fdt_subnode_offset(fdt, target, name);
+			if (nnode == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_INTERNAL;
+		}
+
+		if (nnode < 0)
+			return nnode;
+
+		ret = overlay_apply_node(fdt, nnode, fdto, subnode);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_merge - Merge an overlay into its base device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_merge() merges an overlay into its base device tree.
+ *
+ * This is the next to last step in the device tree overlay application
+ * process, when all the phandles have been adjusted and resolved and
+ * you just have to merge overlay into the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_merge(void *fdt, void *fdto)
+{
+	int fragment;
+
+	fdt_for_each_subnode(fragment, fdto, 0) {
+		int overlay;
+		int target;
+		int ret;
+
+		/*
+		 * Each fragments will have an __overlay__ node. If
+		 * they don't, it's not supposed to be merged
+		 */
+		overlay = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (overlay == -FDT_ERR_NOTFOUND)
+			continue;
+
+		if (overlay < 0)
+			return overlay;
+
+		target = overlay_get_target(fdt, fdto, fragment, NULL);
+		if (target < 0)
+			return target;
+
+		ret = overlay_apply_node(fdt, target, fdto, overlay);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int get_path_len(const void *fdt, int nodeoffset)
+{
+	int len = 0, namelen;
+	const char *name;
+
+	FDT_RO_PROBE(fdt);
+
+	for (;;) {
+		name = fdt_get_name(fdt, nodeoffset, &namelen);
+		if (!name)
+			return namelen;
+
+		/* root? we're done */
+		if (namelen == 0)
+			break;
+
+		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
+		if (nodeoffset < 0)
+			return nodeoffset;
+		len += namelen + 1;
+	}
+
+	/* in case of root pretend it's "/" */
+	if (len == 0)
+		len++;
+	return len;
+}
+
+/**
+ * overlay_symbol_update - Update the symbols of base tree after a merge
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_symbol_update() updates the symbols of the base tree with the
+ * symbols of the applied overlay
+ *
+ * This is the last step in the device tree overlay application
+ * process, allowing the reference of overlay symbols by subsequent
+ * overlay operations.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_symbol_update(void *fdt, void *fdto)
+{
+	int root_sym, ov_sym, prop, path_len, fragment, target;
+	int len, frag_name_len, ret, rel_path_len;
+	const char *s, *e;
+	const char *path;
+	const char *name;
+	const char *frag_name;
+	const char *rel_path;
+	const char *target_path;
+	char *buf;
+	void *p;
+
+	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
+
+	/* if no overlay symbols exist no problem */
+	if (ov_sym < 0)
+		return 0;
+
+	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
+
+	/* it no root symbols exist we should create them */
+	if (root_sym == -FDT_ERR_NOTFOUND)
+		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
+
+	/* any error is fatal now */
+	if (root_sym < 0)
+		return root_sym;
+
+	/* iterate over each overlay symbol */
+	fdt_for_each_property_offset(prop, fdto, ov_sym) {
+		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
+		if (!path)
+			return path_len;
+
+		/* verify it's a string property (terminated by a single \0) */
+		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
+			return -FDT_ERR_BADVALUE;
+
+		/* keep end marker to avoid strlen() */
+		e = path + path_len;
+
+		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
+
+		if (*path != '/')
+			return -FDT_ERR_BADVALUE;
+
+		/* get fragment name first */
+		s = strchr(path + 1, '/');
+		if (!s)
+			return -FDT_ERR_BADOVERLAY;
+
+		frag_name = path + 1;
+		frag_name_len = s - path - 1;
+
+		/* verify format; safe since "s" lies in \0 terminated prop */
+		len = sizeof("/__overlay__/") - 1;
+		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
+			return -FDT_ERR_BADOVERLAY;
+
+		rel_path = s + len;
+		rel_path_len = e - rel_path;
+
+		/* find the fragment index in which the symbol lies */
+		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
+					       frag_name_len);
+		/* not found? */
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+		fragment = ret;
+
+		/* an __overlay__ subnode must exist */
+		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+
+		/* get the target of the fragment */
+		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+		if (ret < 0)
+			return ret;
+		target = ret;
+
+		/* if we have a target path use */
+		if (!target_path) {
+			ret = get_path_len(fdt, target);
+			if (ret < 0)
+				return ret;
+			len = ret;
+		} else {
+			len = strlen(target_path);
+		}
+
+		ret = fdt_setprop_placeholder(fdt, root_sym, name,
+				len + (len > 1) + rel_path_len + 1, &p);
+		if (ret < 0)
+			return ret;
+
+		if (!target_path) {
+			/* again in case setprop_placeholder changed it */
+			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+			if (ret < 0)
+				return ret;
+			target = ret;
+		}
+
+		buf = p;
+		if (len > 1) { /* target is not root */
+			if (!target_path) {
+				ret = fdt_get_path(fdt, target, buf, len + 1);
+				if (ret < 0)
+					return ret;
+			} else
+				memcpy(buf, target_path, len + 1);
+
+		} else
+			len--;
+
+		buf[len] = '/';
+		memcpy(buf + len + 1, rel_path, rel_path_len);
+		buf[len + 1 + rel_path_len] = '\0';
+	}
+
+	return 0;
+}
+
+int fdt_overlay_apply(void *fdt, void *fdto)
+{
+	uint32_t delta = fdt_get_max_phandle(fdt);
+	int ret;
+
+	FDT_RO_PROBE(fdt);
+	FDT_RO_PROBE(fdto);
+
+	ret = overlay_adjust_local_phandles(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_update_local_references(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_fixup_phandles(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_merge(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_symbol_update(fdt, fdto);
+	if (ret)
+		goto err;
+
+	/*
+	 * The overlay has been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	return 0;
+
+err:
+	/*
+	 * The overlay might have been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	/*
+	 * The base device tree might have been damaged, erase its
+	 * magic.
+	 */
+	fdt_set_magic(fdt, ~0);
+
+	return ret;
+}
diff --git a/platform/common/libfdt/fdt_ro.c b/platform/common/libfdt/fdt_ro.c
new file mode 100644
index 00000000000..eafc1428289
--- /dev/null
+++ b/platform/common/libfdt/fdt_ro.c
@@ -0,0 +1,922 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int fdt_nodename_eq_(const void *fdt, int offset,
+			    const char *s, int len)
+{
+	int olen;
+	const char *p = fdt_get_name(fdt, offset, &olen);
+
+	if (!p || olen < len)
+		/* short match */
+		return 0;
+
+	if (memcmp(p, s, len) != 0)
+		return 0;
+
+	if (p[len] == '\0')
+		return 1;
+	else if (!memchr(s, '@', len) && (p[len] == '@'))
+		return 1;
+	else
+		return 0;
+}
+
+const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
+{
+	uint32_t absoffset = stroffset + fdt_off_dt_strings(fdt);
+	size_t len;
+	int err;
+	const char *s, *n;
+
+	err = fdt_ro_probe_(fdt);
+	if (err != 0)
+		goto fail;
+
+	err = -FDT_ERR_BADOFFSET;
+	if (absoffset >= fdt_totalsize(fdt))
+		goto fail;
+	len = fdt_totalsize(fdt) - absoffset;
+
+	if (fdt_magic(fdt) == FDT_MAGIC) {
+		if (stroffset < 0)
+			goto fail;
+		if (fdt_version(fdt) >= 17) {
+			if (stroffset >= fdt_size_dt_strings(fdt))
+				goto fail;
+			if ((fdt_size_dt_strings(fdt) - stroffset) < len)
+				len = fdt_size_dt_strings(fdt) - stroffset;
+		}
+	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
+		if ((stroffset >= 0)
+		    || (stroffset < -fdt_size_dt_strings(fdt)))
+			goto fail;
+		if ((-stroffset) < len)
+			len = -stroffset;
+	} else {
+		err = -FDT_ERR_INTERNAL;
+		goto fail;
+	}
+
+	s = (const char *)fdt + absoffset;
+	n = memchr(s, '\0', len);
+	if (!n) {
+		/* missing terminating NULL */
+		err = -FDT_ERR_TRUNCATED;
+		goto fail;
+	}
+
+	if (lenp)
+		*lenp = n - s;
+	return s;
+
+fail:
+	if (lenp)
+		*lenp = err;
+	return NULL;
+}
+
+const char *fdt_string(const void *fdt, int stroffset)
+{
+	return fdt_get_string(fdt, stroffset, NULL);
+}
+
+static int fdt_string_eq_(const void *fdt, int stroffset,
+			  const char *s, int len)
+{
+	int slen;
+	const char *p = fdt_get_string(fdt, stroffset, &slen);
+
+	return p && (slen == len) && (memcmp(p, s, len) == 0);
+}
+
+uint32_t fdt_get_max_phandle(const void *fdt)
+{
+	uint32_t max_phandle = 0;
+	int offset;
+
+	for (offset = fdt_next_node(fdt, -1, NULL);;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		uint32_t phandle;
+
+		if (offset == -FDT_ERR_NOTFOUND)
+			return max_phandle;
+
+		if (offset < 0)
+			return (uint32_t)-1;
+
+		phandle = fdt_get_phandle(fdt, offset);
+		if (phandle == (uint32_t)-1)
+			continue;
+
+		if (phandle > max_phandle)
+			max_phandle = phandle;
+	}
+
+	return 0;
+}
+
+static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n)
+{
+	int offset = n * sizeof(struct fdt_reserve_entry);
+	int absoffset = fdt_off_mem_rsvmap(fdt) + offset;
+
+	if (absoffset < fdt_off_mem_rsvmap(fdt))
+		return NULL;
+	if (absoffset > fdt_totalsize(fdt) - sizeof(struct fdt_reserve_entry))
+		return NULL;
+	return fdt_mem_rsv_(fdt, n);
+}
+
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
+{
+	const struct fdt_reserve_entry *re;
+
+	FDT_RO_PROBE(fdt);
+	re = fdt_mem_rsv(fdt, n);
+	if (!re)
+		return -FDT_ERR_BADOFFSET;
+
+	*address = fdt64_ld(&re->address);
+	*size = fdt64_ld(&re->size);
+	return 0;
+}
+
+int fdt_num_mem_rsv(const void *fdt)
+{
+	int i;
+	const struct fdt_reserve_entry *re;
+
+	for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) {
+		if (fdt64_ld(&re->size) == 0)
+			return i;
+	}
+	return -FDT_ERR_TRUNCATED;
+}
+
+static int nextprop_(const void *fdt, int offset)
+{
+	uint32_t tag;
+	int nextoffset;
+
+	do {
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_END:
+			if (nextoffset >= 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			else
+				return nextoffset;
+
+		case FDT_PROP:
+			return offset;
+		}
+		offset = nextoffset;
+	} while (tag == FDT_NOP);
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+int fdt_subnode_offset_namelen(const void *fdt, int offset,
+			       const char *name, int namelen)
+{
+	int depth;
+
+	FDT_RO_PROBE(fdt);
+
+	for (depth = 0;
+	     (offset >= 0) && (depth >= 0);
+	     offset = fdt_next_node(fdt, offset, &depth))
+		if ((depth == 1)
+		    && fdt_nodename_eq_(fdt, offset, name, namelen))
+			return offset;
+
+	if (depth < 0)
+		return -FDT_ERR_NOTFOUND;
+	return offset; /* error */
+}
+
+int fdt_subnode_offset(const void *fdt, int parentoffset,
+		       const char *name)
+{
+	return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen)
+{
+	const char *end = path + namelen;
+	const char *p = path;
+	int offset = 0;
+
+	FDT_RO_PROBE(fdt);
+
+	/* see if we have an alias */
+	if (*path != '/') {
+		const char *q = memchr(path, '/', end - p);
+
+		if (!q)
+			q = end;
+
+		p = fdt_get_alias_namelen(fdt, p, q - p);
+		if (!p)
+			return -FDT_ERR_BADPATH;
+		offset = fdt_path_offset(fdt, p);
+
+		p = q;
+	}
+
+	while (p < end) {
+		const char *q;
+
+		while (*p == '/') {
+			p++;
+			if (p == end)
+				return offset;
+		}
+		q = memchr(p, '/', end - p);
+		if (! q)
+			q = end;
+
+		offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p);
+		if (offset < 0)
+			return offset;
+
+		p = q;
+	}
+
+	return offset;
+}
+
+int fdt_path_offset(const void *fdt, const char *path)
+{
+	return fdt_path_offset_namelen(fdt, path, strlen(path));
+}
+
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
+{
+	const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset);
+	const char *nameptr;
+	int err;
+
+	if (((err = fdt_ro_probe_(fdt)) != 0)
+	    || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))
+			goto fail;
+
+	nameptr = nh->name;
+
+	if (fdt_version(fdt) < 0x10) {
+		/*
+		 * For old FDT versions, match the naming conventions of V16:
+		 * give only the leaf name (after all /). The actual tree
+		 * contents are loosely checked.
+		 */
+		const char *leaf;
+		leaf = strrchr(nameptr, '/');
+		if (leaf == NULL) {
+			err = -FDT_ERR_BADSTRUCTURE;
+			goto fail;
+		}
+		nameptr = leaf+1;
+	}
+
+	if (len)
+		*len = strlen(nameptr);
+
+	return nameptr;
+
+ fail:
+	if (len)
+		*len = err;
+	return NULL;
+}
+
+int fdt_first_property_offset(const void *fdt, int nodeoffset)
+{
+	int offset;
+
+	if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0)
+		return offset;
+
+	return nextprop_(fdt, offset);
+}
+
+int fdt_next_property_offset(const void *fdt, int offset)
+{
+	if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0)
+		return offset;
+
+	return nextprop_(fdt, offset);
+}
+
+static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt,
+						              int offset,
+						              int *lenp)
+{
+	int err;
+	const struct fdt_property *prop;
+
+	if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) {
+		if (lenp)
+			*lenp = err;
+		return NULL;
+	}
+
+	prop = fdt_offset_ptr_(fdt, offset);
+
+	if (lenp)
+		*lenp = fdt32_ld(&prop->len);
+
+	return prop;
+}
+
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp)
+{
+	/* Prior to version 16, properties may need realignment
+	 * and this API does not work. fdt_getprop_*() will, however. */
+
+	if (fdt_version(fdt) < 0x10) {
+		if (lenp)
+			*lenp = -FDT_ERR_BADVERSION;
+		return NULL;
+	}
+
+	return fdt_get_property_by_offset_(fdt, offset, lenp);
+}
+
+static const struct fdt_property *fdt_get_property_namelen_(const void *fdt,
+						            int offset,
+						            const char *name,
+						            int namelen,
+							    int *lenp,
+							    int *poffset)
+{
+	for (offset = fdt_first_property_offset(fdt, offset);
+	     (offset >= 0);
+	     (offset = fdt_next_property_offset(fdt, offset))) {
+		const struct fdt_property *prop;
+
+		if (!(prop = fdt_get_property_by_offset_(fdt, offset, lenp))) {
+			offset = -FDT_ERR_INTERNAL;
+			break;
+		}
+		if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff),
+				   name, namelen)) {
+			if (poffset)
+				*poffset = offset;
+			return prop;
+		}
+	}
+
+	if (lenp)
+		*lenp = offset;
+	return NULL;
+}
+
+
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int offset,
+						    const char *name,
+						    int namelen, int *lenp)
+{
+	/* Prior to version 16, properties may need realignment
+	 * and this API does not work. fdt_getprop_*() will, however. */
+	if (fdt_version(fdt) < 0x10) {
+		if (lenp)
+			*lenp = -FDT_ERR_BADVERSION;
+		return NULL;
+	}
+
+	return fdt_get_property_namelen_(fdt, offset, name, namelen, lenp,
+					 NULL);
+}
+
+
+const struct fdt_property *fdt_get_property(const void *fdt,
+					    int nodeoffset,
+					    const char *name, int *lenp)
+{
+	return fdt_get_property_namelen(fdt, nodeoffset, name,
+					strlen(name), lenp);
+}
+
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp)
+{
+	int poffset;
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_namelen_(fdt, nodeoffset, name, namelen, lenp,
+					 &poffset);
+	if (!prop)
+		return NULL;
+
+	/* Handle realignment */
+	if (fdt_version(fdt) < 0x10 && (poffset + sizeof(*prop)) % 8 &&
+	    fdt32_ld(&prop->len) >= 8)
+		return prop->data + 4;
+	return prop->data;
+}
+
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp)
+{
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_by_offset_(fdt, offset, lenp);
+	if (!prop)
+		return NULL;
+	if (namep) {
+		const char *name;
+		int namelen;
+		name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff),
+				      &namelen);
+		if (!name) {
+			if (lenp)
+				*lenp = namelen;
+			return NULL;
+		}
+		*namep = name;
+	}
+
+	/* Handle realignment */
+	if (fdt_version(fdt) < 0x10 && (offset + sizeof(*prop)) % 8 &&
+	    fdt32_ld(&prop->len) >= 8)
+		return prop->data + 4;
+	return prop->data;
+}
+
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp)
+{
+	return fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), lenp);
+}
+
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *php;
+	int len;
+
+	/* FIXME: This is a bit sub-optimal, since we potentially scan
+	 * over all the properties twice. */
+	php = fdt_getprop(fdt, nodeoffset, "phandle", &len);
+	if (!php || (len != sizeof(*php))) {
+		php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
+		if (!php || (len != sizeof(*php)))
+			return 0;
+	}
+
+	return fdt32_ld(php);
+}
+
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen)
+{
+	int aliasoffset;
+
+	aliasoffset = fdt_path_offset(fdt, "/aliases");
+	if (aliasoffset < 0)
+		return NULL;
+
+	return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+	return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
+{
+	int pdepth = 0, p = 0;
+	int offset, depth, namelen;
+	const char *name;
+
+	FDT_RO_PROBE(fdt);
+
+	if (buflen < 2)
+		return -FDT_ERR_NOSPACE;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		while (pdepth > depth) {
+			do {
+				p--;
+			} while (buf[p-1] != '/');
+			pdepth--;
+		}
+
+		if (pdepth >= depth) {
+			name = fdt_get_name(fdt, offset, &namelen);
+			if (!name)
+				return namelen;
+			if ((p + namelen + 1) <= buflen) {
+				memcpy(buf + p, name, namelen);
+				p += namelen;
+				buf[p++] = '/';
+				pdepth++;
+			}
+		}
+
+		if (offset == nodeoffset) {
+			if (pdepth < (depth + 1))
+				return -FDT_ERR_NOSPACE;
+
+			if (p > 1) /* special case so that root path is "/", not "" */
+				p--;
+			buf[p] = '\0';
+			return 0;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth)
+{
+	int offset, depth;
+	int supernodeoffset = -FDT_ERR_INTERNAL;
+
+	FDT_RO_PROBE(fdt);
+
+	if (supernodedepth < 0)
+		return -FDT_ERR_NOTFOUND;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		if (depth == supernodedepth)
+			supernodeoffset = offset;
+
+		if (offset == nodeoffset) {
+			if (nodedepth)
+				*nodedepth = depth;
+
+			if (supernodedepth > depth)
+				return -FDT_ERR_NOTFOUND;
+			else
+				return supernodeoffset;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_depth(const void *fdt, int nodeoffset)
+{
+	int nodedepth;
+	int err;
+
+	err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth);
+	if (err)
+		return (err < 0) ? err : -FDT_ERR_INTERNAL;
+	return nodedepth;
+}
+
+int fdt_parent_offset(const void *fdt, int nodeoffset)
+{
+	int nodedepth = fdt_node_depth(fdt, nodeoffset);
+
+	if (nodedepth < 0)
+		return nodedepth;
+	return fdt_supernode_atdepth_offset(fdt, nodeoffset,
+					    nodedepth - 1, NULL);
+}
+
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen)
+{
+	int offset;
+	const void *val;
+	int len;
+
+	FDT_RO_PROBE(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_getprop(), then if that didn't
+	 * find what we want, we scan over them again making our way
+	 * to the next node.  Still it's the easiest to implement
+	 * approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		val = fdt_getprop(fdt, offset, propname, &len);
+		if (val && (len == proplen)
+		    && (memcmp(val, propval, len) == 0))
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
+{
+	int offset;
+
+	if ((phandle == 0) || (phandle == -1))
+		return -FDT_ERR_BADPHANDLE;
+
+	FDT_RO_PROBE(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we
+	 * potentially scan each property of a node in
+	 * fdt_get_phandle(), then if that didn't find what
+	 * we want, we scan over them again making our way to the next
+	 * node.  Still it's the easiest to implement approach;
+	 * performance can come later. */
+	for (offset = fdt_next_node(fdt, -1, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		if (fdt_get_phandle(fdt, offset) == phandle)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
+{
+	int len = strlen(str);
+	const char *p;
+
+	while (listlen >= len) {
+		if (memcmp(str, strlist, len+1) == 0)
+			return 1;
+		p = memchr(strlist, '\0', listlen);
+		if (!p)
+			return 0; /* malformed strlist.. */
+		listlen -= (p-strlist) + 1;
+		strlist = p + 1;
+	}
+	return 0;
+}
+
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property)
+{
+	const char *list, *end;
+	int length, count = 0;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		list += length;
+		count++;
+	}
+
+	return count;
+}
+
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string)
+{
+	int length, len, idx = 0;
+	const char *list, *end;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	len = strlen(string) + 1;
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		if (length == len && memcmp(list, string, length) == 0)
+			return idx;
+
+		list += length;
+		idx++;
+	}
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int idx,
+			       int *lenp)
+{
+	const char *list, *end;
+	int length;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list) {
+		if (lenp)
+			*lenp = length;
+
+		return NULL;
+	}
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end) {
+			if (lenp)
+				*lenp = -FDT_ERR_BADVALUE;
+
+			return NULL;
+		}
+
+		if (idx == 0) {
+			if (lenp)
+				*lenp = length - 1;
+
+			return list;
+		}
+
+		list += length;
+		idx--;
+	}
+
+	if (lenp)
+		*lenp = -FDT_ERR_NOTFOUND;
+
+	return NULL;
+}
+
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible)
+{
+	const void *prop;
+	int len;
+
+	prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
+	if (!prop)
+		return len;
+
+	return !fdt_stringlist_contains(prop, len, compatible);
+}
+
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible)
+{
+	int offset, err;
+
+	FDT_RO_PROBE(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_node_check_compatible(), then if
+	 * that didn't find what we want, we scan over them again
+	 * making our way to the next node.  Still it's the easiest to
+	 * implement approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		err = fdt_node_check_compatible(fdt, offset, compatible);
+		if ((err < 0) && (err != -FDT_ERR_NOTFOUND))
+			return err;
+		else if (err == 0)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_check_full(const void *fdt, size_t bufsize)
+{
+	int err;
+	int num_memrsv;
+	int offset, nextoffset = 0;
+	uint32_t tag;
+	unsigned depth = 0;
+	const void *prop;
+	const char *propname;
+
+	if (bufsize < FDT_V1_SIZE)
+		return -FDT_ERR_TRUNCATED;
+	err = fdt_check_header(fdt);
+	if (err != 0)
+		return err;
+	if (bufsize < fdt_totalsize(fdt))
+		return -FDT_ERR_TRUNCATED;
+
+	num_memrsv = fdt_num_mem_rsv(fdt);
+	if (num_memrsv < 0)
+		return num_memrsv;
+
+	while (1) {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		if (nextoffset < 0)
+			return nextoffset;
+
+		switch (tag) {
+		case FDT_NOP:
+			break;
+
+		case FDT_END:
+			if (depth != 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			return 0;
+
+		case FDT_BEGIN_NODE:
+			depth++;
+			if (depth > INT_MAX)
+				return -FDT_ERR_BADSTRUCTURE;
+			break;
+
+		case FDT_END_NODE:
+			if (depth == 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			depth--;
+			break;
+
+		case FDT_PROP:
+			prop = fdt_getprop_by_offset(fdt, offset, &propname,
+						     &err);
+			if (!prop)
+				return err;
+			break;
+
+		default:
+			return -FDT_ERR_INTERNAL;
+		}
+	}
+}
diff --git a/platform/common/libfdt/fdt_rw.c b/platform/common/libfdt/fdt_rw.c
new file mode 100644
index 00000000000..2e49855d7cf
--- /dev/null
+++ b/platform/common/libfdt/fdt_rw.c
@@ -0,0 +1,505 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int fdt_blocks_misordered_(const void *fdt,
+				  int mem_rsv_size, int struct_size)
+{
+	return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
+		|| (fdt_off_dt_struct(fdt) <
+		    (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
+		|| (fdt_off_dt_strings(fdt) <
+		    (fdt_off_dt_struct(fdt) + struct_size))
+		|| (fdt_totalsize(fdt) <
+		    (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
+}
+
+static int fdt_rw_probe_(void *fdt)
+{
+	FDT_RO_PROBE(fdt);
+
+	if (fdt_version(fdt) < 17)
+		return -FDT_ERR_BADVERSION;
+	if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry),
+				   fdt_size_dt_struct(fdt)))
+		return -FDT_ERR_BADLAYOUT;
+	if (fdt_version(fdt) > 17)
+		fdt_set_version(fdt, 17);
+
+	return 0;
+}
+
+#define FDT_RW_PROBE(fdt) \
+	{ \
+		int err_; \
+		if ((err_ = fdt_rw_probe_(fdt)) != 0) \
+			return err_; \
+	}
+
+static inline int fdt_data_size_(void *fdt)
+{
+	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+}
+
+static int fdt_splice_(void *fdt, void *splicepoint, int oldlen, int newlen)
+{
+	char *p = splicepoint;
+	char *end = (char *)fdt + fdt_data_size_(fdt);
+
+	if (((p + oldlen) < p) || ((p + oldlen) > end))
+		return -FDT_ERR_BADOFFSET;
+	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
+		return -FDT_ERR_BADOFFSET;
+	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
+		return -FDT_ERR_NOSPACE;
+	memmove(p + newlen, p + oldlen, end - p - oldlen);
+	return 0;
+}
+
+static int fdt_splice_mem_rsv_(void *fdt, struct fdt_reserve_entry *p,
+			       int oldn, int newn)
+{
+	int delta = (newn - oldn) * sizeof(*p);
+	int err;
+	err = fdt_splice_(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
+	if (err)
+		return err;
+	fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int fdt_splice_struct_(void *fdt, void *p,
+			      int oldlen, int newlen)
+{
+	int delta = newlen - oldlen;
+	int err;
+
+	if ((err = fdt_splice_(fdt, p, oldlen, newlen)))
+		return err;
+
+	fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int fdt_splice_string_(void *fdt, int newlen)
+{
+	void *p = (char *)fdt
+		+ fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+	int err;
+
+	if ((err = fdt_splice_(fdt, p, 0, newlen)))
+		return err;
+
+	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
+	return 0;
+}
+
+static int fdt_find_add_string_(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
+	const char *p;
+	char *new;
+	int len = strlen(s) + 1;
+	int err;
+
+	p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s);
+	if (p)
+		/* found it */
+		return (p - strtab);
+
+	new = strtab + fdt_size_dt_strings(fdt);
+	err = fdt_splice_string_(fdt, len);
+	if (err)
+		return err;
+
+	memcpy(new, s, len);
+	return (new - strtab);
+}
+
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int err;
+
+	FDT_RW_PROBE(fdt);
+
+	re = fdt_mem_rsv_w_(fdt, fdt_num_mem_rsv(fdt));
+	err = fdt_splice_mem_rsv_(fdt, re, 0, 1);
+	if (err)
+		return err;
+
+	re->address = cpu_to_fdt64(address);
+	re->size = cpu_to_fdt64(size);
+	return 0;
+}
+
+int fdt_del_mem_rsv(void *fdt, int n)
+{
+	struct fdt_reserve_entry *re = fdt_mem_rsv_w_(fdt, n);
+
+	FDT_RW_PROBE(fdt);
+
+	if (n >= fdt_num_mem_rsv(fdt))
+		return -FDT_ERR_NOTFOUND;
+
+	return fdt_splice_mem_rsv_(fdt, re, 1, 0);
+}
+
+static int fdt_resize_property_(void *fdt, int nodeoffset, const char *name,
+				int len, struct fdt_property **prop)
+{
+	int oldlen;
+	int err;
+
+	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (!*prop)
+		return oldlen;
+
+	if ((err = fdt_splice_struct_(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
+				      FDT_TAGALIGN(len))))
+		return err;
+
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+static int fdt_add_property_(void *fdt, int nodeoffset, const char *name,
+			     int len, struct fdt_property **prop)
+{
+	int proplen;
+	int nextoffset;
+	int namestroff;
+	int err;
+
+	if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0)
+		return nextoffset;
+
+	namestroff = fdt_find_add_string_(fdt, name);
+	if (namestroff < 0)
+		return namestroff;
+
+	*prop = fdt_offset_ptr_w_(fdt, nextoffset);
+	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
+
+	err = fdt_splice_struct_(fdt, *prop, 0, proplen);
+	if (err)
+		return err;
+
+	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
+	(*prop)->nameoff = cpu_to_fdt32(namestroff);
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+int fdt_set_name(void *fdt, int nodeoffset, const char *name)
+{
+	char *namep;
+	int oldlen, newlen;
+	int err;
+
+	FDT_RW_PROBE(fdt);
+
+	namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
+	if (!namep)
+		return oldlen;
+
+	newlen = strlen(name);
+
+	err = fdt_splice_struct_(fdt, namep, FDT_TAGALIGN(oldlen+1),
+				 FDT_TAGALIGN(newlen+1));
+	if (err)
+		return err;
+
+	memcpy(namep, name, newlen+1);
+	return 0;
+}
+
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data)
+{
+	struct fdt_property *prop;
+	int err;
+
+	FDT_RW_PROBE(fdt);
+
+	err = fdt_resize_property_(fdt, nodeoffset, name, len, &prop);
+	if (err == -FDT_ERR_NOTFOUND)
+		err = fdt_add_property_(fdt, nodeoffset, name, len, &prop);
+	if (err)
+		return err;
+
+	*prop_data = prop->data;
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	void *prop_data;
+	int err;
+
+	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
+	if (err)
+		return err;
+
+	if (len)
+		memcpy(prop_data, val, len);
+	return 0;
+}
+
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len)
+{
+	struct fdt_property *prop;
+	int err, oldlen, newlen;
+
+	FDT_RW_PROBE(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (prop) {
+		newlen = len + oldlen;
+		err = fdt_splice_struct_(fdt, prop->data,
+					 FDT_TAGALIGN(oldlen),
+					 FDT_TAGALIGN(newlen));
+		if (err)
+			return err;
+		prop->len = cpu_to_fdt32(newlen);
+		memcpy(prop->data + oldlen, val, len);
+	} else {
+		err = fdt_add_property_(fdt, nodeoffset, name, len, &prop);
+		if (err)
+			return err;
+		memcpy(prop->data, val, len);
+	}
+	return 0;
+}
+
+int fdt_delprop(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len, proplen;
+
+	FDT_RW_PROBE(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (!prop)
+		return len;
+
+	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
+	return fdt_splice_struct_(fdt, prop, proplen, 0);
+}
+
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen)
+{
+	struct fdt_node_header *nh;
+	int offset, nextoffset;
+	int nodelen;
+	int err;
+	uint32_t tag;
+	fdt32_t *endtag;
+
+	FDT_RW_PROBE(fdt);
+
+	offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
+	if (offset >= 0)
+		return -FDT_ERR_EXISTS;
+	else if (offset != -FDT_ERR_NOTFOUND)
+		return offset;
+
+	/* Try to place the new node after the parent's properties */
+	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+	} while ((tag == FDT_PROP) || (tag == FDT_NOP));
+
+	nh = fdt_offset_ptr_w_(fdt, offset);
+	nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
+
+	err = fdt_splice_struct_(fdt, nh, 0, nodelen);
+	if (err)
+		return err;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
+	memcpy(nh->name, name, namelen);
+	endtag = (fdt32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
+	*endtag = cpu_to_fdt32(FDT_END_NODE);
+
+	return offset;
+}
+
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
+{
+	return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_del_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	FDT_RW_PROBE(fdt);
+
+	endoffset = fdt_node_end_offset_(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	return fdt_splice_struct_(fdt, fdt_offset_ptr_w_(fdt, nodeoffset),
+				  endoffset - nodeoffset, 0);
+}
+
+static void fdt_packblocks_(const char *old, char *new,
+			    int mem_rsv_size, int struct_size)
+{
+	int mem_rsv_off, struct_off, strings_off;
+
+	mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
+	struct_off = mem_rsv_off + mem_rsv_size;
+	strings_off = struct_off + struct_size;
+
+	memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
+	fdt_set_off_mem_rsvmap(new, mem_rsv_off);
+
+	memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
+	fdt_set_off_dt_struct(new, struct_off);
+	fdt_set_size_dt_struct(new, struct_size);
+
+	memmove(new + strings_off, old + fdt_off_dt_strings(old),
+		fdt_size_dt_strings(old));
+	fdt_set_off_dt_strings(new, strings_off);
+	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
+}
+
+int fdt_open_into(const void *fdt, void *buf, int bufsize)
+{
+	int err;
+	int mem_rsv_size, struct_size;
+	int newsize;
+	const char *fdtstart = fdt;
+	const char *fdtend = fdtstart + fdt_totalsize(fdt);
+	char *tmp;
+
+	FDT_RO_PROBE(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+
+	if (fdt_version(fdt) >= 17) {
+		struct_size = fdt_size_dt_struct(fdt);
+	} else {
+		struct_size = 0;
+		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
+			;
+		if (struct_size < 0)
+			return struct_size;
+	}
+
+	if (!fdt_blocks_misordered_(fdt, mem_rsv_size, struct_size)) {
+		/* no further work necessary */
+		err = fdt_move(fdt, buf, bufsize);
+		if (err)
+			return err;
+		fdt_set_version(buf, 17);
+		fdt_set_size_dt_struct(buf, struct_size);
+		fdt_set_totalsize(buf, bufsize);
+		return 0;
+	}
+
+	/* Need to reorder */
+	newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
+		+ struct_size + fdt_size_dt_strings(fdt);
+
+	if (bufsize < newsize)
+		return -FDT_ERR_NOSPACE;
+
+	/* First attempt to build converted tree at beginning of buffer */
+	tmp = buf;
+	/* But if that overlaps with the old tree... */
+	if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
+		/* Try right after the old tree instead */
+		tmp = (char *)(uintptr_t)fdtend;
+		if ((tmp + newsize) > ((char *)buf + bufsize))
+			return -FDT_ERR_NOSPACE;
+	}
+
+	fdt_packblocks_(fdt, tmp, mem_rsv_size, struct_size);
+	memmove(buf, tmp, newsize);
+
+	fdt_set_magic(buf, FDT_MAGIC);
+	fdt_set_totalsize(buf, bufsize);
+	fdt_set_version(buf, 17);
+	fdt_set_last_comp_version(buf, 16);
+	fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
+
+	return 0;
+}
+
+int fdt_pack(void *fdt)
+{
+	int mem_rsv_size;
+
+	FDT_RW_PROBE(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+	fdt_packblocks_(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
+	fdt_set_totalsize(fdt, fdt_data_size_(fdt));
+
+	return 0;
+}
diff --git a/platform/common/libfdt/fdt_strerror.c b/platform/common/libfdt/fdt_strerror.c
new file mode 100644
index 00000000000..9677a1887e5
--- /dev/null
+++ b/platform/common/libfdt/fdt_strerror.c
@@ -0,0 +1,102 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+struct fdt_errtabent {
+	const char *str;
+};
+
+#define FDT_ERRTABENT(val) \
+	[(val)] = { .str = #val, }
+
+static struct fdt_errtabent fdt_errtable[] = {
+	FDT_ERRTABENT(FDT_ERR_NOTFOUND),
+	FDT_ERRTABENT(FDT_ERR_EXISTS),
+	FDT_ERRTABENT(FDT_ERR_NOSPACE),
+
+	FDT_ERRTABENT(FDT_ERR_BADOFFSET),
+	FDT_ERRTABENT(FDT_ERR_BADPATH),
+	FDT_ERRTABENT(FDT_ERR_BADPHANDLE),
+	FDT_ERRTABENT(FDT_ERR_BADSTATE),
+
+	FDT_ERRTABENT(FDT_ERR_TRUNCATED),
+	FDT_ERRTABENT(FDT_ERR_BADMAGIC),
+	FDT_ERRTABENT(FDT_ERR_BADVERSION),
+	FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
+	FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
+	FDT_ERRTABENT(FDT_ERR_INTERNAL),
+	FDT_ERRTABENT(FDT_ERR_BADNCELLS),
+	FDT_ERRTABENT(FDT_ERR_BADVALUE),
+	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
+	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
+};
+#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
+
+const char *fdt_strerror(int errval)
+{
+	if (errval > 0)
+		return "<valid offset/length>";
+	else if (errval == 0)
+		return "<no error>";
+	else if (errval > -FDT_ERRTABSIZE) {
+		const char *s = fdt_errtable[-errval].str;
+
+		if (s)
+			return s;
+	}
+
+	return "<unknown error>";
+}
diff --git a/platform/common/libfdt/fdt_sw.c b/platform/common/libfdt/fdt_sw.c
new file mode 100644
index 00000000000..9fa4a94d83c
--- /dev/null
+++ b/platform/common/libfdt/fdt_sw.c
@@ -0,0 +1,365 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int fdt_sw_probe_(void *fdt)
+{
+	if (fdt_magic(fdt) == FDT_MAGIC)
+		return -FDT_ERR_BADSTATE;
+	else if (fdt_magic(fdt) != FDT_SW_MAGIC)
+		return -FDT_ERR_BADMAGIC;
+	return 0;
+}
+
+#define FDT_SW_PROBE(fdt) \
+	{ \
+		int err; \
+		if ((err = fdt_sw_probe_(fdt)) != 0) \
+			return err; \
+	}
+
+/* 'memrsv' state:	Initial state after fdt_create()
+ *
+ * Allowed functions:
+ *	fdt_add_reservmap_entry()
+ *	fdt_finish_reservemap()		[moves to 'struct' state]
+ */
+static int fdt_sw_probe_memrsv_(void *fdt)
+{
+	int err = fdt_sw_probe_(fdt);
+	if (err)
+		return err;
+
+	if (fdt_off_dt_strings(fdt) != 0)
+		return -FDT_ERR_BADSTATE;
+	return 0;
+}
+
+#define FDT_SW_PROBE_MEMRSV(fdt) \
+	{ \
+		int err; \
+		if ((err = fdt_sw_probe_memrsv_(fdt)) != 0) \
+			return err; \
+	}
+
+/* 'struct' state:	Enter this state after fdt_finish_reservemap()
+ *
+ * Allowed functions:
+ *	fdt_begin_node()
+ *	fdt_end_node()
+ *	fdt_property*()
+ *	fdt_finish()			[moves to 'complete' state]
+ */
+static int fdt_sw_probe_struct_(void *fdt)
+{
+	int err = fdt_sw_probe_(fdt);
+	if (err)
+		return err;
+
+	if (fdt_off_dt_strings(fdt) != fdt_totalsize(fdt))
+		return -FDT_ERR_BADSTATE;
+	return 0;
+}
+
+#define FDT_SW_PROBE_STRUCT(fdt) \
+	{ \
+		int err; \
+		if ((err = fdt_sw_probe_struct_(fdt)) != 0) \
+			return err; \
+	}
+
+/* 'complete' state:	Enter this state after fdt_finish()
+ *
+ * Allowed functions: none
+ */
+
+static void *fdt_grab_space_(void *fdt, size_t len)
+{
+	int offset = fdt_size_dt_struct(fdt);
+	int spaceleft;
+
+	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
+		- fdt_size_dt_strings(fdt);
+
+	if ((offset + len < offset) || (offset + len > spaceleft))
+		return NULL;
+
+	fdt_set_size_dt_struct(fdt, offset + len);
+	return fdt_offset_ptr_w_(fdt, offset);
+}
+
+int fdt_create(void *buf, int bufsize)
+{
+	const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header),
+					 sizeof(struct fdt_reserve_entry));
+	void *fdt = buf;
+
+	if (bufsize < hdrsize)
+		return -FDT_ERR_NOSPACE;
+
+	memset(buf, 0, bufsize);
+
+	fdt_set_magic(fdt, FDT_SW_MAGIC);
+	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
+	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
+	fdt_set_totalsize(fdt,  bufsize);
+
+	fdt_set_off_mem_rsvmap(fdt, hdrsize);
+	fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
+	fdt_set_off_dt_strings(fdt, 0);
+
+	return 0;
+}
+
+int fdt_resize(void *fdt, void *buf, int bufsize)
+{
+	size_t headsize, tailsize;
+	char *oldtail, *newtail;
+
+	FDT_SW_PROBE(fdt);
+
+	headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	tailsize = fdt_size_dt_strings(fdt);
+
+	if ((headsize + tailsize) > fdt_totalsize(fdt))
+		return -FDT_ERR_INTERNAL;
+
+	if ((headsize + tailsize) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
+	newtail = (char *)buf + bufsize - tailsize;
+
+	/* Two cases to avoid clobbering data if the old and new
+	 * buffers partially overlap */
+	if (buf <= fdt) {
+		memmove(buf, fdt, headsize);
+		memmove(newtail, oldtail, tailsize);
+	} else {
+		memmove(newtail, oldtail, tailsize);
+		memmove(buf, fdt, headsize);
+	}
+
+	fdt_set_totalsize(buf, bufsize);
+	if (fdt_off_dt_strings(buf))
+		fdt_set_off_dt_strings(buf, bufsize);
+
+	return 0;
+}
+
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int offset;
+
+	FDT_SW_PROBE_MEMRSV(fdt);
+
+	offset = fdt_off_dt_struct(fdt);
+	if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
+		return -FDT_ERR_NOSPACE;
+
+	re = (struct fdt_reserve_entry *)((char *)fdt + offset);
+	re->address = cpu_to_fdt64(addr);
+	re->size = cpu_to_fdt64(size);
+
+	fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
+
+	return 0;
+}
+
+int fdt_finish_reservemap(void *fdt)
+{
+	int err = fdt_add_reservemap_entry(fdt, 0, 0);
+
+	if (err)
+		return err;
+
+	fdt_set_off_dt_strings(fdt, fdt_totalsize(fdt));
+	return 0;
+}
+
+int fdt_begin_node(void *fdt, const char *name)
+{
+	struct fdt_node_header *nh;
+	int namelen;
+
+	FDT_SW_PROBE_STRUCT(fdt);
+
+	namelen = strlen(name) + 1;
+	nh = fdt_grab_space_(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
+	if (! nh)
+		return -FDT_ERR_NOSPACE;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memcpy(nh->name, name, namelen);
+	return 0;
+}
+
+int fdt_end_node(void *fdt)
+{
+	fdt32_t *en;
+
+	FDT_SW_PROBE_STRUCT(fdt);
+
+	en = fdt_grab_space_(fdt, FDT_TAGSIZE);
+	if (! en)
+		return -FDT_ERR_NOSPACE;
+
+	*en = cpu_to_fdt32(FDT_END_NODE);
+	return 0;
+}
+
+static int fdt_find_add_string_(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_totalsize(fdt);
+	const char *p;
+	int strtabsize = fdt_size_dt_strings(fdt);
+	int len = strlen(s) + 1;
+	int struct_top, offset;
+
+	p = fdt_find_string_(strtab - strtabsize, strtabsize, s);
+	if (p)
+		return p - strtab;
+
+	/* Add it */
+	offset = -strtabsize - len;
+	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	if (fdt_totalsize(fdt) + offset < struct_top)
+		return 0; /* no more room :( */
+
+	memcpy(strtab + offset, s, len);
+	fdt_set_size_dt_strings(fdt, strtabsize + len);
+	return offset;
+}
+
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
+{
+	struct fdt_property *prop;
+	int nameoff;
+
+	FDT_SW_PROBE_STRUCT(fdt);
+
+	nameoff = fdt_find_add_string_(fdt, name);
+	if (nameoff == 0)
+		return -FDT_ERR_NOSPACE;
+
+	prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
+	if (! prop)
+		return -FDT_ERR_NOSPACE;
+
+	prop->tag = cpu_to_fdt32(FDT_PROP);
+	prop->nameoff = cpu_to_fdt32(nameoff);
+	prop->len = cpu_to_fdt32(len);
+	*valp = prop->data;
+	return 0;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+	void *ptr;
+	int ret;
+
+	ret = fdt_property_placeholder(fdt, name, len, &ptr);
+	if (ret)
+		return ret;
+	memcpy(ptr, val, len);
+	return 0;
+}
+
+int fdt_finish(void *fdt)
+{
+	char *p = (char *)fdt;
+	fdt32_t *end;
+	int oldstroffset, newstroffset;
+	uint32_t tag;
+	int offset, nextoffset;
+
+	FDT_SW_PROBE_STRUCT(fdt);
+
+	/* Add terminator */
+	end = fdt_grab_space_(fdt, sizeof(*end));
+	if (! end)
+		return -FDT_ERR_NOSPACE;
+	*end = cpu_to_fdt32(FDT_END);
+
+	/* Relocate the string table */
+	oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
+	newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
+	fdt_set_off_dt_strings(fdt, newstroffset);
+
+	/* Walk the structure, correcting string offsets */
+	offset = 0;
+	while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
+		if (tag == FDT_PROP) {
+			struct fdt_property *prop =
+				fdt_offset_ptr_w_(fdt, offset);
+			int nameoff;
+
+			nameoff = fdt32_to_cpu(prop->nameoff);
+			nameoff += fdt_size_dt_strings(fdt);
+			prop->nameoff = cpu_to_fdt32(nameoff);
+		}
+		offset = nextoffset;
+	}
+	if (nextoffset < 0)
+		return nextoffset;
+
+	/* Finally, adjust the header */
+	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
+	fdt_set_magic(fdt, FDT_MAGIC);
+	return 0;
+}
diff --git a/platform/common/libfdt/fdt_wip.c b/platform/common/libfdt/fdt_wip.c
new file mode 100644
index 00000000000..534c1cbbb2f
--- /dev/null
+++ b/platform/common/libfdt/fdt_wip.c
@@ -0,0 +1,139 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len)
+{
+	void *propval;
+	int proplen;
+
+	propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen,
+					&proplen);
+	if (!propval)
+		return proplen;
+
+	if (proplen < (len + idx))
+		return -FDT_ERR_NOSPACE;
+
+	memcpy((char *)propval + idx, val, len);
+	return 0;
+}
+
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len)
+{
+	const void *propval;
+	int proplen;
+
+	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
+	if (!propval)
+		return proplen;
+
+	if (proplen != len)
+		return -FDT_ERR_NOSPACE;
+
+	return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+						   strlen(name), 0,
+						   val, len);
+}
+
+static void fdt_nop_region_(void *start, int len)
+{
+	fdt32_t *p;
+
+	for (p = start; (char *)p < ((char *)start + len); p++)
+		*p = cpu_to_fdt32(FDT_NOP);
+}
+
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len;
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (!prop)
+		return len;
+
+	fdt_nop_region_(prop, len + sizeof(*prop));
+
+	return 0;
+}
+
+int fdt_node_end_offset_(void *fdt, int offset)
+{
+	int depth = 0;
+
+	while ((offset >= 0) && (depth >= 0))
+		offset = fdt_next_node(fdt, offset, &depth);
+
+	return offset;
+}
+
+int fdt_nop_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	endoffset = fdt_node_end_offset_(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	fdt_nop_region_(fdt_offset_ptr_w(fdt, nodeoffset, 0),
+			endoffset - nodeoffset);
+	return 0;
+}
diff --git a/platform/common/libfdt/libfdt.h b/platform/common/libfdt/libfdt.h
new file mode 100644
index 00000000000..a470d1df6d2
--- /dev/null
+++ b/platform/common/libfdt/libfdt.h
@@ -0,0 +1,1968 @@
+#ifndef LIBFDT_H
+#define LIBFDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <libfdt_env.h>
+#include <fdt.h>
+
+#define FDT_FIRST_SUPPORTED_VERSION	0x02
+#define FDT_LAST_SUPPORTED_VERSION	0x11
+
+/* Error codes: informative error codes */
+#define FDT_ERR_NOTFOUND	1
+	/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
+#define FDT_ERR_EXISTS		2
+	/* FDT_ERR_EXISTS: Attempted to create a node or property which
+	 * already exists */
+#define FDT_ERR_NOSPACE		3
+	/* FDT_ERR_NOSPACE: Operation needed to expand the device
+	 * tree, but its buffer did not have sufficient space to
+	 * contain the expanded tree. Use fdt_open_into() to move the
+	 * device tree to a buffer with more space. */
+
+/* Error codes: codes for bad parameters */
+#define FDT_ERR_BADOFFSET	4
+	/* FDT_ERR_BADOFFSET: Function was passed a structure block
+	 * offset which is out-of-bounds, or which points to an
+	 * unsuitable part of the structure for the operation. */
+#define FDT_ERR_BADPATH		5
+	/* FDT_ERR_BADPATH: Function was passed a badly formatted path
+	 * (e.g. missing a leading / for a function which requires an
+	 * absolute path) */
+#define FDT_ERR_BADPHANDLE	6
+	/* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle.
+	 * This can be caused either by an invalid phandle property
+	 * length, or the phandle value was either 0 or -1, which are
+	 * not permitted. */
+#define FDT_ERR_BADSTATE	7
+	/* FDT_ERR_BADSTATE: Function was passed an incomplete device
+	 * tree created by the sequential-write functions, which is
+	 * not sufficiently complete for the requested operation. */
+
+/* Error codes: codes for bad device tree blobs */
+#define FDT_ERR_TRUNCATED	8
+	/* FDT_ERR_TRUNCATED: FDT or a sub-block is improperly
+	 * terminated (overflows, goes outside allowed bounds, or
+	 * isn't properly terminated).  */
+#define FDT_ERR_BADMAGIC	9
+	/* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
+	 * device tree at all - it is missing the flattened device
+	 * tree magic number. */
+#define FDT_ERR_BADVERSION	10
+	/* FDT_ERR_BADVERSION: Given device tree has a version which
+	 * can't be handled by the requested operation.  For
+	 * read-write functions, this may mean that fdt_open_into() is
+	 * required to convert the tree to the expected version. */
+#define FDT_ERR_BADSTRUCTURE	11
+	/* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
+	 * structure block or other serious error (e.g. misnested
+	 * nodes, or subnodes preceding properties). */
+#define FDT_ERR_BADLAYOUT	12
+	/* FDT_ERR_BADLAYOUT: For read-write functions, the given
+	 * device tree has it's sub-blocks in an order that the
+	 * function can't handle (memory reserve map, then structure,
+	 * then strings).  Use fdt_open_into() to reorganize the tree
+	 * into a form suitable for the read-write operations. */
+
+/* "Can't happen" error indicating a bug in libfdt */
+#define FDT_ERR_INTERNAL	13
+	/* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
+	 * Should never be returned, if it is, it indicates a bug in
+	 * libfdt itself. */
+
+/* Errors in device tree content */
+#define FDT_ERR_BADNCELLS	14
+	/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
+	 * or similar property with a bad format or value */
+
+#define FDT_ERR_BADVALUE	15
+	/* FDT_ERR_BADVALUE: Device tree has a property with an unexpected
+	 * value. For example: a property expected to contain a string list
+	 * is not NUL-terminated within the length of its value. */
+
+#define FDT_ERR_BADOVERLAY	16
+	/* FDT_ERR_BADOVERLAY: The device tree overlay, while
+	 * correctly structured, cannot be applied due to some
+	 * unexpected or missing value, property or node. */
+
+#define FDT_ERR_NOPHANDLES	17
+	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
+	 * phandle available anymore without causing an overflow */
+
+#define FDT_ERR_MAX		17
+
+/**********************************************************************/
+/* Low-level functions (you probably don't need these)                */
+/**********************************************************************/
+
+#ifndef SWIG /* This function is not useful in Python */
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
+#endif
+static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
+{
+	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
+
+/*
+ * Alignment helpers:
+ *     These helpers access words from a device tree blob.  They're
+ *     built to work even with unaligned pointers on platforms (ike
+ *     ARM) that don't like unaligned loads and stores
+ */
+
+static inline uint32_t fdt32_ld(const fdt32_t *p)
+{
+	const uint8_t *bp = (const uint8_t *)p;
+
+	return ((uint32_t)bp[0] << 24)
+		| ((uint32_t)bp[1] << 16)
+		| ((uint32_t)bp[2] << 8)
+		| bp[3];
+}
+
+static inline uint64_t fdt64_ld(const fdt64_t *p)
+{
+	const uint8_t *bp = (const uint8_t *)p;
+
+	return ((uint64_t)bp[0] << 56)
+		| ((uint64_t)bp[1] << 48)
+		| ((uint64_t)bp[2] << 40)
+		| ((uint64_t)bp[3] << 32)
+		| ((uint64_t)bp[4] << 24)
+		| ((uint64_t)bp[5] << 16)
+		| ((uint64_t)bp[6] << 8)
+		| bp[7];
+}
+
+/**********************************************************************/
+/* Traversal functions                                                */
+/**********************************************************************/
+
+int fdt_next_node(const void *fdt, int offset, int *depth);
+
+/**
+ * fdt_first_subnode() - get offset of first direct subnode
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of node to check
+ * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ */
+int fdt_first_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_next_subnode() - get offset of next direct subnode
+ *
+ * After first calling fdt_first_subnode(), call this function repeatedly to
+ * get direct subnodes of a parent node.
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of previous subnode
+ * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ * subnodes
+ */
+int fdt_next_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_subnode - iterate over all subnodes of a parent
+ *
+ * @node:	child node (int, lvalue)
+ * @fdt:	FDT blob (const void *)
+ * @parent:	parent node (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_subnode(node, fdt, parent) {
+ *		Use node
+ *		...
+ *	}
+ *
+ *	if ((node < 0) && (node != -FDT_ERR_NOTFOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop. The parent variable be constant or even a
+ * literal.
+ *
+ */
+#define fdt_for_each_subnode(node, fdt, parent)		\
+	for (node = fdt_first_subnode(fdt, parent);	\
+	     node >= 0;					\
+	     node = fdt_next_subnode(fdt, node))
+
+/**********************************************************************/
+/* General functions                                                  */
+/**********************************************************************/
+#define fdt_get_header(fdt, field) \
+	(fdt32_ld(&((const struct fdt_header *)(fdt))->field))
+#define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
+#define fdt_totalsize(fdt)		(fdt_get_header(fdt, totalsize))
+#define fdt_off_dt_struct(fdt)		(fdt_get_header(fdt, off_dt_struct))
+#define fdt_off_dt_strings(fdt)		(fdt_get_header(fdt, off_dt_strings))
+#define fdt_off_mem_rsvmap(fdt)		(fdt_get_header(fdt, off_mem_rsvmap))
+#define fdt_version(fdt)		(fdt_get_header(fdt, version))
+#define fdt_last_comp_version(fdt)	(fdt_get_header(fdt, last_comp_version))
+#define fdt_boot_cpuid_phys(fdt)	(fdt_get_header(fdt, boot_cpuid_phys))
+#define fdt_size_dt_strings(fdt)	(fdt_get_header(fdt, size_dt_strings))
+#define fdt_size_dt_struct(fdt)		(fdt_get_header(fdt, size_dt_struct))
+
+#define fdt_set_hdr_(name) \
+	static inline void fdt_set_##name(void *fdt, uint32_t val) \
+	{ \
+		struct fdt_header *fdth = (struct fdt_header *)fdt; \
+		fdth->name = cpu_to_fdt32(val); \
+	}
+fdt_set_hdr_(magic);
+fdt_set_hdr_(totalsize);
+fdt_set_hdr_(off_dt_struct);
+fdt_set_hdr_(off_dt_strings);
+fdt_set_hdr_(off_mem_rsvmap);
+fdt_set_hdr_(version);
+fdt_set_hdr_(last_comp_version);
+fdt_set_hdr_(boot_cpuid_phys);
+fdt_set_hdr_(size_dt_strings);
+fdt_set_hdr_(size_dt_struct);
+#undef fdt_set_hdr_
+
+/**
+ * fdt_header_size - return the size of the tree's header
+ * @fdt: pointer to a flattened device tree
+ */
+size_t fdt_header_size_(uint32_t version);
+static inline size_t fdt_header_size(const void *fdt)
+{
+	return fdt_header_size_(fdt_version(fdt));
+}
+
+/**
+ * fdt_check_header - sanity check a device tree header
+
+ * @fdt: pointer to data which might be a flattened device tree
+ *
+ * fdt_check_header() checks that the given buffer contains what
+ * appears to be a flattened device tree, and that the header contains
+ * valid information (to the extent that can be determined from the
+ * header alone).
+ *
+ * returns:
+ *     0, if the buffer appears to contain a valid device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE,
+ *     -FDT_ERR_TRUNCATED, standard meanings, as above
+ */
+int fdt_check_header(const void *fdt);
+
+/**
+ * fdt_move - move a device tree around in memory
+ * @fdt: pointer to the device tree to move
+ * @buf: pointer to memory where the device is to be moved
+ * @bufsize: size of the memory space at buf
+ *
+ * fdt_move() relocates, if possible, the device tree blob located at
+ * fdt to the buffer at buf of size bufsize.  The buffer may overlap
+ * with the existing device tree blob at fdt.  Therefore,
+ *     fdt_move(fdt, fdt, fdt_totalsize(fdt))
+ * should always succeed.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_move(const void *fdt, void *buf, int bufsize);
+
+/**********************************************************************/
+/* Read-only functions                                                */
+/**********************************************************************/
+
+int fdt_check_full(const void *fdt, size_t bufsize);
+
+/**
+ * fdt_get_string - retrieve a string from the strings block of a device tree
+ * @fdt: pointer to the device tree blob
+ * @stroffset: offset of the string within the strings block (native endian)
+ * @lenp: optional pointer to return the string's length
+ *
+ * fdt_get_string() retrieves a pointer to a single string from the
+ * strings block of the device tree blob at fdt, and optionally also
+ * returns the string's length in *lenp.
+ *
+ * returns:
+ *     a pointer to the string, on success
+ *     NULL, if stroffset is out of bounds, or doesn't point to a valid string
+ */
+const char *fdt_get_string(const void *fdt, int stroffset, int *lenp);
+
+/**
+ * fdt_string - retrieve a string from the strings block of a device tree
+ * @fdt: pointer to the device tree blob
+ * @stroffset: offset of the string within the strings block (native endian)
+ *
+ * fdt_string() retrieves a pointer to a single string from the
+ * strings block of the device tree blob at fdt.
+ *
+ * returns:
+ *     a pointer to the string, on success
+ *     NULL, if stroffset is out of bounds, or doesn't point to a valid string
+ */
+const char *fdt_string(const void *fdt, int stroffset);
+
+/**
+ * fdt_get_max_phandle - retrieves the highest phandle in a tree
+ * @fdt: pointer to the device tree blob
+ *
+ * fdt_get_max_phandle retrieves the highest phandle in the given
+ * device tree. This will ignore badly formatted phandles, or phandles
+ * with a value of 0 or -1.
+ *
+ * returns:
+ *      the highest phandle on success
+ *      0, if no phandle was found in the device tree
+ *      -1, if an error occurred
+ */
+uint32_t fdt_get_max_phandle(const void *fdt);
+
+/**
+ * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
+ * @fdt: pointer to the device tree blob
+ *
+ * Returns the number of entries in the device tree blob's memory
+ * reservation map.  This does not include the terminating 0,0 entry
+ * or any other (0,0) entries reserved for expansion.
+ *
+ * returns:
+ *     the number of entries
+ */
+int fdt_num_mem_rsv(const void *fdt);
+
+/**
+ * fdt_get_mem_rsv - retrieve one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: pointers to 64-bit variables
+ *
+ * On success, *address and *size will contain the address and size of
+ * the n-th reserve map entry from the device tree blob, in
+ * native-endian format.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
+
+/**
+ * fdt_subnode_offset_namelen - find a subnode based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_subnode_offset(), but only examine the first
+ * namelen characters of name for matching the subnode name.  This is
+ * useful for finding subnodes based on a portion of a larger string,
+ * such as a full path.
+ */
+#ifndef SWIG /* Not available in Python */
+int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
+			       const char *name, int namelen);
+#endif
+/**
+ * fdt_subnode_offset - find a subnode of a given node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_subnode_offset() finds a subnode of the node at structure block
+ * offset parentoffset with the given name.  name may include a unit
+ * address, in which case fdt_subnode_offset() will find the subnode
+ * with that unit address, or the unit address may be omitted, in
+ * which case fdt_subnode_offset() will find an arbitrary subnode
+ * whose name excluding unit address matches the given name.
+ *
+ * returns:
+ *	structure block offset of the requested subnode (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_path_offset_namelen - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ * @namelen: number of characters of path to consider
+ *
+ * Identical to fdt_path_offset(), but only consider the first namelen
+ * characters of path as the path name.
+ */
+#ifndef SWIG /* Not available in Python */
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
+#endif
+
+/**
+ * fdt_path_offset - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ *
+ * fdt_path_offset() finds a node of a given path in the device tree.
+ * Each path component may omit the unit address portion, but the
+ * results of this are undefined if any such path component is
+ * ambiguous (that is if there are multiple nodes at the relevant
+ * level matching the given component, differentiated only by unit
+ * address).
+ *
+ * returns:
+ *	structure block offset of the node with the requested path (>=0), on
+ *		success
+ *	-FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
+ *	-FDT_ERR_NOTFOUND, if the requested node does not exist
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_path_offset(const void *fdt, const char *path);
+
+/**
+ * fdt_get_name - retrieve the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the starting node
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_name() retrieves the name (including unit address) of the
+ * device tree node at structure block offset nodeoffset.  If lenp is
+ * non-NULL, the length of this name is also returned, in the integer
+ * pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the node's name, on success
+ *		If lenp is non-NULL, *lenp contains the length of that name
+ *			(>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE, standard meanings
+ */
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
+
+/**
+ * fdt_first_property_offset - find the offset of a node's first property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ *
+ * fdt_first_property_offset() finds the first property of the node at
+ * the given structure block offset.
+ *
+ * returns:
+ *	structure block offset of the property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested node has no properties
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_first_property_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_next_property_offset - step through a node's properties
+ * @fdt: pointer to the device tree blob
+ * @offset: structure block offset of a property
+ *
+ * fdt_next_property_offset() finds the property immediately after the
+ * one at the given structure block offset.  This will be a property
+ * of the same node as the given property.
+ *
+ * returns:
+ *	structure block offset of the next property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the given property is the last in its node
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_next_property_offset(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_property_offset - iterate over all properties of a node
+ *
+ * @property_offset:	property offset (int, lvalue)
+ * @fdt:		FDT blob (const void *)
+ * @node:		node offset (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_property_offset(property, fdt, node) {
+ *		Use property
+ *		...
+ *	}
+ *
+ *	if ((property < 0) && (property != -FDT_ERR_NOTFOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and property is used as
+ * iterator in the loop. The node variable can be constant or even a
+ * literal.
+ */
+#define fdt_for_each_property_offset(property, fdt, node)	\
+	for (property = fdt_first_property_offset(fdt, node);	\
+	     property >= 0;					\
+	     property = fdt_next_property_offset(fdt, property))
+
+/**
+ * fdt_get_property_by_offset - retrieve the property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @offset: offset of the property to retrieve
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property_by_offset() retrieves a pointer to the
+ * fdt_property structure within the device tree blob at the given
+ * offset.  If lenp is non-NULL, the length of the property value is
+ * also returned, in the integer pointed to by lenp.
+ *
+ * Note that this code only works on device tree versions >= 16. fdt_getprop()
+ * works on all versions.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp);
+
+/**
+ * fdt_get_property_namelen - find a property based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_get_property(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+#ifndef SWIG /* Not available in Python */
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int nodeoffset,
+						    const char *name,
+						    int namelen, int *lenp);
+#endif
+
+/**
+ * fdt_get_property - find a given property in a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property() retrieves a pointer to the fdt_property
+ * structure within the device tree blob corresponding to the property
+ * named 'name' of the node at offset nodeoffset.  If lenp is
+ * non-NULL, the length of the property value is also returned, in the
+ * integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
+					    const char *name, int *lenp);
+static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
+						      const char *name,
+						      int *lenp)
+{
+	return (struct fdt_property *)(uintptr_t)
+		fdt_get_property(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_getprop_by_offset - retrieve the value of a property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @offset: offset of the property to read
+ * @namep: pointer to a string variable (will be overwritten) or NULL
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop_by_offset() retrieves a pointer to the value of the
+ * property at structure block offset 'offset' (this will be a pointer
+ * to within the device blob itself, not a copy of the value).  If
+ * lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.  If namep is non-NULL,
+ * the property's namne will also be returned in the char * pointed to
+ * by namep (this will be a pointer to within the device tree's string
+ * block, not a new copy of the name).
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *		if namep is non-NULL *namep contiains a pointer to the property
+ *		name.
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+#ifndef SWIG /* This function is not useful in Python */
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp);
+#endif
+
+/**
+ * fdt_getprop_namelen - get property value based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_getprop(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+#ifndef SWIG /* Not available in Python */
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp);
+static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
+					  const char *name, int namelen,
+					  int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
+						      namelen, lenp);
+}
+#endif
+
+/**
+ * fdt_getprop - retrieve the value of a given property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop() retrieves a pointer to the value of the property
+ * named 'name' of the node at offset nodeoffset (this will be a
+ * pointer to within the device blob itself, not a copy of the value).
+ * If lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp);
+static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
+				  const char *name, int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_get_phandle - retrieve the phandle of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the node
+ *
+ * fdt_get_phandle() retrieves the phandle of the device tree node at
+ * structure block offset nodeoffset.
+ *
+ * returns:
+ *	the phandle of the node at nodeoffset, on success (!= 0, != -1)
+ *	0, if the node has no phandle, or another error occurs
+ */
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_get_alias_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+#ifndef SWIG /* Not available in Python */
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen);
+#endif
+
+/**
+ * fdt_get_alias - retrieve the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias.  That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ *	a pointer to the expansion of the alias named 'name', if it exists
+ *	NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
+ * fdt_get_path - determine the full path of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose path to find
+ * @buf: character buffer to contain the returned path (will be overwritten)
+ * @buflen: size of the character buffer at buf
+ *
+ * fdt_get_path() computes the full path of the node at offset
+ * nodeoffset, and records that path in the buffer at buf.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	0, on success
+ *		buf contains the absolute path of the node at
+ *		nodeoffset, as a NUL-terminated string.
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
+ *		characters and will not fit in the given buffer.
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
+
+/**
+ * fdt_supernode_atdepth_offset - find a specific ancestor of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ * @supernodedepth: depth of the ancestor to find
+ * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_supernode_atdepth_offset() finds an ancestor of the given node
+ * at a specific depth from the root (where the root itself has depth
+ * 0, its immediate subnodes depth 1 and so forth).  So
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
+ * will always return 0, the offset of the root node.  If the node at
+ * nodeoffset has depth D, then:
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
+ * will return nodeoffset itself.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	structure block offset of the node at node offset's ancestor
+ *		of depth supernodedepth (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of
+ *		nodeoffset
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth);
+
+/**
+ * fdt_node_depth - find the depth of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_node_depth() finds the depth of a given node.  The root node
+ * has depth 0, its immediate subnodes depth 1 and so forth.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	depth of the node at nodeoffset (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_depth(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_parent_offset - find the parent of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_parent_offset() locates the parent node of a given node (that
+ * is, it finds the offset of the node which contains the node at
+ * nodeoffset as a subnode).
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset, *twice*.
+ *
+ * returns:
+ *	structure block offset of the parent of the node at nodeoffset
+ *		(>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_parent_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_node_offset_by_prop_value - find nodes with a given property value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @propname: property name to check
+ * @propval: property value to search for
+ * @proplen: length of the value in propval
+ *
+ * fdt_node_offset_by_prop_value() returns the offset of the first
+ * node after startoffset, which has a property named propname whose
+ * value is of length proplen and has value equal to propval; or if
+ * startoffset is -1, the very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
+ *					       propval, proplen);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
+ *						       propval, proplen);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen);
+
+/**
+ * fdt_node_offset_by_phandle - find the node with a given phandle
+ * @fdt: pointer to the device tree blob
+ * @phandle: phandle value
+ *
+ * fdt_node_offset_by_phandle() returns the offset of the node
+ * which has the given phandle value.  If there is more than one node
+ * in the tree with the given phandle (an invalid tree), results are
+ * undefined.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0), on success
+ *	-FDT_ERR_NOTFOUND, no node with that phandle exists
+ *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
+
+/**
+ * fdt_node_check_compatible: check a node's compatible property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @compatible: string to match against
+ *
+ *
+ * fdt_node_check_compatible() returns 0 if the given node contains a
+ * 'compatible' property with the given string as one of its elements,
+ * it returns non-zero otherwise, or on error.
+ *
+ * returns:
+ *	0, if the node has a 'compatible' property listing the given string
+ *	1, if the node has a 'compatible' property, but it does not list
+ *		the given string
+ *	-FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
+ *	-FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible);
+
+/**
+ * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @compatible: 'compatible' string to match against
+ *
+ * fdt_node_offset_by_compatible() returns the offset of the first
+ * node after startoffset, which has a 'compatible' property which
+ * lists the given compatible string; or if startoffset is -1, the
+ * very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible);
+
+/**
+ * fdt_stringlist_contains - check a string list property for a string
+ * @strlist: Property containing a list of strings to check
+ * @listlen: Length of property
+ * @str: String to search for
+ *
+ * This is a utility function provided for convenience. The list contains
+ * one or more strings, each terminated by \0, as is found in a device tree
+ * "compatible" property.
+ *
+ * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ */
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
+
+/**
+ * fdt_stringlist_count - count the number of strings in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @return:
+ *   the number of strings in the given property
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist
+ */
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
+
+/**
+ * fdt_stringlist_search - find a string in a string list and return its index
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @string: string to look up in the string list
+ *
+ * Note that it is possible for this function to succeed on property values
+ * that are not NUL-terminated. That's because the function will stop after
+ * finding the first occurrence of @string. This can for example happen with
+ * small-valued cell properties, such as #address-cells, when searching for
+ * the empty string.
+ *
+ * @return:
+ *   the index of the string in the list of strings
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
+ *                     the given string
+ */
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string);
+
+/**
+ * fdt_stringlist_get() - obtain the string at a given index in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @index: index of the string to return
+ * @lenp: return location for the string length or an error code on failure
+ *
+ * Note that this will successfully extract strings from properties with
+ * non-NUL-terminated values. For example on small-valued cell properties
+ * this function will return the empty string.
+ *
+ * If non-NULL, the length of the string (on success) or a negative error-code
+ * (on failure) will be stored in the integer pointer to by lenp.
+ *
+ * @return:
+ *   A pointer to the string at the given index in the string list or NULL on
+ *   failure. On success the length of the string will be stored in the memory
+ *   location pointed to by the lenp parameter, if non-NULL. On failure one of
+ *   the following negative error codes will be returned in the lenp parameter
+ *   (if non-NULL):
+ *     -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *     -FDT_ERR_NOTFOUND if the property does not exist
+ */
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int index,
+			       int *lenp);
+
+/**********************************************************************/
+/* Read-only functions (addressing related)                           */
+/**********************************************************************/
+
+/**
+ * FDT_MAX_NCELLS - maximum value for #address-cells and #size-cells
+ *
+ * This is the maximum value for #address-cells, #size-cells and
+ * similar properties that will be processed by libfdt.  IEE1275
+ * requires that OF implementations handle values up to 4.
+ * Implementations may support larger values, but in practice higher
+ * values aren't used.
+ */
+#define FDT_MAX_NCELLS		4
+
+/**
+ * fdt_address_cells - retrieve address size for a bus represented in the tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address size for
+ *
+ * When the node has a valid #address-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      2, if the node has no #address-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#address-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_address_cells(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_size_cells - retrieve address range size for a bus represented in the
+ *                  tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address range size for
+ *
+ * When the node has a valid #size-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      1, if the node has no #size-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#size-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_size_cells(const void *fdt, int nodeoffset);
+
+
+/**********************************************************************/
+/* Write-in-place functions                                           */
+/**********************************************************************/
+
+/**
+ * fdt_setprop_inplace_namelen_partial - change a property's value,
+ *                                       but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @namelen: number of characters of name to consider
+ * @idx: index of the property to change in the array
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * Identical to fdt_setprop_inplace(), but modifies the given property
+ * starting from the given index, and using only the first characters
+ * of the name. It is useful when you want to manipulate only one value of
+ * an array and you have a string that doesn't end with \0.
+ */
+#ifndef SWIG /* Not available in Python */
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len);
+#endif
+
+/**
+ * fdt_setprop_inplace - change a property's value, but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * fdt_setprop_inplace() replaces the value of a given property with
+ * the data in val, of length len.  This function cannot change the
+ * size of a property, and so will only work if len is equal to the
+ * current length of the property.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if len is not equal to the property's current length
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#ifndef SWIG /* Not available in Python */
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len);
+#endif
+
+/**
+ * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u32() replaces the value of a given property
+ * with the 32-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 4.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 4
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
+					  const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u64() replaces the value of a given property
+ * with the 64-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 8.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 8
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
+					  const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_cell - change the value of a single-cell property
+ *
+ * This is an alternative name for fdt_setprop_inplace_u32()
+ */
+static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
+					   const char *name, uint32_t val)
+{
+	return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_nop_property - replace a property with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_nop_property() will replace a given property's representation
+ * in the blob with FDT_NOP tags, effectively removing it from the
+ * tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the property, and will not alter or move any other part of the
+ * tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_nop_node - replace a node (subtree) with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_nop_node() will replace a given node's representation in the
+ * blob, including all its subnodes, if any, with FDT_NOP tags,
+ * effectively removing it from the tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the node and its properties and subnodes, and will not alter or
+ * move any other part of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_node(void *fdt, int nodeoffset);
+
+/**********************************************************************/
+/* Sequential write functions                                         */
+/**********************************************************************/
+
+int fdt_create(void *buf, int bufsize);
+int fdt_resize(void *fdt, void *buf, int bufsize);
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
+int fdt_finish_reservemap(void *fdt);
+int fdt_begin_node(void *fdt, const char *name);
+int fdt_property(void *fdt, const char *name, const void *val, int len);
+static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+
+#ifndef SWIG /* Not available in Python */
+static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
+{
+	return fdt_property_u32(fdt, name, val);
+}
+#endif
+
+/**
+ * fdt_property_placeholder - add a new property and return a ptr to its value
+ *
+ * @fdt: pointer to the device tree blob
+ * @name: name of property to add
+ * @len: length of property value in bytes
+ * @valp: returns a pointer to where where the value should be placed
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_NOSPACE, standard meanings
+ */
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
+
+#define fdt_property_string(fdt, name, str) \
+	fdt_property(fdt, name, str, strlen(str)+1)
+int fdt_end_node(void *fdt);
+int fdt_finish(void *fdt);
+
+/**********************************************************************/
+/* Read-write functions                                               */
+/**********************************************************************/
+
+int fdt_create_empty_tree(void *buf, int bufsize);
+int fdt_open_into(const void *fdt, void *buf, int bufsize);
+int fdt_pack(void *fdt);
+
+/**
+ * fdt_add_mem_rsv - add one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: 64-bit values (native endian)
+ *
+ * Adds a reserve map entry to the given blob reserving a region at
+ * address address of length size.
+ *
+ * This function will insert data into the reserve map and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new reservation entry
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
+
+/**
+ * fdt_del_mem_rsv - remove a memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @n: entry to remove
+ *
+ * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
+ * the blob.
+ *
+ * This function will delete data from the reservation table and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
+ *		are less than n+1 reserve map entries)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_mem_rsv(void *fdt, int n);
+
+/**
+ * fdt_set_name - change the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ * @name: name to give the node
+ *
+ * fdt_set_name() replaces the name (including unit address, if any)
+ * of the given node with the given string.  NOTE: this function can't
+ * efficiently check if the new name is unique amongst the given
+ * node's siblings; results are undefined if this function is invoked
+ * with a name equal to one of the given node's siblings.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob
+ *		to contain the new name
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_set_name(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_setprop - create or change a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to set the property value to
+ * @len: length of the property value
+ *
+ * fdt_setprop() sets the value of the named property in the given
+ * node to the given value and length, creating the property if it
+ * does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len);
+
+/**
+ * fdt_setprop_placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data);
+
+/**
+ * fdt_setprop_u32 - set a property to a 32-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u32() sets the value of the named property in the given
+ * node to the given 32-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
+				  uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_u64 - set a property to a 64-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u64() sets the value of the named property in the given
+ * node to the given 64-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
+				  uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_cell - set a property to a single cell value
+ *
+ * This is an alternative name for fdt_setprop_u32()
+ */
+static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
+				   uint32_t val)
+{
+	return fdt_setprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_setprop_string - set a property to a string value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value for the property
+ *
+ * fdt_setprop_string() sets the value of the named property in the
+ * given node to the given string value (using the length of the
+ * string to determine the new length of the property), or creates a
+ * new property with that value if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_string(fdt, nodeoffset, name, str) \
+	fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+
+/**
+ * fdt_setprop_empty - set a property to an empty value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ *
+ * fdt_setprop_empty() sets the value of the named property in the
+ * given node to an empty (zero length) value, or creates a new empty
+ * property if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_empty(fdt, nodeoffset, name) \
+	fdt_setprop((fdt), (nodeoffset), (name), NULL, 0)
+
+/**
+ * fdt_appendprop - append to or create a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to append to
+ * @val: pointer to data to append to the property value
+ * @len: length of the data to append to the property value
+ *
+ * fdt_appendprop() appends the value to the named property in the
+ * given node, creating the property if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len);
+
+/**
+ * fdt_appendprop_u32 - append a 32-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u32() appends the given 32-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
+				     const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_u64 - append a 64-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u64() appends the given 64-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
+				     const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_cell - append a single cell value to a property
+ *
+ * This is an alternative name for fdt_appendprop_u32()
+ */
+static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
+				      const char *name, uint32_t val)
+{
+	return fdt_appendprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_appendprop_string - append a string to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value to append to the property
+ *
+ * fdt_appendprop_string() appends the given string to the value of
+ * the named property in the given node, or creates a new property
+ * with that value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
+	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+/**
+ * fdt_delprop - delete a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_del_property() will delete the given property.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_delprop(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_add_subnode_namelen - creates a new node based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_add_subnode(), but use only the first namelen
+ * characters of name as the name of the new node.  This is useful for
+ * creating subnodes based on a portion of a larger string, such as a
+ * full path.
+ */
+#ifndef SWIG /* Not available in Python */
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen);
+#endif
+
+/**
+ * fdt_add_subnode - creates a new node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_add_subnode() creates a new node as a subnode of the node at
+ * structure block offset parentoffset, with the given name (which
+ * should include the unit address, if any).
+ *
+ * This function will insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+
+ * returns:
+ *	structure block offset of the created nodeequested subnode (>=0), on
+ *		success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
+ *		the given name
+ *	-FDT_ERR_NOSPACE, if there is insufficient free space in the
+ *		blob to contain the new node
+ *	-FDT_ERR_NOSPACE
+ *	-FDT_ERR_BADLAYOUT
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_del_node - delete a node (subtree)
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_del_node() will remove the given node, including all its
+ * subnodes if any, from the blob.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_node(void *fdt, int nodeoffset);
+
+/**
+ * fdt_overlay_apply - Applies a DT overlay on a base DT
+ * @fdt: pointer to the base device tree blob
+ * @fdto: pointer to the device tree overlay blob
+ *
+ * fdt_overlay_apply() will apply the given device tree overlay on the
+ * given base device tree.
+ *
+ * Expect the base device tree to be modified, even if the function
+ * returns an error.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there's not enough space in the base device tree
+ *	-FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or
+ *		properties in the base DT
+ *	-FDT_ERR_BADPHANDLE,
+ *	-FDT_ERR_BADOVERLAY,
+ *	-FDT_ERR_NOPHANDLES,
+ *	-FDT_ERR_INTERNAL,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADOFFSET,
+ *	-FDT_ERR_BADPATH,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_overlay_apply(void *fdt, void *fdto);
+
+/**********************************************************************/
+/* Debugging / informational functions                                */
+/**********************************************************************/
+
+const char *fdt_strerror(int errval);
+
+#endif /* LIBFDT_H */
diff --git a/platform/common/libfdt/libfdt_env.h b/platform/common/libfdt/libfdt_env.h
new file mode 100644
index 00000000000..eb2053845c9
--- /dev/null
+++ b/platform/common/libfdt/libfdt_env.h
@@ -0,0 +1,140 @@
+#ifndef LIBFDT_ENV_H
+#define LIBFDT_ENV_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <limits.h>
+
+#ifdef __CHECKER__
+#define FDT_FORCE __attribute__((force))
+#define FDT_BITWISE __attribute__((bitwise))
+#else
+#define FDT_FORCE
+#define FDT_BITWISE
+#endif
+
+typedef uint16_t FDT_BITWISE fdt16_t;
+typedef uint32_t FDT_BITWISE fdt32_t;
+typedef uint64_t FDT_BITWISE fdt64_t;
+
+#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
+#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
+#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
+			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
+#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
+			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
+			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
+			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
+
+static inline uint16_t fdt16_to_cpu(fdt16_t x)
+{
+	return (FDT_FORCE uint16_t)CPU_TO_FDT16(x);
+}
+static inline fdt16_t cpu_to_fdt16(uint16_t x)
+{
+	return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x);
+}
+
+static inline uint32_t fdt32_to_cpu(fdt32_t x)
+{
+	return (FDT_FORCE uint32_t)CPU_TO_FDT32(x);
+}
+static inline fdt32_t cpu_to_fdt32(uint32_t x)
+{
+	return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x);
+}
+
+static inline uint64_t fdt64_to_cpu(fdt64_t x)
+{
+	return (FDT_FORCE uint64_t)CPU_TO_FDT64(x);
+}
+static inline fdt64_t cpu_to_fdt64(uint64_t x)
+{
+	return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x);
+}
+#undef CPU_TO_FDT64
+#undef CPU_TO_FDT32
+#undef CPU_TO_FDT16
+#undef EXTRACT_BYTE
+
+#ifdef __APPLE__
+#include <AvailabilityMacros.h>
+
+/* strnlen() is not available on Mac OS < 10.7 */
+# if !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < \
+                                         MAC_OS_X_VERSION_10_7)
+
+#define strnlen fdt_strnlen
+
+/*
+ * fdt_strnlen: returns the length of a string or max_count - which ever is
+ * smallest.
+ * Input 1 string: the string whose size is to be determined
+ * Input 2 max_count: the maximum value returned by this function
+ * Output: length of the string or max_count (the smallest of the two)
+ */
+static inline size_t fdt_strnlen(const char *string, size_t max_count)
+{
+    const char *p = memchr(string, 0, max_count);
+    return p ? p - string : max_count;
+}
+
+#endif /* !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED <
+          MAC_OS_X_VERSION_10_7) */
+
+#endif /* __APPLE__ */
+
+#endif /* LIBFDT_ENV_H */
diff --git a/platform/common/libfdt/libfdt_internal.h b/platform/common/libfdt/libfdt_internal.h
new file mode 100644
index 00000000000..4109f890ae6
--- /dev/null
+++ b/platform/common/libfdt/libfdt_internal.h
@@ -0,0 +1,96 @@
+#ifndef LIBFDT_INTERNAL_H
+#define LIBFDT_INTERNAL_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <fdt.h>
+
+#define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
+#define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
+
+int fdt_ro_probe_(const void *fdt);
+#define FDT_RO_PROBE(fdt)			\
+	{ \
+		int err_; \
+		if ((err_ = fdt_ro_probe_(fdt)) != 0)	\
+			return err_; \
+	}
+
+int fdt_check_node_offset_(const void *fdt, int offset);
+int fdt_check_prop_offset_(const void *fdt, int offset);
+const char *fdt_find_string_(const char *strtab, int tabsize, const char *s);
+int fdt_node_end_offset_(void *fdt, int nodeoffset);
+
+static inline const void *fdt_offset_ptr_(const void *fdt, int offset)
+{
+	return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
+}
+
+static inline void *fdt_offset_ptr_w_(void *fdt, int offset)
+{
+	return (void *)(uintptr_t)fdt_offset_ptr_(fdt, offset);
+}
+
+static inline const struct fdt_reserve_entry *fdt_mem_rsv_(const void *fdt, int n)
+{
+	const struct fdt_reserve_entry *rsv_table =
+		(const struct fdt_reserve_entry *)
+		((const char *)fdt + fdt_off_mem_rsvmap(fdt));
+
+	return rsv_table + n;
+}
+static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n)
+{
+	return (void *)(uintptr_t)fdt_mem_rsv_(fdt, n);
+}
+
+#define FDT_SW_MAGIC		(~FDT_MAGIC)
+
+#endif /* LIBFDT_INTERNAL_H */
diff --git a/platform/common/libfdt/objects.mk b/platform/common/libfdt/objects.mk
new file mode 100644
index 00000000000..1ae1cacd672
--- /dev/null
+++ b/platform/common/libfdt/objects.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Atish Patra<atish.patra@wdc.com>
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \
+               fdt_empty_tree.o
+$(foreach file, $(libfdt_files), \
+        $(eval CFLAGS_$(file) = -I$(src)/../../common/libfdt))
+
+platform-common-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
diff --git a/platform/common/libfdt/version.lds b/platform/common/libfdt/version.lds
new file mode 100644
index 00000000000..9f5d70880f2
--- /dev/null
+++ b/platform/common/libfdt/version.lds
@@ -0,0 +1,71 @@
+LIBFDT_1.2 {
+	global:
+		fdt_next_node;
+		fdt_check_header;
+		fdt_move;
+		fdt_string;
+		fdt_num_mem_rsv;
+		fdt_get_mem_rsv;
+		fdt_subnode_offset_namelen;
+		fdt_subnode_offset;
+		fdt_path_offset_namelen;
+		fdt_path_offset;
+		fdt_get_name;
+		fdt_get_property_namelen;
+		fdt_get_property;
+		fdt_getprop_namelen;
+		fdt_getprop;
+		fdt_get_phandle;
+		fdt_get_alias_namelen;
+		fdt_get_alias;
+		fdt_get_path;
+		fdt_supernode_atdepth_offset;
+		fdt_node_depth;
+		fdt_parent_offset;
+		fdt_node_offset_by_prop_value;
+		fdt_node_offset_by_phandle;
+		fdt_node_check_compatible;
+		fdt_node_offset_by_compatible;
+		fdt_setprop_inplace;
+		fdt_nop_property;
+		fdt_nop_node;
+		fdt_create;
+		fdt_add_reservemap_entry;
+		fdt_finish_reservemap;
+		fdt_begin_node;
+		fdt_property;
+		fdt_end_node;
+		fdt_finish;
+		fdt_open_into;
+		fdt_pack;
+		fdt_add_mem_rsv;
+		fdt_del_mem_rsv;
+		fdt_set_name;
+		fdt_setprop;
+		fdt_delprop;
+		fdt_add_subnode_namelen;
+		fdt_add_subnode;
+		fdt_del_node;
+		fdt_strerror;
+		fdt_offset_ptr;
+		fdt_next_tag;
+		fdt_appendprop;
+		fdt_create_empty_tree;
+		fdt_first_property_offset;
+		fdt_get_property_by_offset;
+		fdt_getprop_by_offset;
+		fdt_next_property_offset;
+		fdt_first_subnode;
+		fdt_next_subnode;
+		fdt_address_cells;
+		fdt_size_cells;
+		fdt_stringlist_contains;
+		fdt_stringlist_count;
+		fdt_stringlist_search;
+		fdt_stringlist_get;
+		fdt_resize;
+		fdt_overlay_apply;
+		fdt_get_string;
+	local:
+		*;
+};

From 57d5eaa5fb7d43684af2514aee14c7f2356fa5cb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 00:47:14 -0800
Subject: [PATCH 0087/1765] platform: Rename fdt.c to tinyfdt.c

Libfdt already have fdt.c and fdt.h.
Rename both fdt.* present in openSBI to tinyfdt.*

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/common/include/plat/{fdt.h => tinyfdt.h} | 0
 platform/common/irqchip/plic.c                    | 2 +-
 platform/common/objects.mk                        | 2 +-
 platform/common/{fdt.c => tinyfdt.c}              | 0
 4 files changed, 2 insertions(+), 2 deletions(-)
 rename platform/common/include/plat/{fdt.h => tinyfdt.h} (100%)
 rename platform/common/{fdt.c => tinyfdt.c} (100%)

diff --git a/platform/common/include/plat/fdt.h b/platform/common/include/plat/tinyfdt.h
similarity index 100%
rename from platform/common/include/plat/fdt.h
rename to platform/common/include/plat/tinyfdt.h
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 61a6bd01fd7..8a1e08eaf80 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -8,7 +8,7 @@
  */
 
 #include <sbi/riscv_io.h>
-#include <plat/fdt.h>
+#include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
 
 #define PLIC_PRIORITY_BASE		0x0
diff --git a/platform/common/objects.mk b/platform/common/objects.mk
index 712e9508338..b3e06fdf7ed 100644
--- a/platform/common/objects.mk
+++ b/platform/common/objects.mk
@@ -7,4 +7,4 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-platform-common-objs-y += fdt.o
+platform-common-objs-y += tinyfdt.o
diff --git a/platform/common/fdt.c b/platform/common/tinyfdt.c
similarity index 100%
rename from platform/common/fdt.c
rename to platform/common/tinyfdt.c

From cf83b6e438ec0ba7fc3337f5b516da37ec5314c8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 00:49:10 -0800
Subject: [PATCH 0088/1765] platform: Include libfdt & libc.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile                          | 1 +
 platform/common/libfdt/objects.mk | 1 +
 platform/sifive/fu540/config.mk   | 4 ++++
 3 files changed, 6 insertions(+)

diff --git a/Makefile b/Makefile
index f622c812f77..11e16344b5f 100644
--- a/Makefile
+++ b/Makefile
@@ -96,6 +96,7 @@ GENFLAGS	+=	-DOPENSBI_MINOR=$(MINOR)
 GENFLAGS	+=	-I$(platform_dir)/include
 GENFLAGS	+=	-I$(platform_common_dir)/include
 GENFLAGS	+=	-I$(include_dir)
+GENFLAGS	+=	$(platform-common-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
diff --git a/platform/common/libfdt/objects.mk b/platform/common/libfdt/objects.mk
index 1ae1cacd672..bd58e30d570 100644
--- a/platform/common/libfdt/objects.mk
+++ b/platform/common/libfdt/objects.mk
@@ -13,3 +13,4 @@ $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../common/libfdt))
 
 platform-common-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
+platform-common-genflags-$(PLATFORM_INCLUDE_LIBFDT) += -I$(platform_common_dir)/libfdt/
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index 07419b64e44..ffcbff81620 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -26,3 +26,7 @@ FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
 FW_PAYLOAD_FDT_ADDR=0x82200000
+
+# External Libraries to include
+PLATFORM_INCLUDE_LIBFDT=y
+PLATFORM_INCLUDE_LIBC=y

From 00f77d9ba0465fe7baf65df487195880555db597 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 17 Jan 2019 16:42:41 -0800
Subject: [PATCH 0089/1765] platform: Remove string functions from tinyfdt.c

There are couple of string function defined in platform
code. We no longer need them as we can directly link minimal
libc.

Every platform required to inclde this as PLIC driver required
libc functions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/common/irqchip/plic.c   |  3 ++-
 platform/common/tinyfdt.c        | 32 +++++++-------------------------
 platform/kendryte/k210/config.mk |  3 +++
 platform/qemu/sifive_u/config.mk |  3 +++
 platform/qemu/virt/config.mk     |  3 +++
 5 files changed, 18 insertions(+), 26 deletions(-)

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 8a1e08eaf80..0a2a036757e 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -10,6 +10,7 @@
 #include <sbi/riscv_io.h>
 #include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
+#include <string.h>
 
 #define PLIC_PRIORITY_BASE		0x0
 #define PLIC_PENDING_BASE		0x1000
@@ -53,7 +54,7 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 
 	if (!prop)
 		return;
-	if (fdt_strcmp(prop->name, "interrupts-extended"))
+	if (strcmp(prop->name, "interrupts-extended"))
 		return;
 
 	cells = prop->value;
diff --git a/platform/common/tinyfdt.c b/platform/common/tinyfdt.c
index 4f6017ccae4..a3c1fcf03dc 100644
--- a/platform/common/tinyfdt.c
+++ b/platform/common/tinyfdt.c
@@ -7,7 +7,8 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
-#include <plat/fdt.h>
+#include <plat/tinyfdt.h>
+#include <string.h>
 
 #define FDT_MAGIC	0xd00dfeed
 #define FDT_VERSION	17
@@ -39,25 +40,6 @@ u32 fdt_rev32(u32 v)
 	       ((v & 0xFF000000) >> 24);
 }
 
-ulong fdt_strlen(const char *str)
-{
-	ulong ret = 0;
-
-	while (*str != '\0') {
-		ret++;
-		str++;
-	}
-
-	return ret;
-}
-
-int fdt_strcmp(const char *a, const char *b)
-{
-	/* search first diff or end of string */
-	for (; *a == *b && *a != '\0'; a++, b++);
-	return *a - *b;
-}
-
 int fdt_prop_string_index(const struct fdt_prop *prop,
 			  const char *str)
 {
@@ -69,10 +51,10 @@ int fdt_prop_string_index(const struct fdt_prop *prop,
 	end = p + prop->len;
 
 	for (i = 0; p < end; i++, p += l) {
-		l = fdt_strlen(p) + 1;
+		l = strlen(p) + 1;
 		if (p + l > end)
 			return -1;
-		if (fdt_strcmp(str, p) == 0)
+		if (strcmp(str, p) == 0)
 			return i; /* Found it; return index */
 	}
 
@@ -105,7 +87,7 @@ static void recursive_iter(char **data, struct recursive_iter_info *info,
 	node.parent = parent;
 	node.name = *data;
 
-	*data += fdt_strlen(*data) + 1;
+	*data += strlen(*data) + 1;
 	while ((ulong)(*data) % sizeof(u32) != 0)
 		(*data)++;
 
@@ -179,7 +161,7 @@ static void match_iter(const struct fdt_node *node,
 	data += sizeof(u32);
 
 	/* Skip node name */
-	data += fdt_strlen(data) + 1;
+	data += strlen(data) + 1;
 	while ((ulong)(data) % sizeof(u32) != 0)
 		data++;
 
@@ -256,7 +238,7 @@ static int match_compat(const struct fdt_node *node,
 	if (!prop)
 		return 0;
 
-	if (fdt_strcmp(prop->name, "compatible"))
+	if (strcmp(prop->name, "compatible"))
 		return 0;
 
 	if (fdt_prop_string_index(prop, cinfo->compat) < 0)
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index 4a5b5920df6..b8510cbbaef 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -24,3 +24,6 @@ FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x10000
 #FW_PAYLOAD_FDT_ADDR=0x80040000
 
+# External Libraries to include
+PLATFORM_INCLUDE_LIBC=y
+
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 630098e54b7..59d3d0646c1 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -26,3 +26,6 @@ FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
 FW_PAYLOAD_FDT_ADDR=0x82200000
+
+# External Libraries to include
+PLATFORM_INCLUDE_LIBC=y
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 927422c16d1..bb162e01942 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -26,3 +26,6 @@ FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
 FW_PAYLOAD_FDT_ADDR=0x82200000
+
+# External Libraries to include
+PLATFORM_INCLUDE_LIBC=y

From 384ba7f7f12776b820452dc1978751ee7cc54cb5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 00:49:35 -0800
Subject: [PATCH 0090/1765] docs: Add licensing seciton for external projects.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 README.md | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/README.md b/README.md
index 2e45521258a..f6290467034 100644
--- a/README.md
+++ b/README.md
@@ -83,6 +83,19 @@ In addition, platform specific make command-line options to top-level make
 options are described under *`docs/platform/<platform_name>.md`* and
 *`docs/firmware/<firmware_name>.md`*.
 
+License
+-------------
+The software is provided under a BSD-2-Clause license. Contributions to this
+project are accepted under the same license with developer sign-off as
+described in the [Contributing Guidelines] [docs/contributing.md].
+
+This project also contains code from other projects as listed below. The original
+license text is included in those source files.
+
+1. The libfdt source code is disjunctively dual licensed (GPL-2.0+ OR BSD-2-Clause). It is
+   used by this project under the terms of the BSD-2-Clause license. Any contributions to
+   this code must be made under the terms of both licenses.
+
 Documentation
 -------------
 

From 3075da07b69562889e27d6f702704803db1f6f72 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 00:52:02 -0800
Subject: [PATCH 0091/1765] platform: Modify DT using libfdt

Perform following DT updates.
1. Mask hart if mmu is not supported.
2. Add stdout-path under chosen node.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/sifive/fu540/platform.c | 41 ++++++++++++++++++++++++++++----
 1 file changed, 37 insertions(+), 4 deletions(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 393509b4796..d8ea0b4b5b7 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -7,8 +7,11 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
+#include <libfdt.h>
+#include <fdt.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/riscv_io.h>
 #include <plat/irqchip/plic.h>
@@ -38,18 +41,48 @@
 #define FU540_PRCI_CLKMUXSTATUSREG    		0x002C
 #define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL      (0x1 << 1)
 
+static void fu540_modify_dt(void *fdt)
+{
+	u32 i, size;
+	int chosen_offset, err;
+	int cpu_offset;
+	char cpu_node[32] = "";
+	const char *mmu_type;
+
+	for (i = 0; i < FU540_HART_COUNT; i++) {
+		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
+		cpu_offset = fdt_path_offset(fdt, cpu_node);
+		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", NULL);
+		if (mmu_type && (!strcmp(mmu_type, "riscv,sv39") ||
+		    !strcmp(mmu_type,"riscv,sv48")))
+			continue;
+		else
+			fdt_setprop_string(fdt, cpu_offset, "status", "masked");
+		memset(cpu_node, 0, sizeof(cpu_node));
+	}
+	size = fdt_totalsize(fdt);
+	err = fdt_open_into(fdt, fdt, size + 256);
+	if (err < 0)
+		sbi_printf("Device Tree can't be expanded to accmodate new node");
+
+	chosen_offset = fdt_path_offset(fdt, "/chosen");
+	fdt_setprop_string(fdt, chosen_offset, "stdout-path",
+			   "/soc/serial@10010000:115200");
+
+	plic_fdt_fixup(fdt, "riscv,plic0", 0);
+
+	for (i = 1; i < FU540_HART_COUNT; i++)
+		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
+}
 static int fu540_final_init(u32 hartid, bool cold_boot)
 {
-	u32 i;
 	void *fdt;
 
 	if (!cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0", 0);
-	for (i = 1; i < FU540_HART_COUNT; i++)
-		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
+	fu540_modify_dt(fdt);
 
 	return 0;
 }

From e0686ca844f6c7372edd353cffe08ddee5dcf5c9 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 9 Jan 2019 01:17:41 -0800
Subject: [PATCH 0092/1765] platform: No need to pass context id for plic
 fixup.

PLIC DT entry fixup can be done by comparing external
interrupt number instead of context id. No need to invoke
fixup for each plic context.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/common/include/plat/irqchip/plic.h |  2 +-
 platform/common/irqchip/plic.c              | 13 +++++++------
 platform/qemu/sifive_u/platform.c           |  4 +---
 platform/qemu/virt/platform.c               |  4 +---
 platform/sifive/fu540/platform.c            |  5 +----
 5 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/platform/common/include/plat/irqchip/plic.h b/platform/common/include/plat/irqchip/plic.h
index d3094acc6af..79a8e5449a8 100644
--- a/platform/common/include/plat/irqchip/plic.h
+++ b/platform/common/include/plat/irqchip/plic.h
@@ -12,7 +12,7 @@
 
 #include <sbi/sbi_types.h>
 
-void plic_fdt_fixup(void *fdt, const char *compat, u32 cntx_id);
+void plic_fdt_fixup(void *fdt, const char *compat);
 
 int plic_warm_irqchip_init(u32 target_hart,
 			   int m_cntx_id, int s_cntx_id);
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 0a2a036757e..59265cfc9ca 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -8,6 +8,8 @@
  */
 
 #include <sbi/riscv_io.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
 #include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
 #include <string.h>
@@ -50,7 +52,6 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 {
 	u32 *cells;
 	u32 i, cells_count;
-	u32 *cntx_id = priv;
 
 	if (!prop)
 		return;
@@ -63,15 +64,15 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 	if (!cells_count)
 		return;
 
-	for (i = 0; i < cells_count; i++) {
-		if (((i % 2) == 1) && ((i / 2) == *cntx_id))
-			cells[i] = fdt_rev32(0xffffffff);
+	for (i = 0; i < (cells_count/2); i++) {
+		if (fdt_rev32(cells[2*i+1]) == IRQ_M_EXT)
+			cells[2*i+1] = fdt_rev32(0xffffffff);
 	}
 }
 
-void plic_fdt_fixup(void *fdt, const char *compat, u32 cntx_id)
+void plic_fdt_fixup(void *fdt, const char *compat)
 {
-	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, &cntx_id);
+	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, NULL);
 }
 
 int plic_warm_irqchip_init(u32 target_hart,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index cf6efbdabdb..91fa4a76ed3 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -31,15 +31,13 @@
 
 static int sifive_u_final_init(u32 hartid, bool cold_boot)
 {
-	u32 i;
 	void *fdt;
 
 	if (!cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	for (i = 0; i < SIFIVE_U_HART_COUNT; i++)
-		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
+	plic_fdt_fixup(fdt, "riscv,plic0");
 
 	return 0;
 }
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 71ddc759aa7..a28f9f1af0e 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -31,15 +31,13 @@
 
 static int virt_final_init(u32 hartid, bool cold_boot)
 {
-	u32 i;
 	void *fdt;
 
 	if (!cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	for (i = 0; i < VIRT_HART_COUNT; i++)
-		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
+	plic_fdt_fixup(fdt, "riscv,plic0");
 
 	return 0;
 }
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index d8ea0b4b5b7..47918036ab5 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -69,10 +69,7 @@ static void fu540_modify_dt(void *fdt)
 	fdt_setprop_string(fdt, chosen_offset, "stdout-path",
 			   "/soc/serial@10010000:115200");
 
-	plic_fdt_fixup(fdt, "riscv,plic0", 0);
-
-	for (i = 1; i < FU540_HART_COUNT; i++)
-		plic_fdt_fixup(fdt, "riscv,plic0", 2 * i - 1);
+	plic_fdt_fixup(fdt, "riscv,plic0");
 }
 static int fu540_final_init(u32 hartid, bool cold_boot)
 {

From ebfe23125666a11fd3dc14b85f5ca58b7f40276b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 18 Jan 2019 10:28:58 +0530
Subject: [PATCH 0093/1765] platform: Fix compile error caused by standard
 includes

Avoid using standard includes namely stdint.h, string.h, stdlib.h, etc.

All standard include except stddef.h give compilation error due
to differences in RISC-V toolchain configuration. Typically, the
compilation error is related to "gnu-stubs-lp64.h".

This patch fixes compile error caused by standard includes by
providing substitutes of definetions provided by standard includes
wherever required.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/common/include/plat/string.h | 39 +++++++++++++++++++++++++++
 platform/common/irqchip/plic.c        |  2 +-
 platform/common/libc/string.c         | 22 ++++++++-------
 platform/common/libfdt/libfdt_env.h   | 10 ++++---
 platform/common/tinyfdt.c             |  2 +-
 5 files changed, 60 insertions(+), 15 deletions(-)
 create mode 100644 platform/common/include/plat/string.h

diff --git a/platform/common/include/plat/string.h b/platform/common/include/plat/string.h
new file mode 100644
index 00000000000..ab09f4ecd12
--- /dev/null
+++ b/platform/common/include/plat/string.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __STRING_H__
+#define __STRING_H__
+
+#include <sbi/sbi_types.h>
+
+int strcmp(const char *a, const char *b);
+
+size_t strlen(const char *str);
+
+size_t strnlen(const char *str, size_t count);
+
+char *strcpy(char *dest,const char *src);
+
+char *strncpy(char *dest, const char *src, size_t count);
+
+char *strchr(const char *s, int c);
+
+char *strrchr(const char *s, int c);
+
+void *memset(void *s,int c,size_t count);
+
+void *memcpy(void *dest, const void *src, size_t count);
+
+void *memmove(void *dest,const void *src, size_t count);
+
+int memcmp(const void *s1,const void *s2, size_t count);
+
+void *memchr(const void *s, int c, size_t count);
+
+#endif
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 59265cfc9ca..ce2aafcd359 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -10,9 +10,9 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
+#include <plat/string.h>
 #include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
-#include <string.h>
 
 #define PLIC_PRIORITY_BASE		0x0
 #define PLIC_PENDING_BASE		0x1000
diff --git a/platform/common/libc/string.c b/platform/common/libc/string.c
index cb467a6bad7..9c094458eea 100644
--- a/platform/common/libc/string.c
+++ b/platform/common/libc/string.c
@@ -12,12 +12,13 @@
  * bugs as well. Use any optimized routines from newlib or glibc if required.
  */
 
-#include <string.h>
+#include <plat/string.h>
 
 int strcmp(const char *a, const char *b)
 {
 	/* search first diff or end of string */
 	for (; *a == *b && *a != '\0'; a++, b++);
+
 	return *a - *b;
 }
 
@@ -46,7 +47,7 @@ size_t strnlen(const char *str, size_t count)
 	return ret;
 }
 
-char * strcpy(char * dest,const char *src)
+char *strcpy(char *dest, const char *src)
 {
 	char *ret = dest;
 
@@ -57,7 +58,7 @@ char * strcpy(char * dest,const char *src)
 	return ret;
 }
 
-char * strncpy(char * dest,const char *src,size_t count)
+char *strncpy(char *dest, const char *src, size_t count)
 {
 	char *ret = dest;
 
@@ -68,7 +69,7 @@ char * strncpy(char * dest,const char *src,size_t count)
 	return ret;
 }
 
-char * strchr(const char * s, int c)
+char *strchr(const char *s, int c)
 {
 	while(*s != '\0' && *s != (char)c)
 		s++;
@@ -79,7 +80,7 @@ char * strchr(const char * s, int c)
 		return (char *)s;
 }
 
-char * strrchr(const char * s, int c)
+char *strrchr(const char *s, int c)
 {
 	const char *last = s + strlen(s);
 
@@ -91,7 +92,7 @@ char * strrchr(const char * s, int c)
 	else
 		return (char *)last;
 }
-void * memset(void * s,int c,size_t count)
+void *memset(void *s, int c, size_t count)
 {
 	char *temp = s;
 
@@ -103,7 +104,7 @@ void * memset(void * s,int c,size_t count)
 	return s;
 }
 
-void * memcpy(void *dest, const void *src, size_t count)
+void *memcpy(void *dest, const void *src, size_t count)
 {
 	char *temp1 = dest;
 	const char *temp2 = src;
@@ -116,7 +117,7 @@ void * memcpy(void *dest, const void *src, size_t count)
 	return dest;
 }
 
-void * memmove(void * dest,const void *src,size_t count)
+void *memmove(void *dest, const void *src, size_t count)
 {
 	char *temp1 = (char *)dest;
 	const char *temp2 = (char *)src;
@@ -138,13 +139,15 @@ void * memmove(void * dest,const void *src,size_t count)
 			count--;
 		}
 	}
+
 	return dest;
 }
 
-int memcmp(const void * s1,const void * s2,size_t count)
+int memcmp(const void *s1, const void *s2, size_t count)
 {
 	const char *temp1 = s1;
 	const char *temp2 = s2;
+
 	for (; count > 0 && (*temp1 == *temp2); count--) {
 		temp1++;
 		temp2++;
@@ -166,5 +169,6 @@ void *memchr(const void *s, int c, size_t count)
 		}
 		count--;
 	}
+
 	return NULL;
 }
diff --git a/platform/common/libfdt/libfdt_env.h b/platform/common/libfdt/libfdt_env.h
index eb2053845c9..235a1fc6a5f 100644
--- a/platform/common/libfdt/libfdt_env.h
+++ b/platform/common/libfdt/libfdt_env.h
@@ -52,11 +52,13 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <sbi/sbi_types.h>
+#include <plat/string.h>
+
+#define INT_MAX		((int)(~0U >> 1))
+#define UINT_MAX	((unsigned int)~0U)
+
 #include <stddef.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <limits.h>
 
 #ifdef __CHECKER__
 #define FDT_FORCE __attribute__((force))
diff --git a/platform/common/tinyfdt.c b/platform/common/tinyfdt.c
index a3c1fcf03dc..c3bf21002c8 100644
--- a/platform/common/tinyfdt.c
+++ b/platform/common/tinyfdt.c
@@ -7,8 +7,8 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
+#include <plat/string.h>
 #include <plat/tinyfdt.h>
-#include <string.h>
 
 #define FDT_MAGIC	0xd00dfeed
 #define FDT_VERSION	17

From ac3041f4e906ee75d423ac788803218db51ef343 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Mon, 14 Jan 2019 11:17:25 +0900
Subject: [PATCH 0094/1765] build: Introduce FW_PAYLOAD_ALIGN

The firmware payload offset defined by FW_PAYLOAD_OFFSET must
specify a value large enough so the the payload does not overlap
with the base firmware data, bss and text. For platforms without
any strong requirement on the payload address, introduce the
FW_PAYLOAD_ALIGN build parameter to automatically place the payload
right after the base firmware at an address aligned with the defined
value.

Either FW_PAYLOAD_OFFSET or FW_PAYLOAD_ALIGN should be defined by a
platform configuration. If both FW_PAYLOAD_OFFSET and FW_PAYLOAD_ALIGN
are defined by a platform, FW_PAYLOAD_OFFSET has precedence and is
used for building the final firmawre image.

Using FW_PAYLOAD_ALIGN=4096 with the Kendryte platform rather than
the abitrary FW_PAYLOAD_OFFSET=0x10000 value reduces the final
firmware image size by about 20KB.

Add a description of the FW_PAYLOAD_ALIGN configuration parameter in the
fw_payload documentation file as well. And while at it, also fix
various grammar and style issues in that file..

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/firmware/fw_payload.md      | 91 +++++++++++++++++++-------------
 firmware/fw_payload.elf.ldS      |  4 ++
 firmware/objects.mk              |  4 ++
 firmware/payloads/dummy.elf.ldS  |  4 ++
 platform/kendryte/k210/config.mk |  4 +-
 5 files changed, 66 insertions(+), 41 deletions(-)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 2fab092cc68..0e705a200c4 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -1,51 +1,66 @@
 OpenSBI Firmware with Payload (FW_PAYLOAD)
 ==========================================
 
-The **OpenSBI firmware with Payload (FW_PAYLOAD)** is a
-firmware which includes next booting stage binary (i.e.
-bootloader/kernel) as payload in the OpenSBI firmware binary.
+The **OpenSBI firmware with Payload (FW_PAYLOAD)** is a firmware which
+includes the next booting stage binary (i.e. bootloader/kernel) as a
+payload embedded in the OpenSBI firmware binary image.
 
-This **FW_PAYLOAD** firmware is particularly useful when
-booting stage prior to OpenSBI firmware is not capable of
-loading OpenSBI firmware and booting stage after OpenSBI
-firmware separately.
+This *FW_PAYLOAD* firmware is particularly useful when the booting stage
+prior to OpenSBI firmware is not capable of loading the OpenSBI firmware
+and the booting stage after OpenSBI firmware separately.
 
-It is also possible that booting stage prior to OpenSBI
-firmware does not pass **flattened device tree (FDT)**. In
-this case, we have provision to embed FDT in .text section
-of **FW_PAYLOAD** firmware.
+It is also possible that the booting stage prior to OpenSBI firmware
+does not pass a *flattened device tree (FDT)*. In this case, a
+*FW_PAYLOAD* firmware allows embedding a flattened device tree in
+the .text section of the final firmware.
 
 How to Enable?
 --------------
 
-The **FW_PAYLOAD** firmware can be enabled by any of the
-following methods:
+The *FW_PAYLOAD* firmware can be enabled by any of the following methods:
 
-1. Passing `FW_PAYLOAD=y` command-line parameter to
-top-level `make`
+1. Passing `FW_PAYLOAD=y` command-line parameter to top-level `make`
 2. Setting `FW_PAYLOAD=y` in platform `config.mk`
 
-Config Options
---------------
+Configuration Options
+---------------------
+
+A *FW_PAYLOAD* firmware needs to be built according to some predefined
+configuation options to work correctly. These configuration details can
+be passed as paramters to the top-level `make` command or can be defined
+ in a platform *config.mk* build configuration file.
+
+The following are the build configuration parameters for a *FW_PAYLOAD*
+firmware:
+
+* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload
+binary will be linked in the final *FW_PAYLOAD* firmware binary image.
+This configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not
+defined.  Compilation errors will result from an incorrect definition
+of *FW_PAYLOAD_OFFSET* or *FW_PAYLOAD_ALIGN*, or if neither of these
+paramreters are defined.
+
+* **FW_PAYLOAD_ALIGN** - Address alignment constraint where the payload
+binary will be linked after the end of the base firmaware binary in the
+final *FW_PAYLOAD* firmware binary image. This configuration parameter
+is mandatory if *FW_PAYLOAD_OFFSET* is not defined and should not be
+defined otherwise.
+
+* **FW_PAYLOAD_PATH** - Path to the next booting stage binary image
+file.  If this option is not provided then a simple test payload is
+automatically generated, executing a `while (1)` loop.
+
+* **FW_PAYLOAD_FDT_PATH** - Path to an external flattened device tree
+binary file to be embedded in the *.text* section of the final
+*FW_PAYLOAD* firmware. If this option is not provided and no internal
+device tree file is specified by the platform (c.f. *FW_PAYLOAD_FDT*),
+then the firmware will expect the FDT to be passed as an argument by
+the prior booting stage.
+
+* **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior
+booting stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and
+embedded in the *.text* section will be placed before executing the
+next booting stage, that is, the payload firmware. If this option is
+not provided then the firmware will pass zero as the FDT address to the
+next booting stage.
 
-We need more config details for **FW_PAYLOAD** firmware to
-work correctly. These config details can be passed as paramter
-to top-level `make` or can be set in platform `config.mk`.
-
-Following are the config options for **FW_PAYLOAD** firmware:
-
-* **FW_PAYLOAD_OFFSET** - Offset from FW_TEXT_BASE where next
-booting stage binary will be linked to **FW_PAYLOAD** firmware.
-This is a mandatory config option and will result in compile
-error if not provided.
-* **FW_PAYLOAD_PATH** - Path to the next booting stage binary.
-If this option is not provided then **`while (1)`** is taken as
-payload.
-* **FW_PAYLOAD_FDT_PATH** - Path to the FDT binary to be embedded
-in .text section of **FW_PAYLOAD** firmware. If this option is
-not provided then firmware will expect FDT to be passed by prior
-booting stage.
-* **FW_PAYLOAD_FDT_ADDR** - Address where FDT passed by prior
-booting stage (or embedded FDT) will be placed before passing
-to next booting stage. If this option is not provided then
-firmware will pass zero as FDT address to next booting stage.
\ No newline at end of file
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index 0713f436606..7106005be05 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -14,7 +14,11 @@ SECTIONS
 {
 	#include "fw_base.ldS"
 
+#ifdef FW_PAYLOAD_OFFSET
 	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
+#else
+	. = ALIGN(FW_PAYLOAD_ALIGN);
+#endif
 
 	.payload :
 	{
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 18a1fbc967d..b579ba6e72f 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -35,6 +35,10 @@ firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
 ifdef FW_PAYLOAD_OFFSET
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
 endif
+ifdef FW_PAYLOAD_ALIGN
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_ALIGN=$(FW_PAYLOAD_ALIGN)
+endif
+
 ifdef FW_PAYLOAD_FDT_PATH
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
 endif
diff --git a/firmware/payloads/dummy.elf.ldS b/firmware/payloads/dummy.elf.ldS
index b4d9f757841..d0854d5a376 100644
--- a/firmware/payloads/dummy.elf.ldS
+++ b/firmware/payloads/dummy.elf.ldS
@@ -12,7 +12,11 @@ ENTRY(_start)
 
 SECTIONS
 {
+#ifdef FW_PAYLOAD_OFFSET
 	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
+#else
+	. = ALIGN(FW_PAYLOAD_ALIGN);
+#endif
 
 	PROVIDE(_payload_start = .);
 
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index b8510cbbaef..eed8bfb2e6a 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -19,10 +19,8 @@ PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
-FW_JUMP=n
 FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x10000
-#FW_PAYLOAD_FDT_ADDR=0x80040000
+FW_PAYLOAD_ALIGN=0x1000
 
 # External Libraries to include
 PLATFORM_INCLUDE_LIBC=y

From 6939d345ab3f7c5360a7de3fb0000a9da5096f97 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 13:18:25 +0900
Subject: [PATCH 0095/1765] lib: Fix banner

Define the "OpenSBI" logo string as a macro renamed BANNER, since
it is one rather than a logo.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_init.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index b92c1fd6e6f..1f1103cc507 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -17,15 +17,15 @@
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 
-static const char *logo =
-	"   ____                    _____ ____ _____\n"
-	"  / __ \\                  / ____|  _ \\_   _|\n"
-	" | |  | |_ __   ___ _ __ | (___ | |_) || |\n"
-	" | |  | | '_ \\ / _ \\ '_ \\ \\___ \\|  _ < | |\n"
-	" | |__| | |_) |  __/ | | |____) | |_) || |_\n"
-	"  \\____/| .__/ \\___|_| |_|_____/|____/_____|\n"
-	"        | |\n"
-	"        |_|\n";
+#define BANNER \
+	"   ____                    _____ ____ _____\n" \
+	"  / __ \\                  / ____|  _ \\_   _|\n" \
+	" | |  | |_ __   ___ _ __ | (___ | |_) || |\n" \
+	" | |  | | '_ \\ / _ \\ '_ \\ \\___ \\|  _ < | |\n" \
+	" | |__| | |_) |  __/ | | |____) | |_) || |_\n" \
+	"  \\____/| .__/ \\___|_| |_|_____/|____/_____|\n" \
+	"        | |\n" \
+	"        |_|\n\n"
 
 static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
@@ -62,11 +62,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 
 	misa_string(str, sizeof(str));
-	sbi_printf("OpenSBI v%d.%d (%s %s)\n",
+	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n",
 		   OPENSBI_MAJOR, OPENSBI_MINOR,
 		   __DATE__, __TIME__);
 
-	sbi_printf("%s\n", logo);
+	sbi_printf(BANNER);
 
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));

From f4373731e386a3b410f3e8acf6620111fb339abc Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 13:45:08 +0900
Subject: [PATCH 0096/1765] lib: code cleanup

Use commonly accepted styles: newlines after declarations and before
return to make the code more readable.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 lib/sbi_console.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index 6923b9a7247..36a4414a62c 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -331,6 +331,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 	}
 	if (out)
 		**out = '\0';
+
 	return pc;
 }
 
@@ -338,9 +339,11 @@ int sbi_sprintf(char *out, const char *format, ...)
 {
 	va_list args;
 	int retval;
+
 	va_start(args, format);
 	retval = print(&out, NULL, format, args);
 	va_end(args);
+
 	return retval;
 }
 
@@ -348,9 +351,11 @@ int sbi_snprintf(char *out, u32 out_sz, const char *format, ...)
 {
 	va_list args;
 	int retval;
+
 	va_start(args, format);
 	retval = print(&out, &out_sz, format, args);
 	va_end(args);
+
 	return retval;
 }
 

From 0df82694776d4497ca3bcfb662a68fd817698e89 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 15:49:37 +0900
Subject: [PATCH 0097/1765] Makefile: Add support for device tree compilation

Add rules to compile dts files into dtb files using the device tree
compiler (dtc). A platform can specify the DTS file to compile using
the platform-dtb-y variable. The flattened device tree binary file to be
used for building the final polatform firmware can be specified using
the new FW_PAYLOAD_FDT firmware configuration option to point to the
automatically compiled FDT file. Using the existing FW_PAYLOAD_FDT_PATH
configuration option is still possible and will take precedence over
the FW_PAYLOAD_FDT definition.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 Makefile                    | 11 +++++++++++
 docs/firmware/fw_payload.md |  8 ++++++++
 firmware/external_deps.mk   |  1 +
 firmware/objects.mk         |  5 +++++
 4 files changed, 25 insertions(+)

diff --git a/Makefile b/Makefile
index 11e16344b5f..6ff0b2c469c 100644
--- a/Makefile
+++ b/Makefile
@@ -79,6 +79,7 @@ include $(firmware-object-mks)
 lib-objs-path-y=$(foreach obj,$(lib-objs-y),$(build_dir)/lib/$(obj))
 ifdef PLATFORM
 platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(build_dir)/$(platform_subdir)/$(obj))
+platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(build_dir)/$(platform_subdir)/$(obj))
 platform-common-objs-path-y=$(foreach obj,$(platform-common-objs-y),$(build_dir)/platform/common/$(obj))
 firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(build_dir)/$(platform_subdir)/firmware/$(bin))
 endif
@@ -154,6 +155,9 @@ else
 OBJCOPY		?=	objcopy
 endif
 
+DTC		=	dtc
+DTCFLAGS	=	-O dtb
+
 # Setup functions for compilation
 define dynamic_flags
 -I$(shell dirname $(2)) -D__OBJNAME__=$(subst -,_,$(shell basename $(1) .o))
@@ -212,10 +216,14 @@ compile_ar = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 compile_objcopy = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " OBJCOPY   $(subst $(build_dir)/,,$(1))"; \
 	     $(OBJCOPY) -S -O binary $(2) $(1)
+compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " DTC       $(subst $(build_dir)/,,$(1))"; \
+	     $(DTC) $(DTCFLAGS) -o $(1) $(2)
 
 targets-y  = $(build_dir)/lib/libsbi.a
 ifdef PLATFORM
 targets-y += $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
+targets-y += $(platform-dtb-path-y)
 endif
 targets-y += $(firmware-bins-path-y)
 
@@ -265,6 +273,9 @@ $(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.S
 $(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+$(build_dir)/%.dtb: $(src_dir)/%.dts
+	$(call compile_dts,$@,$<)
+
 # Rule for "make docs"
 $(build_dir)/docs/latex/refman.pdf: $(build_dir)/docs/latex/refman.tex
 	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 0e705a200c4..3a8a14d50e3 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -57,6 +57,14 @@ device tree file is specified by the platform (c.f. *FW_PAYLOAD_FDT*),
 then the firmware will expect the FDT to be passed as an argument by
 the prior booting stage.
 
+* **FW_PAYLOAD_FDT** - Path to an internal flattened device tree
+binary file defined by the platform code. The file name must match the
+DTB file name specified in the platform *objects.mk* file with the
+*platform-dtb-y* entry. This option results in *FW_PAYLOAD_FDT_PATH* to
+be automatically set. Specifying *FW_PAYLOAD_FDT_PATH* on the `make`
+command line disables *FW_PAYLOAD_FDT* and the command line specified
+device tree binary file is used for building the final firmware.
+
 * **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior
 booting stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and
 embedded in the *.text* section will be placed before executing the
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
index 3a0847e9367..c2e9e905350 100644
--- a/firmware/external_deps.mk
+++ b/firmware/external_deps.mk
@@ -8,3 +8,4 @@
 #
 
 $(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
+$(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
diff --git a/firmware/objects.mk b/firmware/objects.mk
index b579ba6e72f..1c7cc691039 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -39,6 +39,11 @@ ifdef FW_PAYLOAD_ALIGN
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_ALIGN=$(FW_PAYLOAD_ALIGN)
 endif
 
+ifndef FW_PAYLOAD_FDT_PATH
+ifdef FW_PAYLOAD_FDT
+FW_PAYLOAD_FDT_PATH=$(build_dir)/$(platform_subdir)/$(FW_PAYLOAD_FDT)
+endif
+endif
 ifdef FW_PAYLOAD_FDT_PATH
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
 endif

From 9c4aca4f1b7bfc52660589705846fc52ff7c015b Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 15:57:31 +0900
Subject: [PATCH 0098/1765] Makefile: Improve readability

Repeating "ifdef CROSS_COMPILE" multiple times does not help with
readability. Simplify by grouping compilation command setup under a
single ifdef statement.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 Makefile | 37 +++++++++++++------------------------
 1 file changed, 13 insertions(+), 24 deletions(-)

diff --git a/Makefile b/Makefile
index 6ff0b2c469c..ccaf912f125 100644
--- a/Makefile
+++ b/Makefile
@@ -101,12 +101,24 @@ GENFLAGS	+=	$(platform-common-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-# Setup compilation environment
+# Setup compilation commands
 ifdef CROSS_COMPILE
 CC		=	$(CROSS_COMPILE)gcc
+CPP		=	$(CROSS_COMPILE)cpp
+AR		=	$(CROSS_COMPILE)ar
+LD		=	$(CROSS_COMPILE)ld
+OBJCOPY		=	$(CROSS_COMPILE)objcopy
 else
 CC		?=	gcc
+CPP		?=	cpp
+AR		?=	ar
+LD		?=	ld
+OBJCOPY		?=	objcopy
 endif
+AS		=	$(CC)
+DTC		=	dtc
+
+# Setup compilation commands flags
 CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
@@ -114,16 +126,10 @@ CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
 CFLAGS		+=	$(firmware-cflags-y)
 
-ifdef CROSS_COMPILE
-CPP		=	$(CROSS_COMPILE)cpp
-else
-CPP		?=	cpp
-endif
 CPPFLAGS	+=	$(GENFLAGS)
 CPPFLAGS	+=	$(platform-cppflags-y)
 CPPFLAGS	+=	$(firmware-cppflags-y)
 
-AS		=	$(CC)
 ASFLAGS		=	-g -Wall -nostdlib -D__ASSEMBLY__
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-mno-save-restore -mstrict-align
@@ -131,31 +137,14 @@ ASFLAGS		+=	$(GENFLAGS)
 ASFLAGS		+=	$(platform-asflags-y)
 ASFLAGS		+=	$(firmware-asflags-y)
 
-ifdef CROSS_COMPILE
-AR		=	$(CROSS_COMPILE)ar
-else
-AR		?=	ar
-endif
 ARFLAGS		=	rcs
 
-ifdef CROSS_COMPILE
-LD		=	$(CROSS_COMPILE)ld
-else
-LD		?=	ld
-endif
 LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N
 LDFLAGS		+=	$(platform-ldflags-y)
 LDFLAGS		+=	$(firmware-ldflags-y)
 
 MERGEFLAGS	+=	-r
 
-ifdef CROSS_COMPILE
-OBJCOPY		=	$(CROSS_COMPILE)objcopy
-else
-OBJCOPY		?=	objcopy
-endif
-
-DTC		=	dtc
 DTCFLAGS	=	-O dtb
 
 # Setup functions for compilation

From 58d9f2983a4a1ebdbe62f7d40e10ea3bc7d6bbaf Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 13:46:31 +0900
Subject: [PATCH 0099/1765] kendryte/k210: Fix console

Clear console input when intializing it.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/uarths.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index 2a189aaddd9..f8f4974c3b8 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -35,6 +35,10 @@ void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
 	uarths->ip.rxwm = 0;
 	uarths->ie.txwm = 1;
 	uarths->ie.rxwm = 0;
+
+	/* Clear input */
+	if (!uarths->rxdata.empty)
+		(void)uarths_getc();
 }
 
 void uarths_putc(char c)
@@ -46,11 +50,11 @@ void uarths_putc(char c)
 
 char uarths_getc(void)
 {
-	struct uarths_rxdata recv = uarths->rxdata;
+	struct uarths_rxdata rx = uarths->rxdata;
 
-	if (recv.empty)
+	if (rx.empty)
 		return '\0';
 
-	return recv.data;
+	return rx.data;
 }
 

From 868ad0b0e51a5e10e77c9bd380240b98d6a133be Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Mon, 14 Jan 2019 13:00:37 +0900
Subject: [PATCH 0100/1765] kendryte/k210: Add device tree support

The Kendryte k210 board initial loader does not provide a device tree
for the firmware and subsequent payload. Add the k210.dts device tree
description file to solve this. This file describes only the SoC core
components: CPUs, memory and PLIC.

Automatically compile and add this file to the firmware generated
using the FW_PAYLOAD_FDT_PATH configuration parameter.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/config.mk  |  1 +
 platform/kendryte/k210/k210.dts   | 70 +++++++++++++++++++++++++++++++
 platform/kendryte/k210/objects.mk |  1 +
 3 files changed, 72 insertions(+)
 create mode 100644 platform/kendryte/k210/k210.dts

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index eed8bfb2e6a..14747c0c5a6 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -21,6 +21,7 @@ PLATFORM_SYS_CLINT=y
 FW_TEXT_START=0x80000000
 FW_PAYLOAD=y
 FW_PAYLOAD_ALIGN=0x1000
+FW_PAYLOAD_FDT=k210.dtb
 
 # External Libraries to include
 PLATFORM_INCLUDE_LIBC=y
diff --git a/platform/kendryte/k210/k210.dts b/platform/kendryte/k210/k210.dts
new file mode 100644
index 00000000000..17f5214f3cb
--- /dev/null
+++ b/platform/kendryte/k210/k210.dts
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Damien Le Moal <damien.lemoal@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+/dts-v1/;
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	compatible = "kendryte,k210";
+
+	chosen {
+                bootargs = "console=hvc0 earlycon=sbi";
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			clock-frequency = <390000000>;
+			i-cache-size = <32768>;
+			d-cache-size = <32768>;
+			mmu-type = "none";
+			reg = <0>;
+			riscv,isa = "rv64imafdc";
+			status = "okay";
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			clock-frequency = <390000000>;
+			d-cache-size = <32768>;
+			i-cache-size = <32768>;
+			mmu-type = "none";
+			reg = <1>;
+			riscv,isa = "rv64imafdc";
+			status = "okay";
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	memory@80000000 {
+		/* Bank 0: 4 MB, Bank 1: 2 MB, AI chip SRAM: 2MB */
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0x00000000 0x00800000>;
+	};
+
+	plic0: interrupt-controller@C000000 {
+		#interrupt-cells = <1>;
+		compatible = "riscv,plic0";
+		interrupt-controller;
+		interrupts-extended =
+			<&cpu0_intc 11 &cpu0_intc 9
+			 &cpu1_intc 11 &cpu1_intc 9>;
+		reg = <0x0 0xc000000 0x0 0x4000000>;
+	};
+};
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 1f0a20b7f8c..a8a6e353d32 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -8,3 +8,4 @@
 #
 
 platform-objs-y += uarths.o sysctl.o platform.o
+platform-dtb-y += k210.dtb

From 42283461d3f236881f67d8aa9bb8bc96decdacae Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 16:09:14 +0900
Subject: [PATCH 0101/1765] payload: rename dummy payload to test payload

Use a more neutral term more representative of this payload intent.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/firmware/fw_payload.md                       |  1 +
 firmware/objects.mk                               |  2 +-
 firmware/payloads/objects.mk                      | 10 +++++-----
 firmware/payloads/{dummy.elf.ldS => test.elf.ldS} |  0
 firmware/payloads/{dummy_head.S => test_head.S}   |  2 +-
 firmware/payloads/{dummy_main.c => test_main.c}   |  4 ++--
 6 files changed, 10 insertions(+), 9 deletions(-)
 rename firmware/payloads/{dummy.elf.ldS => test.elf.ldS} (100%)
 rename firmware/payloads/{dummy_head.S => test_head.S} (98%)
 rename firmware/payloads/{dummy_main.c => test_main.c} (83%)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 3a8a14d50e3..aff254df26a 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -35,6 +35,7 @@ firmware:
 
 * **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload
 binary will be linked in the final *FW_PAYLOAD* firmware binary image.
+<<<<<<< HEAD
 This configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not
 defined.  Compilation errors will result from an incorrect definition
 of *FW_PAYLOAD_OFFSET* or *FW_PAYLOAD_ALIGN*, or if neither of these
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 1c7cc691039..128834c20cc 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -29,7 +29,7 @@ firmware-bins-$(FW_PAYLOAD) += fw_payload.bin
 ifdef FW_PAYLOAD_PATH
 FW_PAYLOAD_PATH_FINAL=$(FW_PAYLOAD_PATH)
 else
-FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/dummy.bin
+FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/test.bin
 endif
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
 ifdef FW_PAYLOAD_OFFSET
diff --git a/firmware/payloads/objects.mk b/firmware/payloads/objects.mk
index 7e82b773055..039559953a1 100644
--- a/firmware/payloads/objects.mk
+++ b/firmware/payloads/objects.mk
@@ -7,13 +7,13 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-firmware-bins-$(FW_PAYLOAD) += payloads/dummy.bin
+firmware-bins-$(FW_PAYLOAD) += payloads/test.bin
 
-dummy-y += dummy_head.o
-dummy-y += dummy_main.o
+test-y += test_head.o
+test-y += test_main.o
 
-%/dummy.o: $(foreach obj,$(dummy-y),%/$(obj))
+%/test.o: $(foreach obj,$(test-y),%/$(obj))
 	$(call merge_objs,$@,$^)
 
-%/dummy.dep: $(foreach dep,$(dummy-y:.o=.dep),%/$(dep))
+%/test.dep: $(foreach dep,$(test-y:.o=.dep),%/$(dep))
 	$(call merge_deps,$@,$^)
diff --git a/firmware/payloads/dummy.elf.ldS b/firmware/payloads/test.elf.ldS
similarity index 100%
rename from firmware/payloads/dummy.elf.ldS
rename to firmware/payloads/test.elf.ldS
diff --git a/firmware/payloads/dummy_head.S b/firmware/payloads/test_head.S
similarity index 98%
rename from firmware/payloads/dummy_head.S
rename to firmware/payloads/test_head.S
index 1b36319e84b..e2b5f7b9212 100644
--- a/firmware/payloads/dummy_head.S
+++ b/firmware/payloads/test_head.S
@@ -65,7 +65,7 @@ _start_warm:
 	REG_L	a0, 0(a3)
 	la	a3, _boot_a1
 	REG_L	a1, 0(a3)
-	call	dummy_main
+	call	test_main
 
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang
diff --git a/firmware/payloads/dummy_main.c b/firmware/payloads/test_main.c
similarity index 83%
rename from firmware/payloads/dummy_main.c
rename to firmware/payloads/test_main.c
index d4bc3603b02..666ce7c0af8 100644
--- a/firmware/payloads/dummy_main.c
+++ b/firmware/payloads/test_main.c
@@ -22,9 +22,9 @@ static void sbi_puts(const char *str)
 	}
 }
 
-void dummy_main(unsigned long a0, unsigned long a1)
+void test_main(unsigned long a0, unsigned long a1)
 {
-	sbi_puts("\nDummy Payload\n");
+	sbi_puts("\nTest payload running\n");
 
 	while (1)
 		wfi();

From b5be19f9e5c8f25b07375429aa5d00895a8645cc Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 18 Jan 2019 16:28:32 +0900
Subject: [PATCH 0102/1765] sbi: Add ecall helpers

Define sbi_ecall_console_puts() using sbi_ecall_console_putchar()
renamed as sbi_ecall_console_putc() and remove the hardcoded version
of the same funtion in the test payload code.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 firmware/payloads/test_main.c     | 10 +---------
 include/sbi/sbi_ecall_interface.h | 11 ++++++++++-
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index 666ce7c0af8..957f963f718 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -14,17 +14,9 @@ do {							\
 	__asm__ __volatile__ ("wfi" ::: "memory");	\
 } while (0)
 
-static void sbi_puts(const char *str)
-{
-	while (*str) {
-		SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, *str);
-		str++;
-	}
-}
-
 void test_main(unsigned long a0, unsigned long a1)
 {
-	sbi_puts("\nTest payload running\n");
+	sbi_ecall_console_puts("\nTest payload running\n");
 
 	while (1)
 		wfi();
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 53de6a4de8c..1ea26764672 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -24,7 +24,7 @@
 	register unsigned long a0 asm ("a0") = (unsigned long)(__a0);	\
 	register unsigned long a1 asm ("a1") = (unsigned long)(__a1);	\
 	register unsigned long a2 asm ("a2") = (unsigned long)(__a2);	\
-	register unsigned long a7 asm ("a7") = (unsigned long)(__num);\
+	register unsigned long a7 asm ("a7") = (unsigned long)(__num);	\
 	asm volatile ("ecall"						\
 		      : "+r" (a0)					\
 		      : "r" (a1), "r" (a2), "r" (a7)			\
@@ -36,4 +36,13 @@
 #define SBI_ECALL_1(__num, __a0)		SBI_ECALL(__num, __a0, 0, 0)
 #define SBI_ECALL_2(__num, __a0, __a1)		SBI_ECALL(__num, __a0, __a1, 0)
 
+#define sbi_ecall_console_putc(c)		\
+	SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c));
+
+static inline void sbi_ecall_console_puts(const char *str)
+{
+	while (str && *str)
+		sbi_ecall_console_putc(*str++);
+}
+
 #endif

From 1ee745fe57c3ad9db64bb31564f21a4fab101f22 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 21 Jan 2019 16:53:46 +0530
Subject: [PATCH 0103/1765] lib: Use AMO instructions whenever __riscv_atomic
 is defined

We should use AMO instructions whenever __riscv_atomic is
defined (i.e. atomics are supported). We use LR/SC only when
__riscv_atomic is not defined.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/riscv_atomic.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/lib/riscv_atomic.c b/lib/riscv_atomic.c
index 3a599f514fe..bef607f607f 100644
--- a/lib/riscv_atomic.c
+++ b/lib/riscv_atomic.c
@@ -137,16 +137,40 @@ long atomic_sub_return(atomic_t *atom, long value)
 
 long arch_atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
 {
+#ifdef __riscv_atomic
+	return __sync_val_compare_and_swap(&atom->counter, oldval, newval);
+#else
 	return cmpxchg(&atom->counter, oldval, newval);
+#endif
 }
 
 long arch_atomic_xchg(atomic_t *atom, long newval)
 {
+	/* Atomically set new value and return old value. */
+#ifdef __riscv_atomic
+	/*
+	 * The name of GCC built-in macro __sync_lock_test_and_set()
+	 * is misleading. A more appropriate name for GCC built-in
+	 * macro would be __sync_val_exchange().
+	 */
+	return __sync_lock_test_and_set(&atom->counter, newval);
+#else
 	return xchg(&atom->counter, newval);
+#endif
 }
 
 unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 				  unsigned int newval)
 {
+	/* Atomically set new value and return old value. */
+#ifdef __riscv_atomic
+	/*
+	 * The name of GCC built-in macro __sync_lock_test_and_set()
+	 * is misleading. A more appropriate name for GCC built-in
+	 * macro would be __sync_val_exchange().
+	 */
+	return __sync_lock_test_and_set(ptr, newval);
+#else
 	return xchg(ptr, newval);
+#endif
 }

From 784a4657c0957e7f9561fd2d87930ba008643c1e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 18 Jan 2019 13:35:47 -0800
Subject: [PATCH 0104/1765] lib: Move software interrupt enablement from
 firmware to lib

The secondary hart waits for an IPI signal from the boot hart to
executing boot code (hot boot). As a result, software generated
interrupts have to be enabled for secondary harts before waiting for
the boot hart boot completion IPI signal.

Enabling software generated interrupts (IPI) can be done independently
of the firmware code and moved to libsbi code so that the different
firmware do not have to implement this.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 4 ----
 lib/sbi_hart.c     | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ad6371bbb1e..5738f57e22b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -125,10 +125,6 @@ _start_warm:
 	csrw	mie, zero
 	csrw	mip, zero
 
-	/* Set MSIE bit to receive IPI */
-	li	a2, MIP_MSIP
-	csrw	mie, a2
-
 	/* Preload per-HART details
 	 * s6 -> HART ID
 	 * s7 -> HART Count
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index e8a689ed282..e12a5468b59 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -304,6 +304,10 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
 	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
 		sbi_hart_hang();
+	
+	/* Set MSIE bit to receive IPI */
+	csr_set(mie, MIP_MSIP);
+
 	do {
 		spin_lock(&coldboot_wait_bitmap_lock);
 		coldboot_wait_bitmap |= (1UL << hartid);

From 312b6bf32f51e530dd22746fe2a36d6459e29588 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 20 Jan 2019 23:23:28 -0800
Subject: [PATCH 0105/1765] lib: Add atomic bit set/clear operations.

Add addtional functionlities for set/clear bits
atomically.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h    |  2 +
 include/sbi/riscv_atomic.h | 28 +++++++++++
 include/sbi/sbi_bitops.h   | 98 ++++++++++++++++++++++++++++++++++++++
 include/sbi/sbi_bits.h     |  2 +
 lib/riscv_atomic.c         | 49 +++++++++++++++++++
 5 files changed, 179 insertions(+)
 create mode 100644 include/sbi/sbi_bitops.h

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 6e1bff75fbc..b7a8d4edb4c 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -30,6 +30,7 @@
 #define LGREG		__REG_SEL(3, 2)
 
 #if __SIZEOF_POINTER__ == 8
+#define BITS_PER_LONG		64
 #ifdef __ASSEMBLY__
 #define RISCV_PTR		.dword
 #define RISCV_SZPTR		8
@@ -40,6 +41,7 @@
 #define RISCV_LGPTR		"3"
 #endif
 #elif __SIZEOF_POINTER__ == 4
+#define BITS_PER_LONG		32
 #ifdef __ASSEMBLY__
 #define RISCV_PTR		.word
 #define RISCV_SZPTR		4
diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 775cd6f1663..0fea6bdf5c1 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -34,5 +34,33 @@ long arch_atomic_xchg(atomic_t *atom, long newval);
 
 unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 				  unsigned int newval);
+/**
+ * Set a bit in an atomic variable and return the new value.
+ * @nr : Bit to set.
+ * @atom: atomic variable to modify
+ */
+int atomic_set_bit(int nr, atomic_t *atom);
+
+/**
+ * Clear a bit in an atomic variable and return the new value.
+ * @nr : Bit to set.
+ * @atom: atomic variable to modify
+ */
+
+int atomic_clear_bit(int nr, atomic_t *atom);
+
+/**
+ * Set a bit in any address and return the new value .
+ * @nr : Bit to set.
+ * @addr: Address to modify
+ */
+int atomic_raw_set_bit(int nr, volatile unsigned long *addr);
+
+/**
+ * Clear a bit in any address and return the new value .
+ * @nr : Bit to set.
+ * @addr: Address to modify
+ */
+int atomic_raw_clear_bit(int nr, volatile unsigned long *addr);
 
 #endif
diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
new file mode 100644
index 00000000000..c7a6e884cc1
--- /dev/null
+++ b/include/sbi/sbi_bitops.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra<atish.patra@wdc.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __SBI_BITOPS_H__
+#define __SBI_BITOPS_H__
+
+#include <sbi/sbi_bits.h>
+#include <sbi/riscv_asm.h>
+
+/**
+ * ffs - Find first bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+static inline int ffs(int x)
+{
+	int r = 1;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xffff)) {
+		x >>= 16;
+		r += 16;
+	}
+	if (!(x & 0xff)) {
+		x >>= 8;
+		r += 8;
+	}
+	if (!(x & 0xf)) {
+		x >>= 4;
+		r += 4;
+	}
+	if (!(x & 3)) {
+		x >>= 2;
+		r += 2;
+	}
+	if (!(x & 1)) {
+		x >>= 1;
+		r += 1;
+	}
+	return r;
+}
+
+/**
+ * __ffs - find first bit in word.
+ * @word: The word to search
+ *
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static inline int __ffs(unsigned long word)
+{
+	int num = 0;
+
+#if BITS_PER_LONG == 64
+	if ((word & 0xffffffff) == 0) {
+		num += 32;
+		word >>= 32;
+	}
+#endif
+	if ((word & 0xffff) == 0) {
+		num += 16;
+		word >>= 16;
+	}
+	if ((word & 0xff) == 0) {
+		num += 8;
+		word >>= 8;
+	}
+	if ((word & 0xf) == 0) {
+		num += 4;
+		word >>= 4;
+	}
+	if ((word & 0x3) == 0) {
+		num += 2;
+		word >>= 2;
+	}
+	if ((word & 0x1) == 0)
+		num += 1;
+	return num;
+}
+
+/*
+ * ffz - find first zero in word.
+ * @word: The word to search
+ *
+ * Undefined if no zero exists, so code should check against ~0UL first.
+ */
+#define ffz(x)  __ffs(~(x))
+
+#endif
diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
index 2a2f2a5c63b..b9e4a1a78e0 100644
--- a/include/sbi/sbi_bits.h
+++ b/include/sbi/sbi_bits.h
@@ -26,4 +26,6 @@
 #define STR(x) XSTR(x)
 #define XSTR(x) #x
 
+#define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_LONG))
+#define BIT_WORD(nr)            ((nr) / BITS_PER_LONG)
 #endif
diff --git a/lib/riscv_atomic.c b/lib/riscv_atomic.c
index bef607f607f..4a52fc6fcac 100644
--- a/lib/riscv_atomic.c
+++ b/lib/riscv_atomic.c
@@ -8,8 +8,10 @@
  */
 
 #include <sbi/sbi_types.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
+#include <sbi/sbi_bits.h>
 
 long atomic_read(atomic_t *atom)
 {
@@ -174,3 +176,50 @@ unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 	return xchg(ptr, newval);
 #endif
 }
+
+#if (BITS_PER_LONG == 64)
+#define __AMO(op)	"amo" #op ".d"
+#elif (BITS_PER_LONG == 32)
+#define __AMO(op)	"amo" #op ".w"
+#else
+#error "Unexpected BITS_PER_LONG"
+#endif
+
+#define __atomic_op_bit_ord(op, mod, nr, addr, ord)		\
+({								\
+	unsigned long __res, __mask;				\
+	__mask = BIT_MASK(nr);					\
+	__asm__ __volatile__ (					\
+		__AMO(op) #ord " %0, %2, %1"			\
+		: "=r" (__res), "+A" (addr[BIT_WORD(nr)])	\
+		: "r" (mod(__mask))				\
+		: "memory");					\
+	__res;							\
+})
+
+#define __atomic_op_bit(op, mod, nr, addr) 			\
+	__atomic_op_bit_ord(op, mod, nr, addr, .aqrl)
+
+/* Bitmask modifiers */
+#define __NOP(x)	(x)
+#define __NOT(x)	(~(x))
+
+inline int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
+{
+	return __atomic_op_bit(or, __NOP, nr, addr);
+}
+
+inline int atomic_raw_clear_bit(int nr, volatile unsigned long *addr)
+{
+	return __atomic_op_bit(and, __NOT, nr, addr);
+}
+
+inline int atomic_set_bit(int nr, atomic_t *atom)
+{
+	return atomic_raw_set_bit(nr, (unsigned long *)&atom->counter);
+}
+
+inline int atomic_clear_bit(int nr, atomic_t *atom)
+{
+	return atomic_raw_clear_bit(nr, (unsigned long *)&atom->counter);
+}

From b9c517f5593716d11013bef5fa25f037734327b7 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 20 Jan 2019 23:24:26 -0800
Subject: [PATCH 0106/1765] lib: Fix ipi type update

IPIs are updated in scratch space by source hart.
However, different harts or same hart may want to
send different IPIs before previous IPI was read
by the target hart. Currently, previous IPI type
is overwritten in that case.

Use atomic bit set/clear operations to update IPIs.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_ipi.c | 43 +++++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 423a9a0984d..1b7407061d8 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -9,7 +9,10 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_barrier.h>
+#include <sbi/riscv_atomic.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
@@ -30,7 +33,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 	for (i = 0, m = mask; m; i++, m >>= 1) {
 		if ((m & 1) && (i != hartid) && !sbi_platform_hart_disabled(plat, hartid)) {
 			oth = sbi_hart_id_to_scratch(scratch, i);
-			oth->ipi_type = event;
+			atomic_raw_set_bit(event, &oth->ipi_type);
 			mb();
 			sbi_platform_ipi_inject(plat, i, hartid);
 			if (event != SBI_IPI_EVENT_SOFT)
@@ -49,23 +52,31 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid)
 void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	volatile unsigned long ipi_type;
+	unsigned int ipi_event;
 
 	sbi_platform_ipi_clear(plat, hartid);
-	switch (scratch->ipi_type) {
-	case SBI_IPI_EVENT_SOFT:
-		csr_set(mip, MIP_SSIP);
-		break;
-	case SBI_IPI_EVENT_FENCE_I:
-		__asm__ __volatile("fence.i");
-		break;
-	case SBI_IPI_EVENT_SFENCE_VMA:
-		__asm__ __volatile("sfence.vma");
-		break;
-	case SBI_IPI_EVENT_HALT:
-		sbi_hart_hang();
-		break;
-	};
-	scratch->ipi_type = 0;
+
+	do {
+		ipi_type = scratch->ipi_type;
+		rmb();
+		ipi_event = __ffs(ipi_type);
+		switch (ipi_event) {
+		case SBI_IPI_EVENT_SOFT:
+			csr_set(mip, MIP_SSIP);
+			break;
+		case SBI_IPI_EVENT_FENCE_I:
+			__asm__ __volatile("fence.i");
+			break;
+		case SBI_IPI_EVENT_SFENCE_VMA:
+			__asm__ __volatile("sfence.vma");
+			break;
+		case SBI_IPI_EVENT_HALT:
+			sbi_hart_hang();
+			break;
+		};
+		ipi_type = atomic_raw_clear_bit(ipi_event, &scratch->ipi_type);
+	} while(ipi_type > 0);
 }
 
 int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)

From bc545539d2f2842c12c8b16d898a21113ce70417 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 21 Jan 2019 17:54:00 -0800
Subject: [PATCH 0107/1765] lib: Allow sending IPI to self.

S-mode software may send IPI to self. For example,
tlbflush may be executed for the same hart.

Let the hart send IPI to itself. It's an overhead
but doesn't break anything. However, if we don't
allow it, it breaks if S-mode keep sending IPIs.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_ipi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 1b7407061d8..a6120279513 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -31,7 +31,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 
 	/* send IPIs to everyone */
 	for (i = 0, m = mask; m; i++, m >>= 1) {
-		if ((m & 1) && (i != hartid) && !sbi_platform_hart_disabled(plat, hartid)) {
+		if ((m & 1) && !sbi_platform_hart_disabled(plat, hartid)) {
 			oth = sbi_hart_id_to_scratch(scratch, i);
 			atomic_raw_set_bit(event, &oth->ipi_type);
 			mb();

From 023aa6bb043420cd215379a0b31b8aceef38807b Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 21 Jan 2019 18:17:45 -0800
Subject: [PATCH 0108/1765] lib: Do not access mi/edeleg register if S mode is
 not present.

As per the RISC-V ISA, mideleg and medeleg registers should not exist
if S-mode is not present for a hart.

We shouldn't access these CSRs if non S-mode harts.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_hart.c | 28 +++++++++++++---------------
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index e12a5468b59..7e5df72752e 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -82,21 +82,19 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long interrupts, exceptions;
 
-	if (!misa_extension('S')) {
-		/* No delegation possible */
-		interrupts = 0;
-		exceptions = 0;
-	} else {
-		/* Send M-mode interrupts and most exceptions to S-mode */
-		interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
-		exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
-			     (1U << CAUSE_BREAKPOINT) |
-			     (1U << CAUSE_USER_ECALL);
-		if (sbi_platform_has_mfaults_delegation(plat))
-			exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
-				      (1U << CAUSE_LOAD_PAGE_FAULT) |
-				      (1U << CAUSE_STORE_PAGE_FAULT);
-	}
+	if (!misa_extension('S'))
+		/* No delegation possible as mideleg does not exist*/
+		return 0;
+
+	/* Send M-mode interrupts and most exceptions to S-mode */
+	interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
+	exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
+		     (1U << CAUSE_BREAKPOINT) |
+		     (1U << CAUSE_USER_ECALL);
+	if (sbi_platform_has_mfaults_delegation(plat))
+		exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
+			      (1U << CAUSE_LOAD_PAGE_FAULT) |
+			      (1U << CAUSE_STORE_PAGE_FAULT);
 
 	csr_write(mideleg, interrupts);
 	csr_write(medeleg, exceptions);

From ac003ff6bfead5737638888431fa646d707e246b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 21 Jan 2019 11:01:14 +0530
Subject: [PATCH 0109/1765] docs: Add OpenSBI version to doxygen.cfg

The PDF document generated by doxygen should have OpenSBI version
hence this patch adds OpenSBI version to doxygen.cfg.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile         | 2 +-
 docs/doxygen.cfg | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index ccaf912f125..5e1351f6f3a 100644
--- a/Makefile
+++ b/Makefile
@@ -274,7 +274,7 @@ $(build_dir)/docs/latex/refman.tex: $(build_dir)/docs/doxygen.cfg
 	$(CMD_PREFIX)doxygen $(build_dir)/docs/doxygen.cfg
 $(build_dir)/docs/doxygen.cfg: $(src_dir)/docs/doxygen.cfg
 	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
-	$(CMD_PREFIX)cat docs/doxygen.cfg | sed -e "s#@@SRC_DIR@@#$(src_dir)#" -e "s#@@BUILD_DIR@@#$(build_dir)#" > $(build_dir)/docs/doxygen.cfg
+	$(CMD_PREFIX)cat docs/doxygen.cfg | sed -e "s#@@SRC_DIR@@#$(src_dir)#" -e "s#@@BUILD_DIR@@#$(build_dir)#" -e "s#@@OPENSBI_MAJOR@@#$(MAJOR)#" -e "s#@@OPENSBI_MINOR@@#$(MINOR)#" > $(build_dir)/docs/doxygen.cfg
 .PHONY: docs
 docs: $(build_dir)/docs/latex/refman.pdf
 
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 344b0851f80..484090b06b6 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -38,7 +38,7 @@ PROJECT_NAME           = "RISC-V OpenSBI"
 # could be handy for archiving the generated documentation or if some version
 # control system is used.
 
-PROJECT_NUMBER         = 
+PROJECT_NUMBER         = "v@@OPENSBI_MAJOR@@.@@OPENSBI_MINOR@@"
 
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a

From f37f7e21e078187ac314fdb7339f5946d9cc426e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 21 Jan 2019 11:05:36 +0530
Subject: [PATCH 0110/1765] Makefile: Don't install generic headers under
 <install_dir>/platform

We don't need to install generic headers separately for every
platforn under <install_dir>/platform. It is unnecessary duplication
of files hence updating install_libplatsbi in top-level makefile.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Makefile b/Makefile
index 5e1351f6f3a..9823899115c 100644
--- a/Makefile
+++ b/Makefile
@@ -304,7 +304,6 @@ install_libsbi: $(build_dir)/lib/libsbi.a
 
 .PHONY: install_libplatsbi
 install_libplatsbi: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
-	$(call inst_header_dir,$(install_dir)/$(platform_subdir)/include,$(include_dir)/sbi)
 	$(call inst_file,$(install_dir)/$(platform_subdir)/lib/libplatsbi.a,$(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares

From 3fde8f3f644396bb2c664b474a4eaa4205acf639 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 11:06:31 +0530
Subject: [PATCH 0111/1765] lib: Update documentation of sbi_init()

We don't need to pre-enable MSIP in MIE CSR when
calling sbi_init() from firmware. This patch updates
documentation accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 1f1103cc507..35a543e0a2e 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -147,7 +147,7 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
  * 2. Stack pointer (SP) is setup for current HART
  * 3. Interrupts are disabled in MSTATUS CSR
- * 4. All interrupts are disabled in MIE CSR except MSIP
+ * 4. All interrupts are disabled in MIE CSR
  *
  * @param scratch pointer to sbi_scratch of current HART
  */

From 5c2ab99971dfbf9645da91e20c21f20e2648e192 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 21 Jan 2019 23:23:23 +0530
Subject: [PATCH 0112/1765] lib: Add doxygen style documentation for
 sbi_platform

This patch adds doxygen style documenation for struct sbi_platform
and related functions/macros/defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h | 243 +++++++++++++++++++++++++++++++++++--
 lib/sbi_trap.c             |   2 +-
 2 files changed, 235 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 43fb4ea8c5f..2a263462d1b 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -10,24 +10,36 @@
 #ifndef __SBI_PLATFORM_H__
 #define __SBI_PLATFORM_H__
 
+/** Offset of name in struct sbi_platform */
 #define SBI_PLATFORM_NAME_OFFSET		(0x0)
+/** Offset of features in struct sbi_platform */
 #define SBI_PLATFORM_FEATURES_OFFSET		(0x40)
+/** Offset of hart_count in struct sbi_platform */
 #define SBI_PLATFORM_HART_COUNT_OFFSET		(0x48)
+/** Offset of hart_stack_size in struct sbi_platform */
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET	(0x4c)
 
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_scratch.h>
 
+/** Possible feature flags of a platform */
 enum sbi_platform_features {
+	/** Platform has MMIO based timer */
 	SBI_PLATFORM_HAS_MMIO_TIMER_VALUE	= (1 << 0),
+	/** Platform has HART hotplug support */
 	SBI_PLATFORM_HAS_HART_HOTPLUG		= (1 << 1),
+	/** Platform has PMP support */
 	SBI_PLATFORM_HAS_PMP			= (1 << 2),
+	/** Platform has S-mode counter enable */
 	SBI_PLATFORM_HAS_SCOUNTEREN		= (1 << 3),
+	/** Platform has M-mode counter enable */
 	SBI_PLATFORM_HAS_MCOUNTEREN		= (1 << 4),
+	/** Platform has fault delegation support */
 	SBI_PLATFORM_HAS_MFAULTS_DELEGATION	= (1 << 5),
 };
 
+/** Default feature set for a platform */
 #define SBI_PLATFORM_DEFAULT_FEATURES	\
 	(SBI_PLATFORM_HAS_MMIO_TIMER_VALUE | \
 	 SBI_PLATFORM_HAS_PMP | \
@@ -35,50 +47,99 @@ enum sbi_platform_features {
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
+/** Representation of a platform */
 struct sbi_platform {
+	/** Name of the platform */
 	char name[64];
+	/** Supported features */
 	u64 features;
+	/** Total number of HARTs */
 	u32 hart_count;
+	/** Per-HART stack size for exception/interrupt handling */
 	u32 hart_stack_size;
+	/** Mask representing the set of disabled HARTs */
 	u64 disabled_hart_mask;
+
+	/** Platform early initialization */
 	int (*early_init)(u32 hartid, bool cold_boot);
+	/** Platform final initialization */
 	int (*final_init)(u32 hartid, bool cold_boot);
+
+	/** Get number of PMP regions for given HART */
 	u32 (*pmp_region_count)(u32 hartid);
+	/**
+	 * Get PMP regions details (namely: protection, base address,
+	 * and size) for given HART
+	 */
 	int (*pmp_region_info)(u32 hartid, u32 index,
 			       ulong *prot, ulong *addr, ulong *log2size);
+
+	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
+	/** Read a character from the platform console input */
 	char (*console_getc)(void);
+	/** Initialize the platform console */
 	int (*console_init)(void);
+
+	/** Initialize the platform interrupt controller */
 	int (*irqchip_init)(u32 hartid, bool cold_boot);
+
+	/** Inject IPI to a target HART */
 	void (*ipi_inject)(u32 target_hart, u32 source_hart);
+	/** Wait for target HART to acknowledge IPI */
 	void (*ipi_sync)(u32 target_hart, u32 source_hart);
+	/** Clear IPI for a target HART */
 	void (*ipi_clear)(u32 target_hart);
+	/** Initialize IPI for given HART */
 	int (*ipi_init)(u32 hartid, bool cold_boot);
+
+	/** Get MMIO timer value */
 	u64 (*timer_value)(void);
-	void (*timer_event_stop)(u32 target_hart);
+	/** Start MMIO timer event for a target HART */
 	void (*timer_event_start)(u32 target_hart, u64 next_event);
+	/** Stop MMIO timer event for a target HART */
+	void (*timer_event_stop)(u32 target_hart);
+	/** Initialize MMIO timer for given HART */
 	int (*timer_init)(u32 hartid, bool cold_boot);
+
+	/** Reboot the platform */
 	int (*system_reboot)(u32 type);
+	/** Shutdown or poweroff the platform */
 	int (*system_shutdown)(u32 type);
-} __attribute__((packed));
+} __packed;
 
+/** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s)	\
 	((struct sbi_platform *)((__s)->platform_addr))
+/** Get pointer to sbi_platform for current HART */
 #define sbi_platform_thishart_ptr()	\
 	((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
+/** Check whether the platform supports MMIO timer */
 #define sbi_platform_has_mmio_timer_value(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_MMIO_TIMER_VALUE)
+/** Check whether the platform supports HART hotplug */
 #define sbi_platform_has_hart_hotplug(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
+/** Check whether the platform has PMP support */
 #define sbi_platform_has_pmp(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_PMP)
+/** Check whether the platform supports scounteren CSR */
 #define sbi_platform_has_scounteren(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN)
+/** Check whether the platform supports mcounteren CSR */
 #define sbi_platform_has_mcounteren(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN)
+/** Check whether the platform supports fault delegation */
 #define sbi_platform_has_mfaults_delegation(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
+/**
+ * Get name of the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return pointer to platform name on success and NULL on failure
+ */
 static inline const char *sbi_platform_name(struct sbi_platform *plat)
 {
 	if (plat)
@@ -86,6 +147,14 @@ static inline const char *sbi_platform_name(struct sbi_platform *plat)
 	return NULL;
 }
 
+/**
+ * Check whether the given HART is disabled
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return TRUE if HART is disabled and FALSE otherwise
+ */
 static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat, u32 hartid)
 {
 	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
@@ -93,6 +162,14 @@ static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat, u32 har
 	else
 		return 0;
 }
+
+/**
+ * Get total number of HARTs supported by the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return total number of HARTs
+ */
 static inline u32 sbi_platform_hart_count(struct sbi_platform *plat)
 {
 	if (plat)
@@ -100,6 +177,13 @@ static inline u32 sbi_platform_hart_count(struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Get per-HART stack size for exception/interrupt handling
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return stack size in bytes
+ */
 static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
 {
 	if (plat)
@@ -107,6 +191,15 @@ static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Early initialization of a given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_early_init(struct sbi_platform *plat,
 					  u32 hartid, bool cold_boot)
 {
@@ -115,6 +208,15 @@ static inline int sbi_platform_early_init(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Final initialization of a HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_final_init(struct sbi_platform *plat,
 					  u32 hartid, bool cold_boot)
 {
@@ -123,6 +225,14 @@ static inline int sbi_platform_final_init(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Get the number of PMP regions of a HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return number of PMP regions
+ */
 static inline u32 sbi_platform_pmp_region_count(struct sbi_platform *plat,
 						u32 hartid)
 {
@@ -131,6 +241,19 @@ static inline u32 sbi_platform_pmp_region_count(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Get PMP regions details (namely: protection, base address,
+ * and size) of a HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param index index of PMP region for which we want details
+ * @param prot output pointer for PMP region protection
+ * @param addr output pointer for PMP region base address
+ * @param log2size output pointer for log-of-2 PMP region size
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_pmp_region_info(struct sbi_platform *plat,
 					       u32 hartid, u32 index,
 					       ulong *prot, ulong *addr,
@@ -142,6 +265,12 @@ static inline int sbi_platform_pmp_region_info(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Write a character to the platform console output
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param ch character to write
+ */
 static inline void sbi_platform_console_putc(struct sbi_platform *plat,
 					     char ch)
 {
@@ -149,6 +278,13 @@ static inline void sbi_platform_console_putc(struct sbi_platform *plat,
 		plat->console_putc(ch);
 }
 
+/**
+ * Read a character from the platform console input
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return character read from console input
+ */
 static inline char sbi_platform_console_getc(struct sbi_platform *plat)
 {
 	if (plat && plat->console_getc)
@@ -156,6 +292,13 @@ static inline char sbi_platform_console_getc(struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Initialize the platform console
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_console_init(struct sbi_platform *plat)
 {
 	if (plat && plat->console_init)
@@ -163,6 +306,15 @@ static inline int sbi_platform_console_init(struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Initialize the platform interrupt controller for given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
 					    u32 hartid, bool cold_boot)
 {
@@ -171,6 +323,12 @@ static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Inject IPI to a target HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param target_hart HART ID of IPI target
+ */
 static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
 					   u32 target_hart, u32 source_hart)
 {
@@ -178,6 +336,13 @@ static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
 		plat->ipi_inject(target_hart, source_hart);
 }
 
+/**
+ * Wait for target HART to acknowledge IPI
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param target_hart HART ID of IPI target
+ * @param source_hart HART ID of IPI source
+ */
 static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
 					 u32 target_hart, u32 source_hart)
 {
@@ -185,6 +350,12 @@ static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
 		plat->ipi_sync(target_hart, source_hart);
 }
 
+/**
+ * Clear IPI for a target HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param target_hart HART ID of IPI target
+ */
 static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
 					  u32 target_hart)
 {
@@ -192,6 +363,15 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
 		plat->ipi_clear(target_hart);
 }
 
+/**
+ * Initialize the platform IPI support for given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
 					u32 hartid, bool cold_boot)
 {
@@ -200,6 +380,13 @@ static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Get MMIO timer value
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 64bit timer value
+ */
 static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
 {
 	if (plat && plat->timer_value)
@@ -207,13 +394,13 @@ static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
 	return 0;
 }
 
-static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat,
-						 u32 target_hart)
-{
-	if (plat && plat->timer_event_stop)
-		plat->timer_event_stop(target_hart);
-}
-
+/**
+ * Start MMIO timer event for a target HART
+ *
+ * @param plat pointer to struct struct sbi_platform
+ * @param target_hart HART ID of timer event target
+ * @param next_event timer value when timer event will happen
+ */
 static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
 						  u32 target_hart,
 						  u64 next_event)
@@ -222,6 +409,28 @@ static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
 		plat->timer_event_start(target_hart, next_event);
 }
 
+/**
+ * Stop MMIO timer event for a target HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param target_hart HART ID of timer event target
+ */
+static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat,
+						 u32 target_hart)
+{
+	if (plat && plat->timer_event_stop)
+		plat->timer_event_stop(target_hart);
+}
+
+/**
+ * Initialize the platform MMIO timer for given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_timer_init(struct sbi_platform *plat,
 					  u32 hartid, bool cold_boot)
 {
@@ -230,6 +439,14 @@ static inline int sbi_platform_timer_init(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Reboot the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param type type of reboot
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_system_reboot(struct sbi_platform *plat,
 					     u32 type)
 {
@@ -238,6 +455,14 @@ static inline int sbi_platform_system_reboot(struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Shutdown or poweroff the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param type type of shutdown or poweroff
+ *
+ * @return 0 on success and negative error code on failure
+ */
 static inline int sbi_platform_system_shutdown(struct sbi_platform *plat,
 					       u32 type)
 {
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 9f212c1fd7f..3c0166061c9 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -75,7 +75,7 @@ static void __noreturn sbi_trap_error(const char *msg,
  * @param cause exception cause for lower privledge mode
  * @param tval trap value for lower privledge mode
  *
- * Returns 0 on success and error code (< 0) on failure
+ * @return 0 on success and negative error code on failure
  */
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch,

From 689c31f418f033c4051d5b6ddb76e0e3381b77d9 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 21 Jan 2019 22:14:16 +0800
Subject: [PATCH 0113/1765] top: Fix broken links in top-level README.md

There are 2 markdown links that are currently broken in top-level
README.md. Fix them so that github could render the URL correctly.

This also fixes "No newline at end of file" warning.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 README.md | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index f6290467034..1e0152d277d 100644
--- a/README.md
+++ b/README.md
@@ -87,7 +87,7 @@ License
 -------------
 The software is provided under a BSD-2-Clause license. Contributions to this
 project are accepted under the same license with developer sign-off as
-described in the [Contributing Guidelines] [docs/contributing.md].
+described in the [Contributing Guidelines](docs/contributing.md).
 
 This project also contains code from other projects as listed below. The original
 license text is included in those source files.
@@ -109,10 +109,11 @@ as follows.
 * *`docs/firmware/<firmware_name>.md`* - Documentation for the firmware *<firmware_name>*
 
 The source code is also well documented. For source level documentation,
-doxygen style is used. Please refer to [Doxygen manual]
-(http://www.stack.nl/~dimitri/doxygen/manual.html) for details on this
+doxygen style is used. Please refer to [Doxygen manual] for details on this
 format.
 
+[Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
+
 The Doxygen can be installed on your debian build system using following:
 ```
 sudo apt-get install doxygen doxygen-latex doxygen-doc doxygen-gui graphviz
@@ -134,4 +135,4 @@ or
 make I=<install_directory> install_docs
 ```
 
-**NOTE:** `refman.pdf` will be installed under `<install_directory>/docs`.
\ No newline at end of file
+**NOTE:** `refman.pdf` will be installed under `<install_directory>/docs`.

From d9c06d0a8d3efd00e490d9cd068247edb5aa4d18 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 21 Jan 2019 22:29:59 +0800
Subject: [PATCH 0114/1765] docs: Fix nits in firmware/fw_jump.md

Add a space before (FW_JUMP) to make it more readable.

This also fixes "No newline at end of file" warning.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/firmware/fw_jump.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index ee6ad0d8780..d45f926b396 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -1,5 +1,5 @@
-OpenSBI Firmware with Jump Address(FW_JUMP)
-===========================================
+OpenSBI Firmware with Jump Address (FW_JUMP)
+============================================
 
 The **OpenSBI firmware with Jump Address (FW_JUMP)** is a
 firmware which only know the address of next booting stage
@@ -34,4 +34,4 @@ in compile error if not provided.
 * **FW_JUMP_FDT_ADDR** - Address where FDT passed by prior
 booting stage will be placed before passing to next booting
 stage. If this option is not provided then firmware will pass
-zero as FDT address to next booting stage.
\ No newline at end of file
+zero as FDT address to next booting stage.

From f293d21863c5b23dcb4b151c2fd879696830e0bc Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 21 Jan 2019 00:01:23 -0800
Subject: [PATCH 0115/1765] docs: Typo fixes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 README.md                   |  8 ++++----
 docs/contributing.md        | 12 ++++++------
 docs/firmware/fw_jump.md    | 14 ++++++++------
 docs/firmware/fw_payload.md |  8 ++++----
 4 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/README.md b/README.md
index 1e0152d277d..f63f202e030 100644
--- a/README.md
+++ b/README.md
@@ -14,7 +14,7 @@ by the RISC-V Foundation in [Github](https://github.com/riscv/riscv-sbi-doc)
 OpenSBI aims to provides an open-source and extensible implementation of
 the RISC-V SBI specification for case 1 mentioned above. OpenSBI
 implementation can be easily extended by RISC-V platform or System-on-Chip
-vendors to fit a particular hadware configuration.
+vendors to fit a particular hardware configuration.
 
 OpenSBI provides three components:
 
@@ -99,7 +99,7 @@ license text is included in those source files.
 Documentation
 -------------
 
-A more detailed documenation is under the *docs* directory and organized
+A more detailed documentation is under the *docs* directory and organized
 as follows.
 
 * *`docs/contributing.md`* - Guidelines for contributing to OpenSBI project
@@ -119,7 +119,7 @@ The Doxygen can be installed on your debian build system using following:
 sudo apt-get install doxygen doxygen-latex doxygen-doc doxygen-gui graphviz
 ```
 
-To build a consolidated `refman.pdf` of all documenation, run:
+To build a consolidated `refman.pdf` of all documentation, run:
 ```
 make docs
 or
@@ -128,7 +128,7 @@ make O=<build_directory> docs
 
 **NOTE:** `refman.pdf` will be available under `<build_directory>/docs/latex`.
 
-To install a consolidated `refman.pdf` of all documenation, run:
+To install a consolidated `refman.pdf` of all documentation, run:
 ```
 make install_docs
 or
diff --git a/docs/contributing.md b/docs/contributing.md
index 6f0de1b0c8f..a17c548357e 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,13 +1,13 @@
 OpenSBI Contributing Guidelines
 ===============================
 
-All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to the main repo avaliable at: https://github.com/riscv/opensbi
+All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to the main repository avaliable at: https://github.com/riscv/opensbi
 
 As well as that all work must follow the following rules:
 1. We follow the [Linux coding style](https://www.kernel.org/doc/html/v4.10/process/coding-style.html). This means that ALL patches must include the Signed-off-by line.
-2. Commit subject must have atleast one ":" prefix. Common ones are "lib:", "platform:", "firmware:", "docs:" and "top:".
-3. Maintainer should prefer "Rebase and Merge" when using GitHub to merge pull requests. Avoid create extra merge commits.
-4. Maintainer should avoid creating branches directly in main riscv/opensbi repo. Instead prefer fork of GitHub riscv/opensbi repo and create branches in your own fork for pull requests.
+2. Commit subject must have at least one ":" prefix. Common ones are "lib:", "platform:", "firmware:", "docs:" and "top:".
+3. Maintainer should use "Rebase and Merge" when using GitHub to merge pull requests to avoid unnecessary merge commits.
+4. Maintainer should avoid creating branches directly in main riscv/opensbi repository. Instead prefer fork of GitHub riscv/opensbi repository and create branches in your own fork for pull requests.
 5. Maintainer cannot merge his own pull requests on GitHub.
-6. A pull request must get atleast one review from relevant maintainer.
-7. A pull request must spend atleast 24 hours in review so that everyone gets a chance to review.
+6. A pull request must get at least one review from relevant maintainer.
+7. A pull request must spend at least 24 hours in review so that everyone gets a chance to review.
diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index d45f926b396..c776aa9b629 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -23,15 +23,17 @@ Config Options
 --------------
 
 We need more config details for **FW_JUMP** firmware to work
-correctly. These config details can be passed as paramter to
+correctly. These configuration details can be passed as parameters to
 top-level `make` or can be set in platform `config.mk`.
 
-Following are the config options for **FW_JUMP** firmware:
+Following are the configuration options for a **FW_JUMP** firmware:
 
 * **FW_JUMP_ADDR** - Address where next booting stage is
 located. This is a mandatory config option and will result
 in compile error if not provided.
-* **FW_JUMP_FDT_ADDR** - Address where FDT passed by prior
-booting stage will be placed before passing to next booting
-stage. If this option is not provided then firmware will pass
-zero as FDT address to next booting stage.
+
+* **FW_JUMP_FDT_ADDR** - Address where the FDT passed by the prior
+booting stage will be placed before passing to the next booting
+stage. If this option is not provided then the firmware will pass
+zero as the FDT address to the next booting stage.
+>>>>>>> 2c0dc4dc... docs: Typo fixes.
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index aff254df26a..2dee2969dc7 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -26,8 +26,8 @@ Configuration Options
 ---------------------
 
 A *FW_PAYLOAD* firmware needs to be built according to some predefined
-configuation options to work correctly. These configuration details can
-be passed as paramters to the top-level `make` command or can be defined
+configuration options to work correctly. These configuration details can
+be passed as parameters to the top-level `make` command or can be defined
  in a platform *config.mk* build configuration file.
 
 The following are the build configuration parameters for a *FW_PAYLOAD*
@@ -39,10 +39,10 @@ binary will be linked in the final *FW_PAYLOAD* firmware binary image.
 This configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not
 defined.  Compilation errors will result from an incorrect definition
 of *FW_PAYLOAD_OFFSET* or *FW_PAYLOAD_ALIGN*, or if neither of these
-paramreters are defined.
+parameters are defined.
 
 * **FW_PAYLOAD_ALIGN** - Address alignment constraint where the payload
-binary will be linked after the end of the base firmaware binary in the
+binary will be linked after the end of the base firmware binary in the
 final *FW_PAYLOAD* firmware binary image. This configuration parameter
 is mandatory if *FW_PAYLOAD_OFFSET* is not defined and should not be
 defined otherwise.

From fea9e2b5f37446845bec3cc9e2edd6f8308c2332 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 13:52:25 +0530
Subject: [PATCH 0116/1765] lib: Remove hartid paramter from early_init() and
 final_init() callbacks

We simplify early_init() and final_init() callbacks of sbi_platform
by removing "hartid" parameter.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 20 +++++++++-----------
 include/sbi/sbi_system.h          |  6 ++----
 lib/sbi_init.c                    |  8 ++++----
 lib/sbi_system.c                  | 10 ++++------
 platform/qemu/sifive_u/platform.c |  2 +-
 platform/qemu/virt/platform.c     |  2 +-
 platform/sifive/fu540/platform.c  |  2 +-
 7 files changed, 22 insertions(+), 28 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 2a263462d1b..d3b083e7464 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -61,9 +61,9 @@ struct sbi_platform {
 	u64 disabled_hart_mask;
 
 	/** Platform early initialization */
-	int (*early_init)(u32 hartid, bool cold_boot);
+	int (*early_init)(bool cold_boot);
 	/** Platform final initialization */
-	int (*final_init)(u32 hartid, bool cold_boot);
+	int (*final_init)(bool cold_boot);
 
 	/** Get number of PMP regions for given HART */
 	u32 (*pmp_region_count)(u32 hartid);
@@ -155,12 +155,12 @@ static inline const char *sbi_platform_name(struct sbi_platform *plat)
  *
  * @return TRUE if HART is disabled and FALSE otherwise
  */
-static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat, u32 hartid)
+static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat,
+					      u32 hartid)
 {
 	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
 		return 1;
-	else
-		return 0;
+	return 0;
 }
 
 /**
@@ -195,16 +195,15 @@ static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
  * Early initialization of a given HART
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
  *
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_early_init(struct sbi_platform *plat,
-					  u32 hartid, bool cold_boot)
+					  bool cold_boot)
 {
 	if (plat && plat->early_init)
-		return plat->early_init(hartid, cold_boot);
+		return plat->early_init(cold_boot);
 	return 0;
 }
 
@@ -212,16 +211,15 @@ static inline int sbi_platform_early_init(struct sbi_platform *plat,
  * Final initialization of a HART
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
  *
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_final_init(struct sbi_platform *plat,
-					  u32 hartid, bool cold_boot)
+					  bool cold_boot)
 {
 	if (plat && plat->final_init)
-		return plat->final_init(hartid, cold_boot);
+		return plat->final_init(cold_boot);
 	return 0;
 }
 
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index f37445ee1b3..3aad646af1d 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -14,11 +14,9 @@
 
 struct sbi_scratch;
 
-int sbi_system_early_init(struct sbi_scratch *scratch, u32 hartid,
-			  bool cold_boot);
+int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot);
 
-int sbi_system_final_init(struct sbi_scratch *scratch, u32 hartid,
-			  bool cold_boot);
+int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot);
 
 void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
 						 u32 type);
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 35a543e0a2e..7ae5f8bccc3 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -33,7 +33,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	char str[64];
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	rc = sbi_system_early_init(scratch, hartid, TRUE);
+	rc = sbi_system_early_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -57,7 +57,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_final_init(scratch, hartid, TRUE);
+	rc = sbi_system_final_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -103,7 +103,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 
-	rc = sbi_system_early_init(scratch, hartid, FALSE);
+	rc = sbi_system_early_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -123,7 +123,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_final_init(scratch, hartid, FALSE);
+	rc = sbi_system_final_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index f543cef25da..738ff4568d9 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -11,18 +11,16 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 
-int sbi_system_early_init(struct sbi_scratch *scratch, u32 hartid,
-			  bool cold_boot)
+int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	return sbi_platform_early_init(sbi_platform_ptr(scratch),
-					hartid, cold_boot);
+				       cold_boot);
 }
 
-int sbi_system_final_init(struct sbi_scratch *scratch, u32 hartid,
-			  bool cold_boot)
+int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	return sbi_platform_final_init(sbi_platform_ptr(scratch),
-					hartid, cold_boot);
+				       cold_boot);
 }
 
 void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 91fa4a76ed3..66faf862cf2 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -29,7 +29,7 @@
 #define SIFIVE_U_UART0_ADDR			0x10013000
 #define SIFIVE_U_UART1_ADDR			0x10023000
 
-static int sifive_u_final_init(u32 hartid, bool cold_boot)
+static int sifive_u_final_init(bool cold_boot)
 {
 	void *fdt;
 
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index a28f9f1af0e..80e52618c99 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -29,7 +29,7 @@
 #define VIRT_UART_BAUDRATE		115200
 #define VIRT_UART_SHIFTREG_ADDR		1843200
 
-static int virt_final_init(u32 hartid, bool cold_boot)
+static int virt_final_init(bool cold_boot)
 {
 	void *fdt;
 
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 47918036ab5..64e9a2c1b1a 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -71,7 +71,7 @@ static void fu540_modify_dt(void *fdt)
 
 	plic_fdt_fixup(fdt, "riscv,plic0");
 }
-static int fu540_final_init(u32 hartid, bool cold_boot)
+static int fu540_final_init(bool cold_boot)
 {
 	void *fdt;
 

From 18ec89e46e3cf8011b30deded6ea8d77720bdb3c Mon Sep 17 00:00:00 2001
From: Anup patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 14:20:59 +0530
Subject: [PATCH 0117/1765] lib: Remove source_hart and hartid parameter from
 IPI callbacks

The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ipi.h                    |  8 ++++----
 include/sbi/sbi_platform.h               | 20 +++++++++-----------
 lib/sbi_ecall.c                          | 11 ++++-------
 lib/sbi_hart.c                           |  2 +-
 lib/sbi_init.c                           |  4 ++--
 lib/sbi_ipi.c                            | 17 +++++++++--------
 lib/sbi_trap.c                           |  2 +-
 platform/common/include/plat/sys/clint.h |  6 +++---
 platform/common/sys/clint.c              | 21 +++++++++++----------
 platform/kendryte/k210/platform.c        |  4 ++--
 platform/qemu/sifive_u/platform.c        |  4 ++--
 platform/qemu/virt/platform.c            |  4 ++--
 platform/sifive/fu540/platform.c         |  4 ++--
 13 files changed, 52 insertions(+), 55 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index d7c05765def..188f84e82c7 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -20,12 +20,12 @@
 struct sbi_scratch;
 
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      u32 hartid, ulong *pmask, u32 event);
+		      ulong *pmask, u32 event);
 
-void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid);
+void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
-void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid);
+void sbi_ipi_process(struct sbi_scratch *scratch);
 
-int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
+int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
 
 #endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index d3b083e7464..6642816d76e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -85,13 +85,13 @@ struct sbi_platform {
 	int (*irqchip_init)(u32 hartid, bool cold_boot);
 
 	/** Inject IPI to a target HART */
-	void (*ipi_inject)(u32 target_hart, u32 source_hart);
+	void (*ipi_inject)(u32 target_hart);
 	/** Wait for target HART to acknowledge IPI */
-	void (*ipi_sync)(u32 target_hart, u32 source_hart);
+	void (*ipi_sync)(u32 target_hart);
 	/** Clear IPI for a target HART */
 	void (*ipi_clear)(u32 target_hart);
 	/** Initialize IPI for given HART */
-	int (*ipi_init)(u32 hartid, bool cold_boot);
+	int (*ipi_init)(bool cold_boot);
 
 	/** Get MMIO timer value */
 	u64 (*timer_value)(void);
@@ -328,10 +328,10 @@ static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
  * @param target_hart HART ID of IPI target
  */
 static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
-					   u32 target_hart, u32 source_hart)
+					   u32 target_hart)
 {
 	if (plat && plat->ipi_inject)
-		plat->ipi_inject(target_hart, source_hart);
+		plat->ipi_inject(target_hart);
 }
 
 /**
@@ -339,13 +339,12 @@ static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
  *
  * @param plat pointer to struct sbi_platform
  * @param target_hart HART ID of IPI target
- * @param source_hart HART ID of IPI source
  */
 static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
-					 u32 target_hart, u32 source_hart)
+					 u32 target_hart)
 {
 	if (plat && plat->ipi_sync)
-		plat->ipi_sync(target_hart, source_hart);
+		plat->ipi_sync(target_hart);
 }
 
 /**
@@ -365,16 +364,15 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
  * Initialize the platform IPI support for given HART
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
  *
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
-					u32 hartid, bool cold_boot)
+					bool cold_boot)
 {
 	if (plat && plat->ipi_init)
-		return plat->ipi_init(hartid, cold_boot);
+		return plat->ipi_init(cold_boot);
 	return 0;
 }
 
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 731a6652a7b..dc90488d865 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -54,23 +54,20 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		ret = 0;
 		break;
 	case SBI_ECALL_CLEAR_IPI:
-		sbi_ipi_clear_smode(scratch, hartid);
+		sbi_ipi_clear_smode(scratch);
 		ret = 0;
 		break;
 	case SBI_ECALL_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, hartid,
-					(ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SOFT);
 		break;
 	case SBI_ECALL_REMOTE_FENCE_I:
-		ret = sbi_ipi_send_many(scratch, hartid,
-					(ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_FENCE_I);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
 	case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
-		ret = sbi_ipi_send_many(scratch, hartid,
-					(ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA);
 		break;
 	case SBI_ECALL_SHUTDOWN:
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 7e5df72752e..68e492c84b9 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -331,7 +331,7 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 		/* send an IPI to every other hart */
 		spin_lock(&coldboot_wait_bitmap_lock);
 		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
-			sbi_platform_ipi_inject(plat, i, hartid);
+			sbi_platform_ipi_inject(plat, i);
 		spin_unlock(&coldboot_wait_bitmap_lock);
 	}
 }
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 7ae5f8bccc3..ad1ae8a2da8 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -49,7 +49,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_ipi_init(scratch, hartid, TRUE);
+	rc = sbi_ipi_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -115,7 +115,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_ipi_init(scratch, hartid, FALSE);
+	rc = sbi_ipi_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index a6120279513..4ff02c6bea7 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -19,7 +19,7 @@
 #include <sbi/sbi_unpriv.h>
 
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      u32 hartid, ulong *pmask, u32 event)
+		      ulong *pmask, u32 event)
 {
 	ulong i, m;
 	struct sbi_scratch *oth;
@@ -31,29 +31,30 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 
 	/* send IPIs to everyone */
 	for (i = 0, m = mask; m; i++, m >>= 1) {
-		if ((m & 1) && !sbi_platform_hart_disabled(plat, hartid)) {
+		if ((m & 1) && !sbi_platform_hart_disabled(plat, i)) {
 			oth = sbi_hart_id_to_scratch(scratch, i);
 			atomic_raw_set_bit(event, &oth->ipi_type);
 			mb();
-			sbi_platform_ipi_inject(plat, i, hartid);
+			sbi_platform_ipi_inject(plat, i);
 			if (event != SBI_IPI_EVENT_SOFT)
-				sbi_platform_ipi_sync(plat, i, hartid);
+				sbi_platform_ipi_sync(plat, i);
 		}
 	}
 
 	return 0;
 }
 
-void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid)
+void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 {
 	csr_clear(mip, MIP_SSIP);
 }
 
-void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid)
+void sbi_ipi_process(struct sbi_scratch *scratch)
 {
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	volatile unsigned long ipi_type;
 	unsigned int ipi_event;
+	u32 hartid = sbi_current_hartid();
 
 	sbi_platform_ipi_clear(plat, hartid);
 
@@ -79,11 +80,11 @@ void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid)
 	} while(ipi_type > 0);
 }
 
-int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
+int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	/* Enable software interrupts */
 	csr_set(mie, MIP_MSIP);
 
 	return sbi_platform_ipi_init(sbi_platform_ptr(scratch),
-				     hartid, cold_boot);
+				     cold_boot);
 }
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 3c0166061c9..d628c4c05e3 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -150,7 +150,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 			sbi_timer_process(scratch, hartid);
 			break;
 		case IRQ_M_SOFT:
-			sbi_ipi_process(scratch, hartid);
+			sbi_ipi_process(scratch);
 			break;
 		default:
 			msg = "unhandled external interrupt";
diff --git a/platform/common/include/plat/sys/clint.h b/platform/common/include/plat/sys/clint.h
index 642d83ae27e..2e8fdcdd48c 100644
--- a/platform/common/include/plat/sys/clint.h
+++ b/platform/common/include/plat/sys/clint.h
@@ -12,13 +12,13 @@
 
 #include <sbi/sbi_types.h>
 
-void clint_ipi_inject(u32 target_hart, u32 source_hart);
+void clint_ipi_inject(u32 target_hart);
 
-void clint_ipi_sync(u32 target_hart, u32 source_hart);
+void clint_ipi_sync(u32 target_hart);
 
 void clint_ipi_clear(u32 target_hart);
 
-int clint_warm_ipi_init(u32 target_hart);
+int clint_warm_ipi_init(void);
 
 int clint_cold_ipi_init(unsigned long base, u32 hart_count);
 
diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index e84c38297a9..fc95fd3ec7b 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -9,28 +9,28 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_atomic.h>
+#include <sbi/sbi_hart.h>
 #include <plat/sys/clint.h>
 
 static u32 clint_ipi_hart_count;
 static volatile void *clint_ipi_base;
 static volatile u32 *clint_ipi;
 
-void clint_ipi_inject(u32 target_hart, u32 source_hart)
+void clint_ipi_inject(u32 target_hart)
 {
-	if ((clint_ipi_hart_count <= target_hart) ||
-	    (clint_ipi_hart_count <= source_hart))
+	if (clint_ipi_hart_count <= target_hart)
 		return;
 
 	/* Set CLINT IPI */
 	writel(1, &clint_ipi[target_hart]);
 }
 
-void clint_ipi_sync(u32 target_hart, u32 source_hart)
+void clint_ipi_sync(u32 target_hart)
 {
 	u32 target_ipi, incoming_ipi;
+	u32 source_hart = sbi_current_hartid();
 
-	if ((clint_ipi_hart_count <= target_hart) ||
-	    (clint_ipi_hart_count <= source_hart))
+	if (clint_ipi_hart_count <= target_hart)
 		return;
 
 	/* Wait until target HART has handled IPI */
@@ -57,14 +57,15 @@ void clint_ipi_clear(u32 target_hart)
 	writel(0, &clint_ipi[target_hart]);
 }
 
-int clint_warm_ipi_init(u32 target_hart)
+int clint_warm_ipi_init(void)
 {
-	if (clint_ipi_hart_count <= target_hart ||
-	    !clint_ipi_base)
+	u32 hartid = sbi_current_hartid();
+
+	if (!clint_ipi_base)
 		return -1;
 
 	/* Clear CLINT IPI */
-	clint_ipi_clear(target_hart);
+	clint_ipi_clear(hartid);
 
 	return 0;
 }
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index fd0b31adff2..4eb1d997537 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -52,7 +52,7 @@ static int k210_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int k210_ipi_init(u32 hartid, bool cold_boot)
+static int k210_ipi_init(bool cold_boot)
 {
 	int rc;
 
@@ -63,7 +63,7 @@ static int k210_ipi_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_ipi_init(hartid);
+	return clint_warm_ipi_init();
 }
 
 static int k210_timer_init(u32 hartid, bool cold_boot)
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 66faf862cf2..a386765e868 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -89,7 +89,7 @@ static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
+static int sifive_u_ipi_init(bool cold_boot)
 {
 	int rc;
 
@@ -100,7 +100,7 @@ static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_ipi_init(hartid);
+	return clint_warm_ipi_init();
 }
 
 static int sifive_u_timer_init(u32 hartid, bool cold_boot)
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 80e52618c99..31bff48236e 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -90,7 +90,7 @@ static int virt_irqchip_init(u32 hartid, bool cold_boot)
 				      (2 * hartid + 1));
 }
 
-static int virt_ipi_init(u32 hartid, bool cold_boot)
+static int virt_ipi_init(bool cold_boot)
 {
 	int rc;
 
@@ -101,7 +101,7 @@ static int virt_ipi_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_ipi_init(hartid);
+	return clint_warm_ipi_init();
 }
 
 static int virt_timer_init(u32 hartid, bool cold_boot)
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 64e9a2c1b1a..c13be64e1e2 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -141,7 +141,7 @@ static int fu540_irqchip_init(u32 hartid, bool cold_boot)
 			(hartid) ? (2 * hartid) : -1);
 }
 
-static int fu540_ipi_init(u32 hartid, bool cold_boot)
+static int fu540_ipi_init(bool cold_boot)
 {
 	int rc;
 
@@ -153,7 +153,7 @@ static int fu540_ipi_init(u32 hartid, bool cold_boot)
 
 	}
 
-	return clint_warm_ipi_init(hartid);
+	return clint_warm_ipi_init();
 }
 
 static int fu540_timer_init(u32 hartid, bool cold_boot)

From 74fd2e5bb217278fcb2c0020038ea5f19bd5d22f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 14:33:41 +0530
Subject: [PATCH 0118/1765] lib: Remove hartid parameter from IRQCHIP callbacks

The hartid parameter in IRQCHIP callbacks of sbi_platform
is not required because current hartid can be determined
using sbi_current_hartid() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 7 +++----
 lib/sbi_init.c                    | 4 ++--
 platform/kendryte/k210/platform.c | 4 +++-
 platform/qemu/sifive_u/platform.c | 4 +++-
 platform/qemu/virt/platform.c     | 4 +++-
 platform/sifive/fu540/platform.c  | 4 +++-
 6 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 6642816d76e..648b953bc9e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -82,7 +82,7 @@ struct sbi_platform {
 	int (*console_init)(void);
 
 	/** Initialize the platform interrupt controller */
-	int (*irqchip_init)(u32 hartid, bool cold_boot);
+	int (*irqchip_init)(bool cold_boot);
 
 	/** Inject IPI to a target HART */
 	void (*ipi_inject)(u32 target_hart);
@@ -308,16 +308,15 @@ static inline int sbi_platform_console_init(struct sbi_platform *plat)
  * Initialize the platform interrupt controller for given HART
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
  *
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
-					    u32 hartid, bool cold_boot)
+					    bool cold_boot)
 {
 	if (plat && plat->irqchip_init)
-		return plat->irqchip_init(hartid, cold_boot);
+		return plat->irqchip_init(cold_boot);
 	return 0;
 }
 
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index ad1ae8a2da8..f7839927507 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -45,7 +45,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_irqchip_init(plat, hartid, TRUE);
+	rc = sbi_platform_irqchip_init(plat, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -111,7 +111,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_irqchip_init(plat, hartid, FALSE);
+	rc = sbi_platform_irqchip_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 4eb1d997537..55e8d909a02 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_console.h>
 #include <plat/irqchip/plic.h>
@@ -35,9 +36,10 @@ static char k210_console_getc(void)
 	return uarths_getc();
 }
 
-static int k210_irqchip_init(u32 hartid, bool cold_boot)
+static int k210_irqchip_init(bool cold_boot)
 {
 	int rc;
+	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(PLIC_BASE_ADDR,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index a386765e868..281b265652b 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <plat/irqchip/plic.h>
 #include <plat/serial/sifive-uart.h>
@@ -72,9 +73,10 @@ static int sifive_u_console_init(void)
 				SIFIVE_U_PERIPH_CLK, 115200);
 }
 
-static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
+static int sifive_u_irqchip_init(bool cold_boot)
 {
 	int rc;
+	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 31bff48236e..65b36a26c21 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <plat/irqchip/plic.h>
 #include <plat/serial/uart8250.h>
@@ -73,9 +74,10 @@ static int virt_console_init(void)
 			     VIRT_UART_BAUDRATE, 0, 1);
 }
 
-static int virt_irqchip_init(u32 hartid, bool cold_boot)
+static int virt_irqchip_init(bool cold_boot)
 {
 	int rc;
+	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(VIRT_PLIC_ADDR,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index c13be64e1e2..c9bdf41e80c 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -11,6 +11,7 @@
 #include <fdt.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/riscv_io.h>
@@ -124,9 +125,10 @@ static int fu540_console_init(void)
 				peri_in_freq, FU540_UART_BAUDRATE);
 }
 
-static int fu540_irqchip_init(u32 hartid, bool cold_boot)
+static int fu540_irqchip_init(bool cold_boot)
 {
 	int rc;
+	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,

From 9895d446ae947c2c3d060808bcb66870afaeb659 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 14:47:03 +0530
Subject: [PATCH 0119/1765] lib: Remove target_hart and hartid parameter from
 TIMER callbacks

The target_hart and hartid paramter of TIMER callbacks is not
required because it always current hartid which can be obtained
using sbi_current_hartid() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h               | 21 ++++++++-------------
 include/sbi/sbi_timer.h                  | 10 ++++------
 lib/sbi_ecall.c                          |  4 ++--
 lib/sbi_init.c                           |  4 ++--
 lib/sbi_timer.c                          | 16 +++++++---------
 lib/sbi_trap.c                           |  2 +-
 platform/common/include/plat/sys/clint.h |  6 +++---
 platform/common/sys/clint.c              | 12 +++++++++---
 platform/kendryte/k210/platform.c        |  4 ++--
 platform/qemu/sifive_u/platform.c        |  4 ++--
 platform/qemu/virt/platform.c            |  4 ++--
 platform/sifive/fu540/platform.c         |  4 ++--
 12 files changed, 44 insertions(+), 47 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 648b953bc9e..be70903ebb9 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -96,11 +96,11 @@ struct sbi_platform {
 	/** Get MMIO timer value */
 	u64 (*timer_value)(void);
 	/** Start MMIO timer event for a target HART */
-	void (*timer_event_start)(u32 target_hart, u64 next_event);
+	void (*timer_event_start)(u64 next_event);
 	/** Stop MMIO timer event for a target HART */
-	void (*timer_event_stop)(u32 target_hart);
+	void (*timer_event_stop)(void);
 	/** Initialize MMIO timer for given HART */
-	int (*timer_init)(u32 hartid, bool cold_boot);
+	int (*timer_init)(bool cold_boot);
 
 	/** Reboot the platform */
 	int (*system_reboot)(u32 type);
@@ -393,44 +393,39 @@ static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
  * Start MMIO timer event for a target HART
  *
  * @param plat pointer to struct struct sbi_platform
- * @param target_hart HART ID of timer event target
  * @param next_event timer value when timer event will happen
  */
 static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
-						  u32 target_hart,
 						  u64 next_event)
 {
 	if (plat && plat->timer_event_start)
-		plat->timer_event_start(target_hart, next_event);
+		plat->timer_event_start(next_event);
 }
 
 /**
  * Stop MMIO timer event for a target HART
  *
  * @param plat pointer to struct sbi_platform
- * @param target_hart HART ID of timer event target
  */
-static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat,
-						 u32 target_hart)
+static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat)
 {
 	if (plat && plat->timer_event_stop)
-		plat->timer_event_stop(target_hart);
+		plat->timer_event_stop();
 }
 
 /**
  * Initialize the platform MMIO timer for given HART
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
  *
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_timer_init(struct sbi_platform *plat,
-					  u32 hartid, bool cold_boot)
+					  bool cold_boot)
 {
 	if (plat && plat->timer_init)
-		return plat->timer_init(hartid, cold_boot);
+		return plat->timer_init(cold_boot);
 	return 0;
 }
 
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 601c27c8a71..37e1c795672 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -16,14 +16,12 @@ struct sbi_scratch;
 
 u64 sbi_timer_value(struct sbi_scratch *scratch);
 
-void sbi_timer_event_stop(struct sbi_scratch *scratch, u32 hartid);
+void sbi_timer_event_stop(struct sbi_scratch *scratch);
 
-void sbi_timer_event_start(struct sbi_scratch *scratch, u32 hartid,
-			   u64 next_event);
+void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event);
 
-void sbi_timer_process(struct sbi_scratch *scratch, u32 hartid);
+void sbi_timer_process(struct sbi_scratch *scratch);
 
-int sbi_timer_init(struct sbi_scratch *scratch, u32 hartid,
-		   bool cold_boot);
+int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot);
 
 #endif
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index dc90488d865..9341ea8cbf5 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -38,10 +38,10 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 	switch (regs->a7) {
 	case SBI_ECALL_SET_TIMER:
 #if __riscv_xlen == 32
-		sbi_timer_event_start(scratch, hartid,
+		sbi_timer_event_start(scratch,
 			(((u64)regs->a1 << 32) || (u64)regs->a0));
 #else
-		sbi_timer_event_start(scratch, hartid, (u64)regs->a0);
+		sbi_timer_event_start(scratch, (u64)regs->a0);
 #endif
 		ret = 0;
 		break;
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index f7839927507..3e5de514f63 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -53,7 +53,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_timer_init(scratch, hartid, TRUE);
+	rc = sbi_timer_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -119,7 +119,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_timer_init(scratch, hartid, FALSE);
+	rc = sbi_timer_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index 8dfc7534491..93b4d7ede5c 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -47,29 +47,27 @@ u64 sbi_timer_value(struct sbi_scratch *scratch)
 		return get_ticks();
 }
 
-void sbi_timer_event_stop(struct sbi_scratch *scratch, u32 hartid)
+void sbi_timer_event_stop(struct sbi_scratch *scratch)
 {
-	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch), hartid);
+	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
 }
 
-void sbi_timer_event_start(struct sbi_scratch *scratch, u32 hartid,
-			   u64 next_event)
+void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
 {
 	sbi_platform_timer_event_start(sbi_platform_ptr(scratch),
-				       hartid, next_event);
+				       next_event);
 	csr_clear(mip, MIP_STIP);
 	csr_set(mie, MIP_MTIP);
 }
 
-void sbi_timer_process(struct sbi_scratch *scratch, u32 hartid)
+void sbi_timer_process(struct sbi_scratch *scratch)
 {
 	csr_clear(mie, MIP_MTIP);
 	csr_set(mip, MIP_STIP);
 }
 
-int sbi_timer_init(struct sbi_scratch *scratch, u32 hartid,
-		   bool cold_boot)
+int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	return sbi_platform_timer_init(sbi_platform_ptr(scratch),
-					hartid, cold_boot);
+				       cold_boot);
 }
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index d628c4c05e3..c6a6b3fec5c 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -147,7 +147,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		mcause &= ~(1UL << (__riscv_xlen - 1));
 		switch (mcause) {
 		case IRQ_M_TIMER:
-			sbi_timer_process(scratch, hartid);
+			sbi_timer_process(scratch);
 			break;
 		case IRQ_M_SOFT:
 			sbi_ipi_process(scratch);
diff --git a/platform/common/include/plat/sys/clint.h b/platform/common/include/plat/sys/clint.h
index 2e8fdcdd48c..8c67d94ad69 100644
--- a/platform/common/include/plat/sys/clint.h
+++ b/platform/common/include/plat/sys/clint.h
@@ -24,11 +24,11 @@ int clint_cold_ipi_init(unsigned long base, u32 hart_count);
 
 u64 clint_timer_value(void);
 
-void clint_timer_event_stop(u32 target_hart);
+void clint_timer_event_stop(void);
 
-void clint_timer_event_start(u32 target_hart, u64 next_event);
+void clint_timer_event_start(u64 next_event);
 
-int clint_warm_timer_init(u32 target_hart);
+int clint_warm_timer_init(void);
 
 int clint_cold_timer_init(unsigned long base, u32 hart_count);
 
diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index fc95fd3ec7b..0f530761e6e 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -90,8 +90,10 @@ u64 clint_timer_value(void)
 	return readq_relaxed(clint_time_val);
 }
 
-void clint_timer_event_stop(u32 target_hart)
+void clint_timer_event_stop(void)
 {
+	u32 target_hart = sbi_current_hartid();
+
 	if (clint_time_hart_count <= target_hart)
 		return;
 
@@ -99,8 +101,10 @@ void clint_timer_event_stop(u32 target_hart)
 	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
 }
 
-void clint_timer_event_start(u32 target_hart, u64 next_event)
+void clint_timer_event_start(u64 next_event)
 {
+	u32 target_hart = sbi_current_hartid();
+
 	if (clint_time_hart_count <= target_hart)
 		return;
 
@@ -108,8 +112,10 @@ void clint_timer_event_start(u32 target_hart, u64 next_event)
 	writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
 }
 
-int clint_warm_timer_init(u32 target_hart)
+int clint_warm_timer_init(void)
 {
+	u32 target_hart = sbi_current_hartid();
+
 	if (clint_time_hart_count <= target_hart ||
 	    !clint_time_base)
 		return -1;
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 55e8d909a02..0b944be5289 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -68,7 +68,7 @@ static int k210_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
-static int k210_timer_init(u32 hartid, bool cold_boot)
+static int k210_timer_init(bool cold_boot)
 {
 	int rc;
 
@@ -79,7 +79,7 @@ static int k210_timer_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_timer_init(hartid);
+	return clint_warm_timer_init();
 }
 
 static int k210_system_reboot(u32 type)
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 281b265652b..e93554fcc95 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -105,7 +105,7 @@ static int sifive_u_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
-static int sifive_u_timer_init(u32 hartid, bool cold_boot)
+static int sifive_u_timer_init(bool cold_boot)
 {
 	int rc;
 
@@ -116,7 +116,7 @@ static int sifive_u_timer_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_timer_init(hartid);
+	return clint_warm_timer_init();
 }
 
 static int sifive_u_system_down(u32 type)
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 65b36a26c21..c55b5fc8e78 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -106,7 +106,7 @@ static int virt_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
-static int virt_timer_init(u32 hartid, bool cold_boot)
+static int virt_timer_init(bool cold_boot)
 {
 	int rc;
 
@@ -117,7 +117,7 @@ static int virt_timer_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_timer_init(hartid);
+	return clint_warm_timer_init();
 }
 
 static int virt_system_down(u32 type)
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index c9bdf41e80c..266a19122a0 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -158,7 +158,7 @@ static int fu540_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
-static int fu540_timer_init(u32 hartid, bool cold_boot)
+static int fu540_timer_init(bool cold_boot)
 {
 	int rc;
 
@@ -169,7 +169,7 @@ static int fu540_timer_init(u32 hartid, bool cold_boot)
 			return rc;
 	}
 
-	return clint_warm_timer_init(hartid);
+	return clint_warm_timer_init();
 }
 
 static int fu540_system_down(u32 type)

From d25774ff962c7448d6e46e102e183d11abfd2ef2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Jan 2019 14:51:38 +0530
Subject: [PATCH 0120/1765] include: Update documentation of sbi_platform after
 callback cleanup

The prototypes of sbi_platform callbacks have changed hence we
update related documentation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index be70903ebb9..10c97031a5a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -25,7 +25,7 @@
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
-	/** Platform has MMIO based timer */
+	/** Platform has MMIO timer value */
 	SBI_PLATFORM_HAS_MMIO_TIMER_VALUE	= (1 << 0),
 	/** Platform has HART hotplug support */
 	SBI_PLATFORM_HAS_HART_HOTPLUG		= (1 << 1),
@@ -81,7 +81,7 @@ struct sbi_platform {
 	/** Initialize the platform console */
 	int (*console_init)(void);
 
-	/** Initialize the platform interrupt controller */
+	/** Initialize the platform interrupt controller for current HART */
 	int (*irqchip_init)(bool cold_boot);
 
 	/** Inject IPI to a target HART */
@@ -90,16 +90,16 @@ struct sbi_platform {
 	void (*ipi_sync)(u32 target_hart);
 	/** Clear IPI for a target HART */
 	void (*ipi_clear)(u32 target_hart);
-	/** Initialize IPI for given HART */
+	/** Initialize IPI for current HART */
 	int (*ipi_init)(bool cold_boot);
 
-	/** Get MMIO timer value */
+	/** Get platform timer value */
 	u64 (*timer_value)(void);
-	/** Start MMIO timer event for a target HART */
+	/** Start platform timer event for current HART */
 	void (*timer_event_start)(u64 next_event);
-	/** Stop MMIO timer event for a target HART */
+	/** Stop platform timer event for current HART */
 	void (*timer_event_stop)(void);
-	/** Initialize MMIO timer for given HART */
+	/** Initialize platform timer for current HART */
 	int (*timer_init)(bool cold_boot);
 
 	/** Reboot the platform */
@@ -114,7 +114,7 @@ struct sbi_platform {
 /** Get pointer to sbi_platform for current HART */
 #define sbi_platform_thishart_ptr()	\
 	((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
-/** Check whether the platform supports MMIO timer */
+/** Check whether the platform supports MMIO timer value */
 #define sbi_platform_has_mmio_timer_value(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_MMIO_TIMER_VALUE)
 /** Check whether the platform supports HART hotplug */
@@ -192,7 +192,7 @@ static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
 }
 
 /**
- * Early initialization of a given HART
+ * Early initialization for current HART
  *
  * @param plat pointer to struct sbi_platform
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
@@ -208,7 +208,7 @@ static inline int sbi_platform_early_init(struct sbi_platform *plat,
 }
 
 /**
- * Final initialization of a HART
+ * Final initialization for current HART
  *
  * @param plat pointer to struct sbi_platform
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
@@ -305,7 +305,7 @@ static inline int sbi_platform_console_init(struct sbi_platform *plat)
 }
 
 /**
- * Initialize the platform interrupt controller for given HART
+ * Initialize the platform interrupt controller for current HART
  *
  * @param plat pointer to struct sbi_platform
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
@@ -360,7 +360,7 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
 }
 
 /**
- * Initialize the platform IPI support for given HART
+ * Initialize the platform IPI support for current HART
  *
  * @param plat pointer to struct sbi_platform
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
@@ -376,7 +376,7 @@ static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
 }
 
 /**
- * Get MMIO timer value
+ * Get platform timer value
  *
  * @param plat pointer to struct sbi_platform
  *
@@ -390,7 +390,7 @@ static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
 }
 
 /**
- * Start MMIO timer event for a target HART
+ * Start platform timer event for current HART
  *
  * @param plat pointer to struct struct sbi_platform
  * @param next_event timer value when timer event will happen
@@ -403,7 +403,7 @@ static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
 }
 
 /**
- * Stop MMIO timer event for a target HART
+ * Stop platform timer event for current HART
  *
  * @param plat pointer to struct sbi_platform
  */
@@ -414,7 +414,7 @@ static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat)
 }
 
 /**
- * Initialize the platform MMIO timer for given HART
+ * Initialize the platform timer for current HART
  *
  * @param plat pointer to struct sbi_platform
  * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)

From 36394d2f2429c48d1db4e26ad25f9541c8c1027f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 23 Jan 2019 08:03:20 +0530
Subject: [PATCH 0121/1765] include: Drop MMIO from
 SBI_PLATFORM_HAS_MMIO_TIMER_VALUE

It is not necessary that platform has MMIO-based timer value
register. It can also have some custom (implementation specific)
CSR for timer value.

This patch renames SBI_PLATFORM_HAS_MMIO_TIMER_VALUE to
SBI_PLATFORM_HAS_TIMER_VALUE to imply "platform timer value"
instead of "mmio timer value".

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 12 ++++++------
 lib/sbi_timer.c                   |  2 +-
 platform/kendryte/k210/platform.c |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 10c97031a5a..e761571605a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -25,8 +25,8 @@
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
-	/** Platform has MMIO timer value */
-	SBI_PLATFORM_HAS_MMIO_TIMER_VALUE	= (1 << 0),
+	/** Platform has timer value */
+	SBI_PLATFORM_HAS_TIMER_VALUE		= (1 << 0),
 	/** Platform has HART hotplug support */
 	SBI_PLATFORM_HAS_HART_HOTPLUG		= (1 << 1),
 	/** Platform has PMP support */
@@ -41,7 +41,7 @@ enum sbi_platform_features {
 
 /** Default feature set for a platform */
 #define SBI_PLATFORM_DEFAULT_FEATURES	\
-	(SBI_PLATFORM_HAS_MMIO_TIMER_VALUE | \
+	(SBI_PLATFORM_HAS_TIMER_VALUE | \
 	 SBI_PLATFORM_HAS_PMP | \
 	 SBI_PLATFORM_HAS_SCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
@@ -114,9 +114,9 @@ struct sbi_platform {
 /** Get pointer to sbi_platform for current HART */
 #define sbi_platform_thishart_ptr()	\
 	((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
-/** Check whether the platform supports MMIO timer value */
-#define sbi_platform_has_mmio_timer_value(__p)	\
-	((__p)->features & SBI_PLATFORM_HAS_MMIO_TIMER_VALUE)
+/** Check whether the platform supports timer value */
+#define sbi_platform_has_timer_value(__p)	\
+	((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
 /** Check whether the platform supports HART hotplug */
 #define sbi_platform_has_hart_hotplug(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index 93b4d7ede5c..0cef98a86af 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -41,7 +41,7 @@ u64 sbi_timer_value(struct sbi_scratch *scratch)
 {
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (sbi_platform_has_mmio_timer_value(plat))
+	if (sbi_platform_has_timer_value(plat))
 		return sbi_platform_timer_value(plat);
 	else
 		return get_ticks();
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 0b944be5289..acb453df76b 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -101,7 +101,7 @@ static int k210_system_shutdown(u32 type)
 struct sbi_platform platform = {
 
 	.name = "Kendryte K210",
-	.features = SBI_PLATFORM_HAS_MMIO_TIMER_VALUE,
+	.features = SBI_PLATFORM_HAS_TIMER_VALUE,
 
 	.hart_count = K210_HART_COUNT,
 	.hart_stack_size = K210_HART_STACK_SIZE,

From 025d0ae994e5663e8c2ca0e16c42e814abac027d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 23 Jan 2019 08:13:29 +0530
Subject: [PATCH 0122/1765] include: Rename ipi_inject() to ipi_send() for
 sbi_platform

For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h               | 14 +++++++-------
 lib/sbi_hart.c                           |  2 +-
 lib/sbi_ipi.c                            |  2 +-
 platform/common/include/plat/sys/clint.h |  2 +-
 platform/common/sys/clint.c              |  2 +-
 platform/kendryte/k210/platform.c        |  2 +-
 platform/qemu/sifive_u/platform.c        |  2 +-
 platform/qemu/virt/platform.c            |  2 +-
 platform/sifive/fu540/platform.c         |  2 +-
 9 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e761571605a..4c39418a257 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -84,8 +84,8 @@ struct sbi_platform {
 	/** Initialize the platform interrupt controller for current HART */
 	int (*irqchip_init)(bool cold_boot);
 
-	/** Inject IPI to a target HART */
-	void (*ipi_inject)(u32 target_hart);
+	/** Send IPI to a target HART */
+	void (*ipi_send)(u32 target_hart);
 	/** Wait for target HART to acknowledge IPI */
 	void (*ipi_sync)(u32 target_hart);
 	/** Clear IPI for a target HART */
@@ -321,16 +321,16 @@ static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
 }
 
 /**
- * Inject IPI to a target HART
+ * Send IPI to a target HART
  *
  * @param plat pointer to struct sbi_platform
  * @param target_hart HART ID of IPI target
  */
-static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
-					   u32 target_hart)
+static inline void sbi_platform_ipi_send(struct sbi_platform *plat,
+					 u32 target_hart)
 {
-	if (plat && plat->ipi_inject)
-		plat->ipi_inject(target_hart);
+	if (plat && plat->ipi_send)
+		plat->ipi_send(target_hart);
 }
 
 /**
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 68e492c84b9..dfa474c77d0 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -331,7 +331,7 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 		/* send an IPI to every other hart */
 		spin_lock(&coldboot_wait_bitmap_lock);
 		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
-			sbi_platform_ipi_inject(plat, i);
+			sbi_platform_ipi_send(plat, i);
 		spin_unlock(&coldboot_wait_bitmap_lock);
 	}
 }
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 4ff02c6bea7..55896b26220 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -35,7 +35,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 			oth = sbi_hart_id_to_scratch(scratch, i);
 			atomic_raw_set_bit(event, &oth->ipi_type);
 			mb();
-			sbi_platform_ipi_inject(plat, i);
+			sbi_platform_ipi_send(plat, i);
 			if (event != SBI_IPI_EVENT_SOFT)
 				sbi_platform_ipi_sync(plat, i);
 		}
diff --git a/platform/common/include/plat/sys/clint.h b/platform/common/include/plat/sys/clint.h
index 8c67d94ad69..7da8aad19d6 100644
--- a/platform/common/include/plat/sys/clint.h
+++ b/platform/common/include/plat/sys/clint.h
@@ -12,7 +12,7 @@
 
 #include <sbi/sbi_types.h>
 
-void clint_ipi_inject(u32 target_hart);
+void clint_ipi_send(u32 target_hart);
 
 void clint_ipi_sync(u32 target_hart);
 
diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index 0f530761e6e..a518996b10e 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -16,7 +16,7 @@ static u32 clint_ipi_hart_count;
 static volatile void *clint_ipi_base;
 static volatile u32 *clint_ipi;
 
-void clint_ipi_inject(u32 target_hart)
+void clint_ipi_send(u32 target_hart)
 {
 	if (clint_ipi_hart_count <= target_hart)
 		return;
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index acb453df76b..5c513d4e83b 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -114,7 +114,7 @@ struct sbi_platform platform = {
 	.irqchip_init = k210_irqchip_init,
 
 	.ipi_init = k210_ipi_init,
-	.ipi_inject = clint_ipi_inject,
+	.ipi_send = clint_ipi_send,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index e93554fcc95..9f3da1c0acf 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -138,7 +138,7 @@ struct sbi_platform platform = {
 	.console_getc = sifive_uart_getc,
 	.console_init = sifive_u_console_init,
 	.irqchip_init = sifive_u_irqchip_init,
-	.ipi_inject = clint_ipi_inject,
+	.ipi_send = clint_ipi_send,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 	.ipi_init = sifive_u_ipi_init,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index c55b5fc8e78..63f4747e528 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -139,7 +139,7 @@ struct sbi_platform platform = {
 	.console_getc = uart8250_getc,
 	.console_init = virt_console_init,
 	.irqchip_init = virt_irqchip_init,
-	.ipi_inject = clint_ipi_inject,
+	.ipi_send = clint_ipi_send,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 	.ipi_init = virt_ipi_init,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 266a19122a0..28b86ecad73 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -191,7 +191,7 @@ struct sbi_platform platform = {
 	.console_getc = sifive_uart_getc,
 	.console_init = fu540_console_init,
 	.irqchip_init = fu540_irqchip_init,
-	.ipi_inject = clint_ipi_inject,
+	.ipi_send = clint_ipi_send,
 	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 	.ipi_init = fu540_ipi_init,

From d68741d8b1ed50fb9a86a475074b6ddf1f818813 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 23 Jan 2019 09:00:35 +0530
Subject: [PATCH 0123/1765] include: Use TRUE/FALSE as return values in
 sbi_platform_hart_disabled()

The sbi_platform_hart_disabled() returns bool hence explicitly return
TRUE or FALSE instead of 1 or 0.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 4c39418a257..05e7a7eebc0 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -159,8 +159,8 @@ static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat,
 					      u32 hartid)
 {
 	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
-		return 1;
-	return 0;
+		return TRUE;
+	return FALSE;
 }
 
 /**

From 20990ee0abaf286917b6e2aae992d4183ff695f6 Mon Sep 17 00:00:00 2001
From: Anup patel <anup.patel@wdc.com>
Date: Thu, 24 Jan 2019 11:41:10 +0530
Subject: [PATCH 0124/1765] all: Update copyright header in all files

This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 LICENSE                                           | 2 +-
 Makefile                                          | 6 +++---
 firmware/external_deps.mk                         | 6 +++---
 firmware/fw_base.S                                | 6 +++---
 firmware/fw_base.ldS                              | 6 +++---
 firmware/fw_jump.S                                | 6 +++---
 firmware/fw_jump.elf.ldS                          | 6 +++---
 firmware/fw_payload.S                             | 6 +++---
 firmware/fw_payload.elf.ldS                       | 6 +++---
 firmware/objects.mk                               | 6 +++---
 firmware/payloads/objects.mk                      | 6 +++---
 firmware/payloads/test.elf.ldS                    | 6 +++---
 firmware/payloads/test_head.S                     | 6 +++---
 firmware/payloads/test_main.c                     | 6 +++---
 include/sbi/riscv_asm.h                           | 6 +++---
 include/sbi/riscv_atomic.h                        | 6 +++---
 include/sbi/riscv_barrier.h                       | 6 +++---
 include/sbi/riscv_encoding.h                      | 6 +++---
 include/sbi/riscv_fp.h                            | 4 ++--
 include/sbi/riscv_io.h                            | 6 +++---
 include/sbi/riscv_locks.h                         | 6 +++---
 include/sbi/sbi_bitops.h                          | 6 +++---
 include/sbi/sbi_bits.h                            | 6 +++---
 include/sbi/sbi_console.h                         | 6 +++---
 include/sbi/sbi_const.h                           | 6 +++---
 include/sbi/sbi_ecall.h                           | 6 +++---
 include/sbi/sbi_ecall_interface.h                 | 6 +++---
 include/sbi/sbi_emulate_csr.h                     | 6 +++---
 include/sbi/sbi_error.h                           | 6 +++---
 include/sbi/sbi_hart.h                            | 6 +++---
 include/sbi/sbi_illegal_insn.h                    | 6 +++---
 include/sbi/sbi_init.h                            | 6 +++---
 include/sbi/sbi_ipi.h                             | 6 +++---
 include/sbi/sbi_misaligned_ldst.h                 | 6 +++---
 include/sbi/sbi_platform.h                        | 6 +++---
 include/sbi/sbi_scratch.h                         | 6 +++---
 include/sbi/sbi_system.h                          | 6 +++---
 include/sbi/sbi_timer.h                           | 6 +++---
 include/sbi/sbi_trap.h                            | 6 +++---
 include/sbi/sbi_types.h                           | 6 +++---
 include/sbi/sbi_unpriv.h                          | 6 +++---
 lib/objects.mk                                    | 6 +++---
 lib/riscv_asm.c                                   | 6 +++---
 lib/riscv_atomic.c                                | 6 +++---
 lib/riscv_hardfp.S                                | 4 ++--
 lib/riscv_locks.c                                 | 6 +++---
 lib/sbi_console.c                                 | 6 +++---
 lib/sbi_ecall.c                                   | 6 +++---
 lib/sbi_emulate_csr.c                             | 6 +++---
 lib/sbi_hart.c                                    | 6 +++---
 lib/sbi_illegal_insn.c                            | 6 +++---
 lib/sbi_init.c                                    | 6 +++---
 lib/sbi_ipi.c                                     | 6 +++---
 lib/sbi_misaligned_ldst.c                         | 6 +++---
 lib/sbi_system.c                                  | 6 +++---
 lib/sbi_timer.c                                   | 6 +++---
 lib/sbi_trap.c                                    | 6 +++---
 platform/common/include/plat/irqchip/plic.h       | 6 +++---
 platform/common/include/plat/serial/sifive-uart.h | 6 +++---
 platform/common/include/plat/serial/uart8250.h    | 6 +++---
 platform/common/include/plat/string.h             | 6 +++---
 platform/common/include/plat/sys/clint.h          | 6 +++---
 platform/common/include/plat/tinyfdt.h            | 6 +++---
 platform/common/irqchip/objects.mk                | 6 +++---
 platform/common/irqchip/plic.c                    | 6 +++---
 platform/common/libc/objects.mk                   | 6 +++---
 platform/common/libc/string.c                     | 6 +++---
 platform/common/libfdt/objects.mk                 | 6 +++---
 platform/common/objects.mk                        | 6 +++---
 platform/common/serial/objects.mk                 | 6 +++---
 platform/common/serial/sifive-uart.c              | 6 +++---
 platform/common/serial/uart8250.c                 | 6 +++---
 platform/common/sys/clint.c                       | 6 +++---
 platform/common/sys/objects.mk                    | 6 +++---
 platform/common/tinyfdt.c                         | 6 +++---
 platform/kendryte/k210/config.mk                  | 6 +++---
 platform/kendryte/k210/k210.dts                   | 6 +++---
 platform/kendryte/k210/objects.mk                 | 6 +++---
 platform/kendryte/k210/platform.c                 | 6 +++---
 platform/qemu/sifive_u/config.mk                  | 6 +++---
 platform/qemu/sifive_u/objects.mk                 | 6 +++---
 platform/qemu/sifive_u/platform.c                 | 6 +++---
 platform/qemu/virt/config.mk                      | 6 +++---
 platform/qemu/virt/objects.mk                     | 6 +++---
 platform/qemu/virt/platform.c                     | 6 +++---
 platform/sifive/fu540/config.mk                   | 6 +++---
 platform/sifive/fu540/objects.mk                  | 6 +++---
 platform/sifive/fu540/platform.c                  | 6 +++---
 88 files changed, 260 insertions(+), 260 deletions(-)

diff --git a/LICENSE b/LICENSE
index 1cdc70e5209..46dea46425b 100644
--- a/LICENSE
+++ b/LICENSE
@@ -1,4 +1,4 @@
-Copyright (c) 2018 Western Digital Corporation or its affiliates.
+Copyright (c) 2019 Western Digital Corporation or its affiliates.
 
 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions are met:
diff --git a/Makefile b/Makefile
index 9823899115c..b362a56ea95 100644
--- a/Makefile
+++ b/Makefile
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 # Current Version
 MAJOR = 0
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
index c2e9e905350..d2346abc82b 100644
--- a/firmware/external_deps.mk
+++ b/firmware/external_deps.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 $(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
 $(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 5738f57e22b..63cb64c1c39 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 52771f8bdda..84d3758dae6 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 	. = FW_TEXT_START;
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index be9c296704b..4b7186316d6 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include "fw_base.S"
diff --git a/firmware/fw_jump.elf.ldS b/firmware/fw_jump.elf.ldS
index 8df45ab10a1..7ee078708c3 100644
--- a/firmware/fw_jump.elf.ldS
+++ b/firmware/fw_jump.elf.ldS
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 OUTPUT_ARCH(riscv)
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 7cbd57b421b..4d4db45202c 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include "fw_base.S"
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index 7106005be05..44fa4c3ff70 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 OUTPUT_ARCH(riscv)
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 128834c20cc..89410f71a4f 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 firmware-genflags-y =
 firmware-cppflags-y +=
diff --git a/firmware/payloads/objects.mk b/firmware/payloads/objects.mk
index 039559953a1..21e0185a8d5 100644
--- a/firmware/payloads/objects.mk
+++ b/firmware/payloads/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 firmware-bins-$(FW_PAYLOAD) += payloads/test.bin
 
diff --git a/firmware/payloads/test.elf.ldS b/firmware/payloads/test.elf.ldS
index d0854d5a376..f3f3242abc8 100644
--- a/firmware/payloads/test.elf.ldS
+++ b/firmware/payloads/test.elf.ldS
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 OUTPUT_ARCH(riscv)
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S
index e2b5f7b9212..4454e46882c 100644
--- a/firmware/payloads/test_head.S
+++ b/firmware/payloads/test_head.S
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #define __ASM_STR(x)	x
diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index 957f963f718..c96ed87251f 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/sbi_ecall_interface.h>
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index b7a8d4edb4c..e07104909a1 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_ASM_H__
diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 0fea6bdf5c1..215191ef099 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_ATOMIC_H__
diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h
index 993cbda9ddf..ce4b5d15704 100644
--- a/include/sbi/riscv_barrier.h
+++ b/include/sbi/riscv_barrier.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_BARRIER_H__
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a6651a15107..b441c8eccd0 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_ENCODING_H__
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index 0deb8e4a00c..71430235f26 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -1,10 +1,10 @@
 /*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_FP_H__
diff --git a/include/sbi/riscv_io.h b/include/sbi/riscv_io.h
index 08f1a2f0dc6..ea29c44d89a 100644
--- a/include/sbi/riscv_io.h
+++ b/include/sbi/riscv_io.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_IO_H__
diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h
index 4a683d92402..4476319aa34 100644
--- a/include/sbi/riscv_locks.h
+++ b/include/sbi/riscv_locks.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __RISCV_LOCKS_H__
diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index c7a6e884cc1..13d4fabe69c 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Atish Patra<atish.patra@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_BITOPS_H__
diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
index b9e4a1a78e0..6dc49fb2efd 100644
--- a/include/sbi/sbi_bits.h
+++ b/include/sbi/sbi_bits.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_BITS_H__
diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index df258ba6841..8069669714a 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_CONSOLE_H__
diff --git a/include/sbi/sbi_const.h b/include/sbi/sbi_const.h
index 3071094b825..e90b75231f7 100644
--- a/include/sbi/sbi_const.h
+++ b/include/sbi/sbi_const.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_CONST_H__
diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 4f393292c67..2425fc5ec37 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_ECALL_H__
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 1ea26764672..2bf004d9119 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_ECALL_INTERFACE_H__
diff --git a/include/sbi/sbi_emulate_csr.h b/include/sbi/sbi_emulate_csr.h
index c6fe419806a..00d5eff95a0 100644
--- a/include/sbi/sbi_emulate_csr.h
+++ b/include/sbi/sbi_emulate_csr.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_EMULATE_CSR_H__
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 955674eae8a..68076e739d5 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_ERROR_H__
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 70416430da9..8b11df74bb6 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_HART_H__
diff --git a/include/sbi/sbi_illegal_insn.h b/include/sbi/sbi_illegal_insn.h
index 1b8837fd128..2dc09888da2 100644
--- a/include/sbi/sbi_illegal_insn.h
+++ b/include/sbi/sbi_illegal_insn.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_ILLEGAl_INSN_H__
diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index 7c4267ba69c..033286f7cc5 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_INIT_H__
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 188f84e82c7..708dd8c1767 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_IPI_H__
diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h
index 16419586368..c631f763109 100644
--- a/include/sbi/sbi_misaligned_ldst.h
+++ b/include/sbi/sbi_misaligned_ldst.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_MISALIGNED_LDST_H__
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 05e7a7eebc0..8f4f44be543 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_PLATFORM_H__
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 562f7bb0ccb..e4c648c8317 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_SCRATCH_H__
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 3aad646af1d..3e794e2ccbb 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_SYSTEM_H__
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 37e1c795672..e40cce9d821 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_TIMER_H__
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index ab94d1961eb..504e7dd7060 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_TRAP_H__
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index c6cdf18c4c1..9231dff960d 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_TYPES_H__
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h
index 2b925c5e4eb..2da5785045a 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SBI_UNPRIV_H__
diff --git a/lib/objects.mk b/lib/objects.mk
index 2ce6328f591..ebee5924baa 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 lib-objs-y += riscv_asm.o
 lib-objs-y += riscv_atomic.o
diff --git a/lib/riscv_asm.c b/lib/riscv_asm.c
index 4ffd7547b65..2959a5402fd 100644
--- a/lib/riscv_asm.c
+++ b/lib/riscv_asm.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/riscv_atomic.c b/lib/riscv_atomic.c
index 4a52fc6fcac..f6d61951e4f 100644
--- a/lib/riscv_atomic.c
+++ b/lib/riscv_atomic.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/sbi_types.h>
diff --git a/lib/riscv_hardfp.S b/lib/riscv_hardfp.S
index 11f3e41e613..f363908a43c 100644
--- a/lib/riscv_hardfp.S
+++ b/lib/riscv_hardfp.S
@@ -1,10 +1,10 @@
 /*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifdef __riscv_flen
diff --git a/lib/riscv_locks.c b/lib/riscv_locks.c
index 0f94986735a..8b5413e0a97 100644
--- a/lib/riscv_locks.c
+++ b/lib/riscv_locks.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_barrier.h>
diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index 36a4414a62c..bc8f952638a 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/sbi_platform.h>
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 9341ea8cbf5..7f3986d5ba5 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/sbi_console.h>
diff --git a/lib/sbi_emulate_csr.c b/lib/sbi_emulate_csr.c
index d073189bc15..2918a804691 100644
--- a/lib/sbi_emulate_csr.c
+++ b/lib/sbi_emulate_csr.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index dfa474c77d0..ae11a526082 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 1bdc75902a9..3f7f4eacdd2 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 3e5de514f63..a806b456090 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 55896b26220..316b2a01779 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index bde960740f0..77885a4b59e 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index 738ff4568d9..7b73aa428e2 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/sbi_hart.h>
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index 0cef98a86af..a72c2809e66 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index c6a6b3fec5c..4c0f2a94cde 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_asm.h>
diff --git a/platform/common/include/plat/irqchip/plic.h b/platform/common/include/plat/irqchip/plic.h
index 79a8e5449a8..6e18440f7ce 100644
--- a/platform/common/include/plat/irqchip/plic.h
+++ b/platform/common/include/plat/irqchip/plic.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __IRQCHIP_PLIC_H__
diff --git a/platform/common/include/plat/serial/sifive-uart.h b/platform/common/include/plat/serial/sifive-uart.h
index b932b166eb8..2c4e7f3d1c4 100644
--- a/platform/common/include/plat/serial/sifive-uart.h
+++ b/platform/common/include/plat/serial/sifive-uart.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SERIAL_SIFIVE_UART_H__
diff --git a/platform/common/include/plat/serial/uart8250.h b/platform/common/include/plat/serial/uart8250.h
index ca19a9f6aac..c1ffc0d78d5 100644
--- a/platform/common/include/plat/serial/uart8250.h
+++ b/platform/common/include/plat/serial/uart8250.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SERIAL_UART8250_H__
diff --git a/platform/common/include/plat/string.h b/platform/common/include/plat/string.h
index ab09f4ecd12..67ad3f24dee 100644
--- a/platform/common/include/plat/string.h
+++ b/platform/common/include/plat/string.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Atish Patra <atish.patra@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __STRING_H__
diff --git a/platform/common/include/plat/sys/clint.h b/platform/common/include/plat/sys/clint.h
index 7da8aad19d6..78e120991fa 100644
--- a/platform/common/include/plat/sys/clint.h
+++ b/platform/common/include/plat/sys/clint.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __SYS_CLINT_H__
diff --git a/platform/common/include/plat/tinyfdt.h b/platform/common/include/plat/tinyfdt.h
index 246243f129c..8d21262c0d8 100644
--- a/platform/common/include/plat/tinyfdt.h
+++ b/platform/common/include/plat/tinyfdt.h
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #ifndef __FDT_H__
diff --git a/platform/common/irqchip/objects.mk b/platform/common/irqchip/objects.mk
index 84fffa604cb..041834da2db 100644
--- a/platform/common/irqchip/objects.mk
+++ b/platform/common/irqchip/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-common-objs-$(PLATFORM_IRQCHIP_PLIC) += irqchip/plic.o
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index ce2aafcd359..3a0c93f5392 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_io.h>
diff --git a/platform/common/libc/objects.mk b/platform/common/libc/objects.mk
index 9da0b0e70ec..1dcfe8e8d0d 100644
--- a/platform/common/libc/objects.mk
+++ b/platform/common/libc/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Atish Patra<atish.patra@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 libc_files = string.o
 
diff --git a/platform/common/libc/string.c b/platform/common/libc/string.c
index 9c094458eea..7cc0fb7caa3 100644
--- a/platform/common/libc/string.c
+++ b/platform/common/libc/string.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Atish Patra <atish.patra@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 /*
diff --git a/platform/common/libfdt/objects.mk b/platform/common/libfdt/objects.mk
index bd58e30d570..e045150771b 100644
--- a/platform/common/libfdt/objects.mk
+++ b/platform/common/libfdt/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Atish Patra<atish.patra@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \
                fdt_empty_tree.o
diff --git a/platform/common/objects.mk b/platform/common/objects.mk
index b3e06fdf7ed..49e963172b8 100644
--- a/platform/common/objects.mk
+++ b/platform/common/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-common-objs-y += tinyfdt.o
diff --git a/platform/common/serial/objects.mk b/platform/common/serial/objects.mk
index cb6062db906..67f85b47644 100644
--- a/platform/common/serial/objects.mk
+++ b/platform/common/serial/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-common-objs-$(PLATFORM_SERIAL_UART8250) += serial/uart8250.o
 platform-common-objs-$(PLATFORM_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
diff --git a/platform/common/serial/sifive-uart.c b/platform/common/serial/sifive-uart.c
index 60eade3b729..2c0e1f1ed59 100644
--- a/platform/common/serial/sifive-uart.c
+++ b/platform/common/serial/sifive-uart.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_io.h>
diff --git a/platform/common/serial/uart8250.c b/platform/common/serial/uart8250.c
index 7a990459b47..02eabbe0852 100644
--- a/platform/common/serial/uart8250.c
+++ b/platform/common/serial/uart8250.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_io.h>
diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index a518996b10e..78ea118c26d 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_io.h>
diff --git a/platform/common/sys/objects.mk b/platform/common/sys/objects.mk
index 183d8db6541..5cb98869cda 100644
--- a/platform/common/sys/objects.mk
+++ b/platform/common/sys/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-common-objs-$(PLATFORM_SYS_CLINT) += sys/clint.o
diff --git a/platform/common/tinyfdt.c b/platform/common/tinyfdt.c
index c3bf21002c8..e83f5406171 100644
--- a/platform/common/tinyfdt.c
+++ b/platform/common/tinyfdt.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <plat/string.h>
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index 14747c0c5a6..3bc49317e47 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Damien Le Moal <damien.lemoal@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 # Compiler flags
 platform-cppflags-y =
diff --git a/platform/kendryte/k210/k210.dts b/platform/kendryte/k210/k210.dts
index 17f5214f3cb..bcd075bf589 100644
--- a/platform/kendryte/k210/k210.dts
+++ b/platform/kendryte/k210/k210.dts
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Damien Le Moal <damien.lemoal@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 /dts-v1/;
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index a8a6e353d32..1924d7afc85 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Damien Le Moal <damien.lemoal@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-objs-y += uarths.o sysctl.o platform.o
 platform-dtb-y += k210.dtb
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 5c513d4e83b..f1e19b79866 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Damien Le Moal <damien.lemoal@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_encoding.h>
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 59d3d0646c1..6e2c1932838 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 # Compiler flags
 platform-cppflags-y =
diff --git a/platform/qemu/sifive_u/objects.mk b/platform/qemu/sifive_u/objects.mk
index 7e96bad0cef..c382cbfb26a 100644
--- a/platform/qemu/sifive_u/objects.mk
+++ b/platform/qemu/sifive_u/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-objs-y += platform.o
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 9f3da1c0acf..e8542f2e151 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_encoding.h>
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index bb162e01942..1ee66d0c58d 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 # Compiler flags
 platform-cppflags-y =
diff --git a/platform/qemu/virt/objects.mk b/platform/qemu/virt/objects.mk
index 7e96bad0cef..c382cbfb26a 100644
--- a/platform/qemu/virt/objects.mk
+++ b/platform/qemu/virt/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Anup Patel <anup.patel@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-objs-y += platform.o
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 63f4747e528..9dfd4d680e1 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <sbi/riscv_encoding.h>
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index ffcbff81620..30f64136128 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Atish Patra <atish.patra@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 # Compiler flags
 platform-cppflags-y =
diff --git a/platform/sifive/fu540/objects.mk b/platform/sifive/fu540/objects.mk
index 0a4dfa7e83f..e0d05853819 100644
--- a/platform/sifive/fu540/objects.mk
+++ b/platform/sifive/fu540/objects.mk
@@ -1,10 +1,10 @@
 #
-# Copyright (c) 2018 Western Digital Corporation or its affiliates.
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 # Authors:
 #   Atish Patra <atish.patra@wdc.com>
 #
-# SPDX-License-Identifier: BSD-2-Clause
-#
 
 platform-objs-y += platform.o
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 28b86ecad73..56ca666c101 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -1,10 +1,10 @@
 /*
- * Copyright (c) 2018 Western Digital Corporation or its affiliates.
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
  *   Atish Patra <atish.patra@wdc.com>
- *
- * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <libfdt.h>

From 8c25dcbf7692902a16e55679d84964db54464064 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 24 Jan 2019 16:56:47 +0900
Subject: [PATCH 0125/1765] platform: add template platform files

Create commented template files to use as a base for new platforms
support implementation.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/template/config.mk  |  62 +++++++++
 platform/template/objects.mk |  15 +++
 platform/template/platform.c | 242 +++++++++++++++++++++++++++++++++++
 3 files changed, 319 insertions(+)
 create mode 100644 platform/template/config.mk
 create mode 100644 platform/template/objects.mk
 create mode 100644 platform/template/platform.c

diff --git a/platform/template/config.mk b/platform/template/config.mk
new file mode 100644
index 00000000000..b1457da5e9b
--- /dev/null
+++ b/platform/template/config.mk
@@ -0,0 +1,62 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+#
+
+# Compiler pre-processor flags
+platform-cppflags-y =
+
+# C Compiler and assembler flags.
+# For a 64 bits platform, this will likely be:
+# 	-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+# For a 32 bits platform, this will likely be:
+# 	-mabi=lp32 -march=rv32imafdc -mcmodel=medlow
+platform-cflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-asflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
+
+# Linker flags: additional libraries and object files that the platform
+# code needs can be added here
+platform-ldflags-y =
+
+#
+# OpenSBI implements generic drivers for some common generic hardware. The
+# drivers currently available are the RISC-V Platform Level Interrupt
+# Controller (PLIC), RISC-V Core Local Interrupt controller (CLINT) and a UART
+# 8250 compliant serial line driver (UART8250). The following definitions allow
+# enabling the use of these generic drivers for the platform.
+#
+# PLATFORM_IRQCHIP_PLIC=<y|n>
+# PLATFORM_SYS_CLINT=<y|n>
+# PLATFORM_SERIAL_UART8250=<y|n>
+
+# Firmware load address configuration. This is mandatory.
+FW_TEXT_START=0x80000000
+
+#
+# Jump firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_JUMP=<y|n>
+FW_JUMP_ADDR=0x80200000
+# FW_JUMP_FDT_ADDR=0x82200000
+
+#
+# Firmware with payload configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_PAYLOAD=<y|n>
+FW_PAYLOAD_OFFSET=0x200000
+# FW_PAYLOAD_ALIGN=0x1000
+# FW_PAYLOAD_PATH="path to next boot stage binary image file"
+# FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"
+# FW_PAYLOAD_FDT="name of the platform defined flattened device tree file"
+# FW_PAYLOAD_FDT_ADDR=0x82200000
+
+#
+# Allow linking against static libc for standard functions (memset, memcpy, etc)
+#
+# PLATFORM_INCLUDE_LIBC=y
+
diff --git a/platform/template/objects.mk b/platform/template/objects.mk
new file mode 100644
index 00000000000..b9ba2317a19
--- /dev/null
+++ b/platform/template/objects.mk
@@ -0,0 +1,15 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+#
+
+# Space separated list of object file names to be compiled for the platform
+platform-objs-y += platform.o
+
+#
+# If the platform support requires a device tree file, the name of the device
+# tree compiled file should be specified here. The device tree source file
+# be in the form <dt file name>.dts
+#
+# platform-dtb-y += <dt file name>.dtb
diff --git a/platform/template/platform.c b/platform/template/platform.c
new file mode 100644
index 00000000000..cc4065e41da
--- /dev/null
+++ b/platform/template/platform.c
@@ -0,0 +1,242 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+
+/*
+ * Include these files as needed.
+ * See config.mk PLATFORM_xxx configuration parameters.
+ */
+#include <plat/irqchip/plic.h>
+#include <plat/serial/uart8250.h>
+#include <plat/sys/clint.h>
+
+/*
+ * Platform early initialization.
+ */
+static int platform_early_init(bool cold_boot)
+{
+	return 0;
+}
+
+/*
+ * Platform final initialization.
+ */
+static int platform final_init(bool cold_boot);
+{
+	return 0;
+}
+
+/*
+ * Get number of PMP regions for given HART.
+ */
+static u32 platform_pmp_region_count(u32 hartid)
+{
+	return 0;
+}
+
+/*
+ * Get PMP regions details (namely: protection, base address, and size) for
+ * a given HART.
+ */
+static int platform_pmp_region_info(u32 hartid, u32 index,
+				    ulong *prot, ulong *addr, ulong *log2size)
+{
+	return 0;
+}
+
+/*
+ * Initialize the platform console.
+ */
+static int platform_console_init(void)
+{
+	/* Example if the generic UART8250 driver is used */
+	return uart8250_init(PLATFORM_UART_ADDR,
+			     PLATFORM_UART_SHIFTREG_ADDR,
+			     PLATFORM_UART_BAUDRATE, 0, 1);
+}
+
+/*
+ * Write a character to the platform console output.
+ */
+static void platform_console_putc(char ch)
+{
+	/* Example if the generic UART8250 driver is used */
+	uart8250_putc(ch);
+}
+
+/*
+ * Read a character from the platform console input.
+ */
+static char platform_console_getc(void)
+{
+	return uart8250_getc();
+}
+
+/*
+ * Initialize the platform interrupt controller for current HART.
+ */
+static int platform_irqchip_init(bool cold_boot)
+{
+	u32 hartid = sbi_current_hartid();
+	int ret;
+
+	/* Example if the generic PLIC driver is used */
+	if (cold_boot) {
+		ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
+					     PLATFORM_PLIC_NUM_SOURCES,
+					     PLATFORM_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+}
+
+/*
+ * Initialize IPI for current HART.
+ */
+static int platform_ipi_init(bool cold_boot)
+{
+	int ret;
+
+	/* Example if the generic CLINT driver is used */
+	if (cold_boot) {
+		ret = clint_cold_ipi_init(PLATFORM_CLINT_ADDR,
+					  PLATFORM_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+/*
+ * Send IPI to a target HART
+ */
+static void platform_ipi_send(u32 target_hart)
+{
+	/* Example if the generic CLINT driver is used */
+	clint_ipi_send(target_hart);
+}
+
+/*
+ * Wait for target HART to acknowledge IPI.
+ */
+static void platform_ipi_sync(u32 target_hart)
+{
+	/* Example if the generic CLINT driver is used */
+	clint_ipi_sync(target_hart);
+}
+
+/*
+ * Clear IPI for a target HART.
+ */
+static void platform_ipi_clear(u32 target_hart)
+{
+	/* Example if the generic CLINT driver is used */
+	clint_ipi_clear(target_hart);
+}
+
+/*
+ * Initialize platform timer for current HART.
+ */
+static int platform_timer_init(bool cold_boot)
+{
+	int ret;
+
+	/* Example if the generic CLINT driver is used */
+	if (cold_boot) {
+		ret = clint_cold_timer_init(PLATFORM_CLINT_ADDR,
+					    PLATFORM_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_timer_init();
+}
+
+/*
+ * Get platform timer value.
+ */
+static u64 platform_timer_value(void)
+{
+	/* Example if the generic CLINT driver is used */
+	return clint_timer_value();
+}
+
+/*
+ * Start platform timer event for current HART.
+ */
+static void platform_timer_event_start(u64 next_event)
+{
+	/* Example if the generic CLINT driver is used */
+	clint_timer_event_start(next_event);
+}
+
+/*
+ * Stop platform timer event for current HART.
+ */
+static void platform_timer_event_stop(void)
+{
+	/* Example if the generic CLINT driver is used */
+	clint_timer_event_stop();
+}
+
+/*
+ * Reboot the platform.
+ */
+static int platform_system_reboot(u32 type)
+{
+	return 0;
+}
+
+/*
+ * Shutdown or poweroff the platform.
+ */
+static int platform_system_shutdown(u32 type)
+{
+	return 0;
+}
+
+/*
+ * Platform descriptor.
+ */
+struct sbi_platform platform = {
+
+	.name = "platform-name",
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count = 1,
+	.hart_stack_size = 4096,
+	.disabled_hart_mask = 0,
+
+	.early_init = platform_final_init,
+	.final_init = platform_final_init,
+
+	.pmp_region_count = platform_pmp_region_count,
+	.pmp_region_info = platform_pmp_region_info,
+
+	.console_init = platform_console_init,
+	.console_putc = platform_console_putc,
+	.console_getc = platform_console_getc,
+
+	.irqchip_init = platform_irqchip_init,
+	.ipi_init = platform_ipi_init,
+	.ipi_send = platform_ipi_send,
+	.ipi_sync = platform_ipi_sync,
+	.ipi_clear = platform_ipi_clear,
+
+	.timer_init = platform_timer_init,
+	.timer_value = platform_timer_value,
+	.timer_event_start = platform_timer_event_start,
+	.timer_event_stop = platform_timer_event_stop,
+
+	.system_reboot = platform_system_down,
+	.system_shutdown = platform_system_down
+};
+

From 36195f52c1ca40616f8a3b8fc8afe66c2d01bc04 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 23 Jan 2019 14:48:05 +0900
Subject: [PATCH 0126/1765] top: Rename LICENSE file to COPYING.BSD

Also make sure that this file contains only the official BSD 2-clause
license text, nothing else.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 LICENSE => COPYING.BSD | 20 ++++----------------
 1 file changed, 4 insertions(+), 16 deletions(-)
 rename LICENSE => COPYING.BSD (67%)

diff --git a/LICENSE b/COPYING.BSD
similarity index 67%
rename from LICENSE
rename to COPYING.BSD
index 46dea46425b..17ee3ae4bb0 100644
--- a/LICENSE
+++ b/COPYING.BSD
@@ -1,3 +1,6 @@
+The 2-Clause BSD License
+SPDX short identifier: BSD-2-Clause
+
 Copyright (c) 2019 Western Digital Corporation or its affiliates.
 
 Redistribution and use in source and binary forms, with or without
@@ -12,7 +15,7 @@ modification, are permitted provided that the following conditions are met:
 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
@@ -20,18 +23,3 @@ ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-The views and conclusions contained in the software and documentation are those
-of the authors and should not be interpreted as representing official policies,
-either expressed or implied, of the <project name> project.
-
---------------
-
-Note:
-Individual files contain the following tag instead of the full license text.
-
-::
-
-    SPDX-License-Identifier:    BSD-2-Clause
-
-This enables machine processing of license information based on the SPDX
-License Identifiers that are here available: http://spdx.org/licenses/

From e580b86a41f5c4f894cd042f7096603ac8eb108c Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Tue, 22 Jan 2019 16:42:54 +0900
Subject: [PATCH 0127/1765] docs: Contribution guideline update

Explicitely mention that this project adheres to the Developer
Certificate of Origin (DCO) and include this short text.

Also reformat the file to have lines bounded at 80 chars and add some
more details regarding the expected commit message format.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/contributing.md | 87 +++++++++++++++++++++++++++++++++++++-------
 1 file changed, 74 insertions(+), 13 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index a17c548357e..227c5c65307 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,13 +1,74 @@
-OpenSBI Contributing Guidelines
-===============================
-
-All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to the main repository avaliable at: https://github.com/riscv/opensbi
-
-As well as that all work must follow the following rules:
-1. We follow the [Linux coding style](https://www.kernel.org/doc/html/v4.10/process/coding-style.html). This means that ALL patches must include the Signed-off-by line.
-2. Commit subject must have at least one ":" prefix. Common ones are "lib:", "platform:", "firmware:", "docs:" and "top:".
-3. Maintainer should use "Rebase and Merge" when using GitHub to merge pull requests to avoid unnecessary merge commits.
-4. Maintainer should avoid creating branches directly in main riscv/opensbi repository. Instead prefer fork of GitHub riscv/opensbi repository and create branches in your own fork for pull requests.
-5. Maintainer cannot merge his own pull requests on GitHub.
-6. A pull request must get at least one review from relevant maintainer.
-7. A pull request must spend at least 24 hours in review so that everyone gets a chance to review.
+OpenSBI Contribution Guideline
+==============================
+
+All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to
+[OpenSBI main repository].
+
+All contributed work must follow the following rules:
+1. OpenSBI code should be written in accordance to [Linux coding style].
+2. This project embraces the [Developer Certificate of Origin (DCO)] for
+contributions. This means that you must agree to the following prior to
+submitting patches: if you agree with this developer certificate you
+acknowledge this by adding a Signed-off-by tag to your patch commit log.
+Every submitted patch must have this tag.
+3. A commit message must have a subject line, followed by a blank line,
+followed by a description of the patch content. A blank line and the author
+Signed-off-by tag must follow this description.
+4. A commit subject line must start with a prefix followed by a ":". Common
+prefixes are for example "lib:", "platform:", "firmware:", "docs:" and "top:".
+5. Maintainers should use "Rebase and Merge" when using GitHub to merge pull
+requests to avoid creating unnecessary merge commits.
+6. Maintainers should avoid creating branches directly in the main
+riscv/opensbi repository. Instead prefer using a fork of riscv/opensbi main
+repository and branches within that fork to create pull requests.
+7. A maintainer cannot merge his own pull requests in riscv/opensbi main
+repository.
+8. A pull request must get at least one review from a maintainer.
+9. A pull request must spend at least 24 hours in review to allow for other
+developers to review.
+
+-----------------------------------------------------------------------
+
+Developer Certificate of Origin
+Version 1.1
+
+Copyright (C) 2004, 2006 The Linux Foundation and its contributors.
+660 York Street, Suite 102,
+San Francisco, CA 94110 USA
+
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
+
+
+Developer's Certificate of Origin 1.1
+
+By making a contribution to this project, I certify that:
+
+(a) The contribution was created in whole or in part by me and I
+    have the right to submit it under the open source license
+    indicated in the file; or
+
+(b) The contribution is based upon previous work that, to the best
+    of my knowledge, is covered under an appropriate open source
+    license and I have the right under that license to submit that
+    work with modifications, whether created in whole or in part
+    by me, under the same open source license (unless I am
+    permitted to submit under a different license), as indicated
+    in the file; or
+
+(c) The contribution was provided directly to me by some other
+    person who certified (a), (b) or (c) and I have not modified
+    it.
+
+(d) I understand and agree that this project and the contribution
+    are public and that a record of the contribution (including all
+    personal information I submit with it, including my sign-off) is
+    maintained indefinitely and may be redistributed consistent with
+    this project or the open source license(s) involved.
+
+-----------------------------------------------------------------------
+
+[OpenSBI main repository]: https://github.com/riscv/opensbi
+[Linux coding style]: https://www.kernel.org/doc/html/v4.10/process/coding-style.html
+[Developer Certificate of Origin (DCO)]: http://developercertificate.org/
+

From 808fe4b82a68fd0c99b3a4cc9185adba817e03d0 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 23 Jan 2019 23:48:42 +0900
Subject: [PATCH 0128/1765] docs/firmware: Add top level document file

Provide an overview of all supported firmware files and point to each
firmware type documentation file.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/firmware/fw.md | 60 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 docs/firmware/fw.md

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
new file mode 100644
index 00000000000..2b6c26a5084
--- /dev/null
+++ b/docs/firmware/fw.md
@@ -0,0 +1,60 @@
+OpenSBI Platform Firmwares
+==========================
+
+OpenSBI provides firmware builds for specific platforms. Different types of
+firmwares are supported to deal with the differences between different platforms
+early boot stage. All firmwares will execute the same initialization procedure
+of the platform hardware according to the platform specific code as well as
+OpenSBI generic library code. The supported firmwares types will differ in how
+the arguments passed by the platform early boot stage are handled, as well as
+how the boot stage following the firmware will be handled and executed.
+
+OpenSBI currently supports two different types of firmwares.
+
+Firmware with Jump Address (*FW_JUMP*)
+--------------------------------------
+
+The *FW_JUMP* firmware only handles the address of the next booting stage
+entry, e.g. a bootloader or an OS kernel, without directly including the
+binary code for this next stage.
+
+A *FW_JUMP* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is capable of loading both the OpenSBI firmware
+and the booting stage binary to follow OpenSBI firmware.
+
+Firmware with Payload (*FW_PAYLOAD*)
+------------------------------------
+
+The *FW_PAYLOAD* firmware directly includes the binary code for the booting
+stage to follow OpenSBI firmware execution. Typically, this payload will be a
+bootloader or an OS kernel.
+
+A *FW_PAYLOAD* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is not capable of loading both OpenSBI firmware and
+the booting stage to follow OpenSBI firmware.
+
+A *FW_PAYLOAD* firmware is also useful for cases where the booting stage prior
+to OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In such
+case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree in the
+.text section of the final firmware.
+
+Firmware Configuration and Compilation
+--------------------------------------
+
+All firmware types mandate the definition of the following compile time
+configuration parameter.
+
+* **FW_TEXT_ADDR** - Defines the address at which the previous booting stage
+  loads OpenSBI firmware.
+
+Additionally, each firmware type as a set of type specific configuration
+parameters. Detailed information for each firmware type can be found in the 
+following documents.
+
+* *[FW_JUMP]*: The *Firmware with Jump Address (FW_JUMP)* is described in more
+  details in the file *fw_jump.md*.
+* *[FW_PAYLOAD]*: The *Firmware with Payload (FW_PAYLOAD)* is described in more
+  details in the file *fw_payload.md*.
+
+[FW_JUMP]: fw_jump.md
+[FW_PAYLOAD]: fw_payload.md

From fff48ee2bf9abd804fe828a75fcce3e046b7d3cc Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 23 Jan 2019 16:00:35 +0900
Subject: [PATCH 0129/1765] docs/firmware: Update FW_JUMP documentation

Reformatting, typos, and various corrections.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/firmware/fw_jump.md | 69 ++++++++++++++++++++++++----------------
 1 file changed, 41 insertions(+), 28 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index c776aa9b629..39d3f743779 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -1,39 +1,52 @@
-OpenSBI Firmware with Jump Address (FW_JUMP)
+OpenSBI Firmware with Jump Address *FW_JUMP*
 ============================================
 
-The **OpenSBI firmware with Jump Address (FW_JUMP)** is a
-firmware which only know the address of next booting stage
-(i.e. bootloader/kernel).
+OpenSBI **firmware with Jump Address (FW_JUMP)** is a firmware which only
+handles the address of the next booting stage entry, e.g. a bootloader or an OS
+kernel, without directly including the binary code for this next stage.
 
-This **FW_JUMP** firmware is particularly useful when booting
-stage prior to OpenSBI firmware is capable of loading OpenSBI
-firmware and booting stage after OpenSBI firmware separately.
+A *FW_JUMP* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is capable of loading both the OpenSBI firmware and
+the booting stage binary to follow OpenSBI firmware.
 
-How to Enable?
---------------
+*FW_JUMP* Compilation
+---------------------
 
-The **FW_JUMP** firmware can be enabled by any of the following
-methods:
+A platform *FW_JUMP* firmware can be enabled by any of the following methods.
 
-1. Passing `FW_JUMP=y` command-line parameter to
-top-level `make`
-2. Setting `FW_JUMP=y` in platform `config.mk`
+1. Spedifying `FW_JUMP=y` on the top level `make` command line.
+2. Specifying `FW_JUMP=y` in the target platform *config.mk* configuration file.
 
-Config Options
---------------
+The compiled *FW_JUMP* firmware ELF file is named *fw_jump.elf*. Its expanded
+image file is *fw_jump.bin*. Both files are created in the platform specific
+build directory under the *build/platform/<platform_subdir>/firmware* directory.
 
-We need more config details for **FW_JUMP** firmware to work
-correctly. These configuration details can be passed as parameters to
-top-level `make` or can be set in platform `config.mk`.
+*FW_JUMP* Firmware Configuration Options
+----------------------------------------
 
-Following are the configuration options for a **FW_JUMP** firmware:
+To operate correctly, a *FW_JUMP* firmware requires some configuration
+parameters to be defined using either the top level `make` command line or the
+target platform *config.mk* configuration file. The possible parameters are as
+follows.
 
-* **FW_JUMP_ADDR** - Address where next booting stage is
-located. This is a mandatory config option and will result
-in compile error if not provided.
+* **FW_JUMP_ADDR** - Address of the entry point of the booting stage to be
+  executed following OpenSBI firmware. This address generally correspond
+  exactly to the address where this next booting stage was loaded. This is a
+  mandatory parameter. Compilation errors will result from not defining this
+  address.
 
-* **FW_JUMP_FDT_ADDR** - Address where the FDT passed by the prior
-booting stage will be placed before passing to the next booting
-stage. If this option is not provided then the firmware will pass
-zero as the FDT address to the next booting stage.
->>>>>>> 2c0dc4dc... docs: Typo fixes.
+* **FW_JUMP_FDT_ADDR** - Address where the *flattened device tree (FDT file)*
+  passed by the prior booting stage will be placed in memory before executing
+  the booting stage following OpenSBI firmware. If this option is not provided
+  then OpenSBI firmware will pass zero as the FDT address to the following
+  booting stage.
+
+*FW_JUMP* Example
+-----------------
+
+The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrates how to configure
+and use a *FW_JUMP* firmware. Detailed information regarding these platforms
+can be found in the platforms documentation files.
+
+[qemu/virt]: ../platform/qemu_virt.md
+[qemu/sifive_u]: ../platform/qemu_sifive_u.md

From 560147b264769399105b0d1ebf50124794f587c1 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 23 Jan 2019 16:21:59 +0900
Subject: [PATCH 0130/1765] docs/firmware: Update FW_PAYLOAD documentation

Reformatting, typos, and various corrections.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/firmware/fw_payload.md | 141 ++++++++++++++++++++----------------
 1 file changed, 78 insertions(+), 63 deletions(-)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 2dee2969dc7..15edac7dd3e 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -1,75 +1,90 @@
-OpenSBI Firmware with Payload (FW_PAYLOAD)
+OpenSBI Firmware with Payload *FW_PAYLOAD*
 ==========================================
 
-The **OpenSBI firmware with Payload (FW_PAYLOAD)** is a firmware which
-includes the next booting stage binary (i.e. bootloader/kernel) as a
-payload embedded in the OpenSBI firmware binary image.
+OpenSBI **firmware with Payload (FW_PAYLOAD)** is a firmware which directly
+includes the binary for the booting stage to follow OpenSBI firmware execution.
+Typically, this payload will be a bootloader or an OS kernel.
 
-This *FW_PAYLOAD* firmware is particularly useful when the booting stage
-prior to OpenSBI firmware is not capable of loading the OpenSBI firmware
-and the booting stage after OpenSBI firmware separately.
+A *FW_PAYLOAD* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is not capable of loading both OpenSBI firmware and
+the booting stage to follow OpenSBI firmware.
 
-It is also possible that the booting stage prior to OpenSBI firmware
-does not pass a *flattened device tree (FDT)*. In this case, a
-*FW_PAYLOAD* firmware allows embedding a flattened device tree in
-the .text section of the final firmware.
+A *FW_PAYLOAD* firmware is also useful for cases where the booting stage prior
+to OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In such
+case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree in the
+.text section of the final firmware.
 
-How to Enable?
---------------
+Enabling *FW_PAYLOAD* compilation
+---------------------------------
 
-The *FW_PAYLOAD* firmware can be enabled by any of the following methods:
+The *FW_PAYLOAD* firmware can be enabled by any of the following methods.
 
-1. Passing `FW_PAYLOAD=y` command-line parameter to top-level `make`
-2. Setting `FW_PAYLOAD=y` in platform `config.mk`
+1. Specifying `FW_PAYLOAD=y` on the top level `make` command line.
+2. Specifying `FW_PAYLOAD=y` in the target platform *config.mk* configuration
+   file.
+
+The compiled *FW_PAYLOAD* firmware ELF file is named *fw_jump.elf*. Its
+expanded image file is *fw_payload.bin*. Both files are created in the
+platform specific build directory under the
+*build/platform/<platform_subdir>/firmware* directory.
 
 Configuration Options
 ---------------------
 
-A *FW_PAYLOAD* firmware needs to be built according to some predefined
-configuration options to work correctly. These configuration details can
-be passed as parameters to the top-level `make` command or can be defined
- in a platform *config.mk* build configuration file.
-
-The following are the build configuration parameters for a *FW_PAYLOAD*
-firmware:
-
-* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload
-binary will be linked in the final *FW_PAYLOAD* firmware binary image.
-<<<<<<< HEAD
-This configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not
-defined.  Compilation errors will result from an incorrect definition
-of *FW_PAYLOAD_OFFSET* or *FW_PAYLOAD_ALIGN*, or if neither of these
-parameters are defined.
-
-* **FW_PAYLOAD_ALIGN** - Address alignment constraint where the payload
-binary will be linked after the end of the base firmware binary in the
-final *FW_PAYLOAD* firmware binary image. This configuration parameter
-is mandatory if *FW_PAYLOAD_OFFSET* is not defined and should not be
-defined otherwise.
-
-* **FW_PAYLOAD_PATH** - Path to the next booting stage binary image
-file.  If this option is not provided then a simple test payload is
-automatically generated, executing a `while (1)` loop.
-
-* **FW_PAYLOAD_FDT_PATH** - Path to an external flattened device tree
-binary file to be embedded in the *.text* section of the final
-*FW_PAYLOAD* firmware. If this option is not provided and no internal
-device tree file is specified by the platform (c.f. *FW_PAYLOAD_FDT*),
-then the firmware will expect the FDT to be passed as an argument by
-the prior booting stage.
-
-* **FW_PAYLOAD_FDT** - Path to an internal flattened device tree
-binary file defined by the platform code. The file name must match the
-DTB file name specified in the platform *objects.mk* file with the
-*platform-dtb-y* entry. This option results in *FW_PAYLOAD_FDT_PATH* to
-be automatically set. Specifying *FW_PAYLOAD_FDT_PATH* on the `make`
-command line disables *FW_PAYLOAD_FDT* and the command line specified
-device tree binary file is used for building the final firmware.
-
-* **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior
-booting stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and
-embedded in the *.text* section will be placed before executing the
-next booting stage, that is, the payload firmware. If this option is
-not provided then the firmware will pass zero as the FDT address to the
-next booting stage.
+A *FW_PAYLOAD* firmware is built according to configuration parameters and
+options. These configuration parameters can be defined using either the top
+level `make` command line or the target platform *config.mk* configuration
+file. The parameters currently defined are as   follows.
+
+* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload binary
+  will be linked in the final *FW_PAYLOAD* firmware binary image. This
+  configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not defined.
+  Compilation errors will result from an incorrect definition of
+  *FW_PAYLOAD_OFFSET* or of *FW_PAYLOAD_ALIGN*, or if neither of these
+  parameters are defined.
+
+* **FW_PAYLOAD_ALIGN** - Address alignment constraint where the payload binary
+  will be linked after the end of the base firmware binary in the final
+  *FW_PAYLOAD* firmware binary image. This configuration parameter is mandatory
+  if *FW_PAYLOAD_OFFSET* is not defined. If both *FW_PAYLOAD_OFFSET* and
+  *FW_PAYLOAD_ALIGN* are defined, *FW_PAYLOAD_OFFSET* is used and 
+  *FW_PAYLOAD_ALIGN* ignored.
+
+* **FW_PAYLOAD_PATH** - Path to the image file of the next booting stage
+  binary.  If this option is not provided then a simple test payload is
+  automatically generated and used as a payload. This test payload executes
+  an infinite `while (1)` loop after printing a message on the platform console.
+
+* **FW_PAYLOAD_FDT_PATH** - Path to an external flattened device tree binary
+  file to be embedded in the *.text* section of the final firmware. If this
+  option is not provided and no internal device tree file is specified by the
+  platform (c.f. *FW_PAYLOAD_FDT*), then the firmware will expect the FDT to
+  be passed as an argument by the prior booting stage.
+
+* **FW_PAYLOAD_FDT** - Path to an internal flattened device tree binary file
+  defined by the platform code. The file name must match the DTB file name
+  specified in the platform *objects.mk* file with the *platform-dtb-y* entry.
+  This option results in *FW_PAYLOAD_FDT_PATH* to be automatically set.
+  Specifying *FW_PAYLOAD_FDT_PATH* on the `make` command line disables
+  *FW_PAYLOAD_FDT* and the command line specified device tree binary file is
+  used for building the final firmware.
+
+* **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior booting
+  stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and embedded in
+  the *.text* section will be placed before executing the next booting stage,
+  that is, the payload firmware. If this option is not provided then the
+  firmware will pass zero as the FDT address to the next booting stage.
+
+*FW_PAYLOAD* Example
+--------------------
+
+The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrates how to configure
+and use a *FW_PAYLOAD* firmware. Detailed information regarding these platforms
+can be found in the platforms documentation files.
+
+The *kendryte/k210* platform also enables build of a *FW_PAYLOAD* using an
+internally defined device tree file (*FW_PAYLOAD_FDT*).
+
+[qemu/virt]: ../platform/qemu_virt.md
+[qemu/sifive_u]: ../platform/qemu_sifive_u.md
 

From ecfd63025dffda0fb5a7eddf4210a217da8e30ca Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 24 Jan 2019 12:51:22 +0900
Subject: [PATCH 0131/1765] docs/platform: Add top level document file

List supported platforms and point to the platform specific document.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/platform/platform.md | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 docs/platform/platform.md

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
new file mode 100644
index 00000000000..15764e2de12
--- /dev/null
+++ b/docs/platform/platform.md
@@ -0,0 +1,29 @@
+OpenSBI Supported Platforms
+===========================
+
+OpenSBI currently supports the following virtual and hardware platforms.
+
+* **QEMU RISC-V Virt Machine**: Platform support for QEMU *virt* virtual RISC-V
+  machine. This virtual machine is intended for RISC-V software development and
+  test. More details on this platform can be found in the file *[qemu_virt.md]*.
+
+* **QEMU SiFive Unleashed Machine**: Platform support for the *sifive_u* QEMU
+  virtual RISC-V machine. This is an emulation machine of the SiFive Unleashed
+  board. More details on this platform can be found in the file
+  *[qemu_sifive_u.md]*.
+
+* **SiFive FU540 SoC**: Platform support for SiFive FU540 SoC used on the
+  SiFive Unleashed board. This platform is very similar to the *QEMU sifive_u*
+  platform.
+
+* **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on
+  boards such as the Kendryte KD233 and Sipeed MAIX Dock boards.
+
+The code for these supported platforms can be used as example to implement
+support for other platforms. The *platform/template* directory also provides
+template files for implementing support for a new platform. The *object.mk*,
+*config.mk* and *platform.c* template files provided are commented to facilitate
+the implementation.
+
+[qemu_virt.md]: qemu_virt.md
+[qemu_sifive_u.md]: qemu_sifive_u.md

From 84cd4b7cd005a4d6f93405ab68e0a9fbfb9064a8 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 24 Jan 2019 00:56:44 +0900
Subject: [PATCH 0132/1765] docs/platform: Update QEMU platforms documentation

Mostly reformating. Some minor edits.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/platform/qemu_sifive_u.md | 56 +++++++++++++---------
 docs/platform/qemu_virt.md     | 88 +++++++++++++++++++++-------------
 2 files changed, 89 insertions(+), 55 deletions(-)

diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
index da1315bc4cc..b3f73d6368a 100644
--- a/docs/platform/qemu_sifive_u.md
+++ b/docs/platform/qemu_sifive_u.md
@@ -1,42 +1,52 @@
-QEMU SiFive Unleashed Machine
-=============================
+QEMU SiFive Unleashed Machine Platform
+======================================
 
-The **QEMU SiFive Unleashed Machine** is an emulation of
-SiFive Unleashed platform.
+The **QEMU SiFive Unleashed Machine** is an emulation of the SiFive Unleashed
+platform.
 
-To build platform specific library and firmwares, provide
-`PLATFORM=qemu/sifive_u` parameter to top-level make.
+To build this platform specific library and firmwares, provide the
+*PLATFORM=qemu/sifive_u* parameter to the top level `make` command line.
 
 Platform Options
 ----------------
 
-We don't have any platform specific options for this platform.
+The *QEMU SiFive Unleashed Machine* platform does not have any platform specific
+options.
 
-Try on QEMU RISC-V 64bit
-------------------------
+Executing on QEMU RISC-V 64bit
+------------------------------
 
-**No Payload**
+**No Payload Case**
 
-*Build*:
+Build:
 ```
-    make PLATFORM=qemu/virt
+make PLATFORM=qemu/virt
 ```
-*Run*:
+
+Run:
 ```
-    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
+qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
 ```
 
-**U-Boot Payload**
+**U-Boot as a Payload**
 
-*Note*: We assume that U-Boot is compiled using `qemu-riscv64_smode_defconfig`.
+Note: the command line examples here assume that U-Boot was compiled using
+the `qemu-riscv64_smode_defconfig` configuration.
 
-*Build*:
+Build:
+```
+make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+```
+
+Run:
+```
+qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
 ```
-    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+or
 ```
-*Run*:
+qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/sifive_u/firmware/fw_jump.elf \
+	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
 ```
-    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
-    or
-    qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio -kernel build/platform/qemu/sifive_u/firmware/fw_jump.elf -device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
-```
\ No newline at end of file
diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index c9a4a2c9864..5478ce7e773 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -1,59 +1,83 @@
-QEMU RISC-V Virt Machine
-========================
+QEMU RISC-V Virt Machine Platform
+=================================
 
-The **QEMU RISC-V Virt Machine** is virtual platform created
-for RISC-V software development. It is also referred to as
-QEMU RISC-V VirtIO machine because it uses VirtIO devices
-for network, storage, and other types of IO.
+The **QEMU RISC-V Virt Machine** is virtual platform created for RISC-V
+software development and test. It is also referred to as
+*QEMU RISC-V VirtIO machine* because it uses VirtIO devices for network,
+storage, and other types of IO.
 
-To build platform specific library and firmwares, provide
-`PLATFORM=qemu/virt` parameter to top-level make.
+To build platform specific library and firmwares, provide the
+*PLATFORM=qemu/virt* parameter to the top level `make` command.
 
 Platform Options
 ----------------
 
-We don't have any platform specific options for this platform.
+The *QEMU RISC-V Virt Machine* platform does not have any platform specific
+options.
 
-Try on QEMU RISC-V 64bit
-------------------------
+Execution on QEMU RISC-V 64bit
+------------------------------
 
-**No Payload**
+**No Payload Case**
 
-*Build*:
+Build:
 ```
-    make PLATFORM=qemu/virt
+make PLATFORM=qemu/virt
 ```
-*Run*:
+
+Run:
 ```
-    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf
+qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
 ```
 
 **U-Boot Payload**
 
-*Note*: We assume that U-Boot is compiled using `qemu-riscv64_smode_defconfig`.
+Note: the command line examples here assume that U-Boot was compiled using
+the `qemu-riscv64_smode_defconfig` configuration.
 
-*Build*:
+Build:
+```
+make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 ```
-    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+
+Run:
 ```
-*Run*:
+qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
 ```
-    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf
-    or
-    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_jump.elf -device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
+or
+```
+qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
+	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
 ```
 
-**Linux Payload**
+**Linux Kernel Payload**
 
-*Note*: We assume that Linux is compiled using `defconfig`.
+Note: We assume that Linux kernel is compiled using
+*arch/riscv/configs/defconfig*.
 
-*Build*:
+Build:
 ```
-    make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
-*Run*:
+
+Run:
 ```
-    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_payload.elf -drive file=<path_to_linux_rootfs>,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -append "root=/dev/vda rw console=ttyS0"
-    or
-    qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -kernel build/platform/qemu/virt/firmware/fw_jump.elf -device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 -drive file=<path_to_linux_rootfs>,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -append "root=/dev/vda rw console=ttyS0"
-```
\ No newline at end of file
+qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf \
+	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
+	-device virtio-blk-device,drive=hd0 \
+	-append "root=/dev/vda rw console=ttyS0"
+```
+or
+```
+qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
+	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 \
+	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
+	-device virtio-blk-device,drive=hd0 \
+	-append "root=/dev/vda rw console=ttyS0"
+```
+

From fba7e7c3eaef7f256063fea3cfda829ccf75eab4 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 23 Jan 2019 15:14:13 +0900
Subject: [PATCH 0133/1765] docs: README.md update

Reformat to fit lines within 80 chars, fix hyperlinks, etc.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 README.md | 198 ++++++++++++++++++++++++++++++++++++------------------
 1 file changed, 131 insertions(+), 67 deletions(-)

diff --git a/README.md b/README.md
index f63f202e030..36f403927cd 100644
--- a/README.md
+++ b/README.md
@@ -1,138 +1,202 @@
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
-The **RISC-V Supervisor Binary Interface (SBI)** is a recommended
-interface between:
+The **RISC-V Supervisor Binary Interface (SBI)** is a recommended interface
+between:
 
-1. A platform specific firmware (M-mode) and a general purpose
-   OS or hypervisor or bootloader (S-mode or HS-mode).
-2. A hypervisor (HS-mode) and a general purpose OS or bootloader (VS-mode)
+1. A platform specific firmware running in M-mode and a general purpose OS,
+   hypervisor or bootloader running in S-mode or HS-mode.
+2. A hypervisor running in HS-mode and a general purpose OS or bootloader
+   executed in VS-mode.
 
-The *RISC-V SBI specification* is maintained as an independent project
-by the RISC-V Foundation in [Github](https://github.com/riscv/riscv-sbi-doc)
+The *RISC-V SBI specification* is maintained as an independent project by the
+RISC-V Foundation in [Github].
 
-OpenSBI aims to provides an open-source and extensible implementation of
-the RISC-V SBI specification for case 1 mentioned above. OpenSBI
-implementation can be easily extended by RISC-V platform or System-on-Chip
-vendors to fit a particular hardware configuration.
-
-OpenSBI provides three components:
+OpenSBI aims to provides an open-source and extensible implementation of the
+RISC-V SBI specification for case 1 mentioned above. OpenSBI implementation
+can be easily extended by RISC-V platform or System-on-Chip vendors to fit a
+particular hardware configuration.
 
+OpenSBI provides three different components:
 1. *libsbi.a* - A generic OpenSBI static library
-2. *libplatsbi.a* - Platform specific OpenSBI static library, that is,
+2. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
                     libsbi.a plus platform specific hooks
 3. *firmwares* - Platform specific bootable firmware binaries
 
-Building and Installing generic *libsbi.a*
-------------------------------------------
+Building and Installing the generic OpenSBI static library
+----------------------------------------------------------
+
+*libsbi.a* can be natively compiled or cross-compiled on a host with a
+different base architecture than RISC-V.
 
-For cross-compiling, the environment variable *CROSS_COMPILE* must
-be defined to specify the toolchain executable name prefix, e.g.
-*riscv64-unknown-elf-* if the gcc executable used is
-*riscv64-unknown-elf-gcc*.
+For cross-compiling, the environment variable *CROSS_COMPILE* must be defined
+to specify the name prefix of the RISC-V compiler toolchain executables, e.g.
+*riscv64-unknown-elf-* if the gcc executable used is *riscv64-unknown-elf-gcc*.
 
 To build the generic OpenSBI library *libsbi.a*, simply execute:
 ```
 make
 ```
 
-All compiled binaries will be placed in the *build* directory.
-To specify an alternate build directory target, run:
+All compiled binaries as well as the result *libsbi.a* static library file will
+be placed in the *build/lib* directory. To specify an alternate build root
+directory path, run:
 ```
 make O=<build_directory>
 ```
 
-To generate files to be installed for using *libsbi.a* in other projects,
-run:
+To generate files to be installed for using *libsbi.a* in other projects, run:
 ```
 make install
 ```
+
 This will create the *install* directory with all necessary include files
-and binary files under it. To specify an alternate installation directory,
-run:
+copied under the *install/include* directory and library file copied in the
+*install/lib* directory. To specify an alternate installation root directory
+path, run:
 ```
 make I=<install_directory> install
 ```
 
-Building and Installing platform specific *libsbi.a* and firmwares
-------------------------------------------------------------------
+Building and Installing the platform specific static library and firmwares
+--------------------------------------------------------------------------
 
-The libplatsbi.a and firmware files are only built if the
-*`PLATFORM=<platform_subdir>`* argument is specified on make command lines.
-*`<platform_subdir>`* must specify the path to one of the leaf directories
-under the *`platform`* directory. For example, to compile the library and
-firmware for QEMU RISC-V *virt* machine, *`<platform_subdir>`*
-should be *`qemu/virt`*.
+The platform specific *libplatsbi.a* static library and the platform firmwares
+are only built if the *PLATFORM=<platform_subdir>* argument is specified on
+the make command line. *<platform_subdir>* must specify the relative path from
+OpenSBI code directory to one of the leaf directories under the *platform*
+directory. For example, to compile the platform library and firmwares for QEMU
+RISC-V *virt* machine, *<platform_subdir>* should be *qemu/virt*.
 
-To build *libsbi, libplatsbi, and firmwares* for a specific platform, run:
+To build *libsbi.a*, *libplatsbi.a* and the firmwares for a specific platform,
+run:
 ```
 make PLATFORM=<platform_subdir>
-or
+```
+
+An alternate build directory path can also be specified.
+```
 make PLATFORM=<platform_subdir> O=<build_directory>
 ```
 
-To install *libsbi, headers, libplatsbi, and firmwares*, run:
+The platform specific library *libplatsbi.a* will be generated in the
+*build/platform/<platform_sub_dir>/lib* directory. The platform firmware files
+will be under the *build/platform/<platform_sub_dir>/firmware* directory.
+The compiled firmwares will be available in two different format: an ELF file
+and an expanded image file.
+
+To install *libsbi.a*, *libplatsbi.a*, and the compiled firmwares, run:
 ```
 make PLATFORM=<platform_subdir> install
-or
+```
+
+This will copy the compiled platform specific libraries and firmware files
+under the *install/platform/<platform_sub_dir>/* directory. An alternate
+install root directory path can be specified as follows.
+```
 make PLATFORM=<platform_subdir> I=<install_directory> install
 ```
 
-In addition, platform specific make command-line options to top-level make
-, such as *PLATFORM_<xyz>* or *FW_<abc>* can also be specified. These
-options are described under *`docs/platform/<platform_name>.md`* and
-*`docs/firmware/<firmware_name>.md`*.
+In addition, platform specific configuration options can be specified with the
+top-level make command line. These options, such as *PLATFORM_<xyz>* or
+*FW_<abc>*, are platform specific and described in more details in the
+*docs/platform/<platform_name>.md* files and
+*docs/firmware/<firmware_name>.md* files.
 
 License
--------------
-The software is provided under a BSD-2-Clause license. Contributions to this
-project are accepted under the same license with developer sign-off as
-described in the [Contributing Guidelines](docs/contributing.md).
+-------
+
+OpenSBI is distributed under the terms of the BSD 2-clause license
+("Simplified BSD License" or "FreeBSD License", SPDX: *BSD-2-Clause*).
+A copy of this license with OpenSBI copyright can be found in the file
+[COPYING.BSD].
+
+All source files in OpenSBI contain the 2-Clause BSD license SPDX short
+indentifier in place of the full license text.
+
+```
+SPDX-License-Identifier:    BSD-2-Clause
+```
+
+This enables machine processing of license information based on the SPDX
+License Identifiers that are available on the [SPDX] web site.
+
+OpenSBI source code also contains code reused from other projects as listed
+below. The original license text of these projects is included in the source
+files where the reused code is present.
 
-This project also contains code from other projects as listed below. The original
-license text is included in those source files.
+1. The libfdt source code is disjunctively dual licensed
+   (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
+   under the terms of the BSD 2-Clause license. Any contributions to this
+   code must be made under the terms of both licenses.
 
-1. The libfdt source code is disjunctively dual licensed (GPL-2.0+ OR BSD-2-Clause). It is
-   used by this project under the terms of the BSD-2-Clause license. Any contributions to
-   this code must be made under the terms of both licenses.
+Contributing to OpenSBI
+-----------------------
+
+The OpenSBI project encourages and welcomes contributions. Contributions should
+follow the rules described in OpenSBI [Contribution Guideline] document.
+In particular, all patches sent should contain a Signed-off-by tag.
 
 Documentation
 -------------
 
-A more detailed documentation is under the *docs* directory and organized
-as follows.
+Detailed documentation of various aspects of OpenSBI can be found under the
+*docs* directory. The documentation covers the following topics.
 
-* *`docs/contributing.md`* - Guidelines for contributing to OpenSBI project
-* *`docs/platform_guide.md`* - Guidelines for adding new platform support
-* *`docs/library_usage.md`* - Guidelines for using the static library
-* *`docs/platform/<platform_name>.md`* - Documentation for the platform *<platform_name>*
-* *`docs/firmware/<firmware_name>.md`* - Documentation for the firmware *<firmware_name>*
+* [Contribution Guideline]: Guideline for contributing code to OpenSBI project
+* [Platform Support Guide]: Guideline for implementing support for new platforms
+* [Library Usage]: API documentation of OpenSBI static library *libsbi.a*
+* [Platform Documentation]: Documentation of the platforms currently supported.
+* [Firmware Documentation]: Documentation for the different types of firmware
+  build supported by OpenSBI.
 
-The source code is also well documented. For source level documentation,
+OpenSBI source code is also well documented. For source level documentation,
 doxygen style is used. Please refer to [Doxygen manual] for details on this
 format.
 
-[Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
-
-The Doxygen can be installed on your debian build system using following:
+Doxygen can be installed on Linux distributions using *.deb* packages using
+the following command.
 ```
 sudo apt-get install doxygen doxygen-latex doxygen-doc doxygen-gui graphviz
 ```
 
-To build a consolidated `refman.pdf` of all documentation, run:
+For *.rpm* based Linux distributions, the following commands can be used.
+```
+sudo yum install doxygen doxygen-latex doxywizard graphviz
+```
+or
+```
+sudo yum install doxygen doxygen-latex doxywizard graphviz
+```
+
+To build a consolidated *refman.pdf* of all documentation, run:
 ```
 make docs
+```
 or
+```
 make O=<build_directory> docs
 ```
 
-**NOTE:** `refman.pdf` will be available under `<build_directory>/docs/latex`.
-
-To install a consolidated `refman.pdf` of all documentation, run:
+the resulting *refman.pdf* will be available under the directory
+*<build_directory>/docs/latex*. To install this file, run:
 ```
 make install_docs
+```
 or
+```
 make I=<install_directory> install_docs
 ```
 
-**NOTE:** `refman.pdf` will be installed under `<install_directory>/docs`.
+*refman.pdf* will be installed under *<install_directory>/docs*.
+
+[Github]: https://github.com/riscv/riscv-sbi-doc
+[COPYING.BSD]: COPYING.BSD
+[SPDX]: http://spdx.org/licenses/
+[Contribution Guideline]: docs/contributing.md
+[Platform Support Guide]: docs/platform_guide.md
+[Library Usage]: docs/library_usage.md
+[Platform Documentation]: docs/platform/platform.md
+[Firmware Documentation]: docs/firmware/fw.md
+[Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
+

From bd98d772983df829b78b7ba16bc2dce559c93fbc Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 25 Jan 2019 11:19:22 +0530
Subject: [PATCH 0134/1765] include: Add separate header for OpenSBI version

Currently, the OpenSBI version is in top-level Makefile so
firmware linking to OpenSBI static library have no-way to
know OpenSBI version.

This patch moves OpenSBI version from top-level Makefile to
sbi/sbi_version.h header which provides OPENSBI_VERSION_MAJOR
and OPENSBI_VERSION_MINOR defines.

NOTE: the SBI spec (or SBI ecall interface) version is
different. The SBI spec version is provided by functions
sbi_ecall_version_major() and sbi_ecall_version_minor().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                  | 14 ++++++--------
 include/sbi/sbi_version.h | 16 ++++++++++++++++
 lib/sbi_init.c            |  3 ++-
 3 files changed, 24 insertions(+), 9 deletions(-)
 create mode 100644 include/sbi/sbi_version.h

diff --git a/Makefile b/Makefile
index b362a56ea95..ae903266c43 100644
--- a/Makefile
+++ b/Makefile
@@ -7,10 +7,6 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-# Current Version
-MAJOR = 0
-MINOR = 1
-
 # Select Make Options:
 # o  Do not use make's built-in rules and variables
 # o  Do not print "Entering directory ...";
@@ -54,6 +50,10 @@ export include_dir=$(CURDIR)/include
 export lib_dir=$(CURDIR)/lib
 export firmware_dir=$(CURDIR)/firmware
 
+# Find library version
+OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
+OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
+
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_dir) ]; then find $(platform_dir) -iname "objects.mk" | sort -r; fi)
@@ -92,9 +92,7 @@ deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
-GENFLAGS	=	-DOPENSBI_MAJOR=$(MAJOR)
-GENFLAGS	+=	-DOPENSBI_MINOR=$(MINOR)
-GENFLAGS	+=	-I$(platform_dir)/include
+GENFLAGS	=	-I$(platform_dir)/include
 GENFLAGS	+=	-I$(platform_common_dir)/include
 GENFLAGS	+=	-I$(include_dir)
 GENFLAGS	+=	$(platform-common-genflags-y)
@@ -274,7 +272,7 @@ $(build_dir)/docs/latex/refman.tex: $(build_dir)/docs/doxygen.cfg
 	$(CMD_PREFIX)doxygen $(build_dir)/docs/doxygen.cfg
 $(build_dir)/docs/doxygen.cfg: $(src_dir)/docs/doxygen.cfg
 	$(CMD_PREFIX)mkdir -p $(build_dir)/docs
-	$(CMD_PREFIX)cat docs/doxygen.cfg | sed -e "s#@@SRC_DIR@@#$(src_dir)#" -e "s#@@BUILD_DIR@@#$(build_dir)#" -e "s#@@OPENSBI_MAJOR@@#$(MAJOR)#" -e "s#@@OPENSBI_MINOR@@#$(MINOR)#" > $(build_dir)/docs/doxygen.cfg
+	$(CMD_PREFIX)cat docs/doxygen.cfg | sed -e "s#@@SRC_DIR@@#$(src_dir)#" -e "s#@@BUILD_DIR@@#$(build_dir)#" -e "s#@@OPENSBI_MAJOR@@#$(OPENSBI_VERSION_MAJOR)#" -e "s#@@OPENSBI_MINOR@@#$(OPENSBI_VERSION_MINOR)#" > $(build_dir)/docs/doxygen.cfg
 .PHONY: docs
 docs: $(build_dir)/docs/latex/refman.pdf
 
diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
new file mode 100644
index 00000000000..74b65e02e7c
--- /dev/null
+++ b/include/sbi/sbi_version.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_VERSION_H__
+#define __SBI_VERSION_H__
+
+#define OPENSBI_VERSION_MAJOR		0
+#define OPENSBI_VERSION_MINOR		1
+
+#endif
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index a806b456090..81feb569ae0 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
+#include <sbi/sbi_version.h>
 
 #define BANNER \
 	"   ____                    _____ ____ _____\n" \
@@ -63,7 +64,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	misa_string(str, sizeof(str));
 	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n",
-		   OPENSBI_MAJOR, OPENSBI_MINOR,
+		   OPENSBI_VERSION_MAJOR, OPENSBI_VERSION_MINOR,
 		   __DATE__, __TIME__);
 
 	sbi_printf(BANNER);

From d70f8aab45d1e449b3b9be26e050b20ed76e12e9 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 24 Jan 2019 14:48:45 -0800
Subject: [PATCH 0135/1765] platform: fu540: Provide a compile time option
 selective hart booting.

Currently, only hart 1 is enabled for fu540 platform to support U-boot.

Introduce a compile time FU540_ENABLED_HART_MASK option so that specific
harts can be selected for booting. As fu540 is a multicore, we should
boot all cores by default except hart 0.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/sifive/fu540/objects.mk |  3 +++
 platform/sifive/fu540/platform.c | 12 ++++++++++--
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/platform/sifive/fu540/objects.mk b/platform/sifive/fu540/objects.mk
index e0d05853819..f09a30513cf 100644
--- a/platform/sifive/fu540/objects.mk
+++ b/platform/sifive/fu540/objects.mk
@@ -8,3 +8,6 @@
 #
 
 platform-objs-y += platform.o
+ifdef FU540_ENABLED_HART_MASK
+platform-genflags-y += -DFU540_ENABLED_HART_MASK=$(FU540_ENABLED_HART_MASK)
+endif
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 56ca666c101..ea6ced91d21 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -34,7 +34,15 @@
 #define FU540_UART1_ADDR			0x10011000
 #define FU540_UART_BAUDRATE			115200
 
-#define FU540_HARITD_ENABLED			1
+/**
+ * The FU540 SoC has 5 HARTs but HART ID 0 doesn't have S mode. enable only
+ * HARTs 1 to 4.
+ */
+#ifndef FU540_ENABLED_HART_MASK
+#define FU540_ENABLED_HART_MASK (1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
+#endif
+
+#define FU540_HARITD_DISABLED			~(FU540_ENABLED_HART_MASK)
 
 /* PRCI clock related macros */
 //TODO: Do we need a separate driver for this ?
@@ -183,7 +191,7 @@ struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = FU540_HART_COUNT,
 	.hart_stack_size = FU540_HART_STACK_SIZE,
-	.disabled_hart_mask = ~(1 << FU540_HARITD_ENABLED),
+	.disabled_hart_mask = FU540_HARITD_DISABLED,
 	.pmp_region_count = fu540_pmp_region_count,
 	.pmp_region_info = fu540_pmp_region_info,
 	.final_init = fu540_final_init,

From 3211b6c54204e85998e2af1f90ce75fa5c6a27e0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 26 Jan 2019 23:41:54 -0800
Subject: [PATCH 0136/1765] docs: Typo fixes

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/firmware/fw_jump.md    |  4 ++--
 docs/firmware/fw_payload.md |  2 +-
 docs/platform/platform.md   | 11 ++++++-----
 docs/platform/qemu_virt.md  |  2 +-
 4 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 39d3f743779..da21cda8312 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -14,7 +14,7 @@ the booting stage binary to follow OpenSBI firmware.
 
 A platform *FW_JUMP* firmware can be enabled by any of the following methods.
 
-1. Spedifying `FW_JUMP=y` on the top level `make` command line.
+1. Specifying `FW_JUMP=y` on the top level `make` command line.
 2. Specifying `FW_JUMP=y` in the target platform *config.mk* configuration file.
 
 The compiled *FW_JUMP* firmware ELF file is named *fw_jump.elf*. Its expanded
@@ -37,7 +37,7 @@ follows.
 
 * **FW_JUMP_FDT_ADDR** - Address where the *flattened device tree (FDT file)*
   passed by the prior booting stage will be placed in memory before executing
-  the booting stage following OpenSBI firmware. If this option is not provided
+  the booting stage following OpenSBI firmware. If this option is not provided,
   then OpenSBI firmware will pass zero as the FDT address to the following
   booting stage.
 
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 15edac7dd3e..72ea9bb3af0 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -72,7 +72,7 @@ file. The parameters currently defined are as   follows.
 * **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior booting
   stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and embedded in
   the *.text* section will be placed before executing the next booting stage,
-  that is, the payload firmware. If this option is not provided then the
+  that is, the payload firmware. If this option is not provided, then the
   firmware will pass zero as the FDT address to the next booting stage.
 
 *FW_PAYLOAD* Example
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 15764e2de12..12efa81e1c1 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -8,13 +8,14 @@ OpenSBI currently supports the following virtual and hardware platforms.
   test. More details on this platform can be found in the file *[qemu_virt.md]*.
 
 * **QEMU SiFive Unleashed Machine**: Platform support for the *sifive_u* QEMU
-  virtual RISC-V machine. This is an emulation machine of the SiFive Unleashed
-  board. More details on this platform can be found in the file
+  virtual RISC-V machine. This is an emulation machine of the HiFive Unleashed
+  board by SiFive. More details on this platform can be found in the file
   *[qemu_sifive_u.md]*.
 
 * **SiFive FU540 SoC**: Platform support for SiFive FU540 SoC used on the
-  SiFive Unleashed board. This platform is very similar to the *QEMU sifive_u*
-  platform.
+  HiFive Unleashed board. This platform is very similar to the *QEMU sifive_u*
+  platform. More details on this platform can be found in the file
+  *[sifive_fu540.md]*.
 
 * **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on
   boards such as the Kendryte KD233 and Sipeed MAIX Dock boards.
@@ -22,7 +23,7 @@ OpenSBI currently supports the following virtual and hardware platforms.
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
-*config.mk* and *platform.c* template files provided are commented to facilitate
+*config.mk* and *platform.c* template files provides enough comments to facilitate
 the implementation.
 
 [qemu_virt.md]: qemu_virt.md
diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 5478ce7e773..bab046e0b65 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -2,7 +2,7 @@ QEMU RISC-V Virt Machine Platform
 =================================
 
 The **QEMU RISC-V Virt Machine** is virtual platform created for RISC-V
-software development and test. It is also referred to as
+software development and testing. It is also referred as
 *QEMU RISC-V VirtIO machine* because it uses VirtIO devices for network,
 storage, and other types of IO.
 

From 02810f151c702cb84694080a6947a4f9afdff140 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 26 Jan 2019 23:47:17 -0800
Subject: [PATCH 0137/1765] docs: Add a fu540 document.

Add a readme guide for fu540 with different types of build & booting steps.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 102 ++++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 docs/platform/sifive_fu540.md

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
new file mode 100644
index 00000000000..951ec89ad4c
--- /dev/null
+++ b/docs/platform/sifive_fu540.md
@@ -0,0 +1,102 @@
+SiFive FU540 SoC Platform
+==========================
+The FU540-C000 is the world’s first 4+1 64-bit RISC‑V SoC from SiFive.
+The HiFive Unleashed development platform is based on FU540-C000 and capable
+of running Linux.
+
+To build platform specific library and firmwares, provide the
+*PLATFORM=sifive/fu540* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+As hart0 in the FU540 doesn't have an MMU, only harts 1-4 boot by default.
+A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided to
+select any other hart for booting. Please keep in mind that this is not
+platform wide option. It can only be specificd for FU540 platform in following way.
+
+```
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
+```
+This will let the board boot only hart1 instead of default 1-4.
+
+Booting SiFive Fu540 Platform
+-----------------------------
+
+**Linux Kernel Payload**
+
+Build:
+
+```
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Flash:
+The generated firmware binary should be copied to the first partition of the sdcard.
+
+```
+dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+```
+
+**U-Boot Payload**
+
+Note: U-Boot doesn't have SMP support. So you can only boot single cpu with non-smp
+kernel configuration using U-Boot.
+
+Build:
+
+The commandline example here assumes that U-Boot was compiled using sifive_fu540_defconfig configuration.
+```
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FU540_ENABLED_HART_MASK=0x02
+```
+
+Flash:
+The generated firmware binary should be copied to the first partition of the sdcard.
+
+```
+dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+```
+U-Boot tftp boot method can be used to load kernel image in U-Boot prompt.
+
+Note: As the U-Boot & Linux kernel patches are not in upstream it, you can cherry-pick from here.
+
+U-Boot patchset:
+https://lists.denx.de/pipermail/u-boot/2019-January/355941.html
+
+Linux kernel patchset:
+https://lkml.org/lkml/2019/1/8/192
+
+**U-Boot & Linux Kernel as a single payload**
+
+A single monolithic image containing both U-Boot & Linux can also be used if network boot setup is
+not available.  
+
+1. Generate the uImage from Linux Image.
+```
+mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
+		<linux_build_directory>arch/riscv/boot/Image \
+		<linux_build_directory>/arch/riscv/boot/uImage
+```
+
+2. Create a temporary image with u-boot.bin as the first payload. The commandline example here assumes
+that U-Boot was compiled using sifive_fu540_defconfig configuration.
+```
+dd if=~/workspace/u-boot-riscv/u-boot.bin of=/tmp/temp.bin bs=1M
+```
+3. Append the Linux Kernel image generated in step 1.
+```
+dd if=<linux_build_directory>/arch/riscv/boot/uImage of=/tmp/temp.bin bs=1M seek=4
+```
+4. Compile OpenSBI with temp.bin (generated in step 3) as payload and single hart enabled.
+```
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin FU540_ENABLED_HART_MASK=0x02
+```
+5. The generated firmware binary should be copied to the first partition of the sdcard.
+
+```
+dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+```
+6. At U-Boot prompt execute following boot command to boot non-SMP linux.
+```
+bootm 0x80600000 - 0x82200000
+```

From 130230ff5908202d21dba0f61e7f012343128e76 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Jan 2019 17:54:17 +0530
Subject: [PATCH 0138/1765] top: Fix typo in README.md

This patch renames <platform_sub_dir> to <platform_subdir> to be
consistent everywhere.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/README.md b/README.md
index 36f403927cd..c9c0c6e84ea 100644
--- a/README.md
+++ b/README.md
@@ -80,8 +80,8 @@ make PLATFORM=<platform_subdir> O=<build_directory>
 ```
 
 The platform specific library *libplatsbi.a* will be generated in the
-*build/platform/<platform_sub_dir>/lib* directory. The platform firmware files
-will be under the *build/platform/<platform_sub_dir>/firmware* directory.
+*build/platform/<platform_subdir>/lib* directory. The platform firmware files
+will be under the *build/platform/<platform_subdir>/firmware* directory.
 The compiled firmwares will be available in two different format: an ELF file
 and an expanded image file.
 
@@ -91,7 +91,7 @@ make PLATFORM=<platform_subdir> install
 ```
 
 This will copy the compiled platform specific libraries and firmware files
-under the *install/platform/<platform_sub_dir>/* directory. An alternate
+under the *install/platform/<platform_subdir>/* directory. An alternate
 install root directory path can be specified as follows.
 ```
 make PLATFORM=<platform_subdir> I=<install_directory> install

From 27b55bb4da7321137693de7e6e73609e1271dce3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Jan 2019 17:56:14 +0530
Subject: [PATCH 0139/1765] docs: Add platform support guide

This patch adds initial platform support guide (i.e.
docs/platform_guide.md).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform_guide.md | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 docs/platform_guide.md

diff --git a/docs/platform_guide.md b/docs/platform_guide.md
new file mode 100644
index 00000000000..51e5b25f405
--- /dev/null
+++ b/docs/platform_guide.md
@@ -0,0 +1,32 @@
+OpenSBI Platform Support Guideline
+==================================
+
+The OpenSBI platform support is a set of platform specific hooks provided
+in the form of a *struct sbi_platform* instance. It is required by:
+
+1. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
+   libsbi.a plus a *struct sbi_platform* instance installed at
+   *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
+2. *firmwares* - Platform specific bootable firmware binaries installed at
+   *<install_directory>/platform/<platform_subdir>/bin*
+
+A complete doxygen-style documentation of *struct sbi_platform* and related
+APIs is available in sbi/sbi_platform.h.
+
+Adding a new platform support
+-----------------------------
+
+The support of a new platform named *<xyz>* can be added as follows:
+
+1. Create a directory named *<xyz>* under *platform/* directory
+2. Create a platform configuration file named *config.mk* under
+   *platform/<xyz>/* directory. This configuration file will provide
+   compiler flags, select common drivers, and select firmware options
+3. Create *platform/<xyz>/objects.mk* file for listing the platform
+   specific object files to be compiled
+4. Create *platform/<xyz>/platform.c* file providing a *struct sbi_platform*
+   instance
+
+A template platform support code is available under the *platform/template*.
+Copying this directory as new directory named *<xyz>* under *platform/*
+directory will create all the files mentioned above.

From 8af20068d13986c7f66a595b89d4ef251b9d9e34 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Jan 2019 17:59:02 +0530
Subject: [PATCH 0140/1765] docs: Add library usage guide

This patch adds static library usage guide (i.e.
docs/library_usage.md).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/library_usage.md | 57 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 docs/library_usage.md

diff --git a/docs/library_usage.md b/docs/library_usage.md
new file mode 100644
index 00000000000..0eb74ef9bf0
--- /dev/null
+++ b/docs/library_usage.md
@@ -0,0 +1,57 @@
+OpenSBI Library Usage Guideline
+===============================
+
+OpenSBI provides two types of static libraries:
+
+1. *libsbi.a* - A generic OpenSBI static library installed at
+   *<install_directory>/lib/libsbi.a*
+2. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
+   libsbi.a plus platform specific hooks installed at
+   *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
+
+The platform specific firmwares provided by OpenSBI are not mandatory. Users
+can always link OpenSBI as static library to their favorite M-mode firmware
+or bootloader provided that it has a license compatible with OpenSBI license.
+
+Users can choose either *libsbi.a* or *libplatsbi.a* to link with their
+firmware or bootloader but with *libsbi.a* platform specific hooks (i.e.
+*struct sbi_platform* instance) will have to be provided.
+
+Constraints on OpenSBI usage from external firmware
+---------------------------------------------------
+
+Users have to ensure that external firmware or bootloader and OpenSBI static
+library (*libsbi.a* or *libplatsbi.a*) are compiled with the same GCC target
+options *-mabi*, *-march*, and *-mcmodel*.
+
+There are only two constraints on calling any OpenSBI function from an
+external M-mode firmware or bootloader:
+
+1. The RISC-V *MSCRATCH* CSR must point to a valid OpenSBI scratch space
+   (i.e. *struct sbi_scratch* instance)
+2. The RISC-V *SP* register (i.e. stack pointer) must be set per-HART
+   pointing to distinct non-overlapping stacks
+
+The most important functions from an external firmware or bootloader
+perspective are *sbi_init()* and *sbi_trap_handler()*.
+
+In addition to above constraints, the external firmware or bootloader must
+ensure that interrupts are disabled in *MSTATUS* and *MIE* CSRs when calling
+*sbi_init()* and *sbi_trap_handler()* functions.
+
+The *sbi_init()* should be called by the external firmware or bootloader
+when a HART is powered-up at boot-time or in response to a CPU hotplug event.
+
+The *sbi_trap_handler()* should be called by the external firmware or
+bootloader for the following interrupts and traps:
+
+1. M-mode timer interrupt
+2. M-mode software interrupt
+3. Illegal instruction trap
+4. Misaligned load trap
+5. Misaligned store trap
+6. Supervisor ecall trap
+7. Hypervisor ecall trap
+
+**Note:** external firmwares or bootloaders can be more conservative by
+forwarding all traps and interrupts to *sbi_trap_handler()*
\ No newline at end of file

From 30dfdf6e0e4ac11c80ba6505024481a15f604160 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Jan 2019 18:00:36 +0530
Subject: [PATCH 0141/1765] docs: Update doxygen config file

This patch updates doxygen config file to include
docs/platform_guide.md and docs/library_usage.md in
generated PDF document.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/doxygen.cfg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 484090b06b6..feb461bb5a6 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -792,6 +792,8 @@ WARN_LOGFILE           =
 
 INPUT                  = @@SRC_DIR@@/README.md \
                          @@SRC_DIR@@/docs/contributing.md \
+                         @@SRC_DIR@@/docs/platform_guide.md \
+                         @@SRC_DIR@@/docs/library_usage.md \
                          @@SRC_DIR@@/docs/firmware \
                          @@SRC_DIR@@/docs/platform \
                          @@SRC_DIR@@/include \

From c0addfe751e51376a73df71336ce11826e68c939 Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Sun, 3 Feb 2019 18:49:20 -0800
Subject: [PATCH 0142/1765] riscv_asm.h: Use CSR_<FOO> instead of <foo> for
 csr_read()

Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 include/sbi/riscv_asm.h   | 8 +++++---
 lib/sbi_misaligned_ldst.c | 4 ++--
 lib/sbi_trap.c            | 8 ++++----
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index e07104909a1..a88c0867f84 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -10,6 +10,8 @@
 #ifndef __RISCV_ASM_H__
 #define __RISCV_ASM_H__
 
+#include <sbi/riscv_encoding.h>
+
 #ifdef __ASSEMBLY__
 #define __ASM_STR(x)	x
 #else
@@ -144,17 +146,17 @@ do {								\
 
 static inline int misa_extension(char ext)
 {
-	return csr_read(misa) & (1 << (ext - 'A'));
+	return csr_read(CSR_MISA) & (1 << (ext - 'A'));
 }
 
 static inline int misa_xlen(void)
 {
-	return ((long)csr_read(misa) < 0) ? 64 : 32;
+	return ((long)csr_read(CSR_MISA) < 0) ? 64 : 32;
 }
 
 static inline void misa_string(char *out, unsigned int out_sz)
 {
-	unsigned long i, val = csr_read(misa);
+	unsigned long i, val = csr_read(CSR_MISA);
 
 	for (i = 0; i < 26; i++) {
 		if (val & (1 << i)) {
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index 77885a4b59e..8522255464a 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -28,7 +28,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	union reg_data val;
 	ulong mstatus = csr_read(mstatus);
 	ulong insn = get_insn(regs->mepc, &mstatus);
-	ulong addr = csr_read(mtval);
+	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
@@ -114,7 +114,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	union reg_data val;
 	ulong mstatus = csr_read(mstatus);
 	ulong insn = get_insn(regs->mepc, &mstatus);
-	ulong addr = csr_read(mtval);
+	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
 
 	val.data_ulong = GET_RS2(insn, regs);
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 4c0f2a94cde..fb9ca4fa201 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -89,9 +89,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		return SBI_ENOTSUPP;
 
 	/* Update S-mode exception info */
-	csr_write(stval, tval);
-	csr_write(sepc, epc);
-	csr_write(scause, cause);
+	csr_write(CSR_STVAL, tval);
+	csr_write(CSR_SEPC, epc);
+	csr_write(CSR_SCAUSE, cause);
 
 	/* Set MEPC to S-mode exception vector base */
 	regs->mepc = csr_read(stvec);
@@ -183,6 +183,6 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 
 trap_error:
 	if (rc) {
-		sbi_trap_error(msg, rc, hartid, mcause, csr_read(mtval), regs);
+		sbi_trap_error(msg, rc, hartid, mcause, csr_read(CSR_MTVAL), regs);
 	}
 }

From 9a72e5006cf5481455faf4c2d0801139f71e0d9b Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Sun, 3 Feb 2019 18:48:43 -0800
Subject: [PATCH 0143/1765] Makefile: Don't rely on "echo -n"

Turns out it doesn't behave as expected on MacOS, it doesn't honor
-n and echoes that to the file instead. Add a slash and just let
the newline be there instead.

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index ae903266c43..8e0846ba8d8 100644
--- a/Makefile
+++ b/Makefile
@@ -180,7 +180,7 @@ compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(CPP) $(CPPFLAGS) -x c $(2) | grep -v "\#" > $(1)
 compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC-DEP    $(subst $(build_dir)/,,$(1))"; \
-	     echo -n `dirname $(1)`/ > $(1) && \
+	     echo `dirname $(1)`/ \\  > $(1) && \
 	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2))   \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
@@ -188,7 +188,7 @@ compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
 compile_as_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS-DEP    $(subst $(build_dir)/,,$(1))"; \
-	     echo -n `dirname $(1)`/ > $(1) && \
+	     echo `dirname $(1)`/ \\ > $(1) && \
 	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \

From 190a80dc4014a1113ea317769b4875893f8e9890 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Mon, 4 Feb 2019 12:48:26 +0100
Subject: [PATCH 0144/1765] Makefile: don't disable built-in variables

Signed-off-by: Andreas Schwab <schwab@suse.de>
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 8e0846ba8d8..6f67c54c8df 100644
--- a/Makefile
+++ b/Makefile
@@ -8,9 +8,9 @@
 #
 
 # Select Make Options:
-# o  Do not use make's built-in rules and variables
+# o  Do not use make's built-in rules
 # o  Do not print "Entering directory ...";
-MAKEFLAGS += -rR --no-print-directory
+MAKEFLAGS += -r --no-print-directory
 
 # Find out source, build, and install directories
 src_dir=$(CURDIR)

From 93f806af32cc75138cc9afd12ad9931a2954fc8f Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Mon, 4 Feb 2019 15:05:36 +0100
Subject: [PATCH 0145/1765] firwmare: don't expand macros in FW_PAYLOAD_PATH

Signed-off-by: Andreas Schwab <schwab@suse.de>
---
 firmware/fw_payload.S | 7 ++-----
 firmware/objects.mk   | 4 ++--
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 4d4db45202c..51381c1585e 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -41,15 +41,12 @@ fw_next_addr:
 	la	a0, payload_bin
 	ret
 
-#define	str(s)		#s
-#define	stringify(s)	str(s)
-
 #ifdef FW_PAYLOAD_FDT_PATH
 	.align 3
 	.section .text, "ax", %progbits
 	.globl fdt_bin
 fdt_bin:
-	.incbin	stringify(FW_PAYLOAD_FDT_PATH)
+	.incbin	FW_PAYLOAD_FDT_PATH
 #endif
 
 	.section .payload, "ax", %progbits
@@ -59,5 +56,5 @@ payload_bin:
 	wfi
 	j	payload_bin
 #else
-	.incbin	stringify(FW_PAYLOAD_PATH)
+	.incbin	FW_PAYLOAD_PATH
 #endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 89410f71a4f..b8f6e889a71 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -31,7 +31,7 @@ FW_PAYLOAD_PATH_FINAL=$(FW_PAYLOAD_PATH)
 else
 FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/test.bin
 endif
-firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=$(FW_PAYLOAD_PATH_FINAL)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=\"$(FW_PAYLOAD_PATH_FINAL)\"
 ifdef FW_PAYLOAD_OFFSET
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_OFFSET=$(FW_PAYLOAD_OFFSET)
 endif
@@ -45,7 +45,7 @@ FW_PAYLOAD_FDT_PATH=$(build_dir)/$(platform_subdir)/$(FW_PAYLOAD_FDT)
 endif
 endif
 ifdef FW_PAYLOAD_FDT_PATH
-firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=$(FW_PAYLOAD_FDT_PATH)
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=\"$(FW_PAYLOAD_FDT_PATH)\"
 endif
 ifdef FW_PAYLOAD_FDT_ADDR
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)

From b4c72deba98b6398a4c44198553093670d226e2d Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 6 Feb 2019 14:02:22 -0800
Subject: [PATCH 0146/1765] sbi_ecall: Fix logical OR to be bitwise OR

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi_ecall.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 7f3986d5ba5..42123ba10d7 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -39,7 +39,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 	case SBI_ECALL_SET_TIMER:
 #if __riscv_xlen == 32
 		sbi_timer_event_start(scratch,
-			(((u64)regs->a1 << 32) || (u64)regs->a0));
+			(((u64)regs->a1 << 32) | (u64)regs->a0));
 #else
 		sbi_timer_event_start(scratch, (u64)regs->a0);
 #endif

From 5a91fec1a80939e78e37a0b2bc1d3043dcac23f4 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Thu, 17 Jan 2019 17:33:47 -0800
Subject: [PATCH 0147/1765] platform/qemu/virt: Dynamically calculate xlen

The QEMU virt machine can be either 32 or 66 bit. Don't hard code the
CPU bit length and instead let the compiler determine it.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile                     |  3 +++
 platform/qemu/virt/config.mk | 13 +++++++++++--
 platform/template/config.mk  |  2 ++
 3 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 6f67c54c8df..2848d09305f 100644
--- a/Makefile
+++ b/Makefile
@@ -116,6 +116,9 @@ endif
 AS		=	$(CC)
 DTC		=	dtc
 
+# Guess the compillers xlen
+OPENSBI_CC_XLEN = `expr substr \`$(CC) -dumpmachine\`  6 2`
+
 # Setup compilation commands flags
 CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 1ee66d0c58d..5931d0e05f3 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -9,8 +9,17 @@
 
 # Compiler flags
 platform-cppflags-y =
-platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+# If we know the compillers xlen use it below
+ifeq ($(OPENSBI_CC_XLEN), 32)
+	platform-cflags-y =-mabi=ilp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
+	platform-asflags-y =-mabi=ilp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
+endif
+ifeq ($(OPENSBI_CC_XLEN), 64)
+	platform-cflags-y =-mabi=lp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
+	platform-asflags-y =-mabi=lp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
+endif
+platform-cflags-y +=  -mcmodel=medany
+platform-asflags-y += -mcmodel=medany
 platform-ldflags-y =
 
 # Common drivers to enable
diff --git a/platform/template/config.mk b/platform/template/config.mk
index b1457da5e9b..21aa6d6fa29 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -12,6 +12,8 @@ platform-cppflags-y =
 # 	-mabi=lp64 -march=rv64imafdc -mcmodel=medany
 # For a 32 bits platform, this will likely be:
 # 	-mabi=lp32 -march=rv32imafdc -mcmodel=medlow
+# You can also use the Makefile variable OPENSBI_CC_XLEN for the xlen
+# See the QEMU virt machine for an example of this
 platform-cflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
 platform-asflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
 

From a5f06b30c1503ecd09691f1ad9909287489228f5 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 5 Feb 2019 13:51:32 -0800
Subject: [PATCH 0148/1765] platform: template: Move kernel start address to
 4MB alligned

In order to support 32-bit guests move the start address to a 4MB
allignment. As 64-bit kernels have a requirement on being 2MB alligned
let's just make this the default for both 32 and 64 bit kernels.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 platform/template/config.mk | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/platform/template/config.mk b/platform/template/config.mk
index 21aa6d6fa29..2f2b8955bcf 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -41,7 +41,8 @@ FW_TEXT_START=0x80000000
 # as needed.
 #
 FW_JUMP=<y|n>
-FW_JUMP_ADDR=0x80200000
+# This needs to be 4MB alligned for 32-bit support
+FW_JUMP_ADDR=0x80400000
 # FW_JUMP_FDT_ADDR=0x82200000
 
 #
@@ -50,7 +51,8 @@ FW_JUMP_ADDR=0x80200000
 # as needed.
 #
 FW_PAYLOAD=<y|n>
-FW_PAYLOAD_OFFSET=0x200000
+# This needs to be 4MB alligned for 32-bit support
+FW_PAYLOAD_OFFSET=0x400000
 # FW_PAYLOAD_ALIGN=0x1000
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
 # FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"

From 9f44d07df533755d061f06e09b8f0f1793a18d7d Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 29 Jan 2019 09:59:31 -0800
Subject: [PATCH 0149/1765] platform: qemu/virt: Move kernel start address to
 4MB alligned

In order to support 32-bit guests move the start address to a 4MB
allignment. As 64-bit kernels have a requirement on being 2MB alligned
let's just make this the default for both 32 and 64 bit kernels.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/platform/qemu_virt.md   | 4 ++--
 platform/qemu/virt/config.mk | 6 ++++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index bab046e0b65..32575f96ec5 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -50,7 +50,7 @@ or
 ```
 qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
 	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
+	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80400000
 ```
 
 **Linux Kernel Payload**
@@ -75,7 +75,7 @@ or
 ```
 qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
 	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 \
+	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80400000 \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 5931d0e05f3..fcd25c86d62 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -30,10 +30,12 @@ PLATFORM_SYS_CLINT=y
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=y
-FW_JUMP_ADDR=0x80200000
+# This needs to be 4MB alligned for 32-bit support
+FW_JUMP_ADDR=0x80400000
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x200000
+# This needs to be 4MB alligned for 32-bit support
+FW_PAYLOAD_OFFSET=0x400000
 FW_PAYLOAD_FDT_ADDR=0x82200000
 
 # External Libraries to include

From f4cf6da7ff2d97f74129a6f4f333991af596111e Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 18 Jan 2019 11:36:32 -0800
Subject: [PATCH 0150/1765] sbi_emulate_csr: Shift sbi_timer_value directly

csr_val is a tartget length based variable, so on 32-bit devices it's
only 32-bits. To avoid clearing the entire register perform both steps
in a single line.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi_emulate_csr.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/sbi_emulate_csr.c b/lib/sbi_emulate_csr.c
index 2918a804691..1d52aac8ad1 100644
--- a/lib/sbi_emulate_csr.c
+++ b/lib/sbi_emulate_csr.c
@@ -60,8 +60,7 @@ int sbi_emulate_csr_read(int csr_num,
 	case CSR_TIMEH:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = sbi_timer_value(scratch);
-		*csr_val = *csr_val >> 32;
+		*csr_val = sbi_timer_value(scratch) >> 32;
 		break;
 	case CSR_INSTRETH:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))

From f9b033e57769bf24fc13293afdd43c1979527615 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 22 Jan 2019 16:50:50 -0800
Subject: [PATCH 0151/1765] platform: clint: Allow running on 32-bit systems

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 platform/common/sys/clint.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index 78ea118c26d..ee79a544c9a 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -87,7 +87,15 @@ static volatile u64 *clint_time_cmp;
 
 u64 clint_timer_value(void)
 {
+#if __riscv_xlen == 64
 	return readq_relaxed(clint_time_val);
+#else
+	u64 tmp;
+	tmp = readl_relaxed((void *)clint_time_val + 0x04);
+	tmp <<= 32;
+	tmp |= readl_relaxed(clint_time_val);
+	return tmp;
+#endif
 }
 
 void clint_timer_event_stop(void)
@@ -98,7 +106,12 @@ void clint_timer_event_stop(void)
 		return;
 
 	/* Clear CLINT Time Compare */
+#if __riscv_xlen == 64
 	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
+#else
+	writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
+	writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
+#endif
 }
 
 void clint_timer_event_start(u64 next_event)
@@ -109,7 +122,13 @@ void clint_timer_event_start(u64 next_event)
 		return;
 
 	/* Program CLINT Time Compare */
+#if __riscv_xlen == 64
 	writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
+#else
+	u32 mask = -1UL;
+	writel_relaxed(next_event & mask, &clint_time_cmp[target_hart]);
+	writel_relaxed(next_event >> 32, (void *)(&clint_time_cmp[target_hart]) + 0x04);
+#endif
 }
 
 int clint_warm_timer_init(void)
@@ -121,7 +140,12 @@ int clint_warm_timer_init(void)
 		return -1;
 
 	/* Clear CLINT Time Compare */
+#if __riscv_xlen == 64
 	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
+#else
+	writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
+	writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
+#endif
 
 	return 0;
 }

From 4f32b13802c118c381a562747467b829f7a14e78 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 23 Jan 2019 09:29:55 -0800
Subject: [PATCH 0152/1765] firmware: Use lw instead of lwu for 32-bit
 architectures

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 firmware/fw_base.S       | 14 ++++++++++++++
 include/sbi/sbi_unpriv.h |  8 ++++++++
 2 files changed, 22 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 63cb64c1c39..fb27ea3f5cd 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -69,7 +69,11 @@ _prev_arg1_override_done:
 	add	t0, a1, zero
 	and	t0, t0, a3
 	/* t2 = source FDT size in big-endian */
+#if __riscv_xlen == 64
 	lwu	t2, 4(t0)
+#else
+	lw	t2, 4(t0)
+#endif
 	/* t3 = bit[15:8] of FDT size */
 	add	t3, t2, zero
 	srli	t3, t3, 16
@@ -132,8 +136,13 @@ _start_warm:
 	 */
 	csrr	s6, mhartid
 	la	a4, platform
+#if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+#else
+	lw	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+	lw	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+#endif
 
 	/* HART ID should be within expected limit */
 	csrr	s6, mhartid
@@ -202,8 +211,13 @@ _hartid_to_scratch:
 	 * s2 -> Temporary
 	 */
 	la	s2, platform
+#if __riscv_xlen == 64
 	lwu	s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
 	lwu	s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+#else
+	lw	s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+	lw	s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+#endif
 	mul	s2, s2, s0
 	la	s1, _fw_end
 	add	s1, s1, s2
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h
index 2da5785045a..11ece0d4672 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -77,7 +77,11 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 	ulong val;
 #ifndef __riscv_compressed
 	asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
+#if __riscv_xlen == 64
 		STR(LWU) " %[insn], (%[addr])\n"
+#else
+		STR(LW) " %[insn], (%[addr])\n"
+#endif
 		"csrw mstatus, %[mstatus]"
 		: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val)
 		: [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc));
@@ -86,7 +90,11 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 	asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
 		"and %[tmp], %[addr], 2\n"
 		"bnez %[tmp], 1f\n"
+#if __riscv_xlen == 64
 		STR(LWU) " %[insn], (%[addr])\n"
+#else
+		STR(LW) " %[insn], (%[addr])\n"
+#endif
 		"and %[tmp], %[insn], %[rvc_mask]\n"
 		"beq %[tmp], %[rvc_mask], 2f\n"
 		"sll %[insn], %[insn], %[xlen_minus_16]\n"

From 76c759df6ab96cc1418325ecf99a0d62a0f37459 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Wed, 23 Jan 2019 14:38:21 -0800
Subject: [PATCH 0153/1765] Makefile: Ensure lgcc is included

This fixes errors like this:
  undefined reference to `__umoddi3'
when buildilng for 32-bit systems

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 2848d09305f..a447a733676 100644
--- a/Makefile
+++ b/Makefile
@@ -140,7 +140,7 @@ ASFLAGS		+=	$(firmware-asflags-y)
 
 ARFLAGS		=	rcs
 
-LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N
+LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N -static-libgcc -lgcc
 LDFLAGS		+=	$(platform-ldflags-y)
 LDFLAGS		+=	$(firmware-ldflags-y)
 

From 7b3da0ef0d778db206be44ba0074910034d47608 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 7 Feb 2019 18:11:41 +0900
Subject: [PATCH 0154/1765] top: README.md updates

Clarify OpenSBI components explanation.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 README.md | 80 ++++++++++++++++++++++++++++++++-----------------------
 1 file changed, 47 insertions(+), 33 deletions(-)

diff --git a/README.md b/README.md
index c9c0c6e84ea..d7c2626faad 100644
--- a/README.md
+++ b/README.md
@@ -1,39 +1,52 @@
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
-The **RISC-V Supervisor Binary Interface (SBI)** is a recommended interface
+The **RISC-V Supervisor Binary Interface (SBI)** is the recommended interface
 between:
 
-1. A platform specific firmware running in M-mode and a general purpose OS,
-   hypervisor or bootloader running in S-mode or HS-mode.
-2. A hypervisor running in HS-mode and a general purpose OS or bootloader
-   executed in VS-mode.
+1. A platform specific firmware running in M-mode and bootloader, hypervisor or
+   a general purpose OS executing in S-mode or HS-mode.
+2. A hypervisor running in HS-mode and a bootloader or a general purpose OS
+   executing in VS-mode.
 
 The *RISC-V SBI specification* is maintained as an independent project by the
 RISC-V Foundation in [Github].
 
-OpenSBI aims to provides an open-source and extensible implementation of the
-RISC-V SBI specification for case 1 mentioned above. OpenSBI implementation
-can be easily extended by RISC-V platform or System-on-Chip vendors to fit a
+The goal of the OpenSBI project is to provide an open-source reference
+implementation of the RISC-V SBI specifications for platform specific firmwares
+executing in M-mode (case 1 mentioned above). OpenSBI implementation can be
+easily extended by RISC-V platform and system-on-chip vendors to fit a
 particular hardware configuration.
 
-OpenSBI provides three different components:
-1. *libsbi.a* - A generic OpenSBI static library
-2. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
-                    libsbi.a plus platform specific hooks
-3. *firmwares* - Platform specific bootable firmware binaries
-
-Building and Installing the generic OpenSBI static library
-----------------------------------------------------------
-
-*libsbi.a* can be natively compiled or cross-compiled on a host with a
-different base architecture than RISC-V.
+The main component of OpenSBI is provided in the form of a platform independent
+static library **libsbi.a** implementing the SBI interface. A firmware or
+bootloader implementation can link against this library to ensure conformance
+with the SBI interface specifications. *libsbi.a* also defines an interface for
+integrating with platform specific operations provided by the platform firmware
+implementation (e.g. console access functions, inter-processor interrupts
+control, etc).
+
+To illustrate the use of *libsbi.a* library, OpenSBI also provides a set of
+platform specific support examples. For each example, a platform
+specific static library *libplatsbi.a* can be compiled. This library implements
+SBI calls processing by integrating *libsbi.a* with necessary platform dependent
+hardware manipulation functions. For all supported platforms, OpenSBI also
+provides several runtime firmware examples built using the platform
+*libplatsbi.a*. These example firmwares can be used to replace the legacy
+*riskv-pk* bootloader (aka BBL) and enable the use of well known bootloaders
+such as [U-Boot].
+
+Building and Installing OpenSBI Platform Independent Library
+------------------------------------------------------------
+
+OpenSBI platform independent static library *libsbi.a* can be natively compiled
+or cross-compiled on a host with a different base architecture than RISC-V.
 
 For cross-compiling, the environment variable *CROSS_COMPILE* must be defined
 to specify the name prefix of the RISC-V compiler toolchain executables, e.g.
 *riscv64-unknown-elf-* if the gcc executable used is *riscv64-unknown-elf-gcc*.
 
-To build the generic OpenSBI library *libsbi.a*, simply execute:
+To build *libsbi.a* simply execute:
 ```
 make
 ```
@@ -58,18 +71,18 @@ path, run:
 make I=<install_directory> install
 ```
 
-Building and Installing the platform specific static library and firmwares
---------------------------------------------------------------------------
+Building and Installing a Reference Platform Static Library and Firmwares
+-------------------------------------------------------------------------
 
-The platform specific *libplatsbi.a* static library and the platform firmwares
-are only built if the *PLATFORM=<platform_subdir>* argument is specified on
-the make command line. *<platform_subdir>* must specify the relative path from
-OpenSBI code directory to one of the leaf directories under the *platform*
-directory. For example, to compile the platform library and firmwares for QEMU
-RISC-V *virt* machine, *<platform_subdir>* should be *qemu/virt*.
+When the *PLATFORM=<platform_subdir>* argument is specified on the make command
+line, the platform specific static library *libplatsbi.a* and firmware examples
+are built for the platform *<platform_subdir>* present in the directory
+*platform* in OpenSBI top directory. For example, to compile the platform
+library and firmware examples for QEMU RISC-V *virt* machine,
+*<platform_subdir>* should be *qemu/virt*.
 
-To build *libsbi.a*, *libplatsbi.a* and the firmwares for a specific platform,
-run:
+To build *libsbi.a*, *libplatsbi.a* and the firmwares for one of the supported
+platform, run:
 ```
 make PLATFORM=<platform_subdir>
 ```
@@ -144,11 +157,11 @@ Detailed documentation of various aspects of OpenSBI can be found under the
 *docs* directory. The documentation covers the following topics.
 
 * [Contribution Guideline]: Guideline for contributing code to OpenSBI project
-* [Platform Support Guide]: Guideline for implementing support for new platforms
 * [Library Usage]: API documentation of OpenSBI static library *libsbi.a*
+* [Platform Support Guide]: Guideline for implementing support for new platforms
 * [Platform Documentation]: Documentation of the platforms currently supported.
 * [Firmware Documentation]: Documentation for the different types of firmware
-  build supported by OpenSBI.
+  examples build supported by OpenSBI.
 
 OpenSBI source code is also well documented. For source level documentation,
 doxygen style is used. Please refer to [Doxygen manual] for details on this
@@ -191,11 +204,12 @@ make I=<install_directory> install_docs
 *refman.pdf* will be installed under *<install_directory>/docs*.
 
 [Github]: https://github.com/riscv/riscv-sbi-doc
+[U-Boot]: https://www.denx.de/wiki/U-Boot/SourceCode
 [COPYING.BSD]: COPYING.BSD
 [SPDX]: http://spdx.org/licenses/
 [Contribution Guideline]: docs/contributing.md
-[Platform Support Guide]: docs/platform_guide.md
 [Library Usage]: docs/library_usage.md
+[Platform Support Guide]: docs/platform_guide.md
 [Platform Documentation]: docs/platform/platform.md
 [Firmware Documentation]: docs/firmware/fw.md
 [Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html

From b1b7e49c6372839a4ba37252e742f3f4769d8c46 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 7 Feb 2019 18:18:49 +0900
Subject: [PATCH 0155/1765] docs: platform guide updates

Clarify platform support description.
Also fix some Typos, grammar and document style.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/platform_guide.md | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index 51e5b25f405..5eecf9b7347 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -1,22 +1,31 @@
 OpenSBI Platform Support Guideline
 ==================================
 
-The OpenSBI platform support is a set of platform specific hooks provided
-in the form of a *struct sbi_platform* instance. It is required by:
+OpenSBI platform support allows an implementation to define a set of platform
+specific hooks (hardware manipulation functions) in the form of a
+*struct sbi_platform* data structure instance. This instance is required by
+platform independent *libsbi.a* to execute platform specific operations.
 
-1. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
-   libsbi.a plus a *struct sbi_platform* instance installed at
-   *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
-2. *firmwares* - Platform specific bootable firmware binaries installed at
-   *<install_directory>/platform/<platform_subdir>/bin*
+Each of the reference platform support provided by OpenSBI define an instance
+of the *struct sbi_platform* data structure. For each supported platform,
+*libplatsbi.a* integrates this instance with *libsbi.a* to create a platform
+specific OpenSBI static library. This library is installed
+in *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
+
+OpenSBI also provides implementation examples of bootable runtime firmwares for
+the supported platforms. These firmwares are linked against *libplatsbi.a*.
+Firmware binaries are installed in
+*<install_directory>/platform/<platform_subdir>/bin*. These firmwares can be
+used as executable runtime firmwares on the supported platforms as a replacement
+for the legacy *riskv-pk* boot loader (BBL).
 
 A complete doxygen-style documentation of *struct sbi_platform* and related
-APIs is available in sbi/sbi_platform.h.
+APIs is available in the file *include/sbi/sbi_platform.h*.
 
 Adding a new platform support
 -----------------------------
 
-The support of a new platform named *<xyz>* can be added as follows:
+Support for a new platform named *<xyz>* can be added as follows:
 
 1. Create a directory named *<xyz>* under *platform/* directory
 2. Create a platform configuration file named *config.mk* under
@@ -27,6 +36,7 @@ The support of a new platform named *<xyz>* can be added as follows:
 4. Create *platform/<xyz>/platform.c* file providing a *struct sbi_platform*
    instance
 
-A template platform support code is available under the *platform/template*.
-Copying this directory as new directory named *<xyz>* under *platform/*
-directory will create all the files mentioned above.
+A template platform support code is available under the *platform/template*
+directory. Copying this directory and its content as a new directory named
+*<xyz>* under the *platform/* directory will create all the files mentioned
+above.

From 01fe77911382ac61dd15e604e35660222c314a5d Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 7 Feb 2019 18:41:50 +0900
Subject: [PATCH 0156/1765] docs: improve library usage document

Clarify the libraries descriptions.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 docs/library_usage.md | 52 +++++++++++++++++++++++++------------------
 1 file changed, 30 insertions(+), 22 deletions(-)

diff --git a/docs/library_usage.md b/docs/library_usage.md
index 0eb74ef9bf0..579411f0d9c 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -1,30 +1,36 @@
-OpenSBI Library Usage Guideline
-===============================
+OpenSBI Library Usage
+=====================
 
 OpenSBI provides two types of static libraries:
 
-1. *libsbi.a* - A generic OpenSBI static library installed at
+1. *libsbi.a* - A platform independent generic static library implementing the
+   interface defined by the SBI specifications. Platform specific processing
+   hooks for the execution of this interface must be provided by the firmware or
+   bootloader linking with this library. This library is installed as
    *<install_directory>/lib/libsbi.a*
-2. *libplatsbi.a* - A platform specific OpenSBI static library, that is,
-   libsbi.a plus platform specific hooks installed at
+2. *libplatsbi.a* - An example platform specific static library integrating 
+   *libsbi.a* with platform specific hooks. This library is available only for
+   the platforms supported by OpenSBI. This library is installed as
    *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
 
-The platform specific firmwares provided by OpenSBI are not mandatory. Users
-can always link OpenSBI as static library to their favorite M-mode firmware
-or bootloader provided that it has a license compatible with OpenSBI license.
+Implementations may choose either *libsbi.a* or *libplatsbi.a* to link with
+their firmware or bootloader. In the case of *libsbi.a*, platform specific
+hooks in the form of a *struct sbi_platform* instance needs to be provided.
 
-Users can choose either *libsbi.a* or *libplatsbi.a* to link with their
-firmware or bootloader but with *libsbi.a* platform specific hooks (i.e.
-*struct sbi_platform* instance) will have to be provided.
+The platform specific example firmwares provided by OpenSBI are not mandatory.
+An implementation may choose to link OpenSBI generic static library together
+with an M-mode firmware or bootloader providing hardware specific hooks. Since
+OpenSBI is a statically linked library, users must ensure that the license of
+these external components is compatible with OpenSBI license.
 
 Constraints on OpenSBI usage from external firmware
 ---------------------------------------------------
 
-Users have to ensure that external firmware or bootloader and OpenSBI static
-library (*libsbi.a* or *libplatsbi.a*) are compiled with the same GCC target
-options *-mabi*, *-march*, and *-mcmodel*.
+Users have to ensure that an external firmware or bootloader linking against
+OpenSBI static libraries (*libsbi.a* or *libplatsbi.a*) are compiled with the
+same GCC target options *-mabi*, *-march*, and *-mcmodel*.
 
-There are only two constraints on calling any OpenSBI function from an
+There are only two constraints on calling any OpenSBI library function from an
 external M-mode firmware or bootloader:
 
 1. The RISC-V *MSCRATCH* CSR must point to a valid OpenSBI scratch space
@@ -35,15 +41,16 @@ external M-mode firmware or bootloader:
 The most important functions from an external firmware or bootloader
 perspective are *sbi_init()* and *sbi_trap_handler()*.
 
-In addition to above constraints, the external firmware or bootloader must
+In addition to the above constraints, the external firmware or bootloader must
 ensure that interrupts are disabled in *MSTATUS* and *MIE* CSRs when calling
-*sbi_init()* and *sbi_trap_handler()* functions.
+the functions *sbi_init()* and *sbi_trap_handler()*.
 
-The *sbi_init()* should be called by the external firmware or bootloader
-when a HART is powered-up at boot-time or in response to a CPU hotplug event.
+The *sbi_init()* function should be called by the external firmware or
+bootloader for each HART that is powered-up at boot-time or in response to a
+CPU hotplug event.
 
-The *sbi_trap_handler()* should be called by the external firmware or
-bootloader for the following interrupts and traps:
+The *sbi_trap_handler()* function should be called by the external firmware or
+bootloader to service the following interrupts and traps:
 
 1. M-mode timer interrupt
 2. M-mode software interrupt
@@ -54,4 +61,5 @@ bootloader for the following interrupts and traps:
 7. Hypervisor ecall trap
 
 **Note:** external firmwares or bootloaders can be more conservative by
-forwarding all traps and interrupts to *sbi_trap_handler()*
\ No newline at end of file
+forwarding all traps and interrupts to *sbi_trap_handler()*.
+

From ab12d6ef8fbcc6e6d185bac60412151e843534a1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 8 Feb 2019 09:46:12 +0530
Subject: [PATCH 0157/1765] platform: template: Improve comments for
 FW_JUMP_ADDR and FW_PAYLOAD_OFFSET

Both FW_JUMP_ADDR and FW_PAYLOAD_OFFSET, should be:
1. 4MB aligned for 32bit system
2. 2MB aligned for 64bit system

Explicitly specify the above details in config.mk comments
for template platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/template/config.mk | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/platform/template/config.mk b/platform/template/config.mk
index 2f2b8955bcf..3c85af7ad9a 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -41,8 +41,13 @@ FW_TEXT_START=0x80000000
 # as needed.
 #
 FW_JUMP=<y|n>
-# This needs to be 4MB alligned for 32-bit support
-FW_JUMP_ADDR=0x80400000
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+# ifeq ($(OPENSBI_CC_XLEN), 32)
+# FW_JUMP_ADDR=0x80400000
+# else
+# FW_JUMP_ADDR=0x80200000
+# endif
 # FW_JUMP_FDT_ADDR=0x82200000
 
 #
@@ -51,8 +56,13 @@ FW_JUMP_ADDR=0x80400000
 # as needed.
 #
 FW_PAYLOAD=<y|n>
-# This needs to be 4MB alligned for 32-bit support
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+ifeq ($(OPENSBI_CC_XLEN), 32)
 FW_PAYLOAD_OFFSET=0x400000
+else
+FW_PAYLOAD_OFFSET=0x200000
+endif
 # FW_PAYLOAD_ALIGN=0x1000
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
 # FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"

From 84169e2e691183594d0ba3b2acd85024c65b7370 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 8 Feb 2019 10:13:07 +0530
Subject: [PATCH 0158/1765] platform: qemu: Set FW_JUMP_ADDR and
 FW_PAYLOAD_OFFSET as-per XLEN

The current 4MB aligned FW_JUMP_ADDR and FW_PAYLOAD_OFFSET breaks
U-Boot on QEMU virt and sifive_u machines.

Instead of using 4MB aligned for both 32bit and 64bit systems, we
use different values based compiler XLEN. Another advantage of this
approach will be that our fw_payload.bin will smaller for 64bit
systems.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/qemu/sifive_u/config.mk | 16 ++++++++++++++--
 platform/qemu/virt/config.mk     | 18 ++++++++++++++----
 2 files changed, 28 insertions(+), 6 deletions(-)

diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 6e2c1932838..fe510248381 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -21,10 +21,22 @@ PLATFORM_SYS_CLINT=y
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=y
-FW_JUMP_ADDR=0x80200000
+ifeq ($(OPENSBI_CC_XLEN), 32)
+  # This needs to be 4MB alligned for 32-bit system
+  FW_JUMP_ADDR=0x80400000
+else
+  # This needs to be 2MB alligned for 64-bit system
+  FW_JUMP_ADDR=0x80200000
+endif
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x200000
+ifeq ($(OPENSBI_CC_XLEN), 32)
+  # This needs to be 4MB alligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB alligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
 FW_PAYLOAD_FDT_ADDR=0x82200000
 
 # External Libraries to include
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index fcd25c86d62..cd87745202c 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -30,12 +30,22 @@ PLATFORM_SYS_CLINT=y
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=y
-# This needs to be 4MB alligned for 32-bit support
-FW_JUMP_ADDR=0x80400000
+ifeq ($(OPENSBI_CC_XLEN), 32)
+  # This needs to be 4MB alligned for 32-bit system
+  FW_JUMP_ADDR=0x80400000
+else
+  # This needs to be 2MB alligned for 64-bit system
+  FW_JUMP_ADDR=0x80200000
+endif
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
-# This needs to be 4MB alligned for 32-bit support
-FW_PAYLOAD_OFFSET=0x400000
+ifeq ($(OPENSBI_CC_XLEN), 32)
+  # This needs to be 4MB alligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB alligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
 FW_PAYLOAD_FDT_ADDR=0x82200000
 
 # External Libraries to include

From c5467fce469f0a5da868f1c9f90f9e4e549cb660 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 8 Feb 2019 12:47:01 +0530
Subject: [PATCH 0159/1765] Makefile: Set ABI, ISA and Code Model in top-level
 make

This patch introduces following optional PLATFORM options:
PLATFORM_RISCV_XLEN -> RISC-V register width
PLATFORM_RISCV_ABI -> RISC-V GCC ABI
PLATFORM_RISCV_ISA -> RISC-V GCC ISA string
PLATFORM_RISCV_CODE_MODEL -> RISC-V GCC Code Model

If the above options are not provided by platform config.mk
or by command-line parameters then:
1. PLATFORM_RISCV_XLEN will be determined using toolchain
capability
2. PLATFORM_RISCV_ABI, PLATFORM_RISCV_ISA, and
PLATFORM_RISCV_CODE_MODEL is set to value best suited for
generic libsbi.a

As a result of these optional PLATFORM options, the
platform-cflags-y and platform-asflags-y is further
simplified for platform config.mk.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                         | 26 ++++++++++++++++++++++++++
 platform/kendryte/k210/config.mk |  4 ++--
 platform/qemu/sifive_u/config.mk |  4 ++--
 platform/qemu/virt/config.mk     | 13 ++-----------
 platform/sifive/fu540/config.mk  |  4 ++--
 platform/template/config.mk      | 20 ++++++++++++--------
 6 files changed, 46 insertions(+), 25 deletions(-)

diff --git a/Makefile b/Makefile
index a447a733676..d775e4ec893 100644
--- a/Makefile
+++ b/Makefile
@@ -119,10 +119,34 @@ DTC		=	dtc
 # Guess the compillers xlen
 OPENSBI_CC_XLEN = `expr substr \`$(CC) -dumpmachine\`  6 2`
 
+# Setup platform XLEN, ABI, ISA and Code Model
+ifndef PLATFORM_RISCV_XLEN
+  ifeq ($(OPENSBI_CC_XLEN), 32)
+    PLATFORM_RISCV_XLEN = 32
+  else
+    PLATFORM_RISCV_XLEN = 64
+  endif
+endif
+ifndef PLATFORM_RISCV_ABI
+  ifeq ($(PLATFORM_RISCV_XLEN), 32)
+    PLATFORM_RISCV_ABI = ilp$(PLATFORM_RISCV_XLEN)
+  else
+    PLATFORM_RISCV_ABI = lp$(PLATFORM_RISCV_XLEN)
+  endif
+endif
+ifndef PLATFORM_RISCV_ISA
+  PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+endif
+ifndef PLATFORM_RISCV_CODE_MODEL
+  PLATFORM_RISCV_CODE_MODEL = medany
+endif
+
 # Setup compilation commands flags
 CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
+CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
+CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
 CFLAGS		+=	$(firmware-cflags-y)
@@ -134,6 +158,8 @@ CPPFLAGS	+=	$(firmware-cppflags-y)
 ASFLAGS		=	-g -Wall -nostdlib -D__ASSEMBLY__
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-mno-save-restore -mstrict-align
+ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
+ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 ASFLAGS		+=	$(GENFLAGS)
 ASFLAGS		+=	$(platform-asflags-y)
 ASFLAGS		+=	$(firmware-asflags-y)
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index 3bc49317e47..2aa3b13fc07 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -9,8 +9,8 @@
 
 # Compiler flags
 platform-cppflags-y =
-platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-cflags-y =
+platform-asflags-y =
 platform-ldflags-y =
 
 # Common drivers to enable
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index fe510248381..4e69b43ac6b 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -9,8 +9,8 @@
 
 # Compiler flags
 platform-cppflags-y =
-platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-cflags-y =
+platform-asflags-y =
 platform-ldflags-y =
 
 # Common drivers to enable
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index cd87745202c..538b039b5e6 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -9,17 +9,8 @@
 
 # Compiler flags
 platform-cppflags-y =
-# If we know the compillers xlen use it below
-ifeq ($(OPENSBI_CC_XLEN), 32)
-	platform-cflags-y =-mabi=ilp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
-	platform-asflags-y =-mabi=ilp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
-endif
-ifeq ($(OPENSBI_CC_XLEN), 64)
-	platform-cflags-y =-mabi=lp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
-	platform-asflags-y =-mabi=lp$(OPENSBI_CC_XLEN) -march=rv$(OPENSBI_CC_XLEN)imafdc
-endif
-platform-cflags-y +=  -mcmodel=medany
-platform-asflags-y += -mcmodel=medany
+platform-cflags-y =
+platform-asflags-y =
 platform-ldflags-y =
 
 # Common drivers to enable
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index 30f64136128..352c156efd9 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -9,8 +9,8 @@
 
 # Compiler flags
 platform-cppflags-y =
-platform-cflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-platform-asflags-y =-mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-cflags-y =
+platform-asflags-y =
 platform-ldflags-y =
 
 # Common drivers to enable
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 3c85af7ad9a..65ea1350c5b 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -8,19 +8,23 @@
 platform-cppflags-y =
 
 # C Compiler and assembler flags.
-# For a 64 bits platform, this will likely be:
-# 	-mabi=lp64 -march=rv64imafdc -mcmodel=medany
-# For a 32 bits platform, this will likely be:
-# 	-mabi=lp32 -march=rv32imafdc -mcmodel=medlow
-# You can also use the Makefile variable OPENSBI_CC_XLEN for the xlen
-# See the QEMU virt machine for an example of this
-platform-cflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
-platform-asflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
+platform-cflags-y =
+platform-asflags-y =
 
 # Linker flags: additional libraries and object files that the platform
 # code needs can be added here
 platform-ldflags-y =
 
+#
+# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
+# These are optional parameters but platforms can optionaly provide it.
+# Some of these are guessed based on GCC compiler capabilities
+#
+# PLATFORM_RISCV_XLEN = 64
+# PLATFORM_RISCV_ABI = lp64
+# PLATFORM_RISCV_ISA = rv64imafdc
+# PLATFORM_RISCV_CODE_MODEL = medany
+
 #
 # OpenSBI implements generic drivers for some common generic hardware. The
 # drivers currently available are the RISC-V Platform Level Interrupt

From 4cb4d46875dd0f0dd01d3ff1fee4f0d6cefb857a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 12 Feb 2019 13:02:58 -0800
Subject: [PATCH 0160/1765] docs: Use normal hyphen instead of non-breaking
 hyphen

Usage non-breaking hyphen breaks make docs as doxygen doesn't know
how to handle this.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 951ec89ad4c..59132622f02 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -1,6 +1,6 @@
 SiFive FU540 SoC Platform
 ==========================
-The FU540-C000 is the world’s first 4+1 64-bit RISC‑V SoC from SiFive.
+The FU540-C000 is the world’s first 4+1 64-bit RISC-V SoC from SiFive.
 The HiFive Unleashed development platform is based on FU540-C000 and capable
 of running Linux.
 

From 70a474d2c24dc3e0c8841e6ef5cc96797deadbf5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 12 Feb 2019 18:32:06 -0800
Subject: [PATCH 0161/1765] lib: Use CSR_<FOO> instead of <foo> for csr_*()

Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.

Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h |  8 ++++++
 include/sbi/riscv_fp.h       | 12 ++++----
 include/sbi/sbi_scratch.h    |  2 +-
 include/sbi/sbi_unpriv.h     | 16 +++++------
 lib/sbi_emulate_csr.c        | 42 ++++++++++++++--------------
 lib/sbi_hart.c               | 54 ++++++++++++++++++------------------
 lib/sbi_illegal_insn.c       |  2 +-
 lib/sbi_ipi.c                |  8 +++---
 lib/sbi_misaligned_ldst.c    |  4 +--
 lib/sbi_timer.c              |  8 +++---
 lib/sbi_trap.c               |  4 +--
 11 files changed, 84 insertions(+), 76 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index b441c8eccd0..3f1676cf9b5 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -195,10 +195,18 @@
 #define RISCV_PGSHIFT			12
 #define RISCV_PGSIZE			(1 << RISCV_PGSHIFT)
 
+#define CSR_USTATUS			0x0
 #define CSR_FFLAGS			0x1
 #define CSR_FRM				0x2
 #define CSR_FCSR			0x3
 #define CSR_CYCLE			0xc00
+#define CSR_UIE				0x4
+#define CSR_UTVEC			0x5
+#define CSR_USCRATCH			0x40
+#define CSR_UEPC			0x41
+#define CSR_UCAUSE			0x42
+#define CSR_UTVAL			0x43
+#define CSR_UIP				0x44
 #define CSR_TIME			0xc01
 #define CSR_INSTRET			0xc02
 #define CSR_HPMCOUNTER3			0xc03
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index 71430235f26..9e2e082fd15 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -43,12 +43,12 @@
   ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
   ulong tmp; \
   asm volatile ("1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
-#define GET_FCSR() csr_read(fcsr)
-#define SET_FCSR(value) csr_write(fcsr, (value))
-#define GET_FRM() csr_read(frm)
-#define SET_FRM(value) csr_write(frm, (value))
-#define GET_FFLAGS() csr_read(fflags)
-#define SET_FFLAGS(value) csr_write(fflags, (value))
+#define GET_FCSR() csr_read(CSR_FCSR)
+#define SET_FCSR(value) csr_write(CSR_FCSR, (value))
+#define GET_FRM() csr_read(CSR_FRM)
+#define SET_FRM(value) csr_write(CSR_FRM, (value))
+#define GET_FFLAGS() csr_read(CSR_FFLAGS)
+#define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value))
 
 #define SET_FS_DIRTY() ((void) 0)
 
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e4c648c8317..ff6aed020f0 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -61,7 +61,7 @@ struct sbi_scratch {
 
 /** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr()	\
-((struct sbi_scratch *)csr_read(mscratch))
+((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
 
 /** Get Arg1 of next booting stage for current HART */
 #define sbi_scratch_thishart_arg1_ptr()	\
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h
index 11ece0d4672..930babda5ff 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -20,9 +20,9 @@ static inline type load_##type(const type *addr, ulong mepc)		\
 	register ulong __mepc asm ("a2") = mepc;			\
 	register ulong __mstatus asm ("a3");				\
 	type val;							\
-	asm ("csrrs %0, mstatus, %3\n"					\
+	asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"					\
 		#insn " %1, %2\n"					\
-		"csrw mstatus, %0"					\
+		"csrw "STR(CSR_MSTATUS)", %0"					\
 	: "+&r" (__mstatus), "=&r" (val)				\
 	: "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc));		\
 	return val;							\
@@ -33,9 +33,9 @@ static inline void store_##type(type *addr, type val, ulong mepc)	\
 {									\
 	register ulong __mepc asm ("a2") = mepc;			\
 	register ulong __mstatus asm ("a3");				\
-	asm volatile ("csrrs %0, mstatus, %3\n"				\
+	asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"				\
 		#insn " %1, %2\n"					\
-		"csrw mstatus, %0"					\
+		"csrw "STR(CSR_MSTATUS)", %0"					\
 	: "+&r" (__mstatus)						\
 	: "r" (val), "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc));	\
 }
@@ -76,18 +76,18 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 	register ulong __mstatus asm ("a3");
 	ulong val;
 #ifndef __riscv_compressed
-	asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
+	asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n"
 #if __riscv_xlen == 64
 		STR(LWU) " %[insn], (%[addr])\n"
 #else
 		STR(LW) " %[insn], (%[addr])\n"
 #endif
-		"csrw mstatus, %[mstatus]"
+		"csrw "STR(CSR_MSTATUS)", %[mstatus]"
 		: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val)
 		: [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc));
 #else
 	ulong rvc_mask = 3, tmp;
-	asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
+	asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n"
 		"and %[tmp], %[addr], 2\n"
 		"bnez %[tmp], 1f\n"
 #if __riscv_xlen == 64
@@ -107,7 +107,7 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 		"lhu %[tmp], 2(%[addr])\n"
 		"sll %[tmp], %[tmp], 16\n"
 		"add %[insn], %[insn], %[tmp]\n"
-		"2: csrw mstatus, %[mstatus]"
+		"2: csrw "STR(CSR_MSTATUS)", %[mstatus]"
 	: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp)
 	: [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc),
 	[rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16));
diff --git a/lib/sbi_emulate_csr.c b/lib/sbi_emulate_csr.c
index 1d52aac8ad1..bdc2c676f58 100644
--- a/lib/sbi_emulate_csr.c
+++ b/lib/sbi_emulate_csr.c
@@ -23,13 +23,13 @@ int sbi_emulate_csr_read(int csr_num,
 	ulong cen = -1UL;
 
 	if (EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U)
-		cen = csr_read(scounteren);
+		cen = csr_read(CSR_SCOUNTEREN);
 
 	switch (csr_num) {
 	case CSR_CYCLE:
 		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = csr_read(mcycle);
+		*csr_val = csr_read(CSR_MCYCLE);
 		break;
 	case CSR_TIME:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
@@ -39,23 +39,23 @@ int sbi_emulate_csr_read(int csr_num,
 	case CSR_INSTRET:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = csr_read(minstret);
+		*csr_val = csr_read(CSR_MINSTRET);
 		break;
 	case CSR_MHPMCOUNTER3:
 		if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
 			return -1;
-		*csr_val = csr_read(mhpmcounter3);
+		*csr_val = csr_read(CSR_MHPMCOUNTER3);
 		break;
 	case CSR_MHPMCOUNTER4:
 		if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
 			return -1;
-		*csr_val = csr_read(mhpmcounter4);
+		*csr_val = csr_read(CSR_MHPMCOUNTER4);
 		break;
 #if __riscv_xlen == 32
 	case CSR_CYCLEH:
 		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = csr_read(mcycleh);
+		*csr_val = csr_read(CSR_MCYCLEH);
 		break;
 	case CSR_TIMEH:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
@@ -65,24 +65,24 @@ int sbi_emulate_csr_read(int csr_num,
 	case CSR_INSTRETH:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = csr_read(minstreth);
+		*csr_val = csr_read(CSR_MINSTRETH);
 		break;
 	case CSR_MHPMCOUNTER3H:
 		if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
 			return -1;
-		*csr_val = csr_read(mhpmcounter3h);
+		*csr_val = csr_read(CSR_MHPMCOUNTER3H);
 		break;
 	case CSR_MHPMCOUNTER4H:
 		if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
 			return -1;
-		*csr_val = csr_read(mhpmcounter4h);
+		*csr_val = csr_read(CSR_MHPMCOUNTER4H);
 		break;
 #endif
 	case CSR_MHPMEVENT3:
-		*csr_val = csr_read(mhpmevent3);
+		*csr_val = csr_read(CSR_MHPMEVENT3);
 		break;
 	case CSR_MHPMEVENT4:
-		*csr_val = csr_read(mhpmevent4);
+		*csr_val = csr_read(CSR_MHPMEVENT4);
 		break;
 	default:
 		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n",
@@ -100,36 +100,36 @@ int sbi_emulate_csr_write(int csr_num,
 {
 	switch (csr_num) {
 	case CSR_CYCLE:
-		csr_write(mcycle, csr_val);
+		csr_write(CSR_MCYCLE, csr_val);
 		break;
 	case CSR_INSTRET:
-		csr_write(minstret, csr_val);
+		csr_write(CSR_MINSTRET, csr_val);
 		break;
 	case CSR_MHPMCOUNTER3:
-		csr_write(mhpmcounter3, csr_val);
+		csr_write(CSR_MHPMCOUNTER3, csr_val);
 		break;
 	case CSR_MHPMCOUNTER4:
-		csr_write(mhpmcounter4, csr_val);
+		csr_write(CSR_MHPMCOUNTER4, csr_val);
 		break;
 #if __riscv_xlen == 32
 	case CSR_CYCLEH:
-		csr_write(mcycleh, csr_val);
+		csr_write(CSR_MCYCLEH, csr_val);
 		break;
 	case CSR_INSTRETH:
-		csr_write(minstreth, csr_val);
+		csr_write(CSR_MINSTRETH, csr_val);
 		break;
 	case CSR_MHPMCOUNTER3H:
-		csr_write(mhpmcounter3h, csr_val);
+		csr_write(CSR_MHPMCOUNTER3H, csr_val);
 		break;
 	case CSR_MHPMCOUNTER4H:
-		csr_write(mhpmcounter4h, csr_val);
+		csr_write(CSR_MHPMCOUNTER4H, csr_val);
 		break;
 #endif
 	case CSR_MHPMEVENT3:
-		csr_write(mhpmevent3, csr_val);
+		csr_write(CSR_MHPMEVENT3, csr_val);
 		break;
 	case CSR_MHPMEVENT4:
-		csr_write(mhpmevent4, csr_val);
+		csr_write(CSR_MHPMEVENT4, csr_val);
 		break;
 	default:
 		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n",
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index ae11a526082..e3b2219f200 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -23,7 +23,7 @@
  */
 unsigned int sbi_current_hartid()
 {
-	return (u32)csr_read(mhartid);
+	return (u32)csr_read(CSR_MHARTID);
 }
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
@@ -32,21 +32,21 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
-		csr_write(mstatus, MSTATUS_FS);
+		csr_write(CSR_MSTATUS, MSTATUS_FS);
 
 	/* Enable user/supervisor use of perf counters */
 	if (misa_extension('S') &&
 	     sbi_platform_has_scounteren(plat))
-		csr_write(scounteren, -1);
+		csr_write(CSR_SCOUNTEREN, -1);
 	if (sbi_platform_has_mcounteren(plat))
-		csr_write(mcounteren, -1);
+		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* Disable all interrupts */
-	csr_write(mie, 0);
+	csr_write(CSR_MIE, 0);
 
 	/* Disable S-mode paging */
 	if (misa_extension('S'))
-		csr_write(sptbr, 0);
+		csr_write(CSR_SATP, 0);
 }
 
 static int fp_init(u32 hartid)
@@ -60,17 +60,17 @@ static int fp_init(u32 hartid)
 	if (!misa_extension('D') && !misa_extension('F'))
 		return 0;
 
-	if (!(csr_read(mstatus) & MSTATUS_FS))
+	if (!(csr_read(CSR_MSTATUS) & MSTATUS_FS))
 		return SBI_EINVAL;
 
 #ifdef __riscv_flen
 	for (i = 0; i < 32; i++)
 		init_fp_reg(i);
-	csr_write(fcsr, 0);
+	csr_write(CSR_FCSR, 0);
 #else
 	fd_mask = (1 << ('F' - 'A')) | (1 << ('D' - 'A'));
-	csr_clear(misa, fd_mask);
-	if (csr_read(misa) & fd_mask)
+	csr_clear(CSR_MISA, fd_mask);
+	if (csr_read(CSR_MISA) & fd_mask)
 		return SBI_ENOTSUPP;
 #endif
 
@@ -96,12 +96,12 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 			      (1U << CAUSE_LOAD_PAGE_FAULT) |
 			      (1U << CAUSE_STORE_PAGE_FAULT);
 
-	csr_write(mideleg, interrupts);
-	csr_write(medeleg, exceptions);
+	csr_write(CSR_MIDELEG, interrupts);
+	csr_write(CSR_MEDELEG, exceptions);
 
-	if (csr_read(mideleg) != interrupts)
+	if (csr_read(CSR_MIDELEG) != interrupts)
 		return SBI_EFAIL;
-	if (csr_read(medeleg) != exceptions)
+	if (csr_read(CSR_MEDELEG) != exceptions)
 		return SBI_EFAIL;
 
 	return 0;
@@ -230,22 +230,22 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 		sbi_hart_hang();
 	}
 
-	val = csr_read(mstatus);
+	val = csr_read(CSR_MSTATUS);
 	val = INSERT_FIELD(val, MSTATUS_MPP, next_mode);
 	val = INSERT_FIELD(val, MSTATUS_MPIE, 0);
 
-	csr_write(mstatus, val);
-	csr_write(mepc, next_addr);
+	csr_write(CSR_MSTATUS, val);
+	csr_write(CSR_MEPC, next_addr);
 
 	if (next_mode == PRV_S) {
-		csr_write(stvec, next_addr);
-		csr_write(sscratch, 0);
-		csr_write(sie, 0);
-		csr_write(satp, 0);
+		csr_write(CSR_STVEC, next_addr);
+		csr_write(CSR_SSCRATCH, 0);
+		csr_write(CSR_SIE, 0);
+		csr_write(CSR_SATP, 0);
 	} else if (next_mode == PRV_U) {
-		csr_write(utvec, next_addr);
-		csr_write(uscratch, 0);
-		csr_write(uie, 0);
+		csr_write(CSR_UTVEC, next_addr);
+		csr_write(CSR_USCRATCH, 0);
+		csr_write(CSR_UIE, 0);
 	}
 
 	register unsigned long a0 asm ("a0") = arg0;
@@ -304,7 +304,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	
 	/* Set MSIE bit to receive IPI */
-	csr_set(mie, MIP_MSIP);
+	csr_set(CSR_MIE, MIP_MSIP);
 
 	do {
 		spin_lock(&coldboot_wait_bitmap_lock);
@@ -312,14 +312,14 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		spin_unlock(&coldboot_wait_bitmap_lock);
 
 		wfi();
-		mipval = csr_read(mip);
+		mipval = csr_read(CSR_MIP);
 
 		spin_lock(&coldboot_wait_bitmap_lock);
 		coldboot_wait_bitmap &= ~(1UL << hartid);
 		spin_unlock(&coldboot_wait_bitmap_lock);
 	} while (!(mipval && MIP_MSIP));
 
-	csr_clear(mip, MIP_MSIP);
+	csr_clear(CSR_MIP, MIP_MSIP);
 }
 
 void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 3f7f4eacdd2..58567f46094 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -127,7 +127,7 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 
 	if (unlikely((insn & 3) != 3)) {
 		if (insn == 0) {
-			mstatus = csr_read(mstatus);
+			mstatus = csr_read(CSR_MSTATUS);
 			insn = get_insn(regs->mepc, &mstatus);
 		}
 		if ((insn & 3) != 3)
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 316b2a01779..0e9fb30af68 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -27,7 +27,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 	struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (pmask)
-		mask &= load_ulong(pmask, csr_read(mepc));
+		mask &= load_ulong(pmask, csr_read(CSR_MEPC));
 
 	/* send IPIs to everyone */
 	for (i = 0, m = mask; m; i++, m >>= 1) {
@@ -46,7 +46,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 {
-	csr_clear(mip, MIP_SSIP);
+	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
 void sbi_ipi_process(struct sbi_scratch *scratch)
@@ -64,7 +64,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 		ipi_event = __ffs(ipi_type);
 		switch (ipi_event) {
 		case SBI_IPI_EVENT_SOFT:
-			csr_set(mip, MIP_SSIP);
+			csr_set(CSR_MIP, MIP_SSIP);
 			break;
 		case SBI_IPI_EVENT_FENCE_I:
 			__asm__ __volatile("fence.i");
@@ -83,7 +83,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	/* Enable software interrupts */
-	csr_set(mie, MIP_MSIP);
+	csr_set(CSR_MIE, MIP_MSIP);
 
 	return sbi_platform_ipi_init(sbi_platform_ptr(scratch),
 				     cold_boot);
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index 8522255464a..8ab01c1817e 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -26,7 +26,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 				struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	ulong mstatus = csr_read(mstatus);
+	ulong mstatus = csr_read(CSR_MSTATUS);
 	ulong insn = get_insn(regs->mepc, &mstatus);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
@@ -112,7 +112,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 				 struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	ulong mstatus = csr_read(mstatus);
+	ulong mstatus = csr_read(CSR_MSTATUS);
 	ulong insn = get_insn(regs->mepc, &mstatus);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index a72c2809e66..a687a5fa384 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -56,14 +56,14 @@ void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
 {
 	sbi_platform_timer_event_start(sbi_platform_ptr(scratch),
 				       next_event);
-	csr_clear(mip, MIP_STIP);
-	csr_set(mie, MIP_MTIP);
+	csr_clear(CSR_MIP, MIP_STIP);
+	csr_set(CSR_MIE, MIP_MTIP);
 }
 
 void sbi_timer_process(struct sbi_scratch *scratch)
 {
-	csr_clear(mie, MIP_MTIP);
-	csr_set(mip, MIP_STIP);
+	csr_clear(CSR_MIE, MIP_MTIP);
+	csr_set(CSR_MIP, MIP_STIP);
 }
 
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index fb9ca4fa201..ba597d8ebfa 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -94,7 +94,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	csr_write(CSR_SCAUSE, cause);
 
 	/* Set MEPC to S-mode exception vector base */
-	regs->mepc = csr_read(stvec);
+	regs->mepc = csr_read(CSR_STVEC);
 
 	/* Initial value of new MSTATUS */
 	new_mstatus = regs->mstatus;
@@ -141,7 +141,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
-	ulong mcause = csr_read(mcause);
+	ulong mcause = csr_read(CSR_MCAUSE);
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		mcause &= ~(1UL << (__riscv_xlen - 1));

From 28d1dd2430a80d350c9a53a1f5be08de8c3f9dc1 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 12 Feb 2019 18:32:58 -0800
Subject: [PATCH 0162/1765] platform: Use CSR_<FOO> instead of <foo> for
 csr_*()

Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.

Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/platform.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index ddfdf15ba15..b9e5a87072e 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -88,7 +88,7 @@
 #define SPI1_BASE_ADDR		(0x53000000U)
 #define SPI3_BASE_ADDR		(0x54000000U)
 
-#define read_cycle()		csr_read(mcycle)
+#define read_cycle()		csr_read(CSR_MCYCLE)
 
 /*
  * PLIC External Interrupt Numbers

From 35e617385f5c6278ee83434b9594d07731993742 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 13 Feb 2019 11:03:53 -0800
Subject: [PATCH 0163/1765] firmware: Use CSR_<FOO> instead of <foo> for csr*

Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S            | 32 ++++++++++++++++----------------
 firmware/payloads/test_head.S |  7 ++++---
 2 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index fb27ea3f5cd..6595489d338 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -22,7 +22,7 @@ _start:
 	 * Jump to warm-boot if this is not the first core booting,
 	 * that is, for mhartid != 0
 	 */
-	csrr	a6, mhartid
+	csrr	a6, CSR_MHARTID
 	blt	zero, a6, _wait_for_boot_hart
 
 	/* Zero-out BSS */
@@ -126,15 +126,15 @@ _wait_for_boot_hart:
 
 _start_warm:
 	/* Disable and clear all interrupts */
-	csrw	mie, zero
-	csrw	mip, zero
+	csrw	CSR_MIE, zero
+	csrw	CSR_MIP, zero
 
 	/* Preload per-HART details
 	 * s6 -> HART ID
 	 * s7 -> HART Count
 	 * s8 -> HART Stack Size
 	 */
-	csrr	s6, mhartid
+	csrr	s6, CSR_MHARTID
 	la	a4, platform
 #if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
@@ -145,7 +145,7 @@ _start_warm:
 #endif
 
 	/* HART ID should be within expected limit */
-	csrr	s6, mhartid
+	csrr	s6, CSR_MHARTID
 	bge	s6, s7, _start_hang
 
 	/* Setup scratch space */
@@ -156,7 +156,7 @@ _start_warm:
 	sub	tp, tp, a5
 	li	a5, SBI_SCRATCH_SIZE
 	sub	tp, tp, a5
-	csrw	mscratch, tp
+	csrw	CSR_MSCRATCH, tp
 
 	/* Initialize scratch space */
 	la	a4, _fw_start
@@ -187,11 +187,11 @@ _start_warm:
 
 	/* Setup trap handler */
 	la	a4, _trap_handler
-	csrw	mtvec, a4
+	csrw	CSR_MTVEC, a4
 
 	/* Initialize SBI runtime */
-	csrr	a0, mscratch
-	call	sbi_init
+	csrr	a0, CSR_MSCRATCH
+	Call	sbi_init
 
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang
@@ -243,7 +243,7 @@ _start_hang:
 	.globl _trap_handler
 _trap_handler:
 	/* Swap SP and MSCRATCH */
-	csrrw	sp, mscratch, sp
+	csrrw	sp, CSR_MSCRATCH, sp
 
 	/* Setup exception stack */
 	add	sp, sp, -(SBI_TRAP_REGS_SIZE)
@@ -256,12 +256,12 @@ _trap_handler:
 
 	/* Save original SP and restore MSCRATCH */
 	add	t0, sp, SBI_TRAP_REGS_SIZE
-	csrrw	t0, mscratch, t0
+	csrrw	t0, CSR_MSCRATCH, t0
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(sp)(sp)
 
 	/* Save MEPC and MSTATUS CSRs */
-	csrr	t0, mepc
-	csrr	t1, mstatus
+	csrr	t0, CSR_MEPC
+	csrr	t1, CSR_MSTATUS
 
 	/*
 	 * Note: Fast path trap handling can be done here
@@ -305,7 +305,7 @@ _trap_handler:
 
 	/* Call C routine */
 	add	a0, sp, zero
-	csrr	a1, mscratch
+	csrr	a1, CSR_MSCRATCH
 	call	sbi_trap_handler
 
 	/* Restore all general regisers except SP, RA, T0, T1, T2, and T3 */
@@ -348,8 +348,8 @@ _trap_handler:
 	 */
 
 	/* Restore MEPC and MSTATUS CSRs */
-	csrw	mepc, t0
-	csrw	mstatus, t1
+	csrw	CSR_MEPC, t0
+	csrw	CSR_MSTATUS, t1
 
 	/* Restore RA, T0, T1, and T2 */
 	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S
index 4454e46882c..ef1405a40aa 100644
--- a/firmware/payloads/test_head.S
+++ b/firmware/payloads/test_head.S
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/riscv_encoding.h>
 #define __ASM_STR(x)	x
 
 #if __riscv_xlen == 64
@@ -48,12 +49,12 @@ _bss_zero:
 
 _start_warm:
 	/* Disable and clear all interrupts */
-	csrw	sie, zero
-	csrw	sip, zero
+	csrw	CSR_SIE, zero
+	csrw	CSR_SIP, zero
 
 	/* Setup exception vectors */
 	la	a3, _start_hang
-	csrw	stvec, a3
+	csrw	CSR_STVEC, a3
 
 	/* Setup stack */
 	la	a3, _payload_end

From 286b80768beb16130f869877875af2f581439b2b Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Thu, 14 Feb 2019 05:37:13 +0200
Subject: [PATCH 0164/1765] Makefile: Make sure ld is always aware of the
 target abi/emulation

On Makefile merge_objs calls ld without providing any hints
on the target so on a multilib toolchain for example it will
always pick the default one (elf64-littleriscv) which will
then result a failure when compiling on RV32 since the objects
will be 32bits and the target will be 64bits. The same happens
on compile_ld that calls gcc without CFLAGS so it doesn't
get mabi/march.

With this patch OpenSBI compiles on RV32 (PLATFORM_RISCV_XLEN=32),
I tested fw_jump.elf on qemu (but it doesn't boot the kernel yet
-bbl also doesn't boot the kernel so it may be something else).

Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
---
 Makefile | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index d775e4ec893..32f6aa8023f 100644
--- a/Makefile
+++ b/Makefile
@@ -171,6 +171,8 @@ LDFLAGS		+=	$(platform-ldflags-y)
 LDFLAGS		+=	$(firmware-ldflags-y)
 
 MERGEFLAGS	+=	-r
+MERGEFLAGS	+=	-b elf$(PLATFORM_RISCV_XLEN)-littleriscv
+MERGEFLAGS	+=	-m elf$(PLATFORM_RISCV_XLEN)lriscv
 
 DTCFLAGS	=	-O dtb
 
@@ -225,7 +227,7 @@ compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
 compile_ld = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " LD        $(subst $(build_dir)/,,$(1))"; \
-	     $(CC) $(3) $(LDFLAGS) -Wl,-T$(2) -o $(1)
+	     $(CC) $(CFLAGS) $(3) $(LDFLAGS) -Wl,-T$(2) -o $(1)
 compile_ar = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AR        $(subst $(build_dir)/,,$(1))"; \
 	     $(AR) $(ARFLAGS) $(1) $(2)

From d369e721e8588ebe8b21fb238bcdd182cc783e32 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Thu, 14 Feb 2019 14:47:41 -0800
Subject: [PATCH 0165/1765] firmware: Ensure the payloads are 4 bit alligned

We expect the payloads to be 4 bit alligned as we later AND them
with ~0xf. As most of the addresses are manually specified we don't
really need this, but better to be over cautious.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 firmware/fw_payload.S | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 51381c1585e..b86b63c549a 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -9,7 +9,7 @@
 
 #include "fw_base.S"
 
-	.align 3
+	.align 4
 	.section .entry, "ax", %progbits
 	.global fw_prev_arg1
 fw_prev_arg1:
@@ -21,7 +21,7 @@ fw_prev_arg1:
 #endif
 	ret
 
-	.align 3
+	.align 4
 	.section .entry, "ax", %progbits
 	.global fw_next_arg1
 fw_next_arg1:
@@ -33,7 +33,7 @@ fw_next_arg1:
 #endif
 	ret
 
-	.align 3
+	.align 4
 	.section .entry, "ax", %progbits
 	.global fw_next_addr
 fw_next_addr:
@@ -42,13 +42,14 @@ fw_next_addr:
 	ret
 
 #ifdef FW_PAYLOAD_FDT_PATH
-	.align 3
+	.align 4
 	.section .text, "ax", %progbits
 	.globl fdt_bin
 fdt_bin:
 	.incbin	FW_PAYLOAD_FDT_PATH
 #endif
 
+	.align 4
 	.section .payload, "ax", %progbits
 	.globl payload_bin
 payload_bin:

From afbb0cdf80d86283363265e5e0aca5ada90e095d Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 12 Feb 2019 15:31:14 -0800
Subject: [PATCH 0166/1765] platform: fu540: Fix missing newline

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 platform/sifive/fu540/platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index ea6ced91d21..a244d10f3d5 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -80,6 +80,7 @@ static void fu540_modify_dt(void *fdt)
 
 	plic_fdt_fixup(fdt, "riscv,plic0");
 }
+
 static int fu540_final_init(bool cold_boot)
 {
 	void *fdt;

From ae4e0de700ee55980a66bd1c1cac384b0915f9e6 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Mon, 11 Feb 2019 14:12:57 -0800
Subject: [PATCH 0167/1765] platform: fu540: Initial commit of Microsemi device
 tree

Add a device tree for th HiFive Unleashed that includes the Microsemi
PCIe root complex.

Once we have support for u-boot and in tree Linux kernel device trees
this device tree should be removed.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 .../HiFiveUnleashed-MicroSemi-Expansion.dts   | 588 ++++++++++++++++++
 1 file changed, 588 insertions(+)
 create mode 100644 platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts

diff --git a/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts b/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts
new file mode 100644
index 00000000000..5be90a0f85f
--- /dev/null
+++ b/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts
@@ -0,0 +1,588 @@
+/dts-v1/;
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	compatible = "sifive,fu540g", "sifive,fu500";
+	model = "sifive,hifive-unleashed-a00";
+
+	aliases {
+		serial0 = "/soc/serial@10010000";
+		serial1 = "/soc/serial@10011000";
+	};
+
+	chosen {
+		stdout-path = "/soc/serial@10010000:115200";
+	};
+
+	firmware {
+		sifive,fsbl = "2018-03-20";
+	};
+
+	cpus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		timebase-frequency = <0xf4240>;
+
+		cpu@0 {
+			clock-frequency = <0x0>;
+			compatible = "sifive,rocket0", "riscv";
+			device_type = "cpu";
+			i-cache-block-size = <0x40>;
+			i-cache-sets = <0x80>;
+			i-cache-size = <0x4000>;
+			next-level-cache = <0x1 0x2>;
+			reg = <0x0>;
+			riscv,isa = "rv64imac";
+			sifive,dtim = <0x3>;
+			sifive,itim = <0x4>;
+			status = "masked";
+
+			interrupt-controller {
+				#interrupt-cells = <0x1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				linux,phandle = <0xf>;
+				phandle = <0xf>;
+			};
+		};
+
+		cpu@1 {
+			clock-frequency = <0x0>;
+			compatible = "sifive,rocket0", "riscv";
+			d-cache-block-size = <0x40>;
+			d-cache-sets = <0x40>;
+			d-cache-size = <0x8000>;
+			d-tlb-sets = <0x1>;
+			d-tlb-size = <0x20>;
+			device_type = "cpu";
+			i-cache-block-size = <0x40>;
+			i-cache-sets = <0x40>;
+			i-cache-size = <0x8000>;
+			i-tlb-sets = <0x1>;
+			i-tlb-size = <0x20>;
+			mmu-type = "riscv,sv39";
+			next-level-cache = <0x1 0x2>;
+			reg = <0x1>;
+			riscv,isa = "rv64imafdc";
+			sifive,itim = <0x5>;
+			status = "okay";
+			tlb-split;
+
+			interrupt-controller {
+				#interrupt-cells = <0x1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				linux,phandle = <0x10>;
+				phandle = <0x10>;
+			};
+		};
+
+		cpu@2 {
+			clock-frequency = <0x0>;
+			compatible = "sifive,rocket0", "riscv";
+			d-cache-block-size = <0x40>;
+			d-cache-sets = <0x40>;
+			d-cache-size = <0x8000>;
+			d-tlb-sets = <0x1>;
+			d-tlb-size = <0x20>;
+			device_type = "cpu";
+			i-cache-block-size = <0x40>;
+			i-cache-sets = <0x40>;
+			i-cache-size = <0x8000>;
+			i-tlb-sets = <0x1>;
+			i-tlb-size = <0x20>;
+			mmu-type = "riscv,sv39";
+			next-level-cache = <0x1 0x2>;
+			reg = <0x2>;
+			riscv,isa = "rv64imafdc";
+			sifive,itim = <0x6>;
+			status = "okay";
+			tlb-split;
+
+			interrupt-controller {
+				#interrupt-cells = <0x1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				linux,phandle = <0x11>;
+				phandle = <0x11>;
+			};
+		};
+
+		cpu@3 {
+			clock-frequency = <0x0>;
+			compatible = "sifive,rocket0", "riscv";
+			d-cache-block-size = <0x40>;
+			d-cache-sets = <0x40>;
+			d-cache-size = <0x8000>;
+			d-tlb-sets = <0x1>;
+			d-tlb-size = <0x20>;
+			device_type = "cpu";
+			i-cache-block-size = <0x40>;
+			i-cache-sets = <0x40>;
+			i-cache-size = <0x8000>;
+			i-tlb-sets = <0x1>;
+			i-tlb-size = <0x20>;
+			mmu-type = "riscv,sv39";
+			next-level-cache = <0x1 0x2>;
+			reg = <0x3>;
+			riscv,isa = "rv64imafdc";
+			sifive,itim = <0x7>;
+			status = "okay";
+			tlb-split;
+
+			interrupt-controller {
+				#interrupt-cells = <0x1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				linux,phandle = <0x12>;
+				phandle = <0x12>;
+			};
+		};
+
+		cpu@4 {
+			clock-frequency = <0x0>;
+			compatible = "sifive,rocket0", "riscv";
+			d-cache-block-size = <0x40>;
+			d-cache-sets = <0x40>;
+			d-cache-size = <0x8000>;
+			d-tlb-sets = <0x1>;
+			d-tlb-size = <0x20>;
+			device_type = "cpu";
+			i-cache-block-size = <0x40>;
+			i-cache-sets = <0x40>;
+			i-cache-size = <0x8000>;
+			i-tlb-sets = <0x1>;
+			i-tlb-size = <0x20>;
+			mmu-type = "riscv,sv39";
+			next-level-cache = <0x1 0x2>;
+			reg = <0x4>;
+			riscv,isa = "rv64imafdc";
+			sifive,itim = <0x8>;
+			status = "okay";
+			tlb-split;
+
+			interrupt-controller {
+				#interrupt-cells = <0x1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				linux,phandle = <0x13>;
+				phandle = <0x13>;
+			};
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x2 0x0>;
+		linux,phandle = <0xe>;
+		phandle = <0xe>;
+	};
+
+	soc {
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		compatible = "SiFive,FU540G-soc", "fu500-soc", "sifive-soc", "simple-bus";
+		ranges;
+
+		refclk {
+			#clock-cells = <0x0>;
+			compatible = "fixed-clock";
+			clock-frequency = <0x1fca055>;
+			clock-output-names = "xtal";
+			linux,phandle = <0x9>;
+			phandle = <0x9>;
+		};
+
+		prci@10000000 {
+			compatible = "sifive,aloeprci0";
+			reg = <0x0 0x10000000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x9>;
+			#clock-cells = <0x1>;
+			linux,phandle = <0xa>;
+			phandle = <0xa>;
+		};
+
+		tlclk {
+			compatible = "fixed-factor-clock";
+			clocks = <0xa 0x0>;
+			#clock-cells = <0x0>;
+			clock-div = <0x2>;
+			clock-mult = <0x1>;
+			linux,phandle = <0x16>;
+			phandle = <0x16>;
+		};
+
+		cadence-gemgxl-mgmt@100a0000 {
+			compatible = "sifive,cadencegemgxlmgmt0";
+			reg = <0x0 0x100a0000 0x0 0x1000>;
+			reg-names = "control";
+			#clock-cells = <0x0>;
+			linux,phandle = <0x14>;
+			phandle = <0x14>;
+		};
+
+		bus-blocker@100b8000 {
+			compatible = "sifive,bus-blocker0";
+			reg = <0x0 0x100b8000 0x0 0x1000>;
+			reg-names = "control";
+		};
+
+		cache-controller@2010000 {
+			cache-block-size = <0x40>;
+			cache-level = <0x2>;
+			cache-sets = <0x800>;
+			cache-size = <0x200000>;
+			cache-unified;
+			compatible = "sifive,ccache0", "cache";
+			interrupt-parent = <0xb>;
+			interrupts = <0x1 0x2 0x3>;
+			next-level-cache = <0xc 0xd 0xe>;
+			reg = <0x0 0x2010000 0x0 0x1000 0x0 0x8000000 0x0 0x2000000>;
+			reg-names = "control", "sideband";
+			linux,phandle = <0x2>;
+			phandle = <0x2>;
+		};
+
+		cadence-ddr-mgmt@100c0000 {
+			compatible = "sifive,cadenceddrmgmt0";
+			reg = <0x0 0x100c0000 0x0 0x1000>;
+			reg-names = "control";
+		};
+
+		chiplink@40000000 {
+			#address-cells = <0x2>;
+			#size-cells = <0x2>;
+			compatible = "sifive,chiplink", "simple-bus";
+			ranges = <0x0 0x60000000 0x0 0x60000000 0x0 0x20000000 0x30 0x0 0x30 0x0 0x10 0x0 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000 0x20 0x0 0x20 0x0 0x10 0x0>;
+			linux,phandle = <0xd>;
+			phandle = <0xd>;
+		};
+
+		dma@3000000 {
+			#dma-cells = <0x1>;
+			compatible = "riscv,dma0";
+			dma-channels = <0x4>;
+			dma-requests = <0x0>;
+			interrupt-parent = <0xb>;
+			interrupts = <0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>;
+			reg = <0x0 0x3000000 0x0 0x100000>;
+			reg-names = "control";
+			riscv,dma-pools = <0x1>;
+		};
+
+		dtim@1000000 {
+			compatible = "sifive,dtim0";
+			reg = <0x0 0x1000000 0x0 0x2000>;
+			reg-names = "mem";
+			linux,phandle = <0x3>;
+			phandle = <0x3>;
+		};
+
+		ememoryotp@10070000 {
+			compatible = "sifive,ememoryotp0";
+			reg = <0x0 0x10070000 0x0 0x1000>;
+			reg-names = "control";
+		};
+
+		error-device@18000000 {
+			compatible = "sifive,error0";
+			reg = <0x0 0x18000000 0x0 0x8000000>;
+			reg-names = "mem";
+			linux,phandle = <0x1>;
+			phandle = <0x1>;
+		};
+
+		ethernet@10090000 {
+			compatible = "cdns,macb";
+			interrupt-parent = <0xb>;
+			interrupts = <0x35>;
+			reg = <0x0 0x10090000 0x0 0x2000>;
+			reg-names = "control";
+			local-mac-address = [70 b3 d5 92 f0 1f];
+			phy-mode = "gmii";
+			clock-names = "pclk", "hclk", "tx_clk";
+			clocks = <0xa 0x1 0xa 0x1 0x14>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+
+			ethernet-phy@0 {
+				reg = <0x0>;
+				reset-gpios = <0x15 0xc 0x1>;
+			};
+		};
+
+		gpio@10060000 {
+			compatible = "sifive,gpio0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16>;
+			reg = <0x0 0x10060000 0x0 0x1000>;
+			reg-names = "control";
+			gpio-controller;
+			#gpio-cells = <0x2>;
+			interrupt-controller;
+			#interrupt-cells = <0x2>;
+			linux,phandle = <0x15>;
+			phandle = <0x15>;
+		};
+
+		gpio-restart {
+			compatible = "gpio-restart";
+			gpios = <0x15 0xa 0x1>;
+		};
+
+		i2c@10030000 {
+			compatible = "sifive,i2c0", "opencores,i2c-ocores";
+			reg = <0x0 0x10030000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+			reg-shift = <0x2>;
+			reg-io-width = <0x1>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		interrupt-controller@c000000 {
+			#interrupt-cells = <0x1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <0xf 0xffffffff 0x10 0xffffffff 0x10 0x9 0x11 0xffffffff 0x11 0x9 0x12 0xffffffff 0x12 0x9 0x13 0xffffffff 0x13 0x9>;
+			reg = <0x0 0xc000000 0x0 0x4000000>;
+			reg-names = "control";
+			riscv,max-priority = <0x7>;
+			riscv,ndev = <0x35>;
+			linux,phandle = <0xb>;
+			phandle = <0xb>;
+		};
+
+		itim@1800000 {
+			compatible = "sifive,itim0";
+			reg = <0x0 0x1800000 0x0 0x4000>;
+			reg-names = "mem";
+			linux,phandle = <0x4>;
+			phandle = <0x4>;
+		};
+
+		itim@1808000 {
+			compatible = "sifive,itim0";
+			reg = <0x0 0x1808000 0x0 0x8000>;
+			reg-names = "mem";
+			linux,phandle = <0x5>;
+			phandle = <0x5>;
+		};
+
+		itim@1810000 {
+			compatible = "sifive,itim0";
+			reg = <0x0 0x1810000 0x0 0x8000>;
+			reg-names = "mem";
+			linux,phandle = <0x6>;
+			phandle = <0x6>;
+		};
+
+		itim@1818000 {
+			compatible = "sifive,itim0";
+			reg = <0x0 0x1818000 0x0 0x8000>;
+			reg-names = "mem";
+			linux,phandle = <0x7>;
+			phandle = <0x7>;
+		};
+
+		itim@1820000 {
+			compatible = "sifive,itim0";
+			reg = <0x0 0x1820000 0x0 0x8000>;
+			reg-names = "mem";
+			linux,phandle = <0x8>;
+			phandle = <0x8>;
+		};
+
+		memory-controller@100b0000 {
+			compatible = "sifive,aloeddr0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x1f>;
+			reg = <0x0 0x100b0000 0x0 0x4000>;
+			reg-names = "control";
+		};
+
+		pci@2000000000 {
+			#address-cells = <0x3>;
+			#interrupt-cells = <0x1>;
+			#size-cells = <0x2>;
+			compatible = "ms-pf,axi-pcie-host";
+			device_type = "pci";
+			bus-range = <0x01 0x7f>;
+			interrupt-map = <	0 0 0 1 0x17 1
+								0 0 0 2 0x17 2
+								0 0 0 3 0x17 3
+								0 0 0 4 0x17 4>;
+			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+			interrupt-parent = <0xb>;
+			interrupts = <0x20>;
+			ranges = <0x2000000 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>;
+			reg = <	0x20 0x30000000 0x0 0x4000000
+					0x20 0x0        0x0 0x100000 >;
+			reg-names = "control", "apb";
+
+			ms_pcie_intc {
+				#address-cells = <0x0>;
+				#interrupt-cells = <0x1>;
+				interrupt-controller;
+				linux,phandle = <0x17>;
+				phandle = <0x17>;
+			};
+		};
+
+		pinctrl@10080000 {
+			compatible = "sifive,pinctrl0";
+			reg = <0x0 0x10080000 0x0 0x1000>;
+			reg-names = "control";
+		};
+
+		pwm@10020000 {
+			compatible = "sifive,pwm0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x2a 0x2b 0x2c 0x2d>;
+			reg = <0x0 0x10020000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+			sifive,approx-period = <0xf4240>;
+			#pwm-cells = <0x2>;
+			linux,phandle = <0x18>;
+			phandle = <0x18>;
+		};
+
+		pwm@10021000 {
+			compatible = "sifive,pwm0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x2e 0x2f 0x30 0x31>;
+			reg = <0x0 0x10021000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+			sifive,approx-period = <0xf4240>;
+			#pwm-cells = <0x2>;
+		};
+
+		pwmleds {
+			compatible = "pwm-leds";
+
+			heartbeat {
+				pwms = <0x18 0x0 0x0>;
+				max-brightness = <0xff>;
+				linux,default-trigger = "heartbeat";
+			};
+
+			mtd {
+				pwms = <0x18 0x1 0x0>;
+				max-brightness = <0xff>;
+				linux,default-trigger = "mtd";
+			};
+
+			netdev {
+				pwms = <0x18 0x2 0x0>;
+				max-brightness = <0xff>;
+				linux,default-trigger = "netdev";
+			};
+
+			panic {
+				pwms = <0x18 0x3 0x0>;
+				max-brightness = <0xff>;
+				linux,default-trigger = "panic";
+			};
+		};
+
+		rom@1000 {
+			compatible = "sifive,modeselect0";
+			reg = <0x0 0x1000 0x0 0x1000>;
+			reg-names = "mem";
+		};
+
+		rom@10000 {
+			compatible = "sifive,maskrom0";
+			reg = <0x0 0x10000 0x0 0x8000>;
+			reg-names = "mem";
+		};
+
+		rom@a000000 {
+			compatible = "ucbbar,cacheable-zero0";
+			reg = <0x0 0xa000000 0x0 0x2000000>;
+			reg-names = "mem";
+			linux,phandle = <0xc>;
+			phandle = <0xc>;
+		};
+
+		serial@10010000 {
+			compatible = "sifive,uart0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x4>;
+			reg = <0x0 0x10010000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+		};
+
+		serial@10011000 {
+			compatible = "sifive,uart0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x5>;
+			reg = <0x0 0x10011000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+		};
+
+		spi@10040000 {
+			compatible = "sifive,spi0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x33>;
+			reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
+			reg-names = "control", "mem";
+			clocks = <0x16>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+
+			flash@0 {
+				compatible = "issi,is25wp256d", "jedec,spi-nor";
+				reg = <0x0>;
+				spi-max-frequency = <0x2faf080>;
+				m25p,fast-read;
+				spi-tx-bus-width = <0x4>;
+				spi-rx-bus-width = <0x4>;
+			};
+		};
+
+		spi@10041000 {
+			compatible = "sifive,spi0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x34>;
+			reg = <0x0 0x10041000 0x0 0x1000 0x0 0x30000000 0x0 0x10000000>;
+			reg-names = "control", "mem";
+			clocks = <0x16>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		spi@10050000 {
+			compatible = "sifive,spi0";
+			interrupt-parent = <0xb>;
+			interrupts = <0x6>;
+			reg = <0x0 0x10050000 0x0 0x1000>;
+			reg-names = "control";
+			clocks = <0x16>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+
+			mmc@0 {
+				compatible = "mmc-spi-slot";
+				reg = <0x0>;
+				spi-max-frequency = <0x1312d00>;
+				voltage-ranges = <0xce4 0xce4>;
+				disable-wp;
+				gpios = <0x15 0xb 0x1>;
+			};
+		};
+
+		teststatus@4000 {
+			compatible = "sifive,test0";
+			reg = <0x0 0x4000 0x0 0x1000>;
+			reg-names = "control";
+		};
+	};
+};

From 5cd69a496b380da3194664b7ff09411c9ce7da0b Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 12 Feb 2019 15:39:38 -0800
Subject: [PATCH 0168/1765] docs: fu540: Add steps for the Microsemi Expansion
 board

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/platform/sifive_fu540.md | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 59132622f02..28b1844330e 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -100,3 +100,13 @@ dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=102
 ```
 bootm 0x80600000 - 0x82200000
 ```
+
+Booting SiFive Fu540 Platform with Microsemi Expansion board
+------------------------------------------------------------
+
+Until the Linux kernel has in-tree support for device trees and mainline u-boot is fully supported on the HiFive Unleashed you can follow these steps to boot Linux with the Microsemi expansion board. This method should not be copied on future boards and is considered a temporary solution until we can use a more standardised boot flow.
+
+To boot the Linux kernel with a device tree that has support for the Microsemi Expansion board you can include the following line when compiling the firmware:
+```
+FW_PAYLOAD_FDT="HiFiveUnleashed-MicroSemi-Expansion.dtb"
+```

From 868e20df8b302c20782026a806dda317b76655e9 Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Fri, 15 Feb 2019 09:16:47 +0530
Subject: [PATCH 0169/1765] Makefile: Add 'make run' command for platform
 specific run

Makes for easy and quick build-run one-stop command.

For now only added for qemu targets. It can be added for
any platform having simulator/emulator (such as QEMU).

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                         | 15 +++++++++++++++
 platform/qemu/sifive_u/config.mk |  8 ++++++--
 platform/qemu/virt/config.mk     |  8 ++++++--
 platform/template/config.mk      | 10 ++++++++--
 4 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 32f6aa8023f..24330859dcd 100644
--- a/Makefile
+++ b/Makefile
@@ -316,6 +316,21 @@ all-deps-2 = $(if $(findstring clean,$(MAKECMDGOALS)),,$(all-deps-1))
 # Include external dependency of firmwares after default Makefile rules
 include $(src_dir)/firmware/external_deps.mk
 
+# Convenient "make run" command for emulated platforms
+.PHONY: run
+run: all
+ifneq ($(platform-runcmd),)
+	$(platform-runcmd) $(RUN_ARGS)
+else
+ifdef PLATFORM
+	@echo Platform $(PLATFORM) doesn't specify a run command
+	@false
+else
+	@echo Run command only available when targeting a platform
+	@false
+endif
+endif
+
 install_targets-y  = install_libsbi
 ifdef PLATFORM
 install_targets-y += install_libplatsbi
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 4e69b43ac6b..097fcdbb3a4 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -13,6 +13,10 @@ platform-cflags-y =
 platform-asflags-y =
 platform-ldflags-y =
 
+# Command for platform specific "make run"
+platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
+  -nographic -kernel $(build_dir)/platform/qemu/sifive_u/firmware/fw_payload.elf
+
 # Common drivers to enable
 PLATFORM_IRQCHIP_PLIC=y
 PLATFORM_SERIAL_SIFIVE_UART=y
@@ -21,7 +25,7 @@ PLATFORM_SYS_CLINT=y
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=y
-ifeq ($(OPENSBI_CC_XLEN), 32)
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
   FW_JUMP_ADDR=0x80400000
 else
@@ -30,7 +34,7 @@ else
 endif
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
-ifeq ($(OPENSBI_CC_XLEN), 32)
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
   FW_PAYLOAD_OFFSET=0x400000
 else
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 538b039b5e6..ad58b728e44 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -13,6 +13,10 @@ platform-cflags-y =
 platform-asflags-y =
 platform-ldflags-y =
 
+# Command for platform specific "make run"
+platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
+  -nographic -kernel $(build_dir)/platform/qemu/virt/firmware/fw_payload.elf
+
 # Common drivers to enable
 PLATFORM_IRQCHIP_PLIC=y
 PLATFORM_SERIAL_UART8250=y
@@ -21,7 +25,7 @@ PLATFORM_SYS_CLINT=y
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=y
-ifeq ($(OPENSBI_CC_XLEN), 32)
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
   FW_JUMP_ADDR=0x80400000
 else
@@ -30,7 +34,7 @@ else
 endif
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
-ifeq ($(OPENSBI_CC_XLEN), 32)
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
   FW_PAYLOAD_OFFSET=0x400000
 else
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 65ea1350c5b..5623a9b5de8 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -15,6 +15,12 @@ platform-asflags-y =
 # code needs can be added here
 platform-ldflags-y =
 
+#
+# Command for platform specific "make run"
+# Useful for development and debugging on plaftform simulator (such as QEMU)
+#
+# platform-runcmd = your_platform_run.sh
+
 #
 # Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
 # These are optional parameters but platforms can optionaly provide it.
@@ -47,7 +53,7 @@ FW_TEXT_START=0x80000000
 FW_JUMP=<y|n>
 # This needs to be 4MB aligned for 32-bit support
 # This needs to be 2MB aligned for 64-bit support
-# ifeq ($(OPENSBI_CC_XLEN), 32)
+# ifeq ($(PLATFORM_RISCV_XLEN), 32)
 # FW_JUMP_ADDR=0x80400000
 # else
 # FW_JUMP_ADDR=0x80200000
@@ -62,7 +68,7 @@ FW_JUMP=<y|n>
 FW_PAYLOAD=<y|n>
 # This needs to be 4MB aligned for 32-bit support
 # This needs to be 2MB aligned for 64-bit support
-ifeq ($(OPENSBI_CC_XLEN), 32)
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
 FW_PAYLOAD_OFFSET=0x400000
 else
 FW_PAYLOAD_OFFSET=0x200000

From 16426420b5d6bbf16c035503dd7d9eabd91e3f04 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 15 Feb 2019 14:56:53 -0800
Subject: [PATCH 0170/1765] Makefile: Fix the assignment of OPENSBI_CC_XLEN

Previously OPENSBI_CC_XLEN was not being correctly assigned either 32 or
64. It also was not assigned before config.mk was parsed. Ensure that it
will always be assigned.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 24330859dcd..c1ac54c4ba7 100644
--- a/Makefile
+++ b/Makefile
@@ -54,6 +54,9 @@ export firmware_dir=$(CURDIR)/firmware
 OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
 OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
 
+# Guess the compillers xlen
+OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine`; echo $${TMP:5:2})
+
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_dir) ]; then find $(platform_dir) -iname "objects.mk" | sort -r; fi)
@@ -116,9 +119,6 @@ endif
 AS		=	$(CC)
 DTC		=	dtc
 
-# Guess the compillers xlen
-OPENSBI_CC_XLEN = `expr substr \`$(CC) -dumpmachine\`  6 2`
-
 # Setup platform XLEN, ABI, ISA and Code Model
 ifndef PLATFORM_RISCV_XLEN
   ifeq ($(OPENSBI_CC_XLEN), 32)

From b44878b773698f08b4c08b9e43e26917950a7618 Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Sun, 17 Feb 2019 03:52:44 +0200
Subject: [PATCH 0171/1765] lib: Send IPI for all harts to hang on system
 shutdown

In case the platform specific method for shutting down
the system fails (or is not implemented), at least make
sure that all harts hang instead of just the current hart.

Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
---
 lib/sbi_system.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index 7b73aa428e2..f23d04647a2 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -5,11 +5,13 @@
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
+ *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
+#include <sbi/sbi_ipi.h>
 
 int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot)
 {
@@ -34,6 +36,12 @@ void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
 void __attribute__((noreturn)) sbi_system_shutdown(struct sbi_scratch *scratch,
 						   u32 type)
 {
+	/* First try the platform-specific method */
 	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
+
+	/* If that fails (or is not implemented) send an IPI on every
+	 * hart to hang and then hang the current hart */
+	sbi_ipi_send_many(scratch, NULL, SBI_IPI_EVENT_HALT);
+
 	sbi_hart_hang();
 }

From 51e543511a7425da1a5378e149de0b45928c7111 Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Sun, 17 Feb 2019 04:02:15 +0200
Subject: [PATCH 0172/1765] platform: qemu-virt: Implement system shutdown

In order for QEMU to be compatible with Spike, it implements
a simple protocol used for reporting back the simulation's
status, through the memory-mapped "test finisher" device. We
use that protocol to make QEMU exit on system shutdown.

Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
---
 platform/qemu/virt/platform.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 9dfd4d680e1..ab40b939df5 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -5,9 +5,11 @@
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
+ *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_io.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
@@ -19,6 +21,8 @@
 #define VIRT_HART_STACK_SIZE		8192
 
 #define VIRT_TEST_ADDR			0x100000
+#define VIRT_TEST_FINISHER_FAIL		0x3333
+#define VIRT_TEST_FINISHER_PASS		0x5555
 
 #define VIRT_CLINT_ADDR			0x2000000
 
@@ -122,7 +126,11 @@ static int virt_timer_init(bool cold_boot)
 
 static int virt_system_down(u32 type)
 {
-	/* For now nothing to do. */
+	/* Tell the "finisher" that the simulation
+	 * was successful so that QEMU exits
+	 */
+	writew(VIRT_TEST_FINISHER_PASS, (void *)VIRT_TEST_ADDR);
+
 	return 0;
 }
 

From 918c1354b75c74b62f67c4e929551d643f035443 Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Sun, 17 Feb 2019 09:00:20 +0200
Subject: [PATCH 0173/1765] lib: Improve delivery of SBI_IPI_EVENT_HALT

When sbi_ipi_send_many gets called with the current hartid
included on pmask (or when pmask is NULL), and we send
a HALT event, since the for loop works sequentially over
all hartids on the mask, we may send a HALT event to the
current hart before the loop finishes. So we will halt
the current hart before it can deliver a HALT IPI to the
rest and some harts will remain active.

Make sure we send an IPI to the current hart after we've
finished with everybody else.

Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
---
 lib/sbi_ipi.c | 47 ++++++++++++++++++++++++++++++++++-------------
 1 file changed, 34 insertions(+), 13 deletions(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 0e9fb30af68..aeca71c5b64 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -5,6 +5,7 @@
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
+ *   Nick Kossifidis <mick@ics.forth.gr
  */
 
 #include <sbi/riscv_asm.h>
@@ -18,28 +19,48 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_unpriv.h>
 
+static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
+{
+	struct sbi_scratch *remote_scratch = NULL;
+	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (sbi_platform_hart_disabled(plat, hartid))
+		return -1;
+
+	/* Set IPI type on remote hart's scratch area and
+	 * trigger the interrupt
+	 */
+	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
+	atomic_raw_set_bit(event, &remote_scratch->ipi_type);
+	mb();
+	sbi_platform_ipi_send(plat, hartid);
+	if (event != SBI_IPI_EVENT_SOFT)
+		sbi_platform_ipi_sync(plat, hartid);
+
+	return 0;
+}
+
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
 		      ulong *pmask, u32 event)
 {
 	ulong i, m;
-	struct sbi_scratch *oth;
 	ulong mask = sbi_hart_available_mask();
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	u32 hartid = sbi_current_hartid();
 
 	if (pmask)
 		mask &= load_ulong(pmask, csr_read(CSR_MEPC));
 
-	/* send IPIs to everyone */
-	for (i = 0, m = mask; m; i++, m >>= 1) {
-		if ((m & 1) && !sbi_platform_hart_disabled(plat, i)) {
-			oth = sbi_hart_id_to_scratch(scratch, i);
-			atomic_raw_set_bit(event, &oth->ipi_type);
-			mb();
-			sbi_platform_ipi_send(plat, i);
-			if (event != SBI_IPI_EVENT_SOFT)
-				sbi_platform_ipi_sync(plat, i);
-		}
-	}
+	/* send IPIs to every other hart on the set */
+	for (i = 0, m = mask; m > 0; m >>= ++i)
+		if ((m & 1UL) && (i != hartid))
+			sbi_ipi_send(scratch, i, event);
+
+	/* If the current hart is on the set, send an IPI
+	 * to it as well
+	 */
+	if (mask & (1UL << hartid))
+		sbi_ipi_send(scratch, hartid, event);
+
 
 	return 0;
 }

From 148423d14132df71a0ed26b34c7f81a180cb1308 Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Sun, 17 Feb 2019 23:43:41 +0200
Subject: [PATCH 0174/1765] lib: Fix small typo on sbi_ipi.c

---
 lib/sbi_ipi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index aeca71c5b64..a72f75bb9d5 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -5,7 +5,7 @@
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
- *   Nick Kossifidis <mick@ics.forth.gr
+ *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
 #include <sbi/riscv_asm.h>

From 4e774f5470d567c33b620fff7b37622174f8949a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 18 Feb 2019 18:39:02 +0530
Subject: [PATCH 0175/1765] lib: Fix mask shift in sbi_ipi_send_many()

The mask shift in for-loop of sbi_ipi_send_many() is
broken with commit 918c1354b75c74b62f67c4e929551d643f035443
("lib: Improve delivery of SBI_IPI_EVENT_HALT")

This patch fix it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi_ipi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index a72f75bb9d5..5f189c8c23b 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -51,7 +51,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 		mask &= load_ulong(pmask, csr_read(CSR_MEPC));
 
 	/* send IPIs to every other hart on the set */
-	for (i = 0, m = mask; m > 0; m >>= ++i)
+	for (i = 0, m = mask; m; i++, m >>= 1)
 		if ((m & 1UL) && (i != hartid))
 			sbi_ipi_send(scratch, i, event);
 

From f4a17177ce05f74cc33a985868f704d086ac75d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 18 Feb 2019 09:40:51 +0530
Subject: [PATCH 0176/1765] Makefile: Fix error evaluating OPENSBI_CC_XLEN

We get following error evaluating OPENSBI_CC_XLEN on
Ubuntu-18.04:
/bin/sh: 1: Bad substitution

This patch fixes above error by using "awk" in string
assigned to OPENSBI_CC_XLEN and it also moves "Setup
compilation commands" before OPENSBI_CC_XLEN.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 50 +++++++++++++++++++++++++-------------------------
 1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/Makefile b/Makefile
index c1ac54c4ba7..81e427bf8a8 100644
--- a/Makefile
+++ b/Makefile
@@ -54,8 +54,25 @@ export firmware_dir=$(CURDIR)/firmware
 OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
 OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
 
+# Setup compilation commands
+ifdef CROSS_COMPILE
+CC		=	$(CROSS_COMPILE)gcc
+CPP		=	$(CROSS_COMPILE)cpp
+AR		=	$(CROSS_COMPILE)ar
+LD		=	$(CROSS_COMPILE)ld
+OBJCOPY		=	$(CROSS_COMPILE)objcopy
+else
+CC		?=	gcc
+CPP		?=	cpp
+AR		?=	ar
+LD		?=	ld
+OBJCOPY		?=	objcopy
+endif
+AS		=	$(CC)
+DTC		=	dtc
+
 # Guess the compillers xlen
-OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine`; echo $${TMP:5:2})
+OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine | sed 's/riscv\([0-9][0-9]\).*/\1/'`; echo $${TMP})
 
 # Setup list of objects.mk files
 ifdef PLATFORM
@@ -95,30 +112,6 @@ deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
-GENFLAGS	=	-I$(platform_dir)/include
-GENFLAGS	+=	-I$(platform_common_dir)/include
-GENFLAGS	+=	-I$(include_dir)
-GENFLAGS	+=	$(platform-common-genflags-y)
-GENFLAGS	+=	$(platform-genflags-y)
-GENFLAGS	+=	$(firmware-genflags-y)
-
-# Setup compilation commands
-ifdef CROSS_COMPILE
-CC		=	$(CROSS_COMPILE)gcc
-CPP		=	$(CROSS_COMPILE)cpp
-AR		=	$(CROSS_COMPILE)ar
-LD		=	$(CROSS_COMPILE)ld
-OBJCOPY		=	$(CROSS_COMPILE)objcopy
-else
-CC		?=	gcc
-CPP		?=	cpp
-AR		?=	ar
-LD		?=	ld
-OBJCOPY		?=	objcopy
-endif
-AS		=	$(CC)
-DTC		=	dtc
-
 # Setup platform XLEN, ABI, ISA and Code Model
 ifndef PLATFORM_RISCV_XLEN
   ifeq ($(OPENSBI_CC_XLEN), 32)
@@ -142,6 +135,13 @@ ifndef PLATFORM_RISCV_CODE_MODEL
 endif
 
 # Setup compilation commands flags
+GENFLAGS	=	-I$(platform_dir)/include
+GENFLAGS	+=	-I$(platform_common_dir)/include
+GENFLAGS	+=	-I$(include_dir)
+GENFLAGS	+=	$(platform-common-genflags-y)
+GENFLAGS	+=	$(platform-genflags-y)
+GENFLAGS	+=	$(firmware-genflags-y)
+
 CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align

From 6a3dc84f669a560dbb5a396ceda67612551697d6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 19 Feb 2019 13:15:35 +0530
Subject: [PATCH 0177/1765] Makefile: Use sed instead of awk to parse OpenSBI
 version

This patch replaces use of awk with sed in top-level makefile
to parse OpenSBI version from include/sbi/sbi_version.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 81e427bf8a8..3b17d5fccf3 100644
--- a/Makefile
+++ b/Makefile
@@ -51,8 +51,8 @@ export lib_dir=$(CURDIR)/lib
 export firmware_dir=$(CURDIR)/firmware
 
 # Find library version
-OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
-OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | awk '{ print $$3 }'`
+OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
+OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
 
 # Setup compilation commands
 ifdef CROSS_COMPILE

From 34bf6d4a0f1d47a4b35d8edb36ef63f4e352cff0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 15 Feb 2019 20:57:12 -0800
Subject: [PATCH 0178/1765] docs: Update about toolchain section.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 README.md | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/README.md b/README.md
index d7c2626faad..21e3b6b46c2 100644
--- a/README.md
+++ b/README.md
@@ -36,6 +36,16 @@ provides several runtime firmware examples built using the platform
 *riskv-pk* bootloader (aka BBL) and enable the use of well known bootloaders
 such as [U-Boot].
 
+Required Toolchain
+------------------
+
+OpenSBI can be compiled natively or cross-compiled on a x86 host. For
+cross-compilation, you can build your tool chain or just download from
+the [bootlin] (https://toolchains.bootlin.com/).
+
+Please note that only 64bit version of toolchain is available in bootlin
+for now.
+
 Building and Installing OpenSBI Platform Independent Library
 ------------------------------------------------------------
 

From 3265310b05a92813a641b6679549bed5c2adc8d5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 15 Feb 2019 21:47:37 -0800
Subject: [PATCH 0179/1765] docs: Wrap text to 80 columns.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 28b1844330e..bb4d69b6e04 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -104,9 +104,14 @@ bootm 0x80600000 - 0x82200000
 Booting SiFive Fu540 Platform with Microsemi Expansion board
 ------------------------------------------------------------
 
-Until the Linux kernel has in-tree support for device trees and mainline u-boot is fully supported on the HiFive Unleashed you can follow these steps to boot Linux with the Microsemi expansion board. This method should not be copied on future boards and is considered a temporary solution until we can use a more standardised boot flow.
-
-To boot the Linux kernel with a device tree that has support for the Microsemi Expansion board you can include the following line when compiling the firmware:
+Until the Linux kernel has in-tree support for device trees and mainline u-boot
+is fully supported on the HiFive Unleashed you can follow these steps to boot
+Linux with the Microsemi expansion board. This method should not be copied on
+future boards and is considered a temporary solution until we can use a more
+standardised boot flow.
+
+To boot the Linux kernel with a device tree that has support for the Microsemi
+Expansion board you can include the following line when compiling the firmware:
 ```
 FW_PAYLOAD_FDT="HiFiveUnleashed-MicroSemi-Expansion.dtb"
 ```

From 0db43770b3a29530851ca2f4e29a0c4c0f26acef Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 18 Feb 2019 23:17:16 -0800
Subject: [PATCH 0180/1765] docs: Add a payload section describing different
 payloads.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 README.md                      |  2 +-
 docs/firmware/fw.md            | 19 ++++++++++++++++-
 docs/firmware/payload_linux.md | 11 ++++++++++
 docs/firmware/payload_uboot.md | 38 ++++++++++++++++++++++++++++++++++
 4 files changed, 68 insertions(+), 2 deletions(-)
 create mode 100644 docs/firmware/payload_linux.md
 create mode 100644 docs/firmware/payload_uboot.md

diff --git a/README.md b/README.md
index 21e3b6b46c2..d24bdf51a46 100644
--- a/README.md
+++ b/README.md
@@ -135,7 +135,7 @@ A copy of this license with OpenSBI copyright can be found in the file
 [COPYING.BSD].
 
 All source files in OpenSBI contain the 2-Clause BSD license SPDX short
-indentifier in place of the full license text.
+identifier in place of the full license text.
 
 ```
 SPDX-License-Identifier:    BSD-2-Clause
diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 2b6c26a5084..acff4a69470 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -5,7 +5,7 @@ OpenSBI provides firmware builds for specific platforms. Different types of
 firmwares are supported to deal with the differences between different platforms
 early boot stage. All firmwares will execute the same initialization procedure
 of the platform hardware according to the platform specific code as well as
-OpenSBI generic library code. The supported firmwares types will differ in how
+OpenSBI generic library code. The supported firmwares type will differ in how
 the arguments passed by the platform early boot stage are handled, as well as
 how the boot stage following the firmware will be handled and executed.
 
@@ -58,3 +58,20 @@ following documents.
 
 [FW_JUMP]: fw_jump.md
 [FW_PAYLOAD]: fw_payload.md
+
+Providing different payloads to OpenSBI Firmware
+------------------------------------------------
+OpenSBI firmware can accept various payloads using a compile time option.
+Typically, these payloads refer to the next stage boot loader (e.g. U-Boot)
+or operating system kernel images (e.g. Linux). By default, OpenSBI
+automatically provides a test payload if no specific payload is specified
+at compile time.
+
+To specify a payload at compile time, the make variable _FW_PAYLOAD_PATH_ is
+used.
+```
+make PLATFORM=<platform_subdir> FW_PAYLOAD_PATH=<payload path>
+```
+The instructions to build each payload is different and the details can
+be found in the
+*docs/firmware/payload_<payload_name>.md* files.
diff --git a/docs/firmware/payload_linux.md b/docs/firmware/payload_linux.md
new file mode 100644
index 00000000000..ccbad31b0e8
--- /dev/null
+++ b/docs/firmware/payload_linux.md
@@ -0,0 +1,11 @@
+Linux as a direct payload to OpenSBI
+====================================
+
+OpenSBI has the capability to load Linux kernel image directly in supervisor
+mode. The flattened image generated by the Linux kernel build process can be
+provided as payload to OpenSBI.
+
+Detailed examples and platform guides can be found in both [QEMU](
+../platform/qemu_virt.md) and [HiFive Unleashed](../platform/sifive_fu540.md)
+platform guide respectively.
+
diff --git a/docs/firmware/payload_uboot.md b/docs/firmware/payload_uboot.md
new file mode 100644
index 00000000000..3fd7fa2fe93
--- /dev/null
+++ b/docs/firmware/payload_uboot.md
@@ -0,0 +1,38 @@
+U-Boot as a payload to OpenSBI
+==============================
+
+[U-Boot](https://www.denx.de/wiki/U-Boot) is an open-source primary boot loader.
+It can be used as first and/or second stage boot loader in an embedded
+environment. In the context of OpenSBI, U-boot can be specified as a payload to
+OpenSBI firmware, becoming the boot stage following OpenSBI firmware
+execution.
+
+The current stable upstream code of U-boot does not yet include all patches
+necessary to fully support OpenSBI. To use U-Boot as an OpenSBI payload, the
+following out-of-tree patch series must be applied to the upstream U-Boot source
+code.
+
+HiFive Unleashed support for U-Boot
+
+https://lists.denx.de/pipermail/u-boot/2019-February/358058.html
+
+This patch series enables a single CPU to execute U-Boot. As a result, the next
+stage boot code such as Linux kernel can also only execute a single CPU. U-Boot
+SMP support for RISC-V can be enabled with the following additional patches.
+
+https://lists.denx.de/pipermail/u-boot/2019-February/358393.html
+
+Building and Generating U-Boot images
+=====================================
+Please refer to U-Boot build documentation for detailed instructions on how to build U-Boot images.
+
+Once U-Boot images are built, Linux kernel image need to be converted to a format
+that U-Boot understands.
+
+```
+<uboot-dir>/tools/mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
+		<linux_build_directory>arch/riscv/boot/Image \
+		<linux_build_directory>/arch/riscv/boot/uImage
+```
+
+Copy the uImage to your tftpboot server path if network boot is required.

From d046974cf6c3d4bca880b72bc877c7b185f73a7d Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 18 Feb 2019 23:18:04 -0800
Subject: [PATCH 0181/1765] docs: Update unleashed platform guide.

Following updates to fu540 platform guide.

1. Update a section about flashing the firmware binary
to sdcard with correct partition identifier.
2. Refer the individual payload section.
3. Update uboot booting section.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 151 ++++++++++++++++++++++++++--------
 1 file changed, 116 insertions(+), 35 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index bb4d69b6e04..95a4326ade2 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -13,58 +13,46 @@ Platform Options
 As hart0 in the FU540 doesn't have an MMU, only harts 1-4 boot by default.
 A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided to
 select any other hart for booting. Please keep in mind that this is not
-platform wide option. It can only be specificd for FU540 platform in following way.
+platform wide option. It can only be specified for FU540 platform in following way.
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
 ```
 This will let the board boot only hart1 instead of default 1-4.
 
-Booting SiFive Fu540 Platform
+Building SiFive Fu540 Platform
 -----------------------------
 
-**Linux Kernel Payload**
+As of this writing, the required Linux kernel and U-Boot patches are not
+accepted in mainline. Please follow the below instructions to cherry-pick
+them into your repository.
 
-Build:
+[U-Boot patches](../firmware/payload_uboot.md)
 
-```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
-```
+[Linux kernel patches](../firmware/payload_linux.md)
+
+**Linux Kernel Payload**
 
-Flash:
-The generated firmware binary should be copied to the first partition of the sdcard.
 
 ```
-dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 **U-Boot Payload**
 
-Note: U-Boot doesn't have SMP support. So you can only boot single cpu with non-smp
-kernel configuration using U-Boot.
 
-Build:
+The command-line example here assumes that U-Boot was compiled using sifive_fu540_defconfig configuration.
+
+With SMP support enabled in U-Boot:
 
-The commandline example here assumes that U-Boot was compiled using sifive_fu540_defconfig configuration.
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FU540_ENABLED_HART_MASK=0x02
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
 ```
 
-Flash:
-The generated firmware binary should be copied to the first partition of the sdcard.
-
+Without SMP support enabled in U-Boot:
 ```
-dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FU540_ENABLED_HART_MASK=0x02
 ```
-U-Boot tftp boot method can be used to load kernel image in U-Boot prompt.
-
-Note: As the U-Boot & Linux kernel patches are not in upstream it, you can cherry-pick from here.
-
-U-Boot patchset:
-https://lists.denx.de/pipermail/u-boot/2019-January/355941.html
-
-Linux kernel patchset:
-https://lkml.org/lkml/2019/1/8/192
 
 **U-Boot & Linux Kernel as a single payload**
 
@@ -78,8 +66,9 @@ mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux
 		<linux_build_directory>/arch/riscv/boot/uImage
 ```
 
-2. Create a temporary image with u-boot.bin as the first payload. The commandline example here assumes
-that U-Boot was compiled using sifive_fu540_defconfig configuration.
+2. Create a temporary image with u-boot.bin as the first payload. The command-line
+example here assumes that U-Boot was compiled using sifive_fu540_defconfig
+configuration.
 ```
 dd if=~/workspace/u-boot-riscv/u-boot.bin of=/tmp/temp.bin bs=1M
 ```
@@ -87,20 +76,112 @@ dd if=~/workspace/u-boot-riscv/u-boot.bin of=/tmp/temp.bin bs=1M
 ```
 dd if=<linux_build_directory>/arch/riscv/boot/uImage of=/tmp/temp.bin bs=1M seek=4
 ```
-4. Compile OpenSBI with temp.bin (generated in step 3) as payload and single hart enabled.
+4. Compile OpenSBI with temp.bin (generated in step 3) as payload.
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin FU540_ENABLED_HART_MASK=0x02
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
 ```
-5. The generated firmware binary should be copied to the first partition of the sdcard.
+
+Flashing the OpenSBI firmware binary to storage media:
+-----------------------------------------------------
+The first stage boot loader([FSBL](https://github.com/sifive/freedom-u540-c000-bootloader))
+expects the storage media to have a GPT partition table. It tries to look for a
+partition with following GUID to load the next stage boot loader (OpenSBI in this case).
+
+```
+2E54B353-1271-4842-806F-E436D6AF6985
+``` 
+
+That's why the generated firmware binary in above steps should be copied to the
+partition of the sdcard with above GUID.
 
 ```
 dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
 ```
-6. At U-Boot prompt execute following boot command to boot non-SMP linux.
+
+In my case, it is the first partition is **disk2s1** that has been formatted with the
+above specified GUID.
+
+In case of a brand new sdcard, it should be formatted with below partition
+tables as described here.
+
+```
+sgdisk --clear                                                               \
+       --new=1:2048:67583  --change-name=1:bootloader --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985   \
+       --new=2:264192:     --change-name=2:root       --typecode=2:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
+       $(DISK)
+```
+
+Booting SiFive Fu540 Platform
+-----------------------------
+
+**Linux Kernel Payload**
+
+As Linux kernel image is embedded in the OpenSBI firmware binary, HiFive Unleashed will directly
+boot into Linux directly after powered on.
+
+**U-Boot Payload**
+
+As U-Boot image is used as payload, HiFive Unleashed will boot into a U-Boot prompt.
+U-Boot tftp boot method can be used to load kernel image in U-Boot prompt.
+Here are the steps do a tftpboot.
+
+1. Set the mac address of the board.
+
+```
+setenv ethaddr <mac address of the board>
+```
+2. Set the ip address of the board.
+
+```
+setenv ipaddr <ipaddr of the board>
+```
+3. Set the tftpboot server IP.
+
 ```
-bootm 0x80600000 - 0x82200000
+setenv serverip <ipaddr of the tftp server>
 ```
+4. Set the network gateway address.
 
+```
+setenv gatewayip <ipaddress of the network gateway>
+```
+5. Load the Linux kernel image from the tftp server.
+
+```
+tftpboot ${kernel_addr_r} /sifive/fu540/uImage
+```
+
+6. Load the ramdisk image from the tftp server. This is only required if ramdisk
+   is loaded from tftp server. This step is optional, if rootfs is already part
+   of the kernel or loaded from an external storage by kernel.
+
+```
+tftpboot ${ramdisk_addr_r} /sifive/fu540/uRamdisk
+```
+7. Set the boot command-line arguments.
+
+```
+setenv bootargs "root=/dev/ram rw console=ttySIF0 earlycon=sbi"
+```
+
+8. Now boot into Linux.
+
+```
+bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdtcontroladdr}
+
+```
+or (if ramdisk is not loaded from network)
+```
+bootm ${kernel_addr_r} - ${fdtcontroladdr}
+```
+
+**U-Boot & Linux Kernel as a single payload**
+
+At U-Boot prompt execute the following boot command to boot Linux.
+
+```
+bootm ${kernel_addr_r} - ${fdtcontroladdr}
+```
 Booting SiFive Fu540 Platform with Microsemi Expansion board
 ------------------------------------------------------------
 

From 4b92518959e371a8c82276a7244aebe9ca4c90de Mon Sep 17 00:00:00 2001
From: Sergi Granell <xerpi.g.12@gmail.com>
Date: Mon, 18 Feb 2019 15:40:25 +0100
Subject: [PATCH 0182/1765] template: Fix typo in platform_final_init

There was a space instead of '_' in the function `platform_final_init`.
---
 platform/template/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index cc4065e41da..cf6a052b9e0 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -27,7 +27,7 @@ static int platform_early_init(bool cold_boot)
 /*
  * Platform final initialization.
  */
-static int platform final_init(bool cold_boot);
+static int platform_final_init(bool cold_boot);
 {
 	return 0;
 }

From 72a8272066f040b95e7eb470c8a1ce55f4cd99c7 Mon Sep 17 00:00:00 2001
From: Sergi Granell <xerpi.g.12@gmail.com>
Date: Mon, 18 Feb 2019 15:46:29 +0100
Subject: [PATCH 0183/1765] template: Remove trailing ';'

---
 platform/template/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index cf6a052b9e0..15b4da37148 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -27,7 +27,7 @@ static int platform_early_init(bool cold_boot)
 /*
  * Platform final initialization.
  */
-static int platform_final_init(bool cold_boot);
+static int platform_final_init(bool cold_boot)
 {
 	return 0;
 }

From db5b25af49d4a2e4940ca9dee1a289b836f36650 Mon Sep 17 00:00:00 2001
From: Sergi Granell <xerpi.g.12@gmail.com>
Date: Tue, 19 Feb 2019 07:35:06 +0100
Subject: [PATCH 0184/1765] template: Fix some callback names

---
 platform/template/platform.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index 15b4da37148..e7a70aa95ab 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -215,7 +215,7 @@ struct sbi_platform platform = {
 	.hart_stack_size = 4096,
 	.disabled_hart_mask = 0,
 
-	.early_init = platform_final_init,
+	.early_init = platform_early_init,
 	.final_init = platform_final_init,
 
 	.pmp_region_count = platform_pmp_region_count,
@@ -236,7 +236,7 @@ struct sbi_platform platform = {
 	.timer_event_start = platform_timer_event_start,
 	.timer_event_stop = platform_timer_event_stop,
 
-	.system_reboot = platform_system_down,
-	.system_shutdown = platform_system_down
+	.system_reboot = platform_system_reboot,
+	.system_shutdown = platform_system_shutdown
 };
 

From ce6189f7a5adbf6ac88b95f78a6d5e9b5481faf9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 19 Feb 2019 18:06:46 +0530
Subject: [PATCH 0185/1765] include: Add PRILX define to help print unsigned
 long

The unsigned long is always machine word size. This means it is
4 bytes on 32bit system and 8 bytes on 64bit system.

This patch adds PRILX define for sbi_printf() which will help us
print unsigned long without worrying whether it is 32bit or 64bit
system.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h |  2 ++
 lib/sbi_trap.c          | 36 ++++++++++++++++++------------------
 2 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 9231dff960d..40909f65cc3 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -29,11 +29,13 @@ typedef long			s64;
 typedef unsigned long		u64;
 typedef long			int64_t;
 typedef unsigned long		uint64_t;
+#define PRILX			"016lx"
 #elif __riscv_xlen == 32
 typedef long long		s64;
 typedef unsigned long long	u64;
 typedef long long		int64_t;
 typedef unsigned long long	uint64_t;
+#define PRILX			"08lx"
 #else
 #error "Unexpected __riscv_xlen"
 #endif
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index ba597d8ebfa..ea5ba6b5555 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -26,41 +26,41 @@ static void __noreturn sbi_trap_error(const char *msg,
 {
 	sbi_printf("%s: hart%d: %s (error %d)\n",
 		   __func__, hartid, msg, rc);
-	sbi_printf("%s: hart%d: mcause=0x%lx mtval=0x%lx\n",
+	sbi_printf("%s: hart%d: mcause=0x%"PRILX" mtval=0x%"PRILX"\n",
 		   __func__, hartid, mcause, mtval);
-	sbi_printf("%s: hart%d: mepc=0x%lx mstatus=0x%lx\n",
+	sbi_printf("%s: hart%d: mepc=0x%"PRILX" mstatus=0x%"PRILX"\n",
 		   __func__, hartid, regs->mepc, regs->mstatus);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "ra", regs->ra, "sp", regs->sp);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "gp", regs->gp, "tp", regs->tp);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s0", regs->s0, "s1", regs->s1);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "a0", regs->a0, "a1", regs->a1);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "a2", regs->a2, "a3", regs->a3);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "a4", regs->a4, "a5", regs->a5);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "a6", regs->a6, "a7", regs->a7);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s2", regs->s2, "s3", regs->s3);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s4", regs->s4, "s5", regs->s5);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s6", regs->s6, "s7", regs->s7);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s8", regs->s8, "s9", regs->s9);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "s10", regs->s10, "s11", regs->s11);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "t0", regs->t0, "t1", regs->t1);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "t2", regs->t2, "t3", regs->t3);
-	sbi_printf("%s: hart%d: %s=0x%lx %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
 		   __func__, hartid, "t4", regs->t4, "t5", regs->t5);
-	sbi_printf("%s: hart%d: %s=0x%lx\n",
+	sbi_printf("%s: hart%d: %s=0x%"PRILX"\n",
 		   __func__, hartid, "t6", regs->t6);
 
 	sbi_hart_hang();

From 122d00ba67c9caeffc65ddd96dd22c0d204f4c72 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 19 Feb 2019 18:11:22 +0530
Subject: [PATCH 0186/1765] firmware: Improve low-level trap handler for M-mode
 to M-mode traps

This patch extends our low-level trap handler in fw_base.S for
handling M-mode to M-mode traps without overwritting stack.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S        | 92 ++++++++++++++++++++++-----------------
 include/sbi/sbi_scratch.h |  4 ++
 2 files changed, 57 insertions(+), 39 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 6595489d338..f6b30f05f7c 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -181,6 +181,7 @@ _start_warm:
 	la	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
 	REG_S	zero, SBI_SCRATCH_IPI_TYPE_OFFSET(tp)
+	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 
 	/* Setup stack */
 	add	sp, tp, zero
@@ -242,42 +243,64 @@ _start_hang:
 	.section .entry, "ax", %progbits
 	.globl _trap_handler
 _trap_handler:
-	/* Swap SP and MSCRATCH */
-	csrrw	sp, CSR_MSCRATCH, sp
+	/* Swap TP and MSCRATCH */
+	csrrw	tp, CSR_MSCRATCH, tp
+
+	/* Save T0 in scratch space */
+	REG_S	t0, SBI_SCRATCH_TMP0_OFFSET(tp)
+
+	/* Check which mode we came from */
+	csrr	t0, CSR_MSTATUS
+	srl	t0, t0, MSTATUS_MPP_SHIFT
+	and	t0, t0, PRV_M
+	xori	t0, t0, PRV_M
+	beq	t0, zero, _trap_handler_m_mode
+
+	/* We came from S-mode or U-mode */
+_trap_handler_s_mode:
+	/* Set T0 to original SP */
+	add	t0, sp, zero
 
 	/* Setup exception stack */
-	add	sp, sp, -(SBI_TRAP_REGS_SIZE)
+	add	sp, tp, -(SBI_TRAP_REGS_SIZE)
 
-	/* Save RA, T0, T1, and T2 */
-	REG_S	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
-	REG_S	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
-	REG_S	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
-	REG_S	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
+	/* Jump to code common for all modes */
+	j	_trap_handler_all_mode
+
+	/* We came from M-mode */
+_trap_handler_m_mode:
+	/* Set T0 to original SP */
+	add	t0, sp, zero
 
-	/* Save original SP and restore MSCRATCH */
-	add	t0, sp, SBI_TRAP_REGS_SIZE
-	csrrw	t0, CSR_MSCRATCH, t0
+	/* Re-use current SP as exception stack */
+	add	sp, sp, -(SBI_TRAP_REGS_SIZE)
+
+_trap_handler_all_mode:
+	/* Save original SP (from T0) on stack */
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(sp)(sp)
 
-	/* Save MEPC and MSTATUS CSRs */
-	csrr	t0, CSR_MEPC
-	csrr	t1, CSR_MSTATUS
+	/* Restore T0 from scratch space */
+	REG_L	t0, SBI_SCRATCH_TMP0_OFFSET(tp)
 
-	/*
-	 * Note: Fast path trap handling can be done here
-	 * using SP, RA, T0, T1, and T2 registers where
-	 * T0 <- MEPC
-	 * T1 <- MSTATUS
-	 */
+	/* Save T0 on stack */
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+
+	/* Swap TP and MSCRATCH */
+	csrrw	tp, CSR_MSCRATCH, tp
 
 	/* Save MEPC and MSTATUS CSRs */
+	csrr	t0, CSR_MEPC
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
-	REG_S	t1, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+	csrr	t0, CSR_MSTATUS
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
 
-	/* Save all general regisers except SP, RA, T0, T1, and T2 */
+	/* Save all general regisers except SP and T0 */
 	REG_S	zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
+	REG_S	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
 	REG_S	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
 	REG_S	tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+	REG_S	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+	REG_S	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
 	REG_S	s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
 	REG_S	s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
 	REG_S	a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
@@ -308,9 +331,12 @@ _trap_handler:
 	csrr	a1, CSR_MSCRATCH
 	call	sbi_trap_handler
 
-	/* Restore all general regisers except SP, RA, T0, T1, T2, and T3 */
+	/* Restore all general regisers except SP and T0 */
+	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
 	REG_L	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
 	REG_L	tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+	REG_L	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+	REG_L	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
 	REG_L	s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
 	REG_L	s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
 	REG_L	a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
@@ -336,26 +362,14 @@ _trap_handler:
 	REG_L	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
 	REG_L	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
 
-	/* Load T0 and T1 with MEPC and MSTATUS */
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
-	REG_L	t1, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
-
-	/*
-	 * Note: Jump here after fast trap handling
-	 * using SP, RA, T0, T1, and T2
-	 * T0 <- MEPC
-	 * T1 <- MSTATUS
-	 */
-
 	/* Restore MEPC and MSTATUS CSRs */
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
 	csrw	CSR_MEPC, t0
-	csrw	CSR_MSTATUS, t1
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+	csrw	CSR_MSTATUS, t0
 
-	/* Restore RA, T0, T1, and T2 */
-	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
+	/* Restore T0 */
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
-	REG_L	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
-	REG_L	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
 
 	/* Restore SP */
 	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index ff6aed020f0..8389ef38f75 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -30,6 +30,8 @@
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
 /** Offset of ipi_type member in sbi_scratch */
 #define SBI_SCRATCH_IPI_TYPE_OFFSET		(8 * __SIZEOF_POINTER__)
+/** Offset of tmp0 member in sbi_scratch */
+#define SBI_SCRATCH_TMP0_OFFSET			(9 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch */
 #define SBI_SCRATCH_SIZE			256
 
@@ -57,6 +59,8 @@ struct sbi_scratch {
 	unsigned long hartid_to_scratch;
 	/** IPI type (or flags) */
 	unsigned long ipi_type;
+	/** Temporary storage */
+	unsigned long tmp0;
 } __packed;
 
 /** Get pointer to sbi_scratch for current HART */

From fde1c42db35a991f62a1a8a6b26508dab486e61a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 21 Feb 2019 18:04:07 -0800
Subject: [PATCH 0187/1765] doc: Fix root partition details for fu540.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 95a4326ade2..286abdda2dc 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -161,9 +161,13 @@ tftpboot ${ramdisk_addr_r} /sifive/fu540/uRamdisk
 7. Set the boot command-line arguments.
 
 ```
-setenv bootargs "root=/dev/ram rw console=ttySIF0 earlycon=sbi"
+setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ```
 
+N.B. root partition should point to
+     ** /dev/ram ** - If a ramdisk is used
+     ** root=/dev/mmcblk0pX ** - If a rootfs is already on some other partition of sdcard 
+
 8. Now boot into Linux.
 
 ```

From 889e746fd7be97ca0dbaaf7a6a734429b7ca607f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 20 Feb 2019 14:16:48 +0530
Subject: [PATCH 0188/1765] Makefile: Rename compile_ld() to compile_elf()

The compile_ld() is actually used to create ELF files so
the name is misleading hence this patch renames it to
compile_elf(). We also rename LDFLAGS to ELFFLAGS because
these will be used for ELF creation only.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 3b17d5fccf3..ae68f55bc2f 100644
--- a/Makefile
+++ b/Makefile
@@ -166,9 +166,9 @@ ASFLAGS		+=	$(firmware-asflags-y)
 
 ARFLAGS		=	rcs
 
-LDFLAGS		+=	-g -Wall -nostdlib -Wl,--build-id=none -N -static-libgcc -lgcc
-LDFLAGS		+=	$(platform-ldflags-y)
-LDFLAGS		+=	$(firmware-ldflags-y)
+ELFFLAGS	+=	-Wl,--build-id=none -N -static-libgcc -lgcc
+ELFFLAGS	+=	$(platform-ldflags-y)
+ELFFLAGS	+=	$(firmware-ldflags-y)
 
 MERGEFLAGS	+=	-r
 MERGEFLAGS	+=	-b elf$(PLATFORM_RISCV_XLEN)-littleriscv
@@ -225,9 +225,9 @@ compile_as_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS        $(subst $(build_dir)/,,$(1))"; \
 	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
-compile_ld = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
-	     echo " LD        $(subst $(build_dir)/,,$(1))"; \
-	     $(CC) $(CFLAGS) $(3) $(LDFLAGS) -Wl,-T$(2) -o $(1)
+compile_elf = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " ELF       $(subst $(build_dir)/,,$(1))"; \
+	     $(CC) $(CFLAGS) $(3) $(ELFFLAGS) -Wl,-T$(2) -o $(1)
 compile_ar = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AR        $(subst $(build_dir)/,,$(1))"; \
 	     $(AR) $(ARFLAGS) $(1) $(2)
@@ -256,7 +256,7 @@ $(build_dir)/%.bin: $(build_dir)/%.elf
 	$(call compile_objcopy,$@,$<)
 
 $(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
-	$(call compile_ld,$@,$@.ld,$< $(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
+	$(call compile_elf,$@,$@.ld,$< $(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
 
 $(build_dir)/$(platform_subdir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)

From d022c5d3ae7890a0c11341c80dcef3e3ae674247 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 20 Feb 2019 14:18:12 +0530
Subject: [PATCH 0189/1765] scripts: Add script for creating binary archive

This patch adds scripts/create-binary-archive.sh which helps
us create a common tarball containing headers, static library
and firmware ELFs for all platforms.

This script can be used for release purpose OR for compile
testing all platforms.

Example usage commands are as follows:

1) Binary release archive for 32bit systems
./scripts/create-binary-archive.sh -s "bin" -x 32 -d

2) Binary release archive for 64bit systems
./scripts/create-binary-archive.sh -s "bin" -d

3) Compile test for 32bit systems
./scripts/create-binary-archive.sh -x 32 -t

4) Compile test for 64bit systems
./scripts/create-binary-archive.sh -t

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 135 +++++++++++++++++++++++++++++++
 1 file changed, 135 insertions(+)
 create mode 100755 scripts/create-binary-archive.sh

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
new file mode 100755
index 00000000000..be8cfe1cb46
--- /dev/null
+++ b/scripts/create-binary-archive.sh
@@ -0,0 +1,135 @@
+#!/bin/bash
+
+function usage()
+{
+	echo "Usage:"
+	echo " $0 [options]"
+	echo "Options:"
+	echo "     -h                       Display help or usage"
+	echo "     -p <opensbi_source_path> OpenSBI source path"
+	echo "     -o <build_output_path>   Build output path"
+	echo "     -d                       Build and install documentation"
+	echo "     -t                       Build only with no archive created"
+	echo "     -j <num_threads>         Number of threads for Make (Default: 1)"
+	echo "     -s <archive_suffix>      Archive name suffix (Default: unknown)"
+	echo "     -x <riscv_xlen>          RISC-V XLEN (Default: 64)"
+	exit 1;
+}
+
+# Command line options
+BUILD_NUM_THREADS=1
+BUILD_OUTPUT_PATH="$(pwd)/build"
+BUILD_OPENSBI_SOURCE_PATH="$(pwd)"
+BUILD_DOCS="no"
+BUILD_ONLY="no"
+BUILD_ARCHIVE_SUFFIX="unknown"
+BUILD_RISCV_XLEN=64
+
+while getopts "hdtj:o:p:s:x:" o; do
+	case "${o}" in
+	h)
+		usage
+		;;
+	d)
+		BUILD_DOCS="yes"
+		;;
+	t)
+		BUILD_ONLY="yes"
+		;;
+	j)
+		BUILD_NUM_THREADS=${OPTARG}
+		;;
+	o)
+		BUILD_OUTPUT_PATH=${OPTARG}
+		;;
+	p)
+		BUILD_OPENSBI_SOURCE_PATH=${OPTARG}
+		;;
+	s)
+		BUILD_ARCHIVE_SUFFIX=${OPTARG}
+		;;
+	x)
+		BUILD_RISCV_XLEN=${OPTARG}
+		;;
+	*)
+		usage
+		;;
+	esac
+done
+shift $((OPTIND-1))
+
+if [ -z "${BUILD_OPENSBI_SOURCE_PATH}" ]; then
+	echo "Must specify OpenSBI source path"
+	usage
+fi
+
+if [ ! -d "${BUILD_OPENSBI_SOURCE_PATH}" ]; then
+	echo "OpenSBI source path does not exist"
+	usage
+fi
+
+if [ -z "${BUILD_ARCHIVE_SUFFIX}" ]; then
+	echo "Archive suffice cannot be empty"
+	usage
+fi
+
+# Get version of OpenSBI
+BUILD_VERSION_MAJOR=$(grep MAJOR "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/')
+BUILD_VERSION_MINOR=$(grep MINOR "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/')
+
+# Setup archive name
+BUILD_ARCHIVE_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BUILD_RISCV_XLEN}-${BUILD_ARCHIVE_SUFFIX}"
+
+# Setup platform list
+case "${BUILD_RISCV_XLEN}" in
+32)
+	# Setup 32bit platform list
+	BUILD_PLATFORM_SUBDIR=("qemu/virt")
+	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
+	;;
+64)
+	# Setup 64bit platform list
+	BUILD_PLATFORM_SUBDIR=("qemu/virt")
+	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
+	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
+	;;
+*)
+	echo "Invalid RISC-V XLEN"
+	usage
+	;;
+esac
+
+# Ensure output directory is present
+mkdir -p "${BUILD_OUTPUT_PATH}"
+
+# Build and install generic library
+echo "Build and install generic library XLEN=${BUILD_RISCV_XLEN}"
+echo ""
+make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi -j "${BUILD_NUM_THREADS}"
+echo ""
+
+# Build and install relevant platforms
+for INDEX in $(seq 0 1 "$(expr ${#BUILD_PLATFORM_SUBDIR[*]} - 1)")
+do
+	echo "Build and install PLATFORM=${BUILD_PLATFORM_SUBDIR[${INDEX}]} XLEN=${BUILD_RISCV_XLEN}"
+	echo ""
+	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM="${BUILD_PLATFORM_SUBDIR[${INDEX}]}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libplatsbi install_firmwares -j "${BUILD_NUM_THREADS}"
+	echo ""
+done
+
+# Build and install docs
+if [ "${BUILD_DOCS}" == "yes" ]; then
+	echo "Build and install docs"
+	echo ""
+	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" install_docs
+	echo ""
+fi
+
+# Create archive file
+if [ "${BUILD_ONLY}" == "no" ]; then
+	echo "Create archive ${BUILD_ARCHIVE_NAME}.tar.xz"
+	echo ""
+	tar  -C "${BUILD_OUTPUT_PATH}" -cJvf "${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}.tar.xz" "${BUILD_ARCHIVE_NAME}"
+	echo ""
+fi

From a1ffba1ac9b0cde0e9005fa79b36e45216646b9d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 22 Feb 2019 11:33:22 +0530
Subject: [PATCH 0190/1765] include: Bump-up version to 0.2

This patch increases OpenSBI version to 0.2.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 74b65e02e7c..cab0e79eb48 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,6 +11,6 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR		0
-#define OPENSBI_VERSION_MINOR		1
+#define OPENSBI_VERSION_MINOR		2
 
 #endif

From 42e9ad556ddae97dde3a55d649213a606efb01c0 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 22 Feb 2019 15:02:55 -0800
Subject: [PATCH 0191/1765] Makefile: Set the platform variables before parsing
 the platforms

Ensure the platform variable PLATFORM_RISCV_XLEN is set before we parse
the platform files.

This fixes the 32-bit openSBI FW_JUMP_ADDR.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index ae68f55bc2f..6463f54b933 100644
--- a/Makefile
+++ b/Makefile
@@ -74,6 +74,15 @@ DTC		=	dtc
 # Guess the compillers xlen
 OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine | sed 's/riscv\([0-9][0-9]\).*/\1/'`; echo $${TMP})
 
+# Setup platform XLEN
+ifndef PLATFORM_RISCV_XLEN
+  ifeq ($(OPENSBI_CC_XLEN), 32)
+    PLATFORM_RISCV_XLEN = 32
+  else
+    PLATFORM_RISCV_XLEN = 64
+  endif
+endif
+
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_dir) ]; then find $(platform_dir) -iname "objects.mk" | sort -r; fi)
@@ -112,14 +121,7 @@ deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(lib-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
-# Setup platform XLEN, ABI, ISA and Code Model
-ifndef PLATFORM_RISCV_XLEN
-  ifeq ($(OPENSBI_CC_XLEN), 32)
-    PLATFORM_RISCV_XLEN = 32
-  else
-    PLATFORM_RISCV_XLEN = 64
-  endif
-endif
+# Setup platform ABI, ISA and Code Model
 ifndef PLATFORM_RISCV_ABI
   ifeq ($(PLATFORM_RISCV_XLEN), 32)
     PLATFORM_RISCV_ABI = ilp$(PLATFORM_RISCV_XLEN)

From ca20ac0cd4c099006d4eea4d9ac7bd7b58e2ae0f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 26 Feb 2019 22:24:59 +0530
Subject: [PATCH 0192/1765] include: Bump-up version to 0.3

This patch updates OpenSBI version to 0.3 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index cab0e79eb48..279c0400677 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,6 +11,6 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR		0
-#define OPENSBI_VERSION_MINOR		2
+#define OPENSBI_VERSION_MINOR		3
 
 #endif

From 178a0307a2466471c0ffc84af67dd2eb39078f60 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Wed, 27 Feb 2019 12:53:07 +0100
Subject: [PATCH 0193/1765] Fix makefile dependency generation

---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 6463f54b933..f45ca3b4dc5 100644
--- a/Makefile
+++ b/Makefile
@@ -213,7 +213,7 @@ compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(CPP) $(CPPFLAGS) -x c $(2) | grep -v "\#" > $(1)
 compile_cc_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CC-DEP    $(subst $(build_dir)/,,$(1))"; \
-	     echo `dirname $(1)`/ \\  > $(1) && \
+	     printf %s `dirname $(1)`/  > $(1) && \
 	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2))   \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
@@ -221,7 +221,7 @@ compile_cc = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(CC) $(CFLAGS) $(call dynamic_flags,$(1),$(2)) -c $(2) -o $(1)
 compile_as_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " AS-DEP    $(subst $(build_dir)/,,$(1))"; \
-	     echo `dirname $(1)`/ \\ > $(1) && \
+	     printf %s `dirname $(1)`/ > $(1) && \
 	     $(AS) $(ASFLAGS) $(call dynamic_flags,$(1),$(2)) \
 	       -MM $(2) >> $(1) || rm -f $(1)
 compile_as = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \

From 87fbcf93765b939221596ef4075ad48796f17925 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Wed, 27 Feb 2019 12:57:56 +0100
Subject: [PATCH 0194/1765] Fix missing quotes in Makefile

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index f45ca3b4dc5..b05c763887e 100644
--- a/Makefile
+++ b/Makefile
@@ -325,7 +325,7 @@ ifneq ($(platform-runcmd),)
 	$(platform-runcmd) $(RUN_ARGS)
 else
 ifdef PLATFORM
-	@echo Platform $(PLATFORM) doesn't specify a run command
+	@echo "Platform $(PLATFORM) doesn't specify a run command"
 	@false
 else
 	@echo Run command only available when targeting a platform

From a72467f5747fd6c9468581a787cdd51692bf01ef Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Mon, 4 Mar 2019 11:20:58 +0800
Subject: [PATCH 0195/1765] Add tags to .gitignore for being development
 friendly

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 .gitignore | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.gitignore b/.gitignore
index 1375f129df3..534ad6477c7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,3 +6,6 @@
 #Build & install directories
 build/
 install/
+
+# Development friendly files
+tags

From 1c87f0f9b1952ba9770345fc8781ce3bd2d4de7c Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Mon, 4 Mar 2019 17:17:08 +0800
Subject: [PATCH 0196/1765] firmware: Move _boot_hart_done to the data section

Writable code section can cause some security problems, so move _boot_hart_done
to the data section

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 firmware/fw_base.S | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index f6b30f05f7c..b28cfb53cb3 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -111,12 +111,6 @@ _fdt_reloc_done:
 	la	a4, _boot_hart_done
 	li	a5, 1
 	REG_S	a5, (a4)
-	j	_wait_for_boot_hart
-
-	.align	3
-_boot_hart_done:
-	RISCV_PTR	0
-	.align	3
 
 	/* Wait for boot hart */
 _wait_for_boot_hart:
@@ -197,6 +191,11 @@ _start_warm:
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang
 
+	.align 3
+	.section .data, "aw"
+_boot_hart_done:
+	RISCV_PTR	0
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.globl _hartid_to_scratch

From 05602e2bf4812533adcb7acb1a67e43726c0e7bb Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Mon, 4 Mar 2019 17:22:37 +0800
Subject: [PATCH 0197/1765] firmware: Add a barrier instruction for wait for
 boot hart

Multi-core communication via memory requires the addition of a barrier
instructions to ensure cache coherency.

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 firmware/fw_base.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b28cfb53cb3..ae14cc7be0a 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -114,6 +114,7 @@ _fdt_reloc_done:
 
 	/* Wait for boot hart */
 _wait_for_boot_hart:
+	fence	rw, rw
 	la	a4, _boot_hart_done
 	REG_L	a5, (a4)
 	beqz	a5, _wait_for_boot_hart

From 86cc9b8633bea3bc6fbda145424f871ea553af9e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 27 Feb 2019 17:42:17 -0800
Subject: [PATCH 0198/1765] lib:platform: Fix sbi_getc return type.

As per the current SBI specification, sbi_getc should return
an int instead of char.

In case of FIFO is empty, return -1 as per the specification.

Reported-by: Sergi Granell <xerpi.g.12@gmail.com>
Suggested-by:Thadeu Lima de Souza Cascardo <cascardo@cascardo.eti.br>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_console.h                         | 2 +-
 include/sbi/sbi_platform.h                        | 6 +++---
 lib/sbi_console.c                                 | 9 +++++----
 platform/common/include/plat/serial/sifive-uart.h | 2 +-
 platform/common/include/plat/serial/uart8250.h    | 2 +-
 platform/common/serial/sifive-uart.c              | 4 ++--
 platform/common/serial/uart8250.c                 | 4 ++--
 platform/kendryte/k210/platform.c                 | 2 +-
 platform/kendryte/k210/uarths.c                   | 4 ++--
 platform/kendryte/k210/uarths.h                   | 2 +-
 platform/template/platform.c                      | 2 +-
 11 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 8069669714a..0fd58e7f6bb 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -16,7 +16,7 @@
 
 bool sbi_isprintable(char ch);
 
-char sbi_getc(void);
+int sbi_getc(void);
 
 void sbi_putc(char ch);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 8f4f44be543..fe04c2fc42f 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -77,7 +77,7 @@ struct sbi_platform {
 	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
 	/** Read a character from the platform console input */
-	char (*console_getc)(void);
+	int (*console_getc)(void);
 	/** Initialize the platform console */
 	int (*console_init)(void);
 
@@ -283,11 +283,11 @@ static inline void sbi_platform_console_putc(struct sbi_platform *plat,
  *
  * @return character read from console input
  */
-static inline char sbi_platform_console_getc(struct sbi_platform *plat)
+static inline int sbi_platform_console_getc(struct sbi_platform *plat)
 {
 	if (plat && plat->console_getc)
 		return plat->console_getc();
-	return 0;
+	return -1;
 }
 
 /**
diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index bc8f952638a..527748f60c7 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -26,7 +26,7 @@ bool sbi_isprintable(char c)
 	return FALSE;
 }
 
-char sbi_getc(void)
+int sbi_getc(void)
 {
 	return sbi_platform_console_getc(console_plat);
 }
@@ -50,10 +50,11 @@ void sbi_puts(const char *str)
 
 void sbi_gets(char *s, int maxwidth, char endchar)
 {
-	char ch, *retval = s;
+	int ch;
+	char *retval = s;
 
-	while ((ch = sbi_getc()) != endchar && maxwidth > 1) {
-		*retval = ch;
+	while ((ch = sbi_getc()) != endchar && ch >= 0 && maxwidth > 1) {
+		*retval = (char) ch;
 		retval++;
 		maxwidth--;
 	}
diff --git a/platform/common/include/plat/serial/sifive-uart.h b/platform/common/include/plat/serial/sifive-uart.h
index 2c4e7f3d1c4..6a64595170d 100644
--- a/platform/common/include/plat/serial/sifive-uart.h
+++ b/platform/common/include/plat/serial/sifive-uart.h
@@ -14,7 +14,7 @@
 
 void sifive_uart_putc(char ch);
 
-char sifive_uart_getc(void);
+int sifive_uart_getc(void);
 
 int sifive_uart_init(unsigned long base,
 		     u32 in_freq, u32 baudrate);
diff --git a/platform/common/include/plat/serial/uart8250.h b/platform/common/include/plat/serial/uart8250.h
index c1ffc0d78d5..3d58050a1d4 100644
--- a/platform/common/include/plat/serial/uart8250.h
+++ b/platform/common/include/plat/serial/uart8250.h
@@ -14,7 +14,7 @@
 
 void uart8250_putc(char ch);
 
-char uart8250_getc(void);
+int uart8250_getc(void);
 
 int uart8250_init(unsigned long base,
 		  u32 in_freq, u32 baudrate,
diff --git a/platform/common/serial/sifive-uart.c b/platform/common/serial/sifive-uart.c
index 2c0e1f1ed59..08cc485c51b 100644
--- a/platform/common/serial/sifive-uart.c
+++ b/platform/common/serial/sifive-uart.c
@@ -69,12 +69,12 @@ void sifive_uart_putc(char ch)
 	set_reg(UART_REG_TXFIFO, ch);
 }
 
-char sifive_uart_getc(void)
+int sifive_uart_getc(void)
 {
 	u32 ret = get_reg(UART_REG_RXFIFO);
 	if (!(ret & UART_RXFIFO_EMPTY))
 		return ret & UART_RXFIFO_DATA;
-	return 0;
+	return -1;
 }
 
 int sifive_uart_init(unsigned long base,
diff --git a/platform/common/serial/uart8250.c b/platform/common/serial/uart8250.c
index 02eabbe0852..ce0f4ca40b7 100644
--- a/platform/common/serial/uart8250.c
+++ b/platform/common/serial/uart8250.c
@@ -71,11 +71,11 @@ void uart8250_putc(char ch)
 	set_reg(UART_THR_OFFSET, ch);
 }
 
-char uart8250_getc(void)
+int uart8250_getc(void)
 {
 	if (get_reg(UART_LSR_OFFSET) & UART_LSR_DR)
 		return get_reg(UART_RBR_OFFSET);
-	return 0;
+	return -1;
 }
 
 int uart8250_init(unsigned long base,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index f1e19b79866..104edccb2bf 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -31,7 +31,7 @@ static void k210_console_putc(char c)
 	uarths_putc(c);
 }
 
-static char k210_console_getc(void)
+static int k210_console_getc(void)
 {
 	return uarths_getc();
 }
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index f8f4974c3b8..34fcf3941ae 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -48,12 +48,12 @@ void uarths_putc(char c)
 	uarths->txdata.data = (u8)c;
 }
 
-char uarths_getc(void)
+int uarths_getc(void)
 {
 	struct uarths_rxdata rx = uarths->rxdata;
 
 	if (rx.empty)
-		return '\0';
+		return -1;
 
 	return rx.data;
 }
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
index dd0433cf7cc..f247a63aece 100644
--- a/platform/kendryte/k210/uarths.h
+++ b/platform/kendryte/k210/uarths.h
@@ -161,6 +161,6 @@ enum uarths_stopbit {
 
 void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit);
 void uarths_putc(char c);
-char uarths_getc(void);
+int uarths_getc(void);
 
 #endif /* _K210_UARTHS_H_ */
diff --git a/platform/template/platform.c b/platform/template/platform.c
index e7a70aa95ab..c14398f8a3c 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -73,7 +73,7 @@ static void platform_console_putc(char ch)
 /*
  * Read a character from the platform console input.
  */
-static char platform_console_getc(void)
+static int platform_console_getc(void)
 {
 	return uart8250_getc();
 }

From 754ff341085902e999c512f15e9fc1d59c8a8aa2 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 27 Feb 2019 16:07:56 -0800
Subject: [PATCH 0199/1765] firmware: Fix a typo

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ae14cc7be0a..3c509cfb997 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -187,7 +187,7 @@ _start_warm:
 
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH
-	Call	sbi_init
+	call	sbi_init
 
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang

From d4dd2b37f3a80fc99345930879721499cf9e0c8a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 27 Feb 2019 11:08:26 -0800
Subject: [PATCH 0200/1765] firmware: Ensure the mtvec is updated.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 3c509cfb997..83fe2aaebd9 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -184,6 +184,11 @@ _start_warm:
 	/* Setup trap handler */
 	la	a4, _trap_handler
 	csrw	CSR_MTVEC, a4
+	/* Make sure that mtvec is updated */
+	1:
+	csrr	a5, CSR_MTVEC
+	bne	a4, a5, 1b
+
 
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH

From 27fae182dc54e08314034a03eeb583b94c64f4c8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 4 Mar 2019 14:08:17 -0800
Subject: [PATCH 0201/1765] firmware: Reset all the general purpose registers
 to zero.

A warm reset by pressing the reset button may not initialize all the
registers to zero. Do it for every hart during warm boot.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 83fe2aaebd9..1725a9200a4 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -120,6 +120,9 @@ _wait_for_boot_hart:
 	beqz	a5, _wait_for_boot_hart
 
 _start_warm:
+	li	ra, 0
+	call	_reset_regs
+
 	/* Disable and clear all interrupts */
 	csrw	CSR_MIE, zero
 	csrw	CSR_MIP, zero
@@ -380,3 +383,41 @@ _trap_handler_all_mode:
 	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
 
 	mret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.globl _reset_regs
+_reset_regs:
+
+	/* Reset all registers except ra, a0,a1 */
+	li sp, 0
+	li gp, 0
+	li tp, 0
+	li t0, 0
+	li t1, 0
+	li t2, 0
+	li s0, 0
+	li s1, 0
+	li a2, 0
+	li a3, 0
+	li a4, 0
+	li a5, 0
+	li a6, 0
+	li a7, 0
+	li s2, 0
+	li s3, 0
+	li s4, 0
+	li s5, 0
+	li s6, 0
+	li s7, 0
+	li s8, 0
+	li s9, 0
+	li s10, 0
+	li s11, 0
+	li t3, 0
+	li t4, 0
+	li t5, 0
+	li t6, 0
+	csrw CSR_MSCRATCH, 0
+
+	ret

From 9eb8f0f90d5c873576d18d405bbd932ad9688741 Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Wed, 6 Mar 2019 15:29:34 +0800
Subject: [PATCH 0202/1765] platform: Make the `platform` read-only

platform should be a read-only variable, if it is placed in the data
segment, it may be exploited.

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 include/sbi/sbi_platform.h        | 52 ++++++++++++++++---------------
 lib/sbi_console.c                 |  2 +-
 lib/sbi_hart.c                    | 12 +++----
 lib/sbi_init.c                    |  6 ++--
 lib/sbi_ipi.c                     |  4 +--
 lib/sbi_timer.c                   |  2 +-
 platform/kendryte/k210/platform.c |  2 +-
 platform/qemu/sifive_u/platform.c |  2 +-
 platform/qemu/virt/platform.c     |  2 +-
 platform/sifive/fu540/platform.c  |  2 +-
 platform/template/platform.c      |  2 +-
 11 files changed, 45 insertions(+), 43 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index fe04c2fc42f..39644d19487 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -110,10 +110,10 @@ struct sbi_platform {
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s)	\
-	((struct sbi_platform *)((__s)->platform_addr))
+	((const struct sbi_platform *)((__s)->platform_addr))
 /** Get pointer to sbi_platform for current HART */
 #define sbi_platform_thishart_ptr()	\
-	((struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
+	((const struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
 /** Check whether the platform supports timer value */
 #define sbi_platform_has_timer_value(__p)	\
 	((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
@@ -140,7 +140,7 @@ struct sbi_platform {
  *
  * @return pointer to platform name on success and NULL on failure
  */
-static inline const char *sbi_platform_name(struct sbi_platform *plat)
+static inline const char *sbi_platform_name(const struct sbi_platform *plat)
 {
 	if (plat)
 		return plat->name;
@@ -155,7 +155,7 @@ static inline const char *sbi_platform_name(struct sbi_platform *plat)
  *
  * @return TRUE if HART is disabled and FALSE otherwise
  */
-static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat,
+static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
 					      u32 hartid)
 {
 	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
@@ -170,7 +170,7 @@ static inline bool sbi_platform_hart_disabled(struct sbi_platform *plat,
  *
  * @return total number of HARTs
  */
-static inline u32 sbi_platform_hart_count(struct sbi_platform *plat)
+static inline u32 sbi_platform_hart_count(const struct sbi_platform *plat)
 {
 	if (plat)
 		return plat->hart_count;
@@ -184,7 +184,7 @@ static inline u32 sbi_platform_hart_count(struct sbi_platform *plat)
  *
  * @return stack size in bytes
  */
-static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
+static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 {
 	if (plat)
 		return plat->hart_stack_size;
@@ -199,7 +199,7 @@ static inline u32 sbi_platform_hart_stack_size(struct sbi_platform *plat)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_early_init(struct sbi_platform *plat,
+static inline int sbi_platform_early_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
 	if (plat && plat->early_init)
@@ -215,7 +215,7 @@ static inline int sbi_platform_early_init(struct sbi_platform *plat,
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_final_init(struct sbi_platform *plat,
+static inline int sbi_platform_final_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
 	if (plat && plat->final_init)
@@ -231,7 +231,7 @@ static inline int sbi_platform_final_init(struct sbi_platform *plat,
  *
  * @return number of PMP regions
  */
-static inline u32 sbi_platform_pmp_region_count(struct sbi_platform *plat,
+static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat,
 						u32 hartid)
 {
 	if (plat && plat->pmp_region_count)
@@ -252,7 +252,7 @@ static inline u32 sbi_platform_pmp_region_count(struct sbi_platform *plat,
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_pmp_region_info(struct sbi_platform *plat,
+static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
 					       u32 hartid, u32 index,
 					       ulong *prot, ulong *addr,
 					       ulong *log2size)
@@ -269,7 +269,7 @@ static inline int sbi_platform_pmp_region_info(struct sbi_platform *plat,
  * @param plat pointer to struct sbi_platform
  * @param ch character to write
  */
-static inline void sbi_platform_console_putc(struct sbi_platform *plat,
+static inline void sbi_platform_console_putc(const struct sbi_platform *plat,
 					     char ch)
 {
 	if (plat && plat->console_putc)
@@ -283,7 +283,7 @@ static inline void sbi_platform_console_putc(struct sbi_platform *plat,
  *
  * @return character read from console input
  */
-static inline int sbi_platform_console_getc(struct sbi_platform *plat)
+static inline int sbi_platform_console_getc(const struct sbi_platform *plat)
 {
 	if (plat && plat->console_getc)
 		return plat->console_getc();
@@ -297,7 +297,7 @@ static inline int sbi_platform_console_getc(struct sbi_platform *plat)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_console_init(struct sbi_platform *plat)
+static inline int sbi_platform_console_init(const struct sbi_platform *plat)
 {
 	if (plat && plat->console_init)
 		return plat->console_init();
@@ -312,7 +312,7 @@ static inline int sbi_platform_console_init(struct sbi_platform *plat)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
+static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
 					    bool cold_boot)
 {
 	if (plat && plat->irqchip_init)
@@ -326,7 +326,7 @@ static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
  * @param plat pointer to struct sbi_platform
  * @param target_hart HART ID of IPI target
  */
-static inline void sbi_platform_ipi_send(struct sbi_platform *plat,
+static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
 					 u32 target_hart)
 {
 	if (plat && plat->ipi_send)
@@ -339,7 +339,7 @@ static inline void sbi_platform_ipi_send(struct sbi_platform *plat,
  * @param plat pointer to struct sbi_platform
  * @param target_hart HART ID of IPI target
  */
-static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
+static inline void sbi_platform_ipi_sync(const struct sbi_platform *plat,
 					 u32 target_hart)
 {
 	if (plat && plat->ipi_sync)
@@ -352,7 +352,7 @@ static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
  * @param plat pointer to struct sbi_platform
  * @param target_hart HART ID of IPI target
  */
-static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
+static inline void sbi_platform_ipi_clear(const struct sbi_platform *plat,
 					  u32 target_hart)
 {
 	if (plat && plat->ipi_clear)
@@ -367,7 +367,7 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
+static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
 					bool cold_boot)
 {
 	if (plat && plat->ipi_init)
@@ -382,7 +382,7 @@ static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
  *
  * @return 64bit timer value
  */
-static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
+static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
 {
 	if (plat && plat->timer_value)
 		return plat->timer_value();
@@ -395,8 +395,9 @@ static inline u64 sbi_platform_timer_value(struct sbi_platform *plat)
  * @param plat pointer to struct struct sbi_platform
  * @param next_event timer value when timer event will happen
  */
-static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
-						  u64 next_event)
+static inline void sbi_platform_timer_event_start(
+					const struct sbi_platform *plat,
+					u64 next_event)
 {
 	if (plat && plat->timer_event_start)
 		plat->timer_event_start(next_event);
@@ -407,7 +408,8 @@ static inline void sbi_platform_timer_event_start(struct sbi_platform *plat,
  *
  * @param plat pointer to struct sbi_platform
  */
-static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat)
+static inline void sbi_platform_timer_event_stop(
+					const struct sbi_platform *plat)
 {
 	if (plat && plat->timer_event_stop)
 		plat->timer_event_stop();
@@ -421,7 +423,7 @@ static inline void sbi_platform_timer_event_stop(struct sbi_platform *plat)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_timer_init(struct sbi_platform *plat,
+static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
 	if (plat && plat->timer_init)
@@ -437,7 +439,7 @@ static inline int sbi_platform_timer_init(struct sbi_platform *plat,
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_system_reboot(struct sbi_platform *plat,
+static inline int sbi_platform_system_reboot(const struct sbi_platform *plat,
 					     u32 type)
 {
 	if (plat && plat->system_reboot)
@@ -453,7 +455,7 @@ static inline int sbi_platform_system_reboot(struct sbi_platform *plat,
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_system_shutdown(struct sbi_platform *plat,
+static inline int sbi_platform_system_shutdown(const struct sbi_platform *plat,
 					       u32 type)
 {
 	if (plat && plat->system_shutdown)
diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index 527748f60c7..da2f82386d2 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -11,7 +11,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/riscv_locks.h>
 
-static struct sbi_platform *console_plat = NULL;
+static const struct sbi_platform *console_plat = NULL;
 static spinlock_t console_out_lock = SPIN_LOCK_INITIALIZER;
 
 bool sbi_isprintable(char c)
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index e3b2219f200..03e2dd5ed52 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -28,7 +28,7 @@ unsigned int sbi_current_hartid()
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
@@ -79,7 +79,7 @@ static int fp_init(u32 hartid)
 
 static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long interrupts, exceptions;
 
 	if (!misa_extension('S'))
@@ -122,7 +122,7 @@ unsigned long log2roundup(unsigned long x)
 
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long prot, addr, size, l2l;
 	unsigned int i;
 
@@ -160,7 +160,7 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	u32 i, count;
 	unsigned long fw_start, fw_size_log2;
 	ulong prot, addr, log2size;
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (!sbi_platform_has_pmp(plat))
 		return 0;
@@ -297,7 +297,7 @@ static unsigned long coldboot_wait_bitmap = 0;
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long mipval;
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
 	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
@@ -324,7 +324,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	int max_hart = sbi_platform_hart_count(plat);
 
 	for(int i = 0; i < max_hart ; i++) {
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 81feb569ae0..edcc3654044 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -32,7 +32,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
 	char str[64];
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	rc = sbi_system_early_init(scratch, TRUE);
 	if (rc)
@@ -96,7 +96,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wait_for_coldboot(scratch, hartid);
@@ -156,7 +156,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
 	bool coldboot = FALSE;
 	u32 hartid = sbi_current_hartid();
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 5f189c8c23b..0e371d77793 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -22,7 +22,7 @@
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
 {
 	struct sbi_scratch *remote_scratch = NULL;
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
@@ -72,7 +72,7 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	volatile unsigned long ipi_type;
 	unsigned int ipi_event;
 	u32 hartid = sbi_current_hartid();
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index a687a5fa384..a2fb1a79bec 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -39,7 +39,7 @@ u64 get_ticks(void)
 
 u64 sbi_timer_value(struct sbi_scratch *scratch)
 {
-	struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (sbi_platform_has_timer_value(plat))
 		return sbi_platform_timer_value(plat);
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 104edccb2bf..cba83dae8ac 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -98,7 +98,7 @@ static int k210_system_shutdown(u32 type)
 	return 0;
 }
 
-struct sbi_platform platform = {
+const struct sbi_platform platform = {
 
 	.name = "Kendryte K210",
 	.features = SBI_PLATFORM_HAS_TIMER_VALUE,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index e8542f2e151..cc8993d958f 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -125,7 +125,7 @@ static int sifive_u_system_down(u32 type)
 	return 0;
 }
 
-struct sbi_platform platform = {
+const struct sbi_platform platform = {
 	.name = "QEMU SiFive Unleashed",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = SIFIVE_U_HART_COUNT,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index ab40b939df5..fd4d82992a9 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -134,7 +134,7 @@ static int virt_system_down(u32 type)
 	return 0;
 }
 
-struct sbi_platform platform = {
+const struct sbi_platform platform = {
 	.name = "QEMU Virt Machine",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = VIRT_HART_COUNT,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index a244d10f3d5..c14275abd7f 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -187,7 +187,7 @@ static int fu540_system_down(u32 type)
 	return 0;
 }
 
-struct sbi_platform platform = {
+const struct sbi_platform platform = {
 	.name = "SiFive Freedom U540",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = FU540_HART_COUNT,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index c14398f8a3c..866d2734816 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -207,7 +207,7 @@ static int platform_system_shutdown(u32 type)
 /*
  * Platform descriptor.
  */
-struct sbi_platform platform = {
+const struct sbi_platform platform = {
 
 	.name = "platform-name",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,

From 69d794cbcbab9ad50e090b06fd7ff6fd2b7b8315 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 5 Mar 2019 18:01:00 -0800
Subject: [PATCH 0203/1765] Revert "firmware: Add a barrier instruction for
 wait for boot hart"

This reverts commit 05602e2bf4812533adcb7acb1a67e43726c0e7bb.

Introducing a fence causes warm reset issue to reappear. Revert it
for the time being.
---
 firmware/fw_base.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 1725a9200a4..9b525ccd937 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -114,7 +114,6 @@ _fdt_reloc_done:
 
 	/* Wait for boot hart */
 _wait_for_boot_hart:
-	fence	rw, rw
 	la	a4, _boot_hart_done
 	REG_L	a5, (a4)
 	beqz	a5, _wait_for_boot_hart

From b225583881c82eaab3059af9277c091432d50266 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 5 Mar 2019 18:03:27 -0800
Subject: [PATCH 0204/1765] firmware: Add nop to reduce bus traffic.

All the non-boot harts run in a tight loop which may cause a heavy load
on the memory bus. This may delay the boot hart to complete the cold boot
process.

Introduce few nop that will ease up the traffic.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 9b525ccd937..dccaef1b81b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -116,6 +116,10 @@ _fdt_reloc_done:
 _wait_for_boot_hart:
 	la	a4, _boot_hart_done
 	REG_L	a5, (a4)
+	/* Reduce the bus traffic so that boot hart may proceed faster */
+	nop
+	nop
+	nop
 	beqz	a5, _wait_for_boot_hart
 
 _start_warm:

From 007a6b26d9a22a9dc49ede12115a8704f634dad0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 6 Mar 2019 15:18:29 -0800
Subject: [PATCH 0205/1765] firmware: Reset all registers and flush icache

A warm reset using reset button may put icache and registers
in non-coherent state.

Flush the icache and reset all registers for every hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index dccaef1b81b..cf2c6a0c2ec 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -25,6 +25,8 @@ _start:
 	csrr	a6, CSR_MHARTID
 	blt	zero, a6, _wait_for_boot_hart
 
+	li	ra, 0
+	call	_reset_regs
 	/* Zero-out BSS */
 	la	a4, _bss_start
 	la	a5, _bss_end
@@ -392,6 +394,8 @@ _trap_handler_all_mode:
 	.globl _reset_regs
 _reset_regs:
 
+	/* flush the instruction cache */
+	fence.i
 	/* Reset all registers except ra, a0,a1 */
 	li sp, 0
 	li gp, 0

From 508a27204cbbca0a9430236e56681e5e0d343fb9 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 8 Mar 2019 11:22:22 -0800
Subject: [PATCH 0206/1765] lib: Create a sbi_ipi_data structure

Create a sbi_ipi_data structure that holds unpacked IPI information. At
the same time remove ipi_type from the sbi_scratch struct and use a
fixed offset to access it.

This structure fits in behind the sbi_scratch structure.

This fixes https://github.com/riscv/opensbi/issues/81

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 firmware/fw_base.S        |  1 -
 include/sbi/sbi_scratch.h | 23 ++++++++++++++++-------
 lib/sbi_ipi.c             |  8 +++++---
 3 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index cf2c6a0c2ec..69cfc907d46 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -183,7 +183,6 @@ _start_warm:
 	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
 	la	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
-	REG_S	zero, SBI_SCRATCH_IPI_TYPE_OFFSET(tp)
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 
 	/* Setup stack */
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 8389ef38f75..70ab384bfc6 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -28,17 +28,24 @@
 #define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
-/** Offset of ipi_type member in sbi_scratch */
-#define SBI_SCRATCH_IPI_TYPE_OFFSET		(8 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(9 * __SIZEOF_POINTER__)
-/** Maximum size of sbi_scratch */
-#define SBI_SCRATCH_SIZE			256
+#define SBI_SCRATCH_TMP0_OFFSET			(8 * __SIZEOF_POINTER__)
+
+/** sbi_ipi_data is located behind sbi_scratch. This struct is not packed. */
+/** Offset of ipi_type in sbi_ipi_data */
+#define SBI_IPI_DATA_IPI_TYPE_OFFSET		(15 * __SIZEOF_POINTER__)
+
+/** Maximum size of sbi_scratch and sbi_ipi_data */
+#define SBI_SCRATCH_SIZE			(32 * __SIZEOF_POINTER__)
 
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
 
+struct sbi_ipi_data {
+	unsigned long ipi_type;
+};
+
 /** Representation of per-HART scratch space */
 struct sbi_scratch {
 	/** Start (or base) address of firmware linked to OpenSBI library */
@@ -57,8 +64,6 @@ struct sbi_scratch {
 	unsigned long platform_addr;
 	/** Address of HART ID to sbi_scratch conversion function */
 	unsigned long hartid_to_scratch;
-	/** IPI type (or flags) */
-	unsigned long ipi_type;
 	/** Temporary storage */
 	unsigned long tmp0;
 } __packed;
@@ -71,6 +76,10 @@ struct sbi_scratch {
 #define sbi_scratch_thishart_arg1_ptr()	\
 ((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
+/** Get pointer to sbi_ipi_data from sbi_scratch */
+#define sbi_ipi_data_ptr(scratch)      \
+((struct sbi_ipi_data *)(void*)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
+
 #endif
 
 #endif
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 0e371d77793..e0f2a197348 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -31,7 +31,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
 	 * trigger the interrupt
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
-	atomic_raw_set_bit(event, &remote_scratch->ipi_type);
+	atomic_raw_set_bit(event, &sbi_ipi_data_ptr(remote_scratch)->ipi_type);
 	mb();
 	sbi_platform_ipi_send(plat, hartid);
 	if (event != SBI_IPI_EVENT_SOFT)
@@ -80,7 +80,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 	sbi_platform_ipi_clear(plat, hartid);
 
 	do {
-		ipi_type = scratch->ipi_type;
+		ipi_type = sbi_ipi_data_ptr(scratch)->ipi_type;
 		rmb();
 		ipi_event = __ffs(ipi_type);
 		switch (ipi_event) {
@@ -97,12 +97,14 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			sbi_hart_hang();
 			break;
 		};
-		ipi_type = atomic_raw_clear_bit(ipi_event, &scratch->ipi_type);
+		ipi_type = atomic_raw_clear_bit(ipi_event, &sbi_ipi_data_ptr(scratch)->ipi_type);
 	} while(ipi_type > 0);
 }
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
+
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
 

From 90cb4917b584b07df3e4037a3b660e9ac28e3384 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 Mar 2019 12:57:20 -0800
Subject: [PATCH 0207/1765] lib: Implement sfence.vma correctly.

Currently, OpenSBI doesn't distinguish between sfence.vma
and sfence.vm asid calls. Moreover, it ignores the page
ranges and just flush entire TLB everytime.

Fix the sfence implementation by keeping all the tlb flush
info in scratch area.

The relevant Linux kernel code was added by
https://patchwork.kernel.org/project/linux-riscv/list/?series=89695

However, this patch is backward compatible with older version kernel
that doesn't have the above patches as well.

Fixes #87
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h   |  5 +++
 include/sbi/sbi_ipi.h     | 15 +++++++--
 include/sbi/sbi_scratch.h | 10 +++---
 lib/sbi_ecall.c           | 17 ++++++++--
 lib/sbi_ipi.c             | 71 ++++++++++++++++++++++++++++++++++++---
 lib/sbi_system.c          |  2 +-
 6 files changed, 105 insertions(+), 15 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index a88c0867f84..9648629bd87 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -26,6 +26,11 @@
 #error "Unexpected __riscv_xlen"
 #endif
 
+#define PAGE_SHIFT      (12)
+#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE - 1))
+#define SBI_TLB_FLUSH_ALL ((unsigned long)-1)
+
 #define REG_L		__REG_SEL(ld, lw)
 #define REG_S		__REG_SEL(sd, sw)
 #define SZREG		__REG_SEL(8, 4)
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 708dd8c1767..1aafe35bd55 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -15,12 +15,23 @@
 #define SBI_IPI_EVENT_SOFT			0x1
 #define SBI_IPI_EVENT_FENCE_I			0x2
 #define SBI_IPI_EVENT_SFENCE_VMA		0x4
-#define SBI_IPI_EVENT_HALT			0x8
+#define SBI_IPI_EVENT_SFENCE_VMA_ASID		0x8
+#define SBI_IPI_EVENT_HALT			0x10
 
 struct sbi_scratch;
 
+struct sbi_ipi_data {
+	unsigned long ipi_type;
+};
+
+struct sbi_tlb_info {
+	unsigned long start;
+	unsigned long size;
+	unsigned long asid;
+};
+
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      ulong *pmask, u32 event);
+		      ulong *pmask, u32 event, void *data);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 70ab384bfc6..15348935773 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -35,16 +35,14 @@
 /** Offset of ipi_type in sbi_ipi_data */
 #define SBI_IPI_DATA_IPI_TYPE_OFFSET		(15 * __SIZEOF_POINTER__)
 
+#define SBI_SCRATCH_TLB_INFO_OFFSET		(16 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch and sbi_ipi_data */
 #define SBI_SCRATCH_SIZE			(32 * __SIZEOF_POINTER__)
 
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
-
-struct sbi_ipi_data {
-	unsigned long ipi_type;
-};
+#include <sbi/sbi_ipi.h>
 
 /** Representation of per-HART scratch space */
 struct sbi_scratch {
@@ -80,6 +78,10 @@ struct sbi_scratch {
 #define sbi_ipi_data_ptr(scratch)      \
 ((struct sbi_ipi_data *)(void*)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
 
+/** Get pointer to tlb flush info from sbi_scratch */
+#define sbi_tlb_info_ptr(scratch)      \
+((struct sbi_tlb_info *)(void*)scratch + SBI_SCRATCH_TLB_INFO_OFFSET)
+
 #endif
 
 #endif
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 42123ba10d7..6312469d196 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -34,6 +34,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		      struct sbi_scratch *scratch)
 {
 	int ret = SBI_ENOTSUPP;
+	struct sbi_tlb_info tlb_info;
 
 	switch (regs->a7) {
 	case SBI_ECALL_SET_TIMER:
@@ -59,16 +60,26 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		break;
 	case SBI_ECALL_SEND_IPI:
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
-					SBI_IPI_EVENT_SOFT);
+					SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_ECALL_REMOTE_FENCE_I:
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
-					SBI_IPI_EVENT_FENCE_I);
+					SBI_IPI_EVENT_FENCE_I, NULL);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
+		tlb_info.start = (unsigned long)regs->a1;
+		tlb_info.size = (unsigned long)regs->a2;
+
+		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
+					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
+		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
+		tlb_info.start = (unsigned long)regs->a1;
+		tlb_info.size = (unsigned long)regs->a2;
+		tlb_info.asid = (unsigned long)regs->a3;
+
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
-					SBI_IPI_EVENT_SFENCE_VMA);
+					SBI_IPI_EVENT_SFENCE_VMA_ASID, &tlb_info);
 		break;
 	case SBI_ECALL_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index e0f2a197348..468db9a60e6 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -19,10 +19,13 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_unpriv.h>
 
-static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
+static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
+			u32 event, void *data)
 {
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_tlb_info *tlb_info = data;
+	struct sbi_tlb_info *ipi_tlb_data;
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
@@ -31,6 +34,13 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
 	 * trigger the interrupt
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
+	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
+	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
+		ipi_tlb_data = sbi_tlb_info_ptr(remote_scratch);
+		ipi_tlb_data->start = tlb_info->start;
+		ipi_tlb_data->size = tlb_info->size;
+		ipi_tlb_data->asid = tlb_info->asid;
+	}
 	atomic_raw_set_bit(event, &sbi_ipi_data_ptr(remote_scratch)->ipi_type);
 	mb();
 	sbi_platform_ipi_send(plat, hartid);
@@ -41,7 +51,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event)
 }
 
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      ulong *pmask, u32 event)
+		      ulong *pmask, u32 event, void *data)
 {
 	ulong i, m;
 	ulong mask = sbi_hart_available_mask();
@@ -53,13 +63,13 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 	/* send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
 		if ((m & 1UL) && (i != hartid))
-			sbi_ipi_send(scratch, i, event);
+			sbi_ipi_send(scratch, i, event, data);
 
 	/* If the current hart is on the set, send an IPI
 	 * to it as well
 	 */
 	if (mask & (1UL << hartid))
-		sbi_ipi_send(scratch, hartid, event);
+		sbi_ipi_send(scratch, hartid, event, data);
 
 
 	return 0;
@@ -70,6 +80,51 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
+static void sbi_ipi_tlb_flush_all(unsigned long asid)
+{
+	__asm__ __volatile__ ("sfence.vma x0, %0"
+				: : "r" (asid)
+				: "memory");
+}
+
+static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size = tinfo->size;
+	unsigned long i;
+
+	if (start == 0 && size == 0)
+		sbi_ipi_tlb_flush_all(0);
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__ ("sfence.vma %0"
+				      : : "r" (start + i)
+				      : "memory");
+	}
+}
+
+static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size = tinfo->size;
+	unsigned long asid = tinfo->asid;
+	unsigned long i;
+
+	if (start == 0 && size == 0)
+		sbi_ipi_tlb_flush_all(0);
+	/* Flush entire MM context */
+	if (size == SBI_TLB_FLUSH_ALL) {
+		sbi_ipi_tlb_flush_all(asid);
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__ ("sfence.vma %0, %1"
+				      : : "r" (start + i), "r" (asid)
+				      : "memory");
+	}
+}
+
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -91,7 +146,10 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			__asm__ __volatile("fence.i");
 			break;
 		case SBI_IPI_EVENT_SFENCE_VMA:
-			__asm__ __volatile("sfence.vma");
+			sbi_ipi_sfence_vma(sbi_tlb_info_ptr(scratch));
+			break;
+		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
+			sbi_ipi_sfence_vma_asid(sbi_tlb_info_ptr(scratch));
 			break;
 		case SBI_IPI_EVENT_HALT:
 			sbi_hart_hang();
@@ -104,6 +162,9 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
+	sbi_tlb_info_ptr(scratch)->start = 0x00;
+	sbi_tlb_info_ptr(scratch)->size = 0x00;
+	sbi_tlb_info_ptr(scratch)->asid = 0x00;
 
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index f23d04647a2..b373828a6da 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -41,7 +41,7 @@ void __attribute__((noreturn)) sbi_system_shutdown(struct sbi_scratch *scratch,
 
 	/* If that fails (or is not implemented) send an IPI on every
 	 * hart to hang and then hang the current hart */
-	sbi_ipi_send_many(scratch, NULL, SBI_IPI_EVENT_HALT);
+	sbi_ipi_send_many(scratch, NULL, SBI_IPI_EVENT_HALT, NULL);
 
 	sbi_hart_hang();
 }

From 6cd668df124ba090bf7582a597b432562e9a365c Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 12 Mar 2019 21:32:35 +0800
Subject: [PATCH 0208/1765] docs: firmware: Fix spelling of U-Boot

It's U-Boot, not U-boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/firmware/payload_uboot.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/firmware/payload_uboot.md b/docs/firmware/payload_uboot.md
index 3fd7fa2fe93..42bf55fd4f8 100644
--- a/docs/firmware/payload_uboot.md
+++ b/docs/firmware/payload_uboot.md
@@ -3,11 +3,11 @@ U-Boot as a payload to OpenSBI
 
 [U-Boot](https://www.denx.de/wiki/U-Boot) is an open-source primary boot loader.
 It can be used as first and/or second stage boot loader in an embedded
-environment. In the context of OpenSBI, U-boot can be specified as a payload to
+environment. In the context of OpenSBI, U-Boot can be specified as a payload to
 OpenSBI firmware, becoming the boot stage following OpenSBI firmware
 execution.
 
-The current stable upstream code of U-boot does not yet include all patches
+The current stable upstream code of U-Boot does not yet include all patches
 necessary to fully support OpenSBI. To use U-Boot as an OpenSBI payload, the
 following out-of-tree patch series must be applied to the upstream U-Boot source
 code.

From 896870e9b0e9421aec41304299d55bbe43a6e618 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 12 Mar 2019 21:40:28 +0800
Subject: [PATCH 0209/1765] platform: fu540: Fix cosmetic styling issues

There are some spaces or mixed usage of spaces and tabs in the macro
definition. Change to use tab consistently.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 platform/sifive/fu540/platform.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index c14275abd7f..325beba882f 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -39,7 +39,7 @@
  * HARTs 1 to 4.
  */
 #ifndef FU540_ENABLED_HART_MASK
-#define FU540_ENABLED_HART_MASK (1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
+#define FU540_ENABLED_HART_MASK	(1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
 #endif
 
 #define FU540_HARITD_DISABLED			~(FU540_ENABLED_HART_MASK)
@@ -47,8 +47,8 @@
 /* PRCI clock related macros */
 //TODO: Do we need a separate driver for this ?
 #define FU540_PRCI_BASE_ADDR			0x10000000
-#define FU540_PRCI_CLKMUXSTATUSREG    		0x002C
-#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL      (0x1 << 1)
+#define FU540_PRCI_CLKMUXSTATUSREG		0x002C
+#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL	(0x1 << 1)
 
 static void fu540_modify_dt(void *fdt)
 {

From 1e24e21d56aa0f495b9ea9349a6ed8486b78265d Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 12 Mar 2019 13:50:37 -0700
Subject: [PATCH 0210/1765] lib: Fix full tlb flush behavior

Currently, global page mappings are not flushed if start and size
arguments are zero.

Flush entire TLB if both size and start argument is passed as zero.

Fixes : 90cb491 (lib: Implement sfence.vma correctly)

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_ipi.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 468db9a60e6..3b89d5d1503 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -80,11 +80,9 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
-static void sbi_ipi_tlb_flush_all(unsigned long asid)
+static void sbi_ipi_tlb_flush_all()
 {
-	__asm__ __volatile__ ("sfence.vma x0, %0"
-				: : "r" (asid)
-				: "memory");
+	__asm__ __volatile("sfence.vma");
 }
 
 static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
@@ -93,8 +91,10 @@ static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
 	unsigned long size = tinfo->size;
 	unsigned long i;
 
-	if (start == 0 && size == 0)
-		sbi_ipi_tlb_flush_all(0);
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
+		sbi_ipi_tlb_flush_all();
+		return;
+	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
 		__asm__ __volatile__ ("sfence.vma %0"
@@ -110,11 +110,16 @@ static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 	unsigned long asid = tinfo->asid;
 	unsigned long i;
 
-	if (start == 0 && size == 0)
-		sbi_ipi_tlb_flush_all(0);
-	/* Flush entire MM context */
+	if (start == 0 && size == 0) {
+		sbi_ipi_tlb_flush_all();
+		return;
+	}
+
+	/* Flush entire MM context for a given ASID */
 	if (size == SBI_TLB_FLUSH_ALL) {
-		sbi_ipi_tlb_flush_all(asid);
+		__asm__ __volatile__ ("sfence.vma x0, %0"
+				       : : "r" (asid)
+				       : "memory");
 		return;
 	}
 

From ab91c143a34357892a1ced36e3902a92b5aa8ca6 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 4 Mar 2019 13:58:37 -0800
Subject: [PATCH 0211/1765] firmware: Move scratch setup to _start instead of
 _start_warm

Scratch space setup needs to be done once for reboot for each
hart. _start_warm may be called several times if hart hotplug
is implemented.

Move scratch space setup to the beginning so that it is done
only once.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 91 ++++++++++++++++++++++++++++++----------------
 1 file changed, 60 insertions(+), 31 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 69cfc907d46..3bf7c6a3463 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -27,6 +27,63 @@ _start:
 
 	li	ra, 0
 	call	_reset_regs
+
+	/* Preload HART details
+	 * s7 -> HART Count
+	 * s8 -> HART Stack Size
+	 */
+	la	a4, platform
+#if __riscv_xlen == 64
+	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+#else
+	lw	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+	lw	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+#endif
+
+	/* Setup scratch space for all the HARTs*/
+	la	tp, _fw_end
+	mul	a5, s7, s8
+	add	tp, tp, a5
+	/* Keep a copy of tp */
+	add	t3, tp, zero
+	/* Counter */
+	li	t2, 1
+	/* hartid 0 is mandated by ISA */
+	li	t1, 0
+_scratch_init:
+	add	tp, t3, zero
+	mul	a5, s8, t1
+	sub	tp, tp, a5
+	li	a5, SBI_SCRATCH_SIZE
+	sub	tp, tp, a5
+
+	/* Initialize scratch space */
+	la	a4, _fw_start
+	la	a5, _fw_end
+	mul	t0, s7, s8
+	add	a5, a5, t0
+	sub	a5, a5, a4
+	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
+	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
+	/* Note: fw_next_arg1() uses a0, a1, and ra */
+	call	fw_next_arg1
+	REG_S	a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp)
+	/* Note: fw_next_addr() uses a0, a1, and ra */
+	call	fw_next_addr
+	REG_S	a0, SBI_SCRATCH_NEXT_ADDR_OFFSET(tp)
+	li	a4, PRV_S
+	REG_S	a4, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
+	la	a4, _start_warm
+	REG_S	a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
+	la	a4, platform
+	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
+	la	a4, _hartid_to_scratch
+	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
+	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
+	add	t1, t1, t2
+	blt	t1, s7, _scratch_init
+
 	/* Zero-out BSS */
 	la	a4, _bss_start
 	la	a5, _bss_end
@@ -132,12 +189,6 @@ _start_warm:
 	csrw	CSR_MIE, zero
 	csrw	CSR_MIP, zero
 
-	/* Preload per-HART details
-	 * s6 -> HART ID
-	 * s7 -> HART Count
-	 * s8 -> HART Stack Size
-	 */
-	csrr	s6, CSR_MHARTID
 	la	a4, platform
 #if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
@@ -151,7 +202,7 @@ _start_warm:
 	csrr	s6, CSR_MHARTID
 	bge	s6, s7, _start_hang
 
-	/* Setup scratch space */
+	/* find the scratch space for this hart */
 	la	tp, _fw_end
 	mul	a5, s7, s8
 	add	tp, tp, a5
@@ -159,31 +210,9 @@ _start_warm:
 	sub	tp, tp, a5
 	li	a5, SBI_SCRATCH_SIZE
 	sub	tp, tp, a5
-	csrw	CSR_MSCRATCH, tp
 
-	/* Initialize scratch space */
-	la	a4, _fw_start
-	la	a5, _fw_end
-	mul	t0, s7, s8
-	add	a5, a5, t0
-	sub	a5, a5, a4
-	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
-	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
-	/* Note: fw_next_arg1() uses a0, a1, and ra */
-	call	fw_next_arg1
-	REG_S	a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp)
-	/* Note: fw_next_addr() uses a0, a1, and ra */
-	call	fw_next_addr
-	REG_S	a0, SBI_SCRATCH_NEXT_ADDR_OFFSET(tp)
-	li	a4, PRV_S
-	REG_S	a4, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
-	la	a4, _start_warm
-	REG_S	a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
-	la	a4, platform
-	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
-	la	a4, _hartid_to_scratch
-	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
-	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
+	/* update the mscratch */
+	csrw	CSR_MSCRATCH, tp
 
 	/* Setup stack */
 	add	sp, tp, zero

From ebe351e550cee8e2ffcc1883119e2f6e1e96dd82 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 14 Mar 2019 00:00:35 +0800
Subject: [PATCH 0212/1765] platform: plic: Fix plic_set_priority()

At present plic_set_priority() ignores the 'source' and the priority
register to be programmed is constant. Fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 platform/common/irqchip/plic.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 3a0c93f5392..7509f05b19f 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -27,7 +27,10 @@ static volatile void *plic_base;
 
 static void plic_set_priority(u32 source, u32 val)
 {
-	writel(val, plic_base);
+	volatile void *plic_priority = plic_base +
+				PLIC_PRIORITY_BASE +
+				4 * source;
+	writel(val, plic_priority);
 }
 
 static void plic_set_thresh(u32 cntxid, u32 val)

From 312850148ad702cd9cc5bfd3537ed23ac4d851fe Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 14 Mar 2019 00:13:32 +0800
Subject: [PATCH 0213/1765] platform: plic: Bypass interrupt ID 0's priority
 programming

Per PLIC spec, interrupt ID 0 is defined to mean "no interrupt".
We should bypass it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 platform/common/irqchip/plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 7509f05b19f..51e19262638 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -118,7 +118,7 @@ int plic_cold_irqchip_init(unsigned long base,
 	plic_base = (void *)base;
 
 	/* Configure default priorities of all IRQs */
-	for (i = 0; i < plic_num_sources; i++)
+	for (i = 1; i <= plic_num_sources; i++)
 		plic_set_priority(i, 1);
 
 	return 0;

From 6c39ea99ee681de9e33004aa0075771be351a8cb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 13 Mar 2019 11:08:31 -0700
Subject: [PATCH 0214/1765] lib: Return ENOTSUPP incase of invalid SBI function
 ID

OpenSBI should show error trace only if any valid SBI function
does not perform as expected.

However, OpenSBI should show notify the caller with a negative
error if given SBI function ID is not valid.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_ecall.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 6312469d196..94c6e7703e0 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -86,6 +86,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		ret = 0;
 		break;
 	default:
+		regs->a0 = SBI_ENOTSUPP;
+		ret = 0;
 		break;
 	};
 

From e921fc26911bd27cf715483b60c22920812aab21 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 14 Mar 2019 16:12:44 +0800
Subject: [PATCH 0215/1765] platform: plic: Fix comments of programming the
 interrupt enable register

The codes that currently program the interrupt enable register for
S-mode disagrees with what the comments say. Fix the comments.

While we are here, add one line comment to describe what is done
for M-mode too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 platform/common/irqchip/plic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 51e19262638..a9ff56093b5 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -86,12 +86,13 @@ int plic_warm_irqchip_init(u32 target_hart,
 	if (plic_hart_count <= target_hart)
 		return -1;
 	
+	/* By default, disable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
 			plic_set_ie(m_cntx_id, i, 0);
 	}
 
-	/* By default, enable all IRQs for S-mode of target HART */
+	/* By default, disable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
 			plic_set_ie(s_cntx_id, i, 0);

From 132f3e024b3c773000ef4dac3f6cae57eb335e1b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 27 Mar 2019 22:57:20 +0800
Subject: [PATCH 0216/1765] firmware: Introduce "options" in "struct
 sbi_scratch"

Introduce "options" in "struct sbi_scratch" and firmware can update
it based on optional compile time flags before calling sbi_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 firmware/fw_base.S        | 6 ++++++
 firmware/objects.mk       | 4 ++++
 include/sbi/sbi_scratch.h | 4 ++++
 3 files changed, 14 insertions(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 3bf7c6a3463..aed09179826 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -81,6 +81,12 @@ _scratch_init:
 	la	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
+#ifdef FW_OPTIONS
+	li	a4, FW_OPTIONS
+	REG_S	a4, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+#else
+	REG_S	zero, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+#endif
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
 
diff --git a/firmware/objects.mk b/firmware/objects.mk
index b8f6e889a71..72581eb3794 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -50,3 +50,7 @@ endif
 ifdef FW_PAYLOAD_FDT_ADDR
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
 endif
+
+ifdef FW_OPTIONS
+firmware-genflags-y += -DFW_OPTIONS=$(FW_OPTIONS)
+endif
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 15348935773..4cba233a8f1 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -30,6 +30,8 @@
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
 #define SBI_SCRATCH_TMP0_OFFSET			(8 * __SIZEOF_POINTER__)
+/** Offset of options member in sbi_scratch */
+#define SBI_SCRATCH_OPTIONS_OFFSET		(9 * __SIZEOF_POINTER__)
 
 /** sbi_ipi_data is located behind sbi_scratch. This struct is not packed. */
 /** Offset of ipi_type in sbi_ipi_data */
@@ -64,6 +66,8 @@ struct sbi_scratch {
 	unsigned long hartid_to_scratch;
 	/** Temporary storage */
 	unsigned long tmp0;
+	/** Options for OpenSBI library */
+	unsigned long options;
 } __packed;
 
 /** Get pointer to sbi_scratch for current HART */

From 215c200ccbf39d834dfb64771c8fa5a06ad5b4e0 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 27 Mar 2019 22:39:08 +0800
Subject: [PATCH 0217/1765] lib: Group all prints during boot into
 sbi_boot_prints()

Refactor the codes a little bit to put all prints during boot into
sbi_boot_prints().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi_init.c | 55 ++++++++++++++++++++++++++++----------------------
 1 file changed, 31 insertions(+), 24 deletions(-)

diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index edcc3654044..bc2743658bd 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -28,10 +28,39 @@
 	"        | |\n" \
 	"        |_|\n\n"
 
+static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
+{
+	char str[64];
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	misa_string(str, sizeof(str));
+	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n",
+		   OPENSBI_VERSION_MAJOR, OPENSBI_VERSION_MINOR,
+		   __DATE__, __TIME__);
+
+	sbi_printf(BANNER);
+
+	/* Platform details */
+	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
+	sbi_printf("Platform HART Features : RV%d%s\n", misa_xlen(), str);
+	sbi_printf("Platform Max HARTs     : %d\n",
+		   sbi_platform_hart_count(plat));
+	sbi_printf("Current Hart           : %u\n", hartid);
+	/* Firmware details */
+	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
+	sbi_printf("Firmware Size          : %d KB\n",
+		   (u32)(scratch->fw_size / 1024));
+	/* Generic details */
+	sbi_printf("Runtime SBI Version    : %d.%d\n",
+		   sbi_ecall_version_major(), sbi_ecall_version_minor());
+	sbi_printf("\n");
+
+	sbi_hart_pmp_dump(scratch);
+}
+
 static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
-	char str[64];
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	rc = sbi_system_early_init(scratch, TRUE);
@@ -62,29 +91,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	misa_string(str, sizeof(str));
-	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n",
-		   OPENSBI_VERSION_MAJOR, OPENSBI_VERSION_MINOR,
-		   __DATE__, __TIME__);
-
-	sbi_printf(BANNER);
-
-	/* Platform details */
-	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
-	sbi_printf("Platform HART Features : RV%d%s\n", misa_xlen(), str);
-	sbi_printf("Platform Max HARTs     : %d\n",
-		   sbi_platform_hart_count(plat));
-	sbi_printf("Current Hart           : %u\n", hartid);
-	/* Firmware details */
-	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
-	sbi_printf("Firmware Size          : %d KB\n",
-		   (u32)(scratch->fw_size / 1024));
-	/* Generic details */
-	sbi_printf("Runtime SBI Version    : %d.%d\n",
-		   sbi_ecall_version_major(), sbi_ecall_version_minor());
-	sbi_printf("\n");
-
-	sbi_hart_pmp_dump(scratch);
+	sbi_boot_prints(scratch, hartid);
 
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wake_coldboot_harts(scratch, hartid);

From f9cfe301c92aede87e46069e66e250d4039e413e Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 27 Mar 2019 22:58:49 +0800
Subject: [PATCH 0218/1765] lib: Disable the boot prints if
 SBI_SCRATCH_NO_BOOT_PRINTS is set

Use the newly introduced "options" in "struct sbi_scratch" to
conditionally disable the boot prints.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/firmware/fw.md       | 15 +++++++++++++++
 include/sbi/sbi_scratch.h |  6 ++++++
 lib/sbi_init.c            |  3 ++-
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index acff4a69470..8ca54b607a5 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -75,3 +75,18 @@ make PLATFORM=<platform_subdir> FW_PAYLOAD_PATH=<payload path>
 The instructions to build each payload is different and the details can
 be found in the
 *docs/firmware/payload_<payload_name>.md* files.
+
+Options for OpenSBI Firmware behaviors
+--------------------------------------
+An optional compile time flag FW_OPTIONS can be used to control the OpenSBI
+firmware run-time behaviors.
+
+```
+make PLATFORM=<platform_subdir> FW_OPTIONS=<options>
+```
+
+FW_OPTIONS is a bitwise or'ed value of various options, eg: *FW_OPTIONS=0x1*
+stands for disabling boot prints from the OpenSBI library.
+
+For all supported options, please check "enum sbi_scratch_options" in the
+*include/sbi/sbi_scratch.h* header file.
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 4cba233a8f1..759e5648050 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -70,6 +70,12 @@ struct sbi_scratch {
 	unsigned long options;
 } __packed;
 
+/** Possible options for OpenSBI library */
+enum sbi_scratch_options {
+	/** Disable prints during boot */
+	SBI_SCRATCH_NO_BOOT_PRINTS		= (1 << 0),
+};
+
 /** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr()	\
 ((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index bc2743658bd..32ad8221ead 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -91,7 +91,8 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	sbi_boot_prints(scratch, hartid);
+	if (!(scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS))
+		sbi_boot_prints(scratch, hartid);
 
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wake_coldboot_harts(scratch, hartid);

From cfff0126ab80d8c53e55f6eaae1a59e08159160b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 30 Mar 2019 17:35:48 +0530
Subject: [PATCH 0219/1765] lib: Remove unused mepc arg from load_xyz() and
 store_xyz() functions

This patch removes unused mepc arg from load_xyz() and store_xyz()
unpriviledge access functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_unpriv.h  | 32 +++++++++++++++-----------------
 lib/sbi_ipi.c             |  2 +-
 lib/sbi_misaligned_ldst.c |  4 ++--
 3 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h
index 930babda5ff..2d9dbb975e1 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -15,29 +15,27 @@
 #include <sbi/sbi_types.h>
 
 #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)			\
-static inline type load_##type(const type *addr, ulong mepc)		\
+static inline type load_##type(const type *addr)			\
 {									\
-	register ulong __mepc asm ("a2") = mepc;			\
-	register ulong __mstatus asm ("a3");				\
+	register ulong __mstatus asm ("a2");				\
 	type val;							\
-	asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"					\
+	asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"			\
 		#insn " %1, %2\n"					\
-		"csrw "STR(CSR_MSTATUS)", %0"					\
+		"csrw "STR(CSR_MSTATUS)", %0"				\
 	: "+&r" (__mstatus), "=&r" (val)				\
-	: "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc));		\
+	: "m" (*addr), "r" (MSTATUS_MPRV));				\
 	return val;							\
 }
 
 #define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn)			\
-static inline void store_##type(type *addr, type val, ulong mepc)	\
+static inline void store_##type(type *addr, type val)			\
 {									\
-	register ulong __mepc asm ("a2") = mepc;			\
 	register ulong __mstatus asm ("a3");				\
-	asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"				\
+	asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"		\
 		#insn " %1, %2\n"					\
-		"csrw "STR(CSR_MSTATUS)", %0"					\
+		"csrw "STR(CSR_MSTATUS)", %0"				\
 	: "+&r" (__mstatus)						\
-	: "r" (val), "m" (*addr), "r" (MSTATUS_MPRV), "r" (__mepc));	\
+	: "r" (val), "m" (*addr), "r" (MSTATUS_MPRV));			\
 }
 
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
@@ -57,16 +55,16 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
-static inline u64 load_u64(const u64 *addr, ulong mepc)
+static inline u64 load_u64(const u64 *addr)
 {
-	return load_u32((u32 *)addr, mepc)
-		+ ((u64)load_u32((u32 *)addr + 1, mepc) << 32);
+	return load_u32((u32 *)addr)
+		+ ((u64)load_u32((u32 *)addr + 1) << 32);
 }
 
-static inline void store_u64(u64 *addr, u64 val, ulong mepc)
+static inline void store_u64(u64 *addr, u64 val)
 {
-	store_u32((u32 *)addr, val, mepc);
-	store_u32((u32 *)addr + 1, val >> 32, mepc);
+	store_u32((u32 *)addr, val);
+	store_u32((u32 *)addr + 1, val >> 32);
 }
 #endif
 
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 3b89d5d1503..609de0dfa48 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -58,7 +58,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 	u32 hartid = sbi_current_hartid();
 
 	if (pmask)
-		mask &= load_ulong(pmask, csr_read(CSR_MEPC));
+		mask &= load_ulong(pmask);
 
 	/* send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index 8ab01c1817e..f1df3f023ae 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -93,7 +93,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 
 	val.data_u64 = 0;
 	for (i = 0; i < len; i++)
-		val.data_bytes[i] = load_u8((void *)(addr + i), regs->mepc);
+		val.data_bytes[i] = load_u8((void *)(addr + i));
 
 	if (!fp)
 		SET_RD(insn, regs, val.data_ulong << shift >> shift);
@@ -169,7 +169,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		return SBI_EILL;
 
 	for (i = 0; i < len; i++)
-		store_u8((void *)(addr + i), val.data_bytes[i], regs->mepc);
+		store_u8((void *)(addr + i), val.data_bytes[i]);
 
 	regs->mepc += INSN_LEN(insn);
 

From 13877c3a6752138018f99214273dc3d7376cf5eb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 30 Mar 2019 17:43:23 +0530
Subject: [PATCH 0220/1765] include: Rename sbi_unpriv.h to riscv_unpriv.h

The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/{sbi_unpriv.h => riscv_unpriv.h} | 4 ++--
 lib/sbi_illegal_insn.c                       | 2 +-
 lib/sbi_ipi.c                                | 2 +-
 lib/sbi_misaligned_ldst.c                    | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)
 rename include/sbi/{sbi_unpriv.h => riscv_unpriv.h} (98%)

diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/riscv_unpriv.h
similarity index 98%
rename from include/sbi/sbi_unpriv.h
rename to include/sbi/riscv_unpriv.h
index 2d9dbb975e1..c1094176f28 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -7,8 +7,8 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#ifndef __SBI_UNPRIV_H__
-#define __SBI_UNPRIV_H__
+#ifndef __RISCV_UNPRIV_H__
+#define __RISCV_UNPRIV_H__
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_bits.h>
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 58567f46094..820f96c5766 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -9,12 +9,12 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_unpriv.h>
 
 typedef int (*illegal_insn_func)(ulong insn,
 				 u32 hartid, ulong mcause,
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 609de0dfa48..471b5939ee9 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -11,13 +11,13 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_atomic.h>
+#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
-#include <sbi/sbi_unpriv.h>
 
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 			u32 event, void *data)
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index f1df3f023ae..3fe67ea6dca 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -9,11 +9,11 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_unpriv.h>
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_misaligned_ldst.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_unpriv.h>
 
 union reg_data {
 	u8 data_bytes[8];

From 78c87cd13a75c167a693b173e6e2e0e44ad57328 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 30 Mar 2019 18:43:49 +0530
Subject: [PATCH 0221/1765] include: Make mstatus parameter optional for
 get_insn()

The mstatus parameter of get_insn() is used to return MSTATUS CSR
value which get_insn() saw. Most of the get_insn() callers don't
use the value returned in mstatus so this patch makes mstatus
parameter optional for get_insn().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_unpriv.h | 7 ++++---
 lib/sbi_illegal_insn.c     | 7 ++-----
 lib/sbi_misaligned_ldst.c  | 6 ++----
 3 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index c1094176f28..bd134b5b548 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -82,7 +82,7 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 #endif
 		"csrw "STR(CSR_MSTATUS)", %[mstatus]"
 		: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val)
-		: [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc));
+		: [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc));
 #else
 	ulong rvc_mask = 3, tmp;
 	asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n"
@@ -107,10 +107,11 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus)
 		"add %[insn], %[insn], %[tmp]\n"
 		"2: csrw "STR(CSR_MSTATUS)", %[mstatus]"
 	: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp)
-	: [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc),
+	: [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc),
 	[rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16));
 #endif
-	*mstatus = __mstatus;
+	if (mstatus)
+		*mstatus = __mstatus;
 	return val;
 }
 
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 820f96c5766..7184feabf29 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -122,14 +122,11 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			     struct sbi_trap_regs *regs,
 			     struct sbi_scratch *scratch)
 {
-	ulong mstatus;
 	ulong insn = csr_read(mbadaddr);
 
 	if (unlikely((insn & 3) != 3)) {
-		if (insn == 0) {
-			mstatus = csr_read(CSR_MSTATUS);
-			insn = get_insn(regs->mepc, &mstatus);
-		}
+		if (insn == 0)
+			insn = get_insn(regs->mepc, NULL);
 		if ((insn & 3) != 3)
 			return truly_illegal_insn(insn, hartid, mcause,
 						  regs, scratch);
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index 3fe67ea6dca..5b2df939234 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -26,8 +26,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 				struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	ulong mstatus = csr_read(CSR_MSTATUS);
-	ulong insn = get_insn(regs->mepc, &mstatus);
+	ulong insn = get_insn(regs->mepc, NULL);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
 
@@ -112,8 +111,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 				 struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	ulong mstatus = csr_read(CSR_MSTATUS);
-	ulong insn = get_insn(regs->mepc, &mstatus);
+	ulong insn = get_insn(regs->mepc, NULL);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
 

From bce71a00bdf058961e0b418ab1aa499f9d26023e Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Tue, 2 Apr 2019 22:38:15 +0900
Subject: [PATCH 0222/1765] README: Update license information

Add information regarding the Apache License Version 2.0 of some of the
Kendryte/k210 platform files. Also repeat this information in a new
ThirdPartyNotices.md file.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 README.md            |  10 +++
 ThirdPartyNotices.md | 207 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 217 insertions(+)
 create mode 100644 ThirdPartyNotices.md

diff --git a/README.md b/README.md
index d24bdf51a46..05f2130eca8 100644
--- a/README.md
+++ b/README.md
@@ -1,3 +1,5 @@
+Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
@@ -152,6 +154,12 @@ files where the reused code is present.
    (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
    under the terms of the BSD 2-Clause license. Any contributions to this
    code must be made under the terms of both licenses.
+2. Some source file for the Kendryte/k210 platform code are based on code from
+   the Kendryte [standalone SDK] available on github. These files retain the
+   original copyright and license of the Kendryte standalone SDK project and
+   are licensed under the terms of the Apache License, Version 2.0. 
+
+See also the [third party notices] file for more information.
 
 Contributing to OpenSBI
 -----------------------
@@ -223,4 +231,6 @@ make I=<install_directory> install_docs
 [Platform Documentation]: docs/platform/platform.md
 [Firmware Documentation]: docs/firmware/fw.md
 [Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
+[standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
+[third party notices]: ThirdPartyNotices.md
 
diff --git a/ThirdPartyNotices.md b/ThirdPartyNotices.md
new file mode 100644
index 00000000000..39b94f3a6ee
--- /dev/null
+++ b/ThirdPartyNotices.md
@@ -0,0 +1,207 @@
+Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
+Third Party Notices
+===================
+
+This project includes or partly uses code from the following open source
+software subject to the following open source licenses.
+
+libfdt
+------
+
+Copyright (C) 2016 Free Electrons
+Copyright (C) 2016 NextThing Co.
+
+The libfdt source code is disjunctively dual licensed (GPL-2.0+ or
+BSD-2-Clause). Some of this project code is used in OpenSBI under the terms of
+the BSD 2-Clause license. The full text of this license can be found in the
+file [COPYING.BSD](COPYING.BSD).
+
+Kendryte Standalone SDK
+-----------------------
+
+Copyright 2018 Canaan Inc.
+
+The Kendryte K210 platform code reuses some code from Kendryte standalone SDK
+licensed under the terms of the Apache License, Version 2.0. The full text of
+this license is available at http://www.apache.org/licenses/LICENSE-2.0 and
+included below.
+
+```
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
+      "Object" form shall mean any form resulting from mechanical
+      transformation or translation of a Source form, including but
+      not limited to compiled object code, generated documentation,
+      and conversions to other media types.
+
+      "Work" shall mean the work of authorship, whether in Source or
+      Object form, made available under the License, as indicated by a
+      copyright notice that is included in or attached to the work
+      (an example is provided in the Appendix below).
+
+      "Derivative Works" shall mean any work, whether in Source or Object
+      form, that is based on (or derived from) the Work and for which the
+      editorial revisions, annotations, elaborations, or other modifications
+      represent, as a whole, an original work of authorship. For the purposes
+      of this License, Derivative Works shall not include works that remain
+      separable from, or merely link (or bind by name) to the interfaces of,
+      the Work and Derivative Works thereof.
+
+      "Contribution" shall mean any work of authorship, including
+      the original version of the Work and any modifications or additions
+      to that Work or Derivative Works thereof, that is intentionally
+      submitted to Licensor for inclusion in the Work by the copyright owner
+      or by an individual or Legal Entity authorized to submit on behalf of
+      the copyright owner. For the purposes of this definition, "submitted"
+      means any form of electronic, verbal, or written communication sent
+      to the Licensor or its representatives, including but not limited to
+      communication on electronic mailing lists, source code control systems,
+      and issue tracking systems that are managed by, or on behalf of, the
+      Licensor for the purpose of discussing and improving the Work, but
+      excluding communication that is conspicuously marked or otherwise
+      designated in writing by the copyright owner as "Not a Contribution."
+
+      "Contributor" shall mean Licensor and any individual or Legal Entity
+      on behalf of whom a Contribution has been received by Licensor and
+      subsequently incorporated within the Work.
+
+   2. Grant of Copyright License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
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+      copyright license to reproduce, prepare Derivative Works of,
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+   3. Grant of Patent License. Subject to the terms and conditions of
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+   4. Redistribution. You may reproduce and distribute copies of the
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+      meet the following conditions:
+
+      (a) You must give any other recipients of the Work or
+          Derivative Works a copy of this License; and
+
+      (b) You must cause any modified files to carry prominent notices
+          stating that You changed the files; and
+
+      (c) You must retain, in the Source form of any Derivative Works
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+
+      (d) If the Work includes a "NOTICE" text file as part of its
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+          include a readable copy of the attribution notices contained
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+          pertain to any part of the Derivative Works, in at least one
+          of the following places: within a NOTICE text file distributed
+          as part of the Derivative Works; within the Source form or
+          documentation, if provided along with the Derivative Works; or,
+          within a display generated by the Derivative Works, if and
+          wherever such third-party notices normally appear. The contents
+          of the NOTICE file are for informational purposes only and
+          do not modify the License. You may add Your own attribution
+          notices within Derivative Works that You distribute, alongside
+          or as an addendum to the NOTICE text from the Work, provided
+          that such additional attribution notices cannot be construed
+          as modifying the License.
+
+      You may add Your own copyright statement to Your modifications and
+      may provide additional or different license terms and conditions
+      for use, reproduction, or distribution of Your modifications, or
+      for any such Derivative Works as a whole, provided Your use,
+      reproduction, and distribution of the Work otherwise complies with
+      the conditions stated in this License.
+
+   5. Submission of Contributions. Unless You explicitly state otherwise,
+      any Contribution intentionally submitted for inclusion in the Work
+      by You to the Licensor shall be under the terms and conditions of
+      this License, without any additional terms or conditions.
+      Notwithstanding the above, nothing herein shall supersede or modify
+      the terms of any separate license agreement you may have executed
+      with Licensor regarding such Contributions.
+
+   6. Trademarks. This License does not grant permission to use the trade
+      names, trademarks, service marks, or product names of the Licensor,
+      except as required for reasonable and customary use in describing the
+      origin of the Work and reproducing the content of the NOTICE file.
+
+   7. Disclaimer of Warranty. Unless required by applicable law or
+      agreed to in writing, Licensor provides the Work (and each
+      Contributor provides its Contributions) on an "AS IS" BASIS,
+      WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+      implied, including, without limitation, any warranties or conditions
+      of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+      PARTICULAR PURPOSE. You are solely responsible for determining the
+      appropriateness of using or redistributing the Work and assume any
+      risks associated with Your exercise of permissions under this License.
+
+   8. Limitation of Liability. In no event and under no legal theory,
+      whether in tort (including negligence), contract, or otherwise,
+      unless required by applicable law (such as deliberate and grossly
+      negligent acts) or agreed to in writing, shall any Contributor be
+      liable to You for damages, including any direct, indirect, special,
+      incidental, or consequential damages of any character arising as a
+      result of this License or out of the use or inability to use the
+      Work (including but not limited to damages for loss of goodwill,
+      work stoppage, computer failure or malfunction, or any and all
+      other commercial damages or losses), even if such Contributor
+      has been advised of the possibility of such damages.
+
+   9. Accepting Warranty or Additional Liability. While redistributing
+      the Work or Derivative Works thereof, You may choose to offer,
+      and charge a fee for, acceptance of support, warranty, indemnity,
+      or other liability obligations and/or rights consistent with this
+      License. However, in accepting such obligations, You may act only
+      on Your own behalf and on Your sole responsibility, not on behalf
+      of any other Contributor, and only if You agree to indemnify,
+      defend, and hold each Contributor harmless for any liability
+      incurred by, or claims asserted against, such Contributor by reason
+      of your accepting any such warranty or additional liability.
+
+   END OF TERMS AND CONDITIONS
+```

From 14dadeab09654b8ccde0f95a5283874bd43ea711 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 3 Apr 2019 10:22:13 +0900
Subject: [PATCH 0223/1765] kendryte/k210: Fix file headers

Add missing SPDX and copyright information.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
 platform/kendryte/k210/platform.h | 6 +++++-
 platform/kendryte/k210/sysctl.c   | 6 +++++-
 platform/kendryte/k210/sysctl.h   | 6 +++++-
 platform/kendryte/k210/uarths.c   | 6 +++++-
 platform/kendryte/k210/uarths.h   | 6 +++++-
 5 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index b9e5a87072e..982d942e2a3 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -1,4 +1,8 @@
-/* Copyright 2018 Canaan Inc.
+/*
+ * SPDX-License-Identifier:    Apache-2.0
+ *
+ * Copyright 2018 Canaan Inc.
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index 5977e33086b..8f8622d859e 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -1,4 +1,8 @@
-/* Copyright 2018 Canaan Inc.
+/*
+ * SPDX-License-Identifier:    Apache-2.0
+ *
+ * Copyright 2018 Canaan Inc.
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/platform/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
index aa95d628e22..357acc5b4f0 100644
--- a/platform/kendryte/k210/sysctl.h
+++ b/platform/kendryte/k210/sysctl.h
@@ -1,4 +1,8 @@
-/* Copyright 2018 Canaan Inc.
+/*
+ * SPDX-License-Identifier:    Apache-2.0
+ *
+ * Copyright 2018 Canaan Inc.
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index 34fcf3941ae..3b3cbb90276 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -1,4 +1,8 @@
-/* Copyright 2018 Canaan Inc.
+/*
+ * SPDX-License-Identifier:    Apache-2.0
+ *
+ * Copyright 2018 Canaan Inc.
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
index f247a63aece..ad3308ce812 100644
--- a/platform/kendryte/k210/uarths.h
+++ b/platform/kendryte/k210/uarths.h
@@ -1,4 +1,8 @@
-/* Copyright 2018 Canaan Inc.
+/*
+ * SPDX-License-Identifier:    Apache-2.0
+ *
+ * Copyright 2018 Canaan Inc.
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

From 8334a88c632b5bd3abd33fa8c9b9b4c04f0b12c8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 1 Apr 2019 17:04:05 -0700
Subject: [PATCH 0224/1765] lib: Add a fifo implementation.

Implement a fifo to accomodate outstanding IPIs for a specific hart
at the same time.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_fifo.h | 32 +++++++++++++++++
 lib/objects.mk         |  4 +++
 lib/sbi_fifo.c         | 82 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 118 insertions(+)
 create mode 100644 include/sbi/sbi_fifo.h
 create mode 100644 lib/sbi_fifo.c

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
new file mode 100644
index 00000000000..ba9769b63ca
--- /dev/null
+++ b/include/sbi/sbi_fifo.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra<atish.patra@wdc.com>
+ *
+ */
+
+#ifndef __SBI_FIFO_H__
+#define __SBI_FIFO_H__
+
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_types.h>
+
+struct sbi_fifo {
+	int head;
+	int tail;
+	spinlock_t qlock;
+	unsigned long entrysize;
+	unsigned long num_entries;
+	void *queue;
+};
+
+int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
+int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
+void sbi_fifo_init(struct sbi_fifo *fifo, unsigned long entries,
+		   unsigned long entrysize);
+bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
+bool sbi_fifo_is_full(struct sbi_fifo *fifo);
+#endif
diff --git a/lib/objects.mk b/lib/objects.mk
index ebee5924baa..137d7f06703 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -15,6 +15,7 @@ lib-objs-y += riscv_locks.o
 lib-objs-y += sbi_console.o
 lib-objs-y += sbi_ecall.o
 lib-objs-y += sbi_emulate_csr.o
+lib-objs-y += sbi_fifo.o
 lib-objs-y += sbi_hart.o
 lib-objs-y += sbi_illegal_insn.o
 lib-objs-y += sbi_init.o
@@ -23,3 +24,6 @@ lib-objs-y += sbi_misaligned_ldst.o
 lib-objs-y += sbi_system.o
 lib-objs-y += sbi_timer.o
 lib-objs-y += sbi_trap.o
+
+# External Libraries to include
+PLATFORM_INCLUDE_LIBC=y
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
new file mode 100644
index 00000000000..9d9a5b9b52c
--- /dev/null
+++ b/lib/sbi_fifo.c
@@ -0,0 +1,82 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra<atish.patra@wdc.com>
+ *
+ */
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_fifo.h>
+#include <plat/string.h>
+
+void sbi_fifo_init(struct sbi_fifo *fifo, unsigned long entries,
+		   unsigned long size)
+{
+	fifo->head = -1;
+	fifo->tail = -1;
+	fifo->num_entries = entries;
+	fifo->entrysize = size;
+	SPIN_LOCK_INIT(&fifo->qlock);
+	memset(fifo->queue, 0, entries * size);
+}
+
+bool sbi_fifo_is_full(struct sbi_fifo *fifo)
+{
+	if (((fifo->head == fifo->num_entries-1) && fifo->tail == 0) ||
+	     (fifo->tail == fifo->head + 1)) {
+		return TRUE;
+	}
+	return FALSE;
+}
+
+bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
+{
+	if (fifo->head == -1)
+		return TRUE;
+	return FALSE;
+}
+
+int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
+{
+	if (!fifo || !data)
+		return -1;
+	spin_lock(&fifo->qlock);
+	if (sbi_fifo_is_full(fifo)) {
+		spin_unlock(&fifo->qlock);
+		return -1;
+	}
+	if (fifo->tail == -1)
+		fifo->tail = 0;
+	fifo->head = (fifo->head + 1) % fifo->num_entries;
+	memcpy(fifo->queue + fifo->head * fifo->entrysize, data,
+	       fifo->entrysize);
+	spin_unlock(&fifo->qlock);
+
+	return 0;
+}
+
+int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
+{
+	if (!fifo || !data)
+		return -1;
+
+	spin_lock(&fifo->qlock);
+	if (sbi_fifo_is_empty(fifo)) {
+		spin_unlock(&fifo->qlock);
+		return -1;
+	}
+	memcpy(data, fifo->queue + fifo->tail * fifo->entrysize,
+	       fifo->entrysize);
+
+	if (fifo->tail == fifo->head) {
+		fifo->tail = -1;
+		fifo->head = -1;
+	} else {
+		fifo->tail = (fifo->tail + 1) % fifo->num_entries;
+	}
+	spin_unlock(&fifo->qlock);
+
+	return 0;
+}

From fd5418d92cf3d72fe07971e4544662ac94b7963c Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 1 Apr 2019 17:04:57 -0700
Subject: [PATCH 0225/1765] lib: Introduce a tlb info type.

Add a tlb info to distinguish between different type of tlb flush
request pending.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 1aafe35bd55..33293c3b451 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -18,6 +18,12 @@
 #define SBI_IPI_EVENT_SFENCE_VMA_ASID		0x8
 #define SBI_IPI_EVENT_HALT			0x10
 
+enum sbi_tlb_info_types {
+	SBI_TLB_FLUSH_VMA,
+	SBI_TLB_FLUSH_VMA_ASID,
+	SBI_TLB_FLUSH_VMA_VMID
+};
+
 struct sbi_scratch;
 
 struct sbi_ipi_data {
@@ -28,6 +34,7 @@ struct sbi_tlb_info {
 	unsigned long start;
 	unsigned long size;
 	unsigned long asid;
+	unsigned long type;
 };
 
 int sbi_ipi_send_many(struct sbi_scratch *scratch,

From 1eba298b0d1be5c1d9d7d4c07a8a18e9613bcb44 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 1 Apr 2019 17:05:53 -0700
Subject: [PATCH 0226/1765] lib: Increase the scratch space to 512 bytes.

Currently scratch space per hart is 256 bytes. Increase it to 512 bytes
to accomodate ipi queue.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 759e5648050..800ffcfe049 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -39,7 +39,7 @@
 
 #define SBI_SCRATCH_TLB_INFO_OFFSET		(16 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch and sbi_ipi_data */
-#define SBI_SCRATCH_SIZE			(32 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
 
 #ifndef __ASSEMBLY__
 

From f700216cb55fe690b0eec61bb618b11a0630040e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 1 Apr 2019 17:07:54 -0700
Subject: [PATCH 0227/1765] lib: Use a fifo to keep track of sfence related
 IPIs.

Currently, there is no provision for tracking multiple IPIs sent
to a single hart at the same time by different harts.

Use a fifo manage the outstanding requests. While dequeueing, read all
the entries once, because we have only 1 bit to track the type of IPI.
Once the queue is full, busy wait until the there is space available in
queue. This is not the most elegant approach. It should be changed in
favor of a wakeup event once available in opensbi.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h     |  3 +++
 include/sbi/sbi_scratch.h | 14 ++++++++----
 lib/sbi_ecall.c           |  2 ++
 lib/sbi_fifo.c            |  1 +
 lib/sbi_ipi.c             | 46 ++++++++++++++++++++++++++-------------
 5 files changed, 47 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 33293c3b451..609598e4250 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -18,6 +18,7 @@
 #define SBI_IPI_EVENT_SFENCE_VMA_ASID		0x8
 #define SBI_IPI_EVENT_HALT			0x10
 
+#define SBI_TLB_FIFO_NUM_ENTRIES 4
 enum sbi_tlb_info_types {
 	SBI_TLB_FLUSH_VMA,
 	SBI_TLB_FLUSH_VMA_ASID,
@@ -37,6 +38,8 @@ struct sbi_tlb_info {
 	unsigned long type;
 };
 
+#define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info)
+
 int sbi_ipi_send_many(struct sbi_scratch *scratch,
 		      ulong *pmask, u32 event, void *data);
 
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 800ffcfe049..a41549cc983 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -37,7 +37,9 @@
 /** Offset of ipi_type in sbi_ipi_data */
 #define SBI_IPI_DATA_IPI_TYPE_OFFSET		(15 * __SIZEOF_POINTER__)
 
-#define SBI_SCRATCH_TLB_INFO_OFFSET		(16 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET	(16 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET	(SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET + SBI_TLB_INFO_SIZE)
+
 /** Maximum size of sbi_scratch and sbi_ipi_data */
 #define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
 
@@ -88,9 +90,13 @@ enum sbi_scratch_options {
 #define sbi_ipi_data_ptr(scratch)      \
 ((struct sbi_ipi_data *)(void*)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
 
-/** Get pointer to tlb flush info from sbi_scratch */
-#define sbi_tlb_info_ptr(scratch)      \
-((struct sbi_tlb_info *)(void*)scratch + SBI_SCRATCH_TLB_INFO_OFFSET)
+/** Get pointer to tlb flush info fifo header from sbi_scratch */
+#define sbi_tlb_fifo_head_ptr(scratch)      \
+((struct sbi_fifo *)(void*)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET)
+
+/** Get pointer to tlb flush info fifo queue address from sbi_scratch */
+#define sbi_tlb_fifo_mem_ptr(scratch)      \
+(void *)((void*)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET)
 
 #endif
 
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 94c6e7703e0..164cf920f0f 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -69,6 +69,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)regs->a1;
 		tlb_info.size = (unsigned long)regs->a2;
+		tlb_info.type = SBI_TLB_FLUSH_VMA;
 
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
@@ -77,6 +78,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		tlb_info.start = (unsigned long)regs->a1;
 		tlb_info.size = (unsigned long)regs->a2;
 		tlb_info.asid = (unsigned long)regs->a3;
+		tlb_info.type = SBI_TLB_FLUSH_VMA_ASID;
 
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA_ASID, &tlb_info);
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
index 9d9a5b9b52c..1b283e8afa6 100644
--- a/lib/sbi_fifo.c
+++ b/lib/sbi_fifo.c
@@ -42,6 +42,7 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 {
 	if (!fifo || !data)
 		return -1;
+
 	spin_lock(&fifo->qlock);
 	if (sbi_fifo_is_full(fifo)) {
 		spin_unlock(&fifo->qlock);
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 471b5939ee9..4253fb1b664 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -12,20 +12,20 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_unpriv.h>
+#include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_bitops.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
+#include <plat/string.h>
 
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 			u32 event, void *data)
 {
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	struct sbi_tlb_info *tlb_info = data;
-	struct sbi_tlb_info *ipi_tlb_data;
+	struct sbi_fifo *ipi_tlb_fifo;
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
@@ -36,10 +36,19 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
-		ipi_tlb_data = sbi_tlb_info_ptr(remote_scratch);
-		ipi_tlb_data->start = tlb_info->start;
-		ipi_tlb_data->size = tlb_info->size;
-		ipi_tlb_data->asid = tlb_info->asid;
+		ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
+		while(sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
+			/**
+			 * For now, Busy loop until there is space in the fifo.
+			 * There may be case where target hart is also
+			 * enqueue in source hart's fifo. Both hart may busy
+			 * loop leading to a deadlock.
+			 * TODO: Introduce a wait/wakeup event mechansim to handle
+			 * this properly.
+			 */
+			__asm__ __volatile("nop");
+			__asm__ __volatile("nop");
+		}
 	}
 	atomic_raw_set_bit(event, &sbi_ipi_data_ptr(remote_scratch)->ipi_type);
 	mb();
@@ -132,11 +141,13 @@ static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	volatile unsigned long ipi_type;
+	struct sbi_tlb_info tinfo;
 	unsigned int ipi_event;
-	u32 hartid = sbi_current_hartid();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_fifo *ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(scratch);
 
+	u32 hartid = sbi_current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
 
 	do {
@@ -151,10 +162,14 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			__asm__ __volatile("fence.i");
 			break;
 		case SBI_IPI_EVENT_SFENCE_VMA:
-			sbi_ipi_sfence_vma(sbi_tlb_info_ptr(scratch));
-			break;
 		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
-			sbi_ipi_sfence_vma_asid(sbi_tlb_info_ptr(scratch));
+			while(!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
+				if (tinfo.type == SBI_TLB_FLUSH_VMA)
+					sbi_ipi_sfence_vma(&tinfo);
+				else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
+					sbi_ipi_sfence_vma_asid(&tinfo);
+				memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
+			}
 			break;
 		case SBI_IPI_EVENT_HALT:
 			sbi_hart_hang();
@@ -166,10 +181,11 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	struct sbi_fifo *tlb_info_q = sbi_tlb_fifo_head_ptr(scratch);
+
 	sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
-	sbi_tlb_info_ptr(scratch)->start = 0x00;
-	sbi_tlb_info_ptr(scratch)->size = 0x00;
-	sbi_tlb_info_ptr(scratch)->asid = 0x00;
+	tlb_info_q->queue = sbi_tlb_fifo_mem_ptr(scratch);
+	sbi_fifo_init(tlb_info_q, SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
 
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);

From 6dc1b0f6e2f895f220c284d9166205400fc98428 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 3 Apr 2019 10:59:12 +0530
Subject: [PATCH 0228/1765] docs: Update mailing list details in
 contributing.md

We now have an OpenSBI mailing list available for development
and discussiong so update contributing.md accordingly. The
Github PR based review and issue tracking will also continue
to exist.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 docs/contributing.md | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index 227c5c65307..229108971b3 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,8 +1,16 @@
 OpenSBI Contribution Guideline
 ==============================
 
-All contributions to OpenSBI should be sent as GitHub Pull Requests (PRs) to
-[OpenSBI main repository].
+All contributions to OpenSBI can be sent in following ways:
+1. Email patches to OpenSBI mailing list `opensbi@lists.infradead.org`
+2. GitHub Pull Requests (PRs) to [OpenSBI main repository]
+
+To join OpenSBI mailing list, please visit [OpenSBI infradead page].
+
+OpenSBI maintainers prefer patches via OpenSBI mailing list (option1 above)
+so that they are visible to wider audience. All accepted patches on the
+OpenSBI mailing list will be taken by any of the OpenSBI maintainers and
+merged into [OpenSBI main repository] using GitHub PRs.
 
 All contributed work must follow the following rules:
 1. OpenSBI code should be written in accordance to [Linux coding style].
@@ -69,6 +77,6 @@ By making a contribution to this project, I certify that:
 -----------------------------------------------------------------------
 
 [OpenSBI main repository]: https://github.com/riscv/opensbi
+[OpenSBI infradead page]: http://lists.infradead.org/mailman/listinfo/opensbi
 [Linux coding style]: https://www.kernel.org/doc/html/v4.10/process/coding-style.html
 [Developer Certificate of Origin (DCO)]: http://developercertificate.org/
-

From 9dc95021dbf29b96a84e0b7dca491f768aa0ef0d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 3 Apr 2019 10:24:03 +0530
Subject: [PATCH 0229/1765] lib: More improvements to sbi_fifo

This patch does following improvements to sbi_fifo:
1. Use valid SBI_Exxxx error codes instead of -1
2. The sbi_fifo_is_full() and sbi_fifo_is_empty() did
   not acquire qlock before accessing head and tail
   hence fixed it
3. Added avail member for ease in debugging and simplifying
   head/tail updates.

Due to above changes size of sbi_fifo changes from 48 bytes
to 56 bytes.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_error.h |  1 +
 include/sbi/sbi_fifo.h  | 18 ++++----
 lib/sbi_fifo.c          | 93 ++++++++++++++++++++++++++---------------
 lib/sbi_ipi.c           |  4 +-
 4 files changed, 73 insertions(+), 43 deletions(-)

diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 68076e739d5..300ee74332f 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -21,5 +21,6 @@
 #define SBI_ETIMEDOUT	-8
 #define SBI_EIO		-9
 #define SBI_EILL	-10
+#define SBI_ENOSPC	-11
 
 #endif
diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index ba9769b63ca..1a5951878fe 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -15,18 +15,22 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_fifo {
-	int head;
-	int tail;
-	spinlock_t qlock;
-	unsigned long entrysize;
-	unsigned long num_entries;
+	/* Static members of struct */
 	void *queue;
+	unsigned long entry_size;
+	unsigned long num_entries;
+	/* Dynamic members of struct protected by lock */
+	spinlock_t qlock;
+	unsigned long avail;
+	unsigned long head;
+	unsigned long tail;
 };
 
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
-void sbi_fifo_init(struct sbi_fifo *fifo, unsigned long entries,
-		   unsigned long entrysize);
+void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
+		   unsigned long entries, unsigned long entry_size);
 bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
 bool sbi_fifo_is_full(struct sbi_fifo *fifo);
+
 #endif
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
index 1b283e8afa6..c0010e45728 100644
--- a/lib/sbi_fifo.c
+++ b/lib/sbi_fifo.c
@@ -8,51 +8,75 @@
  *
  */
 #include <sbi/riscv_locks.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
 #include <plat/string.h>
 
-void sbi_fifo_init(struct sbi_fifo *fifo, unsigned long entries,
-		   unsigned long size)
+void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
+		   unsigned long entries, unsigned long entry_size)
 {
-	fifo->head = -1;
-	fifo->tail = -1;
+	fifo->queue = queue_mem;
 	fifo->num_entries = entries;
-	fifo->entrysize = size;
+	fifo->entry_size = entry_size;
 	SPIN_LOCK_INIT(&fifo->qlock);
-	memset(fifo->queue, 0, entries * size);
+	fifo->avail = fifo->head = fifo->tail = 0;
+	memset(fifo->queue, 0, entries * entry_size);
+}
+
+/* Note: must be called with fifo->qlock held */
+static inline bool __sbi_fifo_is_full(struct sbi_fifo *fifo)
+{
+	return (fifo->avail == fifo->num_entries) ? TRUE : FALSE;
 }
 
 bool sbi_fifo_is_full(struct sbi_fifo *fifo)
 {
-	if (((fifo->head == fifo->num_entries-1) && fifo->tail == 0) ||
-	     (fifo->tail == fifo->head + 1)) {
-		return TRUE;
-	}
-	return FALSE;
+	bool ret;
+
+	spin_lock(&fifo->qlock);
+	ret = __sbi_fifo_is_full(fifo);
+	spin_unlock(&fifo->qlock);
+
+	return ret;
+}
+
+/* Note: must be called with fifo->qlock held */
+static inline bool __sbi_fifo_is_empty(struct sbi_fifo *fifo)
+{
+	return (fifo->avail == 0) ? TRUE : FALSE;
 }
 
 bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
 {
-	if (fifo->head == -1)
-		return TRUE;
-	return FALSE;
+	bool ret;
+
+	spin_lock(&fifo->qlock);
+	ret = __sbi_fifo_is_empty(fifo);
+	spin_unlock(&fifo->qlock);
+
+	return ret;
 }
 
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 {
 	if (!fifo || !data)
-		return -1;
+		return SBI_EINVAL;
 
 	spin_lock(&fifo->qlock);
-	if (sbi_fifo_is_full(fifo)) {
+
+	if (__sbi_fifo_is_full(fifo)) {
 		spin_unlock(&fifo->qlock);
-		return -1;
+		return SBI_ENOSPC;
 	}
-	if (fifo->tail == -1)
-		fifo->tail = 0;
-	fifo->head = (fifo->head + 1) % fifo->num_entries;
-	memcpy(fifo->queue + fifo->head * fifo->entrysize, data,
-	       fifo->entrysize);
+
+	memcpy(fifo->queue + fifo->head * fifo->entry_size, data,
+	       fifo->entry_size);
+
+	fifo->avail++;
+	fifo->head++;
+	if (fifo->head >= fifo->num_entries)
+		fifo->head = 0;
+
 	spin_unlock(&fifo->qlock);
 
 	return 0;
@@ -61,22 +85,23 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 {
 	if (!fifo || !data)
-		return -1;
+		return SBI_EINVAL;
 
 	spin_lock(&fifo->qlock);
-	if (sbi_fifo_is_empty(fifo)) {
+
+	if (__sbi_fifo_is_empty(fifo)) {
 		spin_unlock(&fifo->qlock);
-		return -1;
-	}
-	memcpy(data, fifo->queue + fifo->tail * fifo->entrysize,
-	       fifo->entrysize);
-
-	if (fifo->tail == fifo->head) {
-		fifo->tail = -1;
-		fifo->head = -1;
-	} else {
-		fifo->tail = (fifo->tail + 1) % fifo->num_entries;
+		return SBI_ENOENT;
 	}
+
+	memcpy(data, fifo->queue + fifo->tail * fifo->entry_size,
+	       fifo->entry_size);
+
+	fifo->avail--;
+	fifo->tail++;
+	if (fifo->tail >= fifo->num_entries)
+		fifo->tail = 0;
+
 	spin_unlock(&fifo->qlock);
 
 	return 0;
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 4253fb1b664..cc61dbd5326 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -184,8 +184,8 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	struct sbi_fifo *tlb_info_q = sbi_tlb_fifo_head_ptr(scratch);
 
 	sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
-	tlb_info_q->queue = sbi_tlb_fifo_mem_ptr(scratch);
-	sbi_fifo_init(tlb_info_q, SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
+	sbi_fifo_init(tlb_info_q, sbi_tlb_fifo_mem_ptr(scratch),
+		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
 
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);

From 3fbe233a159798ee0360cc978aa1c9c3c51f6d88 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 3 Apr 2019 12:27:27 +0530
Subject: [PATCH 0230/1765] lib: Pack struct sbi_fifo

This patch reduces memory consumed by struct sbi_fifo by droping
redundant "head" member and using u16 in-place of "unsigned long".

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_fifo.h | 13 +++++--------
 lib/sbi_fifo.c         | 18 ++++++++++--------
 2 files changed, 15 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index 1a5951878fe..3754a5e348e 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -15,21 +15,18 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_fifo {
-	/* Static members of struct */
 	void *queue;
-	unsigned long entry_size;
-	unsigned long num_entries;
-	/* Dynamic members of struct protected by lock */
 	spinlock_t qlock;
-	unsigned long avail;
-	unsigned long head;
-	unsigned long tail;
+	u16 entry_size;
+	u16 num_entries;
+	u16 avail;
+	u16 tail;
 };
 
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
-		   unsigned long entries, unsigned long entry_size);
+		   u16 entries, u16 entry_size);
 bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
 bool sbi_fifo_is_full(struct sbi_fifo *fifo);
 
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
index c0010e45728..36ff6d027b3 100644
--- a/lib/sbi_fifo.c
+++ b/lib/sbi_fifo.c
@@ -13,13 +13,13 @@
 #include <plat/string.h>
 
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
-		   unsigned long entries, unsigned long entry_size)
+		   u16 entries, u16 entry_size)
 {
 	fifo->queue = queue_mem;
 	fifo->num_entries = entries;
 	fifo->entry_size = entry_size;
 	SPIN_LOCK_INIT(&fifo->qlock);
-	fifo->avail = fifo->head = fifo->tail = 0;
+	fifo->avail = fifo->tail = 0;
 	memset(fifo->queue, 0, entries * entry_size);
 }
 
@@ -59,6 +59,8 @@ bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
 
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 {
+	u32 head;
+
 	if (!fifo || !data)
 		return SBI_EINVAL;
 
@@ -69,13 +71,13 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOSPC;
 	}
 
-	memcpy(fifo->queue + fifo->head * fifo->entry_size, data,
-	       fifo->entry_size);
+	head = (u32)fifo->tail + fifo->avail;
+	if (head >= fifo->num_entries)
+		head = head - fifo->num_entries;
+
+	memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
 
 	fifo->avail++;
-	fifo->head++;
-	if (fifo->head >= fifo->num_entries)
-		fifo->head = 0;
 
 	spin_unlock(&fifo->qlock);
 
@@ -94,7 +96,7 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOENT;
 	}
 
-	memcpy(data, fifo->queue + fifo->tail * fifo->entry_size,
+	memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
 	       fifo->entry_size);
 
 	fifo->avail--;

From 09f976802bcd291c80b8260746bdcf5b530179ae Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Tue, 2 Apr 2019 16:57:22 +0800
Subject: [PATCH 0231/1765] firmware: Fix source fdt alignment

When I tried to start opensbi with coreboot, I found that aligning to a 16-byte
boundary would make a copy error.

Corrected to align to an machine word length boundary.

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 firmware/fw_base.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index aed09179826..7897314e2ed 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -119,7 +119,7 @@ _prev_arg1_override_done:
 	 */
 	beqz	a1, _fdt_reloc_done
 	/* Mask values in a3 and a4 */
-	li	a3, ~0xf
+	li	a3, ~(__SIZEOF_POINTER__ - 1)
 	li	a4, 0xff
 	/* t1 = destination FDT start address */
 	add	s0, a0, zero

From 40086daa6275889d55829501ae926a95c9349701 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Fri, 5 Apr 2019 14:05:15 -0700
Subject: [PATCH 0232/1765] lib: Fix the ecall macro definitions

Fix the ECALL definitions to matc the latest information in the
privlidge spec table 5.5.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/riscv_encoding.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 3f1676cf9b5..1448f58c2ed 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -424,8 +424,8 @@
 #define CAUSE_MISALIGNED_STORE		0x6
 #define CAUSE_STORE_ACCESS		0x7
 #define CAUSE_USER_ECALL		0x8
-#define CAUSE_SUPERVISOR_ECALL		0x9
-#define CAUSE_HYPERVISOR_ECALL		0xa
+#define CAUSE_HYPERVISOR_ECALL		0x9
+#define CAUSE_SUPERVISOR_ECALL		0xa
 #define CAUSE_MACHINE_ECALL		0xb
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd

From 54f31e82093969eaca9f7ebab06c92fa044dd076 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 4 Apr 2019 11:49:43 +0530
Subject: [PATCH 0233/1765] TOP: Allow building platform out-of-tree

This patch extends our current build-system for building platform
sources which are not part of OpenSBI sources.

For example:

Let's say we have out-of-tree ABC platform sources. We place these
sources under <XYZ>/ABC directory along with its config.mk and
objects.mk.

To build out-of-tree ABC platform from OpenSBI directory:
$ make PLATFORM_DIR=<XYZ>/ABC
OR
$ make PLATFORM_DIR=<XYZ> PLATFORM=ABC

To build out-of-tree ABC platform from <XYZ>/ABC directory:
$ make PLATFORM_DIR=<XYZ>/ABC -C <path_to_opensbi>
OR
$ make PLATFORM_DIR=<XYZ> PLATFORM=ABC -C <path_to_opensbi>

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile                          | 74 ++++++++++++++++++++-----------
 firmware/external_deps.mk         |  4 +-
 firmware/objects.mk               |  4 +-
 platform/common/libfdt/objects.mk |  2 +-
 4 files changed, 54 insertions(+), 30 deletions(-)

diff --git a/Makefile b/Makefile
index b05c763887e..abad95c1cd9 100644
--- a/Makefile
+++ b/Makefile
@@ -33,6 +33,17 @@ endif
 ifeq ($(install_dir),$(build_dir))
 $(error Install directory is same as build directory.)
 endif
+ifdef PLATFORM_DIR
+  platform_dir_path=$(shell readlink -f $(PLATFORM_DIR))
+  ifdef PLATFORM
+    platform_parent_dir=$(platform_dir_path)
+  else
+    PLATFORM=$(shell basename $(platform_dir_path))
+    platform_parent_dir=$(subst $(PLATFORM),,$(platform_dir_path))
+  endif
+else
+ platform_parent_dir=$(src_dir)/platform
+endif
 
 # Check if verbosity is ON for build process
 CMD_PREFIX_DEFAULT := @
@@ -43,9 +54,10 @@ else
 endif
 
 # Setup path of directories
-export platform_subdir=platform/$(PLATFORM)
-export platform_dir=$(CURDIR)/$(platform_subdir)
-export platform_common_dir=$(CURDIR)/platform/common
+export platform_subdir=$(PLATFORM)
+export platform_src_dir=$(platform_parent_dir)/$(platform_subdir)
+export platform_build_dir=$(build_dir)/platform/$(platform_subdir)
+export platform_common_src_dir=$(src_dir)/platform/common
 export include_dir=$(CURDIR)/include
 export lib_dir=$(CURDIR)/lib
 export firmware_dir=$(CURDIR)/firmware
@@ -85,15 +97,15 @@ endif
 
 # Setup list of objects.mk files
 ifdef PLATFORM
-platform-object-mks=$(shell if [ -d $(platform_dir) ]; then find $(platform_dir) -iname "objects.mk" | sort -r; fi)
-platform-common-object-mks=$(shell if [ -d $(platform_common_dir) ]; then find $(platform_common_dir) -iname "objects.mk" | sort -r; fi)
+platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
+platform-common-object-mks=$(shell if [ -d $(platform_common_src_dir) ]; then find $(platform_common_src_dir) -iname "objects.mk" | sort -r; fi)
 endif
 lib-object-mks=$(shell if [ -d $(lib_dir) ]; then find $(lib_dir) -iname "objects.mk" | sort -r; fi)
 firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
 # Include platform specifig config.mk
 ifdef PLATFORM
-include $(platform_dir)/config.mk
+include $(platform_src_dir)/config.mk
 endif
 
 # Include all object.mk files
@@ -107,10 +119,10 @@ include $(firmware-object-mks)
 # Setup list of objects
 lib-objs-path-y=$(foreach obj,$(lib-objs-y),$(build_dir)/lib/$(obj))
 ifdef PLATFORM
-platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(build_dir)/$(platform_subdir)/$(obj))
-platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(build_dir)/$(platform_subdir)/$(obj))
+platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(platform_build_dir)/$(obj))
+platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(platform_build_dir)/$(obj))
 platform-common-objs-path-y=$(foreach obj,$(platform-common-objs-y),$(build_dir)/platform/common/$(obj))
-firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(build_dir)/$(platform_subdir)/firmware/$(bin))
+firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(platform_build_dir)/firmware/$(bin))
 endif
 firmware-elfs-path-y=$(firmware-bins-path-y:.bin=.elf)
 firmware-objs-path-y=$(firmware-bins-path-y:.bin=.o)
@@ -137,8 +149,8 @@ ifndef PLATFORM_RISCV_CODE_MODEL
 endif
 
 # Setup compilation commands flags
-GENFLAGS	=	-I$(platform_dir)/include
-GENFLAGS	+=	-I$(platform_common_dir)/include
+GENFLAGS	=	-I$(platform_src_dir)/include
+GENFLAGS	+=	-I$(platform_common_src_dir)/include
 GENFLAGS	+=	-I$(include_dir)
 GENFLAGS	+=	$(platform-common-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
@@ -242,7 +254,7 @@ compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 
 targets-y  = $(build_dir)/lib/libsbi.a
 ifdef PLATFORM
-targets-y += $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
+targets-y += $(platform_build_dir)/lib/libplatsbi.a
 targets-y += $(platform-dtb-path-y)
 endif
 targets-y += $(firmware-bins-path-y)
@@ -257,16 +269,16 @@ all: $(targets-y)
 $(build_dir)/%.bin: $(build_dir)/%.elf
 	$(call compile_objcopy,$@,$<)
 
-$(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(build_dir)/$(platform_subdir)/lib/libplatsbi.a
-	$(call compile_elf,$@,$@.ld,$< $(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
+$(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
+	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
 
-$(build_dir)/$(platform_subdir)/%.ld: $(src_dir)/%.ldS
+$(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 
 $(build_dir)/lib/libsbi.a: $(lib-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(build_dir)/$(platform_subdir)/lib/libplatsbi.a: $(lib-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
+$(platform_build_dir)/lib/libplatsbi.a: $(lib-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
 $(build_dir)/%.dep: $(src_dir)/%.c
@@ -281,16 +293,28 @@ $(build_dir)/%.dep: $(src_dir)/%.S
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.c
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.c
+	$(call compile_cc_dep,$@,$<)
+
+$(platform_build_dir)/%.o: $(platform_src_dir)/%.c
+	$(call compile_cc,$@,$<)
+
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
+	$(call compile_as_dep,$@,$<)
+
+$(platform_build_dir)/%.o: $(platform_src_dir)/%.S
+	$(call compile_as,$@,$<)
+
+$(platform_build_dir)/%.dep: $(src_dir)/%.c
 	$(call compile_cc_dep,$@,$<)
 
-$(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.c
+$(platform_build_dir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
-$(build_dir)/$(platform_subdir)/%.dep: $(src_dir)/%.S
+$(platform_build_dir)/%.dep: $(src_dir)/%.S
 	$(call compile_as_dep,$@,$<)
 
-$(build_dir)/$(platform_subdir)/%.o: $(src_dir)/%.S
+$(platform_build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
 $(build_dir)/%.dtb: $(src_dir)/%.dts
@@ -349,13 +373,13 @@ install_libsbi: $(build_dir)/lib/libsbi.a
 	$(call inst_file,$(install_dir)/lib/libsbi.a,$(build_dir)/lib/libsbi.a)
 
 .PHONY: install_libplatsbi
-install_libplatsbi: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
-	$(call inst_file,$(install_dir)/$(platform_subdir)/lib/libplatsbi.a,$(build_dir)/$(platform_subdir)/lib/libplatsbi.a)
+install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
+	$(call inst_file,$(install_dir)/platform/$(platform_subdir)/lib/libplatsbi.a,$(platform_build_dir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares
-install_firmwares: $(build_dir)/$(platform_subdir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
-	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-elfs-path-y))
-	$(call inst_file_list,$(install_dir),$(build_dir),$(platform_subdir)/firmware,$(firmware-bins-path-y))
+install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
+	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-elfs-path-y))
+	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
 .PHONY: install_docs
 install_docs: $(build_dir)/docs/latex/refman.pdf
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
index d2346abc82b..2b8f9f67d47 100644
--- a/firmware/external_deps.mk
+++ b/firmware/external_deps.mk
@@ -7,5 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-$(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
-$(build_dir)/$(platform_subdir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
+$(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
+$(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 72581eb3794..cc382835339 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -29,7 +29,7 @@ firmware-bins-$(FW_PAYLOAD) += fw_payload.bin
 ifdef FW_PAYLOAD_PATH
 FW_PAYLOAD_PATH_FINAL=$(FW_PAYLOAD_PATH)
 else
-FW_PAYLOAD_PATH_FINAL=$(build_dir)/$(platform_subdir)/firmware/payloads/test.bin
+FW_PAYLOAD_PATH_FINAL=$(platform_build_dir)/firmware/payloads/test.bin
 endif
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_PATH=\"$(FW_PAYLOAD_PATH_FINAL)\"
 ifdef FW_PAYLOAD_OFFSET
@@ -41,7 +41,7 @@ endif
 
 ifndef FW_PAYLOAD_FDT_PATH
 ifdef FW_PAYLOAD_FDT
-FW_PAYLOAD_FDT_PATH=$(build_dir)/$(platform_subdir)/$(FW_PAYLOAD_FDT)
+FW_PAYLOAD_FDT_PATH=$(platform_build_dir)/$(FW_PAYLOAD_FDT)
 endif
 endif
 ifdef FW_PAYLOAD_FDT_PATH
diff --git a/platform/common/libfdt/objects.mk b/platform/common/libfdt/objects.mk
index e045150771b..1adee2b981f 100644
--- a/platform/common/libfdt/objects.mk
+++ b/platform/common/libfdt/objects.mk
@@ -13,4 +13,4 @@ $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../common/libfdt))
 
 platform-common-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
-platform-common-genflags-$(PLATFORM_INCLUDE_LIBFDT) += -I$(platform_common_dir)/libfdt/
+platform-common-genflags-$(PLATFORM_INCLUDE_LIBFDT) += -I$(platform_common_src_dir)/libfdt/

From 110eef44f08635076fe201c6516819055b8762cc Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 4 Apr 2019 17:10:12 -0700
Subject: [PATCH 0234/1765] lib: Provide a lock enabled iteration of fifo.

Implement a lock enabled iteration for fifo so that
caller can determine if next entry can be skipped or
any existing entries in fifo can be updated before enqueue.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_fifo.h | 10 ++++++
 lib/sbi_fifo.c         | 74 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index 3754a5e348e..f9e2ca9bd4e 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -23,11 +23,21 @@ struct sbi_fifo {
 	u16 tail;
 };
 
+enum sbi_fifo_inplace_update_types {
+	SBI_FIFO_SKIP,
+	SBI_FIFO_UPDATED,
+	SBI_FIFO_RESET,
+	SBI_FIFO_UNCHANGED,
+};
+
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
 		   u16 entries, u16 entry_size);
 bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
 bool sbi_fifo_is_full(struct sbi_fifo *fifo);
+int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
+			  int (*fptr) (void *in, void *data));
+u16 sbi_fifo_avail(struct sbi_fifo *fifo);
 
 #endif
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
index 36ff6d027b3..85fcff9e0f8 100644
--- a/lib/sbi_fifo.c
+++ b/lib/sbi_fifo.c
@@ -29,6 +29,20 @@ static inline bool __sbi_fifo_is_full(struct sbi_fifo *fifo)
 	return (fifo->avail == fifo->num_entries) ? TRUE : FALSE;
 }
 
+u16 sbi_fifo_avail(struct sbi_fifo *fifo)
+{
+	u16 ret;
+
+	if (!fifo)
+		return 0;
+
+	spin_lock(&fifo->qlock);
+	ret = fifo->avail;
+	spin_unlock(&fifo->qlock);
+
+	return ret;
+}
+
 bool sbi_fifo_is_full(struct sbi_fifo *fifo)
 {
 	bool ret;
@@ -57,6 +71,66 @@ bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
 	return ret;
 }
 
+/* Note: must be called with fifo->qlock held */
+static inline void __sbi_fifo_reset(struct sbi_fifo *fifo)
+{
+	fifo->avail = 0;
+	fifo->tail = 0;
+	memset(fifo->queue, 0, fifo->num_entries * fifo->entry_size);
+}
+
+bool sbi_fifo_reset(struct sbi_fifo *fifo)
+{
+	if (!fifo)
+		return FALSE;
+
+	spin_lock(&fifo->qlock);
+	__sbi_fifo_reset(fifo);
+	spin_unlock(&fifo->qlock);
+
+	return TRUE;
+}
+
+/**
+ * Provide a helper function to do inplace update to the fifo.
+ * Note: The callback function is called with lock being held.
+ *
+ * **Do not** invoke any other fifo function from callback. Otherwise, it will
+ * lead to deadlock.
+ */
+int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
+			      int (*fptr)(void *in, void *data))
+{
+	int i, index = 0;
+	int ret = SBI_FIFO_UNCHANGED;
+	void *entry;
+
+	if (!fifo || !in )
+		return ret;
+	spin_lock(&fifo->qlock);
+	if (__sbi_fifo_is_empty(fifo)) {
+		spin_unlock(&fifo->qlock);
+		return ret;
+	}
+
+	for (i = 0; i < fifo->avail; i ++) {
+		index = fifo->tail + i;
+		if (index >= fifo->num_entries)
+			index = index - fifo->num_entries;
+		entry = (void *)fifo->queue + (u32) index * fifo->entry_size;
+		ret = fptr(in, entry);
+		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
+			break;
+		} else if (ret == SBI_FIFO_RESET) {
+			__sbi_fifo_reset(fifo);
+			break;
+		}
+	}
+	spin_unlock(&fifo->qlock);
+
+	return ret;
+}
+
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 {
 	u32 head;

From 999823c5971cee8e9a129bf38402cf1267524bb8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 4 Apr 2019 17:21:09 -0700
Subject: [PATCH 0235/1765] lib: Optimize TLB flush IPIs

Simulatenous requests for tlbflush IPIs can have overlapping address
ranges.

Ignore if address range is same or within already existing fifo entries.
Update the tlb flush info in fifo directly if the one of the existing
entry lies within the new flush request.
Delete all entries if flush all request is recieved for the vma.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi_ipi.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index cc61dbd5326..f65f6368fa8 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -20,12 +20,79 @@
 #include <sbi/sbi_timer.h>
 #include <plat/string.h>
 
+static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
+					     struct sbi_tlb_info *next)
+{
+	int curr_end;
+	int next_end;
+	int ret = SBI_FIFO_UNCHANGED;
+
+	if (!curr || !next)
+		return ret;
+
+	next_end = next->start + next->size;
+	curr_end = curr->start + curr->size;
+	if (next->start <= curr->start && next_end > curr_end) {
+		curr->start = next->start;
+		curr->size = next->size;
+		ret = SBI_FIFO_UPDATED;
+	} else if (next->start >= curr->start &&
+		   next_end <= curr_end) {
+		ret = SBI_FIFO_SKIP;
+	}
+
+	return ret;
+}
+
+/**
+ * Call back to decide if an inplace fifo update is required or next entry can
+ * can be skipped. Here are the different cases that are being handled.
+ *
+ * Case1:
+ *	if next flush request range lies within one of the existing entry, skip
+ *	the next entry.
+ * Case2:
+ *	if flush request range in current fifo entry lies within next flush
+ *	request, update the current entry.
+ * Case3:
+	if a complete vma flush is requested, then all entries can be deleted
+	and new request can be enqueued. This will not be done for ASID case
+	as that means we have to iterate again in the fifo to figure out which
+	entries belong to that ASID.
+ */
+int sbi_tlb_fifo_update_cb(void *in, void *data)
+{
+	struct sbi_tlb_info *curr;
+	struct sbi_tlb_info *next;
+	int ret = SBI_FIFO_UNCHANGED;
+
+	if (!in && !!data)
+		return ret;
+
+	curr = (struct sbi_tlb_info *) data;
+	next = (struct sbi_tlb_info *) in;
+	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
+	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
+		if (next->asid == curr->asid)
+			ret = __sbi_tlb_fifo_range_check(curr, next);
+	} else if (next->type == SBI_TLB_FLUSH_VMA &&
+		   curr->type == SBI_TLB_FLUSH_VMA) {
+		if (next->size == SBI_TLB_FLUSH_ALL)
+			ret = SBI_FIFO_RESET;
+		else
+			ret = __sbi_tlb_fifo_range_check(curr, next);
+	}
+
+	return ret;
+}
+
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 			u32 event, void *data)
 {
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_fifo *ipi_tlb_fifo;
+	int ret = SBI_FIFO_UNCHANGED;
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
@@ -37,6 +104,11 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
 		ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
+		ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
+					   sbi_tlb_fifo_update_cb);
+		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
+			goto done;
+		}
 		while(sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
 			/**
 			 * For now, Busy loop until there is space in the fifo.
@@ -55,6 +127,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 	sbi_platform_ipi_send(plat, hartid);
 	if (event != SBI_IPI_EVENT_SOFT)
 		sbi_platform_ipi_sync(plat, hartid);
+done:
 
 	return 0;
 }

From 743e8ae6e7b7ae5b975cef3b028baefcacff80a8 Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Sun, 14 Apr 2019 20:47:17 +0200
Subject: [PATCH 0236/1765] docs: qemu/virt platform documentation fixes and
 updates

- Correct the payload address in the RV64 examples that use
  fw_jump.elf.

- Change the qemu console configuration in the examples from
  "-display none -serial stdio" to "-nographic". This results in
  qemu handing down a CTRL-C on the emulated console to the VM
  instead of terminating the qemu process.

- Provide examples for RV32.

- Various text corrections.

Signed-off-by: Karsten Merker <merker@debian.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/platform/qemu_virt.md | 91 +++++++++++++++++++++++++++++++++-----
 1 file changed, 80 insertions(+), 11 deletions(-)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 32575f96ec5..27efeabd939 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -1,18 +1,18 @@
 QEMU RISC-V Virt Machine Platform
 =================================
 
-The **QEMU RISC-V Virt Machine** is virtual platform created for RISC-V
-software development and testing. It is also referred as
+The **QEMU RISC-V Virt Machine** is a virtual platform created for RISC-V
+software development and testing. It is also referred to as
 *QEMU RISC-V VirtIO machine* because it uses VirtIO devices for network,
 storage, and other types of IO.
 
-To build platform specific library and firmwares, provide the
+To build the platform-specific library and firmware images, provide the
 *PLATFORM=qemu/virt* parameter to the top level `make` command.
 
 Platform Options
 ----------------
 
-The *QEMU RISC-V Virt Machine* platform does not have any platform specific
+The *QEMU RISC-V Virt Machine* platform does not have any platform-specific
 options.
 
 Execution on QEMU RISC-V 64bit
@@ -27,7 +27,7 @@ make PLATFORM=qemu/virt
 
 Run:
 ```
-qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+qemu-system-riscv64 -M virt -m 256M -nographic \
 	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
 ```
 
@@ -43,19 +43,19 @@ make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 
 Run:
 ```
-qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+qemu-system-riscv64 -M virt -m 256M -nographic \
 	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
 ```
 or
 ```
-qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+qemu-system-riscv64 -M virt -m 256M -nographic \
 	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80400000
+	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
 ```
 
 **Linux Kernel Payload**
 
-Note: We assume that Linux kernel is compiled using
+Note: We assume that the Linux kernel is compiled using
 *arch/riscv/configs/defconfig*.
 
 Build:
@@ -65,7 +65,76 @@ make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/
 
 Run:
 ```
-qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+qemu-system-riscv64 -M virt -m 256M -nographic \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf \
+	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
+	-device virtio-blk-device,drive=hd0 \
+	-append "root=/dev/vda rw console=ttyS0"
+```
+or
+```
+qemu-system-riscv64 -M virt -m 256M -nographic \
+	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
+	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 \
+	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
+	-device virtio-blk-device,drive=hd0 \
+	-append "root=/dev/vda rw console=ttyS0"
+```
+
+
+Execution on QEMU RISC-V 32bit
+------------------------------
+
+**No Payload Case**
+
+Build:
+```
+make PLATFORM=qemu/virt
+```
+
+Run:
+```
+qemu-system-riscv32 -M virt -m 256M -nographic \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+```
+
+**U-Boot Payload**
+
+Note: the command line examples here assume that U-Boot was compiled using
+the `qemu-riscv32_smode_defconfig` configuration.
+
+Build:
+```
+make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+```
+
+Run:
+```
+qemu-system-riscv32 -M virt -m 256M -nographic \
+	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+```
+or
+```
+qemu-system-riscv32 -M virt -m 256M -nographic \
+	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
+	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80400000
+```
+
+**Linux Kernel Payload**
+
+Note: We assume that the Linux kernel is compiled using
+*arch/riscv/configs/rv32_defconfig* (kernel 5.1 and newer)
+respectively using *arch/riscv/configs/defconfig* plus setting
+CONFIG_ARCH_RV32I=y (kernel 5.0 and older).
+
+Build:
+```
+make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Run:
+```
+qemu-system-riscv32 -M virt -m 256M -nographic \
 	-kernel build/platform/qemu/virt/firmware/fw_payload.elf \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
@@ -73,7 +142,7 @@ qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
 ```
 or
 ```
-qemu-system-riscv64 -M virt -m 256M -display none -serial stdio \
+qemu-system-riscv32 -M virt -m 256M -nographic \
 	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
 	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80400000 \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \

From b2cd5fda61d7dfd553784f5cab529d9effbd35dc Mon Sep 17 00:00:00 2001
From: Anup Pate <anup.patel@wdc.com>
Date: Mon, 15 Apr 2019 09:14:53 +0530
Subject: [PATCH 0237/1765] top: Add CONTRIBUTORS.md file

We add CONTRIBUTORS.md file to provide a list of individuals and
organizations actively contributing to the OpenSBI project.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 CONTRIBUTORS.md | 7 +++++++
 COPYING.BSD     | 4 ++--
 README.md       | 7 +++++--
 3 files changed, 14 insertions(+), 4 deletions(-)
 create mode 100644 CONTRIBUTORS.md

diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md
new file mode 100644
index 00000000000..db557b67b20
--- /dev/null
+++ b/CONTRIBUTORS.md
@@ -0,0 +1,7 @@
+
+List of OpenSBI Contributors (Alphabetically sorted)
+====================================================
+
+* **[Western Digital Corporation](https://www.wdc.com/)**
+  * Project initiator and maintainer
+  * Copyright (c) 2019 Western Digital Corporation or its affiliates
diff --git a/COPYING.BSD b/COPYING.BSD
index 17ee3ae4bb0..26972c8a46f 100644
--- a/COPYING.BSD
+++ b/COPYING.BSD
@@ -1,7 +1,8 @@
 The 2-Clause BSD License
 SPDX short identifier: BSD-2-Clause
 
-Copyright (c) 2019 Western Digital Corporation or its affiliates.
+Copyright (c) 2019 Western Digital Corporation or its affiliates and other
+contributors.
 
 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions are met:
@@ -22,4 +23,3 @@ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
diff --git a/README.md b/README.md
index 05f2130eca8..7b5b225e9cb 100644
--- a/README.md
+++ b/README.md
@@ -157,7 +157,7 @@ files where the reused code is present.
 2. Some source file for the Kendryte/k210 platform code are based on code from
    the Kendryte [standalone SDK] available on github. These files retain the
    original copyright and license of the Kendryte standalone SDK project and
-   are licensed under the terms of the Apache License, Version 2.0. 
+   are licensed under the terms of the Apache License, Version 2.0.
 
 See also the [third party notices] file for more information.
 
@@ -168,6 +168,9 @@ The OpenSBI project encourages and welcomes contributions. Contributions should
 follow the rules described in OpenSBI [Contribution Guideline] document.
 In particular, all patches sent should contain a Signed-off-by tag.
 
+The [Contributors List] document provides a list of individuals and
+organizations actively contributing to the OpenSBI project.
+
 Documentation
 -------------
 
@@ -226,6 +229,7 @@ make I=<install_directory> install_docs
 [COPYING.BSD]: COPYING.BSD
 [SPDX]: http://spdx.org/licenses/
 [Contribution Guideline]: docs/contributing.md
+[Contributors List]: CONTRIBUTORS.md
 [Library Usage]: docs/library_usage.md
 [Platform Support Guide]: docs/platform_guide.md
 [Platform Documentation]: docs/platform/platform.md
@@ -233,4 +237,3 @@ make I=<install_directory> install_docs
 [Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
 [standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
 [third party notices]: ThirdPartyNotices.md
-

From 194dbbe5a13dff2255411c26d249f3ad4ef42c0b Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 11 Apr 2019 10:46:27 -0700
Subject: [PATCH 0238/1765] doc: Update docs as per latest kernel/u-boot
 status.

All dependant patches are merged in U-Boot and Linux kernel now.
Update the unleashed guide to reflect that and fix the documentation
about tftp loading path as well.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/platform/sifive_fu540.md | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 286abdda2dc..96be73408c4 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -23,13 +23,8 @@ This will let the board boot only hart1 instead of default 1-4.
 Building SiFive Fu540 Platform
 -----------------------------
 
-As of this writing, the required Linux kernel and U-Boot patches are not
-accepted in mainline. Please follow the below instructions to cherry-pick
-them into your repository.
-
-[U-Boot patches](../firmware/payload_uboot.md)
-
-[Linux kernel patches](../firmware/payload_linux.md)
+In order to boot SMP Linux in U-Boot, Linux kernel higher than v.5.1-rc1 and
+latest U-Boot(at least HEAD should ffb269ab30db or after) should be used.
 
 **Linux Kernel Payload**
 
@@ -54,6 +49,13 @@ Without SMP support enabled in U-Boot:
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FU540_ENABLED_HART_MASK=0x02
 ```
 
+Generate the uImage from Linux Image.
+```
+mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
+		<linux_build_directory>/arch/riscv/boot/Image \
+		<linux_build_directory>/arch/riscv/boot/uImage
+```
+
 **U-Boot & Linux Kernel as a single payload**
 
 A single monolithic image containing both U-Boot & Linux can also be used if network boot setup is
@@ -62,7 +64,7 @@ not available.
 1. Generate the uImage from Linux Image.
 ```
 mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
-		<linux_build_directory>arch/riscv/boot/Image \
+		<linux_build_directory>/arch/riscv/boot/Image \
 		<linux_build_directory>/arch/riscv/boot/uImage
 ```
 
@@ -148,7 +150,7 @@ setenv gatewayip <ipaddress of the network gateway>
 5. Load the Linux kernel image from the tftp server.
 
 ```
-tftpboot ${kernel_addr_r} /sifive/fu540/uImage
+tftpboot ${kernel_addr_r} <uImage path in tftpboot directory>
 ```
 
 6. Load the ramdisk image from the tftp server. This is only required if ramdisk
@@ -156,7 +158,7 @@ tftpboot ${kernel_addr_r} /sifive/fu540/uImage
    of the kernel or loaded from an external storage by kernel.
 
 ```
-tftpboot ${ramdisk_addr_r} /sifive/fu540/uRamdisk
+tftpboot ${ramdisk_addr_r} <ramdisk path in tftpboot directory>
 ```
 7. Set the boot command-line arguments.
 

From 804b997ed415001097803e4b537fd63d043874b9 Mon Sep 17 00:00:00 2001
From: Nick Kossifidis <mickflemm@gmail.com>
Date: Tue, 16 Apr 2019 20:21:55 +0300
Subject: [PATCH 0239/1765] lib: Redirect unhandled traps from non-M modes to S
 mode

In case we didn't handle a trap with one of the available
handlers, check if the trap comes from S or U mode and
redirect it to S mode's trap handler.

Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
---
 lib/sbi_trap.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index ea5ba6b5555..a8c9b364c4d 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -142,6 +142,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
+	ulong mtval = csr_read(CSR_MTVAL);
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		mcause &= ~(1UL << (__riscv_xlen - 1));
@@ -178,6 +179,8 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		msg = "ecall handler failed";
 		break;
 	default:
+		/* If the trap came from S or U mode, redirect it there */
+		rc = sbi_trap_redirect(regs, scratch, regs->mepc, mcause, mtval);
 		break;
 	};
 

From 1e43ce75ffbe1a107b2d8a1b2957747029446f7d Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Wed, 10 Apr 2019 17:41:37 -0700
Subject: [PATCH 0240/1765] top: add .clang-format

Add a clang-format to automate consistent code formatting.

Automating coding style reformatting removes a lot of manual
checkpatch-type fixups, and can easily be implemented as a linter in
code review environments.

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 .clang-format | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 .clang-format

diff --git a/.clang-format b/.clang-format
new file mode 100644
index 00000000000..c80c0aa985f
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,16 @@
+AlignConsecutiveAssignments: true
+AlignEscapedNewlines: Left
+AlignTrailingComments: true
+AllowShortFunctionsOnASingleLine: None
+BraceWrapping:
+  AfterFunction: true
+BreakBeforeBraces: Custom
+BreakStringLiterals: false
+ContinuationIndentWidth: 8
+Cpp11BracedListStyle: false
+IndentWidth: 8
+ReflowComments: false
+SortIncludes: false
+SpacesInContainerLiterals: false
+TabWidth: 8
+UseTab: Always

From 97fb8c0e3bcd4d7915ea35020e4d95999d389cd3 Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Wed, 10 Apr 2019 17:41:42 -0700
Subject: [PATCH 0241/1765] libfdt: don't try to clang-format

Add an empty clang-format to disable reformatting of imported code and
make it easier to merge in upstream changes of that project over time.

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 platform/common/libfdt/.clang-format | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 platform/common/libfdt/.clang-format

diff --git a/platform/common/libfdt/.clang-format b/platform/common/libfdt/.clang-format
new file mode 100644
index 00000000000..e3845288a2a
--- /dev/null
+++ b/platform/common/libfdt/.clang-format
@@ -0,0 +1 @@
+DisableFormat: true

From fbf986ac2a0b926ae97e6796b87e366610d7589e Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Wed, 10 Apr 2019 17:41:46 -0700
Subject: [PATCH 0242/1765] all: Annotate some tables to have clang-format
 leave them alone

One of the shortcomings of clang-format is that it doesn't allow
for aligned define tables, which is used for a number of constants.

Add annotation to disable the automatic formatting where needed.

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 include/sbi/riscv_asm.h              | 4 ++++
 include/sbi/riscv_barrier.h          | 4 ++++
 include/sbi/riscv_encoding.h         | 3 +++
 include/sbi/riscv_io.h               | 5 +++++
 include/sbi/sbi_const.h              | 4 ++++
 include/sbi/sbi_ecall_interface.h    | 4 ++++
 include/sbi/sbi_error.h              | 4 ++++
 include/sbi/sbi_ipi.h                | 4 ++++
 include/sbi/sbi_scratch.h            | 4 ++++
 include/sbi/sbi_trap.h               | 4 ++++
 include/sbi/sbi_types.h              | 4 ++++
 platform/common/serial/sifive-uart.c | 4 ++++
 platform/common/serial/uart8250.c    | 4 ++++
 platform/kendryte/k210/platform.h    | 5 ++++-
 platform/kendryte/k210/uarths.h      | 4 ++++
 platform/qemu/sifive_u/platform.c    | 4 ++++
 platform/qemu/virt/platform.c        | 4 ++++
 platform/sifive/fu540/platform.c     | 4 ++++
 18 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 9648629bd87..39a76159c4e 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -12,6 +12,8 @@
 
 #include <sbi/riscv_encoding.h>
 
+/* clang-format off */
+
 #ifdef __ASSEMBLY__
 #define __ASM_STR(x)	x
 #else
@@ -78,6 +80,8 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
+/* clang-format on */
+
 #ifndef __ASSEMBLY__
 
 #define csr_swap(csr, val)					\
diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h
index ce4b5d15704..14ebeccd736 100644
--- a/include/sbi/riscv_barrier.h
+++ b/include/sbi/riscv_barrier.h
@@ -10,6 +10,8 @@
 #ifndef __RISCV_BARRIER_H__
 #define __RISCV_BARRIER_H__
 
+/* clang-format off */
+
 #define RISCV_ACQUIRE_BARRIER		"\tfence r , rw\n"
 #define RISCV_RELEASE_BARRIER		"\tfence rw,  w\n"
 
@@ -37,6 +39,8 @@
 /* CPU relax for busy loop */
 #define cpu_relax()		asm volatile ("" : : : "memory")
 
+/* clang-format on */
+
 #define __smp_store_release(p, v)				\
 do {								\
 	RISCV_FENCE(rw,w);					\
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 1448f58c2ed..5a5086a009e 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -14,6 +14,7 @@
 
 /* TODO: Make constants usable in assembly with _AC() macro */
 
+/* clang-format off */
 #define MSTATUS_UIE			0x00000001
 #define MSTATUS_SIE			0x00000002
 #define MSTATUS_HIE			0x00000004
@@ -561,4 +562,6 @@
 					 (s32)(((insn) >> 7) & 0x1f))
 #define MASK_FUNCT3			0x7000
 
+/* clang-format on */
+
 #endif
diff --git a/include/sbi/riscv_io.h b/include/sbi/riscv_io.h
index ea29c44d89a..e4bdc27754e 100644
--- a/include/sbi/riscv_io.h
+++ b/include/sbi/riscv_io.h
@@ -70,6 +70,9 @@ static inline u64 __raw_readq(const volatile void *addr)
 #endif
 
 /* FIXME: These are now the same as asm-generic */
+
+/* clang-format off */
+
 #define __io_rbr()		do {} while (0)
 #define __io_rar()		do {} while (0)
 #define __io_rbw()		do {} while (0)
@@ -106,4 +109,6 @@ static inline u64 __raw_readq(const volatile void *addr)
 #define writeq(v,c)	({ __io_bw(); __raw_writeq((v),(c)); __io_aw(); })
 #endif
 
+/* clang-format on */
+
 #endif
diff --git a/include/sbi/sbi_const.h b/include/sbi/sbi_const.h
index e90b75231f7..423d2cfa182 100644
--- a/include/sbi/sbi_const.h
+++ b/include/sbi/sbi_const.h
@@ -19,6 +19,8 @@
  * leave it unchanged in asm.
  */
 
+/* clang-format off */
+
 #ifdef __ASSEMBLY__
 #define _AC(X,Y)	X
 #define _AT(T,X)	X
@@ -40,4 +42,6 @@
 #define	__STR(s)	#s
 #define	STRINGIFY(s)	__STR(s)
 
+/* clang-format on */
+
 #endif
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 2bf004d9119..8e79e24d9e0 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_ECALL_INTERFACE_H__
 #define __SBI_ECALL_INTERFACE_H__
 
+/* clang-format off */
+
 #define SBI_ECALL_SET_TIMER			0
 #define SBI_ECALL_CONSOLE_PUTCHAR		1
 #define SBI_ECALL_CONSOLE_GETCHAR		2
@@ -20,6 +22,8 @@
 #define SBI_ECALL_REMOTE_SFENCE_VMA_ASID	7
 #define SBI_ECALL_SHUTDOWN			8
 
+/* clang-format on */
+
 #define SBI_ECALL(__num, __a0, __a1, __a2) ({				\
 	register unsigned long a0 asm ("a0") = (unsigned long)(__a0);	\
 	register unsigned long a1 asm ("a1") = (unsigned long)(__a1);	\
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 300ee74332f..39a3864d995 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_ERROR_H__
 #define __SBI_ERROR_H__
 
+/* clang-format off */
+
 #define SBI_OK		0
 #define SBI_EUNKNOWN	-1
 #define SBI_EFAIL	-2
@@ -23,4 +25,6 @@
 #define SBI_EILL	-10
 #define SBI_ENOSPC	-11
 
+/* clang-format on */
+
 #endif
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 609598e4250..f68e8fe408d 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -12,12 +12,16 @@
 
 #include <sbi/sbi_types.h>
 
+/* clang-format off */
+
 #define SBI_IPI_EVENT_SOFT			0x1
 #define SBI_IPI_EVENT_FENCE_I			0x2
 #define SBI_IPI_EVENT_SFENCE_VMA		0x4
 #define SBI_IPI_EVENT_SFENCE_VMA_ASID		0x8
 #define SBI_IPI_EVENT_HALT			0x10
 
+/* clang-format on */
+
 #define SBI_TLB_FIFO_NUM_ENTRIES 4
 enum sbi_tlb_info_types {
 	SBI_TLB_FLUSH_VMA,
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index a41549cc983..fabbab0191d 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -12,6 +12,8 @@
 
 #include <sbi/riscv_asm.h>
 
+/* clang-format off */
+
 /** Offset of fw_start member in sbi_scratch */
 #define SBI_SCRATCH_FW_START_OFFSET		(0 * __SIZEOF_POINTER__)
 /** Offset of fw_size member in sbi_scratch */
@@ -43,6 +45,8 @@
 /** Maximum size of sbi_scratch and sbi_ipi_data */
 #define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
 
+/* clang-format on */
+
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 504e7dd7060..e2a52b54874 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_TRAP_H__
 #define __SBI_TRAP_H__
 
+/* clang-format off */
+
 /** Index of zero member in sbi_trap_regs */
 #define SBI_TRAP_REGS_zero			0
 /** Index of ra member in sbi_trap_regs */
@@ -81,6 +83,8 @@
 /** Last member index in sbi_trap_regs */
 #define SBI_TRAP_REGS_last			34
 
+/* clang-format on */
+
 /** Get offset of member with name 'x' in sbi_trap_regs */
 #define SBI_TRAP_REGS_OFFSET(x)			\
 				((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__)
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 40909f65cc3..f51d8881164 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_TYPES_H__
 #define __SBI_TYPES_H__
 
+/* clang-format off */
+
 typedef char			s8;
 typedef unsigned char		u8;
 typedef unsigned char		uint8_t;
@@ -58,4 +60,6 @@ typedef unsigned long		physical_size_t;
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 
+/* clang-format on */
+
 #endif
diff --git a/platform/common/serial/sifive-uart.c b/platform/common/serial/sifive-uart.c
index 08cc485c51b..9d9490c30a9 100644
--- a/platform/common/serial/sifive-uart.c
+++ b/platform/common/serial/sifive-uart.c
@@ -11,6 +11,8 @@
 #include <sbi/sbi_console.h>
 #include <plat/serial/sifive-uart.h>
 
+/* clang-format off */
+
 #define UART_REG_TXFIFO		0
 #define UART_REG_RXFIFO		1
 #define UART_REG_TXCTRL		2
@@ -25,6 +27,8 @@
 #define UART_TXCTRL_TXEN	0x1
 #define UART_RXCTRL_RXEN	0x1
 
+/* clang-format on */
+
 static volatile void *uart_base;
 static u32 uart_in_freq;
 static u32 uart_baudrate;
diff --git a/platform/common/serial/uart8250.c b/platform/common/serial/uart8250.c
index ce0f4ca40b7..ba67c73dea2 100644
--- a/platform/common/serial/uart8250.c
+++ b/platform/common/serial/uart8250.c
@@ -10,6 +10,8 @@
 #include <sbi/riscv_io.h>
 #include <plat/serial/uart8250.h>
 
+/* clang-format off */
+
 #define UART_RBR_OFFSET		0	/* In:  Recieve Buffer Register */
 #define UART_THR_OFFSET		0	/* Out: Transmitter Holding Register */
 #define UART_DLL_OFFSET		0	/* Out: Divisor Latch Low */
@@ -34,6 +36,8 @@
 #define UART_LSR_DR		0x01    /* Receiver data ready */
 #define UART_LSR_BRK_ERROR_BITS	0x1E    /* BI, FE, PE, OE bits */
 
+/* clang-format on */
+
 static volatile void *uart8250_base;
 static u32 uart8250_in_freq;
 static u32 uart8250_baudrate;
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 982d942e2a3..8694ea820e4 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -22,6 +22,8 @@
 
 #include <sbi/riscv_asm.h>
 
+/* clang-format off */
+
 #define K210_HART_COUNT		2
 #define K210_HART_STACK_SIZE	4096
 
@@ -171,5 +173,6 @@ enum plic_irq {
 #define PLIC_NUM_SOURCES    (IRQN_MAX - 1)
 #define PLIC_NUM_PRIORITIES (7)
 
-#endif /* _PLATFORM_H_ */
+/* clang-format on */
 
+#endif /* _PLATFORM_H_ */
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
index ad3308ce812..3bfb8d56bc6 100644
--- a/platform/kendryte/k210/uarths.h
+++ b/platform/kendryte/k210/uarths.h
@@ -50,6 +50,8 @@
 
 #include <sbi/sbi_types.h>
 
+/* clang-format off */
+
 /* Base register address */
 #define UARTHS_BASE_ADDR	(0x38000000U)
 
@@ -74,6 +76,8 @@
 #define UARTHS_IP_TXWM		0x01
 #define UARTHS_IP_RXWM		0x02
 
+/* clang-format on */
+
 struct uarths_txdata {
 	/* Bits [7:0] is data */
 	u32 data : 8;
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index cc8993d958f..9ea090a254d 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -15,6 +15,8 @@
 #include <plat/serial/sifive-uart.h>
 #include <plat/sys/clint.h>
 
+/* clang-format off */
+
 #define SIFIVE_U_HART_COUNT			1
 #define SIFIVE_U_HART_STACK_SIZE		8192
 
@@ -30,6 +32,8 @@
 #define SIFIVE_U_UART0_ADDR			0x10013000
 #define SIFIVE_U_UART1_ADDR			0x10023000
 
+/* clang-format on */
+
 static int sifive_u_final_init(bool cold_boot)
 {
 	void *fdt;
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index fd4d82992a9..df62991f356 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -17,6 +17,8 @@
 #include <plat/serial/uart8250.h>
 #include <plat/sys/clint.h>
 
+/* clang-format off */
+
 #define VIRT_HART_COUNT			8
 #define VIRT_HART_STACK_SIZE		8192
 
@@ -34,6 +36,8 @@
 #define VIRT_UART_BAUDRATE		115200
 #define VIRT_UART_SHIFTREG_ADDR		1843200
 
+/* clang-format on */
+
 static int virt_final_init(bool cold_boot)
 {
 	void *fdt;
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 325beba882f..9042d60242d 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -19,6 +19,8 @@
 #include <plat/serial/sifive-uart.h>
 #include <plat/sys/clint.h>
 
+/* clang-format off */
+
 #define FU540_HART_COUNT			5
 #define FU540_HART_STACK_SIZE			8192
 
@@ -50,6 +52,8 @@
 #define FU540_PRCI_CLKMUXSTATUSREG		0x002C
 #define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL	(0x1 << 1)
 
+/* clang-format on */
+
 static void fu540_modify_dt(void *fdt)
 {
 	u32 i, size;

From 10baa64c02f6746fd506136e0693aa2d592574fb Mon Sep 17 00:00:00 2001
From: Olof Johansson <olof@lixom.net>
Date: Wed, 10 Apr 2019 17:41:52 -0700
Subject: [PATCH 0243/1765] all: run clang-format and update checked-in files

Noisy commit, no functional changes.

Generated with an current upstream clang-format and:

clang-format -i $(find . -name \*.[ch])

Signed-off-by: Olof Johansson <olof@lixom.net>
---
 firmware/payloads/test_main.c                 |   8 +-
 include/sbi/riscv_asm.h                       | 141 +++++------
 include/sbi/riscv_atomic.h                    |   9 +-
 include/sbi/riscv_barrier.h                   |  24 +-
 include/sbi/riscv_fp.h                        |  71 ++++--
 include/sbi/riscv_io.h                        |  16 +-
 include/sbi/riscv_locks.h                     |  11 +-
 include/sbi/riscv_unpriv.h                    | 106 ++++-----
 include/sbi/sbi_bitops.h                      |   2 +-
 include/sbi/sbi_bits.h                        |  11 +-
 include/sbi/sbi_console.h                     |   5 +-
 include/sbi/sbi_ecall.h                       |   3 +-
 include/sbi/sbi_ecall_interface.h             |  36 +--
 include/sbi/sbi_emulate_csr.h                 |  12 +-
 include/sbi/sbi_fifo.h                        |   6 +-
 include/sbi/sbi_hart.h                        |   7 +-
 include/sbi/sbi_ipi.h                         |   4 +-
 include/sbi/sbi_platform.h                    |  65 +++---
 include/sbi/sbi_scratch.h                     |  22 +-
 include/sbi/sbi_system.h                      |   8 +-
 include/sbi/sbi_trap.h                        |  11 +-
 include/sbi/sbi_version.h                     |   4 +-
 lib/riscv_asm.c                               |  49 ++--
 lib/riscv_atomic.c                            | 219 +++++++++---------
 lib/riscv_locks.c                             |   9 +-
 lib/sbi_console.c                             | 115 ++++-----
 lib/sbi_ecall.c                               |  26 +--
 lib/sbi_emulate_csr.c                         |  20 +-
 lib/sbi_fifo.c                                |  20 +-
 lib/sbi_hart.c                                |  37 ++-
 lib/sbi_illegal_insn.c                        |  40 ++--
 lib/sbi_init.c                                |  29 ++-
 lib/sbi_ipi.c                                 |  67 +++---
 lib/sbi_misaligned_ldst.c                     |  72 +++---
 lib/sbi_system.c                              |  14 +-
 lib/sbi_timer.c                               |  23 +-
 lib/sbi_trap.c                                |  96 ++++----
 platform/common/include/plat/irqchip/plic.h   |   6 +-
 .../common/include/plat/serial/sifive-uart.h  |   3 +-
 .../common/include/plat/serial/uart8250.h     |   5 +-
 platform/common/include/plat/string.h         |   8 +-
 platform/common/include/plat/tinyfdt.h        |  18 +-
 platform/common/irqchip/plic.c                |  50 ++--
 platform/common/libc/string.c                 |  21 +-
 platform/common/libfdt/libfdt.h               |   2 +-
 platform/common/libfdt/libfdt_env.h           |   2 +-
 platform/common/serial/sifive-uart.c          |  10 +-
 platform/common/serial/uart8250.c             |  14 +-
 platform/common/sys/clint.c                   |  22 +-
 platform/common/tinyfdt.c                     |  86 +++----
 platform/kendryte/k210/platform.c             |  35 ++-
 platform/kendryte/k210/sysctl.c               |   9 +-
 platform/kendryte/k210/sysctl.h               |   2 +-
 platform/kendryte/k210/uarths.c               |  20 +-
 platform/kendryte/k210/uarths.h               |   5 +-
 platform/qemu/sifive_u/platform.c             |  58 +++--
 platform/qemu/virt/platform.c                 |  68 +++---
 platform/sifive/fu540/platform.c              |  77 +++---
 platform/template/platform.c                  |  34 ++-
 59 files changed, 956 insertions(+), 1017 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index c96ed87251f..04a5be5cc9e 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -9,10 +9,10 @@
 
 #include <sbi/sbi_ecall_interface.h>
 
-#define wfi()						\
-do {							\
-	__asm__ __volatile__ ("wfi" ::: "memory");	\
-} while (0)
+#define wfi()                                             \
+	do {                                              \
+		__asm__ __volatile__("wfi" ::: "memory"); \
+	} while (0)
 
 void test_main(unsigned long a0, unsigned long a1)
 {
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 39a76159c4e..357bcb4fdcb 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -84,74 +84,81 @@
 
 #ifndef __ASSEMBLY__
 
-#define csr_swap(csr, val)					\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
-			      : "=r" (__v) : "rK" (__v)		\
-			      : "memory");			\
-	__v;							\
-})
-
-#define csr_read(csr)						\
-({								\
-	register unsigned long __v;				\
-	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)	\
-			      : "=r" (__v) :			\
-			      : "memory");			\
-	__v;							\
-})
-
-#define csr_write(csr, val)					\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"	\
-			      : : "rK" (__v)			\
-			      : "memory");			\
-})
-
-#define csr_read_set(csr, val)					\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
-			      : "=r" (__v) : "rK" (__v)		\
-			      : "memory");			\
-	__v;							\
-})
-
-#define csr_set(csr, val)					\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"	\
-			      : : "rK" (__v)			\
-			      : "memory");			\
-})
-
-#define csr_read_clear(csr, val)				\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
-			      : "=r" (__v) : "rK" (__v)		\
-			      : "memory");			\
-	__v;							\
-})
-
-#define csr_clear(csr, val)					\
-({								\
-	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"	\
-			      : : "rK" (__v)			\
-			      : "memory");			\
-})
+#define csr_swap(csr, val)                                              \
+	({                                                              \
+		unsigned long __v = (unsigned long)(val);               \
+		__asm__ __volatile__("csrrw %0, " __ASM_STR(csr) ", %1" \
+				     : "=r"(__v)                        \
+				     : "rK"(__v)                        \
+				     : "memory");                       \
+		__v;                                                    \
+	})
+
+#define csr_read(csr)                                           \
+	({                                                      \
+		register unsigned long __v;                     \
+		__asm__ __volatile__("csrr %0, " __ASM_STR(csr) \
+				     : "=r"(__v)                \
+				     :                          \
+				     : "memory");               \
+		__v;                                            \
+	})
+
+#define csr_write(csr, val)                                        \
+	({                                                         \
+		unsigned long __v = (unsigned long)(val);          \
+		__asm__ __volatile__("csrw " __ASM_STR(csr) ", %0" \
+				     :                             \
+				     : "rK"(__v)                   \
+				     : "memory");                  \
+	})
+
+#define csr_read_set(csr, val)                                          \
+	({                                                              \
+		unsigned long __v = (unsigned long)(val);               \
+		__asm__ __volatile__("csrrs %0, " __ASM_STR(csr) ", %1" \
+				     : "=r"(__v)                        \
+				     : "rK"(__v)                        \
+				     : "memory");                       \
+		__v;                                                    \
+	})
+
+#define csr_set(csr, val)                                          \
+	({                                                         \
+		unsigned long __v = (unsigned long)(val);          \
+		__asm__ __volatile__("csrs " __ASM_STR(csr) ", %0" \
+				     :                             \
+				     : "rK"(__v)                   \
+				     : "memory");                  \
+	})
+
+#define csr_read_clear(csr, val)                                        \
+	({                                                              \
+		unsigned long __v = (unsigned long)(val);               \
+		__asm__ __volatile__("csrrc %0, " __ASM_STR(csr) ", %1" \
+				     : "=r"(__v)                        \
+				     : "rK"(__v)                        \
+				     : "memory");                       \
+		__v;                                                    \
+	})
+
+#define csr_clear(csr, val)                                        \
+	({                                                         \
+		unsigned long __v = (unsigned long)(val);          \
+		__asm__ __volatile__("csrc " __ASM_STR(csr) ", %0" \
+				     :                             \
+				     : "rK"(__v)                   \
+				     : "memory");                  \
+	})
 
 unsigned long csr_read_num(int csr_num);
 
 void csr_write_num(int csr_num, unsigned long val);
 
-#define wfi()							\
-do {								\
-	__asm__ __volatile__ ("wfi" ::: "memory");		\
-} while (0)
+#define wfi()                                             \
+	do {                                              \
+		__asm__ __volatile__("wfi" ::: "memory"); \
+	} while (0)
 
 static inline int misa_extension(char ext)
 {
@@ -177,11 +184,11 @@ static inline void misa_string(char *out, unsigned int out_sz)
 	out++;
 }
 
-int pmp_set(unsigned int n, unsigned long prot,
-	    unsigned long addr, unsigned long log2len);
+int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
+	    unsigned long log2len);
 
-int pmp_get(unsigned int n, unsigned long *prot_out,
-	    unsigned long *addr_out, unsigned long *log2len_out);
+int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
+	    unsigned long *log2len_out);
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 215191ef099..40efb68d902 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -14,11 +14,12 @@ typedef struct {
 	volatile long counter;
 } atomic_t;
 
-#define ATOMIC_INIT(_lptr, val)		\
-	(_lptr)->counter = (val)
+#define ATOMIC_INIT(_lptr, val) (_lptr)->counter = (val)
 
-#define ATOMIC_INITIALIZER(val)		\
-	{ .counter = (val), }
+#define ATOMIC_INITIALIZER(val)   \
+	{                         \
+		.counter = (val), \
+	}
 
 long atomic_read(atomic_t *atom);
 
diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h
index 14ebeccd736..905ecb40fd2 100644
--- a/include/sbi/riscv_barrier.h
+++ b/include/sbi/riscv_barrier.h
@@ -41,17 +41,17 @@
 
 /* clang-format on */
 
-#define __smp_store_release(p, v)				\
-do {								\
-	RISCV_FENCE(rw,w);					\
-	*(p) = (v);						\
-} while (0)
-
-#define __smp_load_acquire(p)					\
-({								\
-	typeof(*p) ___p1 = *(p);				\
-	RISCV_FENCE(r,rw);					\
-	___p1;							\
-})
+#define __smp_store_release(p, v)   \
+	do {                        \
+		RISCV_FENCE(rw, w); \
+		*(p) = (v);         \
+	} while (0)
+
+#define __smp_load_acquire(p)            \
+	({                               \
+		typeof(*p) ___p1 = *(p); \
+		RISCV_FENCE(r, rw);      \
+		___p1;                   \
+	})
 
 #endif
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index 9e2e082fd15..a8d4c510df7 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -21,28 +21,49 @@
 
 #ifdef __riscv_flen
 
-#define GET_F32_REG(insn, pos, regs) ({ \
-  register s32 value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
-  ulong tmp; \
-  asm ("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
-  value; })
-#define SET_F32_REG(insn, pos, regs, val) ({ \
-  register u32 value asm("a0") = (val); \
-  ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
-  ulong tmp; \
-  asm volatile ("1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
+#define GET_F32_REG(insn, pos, regs)                                                                    \
+	({                                                                                              \
+		register s32 value asm("a0") =                                                          \
+			SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                              \
+		ulong tmp;                                                                              \
+		asm("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" \
+		    : "=&r"(tmp), "+&r"(value)::"t0");                                                  \
+		value;                                                                                  \
+	})
+#define SET_F32_REG(insn, pos, regs, val)                                                                   \
+	({                                                                                                  \
+		register u32 value asm("a0") = (val);                                                       \
+		ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                           \
+		ulong tmp;                                                                                  \
+		asm volatile(                                                                               \
+			"1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" \
+			: "=&r"(tmp)                                                                        \
+			: "r"(value), "r"(offset)                                                           \
+			: "t0");                                                                            \
+	})
 #define init_fp_reg(i) SET_F32_REG((i) << 3, 3, 0, 0)
-#define GET_F64_REG(insn, pos, regs) ({ \
-  register ulong value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
-  ulong tmp; \
-  asm ("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
-  sizeof(ulong) == 4 ? *(int64_t*)value : (int64_t)value; })
-#define SET_F64_REG(insn, pos, regs, val) ({ \
-  uint64_t __val = (val); \
-  register ulong value asm("a0") = sizeof(ulong) == 4 ? (ulong)&__val : (ulong)__val; \
-  ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
-  ulong tmp; \
-  asm volatile ("1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
+#define GET_F64_REG(insn, pos, regs)                                                                    \
+	({                                                                                              \
+		register ulong value asm("a0") =                                                        \
+			SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                              \
+		ulong tmp;                                                                              \
+		asm("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" \
+		    : "=&r"(tmp), "+&r"(value)::"t0");                                                  \
+		sizeof(ulong) == 4 ? *(int64_t *)value : (int64_t)value;                                \
+	})
+#define SET_F64_REG(insn, pos, regs, val)                                                                   \
+	({                                                                                                  \
+		uint64_t __val = (val);                                                                     \
+		register ulong value asm("a0") =                                                            \
+			sizeof(ulong) == 4 ? (ulong)&__val : (ulong)__val;                                  \
+		ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                           \
+		ulong tmp;                                                                                  \
+		asm volatile(                                                                               \
+			"1: auipc %0, %%pcrel_hi(put_f64_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" \
+			: "=&r"(tmp)                                                                        \
+			: "r"(value), "r"(offset)                                                           \
+			: "t0");                                                                            \
+	})
 #define GET_FCSR() csr_read(CSR_FCSR)
 #define SET_FCSR(value) csr_write(CSR_FCSR, (value))
 #define GET_FRM() csr_read(CSR_FRM)
@@ -50,7 +71,7 @@
 #define GET_FFLAGS() csr_read(CSR_FFLAGS)
 #define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value))
 
-#define SET_FS_DIRTY() ((void) 0)
+#define SET_FS_DIRTY() ((void)0)
 
 #else
 #error "Floating point emulation not supported.\n"
@@ -62,8 +83,10 @@
 #define GET_F64_RS1(insn, regs) (GET_F64_REG(insn, 15, regs))
 #define GET_F64_RS2(insn, regs) (GET_F64_REG(insn, 20, regs))
 #define GET_F64_RS3(insn, regs) (GET_F64_REG(insn, 27, regs))
-#define SET_F32_RD(insn, regs, val) (SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY())
-#define SET_F64_RD(insn, regs, val) (SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY())
+#define SET_F32_RD(insn, regs, val) \
+	(SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY())
+#define SET_F64_RD(insn, regs, val) \
+	(SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY())
 
 #define GET_F32_RS2C(insn, regs) (GET_F32_REG(insn, 2, regs))
 #define GET_F32_RS2S(insn, regs) (GET_F32_REG(RVC_RS2S(insn), 0, regs))
diff --git a/include/sbi/riscv_io.h b/include/sbi/riscv_io.h
index e4bdc27754e..49132328387 100644
--- a/include/sbi/riscv_io.h
+++ b/include/sbi/riscv_io.h
@@ -15,23 +15,23 @@
 
 static inline void __raw_writeb(u8 val, volatile void *addr)
 {
-	asm volatile("sb %0, 0(%1)" : : "r" (val), "r" (addr));
+	asm volatile("sb %0, 0(%1)" : : "r"(val), "r"(addr));
 }
 
 static inline void __raw_writew(u16 val, volatile void *addr)
 {
-	asm volatile("sh %0, 0(%1)" : : "r" (val), "r" (addr));
+	asm volatile("sh %0, 0(%1)" : : "r"(val), "r"(addr));
 }
 
 static inline void __raw_writel(u32 val, volatile void *addr)
 {
-	asm volatile("sw %0, 0(%1)" : : "r" (val), "r" (addr));
+	asm volatile("sw %0, 0(%1)" : : "r"(val), "r"(addr));
 }
 
 #if __riscv_xlen != 32
 static inline void __raw_writeq(u64 val, volatile void *addr)
 {
-	asm volatile("sd %0, 0(%1)" : : "r" (val), "r" (addr));
+	asm volatile("sd %0, 0(%1)" : : "r"(val), "r"(addr));
 }
 #endif
 
@@ -39,7 +39,7 @@ static inline u8 __raw_readb(const volatile void *addr)
 {
 	u8 val;
 
-	asm volatile("lb %0, 0(%1)" : "=r" (val) : "r" (addr));
+	asm volatile("lb %0, 0(%1)" : "=r"(val) : "r"(addr));
 	return val;
 }
 
@@ -47,7 +47,7 @@ static inline u16 __raw_readw(const volatile void *addr)
 {
 	u16 val;
 
-	asm volatile("lh %0, 0(%1)" : "=r" (val) : "r" (addr));
+	asm volatile("lh %0, 0(%1)" : "=r"(val) : "r"(addr));
 	return val;
 }
 
@@ -55,7 +55,7 @@ static inline u32 __raw_readl(const volatile void *addr)
 {
 	u32 val;
 
-	asm volatile("lw %0, 0(%1)" : "=r" (val) : "r" (addr));
+	asm volatile("lw %0, 0(%1)" : "=r"(val) : "r"(addr));
 	return val;
 }
 
@@ -64,7 +64,7 @@ static inline u64 __raw_readq(const volatile void *addr)
 {
 	u64 val;
 
-	asm volatile("ld %0, 0(%1)" : "=r" (val) : "r" (addr));
+	asm volatile("ld %0, 0(%1)" : "=r"(val) : "r"(addr));
 	return val;
 }
 #endif
diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h
index 4476319aa34..55da7c01c1a 100644
--- a/include/sbi/riscv_locks.h
+++ b/include/sbi/riscv_locks.h
@@ -14,13 +14,14 @@ typedef struct {
 	volatile long lock;
 } spinlock_t;
 
-#define __RISCV_SPIN_UNLOCKED			0
+#define __RISCV_SPIN_UNLOCKED 0
 
-#define SPIN_LOCK_INIT(_lptr)			\
-	(_lptr)->lock = __RISCV_SPIN_UNLOCKED
+#define SPIN_LOCK_INIT(_lptr) (_lptr)->lock = __RISCV_SPIN_UNLOCKED
 
-#define SPIN_LOCK_INITIALIZER			\
-	{ .lock = __RISCV_SPIN_UNLOCKED, }
+#define SPIN_LOCK_INITIALIZER                  \
+	{                                      \
+		.lock = __RISCV_SPIN_UNLOCKED, \
+	}
 
 int spin_lock_check(spinlock_t *lock);
 
diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index bd134b5b548..a2a585115eb 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -14,29 +14,30 @@
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_types.h>
 
-#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)			\
-static inline type load_##type(const type *addr)			\
-{									\
-	register ulong __mstatus asm ("a2");				\
-	type val;							\
-	asm ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"			\
-		#insn " %1, %2\n"					\
-		"csrw "STR(CSR_MSTATUS)", %0"				\
-	: "+&r" (__mstatus), "=&r" (val)				\
-	: "m" (*addr), "r" (MSTATUS_MPRV));				\
-	return val;							\
-}
+#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                        \
+	static inline type load_##type(const type *addr)                      \
+	{                                                                     \
+		register ulong __mstatus asm("a2");                           \
+		type val;                                                     \
+		asm("csrrs %0, " STR(CSR_MSTATUS) ", %3\n" #insn " %1, %2\n"  \
+						  "csrw " STR(                \
+							  CSR_MSTATUS) ", %0" \
+		    : "+&r"(__mstatus), "=&r"(val)                            \
+		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
+		return val;                                                   \
+	}
 
-#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn)			\
-static inline void store_##type(type *addr, type val)			\
-{									\
-	register ulong __mstatus asm ("a3");				\
-	asm volatile ("csrrs %0, "STR(CSR_MSTATUS)", %3\n"		\
-		#insn " %1, %2\n"					\
-		"csrw "STR(CSR_MSTATUS)", %0"				\
-	: "+&r" (__mstatus)						\
-	: "r" (val), "m" (*addr), "r" (MSTATUS_MPRV));			\
-}
+#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                      \
+	static inline void store_##type(type *addr, type val)                \
+	{                                                                    \
+		register ulong __mstatus asm("a3");                          \
+		asm volatile(                                                \
+			"csrrs %0, " STR(                                    \
+				CSR_MSTATUS) ", %3\n" #insn " %1, %2\n"      \
+					     "csrw " STR(CSR_MSTATUS) ", %0" \
+			: "+&r"(__mstatus)                                   \
+			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));          \
+	}
 
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu)
@@ -57,8 +58,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
 static inline u64 load_u64(const u64 *addr)
 {
-	return load_u32((u32 *)addr)
-		+ ((u64)load_u32((u32 *)addr + 1) << 32);
+	return load_u32((u32 *)addr) + ((u64)load_u32((u32 *)addr + 1) << 32);
 }
 
 static inline void store_u64(u64 *addr, u64 val)
@@ -70,45 +70,45 @@ static inline void store_u64(u64 *addr, u64 val)
 
 static inline ulong get_insn(ulong mepc, ulong *mstatus)
 {
-	register ulong __mepc asm ("a2") = mepc;
-	register ulong __mstatus asm ("a3");
+	register ulong __mepc asm("a2") = mepc;
+	register ulong __mstatus asm("a3");
 	ulong val;
 #ifndef __riscv_compressed
-	asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n"
+	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
 #if __riscv_xlen == 64
-		STR(LWU) " %[insn], (%[addr])\n"
+	    STR(LWU) " %[insn], (%[addr])\n"
 #else
-		STR(LW) " %[insn], (%[addr])\n"
+	    STR(LW) " %[insn], (%[addr])\n"
 #endif
-		"csrw "STR(CSR_MSTATUS)", %[mstatus]"
-		: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val)
-		: [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc));
+		     "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc));
 #else
 	ulong rvc_mask = 3, tmp;
-	asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n"
-		"and %[tmp], %[addr], 2\n"
-		"bnez %[tmp], 1f\n"
+	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
+						  "and %[tmp], %[addr], 2\n"
+						  "bnez %[tmp], 1f\n"
 #if __riscv_xlen == 64
-		STR(LWU) " %[insn], (%[addr])\n"
+	    STR(LWU) " %[insn], (%[addr])\n"
 #else
-		STR(LW) " %[insn], (%[addr])\n"
+	    STR(LW) " %[insn], (%[addr])\n"
 #endif
-		"and %[tmp], %[insn], %[rvc_mask]\n"
-		"beq %[tmp], %[rvc_mask], 2f\n"
-		"sll %[insn], %[insn], %[xlen_minus_16]\n"
-		"srl %[insn], %[insn], %[xlen_minus_16]\n"
-		"j 2f\n"
-		"1:\n"
-		"lhu %[insn], (%[addr])\n"
-		"and %[tmp], %[insn], %[rvc_mask]\n"
-		"bne %[tmp], %[rvc_mask], 2f\n"
-		"lhu %[tmp], 2(%[addr])\n"
-		"sll %[tmp], %[tmp], 16\n"
-		"add %[insn], %[insn], %[tmp]\n"
-		"2: csrw "STR(CSR_MSTATUS)", %[mstatus]"
-	: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp)
-	: [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc),
-	[rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16));
+		     "and %[tmp], %[insn], %[rvc_mask]\n"
+		     "beq %[tmp], %[rvc_mask], 2f\n"
+		     "sll %[insn], %[insn], %[xlen_minus_16]\n"
+		     "srl %[insn], %[insn], %[xlen_minus_16]\n"
+		     "j 2f\n"
+		     "1:\n"
+		     "lhu %[insn], (%[addr])\n"
+		     "and %[tmp], %[insn], %[rvc_mask]\n"
+		     "bne %[tmp], %[rvc_mask], 2f\n"
+		     "lhu %[tmp], 2(%[addr])\n"
+		     "sll %[tmp], %[tmp], 16\n"
+		     "add %[insn], %[insn], %[tmp]\n"
+		     "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp)
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc),
+	      [rvc_mask] "r"(rvc_mask), [xlen_minus_16] "i"(__riscv_xlen - 16));
 #endif
 	if (mstatus)
 		*mstatus = __mstatus;
diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 13d4fabe69c..ece6ec4423b 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -93,6 +93,6 @@ static inline int __ffs(unsigned long word)
  *
  * Undefined if no zero exists, so code should check against ~0UL first.
  */
-#define ffz(x)  __ffs(~(x))
+#define ffz(x) __ffs(~(x))
 
 #endif
diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
index 6dc49fb2efd..320966d857a 100644
--- a/include/sbi/sbi_bits.h
+++ b/include/sbi/sbi_bits.h
@@ -13,19 +13,20 @@
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)
 
-#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
-#define ROUNDDOWN(a, b) ((a)/(b)*(b))
+#define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b))
+#define ROUNDDOWN(a, b) ((a) / (b) * (b))
 
 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 #define MIN(a, b) ((a) < (b) ? (a) : (b))
 #define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
 
 #define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
-#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
+#define INSERT_FIELD(val, which, fieldval) \
+	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
 
 #define STR(x) XSTR(x)
 #define XSTR(x) #x
 
-#define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_LONG))
-#define BIT_WORD(nr)            ((nr) / BITS_PER_LONG)
+#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
+#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
 #endif
diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 0fd58e7f6bb..16021d06f23 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -12,7 +12,7 @@
 
 #include <sbi/sbi_types.h>
 
-#define __printf(a, b)		__attribute__((format(printf, a, b)))
+#define __printf(a, b) __attribute__((format(printf, a, b)))
 
 bool sbi_isprintable(char ch);
 
@@ -26,8 +26,7 @@ void sbi_gets(char *s, int maxwidth, char endchar);
 
 int __printf(2, 3) sbi_sprintf(char *out, const char *format, ...);
 
-int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz,
-				const char *format, ...);
+int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, const char *format, ...);
 
 int __printf(1, 2) sbi_printf(const char *format, ...);
 
diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 2425fc5ec37..a5b47a1cff3 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -19,8 +19,7 @@ u16 sbi_ecall_version_major(void);
 
 u16 sbi_ecall_version_minor(void);
 
-int sbi_ecall_handler(u32 hartid, ulong mcause,
-		      struct sbi_trap_regs *regs,
+int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch);
 
 #endif
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 8e79e24d9e0..6c122722d2a 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -24,24 +24,24 @@
 
 /* clang-format on */
 
-#define SBI_ECALL(__num, __a0, __a1, __a2) ({				\
-	register unsigned long a0 asm ("a0") = (unsigned long)(__a0);	\
-	register unsigned long a1 asm ("a1") = (unsigned long)(__a1);	\
-	register unsigned long a2 asm ("a2") = (unsigned long)(__a2);	\
-	register unsigned long a7 asm ("a7") = (unsigned long)(__num);	\
-	asm volatile ("ecall"						\
-		      : "+r" (a0)					\
-		      : "r" (a1), "r" (a2), "r" (a7)			\
-		      : "memory");					\
-	a0;								\
-})
-
-#define SBI_ECALL_0(__num)			SBI_ECALL(__num, 0, 0, 0)
-#define SBI_ECALL_1(__num, __a0)		SBI_ECALL(__num, __a0, 0, 0)
-#define SBI_ECALL_2(__num, __a0, __a1)		SBI_ECALL(__num, __a0, __a1, 0)
-
-#define sbi_ecall_console_putc(c)		\
-	SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c));
+#define SBI_ECALL(__num, __a0, __a1, __a2)                                    \
+	({                                                                    \
+		register unsigned long a0 asm("a0") = (unsigned long)(__a0);  \
+		register unsigned long a1 asm("a1") = (unsigned long)(__a1);  \
+		register unsigned long a2 asm("a2") = (unsigned long)(__a2);  \
+		register unsigned long a7 asm("a7") = (unsigned long)(__num); \
+		asm volatile("ecall"                                          \
+			     : "+r"(a0)                                       \
+			     : "r"(a1), "r"(a2), "r"(a7)                      \
+			     : "memory");                                     \
+		a0;                                                           \
+	})
+
+#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0)
+#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0)
+#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0)
+
+#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c));
 
 static inline void sbi_ecall_console_puts(const char *str)
 {
diff --git a/include/sbi/sbi_emulate_csr.h b/include/sbi/sbi_emulate_csr.h
index 00d5eff95a0..5d1755f2759 100644
--- a/include/sbi/sbi_emulate_csr.h
+++ b/include/sbi/sbi_emulate_csr.h
@@ -14,14 +14,10 @@
 
 struct sbi_scratch;
 
-int sbi_emulate_csr_read(int csr_num,
-			 u32 hartid, ulong mstatus,
-			 struct sbi_scratch *scratch,
-			 ulong *csr_val);
+int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
+			 struct sbi_scratch *scratch, ulong *csr_val);
 
-int sbi_emulate_csr_write(int csr_num,
-			  u32 hartid, ulong mstatus,
-			  struct sbi_scratch *scratch,
-			  ulong csr_val);
+int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
+			  struct sbi_scratch *scratch, ulong csr_val);
 
 #endif
diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index f9e2ca9bd4e..3f36c59ad09 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -32,12 +32,12 @@ enum sbi_fifo_inplace_update_types {
 
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
-void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
-		   u16 entries, u16 entry_size);
+void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
+		   u16 entry_size);
 bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
 bool sbi_fifo_is_full(struct sbi_fifo *fifo);
 int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
-			  int (*fptr) (void *in, void *data));
+			    int (*fptr)(void *in, void *data));
 u16 sbi_fifo_avail(struct sbi_fifo *fifo);
 
 #endif
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 8b11df74bb6..b282af9cb42 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -20,10 +20,9 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
-void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
-						    unsigned long arg1,
-						    unsigned long next_addr,
-						    unsigned long next_mode);
+void __attribute__((noreturn))
+sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
+		     unsigned long next_addr, unsigned long next_mode);
 
 void sbi_hart_mark_available(u32 hartid);
 
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index f68e8fe408d..108e5aa1e61 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -44,8 +44,8 @@ struct sbi_tlb_info {
 
 #define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info)
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      ulong *pmask, u32 event, void *data);
+int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event,
+		      void *data);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 39644d19487..e46acfdd7cc 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -11,13 +11,13 @@
 #define __SBI_PLATFORM_H__
 
 /** Offset of name in struct sbi_platform */
-#define SBI_PLATFORM_NAME_OFFSET		(0x0)
+#define SBI_PLATFORM_NAME_OFFSET (0x0)
 /** Offset of features in struct sbi_platform */
-#define SBI_PLATFORM_FEATURES_OFFSET		(0x40)
+#define SBI_PLATFORM_FEATURES_OFFSET (0x40)
 /** Offset of hart_count in struct sbi_platform */
-#define SBI_PLATFORM_HART_COUNT_OFFSET		(0x48)
+#define SBI_PLATFORM_HART_COUNT_OFFSET (0x48)
 /** Offset of hart_stack_size in struct sbi_platform */
-#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET	(0x4c)
+#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c)
 
 #ifndef __ASSEMBLY__
 
@@ -26,25 +26,23 @@
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
 	/** Platform has timer value */
-	SBI_PLATFORM_HAS_TIMER_VALUE		= (1 << 0),
+	SBI_PLATFORM_HAS_TIMER_VALUE = (1 << 0),
 	/** Platform has HART hotplug support */
-	SBI_PLATFORM_HAS_HART_HOTPLUG		= (1 << 1),
+	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1),
 	/** Platform has PMP support */
-	SBI_PLATFORM_HAS_PMP			= (1 << 2),
+	SBI_PLATFORM_HAS_PMP = (1 << 2),
 	/** Platform has S-mode counter enable */
-	SBI_PLATFORM_HAS_SCOUNTEREN		= (1 << 3),
+	SBI_PLATFORM_HAS_SCOUNTEREN = (1 << 3),
 	/** Platform has M-mode counter enable */
-	SBI_PLATFORM_HAS_MCOUNTEREN		= (1 << 4),
+	SBI_PLATFORM_HAS_MCOUNTEREN = (1 << 4),
 	/** Platform has fault delegation support */
-	SBI_PLATFORM_HAS_MFAULTS_DELEGATION	= (1 << 5),
+	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 5),
 };
 
 /** Default feature set for a platform */
-#define SBI_PLATFORM_DEFAULT_FEATURES	\
-	(SBI_PLATFORM_HAS_TIMER_VALUE | \
-	 SBI_PLATFORM_HAS_PMP | \
-	 SBI_PLATFORM_HAS_SCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MCOUNTEREN | \
+#define SBI_PLATFORM_DEFAULT_FEATURES                                \
+	(SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_PMP |       \
+	 SBI_PLATFORM_HAS_SCOUNTEREN | SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 /** Representation of a platform */
@@ -71,8 +69,8 @@ struct sbi_platform {
 	 * Get PMP regions details (namely: protection, base address,
 	 * and size) for given HART
 	 */
-	int (*pmp_region_info)(u32 hartid, u32 index,
-			       ulong *prot, ulong *addr, ulong *log2size);
+	int (*pmp_region_info)(u32 hartid, u32 index, ulong *prot, ulong *addr,
+			       ulong *log2size);
 
 	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
@@ -109,28 +107,28 @@ struct sbi_platform {
 } __packed;
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */
-#define sbi_platform_ptr(__s)	\
+#define sbi_platform_ptr(__s) \
 	((const struct sbi_platform *)((__s)->platform_addr))
 /** Get pointer to sbi_platform for current HART */
-#define sbi_platform_thishart_ptr()	\
-	((const struct sbi_platform *)(sbi_scratch_thishart_ptr()->platform_addr))
+#define sbi_platform_thishart_ptr()                               \
+	((const struct sbi_platform *)(sbi_scratch_thishart_ptr() \
+					       ->platform_addr))
 /** Check whether the platform supports timer value */
-#define sbi_platform_has_timer_value(__p)	\
+#define sbi_platform_has_timer_value(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
 /** Check whether the platform supports HART hotplug */
-#define sbi_platform_has_hart_hotplug(__p)	\
+#define sbi_platform_has_hart_hotplug(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
 /** Check whether the platform has PMP support */
-#define sbi_platform_has_pmp(__p)	\
-	((__p)->features & SBI_PLATFORM_HAS_PMP)
+#define sbi_platform_has_pmp(__p) ((__p)->features & SBI_PLATFORM_HAS_PMP)
 /** Check whether the platform supports scounteren CSR */
-#define sbi_platform_has_scounteren(__p)	\
+#define sbi_platform_has_scounteren(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN)
 /** Check whether the platform supports mcounteren CSR */
-#define sbi_platform_has_mcounteren(__p)	\
+#define sbi_platform_has_mcounteren(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN)
 /** Check whether the platform supports fault delegation */
-#define sbi_platform_has_mfaults_delegation(__p)	\
+#define sbi_platform_has_mfaults_delegation(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 /**
@@ -258,8 +256,8 @@ static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
 					       ulong *log2size)
 {
 	if (plat && plat->pmp_region_info)
-		return plat->pmp_region_info(hartid, index,
-					     prot, addr, log2size);
+		return plat->pmp_region_info(hartid, index, prot, addr,
+					     log2size);
 	return 0;
 }
 
@@ -395,9 +393,8 @@ static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
  * @param plat pointer to struct struct sbi_platform
  * @param next_event timer value when timer event will happen
  */
-static inline void sbi_platform_timer_event_start(
-					const struct sbi_platform *plat,
-					u64 next_event)
+static inline void
+sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event)
 {
 	if (plat && plat->timer_event_start)
 		plat->timer_event_start(next_event);
@@ -408,8 +405,8 @@ static inline void sbi_platform_timer_event_start(
  *
  * @param plat pointer to struct sbi_platform
  */
-static inline void sbi_platform_timer_event_stop(
-					const struct sbi_platform *plat)
+static inline void
+sbi_platform_timer_event_stop(const struct sbi_platform *plat)
 {
 	if (plat && plat->timer_event_stop)
 		plat->timer_event_stop();
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index fabbab0191d..f5827664441 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -79,28 +79,28 @@ struct sbi_scratch {
 /** Possible options for OpenSBI library */
 enum sbi_scratch_options {
 	/** Disable prints during boot */
-	SBI_SCRATCH_NO_BOOT_PRINTS		= (1 << 0),
+	SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0),
 };
 
 /** Get pointer to sbi_scratch for current HART */
-#define sbi_scratch_thishart_ptr()	\
-((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
+#define sbi_scratch_thishart_ptr() \
+	((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
 
 /** Get Arg1 of next booting stage for current HART */
-#define sbi_scratch_thishart_arg1_ptr()	\
-((void *)(sbi_scratch_thishart_ptr()->next_arg1))
+#define sbi_scratch_thishart_arg1_ptr() \
+	((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
 /** Get pointer to sbi_ipi_data from sbi_scratch */
-#define sbi_ipi_data_ptr(scratch)      \
-((struct sbi_ipi_data *)(void*)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
+#define sbi_ipi_data_ptr(scratch) \
+	((struct sbi_ipi_data *)(void *)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
 
 /** Get pointer to tlb flush info fifo header from sbi_scratch */
-#define sbi_tlb_fifo_head_ptr(scratch)      \
-((struct sbi_fifo *)(void*)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET)
+#define sbi_tlb_fifo_head_ptr(scratch) \
+	((struct sbi_fifo *)(void *)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET)
 
 /** Get pointer to tlb flush info fifo queue address from sbi_scratch */
-#define sbi_tlb_fifo_mem_ptr(scratch)      \
-(void *)((void*)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET)
+#define sbi_tlb_fifo_mem_ptr(scratch) \
+	(void *)((void *)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET)
 
 #endif
 
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 3e794e2ccbb..bf768d9a600 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -18,10 +18,10 @@ int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot);
 
 int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot);
 
-void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
-						 u32 type);
+void __attribute__((noreturn))
+sbi_system_reboot(struct sbi_scratch *scratch, u32 type);
 
-void __attribute__((noreturn)) sbi_system_shutdown(struct sbi_scratch *scratch,
-						   u32 type);
+void __attribute__((noreturn))
+sbi_system_shutdown(struct sbi_scratch *scratch, u32 type);
 
 #endif
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index e2a52b54874..19b95a7cc9f 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -86,10 +86,9 @@
 /* clang-format on */
 
 /** Get offset of member with name 'x' in sbi_trap_regs */
-#define SBI_TRAP_REGS_OFFSET(x)			\
-				((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__)
+#define SBI_TRAP_REGS_OFFSET(x) ((SBI_TRAP_REGS_##x) * __SIZEOF_POINTER__)
 /** Size (in bytes) of sbi_trap_regs */
-#define SBI_TRAP_REGS_SIZE			SBI_TRAP_REGS_OFFSET(last)
+#define SBI_TRAP_REGS_SIZE SBI_TRAP_REGS_OFFSET(last)
 
 #ifndef __ASSEMBLY__
 
@@ -169,12 +168,10 @@ struct sbi_trap_regs {
 
 struct sbi_scratch;
 
-int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch,
+int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 		      ulong epc, ulong cause, ulong tval);
 
-void sbi_trap_handler(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch);
+void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch);
 
 #endif
 
diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 279c0400677..90020ac7116 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -10,7 +10,7 @@
 #ifndef __SBI_VERSION_H__
 #define __SBI_VERSION_H__
 
-#define OPENSBI_VERSION_MAJOR		0
-#define OPENSBI_VERSION_MINOR		3
+#define OPENSBI_VERSION_MAJOR 0
+#define OPENSBI_VERSION_MINOR 3
 
 #endif
diff --git a/lib/riscv_asm.c b/lib/riscv_asm.c
index 2959a5402fd..e0c8889a251 100644
--- a/lib/riscv_asm.c
+++ b/lib/riscv_asm.c
@@ -163,28 +163,26 @@ static unsigned long ctz(unsigned long x)
 	return ret;
 }
 
-int pmp_set(unsigned int n, unsigned long prot,
-	    unsigned long addr, unsigned long log2len)
+int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
+	    unsigned long log2len)
 {
 	int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
 	unsigned long cfgmask, pmpcfg;
 	unsigned long addrmask, pmpaddr;
 
 	/* check parameters */
-	if (n >= PMP_COUNT ||
-	    log2len > __riscv_xlen ||
-	    log2len < PMP_SHIFT)
+	if (n >= PMP_COUNT || log2len > __riscv_xlen || log2len < PMP_SHIFT)
 		return SBI_EINVAL;
 
-	/* calculate PMP register and offset */
+		/* calculate PMP register and offset */
 #if __riscv_xlen == 32
-	pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
+	pmpcfg_csr   = CSR_PMPCFG0 + (n >> 2);
 	pmpcfg_shift = (n & 3) << 3;
 #elif __riscv_xlen == 64
-	pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
+	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	pmpcfg_csr = -1;
+	pmpcfg_csr   = -1;
 	pmpcfg_shift = -1;
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
@@ -194,7 +192,7 @@ int pmp_set(unsigned int n, unsigned long prot,
 	/* encode PMP config */
 	prot |= (log2len == PMP_SHIFT) ? PMP_A_NA4 : PMP_A_NAPOT;
 	cfgmask = ~(0xff << pmpcfg_shift);
-	pmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);
+	pmpcfg	= (csr_read_num(pmpcfg_csr) & cfgmask);
 	pmpcfg |= ((prot << pmpcfg_shift) & ~cfgmask);
 
 	/* encode PMP address */
@@ -205,7 +203,7 @@ int pmp_set(unsigned int n, unsigned long prot,
 			pmpaddr = -1UL;
 		} else {
 			addrmask = (1UL << (log2len - PMP_SHIFT)) - 1;
-			pmpaddr = ((addr >> PMP_SHIFT) & ~addrmask);
+			pmpaddr	 = ((addr >> PMP_SHIFT) & ~addrmask);
 			pmpaddr |= (addrmask >> 1);
 		}
 	}
@@ -217,28 +215,27 @@ int pmp_set(unsigned int n, unsigned long prot,
 	return 0;
 }
 
-int pmp_get(unsigned int n, unsigned long *prot_out,
-	    unsigned long *addr_out, unsigned long *log2len_out)
+int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
+	    unsigned long *log2len_out)
 {
 	int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
 	unsigned long cfgmask, pmpcfg, prot;
 	unsigned long t1, addr, log2len;
 
 	/* check parameters */
-	if (n >= PMP_COUNT || !prot_out ||
-	    !addr_out || !log2len_out)
+	if (n >= PMP_COUNT || !prot_out || !addr_out || !log2len_out)
 		return SBI_EINVAL;
 	*prot_out = *addr_out = *log2len_out = 0;
 
 	/* calculate PMP register and offset */
 #if __riscv_xlen == 32
-	pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
+	pmpcfg_csr   = CSR_PMPCFG0 + (n >> 2);
 	pmpcfg_shift = (n & 3) << 3;
 #elif __riscv_xlen == 64
-	pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
+	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	pmpcfg_csr = -1;
+	pmpcfg_csr   = -1;
 	pmpcfg_shift = -1;
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
@@ -247,28 +244,28 @@ int pmp_get(unsigned int n, unsigned long *prot_out,
 
 	/* decode PMP config */
 	cfgmask = (0xff << pmpcfg_shift);
-	pmpcfg = csr_read_num(pmpcfg_csr) & cfgmask;
-	prot = pmpcfg >> pmpcfg_shift;
+	pmpcfg	= csr_read_num(pmpcfg_csr) & cfgmask;
+	prot	= pmpcfg >> pmpcfg_shift;
 
 	/* decode PMP address */
 	if ((prot & PMP_A) == PMP_A_NAPOT) {
 		addr = csr_read_num(pmpaddr_csr);
 		if (addr == -1UL) {
-			addr = 0;
+			addr	= 0;
 			log2len = __riscv_xlen;
 		} else {
-			t1 = ctz(~addr);
-			addr = (addr & ~((1UL << t1) - 1)) << PMP_SHIFT;
+			t1	= ctz(~addr);
+			addr	= (addr & ~((1UL << t1) - 1)) << PMP_SHIFT;
 			log2len = (t1 + PMP_SHIFT + 1);
 		}
 	} else {
-		addr = csr_read_num(pmpaddr_csr) << PMP_SHIFT;
+		addr	= csr_read_num(pmpaddr_csr) << PMP_SHIFT;
 		log2len = PMP_SHIFT;
 	}
 
 	/* return details */
-	*prot_out = prot;
-	*addr_out = addr;
+	*prot_out    = prot;
+	*addr_out    = addr;
 	*log2len_out = log2len;
 
 	return 0;
diff --git a/lib/riscv_atomic.c b/lib/riscv_atomic.c
index f6d61951e4f..34bf5220f0f 100644
--- a/lib/riscv_atomic.c
+++ b/lib/riscv_atomic.c
@@ -30,11 +30,10 @@ long atomic_add_return(atomic_t *atom, long value)
 {
 	long ret;
 
-	__asm__ __volatile__ (
-		"	amoadd.w.aqrl  %1, %2, %0"
-		: "+A" (atom->counter), "=r" (ret)
-		: "r" (value)
-		: "memory");
+	__asm__ __volatile__("	amoadd.w.aqrl  %1, %2, %0"
+			     : "+A"(atom->counter), "=r"(ret)
+			     : "r"(value)
+			     : "memory");
 
 	return ret + value;
 }
@@ -43,99 +42,98 @@ long atomic_sub_return(atomic_t *atom, long value)
 {
 	long ret;
 
-	__asm__ __volatile__ (
-		"	amoadd.w.aqrl  %1, %2, %0"
-		: "+A" (atom->counter), "=r" (ret)
-		: "r" (-value)
-		: "memory");
+	__asm__ __volatile__("	amoadd.w.aqrl  %1, %2, %0"
+			     : "+A"(atom->counter), "=r"(ret)
+			     : "r"(-value)
+			     : "memory");
 
 	return ret - value;
 }
 
-#define __xchg(ptr, new, size)						\
-({									\
-	__typeof__(ptr) __ptr = (ptr);					\
-	__typeof__(*(ptr)) __new = (new);				\
-	__typeof__(*(ptr)) __ret;					\
-	register unsigned int __rc;					\
-	switch (size) {							\
-	case 4:								\
-		__asm__ __volatile__ (					\
-			"0:	lr.w %0, %2\n"				\
-			"	sc.w.rl %1, %z3, %2\n"			\
-			"	bnez %1, 0b\n"				\
-			"	fence rw, rw\n"				\
-			: "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)	\
-			: "rJ" (__new)					\
-			: "memory");					\
-		break;							\
-	case 8:								\
-		__asm__ __volatile__ (					\
-			"0:	lr.d %0, %2\n"				\
-			"	sc.d.rl %1, %z3, %2\n"			\
-			"	bnez %1, 0b\n"				\
-			"	fence rw, rw\n"				\
-			: "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)	\
-			: "rJ" (__new)					\
-			: "memory");					\
-		break;							\
-	default:							\
-		break;							\
-	}								\
-	__ret;								\
-})
-
-#define xchg(ptr, n)							\
-({									\
-	__typeof__(*(ptr)) _n_ = (n);					\
-	(__typeof__(*(ptr))) __xchg((ptr), _n_, sizeof(*(ptr)));	\
-})
-
-#define __cmpxchg(ptr, old, new, size)					\
-({									\
-	__typeof__(ptr) __ptr = (ptr);					\
-	__typeof__(*(ptr)) __old = (old);				\
-	__typeof__(*(ptr)) __new = (new);				\
-	__typeof__(*(ptr)) __ret;					\
-	register unsigned int __rc;					\
-	switch (size) {							\
-	case 4:								\
-		__asm__ __volatile__ (					\
-			"0:	lr.w %0, %2\n"				\
-			"	bne  %0, %z3, 1f\n"			\
-			"	sc.w.rl %1, %z4, %2\n"			\
-			"	bnez %1, 0b\n"				\
-			"	fence rw, rw\n"				\
-			"1:\n"						\
-			: "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)	\
-			: "rJ" (__old), "rJ" (__new)			\
-			: "memory");					\
-		break;							\
-	case 8:								\
-		__asm__ __volatile__ (					\
-			"0:	lr.d %0, %2\n"				\
-			"	bne %0, %z3, 1f\n"			\
-			"	sc.d.rl %1, %z4, %2\n"			\
-			"	bnez %1, 0b\n"				\
-			"	fence rw, rw\n"				\
-			"1:\n"						\
-			: "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)	\
-			: "rJ" (__old), "rJ" (__new)			\
-			: "memory");					\
-		break;							\
-	default:							\
-		break;							\
-	}								\
-	__ret;								\
-})
-
-#define cmpxchg(ptr, o, n)						\
-({									\
-	__typeof__(*(ptr)) _o_ = (o);					\
-	__typeof__(*(ptr)) _n_ = (n);					\
-	(__typeof__(*(ptr))) __cmpxchg((ptr),				\
-				       _o_, _n_, sizeof(*(ptr)));	\
-})
+#define __xchg(ptr, new, size)                                            \
+	({                                                                \
+		__typeof__(ptr) __ptr	 = (ptr);                         \
+		__typeof__(*(ptr)) __new = (new);                         \
+		__typeof__(*(ptr)) __ret;                                 \
+		register unsigned int __rc;                               \
+		switch (size) {                                           \
+		case 4:                                                   \
+			__asm__ __volatile__("0:	lr.w %0, %2\n"           \
+					     "	sc.w.rl %1, %z3, %2\n"     \
+					     "	bnez %1, 0b\n"             \
+					     "	fence rw, rw\n"            \
+					     : "=&r"(__ret), "=&r"(__rc), \
+					       "+A"(*__ptr)               \
+					     : "rJ"(__new)                \
+					     : "memory");                 \
+			break;                                            \
+		case 8:                                                   \
+			__asm__ __volatile__("0:	lr.d %0, %2\n"           \
+					     "	sc.d.rl %1, %z3, %2\n"     \
+					     "	bnez %1, 0b\n"             \
+					     "	fence rw, rw\n"            \
+					     : "=&r"(__ret), "=&r"(__rc), \
+					       "+A"(*__ptr)               \
+					     : "rJ"(__new)                \
+					     : "memory");                 \
+			break;                                            \
+		default:                                                  \
+			break;                                            \
+		}                                                         \
+		__ret;                                                    \
+	})
+
+#define xchg(ptr, n)                                                     \
+	({                                                               \
+		__typeof__(*(ptr)) _n_ = (n);                            \
+		(__typeof__(*(ptr))) __xchg((ptr), _n_, sizeof(*(ptr))); \
+	})
+
+#define __cmpxchg(ptr, old, new, size)                                    \
+	({                                                                \
+		__typeof__(ptr) __ptr	 = (ptr);                         \
+		__typeof__(*(ptr)) __old = (old);                         \
+		__typeof__(*(ptr)) __new = (new);                         \
+		__typeof__(*(ptr)) __ret;                                 \
+		register unsigned int __rc;                               \
+		switch (size) {                                           \
+		case 4:                                                   \
+			__asm__ __volatile__("0:	lr.w %0, %2\n"           \
+					     "	bne  %0, %z3, 1f\n"        \
+					     "	sc.w.rl %1, %z4, %2\n"     \
+					     "	bnez %1, 0b\n"             \
+					     "	fence rw, rw\n"            \
+					     "1:\n"                       \
+					     : "=&r"(__ret), "=&r"(__rc), \
+					       "+A"(*__ptr)               \
+					     : "rJ"(__old), "rJ"(__new)   \
+					     : "memory");                 \
+			break;                                            \
+		case 8:                                                   \
+			__asm__ __volatile__("0:	lr.d %0, %2\n"           \
+					     "	bne %0, %z3, 1f\n"         \
+					     "	sc.d.rl %1, %z4, %2\n"     \
+					     "	bnez %1, 0b\n"             \
+					     "	fence rw, rw\n"            \
+					     "1:\n"                       \
+					     : "=&r"(__ret), "=&r"(__rc), \
+					       "+A"(*__ptr)               \
+					     : "rJ"(__old), "rJ"(__new)   \
+					     : "memory");                 \
+			break;                                            \
+		default:                                                  \
+			break;                                            \
+		}                                                         \
+		__ret;                                                    \
+	})
+
+#define cmpxchg(ptr, o, n)                                          \
+	({                                                          \
+		__typeof__(*(ptr)) _o_ = (o);                       \
+		__typeof__(*(ptr)) _n_ = (n);                       \
+		(__typeof__(*(ptr)))                                \
+			__cmpxchg((ptr), _o_, _n_, sizeof(*(ptr))); \
+	})
 
 long arch_atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
 {
@@ -178,31 +176,30 @@ unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 }
 
 #if (BITS_PER_LONG == 64)
-#define __AMO(op)	"amo" #op ".d"
+#define __AMO(op) "amo" #op ".d"
 #elif (BITS_PER_LONG == 32)
-#define __AMO(op)	"amo" #op ".w"
+#define __AMO(op) "amo" #op ".w"
 #else
 #error "Unexpected BITS_PER_LONG"
 #endif
 
-#define __atomic_op_bit_ord(op, mod, nr, addr, ord)		\
-({								\
-	unsigned long __res, __mask;				\
-	__mask = BIT_MASK(nr);					\
-	__asm__ __volatile__ (					\
-		__AMO(op) #ord " %0, %2, %1"			\
-		: "=r" (__res), "+A" (addr[BIT_WORD(nr)])	\
-		: "r" (mod(__mask))				\
-		: "memory");					\
-	__res;							\
-})
-
-#define __atomic_op_bit(op, mod, nr, addr) 			\
+#define __atomic_op_bit_ord(op, mod, nr, addr, ord)                          \
+	({                                                                   \
+		unsigned long __res, __mask;                                 \
+		__mask = BIT_MASK(nr);                                       \
+		__asm__ __volatile__(__AMO(op) #ord " %0, %2, %1"            \
+				     : "=r"(__res), "+A"(addr[BIT_WORD(nr)]) \
+				     : "r"(mod(__mask))                      \
+				     : "memory");                            \
+		__res;                                                       \
+	})
+
+#define __atomic_op_bit(op, mod, nr, addr) \
 	__atomic_op_bit_ord(op, mod, nr, addr, .aqrl)
 
 /* Bitmask modifiers */
-#define __NOP(x)	(x)
-#define __NOT(x)	(~(x))
+#define __NOP(x) (x)
+#define __NOT(x) (~(x))
 
 inline int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
 {
diff --git a/lib/riscv_locks.c b/lib/riscv_locks.c
index 8b5413e0a97..4d1d9c0c14b 100644
--- a/lib/riscv_locks.c
+++ b/lib/riscv_locks.c
@@ -19,11 +19,10 @@ int spin_trylock(spinlock_t *lock)
 {
 	int tmp = 1, busy;
 
-	__asm__ __volatile__ (
-		"	amoswap.w %0, %2, %1\n"
-		RISCV_ACQUIRE_BARRIER
-		: "=r" (busy), "+A" (lock->lock)
-		: "r" (tmp)
+	__asm__ __volatile__(
+		"	amoswap.w %0, %2, %1\n" RISCV_ACQUIRE_BARRIER
+		: "=r"(busy), "+A"(lock->lock)
+		: "r"(tmp)
 		: "memory");
 
 	return !busy;
diff --git a/lib/sbi_console.c b/lib/sbi_console.c
index da2f82386d2..30fb2c8fc18 100644
--- a/lib/sbi_console.c
+++ b/lib/sbi_console.c
@@ -12,15 +12,12 @@
 #include <sbi/riscv_locks.h>
 
 static const struct sbi_platform *console_plat = NULL;
-static spinlock_t console_out_lock = SPIN_LOCK_INITIALIZER;
+static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
 
 bool sbi_isprintable(char c)
 {
-	if (((31 < c) && (c < 127)) ||
-	   (c == '\f') ||
-	   (c == '\r') ||
-	   (c == '\n') ||
-	   (c == '\t')) {
+	if (((31 < c) && (c < 127)) || (c == '\f') || (c == '\r') ||
+	    (c == '\n') || (c == '\t')) {
 		return TRUE;
 	}
 	return FALSE;
@@ -54,22 +51,22 @@ void sbi_gets(char *s, int maxwidth, char endchar)
 	char *retval = s;
 
 	while ((ch = sbi_getc()) != endchar && ch >= 0 && maxwidth > 1) {
-		*retval = (char) ch;
+		*retval = (char)ch;
 		retval++;
 		maxwidth--;
 	}
 	*retval = '\0';
 }
 
-#define PAD_RIGHT	1
-#define PAD_ZERO	2
-#define PAD_ALTERNATE	4
-#define PRINT_BUF_LEN	64
+#define PAD_RIGHT 1
+#define PAD_ZERO 2
+#define PAD_ALTERNATE 4
+#define PRINT_BUF_LEN 64
 
-#define va_start(v,l)		__builtin_va_start((v),l)
-#define va_end			__builtin_va_end
-#define va_arg			__builtin_va_arg
-typedef __builtin_va_list	va_list;
+#define va_start(v, l) __builtin_va_start((v), l)
+#define va_end __builtin_va_end
+#define va_arg __builtin_va_arg
+typedef __builtin_va_list va_list;
 
 static void printc(char **out, u32 *out_len, char ch)
 {
@@ -89,9 +86,10 @@ static void printc(char **out, u32 *out_len, char ch)
 	}
 }
 
-static int prints(char **out, u32 *out_len, const char *string, int width, int flags)
+static int prints(char **out, u32 *out_len, const char *string, int width,
+		  int flags)
 {
-	int pc = 0;
+	int pc	     = 0;
 	char padchar = ' ';
 
 	if (width > 0) {
@@ -135,10 +133,10 @@ static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 
 	if (sg && b == 10 && i < 0) {
 		neg = 1;
-		u = -i;
+		u   = -i;
 	}
 
-	s = print_buf + PRINT_BUF_LEN - 1;
+	s  = print_buf + PRINT_BUF_LEN - 1;
 	*s = '\0';
 
 	if (!u) {
@@ -211,59 +209,59 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			if (*format == 's') {
 				char *s = va_arg(args, char *);
 				acnt += sizeof(char *);
-				pc += prints(out, out_len,
-					     s ? s : "(null)", width, flags);
+				pc += prints(out, out_len, s ? s : "(null)",
+					     width, flags);
 				continue;
 			}
 			if ((*format == 'd') || (*format == 'i')) {
-				pc += printi(out, out_len,
-					va_arg(args, int),
-					10, 1, width, flags, '0');
+				pc += printi(out, out_len, va_arg(args, int),
+					     10, 1, width, flags, '0');
 				acnt += sizeof(int);
 				continue;
 			}
 			if (*format == 'x') {
 				pc += printi(out, out_len,
-					va_arg(args, unsigned int),
-					16, 0, width, flags, 'a');
+					     va_arg(args, unsigned int), 16, 0,
+					     width, flags, 'a');
 				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'X') {
 				pc += printi(out, out_len,
-					va_arg(args, unsigned int),
-					16, 0, width, flags, 'A');
+					     va_arg(args, unsigned int), 16, 0,
+					     width, flags, 'A');
 				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'u') {
 				pc += printi(out, out_len,
-					va_arg(args, unsigned int),
-					10, 0, width, flags, 'a');
+					     va_arg(args, unsigned int), 10, 0,
+					     width, flags, 'a');
 				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'p') {
 				pc += printi(out, out_len,
-					va_arg(args, unsigned long),
-					16, 0, width, flags, 'a');
+					     va_arg(args, unsigned long), 16, 0,
+					     width, flags, 'a');
 				acnt += sizeof(unsigned long);
 				continue;
 			}
 			if (*format == 'P') {
 				pc += printi(out, out_len,
-					va_arg(args, unsigned long),
-					16, 0, width, flags, 'A');
+					     va_arg(args, unsigned long), 16, 0,
+					     width, flags, 'A');
 				acnt += sizeof(unsigned long);
 				continue;
 			}
 			if (*format == 'l' && *(format + 1) == 'l') {
-				while (acnt & (sizeof(unsigned long long)-1)) {
+				while (acnt &
+				       (sizeof(unsigned long long) - 1)) {
 					va_arg(args, int);
 					acnt += sizeof(int);
 				}
 				if (sizeof(unsigned long long) ==
-						sizeof(unsigned long)) {
+				    sizeof(unsigned long)) {
 					tmp = va_arg(args, unsigned long long);
 					acnt += sizeof(unsigned long long);
 				} else {
@@ -271,48 +269,51 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 						va_arg(args, unsigned long);
 					((unsigned long *)&tmp)[1] =
 						va_arg(args, unsigned long);
-					acnt += 2*sizeof(unsigned long);
+					acnt += 2 * sizeof(unsigned long);
 				}
 				if (*(format + 2) == 'u') {
 					format += 2;
-					pc += printi(out, out_len, tmp,
-						10, 0, width, flags, 'a');
+					pc += printi(out, out_len, tmp, 10, 0,
+						     width, flags, 'a');
 				} else if (*(format + 2) == 'x') {
 					format += 2;
-					pc += printi(out, out_len, tmp,
-						16, 0, width, flags, 'a');
+					pc += printi(out, out_len, tmp, 16, 0,
+						     width, flags, 'a');
 				} else if (*(format + 2) == 'X') {
 					format += 2;
-					pc += printi(out, out_len, tmp,
-						16, 0, width, flags, 'A');
+					pc += printi(out, out_len, tmp, 16, 0,
+						     width, flags, 'A');
 				} else {
 					format += 1;
-					pc += printi(out, out_len, tmp,
-						10, 1, width, flags, '0');
+					pc += printi(out, out_len, tmp, 10, 1,
+						     width, flags, '0');
 				}
 				continue;
 			} else if (*format == 'l') {
 				if (*(format + 1) == 'u') {
 					format += 1;
-					pc += printi(out, out_len,
-						va_arg(args, unsigned long),
-						10, 0, width, flags, 'a');
+					pc += printi(
+						out, out_len,
+						va_arg(args, unsigned long), 10,
+						0, width, flags, 'a');
 				} else if (*(format + 1) == 'x') {
 					format += 1;
-					pc += printi(out, out_len,
-						va_arg(args, unsigned long),
-						16, 0, width, flags, 'a');
+					pc += printi(
+						out, out_len,
+						va_arg(args, unsigned long), 16,
+						0, width, flags, 'a');
 					acnt += sizeof(unsigned long);
 				} else if (*(format + 1) == 'X') {
 					format += 1;
-					pc += printi(out, out_len,
-						va_arg(args, unsigned long),
-						16, 0, width, flags, 'A');
+					pc += printi(
+						out, out_len,
+						va_arg(args, unsigned long), 16,
+						0, width, flags, 'A');
 					acnt += sizeof(unsigned long);
 				} else {
 					pc += printi(out, out_len,
-						va_arg(args, long),
-						10, 1, width, flags, '0');
+						     va_arg(args, long), 10, 1,
+						     width, flags, '0');
 					acnt += sizeof(long);
 				}
 			}
@@ -325,7 +326,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				continue;
 			}
 		} else {
-out:
+		out:
 			printc(out, out_len, *format);
 			++pc;
 		}
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index 164cf920f0f..d82766a1d8e 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -16,8 +16,8 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-#define SBI_ECALL_VERSION_MAJOR			0
-#define SBI_ECALL_VERSION_MINOR			1
+#define SBI_ECALL_VERSION_MAJOR 0
+#define SBI_ECALL_VERSION_MINOR 1
 
 u16 sbi_ecall_version_major(void)
 {
@@ -29,8 +29,7 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
-int sbi_ecall_handler(u32 hartid, ulong mcause,
-		      struct sbi_trap_regs *regs,
+int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
 	int ret = SBI_ENOTSUPP;
@@ -40,7 +39,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 	case SBI_ECALL_SET_TIMER:
 #if __riscv_xlen == 32
 		sbi_timer_event_start(scratch,
-			(((u64)regs->a1 << 32) | (u64)regs->a0));
+				      (((u64)regs->a1 << 32) | (u64)regs->a0));
 #else
 		sbi_timer_event_start(scratch, (u64)regs->a0);
 #endif
@@ -52,7 +51,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		break;
 	case SBI_ECALL_CONSOLE_GETCHAR:
 		regs->a0 = sbi_getc();
-		ret = 0;
+		ret	 = 0;
 		break;
 	case SBI_ECALL_CLEAR_IPI:
 		sbi_ipi_clear_smode(scratch);
@@ -68,20 +67,21 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)regs->a1;
-		tlb_info.size = (unsigned long)regs->a2;
-		tlb_info.type = SBI_TLB_FLUSH_VMA;
+		tlb_info.size  = (unsigned long)regs->a2;
+		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)regs->a1;
-		tlb_info.size = (unsigned long)regs->a2;
-		tlb_info.asid = (unsigned long)regs->a3;
-		tlb_info.type = SBI_TLB_FLUSH_VMA_ASID;
+		tlb_info.size  = (unsigned long)regs->a2;
+		tlb_info.asid  = (unsigned long)regs->a3;
+		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 
 		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
-					SBI_IPI_EVENT_SFENCE_VMA_ASID, &tlb_info);
+					SBI_IPI_EVENT_SFENCE_VMA_ASID,
+					&tlb_info);
 		break;
 	case SBI_ECALL_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
@@ -89,7 +89,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
 		break;
 	default:
 		regs->a0 = SBI_ENOTSUPP;
-		ret = 0;
+		ret	 = 0;
 		break;
 	};
 
diff --git a/lib/sbi_emulate_csr.c b/lib/sbi_emulate_csr.c
index bdc2c676f58..5d6819e07ca 100644
--- a/lib/sbi_emulate_csr.c
+++ b/lib/sbi_emulate_csr.c
@@ -15,10 +15,8 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_timer.h>
 
-int sbi_emulate_csr_read(int csr_num,
-			 u32 hartid, ulong mstatus,
-			 struct sbi_scratch *scratch,
-			 ulong *csr_val)
+int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
+			 struct sbi_scratch *scratch, ulong *csr_val)
 {
 	ulong cen = -1UL;
 
@@ -85,18 +83,16 @@ int sbi_emulate_csr_read(int csr_num,
 		*csr_val = csr_read(CSR_MHPMEVENT4);
 		break;
 	default:
-		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n",
-			   __func__, hartid, csr_num);
+		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n", __func__,
+			   hartid, csr_num);
 		return SBI_ENOTSUPP;
 	};
 
 	return 0;
 }
 
-int sbi_emulate_csr_write(int csr_num,
-			  u32 hartid, ulong mstatus,
-			  struct sbi_scratch *scratch,
-			  ulong csr_val)
+int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
+			  struct sbi_scratch *scratch, ulong csr_val)
 {
 	switch (csr_num) {
 	case CSR_CYCLE:
@@ -132,8 +128,8 @@ int sbi_emulate_csr_write(int csr_num,
 		csr_write(CSR_MHPMEVENT4, csr_val);
 		break;
 	default:
-		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n",
-			   __func__, hartid, csr_num);
+		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n", __func__,
+			   hartid, csr_num);
 		return SBI_ENOTSUPP;
 	};
 
diff --git a/lib/sbi_fifo.c b/lib/sbi_fifo.c
index 85fcff9e0f8..a92b46cc776 100644
--- a/lib/sbi_fifo.c
+++ b/lib/sbi_fifo.c
@@ -12,12 +12,12 @@
 #include <sbi/sbi_fifo.h>
 #include <plat/string.h>
 
-void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem,
-		   u16 entries, u16 entry_size)
+void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
+		   u16 entry_size)
 {
-	fifo->queue = queue_mem;
+	fifo->queue	  = queue_mem;
 	fifo->num_entries = entries;
-	fifo->entry_size = entry_size;
+	fifo->entry_size  = entry_size;
 	SPIN_LOCK_INIT(&fifo->qlock);
 	fifo->avail = fifo->tail = 0;
 	memset(fifo->queue, 0, entries * entry_size);
@@ -75,7 +75,7 @@ bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
 static inline void __sbi_fifo_reset(struct sbi_fifo *fifo)
 {
 	fifo->avail = 0;
-	fifo->tail = 0;
+	fifo->tail  = 0;
 	memset(fifo->queue, 0, fifo->num_entries * fifo->entry_size);
 }
 
@@ -99,13 +99,13 @@ bool sbi_fifo_reset(struct sbi_fifo *fifo)
  * lead to deadlock.
  */
 int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
-			      int (*fptr)(void *in, void *data))
+			    int (*fptr)(void *in, void *data))
 {
 	int i, index = 0;
 	int ret = SBI_FIFO_UNCHANGED;
 	void *entry;
 
-	if (!fifo || !in )
+	if (!fifo || !in)
 		return ret;
 	spin_lock(&fifo->qlock);
 	if (__sbi_fifo_is_empty(fifo)) {
@@ -113,12 +113,12 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 		return ret;
 	}
 
-	for (i = 0; i < fifo->avail; i ++) {
+	for (i = 0; i < fifo->avail; i++) {
 		index = fifo->tail + i;
 		if (index >= fifo->num_entries)
 			index = index - fifo->num_entries;
-		entry = (void *)fifo->queue + (u32) index * fifo->entry_size;
-		ret = fptr(in, entry);
+		entry = (void *)fifo->queue + (u32)index * fifo->entry_size;
+		ret   = fptr(in, entry);
 		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
 			break;
 		} else if (ret == SBI_FIFO_RESET) {
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index 03e2dd5ed52..b35d4fa7efc 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -35,8 +35,7 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 		csr_write(CSR_MSTATUS, MSTATUS_FS);
 
 	/* Enable user/supervisor use of perf counters */
-	if (misa_extension('S') &&
-	     sbi_platform_has_scounteren(plat))
+	if (misa_extension('S') && sbi_platform_has_scounteren(plat))
 		csr_write(CSR_SCOUNTEREN, -1);
 	if (sbi_platform_has_mcounteren(plat))
 		csr_write(CSR_MCOUNTEREN, -1);
@@ -88,8 +87,7 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Send M-mode interrupts and most exceptions to S-mode */
 	interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
-	exceptions = (1U << CAUSE_MISALIGNED_FETCH) |
-		     (1U << CAUSE_BREAKPOINT) |
+	exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_BREAKPOINT) |
 		     (1U << CAUSE_USER_ECALL);
 	if (sbi_platform_has_mfaults_delegation(plat))
 		exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
@@ -166,7 +164,7 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 		return 0;
 
 	fw_size_log2 = log2roundup(scratch->fw_size);
-	fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
+	fw_start     = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
 
 	pmp_set(0, 0, fw_start, fw_size_log2);
 
@@ -175,8 +173,8 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 		count = (PMP_COUNT - 1);
 
 	for (i = 0; i < count; i++) {
-		if (sbi_platform_pmp_region_info(plat, hartid, i,
-						 &prot, &addr, &log2size))
+		if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr,
+						 &log2size))
 			continue;
 		pmp_set(i + 1, prot, addr, log2size);
 	}
@@ -208,10 +206,9 @@ void __attribute__((noreturn)) sbi_hart_hang(void)
 	__builtin_unreachable();
 }
 
-void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
-						    unsigned long arg1,
-						    unsigned long next_addr,
-						    unsigned long next_mode)
+void __attribute__((noreturn))
+sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
+		     unsigned long next_addr, unsigned long next_mode)
 {
 	unsigned long val;
 
@@ -248,13 +245,13 @@ void __attribute__((noreturn)) sbi_hart_switch_mode(unsigned long arg0,
 		csr_write(CSR_UIE, 0);
 	}
 
-	register unsigned long a0 asm ("a0") = arg0;
-	register unsigned long a1 asm ("a1") = arg1;
-	__asm__ __volatile__ ("mret" : : "r" (a0), "r" (a1));
+	register unsigned long a0 asm("a0") = arg0;
+	register unsigned long a1 asm("a1") = arg1;
+	__asm__ __volatile__("mret" : : "r"(a0), "r"(a1));
 	__builtin_unreachable();
 }
 
-static spinlock_t avail_hart_mask_lock = SPIN_LOCK_INITIALIZER;
+static spinlock_t avail_hart_mask_lock	      = SPIN_LOCK_INITIALIZER;
 static volatile unsigned long avail_hart_mask = 0;
 
 void sbi_hart_mark_available(u32 hartid)
@@ -290,9 +287,9 @@ struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 	return ((h2s)scratch->hartid_to_scratch)(hartid);
 }
 
-#define COLDBOOT_WAIT_BITMAP_SIZE	__riscv_xlen
+#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
 static spinlock_t coldboot_wait_bitmap_lock = SPIN_LOCK_INITIALIZER;
-static unsigned long coldboot_wait_bitmap = 0;
+static unsigned long coldboot_wait_bitmap   = 0;
 
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
@@ -302,7 +299,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
 	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
 		sbi_hart_hang();
-	
+
 	/* Set MSIE bit to receive IPI */
 	csr_set(CSR_MIE, MIP_MSIP);
 
@@ -325,9 +322,9 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int max_hart = sbi_platform_hart_count(plat);
+	int max_hart			= sbi_platform_hart_count(plat);
 
-	for(int i = 0; i < max_hart ; i++) {
+	for (int i = 0; i < max_hart; i++) {
 		/* send an IPI to every other hart */
 		spin_lock(&coldboot_wait_bitmap_lock);
 		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c
index 7184feabf29..554183867ac 100644
--- a/lib/sbi_illegal_insn.c
+++ b/lib/sbi_illegal_insn.c
@@ -16,48 +16,45 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_trap.h>
 
-typedef int (*illegal_insn_func)(ulong insn,
-				 u32 hartid, ulong mcause,
+typedef int (*illegal_insn_func)(ulong insn, u32 hartid, ulong mcause,
 				 struct sbi_trap_regs *regs,
 				 struct sbi_scratch *scratch);
 
-static int truly_illegal_insn(ulong insn,
-			      u32 hartid, ulong mcause,
+static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
 			      struct sbi_trap_regs *regs,
 			      struct sbi_scratch *scratch)
 {
 	return sbi_trap_redirect(regs, scratch, regs->mepc, mcause, insn);
 }
 
-static int system_opcode_insn(ulong insn,
-			      u32 hartid, ulong mcause,
+static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 			      struct sbi_trap_regs *regs,
 			      struct sbi_scratch *scratch)
 {
 	int do_write, rs1_num = (insn >> 15) & 0x1f;
 	ulong rs1_val = GET_RS1(insn, regs);
-	int csr_num = (u32)insn >> 20;
+	int csr_num   = (u32)insn >> 20;
 	ulong csr_val, new_csr_val;
 
-	if (sbi_emulate_csr_read(csr_num, hartid, regs->mstatus,
-				 scratch, &csr_val))
-		return truly_illegal_insn(insn, hartid, mcause,
-					  regs, scratch);
+	if (sbi_emulate_csr_read(csr_num, hartid, regs->mstatus, scratch,
+				 &csr_val))
+		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 
 	do_write = rs1_num;
 	switch (GET_RM(insn)) {
 	case 1:
 		new_csr_val = rs1_val;
-		do_write = 1;
+		do_write    = 1;
 		break;
 	case 2:
 		new_csr_val = csr_val | rs1_val;
 		break;
-	case 3: new_csr_val = csr_val & ~rs1_val;
+	case 3:
+		new_csr_val = csr_val & ~rs1_val;
 		break;
 	case 5:
 		new_csr_val = rs1_num;
-		do_write = 1;
+		do_write    = 1;
 		break;
 	case 6:
 		new_csr_val = csr_val | rs1_num;
@@ -66,15 +63,12 @@ static int system_opcode_insn(ulong insn,
 		new_csr_val = csr_val & ~rs1_num;
 		break;
 	default:
-		return truly_illegal_insn(insn, hartid, mcause,
-					  regs, scratch);
+		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 	};
 
-	if (do_write &&
-	    sbi_emulate_csr_write(csr_num, hartid, regs->mstatus,
-				  scratch, new_csr_val))
-		return truly_illegal_insn(insn, hartid, mcause,
-					  regs, scratch);
+	if (do_write && sbi_emulate_csr_write(csr_num, hartid, regs->mstatus,
+					      scratch, new_csr_val))
+		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 
 	SET_RD(insn, regs, csr_val);
 
@@ -128,8 +122,8 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 		if (insn == 0)
 			insn = get_insn(regs->mepc, NULL);
 		if ((insn & 3) != 3)
-			return truly_illegal_insn(insn, hartid, mcause,
-						  regs, scratch);
+			return truly_illegal_insn(insn, hartid, mcause, regs,
+						  scratch);
 	}
 
 	return illegal_insn_table[(insn & 0x7c) >> 2](insn, hartid, mcause,
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 32ad8221ead..5c74b45d6a1 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -18,14 +18,14 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_version.h>
 
-#define BANNER \
-	"   ____                    _____ ____ _____\n" \
-	"  / __ \\                  / ____|  _ \\_   _|\n" \
-	" | |  | |_ __   ___ _ __ | (___ | |_) || |\n" \
+#define BANNER                                              \
+	"   ____                    _____ ____ _____\n"     \
+	"  / __ \\                  / ____|  _ \\_   _|\n"  \
+	" | |  | |_ __   ___ _ __ | (___ | |_) || |\n"      \
 	" | |  | | '_ \\ / _ \\ '_ \\ \\___ \\|  _ < | |\n" \
-	" | |__| | |_) |  __/ | | |____) | |_) || |_\n" \
-	"  \\____/| .__/ \\___|_| |_|_____/|____/_____|\n" \
-	"        | |\n" \
+	" | |__| | |_) |  __/ | | |____) | |_) || |_\n"     \
+	"  \\____/| .__/ \\___|_| |_|_____/|____/_____|\n"  \
+	"        | |\n"                                     \
 	"        |_|\n\n"
 
 static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
@@ -34,9 +34,8 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	misa_string(str, sizeof(str));
-	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n",
-		   OPENSBI_VERSION_MAJOR, OPENSBI_VERSION_MINOR,
-		   __DATE__, __TIME__);
+	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n", OPENSBI_VERSION_MAJOR,
+		   OPENSBI_VERSION_MINOR, __DATE__, __TIME__);
 
 	sbi_printf(BANNER);
 
@@ -97,8 +96,8 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!sbi_platform_has_hart_hotplug(plat))
 		sbi_hart_wake_coldboot_harts(scratch, hartid);
 	sbi_hart_mark_available(hartid);
-	sbi_hart_switch_mode(hartid, scratch->next_arg1,
-			     scratch->next_addr, scratch->next_mode);
+	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
+			     scratch->next_mode);
 }
 
 static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
@@ -162,13 +161,13 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  */
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
-	bool coldboot = FALSE;
-	u32 hartid = sbi_current_hartid();
+	bool coldboot			= FALSE;
+	u32 hartid			= sbi_current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
-		
+
 	if (atomic_add_return(&coldboot_lottery, 1) == 1)
 		coldboot = TRUE;
 
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index f65f6368fa8..cc0d0d4cdb9 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -34,10 +34,9 @@ static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
 	curr_end = curr->start + curr->size;
 	if (next->start <= curr->start && next_end > curr_end) {
 		curr->start = next->start;
-		curr->size = next->size;
-		ret = SBI_FIFO_UPDATED;
-	} else if (next->start >= curr->start &&
-		   next_end <= curr_end) {
+		curr->size  = next->size;
+		ret	    = SBI_FIFO_UPDATED;
+	} else if (next->start >= curr->start && next_end <= curr_end) {
 		ret = SBI_FIFO_SKIP;
 	}
 
@@ -69,8 +68,8 @@ int sbi_tlb_fifo_update_cb(void *in, void *data)
 	if (!in && !!data)
 		return ret;
 
-	curr = (struct sbi_tlb_info *) data;
-	next = (struct sbi_tlb_info *) in;
+	curr = (struct sbi_tlb_info *)data;
+	next = (struct sbi_tlb_info *)in;
 	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
 	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
 		if (next->asid == curr->asid)
@@ -86,11 +85,11 @@ int sbi_tlb_fifo_update_cb(void *in, void *data)
 	return ret;
 }
 
-static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
-			u32 event, void *data)
+static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
+			void *data)
 {
 	struct sbi_scratch *remote_scratch = NULL;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat	   = sbi_platform_ptr(scratch);
 	struct sbi_fifo *ipi_tlb_fifo;
 	int ret = SBI_FIFO_UNCHANGED;
 
@@ -104,12 +103,12 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
 		ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
-		ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
-					   sbi_tlb_fifo_update_cb);
+		ret	     = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
+					       sbi_tlb_fifo_update_cb);
 		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
 			goto done;
 		}
-		while(sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
+		while (sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
 			/**
 			 * For now, Busy loop until there is space in the fifo.
 			 * There may be case where target hart is also
@@ -132,8 +131,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid,
 	return 0;
 }
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      ulong *pmask, u32 event, void *data)
+int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event,
+		      void *data)
 {
 	ulong i, m;
 	ulong mask = sbi_hart_available_mask();
@@ -153,7 +152,6 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
 	if (mask & (1UL << hartid))
 		sbi_ipi_send(scratch, hartid, event, data);
 
-
 	return 0;
 }
 
@@ -170,7 +168,7 @@ static void sbi_ipi_tlb_flush_all()
 static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
-	unsigned long size = tinfo->size;
+	unsigned long size  = tinfo->size;
 	unsigned long i;
 
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
@@ -179,17 +177,18 @@ static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__ ("sfence.vma %0"
-				      : : "r" (start + i)
-				      : "memory");
+		__asm__ __volatile__("sfence.vma %0"
+				     :
+				     : "r"(start + i)
+				     : "memory");
 	}
 }
 
 static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
-	unsigned long size = tinfo->size;
-	unsigned long asid = tinfo->asid;
+	unsigned long size  = tinfo->size;
+	unsigned long asid  = tinfo->asid;
 	unsigned long i;
 
 	if (start == 0 && size == 0) {
@@ -199,16 +198,18 @@ static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 
 	/* Flush entire MM context for a given ASID */
 	if (size == SBI_TLB_FLUSH_ALL) {
-		__asm__ __volatile__ ("sfence.vma x0, %0"
-				       : : "r" (asid)
-				       : "memory");
+		__asm__ __volatile__("sfence.vma x0, %0"
+				     :
+				     : "r"(asid)
+				     : "memory");
 		return;
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__ ("sfence.vma %0, %1"
-				      : : "r" (start + i), "r" (asid)
-				      : "memory");
+		__asm__ __volatile__("sfence.vma %0, %1"
+				     :
+				     : "r"(start + i), "r"(asid)
+				     : "memory");
 	}
 }
 
@@ -218,7 +219,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 	struct sbi_tlb_info tinfo;
 	unsigned int ipi_event;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	struct sbi_fifo *ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(scratch);
+	struct sbi_fifo *ipi_tlb_fifo	= sbi_tlb_fifo_head_ptr(scratch);
 
 	u32 hartid = sbi_current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
@@ -236,7 +237,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			break;
 		case SBI_IPI_EVENT_SFENCE_VMA:
 		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
-			while(!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
+			while (!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
 				if (tinfo.type == SBI_TLB_FLUSH_VMA)
 					sbi_ipi_sfence_vma(&tinfo);
 				else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
@@ -248,8 +249,9 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			sbi_hart_hang();
 			break;
 		};
-		ipi_type = atomic_raw_clear_bit(ipi_event, &sbi_ipi_data_ptr(scratch)->ipi_type);
-	} while(ipi_type > 0);
+		ipi_type = atomic_raw_clear_bit(
+			ipi_event, &sbi_ipi_data_ptr(scratch)->ipi_type);
+	} while (ipi_type > 0);
 }
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
@@ -263,6 +265,5 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
 
-	return sbi_platform_ipi_init(sbi_platform_ptr(scratch),
-				     cold_boot);
+	return sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
 }
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index 5b2df939234..e93464f7d7a 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -31,61 +31,61 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	int i, fp = 0, shift = 0, len = 0;
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
-		len = 4;
+		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
 #if __riscv_xlen == 64
 	} else if ((insn & INSN_MASK_LD) == INSN_MATCH_LD) {
-		len = 8;
+		len   = 8;
 		shift = 8 * (sizeof(ulong) - len);
 	} else if ((insn & INSN_MASK_LWU) == INSN_MATCH_LWU) {
 		len = 4;
 #endif
 	} else if ((insn & INSN_MASK_FLD) == INSN_MATCH_FLD) {
-		fp = 1;
+		fp  = 1;
 		len = 8;
 	} else if ((insn & INSN_MASK_FLW) == INSN_MATCH_FLW) {
-		fp = 1;
+		fp  = 1;
 		len = 4;
 	} else if ((insn & INSN_MASK_LH) == INSN_MATCH_LH) {
-		len = 2;
+		len   = 2;
 		shift = 8 * (sizeof(ulong) - len);
 	} else if ((insn & INSN_MASK_LHU) == INSN_MATCH_LHU) {
 		len = 2;
 #ifdef __riscv_compressed
-# if __riscv_xlen >= 64
+#if __riscv_xlen >= 64
 	} else if ((insn & INSN_MASK_C_LD) == INSN_MATCH_C_LD) {
-		len = 8;
+		len   = 8;
 		shift = 8 * (sizeof(ulong) - len);
-		insn = RVC_RS2S(insn) << SH_RD;
+		insn  = RVC_RS2S(insn) << SH_RD;
 	} else if ((insn & INSN_MASK_C_LDSP) == INSN_MATCH_C_LDSP &&
 		   ((insn >> SH_RD) & 0x1f)) {
-		len = 8;
+		len   = 8;
 		shift = 8 * (sizeof(ulong) - len);
-# endif
-	} else if ((insn & INSN_MASK_C_LW) ==INSN_MATCH_C_LW) {
-		len = 4;
+#endif
+	} else if ((insn & INSN_MASK_C_LW) == INSN_MATCH_C_LW) {
+		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
-		insn = RVC_RS2S(insn) << SH_RD;
+		insn  = RVC_RS2S(insn) << SH_RD;
 	} else if ((insn & INSN_MASK_C_LWSP) == INSN_MATCH_C_LWSP &&
 		   ((insn >> SH_RD) & 0x1f)) {
-		len = 4;
+		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
 	} else if ((insn & INSN_MASK_C_FLD) == INSN_MATCH_C_FLD) {
-		fp = 1;
-		len = 8;
+		fp   = 1;
+		len  = 8;
 		insn = RVC_RS2S(insn) << SH_RD;
 	} else if ((insn & INSN_MASK_C_FLDSP) == INSN_MATCH_C_FLDSP) {
-		fp = 1;
+		fp  = 1;
 		len = 8;
-# if __riscv_xlen == 32
+#if __riscv_xlen == 32
 	} else if ((insn & INSN_MASK_C_FLW) == INSN_MATCH_C_FLW) {
-		fp = 1;
-		len = 4;
+		fp   = 1;
+		len  = 4;
 		insn = RVC_RS2S(insn) << SH_RD;
 	} else if ((insn & INSN_MASK_C_FLWSP) == INSN_MATCH_C_FLWSP) {
-		fp = 1;
+		fp  = 1;
 		len = 4;
-# endif
+#endif
 #endif
 	} else
 		return SBI_EILL;
@@ -124,44 +124,44 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		len = 8;
 #endif
 	} else if ((insn & INSN_MASK_FSD) == INSN_MATCH_FSD) {
-		len = 8;
+		len	     = 8;
 		val.data_u64 = GET_F64_RS2(insn, regs);
 	} else if ((insn & INSN_MASK_FSW) == INSN_MATCH_FSW) {
-		len = 4;
+		len	       = 4;
 		val.data_ulong = GET_F32_RS2(insn, regs);
 	} else if ((insn & INSN_MASK_SH) == INSN_MATCH_SH) {
 		len = 2;
 #ifdef __riscv_compressed
-# if __riscv_xlen >= 64
+#if __riscv_xlen >= 64
 	} else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
-		len = 8;
+		len	       = 8;
 		val.data_ulong = GET_RS2S(insn, regs);
 	} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP &&
 		   ((insn >> SH_RD) & 0x1f)) {
-		len = 8;
+		len	       = 8;
 		val.data_ulong = GET_RS2C(insn, regs);
-# endif
+#endif
 	} else if ((insn & INSN_MASK_C_SW) == INSN_MATCH_C_SW) {
-		len = 4;
+		len	       = 4;
 		val.data_ulong = GET_RS2S(insn, regs);
 	} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP &&
 		   ((insn >> SH_RD) & 0x1f)) {
-		len = 4;
+		len	       = 4;
 		val.data_ulong = GET_RS2C(insn, regs);
 	} else if ((insn & INSN_MASK_C_FSD) == INSN_MATCH_C_FSD) {
-		len = 8;
+		len	     = 8;
 		val.data_u64 = GET_F64_RS2S(insn, regs);
 	} else if ((insn & INSN_MASK_C_FSDSP) == INSN_MATCH_C_FSDSP) {
-		len = 8;
+		len	     = 8;
 		val.data_u64 = GET_F64_RS2C(insn, regs);
-# if __riscv_xlen == 32
+#if __riscv_xlen == 32
 	} else if ((insn & INSN_MASK_C_FSW) == INSN_MATCH_C_FSW) {
-		len = 4;
+		len	       = 4;
 		val.data_ulong = GET_F32_RS2S(insn, regs);
 	} else if ((insn & INSN_MASK_C_FSWSP) == INSN_MATCH_C_FSWSP) {
-		len = 4;
+		len	       = 4;
 		val.data_ulong = GET_F32_RS2C(insn, regs);
-# endif
+#endif
 #endif
 	} else
 		return SBI_EILL;
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index b373828a6da..3381d40c419 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -15,26 +15,24 @@
 
 int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	return sbi_platform_early_init(sbi_platform_ptr(scratch),
-				       cold_boot);
+	return sbi_platform_early_init(sbi_platform_ptr(scratch), cold_boot);
 }
 
 int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	return sbi_platform_final_init(sbi_platform_ptr(scratch),
-				       cold_boot);
+	return sbi_platform_final_init(sbi_platform_ptr(scratch), cold_boot);
 }
 
-void __attribute__((noreturn)) sbi_system_reboot(struct sbi_scratch *scratch,
-						 u32 type)
+void __attribute__((noreturn))
+sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 
 {
 	sbi_platform_system_reboot(sbi_platform_ptr(scratch), type);
 	sbi_hart_hang();
 }
 
-void __attribute__((noreturn)) sbi_system_shutdown(struct sbi_scratch *scratch,
-						   u32 type)
+void __attribute__((noreturn))
+sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 {
 	/* First try the platform-specific method */
 	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
diff --git a/lib/sbi_timer.c b/lib/sbi_timer.c
index a2fb1a79bec..c58441d72b0 100644
--- a/lib/sbi_timer.c
+++ b/lib/sbi_timer.c
@@ -16,13 +16,12 @@
 u64 get_ticks(void)
 {
 	u32 lo, hi, tmp;
-	__asm__ __volatile__ (
-		"1:\n"
-		"rdtimeh %0\n"
-		"rdtime %1\n"
-		"rdtimeh %2\n"
-		"bne %0, %2, 1b"
-		: "=&r" (hi), "=&r" (lo), "=&r" (tmp));
+	__asm__ __volatile__("1:\n"
+			     "rdtimeh %0\n"
+			     "rdtime %1\n"
+			     "rdtimeh %2\n"
+			     "bne %0, %2, 1b"
+			     : "=&r"(hi), "=&r"(lo), "=&r"(tmp));
 	return ((u64)hi << 32) | lo;
 }
 #else
@@ -30,9 +29,7 @@ u64 get_ticks(void)
 {
 	unsigned long n;
 
-	__asm__ __volatile__ (
-		"rdtime %0"
-		: "=r" (n));
+	__asm__ __volatile__("rdtime %0" : "=r"(n));
 	return n;
 }
 #endif
@@ -54,8 +51,7 @@ void sbi_timer_event_stop(struct sbi_scratch *scratch)
 
 void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
 {
-	sbi_platform_timer_event_start(sbi_platform_ptr(scratch),
-				       next_event);
+	sbi_platform_timer_event_start(sbi_platform_ptr(scratch), next_event);
 	csr_clear(CSR_MIP, MIP_STIP);
 	csr_set(CSR_MIE, MIP_MTIP);
 }
@@ -68,6 +64,5 @@ void sbi_timer_process(struct sbi_scratch *scratch)
 
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	return sbi_platform_timer_init(sbi_platform_ptr(scratch),
-				       cold_boot);
+	return sbi_platform_timer_init(sbi_platform_ptr(scratch), cold_boot);
 }
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index a8c9b364c4d..4a448e5f542 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -19,49 +19,47 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-static void __noreturn sbi_trap_error(const char *msg,
-				      int rc, u32 hartid,
+static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
 				      ulong mcause, ulong mtval,
 				      struct sbi_trap_regs *regs)
 {
-	sbi_printf("%s: hart%d: %s (error %d)\n",
-		   __func__, hartid, msg, rc);
-	sbi_printf("%s: hart%d: mcause=0x%"PRILX" mtval=0x%"PRILX"\n",
+	sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc);
+	sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n",
 		   __func__, hartid, mcause, mtval);
-	sbi_printf("%s: hart%d: mepc=0x%"PRILX" mstatus=0x%"PRILX"\n",
+	sbi_printf("%s: hart%d: mepc=0x%" PRILX " mstatus=0x%" PRILX "\n",
 		   __func__, hartid, regs->mepc, regs->mstatus);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "ra", regs->ra, "sp", regs->sp);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "gp", regs->gp, "tp", regs->tp);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s0", regs->s0, "s1", regs->s1);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "a0", regs->a0, "a1", regs->a1);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "a2", regs->a2, "a3", regs->a3);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "a4", regs->a4, "a5", regs->a5);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "a6", regs->a6, "a7", regs->a7);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s2", regs->s2, "s3", regs->s3);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s4", regs->s4, "s5", regs->s5);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s6", regs->s6, "s7", regs->s7);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s8", regs->s8, "s9", regs->s9);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "s10", regs->s10, "s11", regs->s11);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "t0", regs->t0, "t1", regs->t1);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "t2", regs->t2, "t3", regs->t3);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX" %s=0x%"PRILX"\n",
-		   __func__, hartid, "t4", regs->t4, "t5", regs->t5);
-	sbi_printf("%s: hart%d: %s=0x%"PRILX"\n",
-		   __func__, hartid, "t6", regs->t6);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "ra", regs->ra, "sp", regs->sp);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "gp", regs->gp, "tp", regs->tp);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s0", regs->s0, "s1", regs->s1);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "a0", regs->a0, "a1", regs->a1);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "a2", regs->a2, "a3", regs->a3);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "a4", regs->a4, "a5", regs->a5);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "a6", regs->a6, "a7", regs->a7);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s2", regs->s2, "s3", regs->s3);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s4", regs->s4, "s5", regs->s5);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s6", regs->s6, "s7", regs->s7);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s8", regs->s8, "s9", regs->s9);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "s10", regs->s10, "s11", regs->s11);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "t0", regs->t0, "t1", regs->t1);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "t2", regs->t2, "t3", regs->t3);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
+		   hartid, "t4", regs->t4, "t5", regs->t5);
+	sbi_printf("%s: hart%d: %s=0x%" PRILX "\n", __func__, hartid, "t6",
+		   regs->t6);
 
 	sbi_hart_hang();
 }
@@ -77,8 +75,7 @@ static void __noreturn sbi_trap_error(const char *msg,
  *
  * @return 0 on success and negative error code on failure
  */
-int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch,
+int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 		      ulong epc, ulong cause, ulong tval)
 {
 	ulong new_mstatus, prev_mode;
@@ -100,8 +97,8 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	new_mstatus = regs->mstatus;
 
 	/* Clear MPP, SPP, SPIE, and SIE */
-	new_mstatus &= ~(MSTATUS_MPP |
-			 MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE);
+	new_mstatus &=
+		~(MSTATUS_MPP | MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE);
 
 	/* Set SPP */
 	if (prev_mode == PRV_S)
@@ -135,10 +132,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
  * @param regs pointer to register state
  * @param scratch pointer to sbi_scratch of current HART
  */
-void sbi_trap_handler(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch)
+void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 {
-	int rc = SBI_ENOTSUPP;
+	int rc		= SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
@@ -162,7 +158,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
-		rc = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
+		rc  = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
@@ -170,12 +166,13 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
-		rc = sbi_misaligned_store_handler(hartid, mcause, regs, scratch);
+		rc  = sbi_misaligned_store_handler(hartid, mcause, regs,
+						   scratch);
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
 	case CAUSE_HYPERVISOR_ECALL:
-		rc = sbi_ecall_handler(hartid, mcause, regs, scratch);
+		rc  = sbi_ecall_handler(hartid, mcause, regs, scratch);
 		msg = "ecall handler failed";
 		break;
 	default:
@@ -186,6 +183,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 
 trap_error:
 	if (rc) {
-		sbi_trap_error(msg, rc, hartid, mcause, csr_read(CSR_MTVAL), regs);
+		sbi_trap_error(msg, rc, hartid, mcause, csr_read(CSR_MTVAL),
+			       regs);
 	}
 }
diff --git a/platform/common/include/plat/irqchip/plic.h b/platform/common/include/plat/irqchip/plic.h
index 6e18440f7ce..eb97123bd54 100644
--- a/platform/common/include/plat/irqchip/plic.h
+++ b/platform/common/include/plat/irqchip/plic.h
@@ -14,10 +14,8 @@
 
 void plic_fdt_fixup(void *fdt, const char *compat);
 
-int plic_warm_irqchip_init(u32 target_hart,
-			   int m_cntx_id, int s_cntx_id);
+int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
 
-int plic_cold_irqchip_init(unsigned long base,
-			   u32 num_sources, u32 hart_count);
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
 
 #endif
diff --git a/platform/common/include/plat/serial/sifive-uart.h b/platform/common/include/plat/serial/sifive-uart.h
index 6a64595170d..f3233921f4d 100644
--- a/platform/common/include/plat/serial/sifive-uart.h
+++ b/platform/common/include/plat/serial/sifive-uart.h
@@ -16,7 +16,6 @@ void sifive_uart_putc(char ch);
 
 int sifive_uart_getc(void);
 
-int sifive_uart_init(unsigned long base,
-		     u32 in_freq, u32 baudrate);
+int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
 
 #endif
diff --git a/platform/common/include/plat/serial/uart8250.h b/platform/common/include/plat/serial/uart8250.h
index 3d58050a1d4..0a1b5d368b4 100644
--- a/platform/common/include/plat/serial/uart8250.h
+++ b/platform/common/include/plat/serial/uart8250.h
@@ -16,8 +16,7 @@ void uart8250_putc(char ch);
 
 int uart8250_getc(void);
 
-int uart8250_init(unsigned long base,
-		  u32 in_freq, u32 baudrate,
-		  u32 reg_shift, u32 reg_width);
+int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
+		  u32 reg_width);
 
 #endif
diff --git a/platform/common/include/plat/string.h b/platform/common/include/plat/string.h
index 67ad3f24dee..8259ef56d3f 100644
--- a/platform/common/include/plat/string.h
+++ b/platform/common/include/plat/string.h
@@ -18,7 +18,7 @@ size_t strlen(const char *str);
 
 size_t strnlen(const char *str, size_t count);
 
-char *strcpy(char *dest,const char *src);
+char *strcpy(char *dest, const char *src);
 
 char *strncpy(char *dest, const char *src, size_t count);
 
@@ -26,13 +26,13 @@ char *strchr(const char *s, int c);
 
 char *strrchr(const char *s, int c);
 
-void *memset(void *s,int c,size_t count);
+void *memset(void *s, int c, size_t count);
 
 void *memcpy(void *dest, const void *src, size_t count);
 
-void *memmove(void *dest,const void *src, size_t count);
+void *memmove(void *dest, const void *src, size_t count);
 
-int memcmp(const void *s1,const void *s2, size_t count);
+int memcmp(const void *s1, const void *s2, size_t count);
 
 void *memchr(const void *s, int c, size_t count);
 
diff --git a/platform/common/include/plat/tinyfdt.h b/platform/common/include/plat/tinyfdt.h
index 8d21262c0d8..3a681d978a0 100644
--- a/platform/common/include/plat/tinyfdt.h
+++ b/platform/common/include/plat/tinyfdt.h
@@ -38,33 +38,27 @@ ulong fdt_strlen(const char *str);
 int fdt_strcmp(const char *a, const char *b);
 
 /* Find index of matching string from a list of strings */
-int fdt_prop_string_index(const struct fdt_prop *prop,
-			      const char *str);
+int fdt_prop_string_index(const struct fdt_prop *prop, const char *str);
 
 /* Iterate over each property of matching node */
 int fdt_match_node_prop(void *fdt,
 			int (*match)(const struct fdt_node *node,
-				     const struct fdt_prop *prop,
-				     void *priv),
+				     const struct fdt_prop *prop, void *priv),
 			void *match_priv,
 			void (*fn)(const struct fdt_node *node,
-				   const struct fdt_prop *prop,
-				   void *priv),
+				   const struct fdt_prop *prop, void *priv),
 			void *fn_priv);
 
 /* Iterate over each property of compatible node */
-int fdt_compat_node_prop(void *fdt,
-			 const char *compat,
+int fdt_compat_node_prop(void *fdt, const char *compat,
 			 void (*fn)(const struct fdt_node *node,
-				    const struct fdt_prop *prop,
-				    void *priv),
+				    const struct fdt_prop *prop, void *priv),
 			 void *fn_priv);
 
 /* Iterate over each node and property */
 int fdt_walk(void *fdt,
 	     void (*fn)(const struct fdt_node *node,
-		 	const struct fdt_prop *prop,
-			void *priv),
+			const struct fdt_prop *prop, void *priv),
 	     void *fn_priv);
 
 /* Get size of FDT */
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index a9ff56093b5..90a7820e152 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -14,12 +14,12 @@
 #include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
 
-#define PLIC_PRIORITY_BASE		0x0
-#define PLIC_PENDING_BASE		0x1000
-#define PLIC_ENABLE_BASE		0x2000
-#define PLIC_ENABLE_STRIDE		0x80
-#define PLIC_CONTEXT_BASE		0x200000
-#define PLIC_CONTEXT_STRIDE		0x1000
+#define PLIC_PRIORITY_BASE 0x0
+#define PLIC_PENDING_BASE 0x1000
+#define PLIC_ENABLE_BASE 0x2000
+#define PLIC_ENABLE_STRIDE 0x80
+#define PLIC_CONTEXT_BASE 0x200000
+#define PLIC_CONTEXT_STRIDE 0x1000
 
 static u32 plic_hart_count;
 static u32 plic_num_sources;
@@ -27,31 +27,27 @@ static volatile void *plic_base;
 
 static void plic_set_priority(u32 source, u32 val)
 {
-	volatile void *plic_priority = plic_base +
-				PLIC_PRIORITY_BASE +
-				4 * source;
+	volatile void *plic_priority =
+		plic_base + PLIC_PRIORITY_BASE + 4 * source;
 	writel(val, plic_priority);
 }
 
 static void plic_set_thresh(u32 cntxid, u32 val)
 {
-	volatile void *plic_thresh = plic_base +
-				PLIC_CONTEXT_BASE +
-				PLIC_CONTEXT_STRIDE * cntxid;
+	volatile void *plic_thresh =
+		plic_base + PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
 	writel(val, plic_thresh);
 }
 
 static void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 {
-	volatile void *plic_ie = plic_base +
-				PLIC_ENABLE_BASE +
-				PLIC_ENABLE_STRIDE * cntxid;
+	volatile void *plic_ie =
+		plic_base + PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
 	writel(val, plic_ie + word_index * 4);
 }
 
 static void plic_fdt_fixup_prop(const struct fdt_node *node,
-				const struct fdt_prop *prop,
-				void *priv)
+				const struct fdt_prop *prop, void *priv)
 {
 	u32 *cells;
 	u32 i, cells_count;
@@ -61,15 +57,15 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 	if (strcmp(prop->name, "interrupts-extended"))
 		return;
 
-	cells = prop->value;
+	cells	    = prop->value;
 	cells_count = prop->len / sizeof(u32);
 
 	if (!cells_count)
 		return;
 
-	for (i = 0; i < (cells_count/2); i++) {
-		if (fdt_rev32(cells[2*i+1]) == IRQ_M_EXT)
-			cells[2*i+1] = fdt_rev32(0xffffffff);
+	for (i = 0; i < (cells_count / 2); i++) {
+		if (fdt_rev32(cells[2 * i + 1]) == IRQ_M_EXT)
+			cells[2 * i + 1] = fdt_rev32(0xffffffff);
 	}
 }
 
@@ -78,14 +74,13 @@ void plic_fdt_fixup(void *fdt, const char *compat)
 	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, NULL);
 }
 
-int plic_warm_irqchip_init(u32 target_hart,
-			   int m_cntx_id, int s_cntx_id)
+int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic_num_sources / 32 + 1;
 
 	if (plic_hart_count <= target_hart)
 		return -1;
-	
+
 	/* By default, disable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
@@ -109,14 +104,13 @@ int plic_warm_irqchip_init(u32 target_hart,
 	return 0;
 }
 
-int plic_cold_irqchip_init(unsigned long base,
-			   u32 num_sources, u32 hart_count)
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count)
 {
 	int i;
 
-	plic_hart_count = hart_count;
+	plic_hart_count	 = hart_count;
 	plic_num_sources = num_sources;
-	plic_base = (void *)base;
+	plic_base	 = (void *)base;
 
 	/* Configure default priorities of all IRQs */
 	for (i = 1; i <= plic_num_sources; i++)
diff --git a/platform/common/libc/string.c b/platform/common/libc/string.c
index 7cc0fb7caa3..6e273d02435 100644
--- a/platform/common/libc/string.c
+++ b/platform/common/libc/string.c
@@ -17,7 +17,8 @@
 int strcmp(const char *a, const char *b)
 {
 	/* search first diff or end of string */
-	for (; *a == *b && *a != '\0'; a++, b++);
+	for (; *a == *b && *a != '\0'; a++, b++)
+		;
 
 	return *a - *b;
 }
@@ -51,7 +52,7 @@ char *strcpy(char *dest, const char *src)
 {
 	char *ret = dest;
 
-	while(*src != '\0') {
+	while (*src != '\0') {
 		*dest++ = *src++;
 	}
 
@@ -62,7 +63,7 @@ char *strncpy(char *dest, const char *src, size_t count)
 {
 	char *ret = dest;
 
-	while(count-- && *src != '\0') {
+	while (count-- && *src != '\0') {
 		*dest++ = *src++;
 	}
 
@@ -71,7 +72,7 @@ char *strncpy(char *dest, const char *src, size_t count)
 
 char *strchr(const char *s, int c)
 {
-	while(*s != '\0' && *s != (char)c)
+	while (*s != '\0' && *s != (char)c)
 		s++;
 
 	if (*s == '\0')
@@ -96,7 +97,7 @@ void *memset(void *s, int c, size_t count)
 {
 	char *temp = s;
 
-	while(count > 0 ){
+	while (count > 0) {
 		count--;
 		*temp++ = c;
 	}
@@ -106,7 +107,7 @@ void *memset(void *s, int c, size_t count)
 
 void *memcpy(void *dest, const void *src, size_t count)
 {
-	char *temp1 = dest;
+	char *temp1	  = dest;
 	const char *temp2 = src;
 
 	while (count > 0) {
@@ -119,14 +120,14 @@ void *memcpy(void *dest, const void *src, size_t count)
 
 void *memmove(void *dest, const void *src, size_t count)
 {
-	char *temp1 = (char *)dest;
+	char *temp1	  = (char *)dest;
 	const char *temp2 = (char *)src;
 
 	if (src == dest)
 		return dest;
 
 	if (dest < src) {
-		while(count > 0) {
+		while (count > 0) {
 			*temp1++ = *temp2++;
 			count--;
 		}
@@ -134,7 +135,7 @@ void *memmove(void *dest, const void *src, size_t count)
 		temp1 = dest + count - 1;
 		temp2 = src + count - 1;
 
-		while(count > 0) {
+		while (count > 0) {
 			*temp1-- = *temp2--;
 			count--;
 		}
@@ -165,7 +166,7 @@ void *memchr(const void *s, int c, size_t count)
 
 	while (count > 0) {
 		if ((unsigned char)c == *temp++) {
-			return (void *)(temp-1);
+			return (void *)(temp - 1);
 		}
 		count--;
 	}
diff --git a/platform/common/libfdt/libfdt.h b/platform/common/libfdt/libfdt.h
index a470d1df6d2..4d6e58b9083 100644
--- a/platform/common/libfdt/libfdt.h
+++ b/platform/common/libfdt/libfdt.h
@@ -51,8 +51,8 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <libfdt_env.h>
 #include <fdt.h>
+#include <libfdt_env.h>
 
 #define FDT_FIRST_SUPPORTED_VERSION	0x02
 #define FDT_LAST_SUPPORTED_VERSION	0x11
diff --git a/platform/common/libfdt/libfdt_env.h b/platform/common/libfdt/libfdt_env.h
index 235a1fc6a5f..2428fd5246d 100644
--- a/platform/common/libfdt/libfdt_env.h
+++ b/platform/common/libfdt/libfdt_env.h
@@ -52,8 +52,8 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <sbi/sbi_types.h>
 #include <plat/string.h>
+#include <sbi/sbi_types.h>
 
 #define INT_MAX		((int)(~0U >> 1))
 #define UINT_MAX	((unsigned int)~0U)
diff --git a/platform/common/serial/sifive-uart.c b/platform/common/serial/sifive-uart.c
index 9d9490c30a9..de002722ec2 100644
--- a/platform/common/serial/sifive-uart.c
+++ b/platform/common/serial/sifive-uart.c
@@ -68,7 +68,8 @@ static void set_reg(u32 num, u32 val)
 
 void sifive_uart_putc(char ch)
 {
-	while (get_reg(UART_REG_TXFIFO) & UART_TXFIFO_FULL);
+	while (get_reg(UART_REG_TXFIFO) & UART_TXFIFO_FULL)
+		;
 
 	set_reg(UART_REG_TXFIFO, ch);
 }
@@ -81,11 +82,10 @@ int sifive_uart_getc(void)
 	return -1;
 }
 
-int sifive_uart_init(unsigned long base,
-		     u32 in_freq, u32 baudrate)
+int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
-	uart_base = (volatile void *)base;
-	uart_in_freq = in_freq;
+	uart_base     = (volatile void *)base;
+	uart_in_freq  = in_freq;
 	uart_baudrate = baudrate;
 
 	/* Configure baudrate */
diff --git a/platform/common/serial/uart8250.c b/platform/common/serial/uart8250.c
index ba67c73dea2..ceefb53d4db 100644
--- a/platform/common/serial/uart8250.c
+++ b/platform/common/serial/uart8250.c
@@ -70,7 +70,8 @@ static void set_reg(u32 num, u32 val)
 
 void uart8250_putc(char ch)
 {
-	while ((get_reg(UART_LSR_OFFSET) & UART_LSR_THRE) == 0);
+	while ((get_reg(UART_LSR_OFFSET) & UART_LSR_THRE) == 0)
+		;
 
 	set_reg(UART_THR_OFFSET, ch);
 }
@@ -82,17 +83,16 @@ int uart8250_getc(void)
 	return -1;
 }
 
-int uart8250_init(unsigned long base,
-		  u32 in_freq, u32 baudrate,
-		  u32 reg_shift, u32 reg_width)
+int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
+		  u32 reg_width)
 {
 	u16 bdiv;
 
-	uart8250_base = (volatile void *)base;
+	uart8250_base	   = (volatile void *)base;
 	uart8250_reg_shift = reg_shift;
 	uart8250_reg_width = reg_width;
-	uart8250_in_freq = in_freq;
-	uart8250_baudrate = baudrate;
+	uart8250_in_freq   = in_freq;
+	uart8250_baudrate  = baudrate;
 
 	bdiv = uart8250_in_freq / (16 * uart8250_baudrate);
 
diff --git a/platform/common/sys/clint.c b/platform/common/sys/clint.c
index ee79a544c9a..eba056f18f6 100644
--- a/platform/common/sys/clint.c
+++ b/platform/common/sys/clint.c
@@ -74,8 +74,8 @@ int clint_cold_ipi_init(unsigned long base, u32 hart_count)
 {
 	/* Figure-out CLINT IPI register address */
 	clint_ipi_hart_count = hart_count;
-	clint_ipi_base = (void *)base;
-	clint_ipi = (u32 *)clint_ipi_base;
+	clint_ipi_base	     = (void *)base;
+	clint_ipi	     = (u32 *)clint_ipi_base;
 
 	return 0;
 }
@@ -105,7 +105,7 @@ void clint_timer_event_stop(void)
 	if (clint_time_hart_count <= target_hart)
 		return;
 
-	/* Clear CLINT Time Compare */
+		/* Clear CLINT Time Compare */
 #if __riscv_xlen == 64
 	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
 #else
@@ -121,13 +121,14 @@ void clint_timer_event_start(u64 next_event)
 	if (clint_time_hart_count <= target_hart)
 		return;
 
-	/* Program CLINT Time Compare */
+		/* Program CLINT Time Compare */
 #if __riscv_xlen == 64
 	writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
 #else
 	u32 mask = -1UL;
 	writel_relaxed(next_event & mask, &clint_time_cmp[target_hart]);
-	writel_relaxed(next_event >> 32, (void *)(&clint_time_cmp[target_hart]) + 0x04);
+	writel_relaxed(next_event >> 32,
+		       (void *)(&clint_time_cmp[target_hart]) + 0x04);
 #endif
 }
 
@@ -135,11 +136,10 @@ int clint_warm_timer_init(void)
 {
 	u32 target_hart = sbi_current_hartid();
 
-	if (clint_time_hart_count <= target_hart ||
-	    !clint_time_base)
+	if (clint_time_hart_count <= target_hart || !clint_time_base)
 		return -1;
 
-	/* Clear CLINT Time Compare */
+		/* Clear CLINT Time Compare */
 #if __riscv_xlen == 64
 	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
 #else
@@ -154,9 +154,9 @@ int clint_cold_timer_init(unsigned long base, u32 hart_count)
 {
 	/* Figure-out CLINT Time register address */
 	clint_time_hart_count = hart_count;
-	clint_time_base = (void *)base;
-	clint_time_val = (u64 *)(clint_time_base + 0xbff8);
-	clint_time_cmp = (u64 *)(clint_time_base + 0x4000);
+	clint_time_base	      = (void *)base;
+	clint_time_val	      = (u64 *)(clint_time_base + 0xbff8);
+	clint_time_cmp	      = (u64 *)(clint_time_base + 0x4000);
 
 	return 0;
 }
diff --git a/platform/common/tinyfdt.c b/platform/common/tinyfdt.c
index e83f5406171..e62a80990f5 100644
--- a/platform/common/tinyfdt.c
+++ b/platform/common/tinyfdt.c
@@ -10,8 +10,8 @@
 #include <plat/string.h>
 #include <plat/tinyfdt.h>
 
-#define FDT_MAGIC	0xd00dfeed
-#define FDT_VERSION	17
+#define FDT_MAGIC 0xd00dfeed
+#define FDT_VERSION 17
 
 struct fdt_header {
 	u32 magic;
@@ -26,28 +26,25 @@ struct fdt_header {
 	u32 size_dt_struct;
 } __attribute__((packed));
 
-#define FDT_BEGIN_NODE	1
-#define FDT_END_NODE	2
-#define FDT_PROP	3
-#define FDT_NOP		4
-#define FDT_END		9
+#define FDT_BEGIN_NODE 1
+#define FDT_END_NODE 2
+#define FDT_PROP 3
+#define FDT_NOP 4
+#define FDT_END 9
 
 u32 fdt_rev32(u32 v)
 {
-	return ((v & 0x000000FF) << 24) |
-	       ((v & 0x0000FF00) << 8) |
-	       ((v & 0x00FF0000) >> 8) |
-	       ((v & 0xFF000000) >> 24);
+	return ((v & 0x000000FF) << 24) | ((v & 0x0000FF00) << 8) |
+	       ((v & 0x00FF0000) >> 8) | ((v & 0xFF000000) >> 24);
 }
 
-int fdt_prop_string_index(const struct fdt_prop *prop,
-			  const char *str)
+int fdt_prop_string_index(const struct fdt_prop *prop, const char *str)
 {
 	int i;
 	ulong l = 0;
 	const char *p, *end;
 
-	p = prop->value;
+	p   = prop->value;
 	end = p + prop->len;
 
 	for (i = 0; p < end; i++, p += l) {
@@ -62,14 +59,13 @@ int fdt_prop_string_index(const struct fdt_prop *prop,
 }
 
 struct recursive_iter_info {
-	void (*fn)(const struct fdt_node *node,
-		   const struct fdt_prop *prop,
+	void (*fn)(const struct fdt_node *node, const struct fdt_prop *prop,
 		   void *priv);
 	void *fn_priv;
 	const char *str;
 };
 
-#define DATA32(ptr)	fdt_rev32(*((u32*)ptr))
+#define DATA32(ptr) fdt_rev32(*((u32 *)ptr))
 
 static void recursive_iter(char **data, struct recursive_iter_info *info,
 			   const struct fdt_node *parent)
@@ -85,7 +81,7 @@ static void recursive_iter(char **data, struct recursive_iter_info *info,
 	(*data) += sizeof(u32);
 
 	node.parent = parent;
-	node.name = *data;
+	node.name   = *data;
 
 	*data += strlen(*data) + 1;
 	while ((ulong)(*data) % sizeof(u32) != 0)
@@ -95,7 +91,7 @@ static void recursive_iter(char **data, struct recursive_iter_info *info,
 
 	/* Default cell counts, as per the FDT spec */
 	node.address_cells = 2;
-	node.size_cells = 1;
+	node.size_cells	   = 1;
 
 	info->fn(&node, NULL, info->fn_priv);
 
@@ -129,19 +125,16 @@ static void recursive_iter(char **data, struct recursive_iter_info *info,
 }
 
 struct match_iter_info {
-	int (*match)(const struct fdt_node *node,
-		     const struct fdt_prop *prop,
+	int (*match)(const struct fdt_node *node, const struct fdt_prop *prop,
 		     void *priv);
 	void *match_priv;
-	void (*fn)(const struct fdt_node *node,
-		   const struct fdt_prop *prop,
+	void (*fn)(const struct fdt_node *node, const struct fdt_prop *prop,
 		   void *priv);
 	void *fn_priv;
 	const char *str;
 };
 
-static void match_iter(const struct fdt_node *node,
-		       const struct fdt_prop *prop,
+static void match_iter(const struct fdt_node *node, const struct fdt_prop *prop,
 		       void *priv)
 {
 	char *data;
@@ -185,12 +178,10 @@ static void match_iter(const struct fdt_node *node,
 
 int fdt_match_node_prop(void *fdt,
 			int (*match)(const struct fdt_node *node,
-				     const struct fdt_prop *prop,
-				     void *priv),
+				     const struct fdt_prop *prop, void *priv),
 			void *match_priv,
 			void (*fn)(const struct fdt_node *node,
-				   const struct fdt_prop *prop,
-				   void *priv),
+				   const struct fdt_prop *prop, void *priv),
 			void *fn_priv)
 {
 	char *data;
@@ -201,23 +192,23 @@ int fdt_match_node_prop(void *fdt,
 
 	if (!fdt || !match)
 		return -1;
- 
+
 	header = fdt;
 	if (fdt_rev32(header->magic) != FDT_MAGIC ||
 	    fdt_rev32(header->last_comp_version) > FDT_VERSION)
 		return -1;
 	string_offset = fdt_rev32(header->off_dt_strings);
-	data_offset = fdt_rev32(header->off_dt_struct);
+	data_offset   = fdt_rev32(header->off_dt_struct);
 
-	minfo.match = match;
+	minfo.match	 = match;
 	minfo.match_priv = match_priv;
-	minfo.fn = fn;
-	minfo.fn_priv = fn_priv;
-	minfo.str = (const char *)(fdt + string_offset);
+	minfo.fn	 = fn;
+	minfo.fn_priv	 = fn_priv;
+	minfo.str	 = (const char *)(fdt + string_offset);
 
-	rinfo.fn = match_iter;
+	rinfo.fn      = match_iter;
 	rinfo.fn_priv = &minfo;
-	rinfo.str = minfo.str;
+	rinfo.str     = minfo.str;
 
 	data = (char *)(fdt + data_offset);
 	recursive_iter(&data, &rinfo, NULL);
@@ -230,8 +221,7 @@ struct match_compat_info {
 };
 
 static int match_compat(const struct fdt_node *node,
-			const struct fdt_prop *prop,
-			void *priv)
+			const struct fdt_prop *prop, void *priv)
 {
 	struct match_compat_info *cinfo = priv;
 
@@ -247,21 +237,17 @@ static int match_compat(const struct fdt_node *node,
 	return 1;
 }
 
-int fdt_compat_node_prop(void *fdt,
-			 const char *compat,
+int fdt_compat_node_prop(void *fdt, const char *compat,
 			 void (*fn)(const struct fdt_node *node,
-				    const struct fdt_prop *prop,
-				    void *priv),
+				    const struct fdt_prop *prop, void *priv),
 			 void *fn_priv)
 {
 	struct match_compat_info cinfo = { .compat = compat };
 
-	return fdt_match_node_prop(fdt, match_compat, &cinfo,
-				       fn, fn_priv);
+	return fdt_match_node_prop(fdt, match_compat, &cinfo, fn, fn_priv);
 }
 
-static int match_walk(const struct fdt_node *node,
-		      const struct fdt_prop *prop,
+static int match_walk(const struct fdt_node *node, const struct fdt_prop *prop,
 		      void *priv)
 {
 	if (!prop)
@@ -272,12 +258,10 @@ static int match_walk(const struct fdt_node *node,
 
 int fdt_walk(void *fdt,
 	     void (*fn)(const struct fdt_node *node,
-			const struct fdt_prop *prop,
-			void *priv),
+			const struct fdt_prop *prop, void *priv),
 	     void *fn_priv)
 {
-	return fdt_match_node_prop(fdt, match_walk, NULL,
-				       fn, fn_priv);
+	return fdt_match_node_prop(fdt, match_walk, NULL, fn, fn_priv);
 }
 
 u32 fdt_size(void *fdt)
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index cba83dae8ac..136e58e9fca 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -17,7 +17,7 @@
 #include "platform.h"
 #include "uarths.h"
 
-#define K210_UART_BAUDRATE		115200
+#define K210_UART_BAUDRATE 115200
 
 static int k210_console_init(void)
 {
@@ -42,16 +42,13 @@ static int k210_irqchip_init(bool cold_boot)
 	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(PLIC_BASE_ADDR,
-					    PLIC_NUM_SOURCES,
+		rc = plic_cold_irqchip_init(PLIC_BASE_ADDR, PLIC_NUM_SOURCES,
 					    K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid,
-				      (2 * hartid),
-				      (2 * hartid + 1));
+	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
 }
 
 static int k210_ipi_init(bool cold_boot)
@@ -59,8 +56,7 @@ static int k210_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(CLINT_BASE_ADDR,
-					 K210_HART_COUNT);
+		rc = clint_cold_ipi_init(CLINT_BASE_ADDR, K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -73,8 +69,7 @@ static int k210_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(CLINT_BASE_ADDR,
-					   K210_HART_COUNT);
+		rc = clint_cold_timer_init(CLINT_BASE_ADDR, K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -100,11 +95,11 @@ static int k210_system_shutdown(u32 type)
 
 const struct sbi_platform platform = {
 
-	.name = "Kendryte K210",
+	.name	  = "Kendryte K210",
 	.features = SBI_PLATFORM_HAS_TIMER_VALUE,
 
-	.hart_count = K210_HART_COUNT,
-	.hart_stack_size = K210_HART_STACK_SIZE,
+	.hart_count	    = K210_HART_COUNT,
+	.hart_stack_size    = K210_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
 
 	.console_init = k210_console_init,
@@ -113,16 +108,16 @@ const struct sbi_platform platform = {
 
 	.irqchip_init = k210_irqchip_init,
 
-	.ipi_init = k210_ipi_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_sync = clint_ipi_sync,
+	.ipi_init  = k210_ipi_init,
+	.ipi_send  = clint_ipi_send,
+	.ipi_sync  = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 
-	.timer_init = k210_timer_init,
-	.timer_value = clint_timer_value,
-	.timer_event_stop = clint_timer_event_stop,
+	.timer_init	   = k210_timer_init,
+	.timer_value	   = clint_timer_value,
+	.timer_event_stop  = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
 
-	.system_reboot = k210_system_reboot,
+	.system_reboot	 = k210_system_reboot,
 	.system_shutdown = k210_system_shutdown
 };
diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
index 8f8622d859e..3c077774c49 100644
--- a/platform/kendryte/k210/sysctl.c
+++ b/platform/kendryte/k210/sysctl.c
@@ -28,9 +28,9 @@ static u32 sysctl_pll0_get_freq(void)
 	u32 freq_in, nr, nf, od;
 
 	freq_in = SYSCTRL_CLOCK_FREQ_IN0;
-	nr      = sysctl->pll0.clkr0 + 1;
-	nf      = sysctl->pll0.clkf0 + 1;
-	od      = sysctl->pll0.clkod0 + 1;
+	nr	= sysctl->pll0.clkr0 + 1;
+	nf	= sysctl->pll0.clkf0 + 1;
+	od	= sysctl->pll0.clkod0 + 1;
 
 	/*
 	 * Get final PLL output freq
@@ -50,9 +50,8 @@ u32 sysctl_get_cpu_freq(void)
 		return SYSCTRL_CLOCK_FREQ_IN0;
 	case 1:
 		return sysctl_pll0_get_freq() /
-			(2ULL << (int)sysctl->clk_sel0.aclk_divider_sel);
+		       (2ULL << (int)sysctl->clk_sel0.aclk_divider_sel);
 	default:
 		return 0;
 	}
 }
-
diff --git a/platform/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
index 357acc5b4f0..40d4e8f1686 100644
--- a/platform/kendryte/k210/sysctl.h
+++ b/platform/kendryte/k210/sysctl.h
@@ -588,7 +588,7 @@ typedef struct _sysctl_clk_th6 {
 typedef struct _sysctl_misc {
 	u32 debug_sel : 6;
 	u32 reserved0 : 4;
-	u32 spi_dvp_data_enable: 1;
+	u32 spi_dvp_data_enable : 1;
 	u32 reserved1 : 21;
 } __attribute__((packed, aligned(4))) sysctl_misc_t;
 
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
index 3b3cbb90276..67d5d1c66b6 100644
--- a/platform/kendryte/k210/uarths.c
+++ b/platform/kendryte/k210/uarths.c
@@ -26,19 +26,19 @@ static volatile struct uarths *const uarths =
 void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
 {
 	u32 freq = sysctl_get_cpu_freq();
-	u16 div = freq / baud_rate - 1;
+	u16 div	 = freq / baud_rate - 1;
 
 	/* Set UART registers */
-	uarths->div.div = div;
+	uarths->div.div	     = div;
 	uarths->txctrl.nstop = stopbit;
-	uarths->txctrl.txen = 1;
-	uarths->rxctrl.rxen = 1;
+	uarths->txctrl.txen  = 1;
+	uarths->rxctrl.rxen  = 1;
 	uarths->txctrl.txcnt = 0;
 	uarths->rxctrl.rxcnt = 0;
-	uarths->ip.txwm = 1;
-	uarths->ip.rxwm = 0;
-	uarths->ie.txwm = 1;
-	uarths->ie.rxwm = 0;
+	uarths->ip.txwm	     = 1;
+	uarths->ip.rxwm	     = 0;
+	uarths->ie.txwm	     = 1;
+	uarths->ie.rxwm	     = 0;
 
 	/* Clear input */
 	if (!uarths->rxdata.empty)
@@ -47,7 +47,8 @@ void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
 
 void uarths_putc(char c)
 {
-	while (uarths->txdata.full);
+	while (uarths->txdata.full)
+		;
 
 	uarths->txdata.data = (u8)c;
 }
@@ -61,4 +62,3 @@ int uarths_getc(void)
 
 	return rx.data;
 }
-
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
index 3bfb8d56bc6..18b7e95f1a4 100644
--- a/platform/kendryte/k210/uarths.h
+++ b/platform/kendryte/k210/uarths.h
@@ -162,10 +162,7 @@ struct uarths {
 	struct uarths_div div;
 } __attribute__((packed, aligned(4)));
 
-enum uarths_stopbit {
-	UARTHS_STOP_1,
-	UARTHS_STOP_2
-};
+enum uarths_stopbit { UARTHS_STOP_1, UARTHS_STOP_2 };
 
 void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit);
 void uarths_putc(char c);
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 9ea090a254d..1dca2a144d9 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -52,15 +52,15 @@ static u32 sifive_u_pmp_region_count(u32 hartid)
 	return 1;
 }
 
-static int sifive_u_pmp_region_info(u32 hartid, u32 index,
-				    ulong *prot, ulong *addr, ulong *log2size)
+static int sifive_u_pmp_region_info(u32 hartid, u32 index, ulong *prot,
+				    ulong *addr, ulong *log2size)
 {
 	int ret = 0;
 
 	switch (index) {
 	case 0:
-		*prot = PMP_R | PMP_W | PMP_X;
-		*addr = 0;
+		*prot	  = PMP_R | PMP_W | PMP_X;
+		*addr	  = 0;
 		*log2size = __riscv_xlen;
 		break;
 	default:
@@ -73,8 +73,8 @@ static int sifive_u_pmp_region_info(u32 hartid, u32 index,
 
 static int sifive_u_console_init(void)
 {
-	return sifive_uart_init(SIFIVE_U_UART0_ADDR,
-				SIFIVE_U_PERIPH_CLK, 115200);
+	return sifive_uart_init(SIFIVE_U_UART0_ADDR, SIFIVE_U_PERIPH_CLK,
+				115200);
 }
 
 static int sifive_u_irqchip_init(bool cold_boot)
@@ -90,9 +90,7 @@ static int sifive_u_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid,
-				      (2 * hartid),
-				      (2 * hartid + 1));
+	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
 }
 
 static int sifive_u_ipi_init(bool cold_boot)
@@ -130,26 +128,26 @@ static int sifive_u_system_down(u32 type)
 }
 
 const struct sbi_platform platform = {
-	.name = "QEMU SiFive Unleashed",
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = SIFIVE_U_HART_COUNT,
-	.hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
+	.name		    = "QEMU SiFive Unleashed",
+	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count	    = SIFIVE_U_HART_COUNT,
+	.hart_stack_size    = SIFIVE_U_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
-	.pmp_region_count = sifive_u_pmp_region_count,
-	.pmp_region_info = sifive_u_pmp_region_info,
-	.final_init = sifive_u_final_init,
-	.console_putc = sifive_uart_putc,
-	.console_getc = sifive_uart_getc,
-	.console_init = sifive_u_console_init,
-	.irqchip_init = sifive_u_irqchip_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_sync = clint_ipi_sync,
-	.ipi_clear = clint_ipi_clear,
-	.ipi_init = sifive_u_ipi_init,
-	.timer_value = clint_timer_value,
-	.timer_event_stop = clint_timer_event_stop,
-	.timer_event_start = clint_timer_event_start,
-	.timer_init = sifive_u_timer_init,
-	.system_reboot = sifive_u_system_down,
-	.system_shutdown = sifive_u_system_down
+	.pmp_region_count   = sifive_u_pmp_region_count,
+	.pmp_region_info    = sifive_u_pmp_region_info,
+	.final_init	    = sifive_u_final_init,
+	.console_putc	    = sifive_uart_putc,
+	.console_getc	    = sifive_uart_getc,
+	.console_init	    = sifive_u_console_init,
+	.irqchip_init	    = sifive_u_irqchip_init,
+	.ipi_send	    = clint_ipi_send,
+	.ipi_sync	    = clint_ipi_sync,
+	.ipi_clear	    = clint_ipi_clear,
+	.ipi_init	    = sifive_u_ipi_init,
+	.timer_value	    = clint_timer_value,
+	.timer_event_stop   = clint_timer_event_stop,
+	.timer_event_start  = clint_timer_event_start,
+	.timer_init	    = sifive_u_timer_init,
+	.system_reboot	    = sifive_u_system_down,
+	.system_shutdown    = sifive_u_system_down
 };
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index df62991f356..96e375dfa93 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -56,15 +56,15 @@ static u32 virt_pmp_region_count(u32 hartid)
 	return 1;
 }
 
-static int virt_pmp_region_info(u32 hartid, u32 index,
-				ulong *prot, ulong *addr, ulong *log2size)
+static int virt_pmp_region_info(u32 hartid, u32 index, ulong *prot, ulong *addr,
+				ulong *log2size)
 {
 	int ret = 0;
 
 	switch (index) {
 	case 0:
-		*prot = PMP_R | PMP_W | PMP_X;
-		*addr = 0;
+		*prot	  = PMP_R | PMP_W | PMP_X;
+		*addr	  = 0;
 		*log2size = __riscv_xlen;
 		break;
 	default:
@@ -77,8 +77,7 @@ static int virt_pmp_region_info(u32 hartid, u32 index,
 
 static int virt_console_init(void)
 {
-	return uart8250_init(VIRT_UART16550_ADDR,
-			     VIRT_UART_SHIFTREG_ADDR,
+	return uart8250_init(VIRT_UART16550_ADDR, VIRT_UART_SHIFTREG_ADDR,
 			     VIRT_UART_BAUDRATE, 0, 1);
 }
 
@@ -88,16 +87,13 @@ static int virt_irqchip_init(bool cold_boot)
 	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(VIRT_PLIC_ADDR,
-					    VIRT_PLIC_NUM_SOURCES,
-					    VIRT_HART_COUNT);
+		rc = plic_cold_irqchip_init(
+			VIRT_PLIC_ADDR, VIRT_PLIC_NUM_SOURCES, VIRT_HART_COUNT);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid,
-				      (2 * hartid),
-				      (2 * hartid + 1));
+	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
 }
 
 static int virt_ipi_init(bool cold_boot)
@@ -105,8 +101,7 @@ static int virt_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(VIRT_CLINT_ADDR,
-					 VIRT_HART_COUNT);
+		rc = clint_cold_ipi_init(VIRT_CLINT_ADDR, VIRT_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -119,8 +114,7 @@ static int virt_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(VIRT_CLINT_ADDR,
-					   VIRT_HART_COUNT);
+		rc = clint_cold_timer_init(VIRT_CLINT_ADDR, VIRT_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -139,26 +133,26 @@ static int virt_system_down(u32 type)
 }
 
 const struct sbi_platform platform = {
-	.name = "QEMU Virt Machine",
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = VIRT_HART_COUNT,
-	.hart_stack_size = VIRT_HART_STACK_SIZE,
+	.name		    = "QEMU Virt Machine",
+	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count	    = VIRT_HART_COUNT,
+	.hart_stack_size    = VIRT_HART_STACK_SIZE,
 	.disabled_hart_mask = 0,
-	.pmp_region_count = virt_pmp_region_count,
-	.pmp_region_info = virt_pmp_region_info,
-	.final_init = virt_final_init,
-	.console_putc = uart8250_putc,
-	.console_getc = uart8250_getc,
-	.console_init = virt_console_init,
-	.irqchip_init = virt_irqchip_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_sync = clint_ipi_sync,
-	.ipi_clear = clint_ipi_clear,
-	.ipi_init = virt_ipi_init,
-	.timer_value = clint_timer_value,
-	.timer_event_stop = clint_timer_event_stop,
-	.timer_event_start = clint_timer_event_start,
-	.timer_init = virt_timer_init,
-	.system_reboot = virt_system_down,
-	.system_shutdown = virt_system_down
+	.pmp_region_count   = virt_pmp_region_count,
+	.pmp_region_info    = virt_pmp_region_info,
+	.final_init	    = virt_final_init,
+	.console_putc	    = uart8250_putc,
+	.console_getc	    = uart8250_getc,
+	.console_init	    = virt_console_init,
+	.irqchip_init	    = virt_irqchip_init,
+	.ipi_send	    = clint_ipi_send,
+	.ipi_sync	    = clint_ipi_sync,
+	.ipi_clear	    = clint_ipi_clear,
+	.ipi_init	    = virt_ipi_init,
+	.timer_value	    = clint_timer_value,
+	.timer_event_stop   = clint_timer_event_stop,
+	.timer_event_start  = clint_timer_event_start,
+	.timer_init	    = virt_timer_init,
+	.system_reboot	    = virt_system_down,
+	.system_shutdown    = virt_system_down
 };
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 9042d60242d..ee2e5a487f6 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -65,18 +65,19 @@ static void fu540_modify_dt(void *fdt)
 	for (i = 0; i < FU540_HART_COUNT; i++) {
 		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
 		cpu_offset = fdt_path_offset(fdt, cpu_node);
-		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", NULL);
+		mmu_type   = fdt_getprop(fdt, cpu_offset, "mmu-type", NULL);
 		if (mmu_type && (!strcmp(mmu_type, "riscv,sv39") ||
-		    !strcmp(mmu_type,"riscv,sv48")))
+				 !strcmp(mmu_type, "riscv,sv48")))
 			continue;
 		else
 			fdt_setprop_string(fdt, cpu_offset, "status", "masked");
 		memset(cpu_node, 0, sizeof(cpu_node));
 	}
 	size = fdt_totalsize(fdt);
-	err = fdt_open_into(fdt, fdt, size + 256);
+	err  = fdt_open_into(fdt, fdt, size + 256);
 	if (err < 0)
-		sbi_printf("Device Tree can't be expanded to accmodate new node");
+		sbi_printf(
+			"Device Tree can't be expanded to accmodate new node");
 
 	chosen_offset = fdt_path_offset(fdt, "/chosen");
 	fdt_setprop_string(fdt, chosen_offset, "stdout-path",
@@ -103,15 +104,15 @@ static u32 fu540_pmp_region_count(u32 hartid)
 	return 1;
 }
 
-static int fu540_pmp_region_info(u32 hartid, u32 index,
-				 ulong *prot, ulong *addr, ulong *log2size)
+static int fu540_pmp_region_info(u32 hartid, u32 index, ulong *prot,
+				 ulong *addr, ulong *log2size)
 {
 	int ret = 0;
 
 	switch (index) {
 	case 0:
-		*prot = PMP_R | PMP_W | PMP_X;
-		*addr = 0;
+		*prot	  = PMP_R | PMP_W | PMP_X;
+		*addr	  = 0;
 		*log2size = __riscv_xlen;
 		break;
 	default:
@@ -128,14 +129,14 @@ static int fu540_console_init(void)
 
 	if (readl((volatile void *)FU540_PRCI_BASE_ADDR +
 		  FU540_PRCI_CLKMUXSTATUSREG) &
-		  FU540_PRCI_CLKMUX_STATUS_TLCLKSEL) {
+	    FU540_PRCI_CLKMUX_STATUS_TLCLKSEL) {
 		peri_in_freq = FU540_SYS_CLK;
 	} else {
 		peri_in_freq = FU540_SYS_CLK / 2;
 	}
 
-	return sifive_uart_init(FU540_UART0_ADDR,
-				peri_in_freq, FU540_UART_BAUDRATE);
+	return sifive_uart_init(FU540_UART0_ADDR, peri_in_freq,
+				FU540_UART_BAUDRATE);
 }
 
 static int fu540_irqchip_init(bool cold_boot)
@@ -151,9 +152,8 @@ static int fu540_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid,
-			(hartid) ? (2 * hartid - 1) : 0,
-			(hartid) ? (2 * hartid) : -1);
+	return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+				      (hartid) ? (2 * hartid) : -1);
 }
 
 static int fu540_ipi_init(bool cold_boot)
@@ -161,11 +161,9 @@ static int fu540_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(FU540_CLINT_ADDR,
-					 FU540_HART_COUNT);
+		rc = clint_cold_ipi_init(FU540_CLINT_ADDR, FU540_HART_COUNT);
 		if (rc)
 			return rc;
-
 	}
 
 	return clint_warm_ipi_init();
@@ -176,8 +174,7 @@ static int fu540_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(FU540_CLINT_ADDR,
-					   FU540_HART_COUNT);
+		rc = clint_cold_timer_init(FU540_CLINT_ADDR, FU540_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -192,26 +189,26 @@ static int fu540_system_down(u32 type)
 }
 
 const struct sbi_platform platform = {
-	.name = "SiFive Freedom U540",
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = FU540_HART_COUNT,
-	.hart_stack_size = FU540_HART_STACK_SIZE,
+	.name		    = "SiFive Freedom U540",
+	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count	    = FU540_HART_COUNT,
+	.hart_stack_size    = FU540_HART_STACK_SIZE,
 	.disabled_hart_mask = FU540_HARITD_DISABLED,
-	.pmp_region_count = fu540_pmp_region_count,
-	.pmp_region_info = fu540_pmp_region_info,
-	.final_init = fu540_final_init,
-	.console_putc = sifive_uart_putc,
-	.console_getc = sifive_uart_getc,
-	.console_init = fu540_console_init,
-	.irqchip_init = fu540_irqchip_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_sync = clint_ipi_sync,
-	.ipi_clear = clint_ipi_clear,
-	.ipi_init = fu540_ipi_init,
-	.timer_value = clint_timer_value,
-	.timer_event_stop = clint_timer_event_stop,
-	.timer_event_start = clint_timer_event_start,
-	.timer_init = fu540_timer_init,
-	.system_reboot = fu540_system_down,
-	.system_shutdown = fu540_system_down
+	.pmp_region_count   = fu540_pmp_region_count,
+	.pmp_region_info    = fu540_pmp_region_info,
+	.final_init	    = fu540_final_init,
+	.console_putc	    = sifive_uart_putc,
+	.console_getc	    = sifive_uart_getc,
+	.console_init	    = fu540_console_init,
+	.irqchip_init	    = fu540_irqchip_init,
+	.ipi_send	    = clint_ipi_send,
+	.ipi_sync	    = clint_ipi_sync,
+	.ipi_clear	    = clint_ipi_clear,
+	.ipi_init	    = fu540_ipi_init,
+	.timer_value	    = clint_timer_value,
+	.timer_event_stop   = clint_timer_event_stop,
+	.timer_event_start  = clint_timer_event_start,
+	.timer_init	    = fu540_timer_init,
+	.system_reboot	    = fu540_system_down,
+	.system_shutdown    = fu540_system_down
 };
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 866d2734816..b8c627d3162 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -44,8 +44,8 @@ static u32 platform_pmp_region_count(u32 hartid)
  * Get PMP regions details (namely: protection, base address, and size) for
  * a given HART.
  */
-static int platform_pmp_region_info(u32 hartid, u32 index,
-				    ulong *prot, ulong *addr, ulong *log2size)
+static int platform_pmp_region_info(u32 hartid, u32 index, ulong *prot,
+				    ulong *addr, ulong *log2size)
 {
 	return 0;
 }
@@ -56,8 +56,7 @@ static int platform_pmp_region_info(u32 hartid, u32 index,
 static int platform_console_init(void)
 {
 	/* Example if the generic UART8250 driver is used */
-	return uart8250_init(PLATFORM_UART_ADDR,
-			     PLATFORM_UART_SHIFTREG_ADDR,
+	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_SHIFTREG_ADDR,
 			     PLATFORM_UART_BAUDRATE, 0, 1);
 }
 
@@ -209,34 +208,33 @@ static int platform_system_shutdown(u32 type)
  */
 const struct sbi_platform platform = {
 
-	.name = "platform-name",
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = 1,
-	.hart_stack_size = 4096,
+	.name		    = "platform-name",
+	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count	    = 1,
+	.hart_stack_size    = 4096,
 	.disabled_hart_mask = 0,
 
 	.early_init = platform_early_init,
 	.final_init = platform_final_init,
 
 	.pmp_region_count = platform_pmp_region_count,
-	.pmp_region_info = platform_pmp_region_info,
+	.pmp_region_info  = platform_pmp_region_info,
 
 	.console_init = platform_console_init,
 	.console_putc = platform_console_putc,
 	.console_getc = platform_console_getc,
 
 	.irqchip_init = platform_irqchip_init,
-	.ipi_init = platform_ipi_init,
-	.ipi_send = platform_ipi_send,
-	.ipi_sync = platform_ipi_sync,
-	.ipi_clear = platform_ipi_clear,
+	.ipi_init     = platform_ipi_init,
+	.ipi_send     = platform_ipi_send,
+	.ipi_sync     = platform_ipi_sync,
+	.ipi_clear    = platform_ipi_clear,
 
-	.timer_init = platform_timer_init,
-	.timer_value = platform_timer_value,
+	.timer_init	   = platform_timer_init,
+	.timer_value	   = platform_timer_value,
 	.timer_event_start = platform_timer_event_start,
-	.timer_event_stop = platform_timer_event_stop,
+	.timer_event_stop  = platform_timer_event_stop,
 
-	.system_reboot = platform_system_reboot,
+	.system_reboot	 = platform_system_reboot,
 	.system_shutdown = platform_system_shutdown
 };
-

From 03ec350c83511b8ac02b23f9ee16c7ac272bf113 Mon Sep 17 00:00:00 2001
From: Shawn Chang <citypw@gmail.com>
Date: Wed, 24 Apr 2019 17:44:58 +0800
Subject: [PATCH 0244/1765] docs: Add a payload section about coreboot support
 #116

Signed-off-by: Shawn Chang <citypw@gmail.com>
---
 docs/external/coreboot.md | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 docs/external/coreboot.md

diff --git a/docs/external/coreboot.md b/docs/external/coreboot.md
new file mode 100644
index 00000000000..fe2f7ba5882
--- /dev/null
+++ b/docs/external/coreboot.md
@@ -0,0 +1,24 @@
+OpenSBI as coreboot payload
+==============================
+
+[coreboot](https://www.coreboot.org/) is a free/libre and open source firmware platform support multiple hardware architectures( x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and diverse hardware models. In RISC-V world, coreboot currently support HiFive Unleashed with OpenSBI as a payload to boot GNU/Linux:
+
+```
+SiFive HiFive unleashed's original firmware boot process:
+                                    +-----------+
++------+    +------+    +------+    | BBL       |
+| MSEL |--->| ZSBL |--->| FSBL |--->|   +-------+
++------+    +------+    +------+    |   | linux |
+                                    +---+-------+
+
+coreboot boot process:
+                      +---------------------------------------------------------------------+
+                      | coreboot                                                            |
++------+   +------+   |  +-----------+  +----------+  +----------+  +-----------------------+
+| MSEL |-->| ZSBL |-->|  | bootblock |->| romstage |->| ramstage |->| payload ( OpenSBI)    |
++------+   +------+   |  +-----------+  +----------+  +----------+  |             +-------+ |
+                      |                                             |             | linux | |
+                      +---------------------------------------------+-------------+-------+-+
+```
+
+The upstreaming work is still in progress. There's a [documentation](https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md) about how to build [out-of-tree code](https://github.com/hardenedlinux/coreboot-HiFiveUnleashed) to load OpenSBI.

From c1d01b0c2efea86348235a1c7f83382e53f87e0e Mon Sep 17 00:00:00 2001
From: Xiang Wang <wxjstz@126.com>
Date: Thu, 25 Apr 2019 11:52:08 +0800
Subject: [PATCH 0245/1765] platform/common/libfdt: fix unnecessary multiple
 inclusions

Signed-off-by: Xiang Wang <wxjstz@126.com>
---
 platform/common/libfdt/libfdt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/common/libfdt/libfdt.h b/platform/common/libfdt/libfdt.h
index 4d6e58b9083..a470d1df6d2 100644
--- a/platform/common/libfdt/libfdt.h
+++ b/platform/common/libfdt/libfdt.h
@@ -51,8 +51,8 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <fdt.h>
 #include <libfdt_env.h>
+#include <fdt.h>
 
 #define FDT_FIRST_SUPPORTED_VERSION	0x02
 #define FDT_LAST_SUPPORTED_VERSION	0x11

From f9643f3472199f01e8eecdd6d50a379989646f03 Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Fri, 26 Apr 2019 12:04:06 +0200
Subject: [PATCH 0246/1765] Makefile: explicitly disable PIE

The various available RISC-V toolchains differ in their default
configuration regarding PIE, e.g. the buildroot RISC-V toolchain
has PIE disabled by default while the Debian toolchain has it
enabled by default.

OpenSBI currently doesn't support being built with PIE enabled,
therefore disable it explicitly by passing "-fno-pie -no-pie" in
CFLAGS.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index abad95c1cd9..a62eb0ef0f8 100644
--- a/Makefile
+++ b/Makefile
@@ -164,6 +164,7 @@ CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
 CFLAGS		+=	$(firmware-cflags-y)
+CFLAGS		+=	-fno-pie -no-pie
 
 CPPFLAGS	+=	$(GENFLAGS)
 CPPFLAGS	+=	$(platform-cppflags-y)

From 3bb2d25f448f4f5dd7d143617bc6eccf34f809e6 Mon Sep 17 00:00:00 2001
From: Loys Ollivier <lollivier@baylibre.com>
Date: Fri, 3 May 2019 11:08:59 +0200
Subject: [PATCH 0247/1765] Update sifive_fu540.md

Fix typo on parenthesis.
---
 docs/platform/sifive_fu540.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 96be73408c4..40ec8d1848f 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -110,7 +110,7 @@ tables as described here.
 sgdisk --clear                                                               \
        --new=1:2048:67583  --change-name=1:bootloader --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985   \
        --new=2:264192:     --change-name=2:root       --typecode=2:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
-       $(DISK)
+       ${DISK}
 ```
 
 Booting SiFive Fu540 Platform

From 0d33a981ec19181c7f6448f90599f31dfd082994 Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Sun, 5 May 2019 12:33:25 +0200
Subject: [PATCH 0248/1765] docs: miscellaneous documentation fixes and updates

- fix some broken hyperlinks
- add additional hyperlinks to references to external documents
- reformat some paragraphs to keep lines under 80 characters
- unify the enumeration style between different parts of the
  documentation
- fix spelling/grammar mistakes
- extend the copyright notice in README.md to be the same as the
  one in COPYING.BSD

Signed-off-by: Karsten Merker <merker@debian.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 README.md                      | 103 +++++++++++++++++----------------
 docs/contributing.md           |  23 ++++----
 docs/doxygen.cfg               |   2 +-
 docs/firmware/fw_jump.md       |  22 +++----
 docs/firmware/fw_payload.md    |  31 +++++-----
 docs/firmware/payload_linux.md |   9 ++-
 docs/firmware/payload_uboot.md |  16 ++---
 docs/library_usage.md          |  33 +++++------
 docs/platform/platform.md      |  16 ++---
 docs/platform_guide.md         |  32 +++++-----
 10 files changed, 146 insertions(+), 141 deletions(-)

diff --git a/README.md b/README.md
index 7b5b225e9cb..1f6204884cb 100644
--- a/README.md
+++ b/README.md
@@ -1,4 +1,5 @@
-Copyright (c) 2019 Western Digital Corporation or its affiliates.
+Copyright (c) 2019 Western Digital Corporation or its affiliates
+and other contributors.
 
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
@@ -6,53 +7,55 @@ RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 The **RISC-V Supervisor Binary Interface (SBI)** is the recommended interface
 between:
 
-1. A platform specific firmware running in M-mode and bootloader, hypervisor or
-   a general purpose OS executing in S-mode or HS-mode.
-2. A hypervisor running in HS-mode and a bootloader or a general purpose OS
+1. A platform-specific firmware running in M-mode and a bootloader, a
+   hypervisor or a general-purpose OS executing in S-mode or HS-mode.
+2. A hypervisor running in HS-mode and a bootloader or a general-purpose OS
    executing in VS-mode.
 
 The *RISC-V SBI specification* is maintained as an independent project by the
-RISC-V Foundation in [Github].
+RISC-V Foundation on [Github] (https://github.com/riscv/riscv-sbi-doc).
 
 The goal of the OpenSBI project is to provide an open-source reference
-implementation of the RISC-V SBI specifications for platform specific firmwares
-executing in M-mode (case 1 mentioned above). OpenSBI implementation can be
+implementation of the RISC-V SBI specifications for platform-specific firmwares
+executing in M-mode (case 1 mentioned above). An OpenSBI implementation can be
 easily extended by RISC-V platform and system-on-chip vendors to fit a
 particular hardware configuration.
 
-The main component of OpenSBI is provided in the form of a platform independent
+The main component of OpenSBI is provided in the form of a platform-independent
 static library **libsbi.a** implementing the SBI interface. A firmware or
 bootloader implementation can link against this library to ensure conformance
 with the SBI interface specifications. *libsbi.a* also defines an interface for
-integrating with platform specific operations provided by the platform firmware
-implementation (e.g. console access functions, inter-processor interrupts
+integrating with platform-specific operations provided by the platform firmware
+implementation (e.g. console access functions, inter-processor interrupt
 control, etc).
 
-To illustrate the use of *libsbi.a* library, OpenSBI also provides a set of
-platform specific support examples. For each example, a platform
-specific static library *libplatsbi.a* can be compiled. This library implements
-SBI calls processing by integrating *libsbi.a* with necessary platform dependent
-hardware manipulation functions. For all supported platforms, OpenSBI also
-provides several runtime firmware examples built using the platform
+To illustrate the use of the *libsbi.a* library, OpenSBI also provides a set of
+platform-specific support examples. For each example, a platform-specific
+static library *libplatsbi.a* can be compiled. This library implements
+SBI call processing by integrating *libsbi.a* with the necessary
+platform-dependent hardware manipulation functions. For all supported platforms,
+OpenSBI also provides several runtime firmware examples built using the platform
 *libplatsbi.a*. These example firmwares can be used to replace the legacy
-*riskv-pk* bootloader (aka BBL) and enable the use of well known bootloaders
-such as [U-Boot].
+*riscv-pk* bootloader (aka BBL) and enable the use of well-known bootloaders
+such as [U-Boot] (https://git.denx.de/u-boot.git).
 
 Required Toolchain
 ------------------
 
 OpenSBI can be compiled natively or cross-compiled on a x86 host. For
-cross-compilation, you can build your tool chain or just download from
-the [bootlin] (https://toolchains.bootlin.com/).
+cross-compilation, you can build your own toolchain or just download
+a prebuilt one from the
+[Bootlin toolchain repository] (https://toolchains.bootlin.com/).
 
-Please note that only 64bit version of toolchain is available in bootlin
-for now.
+Please note that only a 64bit version of the toolchain is available in
+the Bootlin toolchain repository for now.
 
-Building and Installing OpenSBI Platform Independent Library
-------------------------------------------------------------
+Building and Installing the OpenSBI Platform-Independent Library
+----------------------------------------------------------------
 
-OpenSBI platform independent static library *libsbi.a* can be natively compiled
-or cross-compiled on a host with a different base architecture than RISC-V.
+The OpenSBI platform-independent static library *libsbi.a* can be compiled
+natively or it can be cross-compiled on a host with a different base
+architecture than RISC-V.
 
 For cross-compiling, the environment variable *CROSS_COMPILE* must be defined
 to specify the name prefix of the RISC-V compiler toolchain executables, e.g.
@@ -63,8 +66,8 @@ To build *libsbi.a* simply execute:
 make
 ```
 
-All compiled binaries as well as the result *libsbi.a* static library file will
-be placed in the *build/lib* directory. To specify an alternate build root
+All compiled binaries as well as the resulting *libsbi.a* static library file
+will be placed in the *build/lib* directory. To specify an alternate build root
 directory path, run:
 ```
 make O=<build_directory>
@@ -76,38 +79,38 @@ make install
 ```
 
 This will create the *install* directory with all necessary include files
-copied under the *install/include* directory and library file copied in the
-*install/lib* directory. To specify an alternate installation root directory
-path, run:
+copied under the *install/include* directory and the library file copied into
+the *install/lib* directory. To specify an alternate installation root
+directory path, run:
 ```
 make I=<install_directory> install
 ```
 
-Building and Installing a Reference Platform Static Library and Firmwares
--------------------------------------------------------------------------
+Building and Installing a Reference Platform Static Library and Firmware
+------------------------------------------------------------------------
 
 When the *PLATFORM=<platform_subdir>* argument is specified on the make command
-line, the platform specific static library *libplatsbi.a* and firmware examples
+line, the platform-specific static library *libplatsbi.a* and firmware examples
 are built for the platform *<platform_subdir>* present in the directory
-*platform* in OpenSBI top directory. For example, to compile the platform
-library and firmware examples for QEMU RISC-V *virt* machine,
+*platform* in the OpenSBI top directory. For example, to compile the platform
+library and the firmware examples for the QEMU RISC-V *virt* machine,
 *<platform_subdir>* should be *qemu/virt*.
 
-To build *libsbi.a*, *libplatsbi.a* and the firmwares for one of the supported
-platform, run:
+To build *libsbi.a*, *libplatsbi.a* and the firmware for one of the supported
+platforms, run:
 ```
 make PLATFORM=<platform_subdir>
 ```
 
-An alternate build directory path can also be specified.
+An alternate build directory path can also be specified:
 ```
 make PLATFORM=<platform_subdir> O=<build_directory>
 ```
 
-The platform specific library *libplatsbi.a* will be generated in the
+The platform-specific library *libplatsbi.a* will be generated in the
 *build/platform/<platform_subdir>/lib* directory. The platform firmware files
 will be under the *build/platform/<platform_subdir>/firmware* directory.
-The compiled firmwares will be available in two different format: an ELF file
+The compiled firmwares will be available in two different formats: an ELF file
 and an expanded image file.
 
 To install *libsbi.a*, *libplatsbi.a*, and the compiled firmwares, run:
@@ -115,16 +118,16 @@ To install *libsbi.a*, *libplatsbi.a*, and the compiled firmwares, run:
 make PLATFORM=<platform_subdir> install
 ```
 
-This will copy the compiled platform specific libraries and firmware files
+This will copy the compiled platform-specific libraries and firmware files
 under the *install/platform/<platform_subdir>/* directory. An alternate
-install root directory path can be specified as follows.
+install root directory path can be specified as follows:
 ```
 make PLATFORM=<platform_subdir> I=<install_directory> install
 ```
 
-In addition, platform specific configuration options can be specified with the
+In addition, platform-specific configuration options can be specified with the
 top-level make command line. These options, such as *PLATFORM_<xyz>* or
-*FW_<abc>*, are platform specific and described in more details in the
+*FW_<abc>*, are platform-specific and described in more details in the
 *docs/platform/<platform_name>.md* files and
 *docs/firmware/<firmware_name>.md* files.
 
@@ -155,7 +158,7 @@ files where the reused code is present.
    under the terms of the BSD 2-Clause license. Any contributions to this
    code must be made under the terms of both licenses.
 2. Some source file for the Kendryte/k210 platform code are based on code from
-   the Kendryte [standalone SDK] available on github. These files retain the
+   the [Kendryte standalone SDK] available on github. These files retain the
    original copyright and license of the Kendryte standalone SDK project and
    are licensed under the terms of the Apache License, Version 2.0.
 
@@ -165,7 +168,7 @@ Contributing to OpenSBI
 -----------------------
 
 The OpenSBI project encourages and welcomes contributions. Contributions should
-follow the rules described in OpenSBI [Contribution Guideline] document.
+follow the rules described in the OpenSBI [Contribution Guideline] document.
 In particular, all patches sent should contain a Signed-off-by tag.
 
 The [Contributors List] document provides a list of individuals and
@@ -185,7 +188,7 @@ Detailed documentation of various aspects of OpenSBI can be found under the
   examples build supported by OpenSBI.
 
 OpenSBI source code is also well documented. For source level documentation,
-doxygen style is used. Please refer to [Doxygen manual] for details on this
+doxygen style is used. Please refer to the [Doxygen manual] for details on this
 format.
 
 Doxygen can be installed on Linux distributions using *.deb* packages using
@@ -234,6 +237,6 @@ make I=<install_directory> install_docs
 [Platform Support Guide]: docs/platform_guide.md
 [Platform Documentation]: docs/platform/platform.md
 [Firmware Documentation]: docs/firmware/fw.md
-[Doxygen manual]: http://www.stack.nl/~dimitri/doxygen/manual.html
-[standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
+[Doxygen manual]: http://www.doxygen.nl/manual/index.html
+[Kendryte standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
 [third party notices]: ThirdPartyNotices.md
diff --git a/docs/contributing.md b/docs/contributing.md
index 229108971b3..7b9898f7080 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,19 +1,20 @@
 OpenSBI Contribution Guideline
 ==============================
 
-All contributions to OpenSBI can be sent in following ways:
-1. Email patches to OpenSBI mailing list `opensbi@lists.infradead.org`
-2. GitHub Pull Requests (PRs) to [OpenSBI main repository]
+All contributions to OpenSBI can be sent in the following ways:
+1. Email patches to the OpenSBI mailing list at `opensbi@lists.infradead.org`
+2. GitHub Pull Requests (PRs) to the [OpenSBI main repository]
 
-To join OpenSBI mailing list, please visit [OpenSBI infradead page].
+To join the OpenSBI mailing list, please visit the [OpenSBI infradead page].
 
-OpenSBI maintainers prefer patches via OpenSBI mailing list (option1 above)
-so that they are visible to wider audience. All accepted patches on the
-OpenSBI mailing list will be taken by any of the OpenSBI maintainers and
-merged into [OpenSBI main repository] using GitHub PRs.
+The OpenSBI maintainers prefer patches via the OpenSBI mailing list
+(option 1 above) so that they are visible to a wider audience. All
+accepted patches on the OpenSBI mailing list will be taken by any of
+the OpenSBI maintainers and merged into the [OpenSBI main repository]
+using GitHub PRs.
 
 All contributed work must follow the following rules:
-1. OpenSBI code should be written in accordance to [Linux coding style].
+1. OpenSBI code should be written in accordance to the [Linux coding style].
 2. This project embraces the [Developer Certificate of Origin (DCO)] for
 contributions. This means that you must agree to the following prior to
 submitting patches: if you agree with this developer certificate you
@@ -27,9 +28,9 @@ prefixes are for example "lib:", "platform:", "firmware:", "docs:" and "top:".
 5. Maintainers should use "Rebase and Merge" when using GitHub to merge pull
 requests to avoid creating unnecessary merge commits.
 6. Maintainers should avoid creating branches directly in the main
-riscv/opensbi repository. Instead prefer using a fork of riscv/opensbi main
+riscv/opensbi repository. Instead prefer using a fork of the riscv/opensbi main
 repository and branches within that fork to create pull requests.
-7. A maintainer cannot merge his own pull requests in riscv/opensbi main
+7. A maintainer cannot merge his own pull requests in the riscv/opensbi main
 repository.
 8. A pull request must get at least one review from a maintainer.
 9. A pull request must spend at least 24 hours in review to allow for other
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index feb461bb5a6..8ab53ed3530 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -44,7 +44,7 @@ PROJECT_NUMBER         = "v@@OPENSBI_MAJOR@@.@@OPENSBI_MINOR@@"
 # for a project that appears at the top of each page and should give viewer a
 # quick idea about the purpose of the project. Keep the description short.
 
-PROJECT_BRIEF          = "Open source implemenation of supervisor binary interface"
+PROJECT_BRIEF          = "Open source implemenation of the supervisor binary interface"
 
 # With the PROJECT_LOGO tag one can specify a logo or an icon that is included
 # in the documentation. The maximum height of the logo should not exceed 55
diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index da21cda8312..7fdeeb40ebb 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -6,19 +6,19 @@ handles the address of the next booting stage entry, e.g. a bootloader or an OS
 kernel, without directly including the binary code for this next stage.
 
 A *FW_JUMP* firmware is particularly useful when the booting stage executed
-prior to OpenSBI firmware is capable of loading both the OpenSBI firmware and
-the booting stage binary to follow OpenSBI firmware.
+prior to the OpenSBI firmware is capable of loading both the OpenSBI firmware
+and the booting stage binary to follow the OpenSBI firmware.
 
 *FW_JUMP* Compilation
 ---------------------
 
-A platform *FW_JUMP* firmware can be enabled by any of the following methods.
+A platform *FW_JUMP* firmware can be enabled by any of the following methods:
 
 1. Specifying `FW_JUMP=y` on the top level `make` command line.
 2. Specifying `FW_JUMP=y` in the target platform *config.mk* configuration file.
 
 The compiled *FW_JUMP* firmware ELF file is named *fw_jump.elf*. Its expanded
-image file is *fw_jump.bin*. Both files are created in the platform specific
+image file is *fw_jump.bin*. Both files are created in the platform-specific
 build directory under the *build/platform/<platform_subdir>/firmware* directory.
 
 *FW_JUMP* Firmware Configuration Options
@@ -27,26 +27,26 @@ build directory under the *build/platform/<platform_subdir>/firmware* directory.
 To operate correctly, a *FW_JUMP* firmware requires some configuration
 parameters to be defined using either the top level `make` command line or the
 target platform *config.mk* configuration file. The possible parameters are as
-follows.
+follows:
 
 * **FW_JUMP_ADDR** - Address of the entry point of the booting stage to be
-  executed following OpenSBI firmware. This address generally correspond
+  executed following OpenSBI firmware. This address generally corresponds
   exactly to the address where this next booting stage was loaded. This is a
   mandatory parameter. Compilation errors will result from not defining this
   address.
 
 * **FW_JUMP_FDT_ADDR** - Address where the *flattened device tree (FDT file)*
   passed by the prior booting stage will be placed in memory before executing
-  the booting stage following OpenSBI firmware. If this option is not provided,
-  then OpenSBI firmware will pass zero as the FDT address to the following
-  booting stage.
+  the booting stage following the OpenSBI firmware. If this option is not
+  provided, then the OpenSBI firmware will pass zero as the FDT address to the
+  following booting stage.
 
 *FW_JUMP* Example
 -----------------
 
-The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrates how to configure
+The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrate how to configure
 and use a *FW_JUMP* firmware. Detailed information regarding these platforms
-can be found in the platforms documentation files.
+can be found in the platform documentation files.
 
 [qemu/virt]: ../platform/qemu_virt.md
 [qemu/sifive_u]: ../platform/qemu_sifive_u.md
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 72ea9bb3af0..c9a9ad86f55 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -2,22 +2,22 @@ OpenSBI Firmware with Payload *FW_PAYLOAD*
 ==========================================
 
 OpenSBI **firmware with Payload (FW_PAYLOAD)** is a firmware which directly
-includes the binary for the booting stage to follow OpenSBI firmware execution.
-Typically, this payload will be a bootloader or an OS kernel.
+includes the binary for the booting stage to follow the OpenSBI firmware
+execution. Typically, this payload will be a bootloader or an OS kernel.
 
 A *FW_PAYLOAD* firmware is particularly useful when the booting stage executed
-prior to OpenSBI firmware is not capable of loading both OpenSBI firmware and
-the booting stage to follow OpenSBI firmware.
+prior to the OpenSBI firmware is not capable of loading both the OpenSBI
+firmware and the booting stage to follow OpenSBI firmware.
 
 A *FW_PAYLOAD* firmware is also useful for cases where the booting stage prior
-to OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In such
-case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree in the
-.text section of the final firmware.
+to the OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In
+such a case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree
+in the .text section of the final firmware.
 
 Enabling *FW_PAYLOAD* compilation
 ---------------------------------
 
-The *FW_PAYLOAD* firmware can be enabled by any of the following methods.
+The *FW_PAYLOAD* firmware can be enabled by any of the following methods:
 
 1. Specifying `FW_PAYLOAD=y` on the top level `make` command line.
 2. Specifying `FW_PAYLOAD=y` in the target platform *config.mk* configuration
@@ -25,7 +25,7 @@ The *FW_PAYLOAD* firmware can be enabled by any of the following methods.
 
 The compiled *FW_PAYLOAD* firmware ELF file is named *fw_jump.elf*. Its
 expanded image file is *fw_payload.bin*. Both files are created in the
-platform specific build directory under the
+platform-specific build directory under the
 *build/platform/<platform_subdir>/firmware* directory.
 
 Configuration Options
@@ -34,7 +34,7 @@ Configuration Options
 A *FW_PAYLOAD* firmware is built according to configuration parameters and
 options. These configuration parameters can be defined using either the top
 level `make` command line or the target platform *config.mk* configuration
-file. The parameters currently defined are as   follows.
+file. The parameters currently defined are as follows:
 
 * **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload binary
   will be linked in the final *FW_PAYLOAD* firmware binary image. This
@@ -47,8 +47,8 @@ file. The parameters currently defined are as   follows.
   will be linked after the end of the base firmware binary in the final
   *FW_PAYLOAD* firmware binary image. This configuration parameter is mandatory
   if *FW_PAYLOAD_OFFSET* is not defined. If both *FW_PAYLOAD_OFFSET* and
-  *FW_PAYLOAD_ALIGN* are defined, *FW_PAYLOAD_OFFSET* is used and 
-  *FW_PAYLOAD_ALIGN* ignored.
+  *FW_PAYLOAD_ALIGN* are defined, *FW_PAYLOAD_OFFSET* is used and
+  *FW_PAYLOAD_ALIGN* is ignored.
 
 * **FW_PAYLOAD_PATH** - Path to the image file of the next booting stage
   binary.  If this option is not provided then a simple test payload is
@@ -78,13 +78,12 @@ file. The parameters currently defined are as   follows.
 *FW_PAYLOAD* Example
 --------------------
 
-The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrates how to configure
+The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrate how to configure
 and use a *FW_PAYLOAD* firmware. Detailed information regarding these platforms
-can be found in the platforms documentation files.
+can be found in the platform documentation files.
 
-The *kendryte/k210* platform also enables build of a *FW_PAYLOAD* using an
+The *kendryte/k210* platform also enables a build of a *FW_PAYLOAD* using an
 internally defined device tree file (*FW_PAYLOAD_FDT*).
 
 [qemu/virt]: ../platform/qemu_virt.md
 [qemu/sifive_u]: ../platform/qemu_sifive_u.md
-
diff --git a/docs/firmware/payload_linux.md b/docs/firmware/payload_linux.md
index ccbad31b0e8..048eb50fae7 100644
--- a/docs/firmware/payload_linux.md
+++ b/docs/firmware/payload_linux.md
@@ -1,11 +1,10 @@
 Linux as a direct payload to OpenSBI
 ====================================
 
-OpenSBI has the capability to load Linux kernel image directly in supervisor
+OpenSBI has the capability to load a Linux kernel image directly in supervisor
 mode. The flattened image generated by the Linux kernel build process can be
-provided as payload to OpenSBI.
+provided as a payload to OpenSBI.
 
-Detailed examples and platform guides can be found in both [QEMU](
-../platform/qemu_virt.md) and [HiFive Unleashed](../platform/sifive_fu540.md)
-platform guide respectively.
+Detailed examples can be found in both the [QEMU](../platform/qemu_virt.md)
+and the [HiFive Unleashed](../platform/sifive_fu540.md) platform guides.
 
diff --git a/docs/firmware/payload_uboot.md b/docs/firmware/payload_uboot.md
index 42bf55fd4f8..d30f6f836e2 100644
--- a/docs/firmware/payload_uboot.md
+++ b/docs/firmware/payload_uboot.md
@@ -4,30 +4,32 @@ U-Boot as a payload to OpenSBI
 [U-Boot](https://www.denx.de/wiki/U-Boot) is an open-source primary boot loader.
 It can be used as first and/or second stage boot loader in an embedded
 environment. In the context of OpenSBI, U-Boot can be specified as a payload to
-OpenSBI firmware, becoming the boot stage following OpenSBI firmware
+the OpenSBI firmware, becoming the boot stage following the OpenSBI firmware
 execution.
 
 The current stable upstream code of U-Boot does not yet include all patches
 necessary to fully support OpenSBI. To use U-Boot as an OpenSBI payload, the
 following out-of-tree patch series must be applied to the upstream U-Boot source
-code.
+code:
 
 HiFive Unleashed support for U-Boot
 
 https://lists.denx.de/pipermail/u-boot/2019-February/358058.html
 
 This patch series enables a single CPU to execute U-Boot. As a result, the next
-stage boot code such as Linux kernel can also only execute a single CPU. U-Boot
-SMP support for RISC-V can be enabled with the following additional patches.
+stage boot code such as a Linux kernel can also only execute on a single CPU.
+U-Boot SMP support for RISC-V can be enabled with the following additional
+patches:
 
 https://lists.denx.de/pipermail/u-boot/2019-February/358393.html
 
 Building and Generating U-Boot images
 =====================================
-Please refer to U-Boot build documentation for detailed instructions on how to build U-Boot images.
+Please refer to the U-Boot build documentation for detailed instructions on
+how to build U-Boot images.
 
-Once U-Boot images are built, Linux kernel image need to be converted to a format
-that U-Boot understands.
+Once U-Boot images are built, the Linux kernel image needs to be converted
+into a format that U-Boot understands:
 
 ```
 <uboot-dir>/tools/mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
diff --git a/docs/library_usage.md b/docs/library_usage.md
index 579411f0d9c..92d51f5f4ae 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -3,46 +3,46 @@ OpenSBI Library Usage
 
 OpenSBI provides two types of static libraries:
 
-1. *libsbi.a* - A platform independent generic static library implementing the
-   interface defined by the SBI specifications. Platform specific processing
+1. *libsbi.a* - A platform-independent generic static library implementing the
+   interface defined by the SBI specifications. Platform-specific processing
    hooks for the execution of this interface must be provided by the firmware or
    bootloader linking with this library. This library is installed as
    *<install_directory>/lib/libsbi.a*
-2. *libplatsbi.a* - An example platform specific static library integrating 
-   *libsbi.a* with platform specific hooks. This library is available only for
+2. *libplatsbi.a* - An example platform-specific static library integrating
+   *libsbi.a* with platform-specific hooks. This library is available only for
    the platforms supported by OpenSBI. This library is installed as
    *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
 
 Implementations may choose either *libsbi.a* or *libplatsbi.a* to link with
-their firmware or bootloader. In the case of *libsbi.a*, platform specific
-hooks in the form of a *struct sbi_platform* instance needs to be provided.
+their firmware or bootloader. In the case of *libsbi.a*, platform-specific
+hooks in the form of a *struct sbi_platform* instance need to be provided.
 
-The platform specific example firmwares provided by OpenSBI are not mandatory.
-An implementation may choose to link OpenSBI generic static library together
-with an M-mode firmware or bootloader providing hardware specific hooks. Since
-OpenSBI is a statically linked library, users must ensure that the license of
-these external components is compatible with OpenSBI license.
+The platform-specific example firmwares provided by OpenSBI are not mandatory.
+An implementation may choose to link the OpenSBI generic static library together
+with an M-mode firmware or bootloader providing the hardware-specific hooks.
+Since OpenSBI is a statically linked library, users must ensure that the
+license of these external components is compatible with the OpenSBI license.
 
 Constraints on OpenSBI usage from external firmware
 ---------------------------------------------------
 
 Users have to ensure that an external firmware or bootloader linking against
-OpenSBI static libraries (*libsbi.a* or *libplatsbi.a*) are compiled with the
+OpenSBI static libraries (*libsbi.a* or *libplatsbi.a*) is compiled with the
 same GCC target options *-mabi*, *-march*, and *-mcmodel*.
 
 There are only two constraints on calling any OpenSBI library function from an
 external M-mode firmware or bootloader:
 
 1. The RISC-V *MSCRATCH* CSR must point to a valid OpenSBI scratch space
-   (i.e. *struct sbi_scratch* instance)
-2. The RISC-V *SP* register (i.e. stack pointer) must be set per-HART
-   pointing to distinct non-overlapping stacks
+   (i.e. a *struct sbi_scratch* instance).
+2. The RISC-V *SP* register (i.e. the stack pointer) must be set per-HART
+   pointing to distinct non-overlapping stacks.
 
 The most important functions from an external firmware or bootloader
 perspective are *sbi_init()* and *sbi_trap_handler()*.
 
 In addition to the above constraints, the external firmware or bootloader must
-ensure that interrupts are disabled in *MSTATUS* and *MIE* CSRs when calling
+ensure that interrupts are disabled in the *MSTATUS* and *MIE* CSRs when calling
 the functions *sbi_init()* and *sbi_trap_handler()*.
 
 The *sbi_init()* function should be called by the external firmware or
@@ -62,4 +62,3 @@ bootloader to service the following interrupts and traps:
 
 **Note:** external firmwares or bootloaders can be more conservative by
 forwarding all traps and interrupts to *sbi_trap_handler()*.
-
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 12efa81e1c1..2235b6a66e7 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -1,11 +1,12 @@
 OpenSBI Supported Platforms
 ===========================
 
-OpenSBI currently supports the following virtual and hardware platforms.
+OpenSBI currently supports the following virtual and hardware platforms:
 
-* **QEMU RISC-V Virt Machine**: Platform support for QEMU *virt* virtual RISC-V
-  machine. This virtual machine is intended for RISC-V software development and
-  test. More details on this platform can be found in the file *[qemu_virt.md]*.
+* **QEMU RISC-V Virt Machine**: Platform support for the QEMU *virt* virtual
+  RISC-V machine. This virtual machine is intended for RISC-V software
+  development and tests. More details on this platform can be found in the
+  file *[qemu_virt.md]*.
 
 * **QEMU SiFive Unleashed Machine**: Platform support for the *sifive_u* QEMU
   virtual RISC-V machine. This is an emulation machine of the HiFive Unleashed
@@ -18,13 +19,14 @@ OpenSBI currently supports the following virtual and hardware platforms.
   *[sifive_fu540.md]*.
 
 * **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on
-  boards such as the Kendryte KD233 and Sipeed MAIX Dock boards.
+  boards such as the Kendryte KD233 or the Sipeed MAIX Dock.
 
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
-*config.mk* and *platform.c* template files provides enough comments to facilitate
-the implementation.
+*config.mk* and *platform.c* template files provides enough comments to
+facilitate the implementation.
 
 [qemu_virt.md]: qemu_virt.md
 [qemu_sifive_u.md]: qemu_sifive_u.md
+[sifive_fu540.md]: sifive_fu540.md
diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index 5eecf9b7347..53e9394db6b 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -1,15 +1,15 @@
 OpenSBI Platform Support Guideline
 ==================================
 
-OpenSBI platform support allows an implementation to define a set of platform
-specific hooks (hardware manipulation functions) in the form of a
+The OpenSBI platform support allows an implementation to define a set of
+platform-specific hooks (hardware manipulation functions) in the form of a
 *struct sbi_platform* data structure instance. This instance is required by
-platform independent *libsbi.a* to execute platform specific operations.
+the platform-independent *libsbi.a* to execute platform-specific operations.
 
-Each of the reference platform support provided by OpenSBI define an instance
+Each of the reference platform supports provided by OpenSBI defines an instance
 of the *struct sbi_platform* data structure. For each supported platform,
-*libplatsbi.a* integrates this instance with *libsbi.a* to create a platform
-specific OpenSBI static library. This library is installed
+*libplatsbi.a* integrates this instance with *libsbi.a* to create a
+platform-specific OpenSBI static library. This library is installed
 in *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
 
 OpenSBI also provides implementation examples of bootable runtime firmwares for
@@ -22,21 +22,21 @@ for the legacy *riskv-pk* boot loader (BBL).
 A complete doxygen-style documentation of *struct sbi_platform* and related
 APIs is available in the file *include/sbi/sbi_platform.h*.
 
-Adding a new platform support
------------------------------
+Adding support for a new platform
+---------------------------------
 
 Support for a new platform named *<xyz>* can be added as follows:
 
-1. Create a directory named *<xyz>* under *platform/* directory
-2. Create a platform configuration file named *config.mk* under
+1. Create a directory named *<xyz>* under the *platform/* directory.
+2. Create a platform configuration file named *config.mk* under the
    *platform/<xyz>/* directory. This configuration file will provide
-   compiler flags, select common drivers, and select firmware options
-3. Create *platform/<xyz>/objects.mk* file for listing the platform
-   specific object files to be compiled
-4. Create *platform/<xyz>/platform.c* file providing a *struct sbi_platform*
-   instance
+   compiler flags, select common drivers, and select firmware options.
+3. Create a *platform/<xyz>/objects.mk* file for listing the
+   platform-specific object files to be compiled.
+4. Create a *platform/<xyz>/platform.c* file providing a *struct sbi_platform*
+   instance.
 
-A template platform support code is available under the *platform/template*
+A platform support code template is available under the *platform/template*
 directory. Copying this directory and its content as a new directory named
 *<xyz>* under the *platform/* directory will create all the files mentioned
 above.

From 243a5e05324ee584f1575ad7764a3e4527d6b5ae Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Sun, 5 May 2019 12:33:26 +0200
Subject: [PATCH 0249/1765] docs: update CONTRIBUTORS.md from git history

OpenSBI has recently gained a CONTRIBUTORS.md file as a way
to make contributions to OpenSBI more visible.  Add previous
contributors from the git history who have acked their
inclusion in the list to the file.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Alistair Francis <alistair@alistair23.me>
Acked-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Damien Le Moal <damien.lemoal@wdc.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Acked-by: Shawn Chang <citypw@gmail.com>
Acked-by: Xiang Wang <wxjstz@126.com>
---
 CONTRIBUTORS.md | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md
index db557b67b20..7fe542d9079 100644
--- a/CONTRIBUTORS.md
+++ b/CONTRIBUTORS.md
@@ -5,3 +5,21 @@ List of OpenSBI Contributors (Alphabetically sorted)
 * **[Western Digital Corporation](https://www.wdc.com/)**
   * Project initiator and maintainer
   * Copyright (c) 2019 Western Digital Corporation or its affiliates
+
+* Alistair Francis <alistair@alistair23.me>
+
+* Anup Patel <anup.patel@wdc.com>
+
+* Atish Patra <atish.patra@wdc.com>
+
+* Bin Meng <bmeng.cn@gmail.com>
+
+* Damien Le Moal <damien.lemoal@wdc.com>
+
+* Karsten Merker <merker@debian.org>
+
+* Nick Kossifidis <mickflemm@gmail.com>
+
+* Shawn Chang <citypw@gmail.com>
+
+* Xiang Wang <wxjstz@126.com>

From 25472de89ee3b98cd466f69d1f419f943dcbcb0f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 29 Apr 2019 10:44:15 +0530
Subject: [PATCH 0250/1765] firmware: Allow firmwares to provide next mode and
 options

This patch extends existing firmwares (i.e. fw_jump and fw_payload)
to explicitly provide next mode and options to fw_base.

We also introduce fw_save_info() which is called by fw_base very
early on boot HART. This function can be used by existing firmwares
(i.e. fw_jump and fw_payload) to save information passed by previous
booting stage.

Overall, this is a preparatory patch for implementing fw_dynamic.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S    | 67 ++++++++++++++++++++++++++++++++-----------
 firmware/fw_jump.S    | 50 ++++++++++++++++++++++++++++++--
 firmware/fw_payload.S | 56 ++++++++++++++++++++++++++++++++----
 3 files changed, 148 insertions(+), 25 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 7897314e2ed..0d7cf69ae3e 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -13,6 +13,20 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
 
+.macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
+	add	\__d0, \__s0, zero
+	add	\__d1, \__s1, zero
+	add	\__d2, \__s2, zero
+.endm
+
+.macro	MOV_5R __d0, __s0, __d1, __s1, __d2, __s2, __d3, __s3, __d4, __s4
+	add	\__d0, \__s0, zero
+	add	\__d1, \__s1, zero
+	add	\__d2, \__s2, zero
+	add	\__d3, \__s3, zero
+	add	\__d4, \__s4, zero
+.endm
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.globl _start
@@ -25,9 +39,15 @@ _start:
 	csrr	a6, CSR_MHARTID
 	blt	zero, a6, _wait_for_boot_hart
 
+	/* Reset all registers for boot HART */
 	li	ra, 0
 	call	_reset_regs
 
+	/* Allow main firmware to save info */
+	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
+	call	fw_save_info
+	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
+
 	/* Preload HART details
 	 * s7 -> HART Count
 	 * s8 -> HART Stack Size
@@ -59,6 +79,7 @@ _scratch_init:
 	sub	tp, tp, a5
 
 	/* Initialize scratch space */
+	/* Store fw_start and fw_size in scratch space */
 	la	a4, _fw_start
 	la	a5, _fw_end
 	mul	t0, s7, s8
@@ -66,27 +87,44 @@ _scratch_init:
 	sub	a5, a5, a4
 	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
 	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
-	/* Note: fw_next_arg1() uses a0, a1, and ra */
+	/* Store next arg1 in scratch space */
+	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_next_arg1
 	REG_S	a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp)
-	/* Note: fw_next_addr() uses a0, a1, and ra */
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	/* Store next address in scratch space */
+	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_next_addr
 	REG_S	a0, SBI_SCRATCH_NEXT_ADDR_OFFSET(tp)
-	li	a4, PRV_S
-	REG_S	a4, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	/* Store next mode in scratch space */
+	MOV_3R	s0, a0, s1, a1, s2, a2
+	call	fw_next_mode
+	REG_S	a0, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	/* Store warm_boot address in scratch space */
 	la	a4, _start_warm
 	REG_S	a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
+	/* Store platform address in scratch space */
 	la	a4, platform
 	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
+	/* Store hartid-to-scratch function address in scratch space */
 	la	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
+	/* Clear tmp0 in scratch space */
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
+	/* Store firmware options in scratch space */
+	MOV_3R	s0, a0, s1, a1, s2, a2
 #ifdef FW_OPTIONS
 	li	a4, FW_OPTIONS
-	REG_S	a4, SBI_SCRATCH_OPTIONS_OFFSET(tp)
 #else
-	REG_S	zero, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+	add	a4, zero, zero
 #endif
+	call	fw_options
+	or	a4, a4, a0
+	REG_S	a4, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	/* Move to next scratch space */
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
 
@@ -99,12 +137,10 @@ _bss_zero:
 	blt	a4, a5, _bss_zero
 
 	/* Override pervious arg1 */
-	add	s0, a0, zero
-	add	s1, a1, zero
+	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_prev_arg1
 	add	t1, a0, zero
-	add	a0, s0, zero
-	add	a1, s1, zero
+	MOV_3R	a0, s0, a1, s1, a2, s2
 	beqz	t1, _prev_arg1_override_done
 	add	a1, t1, zero
 _prev_arg1_override_done:
@@ -122,13 +158,12 @@ _prev_arg1_override_done:
 	li	a3, ~(__SIZEOF_POINTER__ - 1)
 	li	a4, 0xff
 	/* t1 = destination FDT start address */
-	add	s0, a0, zero
-	add	s1, a1, zero
+	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_next_arg1
 	add	t1, a0, zero
-	add	a0, s0, zero
-	add	a1, s1, zero
+	MOV_3R	a0, s0, a1, s1, a2, s2
 	beqz	t1, _fdt_reloc_done
+	beq	t1, a1, _fdt_reloc_done
 	and	t1, t1, a3
 	/* t0 = source FDT start address */
 	add	t0, a1, zero
@@ -188,6 +223,7 @@ _wait_for_boot_hart:
 	beqz	a5, _wait_for_boot_hart
 
 _start_warm:
+	/* Reset all registers for non-boot HARTs */
 	li	ra, 0
 	call	_reset_regs
 
@@ -430,7 +466,7 @@ _reset_regs:
 
 	/* flush the instruction cache */
 	fence.i
-	/* Reset all registers except ra, a0,a1 */
+	/* Reset all registers except ra, a0, a1 and a2 */
 	li sp, 0
 	li gp, 0
 	li tp, 0
@@ -439,7 +475,6 @@ _reset_regs:
 	li t2, 0
 	li s0, 0
 	li s1, 0
-	li a2, 0
 	li a3, 0
 	li a4, 0
 	li a5, 0
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index 4b7186316d6..cdf1f41dc5d 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -9,19 +9,37 @@
 
 #include "fw_base.S"
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_save_info
+	/*
+	 * We can only use a0, a1, a2, a3, and a4 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
+	 * Nothing to be returned here.
+	 */
+fw_save_info:
+	ret
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_prev_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The previous arg1 should be returned in 'a0'.
+	 */
 fw_prev_arg1:
-	/* We return previous arg1 in 'a0' */
 	add	a0, zero, zero
 	ret
 
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_next_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next arg1 should be returned in 'a0'.
+	 */
 fw_next_arg1:
-	/* We return next arg1 in 'a0' */
 #ifdef FW_JUMP_FDT_ADDR
 	li	a0, FW_JUMP_FDT_ADDR
 #else
@@ -32,12 +50,38 @@ fw_next_arg1:
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_next_addr
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'.
+	 */
 fw_next_addr:
-	/* We return next address in 'a0' */
 	la	a0, _jump_addr
 	REG_L	a0, (a0)
 	ret
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_next_mode
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'
+	 */
+fw_next_mode:
+	li	a0, PRV_S
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_options
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The 'a4' register will have default options.
+	 * The next address should be returned in 'a0'.
+	 */
+fw_options:
+	add	a0, zero, zero
+	ret
+
 #ifndef FW_JUMP_ADDR
 #error "Must define FW_JUMP_ADDR"
 #endif
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index b86b63c549a..4b4527a089f 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -9,11 +9,26 @@
 
 #include "fw_base.S"
 
-	.align 4
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_save_info
+	/*
+	 * We can only use a0, a1, a2, a3, and a4 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
+	 * Nothing to be returned here.
+	 */
+fw_save_info:
+	ret
+
+	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_prev_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The previous arg1 should be returned in 'a0'.
+	 */
 fw_prev_arg1:
-	/* We return previous arg1 in 'a0' */
 #ifdef FW_PAYLOAD_FDT_PATH
 	la	a0, fdt_bin
 #else
@@ -21,11 +36,14 @@ fw_prev_arg1:
 #endif
 	ret
 
-	.align 4
+	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_next_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next arg1 should be returned in 'a0'.
+	 */
 fw_next_arg1:
-	/* We return next arg1 in 'a0' */
 #ifdef FW_PAYLOAD_FDT_ADDR
 	li	a0, FW_PAYLOAD_FDT_ADDR
 #else
@@ -33,14 +51,40 @@ fw_next_arg1:
 #endif
 	ret
 
-	.align 4
+	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_next_addr
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'.
+	 */
 fw_next_addr:
-	/* We return next address in 'a0' */
 	la	a0, payload_bin
 	ret
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_next_mode
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'.
+	 */
+fw_next_mode:
+	li	a0, PRV_S
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_options
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The 'a4' register will have default options.
+	 * The next address should be returned in 'a0'.
+	 */
+fw_options:
+	add	a0, zero, zero
+	ret
+
 #ifdef FW_PAYLOAD_FDT_PATH
 	.align 4
 	.section .text, "ax", %progbits

From bae54f764570f3fa5c592f313b45352d9f6f1d8a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 29 Apr 2019 11:55:19 +0530
Subject: [PATCH 0251/1765] firmware: Add fw_dynamic firmware

This patch provides first-cut implementation of fw_dynamic firmware.

As compared to fw_jump and fw_payload, the fw_dynamic obtains next
address, next mode and OpenSBI options from struct fw_dynamic_info.

The previous booting stage can create struct fw_dynamic_info in memory
and pass address of struct fw_dynamic_info in 'a2' register. Also, the
struct fw_dynamic_info has versioning as well so changes to the struct
fw_dynamic_info can be done in a backward compatible manner.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_dynamic.S       | 118 ++++++++++++++++++++++++++++++++++++
 firmware/fw_dynamic.elf.ldS |  16 +++++
 firmware/objects.mk         |   2 +
 include/sbi/fw_dynamic.h    |  61 +++++++++++++++++++
 4 files changed, 197 insertions(+)
 create mode 100644 firmware/fw_dynamic.S
 create mode 100644 firmware/fw_dynamic.elf.ldS
 create mode 100644 include/sbi/fw_dynamic.h

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
new file mode 100644
index 00000000000..cf97b602008
--- /dev/null
+++ b/firmware/fw_dynamic.S
@@ -0,0 +1,118 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/fw_dynamic.h>
+
+#include "fw_base.S"
+
+	.align 3
+	.section .entry, "ax", %progbits
+_bad_dynamic_info:
+	wfi
+	j	_bad_dynamic_info
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_save_info
+	/*
+	 * We can only use a0, a1, a2, a3, and a4 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
+	 * Nothing to be returned here.
+	 */
+fw_save_info:
+	la	a4, _dynamic_next_arg1
+	REG_S	a1, (a4)
+	li	a4, FW_DYNAMIC_INFO_MAGIC_VALUE
+	REG_L	a3, FW_DYNAMIC_INFO_MAGIC_OFFSET(a2)
+	bne	a3, a4, _bad_dynamic_info
+	li	a4, FW_DYNAMIC_INFO_VERSION_MAX
+	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
+	bgt	a3, a4, _bad_dynamic_info
+	la	a4, _dynamic_next_addr
+	REG_L	a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)
+	REG_S	a3, (a4)
+	la	a4, _dynamic_next_mode
+	REG_L	a3, FW_DYNAMIC_INFO_NEXT_MODE_OFFSET(a2)
+	REG_S	a3, (a4)
+	la	a4, _dynamic_options
+	REG_L	a3, FW_DYNAMIC_INFO_OPTIONS_OFFSET(a2)
+	REG_S	a3, (a4)
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_prev_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The previous arg1 should be returned in 'a0'.
+	 */
+fw_prev_arg1:
+	add	a0, zero, zero
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_next_arg1
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next arg1 should be returned in 'a0'.
+	 */
+fw_next_arg1:
+	la	a0, _dynamic_next_arg1
+	REG_L	a0, (a0)
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_next_addr
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'.
+	 */
+fw_next_addr:
+	la	a0, _dynamic_next_addr
+	REG_L	a0, (a0)
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_next_mode
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The next address should be returned in 'a0'
+	 */
+fw_next_mode:
+	la	a0, _dynamic_next_mode
+	REG_L	a0, (a0)
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_options
+	/*
+	 * We can only use a0, a1, and a2 registers here.
+	 * The 'a4' register will have default options.
+	 * The next address should be returned in 'a0'.
+	 */
+fw_options:
+	la	a0, _dynamic_options
+	REG_L	a0, (a0)
+	ret
+
+	.align 3
+	.section .entry, "ax", %progbits
+_dynamic_next_arg1:
+	RISCV_PTR 0x0
+_dynamic_next_addr:
+	RISCV_PTR 0x0
+_dynamic_next_mode:
+	RISCV_PTR PRV_S
+_dynamic_options:
+	RISCV_PTR 0x0
diff --git a/firmware/fw_dynamic.elf.ldS b/firmware/fw_dynamic.elf.ldS
new file mode 100644
index 00000000000..7ee078708c3
--- /dev/null
+++ b/firmware/fw_dynamic.elf.ldS
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+
+SECTIONS
+{
+	#include "fw_base.ldS"
+}
diff --git a/firmware/objects.mk b/firmware/objects.mk
index cc382835339..e8969e67dcc 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -17,6 +17,8 @@ ifdef FW_TEXT_START
 firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
 endif
 
+firmware-bins-$(FW_DYNAMIC) += fw_dynamic.bin
+
 firmware-bins-$(FW_JUMP) += fw_jump.bin
 ifdef FW_JUMP_ADDR
 firmware-genflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
new file mode 100644
index 00000000000..695dc295be4
--- /dev/null
+++ b/include/sbi/fw_dynamic.h
@@ -0,0 +1,61 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FW_DYNAMIC_H__
+#define __FW_DYNAMIC_H__
+
+#include <sbi/riscv_asm.h>
+
+/* clang-format off */
+
+/** Offset of magic member in fw_dynamic_info */
+#define FW_DYNAMIC_INFO_MAGIC_OFFSET		(0 * __SIZEOF_POINTER__)
+/** Offset of version member in fw_dynamic_info */
+#define FW_DYNAMIC_INFO_VERSION_OFFSET		(1 * __SIZEOF_POINTER__)
+/** Offset of next_addr member in fw_dynamic_info */
+#define FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET	(2 * __SIZEOF_POINTER__)
+/** Offset of next_mode member in fw_dynamic_info */
+#define FW_DYNAMIC_INFO_NEXT_MODE_OFFSET	(3 * __SIZEOF_POINTER__)
+/** Offset of options member in fw_dynamic_info */
+#define FW_DYNAMIC_INFO_OPTIONS_OFFSET		(4 * __SIZEOF_POINTER__)
+
+/** Expected value of info magic ('OSBI' ascii string in hex) */
+#define FW_DYNAMIC_INFO_MAGIC_VALUE		0x4942534f
+
+/** Maximum supported info version */
+#define FW_DYNAMIC_INFO_VERSION_MAX		0x1
+
+/** Possible next mode values */
+#define FW_DYNAMIC_INFO_NEXT_MODE_U		0x0
+#define FW_DYNAMIC_INFO_NEXT_MODE_S		0x1
+#define FW_DYNAMIC_INFO_NEXT_MODE_M		0x3
+
+/* clang-format on */
+
+#ifndef __ASSEMBLY__
+
+#include <sbi/sbi_types.h>
+
+/** Representation dynamic info passed by previous booting stage */
+struct fw_dynamic_info {
+	/** Info magic */
+	unsigned long magic;
+	/** Info version */
+	unsigned long version;
+	/** Next booting stage address */
+	unsigned long next_addr;
+	/** Next booting stage mode */
+	unsigned long next_mode;
+	/** Options for OpenSBI library */
+	unsigned long options;
+} __packed;
+
+#endif
+
+#endif

From a4c2f50b640a4e93e0192718cfabb9686c6ca9a0 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 29 Apr 2019 12:11:06 +0530
Subject: [PATCH 0252/1765] platform: Enable dynamic firmware for appropriate
 platforms

This patch enables FW_DYNAMIC option (i.e. dynamic firmware) for
all appropriate/applicable platforms.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 platform/qemu/sifive_u/config.mk | 1 +
 platform/qemu/virt/config.mk     | 1 +
 platform/sifive/fu540/config.mk  | 1 +
 platform/template/config.mk      | 8 +++++++-
 4 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 097fcdbb3a4..87e12ee9c89 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -24,6 +24,7 @@ PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
 FW_JUMP=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index ad58b728e44..2b0709c06be 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -24,6 +24,7 @@ PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
 FW_JUMP=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB alligned for 32-bit system
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index 352c156efd9..fbb5db8893e 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -20,6 +20,7 @@ PLATFORM_SYS_CLINT=y
 
 # Blobs to build
 FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
 FW_JUMP=y
 FW_JUMP_ADDR=0x80200000
 FW_JUMP_FDT_ADDR=0x82200000
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 5623a9b5de8..5ba8efc752e 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -45,6 +45,13 @@ platform-ldflags-y =
 # Firmware load address configuration. This is mandatory.
 FW_TEXT_START=0x80000000
 
+#
+# Dynamic firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_DYNAMIC=<y|n>
+
 #
 # Jump firmware configuration.
 # Optional parameters are commented out. Uncomment and define these parameters
@@ -83,4 +90,3 @@ endif
 # Allow linking against static libc for standard functions (memset, memcpy, etc)
 #
 # PLATFORM_INCLUDE_LIBC=y
-

From 392749f6338ac8a63ce5492770caa4fb75ad6b96 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 29 Apr 2019 12:50:33 +0530
Subject: [PATCH 0253/1765] docs: Add documentation about dynamic firmware

This patch adds documenation about dynamic firmware.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/firmware/fw.md         | 19 ++++++++++++++++---
 docs/firmware/fw_dynamic.md | 35 +++++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+), 3 deletions(-)
 create mode 100644 docs/firmware/fw_dynamic.md

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 8ca54b607a5..4133c23fe4d 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -9,12 +9,22 @@ OpenSBI generic library code. The supported firmwares type will differ in how
 the arguments passed by the platform early boot stage are handled, as well as
 how the boot stage following the firmware will be handled and executed.
 
-OpenSBI currently supports two different types of firmwares.
+OpenSBI currently supports three different types of firmwares.
+
+Firmware with Dynamic Information (*FW_DYNAMIC*)
+------------------------------------------------
+
+The *FW_DYNAMIC* firmware gets information about the next booting stage entry,
+e.g. a bootloader or an OS kernel, from previous booting stage at runtime.
+
+A *FW_DYNAMIC* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is capable of loading both the OpenSBI firmware
+and the booting stage binary to follow OpenSBI firmware.
 
 Firmware with Jump Address (*FW_JUMP*)
 --------------------------------------
 
-The *FW_JUMP* firmware only handles the address of the next booting stage
+The *FW_JUMP* firmware assumes a fixed address of the next booting stage
 entry, e.g. a bootloader or an OS kernel, without directly including the
 binary code for this next stage.
 
@@ -48,14 +58,17 @@ configuration parameter.
   loads OpenSBI firmware.
 
 Additionally, each firmware type as a set of type specific configuration
-parameters. Detailed information for each firmware type can be found in the 
+parameters. Detailed information for each firmware type can be found in the
 following documents.
 
+* *[FW_DYNAMIC]*: The *Firmware with Dynamic Information (FW_DYNAMIC)* is
+  described in more details in the file *fw_dynamic.md*.
 * *[FW_JUMP]*: The *Firmware with Jump Address (FW_JUMP)* is described in more
   details in the file *fw_jump.md*.
 * *[FW_PAYLOAD]*: The *Firmware with Payload (FW_PAYLOAD)* is described in more
   details in the file *fw_payload.md*.
 
+[FW_DYNAMIC]: fw_dynamic.md
 [FW_JUMP]: fw_jump.md
 [FW_PAYLOAD]: fw_payload.md
 
diff --git a/docs/firmware/fw_dynamic.md b/docs/firmware/fw_dynamic.md
new file mode 100644
index 00000000000..041b6cc3be9
--- /dev/null
+++ b/docs/firmware/fw_dynamic.md
@@ -0,0 +1,35 @@
+OpenSBI Firmware with Dynamic Information *FW_DYNAMIC*
+======================================================
+
+OpenSBI **firmware with dynamic info (FW_DYNAMIC)** is a firmware which gets
+information about next booting stage (e.g. a bootloader or an OS) and runtime
+OpenSBI library options from previous booting stage.
+
+The previous booting stage will pass information to *FW_DYNAMIC* by creating
+*struct fw_dynamic_info* in memory and passing it's address to *FW_DYNAMIC*
+via *a2* register of RISC-V CPU.
+
+A *FW_DYNAMIC* firmware is particularly useful when the booting stage executed
+prior to OpenSBI firmware is capable of loading both the OpenSBI firmware and
+the booting stage binary to follow OpenSBI firmware.
+
+*FW_DYNAMIC* Compilation
+------------------------
+
+A platform can enable *FW_DYNAMIC* firmware using any of the following methods.
+
+1. Specifying `FW_DYNAMIC=y` on the top level `make` command line.
+2. Specifying `FW_DYNAMIC=y` in the target platform *config.mk* configuration
+file.
+
+The compiled *FW_DYNAMIC* firmware ELF file is named *fw_dynamic.elf*. It's
+expanded image file is *fw_dynamic.bin*. Both files are created in the platform
+specific build directory under the *build/platform/<platform_subdir>/firmware*
+directory.
+
+*FW_DYNAMIC* Firmware Configuration Options
+-------------------------------------------
+
+The *FW_DYNAMIC* firmware does not requires any platform specific configuration
+parameters because all required information is passed by previous booting stage
+at runtime via *struct fw_dynamic_info*.

From 4e2cd478208531c47343290f15b577d40c82649c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 20 May 2019 11:20:53 +0530
Subject: [PATCH 0254/1765] lib: Flush everything when remote TLB flush range
 is too large

On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush
request for user space addresses (typically, start=x and end=-1).
This is caused by Linux kernel commit a21344dfc6 ("riscv: fix
sbi_remote_sfence_vma{,_asid}").

It's not practical to execute large number of sfence instructions
for a large TLB flush range because it takes too much time and
eventually causes CPU stall in Linux kernel.

This patch addresses above issue by upgrading TLB flush range to
TLB flush all whenever TLB flush range is greater than 1GB.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h |  4 +++-
 lib/sbi_ipi.c           | 18 +++++++++++++++---
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 357bcb4fdcb..704c53c2f0c 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -31,7 +31,9 @@
 #define PAGE_SHIFT      (12)
 #define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE - 1))
-#define SBI_TLB_FLUSH_ALL ((unsigned long)-1)
+
+#define SBI_TLB_FLUSH_ALL	((unsigned long)-1)
+#define SBI_TLB_FLUSH_MAX_SIZE	(1UL << 30)
 
 #define REG_L		__REG_SEL(ld, lw)
 #define REG_S		__REG_SEL(sd, sw)
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index cc0d0d4cdb9..578740c551d 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -23,8 +23,8 @@
 static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
 					     struct sbi_tlb_info *next)
 {
-	int curr_end;
-	int next_end;
+	unsigned long curr_end;
+	unsigned long next_end;
 	int ret = SBI_FIFO_UNCHANGED;
 
 	if (!curr || !next)
@@ -91,17 +91,29 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat	   = sbi_platform_ptr(scratch);
 	struct sbi_fifo *ipi_tlb_fifo;
+	struct sbi_tlb_info *tinfo = data;
 	int ret = SBI_FIFO_UNCHANGED;
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
 
-	/* Set IPI type on remote hart's scratch area and
+	/*
+	 * Set IPI type on remote hart's scratch area and
 	 * trigger the interrupt
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
+		/*
+		 * If address range to flush is too big then simply
+		 * upgrade it to flush all because we can only flush
+		 * 4KB at a time.
+		 */
+		if (tinfo->size >= SBI_TLB_FLUSH_MAX_SIZE) {
+			tinfo->start = 0;
+			tinfo->size = SBI_TLB_FLUSH_ALL;
+		}
+
 		ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
 		ret	     = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
 					       sbi_tlb_fifo_update_cb);

From 2dfed32c463eef80a0eea7108117ce18dc80c527 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 21 May 2019 11:51:01 +0530
Subject: [PATCH 0255/1765] lib: Add a simple brain-dead allocator to manage
 extra scratch space

We have extra space above scratch space (sbi_scratch) which we are
currently using to manage per-HART IPI data and TLB request management.

In future, more parts of OpenSBI will use the extra scratch space so
it will become difficult to manage extra scratch space using just
defines and macros.

This patch adds a simple brain-dead allocator to manage extra scratch
space. This allocator never expects anything to be free-ed hence it
keeps incrementing to next allocation offset until it runs-out of space.

In future, we can have more sophisticated allocator which will allow
us to re-claim free-ed space and also allows us to track owner of
allocated space.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_error.h   |  1 +
 include/sbi/sbi_scratch.h | 33 ++++++++++----------
 lib/objects.mk            |  1 +
 lib/sbi_ipi.c             | 66 ++++++++++++++++++++++++++++++++-------
 lib/sbi_scratch.c         | 59 ++++++++++++++++++++++++++++++++++
 5 files changed, 131 insertions(+), 29 deletions(-)
 create mode 100644 lib/sbi_scratch.c

diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 39a3864d995..db3d6ddce48 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -24,6 +24,7 @@
 #define SBI_EIO		-9
 #define SBI_EILL	-10
 #define SBI_ENOSPC	-11
+#define SBI_ENOMEM	-12
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index f5827664441..46ea38f10f0 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -34,14 +34,8 @@
 #define SBI_SCRATCH_TMP0_OFFSET			(8 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
 #define SBI_SCRATCH_OPTIONS_OFFSET		(9 * __SIZEOF_POINTER__)
-
-/** sbi_ipi_data is located behind sbi_scratch. This struct is not packed. */
-/** Offset of ipi_type in sbi_ipi_data */
-#define SBI_IPI_DATA_IPI_TYPE_OFFSET		(15 * __SIZEOF_POINTER__)
-
-#define SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET	(16 * __SIZEOF_POINTER__)
-#define SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET	(SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET + SBI_TLB_INFO_SIZE)
-
+/** Offset of extra space in sbi_scratch */
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(10 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch and sbi_ipi_data */
 #define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
 
@@ -90,17 +84,22 @@ enum sbi_scratch_options {
 #define sbi_scratch_thishart_arg1_ptr() \
 	((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
-/** Get pointer to sbi_ipi_data from sbi_scratch */
-#define sbi_ipi_data_ptr(scratch) \
-	((struct sbi_ipi_data *)(void *)scratch + SBI_IPI_DATA_IPI_TYPE_OFFSET)
+/** Allocate from extra space in sbi_scratch
+ *
+ * @return zero on failure and non-zero (>= SBI_SCRATCH_EXTRA_SPACE_OFFSET)
+ * on success
+ */
+unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner);
+
+/** Free-up extra space in sbi_scratch */
+void sbi_scratch_free_offset(unsigned long offset);
 
-/** Get pointer to tlb flush info fifo header from sbi_scratch */
-#define sbi_tlb_fifo_head_ptr(scratch) \
-	((struct sbi_fifo *)(void *)scratch + SBI_SCRATCH_TLB_QUEUE_HEAD_OFFSET)
+/** Get pointer from offset in sbi_scratch */
+#define sbi_scratch_offset_ptr(scratch, offset)	((void *)scratch + (offset))
 
-/** Get pointer to tlb flush info fifo queue address from sbi_scratch */
-#define sbi_tlb_fifo_mem_ptr(scratch) \
-	(void *)((void *)scratch + SBI_SCRATCH_TLB_QUEUE_MEM_OFFSET)
+/** Get pointer from offset in sbi_scratch for current HART */
+#define sbi_scratch_thishart_offset_ptr(offset)	\
+	((void *)sbi_scratch_thishart_ptr() + (offset))
 
 #endif
 
diff --git a/lib/objects.mk b/lib/objects.mk
index 137d7f06703..bfa5a3c4b80 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -21,6 +21,7 @@ lib-objs-y += sbi_illegal_insn.o
 lib-objs-y += sbi_init.o
 lib-objs-y += sbi_ipi.o
 lib-objs-y += sbi_misaligned_ldst.o
+lib-objs-y += sbi_scratch.o
 lib-objs-y += sbi_system.o
 lib-objs-y += sbi_timer.o
 lib-objs-y += sbi_trap.o
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 578740c551d..09d2f7d1b97 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_unpriv.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_bitops.h>
@@ -20,6 +21,10 @@
 #include <sbi/sbi_timer.h>
 #include <plat/string.h>
 
+static unsigned long ipi_data_off;
+static unsigned long ipi_tlb_fifo_off;
+static unsigned long ipi_tlb_fifo_mem_off;
+
 static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
 					     struct sbi_tlb_info *next)
 {
@@ -89,7 +94,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 			void *data)
 {
 	struct sbi_scratch *remote_scratch = NULL;
-	const struct sbi_platform *plat	   = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_ipi_data *ipi_data;
 	struct sbi_fifo *ipi_tlb_fifo;
 	struct sbi_tlb_info *tinfo = data;
 	int ret = SBI_FIFO_UNCHANGED;
@@ -102,6 +108,9 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	 * trigger the interrupt
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
+	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
+	ipi_tlb_fifo = sbi_scratch_offset_ptr(remote_scratch,
+					      ipi_tlb_fifo_off);
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
 		/*
@@ -114,9 +123,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 			tinfo->size = SBI_TLB_FLUSH_ALL;
 		}
 
-		ipi_tlb_fifo = sbi_tlb_fifo_head_ptr(remote_scratch);
-		ret	     = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
-					       sbi_tlb_fifo_update_cb);
+		ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
+					      sbi_tlb_fifo_update_cb);
 		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
 			goto done;
 		}
@@ -133,7 +141,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 			__asm__ __volatile("nop");
 		}
 	}
-	atomic_raw_set_bit(event, &sbi_ipi_data_ptr(remote_scratch)->ipi_type);
+	atomic_raw_set_bit(event, &ipi_data->ipi_type);
 	mb();
 	sbi_platform_ipi_send(plat, hartid);
 	if (event != SBI_IPI_EVENT_SOFT)
@@ -231,13 +239,16 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 	struct sbi_tlb_info tinfo;
 	unsigned int ipi_event;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	struct sbi_fifo *ipi_tlb_fifo	= sbi_tlb_fifo_head_ptr(scratch);
+	struct sbi_ipi_data *ipi_data =
+			sbi_scratch_offset_ptr(scratch, ipi_data_off);
+	struct sbi_fifo *ipi_tlb_fifo =
+			sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
 
 	u32 hartid = sbi_current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
 
 	do {
-		ipi_type = sbi_ipi_data_ptr(scratch)->ipi_type;
+		ipi_type = ipi_data->ipi_type;
 		rmb();
 		ipi_event = __ffs(ipi_type);
 		switch (ipi_event) {
@@ -261,17 +272,48 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			sbi_hart_hang();
 			break;
 		};
-		ipi_type = atomic_raw_clear_bit(
-			ipi_event, &sbi_ipi_data_ptr(scratch)->ipi_type);
+		ipi_type = atomic_raw_clear_bit(ipi_event, &ipi_data->ipi_type);
 	} while (ipi_type > 0);
 }
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	struct sbi_fifo *tlb_info_q = sbi_tlb_fifo_head_ptr(scratch);
+	void *ipi_tlb_mem;
+	struct sbi_fifo *ipi_tlb_q;
+	struct sbi_ipi_data *ipi_data;
+
+	if (cold_boot) {
+		ipi_data_off = sbi_scratch_alloc_offset(sizeof(*ipi_data),
+							"IPI_DATA");
+		if (!ipi_data_off)
+			return SBI_ENOMEM;
+		ipi_tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*ipi_tlb_q),
+							    "IPI_TLB_FIFO");
+		if (!ipi_tlb_fifo_off) {
+			sbi_scratch_free_offset(ipi_data_off);
+			return SBI_ENOMEM;
+		}
+		ipi_tlb_fifo_mem_off = sbi_scratch_alloc_offset(
+				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE,
+				"IPI_TLB_FIFO_MEM");
+		if (!ipi_tlb_fifo_mem_off) {
+			sbi_scratch_free_offset(ipi_tlb_fifo_off);
+			sbi_scratch_free_offset(ipi_data_off);
+			return SBI_ENOMEM;
+		}
+	} else {
+		if (!ipi_data_off ||
+		    !ipi_tlb_fifo_off ||
+		    !ipi_tlb_fifo_mem_off)
+			return SBI_ENOMEM;
+	}
+
+	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
+	ipi_tlb_q = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
+	ipi_tlb_mem = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_mem_off);
 
-	sbi_ipi_data_ptr(scratch)->ipi_type = 0x00;
-	sbi_fifo_init(tlb_info_q, sbi_tlb_fifo_mem_ptr(scratch),
+	ipi_data->ipi_type = 0x00;
+	sbi_fifo_init(ipi_tlb_q, ipi_tlb_mem,
 		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
 
 	/* Enable software interrupts */
diff --git a/lib/sbi_scratch.c b/lib/sbi_scratch.c
new file mode 100644
index 00000000000..0a615a2cdbb
--- /dev/null
+++ b/lib/sbi_scratch.c
@@ -0,0 +1,59 @@
+ /*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_scratch.h>
+
+static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
+static unsigned long extra_offset = SBI_SCRATCH_EXTRA_SPACE_OFFSET;
+
+unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
+{
+	unsigned long ret = 0;
+
+	/*
+	 * We have a simple brain-dead allocator which never expects
+	 * anything to be free-ed hence it keeps incrementing the
+	 * next allocation offset until it runs-out of space.
+	 *
+	 * In future, we will have more sophisticated allocator which
+	 * will allow us to re-claim free-ed space.
+	 */
+
+	if (!size)
+		return 0;
+
+	while (size & (__SIZEOF_POINTER__ - 1))
+		size++;
+
+	spin_lock(&extra_lock);
+
+	if (SBI_SCRATCH_SIZE < (extra_offset + size))
+		goto done;
+
+	ret = extra_offset;
+	extra_offset += size;
+
+done:
+	spin_unlock(&extra_lock);
+
+	return ret;
+}
+
+void sbi_scratch_free_offset(unsigned long offset)
+{
+	if ((offset < SBI_SCRATCH_EXTRA_SPACE_OFFSET) ||
+	    (SBI_SCRATCH_SIZE <= offset))
+		return;
+
+	/*
+	 * We don't actually free-up because it's a simple
+	 * brain-dead allocator.
+	 */
+}

From 95b7480ab4b438cf545afae200b40012e83f1dda Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 May 2019 07:58:05 +0530
Subject: [PATCH 0256/1765] lib: Factor-out TLB management from IPI management

This patch factor-out TLB management from IPI management to separate
sources sbi_tlb.c and sbi_tlb.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h |   3 -
 include/sbi/sbi_ipi.h   |  16 ---
 include/sbi/sbi_tlb.h   |  48 +++++++++
 lib/objects.mk          |   1 +
 lib/sbi_ecall.c         |   1 +
 lib/sbi_ipi.c           | 203 +++--------------------------------
 lib/sbi_tlb.c           | 227 ++++++++++++++++++++++++++++++++++++++++
 7 files changed, 292 insertions(+), 207 deletions(-)
 create mode 100644 include/sbi/sbi_tlb.h
 create mode 100644 lib/sbi_tlb.c

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 704c53c2f0c..4f12c03b3cb 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -32,9 +32,6 @@
 #define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE - 1))
 
-#define SBI_TLB_FLUSH_ALL	((unsigned long)-1)
-#define SBI_TLB_FLUSH_MAX_SIZE	(1UL << 30)
-
 #define REG_L		__REG_SEL(ld, lw)
 #define REG_S		__REG_SEL(sd, sw)
 #define SZREG		__REG_SEL(8, 4)
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 108e5aa1e61..b8afb5bbd6e 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -22,28 +22,12 @@
 
 /* clang-format on */
 
-#define SBI_TLB_FIFO_NUM_ENTRIES 4
-enum sbi_tlb_info_types {
-	SBI_TLB_FLUSH_VMA,
-	SBI_TLB_FLUSH_VMA_ASID,
-	SBI_TLB_FLUSH_VMA_VMID
-};
-
 struct sbi_scratch;
 
 struct sbi_ipi_data {
 	unsigned long ipi_type;
 };
 
-struct sbi_tlb_info {
-	unsigned long start;
-	unsigned long size;
-	unsigned long asid;
-	unsigned long type;
-};
-
-#define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info)
-
 int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event,
 		      void *data);
 
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
new file mode 100644
index 00000000000..f3d93d478ba
--- /dev/null
+++ b/include/sbi/sbi_tlb.h
@@ -0,0 +1,48 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_TLB_H__
+#define __SBI_TLB_H__
+
+#include <sbi/sbi_types.h>
+
+/* clang-format off */
+
+#define SBI_TLB_FLUSH_ALL			((unsigned long)-1)
+#define SBI_TLB_FLUSH_MAX_SIZE			(1UL << 30)
+
+/* clang-format on */
+
+#define SBI_TLB_FIFO_NUM_ENTRIES		4
+
+enum sbi_tlb_info_types {
+	SBI_TLB_FLUSH_VMA,
+	SBI_TLB_FLUSH_VMA_ASID,
+	SBI_TLB_FLUSH_VMA_VMID
+};
+
+struct sbi_scratch;
+
+struct sbi_tlb_info {
+	unsigned long start;
+	unsigned long size;
+	unsigned long asid;
+	unsigned long type;
+};
+
+#define SBI_TLB_INFO_SIZE			sizeof(struct sbi_tlb_info)
+
+int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 event, void *data);
+
+void sbi_tlb_fifo_process(struct sbi_scratch *scratch, u32 event);
+
+int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot);
+
+#endif
diff --git a/lib/objects.mk b/lib/objects.mk
index bfa5a3c4b80..8eb860f9925 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -24,6 +24,7 @@ lib-objs-y += sbi_misaligned_ldst.o
 lib-objs-y += sbi_scratch.o
 lib-objs-y += sbi_system.o
 lib-objs-y += sbi_timer.o
+lib-objs-y += sbi_tlb.o
 lib-objs-y += sbi_trap.o
 
 # External Libraries to include
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index d82766a1d8e..a8ad40c7716 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
+#include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index 09d2f7d1b97..da6b06d0957 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -13,92 +13,23 @@
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_fifo.h>
-#include <sbi/sbi_hart.h>
 #include <sbi/sbi_bitops.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
+#include <sbi/sbi_tlb.h>
 #include <plat/string.h>
 
 static unsigned long ipi_data_off;
-static unsigned long ipi_tlb_fifo_off;
-static unsigned long ipi_tlb_fifo_mem_off;
-
-static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
-					     struct sbi_tlb_info *next)
-{
-	unsigned long curr_end;
-	unsigned long next_end;
-	int ret = SBI_FIFO_UNCHANGED;
-
-	if (!curr || !next)
-		return ret;
-
-	next_end = next->start + next->size;
-	curr_end = curr->start + curr->size;
-	if (next->start <= curr->start && next_end > curr_end) {
-		curr->start = next->start;
-		curr->size  = next->size;
-		ret	    = SBI_FIFO_UPDATED;
-	} else if (next->start >= curr->start && next_end <= curr_end) {
-		ret = SBI_FIFO_SKIP;
-	}
-
-	return ret;
-}
-
-/**
- * Call back to decide if an inplace fifo update is required or next entry can
- * can be skipped. Here are the different cases that are being handled.
- *
- * Case1:
- *	if next flush request range lies within one of the existing entry, skip
- *	the next entry.
- * Case2:
- *	if flush request range in current fifo entry lies within next flush
- *	request, update the current entry.
- * Case3:
-	if a complete vma flush is requested, then all entries can be deleted
-	and new request can be enqueued. This will not be done for ASID case
-	as that means we have to iterate again in the fifo to figure out which
-	entries belong to that ASID.
- */
-int sbi_tlb_fifo_update_cb(void *in, void *data)
-{
-	struct sbi_tlb_info *curr;
-	struct sbi_tlb_info *next;
-	int ret = SBI_FIFO_UNCHANGED;
-
-	if (!in && !!data)
-		return ret;
-
-	curr = (struct sbi_tlb_info *)data;
-	next = (struct sbi_tlb_info *)in;
-	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
-	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
-		if (next->asid == curr->asid)
-			ret = __sbi_tlb_fifo_range_check(curr, next);
-	} else if (next->type == SBI_TLB_FLUSH_VMA &&
-		   curr->type == SBI_TLB_FLUSH_VMA) {
-		if (next->size == SBI_TLB_FLUSH_ALL)
-			ret = SBI_FIFO_RESET;
-		else
-			ret = __sbi_tlb_fifo_range_check(curr, next);
-	}
-
-	return ret;
-}
 
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 			void *data)
 {
+	int ret;
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data;
-	struct sbi_fifo *ipi_tlb_fifo;
-	struct sbi_tlb_info *tinfo = data;
-	int ret = SBI_FIFO_UNCHANGED;
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return -1;
@@ -109,45 +40,21 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
-	ipi_tlb_fifo = sbi_scratch_offset_ptr(remote_scratch,
-					      ipi_tlb_fifo_off);
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
 	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
-		/*
-		 * If address range to flush is too big then simply
-		 * upgrade it to flush all because we can only flush
-		 * 4KB at a time.
-		 */
-		if (tinfo->size >= SBI_TLB_FLUSH_MAX_SIZE) {
-			tinfo->start = 0;
-			tinfo->size = SBI_TLB_FLUSH_ALL;
-		}
-
-		ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
-					      sbi_tlb_fifo_update_cb);
-		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
+		ret = sbi_tlb_fifo_update(remote_scratch, event, data);
+		if (ret > 0)
 			goto done;
-		}
-		while (sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
-			/**
-			 * For now, Busy loop until there is space in the fifo.
-			 * There may be case where target hart is also
-			 * enqueue in source hart's fifo. Both hart may busy
-			 * loop leading to a deadlock.
-			 * TODO: Introduce a wait/wakeup event mechansim to handle
-			 * this properly.
-			 */
-			__asm__ __volatile("nop");
-			__asm__ __volatile("nop");
-		}
+		else if (ret < 0)
+			return ret;
 	}
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
 	mb();
 	sbi_platform_ipi_send(plat, hartid);
 	if (event != SBI_IPI_EVENT_SOFT)
 		sbi_platform_ipi_sync(plat, hartid);
-done:
 
+done:
 	return 0;
 }
 
@@ -180,69 +87,13 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
-static void sbi_ipi_tlb_flush_all()
-{
-	__asm__ __volatile("sfence.vma");
-}
-
-static void sbi_ipi_sfence_vma(struct sbi_tlb_info *tinfo)
-{
-	unsigned long start = tinfo->start;
-	unsigned long size  = tinfo->size;
-	unsigned long i;
-
-	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
-		sbi_ipi_tlb_flush_all();
-		return;
-	}
-
-	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__("sfence.vma %0"
-				     :
-				     : "r"(start + i)
-				     : "memory");
-	}
-}
-
-static void sbi_ipi_sfence_vma_asid(struct sbi_tlb_info *tinfo)
-{
-	unsigned long start = tinfo->start;
-	unsigned long size  = tinfo->size;
-	unsigned long asid  = tinfo->asid;
-	unsigned long i;
-
-	if (start == 0 && size == 0) {
-		sbi_ipi_tlb_flush_all();
-		return;
-	}
-
-	/* Flush entire MM context for a given ASID */
-	if (size == SBI_TLB_FLUSH_ALL) {
-		__asm__ __volatile__("sfence.vma x0, %0"
-				     :
-				     : "r"(asid)
-				     : "memory");
-		return;
-	}
-
-	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__("sfence.vma %0, %1"
-				     :
-				     : "r"(start + i), "r"(asid)
-				     : "memory");
-	}
-}
-
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
 	volatile unsigned long ipi_type;
-	struct sbi_tlb_info tinfo;
 	unsigned int ipi_event;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
-	struct sbi_fifo *ipi_tlb_fifo =
-			sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
 
 	u32 hartid = sbi_current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
@@ -260,13 +111,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			break;
 		case SBI_IPI_EVENT_SFENCE_VMA:
 		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
-			while (!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
-				if (tinfo.type == SBI_TLB_FLUSH_VMA)
-					sbi_ipi_sfence_vma(&tinfo);
-				else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
-					sbi_ipi_sfence_vma_asid(&tinfo);
-				memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
-			}
+			sbi_tlb_fifo_process(scratch, ipi_event);
 			break;
 		case SBI_IPI_EVENT_HALT:
 			sbi_hart_hang();
@@ -278,8 +123,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	void *ipi_tlb_mem;
-	struct sbi_fifo *ipi_tlb_q;
+	int ret;
 	struct sbi_ipi_data *ipi_data;
 
 	if (cold_boot) {
@@ -287,34 +131,17 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 							"IPI_DATA");
 		if (!ipi_data_off)
 			return SBI_ENOMEM;
-		ipi_tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*ipi_tlb_q),
-							    "IPI_TLB_FIFO");
-		if (!ipi_tlb_fifo_off) {
-			sbi_scratch_free_offset(ipi_data_off);
-			return SBI_ENOMEM;
-		}
-		ipi_tlb_fifo_mem_off = sbi_scratch_alloc_offset(
-				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE,
-				"IPI_TLB_FIFO_MEM");
-		if (!ipi_tlb_fifo_mem_off) {
-			sbi_scratch_free_offset(ipi_tlb_fifo_off);
-			sbi_scratch_free_offset(ipi_data_off);
-			return SBI_ENOMEM;
-		}
 	} else {
-		if (!ipi_data_off ||
-		    !ipi_tlb_fifo_off ||
-		    !ipi_tlb_fifo_mem_off)
+		if (!ipi_data_off)
 			return SBI_ENOMEM;
 	}
 
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
-	ipi_tlb_q = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
-	ipi_tlb_mem = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_mem_off);
-
 	ipi_data->ipi_type = 0x00;
-	sbi_fifo_init(ipi_tlb_q, ipi_tlb_mem,
-		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
+
+	ret = sbi_tlb_fifo_init(scratch, cold_boot);
+	if (ret)
+		return ret;
 
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
diff --git a/lib/sbi_tlb.c b/lib/sbi_tlb.c
new file mode 100644
index 00000000000..814d402c824
--- /dev/null
+++ b/lib/sbi_tlb.c
@@ -0,0 +1,227 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_fifo.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_tlb.h>
+#include <plat/string.h>
+
+static unsigned long ipi_tlb_fifo_off;
+static unsigned long ipi_tlb_fifo_mem_off;
+
+static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
+					     struct sbi_tlb_info *next)
+{
+	unsigned long curr_end;
+	unsigned long next_end;
+	int ret = SBI_FIFO_UNCHANGED;
+
+	if (!curr || !next)
+		return ret;
+
+	next_end = next->start + next->size;
+	curr_end = curr->start + curr->size;
+	if (next->start <= curr->start && next_end > curr_end) {
+		curr->start = next->start;
+		curr->size  = next->size;
+		ret	    = SBI_FIFO_UPDATED;
+	} else if (next->start >= curr->start && next_end <= curr_end) {
+		ret = SBI_FIFO_SKIP;
+	}
+
+	return ret;
+}
+
+/**
+ * Call back to decide if an inplace fifo update is required or next entry can
+ * can be skipped. Here are the different cases that are being handled.
+ *
+ * Case1:
+ *	if next flush request range lies within one of the existing entry, skip
+ *	the next entry.
+ * Case2:
+ *	if flush request range in current fifo entry lies within next flush
+ *	request, update the current entry.
+ * Case3:
+	if a complete vma flush is requested, then all entries can be deleted
+	and new request can be enqueued. This will not be done for ASID case
+	as that means we have to iterate again in the fifo to figure out which
+	entries belong to that ASID.
+ */
+static int sbi_tlb_fifo_update_cb(void *in, void *data)
+{
+	struct sbi_tlb_info *curr;
+	struct sbi_tlb_info *next;
+	int ret = SBI_FIFO_UNCHANGED;
+
+	if (!in && !!data)
+		return ret;
+
+	curr = (struct sbi_tlb_info *)data;
+	next = (struct sbi_tlb_info *)in;
+	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
+	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
+		if (next->asid == curr->asid)
+			ret = __sbi_tlb_fifo_range_check(curr, next);
+	} else if (next->type == SBI_TLB_FLUSH_VMA &&
+		   curr->type == SBI_TLB_FLUSH_VMA) {
+		if (next->size == SBI_TLB_FLUSH_ALL)
+			ret = SBI_FIFO_RESET;
+		else
+			ret = __sbi_tlb_fifo_range_check(curr, next);
+	}
+
+	return ret;
+}
+
+int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 event, void *data)
+{
+	int ret;
+	struct sbi_fifo *ipi_tlb_fifo;
+	struct sbi_tlb_info *tinfo = data;
+
+	ipi_tlb_fifo = sbi_scratch_offset_ptr(scratch,
+					      ipi_tlb_fifo_off);
+	/*
+	 * If address range to flush is too big then simply
+	 * upgrade it to flush all because we can only flush
+	 * 4KB at a time.
+	 */
+	if (tinfo->size >= SBI_TLB_FLUSH_MAX_SIZE) {
+		tinfo->start = 0;
+		tinfo->size = SBI_TLB_FLUSH_ALL;
+	}
+
+	ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
+				      sbi_tlb_fifo_update_cb);
+	if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
+		return 1;
+	}
+
+	while (sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
+		/**
+		 * For now, Busy loop until there is space in the fifo.
+		 * There may be case where target hart is also
+		 * enqueue in source hart's fifo. Both hart may busy
+		 * loop leading to a deadlock.
+		 * TODO: Introduce a wait/wakeup event mechansim to handle
+		 * this properly.
+		 */
+		__asm__ __volatile("nop");
+		__asm__ __volatile("nop");
+	}
+
+	return 0;
+}
+
+static void sbi_tlb_flush_all(void)
+{
+	__asm__ __volatile("sfence.vma");
+}
+
+static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long i;
+
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
+		sbi_tlb_flush_all();
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__("sfence.vma %0"
+				     :
+				     : "r"(start + i)
+				     : "memory");
+	}
+}
+
+static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long asid  = tinfo->asid;
+	unsigned long i;
+
+	if (start == 0 && size == 0) {
+		sbi_tlb_flush_all();
+		return;
+	}
+
+	/* Flush entire MM context for a given ASID */
+	if (size == SBI_TLB_FLUSH_ALL) {
+		__asm__ __volatile__("sfence.vma x0, %0"
+				     :
+				     : "r"(asid)
+				     : "memory");
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__("sfence.vma %0, %1"
+				     :
+				     : "r"(start + i), "r"(asid)
+				     : "memory");
+	}
+}
+
+void sbi_tlb_fifo_process(struct sbi_scratch *scratch, u32 event)
+{
+	struct sbi_tlb_info tinfo;
+	struct sbi_fifo *ipi_tlb_fifo =
+			sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
+
+	while (!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
+		if (tinfo.type == SBI_TLB_FLUSH_VMA)
+			sbi_tlb_fifo_sfence_vma(&tinfo);
+		else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
+			sbi_tlb_fifo_sfence_vma_asid(&tinfo);
+		memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
+	}
+}
+
+int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
+{
+	void *ipi_tlb_mem;
+	struct sbi_fifo *ipi_tlb_q;
+
+	if (cold_boot) {
+		ipi_tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*ipi_tlb_q),
+							    "IPI_TLB_FIFO");
+		if (!ipi_tlb_fifo_off)
+			return SBI_ENOMEM;
+		ipi_tlb_fifo_mem_off = sbi_scratch_alloc_offset(
+				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE,
+				"IPI_TLB_FIFO_MEM");
+		if (!ipi_tlb_fifo_mem_off) {
+			sbi_scratch_free_offset(ipi_tlb_fifo_off);
+			return SBI_ENOMEM;
+		}
+	} else {
+		if (!ipi_tlb_fifo_off ||
+		    !ipi_tlb_fifo_mem_off)
+			return SBI_ENOMEM;
+	}
+
+	ipi_tlb_q = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
+	ipi_tlb_mem = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_mem_off);
+
+	sbi_fifo_init(ipi_tlb_q, ipi_tlb_mem,
+		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
+
+	return 0;
+}

From a22c6891b718a155b2b8429be62760860b4d6109 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 21 May 2019 16:12:33 +0530
Subject: [PATCH 0257/1765] include: Make unprivilege load/store functions as
 non-inline functions

Currently, the unprivilege load/store functions are inline functions.

We will be extending these functions to track whether a page/access
fault occurs when we execute unprivilege load/store instruction.

To make things simpler and debugable, we reduce number of places which
can potentially generate a page/access fault by making all unprivilege
load/store functions as regular (non-inline) functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_unpriv.h | 122 ++++++-------------------------------
 lib/objects.mk             |   1 +
 lib/riscv_unpriv.c         | 114 ++++++++++++++++++++++++++++++++++
 3 files changed, 135 insertions(+), 102 deletions(-)
 create mode 100644 lib/riscv_unpriv.c

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index a2a585115eb..ed2dbccd213 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -10,109 +10,27 @@
 #ifndef __RISCV_UNPRIV_H__
 #define __RISCV_UNPRIV_H__
 
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_bits.h>
 #include <sbi/sbi_types.h>
 
-#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                        \
-	static inline type load_##type(const type *addr)                      \
-	{                                                                     \
-		register ulong __mstatus asm("a2");                           \
-		type val;                                                     \
-		asm("csrrs %0, " STR(CSR_MSTATUS) ", %3\n" #insn " %1, %2\n"  \
-						  "csrw " STR(                \
-							  CSR_MSTATUS) ", %0" \
-		    : "+&r"(__mstatus), "=&r"(val)                            \
-		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
-		return val;                                                   \
-	}
-
-#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                      \
-	static inline void store_##type(type *addr, type val)                \
-	{                                                                    \
-		register ulong __mstatus asm("a3");                          \
-		asm volatile(                                                \
-			"csrrs %0, " STR(                                    \
-				CSR_MSTATUS) ", %3\n" #insn " %1, %2\n"      \
-					     "csrw " STR(CSR_MSTATUS) ", %0" \
-			: "+&r"(__mstatus)                                   \
-			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));          \
-	}
-
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw)
-DECLARE_UNPRIVILEGED_STORE_FUNCTION(u8, sb)
-DECLARE_UNPRIVILEGED_STORE_FUNCTION(u16, sh)
-DECLARE_UNPRIVILEGED_STORE_FUNCTION(u32, sw)
-#if __riscv_xlen == 64
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld)
-DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64, sd)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
-#else
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
-DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
-
-static inline u64 load_u64(const u64 *addr)
-{
-	return load_u32((u32 *)addr) + ((u64)load_u32((u32 *)addr + 1) << 32);
-}
-
-static inline void store_u64(u64 *addr, u64 val)
-{
-	store_u32((u32 *)addr, val);
-	store_u32((u32 *)addr + 1, val >> 32);
-}
-#endif
-
-static inline ulong get_insn(ulong mepc, ulong *mstatus)
-{
-	register ulong __mepc asm("a2") = mepc;
-	register ulong __mstatus asm("a3");
-	ulong val;
-#ifndef __riscv_compressed
-	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
-#if __riscv_xlen == 64
-	    STR(LWU) " %[insn], (%[addr])\n"
-#else
-	    STR(LW) " %[insn], (%[addr])\n"
-#endif
-		     "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
-	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc));
-#else
-	ulong rvc_mask = 3, tmp;
-	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
-						  "and %[tmp], %[addr], 2\n"
-						  "bnez %[tmp], 1f\n"
-#if __riscv_xlen == 64
-	    STR(LWU) " %[insn], (%[addr])\n"
-#else
-	    STR(LW) " %[insn], (%[addr])\n"
-#endif
-		     "and %[tmp], %[insn], %[rvc_mask]\n"
-		     "beq %[tmp], %[rvc_mask], 2f\n"
-		     "sll %[insn], %[insn], %[xlen_minus_16]\n"
-		     "srl %[insn], %[insn], %[xlen_minus_16]\n"
-		     "j 2f\n"
-		     "1:\n"
-		     "lhu %[insn], (%[addr])\n"
-		     "and %[tmp], %[insn], %[rvc_mask]\n"
-		     "bne %[tmp], %[rvc_mask], 2f\n"
-		     "lhu %[tmp], 2(%[addr])\n"
-		     "sll %[tmp], %[tmp], 16\n"
-		     "add %[insn], %[insn], %[tmp]\n"
-		     "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
-	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc),
-	      [rvc_mask] "r"(rvc_mask), [xlen_minus_16] "i"(__riscv_xlen - 16));
-#endif
-	if (mstatus)
-		*mstatus = __mstatus;
-	return val;
-}
+#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type) \
+	type load_##type(const type *addr);
+
+#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type) \
+	void store_##type(type *addr, type val);
+
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s8)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s16)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(s32)
+DECLARE_UNPRIVILEGED_STORE_FUNCTION(u8)
+DECLARE_UNPRIVILEGED_STORE_FUNCTION(u16)
+DECLARE_UNPRIVILEGED_STORE_FUNCTION(u32)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u32)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
+DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
+DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
+
+ulong get_insn(ulong mepc, ulong *mstatus);
 
 #endif
diff --git a/lib/objects.mk b/lib/objects.mk
index 8eb860f9925..35a8bacf6d3 100644
--- a/lib/objects.mk
+++ b/lib/objects.mk
@@ -11,6 +11,7 @@ lib-objs-y += riscv_asm.o
 lib-objs-y += riscv_atomic.o
 lib-objs-y += riscv_hardfp.o
 lib-objs-y += riscv_locks.o
+lib-objs-y += riscv_unpriv.o
 
 lib-objs-y += sbi_console.o
 lib-objs-y += sbi_ecall.o
diff --git a/lib/riscv_unpriv.c b/lib/riscv_unpriv.c
new file mode 100644
index 00000000000..75d8f8340ab
--- /dev/null
+++ b/lib/riscv_unpriv.c
@@ -0,0 +1,114 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_unpriv.h>
+#include <sbi/sbi_bits.h>
+
+#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
+	type load_##type(const type *addr)                                    \
+	{                                                                     \
+		register ulong __mstatus asm("a2");                           \
+		type val;                                                     \
+		asm volatile(                                                 \
+			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			#insn " %1, %2\n"                                     \
+			"csrw " STR(CSR_MSTATUS) ", %0"                       \
+		    : "+&r"(__mstatus), "=&r"(val)                            \
+		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
+		return val;                                                   \
+	}
+
+#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
+	void store_##type(type *addr, type val)                               \
+	{                                                                     \
+		register ulong __mstatus asm("a3");                           \
+		asm volatile(                                                 \
+			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			#insn " %1, %2\n"                                     \
+			"csrw " STR(CSR_MSTATUS) ", %0"                       \
+			: "+&r"(__mstatus)                                    \
+			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));           \
+	}
+
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u8, sb)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u16, sh)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u32, sw)
+#if __riscv_xlen == 64
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
+#else
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
+
+u64 load_u64(const u64 *addr)
+{
+	return load_u32((u32 *)addr) + ((u64)load_u32((u32 *)addr + 1) << 32);
+}
+
+void store_u64(u64 *addr, u64 val)
+{
+	store_u32((u32 *)addr, val);
+	store_u32((u32 *)addr + 1, val >> 32);
+}
+#endif
+
+ulong get_insn(ulong mepc, ulong *mstatus)
+{
+	register ulong __mepc asm("a2") = mepc;
+	register ulong __mstatus asm("a3");
+	ulong val;
+#ifndef __riscv_compressed
+	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
+#if __riscv_xlen == 64
+	    STR(LWU) " %[insn], (%[addr])\n"
+#else
+	    STR(LW) " %[insn], (%[addr])\n"
+#endif
+		     "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc));
+#else
+	ulong rvc_mask = 3, tmp;
+	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
+						  "and %[tmp], %[addr], 2\n"
+						  "bnez %[tmp], 1f\n"
+#if __riscv_xlen == 64
+	    STR(LWU) " %[insn], (%[addr])\n"
+#else
+	    STR(LW) " %[insn], (%[addr])\n"
+#endif
+		     "and %[tmp], %[insn], %[rvc_mask]\n"
+		     "beq %[tmp], %[rvc_mask], 2f\n"
+		     "sll %[insn], %[insn], %[xlen_minus_16]\n"
+		     "srl %[insn], %[insn], %[xlen_minus_16]\n"
+		     "j 2f\n"
+		     "1:\n"
+		     "lhu %[insn], (%[addr])\n"
+		     "and %[tmp], %[insn], %[rvc_mask]\n"
+		     "bne %[tmp], %[rvc_mask], 2f\n"
+		     "lhu %[tmp], 2(%[addr])\n"
+		     "sll %[tmp], %[tmp], 16\n"
+		     "add %[insn], %[insn], %[tmp]\n"
+		     "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp)
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc),
+	      [rvc_mask] "r"(rvc_mask), [xlen_minus_16] "i"(__riscv_xlen - 16));
+#endif
+	if (mstatus)
+		*mstatus = __mstatus;
+	return val;
+}

From bb915780ac76b146f3de47f105a95359e02f158c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 21 May 2019 16:55:04 +0530
Subject: [PATCH 0258/1765] lib: Add per-HART trap info pointer

This patch adds per-HART trap info pointer which can be used to
communicate trap information to sbi_trap_handler().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  6 +++++-
 lib/sbi_hart.c         | 34 +++++++++++++++++++++++++++++++++-
 lib/sbi_init.c         |  4 ++--
 3 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index b282af9cb42..4aa4a5c62c2 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -14,7 +14,11 @@
 
 struct sbi_scratch;
 
-int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid);
+int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
+
+void *sbi_hart_get_trap_info(struct sbi_scratch *scratch);
+
+void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data);
 
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 
diff --git a/lib/sbi_hart.c b/lib/sbi_hart.c
index b35d4fa7efc..187b493760c 100644
--- a/lib/sbi_hart.c
+++ b/lib/sbi_hart.c
@@ -182,10 +182,19 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	return 0;
 }
 
-int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
+static unsigned long trap_info_offset;
+
+int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	int rc;
 
+	if (cold_boot) {
+		trap_info_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
+							    "HART_TRAP_INFO");
+		if (!trap_info_offset)
+			return SBI_ENOMEM;
+	}
+
 	mstatus_init(scratch, hartid);
 
 	rc = fp_init(hartid);
@@ -199,6 +208,29 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid)
 	return pmp_init(scratch, hartid);
 }
 
+void *sbi_hart_get_trap_info(struct sbi_scratch *scratch)
+{
+	unsigned long *trap_info;
+
+	if (!trap_info_offset)
+		return NULL;
+
+	trap_info = sbi_scratch_offset_ptr(scratch, trap_info_offset);
+
+	return (void *)(*trap_info);
+}
+
+void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data)
+{
+	unsigned long *trap_info;
+
+	if (!trap_info_offset)
+		return;
+
+	trap_info = sbi_scratch_offset_ptr(scratch, trap_info_offset);
+	*trap_info = (unsigned long)data;
+}
+
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
 	while (1)
diff --git a/lib/sbi_init.c b/lib/sbi_init.c
index 5c74b45d6a1..4f47a6c8adf 100644
--- a/lib/sbi_init.c
+++ b/lib/sbi_init.c
@@ -66,7 +66,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, hartid);
+	rc = sbi_hart_init(scratch, hartid, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -115,7 +115,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, hartid);
+	rc = sbi_hart_init(scratch, hartid, FALSE);
 	if (rc)
 		sbi_hart_hang();
 

From a6395acd6cb2c35871481d3e4f0beaf449f8c0fd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 23 May 2019 13:30:58 +0530
Subject: [PATCH 0259/1765] lib: Handle page/access fault caused by unpriv
 load/store

The unpriv load/store instruction from M-mode can cause page/access
fault to M-mode if S-mode page table did not have mappings OR it did
not have PMP access permission.

To tackle this, we redirect trap back to S-mode if unpriv load/store
instruction traps in M-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_unpriv.h | 20 ++++++++--
 include/sbi/sbi_error.h    |  1 +
 include/sbi/sbi_ipi.h      |  5 ++-
 lib/riscv_unpriv.c         | 79 ++++++++++++++++++++++++++------------
 lib/sbi_ecall.c            | 13 +++++--
 lib/sbi_ipi.c              | 11 ++++--
 lib/sbi_misaligned_ldst.c  | 24 ++++++++++--
 lib/sbi_system.c           |  2 +-
 lib/sbi_trap.c             | 20 +++++++++-
 9 files changed, 131 insertions(+), 44 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index ed2dbccd213..0fad27d5a6c 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -12,11 +12,23 @@
 
 #include <sbi/sbi_types.h>
 
-#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type) \
-	type load_##type(const type *addr);
+struct sbi_scratch;
 
-#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type) \
-	void store_##type(type *addr, type val);
+struct unpriv_trap {
+	unsigned long ilen;
+	unsigned long cause;
+	unsigned long tval;
+};
+
+#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type)       \
+	type load_##type(const type *addr,             \
+			 struct sbi_scratch *scratch,  \
+			 struct unpriv_trap *trap);
+
+#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type)      \
+	void store_##type(type *addr, type val,        \
+			  struct sbi_scratch *scratch, \
+			  struct unpriv_trap *trap);
 
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16)
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index db3d6ddce48..3ad78dbb991 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -25,6 +25,7 @@
 #define SBI_EILL	-10
 #define SBI_ENOSPC	-11
 #define SBI_ENOMEM	-12
+#define SBI_ETRAP	-13
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index b8afb5bbd6e..53468b28d67 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -10,6 +10,7 @@
 #ifndef __SBI_IPI_H__
 #define __SBI_IPI_H__
 
+#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_types.h>
 
 /* clang-format off */
@@ -28,8 +29,8 @@ struct sbi_ipi_data {
 	unsigned long ipi_type;
 };
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event,
-		      void *data);
+int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
+		      ulong *pmask, u32 event, void *data);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
diff --git a/lib/riscv_unpriv.c b/lib/riscv_unpriv.c
index 75d8f8340ab..aa353c0c647 100644
--- a/lib/riscv_unpriv.c
+++ b/lib/riscv_unpriv.c
@@ -10,59 +10,90 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_bits.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_scratch.h>
 
-#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
-	type load_##type(const type *addr)                                    \
+#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn, insnlen)                \
+	type load_##type(const type *addr,                                    \
+			struct sbi_scratch *scratch,                          \
+			struct unpriv_trap *trap)                             \
 	{                                                                     \
 		register ulong __mstatus asm("a2");                           \
-		type val;                                                     \
+		type val = 0;                                                 \
+		trap->ilen = insnlen;                                         \
+		trap->cause = 0;                                              \
+		trap->tval = 0;                                               \
+		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
 			#insn " %1, %2\n"                                     \
 			"csrw " STR(CSR_MSTATUS) ", %0"                       \
 		    : "+&r"(__mstatus), "=&r"(val)                            \
 		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
+		sbi_hart_set_trap_info(scratch, NULL);                        \
 		return val;                                                   \
 	}
 
-#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
-	void store_##type(type *addr, type val)                               \
+#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn, insnlen)               \
+	void store_##type(type *addr, type val,                               \
+			struct sbi_scratch *scratch,                          \
+			struct unpriv_trap *trap)                             \
 	{                                                                     \
 		register ulong __mstatus asm("a3");                           \
+		trap->ilen = insnlen;                                         \
+		trap->cause = 0;                                              \
+		trap->tval = 0;                                               \
+		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
 			#insn " %1, %2\n"                                     \
 			"csrw " STR(CSR_MSTATUS) ", %0"                       \
 			: "+&r"(__mstatus)                                    \
 			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));           \
+		sbi_hart_set_trap_info(scratch, NULL);                        \
 	}
 
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u8, sb)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u16, sh)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u32, sw)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu, 4)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu, 4)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb, 4)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh, 4)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw, 2)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u8, sb, 4)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u16, sh, 4)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u32, sw, 2)
 #if __riscv_xlen == 64
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu, 4)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld, 2)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd, 2)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld, 2)
 #else
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw, 2)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw, 2)
 
-u64 load_u64(const u64 *addr)
+u64 load_u64(const u64 *addr,
+	     struct sbi_scratch *scratch, struct unpriv_trap *trap)
 {
-	return load_u32((u32 *)addr) + ((u64)load_u32((u32 *)addr + 1) << 32);
+	u64 ret = load_u32((u32 *)addr, scratch, trap);
+
+	if (trap->cause)
+		return 0;
+	ret |= ((u64)load_u32((u32 *)addr + 1, scratch, trap) << 32);
+	if (trap->cause)
+		return 0;
+
+	return ret;
 }
 
-void store_u64(u64 *addr, u64 val)
+void store_u64(u64 *addr, u64 val,
+	       struct sbi_scratch *scratch, struct unpriv_trap *trap)
 {
-	store_u32((u32 *)addr, val);
-	store_u32((u32 *)addr + 1, val >> 32);
+	store_u32((u32 *)addr, val, scratch, trap);
+	if (trap->cause)
+		return;
+
+	store_u32((u32 *)addr + 1, val >> 32, scratch, trap);
+	if (trap->cause)
+		return;
 }
 #endif
 
diff --git a/lib/sbi_ecall.c b/lib/sbi_ecall.c
index a8ad40c7716..50c05d61a00 100644
--- a/lib/sbi_ecall.c
+++ b/lib/sbi_ecall.c
@@ -34,6 +34,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
 	int ret = SBI_ENOTSUPP;
+	struct unpriv_trap uptrap;
 	struct sbi_tlb_info tlb_info;
 
 	switch (regs->a7) {
@@ -59,11 +60,11 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		ret = 0;
 		break;
 	case SBI_ECALL_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_ECALL_REMOTE_FENCE_I:
-		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_FENCE_I, NULL);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
@@ -71,7 +72,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		tlb_info.size  = (unsigned long)regs->a2;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 
-		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
@@ -80,7 +81,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		tlb_info.asid  = (unsigned long)regs->a3;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 
-		ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA_ASID,
 					&tlb_info);
 		break;
@@ -96,6 +97,10 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 
 	if (!ret) {
 		regs->mepc += 4;
+	} else if (ret == SBI_ETRAP) {
+		ret = 0;
+		sbi_trap_redirect(regs, scratch, regs->mepc,
+				  uptrap.cause, uptrap.tval);
 	}
 
 	return ret;
diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c
index da6b06d0957..48d5b220360 100644
--- a/lib/sbi_ipi.c
+++ b/lib/sbi_ipi.c
@@ -58,15 +58,18 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	return 0;
 }
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong *pmask, u32 event,
-		      void *data)
+int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
+		      ulong *pmask, u32 event, void *data)
 {
 	ulong i, m;
 	ulong mask = sbi_hart_available_mask();
 	u32 hartid = sbi_current_hartid();
 
-	if (pmask)
-		mask &= load_ulong(pmask);
+	if (pmask) {
+		mask &= load_ulong(pmask, scratch, uptrap);
+		if (uptrap->cause)
+			return SBI_ETRAP;
+	}
 
 	/* send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c
index e93464f7d7a..7f911c38c39 100644
--- a/lib/sbi_misaligned_ldst.c
+++ b/lib/sbi_misaligned_ldst.c
@@ -26,6 +26,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 				struct sbi_scratch *scratch)
 {
 	union reg_data val;
+	struct unpriv_trap uptrap;
 	ulong insn = get_insn(regs->mepc, NULL);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
@@ -91,8 +92,15 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		return SBI_EILL;
 
 	val.data_u64 = 0;
-	for (i = 0; i < len; i++)
-		val.data_bytes[i] = load_u8((void *)(addr + i));
+	for (i = 0; i < len; i++) {
+		val.data_bytes[i] = load_u8((void *)(addr + i),
+					    scratch, &uptrap);
+		if (uptrap.cause) {
+			sbi_trap_redirect(regs, scratch, regs->mepc,
+					  uptrap.cause, uptrap.tval);
+			return 0;
+		}
+	}
 
 	if (!fp)
 		SET_RD(insn, regs, val.data_ulong << shift >> shift);
@@ -111,6 +119,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 				 struct sbi_scratch *scratch)
 {
 	union reg_data val;
+	struct unpriv_trap uptrap;
 	ulong insn = get_insn(regs->mepc, NULL);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
@@ -166,8 +175,15 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	} else
 		return SBI_EILL;
 
-	for (i = 0; i < len; i++)
-		store_u8((void *)(addr + i), val.data_bytes[i]);
+	for (i = 0; i < len; i++) {
+		store_u8((void *)(addr + i), val.data_bytes[i],
+			 scratch, &uptrap);
+		if (uptrap.cause) {
+			sbi_trap_redirect(regs, scratch, regs->mepc,
+					  uptrap.cause, uptrap.tval);
+			return 0;
+		}
+	}
 
 	regs->mepc += INSN_LEN(insn);
 
diff --git a/lib/sbi_system.c b/lib/sbi_system.c
index 3381d40c419..2cb30d4db2a 100644
--- a/lib/sbi_system.c
+++ b/lib/sbi_system.c
@@ -39,7 +39,7 @@ sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 
 	/* If that fails (or is not implemented) send an IPI on every
 	 * hart to hang and then hang the current hart */
-	sbi_ipi_send_many(scratch, NULL, SBI_IPI_EVENT_HALT, NULL);
+	sbi_ipi_send_many(scratch, NULL, NULL, SBI_IPI_EVENT_HALT, NULL);
 
 	sbi_hart_hang();
 }
diff --git a/lib/sbi_trap.c b/lib/sbi_trap.c
index 4a448e5f542..82f7b652431 100644
--- a/lib/sbi_trap.c
+++ b/lib/sbi_trap.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>
@@ -134,11 +135,12 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
  */
 void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 {
-	int rc		= SBI_ENOTSUPP;
+	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
 	ulong mtval = csr_read(CSR_MTVAL);
+	struct unpriv_trap *uptrap;
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		mcause &= ~(1UL << (__riscv_xlen - 1));
@@ -175,6 +177,22 @@ void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 		rc  = sbi_ecall_handler(hartid, mcause, regs, scratch);
 		msg = "ecall handler failed";
 		break;
+	case CAUSE_LOAD_ACCESS:
+	case CAUSE_STORE_ACCESS:
+	case CAUSE_LOAD_PAGE_FAULT:
+	case CAUSE_STORE_PAGE_FAULT:
+		uptrap = sbi_hart_get_trap_info(scratch);
+		if ((regs->mstatus & MSTATUS_MPRV) && uptrap) {
+			rc = 0;
+			regs->mepc += uptrap->ilen;
+			uptrap->cause = mcause;
+			uptrap->tval = mtval;
+		} else {
+			rc = sbi_trap_redirect(regs, scratch, regs->mepc,
+					       mcause, mtval);
+		}
+		msg = "page/access fault handler failed";
+		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		rc = sbi_trap_redirect(regs, scratch, regs->mepc, mcause, mtval);

From 2b80945ac7e64b90a9d28e05f59341f88db16030 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 17 May 2019 08:49:01 -0700
Subject: [PATCH 0260/1765] platform: qemu/sifive_u: Update the hart count to 4

Since QEMU commit 8b1d0714bfdd
"riscv: sifive_u: Allow up to 4 CPUs to be created",
the maximum number of hart for sifive_u is 4.

Change our hart count to match that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/qemu/sifive_u/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 1dca2a144d9..470da3596d4 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -17,7 +17,7 @@
 
 /* clang-format off */
 
-#define SIFIVE_U_HART_COUNT			1
+#define SIFIVE_U_HART_COUNT			4
 #define SIFIVE_U_HART_STACK_SIZE		8192
 
 #define SIFIVE_U_SYS_CLK			1000000000

From b6ea152df25016470f27a05af58e4fabef3c7e40 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 17 May 2019 08:49:02 -0700
Subject: [PATCH 0261/1765] docs: qemu/sifive_u: miscellaneous documentation
 fixes

- OpenSBI build target should be: qemu/sifive_u
- U-Boot config name should be: sifive_fu540_defconfig

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/qemu_sifive_u.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
index b3f73d6368a..360f58d6691 100644
--- a/docs/platform/qemu_sifive_u.md
+++ b/docs/platform/qemu_sifive_u.md
@@ -20,7 +20,7 @@ Executing on QEMU RISC-V 64bit
 
 Build:
 ```
-make PLATFORM=qemu/virt
+make PLATFORM=qemu/sifive_u
 ```
 
 Run:
@@ -32,11 +32,11 @@ qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
 **U-Boot as a Payload**
 
 Note: the command line examples here assume that U-Boot was compiled using
-the `qemu-riscv64_smode_defconfig` configuration.
+the `sifive_fu540_defconfig` configuration.
 
 Build:
 ```
-make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+make PLATFORM=qemu/sifive_u FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 ```
 
 Run:

From f19611e1e4918ca19d0278f7494965c3083fd8d0 Mon Sep 17 00:00:00 2001
From: Karsten Merker <merker@debian.org>
Date: Thu, 30 May 2019 20:31:59 +0200
Subject: [PATCH 0262/1765] docs: update CONTRIBUTORS.md

Add Andreas Schwab to the contributors list.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Andreas Schwab <schwab@suse.de>
---
 CONTRIBUTORS.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md
index 7fe542d9079..afae1251d00 100644
--- a/CONTRIBUTORS.md
+++ b/CONTRIBUTORS.md
@@ -8,6 +8,8 @@ List of OpenSBI Contributors (Alphabetically sorted)
 
 * Alistair Francis <alistair@alistair23.me>
 
+* Andreas Schwab <schwab@suse.de>
+
 * Anup Patel <anup.patel@wdc.com>
 
 * Atish Patra <atish.patra@wdc.com>

From 6fec1c7e1118add3aa16707914ada8adca09bf1b Mon Sep 17 00:00:00 2001
From: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Date: Tue, 11 Jun 2019 13:11:48 +0200
Subject: [PATCH 0263/1765] firmware: add missing linker sections to
 fw_base.ldS

The linker sections .sdata and .sbss are missing from the linker script
fw_base.ldS. Add them to the .data and .bss sections.

On current builds, most variables are in the .sbss section. They are not
correctly initialized to zero, because they are not within the
boundaries indicated by _bss_start and _bss_end. Currently, this does
not cause any issues, however with relocation support lock-ups may occur
due to incorrectly initialized lock variables.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.ldS | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 84d3758dae6..0ac75f200e6 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -50,6 +50,8 @@
 	{
 		PROVIDE(_data_start = .);
 
+		*(.sdata)
+		*(.sdata.*)
 		*(.data)
 		*(.data.*)
 		*(.readmostly.data)
@@ -64,6 +66,8 @@
 	.bss :
 	{
 		PROVIDE(_bss_start = .);
+		*(.sbss)
+		*(.sbss.*)
 		*(.bss)
 		*(.bss.*)
 		. = ALIGN(8);

From 331f291e4cff8f0b7b35edded21132c2fa69fb97 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 7 Jun 2019 20:26:55 +0530
Subject: [PATCH 0264/1765] firmware: Relocate when load address is not equal
 to link address

This patch extends fw_base to relocate to link address whenever
firmware load address is not equal to link address.

The relocation will not work when load start to load end overlap
link start to link end.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
---
 firmware/fw_base.S          | 53 ++++++++++++++++++++++++++++++++-----
 firmware/fw_dynamic.elf.ldS |  2 ++
 firmware/fw_jump.elf.ldS    |  2 ++
 firmware/fw_payload.elf.ldS |  2 ++
 4 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 0d7cf69ae3e..1a3c7609355 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -39,6 +39,33 @@ _start:
 	csrr	a6, CSR_MHARTID
 	blt	zero, a6, _wait_for_boot_hart
 
+	/* Save load address */
+	la	t0, _load_start
+	la	t1, _start
+	REG_S	t1, 0(t0)
+
+	/* Relocate if load address != link address */
+	la	t0, _link_start
+	REG_L	t0, 0(t0)
+	la	t1, _link_end
+	REG_L	t1, 0(t1)
+	la	t2, _load_start
+	REG_L	t2, 0(t2)
+	beq	t0, t2, _relocate_done
+	la	t4, _relocate_done
+	sub	t4, t4, t2
+	add	t4, t4, t0
+_relocate_copy:
+	REG_L	t3, 0(t2)
+	REG_S	t3, 0(t0)
+	add	t0, t0, __SIZEOF_POINTER__
+	add	t2, t2, __SIZEOF_POINTER__
+	blt	t0, t1, _relocate_copy
+	jr	t4
+_relocate_done:
+
+	/* At this point we are running from link address */
+
 	/* Reset all registers for boot HART */
 	li	ra, 0
 	call	_reset_regs
@@ -209,18 +236,29 @@ _fdt_reloc_done:
 
 	/* Update boot hart flag */
 	la	a4, _boot_hart_done
-	li	a5, 1
+	la	a5, _start_warm
 	REG_S	a5, (a4)
+	fence	rw, rw
+	la	t0, _link_start
+	REG_L	t0, 0(t0)
+	sub	a4, a4, t0
+	la	t0, _load_start
+	REG_L	t0, 0(t0)
+	add	a4, a4, t0
+	REG_S	a5, (a4)
+	fence	rw, rw
+	j	_start_warm
 
 	/* Wait for boot hart */
 _wait_for_boot_hart:
 	la	a4, _boot_hart_done
-	REG_L	a5, (a4)
+	REG_L	a5, 0(a4)
 	/* Reduce the bus traffic so that boot hart may proceed faster */
 	nop
 	nop
 	nop
 	beqz	a5, _wait_for_boot_hart
+	jr	a5
 
 _start_warm:
 	/* Reset all registers for non-boot HARTs */
@@ -263,11 +301,9 @@ _start_warm:
 	la	a4, _trap_handler
 	csrw	CSR_MTVEC, a4
 	/* Make sure that mtvec is updated */
-	1:
-	csrr	a5, CSR_MTVEC
+1:	csrr	a5, CSR_MTVEC
 	bne	a4, a5, 1b
 
-
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH
 	call	sbi_init
@@ -276,9 +312,14 @@ _start_warm:
 	j	_start_hang
 
 	.align 3
-	.section .data, "aw"
 _boot_hart_done:
 	RISCV_PTR	0
+_load_start:
+	RISCV_PTR	_fw_start
+_link_start:
+	RISCV_PTR	_fw_start
+_link_end:
+	RISCV_PTR	_fw_reloc_end
 
 	.align 3
 	.section .entry, "ax", %progbits
diff --git a/firmware/fw_dynamic.elf.ldS b/firmware/fw_dynamic.elf.ldS
index 7ee078708c3..d1e2ea89e29 100644
--- a/firmware/fw_dynamic.elf.ldS
+++ b/firmware/fw_dynamic.elf.ldS
@@ -13,4 +13,6 @@ ENTRY(_start)
 SECTIONS
 {
 	#include "fw_base.ldS"
+
+	PROVIDE(_fw_reloc_end = .);
 }
diff --git a/firmware/fw_jump.elf.ldS b/firmware/fw_jump.elf.ldS
index 7ee078708c3..d1e2ea89e29 100644
--- a/firmware/fw_jump.elf.ldS
+++ b/firmware/fw_jump.elf.ldS
@@ -13,4 +13,6 @@ ENTRY(_start)
 SECTIONS
 {
 	#include "fw_base.ldS"
+
+	PROVIDE(_fw_reloc_end = .);
 }
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index 44fa4c3ff70..f1a544b80dc 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -27,4 +27,6 @@ SECTIONS
 		. = ALIGN(8);
 		PROVIDE(_payload_end = .);
 	}
+
+	PROVIDE(_fw_reloc_end = .);
 }

From a5b37bd7d275fc65d8fd0b19bd3a08edfe4e6096 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 13 Jun 2019 12:53:12 +0530
Subject: [PATCH 0265/1765] firmware: Handle overlapping load and link
 addresses in relocation

This patch extends relocation to handle overlapping load and link
addresses.

The updated relocation will work fine in most cases except when the
relocate copy loop itself falls in overlapping load and link addresses.

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 44 ++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 42 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 1a3c7609355..6270bbc1f08 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -27,6 +27,17 @@
 	add	\__d4, \__s4, zero
 .endm
 
+/*
+ * If __start_reg <= __check_reg and __check_reg < __end_reg then
+ *   jump to __pass
+ */
+.macro BRANGE __start_reg, __end_reg, __check_reg, __jump_lable
+	blt	\__check_reg, \__start_reg, 999f
+	bge	\__check_reg, \__end_reg, 999f
+	j	\__jump_lable
+999:
+.endm
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.globl _start
@@ -45,22 +56,51 @@ _start:
 	REG_S	t1, 0(t0)
 
 	/* Relocate if load address != link address */
+_relocate:
 	la	t0, _link_start
 	REG_L	t0, 0(t0)
 	la	t1, _link_end
 	REG_L	t1, 0(t1)
 	la	t2, _load_start
 	REG_L	t2, 0(t2)
+	sub	t3, t1, t0
+	add	t3, t3, t2
 	beq	t0, t2, _relocate_done
 	la	t4, _relocate_done
 	sub	t4, t4, t2
 	add	t4, t4, t0
-_relocate_copy:
+	blt	t2, t0, _relocate_copy_to_upper
+_relocate_copy_to_lower:
+	ble	t1, t2, _relocate_copy_to_lower_loop
+	la	t3, _boot_hart_done
+	BRANGE	t2, t1, t3, _start_hang
+	la	t3, _relocate
+	la	t5, _relocate_done
+	BRANGE	t2, t1, t3, _start_hang
+	BRANGE	t2, t1, t5, _start_hang
+	BRANGE  t3, t5, t2, _start_hang
+_relocate_copy_to_lower_loop:
 	REG_L	t3, 0(t2)
 	REG_S	t3, 0(t0)
 	add	t0, t0, __SIZEOF_POINTER__
 	add	t2, t2, __SIZEOF_POINTER__
-	blt	t0, t1, _relocate_copy
+	blt	t0, t1, _relocate_copy_to_lower_loop
+	jr	t4
+_relocate_copy_to_upper:
+	ble	t3, t0, _relocate_copy_to_upper_loop
+	la	t2, _boot_hart_done
+	BRANGE	t0, t3, t2, _start_hang
+	la	t2, _relocate
+	la	t5, _relocate_done
+	BRANGE	t0, t3, t2, _start_hang
+	BRANGE	t0, t3, t5, _start_hang
+	BRANGE	t2, t5, t0, _start_hang
+_relocate_copy_to_upper_loop:
+	add	t3, t3, -__SIZEOF_POINTER__
+	add	t1, t1, -__SIZEOF_POINTER__
+	REG_L	t2, 0(t3)
+	REG_S	t2, 0(t1)
+	blt	t0, t1, _relocate_copy_to_upper_loop
 	jr	t4
 _relocate_done:
 

From 749b0b093242a4c27f7c4f66121afd7852b2de48 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:01 -0700
Subject: [PATCH 0266/1765] lib: Move sbi core library to lib/sbi

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                            | 14 ++++++-------
 lib/objects.mk                      | 32 -----------------------------
 lib/sbi/objects.mk                  | 32 +++++++++++++++++++++++++++++
 lib/{ => sbi}/riscv_asm.c           |  0
 lib/{ => sbi}/riscv_atomic.c        |  0
 lib/{ => sbi}/riscv_hardfp.S        |  0
 lib/{ => sbi}/riscv_locks.c         |  0
 lib/{ => sbi}/riscv_unpriv.c        |  0
 lib/{ => sbi}/sbi_console.c         |  0
 lib/{ => sbi}/sbi_ecall.c           |  0
 lib/{ => sbi}/sbi_emulate_csr.c     |  0
 lib/{ => sbi}/sbi_fifo.c            |  0
 lib/{ => sbi}/sbi_hart.c            |  0
 lib/{ => sbi}/sbi_illegal_insn.c    |  0
 lib/{ => sbi}/sbi_init.c            |  0
 lib/{ => sbi}/sbi_ipi.c             |  0
 lib/{ => sbi}/sbi_misaligned_ldst.c |  0
 lib/{ => sbi}/sbi_scratch.c         |  0
 lib/{ => sbi}/sbi_system.c          |  0
 lib/{ => sbi}/sbi_timer.c           |  0
 lib/{ => sbi}/sbi_tlb.c             |  0
 lib/{ => sbi}/sbi_trap.c            |  0
 22 files changed, 39 insertions(+), 39 deletions(-)
 delete mode 100644 lib/objects.mk
 create mode 100644 lib/sbi/objects.mk
 rename lib/{ => sbi}/riscv_asm.c (100%)
 rename lib/{ => sbi}/riscv_atomic.c (100%)
 rename lib/{ => sbi}/riscv_hardfp.S (100%)
 rename lib/{ => sbi}/riscv_locks.c (100%)
 rename lib/{ => sbi}/riscv_unpriv.c (100%)
 rename lib/{ => sbi}/sbi_console.c (100%)
 rename lib/{ => sbi}/sbi_ecall.c (100%)
 rename lib/{ => sbi}/sbi_emulate_csr.c (100%)
 rename lib/{ => sbi}/sbi_fifo.c (100%)
 rename lib/{ => sbi}/sbi_hart.c (100%)
 rename lib/{ => sbi}/sbi_illegal_insn.c (100%)
 rename lib/{ => sbi}/sbi_init.c (100%)
 rename lib/{ => sbi}/sbi_ipi.c (100%)
 rename lib/{ => sbi}/sbi_misaligned_ldst.c (100%)
 rename lib/{ => sbi}/sbi_scratch.c (100%)
 rename lib/{ => sbi}/sbi_system.c (100%)
 rename lib/{ => sbi}/sbi_timer.c (100%)
 rename lib/{ => sbi}/sbi_tlb.c (100%)
 rename lib/{ => sbi}/sbi_trap.c (100%)

diff --git a/Makefile b/Makefile
index a62eb0ef0f8..38f18d84eeb 100644
--- a/Makefile
+++ b/Makefile
@@ -59,7 +59,7 @@ export platform_src_dir=$(platform_parent_dir)/$(platform_subdir)
 export platform_build_dir=$(build_dir)/platform/$(platform_subdir)
 export platform_common_src_dir=$(src_dir)/platform/common
 export include_dir=$(CURDIR)/include
-export lib_dir=$(CURDIR)/lib
+export libsbi_dir=$(CURDIR)/lib/sbi
 export firmware_dir=$(CURDIR)/firmware
 
 # Find library version
@@ -100,7 +100,7 @@ ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
 platform-common-object-mks=$(shell if [ -d $(platform_common_src_dir) ]; then find $(platform_common_src_dir) -iname "objects.mk" | sort -r; fi)
 endif
-lib-object-mks=$(shell if [ -d $(lib_dir) ]; then find $(lib_dir) -iname "objects.mk" | sort -r; fi)
+libsbi-object-mks=$(shell if [ -d $(libsbi_dir) ]; then find $(libsbi_dir) -iname "objects.mk" | sort -r; fi)
 firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
 # Include platform specifig config.mk
@@ -113,11 +113,11 @@ ifdef PLATFORM
 include $(platform-object-mks)
 include $(platform-common-object-mks)
 endif
-include $(lib-object-mks)
+include $(libsbi-object-mks)
 include $(firmware-object-mks)
 
 # Setup list of objects
-lib-objs-path-y=$(foreach obj,$(lib-objs-y),$(build_dir)/lib/$(obj))
+libsbi-objs-path-y=$(foreach obj,$(libsbi-objs-y),$(build_dir)/lib/sbi/$(obj))
 ifdef PLATFORM
 platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(platform_build_dir)/$(obj))
 platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(platform_build_dir)/$(obj))
@@ -130,7 +130,7 @@ firmware-objs-path-y=$(firmware-bins-path-y:.bin=.o)
 # Setup list of deps files for objects
 deps-y=$(platform-objs-path-y:.o=.dep)
 deps-y+=$(platform-common-objs-path-y:.o=.dep)
-deps-y+=$(lib-objs-path-y:.o=.dep)
+deps-y+=$(libsbi-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup platform ABI, ISA and Code Model
@@ -276,10 +276,10 @@ $(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(platform_build_dir)
 $(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 
-$(build_dir)/lib/libsbi.a: $(lib-objs-path-y)
+$(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(platform_build_dir)/lib/libplatsbi.a: $(lib-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
+$(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
 $(build_dir)/%.dep: $(src_dir)/%.c
diff --git a/lib/objects.mk b/lib/objects.mk
deleted file mode 100644
index 35a8bacf6d3..00000000000
--- a/lib/objects.mk
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-lib-objs-y += riscv_asm.o
-lib-objs-y += riscv_atomic.o
-lib-objs-y += riscv_hardfp.o
-lib-objs-y += riscv_locks.o
-lib-objs-y += riscv_unpriv.o
-
-lib-objs-y += sbi_console.o
-lib-objs-y += sbi_ecall.o
-lib-objs-y += sbi_emulate_csr.o
-lib-objs-y += sbi_fifo.o
-lib-objs-y += sbi_hart.o
-lib-objs-y += sbi_illegal_insn.o
-lib-objs-y += sbi_init.o
-lib-objs-y += sbi_ipi.o
-lib-objs-y += sbi_misaligned_ldst.o
-lib-objs-y += sbi_scratch.o
-lib-objs-y += sbi_system.o
-lib-objs-y += sbi_timer.o
-lib-objs-y += sbi_tlb.o
-lib-objs-y += sbi_trap.o
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBC=y
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
new file mode 100644
index 00000000000..817e8059e50
--- /dev/null
+++ b/lib/sbi/objects.mk
@@ -0,0 +1,32 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+libsbi-objs-y += riscv_asm.o
+libsbi-objs-y += riscv_atomic.o
+libsbi-objs-y += riscv_hardfp.o
+libsbi-objs-y += riscv_locks.o
+libsbi-objs-y += riscv_unpriv.o
+
+libsbi-objs-y += sbi_console.o
+libsbi-objs-y += sbi_ecall.o
+libsbi-objs-y += sbi_emulate_csr.o
+libsbi-objs-y += sbi_fifo.o
+libsbi-objs-y += sbi_hart.o
+libsbi-objs-y += sbi_illegal_insn.o
+libsbi-objs-y += sbi_init.o
+libsbi-objs-y += sbi_ipi.o
+libsbi-objs-y += sbi_misaligned_ldst.o
+libsbi-objs-y += sbi_scratch.o
+libsbi-objs-y += sbi_system.o
+libsbi-objs-y += sbi_timer.o
+libsbi-objs-y += sbi_tlb.o
+libsbi-objs-y += sbi_trap.o
+
+# External Libraries to include
+PLATFORM_INCLUDE_LIBC=y
diff --git a/lib/riscv_asm.c b/lib/sbi/riscv_asm.c
similarity index 100%
rename from lib/riscv_asm.c
rename to lib/sbi/riscv_asm.c
diff --git a/lib/riscv_atomic.c b/lib/sbi/riscv_atomic.c
similarity index 100%
rename from lib/riscv_atomic.c
rename to lib/sbi/riscv_atomic.c
diff --git a/lib/riscv_hardfp.S b/lib/sbi/riscv_hardfp.S
similarity index 100%
rename from lib/riscv_hardfp.S
rename to lib/sbi/riscv_hardfp.S
diff --git a/lib/riscv_locks.c b/lib/sbi/riscv_locks.c
similarity index 100%
rename from lib/riscv_locks.c
rename to lib/sbi/riscv_locks.c
diff --git a/lib/riscv_unpriv.c b/lib/sbi/riscv_unpriv.c
similarity index 100%
rename from lib/riscv_unpriv.c
rename to lib/sbi/riscv_unpriv.c
diff --git a/lib/sbi_console.c b/lib/sbi/sbi_console.c
similarity index 100%
rename from lib/sbi_console.c
rename to lib/sbi/sbi_console.c
diff --git a/lib/sbi_ecall.c b/lib/sbi/sbi_ecall.c
similarity index 100%
rename from lib/sbi_ecall.c
rename to lib/sbi/sbi_ecall.c
diff --git a/lib/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
similarity index 100%
rename from lib/sbi_emulate_csr.c
rename to lib/sbi/sbi_emulate_csr.c
diff --git a/lib/sbi_fifo.c b/lib/sbi/sbi_fifo.c
similarity index 100%
rename from lib/sbi_fifo.c
rename to lib/sbi/sbi_fifo.c
diff --git a/lib/sbi_hart.c b/lib/sbi/sbi_hart.c
similarity index 100%
rename from lib/sbi_hart.c
rename to lib/sbi/sbi_hart.c
diff --git a/lib/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
similarity index 100%
rename from lib/sbi_illegal_insn.c
rename to lib/sbi/sbi_illegal_insn.c
diff --git a/lib/sbi_init.c b/lib/sbi/sbi_init.c
similarity index 100%
rename from lib/sbi_init.c
rename to lib/sbi/sbi_init.c
diff --git a/lib/sbi_ipi.c b/lib/sbi/sbi_ipi.c
similarity index 100%
rename from lib/sbi_ipi.c
rename to lib/sbi/sbi_ipi.c
diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
similarity index 100%
rename from lib/sbi_misaligned_ldst.c
rename to lib/sbi/sbi_misaligned_ldst.c
diff --git a/lib/sbi_scratch.c b/lib/sbi/sbi_scratch.c
similarity index 100%
rename from lib/sbi_scratch.c
rename to lib/sbi/sbi_scratch.c
diff --git a/lib/sbi_system.c b/lib/sbi/sbi_system.c
similarity index 100%
rename from lib/sbi_system.c
rename to lib/sbi/sbi_system.c
diff --git a/lib/sbi_timer.c b/lib/sbi/sbi_timer.c
similarity index 100%
rename from lib/sbi_timer.c
rename to lib/sbi/sbi_timer.c
diff --git a/lib/sbi_tlb.c b/lib/sbi/sbi_tlb.c
similarity index 100%
rename from lib/sbi_tlb.c
rename to lib/sbi/sbi_tlb.c
diff --git a/lib/sbi_trap.c b/lib/sbi/sbi_trap.c
similarity index 100%
rename from lib/sbi_trap.c
rename to lib/sbi/sbi_trap.c

From 98aaf8317b74414afa78078bc056670f46c45f41 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:02 -0700
Subject: [PATCH 0267/1765] lib: Include helper libc functions directly in
 libsbi.

libsbi needs some of the custom libc functions. It should be directly
included in libsbi instead of platform specific libraries.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 {platform/common/include/plat => include/sbi}/string.h | 0
 {platform/common => lib/sbi}/libc/objects.mk           | 4 ++--
 {platform/common => lib/sbi}/libc/string.c             | 2 +-
 lib/sbi/objects.mk                                     | 3 ---
 lib/sbi/sbi_fifo.c                                     | 2 +-
 lib/sbi/sbi_ipi.c                                      | 2 +-
 lib/sbi/sbi_tlb.c                                      | 2 +-
 platform/common/irqchip/plic.c                         | 2 +-
 platform/common/libfdt/libfdt_env.h                    | 2 +-
 platform/common/tinyfdt.c                              | 2 +-
 10 files changed, 9 insertions(+), 12 deletions(-)
 rename {platform/common/include/plat => include/sbi}/string.h (100%)
 rename {platform/common => lib/sbi}/libc/objects.mk (62%)
 rename {platform/common => lib/sbi}/libc/string.c (99%)

diff --git a/platform/common/include/plat/string.h b/include/sbi/string.h
similarity index 100%
rename from platform/common/include/plat/string.h
rename to include/sbi/string.h
diff --git a/platform/common/libc/objects.mk b/lib/sbi/libc/objects.mk
similarity index 62%
rename from platform/common/libc/objects.mk
rename to lib/sbi/libc/objects.mk
index 1dcfe8e8d0d..7a6ebbea964 100644
--- a/platform/common/libc/objects.mk
+++ b/lib/sbi/libc/objects.mk
@@ -10,6 +10,6 @@
 libc_files = string.o
 
 $(foreach file, $(libc_files), \
-	$(eval CFLAGS_$(file) = -I$(src)/../../common/libc))
+	$(eval CFLAGS_$(file) = -I$(src)/../../sbi/libc))
 
-platform-common-objs-$(PLATFORM_INCLUDE_LIBC) += $(addprefix libc/,$(libc_files))
+libsbi-objs-y += $(addprefix libc/,$(libc_files))
diff --git a/platform/common/libc/string.c b/lib/sbi/libc/string.c
similarity index 99%
rename from platform/common/libc/string.c
rename to lib/sbi/libc/string.c
index 6e273d02435..b5743fe1e0f 100644
--- a/platform/common/libc/string.c
+++ b/lib/sbi/libc/string.c
@@ -12,7 +12,7 @@
  * bugs as well. Use any optimized routines from newlib or glibc if required.
  */
 
-#include <plat/string.h>
+#include <sbi/string.h>
 
 int strcmp(const char *a, const char *b)
 {
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 817e8059e50..d0fd85684dc 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -27,6 +27,3 @@ libsbi-objs-y += sbi_system.o
 libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBC=y
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index a92b46cc776..e823d2a60fb 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -10,7 +10,7 @@
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
-#include <plat/string.h>
+#include <sbi/string.h>
 
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 		   u16 entry_size)
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 48d5b220360..19da029a250 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -19,7 +19,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
-#include <plat/string.h>
+#include <sbi/string.h>
 
 static unsigned long ipi_data_off;
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 814d402c824..1031df308b1 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -16,7 +16,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
-#include <plat/string.h>
+#include <sbi/string.h>
 
 static unsigned long ipi_tlb_fifo_off;
 static unsigned long ipi_tlb_fifo_mem_off;
diff --git a/platform/common/irqchip/plic.c b/platform/common/irqchip/plic.c
index 90a7820e152..e3cdb170157 100644
--- a/platform/common/irqchip/plic.c
+++ b/platform/common/irqchip/plic.c
@@ -10,7 +10,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
-#include <plat/string.h>
+#include <sbi/string.h>
 #include <plat/tinyfdt.h>
 #include <plat/irqchip/plic.h>
 
diff --git a/platform/common/libfdt/libfdt_env.h b/platform/common/libfdt/libfdt_env.h
index 2428fd5246d..adcd315623a 100644
--- a/platform/common/libfdt/libfdt_env.h
+++ b/platform/common/libfdt/libfdt_env.h
@@ -52,7 +52,7 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <plat/string.h>
+#include <sbi/string.h>
 #include <sbi/sbi_types.h>
 
 #define INT_MAX		((int)(~0U >> 1))
diff --git a/platform/common/tinyfdt.c b/platform/common/tinyfdt.c
index e62a80990f5..73dd13154af 100644
--- a/platform/common/tinyfdt.c
+++ b/platform/common/tinyfdt.c
@@ -7,7 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <plat/string.h>
+#include <sbi/string.h>
 #include <plat/tinyfdt.h>
 
 #define FDT_MAGIC 0xd00dfeed

From 793e5e1184f04012804914bd922e68536f3b68dd Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:03 -0700
Subject: [PATCH 0268/1765] platform: Move platform common to lib/utils.

Currently, platform/common contains platform/non-platform specific
common minimal drivers and libraries. This is helpful is all platforms
are built within opensbi framework.

Move them to lib/utils so that any external platform code also can
reuse the minimalistic drivers or other common libraries.

This patch doesn't introduce any functional changes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                                      | 29 ++++++++++++-------
 .../plat => include/sbi_utils}/irqchip/plic.h |  0
 .../sbi_utils}/serial/sifive-uart.h           |  0
 .../sbi_utils}/serial/uart8250.h              |  0
 .../plat => include/sbi_utils}/sys/clint.h    |  0
 .../plat => include/sbi_utils}/tinyfdt.h      |  0
 .../common => lib/utils}/irqchip/objects.mk   |  2 +-
 {platform/common => lib/utils}/irqchip/plic.c |  4 +--
 .../common => lib/utils}/libfdt/.clang-format |  0
 .../utils}/libfdt/Makefile.libfdt             |  0
 {platform/common => lib/utils}/libfdt/TODO    |  0
 {platform/common => lib/utils}/libfdt/fdt.c   |  0
 {platform/common => lib/utils}/libfdt/fdt.h   |  0
 .../utils}/libfdt/fdt_addresses.c             |  0
 .../utils}/libfdt/fdt_empty_tree.c            |  0
 .../common => lib/utils}/libfdt/fdt_overlay.c |  0
 .../common => lib/utils}/libfdt/fdt_ro.c      |  0
 .../common => lib/utils}/libfdt/fdt_rw.c      |  0
 .../utils}/libfdt/fdt_strerror.c              |  0
 .../common => lib/utils}/libfdt/fdt_sw.c      |  0
 .../common => lib/utils}/libfdt/fdt_wip.c     |  0
 .../common => lib/utils}/libfdt/libfdt.h      |  0
 .../common => lib/utils}/libfdt/libfdt_env.h  |  2 --
 .../utils}/libfdt/libfdt_internal.h           |  0
 .../common => lib/utils}/libfdt/objects.mk    |  6 ++--
 .../common => lib/utils}/libfdt/version.lds   |  0
 {platform/common => lib/utils}/objects.mk     |  2 +-
 .../common => lib/utils}/serial/objects.mk    |  4 +--
 .../common => lib/utils}/serial/sifive-uart.c |  2 +-
 .../common => lib/utils}/serial/uart8250.c    |  2 +-
 {platform/common => lib/utils}/sys/clint.c    |  2 +-
 {platform/common => lib/utils}/sys/objects.mk |  2 +-
 {platform/common => lib/utils}/tinyfdt.c      |  2 +-
 platform/kendryte/k210/platform.c             |  4 +--
 platform/qemu/sifive_u/platform.c             |  6 ++--
 platform/qemu/virt/platform.c                 |  6 ++--
 platform/sifive/fu540/platform.c              |  6 ++--
 scripts/create-binary-archive.sh              |  5 +++-
 38 files changed, 48 insertions(+), 38 deletions(-)
 rename {platform/common/include/plat => include/sbi_utils}/irqchip/plic.h (100%)
 rename {platform/common/include/plat => include/sbi_utils}/serial/sifive-uart.h (100%)
 rename {platform/common/include/plat => include/sbi_utils}/serial/uart8250.h (100%)
 rename {platform/common/include/plat => include/sbi_utils}/sys/clint.h (100%)
 rename {platform/common/include/plat => include/sbi_utils}/tinyfdt.h (100%)
 rename {platform/common => lib/utils}/irqchip/objects.mk (71%)
 rename {platform/common => lib/utils}/irqchip/plic.c (97%)
 rename {platform/common => lib/utils}/libfdt/.clang-format (100%)
 rename {platform/common => lib/utils}/libfdt/Makefile.libfdt (100%)
 rename {platform/common => lib/utils}/libfdt/TODO (100%)
 rename {platform/common => lib/utils}/libfdt/fdt.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt.h (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_addresses.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_empty_tree.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_overlay.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_ro.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_rw.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_strerror.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_sw.c (100%)
 rename {platform/common => lib/utils}/libfdt/fdt_wip.c (100%)
 rename {platform/common => lib/utils}/libfdt/libfdt.h (100%)
 rename {platform/common => lib/utils}/libfdt/libfdt_env.h (99%)
 rename {platform/common => lib/utils}/libfdt/libfdt_internal.h (100%)
 rename {platform/common => lib/utils}/libfdt/objects.mk (55%)
 rename {platform/common => lib/utils}/libfdt/version.lds (100%)
 rename {platform/common => lib/utils}/objects.mk (82%)
 rename {platform/common => lib/utils}/serial/objects.mk (52%)
 rename {platform/common => lib/utils}/serial/sifive-uart.c (98%)
 rename {platform/common => lib/utils}/serial/uart8250.c (98%)
 rename {platform/common => lib/utils}/sys/clint.c (99%)
 rename {platform/common => lib/utils}/sys/objects.mk (73%)
 rename {platform/common => lib/utils}/tinyfdt.c (99%)

diff --git a/Makefile b/Makefile
index 38f18d84eeb..3c3b046b46c 100644
--- a/Makefile
+++ b/Makefile
@@ -57,9 +57,9 @@ endif
 export platform_subdir=$(PLATFORM)
 export platform_src_dir=$(platform_parent_dir)/$(platform_subdir)
 export platform_build_dir=$(build_dir)/platform/$(platform_subdir)
-export platform_common_src_dir=$(src_dir)/platform/common
 export include_dir=$(CURDIR)/include
 export libsbi_dir=$(CURDIR)/lib/sbi
+export libsbiutils_dir=$(CURDIR)/lib/utils
 export firmware_dir=$(CURDIR)/firmware
 
 # Find library version
@@ -98,9 +98,9 @@ endif
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
-platform-common-object-mks=$(shell if [ -d $(platform_common_src_dir) ]; then find $(platform_common_src_dir) -iname "objects.mk" | sort -r; fi)
 endif
 libsbi-object-mks=$(shell if [ -d $(libsbi_dir) ]; then find $(libsbi_dir) -iname "objects.mk" | sort -r; fi)
+libsbiutils-object-mks=$(shell if [ -d $(libsbiutils_dir) ]; then find $(libsbiutils_dir) -iname "objects.mk" | sort -r; fi)
 firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
 # Include platform specifig config.mk
@@ -111,17 +111,17 @@ endif
 # Include all object.mk files
 ifdef PLATFORM
 include $(platform-object-mks)
-include $(platform-common-object-mks)
 endif
 include $(libsbi-object-mks)
+include $(libsbiutils-object-mks)
 include $(firmware-object-mks)
 
 # Setup list of objects
 libsbi-objs-path-y=$(foreach obj,$(libsbi-objs-y),$(build_dir)/lib/sbi/$(obj))
+libsbiutils-objs-path-y=$(foreach obj,$(libsbiutils-objs-y),$(build_dir)/lib/utils/$(obj))
 ifdef PLATFORM
 platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(platform_build_dir)/$(obj))
 platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(platform_build_dir)/$(obj))
-platform-common-objs-path-y=$(foreach obj,$(platform-common-objs-y),$(build_dir)/platform/common/$(obj))
 firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(platform_build_dir)/firmware/$(bin))
 endif
 firmware-elfs-path-y=$(firmware-bins-path-y:.bin=.elf)
@@ -129,8 +129,8 @@ firmware-objs-path-y=$(firmware-bins-path-y:.bin=.o)
 
 # Setup list of deps files for objects
 deps-y=$(platform-objs-path-y:.o=.dep)
-deps-y+=$(platform-common-objs-path-y:.o=.dep)
 deps-y+=$(libsbi-objs-path-y:.o=.dep)
+deps-y+=$(libsbiutils-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup platform ABI, ISA and Code Model
@@ -150,9 +150,8 @@ endif
 
 # Setup compilation commands flags
 GENFLAGS	=	-I$(platform_src_dir)/include
-GENFLAGS	+=	-I$(platform_common_src_dir)/include
 GENFLAGS	+=	-I$(include_dir)
-GENFLAGS	+=	$(platform-common-genflags-y)
+GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
@@ -254,6 +253,7 @@ compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(DTC) $(DTCFLAGS) -o $(1) $(2)
 
 targets-y  = $(build_dir)/lib/libsbi.a
+targets-y  += $(build_dir)/lib/libsbiutils.a
 ifdef PLATFORM
 targets-y += $(platform_build_dir)/lib/libplatsbi.a
 targets-y += $(platform-dtb-path-y)
@@ -279,7 +279,10 @@ $(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 $(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(platform-common-objs-path-y) $(platform-objs-path-y)
+$(build_dir)/lib/libsbiutils.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y)
+	$(call compile_ar,$@,$^)
+
+$(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
 $(build_dir)/%.dep: $(src_dir)/%.c
@@ -359,6 +362,7 @@ endif
 endif
 
 install_targets-y  = install_libsbi
+install_targets-y  += install_libsbiutils
 ifdef PLATFORM
 install_targets-y += install_libplatsbi
 install_targets-y += install_firmwares
@@ -373,12 +377,17 @@ install_libsbi: $(build_dir)/lib/libsbi.a
 	$(call inst_header_dir,$(install_dir)/include,$(include_dir)/sbi)
 	$(call inst_file,$(install_dir)/lib/libsbi.a,$(build_dir)/lib/libsbi.a)
 
+.PHONY: install_libsbiutils
+install_libsbiutils: $(build_dir)/lib/libsbiutils.a
+	$(call inst_header_dir,$(install_dir)/include,$(include_dir)/sbi_utils)
+	$(call inst_file,$(install_dir)/lib/libsbiutils.a,$(build_dir)/lib/libsbiutils.a)
+
 .PHONY: install_libplatsbi
-install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
+install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a
 	$(call inst_file,$(install_dir)/platform/$(platform_subdir)/lib/libplatsbi.a,$(platform_build_dir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares
-install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
+install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a $(firmware-bins-path-y)
 	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-elfs-path-y))
 	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
diff --git a/platform/common/include/plat/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
similarity index 100%
rename from platform/common/include/plat/irqchip/plic.h
rename to include/sbi_utils/irqchip/plic.h
diff --git a/platform/common/include/plat/serial/sifive-uart.h b/include/sbi_utils/serial/sifive-uart.h
similarity index 100%
rename from platform/common/include/plat/serial/sifive-uart.h
rename to include/sbi_utils/serial/sifive-uart.h
diff --git a/platform/common/include/plat/serial/uart8250.h b/include/sbi_utils/serial/uart8250.h
similarity index 100%
rename from platform/common/include/plat/serial/uart8250.h
rename to include/sbi_utils/serial/uart8250.h
diff --git a/platform/common/include/plat/sys/clint.h b/include/sbi_utils/sys/clint.h
similarity index 100%
rename from platform/common/include/plat/sys/clint.h
rename to include/sbi_utils/sys/clint.h
diff --git a/platform/common/include/plat/tinyfdt.h b/include/sbi_utils/tinyfdt.h
similarity index 100%
rename from platform/common/include/plat/tinyfdt.h
rename to include/sbi_utils/tinyfdt.h
diff --git a/platform/common/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
similarity index 71%
rename from platform/common/irqchip/objects.mk
rename to lib/utils/irqchip/objects.mk
index 041834da2db..fa7c9375c58 100644
--- a/platform/common/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -7,4 +7,4 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-platform-common-objs-$(PLATFORM_IRQCHIP_PLIC) += irqchip/plic.o
+libsbiutils-objs-$(PLATFORM_IRQCHIP_PLIC) += irqchip/plic.o
diff --git a/platform/common/irqchip/plic.c b/lib/utils/irqchip/plic.c
similarity index 97%
rename from platform/common/irqchip/plic.c
rename to lib/utils/irqchip/plic.c
index e3cdb170157..21317071bec 100644
--- a/platform/common/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -11,8 +11,8 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
 #include <sbi/string.h>
-#include <plat/tinyfdt.h>
-#include <plat/irqchip/plic.h>
+#include <sbi_utils/tinyfdt.h>
+#include <sbi_utils/irqchip/plic.h>
 
 #define PLIC_PRIORITY_BASE 0x0
 #define PLIC_PENDING_BASE 0x1000
diff --git a/platform/common/libfdt/.clang-format b/lib/utils/libfdt/.clang-format
similarity index 100%
rename from platform/common/libfdt/.clang-format
rename to lib/utils/libfdt/.clang-format
diff --git a/platform/common/libfdt/Makefile.libfdt b/lib/utils/libfdt/Makefile.libfdt
similarity index 100%
rename from platform/common/libfdt/Makefile.libfdt
rename to lib/utils/libfdt/Makefile.libfdt
diff --git a/platform/common/libfdt/TODO b/lib/utils/libfdt/TODO
similarity index 100%
rename from platform/common/libfdt/TODO
rename to lib/utils/libfdt/TODO
diff --git a/platform/common/libfdt/fdt.c b/lib/utils/libfdt/fdt.c
similarity index 100%
rename from platform/common/libfdt/fdt.c
rename to lib/utils/libfdt/fdt.c
diff --git a/platform/common/libfdt/fdt.h b/lib/utils/libfdt/fdt.h
similarity index 100%
rename from platform/common/libfdt/fdt.h
rename to lib/utils/libfdt/fdt.h
diff --git a/platform/common/libfdt/fdt_addresses.c b/lib/utils/libfdt/fdt_addresses.c
similarity index 100%
rename from platform/common/libfdt/fdt_addresses.c
rename to lib/utils/libfdt/fdt_addresses.c
diff --git a/platform/common/libfdt/fdt_empty_tree.c b/lib/utils/libfdt/fdt_empty_tree.c
similarity index 100%
rename from platform/common/libfdt/fdt_empty_tree.c
rename to lib/utils/libfdt/fdt_empty_tree.c
diff --git a/platform/common/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
similarity index 100%
rename from platform/common/libfdt/fdt_overlay.c
rename to lib/utils/libfdt/fdt_overlay.c
diff --git a/platform/common/libfdt/fdt_ro.c b/lib/utils/libfdt/fdt_ro.c
similarity index 100%
rename from platform/common/libfdt/fdt_ro.c
rename to lib/utils/libfdt/fdt_ro.c
diff --git a/platform/common/libfdt/fdt_rw.c b/lib/utils/libfdt/fdt_rw.c
similarity index 100%
rename from platform/common/libfdt/fdt_rw.c
rename to lib/utils/libfdt/fdt_rw.c
diff --git a/platform/common/libfdt/fdt_strerror.c b/lib/utils/libfdt/fdt_strerror.c
similarity index 100%
rename from platform/common/libfdt/fdt_strerror.c
rename to lib/utils/libfdt/fdt_strerror.c
diff --git a/platform/common/libfdt/fdt_sw.c b/lib/utils/libfdt/fdt_sw.c
similarity index 100%
rename from platform/common/libfdt/fdt_sw.c
rename to lib/utils/libfdt/fdt_sw.c
diff --git a/platform/common/libfdt/fdt_wip.c b/lib/utils/libfdt/fdt_wip.c
similarity index 100%
rename from platform/common/libfdt/fdt_wip.c
rename to lib/utils/libfdt/fdt_wip.c
diff --git a/platform/common/libfdt/libfdt.h b/lib/utils/libfdt/libfdt.h
similarity index 100%
rename from platform/common/libfdt/libfdt.h
rename to lib/utils/libfdt/libfdt.h
diff --git a/platform/common/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
similarity index 99%
rename from platform/common/libfdt/libfdt_env.h
rename to lib/utils/libfdt/libfdt_env.h
index adcd315623a..c2b0c3436d2 100644
--- a/platform/common/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -58,8 +58,6 @@
 #define INT_MAX		((int)(~0U >> 1))
 #define UINT_MAX	((unsigned int)~0U)
 
-#include <stddef.h>
-
 #ifdef __CHECKER__
 #define FDT_FORCE __attribute__((force))
 #define FDT_BITWISE __attribute__((bitwise))
diff --git a/platform/common/libfdt/libfdt_internal.h b/lib/utils/libfdt/libfdt_internal.h
similarity index 100%
rename from platform/common/libfdt/libfdt_internal.h
rename to lib/utils/libfdt/libfdt_internal.h
diff --git a/platform/common/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
similarity index 55%
rename from platform/common/libfdt/objects.mk
rename to lib/utils/libfdt/objects.mk
index 1adee2b981f..205ea2cce5d 100644
--- a/platform/common/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -10,7 +10,7 @@
 libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \
                fdt_empty_tree.o
 $(foreach file, $(libfdt_files), \
-        $(eval CFLAGS_$(file) = -I$(src)/../../common/libfdt))
+        $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
 
-platform-common-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
-platform-common-genflags-$(PLATFORM_INCLUDE_LIBFDT) += -I$(platform_common_src_dir)/libfdt/
+libsbiutils-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
+libsbiutils-genflags-$(PLATFORM_INCLUDE_LIBFDT)  += -I$(libsbiutils_dir)/libfdt/
diff --git a/platform/common/libfdt/version.lds b/lib/utils/libfdt/version.lds
similarity index 100%
rename from platform/common/libfdt/version.lds
rename to lib/utils/libfdt/version.lds
diff --git a/platform/common/objects.mk b/lib/utils/objects.mk
similarity index 82%
rename from platform/common/objects.mk
rename to lib/utils/objects.mk
index 49e963172b8..95ecd42688c 100644
--- a/platform/common/objects.mk
+++ b/lib/utils/objects.mk
@@ -7,4 +7,4 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-platform-common-objs-y += tinyfdt.o
+libsbiutils-objs-y += tinyfdt.o
diff --git a/platform/common/serial/objects.mk b/lib/utils/serial/objects.mk
similarity index 52%
rename from platform/common/serial/objects.mk
rename to lib/utils/serial/objects.mk
index 67f85b47644..fba056b0d5d 100644
--- a/platform/common/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -7,5 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-platform-common-objs-$(PLATFORM_SERIAL_UART8250) += serial/uart8250.o
-platform-common-objs-$(PLATFORM_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
+libsbiutils-objs-$(PLATFORM_SERIAL_UART8250) += serial/uart8250.o
+libsbiutils-objs-$(PLATFORM_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
diff --git a/platform/common/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
similarity index 98%
rename from platform/common/serial/sifive-uart.c
rename to lib/utils/serial/sifive-uart.c
index de002722ec2..fd6f28dd917 100644
--- a/platform/common/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -9,7 +9,7 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_console.h>
-#include <plat/serial/sifive-uart.h>
+#include <sbi_utils/serial/sifive-uart.h>
 
 /* clang-format off */
 
diff --git a/platform/common/serial/uart8250.c b/lib/utils/serial/uart8250.c
similarity index 98%
rename from platform/common/serial/uart8250.c
rename to lib/utils/serial/uart8250.c
index ceefb53d4db..eace0619acf 100644
--- a/platform/common/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -8,7 +8,7 @@
  */
 
 #include <sbi/riscv_io.h>
-#include <plat/serial/uart8250.h>
+#include <sbi_utils/serial/uart8250.h>
 
 /* clang-format off */
 
diff --git a/platform/common/sys/clint.c b/lib/utils/sys/clint.c
similarity index 99%
rename from platform/common/sys/clint.c
rename to lib/utils/sys/clint.c
index eba056f18f6..055a51358de 100644
--- a/platform/common/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -10,7 +10,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/sbi_hart.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/sys/clint.h>
 
 static u32 clint_ipi_hart_count;
 static volatile void *clint_ipi_base;
diff --git a/platform/common/sys/objects.mk b/lib/utils/sys/objects.mk
similarity index 73%
rename from platform/common/sys/objects.mk
rename to lib/utils/sys/objects.mk
index 5cb98869cda..3c13b9b141f 100644
--- a/platform/common/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -7,4 +7,4 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-platform-common-objs-$(PLATFORM_SYS_CLINT) += sys/clint.o
+libsbiutils-objs-$(PLATFORM_SYS_CLINT) += sys/clint.o
diff --git a/platform/common/tinyfdt.c b/lib/utils/tinyfdt.c
similarity index 99%
rename from platform/common/tinyfdt.c
rename to lib/utils/tinyfdt.c
index 73dd13154af..da5c0f76005 100644
--- a/platform/common/tinyfdt.c
+++ b/lib/utils/tinyfdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <sbi/string.h>
-#include <plat/tinyfdt.h>
+#include <sbi_utils/tinyfdt.h>
 
 #define FDT_MAGIC 0xd00dfeed
 #define FDT_VERSION 17
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 136e58e9fca..299b343951c 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -12,8 +12,8 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_console.h>
-#include <plat/irqchip/plic.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/sys/clint.h>
 #include "platform.h"
 #include "uarths.h"
 
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 470da3596d4..e20d89d2a49 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -11,9 +11,9 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <plat/irqchip/plic.h>
-#include <plat/serial/sifive-uart.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/sifive-uart.h>
+#include <sbi_utils/sys/clint.h>
 
 /* clang-format off */
 
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 96e375dfa93..697549f6035 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -13,9 +13,9 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <plat/irqchip/plic.h>
-#include <plat/serial/uart8250.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
 
 /* clang-format off */
 
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index ee2e5a487f6..9e16562135c 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -15,9 +15,9 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/riscv_io.h>
-#include <plat/irqchip/plic.h>
-#include <plat/serial/sifive-uart.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/sifive-uart.h>
+#include <sbi_utils/sys/clint.h>
 
 /* clang-format off */
 
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index be8cfe1cb46..d5890fcda47 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -103,10 +103,13 @@ esac
 # Ensure output directory is present
 mkdir -p "${BUILD_OUTPUT_PATH}"
 
+# Do a clean build first
+make distclean
+
 # Build and install generic library
 echo "Build and install generic library XLEN=${BUILD_RISCV_XLEN}"
 echo ""
-make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi -j "${BUILD_NUM_THREADS}"
+make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi install_libsbiutils -j "${BUILD_NUM_THREADS}"
 echo ""
 
 # Build and install relevant platforms

From 200ed7c1bdb4d39caf9d0126e3741e72982852b0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:04 -0700
Subject: [PATCH 0269/1765] lib: Rename string.x to sbi_string.x

All string functions are part of libsbi. It makes more sense
to rename them to sbi_string.x as the libsbi can be linked
with external libraries that can have similar implementation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_string.h                | 39 +++++++++++++++++++++++++
 include/sbi/string.h                    | 39 -------------------------
 lib/sbi/libc/objects.mk                 | 15 ----------
 lib/sbi/objects.mk                      |  1 +
 lib/sbi/sbi_fifo.c                      | 10 +++----
 lib/sbi/sbi_ipi.c                       |  1 -
 lib/sbi/{libc/string.c => sbi_string.c} | 28 +++++++++---------
 lib/sbi/sbi_tlb.c                       |  4 +--
 lib/utils/irqchip/plic.c                |  4 +--
 lib/utils/libfdt/libfdt_env.h           | 14 ++++++++-
 lib/utils/tinyfdt.c                     | 12 ++++----
 11 files changed, 82 insertions(+), 85 deletions(-)
 create mode 100644 include/sbi/sbi_string.h
 delete mode 100644 include/sbi/string.h
 delete mode 100644 lib/sbi/libc/objects.mk
 rename lib/sbi/{libc/string.c => sbi_string.c} (75%)

diff --git a/include/sbi/sbi_string.h b/include/sbi/sbi_string.h
new file mode 100644
index 00000000000..338075fcf28
--- /dev/null
+++ b/include/sbi/sbi_string.h
@@ -0,0 +1,39 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __STRING_H__
+#define __STRING_H__
+
+#include <sbi/sbi_types.h>
+
+int sbi_strcmp(const char *a, const char *b);
+
+size_t sbi_strlen(const char *str);
+
+size_t sbi_strnlen(const char *str, size_t count);
+
+char *sbi_strcpy(char *dest, const char *src);
+
+char *sbi_strncpy(char *dest, const char *src, size_t count);
+
+char *sbi_strchr(const char *s, int c);
+
+char *sbi_strrchr(const char *s, int c);
+
+void *sbi_memset(void *s, int c, size_t count);
+
+void *sbi_memcpy(void *dest, const void *src, size_t count);
+
+void *sbi_memmove(void *dest, const void *src, size_t count);
+
+int sbi_memcmp(const void *s1, const void *s2, size_t count);
+
+void *sbi_memchr(const void *s, int c, size_t count);
+
+#endif
diff --git a/include/sbi/string.h b/include/sbi/string.h
deleted file mode 100644
index 8259ef56d3f..00000000000
--- a/include/sbi/string.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Atish Patra <atish.patra@wdc.com>
- */
-
-#ifndef __STRING_H__
-#define __STRING_H__
-
-#include <sbi/sbi_types.h>
-
-int strcmp(const char *a, const char *b);
-
-size_t strlen(const char *str);
-
-size_t strnlen(const char *str, size_t count);
-
-char *strcpy(char *dest, const char *src);
-
-char *strncpy(char *dest, const char *src, size_t count);
-
-char *strchr(const char *s, int c);
-
-char *strrchr(const char *s, int c);
-
-void *memset(void *s, int c, size_t count);
-
-void *memcpy(void *dest, const void *src, size_t count);
-
-void *memmove(void *dest, const void *src, size_t count);
-
-int memcmp(const void *s1, const void *s2, size_t count);
-
-void *memchr(const void *s, int c, size_t count);
-
-#endif
diff --git a/lib/sbi/libc/objects.mk b/lib/sbi/libc/objects.mk
deleted file mode 100644
index 7a6ebbea964..00000000000
--- a/lib/sbi/libc/objects.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Atish Patra<atish.patra@wdc.com>
-#
-
-libc_files = string.o
-
-$(foreach file, $(libc_files), \
-	$(eval CFLAGS_$(file) = -I$(src)/../../sbi/libc))
-
-libsbi-objs-y += $(addprefix libc/,$(libc_files))
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index d0fd85684dc..f2e8494be78 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -27,3 +27,4 @@ libsbi-objs-y += sbi_system.o
 libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
+libsbi-objs-y += sbi_string.o
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index e823d2a60fb..e69009f665d 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -10,7 +10,7 @@
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 		   u16 entry_size)
@@ -20,7 +20,7 @@ void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 	fifo->entry_size  = entry_size;
 	SPIN_LOCK_INIT(&fifo->qlock);
 	fifo->avail = fifo->tail = 0;
-	memset(fifo->queue, 0, entries * entry_size);
+	sbi_memset(fifo->queue, 0, entries * entry_size);
 }
 
 /* Note: must be called with fifo->qlock held */
@@ -76,7 +76,7 @@ static inline void __sbi_fifo_reset(struct sbi_fifo *fifo)
 {
 	fifo->avail = 0;
 	fifo->tail  = 0;
-	memset(fifo->queue, 0, fifo->num_entries * fifo->entry_size);
+	sbi_memset(fifo->queue, 0, fifo->num_entries * fifo->entry_size);
 }
 
 bool sbi_fifo_reset(struct sbi_fifo *fifo)
@@ -149,7 +149,7 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 	if (head >= fifo->num_entries)
 		head = head - fifo->num_entries;
 
-	memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
+	sbi_memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
 
 	fifo->avail++;
 
@@ -170,7 +170,7 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOENT;
 	}
 
-	memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
+	sbi_memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
 	       fifo->entry_size);
 
 	fifo->avail--;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 19da029a250..b1077b504a7 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -19,7 +19,6 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
-#include <sbi/string.h>
 
 static unsigned long ipi_data_off;
 
diff --git a/lib/sbi/libc/string.c b/lib/sbi/sbi_string.c
similarity index 75%
rename from lib/sbi/libc/string.c
rename to lib/sbi/sbi_string.c
index b5743fe1e0f..38b700bbcdc 100644
--- a/lib/sbi/libc/string.c
+++ b/lib/sbi/sbi_string.c
@@ -12,9 +12,9 @@
  * bugs as well. Use any optimized routines from newlib or glibc if required.
  */
 
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 
-int strcmp(const char *a, const char *b)
+int sbi_strcmp(const char *a, const char *b)
 {
 	/* search first diff or end of string */
 	for (; *a == *b && *a != '\0'; a++, b++)
@@ -23,7 +23,7 @@ int strcmp(const char *a, const char *b)
 	return *a - *b;
 }
 
-size_t strlen(const char *str)
+size_t sbi_strlen(const char *str)
 {
 	unsigned long ret = 0;
 
@@ -35,7 +35,7 @@ size_t strlen(const char *str)
 	return ret;
 }
 
-size_t strnlen(const char *str, size_t count)
+size_t sbi_strnlen(const char *str, size_t count)
 {
 	unsigned long ret = 0;
 
@@ -48,7 +48,7 @@ size_t strnlen(const char *str, size_t count)
 	return ret;
 }
 
-char *strcpy(char *dest, const char *src)
+char *sbi_strcpy(char *dest, const char *src)
 {
 	char *ret = dest;
 
@@ -59,7 +59,7 @@ char *strcpy(char *dest, const char *src)
 	return ret;
 }
 
-char *strncpy(char *dest, const char *src, size_t count)
+char *sbi_strncpy(char *dest, const char *src, size_t count)
 {
 	char *ret = dest;
 
@@ -70,7 +70,7 @@ char *strncpy(char *dest, const char *src, size_t count)
 	return ret;
 }
 
-char *strchr(const char *s, int c)
+char *sbi_strchr(const char *s, int c)
 {
 	while (*s != '\0' && *s != (char)c)
 		s++;
@@ -81,9 +81,9 @@ char *strchr(const char *s, int c)
 		return (char *)s;
 }
 
-char *strrchr(const char *s, int c)
+char *sbi_strrchr(const char *s, int c)
 {
-	const char *last = s + strlen(s);
+	const char *last = s + sbi_strlen(s);
 
 	while (last > s && *last != (char)c)
 		last--;
@@ -93,7 +93,7 @@ char *strrchr(const char *s, int c)
 	else
 		return (char *)last;
 }
-void *memset(void *s, int c, size_t count)
+void *sbi_memset(void *s, int c, size_t count)
 {
 	char *temp = s;
 
@@ -105,7 +105,7 @@ void *memset(void *s, int c, size_t count)
 	return s;
 }
 
-void *memcpy(void *dest, const void *src, size_t count)
+void *sbi_memcpy(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = dest;
 	const char *temp2 = src;
@@ -118,7 +118,7 @@ void *memcpy(void *dest, const void *src, size_t count)
 	return dest;
 }
 
-void *memmove(void *dest, const void *src, size_t count)
+void *sbi_memmove(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = (char *)dest;
 	const char *temp2 = (char *)src;
@@ -144,7 +144,7 @@ void *memmove(void *dest, const void *src, size_t count)
 	return dest;
 }
 
-int memcmp(const void *s1, const void *s2, size_t count)
+int sbi_memcmp(const void *s1, const void *s2, size_t count)
 {
 	const char *temp1 = s1;
 	const char *temp2 = s2;
@@ -160,7 +160,7 @@ int memcmp(const void *s1, const void *s2, size_t count)
 		return 0;
 }
 
-void *memchr(const void *s, int c, size_t count)
+void *sbi_memchr(const void *s, int c, size_t count)
 {
 	const unsigned char *temp = s;
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 1031df308b1..cffda52d66a 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -16,7 +16,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 
 static unsigned long ipi_tlb_fifo_off;
 static unsigned long ipi_tlb_fifo_mem_off;
@@ -190,7 +190,7 @@ void sbi_tlb_fifo_process(struct sbi_scratch *scratch, u32 event)
 			sbi_tlb_fifo_sfence_vma(&tinfo);
 		else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
 			sbi_tlb_fifo_sfence_vma_asid(&tinfo);
-		memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
+		sbi_memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
 	}
 }
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 21317071bec..9cc210869b6 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -10,7 +10,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 #include <sbi_utils/tinyfdt.h>
 #include <sbi_utils/irqchip/plic.h>
 
@@ -54,7 +54,7 @@ static void plic_fdt_fixup_prop(const struct fdt_node *node,
 
 	if (!prop)
 		return;
-	if (strcmp(prop->name, "interrupts-extended"))
+	if (sbi_strcmp(prop->name, "interrupts-extended"))
 		return;
 
 	cells	    = prop->value;
diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index c2b0c3436d2..535b6371d15 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -52,7 +52,7 @@
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 #include <sbi/sbi_types.h>
 
 #define INT_MAX		((int)(~0U >> 1))
@@ -66,6 +66,18 @@
 #define FDT_BITWISE
 #endif
 
+#define memmove		sbi_memmove
+#define memcpy		sbi_memcpy
+#define memcmp		sbi_memcmp
+#define memchr		sbi_memchr
+#define memset		sbi_memset
+#define strchr		sbi_strchr
+#define strrchr		sbi_strrchr
+#define strcpy		sbi_strcpy
+#define strcmp		sbi_strcmp
+#define strlen		sbi_strlen
+#define strnlen		sbi_strnlen
+
 typedef uint16_t FDT_BITWISE fdt16_t;
 typedef uint32_t FDT_BITWISE fdt32_t;
 typedef uint64_t FDT_BITWISE fdt64_t;
diff --git a/lib/utils/tinyfdt.c b/lib/utils/tinyfdt.c
index da5c0f76005..7d27030b9c4 100644
--- a/lib/utils/tinyfdt.c
+++ b/lib/utils/tinyfdt.c
@@ -7,7 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/string.h>
+#include <sbi/sbi_string.h>
 #include <sbi_utils/tinyfdt.h>
 
 #define FDT_MAGIC 0xd00dfeed
@@ -48,10 +48,10 @@ int fdt_prop_string_index(const struct fdt_prop *prop, const char *str)
 	end = p + prop->len;
 
 	for (i = 0; p < end; i++, p += l) {
-		l = strlen(p) + 1;
+		l = sbi_strlen(p) + 1;
 		if (p + l > end)
 			return -1;
-		if (strcmp(str, p) == 0)
+		if (sbi_strcmp(str, p) == 0)
 			return i; /* Found it; return index */
 	}
 
@@ -83,7 +83,7 @@ static void recursive_iter(char **data, struct recursive_iter_info *info,
 	node.parent = parent;
 	node.name   = *data;
 
-	*data += strlen(*data) + 1;
+	*data += sbi_strlen(*data) + 1;
 	while ((ulong)(*data) % sizeof(u32) != 0)
 		(*data)++;
 
@@ -154,7 +154,7 @@ static void match_iter(const struct fdt_node *node, const struct fdt_prop *prop,
 	data += sizeof(u32);
 
 	/* Skip node name */
-	data += strlen(data) + 1;
+	data += sbi_strlen(data) + 1;
 	while ((ulong)(data) % sizeof(u32) != 0)
 		data++;
 
@@ -228,7 +228,7 @@ static int match_compat(const struct fdt_node *node,
 	if (!prop)
 		return 0;
 
-	if (strcmp(prop->name, "compatible"))
+	if (sbi_strcmp(prop->name, "compatible"))
 		return 0;
 
 	if (fdt_prop_string_index(prop, cinfo->compat) < 0)

From b2d0caf86b633e4242bc320d03ba7d13ff99b7f1 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:05 -0700
Subject: [PATCH 0270/1765] platform: Enable all drivers by default.

The drivers and libfdt are built as libsbiutils.a
instead of libplatsbi.a.

libsbiutils.a are not built per platform specific. Thus,
enable all drivers by default.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/irqchip/objects.mk     |  2 +-
 lib/utils/libfdt/objects.mk      |  4 ++--
 lib/utils/serial/objects.mk      |  4 ++--
 lib/utils/sys/objects.mk         |  2 +-
 platform/kendryte/k210/config.mk |  8 --------
 platform/qemu/sifive_u/config.mk |  8 --------
 platform/qemu/virt/config.mk     |  3 ---
 platform/sifive/fu540/config.mk  |  9 ---------
 platform/template/config.mk      | 16 ----------------
 9 files changed, 6 insertions(+), 50 deletions(-)

diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index fa7c9375c58..e3a09024a16 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -7,4 +7,4 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-$(PLATFORM_IRQCHIP_PLIC) += irqchip/plic.o
+libsbiutils-objs-y += irqchip/plic.o
diff --git a/lib/utils/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
index 205ea2cce5d..a95c1bdf3d2 100644
--- a/lib/utils/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -12,5 +12,5 @@ libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \
 $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
 
-libsbiutils-objs-$(PLATFORM_INCLUDE_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
-libsbiutils-genflags-$(PLATFORM_INCLUDE_LIBFDT)  += -I$(libsbiutils_dir)/libfdt/
+libsbiutils-objs-y += $(addprefix libfdt/,$(libfdt_files))
+libsbiutils-genflags-y  += -I$(libsbiutils_dir)/libfdt/
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index fba056b0d5d..d4f67556aa4 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -7,5 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-$(PLATFORM_SERIAL_UART8250) += serial/uart8250.o
-libsbiutils-objs-$(PLATFORM_SERIAL_SIFIVE_UART) += serial/sifive-uart.o
+libsbiutils-objs-y += serial/uart8250.o
+libsbiutils-objs-y += serial/sifive-uart.o
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index 3c13b9b141f..baed8848dfb 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -7,4 +7,4 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-$(PLATFORM_SYS_CLINT) += sys/clint.o
+libsbiutils-objs-y += sys/clint.o
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index 2aa3b13fc07..e0f8d3a064c 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -13,16 +13,8 @@ platform-cflags-y =
 platform-asflags-y =
 platform-ldflags-y =
 
-# Common drivers to enable
-PLATFORM_IRQCHIP_PLIC=y
-PLATFORM_SYS_CLINT=y
-
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_PAYLOAD=y
 FW_PAYLOAD_ALIGN=0x1000
 FW_PAYLOAD_FDT=k210.dtb
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBC=y
-
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
index 87e12ee9c89..f66a55548b5 100644
--- a/platform/qemu/sifive_u/config.mk
+++ b/platform/qemu/sifive_u/config.mk
@@ -17,11 +17,6 @@ platform-ldflags-y =
 platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
   -nographic -kernel $(build_dir)/platform/qemu/sifive_u/firmware/fw_payload.elf
 
-# Common drivers to enable
-PLATFORM_IRQCHIP_PLIC=y
-PLATFORM_SERIAL_SIFIVE_UART=y
-PLATFORM_SYS_CLINT=y
-
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
@@ -43,6 +38,3 @@ else
   FW_PAYLOAD_OFFSET=0x200000
 endif
 FW_PAYLOAD_FDT_ADDR=0x82200000
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBC=y
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 2b0709c06be..5cc9f0b5242 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -43,6 +43,3 @@ else
   FW_PAYLOAD_OFFSET=0x200000
 endif
 FW_PAYLOAD_FDT_ADDR=0x82200000
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBC=y
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index fbb5db8893e..590543383fe 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -13,11 +13,6 @@ platform-cflags-y =
 platform-asflags-y =
 platform-ldflags-y =
 
-# Common drivers to enable
-PLATFORM_IRQCHIP_PLIC=y
-PLATFORM_SERIAL_SIFIVE_UART=y
-PLATFORM_SYS_CLINT=y
-
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
@@ -27,7 +22,3 @@ FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
 FW_PAYLOAD_FDT_ADDR=0x82200000
-
-# External Libraries to include
-PLATFORM_INCLUDE_LIBFDT=y
-PLATFORM_INCLUDE_LIBC=y
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 5ba8efc752e..70f2db85278 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -31,17 +31,6 @@ platform-ldflags-y =
 # PLATFORM_RISCV_ISA = rv64imafdc
 # PLATFORM_RISCV_CODE_MODEL = medany
 
-#
-# OpenSBI implements generic drivers for some common generic hardware. The
-# drivers currently available are the RISC-V Platform Level Interrupt
-# Controller (PLIC), RISC-V Core Local Interrupt controller (CLINT) and a UART
-# 8250 compliant serial line driver (UART8250). The following definitions allow
-# enabling the use of these generic drivers for the platform.
-#
-# PLATFORM_IRQCHIP_PLIC=<y|n>
-# PLATFORM_SYS_CLINT=<y|n>
-# PLATFORM_SERIAL_UART8250=<y|n>
-
 # Firmware load address configuration. This is mandatory.
 FW_TEXT_START=0x80000000
 
@@ -85,8 +74,3 @@ endif
 # FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"
 # FW_PAYLOAD_FDT="name of the platform defined flattened device tree file"
 # FW_PAYLOAD_FDT_ADDR=0x82200000
-
-#
-# Allow linking against static libc for standard functions (memset, memcpy, etc)
-#
-# PLATFORM_INCLUDE_LIBC=y

From 5dd93e88fe3c9775107402bd32b91f8ccc2abe82 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:06 -0700
Subject: [PATCH 0271/1765] utils: Remove tinyfdt.c

tinyfdt.c was originally added to provide a minimal implementation of
fdt parsing. However, we have already included libfdt in OpenSBI for
more complicated operations.

Remove tinfdt and replace its functiolity using libfdt.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/tinyfdt.h |  67 ---------
 lib/utils/irqchip/plic.c    |  30 ++--
 lib/utils/objects.mk        |  10 --
 lib/utils/tinyfdt.c         | 280 ------------------------------------
 4 files changed, 14 insertions(+), 373 deletions(-)
 delete mode 100644 include/sbi_utils/tinyfdt.h
 delete mode 100644 lib/utils/objects.mk
 delete mode 100644 lib/utils/tinyfdt.c

diff --git a/include/sbi_utils/tinyfdt.h b/include/sbi_utils/tinyfdt.h
deleted file mode 100644
index 3a681d978a0..00000000000
--- a/include/sbi_utils/tinyfdt.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#ifndef __FDT_H__
-#define __FDT_H__
-
-#include <sbi/sbi_types.h>
-
-struct fdt_node {
-	char *data;
-	const struct fdt_node *parent;
-	const char *name;
-	int depth;
-	int address_cells;
-	int size_cells;
-};
-
-struct fdt_prop {
-	const struct fdt_node *node;
-	const char *name;
-	void *value;
-	u32 len;
-};
-
-/* Reverse byte-order of 32bit number */
-u32 fdt_rev32(u32 v);
-
-/* Length of a string */
-ulong fdt_strlen(const char *str);
-
-/* Compate two strings */
-int fdt_strcmp(const char *a, const char *b);
-
-/* Find index of matching string from a list of strings */
-int fdt_prop_string_index(const struct fdt_prop *prop, const char *str);
-
-/* Iterate over each property of matching node */
-int fdt_match_node_prop(void *fdt,
-			int (*match)(const struct fdt_node *node,
-				     const struct fdt_prop *prop, void *priv),
-			void *match_priv,
-			void (*fn)(const struct fdt_node *node,
-				   const struct fdt_prop *prop, void *priv),
-			void *fn_priv);
-
-/* Iterate over each property of compatible node */
-int fdt_compat_node_prop(void *fdt, const char *compat,
-			 void (*fn)(const struct fdt_node *node,
-				    const struct fdt_prop *prop, void *priv),
-			 void *fn_priv);
-
-/* Iterate over each node and property */
-int fdt_walk(void *fdt,
-	     void (*fn)(const struct fdt_node *node,
-			const struct fdt_prop *prop, void *priv),
-	     void *fn_priv);
-
-/* Get size of FDT */
-u32 fdt_size(void *fdt);
-
-#endif
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 9cc210869b6..0479186e413 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -11,8 +11,9 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_string.h>
-#include <sbi_utils/tinyfdt.h>
 #include <sbi_utils/irqchip/plic.h>
+#include <libfdt.h>
+#include <fdt.h>
 
 #define PLIC_PRIORITY_BASE 0x0
 #define PLIC_PENDING_BASE 0x1000
@@ -46,34 +47,31 @@ static void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 	writel(val, plic_ie + word_index * 4);
 }
 
-static void plic_fdt_fixup_prop(const struct fdt_node *node,
-				const struct fdt_prop *prop, void *priv)
+void plic_fdt_fixup(void *fdt, const char *compat)
 {
 	u32 *cells;
-	u32 i, cells_count;
+	int i, cells_count;
+	u32 plic_off;
 
-	if (!prop)
-		return;
-	if (sbi_strcmp(prop->name, "interrupts-extended"))
+	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
+	if (plic_off < 0)
 		return;
 
-	cells	    = prop->value;
-	cells_count = prop->len / sizeof(u32);
+	cells = (u32 *)fdt_getprop(fdt, plic_off,
+				   "interrupts-extended", &cells_count);
+	if (!cells)
+		return;
 
+	cells_count = cells_count / sizeof(u32);
 	if (!cells_count)
 		return;
 
 	for (i = 0; i < (cells_count / 2); i++) {
-		if (fdt_rev32(cells[2 * i + 1]) == IRQ_M_EXT)
-			cells[2 * i + 1] = fdt_rev32(0xffffffff);
+		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
+			cells[2 * i + 1] = fdt32_to_cpu(0xffffffff);
 	}
 }
 
-void plic_fdt_fixup(void *fdt, const char *compat)
-{
-	fdt_compat_node_prop(fdt, compat, plic_fdt_fixup_prop, NULL);
-}
-
 int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic_num_sources / 32 + 1;
diff --git a/lib/utils/objects.mk b/lib/utils/objects.mk
deleted file mode 100644
index 95ecd42688c..00000000000
--- a/lib/utils/objects.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-libsbiutils-objs-y += tinyfdt.o
diff --git a/lib/utils/tinyfdt.c b/lib/utils/tinyfdt.c
deleted file mode 100644
index 7d27030b9c4..00000000000
--- a/lib/utils/tinyfdt.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/sbi_string.h>
-#include <sbi_utils/tinyfdt.h>
-
-#define FDT_MAGIC 0xd00dfeed
-#define FDT_VERSION 17
-
-struct fdt_header {
-	u32 magic;
-	u32 totalsize;
-	u32 off_dt_struct;
-	u32 off_dt_strings;
-	u32 off_mem_rsvmap;
-	u32 version;
-	u32 last_comp_version; /* <= 17 */
-	u32 boot_cpuid_phys;
-	u32 size_dt_strings;
-	u32 size_dt_struct;
-} __attribute__((packed));
-
-#define FDT_BEGIN_NODE 1
-#define FDT_END_NODE 2
-#define FDT_PROP 3
-#define FDT_NOP 4
-#define FDT_END 9
-
-u32 fdt_rev32(u32 v)
-{
-	return ((v & 0x000000FF) << 24) | ((v & 0x0000FF00) << 8) |
-	       ((v & 0x00FF0000) >> 8) | ((v & 0xFF000000) >> 24);
-}
-
-int fdt_prop_string_index(const struct fdt_prop *prop, const char *str)
-{
-	int i;
-	ulong l = 0;
-	const char *p, *end;
-
-	p   = prop->value;
-	end = p + prop->len;
-
-	for (i = 0; p < end; i++, p += l) {
-		l = sbi_strlen(p) + 1;
-		if (p + l > end)
-			return -1;
-		if (sbi_strcmp(str, p) == 0)
-			return i; /* Found it; return index */
-	}
-
-	return -1;
-}
-
-struct recursive_iter_info {
-	void (*fn)(const struct fdt_node *node, const struct fdt_prop *prop,
-		   void *priv);
-	void *fn_priv;
-	const char *str;
-};
-
-#define DATA32(ptr) fdt_rev32(*((u32 *)ptr))
-
-static void recursive_iter(char **data, struct recursive_iter_info *info,
-			   const struct fdt_node *parent)
-{
-	struct fdt_node node;
-	struct fdt_prop prop;
-
-	if (DATA32(*data) != FDT_BEGIN_NODE)
-		return;
-
-	node.data = *data;
-
-	(*data) += sizeof(u32);
-
-	node.parent = parent;
-	node.name   = *data;
-
-	*data += sbi_strlen(*data) + 1;
-	while ((ulong)(*data) % sizeof(u32) != 0)
-		(*data)++;
-
-	node.depth = (parent) ? (parent->depth + 1) : 1;
-
-	/* Default cell counts, as per the FDT spec */
-	node.address_cells = 2;
-	node.size_cells	   = 1;
-
-	info->fn(&node, NULL, info->fn_priv);
-
-	while (DATA32(*data) != FDT_END_NODE) {
-		switch (DATA32(*data)) {
-		case FDT_PROP:
-			prop.node = &node;
-			*data += sizeof(u32);
-			prop.len = DATA32(*data);
-			*data += sizeof(u32);
-			prop.name = &info->str[DATA32(*data)];
-			*data += sizeof(u32);
-			prop.value = *data;
-			*data += prop.len;
-			while ((ulong)(*data) % sizeof(u32) != 0)
-				(*data)++;
-			info->fn(&node, &prop, info->fn_priv);
-			break;
-		case FDT_NOP:
-			*data += sizeof(u32);
-			break;
-		case FDT_BEGIN_NODE:
-			recursive_iter(data, info, &node);
-			break;
-		default:
-			return;
-		};
-	}
-
-	*data += sizeof(u32);
-}
-
-struct match_iter_info {
-	int (*match)(const struct fdt_node *node, const struct fdt_prop *prop,
-		     void *priv);
-	void *match_priv;
-	void (*fn)(const struct fdt_node *node, const struct fdt_prop *prop,
-		   void *priv);
-	void *fn_priv;
-	const char *str;
-};
-
-static void match_iter(const struct fdt_node *node, const struct fdt_prop *prop,
-		       void *priv)
-{
-	char *data;
-	struct match_iter_info *minfo = priv;
-	struct fdt_prop nprop;
-
-	/* Do nothing if node+prop dont match */
-	if (!minfo->match(node, prop, minfo->match_priv))
-		return;
-
-	/* Call function for node */
-	if (minfo->fn)
-		minfo->fn(node, NULL, minfo->fn_priv);
-
-	/* Convert node to character stream */
-	data = node->data;
-	data += sizeof(u32);
-
-	/* Skip node name */
-	data += sbi_strlen(data) + 1;
-	while ((ulong)(data) % sizeof(u32) != 0)
-		data++;
-
-	/* Find node property and its value */
-	while (DATA32(data) == FDT_PROP) {
-		nprop.node = node;
-		data += sizeof(u32);
-		nprop.len = DATA32(data);
-		data += sizeof(u32);
-		nprop.name = &minfo->str[DATA32(data)];
-		data += sizeof(u32);
-		nprop.value = data;
-		data += nprop.len;
-		while ((ulong)(data) % sizeof(u32) != 0)
-			(data)++;
-		/* Call function for every property */
-		if (minfo->fn)
-			minfo->fn(node, &nprop, minfo->fn_priv);
-	}
-}
-
-int fdt_match_node_prop(void *fdt,
-			int (*match)(const struct fdt_node *node,
-				     const struct fdt_prop *prop, void *priv),
-			void *match_priv,
-			void (*fn)(const struct fdt_node *node,
-				   const struct fdt_prop *prop, void *priv),
-			void *fn_priv)
-{
-	char *data;
-	u32 string_offset, data_offset;
-	struct fdt_header *header;
-	struct match_iter_info minfo;
-	struct recursive_iter_info rinfo;
-
-	if (!fdt || !match)
-		return -1;
-
-	header = fdt;
-	if (fdt_rev32(header->magic) != FDT_MAGIC ||
-	    fdt_rev32(header->last_comp_version) > FDT_VERSION)
-		return -1;
-	string_offset = fdt_rev32(header->off_dt_strings);
-	data_offset   = fdt_rev32(header->off_dt_struct);
-
-	minfo.match	 = match;
-	minfo.match_priv = match_priv;
-	minfo.fn	 = fn;
-	minfo.fn_priv	 = fn_priv;
-	minfo.str	 = (const char *)(fdt + string_offset);
-
-	rinfo.fn      = match_iter;
-	rinfo.fn_priv = &minfo;
-	rinfo.str     = minfo.str;
-
-	data = (char *)(fdt + data_offset);
-	recursive_iter(&data, &rinfo, NULL);
-
-	return 0;
-}
-
-struct match_compat_info {
-	const char *compat;
-};
-
-static int match_compat(const struct fdt_node *node,
-			const struct fdt_prop *prop, void *priv)
-{
-	struct match_compat_info *cinfo = priv;
-
-	if (!prop)
-		return 0;
-
-	if (sbi_strcmp(prop->name, "compatible"))
-		return 0;
-
-	if (fdt_prop_string_index(prop, cinfo->compat) < 0)
-		return 0;
-
-	return 1;
-}
-
-int fdt_compat_node_prop(void *fdt, const char *compat,
-			 void (*fn)(const struct fdt_node *node,
-				    const struct fdt_prop *prop, void *priv),
-			 void *fn_priv)
-{
-	struct match_compat_info cinfo = { .compat = compat };
-
-	return fdt_match_node_prop(fdt, match_compat, &cinfo, fn, fn_priv);
-}
-
-static int match_walk(const struct fdt_node *node, const struct fdt_prop *prop,
-		      void *priv)
-{
-	if (!prop)
-		return 1;
-
-	return 0;
-}
-
-int fdt_walk(void *fdt,
-	     void (*fn)(const struct fdt_node *node,
-			const struct fdt_prop *prop, void *priv),
-	     void *fn_priv)
-{
-	return fdt_match_node_prop(fdt, match_walk, NULL, fn, fn_priv);
-}
-
-u32 fdt_size(void *fdt)
-{
-	struct fdt_header *header;
-
-	if (!fdt)
-		return 0;
-
-	header = fdt;
-	if (fdt_rev32(header->magic) != FDT_MAGIC ||
-	    fdt_rev32(header->last_comp_version) > FDT_VERSION)
-		return 0;
-
-	return fdt_rev32(header->totalsize);
-}

From cd2dfdc870ed3a03c3afc28e25f770fada0a396e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 18 Jun 2019 14:54:07 -0700
Subject: [PATCH 0272/1765] docs: Update docs as per new static library.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 docs/contributing.md   | 3 ++-
 docs/library_usage.md  | 6 +++++-
 docs/platform_guide.md | 2 +-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index 7b9898f7080..9c2b3ba2c81 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -24,7 +24,8 @@ Every submitted patch must have this tag.
 followed by a description of the patch content. A blank line and the author
 Signed-off-by tag must follow this description.
 4. A commit subject line must start with a prefix followed by a ":". Common
-prefixes are for example "lib:", "platform:", "firmware:", "docs:" and "top:".
+prefixes are for example "lib:", "platform:", "firmware:", "docs:", "utils:"
+and "top:".
 5. Maintainers should use "Rebase and Merge" when using GitHub to merge pull
 requests to avoid creating unnecessary merge commits.
 6. Maintainers should avoid creating branches directly in the main
diff --git a/docs/library_usage.md b/docs/library_usage.md
index 92d51f5f4ae..d765fa9afa1 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -8,7 +8,11 @@ OpenSBI provides two types of static libraries:
    hooks for the execution of this interface must be provided by the firmware or
    bootloader linking with this library. This library is installed as
    *<install_directory>/lib/libsbi.a*
-2. *libplatsbi.a* - An example platform-specific static library integrating
+2. *libsbiutils.a* - A static library that will contain all common code required
+   by any platform supported in OpenSBI. It will be built by default and included
+   in libplatsbi.a. This library is installed as
+   *<install_directory>/lib/libsbiutils.a*.
+3. *libplatsbi.a* - An example platform-specific static library integrating
    *libsbi.a* with platform-specific hooks. This library is available only for
    the platforms supported by OpenSBI. This library is installed as
    *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index 53e9394db6b..7920fac2af3 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -30,7 +30,7 @@ Support for a new platform named *<xyz>* can be added as follows:
 1. Create a directory named *<xyz>* under the *platform/* directory.
 2. Create a platform configuration file named *config.mk* under the
    *platform/<xyz>/* directory. This configuration file will provide
-   compiler flags, select common drivers, and select firmware options.
+   compiler flags, and select firmware options.
 3. Create a *platform/<xyz>/objects.mk* file for listing the
    platform-specific object files to be compiled.
 4. Create a *platform/<xyz>/platform.c* file providing a *struct sbi_platform*

From 65aa5873c377cfd01f4923e02871e401be644162 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 20 Jun 2019 15:01:10 +0800
Subject: [PATCH 0273/1765] firmware: Handle overlapping load and link
 addresses in relocation

The old code may corrupt the code of the waiting hart hence this patch
keeps waiting HART within relocation code range at time of relocation.

Signed-off-by: Xiang W <wxjstz@126.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 60 ++++++++++++++++++++++++++++++----------------
 1 file changed, 39 insertions(+), 21 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 6270bbc1f08..213396a366a 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -48,7 +48,7 @@ _start:
 	 * that is, for mhartid != 0
 	 */
 	csrr	a6, CSR_MHARTID
-	blt	zero, a6, _wait_for_boot_hart
+	blt	zero, a6, _wait_relocate_copy_done
 
 	/* Save load address */
 	la	t0, _load_start
@@ -72,7 +72,7 @@ _relocate:
 	blt	t2, t0, _relocate_copy_to_upper
 _relocate_copy_to_lower:
 	ble	t1, t2, _relocate_copy_to_lower_loop
-	la	t3, _boot_hart_done
+	la	t3, _boot_status
 	BRANGE	t2, t1, t3, _start_hang
 	la	t3, _relocate
 	la	t5, _relocate_done
@@ -88,7 +88,7 @@ _relocate_copy_to_lower_loop:
 	jr	t4
 _relocate_copy_to_upper:
 	ble	t3, t0, _relocate_copy_to_upper_loop
-	la	t2, _boot_hart_done
+	la	t2, _boot_status
 	BRANGE	t0, t3, t2, _start_hang
 	la	t2, _relocate
 	la	t5, _relocate_done
@@ -102,8 +102,34 @@ _relocate_copy_to_upper_loop:
 	REG_S	t2, 0(t1)
 	blt	t0, t1, _relocate_copy_to_upper_loop
 	jr	t4
+_wait_relocate_copy_done:
+	la	t0, _start
+	la	t1, _link_start
+	REG_L	t1, 0(t1)
+	la	t2, _boot_status
+	sub	t2, t2, t0
+	add	t2, t2, t1
+	la	t3, _wait_for_boot_hart
+	sub	t3, t3, t0
+	add	t3, t3, t1
+1:
+	/* waitting for relocate copy done (_boot_status == 1) */
+	li	t4, 1
+	REG_L	t5, 0(t2)
+	/* Reduce the bus traffic so that boot hart may proceed faster */
+	nop
+	nop
+	nop
+	bne	t4, t5, 1b
+	jr	t3
 _relocate_done:
 
+	/* mark relocate copy done */
+	la	t0, _boot_status
+	li	t1, 1
+	REG_S	t1, 0(t0)
+	fence	rw, rw
+
 	/* At this point we are running from link address */
 
 	/* Reset all registers for boot HART */
@@ -274,31 +300,23 @@ _fdt_reloc_again:
 	blt	t1, t2, _fdt_reloc_again
 _fdt_reloc_done:
 
-	/* Update boot hart flag */
-	la	a4, _boot_hart_done
-	la	a5, _start_warm
-	REG_S	a5, (a4)
-	fence	rw, rw
-	la	t0, _link_start
-	REG_L	t0, 0(t0)
-	sub	a4, a4, t0
-	la	t0, _load_start
-	REG_L	t0, 0(t0)
-	add	a4, a4, t0
-	REG_S	a5, (a4)
+	/* mark boot hart done */
+	li	t0, 2
+	la	t1, _boot_status
+	REG_S	t0, 0(t1)
 	fence	rw, rw
 	j	_start_warm
 
-	/* Wait for boot hart */
+	/* waitting for boot hart done (_boot_status == 2) */
 _wait_for_boot_hart:
-	la	a4, _boot_hart_done
-	REG_L	a5, 0(a4)
+	li	t0, 2
+	la	t1, _boot_status
+	REG_L	t1, 0(t1)
 	/* Reduce the bus traffic so that boot hart may proceed faster */
 	nop
 	nop
 	nop
-	beqz	a5, _wait_for_boot_hart
-	jr	a5
+	bne	t0, t1, _wait_for_boot_hart
 
 _start_warm:
 	/* Reset all registers for non-boot HARTs */
@@ -352,7 +370,7 @@ _start_warm:
 	j	_start_hang
 
 	.align 3
-_boot_hart_done:
+_boot_status:
 	RISCV_PTR	0
 _load_start:
 	RISCV_PTR	_fw_start

From c6d06a94486479bf36f5325d83847d478907195a Mon Sep 17 00:00:00 2001
From: Panagiotis Peristerakis <perister@ics.forth.gr>
Date: Fri, 21 Jun 2019 11:47:35 +0300
Subject: [PATCH 0274/1765] Changed plic_set_thresh() and plic_set_ie() to
 public

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
---
 include/sbi_utils/irqchip/plic.h | 4 ++++
 lib/utils/irqchip/plic.c         | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index eb97123bd54..8d6cefad602 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -18,4 +18,8 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
 
 int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
 
+void plic_set_thresh(u32 cntxid, u32 val);
+
+void plic_set_ie(u32 cntxid, u32 word_index, u32 val);
+
 #endif
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 0479186e413..2cd055e6869 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -33,14 +33,14 @@ static void plic_set_priority(u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
-static void plic_set_thresh(u32 cntxid, u32 val)
+void plic_set_thresh(u32 cntxid, u32 val)
 {
 	volatile void *plic_thresh =
 		plic_base + PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
 	writel(val, plic_thresh);
 }
 
-static void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
+void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 {
 	volatile void *plic_ie =
 		plic_base + PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;

From b44e844880d05c14ea90604c8d2f4d07878a18b9 Mon Sep 17 00:00:00 2001
From: Panagiotis Peristerakis <perister@ics.forth.gr>
Date: Fri, 28 Jun 2019 16:51:52 +0300
Subject: [PATCH 0275/1765] Add support for Ariane FPGA SoC

This patch adds support for Ariane platform.
We needed to enable PLIC interrupts early(like on BBL) due to some issue of the design.
Otherwise, Linux would not get any external interrupts.

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
---
 platform/ariane-fpga/config.mk  |  41 +++++++
 platform/ariane-fpga/objects.mk |   8 ++
 platform/ariane-fpga/platform.c | 201 ++++++++++++++++++++++++++++++++
 3 files changed, 250 insertions(+)
 create mode 100644 platform/ariane-fpga/config.mk
 create mode 100644 platform/ariane-fpga/objects.mk
 create mode 100644 platform/ariane-fpga/platform.c

diff --git a/platform/ariane-fpga/config.mk b/platform/ariane-fpga/config.mk
new file mode 100644
index 00000000000..ae6d3cd347b
--- /dev/null
+++ b/platform/ariane-fpga/config.mk
@@ -0,0 +1,41 @@
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2019 FORTH-ICS/CARV
+#		Panagiotis Peristerakis <perister@ics.forth.gr>
+#
+
+#for more infos, check out /platform/template/config.mk
+
+PLATFORM_RISCV_XLEN = 64
+
+# Common drivers to enable
+PLATFORM_SERIAL_UART8250=y
+PLATFORM_IRQCHIP_PLIC=y
+PLATFORM_SYS_CLINT=y
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_JUMP=n
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+ # This needs to be 4MB aligned for 32-bit support
+ FW_JUMP_ADDR=0x80400000
+ else
+ # This needs to be 2MB aligned for 64-bit support
+ FW_JUMP_ADDR=0x80200000
+ endif
+FW_JUMP_FDT_ADDR=0x82200000
+
+# Firmware with payload configuration.
+FW_PAYLOAD=y
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# This needs to be 4MB aligned for 32-bit support
+  FW_PAYLOAD_OFFSET=0x400000
+else
+# This needs to be 2MB aligned for 64-bit support
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=0x82200000
+FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/ariane-fpga/objects.mk b/platform/ariane-fpga/objects.mk
new file mode 100644
index 00000000000..520b00af951
--- /dev/null
+++ b/platform/ariane-fpga/objects.mk
@@ -0,0 +1,8 @@
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2019 FORTH-ICS/CARV
+#		Panagiotis Peristerakis <perister@ics.forth.gr>
+#
+
+platform-objs-y += platform.o
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
new file mode 100644
index 00000000000..62ab9ea861e
--- /dev/null
+++ b/platform/ariane-fpga/platform.c
@@ -0,0 +1,201 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 FORTH-ICS/CARV
+ *				Panagiotis Peristerakis <perister@ics.forth.gr>
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_hart.h>
+#include <libfdt.h>
+#include <fdt.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi/riscv_io.h>
+
+#define ARIANE_UART_ADDR			0x10000000
+#define ARIANE_UART_FREQ			50000000
+#define ARIANE_UART_BAUDRATE			115200
+#define ARIANE_UART_REG_SHIFT			2
+#define ARIANE_UART_REG_WIDTH			4
+#define ARIANE_PLIC_ADDR			0xc000000
+#define ARIANE_PLIC_NUM_SOURCES			3
+#define ARIANE_HART_COUNT			1
+#define ARIANE_CLINT_ADDR 0x2000000
+#define PLIC_ENABLE_BASE		0x2000
+#define PLIC_ENABLE_STRIDE		0x80
+#define PLIC_CONTEXT_BASE		0x200000
+#define PLIC_CONTEXT_STRIDE		0x1000
+
+#define SBI_ARIANE_FEATURES	\
+	(SBI_PLATFORM_HAS_TIMER_VALUE | \
+	 SBI_PLATFORM_HAS_SCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+
+
+/*
+ * Ariane platform early initialization.
+ */
+static int ariane_early_init(bool cold_boot)
+{
+	/* For now nothing to do. */
+	return 0;
+}
+
+/*
+ * Ariane platform final initialization.
+ */
+static int ariane_final_init(bool cold_boot)
+{
+	void *fdt;
+
+	if (!cold_boot)
+		return 0;
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	plic_fdt_fixup(fdt, "riscv,plic0");
+	return 0;
+}
+
+/*
+ * Initialize the ariane console.
+ */
+static int ariane_console_init(void)
+{
+	return uart8250_init(ARIANE_UART_ADDR,
+						 ARIANE_UART_FREQ,
+						 ARIANE_UART_BAUDRATE,
+						ARIANE_UART_REG_SHIFT,
+						ARIANE_UART_REG_WIDTH);
+}
+
+static int plic_ariane_warm_irqchip_init(u32 target_hart,
+			   int m_cntx_id, int s_cntx_id)
+{
+	size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
+
+	if (ARIANE_HART_COUNT <= target_hart)
+		return -1;
+	/* By default, enable all IRQs for M-mode of target HART */
+	if (m_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(m_cntx_id, i, 1);
+	}
+	/* Enable all IRQs for S-mode of target HART */
+	if (s_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(s_cntx_id, i, 1);
+	}
+	/* By default, enable M-mode threshold */
+	if (m_cntx_id > -1)
+		plic_set_thresh(m_cntx_id, 1);
+	/* By default, disable S-mode threshold */
+	if (s_cntx_id > -1)
+		plic_set_thresh(s_cntx_id, 0);
+
+	return 0;
+}
+
+/*
+ * Initialize the ariane interrupt controller for current HART.
+ */
+static int ariane_irqchip_init(bool cold_boot)
+{
+	u32 hartid = sbi_current_hartid();
+	int ret;
+
+	if (cold_boot) {
+		ret = plic_cold_irqchip_init(ARIANE_PLIC_ADDR,
+					     ARIANE_PLIC_NUM_SOURCES,
+					     ARIANE_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+	return plic_ariane_warm_irqchip_init(hartid,
+					2 * hartid, 2 * hartid + 1);
+}
+
+/*
+ * Initialize IPI for current HART.
+ */
+static int ariane_ipi_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_ipi_init(ARIANE_CLINT_ADDR,
+					  ARIANE_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+/*
+ * Initialize ariane timer for current HART.
+ */
+static int ariane_timer_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_timer_init(ARIANE_CLINT_ADDR,
+							ARIANE_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_timer_init();
+}
+
+/*
+ * Reboot the ariane.
+ */
+static int ariane_system_reboot(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System reboot\n");
+	return 0;
+}
+
+/*
+ * Shutdown or poweroff the ariane.
+ */
+static int ariane_system_shutdown(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System shutdown\n");
+	return 0;
+}
+
+/*
+ * Platform descriptor.
+ */
+const struct sbi_platform platform = {
+	.name = "ARIANE RISC-V",
+	.features = SBI_ARIANE_FEATURES,
+	.hart_count = ARIANE_HART_COUNT,
+	.hart_stack_size = 4096,
+	.disabled_hart_mask = 0,
+	.early_init = ariane_early_init,
+	.final_init = ariane_final_init,
+	.console_init = ariane_console_init,
+	.console_putc = uart8250_putc,
+	.console_getc = uart8250_getc,
+	.irqchip_init = ariane_irqchip_init,
+	.ipi_init = ariane_ipi_init,
+	.ipi_send = clint_ipi_send,
+	.ipi_sync = clint_ipi_sync,
+	.ipi_clear = clint_ipi_clear,
+	.timer_init = ariane_timer_init,
+	.timer_value = clint_timer_value,
+	.timer_event_start = clint_timer_event_start,
+	.timer_event_stop = clint_timer_event_stop,
+	.system_reboot = ariane_system_reboot,
+	.system_shutdown = ariane_system_shutdown
+};

From 3048f979cab3d0f42461bd4d96a4bdecf1791f62 Mon Sep 17 00:00:00 2001
From: Panagiotis Peristerakis <perister@ics.forth.gr>
Date: Thu, 27 Jun 2019 18:28:50 +0300
Subject: [PATCH 0276/1765] Add documentation for Ariane FPGA platform

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
---
 docs/platform/ariane-fpga.md | 37 ++++++++++++++++++++++++++++++++++++
 docs/platform/platform.md    |  4 ++++
 2 files changed, 41 insertions(+)
 create mode 100644 docs/platform/ariane-fpga.md

diff --git a/docs/platform/ariane-fpga.md b/docs/platform/ariane-fpga.md
new file mode 100644
index 00000000000..e8e46008dd6
--- /dev/null
+++ b/docs/platform/ariane-fpga.md
@@ -0,0 +1,37 @@
+Ariane FPGA SoC Platform
+==========================
+Ariane is a 6-stage, single issue, in-order CPU which implements the 64-bit RISC-V instruction set.
+The Ariane FPGA development platform is based on FPGA FPGA SoC(which currently supports only  Genesys 2 board) and is capable
+of running Linux.
+ The FPGA SoC currently contains the following peripherals:
+- DDR3 memory controller
+- SPI controller to conncet to an SDCard
+- Ethernet controller
+- JTAG port (see debugging section below)
+- Bootrom containing zero stage bootloader and device tree.
+
+To build platform specific library and firmwares, provide the
+*PLATFORM=ariane-fpga* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *Ariane FPGA* platform does not have any platform-specific
+options.
+
+Building Ariane FPGA Platform
+-----------------------------
+**Linux Kernel Payload**
+
+
+```
+make PLATFORM=ariane-fpga FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Booting Ariane FPGA Platform
+-----------------------------
+
+**Linux Kernel Payload**
+
+As Linux kernel image is embedded in the OpenSBI firmware binary, Ariane will directly
+boot into Linux directly after powered on.
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 2235b6a66e7..49fa3e9900d 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -21,6 +21,9 @@ OpenSBI currently supports the following virtual and hardware platforms:
 * **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on
   boards such as the Kendryte KD233 or the Sipeed MAIX Dock.
 
+* **Ariane FPGA SoC**: Platform support for the Ariane FPGA SoC used on
+  Genesys 2 board.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -30,3 +33,4 @@ facilitate the implementation.
 [qemu_virt.md]: qemu_virt.md
 [qemu_sifive_u.md]: qemu_sifive_u.md
 [sifive_fu540.md]: sifive_fu540.md
+[ariane-fpga.md]: ariane-fpga.md

From fa6fd6bf86e97140cf3c991f605cf04a0b24ab50 Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 29 Jun 2019 16:18:04 +0800
Subject: [PATCH 0277/1765] include: Move callbacks in sbi_platform to separate
 struct

Move platform opensbi functions to sbi_platform_operations structure.
Both sbi_platform and sbi_platform_operations structures are maintained
by platform vendors.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 123 +++++++++++++++++-------------
 platform/ariane-fpga/platform.c   |  16 ++--
 platform/kendryte/k210/platform.c |  25 +++---
 platform/qemu/sifive_u/platform.c |  48 ++++++------
 platform/qemu/virt/platform.c     |  48 ++++++------
 platform/sifive/fu540/platform.c  |  48 ++++++------
 platform/template/platform.c      |  62 +++++++--------
 7 files changed, 198 insertions(+), 172 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e46acfdd7cc..824522e858b 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -18,6 +18,10 @@
 #define SBI_PLATFORM_HART_COUNT_OFFSET (0x48)
 /** Offset of hart_stack_size in struct sbi_platform */
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c)
+/** Offset of disabled_hart_mask in struct sbi_platform */
+#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x50)
+/** Offset of platform_ops_addr in struct sbi_platform */
+#define SBI_PLATFORM_OPS_OFFSET (0x58)
 
 #ifndef __ASSEMBLY__
 
@@ -45,19 +49,8 @@ enum sbi_platform_features {
 	 SBI_PLATFORM_HAS_SCOUNTEREN | SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
-/** Representation of a platform */
-struct sbi_platform {
-	/** Name of the platform */
-	char name[64];
-	/** Supported features */
-	u64 features;
-	/** Total number of HARTs */
-	u32 hart_count;
-	/** Per-HART stack size for exception/interrupt handling */
-	u32 hart_stack_size;
-	/** Mask representing the set of disabled HARTs */
-	u64 disabled_hart_mask;
-
+/** Platform functions */
+struct sbi_platform_operations {
 	/** Platform early initialization */
 	int (*early_init)(bool cold_boot);
 	/** Platform final initialization */
@@ -106,13 +99,33 @@ struct sbi_platform {
 	int (*system_shutdown)(u32 type);
 } __packed;
 
+/** Representation of a platform */
+struct sbi_platform {
+	/** Name of the platform */
+	char name[64];
+	/** Supported features */
+	u64 features;
+	/** Total number of HARTs */
+	u32 hart_count;
+	/** Per-HART stack size for exception/interrupt handling */
+	u32 hart_stack_size;
+	/** Mask representing the set of disabled HARTs */
+	u64 disabled_hart_mask;
+	/** Pointer to sbi platform operations */
+	unsigned long platform_ops_addr;
+} __packed;
+
 /** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s) \
 	((const struct sbi_platform *)((__s)->platform_addr))
 /** Get pointer to sbi_platform for current HART */
 #define sbi_platform_thishart_ptr()                               \
 	((const struct sbi_platform *)(sbi_scratch_thishart_ptr() \
-					       ->platform_addr))
+						>platform_addr))
+/** Get pointer to platform_ops_addr from platform pointer **/
+#define sbi_platform_ops(__p) \
+	((const struct sbi_platform_operations *)(__p)->platform_ops_addr)
+
 /** Check whether the platform supports timer value */
 #define sbi_platform_has_timer_value(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
@@ -200,8 +213,8 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 static inline int sbi_platform_early_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
-	if (plat && plat->early_init)
-		return plat->early_init(cold_boot);
+	if (plat && sbi_platform_ops(plat)->early_init)
+		return sbi_platform_ops(plat)->early_init(cold_boot);
 	return 0;
 }
 
@@ -216,8 +229,8 @@ static inline int sbi_platform_early_init(const struct sbi_platform *plat,
 static inline int sbi_platform_final_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
-	if (plat && plat->final_init)
-		return plat->final_init(cold_boot);
+	if (plat && sbi_platform_ops(plat)->final_init)
+		return sbi_platform_ops(plat)->final_init(cold_boot);
 	return 0;
 }
 
@@ -232,8 +245,8 @@ static inline int sbi_platform_final_init(const struct sbi_platform *plat,
 static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat,
 						u32 hartid)
 {
-	if (plat && plat->pmp_region_count)
-		return plat->pmp_region_count(hartid);
+	if (plat && sbi_platform_ops(plat)->pmp_region_count)
+		return sbi_platform_ops(plat)->pmp_region_count(hartid);
 	return 0;
 }
 
@@ -251,13 +264,13 @@ static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat,
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
-					       u32 hartid, u32 index,
-					       ulong *prot, ulong *addr,
-					       ulong *log2size)
+						u32 hartid, u32 index,
+						ulong *prot, ulong *addr,
+						ulong *log2size)
 {
-	if (plat && plat->pmp_region_info)
-		return plat->pmp_region_info(hartid, index, prot, addr,
-					     log2size);
+	if (plat && sbi_platform_ops(plat)->pmp_region_info)
+		return sbi_platform_ops(plat)->pmp_region_info(hartid, index, prot, addr,
+                                                                              log2size);
 	return 0;
 }
 
@@ -268,10 +281,10 @@ static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
  * @param ch character to write
  */
 static inline void sbi_platform_console_putc(const struct sbi_platform *plat,
-					     char ch)
+						char ch)
 {
-	if (plat && plat->console_putc)
-		plat->console_putc(ch);
+	if (plat && sbi_platform_ops(plat)->console_putc)
+		sbi_platform_ops(plat)->console_putc(ch);
 }
 
 /**
@@ -283,8 +296,8 @@ static inline void sbi_platform_console_putc(const struct sbi_platform *plat,
  */
 static inline int sbi_platform_console_getc(const struct sbi_platform *plat)
 {
-	if (plat && plat->console_getc)
-		return plat->console_getc();
+	if (plat && sbi_platform_ops(plat)->console_getc)
+		return sbi_platform_ops(plat)->console_getc();
 	return -1;
 }
 
@@ -297,8 +310,8 @@ static inline int sbi_platform_console_getc(const struct sbi_platform *plat)
  */
 static inline int sbi_platform_console_init(const struct sbi_platform *plat)
 {
-	if (plat && plat->console_init)
-		return plat->console_init();
+	if (plat && sbi_platform_ops(plat)->console_init)
+		return sbi_platform_ops(plat)->console_init();
 	return 0;
 }
 
@@ -313,8 +326,8 @@ static inline int sbi_platform_console_init(const struct sbi_platform *plat)
 static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
 					    bool cold_boot)
 {
-	if (plat && plat->irqchip_init)
-		return plat->irqchip_init(cold_boot);
+	if (plat && sbi_platform_ops(plat)->irqchip_init)
+		return sbi_platform_ops(plat)->irqchip_init(cold_boot);
 	return 0;
 }
 
@@ -327,8 +340,8 @@ static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
 static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
 					 u32 target_hart)
 {
-	if (plat && plat->ipi_send)
-		plat->ipi_send(target_hart);
+	if (plat && sbi_platform_ops(plat)->ipi_send)
+		sbi_platform_ops(plat)->ipi_send(target_hart);
 }
 
 /**
@@ -340,8 +353,8 @@ static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
 static inline void sbi_platform_ipi_sync(const struct sbi_platform *plat,
 					 u32 target_hart)
 {
-	if (plat && plat->ipi_sync)
-		plat->ipi_sync(target_hart);
+	if (plat && sbi_platform_ops(plat)->ipi_sync)
+		sbi_platform_ops(plat)->ipi_sync(target_hart);
 }
 
 /**
@@ -353,8 +366,8 @@ static inline void sbi_platform_ipi_sync(const struct sbi_platform *plat,
 static inline void sbi_platform_ipi_clear(const struct sbi_platform *plat,
 					  u32 target_hart)
 {
-	if (plat && plat->ipi_clear)
-		plat->ipi_clear(target_hart);
+	if (plat && sbi_platform_ops(plat)->ipi_clear)
+		sbi_platform_ops(plat)->ipi_clear(target_hart);
 }
 
 /**
@@ -368,8 +381,8 @@ static inline void sbi_platform_ipi_clear(const struct sbi_platform *plat,
 static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
 					bool cold_boot)
 {
-	if (plat && plat->ipi_init)
-		return plat->ipi_init(cold_boot);
+	if (plat && sbi_platform_ops(plat)->ipi_init)
+		return sbi_platform_ops(plat)->ipi_init(cold_boot);
 	return 0;
 }
 
@@ -382,8 +395,8 @@ static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
  */
 static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
 {
-	if (plat && plat->timer_value)
-		return plat->timer_value();
+	if (plat && sbi_platform_ops(plat)->timer_value)
+		return sbi_platform_ops(plat)->timer_value();
 	return 0;
 }
 
@@ -396,8 +409,8 @@ static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
 static inline void
 sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event)
 {
-	if (plat && plat->timer_event_start)
-		plat->timer_event_start(next_event);
+	if (plat && sbi_platform_ops(plat)->timer_event_start)
+		sbi_platform_ops(plat)->timer_event_start(next_event);
 }
 
 /**
@@ -408,8 +421,8 @@ sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event)
 static inline void
 sbi_platform_timer_event_stop(const struct sbi_platform *plat)
 {
-	if (plat && plat->timer_event_stop)
-		plat->timer_event_stop();
+	if (plat && sbi_platform_ops(plat)->timer_event_stop)
+		sbi_platform_ops(plat)->timer_event_stop();
 }
 
 /**
@@ -423,8 +436,8 @@ sbi_platform_timer_event_stop(const struct sbi_platform *plat)
 static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
 					  bool cold_boot)
 {
-	if (plat && plat->timer_init)
-		return plat->timer_init(cold_boot);
+	if (plat && sbi_platform_ops(plat)->timer_init)
+		return sbi_platform_ops(plat)->timer_init(cold_boot);
 	return 0;
 }
 
@@ -439,8 +452,8 @@ static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
 static inline int sbi_platform_system_reboot(const struct sbi_platform *plat,
 					     u32 type)
 {
-	if (plat && plat->system_reboot)
-		return plat->system_reboot(type);
+	if (plat && sbi_platform_ops(plat)->system_reboot)
+		return sbi_platform_ops(plat)->system_reboot(type);
 	return 0;
 }
 
@@ -455,8 +468,8 @@ static inline int sbi_platform_system_reboot(const struct sbi_platform *plat,
 static inline int sbi_platform_system_shutdown(const struct sbi_platform *plat,
 					       u32 type)
 {
-	if (plat && plat->system_shutdown)
-		return plat->system_shutdown(type);
+	if (plat && sbi_platform_ops(plat)->system_shutdown)
+		return sbi_platform_ops(plat)->system_shutdown(type);
 	return 0;
 }
 
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 62ab9ea861e..9dbf3332302 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -176,12 +176,7 @@ static int ariane_system_shutdown(u32 type)
 /*
  * Platform descriptor.
  */
-const struct sbi_platform platform = {
-	.name = "ARIANE RISC-V",
-	.features = SBI_ARIANE_FEATURES,
-	.hart_count = ARIANE_HART_COUNT,
-	.hart_stack_size = 4096,
-	.disabled_hart_mask = 0,
+const struct sbi_platform_operations platform_ops = {
 	.early_init = ariane_early_init,
 	.final_init = ariane_final_init,
 	.console_init = ariane_console_init,
@@ -199,3 +194,12 @@ const struct sbi_platform platform = {
 	.system_reboot = ariane_system_reboot,
 	.system_shutdown = ariane_system_shutdown
 };
+
+const struct sbi_platform platform = {
+	.name = "ARIANE RISC-V",
+	.features = SBI_ARIANE_FEATURES,
+	.hart_count = ARIANE_HART_COUNT,
+	.hart_stack_size = 4096,
+	.disabled_hart_mask = 0,
+	.platform_ops_addr = (unsigned long)&platform_ops
+};
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 299b343951c..f332dab7f1f 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -93,18 +93,10 @@ static int k210_system_shutdown(u32 type)
 	return 0;
 }
 
-const struct sbi_platform platform = {
-
-	.name	  = "Kendryte K210",
-	.features = SBI_PLATFORM_HAS_TIMER_VALUE,
-
-	.hart_count	    = K210_HART_COUNT,
-	.hart_stack_size    = K210_HART_STACK_SIZE,
-	.disabled_hart_mask = 0,
-
-	.console_init = k210_console_init,
-	.console_putc = k210_console_putc,
-	.console_getc = k210_console_getc,
+const struct sbi_platform_operations platform_ops = {
+	.console_init	= k210_console_init,
+	.console_putc	= k210_console_putc,
+	.console_getc	= k210_console_getc,
 
 	.irqchip_init = k210_irqchip_init,
 
@@ -121,3 +113,12 @@ const struct sbi_platform platform = {
 	.system_reboot	 = k210_system_reboot,
 	.system_shutdown = k210_system_shutdown
 };
+
+const struct sbi_platform platform = {
+	.name			= "Kendryte K210",
+	.features		= SBI_PLATFORM_HAS_TIMER_VALUE,
+	.hart_count		= K210_HART_COUNT,
+	.hart_stack_size	= K210_HART_STACK_SIZE,
+	.disabled_hart_mask	= 0,
+	.platform_ops_addr	= (unsigned long)&platform_ops
+};
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index e20d89d2a49..aaacb3f4b69 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -127,27 +127,31 @@ static int sifive_u_system_down(u32 type)
 	return 0;
 }
 
+const struct sbi_platform_operations platform_ops = {
+	.pmp_region_count	= sifive_u_pmp_region_count,
+	.pmp_region_info	= sifive_u_pmp_region_info,
+	.final_init		= sifive_u_final_init,
+	.console_putc		= sifive_uart_putc,
+	.console_getc		= sifive_uart_getc,
+	.console_init		= sifive_u_console_init,
+	.irqchip_init		= sifive_u_irqchip_init,
+	.ipi_send		= clint_ipi_send,
+	.ipi_sync		= clint_ipi_sync,
+	.ipi_clear		= clint_ipi_clear,
+	.ipi_init		= sifive_u_ipi_init,
+	.timer_value		= clint_timer_value,
+	.timer_event_stop	= clint_timer_event_stop,
+	.timer_event_start	= clint_timer_event_start,
+	.timer_init		= sifive_u_timer_init,
+	.system_reboot		= sifive_u_system_down,
+	.system_shutdown	= sifive_u_system_down
+};
+
 const struct sbi_platform platform = {
-	.name		    = "QEMU SiFive Unleashed",
-	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count	    = SIFIVE_U_HART_COUNT,
-	.hart_stack_size    = SIFIVE_U_HART_STACK_SIZE,
-	.disabled_hart_mask = 0,
-	.pmp_region_count   = sifive_u_pmp_region_count,
-	.pmp_region_info    = sifive_u_pmp_region_info,
-	.final_init	    = sifive_u_final_init,
-	.console_putc	    = sifive_uart_putc,
-	.console_getc	    = sifive_uart_getc,
-	.console_init	    = sifive_u_console_init,
-	.irqchip_init	    = sifive_u_irqchip_init,
-	.ipi_send	    = clint_ipi_send,
-	.ipi_sync	    = clint_ipi_sync,
-	.ipi_clear	    = clint_ipi_clear,
-	.ipi_init	    = sifive_u_ipi_init,
-	.timer_value	    = clint_timer_value,
-	.timer_event_stop   = clint_timer_event_stop,
-	.timer_event_start  = clint_timer_event_start,
-	.timer_init	    = sifive_u_timer_init,
-	.system_reboot	    = sifive_u_system_down,
-	.system_shutdown    = sifive_u_system_down
+	.name			= "QEMU SiFive Unleashed",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= SIFIVE_U_HART_COUNT,
+	.hart_stack_size	= SIFIVE_U_HART_STACK_SIZE,
+	.disabled_hart_mask	= 0,
+	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 697549f6035..dbe593b7008 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -132,27 +132,31 @@ static int virt_system_down(u32 type)
 	return 0;
 }
 
+const struct sbi_platform_operations platform_ops = {
+	.pmp_region_count	= virt_pmp_region_count,
+	.pmp_region_info	= virt_pmp_region_info,
+	.final_init		= virt_final_init,
+	.console_putc		= uart8250_putc,
+	.console_getc		= uart8250_getc,
+	.console_init		= virt_console_init,
+	.irqchip_init		= virt_irqchip_init,
+	.ipi_send		= clint_ipi_send,
+	.ipi_sync		= clint_ipi_sync,
+	.ipi_clear		= clint_ipi_clear,
+	.ipi_init		= virt_ipi_init,
+	.timer_value		= clint_timer_value,
+	.timer_event_stop	= clint_timer_event_stop,
+	.timer_event_start	= clint_timer_event_start,
+	.timer_init		= virt_timer_init,
+	.system_reboot		= virt_system_down,
+	.system_shutdown	= virt_system_down
+};
+
 const struct sbi_platform platform = {
-	.name		    = "QEMU Virt Machine",
-	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count	    = VIRT_HART_COUNT,
-	.hart_stack_size    = VIRT_HART_STACK_SIZE,
-	.disabled_hart_mask = 0,
-	.pmp_region_count   = virt_pmp_region_count,
-	.pmp_region_info    = virt_pmp_region_info,
-	.final_init	    = virt_final_init,
-	.console_putc	    = uart8250_putc,
-	.console_getc	    = uart8250_getc,
-	.console_init	    = virt_console_init,
-	.irqchip_init	    = virt_irqchip_init,
-	.ipi_send	    = clint_ipi_send,
-	.ipi_sync	    = clint_ipi_sync,
-	.ipi_clear	    = clint_ipi_clear,
-	.ipi_init	    = virt_ipi_init,
-	.timer_value	    = clint_timer_value,
-	.timer_event_stop   = clint_timer_event_stop,
-	.timer_event_start  = clint_timer_event_start,
-	.timer_init	    = virt_timer_init,
-	.system_reboot	    = virt_system_down,
-	.system_shutdown    = virt_system_down
+	.name			= "QEMU Virt Machine",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= VIRT_HART_COUNT,
+	.hart_stack_size	= VIRT_HART_STACK_SIZE,
+	.disabled_hart_mask	= 0,
+	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 9e16562135c..e67f20aff9b 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -188,27 +188,31 @@ static int fu540_system_down(u32 type)
 	return 0;
 }
 
+const struct sbi_platform_operations platform_ops = {
+	.pmp_region_count	= fu540_pmp_region_count,
+	.pmp_region_info	= fu540_pmp_region_info,
+	.final_init		= fu540_final_init,
+	.console_putc		= sifive_uart_putc,
+	.console_getc		= sifive_uart_getc,
+	.console_init		= fu540_console_init,
+	.irqchip_init		= fu540_irqchip_init,
+	.ipi_send		= clint_ipi_send,
+	.ipi_sync		= clint_ipi_sync,
+	.ipi_clear		= clint_ipi_clear,
+	.ipi_init		= fu540_ipi_init,
+	.timer_value		= clint_timer_value,
+	.timer_event_stop	= clint_timer_event_stop,
+	.timer_event_start	= clint_timer_event_start,
+	.timer_init		= fu540_timer_init,
+	.system_reboot		= fu540_system_down,
+	.system_shutdown	= fu540_system_down
+};
+
 const struct sbi_platform platform = {
-	.name		    = "SiFive Freedom U540",
-	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count	    = FU540_HART_COUNT,
-	.hart_stack_size    = FU540_HART_STACK_SIZE,
-	.disabled_hart_mask = FU540_HARITD_DISABLED,
-	.pmp_region_count   = fu540_pmp_region_count,
-	.pmp_region_info    = fu540_pmp_region_info,
-	.final_init	    = fu540_final_init,
-	.console_putc	    = sifive_uart_putc,
-	.console_getc	    = sifive_uart_getc,
-	.console_init	    = fu540_console_init,
-	.irqchip_init	    = fu540_irqchip_init,
-	.ipi_send	    = clint_ipi_send,
-	.ipi_sync	    = clint_ipi_sync,
-	.ipi_clear	    = clint_ipi_clear,
-	.ipi_init	    = fu540_ipi_init,
-	.timer_value	    = clint_timer_value,
-	.timer_event_stop   = clint_timer_event_stop,
-	.timer_event_start  = clint_timer_event_start,
-	.timer_init	    = fu540_timer_init,
-	.system_reboot	    = fu540_system_down,
-	.system_shutdown    = fu540_system_down
+	.name			= "SiFive Freedom U540",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= FU540_HART_COUNT,
+	.hart_stack_size	= FU540_HART_STACK_SIZE,
+	.disabled_hart_mask	= FU540_HARITD_DISABLED,
+	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/template/platform.c b/platform/template/platform.c
index b8c627d3162..2ba549f8c13 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -12,9 +12,9 @@
  * Include these files as needed.
  * See config.mk PLATFORM_xxx configuration parameters.
  */
-#include <plat/irqchip/plic.h>
-#include <plat/serial/uart8250.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
 
 /*
  * Platform early initialization.
@@ -206,35 +206,31 @@ static int platform_system_shutdown(u32 type)
 /*
  * Platform descriptor.
  */
+const struct sbi_platform_operations platform_ops = {
+	.early_init		= platform_early_init,
+	.final_init		= platform_final_init,
+	.pmp_region_count	= platform_pmp_region_count,
+	.pmp_region_info	= platform_pmp_region_info,
+	.console_putc		= platform_console_putc,
+	.console_getc		= platform_console_getc,
+	.console_init		= platform_console_init,
+	.irqchip_init		= platform_irqchip_init,
+	.ipi_send		= platform_ipi_send,
+	.ipi_sync		= platform_ipi_sync,
+	.ipi_clear		= platform_ipi_clear,
+	.ipi_init		= platform_ipi_init,
+	.timer_value		= platform_timer_value,
+	.timer_event_stop	= platform_timer_event_stop,
+	.timer_event_start	= platform_timer_event_start,
+	.timer_init		= platform_timer_init,
+	.system_reboot		= platform_system_down,
+	.system_shutdown	= platform_system_down
+};
 const struct sbi_platform platform = {
-
-	.name		    = "platform-name",
-	.features	    = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count	    = 1,
-	.hart_stack_size    = 4096,
-	.disabled_hart_mask = 0,
-
-	.early_init = platform_early_init,
-	.final_init = platform_final_init,
-
-	.pmp_region_count = platform_pmp_region_count,
-	.pmp_region_info  = platform_pmp_region_info,
-
-	.console_init = platform_console_init,
-	.console_putc = platform_console_putc,
-	.console_getc = platform_console_getc,
-
-	.irqchip_init = platform_irqchip_init,
-	.ipi_init     = platform_ipi_init,
-	.ipi_send     = platform_ipi_send,
-	.ipi_sync     = platform_ipi_sync,
-	.ipi_clear    = platform_ipi_clear,
-
-	.timer_init	   = platform_timer_init,
-	.timer_value	   = platform_timer_value,
-	.timer_event_start = platform_timer_event_start,
-	.timer_event_stop  = platform_timer_event_stop,
-
-	.system_reboot	 = platform_system_reboot,
-	.system_shutdown = platform_system_shutdown
+	.name			= "platform-name",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= 1,
+	.hart_stack_size	= 4096,
+	.disabled_hart_mask	= 0,
+	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 08b196956d684678e930850bc1b54d602dfff555 Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 29 Jun 2019 16:18:05 +0800
Subject: [PATCH 0278/1765] include: Add version info to struct sbi_platform

Add version control of sbi_platform structure
- Add opensbi_version, this gives information of opensbi revision on
which the sbi_platform table was created.
- Add platform_version field in sbi_platform structure for platform
level version control.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                          |  4 ++--
 include/sbi/sbi_platform.h        | 40 ++++++++++++++++++++++++-------
 include/sbi/sbi_version.h         |  8 +++++++
 platform/ariane-fpga/platform.c   |  2 ++
 platform/kendryte/k210/platform.c |  2 ++
 platform/qemu/sifive_u/platform.c |  2 ++
 platform/qemu/virt/platform.c     |  2 ++
 platform/sifive/fu540/platform.c  |  2 ++
 platform/template/platform.c      |  2 ++
 scripts/create-binary-archive.sh  |  4 ++--
 10 files changed, 55 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index 3c3b046b46c..78c28c0fc3c 100644
--- a/Makefile
+++ b/Makefile
@@ -63,8 +63,8 @@ export libsbiutils_dir=$(CURDIR)/lib/utils
 export firmware_dir=$(CURDIR)/firmware
 
 # Find library version
-OPENSBI_VERSION_MAJOR=`grep MAJOR $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
-OPENSBI_VERSION_MINOR=`grep MINOR $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
+OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
+OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
 
 # Setup compilation commands
 ifdef CROSS_COMPILE
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 824522e858b..43993785787 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -10,21 +10,32 @@
 #ifndef __SBI_PLATFORM_H__
 #define __SBI_PLATFORM_H__
 
+/** OpenSBI 32-bit platform version with:
+ *  1. upper 16-bits as major number
+ *  2. lower 16-bits as minor number
+ */
+#define SBI_PLATFORM_VERSION(Major, Minor) ((Major << 16) | Minor)
+
+/** Offset of opensbi_version in struct sbi_platform */
+#define SBI_PLATFORM_OPENSBI_VERSION_OFFSET (0x00)
+/** Offset of platform_version in struct sbi_platform */
+#define SBI_PLATFORM_VERSION_OFFSET (0x04)
 /** Offset of name in struct sbi_platform */
-#define SBI_PLATFORM_NAME_OFFSET (0x0)
+#define SBI_PLATFORM_NAME_OFFSET (0x08)
 /** Offset of features in struct sbi_platform */
-#define SBI_PLATFORM_FEATURES_OFFSET (0x40)
+#define SBI_PLATFORM_FEATURES_OFFSET (0x48)
 /** Offset of hart_count in struct sbi_platform */
-#define SBI_PLATFORM_HART_COUNT_OFFSET (0x48)
+#define SBI_PLATFORM_HART_COUNT_OFFSET (0x50)
 /** Offset of hart_stack_size in struct sbi_platform */
-#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c)
+#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
 /** Offset of disabled_hart_mask in struct sbi_platform */
-#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x50)
+#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x58)
+#define SBI_PLATFORM_OPS_OFFSET (0x60)
 
 #ifndef __ASSEMBLY__
 
+#include <sbi/sbi_version.h>
 #include <sbi/sbi_scratch.h>
 
 /** Possible feature flags of a platform */
@@ -101,6 +112,18 @@ struct sbi_platform_operations {
 
 /** Representation of a platform */
 struct sbi_platform {
+	/**
+	 * OpenSBI version this sbi_platform is based on.
+	 * It's a 32-bit value where upper 16-bits are major number
+	 * and lower 16-bits are minor number
+	 */
+	u32 opensbi_version;
+	/**
+	 * OpenSBI platform version released by vendor.
+	 * It's a 32-bit value where upper 16-bits are major number
+	 * and lower 16-bits are minor number
+	 */
+	u32 platform_version;
 	/** Name of the platform */
 	char name[64];
 	/** Supported features */
@@ -119,9 +142,8 @@ struct sbi_platform {
 #define sbi_platform_ptr(__s) \
 	((const struct sbi_platform *)((__s)->platform_addr))
 /** Get pointer to sbi_platform for current HART */
-#define sbi_platform_thishart_ptr()                               \
-	((const struct sbi_platform *)(sbi_scratch_thishart_ptr() \
-						>platform_addr))
+#define sbi_platform_thishart_ptr() ((const struct sbi_platform *) \
+	(sbi_scratch_thishart_ptr()->platform_addr))
 /** Get pointer to platform_ops_addr from platform pointer **/
 #define sbi_platform_ops(__p) \
 	((const struct sbi_platform_operations *)(__p)->platform_ops_addr)
diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 90020ac7116..d1c39b07a3c 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -13,4 +13,12 @@
 #define OPENSBI_VERSION_MAJOR 0
 #define OPENSBI_VERSION_MINOR 3
 
+/**
+ *  OpenSBI 32-bit version with:
+ *  1. upper 16-bits as major number
+ *  2. lower 16-bits as minor number
+ */
+#define OPENSBI_VERSION ((OPENSBI_VERSION_MAJOR << 16) | \
+			 (OPENSBI_VERSION_MINOR))
+
 #endif
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 9dbf3332302..62cee906888 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -196,6 +196,8 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
+	.opensbi_version = OPENSBI_VERSION,
+	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name = "ARIANE RISC-V",
 	.features = SBI_ARIANE_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index f332dab7f1f..4c31ee9a3c8 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -115,6 +115,8 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version   	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "Kendryte K210",
 	.features		= SBI_PLATFORM_HAS_TIMER_VALUE,
 	.hart_count		= K210_HART_COUNT,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index aaacb3f4b69..d8b586fa866 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -148,6 +148,8 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "QEMU SiFive Unleashed",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= SIFIVE_U_HART_COUNT,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index dbe593b7008..1cf0b7d0f01 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -153,6 +153,8 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "QEMU Virt Machine",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= VIRT_HART_COUNT,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index e67f20aff9b..46b48b8be95 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -209,6 +209,8 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "SiFive Freedom U540",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= FU540_HART_COUNT,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 2ba549f8c13..148bfa9b8da 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -227,6 +227,8 @@ const struct sbi_platform_operations platform_ops = {
 	.system_shutdown	= platform_system_down
 };
 const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x00),
 	.name			= "platform-name",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= 1,
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index d5890fcda47..fcfb5cb7b6d 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -74,8 +74,8 @@ if [ -z "${BUILD_ARCHIVE_SUFFIX}" ]; then
 fi
 
 # Get version of OpenSBI
-BUILD_VERSION_MAJOR=$(grep MAJOR "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/')
-BUILD_VERSION_MINOR=$(grep MINOR "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/')
+BUILD_VERSION_MAJOR=$(grep "define OPENSBI_VERSION_MAJOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/')
+BUILD_VERSION_MINOR=$(grep "define OPENSBI_VERSION_MINOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/')
 
 # Setup archive name
 BUILD_ARCHIVE_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BUILD_RISCV_XLEN}-${BUILD_ARCHIVE_SUFFIX}"

From 9c18c2c61073cdd9a0f2e731dc8e2b2aa38ffb3f Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 29 Jun 2019 19:40:47 +0530
Subject: [PATCH 0279/1765] include: Add firmware context to sbi_platform

Add firmware context field struct sbi_platform to carry firmware
specific information.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 43993785787..e3377b49d52 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -32,6 +32,8 @@
 #define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
 /** Offset of platform_ops_addr in struct sbi_platform */
 #define SBI_PLATFORM_OPS_OFFSET (0x60)
+/** Offset of firmware_context in struct sbi_platform */
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
 
 #ifndef __ASSEMBLY__
 
@@ -136,6 +138,8 @@ struct sbi_platform {
 	u64 disabled_hart_mask;
 	/** Pointer to sbi platform operations */
 	unsigned long platform_ops_addr;
+	/** Pointer to system firmware specific context */
+	unsigned long firmware_context;
 } __packed;
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */

From d44bc16e4b6824e42dda463efd6926b944211c57 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 28 Jun 2019 18:00:15 -0700
Subject: [PATCH 0280/1765] docs: Update the fu540 platform guide for new DT.

With 5.2-rc6 release, Linux kernel hosts the DT for Unleashed board
which is incompatible with the default DT from FSBL.

Update the document to use the DT from kernel.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md | 112 +++++++++++++++++++---------------
 1 file changed, 62 insertions(+), 50 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 40ec8d1848f..2c30e574483 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -11,9 +11,10 @@ Platform Options
 ----------------
 
 As hart0 in the FU540 doesn't have an MMU, only harts 1-4 boot by default.
-A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided to
-select any other hart for booting. Please keep in mind that this is not
-platform wide option. It can only be specified for FU540 platform in following way.
+A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided
+to select any other hart for booting. Please keep in mind that this is not
+a generic option and it can only be specified for FU540 platform in the
+following way:
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
@@ -23,30 +24,40 @@ This will let the board boot only hart1 instead of default 1-4.
 Building SiFive Fu540 Platform
 -----------------------------
 
-In order to boot SMP Linux in U-Boot, Linux kernel higher than v.5.1-rc1 and
-latest U-Boot(at least HEAD should ffb269ab30db or after) should be used.
+In order to boot SMP Linux in U-Boot, Linux v5.1 (or higher) and latest
+U-Boot v2019.04 (or higher) should be used.
 
 **Linux Kernel Payload**
 
+The HiFive Unleashed device tree(DT) is merged in Linux v5.2 release. This
+DT (device tree) is not backward compatible with the DT passed from FSBL.
+
+To use Linux v5.2 (or higher, the pre-built DTB (DT binary) from Linux v5.2
+(or higher) should be used to build SiFive FU540 OpenSBI binaries by using
+the compile time option *FW_PAYLOAD_FDT_PATH*.
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+or
+(For Linux v5.2 or higher)
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
 ```
 
 **U-Boot Payload**
 
+The command-line example here assumes that U-Boot was compiled using the
+sifive_fu540_defconfig configuration and with U-Boot v2019.04 (or higher)
+having SMP support.
 
-The command-line example here assumes that U-Boot was compiled using sifive_fu540_defconfig configuration.
-
-With SMP support enabled in U-Boot:
+To use U-Boot which follows Linux v5.2 (or higher) DT bindings, we will
+need custom U-Boot with required driver changes which can be found in
+riscv_unleashed_mmc_spi_v2 branch of https://github.com/avpatel/u-boot.git
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
-```
-
-Without SMP support enabled in U-Boot:
-```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FU540_ENABLED_HART_MASK=0x02
+or
+(For U-Boot which follows Linux v5.2 (or higher) DT bindings)
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
 ```
 
 Generate the uImage from Linux Image.
@@ -58,8 +69,8 @@ mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux
 
 **U-Boot & Linux Kernel as a single payload**
 
-A single monolithic image containing both U-Boot & Linux can also be used if network boot setup is
-not available.  
+A single monolithic image containing both U-Boot & Linux can also be used if
+network boot setup is not available.
 
 1. Generate the uImage from Linux Image.
 ```
@@ -68,9 +79,9 @@ mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux
 		<linux_build_directory>/arch/riscv/boot/uImage
 ```
 
-2. Create a temporary image with u-boot.bin as the first payload. The command-line
-example here assumes that U-Boot was compiled using sifive_fu540_defconfig
-configuration.
+2. Create a temporary image with u-boot.bin as the first payload. The
+command-line example here assumes that U-Boot was compiled using
+sifive_fu540_defconfig configuration.
 ```
 dd if=~/workspace/u-boot-riscv/u-boot.bin of=/tmp/temp.bin bs=1M
 ```
@@ -81,27 +92,31 @@ dd if=<linux_build_directory>/arch/riscv/boot/uImage of=/tmp/temp.bin bs=1M seek
 4. Compile OpenSBI with temp.bin (generated in step 3) as payload.
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
+or
+(For U-Boot which follows Linux v5.2 (or higher) DT bindings)
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
 ```
 
 Flashing the OpenSBI firmware binary to storage media:
 -----------------------------------------------------
 The first stage boot loader([FSBL](https://github.com/sifive/freedom-u540-c000-bootloader))
-expects the storage media to have a GPT partition table. It tries to look for a
-partition with following GUID to load the next stage boot loader (OpenSBI in this case).
+expects the storage media to have a GPT partition table. It tries to look for
+a partition with following GUID to load the next stage boot loader (OpenSBI
+in this case).
 
 ```
 2E54B353-1271-4842-806F-E436D6AF6985
-``` 
+```
 
-That's why the generated firmware binary in above steps should be copied to the
-partition of the sdcard with above GUID.
+That's why the generated firmware binary in above steps should be copied to
+the partition of the sdcard with above GUID.
 
 ```
 dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
 ```
 
-In my case, it is the first partition is **disk2s1** that has been formatted with the
-above specified GUID.
+In my case, it is the first partition is **disk2s1** that has been formatted
+with the above specified GUID.
 
 In case of a brand new sdcard, it should be formatted with below partition
 tables as described here.
@@ -118,66 +133,62 @@ Booting SiFive Fu540 Platform
 
 **Linux Kernel Payload**
 
-As Linux kernel image is embedded in the OpenSBI firmware binary, HiFive Unleashed will directly
-boot into Linux directly after powered on.
+As Linux kernel image is embedded in the OpenSBI firmware binary, HiFive
+Unleashed will directly boot into Linux directly after powered on.
 
 **U-Boot Payload**
 
-As U-Boot image is used as payload, HiFive Unleashed will boot into a U-Boot prompt.
-U-Boot tftp boot method can be used to load kernel image in U-Boot prompt.
-Here are the steps do a tftpboot.
+As U-Boot image is used as payload, HiFive Unleashed will boot into a U-Boot
+prompt. U-Boot tftp boot method can be used to load kernel image in U-Boot
+prompt. Here are the steps do a tftpboot.
 
 1. Set the mac address of the board.
-
 ```
 setenv ethaddr <mac address of the board>
 ```
-2. Set the ip address of the board.
+(Note: This step is optional)
 
+2. Set the ip address of the board.
 ```
 setenv ipaddr <ipaddr of the board>
 ```
-3. Set the tftpboot server IP.
 
+3. Set the tftpboot server IP.
 ```
 setenv serverip <ipaddr of the tftp server>
 ```
-4. Set the network gateway address.
 
+4. Set the network gateway address.
 ```
 setenv gatewayip <ipaddress of the network gateway>
 ```
-5. Load the Linux kernel image from the tftp server.
 
+5. Load the Linux kernel image from the tftp server.
 ```
 tftpboot ${kernel_addr_r} <uImage path in tftpboot directory>
 ```
 
-6. Load the ramdisk image from the tftp server. This is only required if ramdisk
-   is loaded from tftp server. This step is optional, if rootfs is already part
-   of the kernel or loaded from an external storage by kernel.
-
+6. Load the ramdisk image from the tftp server. This is only required if
+ramdisk is loaded from tftp server. This step is optional, if rootfs is
+already part of the kernel or loaded from an external storage by kernel.
 ```
 tftpboot ${ramdisk_addr_r} <ramdisk path in tftpboot directory>
 ```
-7. Set the boot command-line arguments.
 
+7. Set the boot command-line arguments.
 ```
 setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ```
-
-N.B. root partition should point to
-     ** /dev/ram ** - If a ramdisk is used
-     ** root=/dev/mmcblk0pX ** - If a rootfs is already on some other partition of sdcard 
+(Note: root partition should point to
+** /dev/ram ** - If a ramdisk is used
+** root=/dev/mmcblk0pX ** - If a rootfs is already on some other partition
+of sdcard)
 
 8. Now boot into Linux.
-
 ```
 bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdtcontroladdr}
-
-```
-or (if ramdisk is not loaded from network)
-```
+or
+(If ramdisk is not loaded from network)
 bootm ${kernel_addr_r} - ${fdtcontroladdr}
 ```
 
@@ -188,10 +199,11 @@ At U-Boot prompt execute the following boot command to boot Linux.
 ```
 bootm ${kernel_addr_r} - ${fdtcontroladdr}
 ```
+
 Booting SiFive Fu540 Platform with Microsemi Expansion board
 ------------------------------------------------------------
 
-Until the Linux kernel has in-tree support for device trees and mainline u-boot
+Until the Linux kernel has in-tree support for device trees and upstream U-Boot
 is fully supported on the HiFive Unleashed you can follow these steps to boot
 Linux with the Microsemi expansion board. This method should not be copied on
 future boards and is considered a temporary solution until we can use a more

From da398ef8d68150e1a22c0f598a0b3b09b61a3ce6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 30 Jun 2019 12:03:40 +0530
Subject: [PATCH 0281/1765] scripts: Add Ariane FPGA to platform list in binary
 archive script

This patch adds Ariane FPGA to RV64 platform list in the binary
archive script.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index fcfb5cb7b6d..cc6d5a41571 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -93,6 +93,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
+	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")
 	;;
 *)
 	echo "Invalid RISC-V XLEN"

From bb3edd36afedc03903930380bef93ed77e83aef8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 1 Jul 2019 08:54:13 +0530
Subject: [PATCH 0282/1765] firmware: For no relocation skip two stage wait for
 secondary HARTs

When relocation is not required (i.e. _load_start == _link_start), we
can skip two stage wait for secondary HARTs. This means secondary HARTs
can skip the _wait_relocate_copy_done() loop and directly jump to the
_wait_for_boot_hart() loop when no relocation not required.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 213396a366a..706db994f9d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -106,6 +106,7 @@ _wait_relocate_copy_done:
 	la	t0, _start
 	la	t1, _link_start
 	REG_L	t1, 0(t1)
+	beq	t0, t1, _wait_for_boot_hart
 	la	t2, _boot_status
 	sub	t2, t2, t0
 	add	t2, t2, t1

From 42c938e3f0ed2b8c48c815daa1a3cea8a9f71b70 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 1 Jul 2019 19:47:33 -0700
Subject: [PATCH 0283/1765] platform: Remove the HiFive Unleashed expansion
 board DT.

The Linux kernel will maintain the device tree (DT) for HiFive Unleashed
from release v5.2-rc6. This DT is incompatible with previous DT
present for Microsemi expansion board in OpenSBI.

Since, OpenSBI will directly load the pre-built DTB from kernel now onwards,
no need to keep the out-of-date DT in openSBI. Remove this DT and
it's related documentation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md                 |  15 -
 .../HiFiveUnleashed-MicroSemi-Expansion.dts   | 588 ------------------
 2 files changed, 603 deletions(-)
 delete mode 100644 platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 2c30e574483..7b0a1787cfc 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -199,18 +199,3 @@ At U-Boot prompt execute the following boot command to boot Linux.
 ```
 bootm ${kernel_addr_r} - ${fdtcontroladdr}
 ```
-
-Booting SiFive Fu540 Platform with Microsemi Expansion board
-------------------------------------------------------------
-
-Until the Linux kernel has in-tree support for device trees and upstream U-Boot
-is fully supported on the HiFive Unleashed you can follow these steps to boot
-Linux with the Microsemi expansion board. This method should not be copied on
-future boards and is considered a temporary solution until we can use a more
-standardised boot flow.
-
-To boot the Linux kernel with a device tree that has support for the Microsemi
-Expansion board you can include the following line when compiling the firmware:
-```
-FW_PAYLOAD_FDT="HiFiveUnleashed-MicroSemi-Expansion.dtb"
-```
diff --git a/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts b/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts
deleted file mode 100644
index 5be90a0f85f..00000000000
--- a/platform/sifive/fu540/HiFiveUnleashed-MicroSemi-Expansion.dts
+++ /dev/null
@@ -1,588 +0,0 @@
-/dts-v1/;
-
-/ {
-	#address-cells = <0x2>;
-	#size-cells = <0x2>;
-	compatible = "sifive,fu540g", "sifive,fu500";
-	model = "sifive,hifive-unleashed-a00";
-
-	aliases {
-		serial0 = "/soc/serial@10010000";
-		serial1 = "/soc/serial@10011000";
-	};
-
-	chosen {
-		stdout-path = "/soc/serial@10010000:115200";
-	};
-
-	firmware {
-		sifive,fsbl = "2018-03-20";
-	};
-
-	cpus {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
-		timebase-frequency = <0xf4240>;
-
-		cpu@0 {
-			clock-frequency = <0x0>;
-			compatible = "sifive,rocket0", "riscv";
-			device_type = "cpu";
-			i-cache-block-size = <0x40>;
-			i-cache-sets = <0x80>;
-			i-cache-size = <0x4000>;
-			next-level-cache = <0x1 0x2>;
-			reg = <0x0>;
-			riscv,isa = "rv64imac";
-			sifive,dtim = <0x3>;
-			sifive,itim = <0x4>;
-			status = "masked";
-
-			interrupt-controller {
-				#interrupt-cells = <0x1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				linux,phandle = <0xf>;
-				phandle = <0xf>;
-			};
-		};
-
-		cpu@1 {
-			clock-frequency = <0x0>;
-			compatible = "sifive,rocket0", "riscv";
-			d-cache-block-size = <0x40>;
-			d-cache-sets = <0x40>;
-			d-cache-size = <0x8000>;
-			d-tlb-sets = <0x1>;
-			d-tlb-size = <0x20>;
-			device_type = "cpu";
-			i-cache-block-size = <0x40>;
-			i-cache-sets = <0x40>;
-			i-cache-size = <0x8000>;
-			i-tlb-sets = <0x1>;
-			i-tlb-size = <0x20>;
-			mmu-type = "riscv,sv39";
-			next-level-cache = <0x1 0x2>;
-			reg = <0x1>;
-			riscv,isa = "rv64imafdc";
-			sifive,itim = <0x5>;
-			status = "okay";
-			tlb-split;
-
-			interrupt-controller {
-				#interrupt-cells = <0x1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				linux,phandle = <0x10>;
-				phandle = <0x10>;
-			};
-		};
-
-		cpu@2 {
-			clock-frequency = <0x0>;
-			compatible = "sifive,rocket0", "riscv";
-			d-cache-block-size = <0x40>;
-			d-cache-sets = <0x40>;
-			d-cache-size = <0x8000>;
-			d-tlb-sets = <0x1>;
-			d-tlb-size = <0x20>;
-			device_type = "cpu";
-			i-cache-block-size = <0x40>;
-			i-cache-sets = <0x40>;
-			i-cache-size = <0x8000>;
-			i-tlb-sets = <0x1>;
-			i-tlb-size = <0x20>;
-			mmu-type = "riscv,sv39";
-			next-level-cache = <0x1 0x2>;
-			reg = <0x2>;
-			riscv,isa = "rv64imafdc";
-			sifive,itim = <0x6>;
-			status = "okay";
-			tlb-split;
-
-			interrupt-controller {
-				#interrupt-cells = <0x1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				linux,phandle = <0x11>;
-				phandle = <0x11>;
-			};
-		};
-
-		cpu@3 {
-			clock-frequency = <0x0>;
-			compatible = "sifive,rocket0", "riscv";
-			d-cache-block-size = <0x40>;
-			d-cache-sets = <0x40>;
-			d-cache-size = <0x8000>;
-			d-tlb-sets = <0x1>;
-			d-tlb-size = <0x20>;
-			device_type = "cpu";
-			i-cache-block-size = <0x40>;
-			i-cache-sets = <0x40>;
-			i-cache-size = <0x8000>;
-			i-tlb-sets = <0x1>;
-			i-tlb-size = <0x20>;
-			mmu-type = "riscv,sv39";
-			next-level-cache = <0x1 0x2>;
-			reg = <0x3>;
-			riscv,isa = "rv64imafdc";
-			sifive,itim = <0x7>;
-			status = "okay";
-			tlb-split;
-
-			interrupt-controller {
-				#interrupt-cells = <0x1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				linux,phandle = <0x12>;
-				phandle = <0x12>;
-			};
-		};
-
-		cpu@4 {
-			clock-frequency = <0x0>;
-			compatible = "sifive,rocket0", "riscv";
-			d-cache-block-size = <0x40>;
-			d-cache-sets = <0x40>;
-			d-cache-size = <0x8000>;
-			d-tlb-sets = <0x1>;
-			d-tlb-size = <0x20>;
-			device_type = "cpu";
-			i-cache-block-size = <0x40>;
-			i-cache-sets = <0x40>;
-			i-cache-size = <0x8000>;
-			i-tlb-sets = <0x1>;
-			i-tlb-size = <0x20>;
-			mmu-type = "riscv,sv39";
-			next-level-cache = <0x1 0x2>;
-			reg = <0x4>;
-			riscv,isa = "rv64imafdc";
-			sifive,itim = <0x8>;
-			status = "okay";
-			tlb-split;
-
-			interrupt-controller {
-				#interrupt-cells = <0x1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				linux,phandle = <0x13>;
-				phandle = <0x13>;
-			};
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x0 0x80000000 0x2 0x0>;
-		linux,phandle = <0xe>;
-		phandle = <0xe>;
-	};
-
-	soc {
-		#address-cells = <0x2>;
-		#size-cells = <0x2>;
-		compatible = "SiFive,FU540G-soc", "fu500-soc", "sifive-soc", "simple-bus";
-		ranges;
-
-		refclk {
-			#clock-cells = <0x0>;
-			compatible = "fixed-clock";
-			clock-frequency = <0x1fca055>;
-			clock-output-names = "xtal";
-			linux,phandle = <0x9>;
-			phandle = <0x9>;
-		};
-
-		prci@10000000 {
-			compatible = "sifive,aloeprci0";
-			reg = <0x0 0x10000000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x9>;
-			#clock-cells = <0x1>;
-			linux,phandle = <0xa>;
-			phandle = <0xa>;
-		};
-
-		tlclk {
-			compatible = "fixed-factor-clock";
-			clocks = <0xa 0x0>;
-			#clock-cells = <0x0>;
-			clock-div = <0x2>;
-			clock-mult = <0x1>;
-			linux,phandle = <0x16>;
-			phandle = <0x16>;
-		};
-
-		cadence-gemgxl-mgmt@100a0000 {
-			compatible = "sifive,cadencegemgxlmgmt0";
-			reg = <0x0 0x100a0000 0x0 0x1000>;
-			reg-names = "control";
-			#clock-cells = <0x0>;
-			linux,phandle = <0x14>;
-			phandle = <0x14>;
-		};
-
-		bus-blocker@100b8000 {
-			compatible = "sifive,bus-blocker0";
-			reg = <0x0 0x100b8000 0x0 0x1000>;
-			reg-names = "control";
-		};
-
-		cache-controller@2010000 {
-			cache-block-size = <0x40>;
-			cache-level = <0x2>;
-			cache-sets = <0x800>;
-			cache-size = <0x200000>;
-			cache-unified;
-			compatible = "sifive,ccache0", "cache";
-			interrupt-parent = <0xb>;
-			interrupts = <0x1 0x2 0x3>;
-			next-level-cache = <0xc 0xd 0xe>;
-			reg = <0x0 0x2010000 0x0 0x1000 0x0 0x8000000 0x0 0x2000000>;
-			reg-names = "control", "sideband";
-			linux,phandle = <0x2>;
-			phandle = <0x2>;
-		};
-
-		cadence-ddr-mgmt@100c0000 {
-			compatible = "sifive,cadenceddrmgmt0";
-			reg = <0x0 0x100c0000 0x0 0x1000>;
-			reg-names = "control";
-		};
-
-		chiplink@40000000 {
-			#address-cells = <0x2>;
-			#size-cells = <0x2>;
-			compatible = "sifive,chiplink", "simple-bus";
-			ranges = <0x0 0x60000000 0x0 0x60000000 0x0 0x20000000 0x30 0x0 0x30 0x0 0x10 0x0 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000 0x20 0x0 0x20 0x0 0x10 0x0>;
-			linux,phandle = <0xd>;
-			phandle = <0xd>;
-		};
-
-		dma@3000000 {
-			#dma-cells = <0x1>;
-			compatible = "riscv,dma0";
-			dma-channels = <0x4>;
-			dma-requests = <0x0>;
-			interrupt-parent = <0xb>;
-			interrupts = <0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>;
-			reg = <0x0 0x3000000 0x0 0x100000>;
-			reg-names = "control";
-			riscv,dma-pools = <0x1>;
-		};
-
-		dtim@1000000 {
-			compatible = "sifive,dtim0";
-			reg = <0x0 0x1000000 0x0 0x2000>;
-			reg-names = "mem";
-			linux,phandle = <0x3>;
-			phandle = <0x3>;
-		};
-
-		ememoryotp@10070000 {
-			compatible = "sifive,ememoryotp0";
-			reg = <0x0 0x10070000 0x0 0x1000>;
-			reg-names = "control";
-		};
-
-		error-device@18000000 {
-			compatible = "sifive,error0";
-			reg = <0x0 0x18000000 0x0 0x8000000>;
-			reg-names = "mem";
-			linux,phandle = <0x1>;
-			phandle = <0x1>;
-		};
-
-		ethernet@10090000 {
-			compatible = "cdns,macb";
-			interrupt-parent = <0xb>;
-			interrupts = <0x35>;
-			reg = <0x0 0x10090000 0x0 0x2000>;
-			reg-names = "control";
-			local-mac-address = [70 b3 d5 92 f0 1f];
-			phy-mode = "gmii";
-			clock-names = "pclk", "hclk", "tx_clk";
-			clocks = <0xa 0x1 0xa 0x1 0x14>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-
-			ethernet-phy@0 {
-				reg = <0x0>;
-				reset-gpios = <0x15 0xc 0x1>;
-			};
-		};
-
-		gpio@10060000 {
-			compatible = "sifive,gpio0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16>;
-			reg = <0x0 0x10060000 0x0 0x1000>;
-			reg-names = "control";
-			gpio-controller;
-			#gpio-cells = <0x2>;
-			interrupt-controller;
-			#interrupt-cells = <0x2>;
-			linux,phandle = <0x15>;
-			phandle = <0x15>;
-		};
-
-		gpio-restart {
-			compatible = "gpio-restart";
-			gpios = <0x15 0xa 0x1>;
-		};
-
-		i2c@10030000 {
-			compatible = "sifive,i2c0", "opencores,i2c-ocores";
-			reg = <0x0 0x10030000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-			reg-shift = <0x2>;
-			reg-io-width = <0x1>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		interrupt-controller@c000000 {
-			#interrupt-cells = <0x1>;
-			compatible = "riscv,plic0";
-			interrupt-controller;
-			interrupts-extended = <0xf 0xffffffff 0x10 0xffffffff 0x10 0x9 0x11 0xffffffff 0x11 0x9 0x12 0xffffffff 0x12 0x9 0x13 0xffffffff 0x13 0x9>;
-			reg = <0x0 0xc000000 0x0 0x4000000>;
-			reg-names = "control";
-			riscv,max-priority = <0x7>;
-			riscv,ndev = <0x35>;
-			linux,phandle = <0xb>;
-			phandle = <0xb>;
-		};
-
-		itim@1800000 {
-			compatible = "sifive,itim0";
-			reg = <0x0 0x1800000 0x0 0x4000>;
-			reg-names = "mem";
-			linux,phandle = <0x4>;
-			phandle = <0x4>;
-		};
-
-		itim@1808000 {
-			compatible = "sifive,itim0";
-			reg = <0x0 0x1808000 0x0 0x8000>;
-			reg-names = "mem";
-			linux,phandle = <0x5>;
-			phandle = <0x5>;
-		};
-
-		itim@1810000 {
-			compatible = "sifive,itim0";
-			reg = <0x0 0x1810000 0x0 0x8000>;
-			reg-names = "mem";
-			linux,phandle = <0x6>;
-			phandle = <0x6>;
-		};
-
-		itim@1818000 {
-			compatible = "sifive,itim0";
-			reg = <0x0 0x1818000 0x0 0x8000>;
-			reg-names = "mem";
-			linux,phandle = <0x7>;
-			phandle = <0x7>;
-		};
-
-		itim@1820000 {
-			compatible = "sifive,itim0";
-			reg = <0x0 0x1820000 0x0 0x8000>;
-			reg-names = "mem";
-			linux,phandle = <0x8>;
-			phandle = <0x8>;
-		};
-
-		memory-controller@100b0000 {
-			compatible = "sifive,aloeddr0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x1f>;
-			reg = <0x0 0x100b0000 0x0 0x4000>;
-			reg-names = "control";
-		};
-
-		pci@2000000000 {
-			#address-cells = <0x3>;
-			#interrupt-cells = <0x1>;
-			#size-cells = <0x2>;
-			compatible = "ms-pf,axi-pcie-host";
-			device_type = "pci";
-			bus-range = <0x01 0x7f>;
-			interrupt-map = <	0 0 0 1 0x17 1
-								0 0 0 2 0x17 2
-								0 0 0 3 0x17 3
-								0 0 0 4 0x17 4>;
-			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-			interrupt-parent = <0xb>;
-			interrupts = <0x20>;
-			ranges = <0x2000000 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>;
-			reg = <	0x20 0x30000000 0x0 0x4000000
-					0x20 0x0        0x0 0x100000 >;
-			reg-names = "control", "apb";
-
-			ms_pcie_intc {
-				#address-cells = <0x0>;
-				#interrupt-cells = <0x1>;
-				interrupt-controller;
-				linux,phandle = <0x17>;
-				phandle = <0x17>;
-			};
-		};
-
-		pinctrl@10080000 {
-			compatible = "sifive,pinctrl0";
-			reg = <0x0 0x10080000 0x0 0x1000>;
-			reg-names = "control";
-		};
-
-		pwm@10020000 {
-			compatible = "sifive,pwm0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x2a 0x2b 0x2c 0x2d>;
-			reg = <0x0 0x10020000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-			sifive,approx-period = <0xf4240>;
-			#pwm-cells = <0x2>;
-			linux,phandle = <0x18>;
-			phandle = <0x18>;
-		};
-
-		pwm@10021000 {
-			compatible = "sifive,pwm0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x2e 0x2f 0x30 0x31>;
-			reg = <0x0 0x10021000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-			sifive,approx-period = <0xf4240>;
-			#pwm-cells = <0x2>;
-		};
-
-		pwmleds {
-			compatible = "pwm-leds";
-
-			heartbeat {
-				pwms = <0x18 0x0 0x0>;
-				max-brightness = <0xff>;
-				linux,default-trigger = "heartbeat";
-			};
-
-			mtd {
-				pwms = <0x18 0x1 0x0>;
-				max-brightness = <0xff>;
-				linux,default-trigger = "mtd";
-			};
-
-			netdev {
-				pwms = <0x18 0x2 0x0>;
-				max-brightness = <0xff>;
-				linux,default-trigger = "netdev";
-			};
-
-			panic {
-				pwms = <0x18 0x3 0x0>;
-				max-brightness = <0xff>;
-				linux,default-trigger = "panic";
-			};
-		};
-
-		rom@1000 {
-			compatible = "sifive,modeselect0";
-			reg = <0x0 0x1000 0x0 0x1000>;
-			reg-names = "mem";
-		};
-
-		rom@10000 {
-			compatible = "sifive,maskrom0";
-			reg = <0x0 0x10000 0x0 0x8000>;
-			reg-names = "mem";
-		};
-
-		rom@a000000 {
-			compatible = "ucbbar,cacheable-zero0";
-			reg = <0x0 0xa000000 0x0 0x2000000>;
-			reg-names = "mem";
-			linux,phandle = <0xc>;
-			phandle = <0xc>;
-		};
-
-		serial@10010000 {
-			compatible = "sifive,uart0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x4>;
-			reg = <0x0 0x10010000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-		};
-
-		serial@10011000 {
-			compatible = "sifive,uart0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x5>;
-			reg = <0x0 0x10011000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-		};
-
-		spi@10040000 {
-			compatible = "sifive,spi0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x33>;
-			reg = <0x0 0x10040000 0x0 0x1000 0x0 0x20000000 0x0 0x10000000>;
-			reg-names = "control", "mem";
-			clocks = <0x16>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-
-			flash@0 {
-				compatible = "issi,is25wp256d", "jedec,spi-nor";
-				reg = <0x0>;
-				spi-max-frequency = <0x2faf080>;
-				m25p,fast-read;
-				spi-tx-bus-width = <0x4>;
-				spi-rx-bus-width = <0x4>;
-			};
-		};
-
-		spi@10041000 {
-			compatible = "sifive,spi0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x34>;
-			reg = <0x0 0x10041000 0x0 0x1000 0x0 0x30000000 0x0 0x10000000>;
-			reg-names = "control", "mem";
-			clocks = <0x16>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		spi@10050000 {
-			compatible = "sifive,spi0";
-			interrupt-parent = <0xb>;
-			interrupts = <0x6>;
-			reg = <0x0 0x10050000 0x0 0x1000>;
-			reg-names = "control";
-			clocks = <0x16>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-
-			mmc@0 {
-				compatible = "mmc-spi-slot";
-				reg = <0x0>;
-				spi-max-frequency = <0x1312d00>;
-				voltage-ranges = <0xce4 0xce4>;
-				disable-wp;
-				gpios = <0x15 0xb 0x1>;
-			};
-		};
-
-		teststatus@4000 {
-			compatible = "sifive,test0";
-			reg = <0x0 0x4000 0x0 0x1000>;
-			reg-names = "control";
-		};
-	};
-};

From ce228ee0919deb9957192d723eecc8aaae2697c6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 2 Jul 2019 11:11:08 +0530
Subject: [PATCH 0284/1765] include: Bump-up version to 0.4

This patch updates OpenSBI version to 0.4 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index d1c39b07a3c..910b0b7626a 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 3
+#define OPENSBI_VERSION_MINOR 4
 
 /**
  *  OpenSBI 32-bit version with:

From e7456399e439cf8c2f8c44264c0988218b2b6ac5 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 4 Jul 2019 19:30:50 -0700
Subject: [PATCH 0285/1765] platform: sifive: fu540: Use standard value string
 for cpu node status

Per device tree spec, the standard value string for the "status"
property of a cpu node is either "okay" or "disabled". "masked"
was once used but it is unfortunately a spec violation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/platform.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 46b48b8be95..ee907903ad9 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -70,7 +70,8 @@ static void fu540_modify_dt(void *fdt)
 				 !strcmp(mmu_type, "riscv,sv48")))
 			continue;
 		else
-			fdt_setprop_string(fdt, cpu_offset, "status", "masked");
+			fdt_setprop_string(fdt, cpu_offset, "status",
+					   "disabled");
 		memset(cpu_node, 0, sizeof(cpu_node));
 	}
 	size = fdt_totalsize(fdt);

From e3f743339ab3d103aa5399a7bbb357f8cc618862 Mon Sep 17 00:00:00 2001
From: Anup Patel <Anup.Patel@wdc.com>
Date: Mon, 22 Jul 2019 05:16:28 +0000
Subject: [PATCH 0286/1765] platform: sifive/fu540: Move FDT further up

This patch changes FW_xyz_FDT_ADDR to RAM_START+128MB (i.e. 0x88000000)
so that next stage bootloader (i.e. U-Boot) has enough space to unpack
bigger kernel images.

Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
---
 platform/sifive/fu540/config.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index 590543383fe..84b098762f5 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -18,7 +18,7 @@ FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
 FW_JUMP=y
 FW_JUMP_ADDR=0x80200000
-FW_JUMP_FDT_ADDR=0x82200000
+FW_JUMP_FDT_ADDR=0x88000000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
-FW_PAYLOAD_FDT_ADDR=0x82200000
+FW_PAYLOAD_FDT_ADDR=0x88000000

From bf2ee7bcdc9b94aa4c62f197adeb71bab20bcfa3 Mon Sep 17 00:00:00 2001
From: Georg Kotheimer <georg.kotheimer@kernkonzept.com>
Date: Wed, 24 Jul 2019 11:38:14 +0200
Subject: [PATCH 0287/1765] utils: Use cpu_to_fdt32() when writing to fdt

Although it does not make a functional difference, both cpu_to_fdt32()
and fdt32_to_cpu() pass on to CPU_TO_FDT32, we should use cpu_to_fdt32()
to be semantically correct.

Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/irqchip/plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 2cd055e6869..5dcbce05d8d 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -68,7 +68,7 @@ void plic_fdt_fixup(void *fdt, const char *compat)
 
 	for (i = 0; i < (cells_count / 2); i++) {
 		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
-			cells[2 * i + 1] = fdt32_to_cpu(0xffffffff);
+			cells[2 * i + 1] = cpu_to_fdt32(0xffffffff);
 	}
 }
 

From c90009aa2087eb690e6cb6e7d6d73e3c63de87c3 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 23 Jul 2019 21:29:58 -0700
Subject: [PATCH 0288/1765] README: Document 32-bit / 64-bit images build

At present the exact details of building 32-bit or 64-bit OpenSBI
images are missing in the docs. This adds the missing part.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/README.md b/README.md
index 1f6204884cb..b4746f2f16e 100644
--- a/README.md
+++ b/README.md
@@ -131,6 +131,25 @@ top-level make command line. These options, such as *PLATFORM_<xyz>* or
 *docs/platform/<platform_name>.md* files and
 *docs/firmware/<firmware_name>.md* files.
 
+Building 32-bit / 64-bit OpenSBI Images
+---------------------------------------
+By default, building OpenSBI generates 32-bit or 64-bit images based on the
+supplied RISC-V cross-compile toolchain. For example if *CROSS_COMPILE* is set
+to *riscv64-unknown-elf-*, 64-bit OpenSBI images will be generated. If building
+32-bit OpenSBI images, *CROSS_COMPILE* should be set to a toolchain that is
+pre-configured to generate 32-bit RISC-V codes, like *riscv32-unknown-elf-*.
+
+However it's possible to explicitly specify the image bits we want to build with
+a given RISC-V toolchain. This can be done by setting the environment variable
+*PLATFORM_RISCV_XLEN* to the desired width, for example:
+
+```
+export CROSS_COMPILE=riscv64-unknown-elf-
+export PLATFORM_RISCV_XLEN=32
+```
+
+will generate 32-bit OpenSBI images. And vice vesa.
+
 License
 -------
 

From 85546a5477d470ab84922b3bc28debe127a47f05 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 23 Jul 2019 21:29:59 -0700
Subject: [PATCH 0289/1765] treewide: Use conventional names for 32-bit and
 64-bit

There are several places in the source tree that have:

  32bit, 32 bit, 64bit, 64 bit

Fix by using the conventional names with a hyphen.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
---
 README.md                         |  2 +-
 docs/platform/qemu_sifive_u.md    |  4 ++--
 docs/platform/qemu_virt.md        |  8 ++++----
 include/sbi/sbi_platform.h        |  2 +-
 platform/kendryte/k210/platform.h | 10 +++++-----
 scripts/create-binary-archive.sh  |  4 ++--
 6 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/README.md b/README.md
index b4746f2f16e..0a1130aaebe 100644
--- a/README.md
+++ b/README.md
@@ -47,7 +47,7 @@ cross-compilation, you can build your own toolchain or just download
 a prebuilt one from the
 [Bootlin toolchain repository] (https://toolchains.bootlin.com/).
 
-Please note that only a 64bit version of the toolchain is available in
+Please note that only a 64-bit version of the toolchain is available in
 the Bootlin toolchain repository for now.
 
 Building and Installing the OpenSBI Platform-Independent Library
diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
index 360f58d6691..48b30e46b95 100644
--- a/docs/platform/qemu_sifive_u.md
+++ b/docs/platform/qemu_sifive_u.md
@@ -13,8 +13,8 @@ Platform Options
 The *QEMU SiFive Unleashed Machine* platform does not have any platform specific
 options.
 
-Executing on QEMU RISC-V 64bit
-------------------------------
+Executing on QEMU RISC-V 64-bit
+-------------------------------
 
 **No Payload Case**
 
diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 27efeabd939..12204e45d99 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -15,8 +15,8 @@ Platform Options
 The *QEMU RISC-V Virt Machine* platform does not have any platform-specific
 options.
 
-Execution on QEMU RISC-V 64bit
-------------------------------
+Execution on QEMU RISC-V 64-bit
+-------------------------------
 
 **No Payload Case**
 
@@ -82,8 +82,8 @@ qemu-system-riscv64 -M virt -m 256M -nographic \
 ```
 
 
-Execution on QEMU RISC-V 32bit
-------------------------------
+Execution on QEMU RISC-V 32-bit
+-------------------------------
 
 **No Payload Case**
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e3377b49d52..34cd732c952 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -417,7 +417,7 @@ static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
  *
  * @param plat pointer to struct sbi_platform
  *
- * @return 64bit timer value
+ * @return 64-bit timer value
  */
 static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
 {
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 8694ea820e4..492848be29a 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -37,7 +37,7 @@
 /* Under TileLink */
 #define GPIOHS_BASE_ADDR	(0x38001000U)
 
-/* Under AXI 64 bit */
+/* Under AXI 64-bit */
 #define RAM_BASE_ADDR		(0x80000000U)
 #define RAM_SIZE		(6 * 1024 * 1024U)
 
@@ -59,10 +59,10 @@
 #define ROM_BASE_ADDR		(0x88000000U)
 #define ROM_SIZE		(128 * 1024U)
 
-/* Under AHB 32 bit */
+/* Under AHB 32-bit */
 #define DMAC_BASE_ADDR		(0x50000000U)
 
-/* Under APB1 32 bit */
+/* Under APB1 32-bit */
 #define GPIO_BASE_ADDR		(0x50200000U)
 #define UART1_BASE_ADDR		(0x50210000U)
 #define UART2_BASE_ADDR		(0x50220000U)
@@ -80,7 +80,7 @@
 #define TIMER1_BASE_ADDR	(0x502E0000U)
 #define TIMER2_BASE_ADDR	(0x502F0000U)
 
-/* Under APB2 32 bit */
+/* Under APB2 32-bit */
 #define WDT0_BASE_ADDR		(0x50400000U)
 #define WDT1_BASE_ADDR		(0x50410000U)
 #define OTP_BASE_ADDR		(0x50420000U)
@@ -89,7 +89,7 @@
 #define AES_BASE_ADDR		(0x50450000U)
 #define RTC_BASE_ADDR		(0x50460000U)
 
-/* Under APB3 32 bit */
+/* Under APB3 32-bit */
 #define SPI0_BASE_ADDR		(0x52000000U)
 #define SPI1_BASE_ADDR		(0x53000000U)
 #define SPI3_BASE_ADDR		(0x54000000U)
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index cc6d5a41571..0a327091735 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -83,12 +83,12 @@ BUILD_ARCHIVE_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BU
 # Setup platform list
 case "${BUILD_RISCV_XLEN}" in
 32)
-	# Setup 32bit platform list
+	# Setup 32-bit platform list
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
 	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
 	;;
 64)
-	# Setup 64bit platform list
+	# Setup 64-bit platform list
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
 	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")

From 0f18b3fe0adda745b3ac80f7b79ce2b8512e2e95 Mon Sep 17 00:00:00 2001
From: Anup Patel <Anup.Patel@wdc.com>
Date: Thu, 25 Jul 2019 05:05:03 +0000
Subject: [PATCH 0290/1765] lib: Allow compiling without FP support

Currently, we mandate 'F' and 'D' extension in riscv_fp.h so that
misaligned load/store emulation has access to FP registers.

The above is too restrictive and we should certainly allow compilation
for soft-FP toolchains and explicit PLATFORM_RISCV_ISA not having 'F'
and 'D' extensions.

This patch extends riscv_fp.h and misaligned load/store emulation to
allow compiling OpenSBI without FP support.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/riscv_fp.h        |  6 ++----
 lib/sbi/sbi_hart.c            |  7 -------
 lib/sbi/sbi_misaligned_ldst.c | 16 ++++++++++++++--
 3 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index a8d4c510df7..a685884a52b 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -73,10 +73,6 @@
 
 #define SET_FS_DIRTY() ((void)0)
 
-#else
-#error "Floating point emulation not supported.\n"
-#endif
-
 #define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs))
 #define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs))
 #define GET_F32_RS3(insn, regs) (GET_F32_REG(insn, 27, regs))
@@ -94,3 +90,5 @@
 #define GET_F64_RS2S(insn, regs) (GET_F64_REG(RVC_RS2S(insn), 0, regs))
 
 #endif
+
+#endif
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 187b493760c..3be5b8a4da1 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -52,8 +52,6 @@ static int fp_init(u32 hartid)
 {
 #ifdef __riscv_flen
 	int i;
-#else
-	unsigned long fd_mask;
 #endif
 
 	if (!misa_extension('D') && !misa_extension('F'))
@@ -66,11 +64,6 @@ static int fp_init(u32 hartid)
 	for (i = 0; i < 32; i++)
 		init_fp_reg(i);
 	csr_write(CSR_FCSR, 0);
-#else
-	fd_mask = (1 << ('F' - 'A')) | (1 << ('D' - 'A'));
-	csr_clear(CSR_MISA, fd_mask);
-	if (csr_read(CSR_MISA) & fd_mask)
-		return SBI_ENOTSUPP;
 #endif
 
 	return 0;
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 7f911c38c39..1c4e5df46d9 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -41,12 +41,14 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	} else if ((insn & INSN_MASK_LWU) == INSN_MATCH_LWU) {
 		len = 4;
 #endif
+#ifdef __riscv_flen
 	} else if ((insn & INSN_MASK_FLD) == INSN_MATCH_FLD) {
 		fp  = 1;
 		len = 8;
 	} else if ((insn & INSN_MASK_FLW) == INSN_MATCH_FLW) {
 		fp  = 1;
 		len = 4;
+#endif
 	} else if ((insn & INSN_MASK_LH) == INSN_MATCH_LH) {
 		len   = 2;
 		shift = 8 * (sizeof(ulong) - len);
@@ -71,6 +73,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		   ((insn >> SH_RD) & 0x1f)) {
 		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
+#ifdef __riscv_flen
 	} else if ((insn & INSN_MASK_C_FLD) == INSN_MATCH_C_FLD) {
 		fp   = 1;
 		len  = 8;
@@ -87,9 +90,11 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		fp  = 1;
 		len = 4;
 #endif
+#endif
 #endif
 	} else
-		return SBI_EILL;
+		return sbi_trap_redirect(regs, scratch, regs->mepc,
+					 mcause, addr);
 
 	val.data_u64 = 0;
 	for (i = 0; i < len; i++) {
@@ -104,10 +109,12 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 
 	if (!fp)
 		SET_RD(insn, regs, val.data_ulong << shift >> shift);
+#ifdef __riscv_flen
 	else if (len == 8)
 		SET_F64_RD(insn, regs, val.data_u64);
 	else
 		SET_F32_RD(insn, regs, val.data_ulong);
+#endif
 
 	regs->mepc += INSN_LEN(insn);
 
@@ -132,12 +139,14 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	} else if ((insn & INSN_MASK_SD) == INSN_MATCH_SD) {
 		len = 8;
 #endif
+#ifdef __riscv_flen
 	} else if ((insn & INSN_MASK_FSD) == INSN_MATCH_FSD) {
 		len	     = 8;
 		val.data_u64 = GET_F64_RS2(insn, regs);
 	} else if ((insn & INSN_MASK_FSW) == INSN_MATCH_FSW) {
 		len	       = 4;
 		val.data_ulong = GET_F32_RS2(insn, regs);
+#endif
 	} else if ((insn & INSN_MASK_SH) == INSN_MATCH_SH) {
 		len = 2;
 #ifdef __riscv_compressed
@@ -157,6 +166,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		   ((insn >> SH_RD) & 0x1f)) {
 		len	       = 4;
 		val.data_ulong = GET_RS2C(insn, regs);
+#ifdef __riscv_flen
 	} else if ((insn & INSN_MASK_C_FSD) == INSN_MATCH_C_FSD) {
 		len	     = 8;
 		val.data_u64 = GET_F64_RS2S(insn, regs);
@@ -171,9 +181,11 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		len	       = 4;
 		val.data_ulong = GET_F32_RS2C(insn, regs);
 #endif
+#endif
 #endif
 	} else
-		return SBI_EILL;
+		return sbi_trap_redirect(regs, scratch, regs->mepc,
+					 mcause, addr);
 
 	for (i = 0; i < len; i++) {
 		store_u8((void *)(addr + i), val.data_bytes[i],

From c1b9dd3ab5177c3f3116b713e0e398243f73f2fa Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon7@andestech.com>
Date: Fri, 2 Aug 2019 13:34:42 +0800
Subject: [PATCH 0291/1765] firmware: Fix the loop condition of
 _wait_relocate_copy_done section

If core-0 have finished _fdt_reloc_done but any of other cores has not
yet left the loop in _wait_relocate_copy_done, they could never leave
the loop because _boot_status is not equal to 1.
---
 firmware/fw_base.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 706db994f9d..225f64f4060 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -121,7 +121,7 @@ _wait_relocate_copy_done:
 	nop
 	nop
 	nop
-	bne	t4, t5, 1b
+	bgt     t4, t5, 1b
 	jr	t3
 _relocate_done:
 

From 446b6f30a44a856e81aa50684ac428f30221f4bb Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Aug 2019 00:20:23 -0700
Subject: [PATCH 0292/1765] platform: sifive: fu540: Expand FDT size before any
 patching

We should expand the FDT size before any patching, otherwise it's
possible the "status" fix up might fail due to insufficient space.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/platform.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index ee907903ad9..827e294ecdf 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -62,6 +62,12 @@ static void fu540_modify_dt(void *fdt)
 	char cpu_node[32] = "";
 	const char *mmu_type;
 
+	size = fdt_totalsize(fdt);
+	err  = fdt_open_into(fdt, fdt, size + 256);
+	if (err < 0)
+		sbi_printf(
+			"Device Tree can't be expanded to accmodate new node");
+
 	for (i = 0; i < FU540_HART_COUNT; i++) {
 		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
 		cpu_offset = fdt_path_offset(fdt, cpu_node);
@@ -74,11 +80,6 @@ static void fu540_modify_dt(void *fdt)
 					   "disabled");
 		memset(cpu_node, 0, sizeof(cpu_node));
 	}
-	size = fdt_totalsize(fdt);
-	err  = fdt_open_into(fdt, fdt, size + 256);
-	if (err < 0)
-		sbi_printf(
-			"Device Tree can't be expanded to accmodate new node");
 
 	chosen_offset = fdt_path_offset(fdt, "/chosen");
 	fdt_setprop_string(fdt, chosen_offset, "stdout-path",

From b1318e578b81690d7dcc57019e3f26c2b563bd74 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Aug 2019 01:59:31 -0700
Subject: [PATCH 0293/1765] firmware: Use macro instead of magic number for
 boot status

The boot status is currently hard-coded. Define some macros for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 225f64f4060..f2b1ee03f6e 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -13,6 +13,9 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
 
+#define BOOT_STATUS_RELOCATE_DONE	1
+#define BOOT_STATUS_BOOT_HART_DONE	2
+
 .macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
 	add	\__d0, \__s0, zero
 	add	\__d1, \__s1, zero
@@ -115,7 +118,7 @@ _wait_relocate_copy_done:
 	add	t3, t3, t1
 1:
 	/* waitting for relocate copy done (_boot_status == 1) */
-	li	t4, 1
+	li	t4, BOOT_STATUS_RELOCATE_DONE
 	REG_L	t5, 0(t2)
 	/* Reduce the bus traffic so that boot hart may proceed faster */
 	nop
@@ -127,7 +130,7 @@ _relocate_done:
 
 	/* mark relocate copy done */
 	la	t0, _boot_status
-	li	t1, 1
+	li	t1, BOOT_STATUS_RELOCATE_DONE
 	REG_S	t1, 0(t0)
 	fence	rw, rw
 
@@ -302,7 +305,7 @@ _fdt_reloc_again:
 _fdt_reloc_done:
 
 	/* mark boot hart done */
-	li	t0, 2
+	li	t0, BOOT_STATUS_BOOT_HART_DONE
 	la	t1, _boot_status
 	REG_S	t0, 0(t1)
 	fence	rw, rw
@@ -310,7 +313,7 @@ _fdt_reloc_done:
 
 	/* waitting for boot hart done (_boot_status == 2) */
 _wait_for_boot_hart:
-	li	t0, 2
+	li	t0, BOOT_STATUS_BOOT_HART_DONE
 	la	t1, _boot_status
 	REG_L	t1, 0(t1)
 	/* Reduce the bus traffic so that boot hart may proceed faster */

From dbff3e9f12f0abbdf475baaef4760c24af0d4227 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 8 Aug 2019 12:10:22 +0530
Subject: [PATCH 0294/1765] lib: Introduce sbi_dprintf() API

This patch introduces new sbi_dprintf() API for runtime debug
prints. The sbi_dprintf() will print to console for a given
HART only when SBI_SCRATCH_DEBUG_PRINTS option in enabled in
sbi_scratch for this HART.

We can now add debug prints using sbi_dprintf() at important
places in OpenSBI sources. These debug prints will only show
up when previous booting stage or compile time parameter sets
the SBI_SCRATCH_DEBUG_PRINTS option in scratch space.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_console.h |  4 ++++
 include/sbi/sbi_scratch.h |  2 ++
 lib/sbi/sbi_console.c     | 13 +++++++++++++
 3 files changed, 19 insertions(+)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 16021d06f23..45af22f3035 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -31,6 +31,10 @@ int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, const char *format, ...);
 int __printf(1, 2) sbi_printf(const char *format, ...);
 
 struct sbi_scratch;
+
+int __printf(2, 3) sbi_dprintf(struct sbi_scratch *scratch,
+			       const char *format, ...);
+
 int sbi_console_init(struct sbi_scratch *scratch);
 
 #endif
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 46ea38f10f0..fd18bb247af 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -74,6 +74,8 @@ struct sbi_scratch {
 enum sbi_scratch_options {
 	/** Disable prints during boot */
 	SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0),
+	/** Enable runtime debug prints */
+	SBI_SCRATCH_DEBUG_PRINTS = (1 << 1),
 };
 
 /** Get pointer to sbi_scratch for current HART */
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 30fb2c8fc18..03dcdb24e4e 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -375,6 +375,19 @@ int sbi_printf(const char *format, ...)
 	return retval;
 }
 
+int sbi_dprintf(struct sbi_scratch *scratch, const char *format, ...)
+{
+	va_list args;
+	int retval = 0;
+
+	va_start(args, format);
+	if (scratch->options & SBI_SCRATCH_DEBUG_PRINTS)
+		retval = print(NULL, NULL, format, args);
+	va_end(args);
+
+	return retval;
+}
+
 int sbi_console_init(struct sbi_scratch *scratch)
 {
 	console_plat = sbi_platform_ptr(scratch);

From 88c87f0af4bded7b1892bd68a6d59ed583d65641 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 8 Aug 2019 12:18:22 +0530
Subject: [PATCH 0295/1765] lib: Use sbi_dprintf() for invalid CSRs

We should sbi_dprintf() instead of sbi_printf() for invalid CSRs
because we are forwarding invalid CSR access back to S-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_emulate_csr.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 5d6819e07ca..791890f4fa4 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -83,8 +83,8 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
 		*csr_val = csr_read(CSR_MHPMEVENT4);
 		break;
 	default:
-		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n", __func__,
-			   hartid, csr_num);
+		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
+			    __func__, hartid, csr_num);
 		return SBI_ENOTSUPP;
 	};
 
@@ -128,8 +128,8 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
 		csr_write(CSR_MHPMEVENT4, csr_val);
 		break;
 	default:
-		sbi_printf("%s: hartid%d: invalid csr_num=0x%x\n", __func__,
-			   hartid, csr_num);
+		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
+			    __func__, hartid, csr_num);
 		return SBI_ENOTSUPP;
 	};
 

From 3f738f5897a6694b8630d3a9c6751f49c3c7d540 Mon Sep 17 00:00:00 2001
From: Jacob Garber <jgarber1@ualberta.ca>
Date: Fri, 9 Aug 2019 17:13:57 -0600
Subject: [PATCH 0296/1765] lib: Use bitwise & instead of boolean &&

!(mipval && MIP_MSIP) simplifies to !mipval, which checks if the entire
variable is zero, not just a single bit. Fix this to use bitwise &
instead.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 3be5b8a4da1..6bf0e136b17 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -339,7 +339,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		spin_lock(&coldboot_wait_bitmap_lock);
 		coldboot_wait_bitmap &= ~(1UL << hartid);
 		spin_unlock(&coldboot_wait_bitmap_lock);
-	} while (!(mipval && MIP_MSIP));
+	} while (!(mipval & MIP_MSIP));
 
 	csr_clear(CSR_MIP, MIP_MSIP);
 }

From 6ddf71e6e90878ee107b0d9f98492ad27d31c73a Mon Sep 17 00:00:00 2001
From: Jacob Garber <jgarber1@ualberta.ca>
Date: Fri, 9 Aug 2019 17:13:58 -0600
Subject: [PATCH 0297/1765] lib: Use correct type for return value

The error check 'plic_off < 0' does nothing, since plic_off is stored as
a u32. Fix this by changing it to an int, which matches the return type of
fdt_node_offset_by_compatible().

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/irqchip/plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 5dcbce05d8d..ea09f0a550d 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -51,7 +51,7 @@ void plic_fdt_fixup(void *fdt, const char *compat)
 {
 	u32 *cells;
 	int i, cells_count;
-	u32 plic_off;
+	int plic_off;
 
 	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
 	if (plic_off < 0)

From 5e4021a2f5ca346d1c12b80d346c1a2e7eb4b501 Mon Sep 17 00:00:00 2001
From: Jacob Garber <jgarber1@ualberta.ca>
Date: Fri, 9 Aug 2019 17:13:59 -0600
Subject: [PATCH 0298/1765] lib: Prevent unintended sign extensions

In the last argument to sbi_memset() we essentially have the following
multiplication:

    size_t = u16 * u16

Due to C's integer semantics, both u16's are implicitly converted to int
before the multiplication, which cannot hold all possible values of a
u16 * u16. If the multiplication overflows, the intermediate result will
be a negative number. On 64-bit platforms, this will be sign-extended to
a huge integer in the conversion to a u64 (aka size_t). Being the size
argument to sbi_memset(), this could potentially cause a large
out-of-bounds write. The solution is to manually cast one of the u16 to
a size_t, which will make it large enough to avoid the implicit
conversion and any overflow.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_fifo.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index e69009f665d..18ff0d649ad 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -20,7 +20,7 @@ void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 	fifo->entry_size  = entry_size;
 	SPIN_LOCK_INIT(&fifo->qlock);
 	fifo->avail = fifo->tail = 0;
-	sbi_memset(fifo->queue, 0, entries * entry_size);
+	sbi_memset(fifo->queue, 0, (size_t)entries * entry_size);
 }
 
 /* Note: must be called with fifo->qlock held */
@@ -74,9 +74,11 @@ bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
 /* Note: must be called with fifo->qlock held */
 static inline void __sbi_fifo_reset(struct sbi_fifo *fifo)
 {
+	size_t size = (size_t)fifo->num_entries * fifo->entry_size;
+
 	fifo->avail = 0;
 	fifo->tail  = 0;
-	sbi_memset(fifo->queue, 0, fifo->num_entries * fifo->entry_size);
+	sbi_memset(fifo->queue, 0, size);
 }
 
 bool sbi_fifo_reset(struct sbi_fifo *fifo)

From 6c24193293e7cc0854994d7551f32e31ebc06ff6 Mon Sep 17 00:00:00 2001
From: Jacob Garber <jgarber1@ualberta.ca>
Date: Fri, 9 Aug 2019 17:14:00 -0600
Subject: [PATCH 0299/1765] lib: Correct null pointer check

In order to prevent a possible null pointer dereference, return early if
either one of 'in' or 'data' is null.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_tlb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index cffda52d66a..104c066c18e 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -66,7 +66,7 @@ static int sbi_tlb_fifo_update_cb(void *in, void *data)
 	struct sbi_tlb_info *next;
 	int ret = SBI_FIFO_UNCHANGED;
 
-	if (!in && !!data)
+	if (!in || !data)
 		return ret;
 
 	curr = (struct sbi_tlb_info *)data;

From 2e0f3ac758da99fb6d1b4c651643999d83cd0a7f Mon Sep 17 00:00:00 2001
From: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Date: Mon, 12 Aug 2019 23:50:42 +0200
Subject: [PATCH 0300/1765] firmware: do not use relocated _boot_status before
 it is valid

When OpenSBI is started from an address not equal to the link address,
it is first relocated to the link address. Hart 0 performs the
relocation and notifies the other harts of its completion with the
_boot_status variable. It uses the copy of the variable relative to the
link address. This copy contains valid data only after relocation has
finished. The waiting harts will therefore read invalid data until
relocation has finished. This can cause them to continue execution too
early.

Fix this by using the _boot_status variable relative to the load address
while OpenSBI has not finished relocation.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index f2b1ee03f6e..f5966385bd3 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -111,8 +111,6 @@ _wait_relocate_copy_done:
 	REG_L	t1, 0(t1)
 	beq	t0, t1, _wait_for_boot_hart
 	la	t2, _boot_status
-	sub	t2, t2, t0
-	add	t2, t2, t1
 	la	t3, _wait_for_boot_hart
 	sub	t3, t3, t0
 	add	t3, t3, t1
@@ -128,8 +126,17 @@ _wait_relocate_copy_done:
 	jr	t3
 _relocate_done:
 
-	/* mark relocate copy done */
+	/*
+	 * Mark relocate copy done
+	 * Use _boot_status copy relative to the load address
+	 */
 	la	t0, _boot_status
+	la	t1, _link_start
+	REG_L	t1, 0(t1)
+	la	t2, _load_start
+	REG_L	t2, 0(t2)
+	sub	t0, t0, t1
+	add	t0, t0, t2
 	li	t1, BOOT_STATUS_RELOCATE_DONE
 	REG_S	t1, 0(t0)
 	fence	rw, rw

From a88e424f6c3a42a38e9395726d9fd4e50a96abd2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 12 Aug 2019 11:50:22 +0530
Subject: [PATCH 0301/1765] lib: Handle traps when doing unpriv load/store in
 get_insn()

We can get a page/access trap when doing unpriv load/store in
get_insn() function because on a SMP system Linux swapper running
on HART A can unmap pages from page table used by HART B.

To tackle this we extend get_insn() implementation so that if
we get trap in get_insn() then we redirect it to S-mode as fetch
page/access fault.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_unpriv.h    |  3 +-
 lib/sbi/riscv_unpriv.c        | 71 ++++++++++++++++++++---------------
 lib/sbi/sbi_illegal_insn.c    |  9 ++++-
 lib/sbi/sbi_misaligned_ldst.c | 28 ++++++++------
 4 files changed, 65 insertions(+), 46 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index 0fad27d5a6c..ebd0fe370eb 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -43,6 +43,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
 
-ulong get_insn(ulong mepc, ulong *mstatus);
+ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
+	       struct unpriv_trap *trap);
 
 #endif
diff --git a/lib/sbi/riscv_unpriv.c b/lib/sbi/riscv_unpriv.c
index aa353c0c647..ac0e03a77c2 100644
--- a/lib/sbi/riscv_unpriv.c
+++ b/lib/sbi/riscv_unpriv.c
@@ -97,11 +97,20 @@ void store_u64(u64 *addr, u64 val,
 }
 #endif
 
-ulong get_insn(ulong mepc, ulong *mstatus)
+ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
+	       struct unpriv_trap *trap)
 {
-	register ulong __mepc asm("a2") = mepc;
-	register ulong __mstatus asm("a3");
-	ulong val;
+	ulong __mstatus = 0, val = 0;
+#ifdef __riscv_compressed
+	ulong rvc_mask = 3, tmp;
+#endif
+
+	if (trap) {
+		trap->ilen = 4;
+		trap->cause = 0;
+		trap->tval = 0;
+		sbi_hart_set_trap_info(scratch, trap);
+	}
 #ifndef __riscv_compressed
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
 #if __riscv_xlen == 64
@@ -109,37 +118,37 @@ ulong get_insn(ulong mepc, ulong *mstatus)
 #else
 	    STR(LW) " %[insn], (%[addr])\n"
 #endif
-		     "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
 	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc));
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc));
 #else
-	ulong rvc_mask = 3, tmp;
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
-						  "and %[tmp], %[addr], 2\n"
-						  "bnez %[tmp], 1f\n"
-#if __riscv_xlen == 64
-	    STR(LWU) " %[insn], (%[addr])\n"
-#else
-	    STR(LW) " %[insn], (%[addr])\n"
-#endif
-		     "and %[tmp], %[insn], %[rvc_mask]\n"
-		     "beq %[tmp], %[rvc_mask], 2f\n"
-		     "sll %[insn], %[insn], %[xlen_minus_16]\n"
-		     "srl %[insn], %[insn], %[xlen_minus_16]\n"
-		     "j 2f\n"
-		     "1:\n"
-		     "lhu %[insn], (%[addr])\n"
-		     "and %[tmp], %[insn], %[rvc_mask]\n"
-		     "bne %[tmp], %[rvc_mask], 2f\n"
-		     "lhu %[tmp], 2(%[addr])\n"
-		     "sll %[tmp], %[tmp], 16\n"
-		     "add %[insn], %[insn], %[tmp]\n"
-		     "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
+	    "lhu %[insn], (%[addr])\n"
+	    "and %[tmp], %[insn], %[rvc_mask]\n"
+	    "bne %[tmp], %[rvc_mask], 2f\n"
+	    "lhu %[tmp], 2(%[addr])\n"
+	    "sll %[tmp], %[tmp], 16\n"
+	    "add %[insn], %[insn], %[tmp]\n"
+	    "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
 	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(__mepc),
-	      [rvc_mask] "r"(rvc_mask), [xlen_minus_16] "i"(__riscv_xlen - 16));
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc),
+	      [rvc_mask] "r"(rvc_mask));
 #endif
-	if (mstatus)
-		*mstatus = __mstatus;
+	if (trap) {
+		sbi_hart_set_trap_info(scratch, NULL);
+		switch (trap->cause) {
+		case CAUSE_LOAD_ACCESS:
+			trap->cause = CAUSE_FETCH_ACCESS;
+			trap->tval = mepc;
+			break;
+		case CAUSE_LOAD_PAGE_FAULT:
+			trap->cause = CAUSE_FETCH_PAGE_FAULT;
+			trap->tval = mepc;
+			break;
+		default:
+			break;
+		};
+	}
+
 	return val;
 }
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 554183867ac..b6ba4b0566f 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -117,10 +117,15 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			     struct sbi_scratch *scratch)
 {
 	ulong insn = csr_read(mbadaddr);
+	struct unpriv_trap uptrap;
 
 	if (unlikely((insn & 3) != 3)) {
-		if (insn == 0)
-			insn = get_insn(regs->mepc, NULL);
+		if (insn == 0) {
+			insn = get_insn(regs->mepc, scratch, &uptrap);
+			if (uptrap.cause)
+				return sbi_trap_redirect(regs, scratch,
+					regs->mepc, uptrap.cause, uptrap.tval);
+		}
 		if ((insn & 3) != 3)
 			return truly_illegal_insn(insn, hartid, mcause, regs,
 						  scratch);
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 1c4e5df46d9..e0f10bc67d2 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -27,10 +27,14 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 {
 	union reg_data val;
 	struct unpriv_trap uptrap;
-	ulong insn = get_insn(regs->mepc, NULL);
+	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
 
+	if (uptrap.cause)
+		return sbi_trap_redirect(regs, scratch, regs->mepc,
+					 uptrap.cause, uptrap.tval);
+
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
 		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
@@ -100,11 +104,9 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	for (i = 0; i < len; i++) {
 		val.data_bytes[i] = load_u8((void *)(addr + i),
 					    scratch, &uptrap);
-		if (uptrap.cause) {
-			sbi_trap_redirect(regs, scratch, regs->mepc,
-					  uptrap.cause, uptrap.tval);
-			return 0;
-		}
+		if (uptrap.cause)
+			return sbi_trap_redirect(regs, scratch, regs->mepc,
+						 uptrap.cause, uptrap.tval);
 	}
 
 	if (!fp)
@@ -127,10 +129,14 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 {
 	union reg_data val;
 	struct unpriv_trap uptrap;
-	ulong insn = get_insn(regs->mepc, NULL);
+	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
 
+	if (uptrap.cause)
+		return sbi_trap_redirect(regs, scratch, regs->mepc,
+					 uptrap.cause, uptrap.tval);
+
 	val.data_ulong = GET_RS2(insn, regs);
 
 	if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
@@ -190,11 +196,9 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	for (i = 0; i < len; i++) {
 		store_u8((void *)(addr + i), val.data_bytes[i],
 			 scratch, &uptrap);
-		if (uptrap.cause) {
-			sbi_trap_redirect(regs, scratch, regs->mepc,
-					  uptrap.cause, uptrap.tval);
-			return 0;
-		}
+		if (uptrap.cause)
+			return sbi_trap_redirect(regs, scratch, regs->mepc,
+						 uptrap.cause, uptrap.tval);
 	}
 
 	regs->mepc += INSN_LEN(insn);

From f6e13e0dd30b164eb444bc08c70fa1b8576e0bca Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 14 Aug 2019 18:02:13 -0700
Subject: [PATCH 0302/1765] lib: Provide an atomic exchange function unsigned
 long

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_atomic.h |  3 +++
 lib/sbi/riscv_atomic.c     | 16 ++++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 40efb68d902..8543f4d1899 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -35,6 +35,9 @@ long arch_atomic_xchg(atomic_t *atom, long newval);
 
 unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 				  unsigned int newval);
+
+unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
+				    unsigned long newval);
 /**
  * Set a bit in an atomic variable and return the new value.
  * @nr : Bit to set.
diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 34bf5220f0f..996e893e15d 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -175,6 +175,22 @@ unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 #endif
 }
 
+unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
+				    unsigned long newval)
+{
+	/* Atomically set new value and return old value. */
+#ifdef __riscv_atomic
+	/*
+	 * The name of GCC built-in macro __sync_lock_test_and_set()
+	 * is misleading. A more appropriate name for GCC built-in
+	 * macro would be __sync_val_exchange().
+	 */
+	return __sync_lock_test_and_set(ptr, newval);
+#else
+	return xchg(ptr, newval);
+#endif
+}
+
 #if (BITS_PER_LONG == 64)
 #define __AMO(op) "amo" #op ".d"
 #elif (BITS_PER_LONG == 32)

From 897a97a6af31174eb2c6058c6ceb9d3ccc6c6e3c Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 14 Aug 2019 18:02:14 -0700
Subject: [PATCH 0303/1765] lib: Fix race conditions in tlb fifo access.

Linux kernel expects tlb flush SBI call to be completely synchronous i.e.
the SBI call should only return once corresponding *fence* instruction is
executed.

OpenSBI manages the outstanding TLB flush requests by keeping them in a
per hart based fifo. However, there are few corner cases that may lead to
race conditions while updating the fifo.

Currently, the caller hart waits for IPI acknowledgement via clint
address which is not a very good method as synchronization on MMIO may not
be supported in every platform. Moreover, the waiter doesn't have any way of
identifying if the IPI is received for specific tlb flush request or any
other IPI. This may lead to unpredictable behavior in supervisor/user space.

Fix this by waiting on individual fifo entries rather than MMIO address.
Currently, a relaxed loop is being used because wfi again involves MMIO write
which would be slower compared to relaxed loop. To avoid deadlock, fifo
is processed every time a hart loops for fifo enqueue or fifo sync to consume
the tlb flush requests sent by other harts.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_fifo.h |   1 -
 include/sbi/sbi_tlb.h  |  12 +-
 lib/sbi/sbi_ecall.c    |  10 +-
 lib/sbi/sbi_fifo.c     |  34 +++--
 lib/sbi/sbi_ipi.c      |  54 ++++----
 lib/sbi/sbi_tlb.c      | 295 +++++++++++++++++++++++++++--------------
 6 files changed, 259 insertions(+), 147 deletions(-)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index 3f36c59ad09..bc8f8f600ae 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -26,7 +26,6 @@ struct sbi_fifo {
 enum sbi_fifo_inplace_update_types {
 	SBI_FIFO_SKIP,
 	SBI_FIFO_UPDATED,
-	SBI_FIFO_RESET,
 	SBI_FIFO_UNCHANGED,
 };
 
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index f3d93d478ba..af77f8938aa 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -20,12 +20,13 @@
 
 /* clang-format on */
 
-#define SBI_TLB_FIFO_NUM_ENTRIES		4
+#define SBI_TLB_FIFO_NUM_ENTRIES		8
 
 enum sbi_tlb_info_types {
 	SBI_TLB_FLUSH_VMA,
 	SBI_TLB_FLUSH_VMA_ASID,
-	SBI_TLB_FLUSH_VMA_VMID
+	SBI_TLB_FLUSH_VMA_VMID,
+	SBI_ITLB_FLUSH
 };
 
 struct sbi_scratch;
@@ -35,14 +36,17 @@ struct sbi_tlb_info {
 	unsigned long size;
 	unsigned long asid;
 	unsigned long type;
+	unsigned long shart_mask;
 };
 
 #define SBI_TLB_INFO_SIZE			sizeof(struct sbi_tlb_info)
 
-int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 event, void *data);
+int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 hartid, void *data);
 
-void sbi_tlb_fifo_process(struct sbi_scratch *scratch, u32 event);
+void sbi_tlb_fifo_process(struct sbi_scratch *scratch);
 
 int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot);
 
+void sbi_tlb_fifo_sync(struct sbi_scratch *scratch);
+
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 50c05d61a00..c6ec76ed870 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_hart.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
 #define SBI_ECALL_VERSION_MINOR 1
@@ -36,6 +37,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	int ret = SBI_ENOTSUPP;
 	struct unpriv_trap uptrap;
 	struct sbi_tlb_info tlb_info;
+	u32 source_hart = sbi_current_hartid();
 
 	switch (regs->a7) {
 	case SBI_ECALL_SET_TIMER:
@@ -64,13 +66,18 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 					SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_ECALL_REMOTE_FENCE_I:
+		tlb_info.start  = 0;
+		tlb_info.size  = 0;
+		tlb_info.type  = SBI_ITLB_FLUSH;
+		tlb_info.shart_mask = 1UL << source_hart;
 		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
-					SBI_IPI_EVENT_FENCE_I, NULL);
+					SBI_IPI_EVENT_FENCE_I, &tlb_info);
 		break;
 	case SBI_ECALL_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)regs->a1;
 		tlb_info.size  = (unsigned long)regs->a2;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
+		tlb_info.shart_mask = 1UL << source_hart;
 
 		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
@@ -80,6 +87,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		tlb_info.size  = (unsigned long)regs->a2;
 		tlb_info.asid  = (unsigned long)regs->a3;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
 
 		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA_ASID,
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 18ff0d649ad..8d1dbf04431 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -54,6 +54,21 @@ bool sbi_fifo_is_full(struct sbi_fifo *fifo)
 	return ret;
 }
 
+/* Note: must be called with fifo->qlock held */
+static inline void  __sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
+{
+	u32 head;
+
+	head = (u32)fifo->tail + fifo->avail;
+	if (head >= fifo->num_entries)
+		head = head - fifo->num_entries;
+
+	sbi_memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
+
+	fifo->avail++;
+}
+
+
 /* Note: must be called with fifo->qlock held */
 static inline bool __sbi_fifo_is_empty(struct sbi_fifo *fifo)
 {
@@ -109,7 +124,9 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 
 	if (!fifo || !in)
 		return ret;
+
 	spin_lock(&fifo->qlock);
+
 	if (__sbi_fifo_is_empty(fifo)) {
 		spin_unlock(&fifo->qlock);
 		return ret;
@@ -120,12 +137,10 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 		if (index >= fifo->num_entries)
 			index = index - fifo->num_entries;
 		entry = (void *)fifo->queue + (u32)index * fifo->entry_size;
-		ret   = fptr(in, entry);
+		ret = fptr(in, entry);
+
 		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
 			break;
-		} else if (ret == SBI_FIFO_RESET) {
-			__sbi_fifo_reset(fifo);
-			break;
 		}
 	}
 	spin_unlock(&fifo->qlock);
@@ -135,8 +150,6 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 {
-	u32 head;
-
 	if (!fifo || !data)
 		return SBI_EINVAL;
 
@@ -146,14 +159,7 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 		spin_unlock(&fifo->qlock);
 		return SBI_ENOSPC;
 	}
-
-	head = (u32)fifo->tail + fifo->avail;
-	if (head >= fifo->num_entries)
-		head = head - fifo->num_entries;
-
-	sbi_memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
-
-	fifo->avail++;
+	__sbi_fifo_enqueue(fifo, data);
 
 	spin_unlock(&fifo->qlock);
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index b1077b504a7..1c84f9e052e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -9,15 +9,13 @@
  */
 
 #include <sbi/riscv_asm.h>
-#include <sbi/riscv_barrier.h>
 #include <sbi/riscv_atomic.h>
+#include <sbi/riscv_barrier.h>
 #include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 
 static unsigned long ipi_data_off;
@@ -40,20 +38,22 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
 	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
-	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID) {
-		ret = sbi_tlb_fifo_update(remote_scratch, event, data);
-		if (ret > 0)
-			goto done;
-		else if (ret < 0)
+	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID ||
+	    event == SBI_IPI_EVENT_FENCE_I ) {
+		ret = sbi_tlb_fifo_update(remote_scratch, hartid, data);
+		if (ret < 0)
 			return ret;
 	}
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
-	mb();
+	smp_wmb();
 	sbi_platform_ipi_send(plat, hartid);
-	if (event != SBI_IPI_EVENT_SOFT)
-		sbi_platform_ipi_sync(plat, hartid);
 
-done:
+	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
+	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID ||
+	    event == SBI_IPI_EVENT_FENCE_I ) {
+		sbi_tlb_fifo_sync(scratch);
+	}
+
 	return 0;
 }
 
@@ -70,12 +70,13 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
 			return SBI_ETRAP;
 	}
 
-	/* send IPIs to every other hart on the set */
+	/* Send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
 		if ((m & 1UL) && (i != hartid))
 			sbi_ipi_send(scratch, i, event, data);
 
-	/* If the current hart is on the set, send an IPI
+	/*
+	 * If the current hart is on the set, send an IPI
 	 * to it as well
 	 */
 	if (mask & (1UL << hartid))
@@ -91,7 +92,7 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
-	volatile unsigned long ipi_type;
+	unsigned long ipi_type;
 	unsigned int ipi_event;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data =
@@ -100,27 +101,32 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 	u32 hartid = sbi_current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
 
-	do {
-		ipi_type = ipi_data->ipi_type;
-		rmb();
-		ipi_event = __ffs(ipi_type);
+	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
+	ipi_event = 0;
+	while (ipi_type) {
+		if (!(ipi_type & 1UL))
+			goto skip;
+
 		switch (ipi_event) {
 		case SBI_IPI_EVENT_SOFT:
 			csr_set(CSR_MIP, MIP_SSIP);
 			break;
 		case SBI_IPI_EVENT_FENCE_I:
-			__asm__ __volatile("fence.i");
-			break;
 		case SBI_IPI_EVENT_SFENCE_VMA:
 		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
-			sbi_tlb_fifo_process(scratch, ipi_event);
+			sbi_tlb_fifo_process(scratch);
 			break;
 		case SBI_IPI_EVENT_HALT:
 			sbi_hart_hang();
 			break;
+		default:
+			break;
 		};
-		ipi_type = atomic_raw_clear_bit(ipi_event, &ipi_data->ipi_type);
-	} while (ipi_type > 0);
+
+skip:
+		ipi_type = ipi_type >> 1;
+		ipi_event++;
+	};
 }
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 104c066c18e..e4f6fe26bb5 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -9,17 +9,148 @@
  */
 
 #include <sbi/riscv_asm.h>
+#include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
-#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_platform.h>
 
-static unsigned long ipi_tlb_fifo_off;
-static unsigned long ipi_tlb_fifo_mem_off;
+static unsigned long tlb_sync_off;
+static unsigned long tlb_fifo_off;
+static unsigned long tlb_fifo_mem_off;
+
+static void sbi_tlb_flush_all(void)
+{
+	__asm__ __volatile("sfence.vma");
+}
+
+static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long i;
+
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
+		sbi_tlb_flush_all();
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__("sfence.vma %0"
+				     :
+				     : "r"(start + i)
+				     : "memory");
+	}
+}
+
+static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long asid  = tinfo->asid;
+	unsigned long i;
+
+	if (start == 0 && size == 0) {
+		sbi_tlb_flush_all();
+		return;
+	}
+
+	/* Flush entire MM context for a given ASID */
+	if (size == SBI_TLB_FLUSH_ALL) {
+		__asm__ __volatile__("sfence.vma x0, %0"
+				     :
+				     : "r"(asid)
+				     : "memory");
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__asm__ __volatile__("sfence.vma %0, %1"
+				     :
+				     : "r"(start + i), "r"(asid)
+				     : "memory");
+	}
+}
+
+static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
+{
+	if (tinfo->type == SBI_TLB_FLUSH_VMA) {
+		sbi_tlb_fifo_sfence_vma(tinfo);
+	} else if (tinfo->type == SBI_TLB_FLUSH_VMA_ASID) {
+		sbi_tlb_fifo_sfence_vma_asid(tinfo);
+	} else if (tinfo->type == SBI_ITLB_FLUSH)
+		__asm__ __volatile("fence.i");
+	else
+		sbi_printf("Invalid tlb flush request type [%lu]\n",
+			   tinfo->type);
+	return;
+}
+
+static void sbi_tlb_entry_process(struct sbi_scratch *scratch,
+				  struct sbi_tlb_info *tinfo)
+{
+	u32 i;
+	u64 m;
+	struct sbi_scratch *rscratch = NULL;
+	unsigned long *rtlb_sync = NULL;
+
+	sbi_tlb_local_flush(tinfo);
+	for (i = 0, m = tinfo->shart_mask; m; i++, m >>= 1) {
+		if (!(m & 1UL))
+			continue;
+
+		rscratch = sbi_hart_id_to_scratch(scratch, i);
+		rtlb_sync = sbi_scratch_offset_ptr(rscratch, tlb_sync_off);
+		while (atomic_raw_xchg_ulong(rtlb_sync, 1)) ;
+	}
+}
+
+static void sbi_tlb_fifo_process_count(struct sbi_scratch *scratch, int count)
+{
+	struct sbi_tlb_info tinfo;
+	u32 deq_count = 0;
+	struct sbi_fifo *tlb_fifo =
+			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
+
+	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo)) {
+		sbi_tlb_entry_process(scratch, &tinfo);
+		deq_count++;
+		if (deq_count > count)
+			break;
+
+	}
+}
+
+void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
+{
+	struct sbi_tlb_info tinfo;
+	struct sbi_fifo *tlb_fifo =
+			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
+
+	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo))
+		sbi_tlb_entry_process(scratch, &tinfo);
+}
+
+void sbi_tlb_fifo_sync(struct sbi_scratch *scratch)
+{
+	unsigned long *tlb_sync =
+			sbi_scratch_offset_ptr(scratch, tlb_sync_off);
+
+	while (!atomic_raw_xchg_ulong(tlb_sync, 0)) {
+		/*
+		 * While we are waiting for remote hart to set the sync,
+		 * consume fifo requests to avoid deadlock.
+		 */
+		sbi_tlb_fifo_process_count(scratch, 1);
+	}
+
+	return;
+}
 
 static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
 					     struct sbi_tlb_info *next)
@@ -36,9 +167,11 @@ static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
 	if (next->start <= curr->start && next_end > curr_end) {
 		curr->start = next->start;
 		curr->size  = next->size;
+		curr->shart_mask = curr->shart_mask | next->shart_mask;
 		ret	    = SBI_FIFO_UPDATED;
 	} else if (next->start >= curr->start && next_end <= curr_end) {
-		ret = SBI_FIFO_SKIP;
+		curr->shart_mask = curr->shart_mask | next->shart_mask;
+		ret		 = SBI_FIFO_SKIP;
 	}
 
 	return ret;
@@ -54,11 +187,13 @@ static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
  * Case2:
  *	if flush request range in current fifo entry lies within next flush
  *	request, update the current entry.
- * Case3:
-	if a complete vma flush is requested, then all entries can be deleted
-	and new request can be enqueued. This will not be done for ASID case
-	as that means we have to iterate again in the fifo to figure out which
-	entries belong to that ASID.
+ *
+ * Note:
+ *	We can not issue a fifo reset anymore if a complete vma flush is requested.
+ *	This is because we are queueing FENCE.I requests as well now.
+ *	To ease up the pressure in enqueue/fifo sync path, try to dequeue 1 element
+ *	before continuing the while loop. This method is preferred over wfi/ipi because
+ *	of MMIO cost involved in later method.
  */
 static int sbi_tlb_fifo_update_cb(void *in, void *data)
 {
@@ -71,29 +206,27 @@ static int sbi_tlb_fifo_update_cb(void *in, void *data)
 
 	curr = (struct sbi_tlb_info *)data;
 	next = (struct sbi_tlb_info *)in;
+
 	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
 	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
 		if (next->asid == curr->asid)
 			ret = __sbi_tlb_fifo_range_check(curr, next);
 	} else if (next->type == SBI_TLB_FLUSH_VMA &&
 		   curr->type == SBI_TLB_FLUSH_VMA) {
-		if (next->size == SBI_TLB_FLUSH_ALL)
-			ret = SBI_FIFO_RESET;
-		else
 			ret = __sbi_tlb_fifo_range_check(curr, next);
 	}
 
 	return ret;
 }
 
-int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 event, void *data)
+int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 {
 	int ret;
-	struct sbi_fifo *ipi_tlb_fifo;
+	struct sbi_fifo *tlb_fifo_r;
+	struct sbi_scratch *lscratch;
 	struct sbi_tlb_info *tinfo = data;
+	u32 curr_hartid = sbi_current_hartid();
 
-	ipi_tlb_fifo = sbi_scratch_offset_ptr(scratch,
-					      ipi_tlb_fifo_off);
 	/*
 	 * If address range to flush is too big then simply
 	 * upgrade it to flush all because we can only flush
@@ -104,123 +237,79 @@ int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 event, void *data)
 		tinfo->size = SBI_TLB_FLUSH_ALL;
 	}
 
-	ret = sbi_fifo_inplace_update(ipi_tlb_fifo, data,
-				      sbi_tlb_fifo_update_cb);
-	if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
+	/*
+	 * If the request is to queue a tlb flush entry for itself
+	 * then just do a local flush and return;
+	 */
+	if (hartid == curr_hartid) {
+		sbi_tlb_local_flush(tinfo);
+		return -1;
+	}
+
+	lscratch = sbi_hart_id_to_scratch(rscratch, curr_hartid);
+	tlb_fifo_r = sbi_scratch_offset_ptr(rscratch, tlb_fifo_off);
+
+	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, sbi_tlb_fifo_update_cb);
+	if (ret != SBI_FIFO_UNCHANGED) {
 		return 1;
 	}
 
-	while (sbi_fifo_enqueue(ipi_tlb_fifo, data) < 0) {
+	while (sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
 		/**
 		 * For now, Busy loop until there is space in the fifo.
 		 * There may be case where target hart is also
 		 * enqueue in source hart's fifo. Both hart may busy
 		 * loop leading to a deadlock.
-		 * TODO: Introduce a wait/wakeup event mechansim to handle
+		 * TODO: Introduce a wait/wakeup event mechanism to handle
 		 * this properly.
 		 */
-		__asm__ __volatile("nop");
-		__asm__ __volatile("nop");
+		sbi_tlb_fifo_process_count(lscratch, 1);
+		sbi_dprintf(rscratch, "hart%d: hart%d tlb fifo full\n",
+			    curr_hartid, hartid);
 	}
 
 	return 0;
 }
 
-static void sbi_tlb_flush_all(void)
-{
-	__asm__ __volatile("sfence.vma");
-}
-
-static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
-{
-	unsigned long start = tinfo->start;
-	unsigned long size  = tinfo->size;
-	unsigned long i;
-
-	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
-		sbi_tlb_flush_all();
-		return;
-	}
-
-	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__("sfence.vma %0"
-				     :
-				     : "r"(start + i)
-				     : "memory");
-	}
-}
-
-static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
-{
-	unsigned long start = tinfo->start;
-	unsigned long size  = tinfo->size;
-	unsigned long asid  = tinfo->asid;
-	unsigned long i;
-
-	if (start == 0 && size == 0) {
-		sbi_tlb_flush_all();
-		return;
-	}
-
-	/* Flush entire MM context for a given ASID */
-	if (size == SBI_TLB_FLUSH_ALL) {
-		__asm__ __volatile__("sfence.vma x0, %0"
-				     :
-				     : "r"(asid)
-				     : "memory");
-		return;
-	}
-
-	for (i = 0; i < size; i += PAGE_SIZE) {
-		__asm__ __volatile__("sfence.vma %0, %1"
-				     :
-				     : "r"(start + i), "r"(asid)
-				     : "memory");
-	}
-}
-
-void sbi_tlb_fifo_process(struct sbi_scratch *scratch, u32 event)
-{
-	struct sbi_tlb_info tinfo;
-	struct sbi_fifo *ipi_tlb_fifo =
-			sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
-
-	while (!sbi_fifo_dequeue(ipi_tlb_fifo, &tinfo)) {
-		if (tinfo.type == SBI_TLB_FLUSH_VMA)
-			sbi_tlb_fifo_sfence_vma(&tinfo);
-		else if (tinfo.type == SBI_TLB_FLUSH_VMA_ASID)
-			sbi_tlb_fifo_sfence_vma_asid(&tinfo);
-		sbi_memset(&tinfo, 0, SBI_TLB_INFO_SIZE);
-	}
-}
-
 int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 {
-	void *ipi_tlb_mem;
-	struct sbi_fifo *ipi_tlb_q;
+	void *tlb_mem;
+	unsigned long *tlb_sync;
+	struct sbi_fifo *tlb_q;
 
 	if (cold_boot) {
-		ipi_tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*ipi_tlb_q),
+		tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync),
+							    "IPI_TLB_SYNC");
+		if (!tlb_sync_off)
+			return SBI_ENOMEM;
+		tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*tlb_q),
 							    "IPI_TLB_FIFO");
-		if (!ipi_tlb_fifo_off)
+		if (!tlb_fifo_off) {
+			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
-		ipi_tlb_fifo_mem_off = sbi_scratch_alloc_offset(
+		}
+		tlb_fifo_mem_off = sbi_scratch_alloc_offset(
 				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE,
 				"IPI_TLB_FIFO_MEM");
-		if (!ipi_tlb_fifo_mem_off) {
-			sbi_scratch_free_offset(ipi_tlb_fifo_off);
+		if (!tlb_fifo_mem_off) {
+			sbi_scratch_free_offset(tlb_fifo_off);
+			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
 		}
 	} else {
-		if (!ipi_tlb_fifo_off ||
-		    !ipi_tlb_fifo_mem_off)
+		if (!tlb_sync_off ||
+		    !tlb_fifo_off ||
+		    !tlb_fifo_mem_off)
 			return SBI_ENOMEM;
 	}
 
-	ipi_tlb_q = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_off);
-	ipi_tlb_mem = sbi_scratch_offset_ptr(scratch, ipi_tlb_fifo_mem_off);
+	tlb_sync = sbi_scratch_offset_ptr(scratch, tlb_sync_off);
+	tlb_q = sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
+	tlb_mem = sbi_scratch_offset_ptr(scratch, tlb_fifo_mem_off);
+
+	*tlb_sync = 0;
 
-	sbi_fifo_init(ipi_tlb_q, ipi_tlb_mem,
+	sbi_fifo_init(tlb_q, tlb_mem,
 		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
 
 	return 0;

From 75229705a0bf804099fbf32b61d7f6ba459226ec Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 14 Aug 2019 18:02:15 -0700
Subject: [PATCH 0304/1765] platform: Remove the ipi_sync method from all
 platforms.

OpenSBI manages outstanding TLB flush requests by queueing
them in a fifo synchronously. An ipi sync which uses an
atomic operation on MMIO address is no longer required.

Remove the ipi sync method from platform header and all usage.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 15 ---------------
 lib/utils/sys/clint.c             | 23 -----------------------
 platform/ariane-fpga/platform.c   |  1 -
 platform/kendryte/k210/platform.c |  1 -
 platform/qemu/sifive_u/platform.c |  1 -
 platform/qemu/virt/platform.c     |  1 -
 platform/sifive/fu540/platform.c  |  1 -
 platform/template/platform.c      | 10 ----------
 8 files changed, 53 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 34cd732c952..97195c411f5 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -90,8 +90,6 @@ struct sbi_platform_operations {
 
 	/** Send IPI to a target HART */
 	void (*ipi_send)(u32 target_hart);
-	/** Wait for target HART to acknowledge IPI */
-	void (*ipi_sync)(u32 target_hart);
 	/** Clear IPI for a target HART */
 	void (*ipi_clear)(u32 target_hart);
 	/** Initialize IPI for current HART */
@@ -370,19 +368,6 @@ static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
 		sbi_platform_ops(plat)->ipi_send(target_hart);
 }
 
-/**
- * Wait for target HART to acknowledge IPI
- *
- * @param plat pointer to struct sbi_platform
- * @param target_hart HART ID of IPI target
- */
-static inline void sbi_platform_ipi_sync(const struct sbi_platform *plat,
-					 u32 target_hart)
-{
-	if (plat && sbi_platform_ops(plat)->ipi_sync)
-		sbi_platform_ops(plat)->ipi_sync(target_hart);
-}
-
 /**
  * Clear IPI for a target HART
  *
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 055a51358de..d58e4e62264 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -25,29 +25,6 @@ void clint_ipi_send(u32 target_hart)
 	writel(1, &clint_ipi[target_hart]);
 }
 
-void clint_ipi_sync(u32 target_hart)
-{
-	u32 target_ipi, incoming_ipi;
-	u32 source_hart = sbi_current_hartid();
-
-	if (clint_ipi_hart_count <= target_hart)
-		return;
-
-	/* Wait until target HART has handled IPI */
-	incoming_ipi = 0;
-	while (1) {
-		target_ipi = readl(&clint_ipi[target_hart]);
-		if (!target_ipi)
-			break;
-
-		incoming_ipi |=
-			atomic_raw_xchg_uint(&clint_ipi[source_hart], 0);
-	}
-
-	if (incoming_ipi)
-		writel(incoming_ipi, &clint_ipi[source_hart]);
-}
-
 void clint_ipi_clear(u32 target_hart)
 {
 	if (clint_ipi_hart_count <= target_hart)
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 62cee906888..daeb9cd2e2d 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -185,7 +185,6 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_init = ariane_irqchip_init,
 	.ipi_init = ariane_ipi_init,
 	.ipi_send = clint_ipi_send,
-	.ipi_sync = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 	.timer_init = ariane_timer_init,
 	.timer_value = clint_timer_value,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 4c31ee9a3c8..19c569ccb5d 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -102,7 +102,6 @@ const struct sbi_platform_operations platform_ops = {
 
 	.ipi_init  = k210_ipi_init,
 	.ipi_send  = clint_ipi_send,
-	.ipi_sync  = clint_ipi_sync,
 	.ipi_clear = clint_ipi_clear,
 
 	.timer_init	   = k210_timer_init,
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index d8b586fa866..40d658424cb 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -136,7 +136,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= sifive_u_console_init,
 	.irqchip_init		= sifive_u_irqchip_init,
 	.ipi_send		= clint_ipi_send,
-	.ipi_sync		= clint_ipi_sync,
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= sifive_u_ipi_init,
 	.timer_value		= clint_timer_value,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 1cf0b7d0f01..6ef6a19a2ea 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -141,7 +141,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= virt_console_init,
 	.irqchip_init		= virt_irqchip_init,
 	.ipi_send		= clint_ipi_send,
-	.ipi_sync		= clint_ipi_sync,
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= virt_ipi_init,
 	.timer_value		= clint_timer_value,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 827e294ecdf..81e8e8df772 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -199,7 +199,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= fu540_console_init,
 	.irqchip_init		= fu540_irqchip_init,
 	.ipi_send		= clint_ipi_send,
-	.ipi_sync		= clint_ipi_sync,
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= fu540_ipi_init,
 	.timer_value		= clint_timer_value,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 148bfa9b8da..e123f3a1d97 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -124,15 +124,6 @@ static void platform_ipi_send(u32 target_hart)
 	clint_ipi_send(target_hart);
 }
 
-/*
- * Wait for target HART to acknowledge IPI.
- */
-static void platform_ipi_sync(u32 target_hart)
-{
-	/* Example if the generic CLINT driver is used */
-	clint_ipi_sync(target_hart);
-}
-
 /*
  * Clear IPI for a target HART.
  */
@@ -216,7 +207,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= platform_console_init,
 	.irqchip_init		= platform_irqchip_init,
 	.ipi_send		= platform_ipi_send,
-	.ipi_sync		= platform_ipi_sync,
 	.ipi_clear		= platform_ipi_clear,
 	.ipi_init		= platform_ipi_init,
 	.timer_value		= platform_timer_value,

From a2a7763ac7651e64c3928ba0a13be9317bd48c4d Mon Sep 17 00:00:00 2001
From: Palmer Dabbelt <palmer@sifive.com>
Date: Sat, 17 Aug 2019 19:41:09 +0530
Subject: [PATCH 0305/1765] Include `git describe` in OpenSBI

OpenSBI includes a version, but that is only updated when tagged.  For
users that are using the git releases we instead end up with an
ambiguous version number, which makes it hard to figure out what
everyone is using.  This patch checks for a git directory and prints out
the result of `git describe`, which is a mix of pretty and unambiguous.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
---
 Makefile           | 4 ++++
 lib/sbi/sbi_init.c | 5 +++++
 2 files changed, 9 insertions(+)

diff --git a/Makefile b/Makefile
index 78c28c0fc3c..9784598f136 100644
--- a/Makefile
+++ b/Makefile
@@ -65,6 +65,7 @@ export firmware_dir=$(CURDIR)/firmware
 # Find library version
 OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
 OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
+OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe; fi)
 
 # Setup compilation commands
 ifdef CROSS_COMPILE
@@ -151,6 +152,9 @@ endif
 # Setup compilation commands flags
 GENFLAGS	=	-I$(platform_src_dir)/include
 GENFLAGS	+=	-I$(include_dir)
+ifneq ($(OPENSBI_VERSION_GIT),)
+GENFLAGS	+=	-DOPENSBI_VERSION_GIT="\"$(OPENSBI_VERSION_GIT)\""
+endif
 GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 4f47a6c8adf..4663a30852a 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -34,8 +34,13 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	misa_string(str, sizeof(str));
+#ifdef OPENSBI_VERSION_GIT
+	sbi_printf("\nOpenSBI %s (%s %s)\n", OPENSBI_VERSION_GIT,
+		   __DATE__, __TIME__);
+#else
 	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n", OPENSBI_VERSION_MAJOR,
 		   OPENSBI_VERSION_MINOR, __DATE__, __TIME__);
+#endif
 
 	sbi_printf(BANNER);
 

From 3cbb419def46e95b04d43f2d95f126f653e55589 Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon7@andestech.com>
Date: Thu, 18 Jul 2019 15:52:25 +0800
Subject: [PATCH 0306/1765] platform: Add Andes AE350 initial support

This commit provides basic support for the AE350 platform.

Signed-off-by: Zong Li <zongbox@gmail.com>
Signed-off-by: Nylon Chen <nylon7@andestech.com>
---
 docs/platform/andes-ae350.md    |  28 +++++
 docs/platform/platform.md       |   3 +
 platform/andes/ae350/config.mk  |  36 ++++++
 platform/andes/ae350/objects.mk |  11 ++
 platform/andes/ae350/platform.c | 194 ++++++++++++++++++++++++++++++++
 platform/andes/ae350/platform.h |  67 +++++++++++
 platform/andes/ae350/plicsw.c   | 145 ++++++++++++++++++++++++
 platform/andes/ae350/plicsw.h   |  46 ++++++++
 platform/andes/ae350/plmt.c     |  97 ++++++++++++++++
 platform/andes/ae350/plmt.h     |  23 ++++
 10 files changed, 650 insertions(+)
 create mode 100644 docs/platform/andes-ae350.md
 create mode 100644 platform/andes/ae350/config.mk
 create mode 100644 platform/andes/ae350/objects.mk
 create mode 100644 platform/andes/ae350/platform.c
 create mode 100644 platform/andes/ae350/platform.h
 create mode 100644 platform/andes/ae350/plicsw.c
 create mode 100644 platform/andes/ae350/plicsw.h
 create mode 100644 platform/andes/ae350/plmt.c
 create mode 100644 platform/andes/ae350/plmt.h

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
new file mode 100644
index 00000000000..b979927c7cd
--- /dev/null
+++ b/docs/platform/andes-ae350.md
@@ -0,0 +1,28 @@
+Andes AE350 SoC Platform
+========================
+The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with
+level-one memories,interrupt controller, debug module, AXI and AHB Bus
+Matrix Controller, AXI-to-AHB Bridge and a collection of fundamentalAHB/APB
+bus IP components pre-integrated together as a system design.The high-quality
+and configurable AHB/APB IPs suites a majority embedded systems,
+and the verified platform serves as a starting point to jump start SoC designs.
+
+To build platform specific library and firmwares, provide the *PLATFORM=andes/ae350* parameter to the top level make command.
+
+Platform Options
+----------------
+
+The Andes AE350 platform does not have any platform-specific options.
+
+Building Andes AE350 Platform
+-----------------------------
+
+To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using the compile time option FW_PAYLOAD_FDT_PATH.
+
+AE350's dts is included in https://github.com/andestech/linux/tree/ast-v3_2_0-release-public
+
+**Linux Kernel Payload**
+
+```
+make PLATFORM=andes/ae350 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<ae350.dtb path>
+```
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 49fa3e9900d..424efe9bc3f 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -24,6 +24,8 @@ OpenSBI currently supports the following virtual and hardware platforms:
 * **Ariane FPGA SoC**: Platform support for the Ariane FPGA SoC used on
   Genesys 2 board.
 
+* **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350).
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -34,3 +36,4 @@ facilitate the implementation.
 [qemu_sifive_u.md]: qemu_sifive_u.md
 [sifive_fu540.md]: sifive_fu540.md
 [ariane-fpga.md]: ariane-fpga.md
+[andes_ae350.md]: andes-ae350.md
diff --git a/platform/andes/ae350/config.mk b/platform/andes/ae350/config.mk
new file mode 100644
index 00000000000..f555ef5be78
--- /dev/null
+++ b/platform/andes/ae350/config.mk
@@ -0,0 +1,36 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Andes Technology Corporation
+#
+# Authors:
+#   Zong Li <zong@andestech.com>
+#   Nylon Chen <nylon7@andestech.com>
+
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Blobs to build
+FW_TEXT_START=0x00000000
+
+FW_DYNAMIC=y
+
+FW_JUMP=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  FW_JUMP_ADDR=0x400000
+else
+  FW_JUMP_ADDR=0x200000
+endif
+FW_JUMP_FDT_ADDR=0x2000000
+
+FW_PAYLOAD=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+
+FW_PAYLOAD_FDT_ADDR=0x2000000
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
new file mode 100644
index 00000000000..4ed152e7327
--- /dev/null
+++ b/platform/andes/ae350/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Andes Technology Corporation
+#
+# Authors:
+#   Zong Li <zong@andestech.com>
+#   Nylon Chen <nylon7@andestech.com>
+#
+
+platform-objs-y += plicsw.o plmt.o platform.o
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
new file mode 100644
index 00000000000..d14266d95b7
--- /dev/null
+++ b/platform/andes/ae350/platform.c
@@ -0,0 +1,194 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/irqchip/plic.h>
+#include "platform.h"
+#include "plmt.h"
+#include "plicsw.h"
+
+/* Platform final initialization. */
+static int ae350_final_init(bool cold_boot)
+{
+	void *fdt;
+
+	/* enable L1 cache */
+	uintptr_t mcache_ctl_val = csr_read(CSR_MCACHECTL);
+
+	if (!(mcache_ctl_val & V5_MCACHE_CTL_IC_EN))
+		mcache_ctl_val |= V5_MCACHE_CTL_IC_EN;
+	if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN))
+		mcache_ctl_val |= V5_MCACHE_CTL_DC_EN;
+	if (!(mcache_ctl_val & V5_MCACHE_CTL_CCTL_SUEN))
+		mcache_ctl_val |= V5_MCACHE_CTL_CCTL_SUEN;
+	csr_write(CSR_MCACHECTL, mcache_ctl_val);
+
+	/* enable L2 cache */
+	uint32_t *l2c_ctl_base = (void *)AE350_L2C_ADDR + V5_L2C_CTL_OFFSET;
+	uint32_t l2c_ctl_val = *l2c_ctl_base;
+
+	if (!(l2c_ctl_val & V5_L2C_CTL_ENABLE_MASK))
+		l2c_ctl_val |= V5_L2C_CTL_ENABLE_MASK;
+	*l2c_ctl_base = l2c_ctl_val;
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	plic_fdt_fixup(fdt, "riscv,plic0");
+
+	return 0;
+}
+
+/* Get number of PMP regions for given HART. */
+static u32 ae350_pmp_region_count(u32 hartid)
+{
+	return 1;
+}
+
+/*
+ * Get PMP regions details (namely: protection, base address, and size) for
+ * a given HART.
+ */
+static int ae350_pmp_region_info(u32 hartid, u32 index, ulong *prot,
+				 ulong *addr, ulong *log2size)
+{
+	int ret = 0;
+
+	switch (index) {
+	case 0:
+		*prot	  = PMP_R | PMP_W | PMP_X;
+		*addr	  = 0;
+		*log2size = __riscv_xlen;
+		break;
+	default:
+		ret = -1;
+		break;
+	};
+
+	return ret;
+}
+
+/* Initialize the platform console. */
+static int ae350_console_init(void)
+{
+	return uart8250_init(AE350_UART_ADDR,
+			     AE350_UART_FREQUENCY,
+			     AE350_UART_BAUDRATE,
+			     AE350_UART_REG_SHIFT,
+			     AE350_UART_REG_WIDTH);
+}
+
+/* Initialize the platform interrupt controller for current HART. */
+static int ae350_irqchip_init(bool cold_boot)
+{
+	u32 hartid = sbi_current_hartid();
+	int ret;
+
+	if (cold_boot) {
+		ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
+					     AE350_PLIC_NUM_SOURCES,
+					     AE350_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+}
+
+/* Initialize IPI for current HART. */
+static int ae350_ipi_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = plicsw_cold_ipi_init(AE350_PLICSW_ADDR,
+					   AE350_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return plicsw_warm_ipi_init();
+}
+
+/* Initialize platform timer for current HART. */
+static int ae350_timer_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = plmt_cold_timer_init(AE350_PLMT_ADDR,
+					   AE350_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return plmt_warm_timer_init();
+}
+
+/* Reboot the platform. */
+static int ae350_system_reboot(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System reboot\n");
+	return 0;
+}
+
+/* Shutdown or poweroff the platform. */
+static int ae350_system_shutdown(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System shutdown\n");
+	return 0;
+}
+
+/* Platform descriptor. */
+const struct sbi_platform_operations platform_ops = {
+
+	.final_init = ae350_final_init,
+
+	.pmp_region_count = ae350_pmp_region_count,
+	.pmp_region_info  = ae350_pmp_region_info,
+
+	.console_init = ae350_console_init,
+	.console_putc = uart8250_putc,
+	.console_getc = uart8250_getc,
+
+	.irqchip_init = ae350_irqchip_init,
+
+	.ipi_init     = ae350_ipi_init,
+	.ipi_send     = plicsw_ipi_send,
+	.ipi_clear    = plicsw_ipi_clear,
+
+	.timer_init	   = ae350_timer_init,
+	.timer_value	   = plmt_timer_value,
+	.timer_event_start = plmt_timer_event_start,
+	.timer_event_stop  = plmt_timer_event_stop,
+
+	.system_reboot	 = ae350_system_reboot,
+	.system_shutdown = ae350_system_shutdown
+};
+
+const struct sbi_platform platform = {
+
+	.opensbi_version = OPENSBI_VERSION,
+	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+	.name = "Andes AE350",
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count = AE350_HART_COUNT,
+	.hart_stack_size = AE350_HART_STACK_SIZE,
+	.disabled_hart_mask = 0,
+	.platform_ops_addr = (unsigned long)&platform_ops
+};
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
new file mode 100644
index 00000000000..eff29963586
--- /dev/null
+++ b/platform/andes/ae350/platform.h
@@ -0,0 +1,67 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#ifndef _AE350_PLATFORM_H_
+#define _AE350_PLATFORM_H_
+
+#define AE350_HART_COUNT		4
+#define AE350_HART_STACK_SIZE		8192
+
+#define AE350_PLIC_ADDR			0xe4000000
+#define AE350_PLIC_NUM_SOURCES		71
+
+#define AE350_PLICSW_ADDR		0xe6400000
+
+#define AE350_PLMT_ADDR			0xe6000000
+
+#define AE350_L2C_ADDR			0xe0500000
+
+#define AE350_UART_ADDR_OFFSET		0x20
+#define AE350_UART_ADDR			(0xf0300000 + AE350_UART_ADDR_OFFSET)
+#define AE350_UART_FREQUENCY		19660800
+#define AE350_UART_BAUDRATE		38400
+#define AE350_UART_REG_SHIFT		2
+#define AE350_UART_REG_WIDTH		0
+
+/* nds mcache_ctl register*/
+#define CSR_MCACHECTL			0x7ca
+
+#define V5_MCACHE_CTL_IC_EN_OFFSET      0
+#define V5_MCACHE_CTL_DC_EN_OFFSET      1
+#define V5_MCACHE_CTL_IC_ECCEN_OFFSET   2
+#define V5_MCACHE_CTL_DC_ECCEN_OFFSET   4
+#define V5_MCACHE_CTL_IC_RWECC_OFFSET   6
+#define V5_MCACHE_CTL_DC_RWECC_OFFSET   7
+#define V5_MCACHE_CTL_CCTL_SUEN_OFFSET  8
+
+#define V5_MCACHE_CTL_IC_EN     (1UL << V5_MCACHE_CTL_IC_EN_OFFSET)
+#define V5_MCACHE_CTL_DC_EN     (1UL << V5_MCACHE_CTL_DC_EN_OFFSET)
+#define V5_MCACHE_CTL_IC_RWECC  (1UL << V5_MCACHE_CTL_IC_RWECC_OFFSET)
+#define V5_MCACHE_CTL_DC_RWECC  (1UL << V5_MCACHE_CTL_DC_RWECC_OFFSET)
+#define V5_MCACHE_CTL_CCTL_SUEN (1UL << V5_MCACHE_CTL_CCTL_SUEN_OFFSET)
+
+#define V5_L2C_CTL_OFFSET           0x8
+#define V5_L2C_CTL_ENABLE_OFFSET    0
+#define V5_L2C_CTL_IPFDPT_OFFSET    3
+#define V5_L2C_CTL_DPFDPT_OFFSET    5
+#define V5_L2C_CTL_TRAMOCTL_OFFSET  8
+#define V5_L2C_CTL_TRAMICTL_OFFSET  10
+#define V5_L2C_CTL_DRAMOCTL_OFFSET  11
+#define V5_L2C_CTL_DRAMICTL_OFFSET  13
+
+#define V5_L2C_CTL_ENABLE_MASK      (1UL << V5_L2C_CTL_ENABLE_OFFSET)
+#define V5_L2C_CTL_IPFDPT_MASK      (3UL << V5_L2C_CTL_IPFDPT_OFFSET)
+#define V5_L2C_CTL_DPFDPT_MASK      (3UL << V5_L2C_CTL_DPFDPT_OFFSET)
+#define V5_L2C_CTL_TRAMOCTL_MASK    (3UL << V5_L2C_CTL_TRAMOCTL_OFFSET)
+#define V5_L2C_CTL_TRAMICTL_MASK    (1UL << V5_L2C_CTL_TRAMICTL_OFFSET)
+#define V5_L2C_CTL_DRAMOCTL_MASK    (3UL << V5_L2C_CTL_DRAMOCTL_OFFSET)
+#define V5_L2C_CTL_DRAMICTL_MASK    (1UL << V5_L2C_CTL_DRAMICTL_OFFSET)
+
+#endif /* _AE350_PLATFORM_H_ */
diff --git a/platform/andes/ae350/plicsw.c b/platform/andes/ae350/plicsw.c
new file mode 100644
index 00000000000..17fe9478b3b
--- /dev/null
+++ b/platform/andes/ae350/plicsw.c
@@ -0,0 +1,145 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/riscv_io.h>
+#include "plicsw.h"
+#include "platform.h"
+
+static u32 plicsw_ipi_hart_count;
+static struct plicsw plicsw_dev[AE350_HART_COUNT];
+
+static inline void plicsw_claim(void)
+{
+	u32 source_hart = sbi_current_hartid();
+
+	plicsw_dev[source_hart].source_id =
+		readl(plicsw_dev[source_hart].plicsw_claim);
+}
+
+static inline void plicsw_complete(void)
+{
+	u32 source_hart = sbi_current_hartid();
+	u32 source = plicsw_dev[source_hart].source_id;
+
+	writel(source, plicsw_dev[source_hart].plicsw_claim);
+}
+
+static inline u32 plicsw_get_pending(u32 source_hart, u32 target_hart)
+{
+	return readl(plicsw_dev[source_hart].plicsw_pending)
+	       & (PLICSW_HART_MASK >> target_hart);
+}
+
+static inline void plic_sw_pending(u32 target_hart)
+{
+	/*
+	 * The pending array registers are w1s type.
+	 * IPI pending array mapping as following:
+	 *
+	 * Pending array start address: base + 0x1000
+	 * -------------------------------------
+	 * | hart 3 | hart 2 | hart 1 | hart 0 |
+	 * -------------------------------------
+	 * Each hart X can send IPI to another hart by setting the
+	 * corresponding bit in hart X own region(see the below).
+	 *
+	 * In each hart region:
+	 * -----------------------------------------------
+	 * | bit 7 | bit 6 | bit 5 | bit 4 | ... | bit 0 |
+	 * -----------------------------------------------
+	 * The bit 7 is used to send IPI to hart 0
+	 * The bit 6 is used to send IPI to hart 1
+	 * The bit 5 is used to send IPI to hart 2
+	 * The bit 4 is used to send IPI to hart 3
+	 */
+	u32 source_hart = sbi_current_hartid();
+	u32 target_offset = (PLICSW_PENDING_PER_HART - 1) - target_hart;
+	u32 per_hart_offset = PLICSW_PENDING_PER_HART * source_hart;
+	u32 val = 1 << target_offset << per_hart_offset;
+
+	writel(val, plicsw_dev[source_hart].plicsw_pending);
+}
+
+void plicsw_ipi_send(u32 target_hart)
+{
+	if (plicsw_ipi_hart_count <= target_hart)
+		return;
+
+	/* Set PLICSW IPI */
+	plic_sw_pending(target_hart);
+}
+
+void plicsw_ipi_clear(u32 target_hart)
+{
+	if (plicsw_ipi_hart_count <= target_hart)
+		return;
+
+	/* Clear CLINT IPI */
+	plicsw_claim();
+	plicsw_complete();
+}
+
+int plicsw_warm_ipi_init(void)
+{
+	u32 hartid = sbi_current_hartid();
+
+	if (!plicsw_dev[hartid].plicsw_pending
+	    && !plicsw_dev[hartid].plicsw_enable
+	    && !plicsw_dev[hartid].plicsw_claim)
+		return -1;
+
+	/* Clear PLICSW IPI */
+	plicsw_ipi_clear(hartid);
+
+	return 0;
+}
+
+int plicsw_cold_ipi_init(unsigned long base, u32 hart_count)
+{
+	/* Setup source priority */
+	uint32_t *priority = (void *)base + PLICSW_PRIORITY_BASE;
+
+	for (int i = 0; i < AE350_HART_COUNT*PLICSW_PENDING_PER_HART; i++)
+		writel(1, &priority[i]);
+
+	/* Setup target enable.*/
+	uint32_t enable_mask = PLICSW_HART_MASK;
+
+	for (int i = 0; i < AE350_HART_COUNT; i++) {
+		uint32_t *enable = (void *)base + PLICSW_ENABLE_BASE
+			+ PLICSW_ENABLE_PER_HART * i;
+		writel(enable_mask, &enable[0]);
+		enable_mask >>= 1;
+	}
+
+	/* Figure-out PLICSW IPI register address */
+	plicsw_ipi_hart_count = hart_count;
+
+	for (u32 hartid = 0; hartid < AE350_HART_COUNT; hartid++) {
+		plicsw_dev[hartid].source_id = 0;
+		plicsw_dev[hartid].plicsw_pending =
+			(void *)base
+			+ PLICSW_PENDING_BASE
+			+ ((hartid / 4) * 4);
+		plicsw_dev[hartid].plicsw_enable  =
+			(void *)base
+			+ PLICSW_ENABLE_BASE
+			+ PLICSW_ENABLE_PER_HART * hartid;
+		plicsw_dev[hartid].plicsw_claim   =
+			(void *)base
+			+ PLICSW_CONTEXT_BASE
+			+ PLICSW_CONTEXT_CLAIM
+			+ PLICSW_CONTEXT_PER_HART * hartid;
+	}
+
+	return 0;
+}
diff --git a/platform/andes/ae350/plicsw.h b/platform/andes/ae350/plicsw.h
new file mode 100644
index 00000000000..8be61945b9d
--- /dev/null
+++ b/platform/andes/ae350/plicsw.h
@@ -0,0 +1,46 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#ifndef _AE350_PLICSW_H_
+#define _AE350_PLICSW_H_
+
+#define PLICSW_PRIORITY_BASE		0x4
+
+#define PLICSW_PENDING_BASE		0x1000
+#define PLICSW_PENDING_PER_HART		0x8
+
+#define PLICSW_ENABLE_BASE		0x2000
+#define PLICSW_ENABLE_PER_HART		0x80
+
+#define PLICSW_CONTEXT_BASE		0x200000
+#define PLICSW_CONTEXT_PER_HART		0x1000
+#define PLICSW_CONTEXT_CLAIM		0x4
+
+#define PLICSW_HART_MASK		0x80808080
+
+struct plicsw {
+	u32 source_id;
+
+	volatile uint32_t *plicsw_pending;
+	volatile uint32_t *plicsw_enable;
+	volatile uint32_t *plicsw_claim;
+};
+
+void plicsw_ipi_send(u32 target_hart);
+
+void plicsw_ipi_sync(u32 target_hart);
+
+void plicsw_ipi_clear(u32 target_hart);
+
+int plicsw_warm_ipi_init(void);
+
+int plicsw_cold_ipi_init(unsigned long base, u32 hart_count);
+
+#endif /* _AE350_PLICSW_H_ */
diff --git a/platform/andes/ae350/plmt.c b/platform/andes/ae350/plmt.c
new file mode 100644
index 00000000000..db8081358a9
--- /dev/null
+++ b/platform/andes/ae350/plmt.c
@@ -0,0 +1,97 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_hart.h>
+
+static u32 plmt_time_hart_count;
+static volatile void *plmt_time_base;
+static volatile u64 *plmt_time_val;
+static volatile u64 *plmt_time_cmp;
+
+u64 plmt_timer_value(void)
+{
+#if __riscv_xlen == 64
+	return readq_relaxed(plmt_time_val);
+#else
+	u32 lo, hi;
+
+	do {
+		hi = readl_relaxed((void *)plmt_time_val + 0x04);
+		lo = readl_relaxed(plmt_time_val);
+	} while (hi != readl_relaxed((void *)plmt_time_val + 0x04));
+
+	return ((u64)hi << 32) | (u64)lo;
+#endif
+}
+
+void plmt_timer_event_stop(void)
+{
+	u32 target_hart = sbi_current_hartid();
+
+	if (plmt_time_hart_count <= target_hart)
+		return;
+
+	/* Clear PLMT Time Compare */
+#if __riscv_xlen == 64
+	writeq_relaxed(-1ULL, &plmt_time_cmp[target_hart]);
+#else
+	writel_relaxed(-1UL, &plmt_time_cmp[target_hart]);
+	writel_relaxed(-1UL, (void *)(&plmt_time_cmp[target_hart]) + 0x04);
+#endif
+}
+
+void plmt_timer_event_start(u64 next_event)
+{
+	u32 target_hart = sbi_current_hartid();
+
+	if (plmt_time_hart_count <= target_hart)
+		return;
+
+	/* Program PLMT Time Compare */
+#if __riscv_xlen == 64
+	writeq_relaxed(next_event, &plmt_time_cmp[target_hart]);
+#else
+	u32 mask = -1UL;
+
+	writel_relaxed(next_event & mask, &plmt_time_cmp[target_hart]);
+	writel_relaxed(next_event >> 32,
+		       (void *)(&plmt_time_cmp[target_hart]) + 0x04);
+#endif
+
+}
+
+int plmt_warm_timer_init(void)
+{
+	u32 target_hart = sbi_current_hartid();
+
+	if (plmt_time_hart_count <= target_hart || !plmt_time_base)
+		return -1;
+
+	/* Clear PLMT Time Compare */
+#if __riscv_xlen == 64
+	writeq_relaxed(-1ULL, &plmt_time_cmp[target_hart]);
+#else
+	writel_relaxed(-1UL, &plmt_time_cmp[target_hart]);
+	writel_relaxed(-1UL, (void *)(&plmt_time_cmp[target_hart]) + 0x04);
+#endif
+
+	return 0;
+}
+
+int plmt_cold_timer_init(unsigned long base, u32 hart_count)
+{
+	plmt_time_hart_count = hart_count;
+	plmt_time_base	     = (void *)base;
+	plmt_time_val        = (u64 *)(plmt_time_base);
+	plmt_time_cmp        = (u64 *)(plmt_time_base + 0x8);
+
+	return 0;
+}
diff --git a/platform/andes/ae350/plmt.h b/platform/andes/ae350/plmt.h
new file mode 100644
index 00000000000..129fcf8d146
--- /dev/null
+++ b/platform/andes/ae350/plmt.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ */
+
+#ifndef _AE350_PLMT_H_
+#define _AE350_PLMT_H_
+
+u64 plmt_timer_value(void);
+
+void plmt_timer_event_stop(void);
+
+void plmt_timer_event_start(u64 next_event);
+
+int plmt_warm_timer_init(void);
+
+int plmt_cold_timer_init(unsigned long base, u32 hart_count);
+
+#endif /* _AE350_PLMT_H_ */

From ffa6c5f457527a2e71f2e7bd643ed0dce383506d Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon7@andestech.com>
Date: Thu, 29 Aug 2019 11:03:56 +0800
Subject: [PATCH 0307/1765] scripts: Add AE350 to platform list in the binary
 archive script

This patch adds Andes AE350 to RV64 platform list in the binary
archive script.

Signed-off-by: Nylon Chen <nylon7@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 0a327091735..2745eca1bba 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -94,6 +94,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")
+	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 	;;
 *)
 	echo "Invalid RISC-V XLEN"

From 2e5cc9051b5daf0b164f0454e28e08c2b952089a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 29 Aug 2019 15:19:11 -0700
Subject: [PATCH 0308/1765] lib: Fix timer for 32 bit

To read 64bit time in 32 bit we have to read lower & upper half
separately and 'or' them together. However, upper half time may
have changed by the time we read lower half. Thus, the resultant
64 bit time may not be accurate.

Consider lower half time value only if upper half time value has
not changed.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/sys/clint.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index d58e4e62264..802d419a1fd 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -62,16 +62,24 @@ static volatile void *clint_time_base;
 static volatile u64 *clint_time_val;
 static volatile u64 *clint_time_cmp;
 
+static inline u32 clint_time_read_hi()
+{
+	return readl_relaxed((u32 *)clint_time_val + 1);
+}
+
 u64 clint_timer_value(void)
 {
 #if __riscv_xlen == 64
 	return readq_relaxed(clint_time_val);
 #else
-	u64 tmp;
-	tmp = readl_relaxed((void *)clint_time_val + 0x04);
-	tmp <<= 32;
-	tmp |= readl_relaxed(clint_time_val);
-	return tmp;
+	u32 lo, hi;
+
+	do {
+		hi = clint_time_read_hi();
+		lo = readl_relaxed(clint_time_val);
+	} while (hi != clint_time_read_hi());
+
+	return ((u64)hi << 32) | (u64)lo;
 #endif
 }
 

From 6bd1512024c84250a248dea37f30b71a2c4c260f Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 29 Aug 2019 15:19:12 -0700
Subject: [PATCH 0309/1765] lib: Support atomic swap instructions

If compiler supports riscv atomic instructions, we should
use them instead of legacy gcc built-in macros
__sync_lock_test_and_set in atomic exchange functions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_atomic.c | 54 ++++++++++++++++++++++++++++--------------
 1 file changed, 36 insertions(+), 18 deletions(-)

diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 996e893e15d..43318640f52 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -50,6 +50,39 @@ long atomic_sub_return(atomic_t *atom, long value)
 	return ret - value;
 }
 
+#define __axchg(ptr, new, size)						\
+	({									\
+		__typeof__(ptr) __ptr = (ptr);					\
+		__typeof__(new) __new = (new);					\
+		__typeof__(*(ptr)) __ret;					\
+		switch (size) {							\
+		case 4:								\
+			__asm__ __volatile__ (					\
+				"	amoswap.w.aqrl %0, %2, %1\n"		\
+				: "=r" (__ret), "+A" (*__ptr)			\
+				: "r" (__new)					\
+				: "memory");					\
+			break;							\
+		case 8:								\
+			__asm__ __volatile__ (					\
+				"	amoswap.d.aqrl %0, %2, %1\n"		\
+				: "=r" (__ret), "+A" (*__ptr)			\
+				: "r" (__new)					\
+				: "memory");					\
+			break;							\
+		default:							\
+			break;						\
+		}								\
+		__ret;								\
+	})
+
+#define axchg(ptr, x)							\
+	({									\
+		__typeof__(*(ptr)) _x_ = (x);					\
+		(__typeof__(*(ptr))) __xchg((ptr), _x_, sizeof(*(ptr)));	\
+	})
+
+
 #define __xchg(ptr, new, size)                                            \
 	({                                                                \
 		__typeof__(ptr) __ptr	 = (ptr);                         \
@@ -148,12 +181,7 @@ long arch_atomic_xchg(atomic_t *atom, long newval)
 {
 	/* Atomically set new value and return old value. */
 #ifdef __riscv_atomic
-	/*
-	 * The name of GCC built-in macro __sync_lock_test_and_set()
-	 * is misleading. A more appropriate name for GCC built-in
-	 * macro would be __sync_val_exchange().
-	 */
-	return __sync_lock_test_and_set(&atom->counter, newval);
+	return axchg(&atom->counter, newval);
 #else
 	return xchg(&atom->counter, newval);
 #endif
@@ -164,12 +192,7 @@ unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 {
 	/* Atomically set new value and return old value. */
 #ifdef __riscv_atomic
-	/*
-	 * The name of GCC built-in macro __sync_lock_test_and_set()
-	 * is misleading. A more appropriate name for GCC built-in
-	 * macro would be __sync_val_exchange().
-	 */
-	return __sync_lock_test_and_set(ptr, newval);
+	return axchg(ptr, newval);
 #else
 	return xchg(ptr, newval);
 #endif
@@ -180,12 +203,7 @@ unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 {
 	/* Atomically set new value and return old value. */
 #ifdef __riscv_atomic
-	/*
-	 * The name of GCC built-in macro __sync_lock_test_and_set()
-	 * is misleading. A more appropriate name for GCC built-in
-	 * macro would be __sync_val_exchange().
-	 */
-	return __sync_lock_test_and_set(ptr, newval);
+	return axchg(ptr, newval);
 #else
 	return xchg(ptr, newval);
 #endif

From 7b7690ed9c0e5990a8cda2511f4c438c9ad8c9dc Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 29 Aug 2019 15:19:13 -0700
Subject: [PATCH 0310/1765] lib: Upgrade to full flush if size is at least
 threshold

Currently, we upgrade to a full tlb flush only If a tlb flush request
size is greater than the threshold. This is done as sfence in RISC-V
can only flush 4KB at a time. Doing a large number of flushes page by
page impacts the performance. It is better to do a full tlbflush if the
request size is at least equal to the threshold size.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_tlb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index e4f6fe26bb5..c4e5f48fcb3 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -232,7 +232,7 @@ int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 	 * upgrade it to flush all because we can only flush
 	 * 4KB at a time.
 	 */
-	if (tinfo->size >= SBI_TLB_FLUSH_MAX_SIZE) {
+	if (tinfo->size > SBI_TLB_FLUSH_MAX_SIZE) {
 		tinfo->start = 0;
 		tinfo->size = SBI_TLB_FLUSH_ALL;
 	}

From 6ed2bc154f99d3c067775d8a83bcd42a44838dcf Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 29 Aug 2019 15:19:14 -0700
Subject: [PATCH 0311/1765] docs: Update the fu540 platform guide as per U-Boot
 documents.

U-Boot readme for fu540 platform suggest that fdt_addr_r should be used
as DT address after DT is copied via tftpboot.

Update the OpenSBI docs to reflect that. Remove other stale informations
as well.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 7b0a1787cfc..6df904d110b 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -47,11 +47,10 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/bo
 
 The command-line example here assumes that U-Boot was compiled using the
 sifive_fu540_defconfig configuration and with U-Boot v2019.04 (or higher)
-having SMP support.
+having SMP support. From, Linux v5.2 (or higher) device tree is hosted in
+Linux kernel and compiled as a part of Linux kernel build process.
 
-To use U-Boot which follows Linux v5.2 (or higher) DT bindings, we will
-need custom U-Boot with required driver changes which can be found in
-riscv_unleashed_mmc_spi_v2 branch of https://github.com/avpatel/u-boot.git
+The detailed U-Boot booting guide is avaialble at [U-Boot](https://gitlab.denx.de/u-boot/u-boot/blob/master/doc/board/sifive/fu540.rst)
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
@@ -174,8 +173,11 @@ already part of the kernel or loaded from an external storage by kernel.
 ```
 tftpboot ${ramdisk_addr_r} <ramdisk path in tftpboot directory>
 ```
-
-7. Set the boot command-line arguments.
+7. Load the pre-compiled device tree via tftpboot.
+```
+tftpboot ${fdt_addr_r} <linux source>/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
+```
+8. Set the boot command-line arguments.
 ```
 setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ```
@@ -184,12 +186,12 @@ setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ** root=/dev/mmcblk0pX ** - If a rootfs is already on some other partition
 of sdcard)
 
-8. Now boot into Linux.
+9. Now boot into Linux.
 ```
-bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdtcontroladdr}
+bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}
 or
 (If ramdisk is not loaded from network)
-bootm ${kernel_addr_r} - ${fdtcontroladdr}
+bootm ${kernel_addr_r} - ${fdt_addr_r}
 ```
 
 **U-Boot & Linux Kernel as a single payload**
@@ -197,5 +199,5 @@ bootm ${kernel_addr_r} - ${fdtcontroladdr}
 At U-Boot prompt execute the following boot command to boot Linux.
 
 ```
-bootm ${kernel_addr_r} - ${fdtcontroladdr}
+bootm ${kernel_addr_r} - ${fdt_addr_r}
 ```

From fca8c3be0122d4b90cef572aefddd65c27fcaba6 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 4 Sep 2019 13:27:27 +0900
Subject: [PATCH 0312/1765] kendryte/k210: Use sifive UART driver

The Kendryte K210 UARTHS is compatible with SiFive UART. So use the
sifive uart driver and remove the k210 uarths platform code.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/objects.mk |   2 +-
 platform/kendryte/k210/platform.c |  25 ++---
 platform/kendryte/k210/uarths.c   |  64 -----------
 platform/kendryte/k210/uarths.h   | 171 ------------------------------
 4 files changed, 9 insertions(+), 253 deletions(-)
 delete mode 100644 platform/kendryte/k210/uarths.c
 delete mode 100644 platform/kendryte/k210/uarths.h

diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 1924d7afc85..58ba7c60b0c 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -7,5 +7,5 @@
 #   Damien Le Moal <damien.lemoal@wdc.com>
 #
 
-platform-objs-y += uarths.o sysctl.o platform.o
+platform-objs-y += sysctl.o platform.o
 platform-dtb-y += k210.dtb
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 19c569ccb5d..a9866515cf5 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -14,26 +14,17 @@
 #include <sbi/sbi_console.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/sys/clint.h>
+#include <sbi_utils/serial/sifive-uart.h>
 #include "platform.h"
-#include "uarths.h"
+#include "sysctl.h"
 
-#define K210_UART_BAUDRATE 115200
+#define K210_UART_BASE_ADDR	0x38000000U
+#define K210_UART_BAUDRATE	115200
 
 static int k210_console_init(void)
 {
-	uarths_init(K210_UART_BAUDRATE, UARTHS_STOP_1);
-
-	return 0;
-}
-
-static void k210_console_putc(char c)
-{
-	uarths_putc(c);
-}
-
-static int k210_console_getc(void)
-{
-	return uarths_getc();
+	return sifive_uart_init(K210_UART_BASE_ADDR,
+				sysctl_get_cpu_freq(), K210_UART_BAUDRATE);
 }
 
 static int k210_irqchip_init(bool cold_boot)
@@ -95,8 +86,8 @@ static int k210_system_shutdown(u32 type)
 
 const struct sbi_platform_operations platform_ops = {
 	.console_init	= k210_console_init,
-	.console_putc	= k210_console_putc,
-	.console_getc	= k210_console_getc,
+	.console_putc	= sifive_uart_putc,
+	.console_getc	= sifive_uart_getc,
 
 	.irqchip_init = k210_irqchip_init,
 
diff --git a/platform/kendryte/k210/uarths.c b/platform/kendryte/k210/uarths.c
deleted file mode 100644
index 67d5d1c66b6..00000000000
--- a/platform/kendryte/k210/uarths.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * SPDX-License-Identifier:    Apache-2.0
- *
- * Copyright 2018 Canaan Inc.
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "sysctl.h"
-#include "uarths.h"
-
-static volatile struct uarths *const uarths =
-	(volatile struct uarths *)UARTHS_BASE_ADDR;
-
-void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit)
-{
-	u32 freq = sysctl_get_cpu_freq();
-	u16 div	 = freq / baud_rate - 1;
-
-	/* Set UART registers */
-	uarths->div.div	     = div;
-	uarths->txctrl.nstop = stopbit;
-	uarths->txctrl.txen  = 1;
-	uarths->rxctrl.rxen  = 1;
-	uarths->txctrl.txcnt = 0;
-	uarths->rxctrl.rxcnt = 0;
-	uarths->ip.txwm	     = 1;
-	uarths->ip.rxwm	     = 0;
-	uarths->ie.txwm	     = 1;
-	uarths->ie.rxwm	     = 0;
-
-	/* Clear input */
-	if (!uarths->rxdata.empty)
-		(void)uarths_getc();
-}
-
-void uarths_putc(char c)
-{
-	while (uarths->txdata.full)
-		;
-
-	uarths->txdata.data = (u8)c;
-}
-
-int uarths_getc(void)
-{
-	struct uarths_rxdata rx = uarths->rxdata;
-
-	if (rx.empty)
-		return -1;
-
-	return rx.data;
-}
diff --git a/platform/kendryte/k210/uarths.h b/platform/kendryte/k210/uarths.h
deleted file mode 100644
index 18b7e95f1a4..00000000000
--- a/platform/kendryte/k210/uarths.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * SPDX-License-Identifier:    Apache-2.0
- *
- * Copyright 2018 Canaan Inc.
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Universal Asynchronous Receiver/Transmitter (UART)
- * The UART peripheral supports the following features:
- *
- * - 8-N-1 and 8-N-2 formats: 8 data bits, no parity bit, 1 start
- *   bit, 1 or 2 stop bits
- *
- * - 8-entry transmit and receive FIFO buffers with programmable
- *   watermark interrupts
- *
- * - 16× Rx oversampling with 2/3 majority voting per bit
- *
- * The UART peripheral does not support hardware flow control or
- * other modem control signals, or synchronous serial data
- * tranfesrs.
- *
- * UART RAM Layout
- * | Address   | Name     | Description                     |
- * |-----------|----------|---------------------------------|
- * | 0x000     | txdata   | Transmit data register          |
- * | 0x004     | rxdata   | Receive data register           |
- * | 0x008     | txctrl   | Transmit control register       |
- * | 0x00C     | rxctrl   | Receive control register        |
- * | 0x010     | ie       | UART interrupt enable           |
- * | 0x014     | ip       | UART Interrupt pending          |
- * | 0x018     | div      | Baud rate divisor               |
- */
-
-#ifndef _K210_UARTHS_H_
-#define _K210_UARTHS_H_
-
-#include <sbi/sbi_types.h>
-
-/* clang-format off */
-
-/* Base register address */
-#define UARTHS_BASE_ADDR	(0x38000000U)
-
-/* Register address offsets */
-#define UARTHS_REG_TXFIFO	0x00
-#define UARTHS_REG_RXFIFO	0x04
-#define UARTHS_REG_TXCTRL	0x08
-#define UARTHS_REG_RXCTRL	0x0c
-#define UARTHS_REG_IE		0x10
-#define UARTHS_REG_IP		0x14
-#define UARTHS_REG_DIV		0x18
-
-/* TXCTRL register */
-#define UARTHS_TXEN		0x01
-#define UARTHS_TXWM(x)		(((x) & 0xffff) << 16)
-
-/* RXCTRL register */
-#define UARTHS_RXEN		0x01
-#define UARTHS_RXWM(x)		(((x) & 0xffff) << 16)
-
-/* IP register */
-#define UARTHS_IP_TXWM		0x01
-#define UARTHS_IP_RXWM		0x02
-
-/* clang-format on */
-
-struct uarths_txdata {
-	/* Bits [7:0] is data */
-	u32 data : 8;
-	/* Bits [30:8] is 0 */
-	u32 zero : 23;
-	/* Bit 31 is full status */
-	u32 full : 1;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_rxdata {
-	/* Bits [7:0] is data */
-	u32 data : 8;
-	/* Bits [30:8] is 0 */
-	u32 zero : 23;
-	/* Bit 31 is empty status */
-	u32 empty : 1;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_txctrl {
-	/* Bit 0 is txen, controls whether the Tx channel is active. */
-	u32 txen : 1;
-	/* Bit 1 is nstop, 0 for one stop bit and 1 for two stop bits */
-	u32 nstop : 1;
-	/* Bits [15:2] is reserved */
-	u32 resv0 : 14;
-	/* Bits [18:16] is threshold of interrupt triggers */
-	u32 txcnt : 3;
-	/* Bits [31:19] is reserved */
-	u32 resv1 : 13;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_rxctrl {
-	/* Bit 0 is txen, controls whether the Tx channel is active. */
-	u32 rxen : 1;
-	/* Bits [15:1] is reserved */
-	u32 resv0 : 15;
-	/* Bits [18:16] is threshold of interrupt triggers */
-	u32 rxcnt : 3;
-	/* Bits [31:19] is reserved */
-	u32 resv1 : 13;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_ip {
-	/* Bit 0 is txwm, raised less than txcnt */
-	u32 txwm : 1;
-	/* Bit 1 is txwm, raised greater than rxcnt */
-	u32 rxwm : 1;
-	/* Bits [31:2] is 0 */
-	u32 zero : 30;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_ie {
-	/* Bit 0 is txwm, raised less than txcnt */
-	u32 txwm : 1;
-	/* Bit 1 is txwm, raised greater than rxcnt */
-	u32 rxwm : 1;
-	/* Bits [31:2] is 0 */
-	u32 zero : 30;
-} __attribute__((packed, aligned(4)));
-
-struct uarths_div {
-	/* Bits [31:2] is baud rate divisor register */
-	u32 div : 16;
-	/* Bits [31:16] is 0 */
-	u32 zero : 16;
-} __attribute__((packed, aligned(4)));
-
-struct uarths {
-	/* Address offset 0x00 */
-	struct uarths_txdata txdata;
-	/* Address offset 0x04 */
-	struct uarths_rxdata rxdata;
-	/* Address offset 0x08 */
-	struct uarths_txctrl txctrl;
-	/* Address offset 0x0c */
-	struct uarths_rxctrl rxctrl;
-	/* Address offset 0x10 */
-	struct uarths_ie ie;
-	/* Address offset 0x14 */
-	struct uarths_ip ip;
-	/* Address offset 0x18 */
-	struct uarths_div div;
-} __attribute__((packed, aligned(4)));
-
-enum uarths_stopbit { UARTHS_STOP_1, UARTHS_STOP_2 };
-
-void uarths_init(u32 baud_rate, enum uarths_stopbit stopbit);
-void uarths_putc(char c);
-int uarths_getc(void);
-
-#endif /* _K210_UARTHS_H_ */

From 9dfe72057957e373b0c0782a1861739cd9a658b5 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 4 Sep 2019 13:27:28 +0900
Subject: [PATCH 0313/1765] kendryte/k210: remove sysctl code

Directly implement frequency discovery, making the sysctl code
unnecessary. While at it, Move all macro definitions from platform.c
into platform.h and cleanup that file, removing the need for the
Apache 2.0 license and Canaan Inc copyright.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/objects.mk |   2 +-
 platform/kendryte/k210/platform.c |  46 +-
 platform/kendryte/k210/platform.h | 185 +------
 platform/kendryte/k210/sysctl.h   | 794 ------------------------------
 4 files changed, 60 insertions(+), 967 deletions(-)
 delete mode 100644 platform/kendryte/k210/sysctl.h

diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 58ba7c60b0c..7288e74da8b 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -7,5 +7,5 @@
 #   Damien Le Moal <damien.lemoal@wdc.com>
 #
 
-platform-objs-y += sysctl.o platform.o
+platform-objs-y += platform.o
 platform-dtb-y += k210.dtb
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index a9866515cf5..39771e39ec0 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -16,15 +16,40 @@
 #include <sbi_utils/sys/clint.h>
 #include <sbi_utils/serial/sifive-uart.h>
 #include "platform.h"
-#include "sysctl.h"
 
-#define K210_UART_BASE_ADDR	0x38000000U
-#define K210_UART_BAUDRATE	115200
+static u32 k210_get_clk_freq(void)
+{
+	u32 clksel0, pll0;
+	u64 pll0_freq, clkr0, clkf0, clkod0, div;
+
+	/*
+	 * If the clock selector is not set, use the base frequency.
+	 * Otherwise, use PLL0 frequency with a frequency divisor.
+	 */
+	clksel0 = k210_read_sysreg(K210_CLKSEL0);
+	if (!(clksel0 & 0x1))
+		return K210_CLK0_FREQ;
+
+	/*
+	 * Get PLL0 frequency:
+	 * freq = base frequency * clkf0 / (clkr0 * clkod0)
+	 */
+	pll0 = k210_read_sysreg(K210_PLL0);
+	clkr0 = 1 + (pll0 & 0x0000000f);
+	clkf0 = 1 + ((pll0 & 0x000003f0) >> 4);
+	clkod0 = 1 + ((pll0 & 0x00003c00) >> 10);
+	pll0_freq = clkf0 * K210_CLK0_FREQ / (clkr0 * clkod0);
+
+	/* Get the frequency divisor from the clock selector */
+	div = 2ULL << ((clksel0 & 0x00000006) >> 1);
+
+	return pll0_freq / div;
+}
 
 static int k210_console_init(void)
 {
-	return sifive_uart_init(K210_UART_BASE_ADDR,
-				sysctl_get_cpu_freq(), K210_UART_BAUDRATE);
+	return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
+				K210_UART_BAUDRATE);
 }
 
 static int k210_irqchip_init(bool cold_boot)
@@ -33,13 +58,14 @@ static int k210_irqchip_init(bool cold_boot)
 	u32 hartid = sbi_current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(PLIC_BASE_ADDR, PLIC_NUM_SOURCES,
+		rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
+					    K210_PLIC_NUM_SOURCES,
 					    K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
+	return plic_warm_irqchip_init(hartid, hartid * 2, hartid * 2 + 1);
 }
 
 static int k210_ipi_init(bool cold_boot)
@@ -47,7 +73,8 @@ static int k210_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(CLINT_BASE_ADDR, K210_HART_COUNT);
+		rc = clint_cold_ipi_init(K210_CLINT_BASE_ADDR,
+					 K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
@@ -60,7 +87,8 @@ static int k210_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(CLINT_BASE_ADDR, K210_HART_COUNT);
+		rc = clint_cold_timer_init(K210_CLINT_BASE_ADDR,
+					   K210_HART_COUNT);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 492848be29a..0596a919df1 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -1,178 +1,37 @@
 /*
- * SPDX-License-Identifier:    Apache-2.0
+ * SPDX-License-Identifier: BSD-2-Clause
  *
- * Copyright 2018 Canaan Inc.
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
+ * Authors:
+ *   Damien Le Moal <damien.lemoal@wdc.com>
  */
+#ifndef _K210_PLATFORM_H_
+#define _K210_PLATFORM_H_
 
-#ifndef _PLATFORM_H_
-#define _PLATFORM_H_
-
-#include <sbi/riscv_asm.h>
-
-/* clang-format off */
+#include <sbi/riscv_io.h>
 
 #define K210_HART_COUNT		2
 #define K210_HART_STACK_SIZE	4096
 
-/* Register base address */
-
-/* Under Coreplex */
-#define CLINT_BASE_ADDR		(0x02000000U)
-#define PLIC_BASE_ADDR		(0x0C000000U)
-#define PLIC_NUM_CORES		(K210_HART_COUNT)
-
-/* Under TileLink */
-#define GPIOHS_BASE_ADDR	(0x38001000U)
-
-/* Under AXI 64-bit */
-#define RAM_BASE_ADDR		(0x80000000U)
-#define RAM_SIZE		(6 * 1024 * 1024U)
-
-#define IO_BASE_ADDR		(0x40000000U)
-#define IO_SIZE			(6 * 1024 * 1024U)
-
-#define AI_RAM_BASE_ADDR	(0x80600000U)
-#define AI_RAM_SIZE		(2 * 1024 * 1024U)
-
-#define AI_IO_BASE_ADDR		(0x40600000U)
-#define AI_IO_SIZE		(2 * 1024 * 1024U)
+#define K210_UART_BAUDRATE	115200
 
-#define AI_BASE_ADDR		(0x40800000U)
-#define AI_SIZE			(12 * 1024 * 1024U)
+#define K210_CLK0_FREQ		26000000UL
+#define K210_PLIC_NUM_SOURCES	65
 
-#define FFT_BASE_ADDR		(0x42000000U)
-#define FFT_SIZE		(4 * 1024 * 1024U)
-
-#define ROM_BASE_ADDR		(0x88000000U)
-#define ROM_SIZE		(128 * 1024U)
-
-/* Under AHB 32-bit */
-#define DMAC_BASE_ADDR		(0x50000000U)
-
-/* Under APB1 32-bit */
-#define GPIO_BASE_ADDR		(0x50200000U)
-#define UART1_BASE_ADDR		(0x50210000U)
-#define UART2_BASE_ADDR		(0x50220000U)
-#define UART3_BASE_ADDR		(0x50230000U)
-#define SPI_SLAVE_BASE_ADDR	(0x50240000U)
-#define I2S0_BASE_ADDR		(0x50250000U)
-#define I2S1_BASE_ADDR		(0x50260000U)
-#define I2S2_BASE_ADDR		(0x50270000U)
-#define I2C0_BASE_ADDR		(0x50280000U)
-#define I2C1_BASE_ADDR		(0x50290000U)
-#define I2C2_BASE_ADDR		(0x502A0000U)
-#define FPIOA_BASE_ADDR		(0x502B0000U)
-#define SHA256_BASE_ADDR	(0x502C0000U)
-#define TIMER0_BASE_ADDR	(0x502D0000U)
-#define TIMER1_BASE_ADDR	(0x502E0000U)
-#define TIMER2_BASE_ADDR	(0x502F0000U)
-
-/* Under APB2 32-bit */
-#define WDT0_BASE_ADDR		(0x50400000U)
-#define WDT1_BASE_ADDR		(0x50410000U)
-#define OTP_BASE_ADDR		(0x50420000U)
-#define DVP_BASE_ADDR		(0x50430000U)
-#define SYSCTL_BASE_ADDR	(0x50440000U)
-#define AES_BASE_ADDR		(0x50450000U)
-#define RTC_BASE_ADDR		(0x50460000U)
-
-/* Under APB3 32-bit */
-#define SPI0_BASE_ADDR		(0x52000000U)
-#define SPI1_BASE_ADDR		(0x53000000U)
-#define SPI3_BASE_ADDR		(0x54000000U)
-
-#define read_cycle()		csr_read(CSR_MCYCLE)
-
-/*
- * PLIC External Interrupt Numbers
- */
-enum plic_irq {
-	IRQN_NO_INTERRUPT        = 0, /*!< The non-existent interrupt */
-	IRQN_SPI0_INTERRUPT      = 1, /*!< SPI0 interrupt */
-	IRQN_SPI1_INTERRUPT      = 2, /*!< SPI1 interrupt */
-	IRQN_SPI_SLAVE_INTERRUPT = 3, /*!< SPI_SLAVE interrupt */
-	IRQN_SPI3_INTERRUPT      = 4, /*!< SPI3 interrupt */
-	IRQN_I2S0_INTERRUPT      = 5, /*!< I2S0 interrupt */
-	IRQN_I2S1_INTERRUPT      = 6, /*!< I2S1 interrupt */
-	IRQN_I2S2_INTERRUPT      = 7, /*!< I2S2 interrupt */
-	IRQN_I2C0_INTERRUPT      = 8, /*!< I2C0 interrupt */
-	IRQN_I2C1_INTERRUPT      = 9, /*!< I2C1 interrupt */
-	IRQN_I2C2_INTERRUPT      = 10, /*!< I2C2 interrupt */
-	IRQN_UART1_INTERRUPT     = 11, /*!< UART1 interrupt */
-	IRQN_UART2_INTERRUPT     = 12, /*!< UART2 interrupt */
-	IRQN_UART3_INTERRUPT     = 13, /*!< UART3 interrupt */
-	IRQN_TIMER0A_INTERRUPT   = 14, /*!< TIMER0 channel 0 or 1 interrupt */
-	IRQN_TIMER0B_INTERRUPT   = 15, /*!< TIMER0 channel 2 or 3 interrupt */
-	IRQN_TIMER1A_INTERRUPT   = 16, /*!< TIMER1 channel 0 or 1 interrupt */
-	IRQN_TIMER1B_INTERRUPT   = 17, /*!< TIMER1 channel 2 or 3 interrupt */
-	IRQN_TIMER2A_INTERRUPT   = 18, /*!< TIMER2 channel 0 or 1 interrupt */
-	IRQN_TIMER2B_INTERRUPT   = 19, /*!< TIMER2 channel 2 or 3 interrupt */
-	IRQN_RTC_INTERRUPT       = 20, /*!< RTC tick and alarm interrupt */
-	IRQN_WDT0_INTERRUPT      = 21, /*!< Watching dog timer0 interrupt */
-	IRQN_WDT1_INTERRUPT      = 22, /*!< Watching dog timer1 interrupt */
-	IRQN_APB_GPIO_INTERRUPT  = 23, /*!< APB GPIO interrupt */
-	IRQN_DVP_INTERRUPT       = 24, /*!< Digital video port interrupt */
-	IRQN_AI_INTERRUPT        = 25, /*!< AI accelerator interrupt */
-	IRQN_FFT_INTERRUPT       = 26, /*!< FFT accelerator interrupt */
-	IRQN_DMA0_INTERRUPT      = 27, /*!< DMA channel0 interrupt */
-	IRQN_DMA1_INTERRUPT      = 28, /*!< DMA channel1 interrupt */
-	IRQN_DMA2_INTERRUPT      = 29, /*!< DMA channel2 interrupt */
-	IRQN_DMA3_INTERRUPT      = 30, /*!< DMA channel3 interrupt */
-	IRQN_DMA4_INTERRUPT      = 31, /*!< DMA channel4 interrupt */
-	IRQN_DMA5_INTERRUPT      = 32, /*!< DMA channel5 interrupt */
-	IRQN_UARTHS_INTERRUPT    = 33, /*!< Hi-speed UART0 interrupt */
-	IRQN_GPIOHS0_INTERRUPT   = 34, /*!< Hi-speed GPIO0 interrupt */
-	IRQN_GPIOHS1_INTERRUPT   = 35, /*!< Hi-speed GPIO1 interrupt */
-	IRQN_GPIOHS2_INTERRUPT   = 36, /*!< Hi-speed GPIO2 interrupt */
-	IRQN_GPIOHS3_INTERRUPT   = 37, /*!< Hi-speed GPIO3 interrupt */
-	IRQN_GPIOHS4_INTERRUPT   = 38, /*!< Hi-speed GPIO4 interrupt */
-	IRQN_GPIOHS5_INTERRUPT   = 39, /*!< Hi-speed GPIO5 interrupt */
-	IRQN_GPIOHS6_INTERRUPT   = 40, /*!< Hi-speed GPIO6 interrupt */
-	IRQN_GPIOHS7_INTERRUPT   = 41, /*!< Hi-speed GPIO7 interrupt */
-	IRQN_GPIOHS8_INTERRUPT   = 42, /*!< Hi-speed GPIO8 interrupt */
-	IRQN_GPIOHS9_INTERRUPT   = 43, /*!< Hi-speed GPIO9 interrupt */
-	IRQN_GPIOHS10_INTERRUPT  = 44, /*!< Hi-speed GPIO10 interrupt */
-	IRQN_GPIOHS11_INTERRUPT  = 45, /*!< Hi-speed GPIO11 interrupt */
-	IRQN_GPIOHS12_INTERRUPT  = 46, /*!< Hi-speed GPIO12 interrupt */
-	IRQN_GPIOHS13_INTERRUPT  = 47, /*!< Hi-speed GPIO13 interrupt */
-	IRQN_GPIOHS14_INTERRUPT  = 48, /*!< Hi-speed GPIO14 interrupt */
-	IRQN_GPIOHS15_INTERRUPT  = 49, /*!< Hi-speed GPIO15 interrupt */
-	IRQN_GPIOHS16_INTERRUPT  = 50, /*!< Hi-speed GPIO16 interrupt */
-	IRQN_GPIOHS17_INTERRUPT  = 51, /*!< Hi-speed GPIO17 interrupt */
-	IRQN_GPIOHS18_INTERRUPT  = 52, /*!< Hi-speed GPIO18 interrupt */
-	IRQN_GPIOHS19_INTERRUPT  = 53, /*!< Hi-speed GPIO19 interrupt */
-	IRQN_GPIOHS20_INTERRUPT  = 54, /*!< Hi-speed GPIO20 interrupt */
-	IRQN_GPIOHS21_INTERRUPT  = 55, /*!< Hi-speed GPIO21 interrupt */
-	IRQN_GPIOHS22_INTERRUPT  = 56, /*!< Hi-speed GPIO22 interrupt */
-	IRQN_GPIOHS23_INTERRUPT  = 57, /*!< Hi-speed GPIO23 interrupt */
-	IRQN_GPIOHS24_INTERRUPT  = 58, /*!< Hi-speed GPIO24 interrupt */
-	IRQN_GPIOHS25_INTERRUPT  = 59, /*!< Hi-speed GPIO25 interrupt */
-	IRQN_GPIOHS26_INTERRUPT  = 60, /*!< Hi-speed GPIO26 interrupt */
-	IRQN_GPIOHS27_INTERRUPT  = 61, /*!< Hi-speed GPIO27 interrupt */
-	IRQN_GPIOHS28_INTERRUPT  = 62, /*!< Hi-speed GPIO28 interrupt */
-	IRQN_GPIOHS29_INTERRUPT  = 63, /*!< Hi-speed GPIO29 interrupt */
-	IRQN_GPIOHS30_INTERRUPT  = 64, /*!< Hi-speed GPIO30 interrupt */
-	IRQN_GPIOHS31_INTERRUPT  = 65, /*!< Hi-speed GPIO31 interrupt */
-	IRQN_MAX
-};
+/* Registers base address */
+#define K210_SYSCTL_BASE_ADDR	0x50440000ULL
+#define K210_UART_BASE_ADDR	0x38000000ULL
+#define K210_CLINT_BASE_ADDR	0x02000000ULL
+#define K210_PLIC_BASE_ADDR	0x0C000000ULL
 
-/* IRQ number settings */
-#define PLIC_NUM_SOURCES    (IRQN_MAX - 1)
-#define PLIC_NUM_PRIORITIES (7)
+/* Registers */
+#define K210_PLL0		0x08
+#define K210_CLKSEL0		0x20
 
-/* clang-format on */
+static inline u32 k210_read_sysreg(u32 reg)
+{
+	return readl((volatile void *)(K210_SYSCTL_BASE_ADDR + reg));
+}
 
-#endif /* _PLATFORM_H_ */
+#endif /* _K210_PLATFORM_H_ */
diff --git a/platform/kendryte/k210/sysctl.h b/platform/kendryte/k210/sysctl.h
deleted file mode 100644
index 40d4e8f1686..00000000000
--- a/platform/kendryte/k210/sysctl.h
+++ /dev/null
@@ -1,794 +0,0 @@
-/*
- * SPDX-License-Identifier:    Apache-2.0
- *
- * Copyright 2018 Canaan Inc.
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef _K210_SYSCTL_H_
-#define _K210_SYSCTL_H_
-
-#include <sbi/sbi_types.h>
-#include "platform.h"
-
-/**
- * System controller registers
- *
- * | Offset    | Name           | Description                         |
- * |-----------|----------------|-------------------------------------|
- * | 0x00      | git_id         | Git short commit id                 |
- * | 0x04      | clk_freq       | System clock base frequency         |
- * | 0x08      | pll0           | PLL0 controller                     |
- * | 0x0c      | pll1           | PLL1 controller                     |
- * | 0x10      | pll2           | PLL2 controller                     |
- * | 0x14      | resv5          | Reserved                            |
- * | 0x18      | pll_lock       | PLL lock tester                     |
- * | 0x1c      | rom_error      | AXI ROM detector                    |
- * | 0x20      | clk_sel0       | Clock select controller0            |
- * | 0x24      | clk_sel1       | Clock select controller1            |
- * | 0x28      | clk_en_cent    | Central clock enable                |
- * | 0x2c      | clk_en_peri    | Peripheral clock enable             |
- * | 0x30      | soft_reset     | Soft reset ctrl                     |
- * | 0x34      | peri_reset     | Peripheral reset controller         |
- * | 0x38      | clk_th0        | Clock threshold controller 0        |
- * | 0x3c      | clk_th1        | Clock threshold controller 1        |
- * | 0x40      | clk_th2        | Clock threshold controller 2        |
- * | 0x44      | clk_th3        | Clock threshold controller 3        |
- * | 0x48      | clk_th4        | Clock threshold controller 4        |
- * | 0x4c      | clk_th5        | Clock threshold controller 5        |
- * | 0x50      | clk_th6        | Clock threshold controller 6        |
- * | 0x54      | misc           | Miscellaneous controller            |
- * | 0x58      | peri           | Peripheral controller               |
- * | 0x5c      | spi_sleep      | SPI sleep controller                |
- * | 0x60      | reset_status   | Reset source status                 |
- * | 0x64      | dma_sel0       | DMA handshake selector              |
- * | 0x68      | dma_sel1       | DMA handshake selector              |
- * | 0x6c      | power_sel      | IO Power Mode Select controller     |
- * | 0x70      | resv28         | Reserved                            |
- * | 0x74      | resv29         | Reserved                            |
- * | 0x78      | resv30         | Reserved                            |
- * | 0x7c      | resv31         | Reserved                            |
- */
-
-typedef enum _sysctl_pll_t {
-	SYSCTL_PLL0,
-	SYSCTL_PLL1,
-	SYSCTL_PLL2,
-	SYSCTL_PLL_MAX
-} sysctl_pll_t;
-
-typedef enum _sysctl_clock_source_t {
-	SYSCTL_SOURCE_IN0,
-	SYSCTL_SOURCE_PLL0,
-	SYSCTL_SOURCE_PLL1,
-	SYSCTL_SOURCE_PLL2,
-	SYSCTL_SOURCE_ACLK,
-	SYSCTL_SOURCE_MAX
-} sysctl_clock_source_t;
-
-typedef enum _sysctl_dma_channel_t {
-	SYSCTL_DMA_CHANNEL_0,
-	SYSCTL_DMA_CHANNEL_1,
-	SYSCTL_DMA_CHANNEL_2,
-	SYSCTL_DMA_CHANNEL_3,
-	SYSCTL_DMA_CHANNEL_4,
-	SYSCTL_DMA_CHANNEL_5,
-	SYSCTL_DMA_CHANNEL_MAX
-} sysctl_dma_channel_t;
-
-typedef enum _sysctl_dma_select_t {
-	SYSCTL_DMA_SELECT_SSI0_RX_REQ,
-	SYSCTL_DMA_SELECT_SSI0_TX_REQ,
-	SYSCTL_DMA_SELECT_SSI1_RX_REQ,
-	SYSCTL_DMA_SELECT_SSI1_TX_REQ,
-	SYSCTL_DMA_SELECT_SSI2_RX_REQ,
-	SYSCTL_DMA_SELECT_SSI2_TX_REQ,
-	SYSCTL_DMA_SELECT_SSI3_RX_REQ,
-	SYSCTL_DMA_SELECT_SSI3_TX_REQ,
-	SYSCTL_DMA_SELECT_I2C0_RX_REQ,
-	SYSCTL_DMA_SELECT_I2C0_TX_REQ,
-	SYSCTL_DMA_SELECT_I2C1_RX_REQ,
-	SYSCTL_DMA_SELECT_I2C1_TX_REQ,
-	SYSCTL_DMA_SELECT_I2C2_RX_REQ,
-	SYSCTL_DMA_SELECT_I2C2_TX_REQ,
-	SYSCTL_DMA_SELECT_UART1_RX_REQ,
-	SYSCTL_DMA_SELECT_UART1_TX_REQ,
-	SYSCTL_DMA_SELECT_UART2_RX_REQ,
-	SYSCTL_DMA_SELECT_UART2_TX_REQ,
-	SYSCTL_DMA_SELECT_UART3_RX_REQ,
-	SYSCTL_DMA_SELECT_UART3_TX_REQ,
-	SYSCTL_DMA_SELECT_AES_REQ,
-	SYSCTL_DMA_SELECT_SHA_RX_REQ,
-	SYSCTL_DMA_SELECT_AI_RX_REQ,
-	SYSCTL_DMA_SELECT_FFT_RX_REQ,
-	SYSCTL_DMA_SELECT_FFT_TX_REQ,
-	SYSCTL_DMA_SELECT_I2S0_TX_REQ,
-	SYSCTL_DMA_SELECT_I2S0_RX_REQ,
-	SYSCTL_DMA_SELECT_I2S1_TX_REQ,
-	SYSCTL_DMA_SELECT_I2S1_RX_REQ,
-	SYSCTL_DMA_SELECT_I2S2_TX_REQ,
-	SYSCTL_DMA_SELECT_I2S2_RX_REQ,
-	SYSCTL_DMA_SELECT_I2S0_BF_DIR_REQ,
-	SYSCTL_DMA_SELECT_I2S0_BF_VOICE_REQ,
-	SYSCTL_DMA_SELECT_MAX
-} sysctl_dma_select_t;
-
-/**
- * System controller clock id
- */
-typedef enum _sysctl_clock_t {
-	SYSCTL_CLOCK_PLL0,
-	SYSCTL_CLOCK_PLL1,
-	SYSCTL_CLOCK_PLL2,
-	SYSCTL_CLOCK_CPU,
-	SYSCTL_CLOCK_SRAM0,
-	SYSCTL_CLOCK_SRAM1,
-	SYSCTL_CLOCK_APB0,
-	SYSCTL_CLOCK_APB1,
-	SYSCTL_CLOCK_APB2,
-	SYSCTL_CLOCK_ROM,
-	SYSCTL_CLOCK_DMA,
-	SYSCTL_CLOCK_AI,
-	SYSCTL_CLOCK_DVP,
-	SYSCTL_CLOCK_FFT,
-	SYSCTL_CLOCK_GPIO,
-	SYSCTL_CLOCK_SPI0,
-	SYSCTL_CLOCK_SPI1,
-	SYSCTL_CLOCK_SPI2,
-	SYSCTL_CLOCK_SPI3,
-	SYSCTL_CLOCK_I2S0,
-	SYSCTL_CLOCK_I2S1,
-	SYSCTL_CLOCK_I2S2,
-	SYSCTL_CLOCK_I2C0,
-	SYSCTL_CLOCK_I2C1,
-	SYSCTL_CLOCK_I2C2,
-	SYSCTL_CLOCK_UART1,
-	SYSCTL_CLOCK_UART2,
-	SYSCTL_CLOCK_UART3,
-	SYSCTL_CLOCK_AES,
-	SYSCTL_CLOCK_FPIOA,
-	SYSCTL_CLOCK_TIMER0,
-	SYSCTL_CLOCK_TIMER1,
-	SYSCTL_CLOCK_TIMER2,
-	SYSCTL_CLOCK_WDT0,
-	SYSCTL_CLOCK_WDT1,
-	SYSCTL_CLOCK_SHA,
-	SYSCTL_CLOCK_OTP,
-	SYSCTL_CLOCK_RTC,
-	SYSCTL_CLOCK_ACLK = 40,
-	SYSCTL_CLOCK_HCLK,
-	SYSCTL_CLOCK_IN0,
-	SYSCTL_CLOCK_MAX
-} sysctl_clock_t;
-
-/**
- * System controller clock select id
- */
-typedef enum _sysctl_clock_select_t {
-	SYSCTL_CLOCK_SELECT_PLL0_BYPASS,
-	SYSCTL_CLOCK_SELECT_PLL1_BYPASS,
-	SYSCTL_CLOCK_SELECT_PLL2_BYPASS,
-	SYSCTL_CLOCK_SELECT_PLL2,
-	SYSCTL_CLOCK_SELECT_ACLK,
-	SYSCTL_CLOCK_SELECT_SPI3,
-	SYSCTL_CLOCK_SELECT_TIMER0,
-	SYSCTL_CLOCK_SELECT_TIMER1,
-	SYSCTL_CLOCK_SELECT_TIMER2,
-	SYSCTL_CLOCK_SELECT_SPI3_SAMPLE,
-	SYSCTL_CLOCK_SELECT_MAX = 11
-} sysctl_clock_select_t;
-
-/**
- * System controller clock threshold id
- */
-typedef enum _sysctl_threshold_t {
-	SYSCTL_THRESHOLD_ACLK,
-	SYSCTL_THRESHOLD_APB0,
-	SYSCTL_THRESHOLD_APB1,
-	SYSCTL_THRESHOLD_APB2,
-	SYSCTL_THRESHOLD_SRAM0,
-	SYSCTL_THRESHOLD_SRAM1,
-	SYSCTL_THRESHOLD_AI,
-	SYSCTL_THRESHOLD_DVP,
-	SYSCTL_THRESHOLD_ROM,
-	SYSCTL_THRESHOLD_SPI0,
-	SYSCTL_THRESHOLD_SPI1,
-	SYSCTL_THRESHOLD_SPI2,
-	SYSCTL_THRESHOLD_SPI3,
-	SYSCTL_THRESHOLD_TIMER0,
-	SYSCTL_THRESHOLD_TIMER1,
-	SYSCTL_THRESHOLD_TIMER2,
-	SYSCTL_THRESHOLD_I2S0,
-	SYSCTL_THRESHOLD_I2S1,
-	SYSCTL_THRESHOLD_I2S2,
-	SYSCTL_THRESHOLD_I2S0_M,
-	SYSCTL_THRESHOLD_I2S1_M,
-	SYSCTL_THRESHOLD_I2S2_M,
-	SYSCTL_THRESHOLD_I2C0,
-	SYSCTL_THRESHOLD_I2C1,
-	SYSCTL_THRESHOLD_I2C2,
-	SYSCTL_THRESHOLD_WDT0,
-	SYSCTL_THRESHOLD_WDT1,
-	SYSCTL_THRESHOLD_MAX = 28
-} sysctl_threshold_t;
-
-/**
- * System controller reset control id
- */
-typedef enum _sysctl_reset_t {
-	SYSCTL_RESET_SOC,
-	SYSCTL_RESET_ROM,
-	SYSCTL_RESET_DMA,
-	SYSCTL_RESET_AI,
-	SYSCTL_RESET_DVP,
-	SYSCTL_RESET_FFT,
-	SYSCTL_RESET_GPIO,
-	SYSCTL_RESET_SPI0,
-	SYSCTL_RESET_SPI1,
-	SYSCTL_RESET_SPI2,
-	SYSCTL_RESET_SPI3,
-	SYSCTL_RESET_I2S0,
-	SYSCTL_RESET_I2S1,
-	SYSCTL_RESET_I2S2,
-	SYSCTL_RESET_I2C0,
-	SYSCTL_RESET_I2C1,
-	SYSCTL_RESET_I2C2,
-	SYSCTL_RESET_UART1,
-	SYSCTL_RESET_UART2,
-	SYSCTL_RESET_UART3,
-	SYSCTL_RESET_AES,
-	SYSCTL_RESET_FPIOA,
-	SYSCTL_RESET_TIMER0,
-	SYSCTL_RESET_TIMER1,
-	SYSCTL_RESET_TIMER2,
-	SYSCTL_RESET_WDT0,
-	SYSCTL_RESET_WDT1,
-	SYSCTL_RESET_SHA,
-	SYSCTL_RESET_RTC,
-	SYSCTL_RESET_MAX = 31
-} sysctl_reset_t;
-
-typedef enum _sysctl_power_bank {
-	SYSCTL_POWER_BANK0,
-	SYSCTL_POWER_BANK1,
-	SYSCTL_POWER_BANK2,
-	SYSCTL_POWER_BANK3,
-	SYSCTL_POWER_BANK4,
-	SYSCTL_POWER_BANK5,
-	SYSCTL_POWER_BANK6,
-	SYSCTL_POWER_BANK7,
-	SYSCTL_POWER_BANK_MAX,
-} sysctl_power_bank_t;
-
-/**
- * System controller reset control id
- */
-typedef enum _sysctl_io_power_mode {
-	SYSCTL_POWER_V33,
-	SYSCTL_POWER_V18
-} sysctl_io_power_mode_t;
-
-/**
- * Git short commit id
- * No. 0 Register (0x00)
- */
-typedef struct _sysctl_git_id {
-	u32 git_id : 32;
-} __attribute__((packed, aligned(4))) sysctl_git_id_t;
-
-/**
- * System clock base frequency
- * No. 1 Register (0x04)
- */
-typedef struct _sysctl_clk_freq {
-	u32 clk_freq : 32;
-} __attribute__((packed, aligned(4))) sysctl_clk_freq_t;
-
-/**
- * PLL0 controller
- * No. 2 Register (0x08)
- */
-typedef struct _sysctl_pll0 {
-	u32 clkr0 : 4;
-	u32 clkf0 : 6;
-	u32 clkod0 : 4;
-	u32 bwadj0 : 6;
-	u32 pll_reset0 : 1;
-	u32 pll_pwrd0 : 1;
-	u32 pll_intfb0 : 1;
-	u32 pll_bypass0 : 1;
-	u32 pll_test0 : 1;
-	u32 pll_out_en0 : 1;
-	u32 pll_test_en : 1;
-	u32 reserved : 5;
-} __attribute__((packed, aligned(4))) sysctl_pll0_t;
-
-/**
- * PLL1 controller
- * No. 3 Register (0x0c)
- */
-typedef struct _sysctl_pll1 {
-	u32 clkr1 : 4;
-	u32 clkf1 : 6;
-	u32 clkod1 : 4;
-	u32 bwadj1 : 6;
-	u32 pll_reset1 : 1;
-	u32 pll_pwrd1 : 1;
-	u32 pll_intfb1 : 1;
-	u32 pll_bypass1 : 1;
-	u32 pll_test1 : 1;
-	u32 pll_out_en1 : 1;
-	u32 reserved : 6;
-} __attribute__((packed, aligned(4))) sysctl_pll1_t;
-
-/**
- * PLL2 controller
- * No. 4 Register (0x10)
- */
-typedef struct _sysctl_pll2 {
-	u32 clkr2 : 4;
-	u32 clkf2 : 6;
-	u32 clkod2 : 4;
-	u32 bwadj2 : 6;
-	u32 pll_reset2 : 1;
-	u32 pll_pwrd2 : 1;
-	u32 pll_intfb2 : 1;
-	u32 pll_bypass2 : 1;
-	u32 pll_test2 : 1;
-	u32 pll_out_en2 : 1;
-	u32 pll_ckin_sel2 : 2;
-	u32 reserved : 4;
-} __attribute__((packed, aligned(4))) sysctl_pll2_t;
-
-/**
- * PLL lock tester
- * No. 6 Register (0x18)
- */
-typedef struct _sysctl_pll_lock {
-	u32 pll_lock0 : 2;
-	u32 pll_slip_clear0 : 1;
-	u32 test_clk_out0 : 1;
-	u32 reserved0 : 4;
-	u32 pll_lock1 : 2;
-	u32 pll_slip_clear1 : 1;
-	u32 test_clk_out1 : 1;
-	u32 reserved1 : 4;
-	u32 pll_lock2 : 2;
-	u32 pll_slip_clear2 : 1;
-	u32 test_clk_out2 : 1;
-	u32 reserved2 : 12;
-} __attribute__((packed, aligned(4))) sysctl_pll_lock_t;
-
-/**
- * AXI ROM detector
- * No. 7 Register (0x1c)
- */
-typedef struct _sysctl_rom_error {
-	u32 rom_mul_error : 1;
-	u32 rom_one_error : 1;
-	u32 reserved : 30;
-} __attribute__((packed, aligned(4))) sysctl_rom_error_t;
-
-/**
- * Clock select controller0
- * No. 8 Register (0x20)
- */
-typedef struct _sysctl_clk_sel0 {
-	u32 aclk_sel : 1;
-	u32 aclk_divider_sel : 2;
-	u32 apb0_clk_sel : 3;
-	u32 apb1_clk_sel : 3;
-	u32 apb2_clk_sel : 3;
-	u32 spi3_clk_sel : 1;
-	u32 timer0_clk_sel : 1;
-	u32 timer1_clk_sel : 1;
-	u32 timer2_clk_sel : 1;
-	u32 reserved : 16;
-} __attribute__((packed, aligned(4))) sysctl_clk_sel0_t;
-
-/**
- * Clock select controller1
- * No. 9 Register (0x24)
- */
-typedef struct _sysctl_clk_sel1 {
-	u32 spi3_sample_clk_sel : 1;
-	u32 reserved0 : 30;
-	u32 reserved1 : 1;
-} __attribute__((packed, aligned(4))) sysctl_clk_sel1_t;
-
-/**
- * Central clock enable
- * No. 10 Register (0x28)
- */
-typedef struct _sysctl_clk_en_cent {
-	u32 cpu_clk_en : 1;
-	u32 sram0_clk_en : 1;
-	u32 sram1_clk_en : 1;
-	u32 apb0_clk_en : 1;
-	u32 apb1_clk_en : 1;
-	u32 apb2_clk_en : 1;
-	u32 reserved : 26;
-} __attribute__((packed, aligned(4))) sysctl_clk_en_cent_t;
-
-/**
- * Peripheral clock enable
- * No. 11 Register (0x2c)
- */
-typedef struct _sysctl_clk_en_peri {
-	u32 rom_clk_en : 1;
-	u32 dma_clk_en : 1;
-	u32 ai_clk_en : 1;
-	u32 dvp_clk_en : 1;
-	u32 fft_clk_en : 1;
-	u32 gpio_clk_en : 1;
-	u32 spi0_clk_en : 1;
-	u32 spi1_clk_en : 1;
-	u32 spi2_clk_en : 1;
-	u32 spi3_clk_en : 1;
-	u32 i2s0_clk_en : 1;
-	u32 i2s1_clk_en : 1;
-	u32 i2s2_clk_en : 1;
-	u32 i2c0_clk_en : 1;
-	u32 i2c1_clk_en : 1;
-	u32 i2c2_clk_en : 1;
-	u32 uart1_clk_en : 1;
-	u32 uart2_clk_en : 1;
-	u32 uart3_clk_en : 1;
-	u32 aes_clk_en : 1;
-	u32 fpioa_clk_en : 1;
-	u32 timer0_clk_en : 1;
-	u32 timer1_clk_en : 1;
-	u32 timer2_clk_en : 1;
-	u32 wdt0_clk_en : 1;
-	u32 wdt1_clk_en : 1;
-	u32 sha_clk_en : 1;
-	u32 otp_clk_en : 1;
-	u32 reserved : 1;
-	u32 rtc_clk_en : 1;
-	u32 reserved0 : 2;
-} __attribute__((packed, aligned(4))) sysctl_clk_en_peri_t;
-
-/**
- * Soft reset ctrl
- * No. 12 Register (0x30)
- */
-typedef struct _sysctl_soft_reset {
-	u32 soft_reset : 1;
-	u32 reserved : 31;
-} __attribute__((packed, aligned(4))) sysctl_soft_reset_t;
-
-/**
- * Peripheral reset controller
- * No. 13 Register (0x34)
- */
-typedef struct _sysctl_peri_reset {
-	u32 rom_reset : 1;
-	u32 dma_reset : 1;
-	u32 ai_reset : 1;
-	u32 dvp_reset : 1;
-	u32 fft_reset : 1;
-	u32 gpio_reset : 1;
-	u32 spi0_reset : 1;
-	u32 spi1_reset : 1;
-	u32 spi2_reset : 1;
-	u32 spi3_reset : 1;
-	u32 i2s0_reset : 1;
-	u32 i2s1_reset : 1;
-	u32 i2s2_reset : 1;
-	u32 i2c0_reset : 1;
-	u32 i2c1_reset : 1;
-	u32 i2c2_reset : 1;
-	u32 uart1_reset : 1;
-	u32 uart2_reset : 1;
-	u32 uart3_reset : 1;
-	u32 aes_reset : 1;
-	u32 fpioa_reset : 1;
-	u32 timer0_reset : 1;
-	u32 timer1_reset : 1;
-	u32 timer2_reset : 1;
-	u32 wdt0_reset : 1;
-	u32 wdt1_reset : 1;
-	u32 sha_reset : 1;
-	u32 reserved : 2;
-	u32 rtc_reset : 1;
-	u32 reserved0 : 2;
-} __attribute__((packed, aligned(4))) sysctl_peri_reset_t;
-
-/**
- * Clock threshold controller 0
- * No. 14 Register (0x38)
- */
-typedef struct _sysctl_clk_th0 {
-	u32 sram0_gclk_threshold : 4;
-	u32 sram1_gclk_threshold : 4;
-	u32 ai_gclk_threshold : 4;
-	u32 dvp_gclk_threshold : 4;
-	u32 rom_gclk_threshold : 4;
-	u32 reserved : 12;
-} __attribute__((packed, aligned(4))) sysctl_clk_th0_t;
-
-/**
- * Clock threshold controller 1
- * No. 15 Register (0x3c)
- */
-typedef struct _sysctl_clk_th1 {
-	u32 spi0_clk_threshold : 8;
-	u32 spi1_clk_threshold : 8;
-	u32 spi2_clk_threshold : 8;
-	u32 spi3_clk_threshold : 8;
-} __attribute__((packed, aligned(4))) sysctl_clk_th1_t;
-
-/**
- * Clock threshold controller 2
- * No. 16 Register (0x40)
- */
-typedef struct _sysctl_clk_th2 {
-	u32 timer0_clk_threshold : 8;
-	u32 timer1_clk_threshold : 8;
-	u32 timer2_clk_threshold : 8;
-	u32 reserved : 8;
-} __attribute__((packed, aligned(4))) sysctl_clk_th2_t;
-
-/**
- * Clock threshold controller 3
- * No. 17 Register (0x44)
- */
-typedef struct _sysctl_clk_th3 {
-	u32 i2s0_clk_threshold : 16;
-	u32 i2s1_clk_threshold : 16;
-} __attribute__((packed, aligned(4))) sysctl_clk_th3_t;
-
-/**
- * Clock threshold controller 4
- * No. 18 Register (0x48)
- */
-typedef struct _sysctl_clk_th4 {
-	u32 i2s2_clk_threshold : 16;
-	u32 i2s0_mclk_threshold : 8;
-	u32 i2s1_mclk_threshold : 8;
-} __attribute__((packed, aligned(4))) sysctl_clk_th4_t;
-
-/**
- * Clock threshold controller 5
- * No. 19 Register (0x4c)
- */
-typedef struct _sysctl_clk_th5 {
-	u32 i2s2_mclk_threshold : 8;
-	u32 i2c0_clk_threshold : 8;
-	u32 i2c1_clk_threshold : 8;
-	u32 i2c2_clk_threshold : 8;
-} __attribute__((packed, aligned(4))) sysctl_clk_th5_t;
-
-/**
- * Clock threshold controller 6
- * No. 20 Register (0x50)
- */
-typedef struct _sysctl_clk_th6 {
-	u32 wdt0_clk_threshold : 8;
-	u32 wdt1_clk_threshold : 8;
-	u32 reserved0 : 8;
-	u32 reserved1 : 8;
-} __attribute__((packed, aligned(4))) sysctl_clk_th6_t;
-
-/**
- * Miscellaneous controller
- * No. 21 Register (0x54)
- */
-typedef struct _sysctl_misc {
-	u32 debug_sel : 6;
-	u32 reserved0 : 4;
-	u32 spi_dvp_data_enable : 1;
-	u32 reserved1 : 21;
-} __attribute__((packed, aligned(4))) sysctl_misc_t;
-
-/**
- * Peripheral controller
- * No. 22 Register (0x58)
- */
-typedef struct _sysctl_peri {
-	u32 timer0_pause : 1;
-	u32 timer1_pause : 1;
-	u32 timer2_pause : 1;
-	u32 timer3_pause : 1;
-	u32 timer4_pause : 1;
-	u32 timer5_pause : 1;
-	u32 timer6_pause : 1;
-	u32 timer7_pause : 1;
-	u32 timer8_pause : 1;
-	u32 timer9_pause : 1;
-	u32 timer10_pause : 1;
-	u32 timer11_pause : 1;
-	u32 spi0_xip_en : 1;
-	u32 spi1_xip_en : 1;
-	u32 spi2_xip_en : 1;
-	u32 spi3_xip_en : 1;
-	u32 spi0_clk_bypass : 1;
-	u32 spi1_clk_bypass : 1;
-	u32 spi2_clk_bypass : 1;
-	u32 i2s0_clk_bypass : 1;
-	u32 i2s1_clk_bypass : 1;
-	u32 i2s2_clk_bypass : 1;
-	u32 jtag_clk_bypass : 1;
-	u32 dvp_clk_bypass : 1;
-	u32 debug_clk_bypass : 1;
-	u32 reserved0 : 1;
-	u32 reserved1 : 6;
-} __attribute__((packed, aligned(4))) sysctl_peri_t;
-
-/**
- * SPI sleep controller
- * No. 23 Register (0x5c)
- */
-typedef struct _sysctl_spi_sleep {
-	u32 ssi0_sleep : 1;
-	u32 ssi1_sleep : 1;
-	u32 ssi2_sleep : 1;
-	u32 ssi3_sleep : 1;
-	u32 reserved : 28;
-} __attribute__((packed, aligned(4))) sysctl_spi_sleep_t;
-
-/**
- * Reset source status
- * No. 24 Register (0x60)
- */
-typedef struct _sysctl_reset_status {
-	u32 reset_sts_clr : 1;
-	u32 pin_reset_sts : 1;
-	u32 wdt0_reset_sts : 1;
-	u32 wdt1_reset_sts : 1;
-	u32 soft_reset_sts : 1;
-	u32 reserved : 27;
-} __attribute__((packed, aligned(4))) sysctl_reset_status_t;
-
-/**
- * DMA handshake selector
- * No. 25 Register (0x64)
- */
-typedef struct _sysctl_dma_sel0 {
-	u32 dma_sel0 : 6;
-	u32 dma_sel1 : 6;
-	u32 dma_sel2 : 6;
-	u32 dma_sel3 : 6;
-	u32 dma_sel4 : 6;
-	u32 reserved : 2;
-} __attribute__((packed, aligned(4))) sysctl_dma_sel0_t;
-
-/**
- * DMA handshake selector
- * No. 26 Register (0x68)
- */
-typedef struct _sysctl_dma_sel1 {
-	u32 dma_sel5 : 6;
-	u32 reserved : 26;
-} __attribute__((packed, aligned(4))) sysctl_dma_sel1_t;
-
-/**
- * IO Power Mode Select controller
- * No. 27 Register (0x6c)
- */
-typedef struct _sysctl_power_sel {
-	u32 power_mode_sel0 : 1;
-	u32 power_mode_sel1 : 1;
-	u32 power_mode_sel2 : 1;
-	u32 power_mode_sel3 : 1;
-	u32 power_mode_sel4 : 1;
-	u32 power_mode_sel5 : 1;
-	u32 power_mode_sel6 : 1;
-	u32 power_mode_sel7 : 1;
-	u32 reserved : 24;
-} __attribute__((packed, aligned(4))) sysctl_power_sel_t;
-
-/**
- * System controller object
- *
- * The System controller is a peripheral device mapped in the
- * internal memory map, discoverable in the Configuration String.
- * It is responsible for low-level configuration of all system
- * related peripheral device. It contain PLL controller, clock
- * controller, reset controller, DMA handshake controller, SPI
- * controller, timer controller, WDT controller and sleep
- * controller.
- */
-typedef struct _sysctl {
-	/* No. 0 (0x00): Git short commit id */
-	sysctl_git_id_t git_id;
-	/* No. 1 (0x04): System clock base frequency */
-	sysctl_clk_freq_t clk_freq;
-	/* No. 2 (0x08): PLL0 controller */
-	sysctl_pll0_t pll0;
-	/* No. 3 (0x0c): PLL1 controller */
-	sysctl_pll1_t pll1;
-	/* No. 4 (0x10): PLL2 controller */
-	sysctl_pll2_t pll2;
-	/* No. 5 (0x14): Reserved */
-	u32 resv5;
-	/* No. 6 (0x18): PLL lock tester */
-	sysctl_pll_lock_t pll_lock;
-	/* No. 7 (0x1c): AXI ROM detector */
-	sysctl_rom_error_t rom_error;
-	/* No. 8 (0x20): Clock select controller0 */
-	sysctl_clk_sel0_t clk_sel0;
-	/* No. 9 (0x24): Clock select controller1 */
-	sysctl_clk_sel1_t clk_sel1;
-	/* No. 10 (0x28): Central clock enable */
-	sysctl_clk_en_cent_t clk_en_cent;
-	/* No. 11 (0x2c): Peripheral clock enable */
-	sysctl_clk_en_peri_t clk_en_peri;
-	/* No. 12 (0x30): Soft reset ctrl */
-	sysctl_soft_reset_t soft_reset;
-	/* No. 13 (0x34): Peripheral reset controller */
-	sysctl_peri_reset_t peri_reset;
-	/* No. 14 (0x38): Clock threshold controller 0 */
-	sysctl_clk_th0_t clk_th0;
-	/* No. 15 (0x3c): Clock threshold controller 1 */
-	sysctl_clk_th1_t clk_th1;
-	/* No. 16 (0x40): Clock threshold controller 2 */
-	sysctl_clk_th2_t clk_th2;
-	/* No. 17 (0x44): Clock threshold controller 3 */
-	sysctl_clk_th3_t clk_th3;
-	/* No. 18 (0x48): Clock threshold controller 4 */
-	sysctl_clk_th4_t clk_th4;
-	/* No. 19 (0x4c): Clock threshold controller 5 */
-	sysctl_clk_th5_t clk_th5;
-	/* No. 20 (0x50): Clock threshold controller 6 */
-	sysctl_clk_th6_t clk_th6;
-	/* No. 21 (0x54): Miscellaneous controller */
-	sysctl_misc_t misc;
-	/* No. 22 (0x58): Peripheral controller */
-	sysctl_peri_t peri;
-	/* No. 23 (0x5c): SPI sleep controller */
-	sysctl_spi_sleep_t spi_sleep;
-	/* No. 24 (0x60): Reset source status */
-	sysctl_reset_status_t reset_status;
-	/* No. 25 (0x64): DMA handshake selector */
-	sysctl_dma_sel0_t dma_sel0;
-	/* No. 26 (0x68): DMA handshake selector */
-	sysctl_dma_sel1_t dma_sel1;
-	/* No. 27 (0x6c): IO Power Mode Select controller */
-	sysctl_power_sel_t power_sel;
-	/* No. 28 (0x70): Reserved */
-	u32 resv28;
-	/* No. 29 (0x74): Reserved */
-	u32 resv29;
-	/* No. 30 (0x78): Reserved */
-	u32 resv30;
-	/* No. 31 (0x7c): Reserved */
-	u32 resv31;
-} __attribute__((packed, aligned(4))) sysctl_t;
-
-/**
- * Abstruct PLL struct
- */
-typedef struct _sysctl_general_pll {
-	u32 clkr : 4;
-	u32 clkf : 6;
-	u32 clkod : 4;
-	u32 bwadj : 6;
-	u32 pll_reset : 1;
-	u32 pll_pwrd : 1;
-	u32 pll_intfb : 1;
-	u32 pll_bypass : 1;
-	u32 pll_test : 1;
-	u32 pll_out_en : 1;
-	u32 pll_ckin_sel : 2;
-	u32 reserved : 4;
-} __attribute__((packed, aligned(4))) sysctl_general_pll_t;
-
-/**
- * Get frequency of CPU
- * @return      The frequency of the CPU
- */
-u32 sysctl_get_cpu_freq(void);
-
-#endif /* _K210_SYSCTL_H_ */

From 144acef6847663cdee8c64daaf2821ca13520656 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Wed, 4 Sep 2019 13:27:29 +0900
Subject: [PATCH 0314/1765] README: Update license information

With the Kendryte K210 platform code cleanup, none of the code copied
from Kendryte standalone SDK remains and this platform code is now
entirely licensed under OpenSBI BSD-2-clause license. Update the
README.md and ThirdPartyNotices.md files to reflect this.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 README.md            |  12 +--
 ThirdPartyNotices.md | 188 -------------------------------------------
 2 files changed, 4 insertions(+), 196 deletions(-)

diff --git a/README.md b/README.md
index 0a1130aaebe..fffebce8819 100644
--- a/README.md
+++ b/README.md
@@ -172,14 +172,10 @@ OpenSBI source code also contains code reused from other projects as listed
 below. The original license text of these projects is included in the source
 files where the reused code is present.
 
-1. The libfdt source code is disjunctively dual licensed
-   (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
-   under the terms of the BSD 2-Clause license. Any contributions to this
-   code must be made under the terms of both licenses.
-2. Some source file for the Kendryte/k210 platform code are based on code from
-   the [Kendryte standalone SDK] available on github. These files retain the
-   original copyright and license of the Kendryte standalone SDK project and
-   are licensed under the terms of the Apache License, Version 2.0.
+* The libfdt source code is disjunctively dual licensed
+  (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
+  under the terms of the BSD 2-Clause license. Any contributions to this
+  code must be made under the terms of both licenses.
 
 See also the [third party notices] file for more information.
 
diff --git a/ThirdPartyNotices.md b/ThirdPartyNotices.md
index 39b94f3a6ee..23e9f9393d3 100644
--- a/ThirdPartyNotices.md
+++ b/ThirdPartyNotices.md
@@ -17,191 +17,3 @@ BSD-2-Clause). Some of this project code is used in OpenSBI under the terms of
 the BSD 2-Clause license. The full text of this license can be found in the
 file [COPYING.BSD](COPYING.BSD).
 
-Kendryte Standalone SDK
------------------------
-
-Copyright 2018 Canaan Inc.
-
-The Kendryte K210 platform code reuses some code from Kendryte standalone SDK
-licensed under the terms of the Apache License, Version 2.0. The full text of
-this license is available at http://www.apache.org/licenses/LICENSE-2.0 and
-included below.
-
-```
-                                 Apache License
-                           Version 2.0, January 2004
-                        http://www.apache.org/licenses/
-
-   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
-
-   1. Definitions.
-
-      "License" shall mean the terms and conditions for use, reproduction,
-      and distribution as defined by Sections 1 through 9 of this document.
-
-      "Licensor" shall mean the copyright owner or entity authorized by
-      the copyright owner that is granting the License.
-
-      "Legal Entity" shall mean the union of the acting entity and all
-      other entities that control, are controlled by, or are under common
-      control with that entity. For the purposes of this definition,
-      "control" means (i) the power, direct or indirect, to cause the
-      direction or management of such entity, whether by contract or
-      otherwise, or (ii) ownership of fifty percent (50%) or more of the
-      outstanding shares, or (iii) beneficial ownership of such entity.
-
-      "You" (or "Your") shall mean an individual or Legal Entity
-      exercising permissions granted by this License.
-
-      "Source" form shall mean the preferred form for making modifications,
-      including but not limited to software source code, documentation
-      source, and configuration files.
-
-      "Object" form shall mean any form resulting from mechanical
-      transformation or translation of a Source form, including but
-      not limited to compiled object code, generated documentation,
-      and conversions to other media types.
-
-      "Work" shall mean the work of authorship, whether in Source or
-      Object form, made available under the License, as indicated by a
-      copyright notice that is included in or attached to the work
-      (an example is provided in the Appendix below).
-
-      "Derivative Works" shall mean any work, whether in Source or Object
-      form, that is based on (or derived from) the Work and for which the
-      editorial revisions, annotations, elaborations, or other modifications
-      represent, as a whole, an original work of authorship. For the purposes
-      of this License, Derivative Works shall not include works that remain
-      separable from, or merely link (or bind by name) to the interfaces of,
-      the Work and Derivative Works thereof.
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-      "Contribution" shall mean any work of authorship, including
-      the original version of the Work and any modifications or additions
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-   5. Submission of Contributions. Unless You explicitly state otherwise,
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-      by You to the Licensor shall be under the terms and conditions of
-      this License, without any additional terms or conditions.
-      Notwithstanding the above, nothing herein shall supersede or modify
-      the terms of any separate license agreement you may have executed
-      with Licensor regarding such Contributions.
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-   6. Trademarks. This License does not grant permission to use the trade
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-   7. Disclaimer of Warranty. Unless required by applicable law or
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From f2e82c3d797d9f64ec8f33365c35a2b5f7ea2bbb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 10 Sep 2019 03:40:37 -0700
Subject: [PATCH 0315/1765] lib: Change tlb range flush threshold to 4k page
 instead of 1G

In RISC-V, tlb flush happens at a page granularity. That's why OpenSBI
also have a tlb range flush limit which decides the which tlb flush
requests should be upgraded to full flush to avoid long delays.
Currently, this is set to 1G which would result in a many sfence.vma
execution in a tight loop for a large range.

Change the threshold to 4k to speed things up.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_tlb.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index af77f8938aa..cd52c12f475 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -16,7 +16,7 @@
 /* clang-format off */
 
 #define SBI_TLB_FLUSH_ALL			((unsigned long)-1)
-#define SBI_TLB_FLUSH_MAX_SIZE			(1UL << 30)
+#define SBI_TLB_FLUSH_MAX_SIZE			(1UL << 12)
 
 /* clang-format on */
 

From 98ee15ca3adcf7bc22695897cd63a3ce8c5c53ff Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 10 Sep 2019 03:40:38 -0700
Subject: [PATCH 0316/1765] lib: provide a platform specific tlb range flush
 threshold

Currently, the tlb range flush threshold is fixed and set to 4k for
all platforms. However, it should be platform specific as it completely
depends upon how platform actually implements sfence instruction.

Define a platform feature that allows every individual platform to set
different values. If a platform doesn't define it, just use a page size as
the threshold.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h   | 26 ++++++++++++++++++++++++--
 include/sbi/sbi_tlb.h        |  1 -
 lib/sbi/sbi_tlb.c            |  5 ++++-
 platform/template/platform.c |  1 +
 4 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 97195c411f5..7f5dd29b423 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -30,10 +30,14 @@
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
 /** Offset of disabled_hart_mask in struct sbi_platform */
 #define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
+/** Offset of tlb_range_flush_limit in struct sbi_platform */
+#define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_OFFSET (0x60)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x60)
+#define SBI_PLATFORM_OPS_OFFSET (0x68)
 /** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x68 + __SIZEOF_POINTER__)
+
+#define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
 #ifndef __ASSEMBLY__
 
@@ -134,6 +138,8 @@ struct sbi_platform {
 	u32 hart_stack_size;
 	/** Mask representing the set of disabled HARTs */
 	u64 disabled_hart_mask;
+	/* Maximum value of tlb flush range request*/
+	u64 tlb_range_flush_limit;
 	/** Pointer to sbi platform operations */
 	unsigned long platform_ops_addr;
 	/** Pointer to system firmware specific context */
@@ -198,6 +204,22 @@ static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
 	return FALSE;
 }
 
+/**
+ * Get platform specific tlb range flush maximum value. Any request with size
+ * higher than this is upgraded to a full flush.
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return tlb range flush limit value. Returns a default (page size) if not
+ * defined by platform.
+ */
+static inline u64 sbi_platform_tlbr_flush_limit(const struct sbi_platform *plat)
+{
+	if (plat)
+		return plat->tlb_range_flush_limit;
+	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
+}
+
 /**
  * Get total number of HARTs supported by the platform
  *
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index cd52c12f475..d1d6f225c43 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -16,7 +16,6 @@
 /* clang-format off */
 
 #define SBI_TLB_FLUSH_ALL			((unsigned long)-1)
-#define SBI_TLB_FLUSH_MAX_SIZE			(1UL << 12)
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index c4e5f48fcb3..5c4c59651bd 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -23,6 +23,7 @@
 static unsigned long tlb_sync_off;
 static unsigned long tlb_fifo_off;
 static unsigned long tlb_fifo_mem_off;
+static unsigned long tlb_range_flush_limit;
 
 static void sbi_tlb_flush_all(void)
 {
@@ -232,7 +233,7 @@ int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 	 * upgrade it to flush all because we can only flush
 	 * 4KB at a time.
 	 */
-	if (tinfo->size > SBI_TLB_FLUSH_MAX_SIZE) {
+	if (tinfo->size > tlb_range_flush_limit) {
 		tinfo->start = 0;
 		tinfo->size = SBI_TLB_FLUSH_ALL;
 	}
@@ -276,6 +277,7 @@ int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 	void *tlb_mem;
 	unsigned long *tlb_sync;
 	struct sbi_fifo *tlb_q;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (cold_boot) {
 		tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync),
@@ -296,6 +298,7 @@ int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
 		}
+		tlb_range_flush_limit = sbi_platform_tlbr_flush_limit(plat);
 	} else {
 		if (!tlb_sync_off ||
 		    !tlb_fifo_off ||
diff --git a/platform/template/platform.c b/platform/template/platform.c
index e123f3a1d97..d36af481969 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -224,5 +224,6 @@ const struct sbi_platform platform = {
 	.hart_count		= 1,
 	.hart_stack_size	= 4096,
 	.disabled_hart_mask	= 0,
+	.tlb_range_flush_limit	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 8853758268d253f2c087fdba2c7f3efbacfec1ec Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 23 Sep 2019 05:49:15 -0700
Subject: [PATCH 0317/1765] docs: platform: Update descriptions for
 qemu/sifive_u support

With QEMU v4.2 release that has improved the emulation fidelity
of 'sifive_u' machine, OpenSBI v0.4 / U-Boot v2019.10-rc1 / Linux
kernel v5.3-rc2 images built for the SiFive HiFive Unleashed board
can be used out of the box without any special hack.

Update our documents to mention 'qemu/sifive_u' platform should
only be used with QEMU v4.1 or before, and it will be dropped
sometime in the future release.

Going forward, 'sifive/fu540' platform can be used on both real
hardware and QEMU v4.2+ 'sifive_u' machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/qemu_sifive_u.md |  8 ++++++++
 docs/platform/sifive_fu540.md  | 12 ++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
index 48b30e46b95..b5c4f0e32b7 100644
--- a/docs/platform/qemu_sifive_u.md
+++ b/docs/platform/qemu_sifive_u.md
@@ -7,6 +7,14 @@ platform.
 To build this platform specific library and firmwares, provide the
 *PLATFORM=qemu/sifive_u* parameter to the top level `make` command line.
 
+Note with QEMU v4.2 release, the QEMU *sifive_u* machine has been updated to
+closely match the SiFive HiFive Unleashed hardware and can therefore run the
+same firmware as what gets loaded onto the board, and OpenSBI's *qemu/sifive_u*
+platform should only be used with QEMU v4.1 release or before.
+
+The special *qemu/sifive_u* platform support will be dropped in the future
+OpenSBI release.
+
 Platform Options
 ----------------
 
diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 6df904d110b..9fb45d6a8b3 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -4,6 +4,9 @@ The FU540-C000 is the world’s first 4+1 64-bit RISC-V SoC from SiFive.
 The HiFive Unleashed development platform is based on FU540-C000 and capable
 of running Linux.
 
+With QEMU v4.2 or above release, the 'sifive_u' machine can be used to test
+OpenSBI image built for the real hardware as well.
+
 To build platform specific library and firmwares, provide the
 *PLATFORM=sifive/fu540* parameter to the top level `make` command.
 
@@ -201,3 +204,12 @@ At U-Boot prompt execute the following boot command to boot Linux.
 ```
 bootm ${kernel_addr_r} - ${fdt_addr_r}
 ```
+
+QEMU Specific Instructions
+--------------------------
+If you want to test OpenSBI with QEMU 'sifive_u' machine, please follow the
+same instructions above, with the exception of not passing FW_PAYLOAD_FDT_PATH.
+
+This is because QEMU generates a device tree blob on the fly based on the
+command line parameters and it's compatible with the one used in the upstream
+Linux kernel.

From 190e3f4bd9ca93ba4c2e9a42c463c2c01b9c255b Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Fri, 27 Sep 2019 02:45:00 +0900
Subject: [PATCH 0318/1765] kendryte/k210: remove unused file

Commit 9dfe72057957 ("kendryte/k210: remove sysctl code") missed
removing the file sysctl.c. Fix this here.

Fixes: 9dfe72057957 ("kendryte/k210: remove sysctl code")
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/sysctl.c | 57 ---------------------------------
 1 file changed, 57 deletions(-)
 delete mode 100644 platform/kendryte/k210/sysctl.c

diff --git a/platform/kendryte/k210/sysctl.c b/platform/kendryte/k210/sysctl.c
deleted file mode 100644
index 3c077774c49..00000000000
--- a/platform/kendryte/k210/sysctl.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * SPDX-License-Identifier:    Apache-2.0
- *
- * Copyright 2018 Canaan Inc.
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include <sbi/riscv_encoding.h>
-#include "sysctl.h"
-
-volatile sysctl_t *const sysctl = (volatile sysctl_t *)SYSCTL_BASE_ADDR;
-
-#define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
-
-static u32 sysctl_pll0_get_freq(void)
-{
-	u32 freq_in, nr, nf, od;
-
-	freq_in = SYSCTRL_CLOCK_FREQ_IN0;
-	nr	= sysctl->pll0.clkr0 + 1;
-	nf	= sysctl->pll0.clkf0 + 1;
-	od	= sysctl->pll0.clkod0 + 1;
-
-	/*
-	 * Get final PLL output freq
-	 * FOUT = FIN / NR * NF / OD
-	 *      = (FIN * NF) / (NR * OD)
-	 */
-	return ((u64)freq_in * (u64)nf) / ((u64)nr * (u64)od);
-}
-
-u32 sysctl_get_cpu_freq(void)
-{
-	int clock_source;
-
-	clock_source = (int)sysctl->clk_sel0.aclk_sel;
-	switch (clock_source) {
-	case 0:
-		return SYSCTRL_CLOCK_FREQ_IN0;
-	case 1:
-		return sysctl_pll0_get_freq() /
-		       (2ULL << (int)sysctl->clk_sel0.aclk_divider_sel);
-	default:
-		return 0;
-	}
-}

From 0a482e2edbc4e0d0a88199b76de5591cc99a11ab Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 26 Sep 2019 18:34:17 -0700
Subject: [PATCH 0319/1765] lib: Fix tlb flush range limit value

Use platform defined flush range limit value only if it is non-zero.
Otherwise, use the default value.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_platform.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 7f5dd29b423..3de69b5a8a0 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -215,7 +215,7 @@ static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
  */
 static inline u64 sbi_platform_tlbr_flush_limit(const struct sbi_platform *plat)
 {
-	if (plat)
+	if (plat && plat->tlb_range_flush_limit)
 		return plat->tlb_range_flush_limit;
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }

From 1ed9eb255d865e75be2d2a87d9ef670c502294cc Mon Sep 17 00:00:00 2001
From: Zong Li <zong.li@sifive.com>
Date: Thu, 26 Sep 2019 20:14:02 -0700
Subject: [PATCH 0320/1765] Write MSIP by using memory-mapped control register

The machine-level MSIP bits are written by accesses to memory-mapped
control registers. Only use CSR instruction for SSIP and USIP.

There is no effect that using CSR instruction to write MSIP when testing
on unleashed board and QEMU.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6bf0e136b17..018fe851bfe 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -341,7 +341,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		spin_unlock(&coldboot_wait_bitmap_lock);
 	} while (!(mipval & MIP_MSIP));
 
-	csr_clear(CSR_MIP, MIP_MSIP);
+	sbi_platform_ipi_clear(plat, hartid);
 }
 
 void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)

From 0089897d41b5b2382acba1c2c9f9386edad75228 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 5 Apr 2019 13:17:42 +0530
Subject: [PATCH 0321/1765] lib: Delegate supervisor ecall to HS-mode when H
 extension available

When hypervisor extension is available, we only handle hypervisor
ecalls coming from HS-mode and we let hypervisor handle ecalls coming
from VS-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_hart.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 018fe851bfe..6dac84bea24 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -87,6 +87,14 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 			      (1U << CAUSE_LOAD_PAGE_FAULT) |
 			      (1U << CAUSE_STORE_PAGE_FAULT);
 
+	/*
+	 * If hypervisor extension available then we only handle
+	 * hypervisor calls (i.e. ecalls from HS-mode) and we let
+	 * HS-mode handle supervisor calls (i.e. ecalls from VS-mode)
+	 */
+	if (misa_extension('H'))
+		exceptions |= (1U << CAUSE_SUPERVISOR_ECALL);
+
 	csr_write(CSR_MIDELEG, interrupts);
 	csr_write(CSR_MEDELEG, exceptions);
 

From 1a5614e971cf44e08342c2b1639fa3be544b0202 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 5 Apr 2019 14:08:57 +0530
Subject: [PATCH 0322/1765] lib: Extend sbi_hart_switch_mode() to support
 hypervisor extension

This patch extends sbi_hart_switch_mode() to support entering
VS/VU modes when hypervisor extension is available.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h | 14 ++++++++++++++
 include/sbi/sbi_hart.h       |  3 ++-
 lib/sbi/sbi_hart.c           | 27 +++++++++++++++++++++++++--
 lib/sbi/sbi_init.c           |  5 +++--
 4 files changed, 44 insertions(+), 5 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 5a5086a009e..dace9e6bf21 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -38,8 +38,21 @@
 #define MSTATUS_TW			0x00200000
 #define MSTATUS_TSR			0x00400000
 #define MSTATUS32_SD			0x80000000
+#if __riscv_xlen == 64
 #define MSTATUS_UXL			0x0000000300000000
 #define MSTATUS_SXL			0x0000000C00000000
+#define MSTATUS_MTL			0x0000004000000000
+#define MSTATUS_MTL_SHIFT		38
+#define MSTATUS_MPV			0x0000008000000000
+#define MSTATUS_MPV_HIFT		39
+#else
+#define MSTATUSH_UXL			0x00000003
+#define MSTATUSH_SXL			0x0000000C
+#define MSTATUSH_MTL			0x00000040
+#define MSTATUSH_MTL_SHIFT		6
+#define MSTATUSH_MPV			0x00000080
+#define MSTATUSH_MPV_HIFT		7
+#endif
 #define MSTATUS64_SD			0x8000000000000000
 
 #define SSTATUS_UIE			0x00000001
@@ -256,6 +269,7 @@
 #define CSR_MIE				0x304
 #define CSR_MTVEC			0x305
 #define CSR_MCOUNTEREN			0x306
+#define CSR_MSTATUSH			0x310
 #define CSR_MSCRATCH			0x340
 #define CSR_MEPC			0x341
 #define CSR_MCAUSE			0x342
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 4aa4a5c62c2..0762f951869 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,7 +26,8 @@ void __attribute__((noreturn)) sbi_hart_hang(void);
 
 void __attribute__((noreturn))
 sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
-		     unsigned long next_addr, unsigned long next_mode);
+		     unsigned long next_addr, unsigned long next_mode,
+		     bool next_virt);
 
 void sbi_hart_mark_available(u32 hartid);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6dac84bea24..b0c087a5798 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -241,9 +241,14 @@ void __attribute__((noreturn)) sbi_hart_hang(void)
 
 void __attribute__((noreturn))
 sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
-		     unsigned long next_addr, unsigned long next_mode)
+		     unsigned long next_addr, unsigned long next_mode,
+		     bool next_virt)
 {
+#if __riscv_xlen == 32
+	unsigned long val, valH;
+#else
 	unsigned long val;
+#endif
 
 	switch (next_mode) {
 	case PRV_M:
@@ -263,7 +268,25 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	val = csr_read(CSR_MSTATUS);
 	val = INSERT_FIELD(val, MSTATUS_MPP, next_mode);
 	val = INSERT_FIELD(val, MSTATUS_MPIE, 0);
-
+#if __riscv_xlen == 32
+	if (misa_extension('H')) {
+		valH = csr_read(CSR_MSTATUSH);
+		valH = INSERT_FIELD(valH, MSTATUSH_MTL, 0);
+		if (next_virt)
+			valH = INSERT_FIELD(valH, MSTATUSH_MPV, 1);
+		else
+			valH = INSERT_FIELD(valH, MSTATUSH_MPV, 0);
+		csr_write(CSR_MSTATUSH, valH);
+	}
+#else
+	if (misa_extension('H')) {
+		val = INSERT_FIELD(val, MSTATUS_MTL, 0);
+		if (next_virt)
+			val = INSERT_FIELD(val, MSTATUS_MPV, 1);
+		else
+			val = INSERT_FIELD(val, MSTATUS_MPV, 0);
+	}
+#endif
 	csr_write(CSR_MSTATUS, val);
 	csr_write(CSR_MEPC, next_addr);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 4663a30852a..e1acb57952b 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -102,7 +102,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_wake_coldboot_harts(scratch, hartid);
 	sbi_hart_mark_available(hartid);
 	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
-			     scratch->next_mode);
+			     scratch->next_mode, FALSE);
 }
 
 static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
@@ -147,7 +147,8 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	else
 		sbi_hart_switch_mode(hartid, scratch->next_arg1,
-				     scratch->next_addr, scratch->next_mode);
+				     scratch->next_addr,
+				     scratch->next_mode, FALSE);
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);

From bbeb8e619d1cc528d2d56531512d6ea406f9738b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 15 Apr 2019 11:53:31 +0530
Subject: [PATCH 0323/1765] lib: Extend sbi_trap_redirect() for hypervisor
 extension

When hypervisor extension is available, we can get traps from VS/VU
modes. We should be able to force redirect some of these traps to
HS-mode. In other words, we should be able forward traps from VS/VU
mode to HS-mode using sbi_trap_redirect() hence this patch.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 firmware/fw_base.S           |  19 ++++++
 include/sbi/riscv_encoding.h |  32 ++++++++-
 include/sbi/sbi_trap.h       |   6 +-
 lib/sbi/sbi_trap.c           | 125 ++++++++++++++++++++++++++++-------
 4 files changed, 156 insertions(+), 26 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index f5966385bd3..2c198cfe807 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -486,6 +486,16 @@ _trap_handler_all_mode:
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
 	csrr	t0, CSR_MSTATUS
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+	REG_S	zero, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+#if __riscv_xlen == 32
+	csrr	t0, CSR_MISA
+	srli	t0, t0, ('H' - 'A')
+	andi	t0, t0, 0x1
+	beq	t0, zero, _skip_mstatush_save
+	csrr	t0, CSR_MSTATUSH
+	REG_S	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+_skip_mstatush_save:
+#endif
 
 	/* Save all general regisers except SP and T0 */
 	REG_S	zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
@@ -560,6 +570,15 @@ _trap_handler_all_mode:
 	csrw	CSR_MEPC, t0
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
 	csrw	CSR_MSTATUS, t0
+#if __riscv_xlen == 32
+	csrr	t0, CSR_MISA
+	srli	t0, t0, ('H' - 'A')
+	andi	t0, t0, 0x1
+	beq	t0, zero, _skip_mstatush_restore
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+	csrw	CSR_MSTATUSH, t0
+_skip_mstatush_restore:
+#endif
 
 	/* Restore T0 */
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index dace9e6bf21..0e1ea59c2fc 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -58,8 +58,10 @@
 #define SSTATUS_UIE			0x00000001
 #define SSTATUS_SIE			0x00000002
 #define SSTATUS_UPIE			0x00000010
-#define SSTATUS_SPIE			0x00000020
-#define SSTATUS_SPP			0x00000100
+#define SSTATUS_SPIE_SHIFT		5
+#define SSTATUS_SPIE			(1UL << MSTATUS_SPIE_SHIFT)
+#define SSTATUS_SPP_SHIFT		8
+#define SSTATUS_SPP			(1UL << MSTATUS_SPP_SHIFT)
 #define SSTATUS_FS			0x00006000
 #define SSTATUS_XS			0x00018000
 #define SSTATUS_SUM			0x00040000
@@ -68,6 +70,14 @@
 #define SSTATUS_UXL			0x0000000300000000
 #define SSTATUS64_SD			0x8000000000000000
 
+#define HSTATUS_VTSR			0x00400000
+#define HSTATUS_VTVM			0x00100000
+#define HSTATUS_SP2V			0x00000200
+#define HSTATUS_SP2P			0x00000100
+#define HSTATUS_SPV			0x00000080
+#define HSTATUS_STL			0x00000040
+#define HSTATUS_SPRV			0x00000001
+
 #define DCSR_XDEBUGVER			(3U<<30)
 #define DCSR_NDRESET			(1<<29)
 #define DCSR_FULLRESET			(1<<28)
@@ -262,6 +272,23 @@
 #define CSR_STVAL			0x143
 #define CSR_SIP				0x144
 #define CSR_SATP			0x180
+
+#define CSR_HSTATUS			0x600
+#define CSR_HEDELEG			0x602
+#define CSR_HIDELEG			0x603
+#define CSR_HCOUNTERNEN		0x606
+#define CSR_HGATP			0x680
+
+#define CSR_VSSTATUS			0x200
+#define CSR_VSIE			0x204
+#define CSR_VSTVEC			0x205
+#define CSR_VSSCRATCH			0x240
+#define CSR_VSEPC			0x241
+#define CSR_VSCAUSE			0x242
+#define CSR_VSTVAL			0x243
+#define CSR_VSIP			0x244
+#define CSR_VSATP			0x280
+
 #define CSR_MSTATUS			0x300
 #define CSR_MISA			0x301
 #define CSR_MEDELEG			0x302
@@ -302,6 +329,7 @@
 #define CSR_DCSR			0x7b0
 #define CSR_DPC				0x7b1
 #define CSR_DSCRATCH			0x7b2
+
 #define CSR_MCYCLE			0xb00
 #define CSR_MINSTRET			0xb02
 #define CSR_MHPMCOUNTER3		0xb03
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 19b95a7cc9f..bc26ad130f4 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -80,8 +80,10 @@
 #define SBI_TRAP_REGS_mepc			32
 /** Index of mstatus member in sbi_trap_regs */
 #define SBI_TRAP_REGS_mstatus			33
+/** Index of mstatusH member in sbi_trap_regs */
+#define SBI_TRAP_REGS_mstatusH			34
 /** Last member index in sbi_trap_regs */
-#define SBI_TRAP_REGS_last			34
+#define SBI_TRAP_REGS_last			35
 
 /* clang-format on */
 
@@ -164,6 +166,8 @@ struct sbi_trap_regs {
 	unsigned long mepc;
 	/** mstatus register state */
 	unsigned long mstatus;
+	/** mstatusH register state (only for 32-bit) */
+	unsigned long mstatusH;
 } __packed;
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 82f7b652431..93a040423a6 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -79,41 +79,119 @@ static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
 int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 		      ulong epc, ulong cause, ulong tval)
 {
-	ulong new_mstatus, prev_mode;
+	ulong hstatus, vsstatus, prev_mode;
+#if __riscv_xlen == 32
+	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+	bool prev_stage2 = (regs->mstatusH & MSTATUSH_MTL) ? TRUE : FALSE;
+#else
+	bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+	bool prev_stage2 = (regs->mstatus & MSTATUS_MTL) ? TRUE : FALSE;
+#endif
+	/* By default, we redirect to HS-mode */
+	bool next_virt = FALSE;
 
 	/* Sanity check on previous mode */
 	prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_ENOTSUPP;
 
-	/* Update S-mode exception info */
-	csr_write(CSR_STVAL, tval);
-	csr_write(CSR_SEPC, epc);
-	csr_write(CSR_SCAUSE, cause);
+	/* For certain exceptions from VS/VU-mode we redirect to VS-mode */
+	if (misa_extension('H') && prev_virt && !prev_stage2) {
+		switch (cause) {
+		case CAUSE_FETCH_PAGE_FAULT:
+		case CAUSE_LOAD_PAGE_FAULT:
+		case CAUSE_STORE_PAGE_FAULT:
+			next_virt = TRUE;
+			break;
+		default:
+			break;
+		};
+	}
+
+	/* Update MSTATUS MPV and MTL bits */
+#if __riscv_xlen == 32
+	regs->mstatusH &= ~MSTATUSH_MPV;
+	regs->mstatusH |= (next_virt) ? MSTATUSH_MPV : 0UL;
+	regs->mstatusH &= ~MSTATUSH_MTL;
+#else
+	regs->mstatus &= ~MSTATUS_MPV;
+	regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL;
+	regs->mstatus &= ~MSTATUS_MTL;
+#endif
+
+	/* Update HSTATUS for VS/VU-mode to HS-mode transition */
+	if (misa_extension('H') && prev_virt && !next_virt) {
+		/* Update HSTATUS SP2P, SP2V, SPV, and STL bits */
+		hstatus = csr_read(CSR_HSTATUS);
+		hstatus &= ~HSTATUS_SP2P;
+		hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SP2P : 0;
+		hstatus &= ~HSTATUS_SP2V;
+		hstatus |= (hstatus & HSTATUS_SPV) ? HSTATUS_SP2V : 0;
+		hstatus &= ~HSTATUS_SPV;
+		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
+		hstatus &= ~HSTATUS_STL;
+		hstatus |= (prev_stage2) ? HSTATUS_STL : 0;
+		csr_write(CSR_HSTATUS, hstatus);
+	}
 
-	/* Set MEPC to S-mode exception vector base */
-	regs->mepc = csr_read(CSR_STVEC);
+	/* Update exception related CSRs */
+	if (next_virt) {
+		/* Update VS-mode exception info */
+		csr_write(CSR_VSTVAL, tval);
+		csr_write(CSR_VSEPC, epc);
+		csr_write(CSR_VSCAUSE, cause);
 
-	/* Initial value of new MSTATUS */
-	new_mstatus = regs->mstatus;
+		/* Set MEPC to VS-mode exception vector base */
+		regs->mepc = csr_read(CSR_VSTVEC);
 
-	/* Clear MPP, SPP, SPIE, and SIE */
-	new_mstatus &=
-		~(MSTATUS_MPP | MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE);
+		/* Set MPP to VS-mode */
+		regs->mstatus &= ~MSTATUS_MPP;
+		regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
 
-	/* Set SPP */
-	if (prev_mode == PRV_S)
-		new_mstatus |= (1UL << MSTATUS_SPP_SHIFT);
+		/* Get VS-mode SSTATUS CSR */
+		vsstatus = csr_read(CSR_VSSTATUS);
 
-	/* Set SPIE */
-	if (regs->mstatus & MSTATUS_SIE)
-		new_mstatus |= (1UL << MSTATUS_SPIE_SHIFT);
+		/* Set SPP for VS-mode */
+		vsstatus &= ~SSTATUS_SPP;
+		if (prev_mode == PRV_S)
+			vsstatus |= (1UL << SSTATUS_SPP_SHIFT);
 
-	/* Set MPP */
-	new_mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
+		/* Set SPIE for VS-mode */
+		vsstatus &= ~SSTATUS_SPIE;
+		if (vsstatus & SSTATUS_SIE)
+			vsstatus |= (1UL << SSTATUS_SPIE_SHIFT);
 
-	/* Set new value in MSTATUS */
-	regs->mstatus = new_mstatus;
+		/* Clear SIE for VS-mode */
+		vsstatus &= ~SSTATUS_SIE;
+
+		/* Update VS-mode SSTATUS CSR */
+		csr_write(CSR_VSSTATUS, vsstatus);
+	} else {
+		/* Update S-mode exception info */
+		csr_write(CSR_STVAL, tval);
+		csr_write(CSR_SEPC, epc);
+		csr_write(CSR_SCAUSE, cause);
+
+		/* Set MEPC to S-mode exception vector base */
+		regs->mepc = csr_read(CSR_STVEC);
+
+		/* Set MPP to S-mode */
+		regs->mstatus &= ~MSTATUS_MPP;
+		regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
+
+		/* Set SPP for S-mode*/
+		regs->mstatus &= ~MSTATUS_SPP;
+		if (prev_mode == PRV_S)
+			regs->mstatus |= (1UL << MSTATUS_SPP_SHIFT);
+
+		/* Set SPIE for S-mode */
+		regs->mstatus &= ~MSTATUS_SPIE;
+		if (regs->mstatus & MSTATUS_SIE)
+			regs->mstatus |= (1UL << MSTATUS_SPIE_SHIFT);
+
+		/* Clear SIE for S-mode */
+		regs->mstatus &= ~MSTATUS_SIE;
+	}
 
 	return 0;
 }
@@ -195,7 +273,8 @@ void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
-		rc = sbi_trap_redirect(regs, scratch, regs->mepc, mcause, mtval);
+		rc = sbi_trap_redirect(regs, scratch, regs->mepc,
+				       mcause, mtval);
 		break;
 	};
 

From a14e7ee82c2723f18cf2d1c7f1a88d88766a6018 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 5 Apr 2019 18:17:11 +0530
Subject: [PATCH 0324/1765] lib: Redirect WFI trapped from VS/VU mode to
 HS-mode

The WFI will trap as illegal instruction trap when executed
in VS/VU mode so we just forward/redirect it to HS-mode so
that hypervisor can deal with it appropriately.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h |  3 +++
 lib/sbi/sbi_illegal_insn.c   | 20 +++++++++++++++++---
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 0e1ea59c2fc..5aab9d26e6e 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -544,6 +544,9 @@
 #define INSN_MATCH_C_FSWSP		0xe002
 #define INSN_MASK_C_FSWSP		0xe003
 
+#define INSN_MASK_WFI			0xffffff00
+#define INSN_MATCH_WFI			0x10500000
+
 #define INSN_LEN(insn)			((((insn) & 0x3) < 0x3) ? 2 : 4)
 
 #if __riscv_xlen == 64
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index b6ba4b0566f..7ea42f7133e 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -36,9 +36,23 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 	int csr_num   = (u32)insn >> 20;
 	ulong csr_val, new_csr_val;
 
-	if (sbi_emulate_csr_read(csr_num, hartid, regs->mstatus, scratch,
-				 &csr_val))
-		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
+	/*
+	 * WFI always traps as illegal instruction when executed from
+	 * VS/VU mode so we just forward it to HS-mode.
+	 */
+#if __riscv_xlen == 32
+	if ((regs->mstatusH & MSTATUSH_MPV) &&
+#else
+	if ((regs->mstatus & MSTATUS_MPV) &&
+#endif
+	    (insn & INSN_MASK_WFI) == INSN_MATCH_WFI)
+		return sbi_trap_redirect(regs, scratch,
+					 regs->mepc, mcause, insn);
+
+	if (sbi_emulate_csr_read(csr_num, hartid, regs->mstatus,
+				 scratch, &csr_val))
+		return truly_illegal_insn(insn, hartid, mcause,
+					  regs, scratch);
 
 	do_write = rs1_num;
 	switch (GET_RM(insn)) {

From 7d4420bd6929ef3f2c761c262dbc3f7f2ae150c2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 17 Aug 2019 20:54:40 +0530
Subject: [PATCH 0325/1765] include: Extend get_insn() to read instruction from
 VS/VU mode

Current implementation of get_insn() is not suitable for reading
instruction from VS/VU mode because we have to set SSTATUS_MXR bit
in VSSTATUS CSR for reading instruction from VS/VU mode.

This patch extends get_insn() to read instruction from VS/VU mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/riscv_unpriv.h    |  2 +-
 lib/sbi/riscv_unpriv.c        | 50 +++++++++++++++++++----------------
 lib/sbi/sbi_illegal_insn.c    |  9 +++++--
 lib/sbi/sbi_misaligned_ldst.c | 14 ++++++++--
 4 files changed, 47 insertions(+), 28 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index ebd0fe370eb..fce49bcb7d7 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -43,7 +43,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
 
-ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
+ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 	       struct unpriv_trap *trap);
 
 #endif
diff --git a/lib/sbi/riscv_unpriv.c b/lib/sbi/riscv_unpriv.c
index ac0e03a77c2..ef70e3af31a 100644
--- a/lib/sbi/riscv_unpriv.c
+++ b/lib/sbi/riscv_unpriv.c
@@ -97,20 +97,22 @@ void store_u64(u64 *addr, u64 val,
 }
 #endif
 
-ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
+ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 	       struct unpriv_trap *trap)
 {
-	ulong __mstatus = 0, val = 0;
+	ulong __mstatus = 0, __vsstatus = 0, val = 0;
 #ifdef __riscv_compressed
 	ulong rvc_mask = 3, tmp;
 #endif
 
-	if (trap) {
-		trap->ilen = 4;
-		trap->cause = 0;
-		trap->tval = 0;
-		sbi_hart_set_trap_info(scratch, trap);
-	}
+	trap->ilen = 4;
+	trap->cause = 0;
+	trap->tval = 0;
+	sbi_hart_set_trap_info(scratch, trap);
+
+	if (virt)
+		__vsstatus = csr_read_set(CSR_VSSTATUS, SSTATUS_MXR);
+
 #ifndef __riscv_compressed
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
 #if __riscv_xlen == 64
@@ -134,21 +136,23 @@ ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
 	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc),
 	      [rvc_mask] "r"(rvc_mask));
 #endif
-	if (trap) {
-		sbi_hart_set_trap_info(scratch, NULL);
-		switch (trap->cause) {
-		case CAUSE_LOAD_ACCESS:
-			trap->cause = CAUSE_FETCH_ACCESS;
-			trap->tval = mepc;
-			break;
-		case CAUSE_LOAD_PAGE_FAULT:
-			trap->cause = CAUSE_FETCH_PAGE_FAULT;
-			trap->tval = mepc;
-			break;
-		default:
-			break;
-		};
-	}
+
+	if (virt)
+		csr_write(CSR_VSSTATUS, __vsstatus);
+
+	sbi_hart_set_trap_info(scratch, NULL);
+	switch (trap->cause) {
+	case CAUSE_LOAD_ACCESS:
+		trap->cause = CAUSE_FETCH_ACCESS;
+		trap->tval = mepc;
+		break;
+	case CAUSE_LOAD_PAGE_FAULT:
+		trap->cause = CAUSE_FETCH_PAGE_FAULT;
+		trap->tval = mepc;
+		break;
+	default:
+		break;
+	};
 
 	return val;
 }
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 7ea42f7133e..e75c13c6a83 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -130,12 +130,17 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			     struct sbi_trap_regs *regs,
 			     struct sbi_scratch *scratch)
 {
-	ulong insn = csr_read(mbadaddr);
+	ulong insn = csr_read(CSR_MTVAL);
+#if __riscv_xlen == 32
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+#else
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+#endif
 	struct unpriv_trap uptrap;
 
 	if (unlikely((insn & 3) != 3)) {
 		if (insn == 0) {
-			insn = get_insn(regs->mepc, scratch, &uptrap);
+			insn = get_insn(regs->mepc, virt, scratch, &uptrap);
 			if (uptrap.cause)
 				return sbi_trap_redirect(regs, scratch,
 					regs->mepc, uptrap.cause, uptrap.tval);
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index e0f10bc67d2..10c467c4fb4 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -27,9 +27,14 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 {
 	union reg_data val;
 	struct unpriv_trap uptrap;
-	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
+#if __riscv_xlen == 32
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+#else
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+#endif
+	ulong insn = get_insn(regs->mepc, virt, scratch, &uptrap);
 
 	if (uptrap.cause)
 		return sbi_trap_redirect(regs, scratch, regs->mepc,
@@ -129,9 +134,14 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 {
 	union reg_data val;
 	struct unpriv_trap uptrap;
-	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
+#if __riscv_xlen == 32
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+#else
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+#endif
+	ulong insn = get_insn(regs->mepc, virt, scratch, &uptrap);
 
 	if (uptrap.cause)
 		return sbi_trap_redirect(regs, scratch, regs->mepc,

From 1e9f88889f8b7c66dd229299715eed87e734aafa Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 18 Aug 2019 13:14:44 +0530
Subject: [PATCH 0326/1765] lib: Emulate HTIMEDELTA CSR for platforms not
 having TIME CSR

For platforms not having TIME CSR, we trap-n-emulate TIME CSR
read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR
as well so we trap-n-emulate HTIMEDELTA CSR for platforms not
having TIME CSR.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h  |  4 +-
 include/sbi/sbi_emulate_csr.h |  5 ++-
 include/sbi/sbi_timer.h       |  8 ++++
 lib/sbi/sbi_emulate_csr.c     | 70 +++++++++++++++++++++++++++++------
 lib/sbi/sbi_illegal_insn.c    |  5 +--
 lib/sbi/sbi_timer.c           | 47 +++++++++++++++++++++++
 6 files changed, 122 insertions(+), 17 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 5aab9d26e6e..902c81af842 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -276,7 +276,9 @@
 #define CSR_HSTATUS			0x600
 #define CSR_HEDELEG			0x602
 #define CSR_HIDELEG			0x603
-#define CSR_HCOUNTERNEN		0x606
+#define CSR_HTIMEDELTA			0x605
+#define CSR_HTIMEDELTAH			0x615
+#define CSR_HCOUNTERNEN			0x606
 #define CSR_HGATP			0x680
 
 #define CSR_VSSTATUS			0x200
diff --git a/include/sbi/sbi_emulate_csr.h b/include/sbi/sbi_emulate_csr.h
index 5d1755f2759..fe357e50255 100644
--- a/include/sbi/sbi_emulate_csr.h
+++ b/include/sbi/sbi_emulate_csr.h
@@ -12,12 +12,13 @@
 
 #include <sbi/sbi_types.h>
 
+struct sbi_trap_regs;
 struct sbi_scratch;
 
-int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
+int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 			 struct sbi_scratch *scratch, ulong *csr_val);
 
-int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
+int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 			  struct sbi_scratch *scratch, ulong csr_val);
 
 #endif
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index e40cce9d821..c14c8d0d3cc 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -16,6 +16,14 @@ struct sbi_scratch;
 
 u64 sbi_timer_value(struct sbi_scratch *scratch);
 
+u64 sbi_timer_virt_value(struct sbi_scratch *scratch);
+
+u64 sbi_timer_get_delta(struct sbi_scratch *scratch);
+
+void sbi_timer_set_delta(struct sbi_scratch *scratch, ulong delta);
+
+void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper);
+
 void sbi_timer_event_stop(struct sbi_scratch *scratch);
 
 void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event);
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 791890f4fa4..0901ec103eb 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -14,16 +14,30 @@
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_timer.h>
+#include <sbi/sbi_trap.h>
 
-int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
+int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 			 struct sbi_scratch *scratch, ulong *csr_val)
 {
+	int ret = 0;
 	ulong cen = -1UL;
+	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+#if __riscv_xlen == 32
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+#else
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+#endif
 
-	if (EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U)
+	if (prev_mode == PRV_U)
 		cen = csr_read(CSR_SCOUNTEREN);
 
 	switch (csr_num) {
+	case CSR_HTIMEDELTA:
+		if (prev_mode == PRV_S && !virt)
+			*csr_val = sbi_timer_get_delta(scratch);
+		else
+			ret = SBI_ENOTSUPP;
+		break;
 	case CSR_CYCLE:
 		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
 			return -1;
@@ -32,7 +46,8 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
 	case CSR_TIME:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = sbi_timer_value(scratch);
+		*csr_val = (virt) ? sbi_timer_virt_value(scratch):
+				    sbi_timer_value(scratch);
 		break;
 	case CSR_INSTRET:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
@@ -50,6 +65,12 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
 		*csr_val = csr_read(CSR_MHPMCOUNTER4);
 		break;
 #if __riscv_xlen == 32
+	case CSR_HTIMEDELTAH:
+		if (prev_mode == PRV_S && !virt)
+			*csr_val = sbi_timer_get_delta(scratch) >> 32;
+		else
+			ret = SBI_ENOTSUPP;
+		break;
 	case CSR_CYCLEH:
 		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
 			return -1;
@@ -58,7 +79,8 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
 	case CSR_TIMEH:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = sbi_timer_value(scratch) >> 32;
+		*csr_val = (virt) ? sbi_timer_virt_value(scratch) >> 32:
+				    sbi_timer_value(scratch) >> 32;
 		break;
 	case CSR_INSTRETH:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
@@ -83,18 +105,35 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, ulong mstatus,
 		*csr_val = csr_read(CSR_MHPMEVENT4);
 		break;
 	default:
+		ret = SBI_ENOTSUPP;
+		break;
+	};
+
+	if (ret)
 		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, hartid, csr_num);
-		return SBI_ENOTSUPP;
-	};
 
-	return 0;
+	return ret;
 }
 
-int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
+int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 			  struct sbi_scratch *scratch, ulong csr_val)
 {
+	int ret = 0;
+	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+#if __riscv_xlen == 32
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+#else
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+#endif
+
 	switch (csr_num) {
+	case CSR_HTIMEDELTA:
+		if (prev_mode == PRV_S && !virt)
+			sbi_timer_set_delta(scratch, csr_val);
+		else
+			ret = SBI_ENOTSUPP;
+		break;
 	case CSR_CYCLE:
 		csr_write(CSR_MCYCLE, csr_val);
 		break;
@@ -108,6 +147,12 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
 		csr_write(CSR_MHPMCOUNTER4, csr_val);
 		break;
 #if __riscv_xlen == 32
+	case CSR_HTIMEDELTAH:
+		if (prev_mode == PRV_S && !virt)
+			sbi_timer_set_delta_upper(scratch, csr_val);
+		else
+			ret = SBI_ENOTSUPP;
+		break;
 	case CSR_CYCLEH:
 		csr_write(CSR_MCYCLEH, csr_val);
 		break;
@@ -128,10 +173,13 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, ulong mstatus,
 		csr_write(CSR_MHPMEVENT4, csr_val);
 		break;
 	default:
+		ret = SBI_ENOTSUPP;
+		break;
+	};
+
+	if (ret)
 		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, hartid, csr_num);
-		return SBI_ENOTSUPP;
-	};
 
-	return 0;
+	return ret;
 }
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index e75c13c6a83..d15986aeef6 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -49,8 +49,7 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 		return sbi_trap_redirect(regs, scratch,
 					 regs->mepc, mcause, insn);
 
-	if (sbi_emulate_csr_read(csr_num, hartid, regs->mstatus,
-				 scratch, &csr_val))
+	if (sbi_emulate_csr_read(csr_num, hartid, regs, scratch, &csr_val))
 		return truly_illegal_insn(insn, hartid, mcause,
 					  regs, scratch);
 
@@ -80,7 +79,7 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 	};
 
-	if (do_write && sbi_emulate_csr_write(csr_num, hartid, regs->mstatus,
+	if (do_write && sbi_emulate_csr_write(csr_num, hartid, regs,
 					      scratch, new_csr_val))
 		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index c58441d72b0..1ba386f0442 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -9,9 +9,12 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_timer.h>
 
+static unsigned long time_delta_off;
+
 #if __riscv_xlen == 32
 u64 get_ticks(void)
 {
@@ -44,6 +47,35 @@ u64 sbi_timer_value(struct sbi_scratch *scratch)
 		return get_ticks();
 }
 
+u64 sbi_timer_virt_value(struct sbi_scratch *scratch)
+{
+	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+
+	return sbi_timer_value(scratch) + *time_delta;
+}
+
+u64 sbi_timer_get_delta(struct sbi_scratch *scratch)
+{
+	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+
+	return *time_delta;
+}
+
+void sbi_timer_set_delta(struct sbi_scratch *scratch, ulong delta)
+{
+	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+
+	*time_delta = (u64)delta;
+}
+
+void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper)
+{
+	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+
+	*time_delta &= 0xffffffffULL;
+	*time_delta |= ((u64)delta_upper << 32);
+}
+
 void sbi_timer_event_stop(struct sbi_scratch *scratch)
 {
 	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
@@ -64,5 +96,20 @@ void sbi_timer_process(struct sbi_scratch *scratch)
 
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	u64 *time_delta;
+
+	if (cold_boot) {
+		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta),
+							  "TIME_DELTA");
+		if (!time_delta_off)
+			return SBI_ENOMEM;
+	} else {
+		if (!time_delta_off)
+			return SBI_ENOMEM;
+	}
+
+	time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+	*time_delta = 0;
+
 	return sbi_platform_timer_init(sbi_platform_ptr(scratch), cold_boot);
 }

From 2c7bab76a2eb2366026e0482b18679fe94c1dac6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 26 Sep 2019 09:33:46 +0530
Subject: [PATCH 0327/1765] Makefile: Minor fix in OPENSBI_VERSION_GIT

Currently, if someone has forked OpenSBI repo quite sometime back
and this fork is not having updated tags from upstream riscv/opensbi
repo then "git describe" command can fail. To tackle this, we redirect
error output of "git describe" to /dev/null.

Signed-off-by: Anup Patel <anup.pate@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 9784598f136..9aff0703d05 100644
--- a/Makefile
+++ b/Makefile
@@ -65,7 +65,7 @@ export firmware_dir=$(CURDIR)/firmware
 # Find library version
 OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
 OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
-OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe; fi)
+OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe 2> /dev/null; fi)
 
 # Setup compilation commands
 ifdef CROSS_COMPILE

From e561c6303639ed510183da25d3d54555a53371c9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 26 Sep 2019 09:55:25 +0530
Subject: [PATCH 0328/1765] lib: Fix coldboot race condition observed on
 emulators/simulators

If we are running on RISC-V emulator/simulator with large number of
HARTs where each HART is a regular thread under UNIX host then it is
possible that some of the secondary HARTs don't get chance to run and
sbi_hart_wake_coldboot_harts() is called before secondary HARTs call
sbi_hart_wait_for_coldboot(). In this situation, some of the secondary
HARTs will never come-out of coldboot wait loop.

To tackle this, we introduce a global flag coldboot_done which will
be protected by coldboot lock and it will be set by primary HART from
sbi_hart_wake_coldboot_harts() before waking-up secondary HARTs. We
also re-arrange acquire/release of coldboot lock to reduce further
chances of race-condition.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Nylon Chen<nylon7@andestech.com>
---
 lib/sbi/sbi_hart.c | 44 +++++++++++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 15 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b0c087a5798..dee2e21673d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -344,12 +344,12 @@ struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 }
 
 #define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
-static spinlock_t coldboot_wait_bitmap_lock = SPIN_LOCK_INITIALIZER;
-static unsigned long coldboot_wait_bitmap   = 0;
+static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
+static unsigned long coldboot_done = 0;
+static unsigned long coldboot_wait_bitmap = 0;
 
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
-	unsigned long mipval;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
@@ -359,19 +359,26 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Set MSIE bit to receive IPI */
 	csr_set(CSR_MIE, MIP_MSIP);
 
-	do {
-		spin_lock(&coldboot_wait_bitmap_lock);
-		coldboot_wait_bitmap |= (1UL << hartid);
-		spin_unlock(&coldboot_wait_bitmap_lock);
+	/* Acquire coldboot lock */
+	spin_lock(&coldboot_lock);
 
+	/* Mark current HART as waiting */
+	coldboot_wait_bitmap |= (1UL << hartid);
+
+	/* Wait for coldboot to finish using WFI */
+	while (!coldboot_done) {
+		spin_unlock(&coldboot_lock);
 		wfi();
-		mipval = csr_read(CSR_MIP);
+		spin_lock(&coldboot_lock);
+	};
+
+	/* Unmark current HART as waiting */
+	coldboot_wait_bitmap &= ~(1UL << hartid);
 
-		spin_lock(&coldboot_wait_bitmap_lock);
-		coldboot_wait_bitmap &= ~(1UL << hartid);
-		spin_unlock(&coldboot_wait_bitmap_lock);
-	} while (!(mipval & MIP_MSIP));
+	/* Release coldboot lock */
+	spin_unlock(&coldboot_lock);
 
+	/* Clear current HART IPI */
 	sbi_platform_ipi_clear(plat, hartid);
 }
 
@@ -380,11 +387,18 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	int max_hart			= sbi_platform_hart_count(plat);
 
+	/* Acquire coldboot lock */
+	spin_lock(&coldboot_lock);
+
+	/* Mark coldboot done */
+	coldboot_done = 1;
+
+	/* Send an IPI to all HARTs waiting for coldboot */
 	for (int i = 0; i < max_hart; i++) {
-		/* send an IPI to every other hart */
-		spin_lock(&coldboot_wait_bitmap_lock);
 		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
 			sbi_platform_ipi_send(plat, i);
-		spin_unlock(&coldboot_wait_bitmap_lock);
 	}
+
+	/* Release coldboot lock */
+	spin_unlock(&coldboot_lock);
 }

From 8925e3865cf7317cae40a061ad2a3555b7ae27bf Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:35 -0700
Subject: [PATCH 0329/1765] Test: Move test payload related code out of
 interface header

Test payload uses an SBI call and uses the macros defined in interface
header which is not the correct place to have these definitions.
The interface header file should be used to keep SBI specification
related macros.

Keep all the test payload related code in test itself.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/payloads/test_main.c     | 25 +++++++++++++++++++++++++
 include/sbi/sbi_ecall_interface.h | 25 -------------------------
 2 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index 04a5be5cc9e..eba5e4d2785 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -9,6 +9,31 @@
 
 #include <sbi/sbi_ecall_interface.h>
 
+#define SBI_ECALL(__num, __a0, __a1, __a2)                                    \
+	({                                                                    \
+		register unsigned long a0 asm("a0") = (unsigned long)(__a0);  \
+		register unsigned long a1 asm("a1") = (unsigned long)(__a1);  \
+		register unsigned long a2 asm("a2") = (unsigned long)(__a2);  \
+		register unsigned long a7 asm("a7") = (unsigned long)(__num); \
+		asm volatile("ecall"                                          \
+			     : "+r"(a0)                                       \
+			     : "r"(a1), "r"(a2), "r"(a7)                      \
+			     : "memory");                                     \
+		a0;                                                           \
+	})
+
+#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0)
+#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0)
+#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0)
+
+#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c))
+
+static inline void sbi_ecall_console_puts(const char *str)
+{
+	while (str && *str)
+		sbi_ecall_console_putc(*str++);
+}
+
 #define wfi()                                             \
 	do {                                              \
 		__asm__ __volatile__("wfi" ::: "memory"); \
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 6c122722d2a..0d8e5ead6ef 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -24,29 +24,4 @@
 
 /* clang-format on */
 
-#define SBI_ECALL(__num, __a0, __a1, __a2)                                    \
-	({                                                                    \
-		register unsigned long a0 asm("a0") = (unsigned long)(__a0);  \
-		register unsigned long a1 asm("a1") = (unsigned long)(__a1);  \
-		register unsigned long a2 asm("a2") = (unsigned long)(__a2);  \
-		register unsigned long a7 asm("a7") = (unsigned long)(__num); \
-		asm volatile("ecall"                                          \
-			     : "+r"(a0)                                       \
-			     : "r"(a1), "r"(a2), "r"(a7)                      \
-			     : "memory");                                     \
-		a0;                                                           \
-	})
-
-#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0)
-#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0)
-#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0)
-
-#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c));
-
-static inline void sbi_ecall_console_puts(const char *str)
-{
-	while (str && *str)
-		sbi_ecall_console_putc(*str++);
-}
-
 #endif

From 3d335bc54b453dd69b269c8841657876fb48f15f Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:36 -0700
Subject: [PATCH 0330/1765] lib: Align error codes as per SBI specification.

Follow the SBI specification for error codes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_error.h | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 3ad78dbb991..4b7dd12f3c1 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -13,11 +13,11 @@
 /* clang-format off */
 
 #define SBI_OK		0
-#define SBI_EUNKNOWN	-1
-#define SBI_EFAIL	-2
+#define SBI_EFAIL	-1
+#define SBI_ENOTSUPP	-2
 #define SBI_EINVAL	-3
-#define SBI_ENOENT	-4
-#define SBI_ENOTSUPP	-5
+#define SBI_DENIED	-4
+#define SBI_INVALID_ADDR -5
 #define SBI_ENODEV	-6
 #define SBI_ENOSYS	-7
 #define SBI_ETIMEDOUT	-8
@@ -26,6 +26,8 @@
 #define SBI_ENOSPC	-11
 #define SBI_ENOMEM	-12
 #define SBI_ETRAP	-13
+#define SBI_EUNKNOWN	-14
+#define SBI_ENOENT	-15
 
 /* clang-format on */
 

From 26aec6afed528518dbd633a6e0d951b7646d95c5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:37 -0700
Subject: [PATCH 0331/1765] lib: Rename existing SBI implementation as 0.1.

Current SBI implementation is now considered as version 0.1 and will be
removed/replaced with newer extension/functions in future.

Rename the existing implementations accordingly to be in sync with the
specification.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
---
 firmware/payloads/test_main.c     |  2 +-
 include/sbi/sbi_ecall_interface.h | 20 ++++++------
 lib/sbi/sbi_ecall.c               | 54 ++++++++++++++++++++-----------
 3 files changed, 48 insertions(+), 28 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index eba5e4d2785..0d659302384 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -26,7 +26,7 @@
 #define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0)
 #define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0)
 
-#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_ECALL_CONSOLE_PUTCHAR, (c))
+#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, (c))
 
 static inline void sbi_ecall_console_puts(const char *str)
 {
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 0d8e5ead6ef..a7564d69f2c 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -12,15 +12,17 @@
 
 /* clang-format off */
 
-#define SBI_ECALL_SET_TIMER			0
-#define SBI_ECALL_CONSOLE_PUTCHAR		1
-#define SBI_ECALL_CONSOLE_GETCHAR		2
-#define SBI_ECALL_CLEAR_IPI			3
-#define SBI_ECALL_SEND_IPI			4
-#define SBI_ECALL_REMOTE_FENCE_I		5
-#define SBI_ECALL_REMOTE_SFENCE_VMA		6
-#define SBI_ECALL_REMOTE_SFENCE_VMA_ASID	7
-#define SBI_ECALL_SHUTDOWN			8
+enum sbi_ext_id {
+	SBI_EXT_0_1_SET_TIMER = 0x0,
+	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
+	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
+	SBI_EXT_0_1_CLEAR_IPI = 0x3,
+	SBI_EXT_0_1_SEND_IPI = 0x4,
+	SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
+	SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
+	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
+	SBI_EXT_0_1_SHUTDOWN = 0x8,
+};
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index c6ec76ed870..311c4cf2387 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -31,16 +31,16 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
-int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch)
+int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
+			     struct sbi_scratch *scratch,
+			     struct unpriv_trap *uptrap)
 {
 	int ret = SBI_ENOTSUPP;
-	struct unpriv_trap uptrap;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
 
 	switch (regs->a7) {
-	case SBI_ECALL_SET_TIMER:
+	case SBI_EXT_0_1_SET_TIMER:
 #if __riscv_xlen == 32
 		sbi_timer_event_start(scratch,
 				      (((u64)regs->a1 << 32) | (u64)regs->a0));
@@ -49,60 +49,78 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 #endif
 		ret = 0;
 		break;
-	case SBI_ECALL_CONSOLE_PUTCHAR:
+	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
 		sbi_putc(regs->a0);
 		ret = 0;
 		break;
-	case SBI_ECALL_CONSOLE_GETCHAR:
+	case SBI_EXT_0_1_CONSOLE_GETCHAR:
 		regs->a0 = sbi_getc();
 		ret	 = 0;
 		break;
-	case SBI_ECALL_CLEAR_IPI:
+	case SBI_EXT_0_1_CLEAR_IPI:
 		sbi_ipi_clear_smode(scratch);
 		ret = 0;
 		break;
-	case SBI_ECALL_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
+	case SBI_EXT_0_1_SEND_IPI:
+		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SOFT, NULL);
 		break;
-	case SBI_ECALL_REMOTE_FENCE_I:
+	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		tlb_info.start  = 0;
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_FENCE_I, &tlb_info);
 		break;
-	case SBI_ECALL_REMOTE_SFENCE_VMA:
+	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)regs->a1;
 		tlb_info.size  = (unsigned long)regs->a2;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
 		break;
-	case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
+	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)regs->a1;
 		tlb_info.size  = (unsigned long)regs->a2;
 		tlb_info.asid  = (unsigned long)regs->a3;
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
 					SBI_IPI_EVENT_SFENCE_VMA_ASID,
 					&tlb_info);
 		break;
-	case SBI_ECALL_SHUTDOWN:
+	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
 		ret = 0;
 		break;
 	default:
 		regs->a0 = SBI_ENOTSUPP;
-		ret	 = 0;
-		break;
+		ret = 0;
 	};
 
+	return ret;
+
+}
+
+int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
+		      struct sbi_scratch *scratch)
+{
+	int ret = SBI_ENOTSUPP;
+	struct unpriv_trap uptrap;
+	u32 extension_id = regs->a7;
+
+	if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
+	    extension_id <= SBI_EXT_0_1_SHUTDOWN) {
+		ret = sbi_ecall_0_1_handler(hartid, regs, scratch, &uptrap);
+	} else {
+		regs->a0 = SBI_ENOTSUPP;
+		ret	 = 0;
+	}
+
 	if (!ret) {
 		regs->mepc += 4;
 	} else if (ret == SBI_ETRAP) {

From 848ed4f644097d1c9ba44bef3307fa2538c84bd4 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:38 -0700
Subject: [PATCH 0332/1765] lib: Remove redundant variable assignment

An ecall handler should only return error if valid SBI function
fails. Otherwise, it should succeed with appropriate error in a0.

Get rid of unnecessary setting of the temporary return variable to
zero for the cases where errors are not expected.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 311c4cf2387..b8e444f48ff 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -35,7 +35,7 @@ int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
 			     struct sbi_scratch *scratch,
 			     struct unpriv_trap *uptrap)
 {
-	int ret = SBI_ENOTSUPP;
+	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
 
@@ -47,19 +47,15 @@ int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
 #else
 		sbi_timer_event_start(scratch, (u64)regs->a0);
 #endif
-		ret = 0;
 		break;
 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
 		sbi_putc(regs->a0);
-		ret = 0;
 		break;
 	case SBI_EXT_0_1_CONSOLE_GETCHAR:
 		regs->a0 = sbi_getc();
-		ret	 = 0;
 		break;
 	case SBI_EXT_0_1_CLEAR_IPI:
 		sbi_ipi_clear_smode(scratch);
-		ret = 0;
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
 		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
@@ -95,21 +91,18 @@ int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
-		ret = 0;
 		break;
 	default:
 		regs->a0 = SBI_ENOTSUPP;
-		ret = 0;
 	};
 
 	return ret;
-
 }
 
 int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
-	int ret = SBI_ENOTSUPP;
+	int ret = 0;
 	struct unpriv_trap uptrap;
 	u32 extension_id = regs->a7;
 
@@ -118,7 +111,6 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		ret = sbi_ecall_0_1_handler(hartid, regs, scratch, &uptrap);
 	} else {
 		regs->a0 = SBI_ENOTSUPP;
-		ret	 = 0;
 	}
 
 	if (!ret) {

From 0790be0f2c932f66ab0717661f9adb919c1b01e8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:39 -0700
Subject: [PATCH 0333/1765] lib: Implement SBI v0.2

SBI v0.2 introduces a base specification which is mandatory to
implement for any SBI implementations that is not legacy.

Add support for the base extension.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h |  14 +++
 lib/sbi/sbi_ecall.c               | 156 ++++++++++++++++++++++++------
 2 files changed, 139 insertions(+), 31 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index a7564d69f2c..cfdf9e1f845 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -22,8 +22,22 @@ enum sbi_ext_id {
 	SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
 	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
 	SBI_EXT_0_1_SHUTDOWN = 0x8,
+	SBI_EXT_BASE = 0x10,
 };
 
+enum sbi_ext_base_fid {
+	SBI_EXT_BASE_GET_SPEC_VERSION = 0,
+	SBI_EXT_BASE_GET_IMP_ID,
+	SBI_EXT_BASE_GET_IMP_VERSION,
+	SBI_EXT_BASE_PROBE_EXT,
+	SBI_EXT_BASE_GET_MVENDORID,
+	SBI_EXT_BASE_GET_MARCHID,
+	SBI_EXT_BASE_GET_MIMPID,
+};
+
+#define SBI_SPEC_VERSION_MAJOR_OFFSET	24
+#define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
+#define SBI_SPEC_VERSION_MINOR_MASK	0xffffff
 /* clang-format on */
 
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index b8e444f48ff..0a934e90906 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -17,9 +17,12 @@
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_version.h>
+#include <sbi/riscv_asm.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
-#define SBI_ECALL_VERSION_MINOR 1
+#define SBI_ECALL_VERSION_MINOR 2
+#define SBI_OPENSBI_IMPID 1
 
 u16 sbi_ecall_version_major(void)
 {
@@ -31,34 +34,95 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
-int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
-			     struct sbi_scratch *scratch,
-			     struct unpriv_trap *uptrap)
+int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
+			unsigned long *out_val)
+{
+	/**
+	 * Each extension apart from base & 0.1, will be implemented as
+	 * platform specific feature. Thus, extension probing can be achieved
+	 * by checking the feature bits of the platform. We can create a map
+	 * between extension ID & feature and use a generic function to check
+	 * or just use a switch case for every new extension support added
+	 * TODO: Implement it.
+	 */
+
+	if ((extid >= SBI_EXT_0_1_SET_TIMER &&
+	    extid <= SBI_EXT_0_1_SHUTDOWN) || (extid == SBI_EXT_BASE))
+		*out_val = 1;
+	else
+		*out_val = 0;
+
+	return 0;
+}
+
+int sbi_ecall_base_handler(struct sbi_scratch *scratch, unsigned long extid,
+			   unsigned long funcid, unsigned long *args,
+			   unsigned long *out_val, unsigned long *out_tcause,
+			   unsigned long *out_tval)
+{
+	int ret = 0;
+
+	switch (funcid) {
+	case SBI_EXT_BASE_GET_SPEC_VERSION:
+		*out_val = (SBI_ECALL_VERSION_MAJOR <<
+			   SBI_SPEC_VERSION_MAJOR_OFFSET) &
+			   (SBI_SPEC_VERSION_MAJOR_MASK <<
+			    SBI_SPEC_VERSION_MAJOR_OFFSET);
+		*out_val = *out_val | SBI_ECALL_VERSION_MINOR;
+		break;
+	case SBI_EXT_BASE_GET_IMP_ID:
+		*out_val = SBI_OPENSBI_IMPID;
+		break;
+	case SBI_EXT_BASE_GET_IMP_VERSION:
+		*out_val = OPENSBI_VERSION;
+		break;
+	case SBI_EXT_BASE_GET_MVENDORID:
+		*out_val = csr_read(CSR_MVENDORID);
+		break;
+	case SBI_EXT_BASE_GET_MARCHID:
+		*out_val = csr_read(CSR_MARCHID);
+		break;
+	case SBI_EXT_BASE_GET_MIMPID:
+		*out_val = csr_read(CSR_MIMPID);
+		break;
+	case SBI_EXT_BASE_PROBE_EXT:
+		ret = sbi_check_extension(scratch, args[0], out_val);
+	default:
+		ret = SBI_ENOTSUPP;
+	}
+
+	return ret;
+}
+
+int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
+			   unsigned long *args, unsigned long *tval,
+			   unsigned long *tcause)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
+	struct unpriv_trap uptrap = {0};
 
-	switch (regs->a7) {
+	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
 #if __riscv_xlen == 32
 		sbi_timer_event_start(scratch,
-				      (((u64)regs->a1 << 32) | (u64)regs->a0));
+				      (((u64)args[1] << 32) | (u64)args[0]));
 #else
-		sbi_timer_event_start(scratch, (u64)regs->a0);
+		sbi_timer_event_start(scratch, (u64)args[0]);
 #endif
 		break;
 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
-		sbi_putc(regs->a0);
+		sbi_putc(args[0]);
 		break;
 	case SBI_EXT_0_1_CONSOLE_GETCHAR:
-		regs->a0 = sbi_getc();
+		ret = sbi_getc();
 		break;
 	case SBI_EXT_0_1_CLEAR_IPI:
 		sbi_ipi_clear_smode(scratch);
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
 					SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
@@ -66,26 +130,26 @@ int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
 					SBI_IPI_EVENT_FENCE_I, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		tlb_info.start = (unsigned long)regs->a1;
-		tlb_info.size  = (unsigned long)regs->a2;
+		tlb_info.start = (unsigned long)args[1];
+		tlb_info.size  = (unsigned long)args[2];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		tlb_info.start = (unsigned long)regs->a1;
-		tlb_info.size  = (unsigned long)regs->a2;
-		tlb_info.asid  = (unsigned long)regs->a3;
+		tlb_info.start = (unsigned long)args[1];
+		tlb_info.size  = (unsigned long)args[2];
+		tlb_info.asid  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, uptrap, (ulong *)regs->a0,
+		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
 					SBI_IPI_EVENT_SFENCE_VMA_ASID,
 					&tlb_info);
 		break;
@@ -93,9 +157,13 @@ int sbi_ecall_0_1_handler(u32 hartid, struct sbi_trap_regs *regs,
 		sbi_system_shutdown(scratch, 0);
 		break;
 	default:
-		regs->a0 = SBI_ENOTSUPP;
+		ret = SBI_ENOTSUPP;
 	};
 
+	if (ret == SBI_ETRAP) {
+		*tcause = uptrap.cause;
+		*tval = uptrap.tval;
+	}
 	return ret;
 }
 
@@ -103,23 +171,49 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
 	int ret = 0;
-	struct unpriv_trap uptrap;
-	u32 extension_id = regs->a7;
+	unsigned long extension_id = regs->a7;
+	unsigned long func_id = regs->a6;
+	unsigned long out_val;
+	unsigned long out_tval;
+	unsigned long out_tcause;
+	bool is_0_1_spec = 0;
+	unsigned long args[6];
+
+	args[0] = regs->a0;
+	args[1] = regs->a1;
+	args[2] = regs->a2;
+	args[3] = regs->a3;
+	args[4] = regs->a4;
+	args[5] = regs->a5;
 
 	if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 	    extension_id <= SBI_EXT_0_1_SHUTDOWN) {
-		ret = sbi_ecall_0_1_handler(hartid, regs, scratch, &uptrap);
-	} else {
-		regs->a0 = SBI_ENOTSUPP;
-	}
+		ret = sbi_ecall_0_1_handler(scratch, extension_id, args,
+					    &out_tval, &out_tcause);
+		is_0_1_spec = 1;
+	} else if (extension_id == SBI_EXT_BASE)
+		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
+					     args, &out_val,
+					     &out_tval, &out_tcause);
+	else
+		ret = SBI_ENOTSUPP;
 
-	if (!ret) {
-		regs->mepc += 4;
-	} else if (ret == SBI_ETRAP) {
-		ret = 0;
+	if (ret == SBI_ETRAP) {
 		sbi_trap_redirect(regs, scratch, regs->mepc,
-				  uptrap.cause, uptrap.tval);
+				  out_tcause, out_tval);
+	} else {
+		/* This function should return non-zero value only in case of
+		 * fatal error. However, there is no good way to distinguish
+		 * between a fatal and non-fatal errors yet. That's why we treat
+		 * every return value except ETRAP as non-fatal and just return
+		 * accordingly for now. Once fatal errors are defined, that
+		 * case should be handled differently.
+		 */
+		regs->mepc += 4;
+		regs->a0 = ret;
+		if (!is_0_1_spec)
+			regs->a1 = out_val;
 	}
 
-	return ret;
+	return 0;
 }

From 30f09fbfd1ec0269dafb1dbb3c9c07f1b5c0ec81 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Wed, 2 Oct 2019 13:59:40 -0700
Subject: [PATCH 0334/1765] lib: Provide a platform hook to implement vendor
 specific SBI extensions.

SBI v0.2 specification allows vendor extensions and it should be
implemented in a independent of the core sbi library.

Introduce a single platform callback that will let platforms handle
all vendor extensions in platform specific code if they want.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h |  2 ++
 include/sbi/sbi_platform.h        | 58 +++++++++++++++++++++++++++++++
 lib/sbi/sbi_ecall.c               | 29 ++++++++++++++--
 3 files changed, 86 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index cfdf9e1f845..98c5ce634eb 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -38,6 +38,8 @@ enum sbi_ext_base_fid {
 #define SBI_SPEC_VERSION_MAJOR_OFFSET	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
 #define SBI_SPEC_VERSION_MINOR_MASK	0xffffff
+#define SBI_EXT_VENDOR_START		0x09000000
+#define SBI_EXT_VENDOR_END		0x09FFFFFF
 /* clang-format on */
 
 #endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 3de69b5a8a0..fdf30b96002 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -43,6 +43,8 @@
 
 #include <sbi/sbi_version.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_error.h>
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
@@ -112,6 +114,14 @@ struct sbi_platform_operations {
 	int (*system_reboot)(u32 type);
 	/** Shutdown or poweroff the platform */
 	int (*system_shutdown)(u32 type);
+
+	/** platform specific SBI extension implementation probe function */
+	int (*vendor_ext_check)(long extid);
+	/** platform specific SBI extension implementation provider */
+	int (*vendor_ext_provider)(long extid, long funcid,
+			unsigned long *args, unsigned long *out_value,
+			unsigned long *out_trap_cause,
+			unsigned long *out_trap_val);
 } __packed;
 
 /** Representation of a platform */
@@ -506,6 +516,54 @@ static inline int sbi_platform_system_shutdown(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Check if a vendor extension is implemented or not.
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param extid	vendor SBI extension id
+ *
+ * @return 0 if extid is not implemented and 1 if implemented
+ */
+static inline int sbi_platform_vendor_ext_check(const struct sbi_platform *plat,
+						long extid)
+{
+	if (plat && sbi_platform_ops(plat)->vendor_ext_check)
+		return sbi_platform_ops(plat)->vendor_ext_check(extid);
+
+	return 0;
+}
+
+/**
+ * Invoke platform specific vendor SBI extension implementation.
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param extid	vendor SBI extension id
+ * @param funcid SBI function id within the extension id
+ * @param args pointer to arguments passed by the caller
+ * @param out_value output value that can be filled the callee
+ * @param out_tcause trap cause that can be filled the callee
+ * @param out_tvalue possible trap value that can be filled the callee
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_vendor_ext_provider(const struct sbi_platform *plat,
+						   long extid, long funcid,
+						   unsigned long *args,
+						   unsigned long *out_value,
+						   unsigned long *out_tcause,
+						   unsigned long *out_tval)
+{
+	if (plat && sbi_platform_ops(plat)->vendor_ext_provider) {
+		return sbi_platform_ops(plat)->vendor_ext_provider(extid,
+								   funcid, args,
+								  out_value,
+								  out_tcause,
+								  out_tval);
+	}
+
+	return SBI_ENOTSUPP;
+}
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 0a934e90906..5864590b799 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
@@ -47,14 +48,30 @@ int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 	 */
 
 	if ((extid >= SBI_EXT_0_1_SET_TIMER &&
-	    extid <= SBI_EXT_0_1_SHUTDOWN) || (extid == SBI_EXT_BASE))
+	    extid <= SBI_EXT_0_1_SHUTDOWN) || (extid == SBI_EXT_BASE)) {
 		*out_val = 1;
-	else
+	} else if (extid >= SBI_EXT_VENDOR_START &&
+		   extid <= SBI_EXT_VENDOR_END) {
+		*out_val = sbi_platform_vendor_ext_check(
+						sbi_platform_ptr(scratch),
+						extid);
+	} else
 		*out_val = 0;
 
 	return 0;
 }
 
+int sbi_ecall_vendor_ext_handler(struct sbi_scratch *scratch,
+				 unsigned long extid, unsigned long funcid,
+				 unsigned long *args, unsigned long *out_val,
+				 unsigned long *out_tcause,
+				 unsigned long *out_tval)
+{
+	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
+					       extid, funcid, args, out_val,
+					       out_tcause, out_tval);
+}
+
 int sbi_ecall_base_handler(struct sbi_scratch *scratch, unsigned long extid,
 			   unsigned long funcid, unsigned long *args,
 			   unsigned long *out_val, unsigned long *out_tcause,
@@ -195,8 +212,14 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
 					     args, &out_val,
 					     &out_tval, &out_tcause);
-	else
+	else if (extension_id >= SBI_EXT_VENDOR_START &&
+		extension_id <= SBI_EXT_VENDOR_END) {
+		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,
+						   func_id, args, &out_val,
+						   &out_tval, &out_tcause);
+	} else {
 		ret = SBI_ENOTSUPP;
+	}
 
 	if (ret == SBI_ETRAP) {
 		sbi_trap_redirect(regs, scratch, regs->mepc,

From be92da280d87c38a2e0adc5d3f43bab7b5468f09 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 9 Oct 2019 11:33:53 +0530
Subject: [PATCH 0335/1765] include: Bump-up version to 0.5

This patch updates OpenSBI version to 0.5 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 910b0b7626a..9268f6df9cf 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 4
+#define OPENSBI_VERSION_MINOR 5
 
 /**
  *  OpenSBI 32-bit version with:

From dd8ef28b2717140c0d6cc61a2d6ffbadb506235e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 23 Oct 2019 12:44:14 +0530
Subject: [PATCH 0336/1765] firmware: Fix compile error for FW_PAYLOAD with
 latest GCC binutils

We get following compile error for FW_PAYLOAD with latest GCC
binutils:
fw_payload.o(.text+0x1961): 15 bytes required for alignment to 16-byte
boundary, but only 14 present

Further investigating, it turn-out to be a known issue with RISC-V
GCC binutils.
(Refer, https://github.com/riscv/riscv-gnu-toolchain/issues/298)

As a work-around, we disable relaxation when including DTB and
PAYLOAD binary in fw_payload.S.

Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_payload.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 4b4527a089f..01dce20d0ed 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -85,6 +85,14 @@ fw_options:
 	add	a0, zero, zero
 	ret
 
+	/*
+	 * We disable relaxation because use of ".align"
+	 * and ".balign" can potentially generate compile
+	 * errors with latest RISC-V GCC Binutils.
+	 */
+	.option push
+	.option norelax
+
 #ifdef FW_PAYLOAD_FDT_PATH
 	.align 4
 	.section .text, "ax", %progbits
@@ -103,3 +111,5 @@ payload_bin:
 #else
 	.incbin	FW_PAYLOAD_PATH
 #endif
+
+	.option pop

From 98f4a208995b027662a7b04a25e4fa5df5f3eefe Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 31 Oct 2019 14:11:55 +0530
Subject: [PATCH 0337/1765] firmware: Introduce relocation lottery

Instead of forcing HART0 to do the relocation and scratch init
work, we should have an atomic lottery to decide which HART does
the relocation and scratch init.

This way any HART can be boot/main HART.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 2c198cfe807..375c15837d5 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -46,12 +46,11 @@
 	.globl _start
 	.globl _start_warm
 _start:
-	/*
-	 * Jump to warm-boot if this is not the first core booting,
-	 * that is, for mhartid != 0
-	 */
-	csrr	a6, CSR_MHARTID
-	blt	zero, a6, _wait_relocate_copy_done
+	/* Jump to relocation wait loop if we don't get relocation lottery */
+	la	a6, _relocate_lottery
+	li	a7, 1
+	amoadd.w a6, a7, (a6)
+	bnez	a6, _wait_relocate_copy_done
 
 	/* Save load address */
 	la	t0, _load_start
@@ -75,6 +74,8 @@ _relocate:
 	blt	t2, t0, _relocate_copy_to_upper
 _relocate_copy_to_lower:
 	ble	t1, t2, _relocate_copy_to_lower_loop
+	la	t3, _relocate_lottery
+	BRANGE	t2, t1, t3, _start_hang
 	la	t3, _boot_status
 	BRANGE	t2, t1, t3, _start_hang
 	la	t3, _relocate
@@ -91,6 +92,8 @@ _relocate_copy_to_lower_loop:
 	jr	t4
 _relocate_copy_to_upper:
 	ble	t3, t0, _relocate_copy_to_upper_loop
+	la	t2, _relocate_lottery
+	BRANGE	t0, t3, t2, _start_hang
 	la	t2, _boot_status
 	BRANGE	t0, t3, t2, _start_hang
 	la	t2, _relocate
@@ -381,6 +384,8 @@ _start_warm:
 	j	_start_hang
 
 	.align 3
+_relocate_lottery:
+	RISCV_PTR	0
 _boot_status:
 	RISCV_PTR	0
 _load_start:

From f728a0be429d71cde966c85e3054535e3282460b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 5 Nov 2019 11:32:57 +0530
Subject: [PATCH 0338/1765] include: Sync-up encoding with priv v1.12-draft and
 hypervisor v0.5-draft

This patch sync-up encoding header with the latest privilege
specifications draft v1.12 and hypervisor specifications draft v0.5.

The MSTATUS.MTL and HSTATUS.STL bits are not present anymore and
will be removed by another patch series for hypervisor v0.5-draft.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 137 ++++++++++++-----------------------
 1 file changed, 45 insertions(+), 92 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 902c81af842..2e59b7d2eda 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -15,20 +15,16 @@
 /* TODO: Make constants usable in assembly with _AC() macro */
 
 /* clang-format off */
-#define MSTATUS_UIE			0x00000001
 #define MSTATUS_SIE			0x00000002
-#define MSTATUS_HIE			0x00000004
 #define MSTATUS_MIE			0x00000008
-#define MSTATUS_UPIE			0x00000010
 #define MSTATUS_SPIE_SHIFT		5
 #define MSTATUS_SPIE			(1UL << MSTATUS_SPIE_SHIFT)
-#define MSTATUS_HPIE			0x00000040
+#define MSTATUS_UBE			0x00000040
 #define MSTATUS_MPIE			0x00000080
 #define MSTATUS_SPP_SHIFT		8
-#define MSTATUS_SPP			(1UL << MSTATUS_SPP_SHIFT)
-#define MSTATUS_HPP			0x00000600
+#define MSTATUS_SPP			(1 << MSTATUS_SPP_SHIFT)
 #define MSTATUS_MPP_SHIFT		11
-#define MSTATUS_MPP			(3UL << MSTATUS_MPP_SHIFT)
+#define MSTATUS_MPP			(3 << MSTATUS_MPP_SHIFT)
 #define MSTATUS_FS			0x00006000
 #define MSTATUS_XS			0x00018000
 #define MSTATUS_MPRV			0x00020000
@@ -41,34 +37,31 @@
 #if __riscv_xlen == 64
 #define MSTATUS_UXL			0x0000000300000000
 #define MSTATUS_SXL			0x0000000C00000000
+#define MSTATUS_SBE			0x0000001000000000
+#define MSTATUS_MBE			0x0000002000000000
 #define MSTATUS_MTL			0x0000004000000000
-#define MSTATUS_MTL_SHIFT		38
 #define MSTATUS_MPV			0x0000008000000000
-#define MSTATUS_MPV_HIFT		39
 #else
-#define MSTATUSH_UXL			0x00000003
-#define MSTATUSH_SXL			0x0000000C
+#define MSTATUSH_SBE			0x00000010
+#define MSTATUSH_MBE			0x00000020
 #define MSTATUSH_MTL			0x00000040
-#define MSTATUSH_MTL_SHIFT		6
 #define MSTATUSH_MPV			0x00000080
-#define MSTATUSH_MPV_HIFT		7
 #endif
+#define MSTATUS32_SD			0x80000000
 #define MSTATUS64_SD			0x8000000000000000
 
-#define SSTATUS_UIE			0x00000001
-#define SSTATUS_SIE			0x00000002
-#define SSTATUS_UPIE			0x00000010
-#define SSTATUS_SPIE_SHIFT		5
-#define SSTATUS_SPIE			(1UL << MSTATUS_SPIE_SHIFT)
-#define SSTATUS_SPP_SHIFT		8
-#define SSTATUS_SPP			(1UL << MSTATUS_SPP_SHIFT)
-#define SSTATUS_FS			0x00006000
-#define SSTATUS_XS			0x00018000
-#define SSTATUS_SUM			0x00040000
-#define SSTATUS_MXR			0x00080000
-#define SSTATUS32_SD			0x80000000
-#define SSTATUS_UXL			0x0000000300000000
-#define SSTATUS64_SD			0x8000000000000000
+#define SSTATUS_SIE			MSTATUS_SIE
+#define SSTATUS_SPIE_SHIFT		MSTATUS_SPIE_SHIFT
+#define SSTATUS_SPIE			MSTATUS_SPIE
+#define SSTATUS_SPP_SHIFT		MSTATUS_SPP_SHIFT
+#define SSTATUS_SPP			MSTATUS_SPP
+#define SSTATUS_FS			MSTATUS_FS
+#define SSTATUS_XS			MSTATUS_XS
+#define SSTATUS_SUM			MSTATUS_SUM
+#define SSTATUS_MXR			MSTATUS_MXR
+#define SSTATUS32_SD			MSTATUS32_SD
+#define SSTATUS64_UXL			MSTATUS_UXL
+#define SSTATUS64_SD			MSTATUS64_SD
 
 #define HSTATUS_VTSR			0x00400000
 #define HSTATUS_VTVM			0x00100000
@@ -78,81 +71,24 @@
 #define HSTATUS_STL			0x00000040
 #define HSTATUS_SPRV			0x00000001
 
-#define DCSR_XDEBUGVER			(3U<<30)
-#define DCSR_NDRESET			(1<<29)
-#define DCSR_FULLRESET			(1<<28)
-#define DCSR_EBREAKM			(1<<15)
-#define DCSR_EBREAKH			(1<<14)
-#define DCSR_EBREAKS			(1<<13)
-#define DCSR_EBREAKU			(1<<12)
-#define DCSR_STOPCYCLE			(1<<10)
-#define DCSR_STOPTIME			(1<<9)
-#define DCSR_CAUSE			(7<<6)
-#define DCSR_DEBUGINT			(1<<5)
-#define DCSR_HALT			(1<<3)
-#define DCSR_STEP			(1<<2)
-#define DCSR_PRV			(3<<0)
-
-#define DCSR_CAUSE_NONE			0
-#define DCSR_CAUSE_SWBP			1
-#define DCSR_CAUSE_HWBP			2
-#define DCSR_CAUSE_DEBUGINT		3
-#define DCSR_CAUSE_STEP			4
-#define DCSR_CAUSE_HALT			5
-
-#define MCONTROL_TYPE(xlen)		(0xfULL<<((xlen)-4))
-#define MCONTROL_DMODE(xlen)		(1ULL<<((xlen)-5))
-#define MCONTROL_MASKMAX(xlen)		(0x3fULL<<((xlen)-11))
-
-#define MCONTROL_SELECT			(1<<19)
-#define MCONTROL_TIMING			(1<<18)
-#define MCONTROL_ACTION			(0x3f<<12)
-#define MCONTROL_CHAIN			(1<<11)
-#define MCONTROL_MATCH			(0xf<<7)
-#define MCONTROL_M			(1<<6)
-#define MCONTROL_H			(1<<5)
-#define MCONTROL_S			(1<<4)
-#define MCONTROL_U			(1<<3)
-#define MCONTROL_EXECUTE		(1<<2)
-#define MCONTROL_STORE			(1<<1)
-#define MCONTROL_LOAD			(1<<0)
-
-#define MCONTROL_TYPE_NONE		0
-#define MCONTROL_TYPE_MATCH		2
-
-#define MCONTROL_ACTION_DEBUG_EXCEPTION	0
-#define MCONTROL_ACTION_DEBUG_MODE	1
-#define MCONTROL_ACTION_TRACE_START	2
-#define MCONTROL_ACTION_TRACE_STOP	3
-#define MCONTROL_ACTION_TRACE_EMIT	4
-
-#define MCONTROL_MATCH_EQUAL		0
-#define MCONTROL_MATCH_NAPOT		1
-#define MCONTROL_MATCH_GE		2
-#define MCONTROL_MATCH_LT		3
-#define MCONTROL_MATCH_MASK_LOW		4
-#define MCONTROL_MATCH_MASK_HIGH	5
-
 #define IRQ_S_SOFT			1
-#define IRQ_H_SOFT			2
+#define IRQ_VS_SOFT			2
 #define IRQ_M_SOFT			3
 #define IRQ_S_TIMER			5
-#define IRQ_H_TIMER			6
+#define IRQ_VS_TIMER			6
 #define IRQ_M_TIMER			7
 #define IRQ_S_EXT			9
-#define IRQ_H_EXT			10
+#define IRQ_VS_EXT			10
 #define IRQ_M_EXT			11
-#define IRQ_COP				12
-#define IRQ_HOST			13
 
 #define MIP_SSIP			(1 << IRQ_S_SOFT)
-#define MIP_HSIP			(1 << IRQ_H_SOFT)
+#define MIP_VSSIP			(1 << IRQ_VS_SOFT)
 #define MIP_MSIP			(1 << IRQ_M_SOFT)
 #define MIP_STIP			(1 << IRQ_S_TIMER)
-#define MIP_HTIP			(1 << IRQ_H_TIMER)
+#define MIP_VSTIP			(1 << IRQ_VS_TIMER)
 #define MIP_MTIP			(1 << IRQ_M_TIMER)
 #define MIP_SEIP			(1 << IRQ_S_EXT)
-#define MIP_HEIP			(1 << IRQ_H_EXT)
+#define MIP_VSEIP			(1 << IRQ_VS_EXT)
 #define MIP_MEIP			(1 << IRQ_M_EXT)
 
 #define SIP_SSIP			MIP_SSIP
@@ -160,7 +96,6 @@
 
 #define PRV_U				0
 #define PRV_S				1
-#define PRV_H				2
 #define PRV_M				3
 
 #define SATP32_MODE			0x80000000
@@ -276,9 +211,13 @@
 #define CSR_HSTATUS			0x600
 #define CSR_HEDELEG			0x602
 #define CSR_HIDELEG			0x603
+#define CSR_HIE				0x604
 #define CSR_HTIMEDELTA			0x605
 #define CSR_HTIMEDELTAH			0x615
 #define CSR_HCOUNTERNEN			0x606
+#define CSR_HTVAL			0x643
+#define CSR_HIP				0x644
+#define CSR_HTINST			0x64a
 #define CSR_HGATP			0x680
 
 #define CSR_VSSTATUS			0x200
@@ -304,6 +243,8 @@
 #define CSR_MCAUSE			0x342
 #define CSR_MTVAL			0x343
 #define CSR_MIP				0x344
+#define CSR_MTINST			0x34a
+#define CSR_MTVAL2			0x34b
 #define CSR_PMPCFG0			0x3a0
 #define CSR_PMPCFG1			0x3a1
 #define CSR_PMPCFG2			0x3a2
@@ -475,6 +416,9 @@
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd
 #define CAUSE_STORE_PAGE_FAULT		0xf
+#define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
+#define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
+#define CAUSE_STORE_GUEST_PAGE_FAULT	0x17
 
 #define INSN_MATCH_LB			0x3
 #define INSN_MASK_LB			0x707f
@@ -549,7 +493,16 @@
 #define INSN_MASK_WFI			0xffffff00
 #define INSN_MATCH_WFI			0x10500000
 
-#define INSN_LEN(insn)			((((insn) & 0x3) < 0x3) ? 2 : 4)
+#define INSN_16BIT_MASK			0x3
+#define INSN_32BIT_MASK			0x1c
+
+#define INSN_IS_16BIT(insn)		\
+	(((insn) & INSN_16BIT_MASK) != INSN_16BIT_MASK)
+#define INSN_IS_32BIT(insn)		\
+	(((insn) & INSN_16BIT_MASK) == INSN_16BIT_MASK && \
+	 ((insn) & INSN_32BIT_MASK) != INSN_32BIT_MASK)
+
+#define INSN_LEN(insn)			(INSN_IS_16BIT(insn) ? 2 : 4)
 
 #if __riscv_xlen == 64
 #define LOG_REGBYTES			3

From 18897aaf5d0382017c05a5690d0bc8e0d044270f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 5 Nov 2019 11:42:09 +0530
Subject: [PATCH 0339/1765] include: Use _UL() and _ULL() for defines in
 riscv_encoding.h

The riscv_encoding.h is shared with assembly sources so we use
_UL() and _ULL() for register fields related defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 160 +++++++++++++++++------------------
 1 file changed, 79 insertions(+), 81 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 2e59b7d2eda..316d74313e5 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -12,43 +12,41 @@
 
 #include <sbi/sbi_const.h>
 
-/* TODO: Make constants usable in assembly with _AC() macro */
-
 /* clang-format off */
-#define MSTATUS_SIE			0x00000002
-#define MSTATUS_MIE			0x00000008
+#define MSTATUS_SIE			_UL(0x00000002)
+#define MSTATUS_MIE			_UL(0x00000008)
 #define MSTATUS_SPIE_SHIFT		5
-#define MSTATUS_SPIE			(1UL << MSTATUS_SPIE_SHIFT)
-#define MSTATUS_UBE			0x00000040
-#define MSTATUS_MPIE			0x00000080
+#define MSTATUS_SPIE			(_UL(1) << MSTATUS_SPIE_SHIFT)
+#define MSTATUS_UBE			_UL(0x00000040)
+#define MSTATUS_MPIE			_UL(0x00000080)
 #define MSTATUS_SPP_SHIFT		8
-#define MSTATUS_SPP			(1 << MSTATUS_SPP_SHIFT)
+#define MSTATUS_SPP			(_UL(1) << MSTATUS_SPP_SHIFT)
 #define MSTATUS_MPP_SHIFT		11
-#define MSTATUS_MPP			(3 << MSTATUS_MPP_SHIFT)
-#define MSTATUS_FS			0x00006000
-#define MSTATUS_XS			0x00018000
-#define MSTATUS_MPRV			0x00020000
-#define MSTATUS_SUM			0x00040000
-#define MSTATUS_MXR			0x00080000
-#define MSTATUS_TVM			0x00100000
-#define MSTATUS_TW			0x00200000
-#define MSTATUS_TSR			0x00400000
-#define MSTATUS32_SD			0x80000000
+#define MSTATUS_MPP			(_UL(3) << MSTATUS_MPP_SHIFT)
+#define MSTATUS_FS			_UL(0x00006000)
+#define MSTATUS_XS			_UL(0x00018000)
+#define MSTATUS_MPRV			_UL(0x00020000)
+#define MSTATUS_SUM			_UL(0x00040000)
+#define MSTATUS_MXR			_UL(0x00080000)
+#define MSTATUS_TVM			_UL(0x00100000)
+#define MSTATUS_TW			_UL(0x00200000)
+#define MSTATUS_TSR			_UL(0x00400000)
+#define MSTATUS32_SD			_UL(0x80000000)
 #if __riscv_xlen == 64
-#define MSTATUS_UXL			0x0000000300000000
-#define MSTATUS_SXL			0x0000000C00000000
-#define MSTATUS_SBE			0x0000001000000000
-#define MSTATUS_MBE			0x0000002000000000
-#define MSTATUS_MTL			0x0000004000000000
-#define MSTATUS_MPV			0x0000008000000000
+#define MSTATUS_UXL			_ULL(0x0000000300000000)
+#define MSTATUS_SXL			_ULL(0x0000000C00000000)
+#define MSTATUS_SBE			_ULL(0x0000001000000000)
+#define MSTATUS_MBE			_ULL(0x0000002000000000)
+#define MSTATUS_MTL			_ULL(0x0000004000000000)
+#define MSTATUS_MPV			_ULL(0x0000008000000000)
 #else
-#define MSTATUSH_SBE			0x00000010
-#define MSTATUSH_MBE			0x00000020
-#define MSTATUSH_MTL			0x00000040
-#define MSTATUSH_MPV			0x00000080
+#define MSTATUSH_SBE			_UL(0x00000010)
+#define MSTATUSH_MBE			_UL(0x00000020)
+#define MSTATUSH_MTL			_UL(0x00000040)
+#define MSTATUSH_MPV			_UL(0x00000080)
 #endif
-#define MSTATUS32_SD			0x80000000
-#define MSTATUS64_SD			0x8000000000000000
+#define MSTATUS32_SD			_UL(0x80000000)
+#define MSTATUS64_SD			_ULL(0x8000000000000000)
 
 #define SSTATUS_SIE			MSTATUS_SIE
 #define SSTATUS_SPIE_SHIFT		MSTATUS_SPIE_SHIFT
@@ -63,13 +61,13 @@
 #define SSTATUS64_UXL			MSTATUS_UXL
 #define SSTATUS64_SD			MSTATUS64_SD
 
-#define HSTATUS_VTSR			0x00400000
-#define HSTATUS_VTVM			0x00100000
-#define HSTATUS_SP2V			0x00000200
-#define HSTATUS_SP2P			0x00000100
-#define HSTATUS_SPV			0x00000080
-#define HSTATUS_STL			0x00000040
-#define HSTATUS_SPRV			0x00000001
+#define HSTATUS_VTSR			_UL(0x00400000)
+#define HSTATUS_VTVM			_UL(0x00100000)
+#define HSTATUS_SP2V			_UL(0x00000200)
+#define HSTATUS_SP2P			_UL(0x00000100)
+#define HSTATUS_SPV			_UL(0x00000080)
+#define HSTATUS_STL			_UL(0x00000040)
+#define HSTATUS_SPRV			_UL(0x00000001)
 
 #define IRQ_S_SOFT			1
 #define IRQ_VS_SOFT			2
@@ -81,59 +79,59 @@
 #define IRQ_VS_EXT			10
 #define IRQ_M_EXT			11
 
-#define MIP_SSIP			(1 << IRQ_S_SOFT)
-#define MIP_VSSIP			(1 << IRQ_VS_SOFT)
-#define MIP_MSIP			(1 << IRQ_M_SOFT)
-#define MIP_STIP			(1 << IRQ_S_TIMER)
-#define MIP_VSTIP			(1 << IRQ_VS_TIMER)
-#define MIP_MTIP			(1 << IRQ_M_TIMER)
-#define MIP_SEIP			(1 << IRQ_S_EXT)
-#define MIP_VSEIP			(1 << IRQ_VS_EXT)
-#define MIP_MEIP			(1 << IRQ_M_EXT)
+#define MIP_SSIP			(_UL(1) << IRQ_S_SOFT)
+#define MIP_VSSIP			(_UL(1) << IRQ_VS_SOFT)
+#define MIP_MSIP			(_UL(1) << IRQ_M_SOFT)
+#define MIP_STIP			(_UL(1) << IRQ_S_TIMER)
+#define MIP_VSTIP			(_UL(1) << IRQ_VS_TIMER)
+#define MIP_MTIP			(_UL(1) << IRQ_M_TIMER)
+#define MIP_SEIP			(_UL(1) << IRQ_S_EXT)
+#define MIP_VSEIP			(_UL(1) << IRQ_VS_EXT)
+#define MIP_MEIP			(_UL(1) << IRQ_M_EXT)
 
 #define SIP_SSIP			MIP_SSIP
 #define SIP_STIP			MIP_STIP
 
-#define PRV_U				0
-#define PRV_S				1
-#define PRV_M				3
-
-#define SATP32_MODE			0x80000000
-#define SATP32_ASID			0x7FC00000
-#define SATP32_PPN			0x003FFFFF
-#define SATP64_MODE			0xF000000000000000
-#define SATP64_ASID			0x0FFFF00000000000
-#define SATP64_PPN			0x00000FFFFFFFFFFF
-
-#define SATP_MODE_OFF			0
-#define SATP_MODE_SV32			1
-#define SATP_MODE_SV39			8
-#define SATP_MODE_SV48			9
-#define SATP_MODE_SV57			10
-#define SATP_MODE_SV64			11
-
-#define PMP_R				0x01
-#define PMP_W				0x02
-#define PMP_X				0x04
-#define PMP_A				0x18
-#define PMP_A_TOR			0x08
-#define PMP_A_NA4			0x10
-#define PMP_A_NAPOT			0x18
-#define PMP_L				0x80
+#define PRV_U				_UL(0)
+#define PRV_S				_UL(1)
+#define PRV_M				_UL(3)
+
+#define SATP32_MODE			_UL(0x80000000)
+#define SATP32_ASID			_UL(0x7FC00000)
+#define SATP32_PPN			_UL(0x003FFFFF)
+#define SATP64_MODE			_ULL(0xF000000000000000)
+#define SATP64_ASID			_ULL(0x0FFFF00000000000)
+#define SATP64_PPN			_ULL(0x00000FFFFFFFFFFF)
+
+#define SATP_MODE_OFF			_UL(0)
+#define SATP_MODE_SV32			_UL(1)
+#define SATP_MODE_SV39			_UL(8)
+#define SATP_MODE_SV48			_UL(9)
+#define SATP_MODE_SV57			_UL(10)
+#define SATP_MODE_SV64			_UL(11)
+
+#define PMP_R				_UL(0x01)
+#define PMP_W				_UL(0x02)
+#define PMP_X				_UL(0x04)
+#define PMP_A				_UL(0x18)
+#define PMP_A_TOR			_UL(0x08)
+#define PMP_A_NA4			_UL(0x10)
+#define PMP_A_NAPOT			_UL(0x18)
+#define PMP_L				_UL(0x80)
 
 #define PMP_SHIFT			2
 #define PMP_COUNT			16
 
 /* page table entry (PTE) fields */
-#define PTE_V				0x001 /* Valid */
-#define PTE_R				0x002 /* Read */
-#define PTE_W				0x004 /* Write */
-#define PTE_X				0x008 /* Execute */
-#define PTE_U				0x010 /* User */
-#define PTE_G				0x020 /* Global */
-#define PTE_A				0x040 /* Accessed */
-#define PTE_D				0x080 /* Dirty */
-#define PTE_SOFT			0x300 /* Reserved for Software */
+#define PTE_V				_UL(0x001) /* Valid */
+#define PTE_R				_UL(0x002) /* Read */
+#define PTE_W				_UL(0x004) /* Write */
+#define PTE_X				_UL(0x008) /* Execute */
+#define PTE_U				_UL(0x010) /* User */
+#define PTE_G				_UL(0x020) /* Global */
+#define PTE_A				_UL(0x040) /* Accessed */
+#define PTE_D				_UL(0x080) /* Dirty */
+#define PTE_SOFT			_UL(0x300) /* Reserved for Software */
 
 #define PTE_PPN_SHIFT			10
 

From 7a13beb213266cbf6f15ddbbef5bfca274086bd3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 6 Nov 2019 16:24:35 +0530
Subject: [PATCH 0340/1765] firmware: Add preferred boot HART field in struct
 fw_dynamic_info

It has been reported that link address range of previous booting stage
(such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC.

This means self-relocation in FW_DYNAMIC can potentially corrupt
previous booting stage if any of the secondary HART enter FW_DYNAMIC
before primary HART.

To tackle this, we add preferred boot HART field (i.e boot_hart) in
struct fw_dyanmic_info. We use this field to force secondary HARTs
into relocation wait loop till preferred/primary boot HART enters
FW_DYNAMIC completes self-relocation. If preferred boot HART is not
available then we fall back to relocation lottery approach.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S       | 10 ++++++++++
 firmware/fw_dynamic.S    | 42 ++++++++++++++++++++++++++++++++++++++++
 firmware/fw_jump.S       | 13 +++++++++++++
 firmware/fw_payload.S    | 13 +++++++++++++
 include/sbi/fw_dynamic.h | 26 +++++++++++++++++++++----
 5 files changed, 100 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 375c15837d5..0797cc002b0 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -46,6 +46,16 @@
 	.globl _start
 	.globl _start_warm
 _start:
+	/* Find preferred boot HART id */
+	MOV_3R	s0, a0, s1, a1, s2, a2
+	call	fw_boot_hart
+	add	a6, a0, zero
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	li	a7, -1
+	beq	a6, a7, _try_lottery
+	/* Jump to relocation wait loop if we are not boot hart */
+	bne	a0, a6, _wait_relocate_copy_done
+_try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
 	la	a6, _relocate_lottery
 	li	a7, 1
diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index cf97b602008..ba9394da776 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -17,6 +17,32 @@ _bad_dynamic_info:
 	wfi
 	j	_bad_dynamic_info
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_boot_hart
+	/*
+	 * This function is called very early even before
+	 * fw_save_info() is called.
+	 * We can only use a0, a1, and a2 registers here.
+	 * The boot HART id should be returned in 'a0'.
+	 */
+fw_boot_hart:
+	/* Sanity checks */
+	li	a1, FW_DYNAMIC_INFO_MAGIC_VALUE
+	REG_L	a0, FW_DYNAMIC_INFO_MAGIC_OFFSET(a2)
+	bne	a0, a1, _bad_dynamic_info
+	li	a1, FW_DYNAMIC_INFO_VERSION_MAX
+	REG_L	a0, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
+	bgt	a0, a1, _bad_dynamic_info
+
+	/* Read boot HART id */
+	li	a1, 0x2
+	blt	a0, a1, 2f
+	REG_L	a0, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
+	ret
+2:	li	a0, -1
+	ret
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_save_info
@@ -27,14 +53,19 @@ _bad_dynamic_info:
 	 * Nothing to be returned here.
 	 */
 fw_save_info:
+	/* Save next arg1 in 'a1' */
 	la	a4, _dynamic_next_arg1
 	REG_S	a1, (a4)
+
+	/* Sanity checks */
 	li	a4, FW_DYNAMIC_INFO_MAGIC_VALUE
 	REG_L	a3, FW_DYNAMIC_INFO_MAGIC_OFFSET(a2)
 	bne	a3, a4, _bad_dynamic_info
 	li	a4, FW_DYNAMIC_INFO_VERSION_MAX
 	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
 	bgt	a3, a4, _bad_dynamic_info
+
+	/* Save version == 0x1 fields */
 	la	a4, _dynamic_next_addr
 	REG_L	a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)
 	REG_S	a3, (a4)
@@ -44,6 +75,15 @@ fw_save_info:
 	la	a4, _dynamic_options
 	REG_L	a3, FW_DYNAMIC_INFO_OPTIONS_OFFSET(a2)
 	REG_S	a3, (a4)
+
+	/* Save version == 0x2 fields */
+	li	a4, 0x2
+	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
+	blt	a3, a4, 2f
+	la	a4, _dynamic_boot_hart
+	REG_L	a3, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
+	REG_S	a3, (a4)
+2:
 	ret
 
 	.align 3
@@ -116,3 +156,5 @@ _dynamic_next_mode:
 	RISCV_PTR PRV_S
 _dynamic_options:
 	RISCV_PTR 0x0
+_dynamic_boot_hart:
+	RISCV_PTR -1
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index cdf1f41dc5d..84391c96aae 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -9,6 +9,19 @@
 
 #include "fw_base.S"
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_boot_hart
+	/*
+	 * This function is called very early even before
+	 * fw_save_info() is called.
+	 * We can only use a0, a1, and a2 registers here.
+	 * The boot HART id should be returned in 'a0'.
+	 */
+fw_boot_hart:
+	li	a0, -1
+	ret
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_save_info
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 01dce20d0ed..9f4e0eceb92 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -9,6 +9,19 @@
 
 #include "fw_base.S"
 
+	.align 3
+	.section .entry, "ax", %progbits
+	.global fw_boot_hart
+	/*
+	 * This function is called very early even before
+	 * fw_save_info() is called.
+	 * We can only use a0, a1, and a2 registers here.
+	 * The boot HART id should be returned in 'a0'.
+	 */
+fw_boot_hart:
+	li	a0, -1
+	ret
+
 	.align 3
 	.section .entry, "ax", %progbits
 	.global fw_save_info
diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
index 695dc295be4..3c088311ff3 100644
--- a/include/sbi/fw_dynamic.h
+++ b/include/sbi/fw_dynamic.h
@@ -18,18 +18,20 @@
 #define FW_DYNAMIC_INFO_MAGIC_OFFSET		(0 * __SIZEOF_POINTER__)
 /** Offset of version member in fw_dynamic_info */
 #define FW_DYNAMIC_INFO_VERSION_OFFSET		(1 * __SIZEOF_POINTER__)
-/** Offset of next_addr member in fw_dynamic_info */
+/** Offset of next_addr member in fw_dynamic_info (version >= 1) */
 #define FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET	(2 * __SIZEOF_POINTER__)
-/** Offset of next_mode member in fw_dynamic_info */
+/** Offset of next_mode member in fw_dynamic_info  (version >= 1) */
 #define FW_DYNAMIC_INFO_NEXT_MODE_OFFSET	(3 * __SIZEOF_POINTER__)
-/** Offset of options member in fw_dynamic_info */
+/** Offset of options member in fw_dynamic_info  (version >= 1) */
 #define FW_DYNAMIC_INFO_OPTIONS_OFFSET		(4 * __SIZEOF_POINTER__)
+/** Offset of boot_hart member in fw_dynamic_info  (version >= 2) */
+#define FW_DYNAMIC_INFO_BOOT_HART_OFFSET	(5 * __SIZEOF_POINTER__)
 
 /** Expected value of info magic ('OSBI' ascii string in hex) */
 #define FW_DYNAMIC_INFO_MAGIC_VALUE		0x4942534f
 
 /** Maximum supported info version */
-#define FW_DYNAMIC_INFO_VERSION_MAX		0x1
+#define FW_DYNAMIC_INFO_VERSION_MAX		0x2
 
 /** Possible next mode values */
 #define FW_DYNAMIC_INFO_NEXT_MODE_U		0x0
@@ -54,6 +56,22 @@ struct fw_dynamic_info {
 	unsigned long next_mode;
 	/** Options for OpenSBI library */
 	unsigned long options;
+	/**
+	 * Preferred boot HART id
+	 *
+	 * It is possible that the previous booting stage uses same link
+	 * address as the FW_DYNAMIC firmware. In this case, the relocation
+	 * lottery mechanism can potentially overwrite the previous booting
+	 * stage while other HARTs are still running in the previous booting
+	 * stage leading to boot-time crash. To avoid this boot-time crash,
+	 * the previous booting stage can specify last HART that will jump
+	 * to the FW_DYNAMIC firmware as the preferred boot HART.
+	 *
+	 * To avoid specifying a preferred boot HART, the previous booting
+	 * stage can set it to -1UL which will force the FW_DYNAMIC firmware
+	 * to use the relocation lottery mechanism.
+	 */
+	unsigned long boot_hart;
 } __packed;
 
 #endif

From 215421ca610a64b8ec188c96ea8588ae2de41fb7 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Mon, 11 Nov 2019 16:40:34 -0800
Subject: [PATCH 0341/1765] lib: Remove date and time from init message

Building the date and time into the binary means the OpenSBI isn't
reproducible. We don't really need the time so let's remove it.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_init.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e1acb57952b..265bb025f12 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -35,11 +35,10 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 
 	misa_string(str, sizeof(str));
 #ifdef OPENSBI_VERSION_GIT
-	sbi_printf("\nOpenSBI %s (%s %s)\n", OPENSBI_VERSION_GIT,
-		   __DATE__, __TIME__);
+	sbi_printf("\nOpenSBI %s\n", OPENSBI_VERSION_GIT);
 #else
-	sbi_printf("\nOpenSBI v%d.%d (%s %s)\n", OPENSBI_VERSION_MAJOR,
-		   OPENSBI_VERSION_MINOR, __DATE__, __TIME__);
+	sbi_printf("\nOpenSBI v%d.%d\n", OPENSBI_VERSION_MAJOR,
+		   OPENSBI_VERSION_MINOR);
 #endif
 
 	sbi_printf(BANNER);

From 838657c0524f148d8aaec8225cd0ab9e2e2c7303 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 16 Nov 2019 16:08:27 +0530
Subject: [PATCH 0342/1765] include: Remove ilen member of struct unpriv_trap

We simplify struct unpriv_trap by removing ilen member. This
can be achieved by ensuring that at all unpriv load/store
instructions are 4 bytes long using GCC assembler option.

Additionally, this also reduces few instructions from unpriv
load/store functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_unpriv.h |  1 -
 lib/sbi/riscv_unpriv.c     | 50 +++++++++++++++++++++++---------------
 lib/sbi/sbi_trap.c         |  2 +-
 3 files changed, 32 insertions(+), 21 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index fce49bcb7d7..05aca76ed1c 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -15,7 +15,6 @@
 struct sbi_scratch;
 
 struct unpriv_trap {
-	unsigned long ilen;
 	unsigned long cause;
 	unsigned long tval;
 };
diff --git a/lib/sbi/riscv_unpriv.c b/lib/sbi/riscv_unpriv.c
index ef70e3af31a..49976365a16 100644
--- a/lib/sbi/riscv_unpriv.c
+++ b/lib/sbi/riscv_unpriv.c
@@ -13,20 +13,22 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
 
-#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn, insnlen)                \
+#define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
 	type load_##type(const type *addr,                                    \
 			struct sbi_scratch *scratch,                          \
 			struct unpriv_trap *trap)                             \
 	{                                                                     \
 		register ulong __mstatus asm("a2");                           \
 		type val = 0;                                                 \
-		trap->ilen = insnlen;                                         \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
 		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			".option push\n"                                      \
+			".option norvc\n"                                     \
 			#insn " %1, %2\n"                                     \
+			".option pop\n"                                       \
 			"csrw " STR(CSR_MSTATUS) ", %0"                       \
 		    : "+&r"(__mstatus), "=&r"(val)                            \
 		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
@@ -34,41 +36,43 @@
 		return val;                                                   \
 	}
 
-#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn, insnlen)               \
+#define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
 	void store_##type(type *addr, type val,                               \
 			struct sbi_scratch *scratch,                          \
 			struct unpriv_trap *trap)                             \
 	{                                                                     \
 		register ulong __mstatus asm("a3");                           \
-		trap->ilen = insnlen;                                         \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
 		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			".option push\n"                                      \
+			".option norvc\n"                                     \
 			#insn " %1, %2\n"                                     \
+			".option pop\n"                                       \
 			"csrw " STR(CSR_MSTATUS) ", %0"                       \
 			: "+&r"(__mstatus)                                    \
 			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));           \
 		sbi_hart_set_trap_info(scratch, NULL);                        \
 	}
 
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu, 4)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu, 4)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb, 4)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh, 4)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw, 2)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u8, sb, 4)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u16, sh, 4)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u32, sw, 2)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u16, lhu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s8, lb)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s16, lh)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(s32, lw)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u8, sb)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u16, sh)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u32, sw)
 #if __riscv_xlen == 64
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu, 4)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld, 2)
-DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd, 2)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld, 2)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld)
+DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
 #else
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw, 2)
-DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw, 2)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
+DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
 u64 load_u64(const u64 *addr,
 	     struct sbi_scratch *scratch, struct unpriv_trap *trap)
@@ -105,7 +109,6 @@ ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 	ulong rvc_mask = 3, tmp;
 #endif
 
-	trap->ilen = 4;
 	trap->cause = 0;
 	trap->tval = 0;
 	sbi_hart_set_trap_info(scratch, trap);
@@ -115,20 +118,29 @@ ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 
 #ifndef __riscv_compressed
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
+	    ".option push\n"
+	    ".option norvc\n"
 #if __riscv_xlen == 64
 	    STR(LWU) " %[insn], (%[addr])\n"
 #else
 	    STR(LW) " %[insn], (%[addr])\n"
 #endif
+	    ".option pop\n"
 	    "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
 	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
 	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc));
 #else
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
+	    ".option push\n"
+	    ".option norvc\n"
 	    "lhu %[insn], (%[addr])\n"
+	    ".option pop\n"
 	    "and %[tmp], %[insn], %[rvc_mask]\n"
 	    "bne %[tmp], %[rvc_mask], 2f\n"
+	    ".option push\n"
+	    ".option norvc\n"
 	    "lhu %[tmp], 2(%[addr])\n"
+	    ".option pop\n"
 	    "sll %[tmp], %[tmp], 16\n"
 	    "add %[insn], %[insn], %[tmp]\n"
 	    "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 93a040423a6..5274c8b881b 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -262,7 +262,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 		uptrap = sbi_hart_get_trap_info(scratch);
 		if ((regs->mstatus & MSTATUS_MPRV) && uptrap) {
 			rc = 0;
-			regs->mepc += uptrap->ilen;
+			regs->mepc += 4;
 			uptrap->cause = mcause;
 			uptrap->tval = mtval;
 		} else {

From b1d8c988bcca84cf7cd8ee5bf4fe528e256cfeab Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 16 Nov 2019 16:38:53 +0530
Subject: [PATCH 0343/1765] lib: No need to set VSSTATUS.MXR bit in get_insn()

We don't need to set VSSTATUS.MXR bit in get_insn() for
unpriv instruction read because MSTATUS.MXR bit applies
to both "Stage1" and "Stage2" page tables.

This also allows us to remove the "virt" parameter of
get_insn() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_unpriv.h    |  2 +-
 lib/sbi/riscv_unpriv.c        | 10 ++--------
 lib/sbi/sbi_illegal_insn.c    |  7 +------
 lib/sbi/sbi_misaligned_ldst.c | 14 ++------------
 4 files changed, 6 insertions(+), 27 deletions(-)

diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index 05aca76ed1c..bdea3a31098 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -42,7 +42,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
 
-ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
+ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
 	       struct unpriv_trap *trap);
 
 #endif
diff --git a/lib/sbi/riscv_unpriv.c b/lib/sbi/riscv_unpriv.c
index 49976365a16..e84c23ed0aa 100644
--- a/lib/sbi/riscv_unpriv.c
+++ b/lib/sbi/riscv_unpriv.c
@@ -101,10 +101,10 @@ void store_u64(u64 *addr, u64 val,
 }
 #endif
 
-ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
+ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
 	       struct unpriv_trap *trap)
 {
-	ulong __mstatus = 0, __vsstatus = 0, val = 0;
+	ulong __mstatus = 0, val = 0;
 #ifdef __riscv_compressed
 	ulong rvc_mask = 3, tmp;
 #endif
@@ -113,9 +113,6 @@ ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 	trap->tval = 0;
 	sbi_hart_set_trap_info(scratch, trap);
 
-	if (virt)
-		__vsstatus = csr_read_set(CSR_VSSTATUS, SSTATUS_MXR);
-
 #ifndef __riscv_compressed
 	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
 	    ".option push\n"
@@ -149,9 +146,6 @@ ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
 	      [rvc_mask] "r"(rvc_mask));
 #endif
 
-	if (virt)
-		csr_write(CSR_VSSTATUS, __vsstatus);
-
 	sbi_hart_set_trap_info(scratch, NULL);
 	switch (trap->cause) {
 	case CAUSE_LOAD_ACCESS:
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index d15986aeef6..56d51a0d708 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -130,16 +130,11 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			     struct sbi_scratch *scratch)
 {
 	ulong insn = csr_read(CSR_MTVAL);
-#if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
-#else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
-#endif
 	struct unpriv_trap uptrap;
 
 	if (unlikely((insn & 3) != 3)) {
 		if (insn == 0) {
-			insn = get_insn(regs->mepc, virt, scratch, &uptrap);
+			insn = get_insn(regs->mepc, scratch, &uptrap);
 			if (uptrap.cause)
 				return sbi_trap_redirect(regs, scratch,
 					regs->mepc, uptrap.cause, uptrap.tval);
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 10c467c4fb4..a41b9082314 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -29,12 +29,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	struct unpriv_trap uptrap;
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
-#if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
-#else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
-#endif
-	ulong insn = get_insn(regs->mepc, virt, scratch, &uptrap);
+	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 
 	if (uptrap.cause)
 		return sbi_trap_redirect(regs, scratch, regs->mepc,
@@ -136,12 +131,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 	struct unpriv_trap uptrap;
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
-#if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
-#else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
-#endif
-	ulong insn = get_insn(regs->mepc, virt, scratch, &uptrap);
+	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
 
 	if (uptrap.cause)
 		return sbi_trap_redirect(regs, scratch, regs->mepc,

From 0e1322bacbaccb34f167ebe243ab04836b99105c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 17 Nov 2019 14:16:24 +0530
Subject: [PATCH 0344/1765] lib: Better naming of unpriv APIs for wider use

The unpriv APIs can be useful to external firmware and out-of-tree
platform support code.

This patch adds "sbi_" prefix to unpriv load/store APIs and rename
struct riscv_unpriv to struct sbi_trap_info everywhere. We also
place struct sbi_trap_info in sbi/sbi_trap.h so that we can use
it for sbi_trap_redirect() as well.

Overall, this patch will make naming of unpriv APIs consistent
with other OpenSBI APIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h                        |  5 +-
 include/sbi/sbi_trap.h                       | 18 +++++-
 include/sbi/{riscv_unpriv.h => sbi_unpriv.h} | 30 ++++-----
 lib/sbi/objects.mk                           |  2 +-
 lib/sbi/sbi_ecall.c                          | 15 +++--
 lib/sbi/sbi_illegal_insn.c                   | 26 +++++---
 lib/sbi/sbi_ipi.c                            |  8 ++-
 lib/sbi/sbi_misaligned_ldst.c                | 64 +++++++++++---------
 lib/sbi/sbi_trap.c                           | 42 +++++++------
 lib/sbi/{riscv_unpriv.c => sbi_unpriv.c}     | 41 +++++++------
 10 files changed, 145 insertions(+), 106 deletions(-)
 rename include/sbi/{riscv_unpriv.h => sbi_unpriv.h} (56%)
 rename lib/sbi/{riscv_unpriv.c => sbi_unpriv.c} (81%)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 53468b28d67..378a3c8305d 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -10,7 +10,6 @@
 #ifndef __SBI_IPI_H__
 #define __SBI_IPI_H__
 
-#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_types.h>
 
 /* clang-format off */
@@ -24,12 +23,14 @@
 /* clang-format on */
 
 struct sbi_scratch;
+struct sbi_trap_info;
 
 struct sbi_ipi_data {
 	unsigned long ipi_type;
 };
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
+int sbi_ipi_send_many(struct sbi_scratch *scratch,
+		      struct sbi_trap_info *uptrap,
 		      ulong *pmask, u32 event, void *data);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index bc26ad130f4..4baa3a57a35 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -170,12 +170,24 @@ struct sbi_trap_regs {
 	unsigned long mstatusH;
 } __packed;
 
+/** Representation of trap details */
+struct sbi_trap_info {
+	/** epc Trap program counter */
+	unsigned long epc;
+	/** cause Trap exception cause */
+	unsigned long cause;
+	/** tval Trap value */
+	unsigned long tval;
+};
+
 struct sbi_scratch;
 
-int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
-		      ulong epc, ulong cause, ulong tval);
+int sbi_trap_redirect(struct sbi_trap_regs *regs,
+		      struct sbi_trap_info *trap,
+		      struct sbi_scratch *scratch);
 
-void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch);
+void sbi_trap_handler(struct sbi_trap_regs *regs,
+		      struct sbi_scratch *scratch);
 
 #endif
 
diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/sbi_unpriv.h
similarity index 56%
rename from include/sbi/riscv_unpriv.h
rename to include/sbi/sbi_unpriv.h
index bdea3a31098..747ba731dd0 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -7,27 +7,23 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#ifndef __RISCV_UNPRIV_H__
-#define __RISCV_UNPRIV_H__
+#ifndef __SBI_UNPRIV_H__
+#define __SBI_UNPRIV_H__
 
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch;
+struct sbi_trap_info;
 
-struct unpriv_trap {
-	unsigned long cause;
-	unsigned long tval;
-};
+#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type)           \
+	type sbi_load_##type(const type *addr,             \
+			     struct sbi_scratch *scratch,  \
+			     struct sbi_trap_info *trap);
 
-#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type)       \
-	type load_##type(const type *addr,             \
-			 struct sbi_scratch *scratch,  \
-			 struct unpriv_trap *trap);
-
-#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type)      \
-	void store_##type(type *addr, type val,        \
-			  struct sbi_scratch *scratch, \
-			  struct unpriv_trap *trap);
+#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type)          \
+	void sbi_store_##type(type *addr, type val,        \
+			      struct sbi_scratch *scratch, \
+			      struct sbi_trap_info *trap);
 
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u16)
@@ -42,7 +38,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
 
-ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
-	       struct unpriv_trap *trap);
+ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
+		   struct sbi_trap_info *trap);
 
 #endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index f2e8494be78..0e247fe0be6 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -11,7 +11,6 @@ libsbi-objs-y += riscv_asm.o
 libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
-libsbi-objs-y += riscv_unpriv.o
 
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
@@ -28,3 +27,4 @@ libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_string.o
+libsbi-objs-y += sbi_unpriv.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 5864590b799..a393919b3ed 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -118,7 +118,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
-	struct unpriv_trap uptrap = {0};
+	struct sbi_trap_info uptrap = {0};
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
@@ -190,9 +190,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	int ret = 0;
 	unsigned long extension_id = regs->a7;
 	unsigned long func_id = regs->a6;
+	struct sbi_trap_info trap = {0};
 	unsigned long out_val;
-	unsigned long out_tval;
-	unsigned long out_tcause;
 	bool is_0_1_spec = 0;
 	unsigned long args[6];
 
@@ -206,24 +205,24 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 	    extension_id <= SBI_EXT_0_1_SHUTDOWN) {
 		ret = sbi_ecall_0_1_handler(scratch, extension_id, args,
-					    &out_tval, &out_tcause);
+					    &trap.tval, &trap.cause);
 		is_0_1_spec = 1;
 	} else if (extension_id == SBI_EXT_BASE)
 		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
 					     args, &out_val,
-					     &out_tval, &out_tcause);
+					     &trap.tval, &trap.cause);
 	else if (extension_id >= SBI_EXT_VENDOR_START &&
 		extension_id <= SBI_EXT_VENDOR_END) {
 		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,
 						   func_id, args, &out_val,
-						   &out_tval, &out_tcause);
+						   &trap.tval, &trap.cause);
 	} else {
 		ret = SBI_ENOTSUPP;
 	}
 
 	if (ret == SBI_ETRAP) {
-		sbi_trap_redirect(regs, scratch, regs->mepc,
-				  out_tcause, out_tval);
+		trap.epc = regs->mepc;
+		sbi_trap_redirect(regs, &trap, scratch);
 	} else {
 		/* This function should return non-zero value only in case of
 		 * fatal error. However, there is no good way to distinguish
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 56d51a0d708..021ae37cb9c 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -9,12 +9,12 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
 
 typedef int (*illegal_insn_func)(ulong insn, u32 hartid, ulong mcause,
 				 struct sbi_trap_regs *regs,
@@ -24,7 +24,13 @@ static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
 			      struct sbi_trap_regs *regs,
 			      struct sbi_scratch *scratch)
 {
-	return sbi_trap_redirect(regs, scratch, regs->mepc, mcause, insn);
+	struct sbi_trap_info trap;
+
+	trap.epc = regs->mepc;
+	trap.cause = mcause;
+	trap.tval = insn;
+
+	return sbi_trap_redirect(regs, &trap, scratch);
 }
 
 static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
@@ -46,8 +52,8 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 	if ((regs->mstatus & MSTATUS_MPV) &&
 #endif
 	    (insn & INSN_MASK_WFI) == INSN_MATCH_WFI)
-		return sbi_trap_redirect(regs, scratch,
-					 regs->mepc, mcause, insn);
+		return truly_illegal_insn(insn, hartid, mcause,
+					  regs, scratch);
 
 	if (sbi_emulate_csr_read(csr_num, hartid, regs, scratch, &csr_val))
 		return truly_illegal_insn(insn, hartid, mcause,
@@ -130,14 +136,16 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
 			     struct sbi_scratch *scratch)
 {
 	ulong insn = csr_read(CSR_MTVAL);
-	struct unpriv_trap uptrap;
+	struct sbi_trap_info uptrap;
 
 	if (unlikely((insn & 3) != 3)) {
 		if (insn == 0) {
-			insn = get_insn(regs->mepc, scratch, &uptrap);
-			if (uptrap.cause)
-				return sbi_trap_redirect(regs, scratch,
-					regs->mepc, uptrap.cause, uptrap.tval);
+			insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+			if (uptrap.cause) {
+				uptrap.epc = regs->mepc;
+				return sbi_trap_redirect(regs, &uptrap,
+							 scratch);
+			}
 		}
 		if ((insn & 3) != 3)
 			return truly_illegal_insn(insn, hartid, mcause, regs,
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 1c84f9e052e..af8d62d551e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -11,12 +11,13 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
-#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_tlb.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
 
 static unsigned long ipi_data_off;
 
@@ -57,7 +58,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	return 0;
 }
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
+int sbi_ipi_send_many(struct sbi_scratch *scratch,
+		      struct sbi_trap_info *uptrap,
 		      ulong *pmask, u32 event, void *data)
 {
 	ulong i, m;
@@ -65,7 +67,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, struct unpriv_trap *uptrap,
 	u32 hartid = sbi_current_hartid();
 
 	if (pmask) {
-		mask &= load_ulong(pmask, scratch, uptrap);
+		mask &= sbi_load_ulong(pmask, scratch, uptrap);
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	}
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index a41b9082314..57c7af40c66 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -9,11 +9,11 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/riscv_unpriv.h>
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_misaligned_ldst.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
 
 union reg_data {
 	u8 data_bytes[8];
@@ -26,14 +26,15 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 				struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	struct unpriv_trap uptrap;
+	struct sbi_trap_info uptrap;
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
-	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
+	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
-	if (uptrap.cause)
-		return sbi_trap_redirect(regs, scratch, regs->mepc,
-					 uptrap.cause, uptrap.tval);
+	if (uptrap.cause) {
+		uptrap.epc = regs->mepc;
+		return sbi_trap_redirect(regs, &uptrap, scratch);
+	}
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
 		len   = 4;
@@ -96,17 +97,21 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 #endif
 #endif
 #endif
-	} else
-		return sbi_trap_redirect(regs, scratch, regs->mepc,
-					 mcause, addr);
+	} else {
+		uptrap.epc = regs->mepc;
+		uptrap.cause = mcause;
+		uptrap.tval = addr;
+		return sbi_trap_redirect(regs, &uptrap, scratch);
+	}
 
 	val.data_u64 = 0;
 	for (i = 0; i < len; i++) {
-		val.data_bytes[i] = load_u8((void *)(addr + i),
-					    scratch, &uptrap);
-		if (uptrap.cause)
-			return sbi_trap_redirect(regs, scratch, regs->mepc,
-						 uptrap.cause, uptrap.tval);
+		val.data_bytes[i] = sbi_load_u8((void *)(addr + i),
+						scratch, &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc = regs->mepc;
+			return sbi_trap_redirect(regs, &uptrap, scratch);
+		}
 	}
 
 	if (!fp)
@@ -128,14 +133,15 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 				 struct sbi_scratch *scratch)
 {
 	union reg_data val;
-	struct unpriv_trap uptrap;
+	struct sbi_trap_info uptrap;
 	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
-	ulong insn = get_insn(regs->mepc, scratch, &uptrap);
+	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
-	if (uptrap.cause)
-		return sbi_trap_redirect(regs, scratch, regs->mepc,
-					 uptrap.cause, uptrap.tval);
+	if (uptrap.cause) {
+		uptrap.epc = regs->mepc;
+		return sbi_trap_redirect(regs, &uptrap, scratch);
+	}
 
 	val.data_ulong = GET_RS2(insn, regs);
 
@@ -189,16 +195,20 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 #endif
 #endif
 #endif
-	} else
-		return sbi_trap_redirect(regs, scratch, regs->mepc,
-					 mcause, addr);
+	} else {
+		uptrap.epc = regs->mepc;
+		uptrap.cause = mcause;
+		uptrap.tval = addr;
+		return sbi_trap_redirect(regs, &uptrap, scratch);
+	}
 
 	for (i = 0; i < len; i++) {
-		store_u8((void *)(addr + i), val.data_bytes[i],
-			 scratch, &uptrap);
-		if (uptrap.cause)
-			return sbi_trap_redirect(regs, scratch, regs->mepc,
-						 uptrap.cause, uptrap.tval);
+		sbi_store_u8((void *)(addr + i), val.data_bytes[i],
+			     scratch, &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc = regs->mepc;
+			return sbi_trap_redirect(regs, &uptrap, scratch);
+		}
 	}
 
 	regs->mepc += INSN_LEN(insn);
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 5274c8b881b..7025ad98609 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -9,7 +9,6 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>
@@ -69,15 +68,14 @@ static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
  * Redirect trap to lower privledge mode (S-mode or U-mode)
  *
  * @param regs pointer to register state
+ * @param trap pointer to trap details
  * @param scratch pointer to sbi_scratch of current HART
- * @param epc error PC for lower privledge mode
- * @param cause exception cause for lower privledge mode
- * @param tval trap value for lower privledge mode
  *
  * @return 0 on success and negative error code on failure
  */
-int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
-		      ulong epc, ulong cause, ulong tval)
+int sbi_trap_redirect(struct sbi_trap_regs *regs,
+		      struct sbi_trap_info *trap,
+		      struct sbi_scratch *scratch)
 {
 	ulong hstatus, vsstatus, prev_mode;
 #if __riscv_xlen == 32
@@ -97,7 +95,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 
 	/* For certain exceptions from VS/VU-mode we redirect to VS-mode */
 	if (misa_extension('H') && prev_virt && !prev_stage2) {
-		switch (cause) {
+		switch (trap->cause) {
 		case CAUSE_FETCH_PAGE_FAULT:
 		case CAUSE_LOAD_PAGE_FAULT:
 		case CAUSE_STORE_PAGE_FAULT:
@@ -137,9 +135,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 	/* Update exception related CSRs */
 	if (next_virt) {
 		/* Update VS-mode exception info */
-		csr_write(CSR_VSTVAL, tval);
-		csr_write(CSR_VSEPC, epc);
-		csr_write(CSR_VSCAUSE, cause);
+		csr_write(CSR_VSTVAL, trap->tval);
+		csr_write(CSR_VSEPC, trap->epc);
+		csr_write(CSR_VSCAUSE, trap->cause);
 
 		/* Set MEPC to VS-mode exception vector base */
 		regs->mepc = csr_read(CSR_VSTVEC);
@@ -168,9 +166,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
 		csr_write(CSR_VSSTATUS, vsstatus);
 	} else {
 		/* Update S-mode exception info */
-		csr_write(CSR_STVAL, tval);
-		csr_write(CSR_SEPC, epc);
-		csr_write(CSR_SCAUSE, cause);
+		csr_write(CSR_STVAL, trap->tval);
+		csr_write(CSR_SEPC, trap->epc);
+		csr_write(CSR_SCAUSE, trap->cause);
 
 		/* Set MEPC to S-mode exception vector base */
 		regs->mepc = csr_read(CSR_STVEC);
@@ -211,14 +209,15 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs, struct sbi_scratch *scratch,
  * @param regs pointer to register state
  * @param scratch pointer to sbi_scratch of current HART
  */
-void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
+void sbi_trap_handler(struct sbi_trap_regs *regs,
+		      struct sbi_scratch *scratch)
 {
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
 	ulong mtval = csr_read(CSR_MTVAL);
-	struct unpriv_trap *uptrap;
+	struct sbi_trap_info trap, *uptrap;
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		mcause &= ~(1UL << (__riscv_xlen - 1));
@@ -262,19 +261,24 @@ void sbi_trap_handler(struct sbi_trap_regs *regs, struct sbi_scratch *scratch)
 		uptrap = sbi_hart_get_trap_info(scratch);
 		if ((regs->mstatus & MSTATUS_MPRV) && uptrap) {
 			rc = 0;
+			uptrap->epc = regs->mepc;
 			regs->mepc += 4;
 			uptrap->cause = mcause;
 			uptrap->tval = mtval;
 		} else {
-			rc = sbi_trap_redirect(regs, scratch, regs->mepc,
-					       mcause, mtval);
+			trap.epc = regs->mepc;
+			trap.cause = mcause;
+			trap.tval = mtval;
+			rc = sbi_trap_redirect(regs, &trap, scratch);
 		}
 		msg = "page/access fault handler failed";
 		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
-		rc = sbi_trap_redirect(regs, scratch, regs->mepc,
-				       mcause, mtval);
+		trap.epc = regs->mepc;
+		trap.cause = mcause;
+		trap.tval = mtval;
+		rc = sbi_trap_redirect(regs, &trap, scratch);
 		break;
 	};
 
diff --git a/lib/sbi/riscv_unpriv.c b/lib/sbi/sbi_unpriv.c
similarity index 81%
rename from lib/sbi/riscv_unpriv.c
rename to lib/sbi/sbi_unpriv.c
index e84c23ed0aa..aa74c43db00 100644
--- a/lib/sbi/riscv_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -8,18 +8,20 @@
  */
 
 #include <sbi/riscv_encoding.h>
-#include <sbi/riscv_unpriv.h>
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
 
 #define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
-	type load_##type(const type *addr,                                    \
-			struct sbi_scratch *scratch,                          \
-			struct unpriv_trap *trap)                             \
+	type sbi_load_##type(const type *addr,                                \
+			     struct sbi_scratch *scratch,                     \
+			     struct sbi_trap_info *trap)                      \
 	{                                                                     \
 		register ulong __mstatus asm("a2");                           \
 		type val = 0;                                                 \
+		trap->epc = 0;                                                \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
 		sbi_hart_set_trap_info(scratch, trap);                        \
@@ -37,11 +39,12 @@
 	}
 
 #define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
-	void store_##type(type *addr, type val,                               \
-			struct sbi_scratch *scratch,                          \
-			struct unpriv_trap *trap)                             \
+	void sbi_store_##type(type *addr, type val,                           \
+			      struct sbi_scratch *scratch,                    \
+			      struct sbi_trap_info *trap)                     \
 	{                                                                     \
 		register ulong __mstatus asm("a3");                           \
+		trap->epc = 0;                                                \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
 		sbi_hart_set_trap_info(scratch, trap);                        \
@@ -74,41 +77,44 @@ DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
-u64 load_u64(const u64 *addr,
-	     struct sbi_scratch *scratch, struct unpriv_trap *trap)
+u64 sbi_load_u64(const u64 *addr,
+		 struct sbi_scratch *scratch,
+		 struct sbi_trap_info *trap)
 {
-	u64 ret = load_u32((u32 *)addr, scratch, trap);
+	u64 ret = sbi_load_u32((u32 *)addr, scratch, trap);
 
 	if (trap->cause)
 		return 0;
-	ret |= ((u64)load_u32((u32 *)addr + 1, scratch, trap) << 32);
+	ret |= ((u64)sbi_load_u32((u32 *)addr + 1, scratch, trap) << 32);
 	if (trap->cause)
 		return 0;
 
 	return ret;
 }
 
-void store_u64(u64 *addr, u64 val,
-	       struct sbi_scratch *scratch, struct unpriv_trap *trap)
+void sbi_store_u64(u64 *addr, u64 val,
+		   struct sbi_scratch *scratch,
+		   struct sbi_trap_info *trap)
 {
-	store_u32((u32 *)addr, val, scratch, trap);
+	sbi_store_u32((u32 *)addr, val, scratch, trap);
 	if (trap->cause)
 		return;
 
-	store_u32((u32 *)addr + 1, val >> 32, scratch, trap);
+	sbi_store_u32((u32 *)addr + 1, val >> 32, scratch, trap);
 	if (trap->cause)
 		return;
 }
 #endif
 
-ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
-	       struct unpriv_trap *trap)
+ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
+		   struct sbi_trap_info *trap)
 {
 	ulong __mstatus = 0, val = 0;
 #ifdef __riscv_compressed
 	ulong rvc_mask = 3, tmp;
 #endif
 
+	trap->epc = 0;
 	trap->cause = 0;
 	trap->tval = 0;
 	sbi_hart_set_trap_info(scratch, trap);
@@ -147,6 +153,7 @@ ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
 #endif
 
 	sbi_hart_set_trap_info(scratch, NULL);
+
 	switch (trap->cause) {
 	case CAUSE_LOAD_ACCESS:
 		trap->cause = CAUSE_FETCH_ACCESS;

From 75f903dd78e2419057d04e14d6720fde764cbf78 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 17 Nov 2019 15:25:41 +0530
Subject: [PATCH 0345/1765] lib: Simplify trap parameters in sbi_ecall
 functions

The out_tcause and out_tval parameters are not sufficient for most
sbi_ecall functions because this will grow in-future when we support
RISC-V hypervisor v0.5 draft. We replace these parameters with out_trap
which is a pointer to struct sbi_trap_info.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 35 +++++++++++++++----------------
 lib/sbi/sbi_ecall.c        | 43 ++++++++++++++++----------------------
 2 files changed, 35 insertions(+), 43 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index fdf30b96002..01d4a85454e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -41,10 +41,11 @@
 
 #ifndef __ASSEMBLY__
 
-#include <sbi/sbi_version.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_version.h>
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
@@ -119,9 +120,9 @@ struct sbi_platform_operations {
 	int (*vendor_ext_check)(long extid);
 	/** platform specific SBI extension implementation provider */
 	int (*vendor_ext_provider)(long extid, long funcid,
-			unsigned long *args, unsigned long *out_value,
-			unsigned long *out_trap_cause,
-			unsigned long *out_trap_val);
+				   unsigned long *args,
+				   unsigned long *out_value,
+				   struct sbi_trap_info *out_trap);
 } __packed;
 
 /** Representation of a platform */
@@ -540,25 +541,23 @@ static inline int sbi_platform_vendor_ext_check(const struct sbi_platform *plat,
  * @param extid	vendor SBI extension id
  * @param funcid SBI function id within the extension id
  * @param args pointer to arguments passed by the caller
- * @param out_value output value that can be filled the callee
- * @param out_tcause trap cause that can be filled the callee
- * @param out_tvalue possible trap value that can be filled the callee
+ * @param out_value output value that can be filled by the callee
+ * @param out_trap trap info that can be filled by the callee
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_vendor_ext_provider(const struct sbi_platform *plat,
-						   long extid, long funcid,
-						   unsigned long *args,
-						   unsigned long *out_value,
-						   unsigned long *out_tcause,
-						   unsigned long *out_tval)
+static inline int sbi_platform_vendor_ext_provider(
+					const struct sbi_platform *plat,
+					long extid, long funcid,
+					unsigned long *args,
+					unsigned long *out_value,
+					struct sbi_trap_info *out_trap)
 {
 	if (plat && sbi_platform_ops(plat)->vendor_ext_provider) {
 		return sbi_platform_ops(plat)->vendor_ext_provider(extid,
-								   funcid, args,
-								  out_value,
-								  out_tcause,
-								  out_tval);
+								funcid, args,
+								out_value,
+								out_trap);
 	}
 
 	return SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index a393919b3ed..913e8db2190 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -64,18 +64,17 @@ int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 int sbi_ecall_vendor_ext_handler(struct sbi_scratch *scratch,
 				 unsigned long extid, unsigned long funcid,
 				 unsigned long *args, unsigned long *out_val,
-				 unsigned long *out_tcause,
-				 unsigned long *out_tval)
+				 struct sbi_trap_info *out_trap)
 {
 	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
-					       extid, funcid, args, out_val,
-					       out_tcause, out_tval);
+						extid, funcid, args,
+						out_val, out_trap);
 }
 
-int sbi_ecall_base_handler(struct sbi_scratch *scratch, unsigned long extid,
-			   unsigned long funcid, unsigned long *args,
-			   unsigned long *out_val, unsigned long *out_tcause,
-			   unsigned long *out_tval)
+int sbi_ecall_base_handler(struct sbi_scratch *scratch,
+			   unsigned long extid, unsigned long funcid,
+			   unsigned long *args, unsigned long *out_val,
+			   struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
@@ -111,14 +110,13 @@ int sbi_ecall_base_handler(struct sbi_scratch *scratch, unsigned long extid,
 	return ret;
 }
 
-int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
-			   unsigned long *args, unsigned long *tval,
-			   unsigned long *tcause)
+int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
+			  unsigned long extid, unsigned long *args,
+			  struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
-	struct sbi_trap_info uptrap = {0};
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
@@ -139,7 +137,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		sbi_ipi_clear_smode(scratch);
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
+		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
 					SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
@@ -147,7 +145,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
+		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
 					SBI_IPI_EVENT_FENCE_I, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
@@ -156,7 +154,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
+		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
 					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
@@ -166,7 +164,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, &uptrap, (ulong *)args[0],
+		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
 					SBI_IPI_EVENT_SFENCE_VMA_ASID,
 					&tlb_info);
 		break;
@@ -177,10 +175,6 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = SBI_ENOTSUPP;
 	};
 
-	if (ret == SBI_ETRAP) {
-		*tcause = uptrap.cause;
-		*tval = uptrap.tval;
-	}
 	return ret;
 }
 
@@ -204,18 +198,17 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 
 	if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 	    extension_id <= SBI_EXT_0_1_SHUTDOWN) {
-		ret = sbi_ecall_0_1_handler(scratch, extension_id, args,
-					    &trap.tval, &trap.cause);
+		ret = sbi_ecall_0_1_handler(scratch, extension_id,
+					    args, &trap);
 		is_0_1_spec = 1;
 	} else if (extension_id == SBI_EXT_BASE)
 		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
-					     args, &out_val,
-					     &trap.tval, &trap.cause);
+					     args, &out_val, &trap);
 	else if (extension_id >= SBI_EXT_VENDOR_START &&
 		extension_id <= SBI_EXT_VENDOR_END) {
 		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,
 						   func_id, args, &out_val,
-						   &trap.tval, &trap.cause);
+						   &trap);
 	} else {
 		ret = SBI_ENOTSUPP;
 	}

From c96cc03fcc2723fa007b65e5ae6fe2673ea41413 Mon Sep 17 00:00:00 2001
From: Xiang Wang <merle@hardenedlinux.org>
Date: Tue, 26 Nov 2019 16:06:29 +0530
Subject: [PATCH 0346/1765] lib: Fix CPU capabilities detection function

On some platforms, misa may not be implemented. On such a platform,
reading misa will get 0. At this time, platform is required to
implement a non-standard function to detect the CPU's capabilities.
Therefore, this modification add interfaces for non-standard function.

The MXL field of misa is always at the highest two bits, whether it
is a 32-bit 64-bit or a 128-bit machine. Therefore, this modification
fixes the use of a fixed offset to detect the machine length.

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h    | 16 ++++++---------
 include/sbi/sbi_platform.h | 40 ++++++++++++++++++++++++++++++++++++++
 lib/sbi/riscv_asm.c        | 32 ++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c         | 13 +++++++++++--
 4 files changed, 89 insertions(+), 12 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 4f12c03b3cb..04502e1f3e8 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -159,22 +159,18 @@ void csr_write_num(int csr_num, unsigned long val);
 		__asm__ __volatile__("wfi" ::: "memory"); \
 	} while (0)
 
-static inline int misa_extension(char ext)
-{
-	return csr_read(CSR_MISA) & (1 << (ext - 'A'));
-}
+/* Determine CPU extension, return non-zero support */
+int misa_extension(char ext);
 
-static inline int misa_xlen(void)
-{
-	return ((long)csr_read(CSR_MISA) < 0) ? 64 : 32;
-}
+/* Get MXL field of misa, return -1 on error */
+int misa_xlen(void);
 
 static inline void misa_string(char *out, unsigned int out_sz)
 {
-	unsigned long i, val = csr_read(CSR_MISA);
+	unsigned long i;
 
 	for (i = 0; i < 26; i++) {
-		if (val & (1 << i)) {
+		if (misa_extension('A' + i)) {
 			*out = 'A' + i;
 			out++;
 		}
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 01d4a85454e..beb2f237435 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -76,6 +76,16 @@ struct sbi_platform_operations {
 	/** Platform final initialization */
 	int (*final_init)(bool cold_boot);
 
+	/** For platforms that do not implement misa, non-standard
+	 * methods are needed to determine cpu extension.
+	 */
+	int (*misa_check_extension)(char ext);
+
+	/** For platforms that do not implement misa, non-standard
+	 * methods are needed to get MXL field of misa.
+	 */
+	int (*misa_get_xlen)(void);
+
 	/** Get number of PMP regions for given HART */
 	u32 (*pmp_region_count)(u32 hartid);
 	/**
@@ -291,6 +301,36 @@ static inline int sbi_platform_final_init(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Check CPU extension in MISA
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param ext shorthand letter for CPU extensions
+ *
+ * @return zero for not-supported and non-zero for supported
+ */
+static inline int sbi_platform_misa_extension(const struct sbi_platform *plat,
+					      char ext)
+{
+	if (plat && sbi_platform_ops(plat)->misa_check_extension)
+		return sbi_platform_ops(plat)->misa_check_extension(ext);
+	return 0;
+}
+
+/**
+ * Get MXL field of MISA
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 1/2/3 on success and error code on failure
+ */
+static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->misa_get_xlen)
+		return sbi_platform_ops(plat)->misa_get_xlen();
+	return -1;
+}
+
 /**
  * Get the number of PMP regions of a HART
  *
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index e0c8889a251..d16e32a848e 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -10,6 +10,38 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_platform.h>
+
+int misa_extension(char ext)
+{
+	unsigned long misa = csr_read(CSR_MISA);
+
+	if (misa)
+		return misa & (1 << (ext - 'A'));
+
+	return sbi_platform_misa_extension(sbi_platform_thishart_ptr(), ext);
+}
+
+int misa_xlen(void)
+{
+	long r;
+
+	if (csr_read(CSR_MISA) == 0)
+		return sbi_platform_misa_xlen(sbi_platform_thishart_ptr());
+
+	__asm__ __volatile__(
+		"csrr   t0, misa\n\t"
+		"slti   t1, t0, 0\n\t"
+		"slli   t1, t1, 1\n\t"
+		"slli   t0, t0, 1\n\t"
+		"slti   t0, t0, 0\n\t"
+		"add    %0, t0, t1"
+		: "=r"(r)
+		:
+		: "t0", "t1");
+
+	return r ? r : -1;
+}
 
 unsigned long csr_read_num(int csr_num)
 {
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 265bb025f12..51ce3a0e7df 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -30,10 +30,10 @@
 
 static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 {
+	int xlen;
 	char str[64];
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	misa_string(str, sizeof(str));
 #ifdef OPENSBI_VERSION_GIT
 	sbi_printf("\nOpenSBI %s\n", OPENSBI_VERSION_GIT);
 #else
@@ -43,9 +43,18 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_printf(BANNER);
 
+	/* Determine MISA XLEN and MISA string */
+	xlen = misa_xlen();
+	if (xlen < 1) {
+		sbi_printf("Error %d getting MISA XLEN\n", xlen);
+		sbi_hart_hang();
+	}
+	xlen = 16 * (1 << xlen);
+	misa_string(str, sizeof(str));
+
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
-	sbi_printf("Platform HART Features : RV%d%s\n", misa_xlen(), str);
+	sbi_printf("Platform HART Features : RV%d%s\n", xlen, str);
 	sbi_printf("Platform Max HARTs     : %d\n",
 		   sbi_platform_hart_count(plat));
 	sbi_printf("Current Hart           : %u\n", hartid);

From ab14f94a8ca3acf1b746b854612f44b7f432a522 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 25 Nov 2019 19:24:29 -0800
Subject: [PATCH 0347/1765] lib: Fix probe extension

The break statement is missing in base extension function handling.

Fix the typo.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 913e8db2190..785786f288d 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -103,6 +103,7 @@ int sbi_ecall_base_handler(struct sbi_scratch *scratch,
 		break;
 	case SBI_EXT_BASE_PROBE_EXT:
 		ret = sbi_check_extension(scratch, args[0], out_val);
+		break;
 	default:
 		ret = SBI_ENOTSUPP;
 	}

From 813f7f4c250af9f7c9546f64778e9b35bb7d7dcb Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 27 Nov 2019 14:16:52 +0800
Subject: [PATCH 0348/1765] lib: Add error detection for misa_extension

Add assertions for misa_extension to prevent incoming illegal
characters.

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h | 14 +++++++++++---
 lib/sbi/riscv_asm.c     |  3 ++-
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 04502e1f3e8..c3d5985ef33 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -159,8 +159,16 @@ void csr_write_num(int csr_num, unsigned long val);
 		__asm__ __volatile__("wfi" ::: "memory"); \
 	} while (0)
 
-/* Determine CPU extension, return non-zero support */
-int misa_extension(char ext);
+
+/* determine CPU extension, return non-zero support */
+int misa_extension_imp(char ext);
+
+#define misa_extension(c)\
+({\
+	_Static_assert(((c >= 'A') && (c <= 'Z')),\
+		"The parameter of misa_extension must be [A-Z]");\
+	misa_extension_imp(c);\
+})
 
 /* Get MXL field of misa, return -1 on error */
 int misa_xlen(void);
@@ -170,7 +178,7 @@ static inline void misa_string(char *out, unsigned int out_sz)
 	unsigned long i;
 
 	for (i = 0; i < 26; i++) {
-		if (misa_extension('A' + i)) {
+		if (misa_extension_imp('A' + i)) {
 			*out = 'A' + i;
 			out++;
 		}
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index d16e32a848e..7b612d4b1f3 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -12,7 +12,8 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
 
-int misa_extension(char ext)
+/* determine CPU extension, return non-zero support */
+int misa_extension_imp(char ext)
 {
 	unsigned long misa = csr_read(CSR_MISA);
 

From dc40042322fecd0c3eec90fcf4528f211ee2fa58 Mon Sep 17 00:00:00 2001
From: Martin Pietryka <martin@pietryka.at>
Date: Wed, 4 Dec 2019 07:25:51 +0100
Subject: [PATCH 0349/1765] include: sbi_platform: fix compilation for GCC-9

GCC-9 will throw a warning when using the %s format specifier with a
possible NULL parameter and since -Werror is used, the compilation breaks
for GCC-9.

In function 'sbi_boot_prints',
    inlined from 'init_coldboot' at <redacted>/opensbi/lib/sbi/sbi_init.c:107:3,
    inlined from 'sbi_init' at <redacted>/opensbi/lib/sbi/sbi_init.c:189:3:
<redacted>/opensbi/lib/sbi/sbi_init.c:56:2: error: '%s' directive argument is null [-Werror=format-overflow=]
   56 |  sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
      |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

This is one way to fix this, currently there is nothing in the tree
checking for `sbi_platfrom_name() == NULL` so we can just return "Unknown"
instead of NULL on failure.

Signed-off-by: Martin Pietryka <martin@pietryka.at>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
---
 include/sbi/sbi_platform.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index beb2f237435..010328eb684 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -200,13 +200,13 @@ struct sbi_platform {
  *
  * @param plat pointer to struct sbi_platform
  *
- * @return pointer to platform name on success and NULL on failure
+ * @return pointer to platform name on success and "Unknown" on failure
  */
 static inline const char *sbi_platform_name(const struct sbi_platform *plat)
 {
 	if (plat)
 		return plat->name;
-	return NULL;
+	return "Unknown";
 }
 
 /**

From bd732ae612407a05c3394bc19ede98013b0b35d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 23:05:03 +0530
Subject: [PATCH 0350/1765] include: Add guest external interrupt related
 defines

With RISC-V H-extension v0.5 draft, we have special support for guest
external interrupts so this patch adds related defines which were
missed-out previously.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/riscv_encoding.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 316d74313e5..6dd0d300662 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -78,6 +78,7 @@
 #define IRQ_S_EXT			9
 #define IRQ_VS_EXT			10
 #define IRQ_M_EXT			11
+#define IRQ_S_GEXT			12
 
 #define MIP_SSIP			(_UL(1) << IRQ_S_SOFT)
 #define MIP_VSSIP			(_UL(1) << IRQ_VS_SOFT)
@@ -88,6 +89,7 @@
 #define MIP_SEIP			(_UL(1) << IRQ_S_EXT)
 #define MIP_VSEIP			(_UL(1) << IRQ_VS_EXT)
 #define MIP_MEIP			(_UL(1) << IRQ_M_EXT)
+#define MIP_SGEIP			(_UL(1) << IRQ_S_GEXT)
 
 #define SIP_SSIP			MIP_SSIP
 #define SIP_STIP			MIP_STIP
@@ -213,10 +215,12 @@
 #define CSR_HTIMEDELTA			0x605
 #define CSR_HTIMEDELTAH			0x615
 #define CSR_HCOUNTERNEN			0x606
+#define CSR_HGEIE			0x607
 #define CSR_HTVAL			0x643
 #define CSR_HIP				0x644
 #define CSR_HTINST			0x64a
 #define CSR_HGATP			0x680
+#define CSR_HGEIP			0xe07
 
 #define CSR_VSSTATUS			0x200
 #define CSR_VSIE			0x204

From 6590a7dab9d7182b659a13338043889350d9c6bb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 07:00:59 +0530
Subject: [PATCH 0351/1765] lib: Delegate guest page faults to HS-mode

As-per RISC-V hypervisor v0.5 spec, we have new guest page faults
which need to be delegated to HS-mode.

Also, we can have bits in in MIDELEG and MEDELEG hardwired to 1
which means we need to fix the sainty check on these CSRs at the
end of delegate_traps() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi/sbi_hart.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index dee2e21673d..493e7fcbb03 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -88,19 +88,25 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 			      (1U << CAUSE_STORE_PAGE_FAULT);
 
 	/*
-	 * If hypervisor extension available then we only handle
-	 * hypervisor calls (i.e. ecalls from HS-mode) and we let
-	 * HS-mode handle supervisor calls (i.e. ecalls from VS-mode)
+	 * If hypervisor extension available then we only handle hypervisor
+	 * calls (i.e. ecalls from HS-mode) in M-mode.
+	 *
+	 * The HS-mode will additionally handle supervisor calls (i.e. ecalls
+	 * from VS-mode), Guest page faults and Virtual interrupts.
 	 */
-	if (misa_extension('H'))
+	if (misa_extension('H')) {
 		exceptions |= (1U << CAUSE_SUPERVISOR_ECALL);
+		exceptions |= (1U << CAUSE_FETCH_GUEST_PAGE_FAULT);
+		exceptions |= (1U << CAUSE_LOAD_GUEST_PAGE_FAULT);
+		exceptions |= (1U << CAUSE_STORE_GUEST_PAGE_FAULT);
+	}
 
 	csr_write(CSR_MIDELEG, interrupts);
 	csr_write(CSR_MEDELEG, exceptions);
 
-	if (csr_read(CSR_MIDELEG) != interrupts)
+	if ((csr_read(CSR_MIDELEG) & interrupts) != interrupts)
 		return SBI_EFAIL;
-	if (csr_read(CSR_MEDELEG) != exceptions)
+	if ((csr_read(CSR_MEDELEG) & exceptions) != exceptions)
 		return SBI_EFAIL;
 
 	return 0;

From 4370f18f3467fee4a80fd463f1c0247d02f912d6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 07:22:03 +0530
Subject: [PATCH 0352/1765] include: Extend struct sbi_trap_info for mtval2 and
 mtinst

We have two new trap CSRs namely mtval2 and mtinst when
RISC-V hypervisor extension is available hence we extend
struct sbi_trap_info accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_trap.h | 4 ++++
 lib/sbi/sbi_unpriv.c   | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 4baa3a57a35..9a35a6e54e9 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -178,6 +178,10 @@ struct sbi_trap_info {
 	unsigned long cause;
 	/** tval Trap value */
 	unsigned long tval;
+	/** tval2 Trap value 2 */
+	unsigned long tval2;
+	/** tinst Trap instruction */
+	unsigned long tinst;
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index aa74c43db00..9d384bb32f3 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -24,6 +24,8 @@
 		trap->epc = 0;                                                \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
+		trap->tval2 = 0;                                              \
+		trap->tinst = 0;                                              \
 		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
@@ -47,6 +49,8 @@
 		trap->epc = 0;                                                \
 		trap->cause = 0;                                              \
 		trap->tval = 0;                                               \
+		trap->tval2 = 0;                                              \
+		trap->tinst = 0;                                              \
 		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
 			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
@@ -117,6 +121,8 @@ ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
 	trap->epc = 0;
 	trap->cause = 0;
 	trap->tval = 0;
+	trap->tval2 = 0;
+	trap->tinst = 0;
 	sbi_hart_set_trap_info(scratch, trap);
 
 #ifndef __riscv_compressed

From 086dbdfc926301c8273a64a064452b7d97f0d9a4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 07:31:38 +0530
Subject: [PATCH 0353/1765] lib: Fix sbi_get_insn() for load guest page fault

We should treat load guest page fault in sbi_get_insn() as
fetch guest patch fault.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi/sbi_unpriv.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 9d384bb32f3..07ef4a9badf 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -169,6 +169,10 @@ ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
 		trap->cause = CAUSE_FETCH_PAGE_FAULT;
 		trap->tval = mepc;
 		break;
+	case CAUSE_LOAD_GUEST_PAGE_FAULT:
+		trap->cause = CAUSE_FETCH_GUEST_PAGE_FAULT;
+		trap->tval = mepc;
+		break;
 	default:
 		break;
 	};

From 2be424bd28560d5399788ed16f663f7785a8c5f9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 22:23:30 +0530
Subject: [PATCH 0354/1765] lib: Extend trap redirection for hypervisor v0.5
 spec

The hypervisor v0.5 spec introduces two new CSRs for both M-mode
and HS-mode which need to be considered when redirecting traps
hence this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h      |  3 --
 include/sbi/sbi_illegal_insn.h    |  2 +-
 include/sbi/sbi_misaligned_ldst.h |  2 ++
 lib/sbi/sbi_hart.c                |  2 --
 lib/sbi/sbi_illegal_insn.c        |  5 +--
 lib/sbi/sbi_misaligned_ldst.c     |  8 +++--
 lib/sbi/sbi_trap.c                | 56 ++++++++++++++++++++-----------
 7 files changed, 49 insertions(+), 29 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 6dd0d300662..1cf624bff29 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -37,12 +37,10 @@
 #define MSTATUS_SXL			_ULL(0x0000000C00000000)
 #define MSTATUS_SBE			_ULL(0x0000001000000000)
 #define MSTATUS_MBE			_ULL(0x0000002000000000)
-#define MSTATUS_MTL			_ULL(0x0000004000000000)
 #define MSTATUS_MPV			_ULL(0x0000008000000000)
 #else
 #define MSTATUSH_SBE			_UL(0x00000010)
 #define MSTATUSH_MBE			_UL(0x00000020)
-#define MSTATUSH_MTL			_UL(0x00000040)
 #define MSTATUSH_MPV			_UL(0x00000080)
 #endif
 #define MSTATUS32_SD			_UL(0x80000000)
@@ -66,7 +64,6 @@
 #define HSTATUS_SP2V			_UL(0x00000200)
 #define HSTATUS_SP2P			_UL(0x00000100)
 #define HSTATUS_SPV			_UL(0x00000080)
-#define HSTATUS_STL			_UL(0x00000040)
 #define HSTATUS_SPRV			_UL(0x00000001)
 
 #define IRQ_S_SOFT			1
diff --git a/include/sbi/sbi_illegal_insn.h b/include/sbi/sbi_illegal_insn.h
index 2dc09888da2..1e1f74a1164 100644
--- a/include/sbi/sbi_illegal_insn.h
+++ b/include/sbi/sbi_illegal_insn.h
@@ -15,7 +15,7 @@
 struct sbi_trap_regs;
 struct sbi_scratch;
 
-int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
+int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
 			     struct sbi_trap_regs *regs,
 			     struct sbi_scratch *scratch);
 
diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h
index c631f763109..d95c8455a6c 100644
--- a/include/sbi/sbi_misaligned_ldst.h
+++ b/include/sbi/sbi_misaligned_ldst.h
@@ -16,10 +16,12 @@ struct sbi_trap_regs;
 struct sbi_scratch;
 
 int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
+				ulong addr, ulong tval2, ulong tinst,
 				struct sbi_trap_regs *regs,
 				struct sbi_scratch *scratch);
 
 int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
+				 ulong addr, ulong tval2, ulong tinst,
 				 struct sbi_trap_regs *regs,
 				 struct sbi_scratch *scratch);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 493e7fcbb03..a704c60c644 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -277,7 +277,6 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 #if __riscv_xlen == 32
 	if (misa_extension('H')) {
 		valH = csr_read(CSR_MSTATUSH);
-		valH = INSERT_FIELD(valH, MSTATUSH_MTL, 0);
 		if (next_virt)
 			valH = INSERT_FIELD(valH, MSTATUSH_MPV, 1);
 		else
@@ -286,7 +285,6 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	}
 #else
 	if (misa_extension('H')) {
-		val = INSERT_FIELD(val, MSTATUS_MTL, 0);
 		if (next_virt)
 			val = INSERT_FIELD(val, MSTATUS_MPV, 1);
 		else
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 021ae37cb9c..e3c7809acce 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -29,6 +29,8 @@ static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
 	trap.epc = regs->mepc;
 	trap.cause = mcause;
 	trap.tval = insn;
+	trap.tval2 = 0;
+	trap.tinst = 0;
 
 	return sbi_trap_redirect(regs, &trap, scratch);
 }
@@ -131,11 +133,10 @@ static illegal_insn_func illegal_insn_table[32] = {
 	truly_illegal_insn  /* 31 */
 };
 
-int sbi_illegal_insn_handler(u32 hartid, ulong mcause,
+int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
 			     struct sbi_trap_regs *regs,
 			     struct sbi_scratch *scratch)
 {
-	ulong insn = csr_read(CSR_MTVAL);
 	struct sbi_trap_info uptrap;
 
 	if (unlikely((insn & 3) != 3)) {
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 57c7af40c66..314b2f317eb 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -22,12 +22,12 @@ union reg_data {
 };
 
 int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
+				ulong addr, ulong tval2, ulong tinst,
 				struct sbi_trap_regs *regs,
 				struct sbi_scratch *scratch)
 {
 	union reg_data val;
 	struct sbi_trap_info uptrap;
-	ulong addr = csr_read(CSR_MTVAL);
 	int i, fp = 0, shift = 0, len = 0;
 	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
@@ -101,6 +101,8 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		uptrap.epc = regs->mepc;
 		uptrap.cause = mcause;
 		uptrap.tval = addr;
+		uptrap.tval2 = tval2;
+		uptrap.tinst = tinst;
 		return sbi_trap_redirect(regs, &uptrap, scratch);
 	}
 
@@ -129,12 +131,12 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 }
 
 int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
+				 ulong addr, ulong tval2, ulong tinst,
 				 struct sbi_trap_regs *regs,
 				 struct sbi_scratch *scratch)
 {
 	union reg_data val;
 	struct sbi_trap_info uptrap;
-	ulong addr = csr_read(CSR_MTVAL);
 	int i, len = 0;
 	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
@@ -199,6 +201,8 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		uptrap.epc = regs->mepc;
 		uptrap.cause = mcause;
 		uptrap.tval = addr;
+		uptrap.tval2 = tval2;
+		uptrap.tinst = tinst;
 		return sbi_trap_redirect(regs, &uptrap, scratch);
 	}
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 7025ad98609..d5ab24b10ab 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -20,12 +20,17 @@
 #include <sbi/sbi_trap.h>
 
 static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
-				      ulong mcause, ulong mtval,
-				      struct sbi_trap_regs *regs)
+				      ulong mcause, ulong mtval, ulong mtval2,
+				      ulong mtinst, struct sbi_trap_regs *regs)
 {
 	sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc);
 	sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n",
 		   __func__, hartid, mcause, mtval);
+	if (misa_extension('H')) {
+		sbi_printf("%s: hart%d: mtval2=0x%" PRILX
+			   " mtinst=0x%" PRILX "\n",
+			   __func__, hartid, mtval2, mtinst);
+	}
 	sbi_printf("%s: hart%d: mepc=0x%" PRILX " mstatus=0x%" PRILX "\n",
 		   __func__, hartid, regs->mepc, regs->mstatus);
 	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
@@ -80,10 +85,8 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	ulong hstatus, vsstatus, prev_mode;
 #if __riscv_xlen == 32
 	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
-	bool prev_stage2 = (regs->mstatusH & MSTATUSH_MTL) ? TRUE : FALSE;
 #else
 	bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
-	bool prev_stage2 = (regs->mstatus & MSTATUS_MTL) ? TRUE : FALSE;
 #endif
 	/* By default, we redirect to HS-mode */
 	bool next_virt = FALSE;
@@ -94,7 +97,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		return SBI_ENOTSUPP;
 
 	/* For certain exceptions from VS/VU-mode we redirect to VS-mode */
-	if (misa_extension('H') && prev_virt && !prev_stage2) {
+	if (misa_extension('H') && prev_virt) {
 		switch (trap->cause) {
 		case CAUSE_FETCH_PAGE_FAULT:
 		case CAUSE_LOAD_PAGE_FAULT:
@@ -106,20 +109,18 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		};
 	}
 
-	/* Update MSTATUS MPV and MTL bits */
+	/* Update MSTATUS MPV bits */
 #if __riscv_xlen == 32
 	regs->mstatusH &= ~MSTATUSH_MPV;
 	regs->mstatusH |= (next_virt) ? MSTATUSH_MPV : 0UL;
-	regs->mstatusH &= ~MSTATUSH_MTL;
 #else
 	regs->mstatus &= ~MSTATUS_MPV;
 	regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL;
-	regs->mstatus &= ~MSTATUS_MTL;
 #endif
 
 	/* Update HSTATUS for VS/VU-mode to HS-mode transition */
 	if (misa_extension('H') && prev_virt && !next_virt) {
-		/* Update HSTATUS SP2P, SP2V, SPV, and STL bits */
+		/* Update HSTATUS SP2P, SP2V, and SPV bits */
 		hstatus = csr_read(CSR_HSTATUS);
 		hstatus &= ~HSTATUS_SP2P;
 		hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SP2P : 0;
@@ -127,9 +128,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		hstatus |= (hstatus & HSTATUS_SPV) ? HSTATUS_SP2V : 0;
 		hstatus &= ~HSTATUS_SPV;
 		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
-		hstatus &= ~HSTATUS_STL;
-		hstatus |= (prev_stage2) ? HSTATUS_STL : 0;
 		csr_write(CSR_HSTATUS, hstatus);
+		csr_write(CSR_HTVAL, trap->tval2);
+		csr_write(CSR_HTINST, trap->tinst);
 	}
 
 	/* Update exception related CSRs */
@@ -203,8 +204,10 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
  * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
  * 2. The 'mcause' CSR is having exception/interrupt cause
  * 3. The 'mtval' CSR is having additional trap information
- * 4. Stack pointer (SP) is setup for current HART
- * 5. Interrupts are disabled in MSTATUS CSR
+ * 4. The 'mtval2' CSR is having additional trap information
+ * 5. The 'mtinst' CSR is having decoded trap instruction
+ * 6. Stack pointer (SP) is setup for current HART
+ * 7. Interrupts are disabled in MSTATUS CSR
  *
  * @param regs pointer to register state
  * @param scratch pointer to sbi_scratch of current HART
@@ -216,9 +219,14 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 	const char *msg = "trap handler failed";
 	u32 hartid = sbi_current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
-	ulong mtval = csr_read(CSR_MTVAL);
+	ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
 	struct sbi_trap_info trap, *uptrap;
 
+	if (misa_extension('H')) {
+		mtval2 = csr_read(CSR_MTVAL2);
+		mtinst = csr_read(CSR_MTINST);
+	}
+
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		mcause &= ~(1UL << (__riscv_xlen - 1));
 		switch (mcause) {
@@ -237,15 +245,19 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
-		rc  = sbi_illegal_insn_handler(hartid, mcause, regs, scratch);
+		rc  = sbi_illegal_insn_handler(hartid, mcause, mtval,
+					       regs, scratch);
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
-		rc = sbi_misaligned_load_handler(hartid, mcause, regs, scratch);
+		rc = sbi_misaligned_load_handler(hartid, mcause, mtval,
+						 mtval2, mtinst, regs,
+						 scratch);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
-		rc  = sbi_misaligned_store_handler(hartid, mcause, regs,
+		rc  = sbi_misaligned_store_handler(hartid, mcause, mtval,
+						   mtval2, mtinst, regs,
 						   scratch);
 		msg = "misaligned store handler failed";
 		break;
@@ -265,10 +277,14 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 			regs->mepc += 4;
 			uptrap->cause = mcause;
 			uptrap->tval = mtval;
+			uptrap->tval2 = mtval2;
+			uptrap->tinst = mtinst;
 		} else {
 			trap.epc = regs->mepc;
 			trap.cause = mcause;
 			trap.tval = mtval;
+			trap.tval2 = mtval2;
+			trap.tinst = mtinst;
 			rc = sbi_trap_redirect(regs, &trap, scratch);
 		}
 		msg = "page/access fault handler failed";
@@ -278,13 +294,15 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		trap.epc = regs->mepc;
 		trap.cause = mcause;
 		trap.tval = mtval;
+		trap.tval2 = mtval2;
+		trap.tinst = mtinst;
 		rc = sbi_trap_redirect(regs, &trap, scratch);
 		break;
 	};
 
 trap_error:
 	if (rc) {
-		sbi_trap_error(msg, rc, hartid, mcause, csr_read(CSR_MTVAL),
-			       regs);
+		sbi_trap_error(msg, rc, hartid, mcause, mtval,
+			       mtval2, mtinst, regs);
 	}
 }

From 7219477f7b400a2eaa8fac5aedd73ba29eef92d9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Dec 2019 22:51:42 +0530
Subject: [PATCH 0355/1765] lib: Use MTINST CSR in misaligned load/store
 emulation

We should use MTINST CSR in misaligned load/store emulation whenever
possible to avoid unpriv read in getting trapped instruction. This will
improve preformance on HW having proper implementation of MTINST CSR.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi/sbi_misaligned_ldst.c | 42 ++++++++++++++++++++++++++++-------
 1 file changed, 34 insertions(+), 8 deletions(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 314b2f317eb..400372cdb91 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -26,14 +26,27 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 				struct sbi_trap_regs *regs,
 				struct sbi_scratch *scratch)
 {
+	ulong insn;
 	union reg_data val;
 	struct sbi_trap_info uptrap;
 	int i, fp = 0, shift = 0, len = 0;
-	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
-	if (uptrap.cause) {
-		uptrap.epc = regs->mepc;
-		return sbi_trap_redirect(regs, &uptrap, scratch);
+	if (tinst & 0x1) {
+		/*
+		 * Bit[0] == 1 implies trapped instruction value is
+		 * transformed instruction or custom instruction.
+		 */
+		insn = tinst | INSN_16BIT_MASK;
+	} else {
+		/*
+		 * Bit[0] == 0 implies trapped instruction value is
+		 * zero or special value.
+		 */
+		insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc = regs->mepc;
+			return sbi_trap_redirect(regs, &uptrap, scratch);
+		}
 	}
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
@@ -135,14 +148,27 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 				 struct sbi_trap_regs *regs,
 				 struct sbi_scratch *scratch)
 {
+	ulong insn;
 	union reg_data val;
 	struct sbi_trap_info uptrap;
 	int i, len = 0;
-	ulong insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
 
-	if (uptrap.cause) {
-		uptrap.epc = regs->mepc;
-		return sbi_trap_redirect(regs, &uptrap, scratch);
+	if (tinst & 0x1) {
+		/*
+		 * Bit[0] == 1 implies trapped instruction value is
+		 * transformed instruction or custom instruction.
+		 */
+		insn = tinst | INSN_16BIT_MASK;
+	} else {
+		/*
+		 * Bit[0] == 0 implies trapped instruction value is
+		 * zero or special value.
+		 */
+		insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc = regs->mepc;
+			return sbi_trap_redirect(regs, &uptrap, scratch);
+		}
 	}
 
 	val.data_ulong = GET_RS2(insn, regs);

From b8732feaf7d48fddc5c06866879380575e601823 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:44 -0800
Subject: [PATCH 0356/1765] lib: Add replacement extension and function ids

Take this opportunity to move the enums to macros as enums make
sbi_ecall_interface.h unusable in assembly files.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 60 +++++++++++++++++++------------
 1 file changed, 38 insertions(+), 22 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 98c5ce634eb..93c074745d9 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -12,28 +12,44 @@
 
 /* clang-format off */
 
-enum sbi_ext_id {
-	SBI_EXT_0_1_SET_TIMER = 0x0,
-	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
-	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
-	SBI_EXT_0_1_CLEAR_IPI = 0x3,
-	SBI_EXT_0_1_SEND_IPI = 0x4,
-	SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
-	SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
-	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
-	SBI_EXT_0_1_SHUTDOWN = 0x8,
-	SBI_EXT_BASE = 0x10,
-};
-
-enum sbi_ext_base_fid {
-	SBI_EXT_BASE_GET_SPEC_VERSION = 0,
-	SBI_EXT_BASE_GET_IMP_ID,
-	SBI_EXT_BASE_GET_IMP_VERSION,
-	SBI_EXT_BASE_PROBE_EXT,
-	SBI_EXT_BASE_GET_MVENDORID,
-	SBI_EXT_BASE_GET_MARCHID,
-	SBI_EXT_BASE_GET_MIMPID,
-};
+/* SBI Extension IDs */
+#define	SBI_EXT_0_1_SET_TIMER			0x0
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR		0x1
+#define SBI_EXT_0_1_CONSOLE_GETCHAR		0x2
+#define SBI_EXT_0_1_CLEAR_IPI			0x3
+#define SBI_EXT_0_1_SEND_IPI			0x4
+#define SBI_EXT_0_1_REMOTE_FENCE_I		0x5
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA		0x6
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID	0x7
+#define SBI_EXT_0_1_SHUTDOWN			0x8
+#define SBI_EXT_BASE				0x10
+#define SBI_EXT_TIME				0x54494D45
+#define SBI_EXT_IPI				0x735049
+#define SBI_EXT_RFENCE				0x52464E43
+
+/* SBI function IDs for BASE extension*/
+#define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
+#define SBI_EXT_BASE_GET_IMP_ID			0x1
+#define	SBI_EXT_BASE_GET_IMP_VERSION		0x2
+#define	SBI_EXT_BASE_PROBE_EXT			0x3
+#define	SBI_EXT_BASE_GET_MVENDORID		0x4
+#define	SBI_EXT_BASE_GET_MARCHID		0x5
+#define	SBI_EXT_BASE_GET_MIMPID			0x6
+
+/* SBI function IDs for TIME extension*/
+#define SBI_EXT_TIME_SET_TIMER			0x0
+
+/* SBI function IDs for IPI extension*/
+#define SBI_EXT_IPI_SEND_IPI			0x0
+
+/* SBI function IDs for RFENCE extension*/
+#define	SBI_EXT_RFENCE_REMOTE_FENCE_I		0x0
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA	0x1
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID	0x2
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA	0x3
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID	0x4
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA	0x5
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID	0x6
 
 #define SBI_SPEC_VERSION_MAJOR_OFFSET	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f

From aa0ed1d7338019af8c785274c99b13caa59ce1f5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:45 -0800
Subject: [PATCH 0357/1765] lib: Remove redundant IPI types

We just need to distinguish only between FENCE and non FENCE related
IPIs as all of the fence related requests are handled via fifo now.

Remove the unnecessary IPI types related to individual fence types.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ipi.h |  4 +---
 lib/sbi/sbi_ecall.c   |  6 +++---
 lib/sbi/sbi_ipi.c     | 13 +++----------
 3 files changed, 7 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 378a3c8305d..5f7192ad502 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -15,9 +15,7 @@
 /* clang-format off */
 
 #define SBI_IPI_EVENT_SOFT			0x1
-#define SBI_IPI_EVENT_FENCE_I			0x2
-#define SBI_IPI_EVENT_SFENCE_VMA		0x4
-#define SBI_IPI_EVENT_SFENCE_VMA_ASID		0x8
+#define SBI_IPI_EVENT_FENCE			0x2
 #define SBI_IPI_EVENT_HALT			0x10
 
 /* clang-format on */
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 785786f288d..58bce16d97f 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -147,7 +147,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
 		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_FENCE_I, &tlb_info);
+					SBI_IPI_EVENT_FENCE, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[1];
@@ -156,7 +156,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
 		tlb_info.shart_mask = 1UL << source_hart;
 
 		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_SFENCE_VMA, &tlb_info);
+					SBI_IPI_EVENT_FENCE, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[1];
@@ -166,7 +166,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
 		tlb_info.shart_mask = 1UL << source_hart;
 
 		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_SFENCE_VMA_ASID,
+					SBI_IPI_EVENT_FENCE,
 					&tlb_info);
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index af8d62d551e..8dc78a50d0e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -38,9 +38,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	 */
 	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
-	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
-	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID ||
-	    event == SBI_IPI_EVENT_FENCE_I ) {
+	if (event == SBI_IPI_EVENT_FENCE) {
 		ret = sbi_tlb_fifo_update(remote_scratch, hartid, data);
 		if (ret < 0)
 			return ret;
@@ -49,11 +47,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	smp_wmb();
 	sbi_platform_ipi_send(plat, hartid);
 
-	if (event == SBI_IPI_EVENT_SFENCE_VMA ||
-	    event == SBI_IPI_EVENT_SFENCE_VMA_ASID ||
-	    event == SBI_IPI_EVENT_FENCE_I ) {
+	if (event == SBI_IPI_EVENT_FENCE)
 		sbi_tlb_fifo_sync(scratch);
-	}
 
 	return 0;
 }
@@ -113,9 +108,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 		case SBI_IPI_EVENT_SOFT:
 			csr_set(CSR_MIP, MIP_SSIP);
 			break;
-		case SBI_IPI_EVENT_FENCE_I:
-		case SBI_IPI_EVENT_SFENCE_VMA:
-		case SBI_IPI_EVENT_SFENCE_VMA_ASID:
+		case SBI_IPI_EVENT_FENCE:
 			sbi_tlb_fifo_process(scratch);
 			break;
 		case SBI_IPI_EVENT_HALT:

From 109266397a6d8a37f4450c5ff80ea3737a6acd3e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:46 -0800
Subject: [PATCH 0358/1765] lib: Add TIME extension in SBI

This patch adds support for TIME extension which replaces v0.1
timer extension.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 58bce16d97f..d47216575f1 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -47,8 +47,9 @@ int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 	 * TODO: Implement it.
 	 */
 
-	if ((extid >= SBI_EXT_0_1_SET_TIMER &&
-	    extid <= SBI_EXT_0_1_SHUTDOWN) || (extid == SBI_EXT_BASE)) {
+	if ((extid >= SBI_EXT_0_1_SET_TIMER && extid <= SBI_EXT_0_1_SHUTDOWN) ||
+	    (extid == SBI_EXT_BASE) ||
+	    (extid == SBI_EXT_TIME)) {
 		*out_val = 1;
 	} else if (extid >= SBI_EXT_VENDOR_START &&
 		   extid <= SBI_EXT_VENDOR_END) {
@@ -111,9 +112,26 @@ int sbi_ecall_base_handler(struct sbi_scratch *scratch,
 	return ret;
 }
 
-int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
-			  unsigned long extid, unsigned long *args,
-			  struct sbi_trap_info *out_trap)
+int sbi_ecall_time_handler(struct sbi_scratch *scratch, unsigned long funcid,
+			   unsigned long *args)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_TIME_SET_TIMER) {
+#if __riscv_xlen == 32
+		sbi_timer_event_start(scratch,
+				      (((u64)args[1] << 32) | (u64)args[0]));
+#else
+		sbi_timer_event_start(scratch, (u64)args[0]);
+#endif
+	} else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
+int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
+			   unsigned long *args, struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
@@ -205,6 +223,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	} else if (extension_id == SBI_EXT_BASE)
 		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
 					     args, &out_val, &trap);
+	else if (extension_id == SBI_EXT_TIME)
+		ret = sbi_ecall_time_handler(scratch, func_id, args);
 	else if (extension_id >= SBI_EXT_VENDOR_START &&
 		extension_id <= SBI_EXT_VENDOR_END) {
 		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,

From 9777aeef41a613b3c27056a695d4d6007760b3a8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:47 -0800
Subject: [PATCH 0359/1765] lib: Add IPI extension in SBI

This patch adds new IPI extension which replaces ipi related
v0.1 extensions. This also adds a new API for ipi sending as trap
handling is not necessary in v0.2 SBI IPI related extensions.

It also modifies the IPI sending code which now accepts hart mask as a value
instead of S-mode virtual address. Thus, the caller should set it to exact hart
mask value everytime.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_bitops.h | 74 ++++++++++++++++++++++++++++++++++++++++
 include/sbi/sbi_ipi.h    |  5 ++-
 lib/sbi/sbi_ecall.c      | 70 +++++++++++++++++++++++++++++++------
 lib/sbi/sbi_ipi.c        | 34 ++++++++++++------
 lib/sbi/sbi_system.c     |  3 +-
 5 files changed, 161 insertions(+), 25 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index ece6ec4423b..9d992993477 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -95,4 +95,78 @@ static inline int __ffs(unsigned long word)
  */
 #define ffz(x) __ffs(~(x))
 
+/**
+ * fls - find last (most-significant) bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as ffs.
+ * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
+ */
+
+static inline int fls(int x)
+{
+	int r = 32;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xffff0000u)) {
+		x <<= 16;
+		r -= 16;
+	}
+	if (!(x & 0xff000000u)) {
+		x <<= 8;
+		r -= 8;
+	}
+	if (!(x & 0xf0000000u)) {
+		x <<= 4;
+		r -= 4;
+	}
+	if (!(x & 0xc0000000u)) {
+		x <<= 2;
+		r -= 2;
+	}
+	if (!(x & 0x80000000u)) {
+		x <<= 1;
+		r -= 1;
+	}
+	return r;
+}
+
+/**
+ * __fls - find last (most-significant) set bit in a long word
+ * @word: the word to search
+ *
+ * Undefined if no set bit exists, so code should check against 0 first.
+ */
+static inline unsigned long __fls(unsigned long word)
+{
+	int num = BITS_PER_LONG - 1;
+
+#if BITS_PER_LONG == 64
+	if (!(word & (~0ul << 32))) {
+		num -= 32;
+		word <<= 32;
+	}
+#endif
+	if (!(word & (~0ul << (BITS_PER_LONG-16)))) {
+		num -= 16;
+		word <<= 16;
+	}
+	if (!(word & (~0ul << (BITS_PER_LONG-8)))) {
+		num -= 8;
+		word <<= 8;
+	}
+	if (!(word & (~0ul << (BITS_PER_LONG-4)))) {
+		num -= 4;
+		word <<= 4;
+	}
+	if (!(word & (~0ul << (BITS_PER_LONG-2)))) {
+		num -= 2;
+		word <<= 2;
+	}
+	if (!(word & (~0ul << (BITS_PER_LONG-1))))
+		num -= 1;
+	return num;
+}
+
 #endif
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 5f7192ad502..109e9af7ef5 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -27,9 +27,8 @@ struct sbi_ipi_data {
 	unsigned long ipi_type;
 };
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      struct sbi_trap_info *uptrap,
-		      ulong *pmask, u32 event, void *data);
+int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask,
+		      ulong hbase, u32 event, void *data);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index d47216575f1..891cdbe5aff 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_version.h>
 #include <sbi/riscv_asm.h>
@@ -35,6 +36,22 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
+static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch, ulong *pmask,
+				     ulong *hmask, struct sbi_trap_info *uptrap)
+{
+	ulong mask = 0;
+
+	if (pmask) {
+		mask = sbi_load_ulong(pmask, scratch, uptrap);
+		if (uptrap->cause)
+			return SBI_ETRAP;
+	} else {
+		mask = sbi_hart_available_mask();
+	}
+	*hmask = mask;
+	return 0;
+}
+
 int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 			unsigned long *out_val)
 {
@@ -49,7 +66,8 @@ int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 
 	if ((extid >= SBI_EXT_0_1_SET_TIMER && extid <= SBI_EXT_0_1_SHUTDOWN) ||
 	    (extid == SBI_EXT_BASE) ||
-	    (extid == SBI_EXT_TIME)) {
+	    (extid == SBI_EXT_TIME) ||
+	    (extid == SBI_EXT_IPI)) {
 		*out_val = 1;
 	} else if (extid >= SBI_EXT_VENDOR_START &&
 		   extid <= SBI_EXT_VENDOR_END) {
@@ -130,12 +148,27 @@ int sbi_ecall_time_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	return ret;
 }
 
+int sbi_ecall_ipi_handler(struct sbi_scratch *scratch, unsigned long funcid,
+			   unsigned long *args, unsigned long *tval)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_IPI_SEND_IPI)
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_SOFT, NULL);
+	else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
 int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 			   unsigned long *args, struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = sbi_current_hartid();
+	ulong hmask = 0;
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
@@ -156,25 +189,35 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		sbi_ipi_clear_smode(scratch);
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_SOFT, NULL);
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_ipi_send_many(scratch, hmask, 0,
+					       SBI_IPI_EVENT_SOFT, NULL);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		tlb_info.start  = 0;
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_ipi_send_many(scratch, hmask, 0,
+						SBI_IPI_EVENT_FENCE,
+						&tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[1];
 		tlb_info.size  = (unsigned long)args[2];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_ipi_send_many(scratch, hmask, 0,
+						SBI_IPI_EVENT_FENCE,
+						&tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[1];
@@ -183,9 +226,12 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
 
-		ret = sbi_ipi_send_many(scratch, out_trap, (ulong *)args[0],
-					SBI_IPI_EVENT_FENCE,
-					&tlb_info);
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_ipi_send_many(scratch, hmask, 0,
+						SBI_IPI_EVENT_FENCE,
+						&tlb_info);
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
@@ -225,6 +271,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 					     args, &out_val, &trap);
 	else if (extension_id == SBI_EXT_TIME)
 		ret = sbi_ecall_time_handler(scratch, func_id, args);
+	else if (extension_id == SBI_EXT_IPI)
+		ret = sbi_ecall_ipi_handler(scratch, func_id, args, &out_val);
 	else if (extension_id >= SBI_EXT_VENDOR_START &&
 		extension_id <= SBI_EXT_VENDOR_END) {
 		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 8dc78a50d0e..c235927487d 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -11,13 +11,13 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_unpriv.h>
 
 static unsigned long ipi_data_off;
 
@@ -53,20 +53,34 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
 	return 0;
 }
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch,
-		      struct sbi_trap_info *uptrap,
-		      ulong *pmask, u32 event, void *data)
+/**
+ * As this this function only handlers scalar values of hart mask, it must be
+ * set to all online harts if the intention is to send IPIs to all the harts.
+ * If hmask is zero, no IPIs will be sent.
+ */
+int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
+			u32 event, void *data)
 {
 	ulong i, m;
 	ulong mask = sbi_hart_available_mask();
+	ulong tempmask;
 	u32 hartid = sbi_current_hartid();
+	unsigned long last_bit = __fls(mask);
+
+	if (hbase > last_bit)
+		/* hart base is not available */
+		return SBI_EINVAL;
+	/**
+	 * FIXME: This check is valid only ULONG size. This is oka for now as
+	 * avaialble hart mask can support upto ULONG size only.
+	 */
+	tempmask = hmask << hbase;
+	tempmask = ~mask & tempmask;
+	if (tempmask)
+		/* at least one of the hart in hmask is not available */
+		return SBI_EINVAL;
 
-	if (pmask) {
-		mask &= sbi_load_ulong(pmask, scratch, uptrap);
-		if (uptrap->cause)
-			return SBI_ETRAP;
-	}
-
+	mask &= (hmask << hbase);
 	/* Send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
 		if ((m & 1UL) && (i != hartid))
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 2cb30d4db2a..cdc85d6fa60 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -39,7 +39,8 @@ sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 
 	/* If that fails (or is not implemented) send an IPI on every
 	 * hart to hang and then hang the current hart */
-	sbi_ipi_send_many(scratch, NULL, NULL, SBI_IPI_EVENT_HALT, NULL);
+	sbi_ipi_send_many(scratch, sbi_hart_available_mask(), 0,
+			  SBI_IPI_EVENT_HALT, NULL);
 
 	sbi_hart_hang();
 }

From 94072025325b639d603f428366b53b470e625f64 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:48 -0800
Subject: [PATCH 0360/1765] lib: Add hfence instruction encoding

Currently, the toolchains do not have support for hfence instruction.
Hence, the instruction are hardcode until we have toolchain support.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hfence.h | 36 +++++++++++++++++++
 lib/sbi/objects.mk       |  1 +
 lib/sbi/sbi_hfence.S     | 75 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 112 insertions(+)
 create mode 100644 include/sbi/sbi_hfence.h
 create mode 100644 lib/sbi/sbi_hfence.S

diff --git a/include/sbi/sbi_hfence.h b/include/sbi/sbi_hfence.h
new file mode 100644
index 00000000000..824a8d60aab
--- /dev/null
+++ b/include/sbi/sbi_hfence.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_FENCE_H__
+#define __SBI_FENCE_H__
+/** Invalidate Stage2 TLBs for given VMID and guest physical address */
+void __sbi_hfence_gvma_vmid_gpa(unsigned long vmid, unsigned long gpa);
+
+/** Invalidate Stage2 TLBs for given VMID */
+void __sbi_hfence_gvma_vmid(unsigned long vmid);
+
+/** Invalidate Stage2 TLBs for given guest physical address */
+void __sbi_hfence_gvma_gpa(unsigned long gpa);
+
+/** Invalidate all possible Stage2 TLBs */
+void __sbi_hfence_gvma_all(void);
+
+/** Invalidate unified TLB entries for given asid and guest virtual address */
+void __sbi_hfence_vvma_asid_va(unsigned long asid, unsigned long va);
+
+/** Invalidate unified TLB entries for given ASID for a guest*/
+void __sbi_hfence_vvma_asid(unsigned long asid);
+
+/** Invalidate unified TLB entries for a given guest virtual address */
+void __sbi_hfence_vvma_va(unsigned long va);
+
+/** Invalidate all possible Stage2 TLBs */
+void __sbi_hfence_vvma_all(void);
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 0e247fe0be6..b84453e406e 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -16,6 +16,7 @@ libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
+libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hart.o
 libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
diff --git a/lib/sbi/sbi_hfence.S b/lib/sbi/sbi_hfence.S
new file mode 100644
index 00000000000..30a6e9fa9a4
--- /dev/null
+++ b/lib/sbi/sbi_hfence.S
@@ -0,0 +1,75 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <anup.patel@wdc.com>
+ */
+
+	/*
+	 * Instruction encoding of hfence.gvma is:
+	 * 0110001 rs2(5) rs1(5) 000 00000 1110011
+	 */
+
+	.align 3
+	.global __sbi_hfence_gvma_vmid_gpa
+__sbi_hfence_gvma_vmid_gpa:
+	/* hfence.gvma a1, a0 */
+	.word 0x62a60073
+	ret
+
+	.align 3
+	.global __sbi_hfence_gvma_vmid
+__sbi_hfence_gvma_vmid:
+	/* hfence.gvma zero, a0 */
+	.word 0x62a00073
+	ret
+
+	.align 3
+	.global __sbi_hfence_gvma_gpa
+__sbi_hfence_gvma_gpa:
+	/* hfence.gvma a0 */
+	.word 0x62050073
+	ret
+
+	.align 3
+	.global __sbi_hfence_gvma_all
+__sbi_hfence_gvma_all:
+	/* hfence.gvma */
+	.word 0x62000073
+	ret
+
+	/*
+	 * Instruction encoding of hfence.bvma is:
+	 * 0010001 rs2(5) rs1(5) 000 00000 1110011
+	 */
+
+	.align 3
+	.global __sbi_hfence_vvma_asid_va
+__sbi_hfence_vvma_asid_va:
+	/* hfence.bvma a1, a0 */
+	.word 0x22a60073
+	ret
+
+	.align 3
+	.global __sbi_hfence_vvma_asid
+__sbi_hfence_vvma_asid:
+	/* hfence.bvma zero, a0 */
+	.word 0x22a00073
+	ret
+
+	.align 3
+	.global __sbi_hfence_vvma_va
+__sbi_hfence_vvma_va:
+	/* hfence.bvma a0 */
+	.word 0x22050073
+	ret
+
+	.align 3
+	.global __sbi_hfence_vvma_all
+__sbi_hfence_vvma_all:
+	/* hfence.bvma */
+	.word 0x22000073
+	ret

From 331ff6a162c1eeb61919db42162584c5f27d0fce Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:49 -0800
Subject: [PATCH 0361/1765] lib: Support stage1 and stage2 tlb flushing

The hypervisor specification support hfence calls which can be used
issue tlb flush requests at both level of address translation. Currently,
these requests are issued only via SBI which are defined in v0.2.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_tlb.h |   5 ++-
 lib/sbi/sbi_tlb.c     | 102 ++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 102 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index d1d6f225c43..83f94587cbc 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -24,7 +24,10 @@
 enum sbi_tlb_info_types {
 	SBI_TLB_FLUSH_VMA,
 	SBI_TLB_FLUSH_VMA_ASID,
-	SBI_TLB_FLUSH_VMA_VMID,
+	SBI_TLB_FLUSH_GVMA,
+	SBI_TLB_FLUSH_GVMA_VMID,
+	SBI_TLB_FLUSH_VVMA,
+	SBI_TLB_FLUSH_VVMA_ASID,
 	SBI_ITLB_FLUSH
 };
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 5c4c59651bd..d8215168eba 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
+#include <sbi/sbi_hfence.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
@@ -30,6 +31,38 @@ static void sbi_tlb_flush_all(void)
 	__asm__ __volatile("sfence.vma");
 }
 
+static void sbi_tlb_fifo_hfence_vvma(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long i;
+
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
+		__sbi_hfence_vvma_all();
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__sbi_hfence_vvma_va(start+i);
+	}
+}
+
+static void sbi_tlb_fifo_hfence_gvma(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long i;
+
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
+		__sbi_hfence_gvma_all();
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__sbi_hfence_gvma_gpa(start+i);
+	}
+}
+
 static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
@@ -49,6 +82,50 @@ static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
 	}
 }
 
+static void sbi_tlb_fifo_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long asid  = tinfo->asid;
+	unsigned long i;
+
+	if (start == 0 && size == 0) {
+		__sbi_hfence_vvma_all();
+		return;
+	}
+
+	if (size == SBI_TLB_FLUSH_ALL) {
+		__sbi_hfence_vvma_asid(asid);
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__sbi_hfence_vvma_asid_va(asid, start + i);
+	}
+}
+
+static void sbi_tlb_fifo_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
+{
+	unsigned long start = tinfo->start;
+	unsigned long size  = tinfo->size;
+	unsigned long vmid  = tinfo->asid;
+	unsigned long i;
+
+	if (start == 0 && size == 0) {
+		__sbi_hfence_gvma_all();
+		return;
+	}
+
+	if (size == SBI_TLB_FLUSH_ALL) {
+		__sbi_hfence_gvma_vmid(vmid);
+		return;
+	}
+
+	for (i = 0; i < size; i += PAGE_SIZE) {
+		__sbi_hfence_gvma_vmid_gpa(vmid, start+i);
+	}
+}
+
 static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
@@ -80,15 +157,32 @@ static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 
 static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
 {
-	if (tinfo->type == SBI_TLB_FLUSH_VMA) {
+	switch (tinfo->type) {
+	case SBI_TLB_FLUSH_VMA:
 		sbi_tlb_fifo_sfence_vma(tinfo);
-	} else if (tinfo->type == SBI_TLB_FLUSH_VMA_ASID) {
+		break;
+	case SBI_TLB_FLUSH_VMA_ASID:
 		sbi_tlb_fifo_sfence_vma_asid(tinfo);
-	} else if (tinfo->type == SBI_ITLB_FLUSH)
+		break;
+	case SBI_TLB_FLUSH_GVMA:
+		sbi_tlb_fifo_hfence_gvma(tinfo);
+		break;
+	case SBI_TLB_FLUSH_GVMA_VMID:
+		sbi_tlb_fifo_hfence_gvma_vmid(tinfo);
+		break;
+	case SBI_TLB_FLUSH_VVMA:
+		sbi_tlb_fifo_hfence_vvma(tinfo);
+		break;
+	case SBI_TLB_FLUSH_VVMA_ASID:
+		sbi_tlb_fifo_hfence_vvma_asid(tinfo);
+		break;
+	case SBI_ITLB_FLUSH:
 		__asm__ __volatile("fence.i");
-	else
+		break;
+	default:
 		sbi_printf("Invalid tlb flush request type [%lu]\n",
 			   tinfo->type);
+	}
 	return;
 }
 

From 86a31f54371c56f0ca94a8d9dfcec05a76dfa53c Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sun, 24 Nov 2019 23:33:50 -0800
Subject: [PATCH 0362/1765] lib: Implement RFENCE extension

This patch adds RFENCE extension support in OpenSBI.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 95 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 94 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 891cdbe5aff..30e47c3fc42 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -67,7 +67,8 @@ int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
 	if ((extid >= SBI_EXT_0_1_SET_TIMER && extid <= SBI_EXT_0_1_SHUTDOWN) ||
 	    (extid == SBI_EXT_BASE) ||
 	    (extid == SBI_EXT_TIME) ||
-	    (extid == SBI_EXT_IPI)) {
+	    (extid == SBI_EXT_IPI)  ||
+	    (extid == SBI_EXT_RFENCE)) {
 		*out_val = 1;
 	} else if (extid >= SBI_EXT_VENDOR_START &&
 		   extid <= SBI_EXT_VENDOR_END) {
@@ -162,6 +163,95 @@ int sbi_ecall_ipi_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	return ret;
 }
 
+int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
+			   unsigned long *args, unsigned long *tval)
+{
+	int ret = 0;
+	struct sbi_tlb_info tlb_info;
+	u32 source_hart = sbi_current_hartid();
+
+	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
+	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
+		if (!misa_extension('H'))
+			return SBI_ENOTSUPP;
+
+	switch (funcid) {
+	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
+		tlb_info.start  = 0;
+		tlb_info.size  = 0;
+		tlb_info.type  = SBI_ITLB_FLUSH;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE, &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE, &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE,
+					&tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE, &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE,
+					&tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE, &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
+
+		ret = sbi_ipi_send_many(scratch, args[0], args[1],
+					SBI_IPI_EVENT_FENCE,
+					&tlb_info);
+		break;
+
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+
+	return ret;
+}
+
 int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 			   unsigned long *args, struct sbi_trap_info *out_trap)
 {
@@ -273,6 +363,9 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		ret = sbi_ecall_time_handler(scratch, func_id, args);
 	else if (extension_id == SBI_EXT_IPI)
 		ret = sbi_ecall_ipi_handler(scratch, func_id, args, &out_val);
+	else if (extension_id == SBI_EXT_RFENCE)
+		ret = sbi_ecall_rfence_handler(scratch, func_id,
+					       args, &out_val);
 	else if (extension_id >= SBI_EXT_VENDOR_START &&
 		extension_id <= SBI_EXT_VENDOR_END) {
 		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,

From c7d1b12199a11f8dcccb631a742eb31c79f8d0d2 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Thu, 26 Dec 2019 17:38:55 +0800
Subject: [PATCH 0363/1765] firmware: Return real DTB address when
 FW_xyz_FDT_ADDR is not defined

Function fw_next_arg1 in firmware/fw_jump.S:59 and
firmware/fw_payload.S:63 should return real dtb
address(if specified in a1) in a0, in case we don't
want to specify FW_xyz_FDT_ADDR when compiling.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_jump.S    | 2 +-
 firmware/fw_payload.S | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index 84391c96aae..0015a808f8e 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -56,7 +56,7 @@ fw_next_arg1:
 #ifdef FW_JUMP_FDT_ADDR
 	li	a0, FW_JUMP_FDT_ADDR
 #else
-	add	a0, zero, zero
+	add	a0, a1, zero
 #endif
 	ret
 
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 9f4e0eceb92..b9cb151b23c 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -60,7 +60,7 @@ fw_next_arg1:
 #ifdef FW_PAYLOAD_FDT_ADDR
 	li	a0, FW_PAYLOAD_FDT_ADDR
 #else
-	add	a0, zero, zero
+	add	a0, a1, zero
 #endif
 	ret
 

From 9beb57362fd36ffc47e901625357add249e4f101 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Dec 2019 08:54:24 +0530
Subject: [PATCH 0364/1765] firmware: Improve comments for fw_prev_arg1() and
 fw_next_arg1()

The state of a0, a1, and a2 registers in fw_prev_arg1() and
fw_next_arg1() is same as passed by previous booting stage
so we add this info in comments for both these functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_dynamic.S | 4 ++++
 firmware/fw_jump.S    | 4 ++++
 firmware/fw_payload.S | 4 ++++
 3 files changed, 12 insertions(+)

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index ba9394da776..192698a03cb 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -91,6 +91,8 @@ fw_save_info:
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The previous arg1 should be returned in 'a0'.
 	 */
 fw_prev_arg1:
@@ -102,6 +104,8 @@ fw_prev_arg1:
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The next arg1 should be returned in 'a0'.
 	 */
 fw_next_arg1:
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index 0015a808f8e..e0a3b538446 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -39,6 +39,8 @@ fw_save_info:
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The previous arg1 should be returned in 'a0'.
 	 */
 fw_prev_arg1:
@@ -50,6 +52,8 @@ fw_prev_arg1:
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The next arg1 should be returned in 'a0'.
 	 */
 fw_next_arg1:
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index b9cb151b23c..84d9ad4b4ff 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -39,6 +39,8 @@ fw_save_info:
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The previous arg1 should be returned in 'a0'.
 	 */
 fw_prev_arg1:
@@ -54,6 +56,8 @@ fw_prev_arg1:
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
+	 * The a0, a1, and a2 registers will be same as passed by
+	 * previous booting stage.
 	 * The next arg1 should be returned in 'a0'.
 	 */
 fw_next_arg1:

From fc6bd90457b5553fbb0a17f0b58adb2da28e8db0 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Sun, 29 Dec 2019 15:47:51 +0800
Subject: [PATCH 0365/1765] docs: Improve docs for FDT address passing

This patch updates FW_JUMP and FW_PAYLOAD documentation for the
case where FW_xyz_FDT_ADDR is not specified.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/firmware/fw_jump.md    | 4 ++--
 docs/firmware/fw_payload.md | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 7fdeeb40ebb..21161b057b2 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -38,8 +38,8 @@ follows:
 * **FW_JUMP_FDT_ADDR** - Address where the *flattened device tree (FDT file)*
   passed by the prior booting stage will be placed in memory before executing
   the booting stage following the OpenSBI firmware. If this option is not
-  provided, then the OpenSBI firmware will pass zero as the FDT address to the
-  following booting stage.
+  provided, then the OpenSBI firmware will pass the FDT address passed by the
+  previous booting stage to the next booting stage.
 
 *FW_JUMP* Example
 -----------------
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index c9a9ad86f55..1efe765a806 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -73,7 +73,8 @@ file. The parameters currently defined are as follows:
   stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and embedded in
   the *.text* section will be placed before executing the next booting stage,
   that is, the payload firmware. If this option is not provided, then the
-  firmware will pass zero as the FDT address to the next booting stage.
+  firmware will pass the FDT address passed by the previous booting stage
+  to the next booting stage.
 
 *FW_PAYLOAD* Example
 --------------------

From 46a90d90e7dca6eeb66700b6970171119c51fd66 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 30 Dec 2019 11:31:59 +0530
Subject: [PATCH 0366/1765] lib: utils: Support CLINT with 32bit MMIO access on
 RV64 system

It is possible to have a CLINT implementation which supports
only 32bit MMIO accesses on RV64 system so this patch extends
our CLINT driver such that platform code can specify whether
CLINT supports 64bit MMIO access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra<atish.patra@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
---
 include/sbi_utils/sys/clint.h     |  3 +-
 lib/utils/sys/clint.c             | 88 ++++++++++++++++++-------------
 platform/ariane-fpga/platform.c   |  2 +-
 platform/kendryte/k210/platform.c |  2 +-
 platform/qemu/sifive_u/platform.c |  2 +-
 platform/qemu/virt/platform.c     |  3 +-
 platform/sifive/fu540/platform.c  |  3 +-
 platform/template/platform.c      |  2 +-
 8 files changed, 60 insertions(+), 45 deletions(-)

diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
index 78e120991fa..5749d462429 100644
--- a/include/sbi_utils/sys/clint.h
+++ b/include/sbi_utils/sys/clint.h
@@ -30,6 +30,7 @@ void clint_timer_event_start(u64 next_event);
 
 int clint_warm_timer_init(void);
 
-int clint_cold_timer_init(unsigned long base, u32 hart_count);
+int clint_cold_timer_init(unsigned long base, u32 hart_count,
+			  bool has_64bit_mmio);
 
 #endif
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 802d419a1fd..ec855073bb2 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -62,25 +62,45 @@ static volatile void *clint_time_base;
 static volatile u64 *clint_time_val;
 static volatile u64 *clint_time_cmp;
 
-static inline u32 clint_time_read_hi()
+#if __riscv_xlen != 32
+static u64 clint_time_rd64(volatile u64 *addr)
 {
-	return readl_relaxed((u32 *)clint_time_val + 1);
+	return readq_relaxed(addr);
 }
 
-u64 clint_timer_value(void)
+static void clint_time_wr64(u64 value, volatile u64 *addr)
+{
+	writeq_relaxed(value, addr);
+}
+#endif
+
+static u64 clint_time_rd32(volatile u64 *addr)
 {
-#if __riscv_xlen == 64
-	return readq_relaxed(clint_time_val);
-#else
 	u32 lo, hi;
 
 	do {
-		hi = clint_time_read_hi();
-		lo = readl_relaxed(clint_time_val);
-	} while (hi != clint_time_read_hi());
+		hi = readl_relaxed((u32 *)addr + 1);
+		lo = readl_relaxed((u32 *)addr);
+	} while (hi != readl_relaxed((u32 *)addr + 1));
 
 	return ((u64)hi << 32) | (u64)lo;
-#endif
+}
+
+static void clint_time_wr32(u64 value, volatile u64 *addr)
+{
+	u32 mask = -1U;
+
+	writel_relaxed(value & mask, (void *)(addr));
+	writel_relaxed(value >> 32, (void *)(addr) + 0x04);
+}
+
+static u64 (*clint_time_rd)(volatile u64 *addr) = clint_time_rd32;
+static void (*clint_time_wr)(u64 value, volatile u64 *addr) = clint_time_wr32;
+
+u64 clint_timer_value(void)
+{
+	/* Read CLINT Time Value */
+	return clint_time_rd(clint_time_val);
 }
 
 void clint_timer_event_stop(void)
@@ -90,13 +110,8 @@ void clint_timer_event_stop(void)
 	if (clint_time_hart_count <= target_hart)
 		return;
 
-		/* Clear CLINT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
-#else
-	writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
-	writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
-#endif
+	/* Clear CLINT Time Compare */
+	clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
 }
 
 void clint_timer_event_start(u64 next_event)
@@ -106,15 +121,8 @@ void clint_timer_event_start(u64 next_event)
 	if (clint_time_hart_count <= target_hart)
 		return;
 
-		/* Program CLINT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
-#else
-	u32 mask = -1UL;
-	writel_relaxed(next_event & mask, &clint_time_cmp[target_hart]);
-	writel_relaxed(next_event >> 32,
-		       (void *)(&clint_time_cmp[target_hart]) + 0x04);
-#endif
+	/* Program CLINT Time Compare */
+	clint_time_wr(next_event, &clint_time_cmp[target_hart]);
 }
 
 int clint_warm_timer_init(void)
@@ -124,24 +132,28 @@ int clint_warm_timer_init(void)
 	if (clint_time_hart_count <= target_hart || !clint_time_base)
 		return -1;
 
-		/* Clear CLINT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
-#else
-	writel_relaxed(-1UL, &clint_time_cmp[target_hart]);
-	writel_relaxed(-1UL, (void *)(&clint_time_cmp[target_hart]) + 0x04);
-#endif
+	/* Clear CLINT Time Compare */
+	clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
 
 	return 0;
 }
 
-int clint_cold_timer_init(unsigned long base, u32 hart_count)
+int clint_cold_timer_init(unsigned long base, u32 hart_count,
+			  bool has_64bit_mmio)
 {
 	/* Figure-out CLINT Time register address */
-	clint_time_hart_count = hart_count;
-	clint_time_base	      = (void *)base;
-	clint_time_val	      = (u64 *)(clint_time_base + 0xbff8);
-	clint_time_cmp	      = (u64 *)(clint_time_base + 0x4000);
+	clint_time_hart_count		= hart_count;
+	clint_time_base			= (void *)base;
+	clint_time_val			= (u64 *)(clint_time_base + 0xbff8);
+	clint_time_cmp			= (u64 *)(clint_time_base + 0x4000);
+
+	/* Override read/write accessors for 64bit MMIO */
+#if __riscv_xlen != 32
+	if (has_64bit_mmio) {
+		clint_time_rd		= clint_time_rd64;
+		clint_time_wr		= clint_time_wr64;
+	}
+#endif
 
 	return 0;
 }
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index daeb9cd2e2d..5ebbff8b466 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -145,7 +145,7 @@ static int ariane_timer_init(bool cold_boot)
 
 	if (cold_boot) {
 		ret = clint_cold_timer_init(ARIANE_CLINT_ADDR,
-							ARIANE_HART_COUNT);
+					    ARIANE_HART_COUNT, TRUE);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 39771e39ec0..8ad1bf81c2c 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -88,7 +88,7 @@ static int k210_timer_init(bool cold_boot)
 
 	if (cold_boot) {
 		rc = clint_cold_timer_init(K210_CLINT_BASE_ADDR,
-					   K210_HART_COUNT);
+					   K210_HART_COUNT, TRUE);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index 40d658424cb..b021ca2ad36 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -113,7 +113,7 @@ static int sifive_u_timer_init(bool cold_boot)
 
 	if (cold_boot) {
 		rc = clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-					   SIFIVE_U_HART_COUNT);
+					   SIFIVE_U_HART_COUNT, TRUE);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 6ef6a19a2ea..883555c9884 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -114,7 +114,8 @@ static int virt_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(VIRT_CLINT_ADDR, VIRT_HART_COUNT);
+		rc = clint_cold_timer_init(VIRT_CLINT_ADDR,
+					   VIRT_HART_COUNT, TRUE);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 81e8e8df772..c8ead9dede2 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -176,7 +176,8 @@ static int fu540_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(FU540_CLINT_ADDR, FU540_HART_COUNT);
+		rc = clint_cold_timer_init(FU540_CLINT_ADDR,
+					   FU540_HART_COUNT, TRUE);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/template/platform.c b/platform/template/platform.c
index d36af481969..20ae579a7d6 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -143,7 +143,7 @@ static int platform_timer_init(bool cold_boot)
 	/* Example if the generic CLINT driver is used */
 	if (cold_boot) {
 		ret = clint_cold_timer_init(PLATFORM_CLINT_ADDR,
-					    PLATFORM_HART_COUNT);
+					    PLATFORM_HART_COUNT, TRUE);
 		if (ret)
 			return ret;
 	}

From c0849cd731fca884c939e6a1a699a853231292a2 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Thu, 2 Jan 2020 12:21:36 +0800
Subject: [PATCH 0367/1765] platform: Add T-head C910 initial support

This commit provides basic support for the Thead/C910 platform.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/platform.md      |   3 +
 docs/platform/thead-c910.md    |  34 +++++++
 platform/thead/c910/config.mk  |  14 +++
 platform/thead/c910/objects.mk |   5 ++
 platform/thead/c910/platform.c | 159 +++++++++++++++++++++++++++++++++
 platform/thead/c910/platform.h |  51 +++++++++++
 6 files changed, 266 insertions(+)
 create mode 100644 docs/platform/thead-c910.md
 create mode 100644 platform/thead/c910/config.mk
 create mode 100644 platform/thead/c910/objects.mk
 create mode 100644 platform/thead/c910/platform.c
 create mode 100644 platform/thead/c910/platform.h

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 424efe9bc3f..17cbfb85b31 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -26,6 +26,8 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 * **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350).
 
+* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -37,3 +39,4 @@ facilitate the implementation.
 [sifive_fu540.md]: sifive_fu540.md
 [ariane-fpga.md]: ariane-fpga.md
 [andes_ae350.md]: andes-ae350.md
+[thead-c910.md]: thead-c910.md
diff --git a/docs/platform/thead-c910.md b/docs/platform/thead-c910.md
new file mode 100644
index 00000000000..3ba0b96ac2f
--- /dev/null
+++ b/docs/platform/thead-c910.md
@@ -0,0 +1,34 @@
+T-HEAD C910 Processor
+=====================
+C910 is a 12-stage, 3 issues, 8 executions, out-of-order 64-bit RISC-V CPU which
+supports 16 cores, runs with 2.5GHz, and is capable of running Linux.
+
+To build platform specific library and firmwares, provide the *PLATFORM=thead/c910*
+parameter to the top level make command.
+
+Platform Options
+----------------
+
+The *T-HEAD C910* platform does not have any platform-specific options.
+
+Building T-HEAD C910 Platform
+-----------------------------
+
+```
+make PLATFORM=thead/c910
+```
+
+Booting T-HEAD C910 Platform
+-----------------------------
+
+**No Payload**
+
+As there's no payload, you may download vmlinux or u-boot to FW_JUMP_ADDR which
+specified in config.mk or compile commands with GDB. And the execution flow will
+turn to vmlinux or u-boot when opensbi ends.
+
+**Linux Kernel Payload**
+
+You can also choose to use Linux kernel as payload by enabling FW_PAYLOAD=y
+along with specifying FW_PAYLOAD_OFFSET. The kernel image will be embedded in
+the OPENSBI firmware binary, T-head will directly boot into Linux after OpenSBI.
diff --git a/platform/thead/c910/config.mk b/platform/thead/c910/config.mk
new file mode 100644
index 00000000000..bd5eab716a5
--- /dev/null
+++ b/platform/thead/c910/config.mk
@@ -0,0 +1,14 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Blobs to build
+FW_TEXT_START?=0x0
+FW_JUMP=y
+FW_JUMP_ADDR?=0x00200000
diff --git a/platform/thead/c910/objects.mk b/platform/thead/c910/objects.mk
new file mode 100644
index 00000000000..d025a3642a9
--- /dev/null
+++ b/platform/thead/c910/objects.mk
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+platform-objs-y += platform.o
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
new file mode 100644
index 00000000000..1ad3e499f07
--- /dev/null
+++ b/platform/thead/c910/platform.c
@@ -0,0 +1,159 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/serial/uart8250.h>
+#include "platform.h"
+
+static struct c910_regs_struct c910_regs;
+
+static int c910_early_init(bool cold_boot)
+{
+	if (cold_boot) {
+		/* Load from boot core */
+		c910_regs.pmpaddr0 = csr_read(CSR_PMPADDR0);
+		c910_regs.pmpaddr1 = csr_read(CSR_PMPADDR1);
+		c910_regs.pmpaddr2 = csr_read(CSR_PMPADDR2);
+		c910_regs.pmpaddr3 = csr_read(CSR_PMPADDR3);
+		c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4);
+		c910_regs.pmpaddr5 = csr_read(CSR_PMPADDR5);
+		c910_regs.pmpaddr6 = csr_read(CSR_PMPADDR6);
+		c910_regs.pmpaddr7 = csr_read(CSR_PMPADDR7);
+		c910_regs.pmpcfg0  = csr_read(CSR_PMPCFG0);
+
+		c910_regs.mcor     = csr_read(CSR_MCOR);
+		c910_regs.mhcr     = csr_read(CSR_MHCR);
+		c910_regs.mccr2    = csr_read(CSR_MCCR2);
+		c910_regs.mhint    = csr_read(CSR_MHINT);
+		c910_regs.mxstatus = csr_read(CSR_MXSTATUS);
+	} else {
+		/* Store to other core */
+		csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0);
+		csr_write(CSR_PMPADDR1, c910_regs.pmpaddr1);
+		csr_write(CSR_PMPADDR2, c910_regs.pmpaddr2);
+		csr_write(CSR_PMPADDR3, c910_regs.pmpaddr3);
+		csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4);
+		csr_write(CSR_PMPADDR5, c910_regs.pmpaddr5);
+		csr_write(CSR_PMPADDR6, c910_regs.pmpaddr6);
+		csr_write(CSR_PMPADDR7, c910_regs.pmpaddr7);
+		csr_write(CSR_PMPCFG0, c910_regs.pmpcfg0);
+
+		csr_write(CSR_MCOR, c910_regs.mcor);
+		csr_write(CSR_MHCR, c910_regs.mhcr);
+		csr_write(CSR_MCCR2, c910_regs.mccr2);
+		csr_write(CSR_MHINT, c910_regs.mhint);
+		csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
+	}
+
+	c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
+	c910_regs.clint_base_addr =
+		c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
+
+	return 0;
+}
+
+static int c910_final_init(bool cold_boot)
+{
+	return 0;
+}
+
+static int c910_irqchip_init(bool cold_boot)
+{
+	/* Delegate plic enable into S-mode */
+	writel(C910_PLIC_DELEG_ENABLE,
+		(void *)c910_regs.plic_base_addr + C910_PLIC_DELEG_OFFSET);
+
+	return 0;
+}
+
+static int c910_ipi_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(c910_regs.clint_base_addr, C910_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+static int c910_timer_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_timer_init(c910_regs.clint_base_addr,
+					C910_HART_COUNT, FALSE);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_timer_init();
+}
+
+static int c910_system_shutdown(u32 type)
+{
+	asm volatile ("ebreak");
+	return 0;
+}
+
+void sbi_boot_other_core(int hartid)
+{
+	csr_write(CSR_MRVBR, FW_TEXT_START);
+	csr_write(CSR_MRMR, csr_read(CSR_MRMR) | (1 << hartid));
+}
+
+static int c910_vendor_ext_provider(long extid, long funcid,
+				unsigned long *args,
+				unsigned long *out_value,
+				struct sbi_trap_info *out_trap)
+{
+	switch (extid) {
+	case SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE:
+		sbi_boot_other_core((int)args[0]);
+		break;
+	default:
+		sbi_printf("Unsupported private sbi call: %ld\n", extid);
+		asm volatile ("ebreak");
+	}
+	return 0;
+}
+
+const struct sbi_platform_operations platform_ops = {
+	.early_init          = c910_early_init,
+	.final_init          = c910_final_init,
+
+	.irqchip_init        = c910_irqchip_init,
+
+	.ipi_init            = c910_ipi_init,
+	.ipi_send            = clint_ipi_send,
+	.ipi_clear           = clint_ipi_clear,
+
+	.timer_init          = c910_timer_init,
+	.timer_event_start   = clint_timer_event_start,
+
+	.system_shutdown     = c910_system_shutdown,
+
+	.vendor_ext_provider = c910_vendor_ext_provider,
+};
+
+const struct sbi_platform platform = {
+	.opensbi_version     = OPENSBI_VERSION,
+	.platform_version    = SBI_PLATFORM_VERSION(0x0, 0x01),
+	.name                = "T-HEAD Xuantie c910",
+	.features            = SBI_THEAD_FEATURES,
+	.hart_count          = C910_HART_COUNT,
+	.hart_stack_size     = C910_HART_STACK_SIZE,
+	.disabled_hart_mask  = 0,
+	.platform_ops_addr   = (unsigned long)&platform_ops
+};
diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
new file mode 100644
index 00000000000..bc176e52c84
--- /dev/null
+++ b/platform/thead/c910/platform.h
@@ -0,0 +1,51 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef _C910_PLATFORM_H_
+#define _C910_PLATFORM_H_
+
+#define C910_HART_COUNT   16
+#define C910_HART_STACK_SIZE   8192
+
+#define SBI_THEAD_FEATURES	\
+	(SBI_PLATFORM_HAS_PMP | \
+	 SBI_PLATFORM_HAS_SCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+
+#define CSR_MCOR         0x7c2
+#define CSR_MHCR         0x7c1
+#define CSR_MCCR2        0x7c3
+#define CSR_MHINT        0x7c5
+#define CSR_MXSTATUS     0x7c0
+#define CSR_PLIC_BASE    0xfc1
+#define CSR_MRMR         0x7c6
+#define CSR_MRVBR        0x7c7
+
+#define SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE    0x09000003
+
+#define C910_PLIC_CLINT_OFFSET     0x04000000  /* 64M */
+#define C910_PLIC_DELEG_OFFSET     0x001ffffc
+#define C910_PLIC_DELEG_ENABLE     0x1
+
+struct c910_regs_struct {
+	u64 pmpaddr0;
+	u64 pmpaddr1;
+	u64 pmpaddr2;
+	u64 pmpaddr3;
+	u64 pmpaddr4;
+	u64 pmpaddr5;
+	u64 pmpaddr6;
+	u64 pmpaddr7;
+	u64 pmpcfg0;
+	u64 mcor;
+	u64 mhcr;
+	u64 mccr2;
+	u64 mhint;
+	u64 mxstatus;
+	u64 plic_base_addr;
+	u64 clint_base_addr;
+};
+
+#endif /* _C910_PLATFORM_H_ */

From e746673a796d7e176ceeb56d160779be8386ffd9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 08:34:51 +0530
Subject: [PATCH 0368/1765] lib: Remove unnecessary checks from init_coldboot()
 and init_warmboot()

We remove unnecessary checks related to hart hotplug and disabled
hart in coldboot and warmboot init path.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 51ce3a0e7df..80e4a19bbe7 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -106,9 +106,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!(scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS))
 		sbi_boot_prints(scratch, hartid);
 
-	if (!sbi_platform_has_hart_hotplug(plat))
-		sbi_hart_wake_coldboot_harts(scratch, hartid);
+	sbi_hart_wake_coldboot_harts(scratch, hartid);
+
 	sbi_hart_mark_available(hartid);
+
 	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
 			     scratch->next_mode, FALSE);
 }
@@ -118,11 +119,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	int rc;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!sbi_platform_has_hart_hotplug(plat))
-		sbi_hart_wait_for_coldboot(scratch, hartid);
-
-	if (sbi_platform_hart_disabled(plat, hartid))
-		sbi_hart_hang();
+	sbi_hart_wait_for_coldboot(scratch, hartid);
 
 	rc = sbi_system_early_init(scratch, FALSE);
 	if (rc)
@@ -150,13 +147,9 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_hart_mark_available(hartid);
 
-	if (sbi_platform_has_hart_hotplug(plat))
-		/* TODO: To be implemented in-future. */
-		sbi_hart_hang();
-	else
-		sbi_hart_switch_mode(hartid, scratch->next_arg1,
-				     scratch->next_addr,
-				     scratch->next_mode, FALSE);
+	sbi_hart_switch_mode(hartid, scratch->next_arg1,
+			     scratch->next_addr,
+			     scratch->next_mode, FALSE);
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);

From c3e406f1609af8f14e93419aa6722e646a8f4f56 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 08:49:23 +0530
Subject: [PATCH 0369/1765] lib: Add initial sbi_exit() API

This patch adds initial implementation of sbi_exit() API which
can be used to perform OpenSBI exit sequence for current HART.

The sbi_exit() implementation will be further extended by
subsequent patches.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_init.h |  2 ++
 lib/sbi/sbi_init.c     | 22 ++++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index 033286f7cc5..c976276d1fa 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -16,4 +16,6 @@ struct sbi_scratch;
 
 void __noreturn sbi_init(struct sbi_scratch *scratch);
 
+void __noreturn sbi_exit(struct sbi_scratch *scratch);
+
 #endif
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 80e4a19bbe7..b4c242f27d9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -183,3 +183,25 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	else
 		init_warmboot(scratch, hartid);
 }
+
+/**
+ * Exit OpenSBI library for current HART and stop HART
+ *
+ * The function expects following:
+ * 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
+ * 2. Stack pointer (SP) is setup for current HART
+ *
+ * @param scratch pointer to sbi_scratch of current HART
+ */
+void __noreturn sbi_exit(struct sbi_scratch *scratch)
+{
+	u32 hartid			= sbi_current_hartid();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (sbi_platform_hart_disabled(plat, hartid))
+		sbi_hart_hang();
+
+	sbi_hart_unmark_available(hartid);
+
+	sbi_hart_hang();
+}

From 55e191e3b09c4979212c592a4e86e0f561ce1f97 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 09:10:41 +0530
Subject: [PATCH 0370/1765] lib: Add system early_exit and final_exit APIs

This patch adds system-level early_exit and final_exit APIs
with corresponding platform hooks. These new APIs will be
primarily used by sbi_exit() in OpenSBI exit path.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 27 +++++++++++++++++++++++++++
 include/sbi/sbi_system.h   |  4 ++++
 lib/sbi/sbi_init.c         |  4 ++++
 lib/sbi/sbi_system.c       | 10 ++++++++++
 4 files changed, 45 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 010328eb684..72bb7e29cca 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -76,6 +76,11 @@ struct sbi_platform_operations {
 	/** Platform final initialization */
 	int (*final_init)(bool cold_boot);
 
+	/** Platform early exit */
+	void (*early_exit)(void);
+	/** Platform final exit */
+	void (*final_exit)(void);
+
 	/** For platforms that do not implement misa, non-standard
 	 * methods are needed to determine cpu extension.
 	 */
@@ -301,6 +306,28 @@ static inline int sbi_platform_final_init(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Early exit for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_early_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->early_exit)
+		sbi_platform_ops(plat)->early_exit();
+}
+
+/**
+ * Final exit for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_final_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->final_exit)
+		sbi_platform_ops(plat)->final_exit();
+}
+
 /**
  * Check CPU extension in MISA
  *
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index bf768d9a600..c1ef3742d34 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -18,6 +18,10 @@ int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot);
 
 int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot);
 
+void sbi_system_early_exit(struct sbi_scratch *scratch);
+
+void sbi_system_final_exit(struct sbi_scratch *scratch);
+
 void __attribute__((noreturn))
 sbi_system_reboot(struct sbi_scratch *scratch, u32 type);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index b4c242f27d9..d5d35130f94 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -203,5 +203,9 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_hart_unmark_available(hartid);
 
+	sbi_platform_early_exit(plat);
+
+	sbi_platform_final_exit(plat);
+
 	sbi_hart_hang();
 }
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index cdc85d6fa60..9ea3c21d430 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -23,6 +23,16 @@ int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot)
 	return sbi_platform_final_init(sbi_platform_ptr(scratch), cold_boot);
 }
 
+void sbi_system_early_exit(struct sbi_scratch *scratch)
+{
+	sbi_platform_early_exit(sbi_platform_ptr(scratch));
+}
+
+void sbi_system_final_exit(struct sbi_scratch *scratch)
+{
+	sbi_platform_final_exit(sbi_platform_ptr(scratch));
+}
+
 void __attribute__((noreturn))
 sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 

From 6469ed101cb3c036cce1ead0d64160a7315f72af Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 09:18:42 +0530
Subject: [PATCH 0371/1765] lib: Add timer exit API

We add sbi_timer_exit() API for OpenSBI exit path handling in
sbi_exit() implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 13 +++++++++++++
 include/sbi/sbi_timer.h    |  4 ++--
 lib/sbi/sbi_init.c         |  2 ++
 lib/sbi/sbi_timer.c        | 15 ++++++++++-----
 4 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 72bb7e29cca..02007af5851 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -125,6 +125,8 @@ struct sbi_platform_operations {
 	void (*timer_event_stop)(void);
 	/** Initialize platform timer for current HART */
 	int (*timer_init)(bool cold_boot);
+	/** Exit platform timer for current HART */
+	void (*timer_exit)(void);
 
 	/** Reboot the platform */
 	int (*system_reboot)(u32 type);
@@ -552,6 +554,17 @@ static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Exit the platform timer for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->timer_exit)
+		sbi_platform_ops(plat)->timer_exit();
+}
+
 /**
  * Reboot the platform
  *
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index c14c8d0d3cc..401be683451 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -24,12 +24,12 @@ void sbi_timer_set_delta(struct sbi_scratch *scratch, ulong delta);
 
 void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper);
 
-void sbi_timer_event_stop(struct sbi_scratch *scratch);
-
 void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event);
 
 void sbi_timer_process(struct sbi_scratch *scratch);
 
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot);
 
+void sbi_timer_exit(struct sbi_scratch *scratch);
+
 #endif
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index d5d35130f94..2247324c327 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -205,6 +205,8 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_platform_early_exit(plat);
 
+	sbi_timer_exit(scratch);
+
 	sbi_platform_final_exit(plat);
 
 	sbi_hart_hang();
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 1ba386f0442..60ddfaad4ec 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -76,11 +76,6 @@ void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper)
 	*time_delta |= ((u64)delta_upper << 32);
 }
 
-void sbi_timer_event_stop(struct sbi_scratch *scratch)
-{
-	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
-}
-
 void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
 {
 	sbi_platform_timer_event_start(sbi_platform_ptr(scratch), next_event);
@@ -113,3 +108,13 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 
 	return sbi_platform_timer_init(sbi_platform_ptr(scratch), cold_boot);
 }
+
+void sbi_timer_exit(struct sbi_scratch *scratch)
+{
+	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
+
+	csr_clear(CSR_MIP, MIP_STIP);
+	csr_clear(CSR_MIE, MIP_MTIP);
+
+	sbi_platform_timer_exit(sbi_platform_ptr(scratch));
+}

From b325f6baefeafcee169e5f8a529882fdc0f47dc5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 09:39:10 +0530
Subject: [PATCH 0372/1765] lib: Add ipi exit API

We add sbi_ipi_exit() API for exit path handling in sbi_exit()
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h      |  2 ++
 include/sbi/sbi_platform.h | 13 +++++++++++++
 lib/sbi/sbi_init.c         |  2 ++
 lib/sbi/sbi_ipi.c          | 19 ++++++++++++++++++-
 4 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 109e9af7ef5..2dbc096e3b3 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -36,4 +36,6 @@ void sbi_ipi_process(struct sbi_scratch *scratch);
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
 
+void sbi_ipi_exit(struct sbi_scratch *scratch);
+
 #endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 02007af5851..21082fcecc6 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -116,6 +116,8 @@ struct sbi_platform_operations {
 	void (*ipi_clear)(u32 target_hart);
 	/** Initialize IPI for current HART */
 	int (*ipi_init)(bool cold_boot);
+	/** Exit IPI for current HART */
+	void (*ipi_exit)(void);
 
 	/** Get platform timer value */
 	u64 (*timer_value)(void);
@@ -499,6 +501,17 @@ static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Exit the platform IPI support for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->ipi_exit)
+		sbi_platform_ops(plat)->ipi_exit();
+}
+
 /**
  * Get platform timer value
  *
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 2247324c327..c491bd8613c 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -207,6 +207,8 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_timer_exit(scratch);
 
+	sbi_ipi_exit(scratch);
+
 	sbi_platform_final_exit(plat);
 
 	sbi_hart_hang();
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index c235927487d..f58349e7758 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -160,8 +160,25 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	if (ret)
 		return ret;
 
+	/* Platform init */
+	ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
+	if (ret)
+		return ret;
+
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
 
-	return sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
+	return 0;
+}
+
+void sbi_ipi_exit(struct sbi_scratch *scratch)
+{
+	/* Disable software interrupts */
+	csr_clear(CSR_MIE, MIP_MSIP);
+
+	/* Process pending IPIs */
+	sbi_ipi_process(scratch);
+
+	/* Platform exit */
+	sbi_platform_ipi_exit(sbi_platform_ptr(scratch));
 }

From 1993182f032b71a4d16e39bff12c142dd25dd67e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 09:51:58 +0530
Subject: [PATCH 0373/1765] lib: Add irqchip exit API

We add an optional platform irqchip exit hook for exit path handling
in sbi_exit() implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 13 +++++++++++++
 lib/sbi/sbi_init.c         |  2 ++
 2 files changed, 15 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 21082fcecc6..0de8be4d28d 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -109,6 +109,8 @@ struct sbi_platform_operations {
 
 	/** Initialize the platform interrupt controller for current HART */
 	int (*irqchip_init)(bool cold_boot);
+	/** Exit the platform interrupt controller for current HART */
+	void (*irqchip_exit)(void);
 
 	/** Send IPI to a target HART */
 	void (*ipi_send)(u32 target_hart);
@@ -459,6 +461,17 @@ static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
 	return 0;
 }
 
+/**
+ * Exit the platform interrupt controller for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->irqchip_exit)
+		sbi_platform_ops(plat)->irqchip_exit();
+}
+
 /**
  * Send IPI to a target HART
  *
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index c491bd8613c..37538005918 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -209,6 +209,8 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_ipi_exit(scratch);
 
+	sbi_platform_irqchip_exit(plat);
+
 	sbi_platform_final_exit(plat);
 
 	sbi_hart_hang();

From 2aa43a13cdd32f11c2dac30265272c9af8c6e42b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 10:20:12 +0530
Subject: [PATCH 0374/1765] lib: save/restore MIE CSR in
 sbi_hart_wait_for_coldboot()

Currently, sbi_hart_wait_for_coldboot() leaves MIE.MSIP bit
set when it returns which is not correct because MIE.MSIP
should be left enabled only by sbi_ipi_init().

This patch does save/restore of MIE CSR to ensure that MIE
CSR is in original state after sbi_hart_wait_for_coldboot()
returns.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a704c60c644..dd2f99e8a24 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -354,12 +354,16 @@ static unsigned long coldboot_wait_bitmap = 0;
 
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
+	unsigned long saved_mie;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
 	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
 		sbi_hart_hang();
 
+	/* Save MIE CSR */
+	saved_mie = csr_read(CSR_MIE);
+
 	/* Set MSIE bit to receive IPI */
 	csr_set(CSR_MIE, MIP_MSIP);
 
@@ -382,6 +386,9 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Release coldboot lock */
 	spin_unlock(&coldboot_lock);
 
+	/* Restore MIE CSR */
+	csr_write(CSR_MIE, saved_mie);
+
 	/* Clear current HART IPI */
 	sbi_platform_ipi_clear(plat, hartid);
 }

From b0c9787435e56550aea4d110dc503ac23f9801a6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 11:14:21 +0530
Subject: [PATCH 0375/1765] lib: do sbi_exit() upon halt IPI

Instead of doing sbi_hang() we should do sbi_exit() upon
halt IPI.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_ipi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index f58349e7758..3c505035d7e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_tlb.h>
@@ -126,7 +127,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 			sbi_tlb_fifo_process(scratch);
 			break;
 		case SBI_IPI_EVENT_HALT:
-			sbi_hart_hang();
+			sbi_exit(scratch);
 			break;
 		default:
 			break;

From 15ed1e74526d85f94c2cda338c572e36e249c803 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 11:17:44 +0530
Subject: [PATCH 0376/1765] lib: improve system reboot and shutdown
 implementation

We improve sbi_system_reboot() an sbi_system_shutdown() by:

1. Calling halt IPI to all harts (except current HART) before
   calling platform reboot/shutdown hook.
2. Calling sbi_exit() instead of sbi_hang() in-case platform
   reboot/shutdown hook failed.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_system.h |  6 ++----
 lib/sbi/sbi_system.c     | 37 ++++++++++++++++++++++++-------------
 2 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index c1ef3742d34..3ad83484df3 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -22,10 +22,8 @@ void sbi_system_early_exit(struct sbi_scratch *scratch);
 
 void sbi_system_final_exit(struct sbi_scratch *scratch);
 
-void __attribute__((noreturn))
-sbi_system_reboot(struct sbi_scratch *scratch, u32 type);
+void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type);
 
-void __attribute__((noreturn))
-sbi_system_shutdown(struct sbi_scratch *scratch, u32 type);
+void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type);
 
 #endif
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 9ea3c21d430..d189a898e9d 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_init.h>
 
 int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot)
 {
@@ -33,24 +34,34 @@ void sbi_system_final_exit(struct sbi_scratch *scratch)
 	sbi_platform_final_exit(sbi_platform_ptr(scratch));
 }
 
-void __attribute__((noreturn))
-sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
-
+void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 {
+	u32 current_hartid_mask = 1UL << sbi_current_hartid();
+
+	/* Send HALT IPI to every hart other than the current hart */
+	sbi_ipi_send_many(scratch,
+			  sbi_hart_available_mask() & ~current_hartid_mask,
+			  0, SBI_IPI_EVENT_HALT, NULL);
+
+	/* Platform specific reooot */
 	sbi_platform_system_reboot(sbi_platform_ptr(scratch), type);
-	sbi_hart_hang();
+
+	/* If platform specific reboot did not work then do sbi_exit() */
+	sbi_exit(scratch);
 }
 
-void __attribute__((noreturn))
-sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
+void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 {
-	/* First try the platform-specific method */
-	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
+	u32 current_hartid_mask = 1UL << sbi_current_hartid();
+
+	/* Send HALT IPI to every hart other than the current hart */
+	sbi_ipi_send_many(scratch,
+			  sbi_hart_available_mask() & ~current_hartid_mask,
+			  0, SBI_IPI_EVENT_HALT, NULL);
 
-	/* If that fails (or is not implemented) send an IPI on every
-	 * hart to hang and then hang the current hart */
-	sbi_ipi_send_many(scratch, sbi_hart_available_mask(), 0,
-			  SBI_IPI_EVENT_HALT, NULL);
+	/* Platform specific shutdown */
+	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
 
-	sbi_hart_hang();
+	/* If platform specific shutdown did not work then do sbi_exit() */
+	sbi_exit(scratch);
 }

From 73c19e69f3000351dc30d272a17dffa694e9b6bf Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 14:55:04 +0530
Subject: [PATCH 0377/1765] lib: zero-out memory allocated using
 sbi_scratch_alloc_offset()

We should zero-out memory allocated from extra scratch space using
sbi_scratch_alloc_offset() API hence this patch. This will not
impact performance because we mostly allocate from extra scratch
space only at cold boot time.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_scratch.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 0a615a2cdbb..95ee2f2d044 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -8,14 +8,21 @@
  */
 
 #include <sbi/riscv_locks.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
 
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
 static unsigned long extra_offset = SBI_SCRATCH_EXTRA_SPACE_OFFSET;
 
 unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 {
+	u32 i;
+	void *ptr;
 	unsigned long ret = 0;
+	struct sbi_scratch *scratch, *rscratch;
+	const struct sbi_platform *plat;
 
 	/*
 	 * We have a simple brain-dead allocator which never expects
@@ -43,6 +50,16 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 done:
 	spin_unlock(&extra_lock);
 
+	if (ret) {
+		scratch = sbi_scratch_thishart_ptr();
+		plat = sbi_platform_ptr(scratch);
+		for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+			rscratch = sbi_hart_id_to_scratch(scratch, i);
+			ptr = sbi_scratch_offset_ptr(rscratch, ret);
+			sbi_memset(ptr, 0, size);
+		}
+	}
+
 	return ret;
 }
 

From a67fd68cbf02af84af9e6e7f8e28aadcecc94910 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 3 Jan 2020 15:13:33 +0530
Subject: [PATCH 0378/1765] lib: Add sbi_init_count() API

We add sbi_init_count() API which provides number of times a
given HART completed init sequence (warmboot/coldboot).

This will be very useful in debugging. With upcoming SBI HSM
extension, it will also help in implementing one-time init
code for each HART.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_init.h |  2 ++
 lib/sbi/sbi_init.c     | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index c976276d1fa..74eb1c07599 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -16,6 +16,8 @@ struct sbi_scratch;
 
 void __noreturn sbi_init(struct sbi_scratch *scratch);
 
+unsigned long sbi_init_count(u32 hartid);
+
 void __noreturn sbi_exit(struct sbi_scratch *scratch);
 
 #endif
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 37538005918..4afeed28cf9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -70,11 +70,19 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_pmp_dump(scratch);
 }
 
+static unsigned long init_count_offset;
+
 static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
+	unsigned long *init_count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
+						     "INIT_COUNT");
+	if (!init_count_offset)
+		sbi_hart_hang();
+
 	rc = sbi_system_early_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
@@ -110,6 +118,9 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_hart_mark_available(hartid);
 
+	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
+	(*init_count)++;
+
 	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
 			     scratch->next_mode, FALSE);
 }
@@ -117,10 +128,14 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
+	unsigned long *init_count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	sbi_hart_wait_for_coldboot(scratch, hartid);
 
+	if (!init_count_offset)
+		sbi_hart_hang();
+
 	rc = sbi_system_early_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
@@ -147,6 +162,9 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_hart_mark_available(hartid);
 
+	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
+	(*init_count)++;
+
 	sbi_hart_switch_mode(hartid, scratch->next_arg1,
 			     scratch->next_addr,
 			     scratch->next_mode, FALSE);
@@ -184,6 +202,21 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 		init_warmboot(scratch, hartid);
 }
 
+unsigned long sbi_init_count(u32 hartid)
+{
+	struct sbi_scratch *scratch;
+	unsigned long *init_count;
+
+	if (sbi_platform_hart_count(sbi_platform_thishart_ptr()) <= hartid ||
+	    !init_count_offset)
+		return 0;
+
+	scratch = sbi_hart_id_to_scratch(sbi_scratch_thishart_ptr(), hartid);
+	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
+
+	return *init_count;
+}
+
 /**
  * Exit OpenSBI library for current HART and stop HART
  *

From 049ad0b3877352527ab470eba33bc767e9b54961 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Mon, 6 Jan 2020 18:41:06 -0800
Subject: [PATCH 0379/1765] build: Use -ffreestanding

this is a stand-alone/baremetal application, therefore demanding
-ffreestanding would help it compile with hosted toolchains e.g. ( linux
toolchains ), it also ensures that it won't be using platform
optimizations like inlining mem* str* functions which gcc might decide
especially with wrapper string functions in opensbi code

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 9aff0703d05..aac422ad25b 100644
--- a/Makefile
+++ b/Makefile
@@ -159,7 +159,7 @@ GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-CFLAGS		=	-g -Wall -Werror -nostdlib -fno-strict-aliasing -O2
+CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)

From e340bbf7b5be2fbb79b2358821e77af77257db5e Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Tue, 7 Jan 2020 15:08:26 +0800
Subject: [PATCH 0380/1765] include: Add OPENSBI_EXTERNAL_SBI_TYPES in
 sbi_types.h

Add OPENSBI_EXTERNAL_SBI_TYPES macro to allow external definitions of data
types and common macros. Also move some common definitions from sbi_bits.h to sbi_types.h.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_bits.h  | 13 -------------
 include/sbi/sbi_types.h | 28 ++++++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
index 320966d857a..3963d84ecc2 100644
--- a/include/sbi/sbi_bits.h
+++ b/include/sbi/sbi_bits.h
@@ -10,23 +10,10 @@
 #ifndef __SBI_BITS_H__
 #define __SBI_BITS_H__
 
-#define likely(x) __builtin_expect((x), 1)
-#define unlikely(x) __builtin_expect((x), 0)
-
-#define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b))
-#define ROUNDDOWN(a, b) ((a) / (b) * (b))
-
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
-
 #define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
 #define INSERT_FIELD(val, which, fieldval) \
 	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
 
-#define STR(x) XSTR(x)
-#define XSTR(x) #x
-
 #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
 #endif
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index f51d8881164..50b465ec005 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_TYPES_H__
 #define __SBI_TYPES_H__
 
+#ifndef OPENSBI_EXTERNAL_SBI_TYPES
+
 /* clang-format off */
 
 typedef char			s8;
@@ -60,6 +62,32 @@ typedef unsigned long		physical_size_t;
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 
+#define likely(x) __builtin_expect((x), 1)
+#define unlikely(x) __builtin_expect((x), 0)
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
+
+#define STR(x) XSTR(x)
+#define XSTR(x) #x
+
+#define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b))
+#define ROUNDDOWN(a, b) ((a) / (b) * (b))
+
 /* clang-format on */
 
+#else
+/* OPENSBI_EXTERNAL_SBI_TYPES could be defined in CFLAGS for using the
+ * external definitions of data types and common macros.
+ * OPENSBI_EXTERNAL_SBI_TYPES is the file name to external header file,
+ * the external build system should address the additional include
+ * directory ccordingly.
+ */
+
+#define XSTR(x) #x
+#define STR(x) XSTR(x)
+#include STR(OPENSBI_EXTERNAL_SBI_TYPES)
+#endif
+
 #endif

From b28b8ac0d2ac99b99362d6052af9a507757469c9 Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Wed, 8 Jan 2020 12:54:34 +0800
Subject: [PATCH 0381/1765] docs: Add description of using
 OPENSBI_EXTERNAL_SBI_TYPES

Add description of using OPENSBI_EXTERNAL_SBI_TYPES in external
firmware code base.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/library_usage.md | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/docs/library_usage.md b/docs/library_usage.md
index d765fa9afa1..ff99801fcf4 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -66,3 +66,24 @@ bootloader to service the following interrupts and traps:
 
 **Note:** external firmwares or bootloaders can be more conservative by
 forwarding all traps and interrupts to *sbi_trap_handler()*.
+
+Definitions of OpenSBI Data Types for the External Firmware
+-----------------------------------------------------------
+
+OpenSBI can be built as library using external firmware build system such as EDK2
+code base (The open source of UEFI firmware implementation) and linked with external
+firmware drivers based on the external firmware architecture.
+
+**OPENSBI_EXTERNAL_SBI_TYPES** identifier is introduced to *sbi_types.h* for selecting
+external header file during the build preprocess in order to define OpensSBI data types
+based on external firmware data type binding.
+For example, *bool* is declared as *int* in sbi_types.h. However in EDK2 build system,
+*bool* is declared as *BOOLEAN* which is defined as *unsigned char* data type.
+
+External firmware can define **OPENSBI_EXTERNAL_SBI_TYPES** in CFLAGS and specify it to the
+header file maintained in its code tree. However, the external build system has to address
+the additional include directory for the external header file based on its own build system.
+For example,
+*-D***OPENSBI_EXTERNAL_SBI_TYPES***=OpensbiTypes.h*
+Above tells *sbi_types.h* to refer to *OpensbiTypes.h* instead of using original definitions of
+data types.

From adf8b73675fe46344cd869c25e3f8546b9a8e25e Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Wed, 8 Jan 2020 14:50:35 +0800
Subject: [PATCH 0382/1765] platform: thead/c910: Remove SBI_PLATFORM_HAS_PMP

T-head c910 is a generic FPGA platform so we cannot
define PMP configuration for it in OpenSBI because
PMP configuration tend to be SOC specific.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/thead/c910/platform.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
index bc176e52c84..5dcfae88f8b 100644
--- a/platform/thead/c910/platform.h
+++ b/platform/thead/c910/platform.h
@@ -9,8 +9,7 @@
 #define C910_HART_STACK_SIZE   8192
 
 #define SBI_THEAD_FEATURES	\
-	(SBI_PLATFORM_HAS_PMP | \
-	 SBI_PLATFORM_HAS_SCOUNTEREN | \
+	(SBI_PLATFORM_HAS_SCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 

From f95dd39ab6ed9711aabc56968582aa44130a9f89 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 8 Jan 2020 09:36:09 +0530
Subject: [PATCH 0383/1765] docs: platform: Update SiFive FU540 doc as-per
 U-Boot v2020.01

With U-Boot v2020.01, the SiFive FU540 DTB required by U-Boot is
embedded in U-Boot binary itself so we don't need to do anything
special for U-Boot v2020.01 as payload to OpenSBI firmware.

This patch updates SiFive FU540 documenation assuming we use
latest U-Boot v2020.01 release.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/platform/sifive_fu540.md | 74 +++++++++++------------------------
 1 file changed, 22 insertions(+), 52 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 9fb45d6a8b3..0a9f21e84f0 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -28,7 +28,7 @@ Building SiFive Fu540 Platform
 -----------------------------
 
 In order to boot SMP Linux in U-Boot, Linux v5.1 (or higher) and latest
-U-Boot v2019.04 (or higher) should be used.
+U-Boot v2020.01 (or higher) should be used.
 
 **Linux Kernel Payload**
 
@@ -49,24 +49,12 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/bo
 **U-Boot Payload**
 
 The command-line example here assumes that U-Boot was compiled using the
-sifive_fu540_defconfig configuration and with U-Boot v2019.04 (or higher)
-having SMP support. From, Linux v5.2 (or higher) device tree is hosted in
-Linux kernel and compiled as a part of Linux kernel build process.
+sifive_fu540_defconfig configuration and with U-Boot v2020.01 (or higher).
 
 The detailed U-Boot booting guide is avaialble at [U-Boot](https://gitlab.denx.de/u-boot/u-boot/blob/master/doc/board/sifive/fu540.rst)
 
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
-or
-(For U-Boot which follows Linux v5.2 (or higher) DT bindings)
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
-```
-
-Generate the uImage from Linux Image.
-```
-mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
-		<linux_build_directory>/arch/riscv/boot/Image \
-		<linux_build_directory>/arch/riscv/boot/uImage
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
 ```
 
 **U-Boot & Linux Kernel as a single payload**
@@ -74,29 +62,22 @@ mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux
 A single monolithic image containing both U-Boot & Linux can also be used if
 network boot setup is not available.
 
-1. Generate the uImage from Linux Image.
-```
-mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
-		<linux_build_directory>/arch/riscv/boot/Image \
-		<linux_build_directory>/arch/riscv/boot/uImage
-```
-
-2. Create a temporary image with u-boot.bin as the first payload. The
+1. Create a temporary image with u-boot-dtb.bin as the first payload. The
 command-line example here assumes that U-Boot was compiled using
 sifive_fu540_defconfig configuration.
 ```
-dd if=~/workspace/u-boot-riscv/u-boot.bin of=/tmp/temp.bin bs=1M
+dd if=~/workspace/u-boot-riscv/u-boot-dtb.bin of=/tmp/temp.bin bs=1M
 ```
-3. Append the Linux Kernel image generated in step 1.
+2. Append the Linux Kernel image.
 ```
-dd if=<linux_build_directory>/arch/riscv/boot/uImage of=/tmp/temp.bin bs=1M seek=4
+dd if=<linux_build_directory>/arch/riscv/boot/Image of=/tmp/temp.bin bs=1M seek=4
 ```
-4. Compile OpenSBI with temp.bin (generated in step 3) as payload.
+3. Compile OpenSBI with temp.bin (generated in step 2) as payload.
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
 or
 (For U-Boot which follows Linux v5.2 (or higher) DT bindings)
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
 ```
 
 Flashing the OpenSBI firmware binary to storage media:
@@ -144,43 +125,33 @@ As U-Boot image is used as payload, HiFive Unleashed will boot into a U-Boot
 prompt. U-Boot tftp boot method can be used to load kernel image in U-Boot
 prompt. Here are the steps do a tftpboot.
 
-1. Set the mac address of the board.
-```
-setenv ethaddr <mac address of the board>
-```
-(Note: This step is optional)
-
-2. Set the ip address of the board.
+1. Set the ip address of the board.
 ```
 setenv ipaddr <ipaddr of the board>
 ```
-
-3. Set the tftpboot server IP.
+2. Set the tftpboot server IP.
 ```
 setenv serverip <ipaddr of the tftp server>
 ```
-
-4. Set the network gateway address.
+3. Set the network gateway address.
 ```
 setenv gatewayip <ipaddress of the network gateway>
 ```
-
-5. Load the Linux kernel image from the tftp server.
+4. Load the Linux kernel image from the tftp server.
 ```
-tftpboot ${kernel_addr_r} <uImage path in tftpboot directory>
+tftpboot ${kernel_addr_r} <Image path in tftpboot directory>
 ```
-
-6. Load the ramdisk image from the tftp server. This is only required if
+5. Load the ramdisk image from the tftp server. This is only required if
 ramdisk is loaded from tftp server. This step is optional, if rootfs is
 already part of the kernel or loaded from an external storage by kernel.
 ```
 tftpboot ${ramdisk_addr_r} <ramdisk path in tftpboot directory>
 ```
-7. Load the pre-compiled device tree via tftpboot.
+6. Load the pre-compiled device tree via tftpboot.
 ```
-tftpboot ${fdt_addr_r} <linux source>/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
+tftpboot ${fdt_addr_r} <hifive-unleashed-a00.dtb path in tftpboot directory>
 ```
-8. Set the boot command-line arguments.
+7. Set the boot command-line arguments.
 ```
 setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ```
@@ -188,13 +159,12 @@ setenv bootargs "root=<root partition> rw console=ttySIF0 earlycon=sbi"
 ** /dev/ram ** - If a ramdisk is used
 ** root=/dev/mmcblk0pX ** - If a rootfs is already on some other partition
 of sdcard)
-
-9. Now boot into Linux.
+8. Now boot into Linux.
 ```
-bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}
+booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}
 or
 (If ramdisk is not loaded from network)
-bootm ${kernel_addr_r} - ${fdt_addr_r}
+booti ${kernel_addr_r} - ${fdt_addr_r}
 ```
 
 **U-Boot & Linux Kernel as a single payload**
@@ -202,7 +172,7 @@ bootm ${kernel_addr_r} - ${fdt_addr_r}
 At U-Boot prompt execute the following boot command to boot Linux.
 
 ```
-bootm ${kernel_addr_r} - ${fdt_addr_r}
+booti ${kernel_addr_r} - ${fdt_addr_r}
 ```
 
 QEMU Specific Instructions

From 6ffe1bed09be1cb2db8755b30c0258849184400b Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Thu, 9 Jan 2020 12:49:38 +0100
Subject: [PATCH 0384/1765] firmware: Fix placement of .align directives

Move the .align directives after switching the section.  We want to align
the start of the current section, not the end of the previous section.
This also obsoletes the misguided workaround of disabling relaxation.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S            | 10 +++++-----
 firmware/fw_dynamic.S         | 18 +++++++++---------
 firmware/fw_jump.S            | 16 ++++++++--------
 firmware/fw_payload.S         | 28 +++++++++-------------------
 firmware/payloads/test_head.S |  6 +++---
 5 files changed, 34 insertions(+), 44 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 0797cc002b0..119622c67c4 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -41,8 +41,8 @@
 999:
 .endm
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _start
 	.globl _start_warm
 _start:
@@ -405,8 +405,8 @@ _link_start:
 _link_end:
 	RISCV_PTR	_fw_reloc_end
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _hartid_to_scratch
 _hartid_to_scratch:
 	add	sp, sp, -(3 * __SIZEOF_POINTER__)
@@ -440,15 +440,15 @@ _hartid_to_scratch:
 	add	sp, sp, (3 * __SIZEOF_POINTER__)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _start_hang
 _start_hang:
 	wfi
 	j	_start_hang
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _trap_handler
 _trap_handler:
 	/* Swap TP and MSCRATCH */
@@ -603,8 +603,8 @@ _skip_mstatush_restore:
 
 	mret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _reset_regs
 _reset_regs:
 
diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 192698a03cb..d6580116411 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -11,14 +11,14 @@
 
 #include "fw_base.S"
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 _bad_dynamic_info:
 	wfi
 	j	_bad_dynamic_info
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_boot_hart
 	/*
 	 * This function is called very early even before
@@ -43,8 +43,8 @@ fw_boot_hart:
 2:	li	a0, -1
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_save_info
 	/*
 	 * We can only use a0, a1, a2, a3, and a4 registers here.
@@ -86,8 +86,8 @@ fw_save_info:
 2:
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -99,8 +99,8 @@ fw_prev_arg1:
 	add	a0, zero, zero
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -113,8 +113,8 @@ fw_next_arg1:
 	REG_L	a0, (a0)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_addr
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -125,8 +125,8 @@ fw_next_addr:
 	REG_L	a0, (a0)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_mode
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -137,8 +137,8 @@ fw_next_mode:
 	REG_L	a0, (a0)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_options
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -150,8 +150,8 @@ fw_options:
 	REG_L	a0, (a0)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 _dynamic_next_arg1:
 	RISCV_PTR 0x0
 _dynamic_next_addr:
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index e0a3b538446..afbcec0e5aa 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -9,8 +9,8 @@
 
 #include "fw_base.S"
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_boot_hart
 	/*
 	 * This function is called very early even before
@@ -22,8 +22,8 @@ fw_boot_hart:
 	li	a0, -1
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_save_info
 	/*
 	 * We can only use a0, a1, a2, a3, and a4 registers here.
@@ -34,8 +34,8 @@ fw_boot_hart:
 fw_save_info:
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -47,8 +47,8 @@ fw_prev_arg1:
 	add	a0, zero, zero
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -64,8 +64,8 @@ fw_next_arg1:
 #endif
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_addr
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -76,8 +76,8 @@ fw_next_addr:
 	REG_L	a0, (a0)
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_mode
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -87,8 +87,8 @@ fw_next_mode:
 	li	a0, PRV_S
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_options
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -103,7 +103,7 @@ fw_options:
 #error "Must define FW_JUMP_ADDR"
 #endif
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 _jump_addr:
 	RISCV_PTR FW_JUMP_ADDR
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 84d9ad4b4ff..9805d8c651a 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -9,8 +9,8 @@
 
 #include "fw_base.S"
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_boot_hart
 	/*
 	 * This function is called very early even before
@@ -22,8 +22,8 @@ fw_boot_hart:
 	li	a0, -1
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_save_info
 	/*
 	 * We can only use a0, a1, a2, a3, and a4 registers here.
@@ -34,8 +34,8 @@ fw_boot_hart:
 fw_save_info:
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_prev_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -51,8 +51,8 @@ fw_prev_arg1:
 #endif
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_arg1
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -68,8 +68,8 @@ fw_next_arg1:
 #endif
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_addr
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -79,8 +79,8 @@ fw_next_addr:
 	la	a0, payload_bin
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_next_mode
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -90,8 +90,8 @@ fw_next_mode:
 	li	a0, PRV_S
 	ret
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.global fw_options
 	/*
 	 * We can only use a0, a1, and a2 registers here.
@@ -102,24 +102,16 @@ fw_options:
 	add	a0, zero, zero
 	ret
 
-	/*
-	 * We disable relaxation because use of ".align"
-	 * and ".balign" can potentially generate compile
-	 * errors with latest RISC-V GCC Binutils.
-	 */
-	.option push
-	.option norelax
-
 #ifdef FW_PAYLOAD_FDT_PATH
-	.align 4
 	.section .text, "ax", %progbits
+	.align 4
 	.globl fdt_bin
 fdt_bin:
 	.incbin	FW_PAYLOAD_FDT_PATH
 #endif
 
-	.align 4
 	.section .payload, "ax", %progbits
+	.align 4
 	.globl payload_bin
 payload_bin:
 #ifndef FW_PAYLOAD_PATH
@@ -128,5 +120,3 @@ payload_bin:
 #else
 	.incbin	FW_PAYLOAD_PATH
 #endif
-
-	.option pop
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S
index ef1405a40aa..840013e4e7c 100644
--- a/firmware/payloads/test_head.S
+++ b/firmware/payloads/test_head.S
@@ -23,8 +23,8 @@
 #define REG_L		__REG_SEL(ld, lw)
 #define REG_S		__REG_SEL(sd, sw)
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _start
 _start:
 	/* Pick one hart to run the main boot sequence */
@@ -71,15 +71,15 @@ _start_warm:
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang
 
-	.align 3
 	.section .entry, "ax", %progbits
+	.align 3
 	.globl _start_hang
 _start_hang:
 	wfi
 	j	_start_hang
 
-	.align	3
 	.section .entry, "ax", %progbits
+	.align	3
 _hart_lottery:
 	RISCV_PTR	0
 _boot_a0:

From 7daccaeebd44a0e4ad4a24884ae819787a953116 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Mon, 13 Jan 2020 11:20:56 +0800
Subject: [PATCH 0385/1765] platform: thead/c910: Don't enable L2 cache in warm
 boot

Since all harts share the same L2 cache now, there's
no need to Enable L2 cache in warm boot.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/thead/c910/platform.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 1ad3e499f07..83cfc9dbbb8 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -48,7 +48,6 @@ static int c910_early_init(bool cold_boot)
 
 		csr_write(CSR_MCOR, c910_regs.mcor);
 		csr_write(CSR_MHCR, c910_regs.mhcr);
-		csr_write(CSR_MCCR2, c910_regs.mccr2);
 		csr_write(CSR_MHINT, c910_regs.mhint);
 		csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
 	}

From a73d45ccac1794afba111dd1b46d3b7912cfe019 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Mon, 13 Jan 2020 11:20:57 +0800
Subject: [PATCH 0386/1765] platform: thead/c910: Don't set plic/clint address
 in warm boot

Since all harts share the same plic/clint address now, setting
them during cold boot is just fine.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/thead/c910/platform.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 83cfc9dbbb8..9d73bf48ea5 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -34,6 +34,10 @@ static int c910_early_init(bool cold_boot)
 		c910_regs.mccr2    = csr_read(CSR_MCCR2);
 		c910_regs.mhint    = csr_read(CSR_MHINT);
 		c910_regs.mxstatus = csr_read(CSR_MXSTATUS);
+
+		c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
+		c910_regs.clint_base_addr =
+			c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
 	} else {
 		/* Store to other core */
 		csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0);
@@ -52,10 +56,6 @@ static int c910_early_init(bool cold_boot)
 		csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
 	}
 
-	c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
-	c910_regs.clint_base_addr =
-		c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
-
 	return 0;
 }
 

From 30cdf0065562760d7fc80235e638fcff2fc97191 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Sun, 19 Jan 2020 15:31:02 +0800
Subject: [PATCH 0387/1765] scripts: Add C910 to platform list in the binary
 archive script

This patch adds T-HEAD C910 to RV64 platform list in the binary
archive script.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 2745eca1bba..014dd5598fa 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -95,6 +95,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")
 	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
+	BUILD_PLATFORM_SUBDIR+=("thead/c910")
 	;;
 *)
 	echo "Invalid RISC-V XLEN"

From 0492c5d92ba0b0e39c235cffdb8791769e22d479 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 10:45:45 +0530
Subject: [PATCH 0388/1765] include: Typo fix in comment for SBI_SCRATCH_SIZE
 define

This patch fixes a minor typo in comment for SBI_SCRATCH_SIZE define.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index fd18bb247af..2e6fd5a6bf2 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -36,7 +36,7 @@
 #define SBI_SCRATCH_OPTIONS_OFFSET		(9 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
 #define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(10 * __SIZEOF_POINTER__)
-/** Maximum size of sbi_scratch and sbi_ipi_data */
+/** Maximum size of sbi_scratch */
 #define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
 
 /* clang-format on */

From 046cc16e8be254e18df49da63fa521d2f54e3ce1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 10:48:56 +0530
Subject: [PATCH 0389/1765] lib: Move struct sbi_ipi_data definition to
 sbi_ipi.c

The struct sbi_ipi_data is only used in sbi_ipi.c so move it
to sbi_ipi.c from sbi_ipi.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h | 5 -----
 lib/sbi/sbi_ipi.c     | 4 ++++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 2dbc096e3b3..e99bfdb86f2 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -21,11 +21,6 @@
 /* clang-format on */
 
 struct sbi_scratch;
-struct sbi_trap_info;
-
-struct sbi_ipi_data {
-	unsigned long ipi_type;
-};
 
 int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask,
 		      ulong hbase, u32 event, void *data);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 3c505035d7e..e5ebfb5d626 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -20,6 +20,10 @@
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
 
+struct sbi_ipi_data {
+	unsigned long ipi_type;
+};
+
 static unsigned long ipi_data_off;
 
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,

From 3d2aaac69a967ff1986f57862c4048d42acfe1ec Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 11:02:14 +0530
Subject: [PATCH 0390/1765] lib: Introduce sbi_ipi_send_smode() API

Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_ipi_send_smode() for injecting S-mode software interrupts.

This way in future we can assign any IPI event number for S-mode
IPIs within sbi_ipi.c only.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h | 2 ++
 lib/sbi/sbi_ecall.c   | 6 ++----
 lib/sbi/sbi_ipi.c     | 6 ++++++
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index e99bfdb86f2..45f655ce6ce 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -25,6 +25,8 @@ struct sbi_scratch;
 int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask,
 		      ulong hbase, u32 event, void *data);
 
+int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
+
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
 void sbi_ipi_process(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 30e47c3fc42..6bf33ad3861 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -155,8 +155,7 @@ int sbi_ecall_ipi_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	int ret = 0;
 
 	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_SOFT, NULL);
+		ret = sbi_ipi_send_smode(scratch, args[0], args[1]);
 	else
 		ret = SBI_ENOTSUPP;
 
@@ -282,8 +281,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_many(scratch, hmask, 0,
-					       SBI_IPI_EVENT_SOFT, NULL);
+			ret = sbi_ipi_send_smode(scratch, hmask, 0);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		tlb_info.start  = 0;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index e5ebfb5d626..701b49b9942 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -101,6 +101,12 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 	return 0;
 }
 
+int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
+{
+	return sbi_ipi_send_many(scratch, hmask, hbase,
+				 SBI_IPI_EVENT_SOFT, NULL);
+}
+
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 {
 	csr_clear(CSR_MIP, MIP_SSIP);

From da9b76b957dae1cf59272cc0f351ae425351c3c8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 11:16:54 +0530
Subject: [PATCH 0391/1765] lib: Introduce sbi_ipi_send_halt() API

Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_ipi_send_halt() for halting a set of HARTs.

This way in future we can assign any IPI event number for HART
halting within sbi_ipi.c only.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h |  2 ++
 lib/sbi/sbi_ipi.c     |  6 ++++++
 lib/sbi/sbi_system.c  | 10 ++++------
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 45f655ce6ce..4a1bed0a17d 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -29,6 +29,8 @@ int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
 
+int sbi_ipi_send_halt(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
+
 void sbi_ipi_process(struct sbi_scratch *scratch);
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 701b49b9942..68c3584eb1c 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -112,6 +112,12 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
+int sbi_ipi_send_halt(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
+{
+	return sbi_ipi_send_many(scratch, hmask, hbase,
+				 SBI_IPI_EVENT_HALT, NULL);
+}
+
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
 	unsigned long ipi_type;
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index d189a898e9d..0fd4999ffe0 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -39,9 +39,8 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 	u32 current_hartid_mask = 1UL << sbi_current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	sbi_ipi_send_many(scratch,
-			  sbi_hart_available_mask() & ~current_hartid_mask,
-			  0, SBI_IPI_EVENT_HALT, NULL);
+	sbi_ipi_send_halt(scratch,
+			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
 
 	/* Platform specific reooot */
 	sbi_platform_system_reboot(sbi_platform_ptr(scratch), type);
@@ -55,9 +54,8 @@ void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 	u32 current_hartid_mask = 1UL << sbi_current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	sbi_ipi_send_many(scratch,
-			  sbi_hart_available_mask() & ~current_hartid_mask,
-			  0, SBI_IPI_EVENT_HALT, NULL);
+	sbi_ipi_send_halt(scratch,
+			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
 
 	/* Platform specific shutdown */
 	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);

From a8b4b83b7fef84b0491f5a897651a30f98d75a9a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 11:42:51 +0530
Subject: [PATCH 0392/1765] lib: Introduce sbi_tlb_fifo_request() API

Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_tlb_fifo_request() for halting a set of HARTs.

This way in future we can assign any IPI event number for remote
FENCE within sbi_tlb.c only.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h |  1 -
 include/sbi/sbi_tlb.h     |  7 ++++--
 lib/sbi/sbi_ecall.c       | 53 +++++++++++++++------------------------
 lib/sbi/sbi_tlb.c         |  8 ++++++
 4 files changed, 33 insertions(+), 36 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 2e6fd5a6bf2..d70c80d4ef7 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -44,7 +44,6 @@
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_ipi.h>
 
 /** Representation of per-HART scratch space */
 struct sbi_scratch {
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 83f94587cbc..38a9418e5b1 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -47,8 +47,11 @@ int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 hartid, void *data);
 
 void sbi_tlb_fifo_process(struct sbi_scratch *scratch);
 
-int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot);
-
 void sbi_tlb_fifo_sync(struct sbi_scratch *scratch);
 
+int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
+			 ulong hbase, struct sbi_tlb_info *tinfo);
+
+int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot);
+
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 6bf33ad3861..29df26bce35 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -180,17 +180,16 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
 		tlb_info.start = (unsigned long)args[2];
@@ -198,19 +197,16 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE,
-					&tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		tlb_info.start = (unsigned long)args[2];
@@ -218,19 +214,16 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE,
-					&tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE, &tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[2];
@@ -238,10 +231,8 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
-
-		ret = sbi_ipi_send_many(scratch, args[0], args[1],
-					SBI_IPI_EVENT_FENCE,
-					&tlb_info);
+		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
+					   &tlb_info);
 		break;
 
 	default:
@@ -291,9 +282,8 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_many(scratch, hmask, 0,
-						SBI_IPI_EVENT_FENCE,
-						&tlb_info);
+			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
+						   &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[1];
@@ -303,9 +293,8 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_many(scratch, hmask, 0,
-						SBI_IPI_EVENT_FENCE,
-						&tlb_info);
+			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
+						   &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[1];
@@ -313,13 +302,11 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		tlb_info.asid  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
-
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_many(scratch, hmask, 0,
-						SBI_IPI_EVENT_FENCE,
-						&tlb_info);
+			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
+						   &tlb_info);
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index d8215168eba..c07f4a49aee 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_ipi.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_hfence.h>
@@ -366,6 +367,13 @@ int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 	return 0;
 }
 
+int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
+			 ulong hbase, struct sbi_tlb_info *tinfo)
+{
+	return sbi_ipi_send_many(scratch, hmask, hbase,
+				 SBI_IPI_EVENT_FENCE, tinfo);
+}
+
 int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	void *tlb_mem;

From 5f762d14f0473dec97ee248e53d29b78be8a833e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 12:44:10 +0530
Subject: [PATCH 0393/1765] lib: Introduce sbi_ipi_event_create/destroy() APIs

This patch introduces sbi_ipi_event_create/destroy() APIs and
struct sbi_ipi_event_ops for creating/destroying IPI events
at runtime based of event operations.

This new APIs will help platform code and utils code to create
custom IPI events which are not part of generic OpenSBI library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h |  34 +++++++++++--
 include/sbi/sbi_tlb.h |   6 ---
 lib/sbi/sbi_ipi.c     | 113 ++++++++++++++++++++++++++++++++----------
 lib/sbi/sbi_tlb.c     |  43 +++++++++++-----
 4 files changed, 148 insertions(+), 48 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 4a1bed0a17d..d680148769d 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -14,17 +14,45 @@
 
 /* clang-format off */
 
-#define SBI_IPI_EVENT_SOFT			0x1
-#define SBI_IPI_EVENT_FENCE			0x2
-#define SBI_IPI_EVENT_HALT			0x10
+#define SBI_IPI_EVENT_MAX			__riscv_xlen
 
 /* clang-format on */
 
 struct sbi_scratch;
 
+/** IPI event operations or callbacks */
+struct sbi_ipi_event_ops {
+	/** Name of the IPI event operations */
+	char name[32];
+
+	/** Update callback to save/enqueue data for remote HART
+	 *  Note: This is an optional callback and it is called just before
+	 *  triggering IPI to remote HART.
+	 */
+	int (* update)(struct sbi_scratch *scratch,
+			struct sbi_scratch *remote_scratch,
+			u32 remote_hartid, void *data);
+
+	/** Sync callback to wait for remote HART
+	 *  Note: This is an optional callback and it is called just after
+	 *  triggering IPI to remote HART.
+	 */
+	void (* sync)(struct sbi_scratch *scratch);
+
+	/** Process callback to handle IPI event
+	 *  Note: This is a mandatory callback and it is called on the
+	 *  remote HART after IPI is triggered.
+	 */
+	void (* process)(struct sbi_scratch *scratch);
+};
+
 int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask,
 		      ulong hbase, u32 event, void *data);
 
+int sbi_ipi_event_create(const struct sbi_ipi_event_ops *ops);
+
+void sbi_ipi_event_destroy(u32 event);
+
 int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 38a9418e5b1..c8d24ef2a7f 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -43,12 +43,6 @@ struct sbi_tlb_info {
 
 #define SBI_TLB_INFO_SIZE			sizeof(struct sbi_tlb_info)
 
-int sbi_tlb_fifo_update(struct sbi_scratch *scratch, u32 hartid, void *data);
-
-void sbi_tlb_fifo_process(struct sbi_scratch *scratch);
-
-void sbi_tlb_fifo_sync(struct sbi_scratch *scratch);
-
 int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
 			 ulong hbase, struct sbi_tlb_info *tinfo);
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 68c3584eb1c..42868c5d88d 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -26,34 +26,43 @@ struct sbi_ipi_data {
 
 static unsigned long ipi_data_off;
 
-static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
-			void *data)
+static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];
+
+static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
+			u32 event, void *data)
 {
 	int ret;
 	struct sbi_scratch *remote_scratch = NULL;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data;
+	const struct sbi_ipi_event_ops *ipi_ops;
 
-	if (sbi_platform_hart_disabled(plat, hartid))
-		return -1;
+	if ((SBI_IPI_EVENT_MAX <= event) ||
+	    !ipi_ops_array[event] ||
+	    sbi_platform_hart_disabled(plat, remote_hartid))
+		return SBI_EINVAL;
+	ipi_ops = ipi_ops_array[event];
 
 	/*
 	 * Set IPI type on remote hart's scratch area and
 	 * trigger the interrupt
 	 */
-	remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
+	remote_scratch = sbi_hart_id_to_scratch(scratch, remote_hartid);
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
-	if (event == SBI_IPI_EVENT_FENCE) {
-		ret = sbi_tlb_fifo_update(remote_scratch, hartid, data);
+
+	if (ipi_ops->update) {
+		ret = ipi_ops->update(scratch, remote_scratch,
+				      remote_hartid, data);
 		if (ret < 0)
 			return ret;
 	}
+
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
 	smp_wmb();
-	sbi_platform_ipi_send(plat, hartid);
+	sbi_platform_ipi_send(plat, remote_hartid);
 
-	if (event == SBI_IPI_EVENT_FENCE)
-		sbi_tlb_fifo_sync(scratch);
+	if (ipi_ops->sync)
+		ipi_ops->sync(scratch);
 
 	return 0;
 }
@@ -101,10 +110,47 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 	return 0;
 }
 
+int sbi_ipi_event_create(const struct sbi_ipi_event_ops *ops)
+{
+	int i, ret = SBI_ENOSPC;
+
+	if (!ops || !ops->process)
+		return SBI_EINVAL;
+
+	for (i = 0; i < SBI_IPI_EVENT_MAX; i++) {
+		if (!ipi_ops_array[i]) {
+			ret = i;
+			ipi_ops_array[i] = ops;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+void sbi_ipi_event_destroy(u32 event)
+{
+	if (SBI_IPI_EVENT_MAX <= event)
+		return;
+
+	ipi_ops_array[event] = NULL;
+}
+
+static void sbi_ipi_process_smode(struct sbi_scratch *scratch)
+{
+	csr_set(CSR_MIP, MIP_SSIP);
+}
+
+static struct sbi_ipi_event_ops ipi_smode_ops = {
+	.name = "IPI_SMODE",
+	.process = sbi_ipi_process_smode,
+};
+
+static u32 ipi_smode_event = SBI_IPI_EVENT_MAX;
+
 int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase,
-				 SBI_IPI_EVENT_SOFT, NULL);
+	return sbi_ipi_send_many(scratch, hmask, hbase, ipi_smode_event, NULL);
 }
 
 void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
@@ -112,16 +158,28 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
+static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
+{
+	sbi_exit(scratch);
+}
+
+static struct sbi_ipi_event_ops ipi_halt_ops = {
+	.name = "IPI_HALT",
+	.process = sbi_ipi_process_halt,
+};
+
+static u32 ipi_halt_event = SBI_IPI_EVENT_MAX;
+
 int sbi_ipi_send_halt(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase,
-				 SBI_IPI_EVENT_HALT, NULL);
+	return sbi_ipi_send_many(scratch, hmask, hbase, ipi_halt_event, NULL);
 }
 
 void sbi_ipi_process(struct sbi_scratch *scratch)
 {
 	unsigned long ipi_type;
 	unsigned int ipi_event;
+	const struct sbi_ipi_event_ops *ipi_ops;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
@@ -135,19 +193,9 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 		if (!(ipi_type & 1UL))
 			goto skip;
 
-		switch (ipi_event) {
-		case SBI_IPI_EVENT_SOFT:
-			csr_set(CSR_MIP, MIP_SSIP);
-			break;
-		case SBI_IPI_EVENT_FENCE:
-			sbi_tlb_fifo_process(scratch);
-			break;
-		case SBI_IPI_EVENT_HALT:
-			sbi_exit(scratch);
-			break;
-		default:
-			break;
-		};
+		ipi_ops = ipi_ops_array[ipi_event];
+		if (ipi_ops && ipi_ops->process)
+			ipi_ops->process(scratch);
 
 skip:
 		ipi_type = ipi_type >> 1;
@@ -165,9 +213,20 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 							"IPI_DATA");
 		if (!ipi_data_off)
 			return SBI_ENOMEM;
+		ret = sbi_ipi_event_create(&ipi_smode_ops);
+		if (ret < 0)
+			return ret;
+		ipi_smode_event = ret;
+		ret = sbi_ipi_event_create(&ipi_halt_ops);
+		if (ret < 0)
+			return ret;
+		ipi_halt_event = ret;
 	} else {
 		if (!ipi_data_off)
 			return SBI_ENOMEM;
+		if (SBI_IPI_EVENT_MAX <= ipi_smode_event ||
+		    SBI_IPI_EVENT_MAX <= ipi_halt_event)
+			return SBI_ENOSPC;
 	}
 
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index c07f4a49aee..0d9ba1951e1 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -222,7 +222,7 @@ static void sbi_tlb_fifo_process_count(struct sbi_scratch *scratch, int count)
 	}
 }
 
-void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
+static void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
 {
 	struct sbi_tlb_info tinfo;
 	struct sbi_fifo *tlb_fifo =
@@ -232,7 +232,7 @@ void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
 		sbi_tlb_entry_process(scratch, &tinfo);
 }
 
-void sbi_tlb_fifo_sync(struct sbi_scratch *scratch)
+static void sbi_tlb_fifo_sync(struct sbi_scratch *scratch)
 {
 	unsigned long *tlb_sync =
 			sbi_scratch_offset_ptr(scratch, tlb_sync_off);
@@ -315,11 +315,12 @@ static int sbi_tlb_fifo_update_cb(void *in, void *data)
 	return ret;
 }
 
-int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
+static int sbi_tlb_fifo_update(struct sbi_scratch *scratch,
+			       struct sbi_scratch *remote_scratch,
+			       u32 remote_hartid, void *data)
 {
 	int ret;
 	struct sbi_fifo *tlb_fifo_r;
-	struct sbi_scratch *lscratch;
 	struct sbi_tlb_info *tinfo = data;
 	u32 curr_hartid = sbi_current_hartid();
 
@@ -337,13 +338,12 @@ int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 	 * If the request is to queue a tlb flush entry for itself
 	 * then just do a local flush and return;
 	 */
-	if (hartid == curr_hartid) {
+	if (remote_hartid == curr_hartid) {
 		sbi_tlb_local_flush(tinfo);
 		return -1;
 	}
 
-	lscratch = sbi_hart_id_to_scratch(rscratch, curr_hartid);
-	tlb_fifo_r = sbi_scratch_offset_ptr(rscratch, tlb_fifo_off);
+	tlb_fifo_r = sbi_scratch_offset_ptr(remote_scratch, tlb_fifo_off);
 
 	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, sbi_tlb_fifo_update_cb);
 	if (ret != SBI_FIFO_UNCHANGED) {
@@ -359,23 +359,32 @@ int sbi_tlb_fifo_update(struct sbi_scratch *rscratch, u32 hartid, void *data)
 		 * TODO: Introduce a wait/wakeup event mechanism to handle
 		 * this properly.
 		 */
-		sbi_tlb_fifo_process_count(lscratch, 1);
-		sbi_dprintf(rscratch, "hart%d: hart%d tlb fifo full\n",
-			    curr_hartid, hartid);
+		sbi_tlb_fifo_process_count(scratch, 1);
+		sbi_dprintf(remote_scratch, "hart%d: hart%d tlb fifo full\n",
+			    curr_hartid, remote_hartid);
 	}
 
 	return 0;
 }
 
+static struct sbi_ipi_event_ops tlb_ops = {
+	.name = "IPI_TLB",
+	.update = sbi_tlb_fifo_update,
+	.sync = sbi_tlb_fifo_sync,
+	.process = sbi_tlb_fifo_process,
+};
+
+static u32 tlb_event = SBI_IPI_EVENT_MAX;
+
 int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
 			 ulong hbase, struct sbi_tlb_info *tinfo)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase,
-				 SBI_IPI_EVENT_FENCE, tinfo);
+	return sbi_ipi_send_many(scratch, hmask, hbase, tlb_event, tinfo);
 }
 
 int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	int ret;
 	void *tlb_mem;
 	unsigned long *tlb_sync;
 	struct sbi_fifo *tlb_q;
@@ -400,12 +409,22 @@ int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
 			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
 		}
+		ret = sbi_ipi_event_create(&tlb_ops);
+		if (ret < 0) {
+			sbi_scratch_free_offset(tlb_fifo_mem_off);
+			sbi_scratch_free_offset(tlb_fifo_off);
+			sbi_scratch_free_offset(tlb_sync_off);
+			return ret;
+		}
+		tlb_event = ret;
 		tlb_range_flush_limit = sbi_platform_tlbr_flush_limit(plat);
 	} else {
 		if (!tlb_sync_off ||
 		    !tlb_fifo_off ||
 		    !tlb_fifo_mem_off)
 			return SBI_ENOMEM;
+		if (SBI_IPI_EVENT_MAX <= tlb_event)
+			return SBI_ENOSPC;
 	}
 
 	tlb_sync = sbi_scratch_offset_ptr(scratch, tlb_sync_off);

From 817d50d0d477c2e830b92c3afb523711ca0bae3f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 13:21:47 +0530
Subject: [PATCH 0394/1765] lib: Drop _fifo from the name of various
 sbi_tlb_fifo_xyz() functions

This patch drops _fifo from the name of various sbi_tlb_fifo_xyz()
functions because all these functions deal with remote TLB managment
and FIFO is the per-HART data structure used internally by remote
TLB implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_tlb.h |  6 ++--
 lib/sbi/sbi_ecall.c   | 30 +++++++-------------
 lib/sbi/sbi_ipi.c     |  2 +-
 lib/sbi/sbi_tlb.c     | 64 +++++++++++++++++++++----------------------
 4 files changed, 46 insertions(+), 56 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index c8d24ef2a7f..eb3d925b7f1 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -43,9 +43,9 @@ struct sbi_tlb_info {
 
 #define SBI_TLB_INFO_SIZE			sizeof(struct sbi_tlb_info)
 
-int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
-			 ulong hbase, struct sbi_tlb_info *tinfo);
+int sbi_tlb_request(struct sbi_scratch *scratch, ulong hmask,
+		    ulong hbase, struct sbi_tlb_info *tinfo);
 
-int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot);
+int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot);
 
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 29df26bce35..8d136ccfc71 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -180,16 +180,14 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.size  = 0;
 		tlb_info.type  = SBI_ITLB_FLUSH;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
 		tlb_info.start = (unsigned long)args[2];
@@ -197,16 +195,14 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		tlb_info.start = (unsigned long)args[2];
@@ -214,16 +210,14 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[2];
 		tlb_info.size  = (unsigned long)args[3];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[2];
@@ -231,8 +225,7 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 		tlb_info.asid  = (unsigned long)args[4];
 		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
 		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_fifo_request(scratch, args[0], args[1],
-					   &tlb_info);
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 
 	default:
@@ -282,8 +275,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
-						   &tlb_info);
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		tlb_info.start = (unsigned long)args[1];
@@ -293,8 +285,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
-						   &tlb_info);
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		tlb_info.start = (unsigned long)args[1];
@@ -305,8 +296,7 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_fifo_request(scratch, hmask, 0,
-						   &tlb_info);
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 42868c5d88d..a900fda20a9 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -232,7 +232,7 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	ipi_data->ipi_type = 0x00;
 
-	ret = sbi_tlb_fifo_init(scratch, cold_boot);
+	ret = sbi_tlb_init(scratch, cold_boot);
 	if (ret)
 		return ret;
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 0d9ba1951e1..072915f848e 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -32,7 +32,7 @@ static void sbi_tlb_flush_all(void)
 	__asm__ __volatile("sfence.vma");
 }
 
-static void sbi_tlb_fifo_hfence_vvma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_hfence_vvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -48,7 +48,7 @@ static void sbi_tlb_fifo_hfence_vvma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_fifo_hfence_gvma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_hfence_gvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -64,7 +64,7 @@ static void sbi_tlb_fifo_hfence_gvma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_sfence_vma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -83,7 +83,7 @@ static void sbi_tlb_fifo_sfence_vma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_fifo_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -105,7 +105,7 @@ static void sbi_tlb_fifo_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_fifo_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -127,7 +127,7 @@ static void sbi_tlb_fifo_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_fifo_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -160,22 +160,22 @@ static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
 {
 	switch (tinfo->type) {
 	case SBI_TLB_FLUSH_VMA:
-		sbi_tlb_fifo_sfence_vma(tinfo);
+		sbi_tlb_sfence_vma(tinfo);
 		break;
 	case SBI_TLB_FLUSH_VMA_ASID:
-		sbi_tlb_fifo_sfence_vma_asid(tinfo);
+		sbi_tlb_sfence_vma_asid(tinfo);
 		break;
 	case SBI_TLB_FLUSH_GVMA:
-		sbi_tlb_fifo_hfence_gvma(tinfo);
+		sbi_tlb_hfence_gvma(tinfo);
 		break;
 	case SBI_TLB_FLUSH_GVMA_VMID:
-		sbi_tlb_fifo_hfence_gvma_vmid(tinfo);
+		sbi_tlb_hfence_gvma_vmid(tinfo);
 		break;
 	case SBI_TLB_FLUSH_VVMA:
-		sbi_tlb_fifo_hfence_vvma(tinfo);
+		sbi_tlb_hfence_vvma(tinfo);
 		break;
 	case SBI_TLB_FLUSH_VVMA_ASID:
-		sbi_tlb_fifo_hfence_vvma_asid(tinfo);
+		sbi_tlb_hfence_vvma_asid(tinfo);
 		break;
 	case SBI_ITLB_FLUSH:
 		__asm__ __volatile("fence.i");
@@ -206,7 +206,7 @@ static void sbi_tlb_entry_process(struct sbi_scratch *scratch,
 	}
 }
 
-static void sbi_tlb_fifo_process_count(struct sbi_scratch *scratch, int count)
+static void sbi_tlb_process_count(struct sbi_scratch *scratch, int count)
 {
 	struct sbi_tlb_info tinfo;
 	u32 deq_count = 0;
@@ -222,7 +222,7 @@ static void sbi_tlb_fifo_process_count(struct sbi_scratch *scratch, int count)
 	}
 }
 
-static void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
+static void sbi_tlb_process(struct sbi_scratch *scratch)
 {
 	struct sbi_tlb_info tinfo;
 	struct sbi_fifo *tlb_fifo =
@@ -232,7 +232,7 @@ static void sbi_tlb_fifo_process(struct sbi_scratch *scratch)
 		sbi_tlb_entry_process(scratch, &tinfo);
 }
 
-static void sbi_tlb_fifo_sync(struct sbi_scratch *scratch)
+static void sbi_tlb_sync(struct sbi_scratch *scratch)
 {
 	unsigned long *tlb_sync =
 			sbi_scratch_offset_ptr(scratch, tlb_sync_off);
@@ -242,14 +242,14 @@ static void sbi_tlb_fifo_sync(struct sbi_scratch *scratch)
 		 * While we are waiting for remote hart to set the sync,
 		 * consume fifo requests to avoid deadlock.
 		 */
-		sbi_tlb_fifo_process_count(scratch, 1);
+		sbi_tlb_process_count(scratch, 1);
 	}
 
 	return;
 }
 
-static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
-					     struct sbi_tlb_info *next)
+static inline int __sbi_tlb_range_check(struct sbi_tlb_info *curr,
+					struct sbi_tlb_info *next)
 {
 	unsigned long curr_end;
 	unsigned long next_end;
@@ -291,7 +291,7 @@ static inline int __sbi_tlb_fifo_range_check(struct sbi_tlb_info *curr,
  *	before continuing the while loop. This method is preferred over wfi/ipi because
  *	of MMIO cost involved in later method.
  */
-static int sbi_tlb_fifo_update_cb(void *in, void *data)
+static int sbi_tlb_update_cb(void *in, void *data)
 {
 	struct sbi_tlb_info *curr;
 	struct sbi_tlb_info *next;
@@ -306,18 +306,18 @@ static int sbi_tlb_fifo_update_cb(void *in, void *data)
 	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
 	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
 		if (next->asid == curr->asid)
-			ret = __sbi_tlb_fifo_range_check(curr, next);
+			ret = __sbi_tlb_range_check(curr, next);
 	} else if (next->type == SBI_TLB_FLUSH_VMA &&
 		   curr->type == SBI_TLB_FLUSH_VMA) {
-			ret = __sbi_tlb_fifo_range_check(curr, next);
+			ret = __sbi_tlb_range_check(curr, next);
 	}
 
 	return ret;
 }
 
-static int sbi_tlb_fifo_update(struct sbi_scratch *scratch,
-			       struct sbi_scratch *remote_scratch,
-			       u32 remote_hartid, void *data)
+static int sbi_tlb_update(struct sbi_scratch *scratch,
+			  struct sbi_scratch *remote_scratch,
+			  u32 remote_hartid, void *data)
 {
 	int ret;
 	struct sbi_fifo *tlb_fifo_r;
@@ -345,7 +345,7 @@ static int sbi_tlb_fifo_update(struct sbi_scratch *scratch,
 
 	tlb_fifo_r = sbi_scratch_offset_ptr(remote_scratch, tlb_fifo_off);
 
-	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, sbi_tlb_fifo_update_cb);
+	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, sbi_tlb_update_cb);
 	if (ret != SBI_FIFO_UNCHANGED) {
 		return 1;
 	}
@@ -359,7 +359,7 @@ static int sbi_tlb_fifo_update(struct sbi_scratch *scratch,
 		 * TODO: Introduce a wait/wakeup event mechanism to handle
 		 * this properly.
 		 */
-		sbi_tlb_fifo_process_count(scratch, 1);
+		sbi_tlb_process_count(scratch, 1);
 		sbi_dprintf(remote_scratch, "hart%d: hart%d tlb fifo full\n",
 			    curr_hartid, remote_hartid);
 	}
@@ -369,20 +369,20 @@ static int sbi_tlb_fifo_update(struct sbi_scratch *scratch,
 
 static struct sbi_ipi_event_ops tlb_ops = {
 	.name = "IPI_TLB",
-	.update = sbi_tlb_fifo_update,
-	.sync = sbi_tlb_fifo_sync,
-	.process = sbi_tlb_fifo_process,
+	.update = sbi_tlb_update,
+	.sync = sbi_tlb_sync,
+	.process = sbi_tlb_process,
 };
 
 static u32 tlb_event = SBI_IPI_EVENT_MAX;
 
-int sbi_tlb_fifo_request(struct sbi_scratch *scratch, ulong hmask,
-			 ulong hbase, struct sbi_tlb_info *tinfo)
+int sbi_tlb_request(struct sbi_scratch *scratch, ulong hmask,
+		    ulong hbase, struct sbi_tlb_info *tinfo)
 {
 	return sbi_ipi_send_many(scratch, hmask, hbase, tlb_event, tinfo);
 }
 
-int sbi_tlb_fifo_init(struct sbi_scratch *scratch, bool cold_boot)
+int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int ret;
 	void *tlb_mem;

From 84cd4fc913e6475083f0a15993f2b4ad0705c717 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Jan 2020 13:31:12 +0530
Subject: [PATCH 0395/1765] lib: Initialize TLB management directly from
 coldboot/warmboot path

Currently, the remote TLB management is initialized via IPI init
which is counter intuitive. This patch initializes remote TLB
management directly from init_coldboot() and init_warmboot()
after IPI init is done.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 9 +++++++++
 lib/sbi/sbi_ipi.c  | 6 ------
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 4afeed28cf9..c5a899c3519 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
+#include <sbi/sbi_tlb.h>
 #include <sbi/sbi_version.h>
 
 #define BANNER                                              \
@@ -103,6 +104,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_tlb_init(scratch, TRUE);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_timer_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
@@ -152,6 +157,10 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_tlb_init(scratch, FALSE);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_timer_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index a900fda20a9..206931c60be 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -17,8 +17,6 @@
 #include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_tlb.h>
-#include <sbi/sbi_trap.h>
 
 struct sbi_ipi_data {
 	unsigned long ipi_type;
@@ -232,10 +230,6 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	ipi_data->ipi_type = 0x00;
 
-	ret = sbi_tlb_init(scratch, cold_boot);
-	if (ret)
-		return ret;
-
 	/* Platform init */
 	ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
 	if (ret)

From 0a411bf717d20a212949af443b275fab9469992f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Jan 2020 16:42:41 +0530
Subject: [PATCH 0396/1765] include: Add generic and simple list handling APIs

This patch adds generic and simple list handling APIs adapted
from Xvisor sources.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_list.h  | 152 ++++++++++++++++++++++++++++++++++++++++
 include/sbi/sbi_types.h |  11 +++
 2 files changed, 163 insertions(+)
 create mode 100644 include/sbi/sbi_list.h

diff --git a/include/sbi/sbi_list.h b/include/sbi/sbi_list.h
new file mode 100644
index 00000000000..1174ad274c5
--- /dev/null
+++ b/include/sbi/sbi_list.h
@@ -0,0 +1,152 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Simple doubly-linked list library.
+ *
+ * Adapted from Xvisor source file libs/include/libs/list.h
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_LIST_H__
+#define __SBI_LIST_H__
+
+#include <sbi/sbi_types.h>
+
+#define SBI_LIST_POISON_PREV	0xDEADBEEF
+#define SBI_LIST_POISON_NEXT	0xFADEBABE
+
+struct sbi_dlist {
+	struct sbi_dlist *next, *prev;
+};
+
+#define SBI_LIST_HEAD_INIT(__lname)	{ &(__lname), &(__lname) }
+
+#define SBI_LIST_HEAD(_lname)	\
+struct sbi_dlist _lname = SBI_LIST_HEAD_INIT(_lname)
+
+#define SBI_INIT_LIST_HEAD(ptr)	\
+do { \
+	(ptr)->next = ptr; (ptr)->prev = ptr; \
+} while (0);
+
+static inline void __sbi_list_add(struct sbi_dlist *new,
+				  struct sbi_dlist *prev,
+				  struct sbi_dlist *next)
+{
+	new->prev = prev;
+	new->next = next;
+	prev->next = new;
+	next->prev = new;
+}
+
+/**
+ * Adds the new node after the given head.
+ * @param new New node that needs to be added to list.
+ * @param head List head after which the "new" node should be added.
+ * Note: the new node is added after the head.
+ */
+static inline void sbi_list_add(struct sbi_dlist *new, struct sbi_dlist *head)
+{
+	__sbi_list_add(new, head, head->next);
+}
+
+/**
+ * Adds a node at the tail where tnode points to tail node.
+ * @param new The new node to be added before tail.
+ * @param tnode The current tail node.
+ * Note: the new node is added before tail node.
+ */
+static inline void sbi_list_add_tail(struct sbi_dlist *new,
+				     struct sbi_dlist *tnode)
+{
+	__sbi_list_add(new, tnode->prev, tnode);
+}
+
+static inline void __sbi_list_del(struct sbi_dlist *prev,
+				  struct sbi_dlist *next)
+{
+	prev->next = next;
+	next->prev = prev;
+}
+
+static inline void __sbi_list_del_entry(struct sbi_dlist *entry)
+{
+	__sbi_list_del(entry->prev, entry->next);
+}
+
+/**
+ * Deletes a given entry from list.
+ * @param node Node to be deleted.
+ */
+static inline void sbi_list_del(struct sbi_dlist *entry)
+{
+	__sbi_list_del(entry->prev, entry->next);
+	entry->next = (void *)SBI_LIST_POISON_NEXT;
+	entry->prev = (void *)SBI_LIST_POISON_PREV;
+}
+
+/**
+ * Deletes entry from list and reinitialize it.
+ * @param entry the element to delete from the list.
+ */
+static inline void sbi_list_del_init(struct sbi_dlist *entry)
+{
+	__sbi_list_del_entry(entry);
+	SBI_INIT_LIST_HEAD(entry);
+}
+
+/**
+ * Get the struct for this entry
+ * @param ptr the &struct list_head pointer.
+ * @param type the type of the struct this is embedded in.
+ * @param member the name of the list_struct within the struct.
+ */
+#define sbi_list_entry(ptr, type, member) \
+	container_of(ptr, type, member)
+
+/**
+ * Get the first element from a list
+ * @param ptr the list head to take the element from.
+ * @param type the type of the struct this is embedded in.
+ * @param member the name of the list_struct within the struct.
+ *
+ * Note: that list is expected to be not empty.
+ */
+#define sbi_list_first_entry(ptr, type, member) \
+	sbi_list_entry((ptr)->next, type, member)
+
+/**
+ * Get the last element from a list
+ * @param ptr the list head to take the element from.
+ * @param type the type of the struct this is embedded in.
+ * @param member the name of the list_head within the struct.
+ *
+ * Note: that list is expected to be not empty.
+ */
+#define sbi_list_last_entry(ptr, type, member) \
+	sbi_list_entry((ptr)->prev, type, member)
+
+/**
+ * Iterate over a list
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param head the head for your list.
+ */
+#define sbi_list_for_each(pos, head) \
+	for (pos = (head)->next; pos != (head); pos = pos->next)
+
+/**
+ * Iterate over list of given type
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
+ */
+#define sbi_list_for_each_entry(pos, head, member) \
+	for (pos = sbi_list_entry((head)->next, typeof(*pos), member);	\
+	     &pos->member != (head); 	\
+	     pos = sbi_list_entry(pos->member.next, typeof(*pos), member))
+
+#endif
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 50b465ec005..b1686bf312d 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -65,6 +65,17 @@ typedef unsigned long		physical_size_t;
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)
 
+#undef offsetof
+#ifdef __compiler_offsetof
+#define offsetof(TYPE, MEMBER) __compiler_offsetof(TYPE,MEMBER)
+#else
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+#endif
+
+#define container_of(ptr, type, member) ({			\
+	const typeof(((type *)0)->member) * __mptr = (ptr);	\
+	(type *)((char *)__mptr - offsetof(type, member)); })
+
 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 #define MIN(a, b) ((a) < (b) ? (a) : (b))
 #define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)

From 37923c4a66180b2f7881d959cd631038e81dbfec Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 16 Jan 2020 11:38:49 +0530
Subject: [PATCH 0397/1765] lib: Add dynamic registration of SBI extensions

This patch extends our SBI ecall implementation to allow
dynamic registration of various SBI extensions. Using this
dynamic registration we can break-up SBI ecall implementation
into multiple files and even register experimental/custom
SBI extensions from platform code.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h |  22 ++++
 lib/sbi/sbi_ecall.c     | 240 +++++++++++++++++++++++++++++-----------
 lib/sbi/sbi_init.c      |   4 +
 3 files changed, 200 insertions(+), 66 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index a5b47a1cff3..e9a9ef6eb0a 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -11,15 +11,37 @@
 #define __SBI_ECALL_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
 
 struct sbi_trap_regs;
+struct sbi_trap_info;
 struct sbi_scratch;
 
+struct sbi_ecall_extension {
+	struct sbi_dlist head;
+	unsigned long extid_start;
+	unsigned long extid_end;
+	int (* probe)(struct sbi_scratch *scratch,
+		      unsigned long extid, unsigned long *out_val);
+	int (* handle)(struct sbi_scratch *scratch,
+		       unsigned long extid, unsigned long funcid,
+		       unsigned long *args, unsigned long *out_val,
+		       struct sbi_trap_info *out_trap);
+};
+
 u16 sbi_ecall_version_major(void);
 
 u16 sbi_ecall_version_minor(void);
 
+struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid);
+
+int sbi_ecall_register_extension(struct sbi_ecall_extension *ext);
+
+void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext);
+
 int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch);
 
+int sbi_ecall_init(void);
+
 #endif
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 8d136ccfc71..1c49d79d2b8 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -52,49 +52,29 @@ static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch, ulong *pmask,
 	return 0;
 }
 
-int sbi_check_extension(struct sbi_scratch *scratch, unsigned long extid,
-			unsigned long *out_val)
+static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
+				unsigned long extid,
+				unsigned long *out_val)
 {
-	/**
-	 * Each extension apart from base & 0.1, will be implemented as
-	 * platform specific feature. Thus, extension probing can be achieved
-	 * by checking the feature bits of the platform. We can create a map
-	 * between extension ID & feature and use a generic function to check
-	 * or just use a switch case for every new extension support added
-	 * TODO: Implement it.
-	 */
-
-	if ((extid >= SBI_EXT_0_1_SET_TIMER && extid <= SBI_EXT_0_1_SHUTDOWN) ||
-	    (extid == SBI_EXT_BASE) ||
-	    (extid == SBI_EXT_TIME) ||
-	    (extid == SBI_EXT_IPI)  ||
-	    (extid == SBI_EXT_RFENCE)) {
-		*out_val = 1;
-	} else if (extid >= SBI_EXT_VENDOR_START &&
-		   extid <= SBI_EXT_VENDOR_END) {
-		*out_val = sbi_platform_vendor_ext_check(
-						sbi_platform_ptr(scratch),
-						extid);
-	} else
+	struct sbi_ecall_extension *ext;
+
+	ext = sbi_ecall_find_extension(extid);
+	if (!ext) {
 		*out_val = 0;
+		return 0;
+	}
 
-	return 0;
-}
+	if (ext->probe)
+		return ext->probe(scratch, extid, out_val);
 
-int sbi_ecall_vendor_ext_handler(struct sbi_scratch *scratch,
-				 unsigned long extid, unsigned long funcid,
-				 unsigned long *args, unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
-{
-	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
-						extid, funcid, args,
-						out_val, out_trap);
+	*out_val = 1;
+	return 0;
 }
 
-int sbi_ecall_base_handler(struct sbi_scratch *scratch,
-			   unsigned long extid, unsigned long funcid,
-			   unsigned long *args, unsigned long *out_val,
-			   struct sbi_trap_info *out_trap)
+static int sbi_ecall_base_handler(struct sbi_scratch *scratch,
+				  unsigned long extid, unsigned long funcid,
+				  unsigned long *args, unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
@@ -122,7 +102,7 @@ int sbi_ecall_base_handler(struct sbi_scratch *scratch,
 		*out_val = csr_read(CSR_MIMPID);
 		break;
 	case SBI_EXT_BASE_PROBE_EXT:
-		ret = sbi_check_extension(scratch, args[0], out_val);
+		ret = sbi_ecall_base_probe(scratch, args[0], out_val);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
@@ -131,8 +111,16 @@ int sbi_ecall_base_handler(struct sbi_scratch *scratch,
 	return ret;
 }
 
-int sbi_ecall_time_handler(struct sbi_scratch *scratch, unsigned long funcid,
-			   unsigned long *args)
+static struct sbi_ecall_extension ecall_base = {
+	.extid_start = SBI_EXT_BASE,
+	.extid_end = SBI_EXT_BASE,
+	.handle = sbi_ecall_base_handler,
+};
+
+static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
+				  unsigned long extid, unsigned long funcid,
+				  unsigned long *args, unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
@@ -149,8 +137,16 @@ int sbi_ecall_time_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	return ret;
 }
 
-int sbi_ecall_ipi_handler(struct sbi_scratch *scratch, unsigned long funcid,
-			   unsigned long *args, unsigned long *tval)
+static struct sbi_ecall_extension ecall_time = {
+	.extid_start = SBI_EXT_TIME,
+	.extid_end = SBI_EXT_TIME,
+	.handle = sbi_ecall_time_handler,
+};
+
+static int sbi_ecall_ipi_handler(struct sbi_scratch *scratch,
+				 unsigned long extid, unsigned long funcid,
+				 unsigned long *args, unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
@@ -162,8 +158,16 @@ int sbi_ecall_ipi_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	return ret;
 }
 
-int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
-			   unsigned long *args, unsigned long *tval)
+static struct sbi_ecall_extension ecall_ipi = {
+	.extid_start = SBI_EXT_IPI,
+	.extid_end = SBI_EXT_IPI,
+	.handle = sbi_ecall_ipi_handler,
+};
+
+static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
+				    unsigned long extid, unsigned long funcid,
+				    unsigned long *args, unsigned long *out_val,
+				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
@@ -235,8 +239,16 @@ int sbi_ecall_rfence_handler(struct sbi_scratch *scratch, unsigned long funcid,
 	return ret;
 }
 
-int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
-			   unsigned long *args, struct sbi_trap_info *out_trap)
+static struct sbi_ecall_extension ecall_rfence = {
+	.extid_start = SBI_EXT_RFENCE,
+	.extid_end = SBI_EXT_RFENCE,
+	.handle = sbi_ecall_rfence_handler,
+};
+
+static int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
+				 unsigned long extid, unsigned long funcid,
+				 unsigned long *args, unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
@@ -308,10 +320,92 @@ int sbi_ecall_0_1_handler(struct sbi_scratch *scratch, unsigned long extid,
 	return ret;
 }
 
+static struct sbi_ecall_extension ecall_0_1 = {
+	.extid_start = SBI_EXT_0_1_SET_TIMER,
+	.extid_end = SBI_EXT_0_1_SHUTDOWN,
+	.handle = sbi_ecall_0_1_handler,
+};
+
+static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
+				  unsigned long extid,
+				  unsigned long *out_val)
+{
+	*out_val = sbi_platform_vendor_ext_check(sbi_platform_ptr(scratch),
+						 extid);
+	return 0;
+}
+
+static int sbi_ecall_vendor_handler(struct sbi_scratch *scratch,
+				    unsigned long extid, unsigned long funcid,
+				    unsigned long *args, unsigned long *out_val,
+				    struct sbi_trap_info *out_trap)
+{
+	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
+						extid, funcid, args,
+						out_val, out_trap);
+}
+
+static struct sbi_ecall_extension ecall_vendor = {
+	.extid_start = SBI_EXT_VENDOR_START,
+	.extid_end = SBI_EXT_VENDOR_END,
+	.probe = sbi_ecall_vendor_probe,
+	.handle = sbi_ecall_vendor_handler,
+};
+
+static SBI_LIST_HEAD(ecall_exts_list);
+
+struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
+{
+	struct sbi_ecall_extension *t, *ret = NULL;
+
+	sbi_list_for_each_entry(t, &ecall_exts_list, head) {
+		if (t->extid_start <= extid && extid <= t->extid_end) {
+			ret = t;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+int sbi_ecall_register_extension(struct sbi_ecall_extension *ext)
+{
+	if (!ext || (ext->extid_end < ext->extid_start) || !ext->handle)
+		return SBI_EINVAL;
+	if (sbi_ecall_find_extension(ext->extid_start) ||
+	    sbi_ecall_find_extension(ext->extid_end))
+		return SBI_EINVAL;
+
+	SBI_INIT_LIST_HEAD(&ext->head);
+	sbi_list_add_tail(&ext->head, &ecall_exts_list);
+
+	return 0;
+}
+
+void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext)
+{
+	bool found = FALSE;
+	struct sbi_ecall_extension *t;
+
+	if (!ext)
+		return;
+
+	sbi_list_for_each_entry(t, &ecall_exts_list, head) {
+		if (t == ext) {
+			found = TRUE;
+			break;
+		}
+	}
+
+	if (found)
+		sbi_list_del_init(&ext->head);
+}
+
 int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch)
 {
 	int ret = 0;
+	struct sbi_ecall_extension *ext;
 	unsigned long extension_id = regs->a7;
 	unsigned long func_id = regs->a6;
 	struct sbi_trap_info trap = {0};
@@ -326,26 +420,13 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	args[4] = regs->a4;
 	args[5] = regs->a5;
 
-	if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
-	    extension_id <= SBI_EXT_0_1_SHUTDOWN) {
-		ret = sbi_ecall_0_1_handler(scratch, extension_id,
-					    args, &trap);
-		is_0_1_spec = 1;
-	} else if (extension_id == SBI_EXT_BASE)
-		ret = sbi_ecall_base_handler(scratch, extension_id, func_id,
-					     args, &out_val, &trap);
-	else if (extension_id == SBI_EXT_TIME)
-		ret = sbi_ecall_time_handler(scratch, func_id, args);
-	else if (extension_id == SBI_EXT_IPI)
-		ret = sbi_ecall_ipi_handler(scratch, func_id, args, &out_val);
-	else if (extension_id == SBI_EXT_RFENCE)
-		ret = sbi_ecall_rfence_handler(scratch, func_id,
-					       args, &out_val);
-	else if (extension_id >= SBI_EXT_VENDOR_START &&
-		extension_id <= SBI_EXT_VENDOR_END) {
-		ret = sbi_ecall_vendor_ext_handler(scratch, extension_id,
-						   func_id, args, &out_val,
-						   &trap);
+	ext = sbi_ecall_find_extension(extension_id);
+	if (ext && ext->handle) {
+		ret = ext->handle(scratch, extension_id, func_id,
+				  args, &out_val, &trap);
+		if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
+		    extension_id <= SBI_EXT_0_1_SHUTDOWN)
+			is_0_1_spec = 1;
 	} else {
 		ret = SBI_ENOTSUPP;
 	}
@@ -369,3 +450,30 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 
 	return 0;
 }
+
+int sbi_ecall_init(void)
+{
+	int ret;
+
+	/* The order of below registrations is performance optimized */
+	ret = sbi_ecall_register_extension(&ecall_time);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_rfence);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_ipi);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_base);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_0_1);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_vendor);
+	if (ret)
+		return ret;
+
+	return 0;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index c5a899c3519..8baaed42dea 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -112,6 +112,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_ecall_init();
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_system_final_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();

From 766850222af4c39a52acf1fb12a97f2a42747d32 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Jan 2020 18:09:49 +0530
Subject: [PATCH 0398/1765] lib: Factor-out SBI legacy extension

This patch factor-out SBI legacy extension into its own source
for better modularity of SBI implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h    |   2 +
 lib/sbi/objects.mk         |   1 +
 lib/sbi/sbi_ecall.c        | 103 +-------------------------------
 lib/sbi/sbi_ecall_legacy.c | 119 +++++++++++++++++++++++++++++++++++++
 4 files changed, 123 insertions(+), 102 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_legacy.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index e9a9ef6eb0a..a7360b3c07b 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -29,6 +29,8 @@ struct sbi_ecall_extension {
 		       struct sbi_trap_info *out_trap);
 };
 
+extern struct sbi_ecall_extension ecall_legacy;
+
 u16 sbi_ecall_version_major(void);
 
 u16 sbi_ecall_version_minor(void);
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index b84453e406e..6a610b51c1e 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -14,6 +14,7 @@ libsbi-objs-y += riscv_locks.o
 
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
+libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hfence.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 1c49d79d2b8..23a6c82072d 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -7,20 +7,16 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_version.h>
-#include <sbi/riscv_asm.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
 #define SBI_ECALL_VERSION_MINOR 2
@@ -36,22 +32,6 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
-static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch, ulong *pmask,
-				     ulong *hmask, struct sbi_trap_info *uptrap)
-{
-	ulong mask = 0;
-
-	if (pmask) {
-		mask = sbi_load_ulong(pmask, scratch, uptrap);
-		if (uptrap->cause)
-			return SBI_ETRAP;
-	} else {
-		mask = sbi_hart_available_mask();
-	}
-	*hmask = mask;
-	return 0;
-}
-
 static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
 				unsigned long extid,
 				unsigned long *out_val)
@@ -245,87 +225,6 @@ static struct sbi_ecall_extension ecall_rfence = {
 	.handle = sbi_ecall_rfence_handler,
 };
 
-static int sbi_ecall_0_1_handler(struct sbi_scratch *scratch,
-				 unsigned long extid, unsigned long funcid,
-				 unsigned long *args, unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-	struct sbi_tlb_info tlb_info;
-	u32 source_hart = sbi_current_hartid();
-	ulong hmask = 0;
-
-	switch (extid) {
-	case SBI_EXT_0_1_SET_TIMER:
-#if __riscv_xlen == 32
-		sbi_timer_event_start(scratch,
-				      (((u64)args[1] << 32) | (u64)args[0]));
-#else
-		sbi_timer_event_start(scratch, (u64)args[0]);
-#endif
-		break;
-	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
-		sbi_putc(args[0]);
-		break;
-	case SBI_EXT_0_1_CONSOLE_GETCHAR:
-		ret = sbi_getc();
-		break;
-	case SBI_EXT_0_1_CLEAR_IPI:
-		sbi_ipi_clear_smode(scratch);
-		break;
-	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
-						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_smode(scratch, hmask, 0);
-		break;
-	case SBI_EXT_0_1_REMOTE_FENCE_I:
-		tlb_info.start  = 0;
-		tlb_info.size  = 0;
-		tlb_info.type  = SBI_ITLB_FLUSH;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
-						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
-		break;
-	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		tlb_info.start = (unsigned long)args[1];
-		tlb_info.size  = (unsigned long)args[2];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
-						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
-		break;
-	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		tlb_info.start = (unsigned long)args[1];
-		tlb_info.size  = (unsigned long)args[2];
-		tlb_info.asid  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
-						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
-		break;
-	case SBI_EXT_0_1_SHUTDOWN:
-		sbi_system_shutdown(scratch, 0);
-		break;
-	default:
-		ret = SBI_ENOTSUPP;
-	};
-
-	return ret;
-}
-
-static struct sbi_ecall_extension ecall_0_1 = {
-	.extid_start = SBI_EXT_0_1_SET_TIMER,
-	.extid_end = SBI_EXT_0_1_SHUTDOWN,
-	.handle = sbi_ecall_0_1_handler,
-};
-
 static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
 				  unsigned long extid,
 				  unsigned long *out_val)
@@ -468,7 +367,7 @@ int sbi_ecall_init(void)
 	ret = sbi_ecall_register_extension(&ecall_base);
 	if (ret)
 		return ret;
-	ret = sbi_ecall_register_extension(&ecall_0_1);
+	ret = sbi_ecall_register_extension(&ecall_legacy);
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_vendor);
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
new file mode 100644
index 00000000000..1150d7a452f
--- /dev/null
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -0,0 +1,119 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/sbi_tlb.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
+#include <sbi/sbi_hart.h>
+
+static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch,
+				     ulong *pmask, ulong *hmask,
+				     struct sbi_trap_info *uptrap)
+{
+	ulong mask = 0;
+
+	if (pmask) {
+		mask = sbi_load_ulong(pmask, scratch, uptrap);
+		if (uptrap->cause)
+			return SBI_ETRAP;
+	} else {
+		mask = sbi_hart_available_mask();
+	}
+	*hmask = mask;
+	return 0;
+}
+
+static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
+				    unsigned long extid, unsigned long funcid,
+				    unsigned long *args, unsigned long *out_val,
+				    struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	struct sbi_tlb_info tlb_info;
+	u32 source_hart = sbi_current_hartid();
+	ulong hmask = 0;
+
+	switch (extid) {
+	case SBI_EXT_0_1_SET_TIMER:
+#if __riscv_xlen == 32
+		sbi_timer_event_start(scratch,
+				      (((u64)args[1] << 32) | (u64)args[0]));
+#else
+		sbi_timer_event_start(scratch, (u64)args[0]);
+#endif
+		break;
+	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
+		sbi_putc(args[0]);
+		break;
+	case SBI_EXT_0_1_CONSOLE_GETCHAR:
+		ret = sbi_getc();
+		break;
+	case SBI_EXT_0_1_CLEAR_IPI:
+		sbi_ipi_clear_smode(scratch);
+		break;
+	case SBI_EXT_0_1_SEND_IPI:
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_ipi_send_smode(scratch, hmask, 0);
+		break;
+	case SBI_EXT_0_1_REMOTE_FENCE_I:
+		tlb_info.start  = 0;
+		tlb_info.size  = 0;
+		tlb_info.type  = SBI_ITLB_FLUSH;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		break;
+	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
+		tlb_info.start = (unsigned long)args[1];
+		tlb_info.size  = (unsigned long)args[2];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		break;
+	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
+		tlb_info.start = (unsigned long)args[1];
+		tlb_info.size  = (unsigned long)args[2];
+		tlb_info.asid  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+						&hmask, out_trap);
+		if (ret != SBI_ETRAP)
+			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		break;
+	case SBI_EXT_0_1_SHUTDOWN:
+		sbi_system_shutdown(scratch, 0);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_legacy = {
+	.extid_start = SBI_EXT_0_1_SET_TIMER,
+	.extid_end = SBI_EXT_0_1_SHUTDOWN,
+	.handle = sbi_ecall_legacy_handler,
+};

From 161b348e7e8ae3f78e8523e67796d277288e3f7c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Jan 2020 18:32:07 +0530
Subject: [PATCH 0399/1765] lib: Factor-out SBI replacement extensions

This patch factor-out SBI replacement extensions (such as RFENCE,
IPI, and TIME) into its own source for better modularity of SBI
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h     |   3 +
 lib/sbi/objects.mk          |   1 +
 lib/sbi/sbi_ecall.c         | 133 --------------------------------
 lib/sbi/sbi_ecall_replace.c | 146 ++++++++++++++++++++++++++++++++++++
 4 files changed, 150 insertions(+), 133 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_replace.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index a7360b3c07b..2357f79585a 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -30,6 +30,9 @@ struct sbi_ecall_extension {
 };
 
 extern struct sbi_ecall_extension ecall_legacy;
+extern struct sbi_ecall_extension ecall_time;
+extern struct sbi_ecall_extension ecall_rfence;
+extern struct sbi_ecall_extension ecall_ipi;
 
 u16 sbi_ecall_version_major(void);
 
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 6a610b51c1e..1c343be146f 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -15,6 +15,7 @@ libsbi-objs-y += riscv_locks.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_legacy.o
+libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hfence.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 23a6c82072d..d817fefd1e4 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -10,12 +10,7 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_timer.h>
-#include <sbi/sbi_tlb.h>
-#include <sbi/sbi_trap.h>
-#include <sbi/sbi_hart.h>
 #include <sbi/sbi_version.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
@@ -97,134 +92,6 @@ static struct sbi_ecall_extension ecall_base = {
 	.handle = sbi_ecall_base_handler,
 };
 
-static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
-				  unsigned long extid, unsigned long funcid,
-				  unsigned long *args, unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-
-	if (funcid == SBI_EXT_TIME_SET_TIMER) {
-#if __riscv_xlen == 32
-		sbi_timer_event_start(scratch,
-				      (((u64)args[1] << 32) | (u64)args[0]));
-#else
-		sbi_timer_event_start(scratch, (u64)args[0]);
-#endif
-	} else
-		ret = SBI_ENOTSUPP;
-
-	return ret;
-}
-
-static struct sbi_ecall_extension ecall_time = {
-	.extid_start = SBI_EXT_TIME,
-	.extid_end = SBI_EXT_TIME,
-	.handle = sbi_ecall_time_handler,
-};
-
-static int sbi_ecall_ipi_handler(struct sbi_scratch *scratch,
-				 unsigned long extid, unsigned long funcid,
-				 unsigned long *args, unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-
-	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_smode(scratch, args[0], args[1]);
-	else
-		ret = SBI_ENOTSUPP;
-
-	return ret;
-}
-
-static struct sbi_ecall_extension ecall_ipi = {
-	.extid_start = SBI_EXT_IPI,
-	.extid_end = SBI_EXT_IPI,
-	.handle = sbi_ecall_ipi_handler,
-};
-
-static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
-				    unsigned long extid, unsigned long funcid,
-				    unsigned long *args, unsigned long *out_val,
-				    struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-	struct sbi_tlb_info tlb_info;
-	u32 source_hart = sbi_current_hartid();
-
-	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
-	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
-		if (!misa_extension('H'))
-			return SBI_ENOTSUPP;
-
-	switch (funcid) {
-	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
-		tlb_info.start  = 0;
-		tlb_info.size  = 0;
-		tlb_info.type  = SBI_ITLB_FLUSH;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
-		break;
-
-	default:
-		ret = SBI_ENOTSUPP;
-	};
-
-	return ret;
-}
-
-static struct sbi_ecall_extension ecall_rfence = {
-	.extid_start = SBI_EXT_RFENCE,
-	.extid_end = SBI_EXT_RFENCE,
-	.handle = sbi_ecall_rfence_handler,
-};
-
 static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
 				  unsigned long extid,
 				  unsigned long *out_val)
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
new file mode 100644
index 00000000000..7728d601cb5
--- /dev/null
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -0,0 +1,146 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/sbi_tlb.h>
+#include <sbi/riscv_asm.h>
+
+static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
+				  unsigned long extid, unsigned long funcid,
+				  unsigned long *args, unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_TIME_SET_TIMER) {
+#if __riscv_xlen == 32
+		sbi_timer_event_start(scratch,
+				      (((u64)args[1] << 32) | (u64)args[0]));
+#else
+		sbi_timer_event_start(scratch, (u64)args[0]);
+#endif
+	} else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_time = {
+	.extid_start = SBI_EXT_TIME,
+	.extid_end = SBI_EXT_TIME,
+	.handle = sbi_ecall_time_handler,
+};
+
+static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
+				    unsigned long extid, unsigned long funcid,
+				    unsigned long *args, unsigned long *out_val,
+				    struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	struct sbi_tlb_info tlb_info;
+	u32 source_hart = sbi_current_hartid();
+
+	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
+	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
+		if (!misa_extension('H'))
+			return SBI_ENOTSUPP;
+
+	switch (funcid) {
+	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
+		tlb_info.start  = 0;
+		tlb_info.size  = 0;
+		tlb_info.type  = SBI_ITLB_FLUSH;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
+		tlb_info.start = (unsigned long)args[2];
+		tlb_info.size  = (unsigned long)args[3];
+		tlb_info.asid  = (unsigned long)args[4];
+		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
+		tlb_info.shart_mask = 1UL << source_hart;
+		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		break;
+
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_rfence = {
+	.extid_start = SBI_EXT_RFENCE,
+	.extid_end = SBI_EXT_RFENCE,
+	.handle = sbi_ecall_rfence_handler,
+};
+
+static int sbi_ecall_ipi_handler(struct sbi_scratch *scratch,
+				 unsigned long extid, unsigned long funcid,
+				 unsigned long *args, unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_IPI_SEND_IPI)
+		ret = sbi_ipi_send_smode(scratch, args[0], args[1]);
+	else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_ipi = {
+	.extid_start = SBI_EXT_IPI,
+	.extid_end = SBI_EXT_IPI,
+	.handle = sbi_ecall_ipi_handler,
+};

From 43ac621ecba8d472a5e697527143f9d3317df3e1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Jan 2020 19:12:52 +0530
Subject: [PATCH 0400/1765] lib: Factor-out SBI vendor extension

This patch factor-out SBI vendor extension into its own source
for better modularity of SBI implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h    |  1 +
 lib/sbi/objects.mk         |  1 +
 lib/sbi/sbi_ecall.c        | 29 ++-------------------------
 lib/sbi/sbi_ecall_vendor.c | 40 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 44 insertions(+), 27 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_vendor.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 2357f79585a..80c99bebab6 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -33,6 +33,7 @@ extern struct sbi_ecall_extension ecall_legacy;
 extern struct sbi_ecall_extension ecall_time;
 extern struct sbi_ecall_extension ecall_rfence;
 extern struct sbi_ecall_extension ecall_ipi;
+extern struct sbi_ecall_extension ecall_vendor;
 
 u16 sbi_ecall_version_major(void);
 
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 1c343be146f..48e7530630b 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -16,6 +16,7 @@ libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_ecall_replace.o
+libsbi-objs-y += sbi_ecall_vendor.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hfence.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index d817fefd1e4..d34bc499491 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -10,8 +10,9 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_platform.h>
+#include <sbi/sbi_trap.h>
 #include <sbi/sbi_version.h>
+#include <sbi/riscv_asm.h>
 
 #define SBI_ECALL_VERSION_MAJOR 0
 #define SBI_ECALL_VERSION_MINOR 2
@@ -92,32 +93,6 @@ static struct sbi_ecall_extension ecall_base = {
 	.handle = sbi_ecall_base_handler,
 };
 
-static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
-				  unsigned long extid,
-				  unsigned long *out_val)
-{
-	*out_val = sbi_platform_vendor_ext_check(sbi_platform_ptr(scratch),
-						 extid);
-	return 0;
-}
-
-static int sbi_ecall_vendor_handler(struct sbi_scratch *scratch,
-				    unsigned long extid, unsigned long funcid,
-				    unsigned long *args, unsigned long *out_val,
-				    struct sbi_trap_info *out_trap)
-{
-	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
-						extid, funcid, args,
-						out_val, out_trap);
-}
-
-static struct sbi_ecall_extension ecall_vendor = {
-	.extid_start = SBI_EXT_VENDOR_START,
-	.extid_end = SBI_EXT_VENDOR_END,
-	.probe = sbi_ecall_vendor_probe,
-	.handle = sbi_ecall_vendor_handler,
-};
-
 static SBI_LIST_HEAD(ecall_exts_list);
 
 struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
new file mode 100644
index 00000000000..70d044696fe
--- /dev/null
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -0,0 +1,40 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_platform.h>
+
+static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
+				  unsigned long extid,
+				  unsigned long *out_val)
+{
+	*out_val = sbi_platform_vendor_ext_check(sbi_platform_ptr(scratch),
+						 extid);
+	return 0;
+}
+
+static int sbi_ecall_vendor_handler(struct sbi_scratch *scratch,
+				    unsigned long extid, unsigned long funcid,
+				    unsigned long *args, unsigned long *out_val,
+				    struct sbi_trap_info *out_trap)
+{
+	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
+						extid, funcid, args,
+						out_val, out_trap);
+}
+
+struct sbi_ecall_extension ecall_vendor = {
+	.extid_start = SBI_EXT_VENDOR_START,
+	.extid_end = SBI_EXT_VENDOR_END,
+	.probe = sbi_ecall_vendor_probe,
+	.handle = sbi_ecall_vendor_handler,
+};

From 021b9e7c767f101e80fdd4868ad95177fa1cf1da Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Jan 2020 19:25:24 +0530
Subject: [PATCH 0401/1765] lib: Factor-out SBI base extension

This patch factor-out SBI base extension into its own source
for better modularity of SBI implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h  |  5 +++
 lib/sbi/objects.mk       |  1 +
 lib/sbi/sbi_ecall.c      | 71 -----------------------------------
 lib/sbi/sbi_ecall_base.c | 80 ++++++++++++++++++++++++++++++++++++++++
 4 files changed, 86 insertions(+), 71 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_base.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 80c99bebab6..2a3500f1d09 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -13,6 +13,10 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_list.h>
 
+#define SBI_ECALL_VERSION_MAJOR		0
+#define SBI_ECALL_VERSION_MINOR		2
+#define SBI_OPENSBI_IMPID		1
+
 struct sbi_trap_regs;
 struct sbi_trap_info;
 struct sbi_scratch;
@@ -29,6 +33,7 @@ struct sbi_ecall_extension {
 		       struct sbi_trap_info *out_trap);
 };
 
+extern struct sbi_ecall_extension ecall_base;
 extern struct sbi_ecall_extension ecall_legacy;
 extern struct sbi_ecall_extension ecall_time;
 extern struct sbi_ecall_extension ecall_rfence;
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 48e7530630b..fac980fa845 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -14,6 +14,7 @@ libsbi-objs-y += riscv_locks.o
 
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
+libsbi-objs-y += sbi_ecall_base.o
 libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_ecall_vendor.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index d34bc499491..e52a6547c92 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -11,12 +11,6 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_version.h>
-#include <sbi/riscv_asm.h>
-
-#define SBI_ECALL_VERSION_MAJOR 0
-#define SBI_ECALL_VERSION_MINOR 2
-#define SBI_OPENSBI_IMPID 1
 
 u16 sbi_ecall_version_major(void)
 {
@@ -28,71 +22,6 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
-static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
-				unsigned long extid,
-				unsigned long *out_val)
-{
-	struct sbi_ecall_extension *ext;
-
-	ext = sbi_ecall_find_extension(extid);
-	if (!ext) {
-		*out_val = 0;
-		return 0;
-	}
-
-	if (ext->probe)
-		return ext->probe(scratch, extid, out_val);
-
-	*out_val = 1;
-	return 0;
-}
-
-static int sbi_ecall_base_handler(struct sbi_scratch *scratch,
-				  unsigned long extid, unsigned long funcid,
-				  unsigned long *args, unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-
-	switch (funcid) {
-	case SBI_EXT_BASE_GET_SPEC_VERSION:
-		*out_val = (SBI_ECALL_VERSION_MAJOR <<
-			   SBI_SPEC_VERSION_MAJOR_OFFSET) &
-			   (SBI_SPEC_VERSION_MAJOR_MASK <<
-			    SBI_SPEC_VERSION_MAJOR_OFFSET);
-		*out_val = *out_val | SBI_ECALL_VERSION_MINOR;
-		break;
-	case SBI_EXT_BASE_GET_IMP_ID:
-		*out_val = SBI_OPENSBI_IMPID;
-		break;
-	case SBI_EXT_BASE_GET_IMP_VERSION:
-		*out_val = OPENSBI_VERSION;
-		break;
-	case SBI_EXT_BASE_GET_MVENDORID:
-		*out_val = csr_read(CSR_MVENDORID);
-		break;
-	case SBI_EXT_BASE_GET_MARCHID:
-		*out_val = csr_read(CSR_MARCHID);
-		break;
-	case SBI_EXT_BASE_GET_MIMPID:
-		*out_val = csr_read(CSR_MIMPID);
-		break;
-	case SBI_EXT_BASE_PROBE_EXT:
-		ret = sbi_ecall_base_probe(scratch, args[0], out_val);
-		break;
-	default:
-		ret = SBI_ENOTSUPP;
-	}
-
-	return ret;
-}
-
-static struct sbi_ecall_extension ecall_base = {
-	.extid_start = SBI_EXT_BASE,
-	.extid_end = SBI_EXT_BASE,
-	.handle = sbi_ecall_base_handler,
-};
-
 static SBI_LIST_HEAD(ecall_exts_list);
 
 struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
new file mode 100644
index 00000000000..6475745ec32
--- /dev/null
+++ b/lib/sbi/sbi_ecall_base.c
@@ -0,0 +1,80 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_version.h>
+#include <sbi/riscv_asm.h>
+
+static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
+				unsigned long extid,
+				unsigned long *out_val)
+{
+	struct sbi_ecall_extension *ext;
+
+	ext = sbi_ecall_find_extension(extid);
+	if (!ext) {
+		*out_val = 0;
+		return 0;
+	}
+
+	if (ext->probe)
+		return ext->probe(scratch, extid, out_val);
+
+	*out_val = 1;
+	return 0;
+}
+
+static int sbi_ecall_base_handler(struct sbi_scratch *scratch,
+				  unsigned long extid, unsigned long funcid,
+				  unsigned long *args, unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+
+	switch (funcid) {
+	case SBI_EXT_BASE_GET_SPEC_VERSION:
+		*out_val = (SBI_ECALL_VERSION_MAJOR <<
+			   SBI_SPEC_VERSION_MAJOR_OFFSET) &
+			   (SBI_SPEC_VERSION_MAJOR_MASK <<
+			    SBI_SPEC_VERSION_MAJOR_OFFSET);
+		*out_val = *out_val | SBI_ECALL_VERSION_MINOR;
+		break;
+	case SBI_EXT_BASE_GET_IMP_ID:
+		*out_val = SBI_OPENSBI_IMPID;
+		break;
+	case SBI_EXT_BASE_GET_IMP_VERSION:
+		*out_val = OPENSBI_VERSION;
+		break;
+	case SBI_EXT_BASE_GET_MVENDORID:
+		*out_val = csr_read(CSR_MVENDORID);
+		break;
+	case SBI_EXT_BASE_GET_MARCHID:
+		*out_val = csr_read(CSR_MARCHID);
+		break;
+	case SBI_EXT_BASE_GET_MIMPID:
+		*out_val = csr_read(CSR_MIMPID);
+		break;
+	case SBI_EXT_BASE_PROBE_EXT:
+		ret = sbi_ecall_base_probe(scratch, args[0], out_val);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	}
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_base = {
+	.extid_start = SBI_EXT_BASE,
+	.extid_end = SBI_EXT_BASE,
+	.handle = sbi_ecall_base_handler,
+};

From 85647a1a76394ab2fe4305dfdccb439d657610c0 Mon Sep 17 00:00:00 2001
From: "Jiuyang Liu (Sequencer)" <liujiuyang1994@gmail.com>
Date: Fri, 24 Jan 2020 07:34:10 +0530
Subject: [PATCH 0402/1765] platform: template: typo fix in system
 reboot/shutdown names

This patch does minor typo fix in system reboot/shutdown names
in platform operations.

Signed-off-by: Jiuyang Liu (Sequencer) <liujiuyang1994@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 platform/template/platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index 20ae579a7d6..1646c8c6cd1 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -213,8 +213,8 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= platform_timer_event_stop,
 	.timer_event_start	= platform_timer_event_start,
 	.timer_init		= platform_timer_init,
-	.system_reboot		= platform_system_down,
-	.system_shutdown	= platform_system_down
+	.system_reboot		= platform_system_reboot,
+	.system_shutdown	= platform_system_shutdown
 };
 const struct sbi_platform platform = {
 	.opensbi_version	= OPENSBI_VERSION,

From ac1c229b6124baf66b76982b2c82e4ca7ce9e2d5 Mon Sep 17 00:00:00 2001
From: Nikita Ermakov <coffe92@gmail.com>
Date: Fri, 24 Jan 2020 16:47:32 +0300
Subject: [PATCH 0403/1765] platform: Update UART base addresses for
 qemu/sifve_u

In the QEMU [1] there was a change of the UART base addresses for
sifive_u machine to match the hardware. Make corresponding changes in
the opensbi for qemu/sifive_u platform.

[1] https://git.qemu.org/?p=qemu.git;a=commitdiff;h=4b55bc2b5f7ff065da5d2b813ee5153c598d3764

Signed-off-by: Nikita Ermakov <coffe92@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/qemu/sifive_u/platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
index b021ca2ad36..47d6b23b85f 100644
--- a/platform/qemu/sifive_u/platform.c
+++ b/platform/qemu/sifive_u/platform.c
@@ -29,8 +29,8 @@
 #define SIFIVE_U_PLIC_NUM_SOURCES		0x35
 #define SIFIVE_U_PLIC_NUM_PRIORITIES		7
 
-#define SIFIVE_U_UART0_ADDR			0x10013000
-#define SIFIVE_U_UART1_ADDR			0x10023000
+#define SIFIVE_U_UART0_ADDR			0x10010000
+#define SIFIVE_U_UART1_ADDR			0x10011000
 
 /* clang-format on */
 

From d79173b4b7519b537cf64c984d27daa26aad23c0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 4 Feb 2020 15:09:14 -0800
Subject: [PATCH 0404/1765] platform: Add an platform ops to return platform
 specific tlb flush limit

If a platform requires to perform a tlb full flush, they should set
the tlb_range_flush_limit value to zero. However, corresponding platform
API ignore the value and continue to return the default value.

Add a platform ops to retrieve platform specific tlb range flush limit.
The platform variable becomes redundant in presence of the platform ops.
Take this opportunity to remove the variable as well.

The default is still set to smallest page size in RISC-V (4KB), as there
is no way to figure out a best value for all platforms. Individual platform
should set it to the optimal value for their platform.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h   | 15 +++++++--------
 platform/template/platform.c |  1 -
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 0de8be4d28d..ba1d95f4bab 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -30,12 +30,10 @@
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
 /** Offset of disabled_hart_mask in struct sbi_platform */
 #define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
-/** Offset of tlb_range_flush_limit in struct sbi_platform */
-#define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_OFFSET (0x60)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x68)
+#define SBI_PLATFORM_OPS_OFFSET (0x60)
 /** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x68 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
@@ -121,6 +119,9 @@ struct sbi_platform_operations {
 	/** Exit IPI for current HART */
 	void (*ipi_exit)(void);
 
+	/** Get tlb flush limit value **/
+	u64 (*get_tlbr_flush_limit)(void);
+
 	/** Get platform timer value */
 	u64 (*timer_value)(void);
 	/** Start platform timer event for current HART */
@@ -170,8 +171,6 @@ struct sbi_platform {
 	u32 hart_stack_size;
 	/** Mask representing the set of disabled HARTs */
 	u64 disabled_hart_mask;
-	/* Maximum value of tlb flush range request*/
-	u64 tlb_range_flush_limit;
 	/** Pointer to sbi platform operations */
 	unsigned long platform_ops_addr;
 	/** Pointer to system firmware specific context */
@@ -247,8 +246,8 @@ static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
  */
 static inline u64 sbi_platform_tlbr_flush_limit(const struct sbi_platform *plat)
 {
-	if (plat && plat->tlb_range_flush_limit)
-		return plat->tlb_range_flush_limit;
+	if (plat && sbi_platform_ops(plat)->get_tlbr_flush_limit)
+		return sbi_platform_ops(plat)->get_tlbr_flush_limit();
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 1646c8c6cd1..f959a11198b 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -224,6 +224,5 @@ const struct sbi_platform platform = {
 	.hart_count		= 1,
 	.hart_stack_size	= 4096,
 	.disabled_hart_mask	= 0,
-	.tlb_range_flush_limit	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 2c2bbe7374b127b4ca4e0aa5d6cfb3f5bd21a2ee Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 4 Feb 2020 15:09:15 -0800
Subject: [PATCH 0405/1765] platform: sifive/fu540: Set tlb range flush limit
 to zero

It was reported that tlb range flush is not working on fu540.
Only tlb full flush seems to work on fu540 probably due to some
hardware errata.

Set the tlb flush limit to zero so that all tlb flush requests
are converted to full flush.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/platform.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index c8ead9dede2..48bcf54ed96 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -52,6 +52,9 @@
 #define FU540_PRCI_CLKMUXSTATUSREG		0x002C
 #define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL	(0x1 << 1)
 
+/* Full tlb flush always */
+#define FU540_TLB_RANGE_FLUSH_LIMIT		0
+
 /* clang-format on */
 
 static void fu540_modify_dt(void *fdt)
@@ -171,6 +174,11 @@ static int fu540_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
+static u64 fu540_get_tlbr_flush_limit(void)
+{
+	return FU540_TLB_RANGE_FLUSH_LIMIT;
+}
+
 static int fu540_timer_init(bool cold_boot)
 {
 	int rc;
@@ -202,6 +210,7 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send		= clint_ipi_send,
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= fu540_ipi_init,
+	.get_tlbr_flush_limit	= fu540_get_tlbr_flush_limit,
 	.timer_value		= clint_timer_value,
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,

From 5ff1ab0ed8908825966f566b996a0735d937a0ec Mon Sep 17 00:00:00 2001
From: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Date: Thu, 6 Feb 2020 09:57:34 +0530
Subject: [PATCH 0406/1765] makefile: add support for building on macOS

On macOS the readlink command does not include a -f flag. Instead default
to using GNU readlink (which is often installed as greadlink).

Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index aac422ad25b..ccf8ea3db02 100644
--- a/Makefile
+++ b/Makefile
@@ -12,10 +12,17 @@
 # o  Do not print "Entering directory ...";
 MAKEFLAGS += -r --no-print-directory
 
+# Readlink -f requires GNU readlink
+ifeq ($(shell uname -s),Darwin)
+READLINK ?= greadlink
+else
+READLINK ?= readlink
+endif
+
 # Find out source, build, and install directories
 src_dir=$(CURDIR)
 ifdef O
- build_dir=$(shell readlink -f $(O))
+ build_dir=$(shell $(READLINK) -f $(O))
 else
  build_dir=$(CURDIR)/build
 endif
@@ -23,7 +30,7 @@ ifeq ($(build_dir),$(CURDIR))
 $(error Build directory is same as source directory.)
 endif
 ifdef I
- install_dir=$(shell readlink -f $(I))
+ install_dir=$(shell $(READLINK) -f $(I))
 else
  install_dir=$(CURDIR)/install
 endif
@@ -34,7 +41,7 @@ ifeq ($(install_dir),$(build_dir))
 $(error Install directory is same as build directory.)
 endif
 ifdef PLATFORM_DIR
-  platform_dir_path=$(shell readlink -f $(PLATFORM_DIR))
+  platform_dir_path=$(shell $(READLINK) -f $(PLATFORM_DIR))
   ifdef PLATFORM
     platform_parent_dir=$(platform_dir_path)
   else

From 6d0b4c520da8981ab36b0e5d64779295684b2250 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 6 Feb 2020 03:51:23 -0800
Subject: [PATCH 0407/1765] platform: Drop qemu/sifive_u support

With QEMU v4.2 RISC-V changes to improve the emulation fidelity
of 'sifive_u' machine, OpenSBI v0.4 / U-Boot v2019.10 / Linux
kernel v5.3 images built for the SiFive HiFive Unleashed board
can be used out of the box without any special hack. Hence there
is no need for us to continue supporting such a special target in
OpenSBI. Going forward, sifive/fu540 platform can be used on both
real hardware and QEMU 'sifive_u' machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/firmware/fw_jump.md          |   7 +-
 docs/firmware/fw_payload.md       |   7 +-
 docs/platform/platform.md         |  10 +-
 docs/platform/qemu_sifive_u.md    |  60 ------------
 platform/qemu/sifive_u/config.mk  |  40 --------
 platform/qemu/sifive_u/objects.mk |  10 --
 platform/qemu/sifive_u/platform.c | 158 ------------------------------
 scripts/create-binary-archive.sh  |   2 -
 8 files changed, 8 insertions(+), 286 deletions(-)
 delete mode 100644 docs/platform/qemu_sifive_u.md
 delete mode 100644 platform/qemu/sifive_u/config.mk
 delete mode 100644 platform/qemu/sifive_u/objects.mk
 delete mode 100644 platform/qemu/sifive_u/platform.c

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 21161b057b2..4faaf50a1bc 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -44,9 +44,8 @@ follows:
 *FW_JUMP* Example
 -----------------
 
-The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrate how to configure
-and use a *FW_JUMP* firmware. Detailed information regarding these platforms
-can be found in the platform documentation files.
+The *[qemu/virt]* platform illustrates how to configure and use a *FW_JUMP*
+firmware. Detailed information regarding these platforms can be found in the
+platform documentation files.
 
 [qemu/virt]: ../platform/qemu_virt.md
-[qemu/sifive_u]: ../platform/qemu_sifive_u.md
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 1efe765a806..3fb3ffc29ab 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -79,12 +79,11 @@ file. The parameters currently defined are as follows:
 *FW_PAYLOAD* Example
 --------------------
 
-The *[qemu/virt]* and *[qemu/sifive_u]* platforms illustrate how to configure
-and use a *FW_PAYLOAD* firmware. Detailed information regarding these platforms
-can be found in the platform documentation files.
+The *[qemu/virt]* platforms illustrate how to configure and use a *FW_PAYLOAD*
+firmware. Detailed information regarding these platforms can be found in the
+platform documentation files.
 
 The *kendryte/k210* platform also enables a build of a *FW_PAYLOAD* using an
 internally defined device tree file (*FW_PAYLOAD_FDT*).
 
 [qemu/virt]: ../platform/qemu_virt.md
-[qemu/sifive_u]: ../platform/qemu_sifive_u.md
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 17cbfb85b31..d977646e150 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -8,14 +8,9 @@ OpenSBI currently supports the following virtual and hardware platforms:
   development and tests. More details on this platform can be found in the
   file *[qemu_virt.md]*.
 
-* **QEMU SiFive Unleashed Machine**: Platform support for the *sifive_u* QEMU
-  virtual RISC-V machine. This is an emulation machine of the HiFive Unleashed
-  board by SiFive. More details on this platform can be found in the file
-  *[qemu_sifive_u.md]*.
-
 * **SiFive FU540 SoC**: Platform support for SiFive FU540 SoC used on the
-  HiFive Unleashed board. This platform is very similar to the *QEMU sifive_u*
-  platform. More details on this platform can be found in the file
+  HiFive Unleashed board, as well as the *sifive_u* QEMU virtual RISC-V
+  machine. More details on this platform can be found in the file
   *[sifive_fu540.md]*.
 
 * **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on
@@ -35,7 +30,6 @@ template files for implementing support for a new platform. The *object.mk*,
 facilitate the implementation.
 
 [qemu_virt.md]: qemu_virt.md
-[qemu_sifive_u.md]: qemu_sifive_u.md
 [sifive_fu540.md]: sifive_fu540.md
 [ariane-fpga.md]: ariane-fpga.md
 [andes_ae350.md]: andes-ae350.md
diff --git a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
deleted file mode 100644
index b5c4f0e32b7..00000000000
--- a/docs/platform/qemu_sifive_u.md
+++ /dev/null
@@ -1,60 +0,0 @@
-QEMU SiFive Unleashed Machine Platform
-======================================
-
-The **QEMU SiFive Unleashed Machine** is an emulation of the SiFive Unleashed
-platform.
-
-To build this platform specific library and firmwares, provide the
-*PLATFORM=qemu/sifive_u* parameter to the top level `make` command line.
-
-Note with QEMU v4.2 release, the QEMU *sifive_u* machine has been updated to
-closely match the SiFive HiFive Unleashed hardware and can therefore run the
-same firmware as what gets loaded onto the board, and OpenSBI's *qemu/sifive_u*
-platform should only be used with QEMU v4.1 release or before.
-
-The special *qemu/sifive_u* platform support will be dropped in the future
-OpenSBI release.
-
-Platform Options
-----------------
-
-The *QEMU SiFive Unleashed Machine* platform does not have any platform specific
-options.
-
-Executing on QEMU RISC-V 64-bit
--------------------------------
-
-**No Payload Case**
-
-Build:
-```
-make PLATFORM=qemu/sifive_u
-```
-
-Run:
-```
-qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
-	-kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
-```
-
-**U-Boot as a Payload**
-
-Note: the command line examples here assume that U-Boot was compiled using
-the `sifive_fu540_defconfig` configuration.
-
-Build:
-```
-make PLATFORM=qemu/sifive_u FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
-```
-
-Run:
-```
-qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
-	-kernel build/platform/qemu/sifive_u/firmware/fw_payload.elf
-```
-or
-```
-qemu-system-riscv64 -M sifive_u -m 256M -display none -serial stdio \
-	-kernel build/platform/qemu/sifive_u/firmware/fw_jump.elf \
-	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
-```
diff --git a/platform/qemu/sifive_u/config.mk b/platform/qemu/sifive_u/config.mk
deleted file mode 100644
index f66a55548b5..00000000000
--- a/platform/qemu/sifive_u/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
-  -nographic -kernel $(build_dir)/platform/qemu/sifive_u/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_DYNAMIC=y
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB alligned for 32-bit system
-  FW_JUMP_ADDR=0x80400000
-else
-  # This needs to be 2MB alligned for 64-bit system
-  FW_JUMP_ADDR=0x80200000
-endif
-FW_JUMP_FDT_ADDR=0x82200000
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB alligned for 32-bit system
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  # This needs to be 2MB alligned for 64-bit system
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/qemu/sifive_u/objects.mk b/platform/qemu/sifive_u/objects.mk
deleted file mode 100644
index c382cbfb26a..00000000000
--- a/platform/qemu/sifive_u/objects.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-platform-objs-y += platform.o
diff --git a/platform/qemu/sifive_u/platform.c b/platform/qemu/sifive_u/platform.c
deleted file mode 100644
index 47d6b23b85f..00000000000
--- a/platform/qemu/sifive_u/platform.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_platform.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
-
-/* clang-format off */
-
-#define SIFIVE_U_HART_COUNT			4
-#define SIFIVE_U_HART_STACK_SIZE		8192
-
-#define SIFIVE_U_SYS_CLK			1000000000
-#define SIFIVE_U_PERIPH_CLK			(SIFIVE_U_SYS_CLK / 2)
-
-#define SIFIVE_U_CLINT_ADDR			0x2000000
-
-#define SIFIVE_U_PLIC_ADDR			0xc000000
-#define SIFIVE_U_PLIC_NUM_SOURCES		0x35
-#define SIFIVE_U_PLIC_NUM_PRIORITIES		7
-
-#define SIFIVE_U_UART0_ADDR			0x10010000
-#define SIFIVE_U_UART1_ADDR			0x10011000
-
-/* clang-format on */
-
-static int sifive_u_final_init(bool cold_boot)
-{
-	void *fdt;
-
-	if (!cold_boot)
-		return 0;
-
-	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0");
-
-	return 0;
-}
-
-static u32 sifive_u_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-static int sifive_u_pmp_region_info(u32 hartid, u32 index, ulong *prot,
-				    ulong *addr, ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot	  = PMP_R | PMP_W | PMP_X;
-		*addr	  = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
-static int sifive_u_console_init(void)
-{
-	return sifive_uart_init(SIFIVE_U_UART0_ADDR, SIFIVE_U_PERIPH_CLK,
-				115200);
-}
-
-static int sifive_u_irqchip_init(bool cold_boot)
-{
-	int rc;
-	u32 hartid = sbi_current_hartid();
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(SIFIVE_U_PLIC_ADDR,
-					    SIFIVE_U_PLIC_NUM_SOURCES,
-					    SIFIVE_U_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
-}
-
-static int sifive_u_ipi_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_ipi_init(SIFIVE_U_CLINT_ADDR,
-					 SIFIVE_U_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_ipi_init();
-}
-
-static int sifive_u_timer_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_timer_init(SIFIVE_U_CLINT_ADDR,
-					   SIFIVE_U_HART_COUNT, TRUE);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_timer_init();
-}
-
-static int sifive_u_system_down(u32 type)
-{
-	/* For now nothing to do. */
-	return 0;
-}
-
-const struct sbi_platform_operations platform_ops = {
-	.pmp_region_count	= sifive_u_pmp_region_count,
-	.pmp_region_info	= sifive_u_pmp_region_info,
-	.final_init		= sifive_u_final_init,
-	.console_putc		= sifive_uart_putc,
-	.console_getc		= sifive_uart_getc,
-	.console_init		= sifive_u_console_init,
-	.irqchip_init		= sifive_u_irqchip_init,
-	.ipi_send		= clint_ipi_send,
-	.ipi_clear		= clint_ipi_clear,
-	.ipi_init		= sifive_u_ipi_init,
-	.timer_value		= clint_timer_value,
-	.timer_event_stop	= clint_timer_event_stop,
-	.timer_event_start	= clint_timer_event_start,
-	.timer_init		= sifive_u_timer_init,
-	.system_reboot		= sifive_u_system_down,
-	.system_shutdown	= sifive_u_system_down
-};
-
-const struct sbi_platform platform = {
-	.opensbi_version	= OPENSBI_VERSION,
-	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name			= "QEMU SiFive Unleashed",
-	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count		= SIFIVE_U_HART_COUNT,
-	.hart_stack_size	= SIFIVE_U_HART_STACK_SIZE,
-	.disabled_hart_mask	= 0,
-	.platform_ops_addr	= (unsigned long)&platform_ops
-};
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 014dd5598fa..3301cf27eab 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -85,12 +85,10 @@ case "${BUILD_RISCV_XLEN}" in
 32)
 	# Setup 32-bit platform list
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
-	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
 	;;
 64)
 	# Setup 64-bit platform list
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
-	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")

From 9a717ec12eeaa94e8781b0f196afd7fee19c9f63 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 6 Feb 2020 04:15:21 -0800
Subject: [PATCH 0408/1765] platform: sifive: fu540: Add platform specific
 'make run' cmd

This adds sifive/fu540 specific QEMU run command.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/config.mk | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index 84b098762f5..ad099cc58d1 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -13,6 +13,10 @@ platform-cflags-y =
 platform-asflags-y =
 platform-ldflags-y =
 
+# Command for platform specific "make run"
+platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
+  -nographic -kernel $(build_dir)/platform/sifive/fu540/firmware/fw_payload.elf
+
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_DYNAMIC=y

From d6fa7f95bbcaa080810656c79e8879357b312280 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 10 Feb 2020 07:42:03 -0800
Subject: [PATCH 0409/1765] doc: sifive: fu540: Update QEMU instruction when
 using U-Boot as the payload

Document that when U-Boot v2020.01 (or higher) is used as the payload,
we need adjust the instructions a little bit when testing OpenSBI with
QEMU 'sifive_u' machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 0a9f21e84f0..94eb81fc94b 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -183,3 +183,13 @@ same instructions above, with the exception of not passing FW_PAYLOAD_FDT_PATH.
 This is because QEMU generates a device tree blob on the fly based on the
 command line parameters and it's compatible with the one used in the upstream
 Linux kernel.
+
+When U-Boot v2020.01 (or higher) is used as the payload, as the SiFive FU540
+DTB for the real hardware is embedded in U-Boot binary itself, due to the same
+reason above, we need to switch the U-Boot sifive_fu540_defconfig configuration
+from CONFIG_OF_SEPARATE to CONFIG_OF_PRIOR_STAGE so that U-Boot uses the DTB
+generated by QEMU, and u-boot.bin should be used as the payload image, like:
+
+```
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
+```

From 179eddeb9ca5fc1869d40696e0d4cd9899b9d92d Mon Sep 17 00:00:00 2001
From: Li Jinpei <leekingp1994@163.com>
Date: Tue, 11 Feb 2020 15:27:49 +0530
Subject: [PATCH 0410/1765] lib: sbi_scratch: use bitwise ops in
 sbi_scratch_alloc_offset()

Instead of using loop to make "size" machine word aligned, we should
use bitwise ops.

Signed-off-by: Li Jinpei <leekingp1994@163.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_scratch.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 95ee2f2d044..26716c50fb5 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -36,8 +36,8 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 	if (!size)
 		return 0;
 
-	while (size & (__SIZEOF_POINTER__ - 1))
-		size++;
+	if (size & (__SIZEOF_POINTER__ - 1))
+		size = (size & ~(__SIZEOF_POINTER__ - 1)) + __SIZEOF_POINTER__;
 
 	spin_lock(&extra_lock);
 

From 897b8fbdd92fcfad194417d348b8dad16ab0e17a Mon Sep 17 00:00:00 2001
From: Li Jinpei <leekingp1994@163.com>
Date: Tue, 11 Feb 2020 15:37:24 +0530
Subject: [PATCH 0411/1765] lib: Use __builtin_ctzl() in pmp_get()

We should should __builtin_ctzl() in pmp_get() instead of
custom ctz() function.

Signed-off-by: Li Jinpei <leekingp1994@163.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/riscv_asm.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 7b612d4b1f3..68f5f1734e6 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -184,18 +184,6 @@ void csr_write_num(int csr_num, unsigned long val)
 	};
 }
 
-static unsigned long ctz(unsigned long x)
-{
-	unsigned long ret = 0;
-
-	while (!(x & 1UL)) {
-		ret++;
-		x = x >> 1;
-	}
-
-	return ret;
-}
-
 int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len)
 {
@@ -287,7 +275,7 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 			addr	= 0;
 			log2len = __riscv_xlen;
 		} else {
-			t1	= ctz(~addr);
+			t1	= __builtin_ctzl(~addr);
 			addr	= (addr & ~((1UL << t1) - 1)) << PMP_SHIFT;
 			log2len = (t1 + PMP_SHIFT + 1);
 		}

From 1a8ca08cc037c65c605e7e2f98b8c01606eaca3b Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:39:45 -0800
Subject: [PATCH 0412/1765] lib: Initialize out value in SBI calls

As per the SBI specification, the return value in sbiret is undefined
if not explicitly described in the function. However, supervisor may
check this value by mistake and get a garbage value.

Initialize it to zero to avoid nasty supervisor bugs.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index e52a6547c92..82397c4bbf3 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -79,7 +79,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 	unsigned long extension_id = regs->a7;
 	unsigned long func_id = regs->a6;
 	struct sbi_trap_info trap = {0};
-	unsigned long out_val;
+	unsigned long out_val = 0;
 	bool is_0_1_spec = 0;
 	unsigned long args[6];
 

From c2bfa2bff30312679cfee986bbed9b974c6760bb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:42:50 -0800
Subject: [PATCH 0413/1765] lib: irqchip/plic: Disable all contexts and IRQs

To initialize PLIC in sane state, we should:
1. set maximum threshold value of M-mode PLIC contexts
2. set maximum threshold value of S-mode PLIC contexts
3. set irq priorities to miniumum

Fix the comment and initialize the threshold/priorities correctly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/irqchip/plic.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index ea09f0a550d..467938cf171 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -91,13 +91,13 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 			plic_set_ie(s_cntx_id, i, 0);
 	}
 
-	/* By default, enable M-mode threshold */
+	/* By default, disable M-mode threshold */
 	if (m_cntx_id > -1)
-		plic_set_thresh(m_cntx_id, 1);
+		plic_set_thresh(m_cntx_id, 0xffffffff);
 
 	/* By default, disable S-mode threshold */
 	if (s_cntx_id > -1)
-		plic_set_thresh(s_cntx_id, 0);
+		plic_set_thresh(s_cntx_id, 0xffffffff);
 
 	return 0;
 }
@@ -112,7 +112,7 @@ int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count)
 
 	/* Configure default priorities of all IRQs */
 	for (i = 1; i <= plic_num_sources; i++)
-		plic_set_priority(i, 1);
+		plic_set_priority(i, 0);
 
 	return 0;
 }

From c2f23cc6edd7ee2dc6a07991312d44233080ae6b Mon Sep 17 00:00:00 2001
From: James Clarke <jrtc27@jrtc27.com>
Date: Sat, 1 Feb 2020 01:07:51 +0000
Subject: [PATCH 0414/1765] platform: Add Spike initial support

This patch adds initial platform support Spike emulator.

Signed-off-by: James Clarke <jrtc27@jrtc27.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/sys/htif.h |  19 +++++
 lib/utils/sys/htif.c         | 149 +++++++++++++++++++++++++++++++++++
 lib/utils/sys/objects.mk     |   1 +
 platform/spike/config.mk     |  36 +++++++++
 platform/spike/objects.mk    |   7 ++
 platform/spike/platform.c    | 115 +++++++++++++++++++++++++++
 6 files changed, 327 insertions(+)
 create mode 100644 include/sbi_utils/sys/htif.h
 create mode 100644 lib/utils/sys/htif.c
 create mode 100644 platform/spike/config.mk
 create mode 100644 platform/spike/objects.mk
 create mode 100644 platform/spike/platform.c

diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
new file mode 100644
index 00000000000..42903e818fe
--- /dev/null
+++ b/include/sbi_utils/sys/htif.h
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2010-2020, The Regents of the University of California
+ * (Regents).  All Rights Reserved.
+ */
+
+#ifndef __SYS_HTIF_H__
+#define __SYS_HTIF_H__
+
+#include <sbi/sbi_types.h>
+
+void htif_putc(char ch);
+
+int htif_getc(void);
+
+int htif_system_down(u32 type);
+
+#endif
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
new file mode 100644
index 00000000000..f0ba8146220
--- /dev/null
+++ b/lib/utils/sys/htif.c
@@ -0,0 +1,149 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2010-2020, The Regents of the University of California
+ * (Regents).  All Rights Reserved.
+ */
+
+#include <sbi/riscv_locks.h>
+#include <sbi_utils/sys/htif.h>
+
+#define HTIF_DATA_BITS		48
+#define HTIF_DATA_MASK		((1UL << HTIF_DATA_BITS) - 1)
+#define HTIF_DATA_SHIFT		0
+#define HTIF_CMD_BITS		8
+#define HTIF_CMD_MASK		((1UL << HTIF_CMD_BITS) - 1)
+#define HTIF_CMD_SHIFT		48
+#define HTIF_DEV_BITS		8
+#define HTIF_DEV_MASK		((1UL << HTIF_DEV_BITS) - 1)
+#define HTIF_DEV_SHIFT		56
+
+#define HTIF_DEV_SYSTEM		0
+#define HTIF_DEV_CONSOLE	1
+
+#define HTIF_CONSOLE_CMD_GETC	0
+#define HTIF_CONSOLE_CMD_PUTC	1
+
+#if __riscv_xlen == 64
+# define TOHOST_CMD(dev, cmd, payload) \
+	(((uint64_t)(dev) << HTIF_DEV_SHIFT) | \
+	 ((uint64_t)(cmd) << HTIF_CMD_SHIFT) | \
+	 (uint64_t)(payload))
+#else
+# define TOHOST_CMD(dev, cmd, payload) ({ \
+  if ((dev) || (cmd)) __builtin_trap(); \
+  (payload); })
+#endif
+#define FROMHOST_DEV(fromhost_value) \
+	((uint64_t)((fromhost_value) >> HTIF_DEV_SHIFT) & HTIF_DEV_MASK)
+#define FROMHOST_CMD(fromhost_value) \
+	((uint64_t)((fromhost_value) >> HTIF_CMD_SHIFT) & HTIF_CMD_MASK)
+#define FROMHOST_DATA(fromhost_value) \
+	((uint64_t)((fromhost_value) >> HTIF_DATA_SHIFT) & HTIF_DATA_MASK)
+
+#define PK_SYS_write 64
+
+volatile uint64_t tohost __attribute__((section(".htif")));
+volatile uint64_t fromhost __attribute__((section(".htif")));
+static int htif_console_buf;
+static spinlock_t htif_lock = SPIN_LOCK_INITIALIZER;
+
+static void __check_fromhost()
+{
+	uint64_t fh = fromhost;
+	if (!fh)
+		return;
+	fromhost = 0;
+
+	/* this should be from the console */
+	if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE)
+		__builtin_trap();
+	switch (FROMHOST_CMD(fh)) {
+		case HTIF_CONSOLE_CMD_GETC:
+			htif_console_buf = 1 + (uint8_t)FROMHOST_DATA(fh);
+			break;
+		case HTIF_CONSOLE_CMD_PUTC:
+			break;
+		default:
+			__builtin_trap();
+	}
+}
+
+static void __set_tohost(uint64_t dev, uint64_t cmd, uint64_t data)
+{
+	while (tohost)
+		__check_fromhost();
+	tohost = TOHOST_CMD(dev, cmd, data);
+}
+
+#if __riscv_xlen == 32
+static void do_tohost_fromhost(uint64_t dev, uint64_t cmd, uint64_t data)
+{
+	spin_lock(&htif_lock);
+
+	__set_tohost(HTIF_DEV_SYSTEM, cmd, data);
+
+	while (1) {
+		uint64_t fh = fromhost;
+		if (fh) {
+			if (FROMHOST_DEV(fh) == HTIF_DEV_SYSTEM &&
+			    FROMHOST_CMD(fh) == cmd) {
+				fromhost = 0;
+				break;
+			}
+			__check_fromhost();
+		}
+	}
+
+	spin_unlock(&htif_lock);
+}
+
+void htif_putc(char ch)
+{
+	/* HTIF devices are not supported on RV32, so do a proxy write call */
+	volatile uint64_t magic_mem[8];
+	magic_mem[0] = PK_SYS_write;
+	magic_mem[1] = HTIF_DEV_CONSOLE;
+	magic_mem[2] = (uint64_t)(uintptr_t)&ch;
+	magic_mem[3] = HTIF_CONSOLE_CMD_PUTC;
+	do_tohost_fromhost(HTIF_DEV_SYSTEM, 0, (uint64_t)(uintptr_t)magic_mem);
+}
+#else
+void htif_putc(char ch)
+{
+	spin_lock(&htif_lock);
+	__set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch);
+	spin_unlock(&htif_lock);
+}
+#endif
+
+int htif_getc(void)
+{
+	int ch;
+
+#if __riscv_xlen == 32
+	/* HTIF devices are not supported on RV32 */
+	return -1;
+#endif
+
+	spin_lock(&htif_lock);
+
+	__check_fromhost();
+	ch = htif_console_buf;
+	if (ch >= 0) {
+		htif_console_buf = -1;
+		__set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0);
+	}
+
+	spin_unlock(&htif_lock);
+
+	return ch - 1;
+}
+
+int htif_system_down(u32 type)
+{
+	while (1) {
+		fromhost = 0;
+		tohost = 1;
+	}
+}
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index baed8848dfb..c6df2bdccae 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -8,3 +8,4 @@
 #
 
 libsbiutils-objs-y += sys/clint.o
+libsbiutils-objs-y += sys/htif.o
diff --git a/platform/spike/config.mk b/platform/spike/config.mk
new file mode 100644
index 00000000000..4bde3fdb74a
--- /dev/null
+++ b/platform/spike/config.mk
@@ -0,0 +1,36 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Command for platform specific "make run"
+platform-runcmd = spike \
+  $(build_dir)/platform/spike/firmware/fw_payload.elf
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_JUMP=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_JUMP_ADDR=0x80400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_JUMP_ADDR=0x80200000
+endif
+FW_JUMP_FDT_ADDR=0x82200000
+FW_PAYLOAD=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/spike/objects.mk b/platform/spike/objects.mk
new file mode 100644
index 00000000000..30a3c4fb838
--- /dev/null
+++ b/platform/spike/objects.mk
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+
+platform-objs-y += platform.o
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
new file mode 100644
index 00000000000..c0f93e227be
--- /dev/null
+++ b/platform/spike/platform.c
@@ -0,0 +1,115 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/sys/htif.h>
+#include <sbi_utils/sys/clint.h>
+
+/* clang-format off */
+
+#define SPIKE_HART_COUNT			8
+#define SPIKE_HART_STACK_SIZE			8192
+
+#define SPIKE_CLINT_ADDR			0x2000000
+
+/* clang-format on */
+
+static int spike_final_init(bool cold_boot)
+{
+	return 0;
+}
+
+static u32 spike_pmp_region_count(u32 hartid)
+{
+	return 1;
+}
+
+static int spike_pmp_region_info(u32 hartid, u32 index, ulong *prot, ulong *addr,
+				ulong *log2size)
+{
+	int ret = 0;
+
+	switch (index) {
+	case 0:
+		*prot	  = PMP_R | PMP_W | PMP_X;
+		*addr	  = 0;
+		*log2size = __riscv_xlen;
+		break;
+	default:
+		ret = -1;
+		break;
+	};
+
+	return ret;
+}
+
+static int spike_console_init(void)
+{
+	return 0;
+}
+
+static int spike_irqchip_init(bool cold_boot)
+{
+	return 0;
+}
+
+static int spike_ipi_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_ipi_init(SPIKE_CLINT_ADDR,
+					  SPIKE_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+static int spike_timer_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(SPIKE_CLINT_ADDR,
+					   SPIKE_HART_COUNT, TRUE);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init();
+}
+
+const struct sbi_platform_operations platform_ops = {
+	.pmp_region_count	= spike_pmp_region_count,
+	.pmp_region_info	= spike_pmp_region_info,
+	.final_init		= spike_final_init,
+	.console_putc		= htif_putc,
+	.console_getc		= htif_getc,
+	.console_init		= spike_console_init,
+	.irqchip_init		= spike_irqchip_init,
+	.ipi_send		= clint_ipi_send,
+	.ipi_clear		= clint_ipi_clear,
+	.ipi_init		= spike_ipi_init,
+	.timer_value		= clint_timer_value,
+	.timer_event_stop	= clint_timer_event_stop,
+	.timer_event_start	= clint_timer_event_start,
+	.timer_init		= spike_timer_init,
+	.system_reboot		= htif_system_down,
+	.system_shutdown	= htif_system_down
+};
+
+const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
+	.name			= "Spike",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= SPIKE_HART_COUNT,
+	.hart_stack_size	= SPIKE_HART_STACK_SIZE,
+	.disabled_hart_mask	= 0,
+	.platform_ops_addr	= (unsigned long)&platform_ops
+};

From a062200b893b6707a336750d6f914601606d13a7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 13 Feb 2020 17:02:41 +0530
Subject: [PATCH 0415/1765] platform: Remove stale options from config.mk files

This patch removes stale options from config.mk files of
Ariane FPGA and QEMU virt platform support.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/ariane-fpga/config.mk | 5 -----
 platform/qemu/virt/config.mk   | 5 -----
 2 files changed, 10 deletions(-)

diff --git a/platform/ariane-fpga/config.mk b/platform/ariane-fpga/config.mk
index ae6d3cd347b..f9f0c0d62ea 100644
--- a/platform/ariane-fpga/config.mk
+++ b/platform/ariane-fpga/config.mk
@@ -9,11 +9,6 @@
 
 PLATFORM_RISCV_XLEN = 64
 
-# Common drivers to enable
-PLATFORM_SERIAL_UART8250=y
-PLATFORM_IRQCHIP_PLIC=y
-PLATFORM_SYS_CLINT=y
-
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_JUMP=n
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index 5cc9f0b5242..e9f5591b6c8 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -17,11 +17,6 @@ platform-ldflags-y =
 platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
   -nographic -kernel $(build_dir)/platform/qemu/virt/firmware/fw_payload.elf
 
-# Common drivers to enable
-PLATFORM_IRQCHIP_PLIC=y
-PLATFORM_SERIAL_UART8250=y
-PLATFORM_SYS_CLINT=y
-
 # Blobs to build
 FW_TEXT_START=0x80000000
 FW_DYNAMIC=y

From c03c8a1e2c46133bfc8e0872d89c1b017538488d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 13 Feb 2020 17:05:15 +0530
Subject: [PATCH 0416/1765] scripts: Add Spike to platform list of binary
 archive script

The Spike platform support works perfectly fine on QEMU RV64 Spike
machine and Spike emulator.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 3301cf27eab..4a143186269 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -94,6 +94,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")
 	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 	BUILD_PLATFORM_SUBDIR+=("thead/c910")
+	BUILD_PLATFORM_SUBDIR+=("spike")
 	;;
 *)
 	echo "Invalid RISC-V XLEN"

From 29bb2a6835a820a9d0dc6475b7ef3eb86a089283 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 13 Feb 2020 17:40:17 +0530
Subject: [PATCH 0417/1765] docs: platform: Add documentation for Spike
 platform

This patch adds documentation to build and run OpenSBI on
Spike simulator and QEMU Spike machine.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/platform/platform.md |  3 ++
 docs/platform/spike.md    | 89 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 92 insertions(+)
 create mode 100644 docs/platform/spike.md

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index d977646e150..2efa8b36522 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -23,6 +23,8 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 * **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
 
+* **Spike**: Platform support for the Spike emulator.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -34,3 +36,4 @@ facilitate the implementation.
 [ariane-fpga.md]: ariane-fpga.md
 [andes_ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
+[spike.md]: spike.md
diff --git a/docs/platform/spike.md b/docs/platform/spike.md
new file mode 100644
index 00000000000..40fa4ba153e
--- /dev/null
+++ b/docs/platform/spike.md
@@ -0,0 +1,89 @@
+Spike Simulator Platform
+========================
+
+The **Spike** is a RISC-V ISA simulator which implements a functional model
+of one or more RISC-V harts. The **Spike** compatible virtual platform is
+also available on QEMU. In fact, we can use same OpenSBI firmware binaries
+on **Spike** simulator and QEMU Spike machine.
+
+For more details, refer [Spike on GitHub](https://github.com/riscv/riscv-isa-sim)
+
+To build the platform-specific library and firmware images, provide the
+*PLATFORM=spike* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *Spike* platform does not have any platform-specific options.
+
+Execution on Spike Simulator
+----------------------------
+
+**No Payload Case**
+
+Build:
+```
+make PLATFORM=spike
+```
+
+Run:
+```
+spike build/platform/spike/firmware/fw_payload.elf
+```
+
+**Linux Kernel Payload**
+
+Note: We assume that the Linux kernel is compiled using
+*arch/riscv/configs/defconfig*.
+
+Build:
+```
+make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Run:
+```
+spike --initrd <path_to_cpio_ramdisk> build/platform/spike/firmware/fw_payload.elf
+```
+
+Execution on QEMU RISC-V 64-bit
+-------------------------------
+
+**No Payload Case**
+
+Build:
+```
+make PLATFORM=spike
+```
+
+Run:
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-kernel build/platform/spike/firmware/fw_payload.elf
+```
+
+**Linux Kernel Payload**
+
+Note: We assume that the Linux kernel is compiled using
+*arch/riscv/configs/defconfig*.
+
+Build:
+```
+make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Run:
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-kernel build/platform/spike/firmware/fw_payload.elf \
+	-initrd <path_to_cpio_ramdisk> \
+	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
+```
+or
+```
+qemu-system-riscv64 -M spike -m 256M -nographic \
+	-bios build/platform/spike/firmware/fw_jump.elf \
+	-kernel <linux_build_directory>/arch/riscv/boot/Image \
+	-initrd <path_to_cpio_ramdisk> \
+	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
+```

From 48b06ad16e4694c0cfd85813f4cf5876c8d36970 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:32 -0800
Subject: [PATCH 0418/1765] ThirdPartyNotices: Fix doc styles

Remove the unnecessary blank line at the end of the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 ThirdPartyNotices.md | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ThirdPartyNotices.md b/ThirdPartyNotices.md
index 23e9f9393d3..1162d43611b 100644
--- a/ThirdPartyNotices.md
+++ b/ThirdPartyNotices.md
@@ -16,4 +16,3 @@ The libfdt source code is disjunctively dual licensed (GPL-2.0+ or
 BSD-2-Clause). Some of this project code is used in OpenSBI under the terms of
 the BSD 2-Clause license. The full text of this license can be found in the
 file [COPYING.BSD](COPYING.BSD).
-

From 892e87998c32ae0d709310b2a26a0bfa935bbd7b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:33 -0800
Subject: [PATCH 0419/1765] doc: coreboot: Fix doc styles

- put all URLs at the end of the doc
- satisfy the 80 character per line rule as much as possible

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/external/coreboot.md | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/docs/external/coreboot.md b/docs/external/coreboot.md
index fe2f7ba5882..de32e902c7c 100644
--- a/docs/external/coreboot.md
+++ b/docs/external/coreboot.md
@@ -1,7 +1,10 @@
 OpenSBI as coreboot payload
-==============================
+===========================
 
-[coreboot](https://www.coreboot.org/) is a free/libre and open source firmware platform support multiple hardware architectures( x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and diverse hardware models. In RISC-V world, coreboot currently support HiFive Unleashed with OpenSBI as a payload to boot GNU/Linux:
+[coreboot] is a free/libre and open source firmware platform support multiple
+hardware architectures(x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and
+diverse hardware models. In RISC-V world, coreboot currently support HiFive
+Unleashed with OpenSBI as a payload to boot GNU/Linux:
 
 ```
 SiFive HiFive unleashed's original firmware boot process:
@@ -21,4 +24,9 @@ coreboot boot process:
                       +---------------------------------------------+-------------+-------+-+
 ```
 
-The upstreaming work is still in progress. There's a [documentation](https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md) about how to build [out-of-tree code](https://github.com/hardenedlinux/coreboot-HiFiveUnleashed) to load OpenSBI.
+The upstreaming work is still in progress. There's a [documentation] about how
+to build [out-of-tree code] to load OpenSBI.
+
+[coreboot]: https://www.coreboot.org/
+[documentation]: https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md
+[out-of-tree code]: https://github.com/hardenedlinux/coreboot-HiFiveUnleashed

From fdfb5332f393e8ca0a00e149a751e51adb0d0c97 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:34 -0800
Subject: [PATCH 0420/1765] doc: payload_linux: Fix doc styles

Remove the unnecessary blank line at the end of the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/firmware/payload_linux.md | 1 -
 1 file changed, 1 deletion(-)

diff --git a/docs/firmware/payload_linux.md b/docs/firmware/payload_linux.md
index 048eb50fae7..e896567abe2 100644
--- a/docs/firmware/payload_linux.md
+++ b/docs/firmware/payload_linux.md
@@ -7,4 +7,3 @@ provided as a payload to OpenSBI.
 
 Detailed examples can be found in both the [QEMU](../platform/qemu_virt.md)
 and the [HiFive Unleashed](../platform/sifive_fu540.md) platform guides.
-

From 44d1296018c557c4e450748d9f3fcfe81d4af749 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:35 -0800
Subject: [PATCH 0421/1765] doc: andes-ae350: Fix doc styles

Various styles fixes including:

- satisfy the 80 character per line rule as much as possible
- remove unnecessary spaces between words

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/andes-ae350.md | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index b979927c7cd..5a98707b230 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -1,13 +1,14 @@
 Andes AE350 SoC Platform
 ========================
-The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with
-level-one memories,interrupt controller, debug module, AXI and AHB Bus
-Matrix Controller, AXI-to-AHB Bridge and a collection of fundamentalAHB/APB
-bus IP components pre-integrated together as a system design.The high-quality
-and configurable AHB/APB IPs suites a majority embedded systems,
-and the verified platform serves as a starting point to jump start SoC designs.
+The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with level-one
+memories,interrupt controller, debug module, AXI and AHB Bus Matrix Controller,
+AXI-to-AHB Bridge and a collection of fundamentalAHB/APB bus IP components
+pre-integrated together as a system design.The high-quality and configurable
+AHB/APB IPs suites a majority embedded systems, and the verified platform serves
+as a starting point to jump start SoC designs.
 
-To build platform specific library and firmwares, provide the *PLATFORM=andes/ae350* parameter to the top level make command.
+To build platform specific library and firmwares, provide the
+*PLATFORM=andes/ae350* parameter to the top level make command.
 
 Platform Options
 ----------------
@@ -17,7 +18,8 @@ The Andes AE350 platform does not have any platform-specific options.
 Building Andes AE350 Platform
 -----------------------------
 
-To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using the compile time option FW_PAYLOAD_FDT_PATH.
+To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using
+the compile time option FW_PAYLOAD_FDT_PATH.
 
 AE350's dts is included in https://github.com/andestech/linux/tree/ast-v3_2_0-release-public
 

From a8ef0b5d53816f6c21250c765b9397a8f390ea95 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:36 -0800
Subject: [PATCH 0422/1765] doc: ariane-fpga: Fix doc styles

Various styles fixes including:

- satisfy the 80 character per line rule as much as possible
- make title underline the same length as the title itself
- remove the redundant FPGA (was FPGA FPGA SoC)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/ariane-fpga.md | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/docs/platform/ariane-fpga.md b/docs/platform/ariane-fpga.md
index e8e46008dd6..98cbc87aed4 100644
--- a/docs/platform/ariane-fpga.md
+++ b/docs/platform/ariane-fpga.md
@@ -1,9 +1,11 @@
 Ariane FPGA SoC Platform
-==========================
-Ariane is a 6-stage, single issue, in-order CPU which implements the 64-bit RISC-V instruction set.
-The Ariane FPGA development platform is based on FPGA FPGA SoC(which currently supports only  Genesys 2 board) and is capable
-of running Linux.
- The FPGA SoC currently contains the following peripherals:
+========================
+Ariane is a 6-stage, single issue, in-order CPU which implements the 64-bit
+RISC-V instruction set. The Ariane FPGA development platform is based on FPGA
+SoC (which currently supports only Genesys 2 board) and is capable of running
+Linux.
+
+The FPGA SoC currently contains the following peripherals:
 - DDR3 memory controller
 - SPI controller to conncet to an SDCard
 - Ethernet controller
@@ -16,22 +18,21 @@ To build platform specific library and firmwares, provide the
 Platform Options
 ----------------
 
-The *Ariane FPGA* platform does not have any platform-specific
-options.
+The *Ariane FPGA* platform does not have any platform-specific options.
 
 Building Ariane FPGA Platform
 -----------------------------
-**Linux Kernel Payload**
 
+**Linux Kernel Payload**
 
 ```
 make PLATFORM=ariane-fpga FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Booting Ariane FPGA Platform
------------------------------
+----------------------------
 
 **Linux Kernel Payload**
 
-As Linux kernel image is embedded in the OpenSBI firmware binary, Ariane will directly
-boot into Linux directly after powered on.
+As Linux kernel image is embedded in the OpenSBI firmware binary, Ariane will
+directly boot into Linux directly after powered on.

From 82fd42fcce30c9f57c2f34b70ef1be34c576172b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:37 -0800
Subject: [PATCH 0423/1765] doc: qemu_virt: Fix doc styles

Remove the unnecessary blank line at the end of the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/qemu_virt.md | 1 -
 1 file changed, 1 deletion(-)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 12204e45d99..6d8a3d04a5f 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -149,4 +149,3 @@ qemu-system-riscv32 -M virt -m 256M -nographic \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
 ```
-

From f8ce996d9042b4344f0d5b40c60f262e1dcd1123 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:38 -0800
Subject: [PATCH 0424/1765] doc: sifive_fu540: Fix doc styles

- make title underline the same length as the title itself
- put all URLs at the end of the doc

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 94eb81fc94b..7b14001159b 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -1,5 +1,5 @@
 SiFive FU540 SoC Platform
-==========================
+=========================
 The FU540-C000 is the world’s first 4+1 64-bit RISC-V SoC from SiFive.
 The HiFive Unleashed development platform is based on FU540-C000 and capable
 of running Linux.
@@ -25,7 +25,7 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
 This will let the board boot only hart1 instead of default 1-4.
 
 Building SiFive Fu540 Platform
------------------------------
+------------------------------
 
 In order to boot SMP Linux in U-Boot, Linux v5.1 (or higher) and latest
 U-Boot v2020.01 (or higher) should be used.
@@ -51,7 +51,7 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/bo
 The command-line example here assumes that U-Boot was compiled using the
 sifive_fu540_defconfig configuration and with U-Boot v2020.01 (or higher).
 
-The detailed U-Boot booting guide is avaialble at [U-Boot](https://gitlab.denx.de/u-boot/u-boot/blob/master/doc/board/sifive/fu540.rst)
+The detailed U-Boot booting guide is avaialble at [U-Boot].
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
@@ -81,11 +81,10 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
 ```
 
 Flashing the OpenSBI firmware binary to storage media:
------------------------------------------------------
-The first stage boot loader([FSBL](https://github.com/sifive/freedom-u540-c000-bootloader))
-expects the storage media to have a GPT partition table. It tries to look for
-a partition with following GUID to load the next stage boot loader (OpenSBI
-in this case).
+------------------------------------------------------
+The first stage boot loader ([FSBL]) expects the storage media to have a GPT
+partition table. It tries to look for a partition with following GUID to load
+the next stage boot loader (OpenSBI in this case).
 
 ```
 2E54B353-1271-4842-806F-E436D6AF6985
@@ -193,3 +192,6 @@ generated by QEMU, and u-boot.bin should be used as the payload image, like:
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
 ```
+
+[U-Boot]: https://gitlab.denx.de/u-boot/u-boot/blob/master/doc/board/sifive/fu540.rst
+[FSBL]: https://github.com/sifive/freedom-u540-c000-bootloader

From 27a5c7f3c8f3d9ce3c032b73a5b2372560b41b90 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 16 Feb 2020 07:19:39 -0800
Subject: [PATCH 0425/1765] doc: thead-c910: Fix doc styles

- make title underline the same length as the title itself
- satisfy the 80 character per line rule as much as possible

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/thead-c910.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/platform/thead-c910.md b/docs/platform/thead-c910.md
index 3ba0b96ac2f..786b47d032d 100644
--- a/docs/platform/thead-c910.md
+++ b/docs/platform/thead-c910.md
@@ -3,8 +3,8 @@ T-HEAD C910 Processor
 C910 is a 12-stage, 3 issues, 8 executions, out-of-order 64-bit RISC-V CPU which
 supports 16 cores, runs with 2.5GHz, and is capable of running Linux.
 
-To build platform specific library and firmwares, provide the *PLATFORM=thead/c910*
-parameter to the top level make command.
+To build platform specific library and firmwares, provide the
+*PLATFORM=thead/c910* parameter to the top level make command.
 
 Platform Options
 ----------------
@@ -19,7 +19,7 @@ make PLATFORM=thead/c910
 ```
 
 Booting T-HEAD C910 Platform
------------------------------
+----------------------------
 
 **No Payload**
 

From 0b414532c41303ce42fa2b9cc4861c5b01e76b40 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 18 Feb 2020 09:26:33 +0530
Subject: [PATCH 0426/1765] Revert "lib: Use __builtin_ctzl() in pmp_get()"

This reverts commit 897b8fbdd92fcfad194417d348b8dad16ab0e17a.

We are seeing compile errors using newlib based GCC cross-toolchain
so we restore back old ctz() implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 68f5f1734e6..7b612d4b1f3 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -184,6 +184,18 @@ void csr_write_num(int csr_num, unsigned long val)
 	};
 }
 
+static unsigned long ctz(unsigned long x)
+{
+	unsigned long ret = 0;
+
+	while (!(x & 1UL)) {
+		ret++;
+		x = x >> 1;
+	}
+
+	return ret;
+}
+
 int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len)
 {
@@ -275,7 +287,7 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 			addr	= 0;
 			log2len = __riscv_xlen;
 		} else {
-			t1	= __builtin_ctzl(~addr);
+			t1	= ctz(~addr);
 			addr	= (addr & ~((1UL << t1) - 1)) << PMP_SHIFT;
 			log2len = (t1 + PMP_SHIFT + 1);
 		}

From c66543d049d33b94f1915babaed6eb1f90e05f78 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 17 Feb 2020 20:55:12 -0800
Subject: [PATCH 0427/1765] lib: utils: htif: Fix 32-bit build

When building 32-bit OpenSBI images, we get:

  lib/utils/sys/htif.c: In function '__check_fromhost':
  lib/utils/sys/htif.c:12:31: error: left shift count >= width of type
                                     [-Werror=shift-count-overflow]
   #define HTIF_DATA_MASK  ((1UL << HTIF_DATA_BITS) - 1)
                                 ^~

Fixes: c2f23cc6edd7 ("platform: Add Spike initial support")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/sys/htif.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index f0ba8146220..e82590fee44 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -9,13 +9,13 @@
 #include <sbi_utils/sys/htif.h>
 
 #define HTIF_DATA_BITS		48
-#define HTIF_DATA_MASK		((1UL << HTIF_DATA_BITS) - 1)
+#define HTIF_DATA_MASK		((1ULL << HTIF_DATA_BITS) - 1)
 #define HTIF_DATA_SHIFT		0
 #define HTIF_CMD_BITS		8
-#define HTIF_CMD_MASK		((1UL << HTIF_CMD_BITS) - 1)
+#define HTIF_CMD_MASK		((1ULL << HTIF_CMD_BITS) - 1)
 #define HTIF_CMD_SHIFT		48
 #define HTIF_DEV_BITS		8
-#define HTIF_DEV_MASK		((1UL << HTIF_DEV_BITS) - 1)
+#define HTIF_DEV_MASK		((1ULL << HTIF_DEV_BITS) - 1)
 #define HTIF_DEV_SHIFT		56
 
 #define HTIF_DEV_SYSTEM		0

From bc874e34cecbd1e024ae7be4ec2f34d9cb1fbecb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 18 Feb 2020 11:37:16 +0530
Subject: [PATCH 0428/1765] lib: Don't check MIDELEG and MEDELEG at end of
 delegate_traps()

The MIDELEG and MEDELEG CSR checks at end of delegate_traps() were
added for initial bring-up on SiFive Unleashed and QEMU. These
checks are not required any more and in-future these checks can
cause failures because some of the MIDELEG/MEDELEG bits will be
hard-wired to 0 or 1.

For related discussion, refer github issue:
https://github.com/riscv/opensbi/issues/157

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index dd2f99e8a24..d83008f9c11 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -104,11 +104,6 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 	csr_write(CSR_MIDELEG, interrupts);
 	csr_write(CSR_MEDELEG, exceptions);
 
-	if ((csr_read(CSR_MIDELEG) & interrupts) != interrupts)
-		return SBI_EFAIL;
-	if ((csr_read(CSR_MEDELEG) & exceptions) != exceptions)
-		return SBI_EFAIL;
-
 	return 0;
 }
 

From 24c3082ea496d39d406601ee4243b724f4d31aec Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 18 Feb 2020 11:53:52 +0530
Subject: [PATCH 0429/1765] lib: Print interrupt and exception delegation in
 boot prints

We print MIDELEG and MEDELEG CSRs as part of boot prints so that
boot log shows the interrupts and exceptions delegated to S-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  1 +
 lib/sbi/sbi_hart.c     | 15 +++++++++++++--
 lib/sbi/sbi_init.c     |  1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 0762f951869..065cb0c6f97 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -20,6 +20,7 @@ void *sbi_hart_get_trap_info(struct sbi_scratch *scratch);
 
 void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data);
 
+void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d83008f9c11..1d62862ae72 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -107,6 +107,17 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 	return 0;
 }
 
+void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
+{
+#if __riscv_xlen == 32
+	sbi_printf("MIDELEG : 0x%08lx\n", csr_read(CSR_MIDELEG));
+	sbi_printf("MEDELEG : 0x%08lx\n", csr_read(CSR_MEDELEG));
+#else
+	sbi_printf("MIDELEG : 0x%016lx\n", csr_read(CSR_MIDELEG));
+	sbi_printf("MEDELEG : 0x%016lx\n", csr_read(CSR_MEDELEG));
+#endif
+}
+
 unsigned long log2roundup(unsigned long x)
 {
 	unsigned long ret = 0;
@@ -138,9 +149,9 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 		else
 			size = 0;
 #if __riscv_xlen == 32
-		sbi_printf("PMP%d: 0x%08lx-0x%08lx (A",
+		sbi_printf("PMP%d    : 0x%08lx-0x%08lx (A",
 #else
-		sbi_printf("PMP%d: 0x%016lx-0x%016lx (A",
+		sbi_printf("PMP%d    : 0x%016lx-0x%016lx (A",
 #endif
 			   i, addr, addr + size - 1);
 		if (prot & PMP_L)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 8baaed42dea..48bc6533b35 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -68,6 +68,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
 
+	sbi_hart_delegation_dump(scratch);
 	sbi_hart_pmp_dump(scratch);
 }
 

From 66fb729a1e46a9a46e809f3b7867fef91477e494 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 18 Feb 2020 02:15:59 -0800
Subject: [PATCH 0430/1765] platform: sifive: fu540: Add 32-bit specific
 fdt/payload addresses

For testing 32-bit SiFive specific drivers with QEMU riscv32, add
32-bit specific FW_JUMP_FDT_ADDR and FW_PAYLOAD_OFFSET.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md   |  4 ++++
 platform/sifive/fu540/config.mk | 16 ++++++++++++++--
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 7b14001159b..065fd4d6410 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -193,5 +193,9 @@ generated by QEMU, and u-boot.bin should be used as the payload image, like:
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
 ```
 
+While the real hardware operates at the 64-bit mode, it's possible for QEMU to
+test the 32-bit OpenSBI firmware. This can be helpful for testing 32-bit SiFive
+specific drivers.
+
 [U-Boot]: https://gitlab.denx.de/u-boot/u-boot/blob/master/doc/board/sifive/fu540.rst
 [FSBL]: https://github.com/sifive/freedom-u540-c000-bootloader
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index ad099cc58d1..e76adcd5e71 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -21,8 +21,20 @@ platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
 FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
 FW_JUMP=y
-FW_JUMP_ADDR=0x80200000
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_JUMP_ADDR=0x80400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_JUMP_ADDR=0x80200000
+endif
 FW_JUMP_FDT_ADDR=0x88000000
 FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x200000
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
 FW_PAYLOAD_FDT_ADDR=0x88000000

From 3e7d666d7ca5eca5b4ba9c0c624a1747bbfd7bf7 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 18 Feb 2020 02:18:33 -0800
Subject: [PATCH 0431/1765] platform: qemu: virt: Correct the typo in config.mk

It should be "aligned".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/qemu/virt/config.mk | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
index e9f5591b6c8..025cd616601 100644
--- a/platform/qemu/virt/config.mk
+++ b/platform/qemu/virt/config.mk
@@ -22,19 +22,19 @@ FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
 FW_JUMP=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB alligned for 32-bit system
+  # This needs to be 4MB aligned for 32-bit system
   FW_JUMP_ADDR=0x80400000
 else
-  # This needs to be 2MB alligned for 64-bit system
+  # This needs to be 2MB aligned for 64-bit system
   FW_JUMP_ADDR=0x80200000
 endif
 FW_JUMP_FDT_ADDR=0x82200000
 FW_PAYLOAD=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB alligned for 32-bit system
+  # This needs to be 4MB aligned for 32-bit system
   FW_PAYLOAD_OFFSET=0x400000
 else
-  # This needs to be 2MB alligned for 64-bit system
+  # This needs to be 2MB aligned for 64-bit system
   FW_PAYLOAD_OFFSET=0x200000
 endif
 FW_PAYLOAD_FDT_ADDR=0x82200000

From c3b3b8f43b49e4fa8fde5e916cd8d573687e3626 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Feb 2020 15:47:53 -0800
Subject: [PATCH 0432/1765] lib: Fix typo in atomic exchange functions

There is a typo in atomic operations code which prevents the
usage of riscv atomic instructions even if it is supported.

Fix the typo.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_atomic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 43318640f52..8b85801ddc2 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -79,7 +79,7 @@ long atomic_sub_return(atomic_t *atom, long value)
 #define axchg(ptr, x)							\
 	({									\
 		__typeof__(*(ptr)) _x_ = (x);					\
-		(__typeof__(*(ptr))) __xchg((ptr), _x_, sizeof(*(ptr)));	\
+		(__typeof__(*(ptr))) __axchg((ptr), _x_, sizeof(*(ptr)));	\
 	})
 
 

From 393624377a45d0fc20a376db60fb136a3b1fd685 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 21 Feb 2020 15:47:54 -0800
Subject: [PATCH 0433/1765] lib: Use available hart mask for correct hbase
 value

As per the latest SBI specification, all online harts should receive
IPI if hbase is set to -1.

Set the target mask to all available hart mask if hbase is -1.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ipi.c | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 206931c60be..62eba876bdb 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -79,20 +79,23 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 	u32 hartid = sbi_current_hartid();
 	unsigned long last_bit = __fls(mask);
 
-	if (hbase > last_bit)
-		/* hart base is not available */
-		return SBI_EINVAL;
-	/**
-	 * FIXME: This check is valid only ULONG size. This is oka for now as
-	 * avaialble hart mask can support upto ULONG size only.
-	 */
-	tempmask = hmask << hbase;
-	tempmask = ~mask & tempmask;
-	if (tempmask)
-		/* at least one of the hart in hmask is not available */
-		return SBI_EINVAL;
+	if (hbase != -1UL) {
+		if (hbase > last_bit)
+			/* hart base is not available */
+			return SBI_EINVAL;
+		/**
+		 * FIXME: This check is valid only ULONG size. This is okay for
+		 * now as avaialble hart mask can support upto ULONG size only.
+		 */
+		tempmask = hmask << hbase;
+		tempmask = ~mask & tempmask;
+		if (tempmask)
+			/* at least one of the hart in hmask is not available */
+			return SBI_EINVAL;
+
+		mask &= (hmask << hbase);
+	}
 
-	mask &= (hmask << hbase);
 	/* Send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
 		if ((m & 1UL) && (i != hartid))

From f8b3bb826d488847009f74409b1898d88b5a6cc7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 22 Feb 2020 11:50:55 +0530
Subject: [PATCH 0434/1765] lib: Simplify the for-loop in sbi_ipi_send_many()

We don't need to separately call sbi_ipi_send() for current HART
in sbi_ipi_send_many(). Instead, we can simplify the for-loop in
sbi_ipi_send_many() and call sbi_ipi_send() for all HARTs in the
for-loop itself.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_ipi.c | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 62eba876bdb..d3b48fea927 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -76,7 +76,6 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 	ulong i, m;
 	ulong mask = sbi_hart_available_mask();
 	ulong tempmask;
-	u32 hartid = sbi_current_hartid();
 	unsigned long last_bit = __fls(mask);
 
 	if (hbase != -1UL) {
@@ -98,16 +97,9 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 
 	/* Send IPIs to every other hart on the set */
 	for (i = 0, m = mask; m; i++, m >>= 1)
-		if ((m & 1UL) && (i != hartid))
+		if (m & 1UL)
 			sbi_ipi_send(scratch, i, event, data);
 
-	/*
-	 * If the current hart is on the set, send an IPI
-	 * to it as well
-	 */
-	if (mask & (1UL << hartid))
-		sbi_ipi_send(scratch, hartid, event, data);
-
 	return 0;
 }
 

From ac5e821d50be631f26274765a59bc1b444ffd862 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 24 Feb 2020 11:27:57 +0530
Subject: [PATCH 0435/1765] include: Bump-up version to 0.6

This patch updates OpenSBI version to 0.6 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 9268f6df9cf..62615a86d80 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 5
+#define OPENSBI_VERSION_MINOR 6
 
 /**
  *  OpenSBI 32-bit version with:

From f64f4b92e411709227ee830bc1e9f8f87c72423e Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:32:36 -0800
Subject: [PATCH 0436/1765] lib: Add a new platform feature to bringup
 secondary harts

A platform may have a specific method to bring-up secondary harts for the
first time but may rely on generic WFI based approach for hart hotplug in
absence of a platform specific hart hotplug method.

Define a platform feature flag for such platforms. The platform needs to
implement platform specific bring-up method in hart_start and not define
hart_stop method in this case. They must only define
SBI_PLATFORM_HAS_HART_SECONDARY_BOOT.

SBI_PLATFORM_HAS_HART_HOTPLUG should only be defined when the platform
intend to support both hart_start and hart_stop and do not intend to rely
on generic WFI based approach.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index ba1d95f4bab..16ee05c7bb3 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -59,6 +59,8 @@ enum sbi_platform_features {
 	SBI_PLATFORM_HAS_MCOUNTEREN = (1 << 4),
 	/** Platform has fault delegation support */
 	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 5),
+	/** Platform has custom secondary hart booting support */
+	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 6),
 };
 
 /** Default feature set for a platform */
@@ -204,6 +206,9 @@ struct sbi_platform {
 /** Check whether the platform supports fault delegation */
 #define sbi_platform_has_mfaults_delegation(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+/** Check whether the platform supports custom secondary hart booting support */
+#define sbi_platform_has_hart_secondary_boot(__p) \
+	((__p)->features & SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
 
 /**
  * Get name of the platform

From b677a9b8d641f1c16a4f8f52e00019a9bc747893 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:32:37 -0800
Subject: [PATCH 0437/1765] lib: Implement hart hotplug

This patch adds support for hart hotplug in OpenSBI using a generic WFI
based approach. Hart hotplug can be achieved via SBI HSM extension which
allows supervisor mode software to start or stop any harts anytime.

Any platform wishes to implement platform specific hart hotplug must
implement both hart_start and hart_stop in addition to enable platform
feature SBI_PLATFORM_HAS_HART_HOTPLUG.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_error.h    |   1 +
 include/sbi/sbi_hart.h     |   2 +
 include/sbi/sbi_hsm.h      |  30 +++++
 include/sbi/sbi_platform.h |  43 +++++++
 lib/sbi/objects.mk         |   1 +
 lib/sbi/sbi_hart.c         |  25 +++++
 lib/sbi/sbi_hsm.c          | 222 +++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c         |  13 ++-
 lib/sbi/sbi_ipi.c          |   3 +-
 lib/sbi/sbi_system.c       |   5 +
 10 files changed, 343 insertions(+), 2 deletions(-)
 create mode 100644 include/sbi/sbi_hsm.h
 create mode 100644 lib/sbi/sbi_hsm.c

diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 4b7dd12f3c1..91ba2eef44b 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -28,6 +28,7 @@
 #define SBI_ETRAP	-13
 #define SBI_EUNKNOWN	-14
 #define SBI_ENOENT	-15
+#define SBI_EALREADY_STARTED	-16
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 065cb0c6f97..d88c7de2f0e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -22,6 +22,8 @@ void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data);
 
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
+int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
+			     unsigned long attr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
new file mode 100644
index 00000000000..2566afb742d
--- /dev/null
+++ b/include/sbi/sbi_hsm.h
@@ -0,0 +1,30 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __SBI_HSM_H__
+#define __SBI_HSM_H__
+
+#include <sbi/sbi_types.h>
+
+/** Hart state values **/
+#define SBI_HART_STOPPED	0
+#define SBI_HART_STOPPING	1
+#define SBI_HART_STARTING	2
+#define SBI_HART_STARTED	3
+
+int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
+void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
+
+int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
+			   ulong saddr, ulong priv);
+int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
+int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid);
+bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid);
+void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
+#endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 16ee05c7bb3..462006e5e82 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -135,6 +135,14 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
+	/** Bringup the given hart from previous stage **/
+	int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
+	/**
+	 *  Stop the current hart from running. This call doesn't expect to
+	 *  return if success.
+	 */
+	int (*hart_stop)(void);
+
 	/** Reboot the platform */
 	int (*system_reboot)(u32 type);
 	/** Shutdown or poweroff the platform */
@@ -284,6 +292,41 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Bringup a given hart from previous stage. Platform should implement this
+ * operation if they support a custom mechanism to start a hart. Otherwise,
+ * a generic WFI based approach will be used to start/stop a hart in OpenSBI.
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid Hart ID
+ * @param saddr  Physical address in supervisor mode for hart to jump after
+ *		 OpenSBI
+ * @param priv	 A private context data from the caller
+ *
+ * @return 0 if sucessful and negative error code on failure
+ */
+static inline int sbi_platform_hart_start(const struct sbi_platform *plat,
+					  u32 hartid, ulong saddr, ulong priv)
+{
+	if (plat && sbi_platform_ops(plat)->hart_start)
+		return sbi_platform_ops(plat)->hart_start(hartid, saddr, priv);
+	return SBI_ENOTSUPP;
+}
+
+/**
+ * Stop the current hart in OpenSBI.
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return Negative error code on failure. It doesn't return on success.
+ */
+static inline int sbi_platform_hart_stop(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->hart_stop)
+		return sbi_platform_ops(plat)->hart_stop();
+	return SBI_ENOTSUPP;
+}
+
 /**
  * Early initialization for current HART
  *
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index fac980fa845..dc52a9f9157 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -22,6 +22,7 @@ libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hart.o
+libsbi-objs-y += sbi_hsm.o
 libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 1d62862ae72..3de46a2fb2c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -166,6 +166,31 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 	}
 }
 
+int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
+			    unsigned long attr)
+{
+	unsigned long prot, size, l2l, i, tempaddr;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (!sbi_platform_has_pmp(plat))
+		return SBI_OK;
+
+	for (i = 0; i < PMP_COUNT; i++) {
+		pmp_get(i, &prot, &tempaddr, &l2l);
+		if (!(prot & PMP_A))
+			continue;
+		if (l2l < __riscv_xlen)
+			size = (1UL << l2l);
+		else
+			size = 0;
+		if (tempaddr <= addr && addr <= tempaddr + size)
+			if (!(prot & attr))
+				return SBI_INVALID_ADDR;
+	}
+
+	return SBI_OK;
+}
+
 static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	u32 i, count;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
new file mode 100644
index 00000000000..f3207eedb87
--- /dev/null
+++ b/lib/sbi/sbi_hsm.c
@@ -0,0 +1,222 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_atomic.h>
+#include <sbi/sbi_bits.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_init.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/sbi_console.h>
+
+static unsigned long hart_data_offset;
+
+/** Per hart specific data to manage state transition **/
+struct sbi_hsm_data {
+	atomic_t state;
+};
+
+int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
+{
+	struct sbi_hsm_data *hdata;
+	u32 hstate;
+
+	if (hartid != sbi_current_hartid())
+		scratch = sbi_hart_id_to_scratch(scratch, hartid);
+
+	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
+	hstate = atomic_read(&hdata->state);
+
+	return hstate;
+}
+
+int sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)
+{
+
+	if (sbi_hsm_hart_get_state(scratch, hartid) == SBI_HART_STARTED)
+		return TRUE;
+	else
+		return FALSE;
+}
+
+void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
+{
+	u32 oldstate;
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							hart_data_offset);
+
+	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
+				       SBI_HART_STARTED);
+	if (oldstate != SBI_HART_STARTING)
+		sbi_hart_hang();
+}
+
+static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
+{
+	unsigned long saved_mie;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							hart_data_offset);
+	/* Save MIE CSR */
+	saved_mie = csr_read(CSR_MIE);
+
+	/* Set MSIE bit to receive IPI */
+	csr_set(CSR_MIE, MIP_MSIP);
+
+	/* Wait for hart_add call*/
+	while (atomic_read(&hdata->state) != SBI_HART_STARTING) {
+		wfi();
+	};
+
+	/* Restore MIE CSR */
+	csr_write(CSR_MIE, saved_mie);
+
+	/* Clear current HART IPI */
+	sbi_platform_ipi_clear(plat, hartid);
+}
+
+int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
+{
+	struct sbi_scratch *rscratch;
+	struct sbi_hsm_data *hdata;
+	u32 hart_count, i;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (cold_boot) {
+		hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata),
+								    "HART_DATA");
+		if (!hart_data_offset)
+			return SBI_ENOMEM;
+		hart_count = sbi_platform_hart_count(plat);
+
+		/* Initialize hart state data for every hart */
+		for (i = 0; i < hart_count; i++) {
+			rscratch = sbi_hart_id_to_scratch(scratch, i);
+			hdata = sbi_scratch_offset_ptr(rscratch,
+						       hart_data_offset);
+			ATOMIC_INIT(&hdata->state,
+			(i == hartid) ? SBI_HART_STARTING : SBI_HART_STOPPED);
+		}
+	} else {
+		sbi_hsm_hart_wait(scratch, hartid);
+	}
+
+	return 0;
+}
+
+void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
+{
+	u32 hstate;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							hart_data_offset);
+	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
+
+	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
+				     SBI_HART_STOPPED);
+	if (hstate != SBI_HART_STOPPING)
+		goto fail_exit;
+
+	if (sbi_platform_has_hart_hotplug(plat)) {
+		sbi_platform_hart_stop(plat);
+		/* It should never reach here */
+		goto fail_exit;
+	}
+
+	/**
+	 * As platform is lacking support for hotplug, directly jump to warmboot
+	 * and wait for interrupts in warmboot. We do it preemptively in order
+	 * preserve the hart states and reuse the code path for hotplug.
+	 */
+	jump_warmboot();
+
+fail_exit:
+	/* It should never reach here */
+	sbi_printf("ERR: Failed stop hart [%u]\n", sbi_current_hartid());
+	sbi_hart_hang();
+}
+
+int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
+		       ulong saddr, ulong priv)
+{
+	unsigned long init_count;
+	unsigned int hstate;
+	int rc;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_scratch *rscratch = sbi_hart_id_to_scratch(scratch, hartid);
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(rscratch,
+							hart_data_offset);
+
+	if (sbi_platform_hart_disabled(plat, hartid))
+		return SBI_EINVAL;
+	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
+				     SBI_HART_STARTING);
+	if (hstate == SBI_HART_STARTED)
+		return SBI_EALREADY_STARTED;
+
+	/**
+	 * if a hart is already transition to start or stop, another start call
+	 * is considered as invalid request.
+	 */
+	if (hstate != SBI_HART_STOPPED)
+		return SBI_EINVAL;
+
+	rc = sbi_hart_pmp_check_addr(scratch, saddr, PMP_X);
+	if (rc)
+		return rc;
+	//TODO: We also need to check saddr for valid physical address as well.
+
+	init_count = sbi_init_count(hartid);
+	rscratch->next_arg1 = priv;
+	rscratch->next_addr = saddr;
+
+	if (sbi_platform_has_hart_hotplug(plat) ||
+	   (sbi_platform_has_hart_secondary_boot(plat) && !init_count)) {
+		return sbi_platform_hart_start(plat, hartid,
+					     scratch->warmboot_addr, priv);
+	} else {
+		sbi_platform_ipi_send(plat, hartid);
+	}
+
+	return 0;
+}
+
+int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
+{
+	int oldstate;
+	u32 hartid = sbi_current_hartid();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							hart_data_offset);
+
+	if (sbi_platform_hart_disabled(plat, hartid) ||
+	    !sbi_hsm_hart_started(scratch, hartid))
+		return SBI_EINVAL;
+
+	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
+				     SBI_HART_STOPPING);
+	if (oldstate != SBI_HART_STARTED) {
+		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
+			   __func__, oldstate);
+		return SBI_DENIED;
+	}
+
+	if (exitnow)
+		sbi_exit(scratch);
+
+	return 0;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 48bc6533b35..1f113b9b7b0 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
@@ -85,6 +86,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!init_count_offset)
 		sbi_hart_hang();
 
+	rc = sbi_hsm_init(scratch, hartid, TRUE);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_system_early_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
@@ -131,6 +136,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
+	sbi_hsm_prepare_next_jump(scratch, hartid);
 	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
 			     scratch->next_mode, FALSE);
 }
@@ -146,6 +152,10 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!init_count_offset)
 		sbi_hart_hang();
 
+	rc = sbi_hsm_init(scratch, hartid, FALSE);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_system_early_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
@@ -179,6 +189,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
+	sbi_hsm_prepare_next_jump(scratch, hartid);
 	sbi_hart_switch_mode(hartid, scratch->next_arg1,
 			     scratch->next_addr,
 			     scratch->next_mode, FALSE);
@@ -260,5 +271,5 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_platform_final_exit(plat);
 
-	sbi_hart_hang();
+	sbi_hsm_exit(scratch);
 }
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index d3b48fea927..006844b25d2 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
@@ -153,7 +154,7 @@ void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
 
 static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
 {
-	sbi_exit(scratch);
+	sbi_hsm_hart_stop(scratch, TRUE);
 }
 
 static struct sbi_ipi_event_ops ipi_halt_ops = {
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 0fd4999ffe0..c6aa36c61d9 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -9,6 +9,7 @@
  */
 
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_ipi.h>
@@ -42,6 +43,8 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 	sbi_ipi_send_halt(scratch,
 			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
 
+	sbi_hsm_hart_stop(scratch, FALSE);
+
 	/* Platform specific reooot */
 	sbi_platform_system_reboot(sbi_platform_ptr(scratch), type);
 
@@ -57,6 +60,8 @@ void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 	sbi_ipi_send_halt(scratch,
 			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
 
+	sbi_hsm_hart_stop(scratch, FALSE);
+
 	/* Platform specific shutdown */
 	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
 

From 5b4824082ff8826f77d6bc670e16068d0744ff7f Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:32:38 -0800
Subject: [PATCH 0438/1765] lib: Add possible hart status values

SBI HSM extension defines possible hart status values in the
specification.

Define all possible status values. Add a helper function to
convert hart state to status because hart states are internal
to OpenSBI only and may not match the status values defined in
the specification.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h |  5 +++++
 include/sbi/sbi_hsm.h             |  1 +
 lib/sbi/sbi_hsm.c                 | 25 +++++++++++++++++++++++++
 3 files changed, 31 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 93c074745d9..ba88e8b157b 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -51,6 +51,11 @@
 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA	0x5
 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID	0x6
 
+#define SBI_HSM_HART_STATUS_STARTED		0x0
+#define SBI_HSM_HART_STATUS_STOPPED		0x1
+#define SBI_HSM_HART_STATUS_START_PENDING	0x2
+#define SBI_HSM_HART_STATUS_STOP_PENDING	0x3
+
 #define SBI_SPEC_VERSION_MAJOR_OFFSET	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
 #define SBI_SPEC_VERSION_MINOR_MASK	0xffffff
diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 2566afb742d..11ea7cfe2f3 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -25,6 +25,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 			   ulong saddr, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid);
+int sbi_hsm_hart_state_to_status(int state);
 bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index f3207eedb87..36fafed18fe 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_bits.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_init.h>
@@ -30,6 +31,30 @@ struct sbi_hsm_data {
 	atomic_t state;
 };
 
+int sbi_hsm_hart_state_to_status(int state)
+{
+	int ret;
+
+	switch (state) {
+	case SBI_HART_STOPPED:
+		ret = SBI_HSM_HART_STATUS_STOPPED;
+		break;
+	case SBI_HART_STOPPING:
+		ret = SBI_HSM_HART_STATUS_STOP_PENDING;
+		break;
+	case SBI_HART_STARTING:
+		ret = SBI_HSM_HART_STATUS_START_PENDING;
+		break;
+	case SBI_HART_STARTED:
+		ret = SBI_HSM_HART_STATUS_STARTED;
+		break;
+	default:
+		ret = SBI_EINVAL;
+	}
+
+	return ret;
+}
+
 int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_hsm_data *hdata;

From e3f69fc1e934ce7815d9cde2d13dd2038a2894a6 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 11 Feb 2020 17:32:39 -0800
Subject: [PATCH 0439/1765] lib: Implement Hart State Management (HSM) SBI
 extension

This patch adds support HSM extension. The specification is available
at https://github.com/riscv/riscv-sbi-doc.

It allows to implement hart hotplug and fixed ordered hart booting in
supervisor.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall.h           |  1 +
 include/sbi/sbi_ecall_interface.h |  6 ++++
 lib/sbi/objects.mk                |  1 +
 lib/sbi/sbi_ecall.c               |  3 ++
 lib/sbi/sbi_ecall_hsm.c           | 51 +++++++++++++++++++++++++++++++
 5 files changed, 62 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_hsm.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 2a3500f1d09..1b5649698a3 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -39,6 +39,7 @@ extern struct sbi_ecall_extension ecall_time;
 extern struct sbi_ecall_extension ecall_rfence;
 extern struct sbi_ecall_extension ecall_ipi;
 extern struct sbi_ecall_extension ecall_vendor;
+extern struct sbi_ecall_extension ecall_hsm;
 
 u16 sbi_ecall_version_major(void);
 
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index ba88e8b157b..727a545471d 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -26,6 +26,7 @@
 #define SBI_EXT_TIME				0x54494D45
 #define SBI_EXT_IPI				0x735049
 #define SBI_EXT_RFENCE				0x52464E43
+#define SBI_EXT_HSM				0x48534D
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -51,6 +52,11 @@
 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA	0x5
 #define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID	0x6
 
+/* SBI function IDs for HSM extension */
+#define SBI_EXT_HSM_HART_START			0x0
+#define SBI_EXT_HSM_HART_STOP			0x1
+#define SBI_EXT_HSM_HART_GET_STATUS		0x2
+
 #define SBI_HSM_HART_STATUS_STARTED		0x0
 #define SBI_HSM_HART_STATUS_STOPPED		0x1
 #define SBI_HSM_HART_STATUS_START_PENDING	0x2
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index dc52a9f9157..39e929535ec 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -18,6 +18,7 @@ libsbi-objs-y += sbi_ecall_base.o
 libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_ecall_vendor.o
+libsbi-objs-y += sbi_ecall_hsm.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hfence.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 82397c4bbf3..2383e4fd99f 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -136,6 +136,9 @@ int sbi_ecall_init(void)
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_base);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_hsm);
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_legacy);
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
new file mode 100644
index 00000000000..528bc801002
--- /dev/null
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -0,0 +1,51 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_version.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/riscv_asm.h>
+
+static int sbi_ecall_hsm_handler(struct sbi_scratch *scratch,
+				 unsigned long extid, unsigned long funcid,
+				 unsigned long *args, unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	int hstate;
+
+	switch (funcid) {
+	case SBI_EXT_HSM_HART_START:
+		ret = sbi_hsm_hart_start(scratch, args[0], args[1], args[2]);
+		break;
+	case SBI_EXT_HSM_HART_STOP:
+		ret = sbi_hsm_hart_stop(scratch, TRUE);
+		break;
+	case SBI_EXT_HSM_HART_GET_STATUS:
+		hstate = sbi_hsm_hart_get_state(scratch, args[0]);
+		ret = sbi_hsm_hart_state_to_status(hstate);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+	if (ret >= 0) {
+		*out_val = ret;
+		ret = 0;
+	}
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_hsm = {
+	.extid_start = SBI_EXT_HSM,
+	.extid_end = SBI_EXT_HSM,
+	.handle = sbi_ecall_hsm_handler,
+};

From 6704216732e528ac99109b8bad401e60c68d6c22 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 6 Mar 2020 11:44:44 -0800
Subject: [PATCH 0440/1765] lib: Check MSIP bit after returning from WFI

As per the RISC-V privilege specification, WFI can be implemented as
a NOP. Software should ensure that relevant interrupt pending bits
are set. Otherwise, loop back to WFI.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_hart.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 3de46a2fb2c..535fe19520d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -385,7 +385,7 @@ static unsigned long coldboot_wait_bitmap = 0;
 
 void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
-	unsigned long saved_mie;
+	unsigned long saved_mie, cmip;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((sbi_platform_hart_count(plat) <= hartid) ||
@@ -407,7 +407,10 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Wait for coldboot to finish using WFI */
 	while (!coldboot_done) {
 		spin_unlock(&coldboot_lock);
-		wfi();
+		do {
+			wfi();
+			cmip = csr_read(CSR_MIP);
+		} while (!(cmip & MIP_MSIP));
 		spin_lock(&coldboot_lock);
 	};
 

From 82ae8e8fe2a3234a4cec90ec880ec5509cbaa79f Mon Sep 17 00:00:00 2001
From: Nikita Ermakov <coffe92@gmail.com>
Date: Sun, 8 Mar 2020 01:31:02 +0300
Subject: [PATCH 0441/1765] makefile: Do setup of the install target more
 flexible

- Add possibility to setup include, libs, firmware and docs paths.

- Change the default installation paths for include, libs, firmware
  and docs to meet FHS [1].

[1] https://refspecs.linuxfoundation.org/FHS_3.0/fhs/index.html

Signed-off-by: Nikita Ermakov <coffe92@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 67 +++++++++++++++++++++++++++++++++++++++-----------------
 1 file changed, 47 insertions(+), 20 deletions(-)

diff --git a/Makefile b/Makefile
index ccf8ea3db02..58a2807270a 100644
--- a/Makefile
+++ b/Makefile
@@ -30,15 +30,15 @@ ifeq ($(build_dir),$(CURDIR))
 $(error Build directory is same as source directory.)
 endif
 ifdef I
- install_dir=$(shell $(READLINK) -f $(I))
+ install_root_dir=$(shell $(READLINK) -f $(I))
 else
- install_dir=$(CURDIR)/install
+ install_root_dir=$(CURDIR)/install/usr
 endif
-ifeq ($(install_dir),$(CURDIR))
-$(error Install directory is same as source directory.)
+ifeq ($(install_root_dir),$(CURDIR))
+$(error Install root directory is same as source directory.)
 endif
-ifeq ($(install_dir),$(build_dir))
-$(error Install directory is same as build directory.)
+ifeq ($(install_root_dir),$(build_dir))
+$(error Install root directory is same as build directory.)
 endif
 ifdef PLATFORM_DIR
   platform_dir_path=$(shell $(READLINK) -f $(PLATFORM_DIR))
@@ -156,6 +156,33 @@ ifndef PLATFORM_RISCV_CODE_MODEL
   PLATFORM_RISCV_CODE_MODEL = medany
 endif
 
+# Setup install directories
+ifdef INSTALL_INCLUDE_PATH
+	install_include_path=$(INSTALL_INCLUDE_PATH)
+else
+	install_include_path=include
+endif
+ifdef INSTALL_LIB_PATH
+	install_lib_path=$(INSTALL_LIB_PATH)
+else
+	ifneq ($(origin INSTALL_LIB_SUBDIR), undefined)
+		install_lib_subdir=$(INSTALL_LIB_SUBDIR)
+	else
+		install_lib_subdir=$(PLATFORM_RISCV_ABI)
+	endif
+	install_lib_path=lib$(subst 32,,$(PLATFORM_RISCV_XLEN))/$(install_lib_subdir)
+endif
+ifdef INSTALL_FIRMWARE_PATH
+	install_firmware_path=$(INSTALL_FIRMWARE_PATH)
+else
+	install_firmware_path=share/opensbi/$(PLATFORM_RISCV_ABI)
+endif
+ifdef INSTALL_DOCS_PATH
+	install_docs_path=$(INSTALL_DOCS_PATH)
+else
+	install_docs_path=share/opensbi/docs
+endif
+
 # Setup compilation commands flags
 GENFLAGS	=	-I$(platform_src_dir)/include
 GENFLAGS	+=	-I$(include_dir)
@@ -215,12 +242,12 @@ copy_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " COPY      $(subst $(build_dir)/,,$(1))"; \
 	     cp -f $(2) $(1)
 inst_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
-	     echo " INSTALL   $(subst $(install_dir)/,,$(1))"; \
+	     echo " INSTALL   $(subst $(install_root_dir)/,,$(1))"; \
 	     cp -f $(2) $(1)
 inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 	     mkdir -p $(1)/$(3); \
 	     for file in $(4) ; do \
-	     rel_file=`echo $$file | sed -e 's@$(2)/$(3)/@@'`; \
+	     rel_file=`echo $$file | sed -e 's@$(2)/$(subst $(install_firmware_path),platform,$(3))@@'`; \
 	     dest_file=$(1)"/"$(3)"/"`echo $$rel_file`; \
 	     dest_dir=`dirname $$dest_file`; \
 	     echo " INSTALL   "$(3)"/"`echo $$rel_file`; \
@@ -229,7 +256,7 @@ inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 	     done \
 	     fi
 inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
-	     echo " INSTALL   $(subst $(install_dir)/,,$(1))"; \
+	     echo " INSTALL   $(subst $(install_root_dir)/,,$(1))"; \
 	     cp -rf $(2) $(1)
 compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP       $(subst $(build_dir)/,,$(1))"; \
@@ -385,26 +412,26 @@ install: $(install_targets-y)
 
 .PHONY: install_libsbi
 install_libsbi: $(build_dir)/lib/libsbi.a
-	$(call inst_header_dir,$(install_dir)/include,$(include_dir)/sbi)
-	$(call inst_file,$(install_dir)/lib/libsbi.a,$(build_dir)/lib/libsbi.a)
+	$(call inst_header_dir,$(install_root_dir)/$(install_include_path),$(include_dir)/sbi)
+	$(call inst_file,$(install_root_dir)/$(install_lib_path)/libsbi.a,$(build_dir)/lib/libsbi.a)
 
 .PHONY: install_libsbiutils
 install_libsbiutils: $(build_dir)/lib/libsbiutils.a
-	$(call inst_header_dir,$(install_dir)/include,$(include_dir)/sbi_utils)
-	$(call inst_file,$(install_dir)/lib/libsbiutils.a,$(build_dir)/lib/libsbiutils.a)
+	$(call inst_header_dir,$(install_root_dir)/$(install_include_path),$(include_dir)/sbi_utils)
+	$(call inst_file,$(install_root_dir)/$(install_lib_path)/libsbiutils.a,$(build_dir)/lib/libsbiutils.a)
 
 .PHONY: install_libplatsbi
 install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a
-	$(call inst_file,$(install_dir)/platform/$(platform_subdir)/lib/libplatsbi.a,$(platform_build_dir)/lib/libplatsbi.a)
+	$(call inst_file,$(install_root_dir)/$(install_lib_path)/opensbi/$(platform_subdir)/lib/libplatsbi.a,$(platform_build_dir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares
 install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a $(firmware-bins-path-y)
-	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-elfs-path-y))
-	$(call inst_file_list,$(install_dir),$(build_dir),platform/$(platform_subdir)/firmware,$(firmware-bins-path-y))
+	$(call inst_file_list,$(install_root_dir),$(build_dir),$(install_firmware_path)/$(platform_subdir)/firmware,$(firmware-elfs-path-y))
+	$(call inst_file_list,$(install_root_dir),$(build_dir),$(install_firmware_path)/$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
 .PHONY: install_docs
 install_docs: $(build_dir)/docs/latex/refman.pdf
-	$(call inst_file,$(install_dir)/docs/refman.pdf,$(build_dir)/docs/latex/refman.pdf)
+	$(call inst_file,$(install_root_dir)/$(install_docs_path)/refman.pdf,$(build_dir)/docs/latex/refman.pdf)
 
 # Rule for "make clean"
 .PHONY: clean
@@ -429,7 +456,7 @@ ifeq ($(build_dir),$(CURDIR)/build)
 	$(if $(V), @echo " RM        $(build_dir)")
 	$(CMD_PREFIX)rm -rf $(build_dir)
 endif
-ifeq ($(install_dir),$(CURDIR)/install)
-	$(if $(V), @echo " RM        $(install_dir)")
-	$(CMD_PREFIX)rm -rf $(install_dir)
+ifeq ($(install_root_dir),$(CURDIR)/install)
+	$(if $(V), @echo " RM        $(install_root_dir)")
+	$(CMD_PREFIX)rm -rf $(install_root_dir)
 endif

From e1a5b737ef1eab8b7ada2f091548355949341315 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?S=C3=B6ren=20Tempel?= <tempel@uni-bremen.de>
Date: Sun, 8 Mar 2020 10:35:32 +0530
Subject: [PATCH 0442/1765] platform: sifive: fu540: allow sv32 as an mmu-type
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

There has already been a commit to master which added 32-bit specific
fdt/payload addresses for the sifive/fu540 platform [0]. This commit
introduces another change for using sifive/fu540 as a 32-bit platform.
On 32-bit platforms, cores with the SV32 MMU type should not be
disabled. For this reason, this commit also allows using this MMU type
on the sifive/fu540 platform.

Alternatively it would also be possible to only allow SV39 and SV48 if
`__riscv_xlen == 64` and SV32 if `__riscv_xlen == 32`. Removing the
check entirely would also be an option.

[0]: 66fb729a1e46a9a46e809f3b7867fef91477e494

Signed-off-by: Sören Tempel <tempel@uni-bremen.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 platform/sifive/fu540/platform.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 48bcf54ed96..5f3d3ce0dfa 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -75,7 +75,8 @@ static void fu540_modify_dt(void *fdt)
 		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
 		cpu_offset = fdt_path_offset(fdt, cpu_node);
 		mmu_type   = fdt_getprop(fdt, cpu_offset, "mmu-type", NULL);
-		if (mmu_type && (!strcmp(mmu_type, "riscv,sv39") ||
+		if (mmu_type && (!strcmp(mmu_type, "riscv,sv32") ||
+				 !strcmp(mmu_type, "riscv,sv39") ||
 				 !strcmp(mmu_type, "riscv,sv48")))
 			continue;
 		else

From 8c83fb2fc8ef0c356f291a7e6517dad70a759981 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 13:15:17 +0530
Subject: [PATCH 0443/1765] lib: Fix return type of sbi_hsm_hart_started()

The return type of sbi_hsm_hart_started() should be bool.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_hsm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 36fafed18fe..250cc7c8a86 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -69,9 +69,8 @@ int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
 	return hstate;
 }
 
-int sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)
+bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)
 {
-
 	if (sbi_hsm_hart_get_state(scratch, hartid) == SBI_HART_STARTED)
 		return TRUE;
 	else

From 00d332bbe726d85e4c2b81ab0a08182612f96c03 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 11:08:35 +0530
Subject: [PATCH 0444/1765] include: Move bits related defines and macros to
 sbi_bitops.h

The right location for all bits related defines and macros is
sbi_bitops.h hence this patch. With this patch, the sbi_bits.h
is redundant so we remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h    |  2 --
 include/sbi/sbi_bitops.h   | 19 +++++++++++++++++--
 include/sbi/sbi_bits.h     | 19 -------------------
 lib/sbi/riscv_atomic.c     |  9 ++++-----
 lib/sbi/sbi_emulate_csr.c  |  2 +-
 lib/sbi/sbi_hart.c         |  2 +-
 lib/sbi/sbi_hsm.c          |  2 +-
 lib/sbi/sbi_illegal_insn.c |  2 +-
 lib/sbi/sbi_system.c       |  1 +
 lib/sbi/sbi_unpriv.c       |  2 +-
 10 files changed, 27 insertions(+), 33 deletions(-)
 delete mode 100644 include/sbi/sbi_bits.h

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index c3d5985ef33..63df3fc1866 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -38,7 +38,6 @@
 #define LGREG		__REG_SEL(3, 2)
 
 #if __SIZEOF_POINTER__ == 8
-#define BITS_PER_LONG		64
 #ifdef __ASSEMBLY__
 #define RISCV_PTR		.dword
 #define RISCV_SZPTR		8
@@ -49,7 +48,6 @@
 #define RISCV_LGPTR		"3"
 #endif
 #elif __SIZEOF_POINTER__ == 4
-#define BITS_PER_LONG		32
 #ifdef __ASSEMBLY__
 #define RISCV_PTR		.word
 #define RISCV_SZPTR		4
diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 9d992993477..10c29f178e1 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -10,8 +10,23 @@
 #ifndef __SBI_BITOPS_H__
 #define __SBI_BITOPS_H__
 
-#include <sbi/sbi_bits.h>
-#include <sbi/riscv_asm.h>
+#include <sbi/sbi_types.h>
+
+#if __SIZEOF_POINTER__ == 8
+#define BITS_PER_LONG		64
+#elif __SIZEOF_POINTER__ == 4
+#define BITS_PER_LONG		32
+#else
+#error "Unexpected __SIZEOF_POINTER__"
+#endif
+
+#define EXTRACT_FIELD(val, which) \
+	(((val) & (which)) / ((which) & ~((which)-1)))
+#define INSERT_FIELD(val, which, fieldval) \
+	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
+
+#define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
+#define BIT_WORD(nr)		((nr) / BITS_PER_LONG)
 
 /**
  * ffs - Find first bit set
diff --git a/include/sbi/sbi_bits.h b/include/sbi/sbi_bits.h
deleted file mode 100644
index 3963d84ecc2..00000000000
--- a/include/sbi/sbi_bits.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#ifndef __SBI_BITS_H__
-#define __SBI_BITS_H__
-
-#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
-#define INSERT_FIELD(val, which, fieldval) \
-	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
-
-#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
-#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
-#endif
diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 8b85801ddc2..9d8199e0048 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -7,11 +7,10 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/sbi_types.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
-#include <sbi/sbi_bits.h>
 
 long atomic_read(atomic_t *atom)
 {
@@ -209,12 +208,12 @@ unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 #endif
 }
 
-#if (BITS_PER_LONG == 64)
+#if (__SIZEOF_POINTER__ == 8)
 #define __AMO(op) "amo" #op ".d"
-#elif (BITS_PER_LONG == 32)
+#elif (__SIZEOF_POINTER__ == 4)
 #define __AMO(op) "amo" #op ".w"
 #else
-#error "Unexpected BITS_PER_LONG"
+#error "Unexpected __SIZEOF_POINTER__"
 #endif
 
 #define __atomic_op_bit_ord(op, mod, nr, addr, ord)                          \
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 0901ec103eb..dbb36cb92aa 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -9,7 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_bits.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 535fe19520d..bce2fb5ba7c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -12,7 +12,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_fp.h>
 #include <sbi/riscv_locks.h>
-#include <sbi/sbi_bits.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 250cc7c8a86..c1fd950bbb6 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -11,7 +11,7 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_atomic.h>
-#include <sbi/sbi_bits.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ecall_interface.h>
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index e3c7809acce..413123d3713 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -9,7 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_bits.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_illegal_insn.h>
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index c6aa36c61d9..68fad0fe212 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -8,6 +8,7 @@
  *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_platform.h>
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 07ef4a9badf..77ff2e9ebc3 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -8,7 +8,7 @@
  */
 
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_bits.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>

From a148996a7f9097a1f8e43cc62bd65972b008cad4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 11:48:31 +0530
Subject: [PATCH 0445/1765] include: sbi_bitops: More useful bit operations

This patch extends our bit operation library with mechanism to:
1. Iteratively traverse bits
2. Set bit
3. Clear bit
4. Change bit
5. ... other helpful functions ...

Most the above is adopted from Xvisor sources.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_bitops.h | 141 ++++++++++++++++++++++++++-
 lib/sbi/objects.mk       |   1 +
 lib/sbi/sbi_bitops.c     | 200 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 340 insertions(+), 2 deletions(-)
 create mode 100644 lib/sbi/sbi_bitops.c

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 10c29f178e1..c55ced04b3c 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -4,7 +4,7 @@
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  *
  * Authors:
- *   Atish Patra<atish.patra@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
  */
 
 #ifndef __SBI_BITOPS_H__
@@ -25,8 +25,16 @@
 #define INSERT_FIELD(val, which, fieldval) \
 	(((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
 
+#define BITS_TO_LONGS(nbits)	(((nbits) + BITS_PER_LONG - 1) / \
+				 BITS_PER_LONG)
+
+#define BIT(nr)			(1UL << (nr))
 #define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
-#define BIT_WORD(nr)		((nr) / BITS_PER_LONG)
+#define BIT_WORD(bit)		((bit) / BITS_PER_LONG)
+#define BIT_WORD_OFFSET(bit)	((bit) & (BITS_PER_LONG - 1))
+
+#define GENMASK(h, l) \
+	(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 
 /**
  * ffs - Find first bit set
@@ -184,4 +192,133 @@ static inline unsigned long __fls(unsigned long word)
 	return num;
 }
 
+#define for_each_set_bit(bit, addr, size) \
+	for ((bit) = find_first_bit((addr), (size));		\
+	     (bit) < (size);					\
+	     (bit) = find_next_bit((addr), (size), (bit) + 1))
+
+/* same as for_each_set_bit() but use bit as value to start with */
+#define for_each_set_bit_from(bit, addr, size) \
+	for ((bit) = find_next_bit((addr), (size), (bit));	\
+	     (bit) < (size);					\
+	     (bit) = find_next_bit((addr), (size), (bit) + 1))
+
+#define for_each_clear_bit(bit, addr, size) \
+	for ((bit) = find_first_zero_bit((addr), (size));	\
+	     (bit) < (size);					\
+	     (bit) = find_next_zero_bit((addr), (size), (bit) + 1))
+
+/* same as for_each_clear_bit() but use bit as value to start with */
+#define for_each_clear_bit_from(bit, addr, size) \
+	for ((bit) = find_next_zero_bit((addr), (size), (bit));	\
+	     (bit) < (size);					\
+	     (bit) = find_next_zero_bit((addr), (size), (bit) + 1))
+
+unsigned long find_first_bit(const unsigned long *addr,
+				    unsigned long size);
+
+unsigned long find_first_zero_bit(const unsigned long *addr,
+					 unsigned long size);
+
+unsigned long find_last_bit(const unsigned long *addr,
+				   unsigned long size);
+
+unsigned long find_next_bit(const unsigned long *addr,
+				   unsigned long size, unsigned long offset);
+
+unsigned long find_next_zero_bit(const unsigned long *addr,
+					unsigned long size,
+					unsigned long offset);
+
+/**
+ * __set_bit - Set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This function is non-atomic and may be reordered.
+ */
+static inline void __set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p  |= mask;
+}
+
+/**
+ * __clear_bit - Clear a bit in memory
+ * @nr: the bit to clear
+ * @addr: the address to start counting from
+ *
+ * This function is non-atomic and may be reordered.
+ */
+static inline void __clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p &= ~mask;
+}
+
+/**
+ * __change_bit - Toggle a bit in memory
+ * @nr: the bit to change
+ * @addr: the address to start counting from
+ *
+ * This function is non-atomic and may be reordered.
+ */
+static inline void __change_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p ^= mask;
+}
+
+/**
+ * __test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ */
+static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old = *p;
+
+	*p = old | mask;
+	return (old & mask) != 0;
+}
+
+/**
+ * __test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ */
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old = *p;
+
+	*p = old & ~mask;
+	return (old & mask) != 0;
+}
+
+/**
+ * __test_bit - Determine whether a bit is set
+ * @nr: bit number to test
+ * @addr: Address to start counting from
+ *
+ * This operation is non-atomic and can be reordered.
+ */
+static inline int __test_bit(int nr, const volatile unsigned long *addr)
+{
+	return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
+}
+
 #endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 39e929535ec..5c30d970001 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -12,6 +12,7 @@ libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
 
+libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_base.o
diff --git a/lib/sbi/sbi_bitops.c b/lib/sbi/sbi_bitops.c
new file mode 100644
index 00000000000..1355243a82d
--- /dev/null
+++ b/lib/sbi/sbi_bitops.c
@@ -0,0 +1,200 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_bitops.h>
+
+#define BITOP_WORD(nr)		((nr) / BITS_PER_LONG)
+
+/**
+ * find_first_bit - find the first set bit in a memory region
+ * @addr: The address to start the search at
+ * @size: The maximum size to search
+ *
+ * Returns the bit number of the first set bit.
+ */
+unsigned long find_first_bit(const unsigned long *addr,
+				    unsigned long size)
+{
+	const unsigned long *p = addr;
+	unsigned long result = 0;
+	unsigned long tmp;
+
+	while (size & ~(BITS_PER_LONG-1)) {
+		if ((tmp = *(p++)))
+			goto found;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+
+	tmp = (*p) & (~0UL >> (BITS_PER_LONG - size));
+	if (tmp == 0UL)		/* Are any bits set? */
+		return result + size;	/* Nope. */
+found:
+	return result + __ffs(tmp);
+}
+
+/**
+ * find_first_zero_bit - find the first cleared bit in a memory region
+ * @addr: The address to start the search at
+ * @size: The maximum size to search
+ *
+ * Returns the bit number of the first cleared bit.
+ */
+unsigned long find_first_zero_bit(const unsigned long *addr,
+					 unsigned long size)
+{
+	const unsigned long *p = addr;
+	unsigned long result = 0;
+	unsigned long tmp;
+
+	while (size & ~(BITS_PER_LONG-1)) {
+		if (~(tmp = *(p++)))
+			goto found;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+
+	tmp = (*p) | (~0UL << size);
+	if (tmp == ~0UL)	/* Are any bits zero? */
+		return result + size;	/* Nope. */
+found:
+	return result + ffz(tmp);
+}
+
+/**
+ * find_last_bit - find the last set bit in a memory region
+ * @addr: The address to start the search at
+ * @size: The maximum size to search
+ *
+ * Returns the bit number of the first set bit, or size.
+ */
+unsigned long find_last_bit(const unsigned long *addr,
+				   unsigned long size)
+{
+	unsigned long words;
+	unsigned long tmp;
+
+	/* Start at final word. */
+	words = size / BITS_PER_LONG;
+
+	/* Partial final word? */
+	if (size & (BITS_PER_LONG-1)) {
+		tmp = (addr[words] & (~0UL >> (BITS_PER_LONG
+					 - (size & (BITS_PER_LONG-1)))));
+		if (tmp)
+			goto found;
+	}
+
+	while (words) {
+		tmp = addr[--words];
+		if (tmp) {
+found:
+			return words * BITS_PER_LONG + __fls(tmp);
+		}
+	}
+
+	/* Not found */
+	return size;
+}
+
+/**
+ * find_next_bit - find the next set bit in a memory region
+ * @addr: The address to base the search on
+ * @offset: The bitnumber to start searching at
+ * @size: The bitmap size in bits
+ */
+unsigned long find_next_bit(const unsigned long *addr,
+				   unsigned long size, unsigned long offset)
+{
+	const unsigned long *p = addr + BITOP_WORD(offset);
+	unsigned long result = offset & ~(BITS_PER_LONG-1);
+	unsigned long tmp;
+
+	if (offset >= size)
+		return size;
+	size -= result;
+	offset %= BITS_PER_LONG;
+	if (offset) {
+		tmp = *(p++);
+		tmp &= (~0UL << offset);
+		if (size < BITS_PER_LONG)
+			goto found_first;
+		if (tmp)
+			goto found_middle;
+		size -= BITS_PER_LONG;
+		result += BITS_PER_LONG;
+	}
+	while (size & ~(BITS_PER_LONG-1)) {
+		if ((tmp = *(p++)))
+			goto found_middle;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+	tmp = *p;
+
+found_first:
+	tmp &= (~0UL >> (BITS_PER_LONG - size));
+	if (tmp == 0UL)		/* Are any bits set? */
+		return result + size;	/* Nope. */
+found_middle:
+	return result + __ffs(tmp);
+}
+
+/**
+ * find_next_zero_bit - find the next cleared bit in a memory region
+ * @addr: The address to base the search on
+ * @offset: The bitnumber to start searching at
+ * @size: The bitmap size in bits
+ */
+unsigned long find_next_zero_bit(const unsigned long *addr,
+					unsigned long size,
+					unsigned long offset)
+{
+	const unsigned long *p = addr + BITOP_WORD(offset);
+	unsigned long result = offset & ~(BITS_PER_LONG-1);
+	unsigned long tmp;
+
+	if (offset >= size)
+		return size;
+	size -= result;
+	offset %= BITS_PER_LONG;
+	if (offset) {
+		tmp = *(p++);
+		tmp |= ~0UL >> (BITS_PER_LONG - offset);
+		if (size < BITS_PER_LONG)
+			goto found_first;
+		if (~tmp)
+			goto found_middle;
+		size -= BITS_PER_LONG;
+		result += BITS_PER_LONG;
+	}
+	while (size & ~(BITS_PER_LONG-1)) {
+		if (~(tmp = *(p++)))
+			goto found_middle;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+	tmp = *p;
+
+found_first:
+	tmp |= ~0UL << size;
+	if (tmp == ~0UL)	/* Are any bits zero? */
+		return result + size;	/* Nope. */
+found_middle:
+	return result + ffz(tmp);
+}

From 4a603eb6dc44df61f8f5c60121fb33e2707a72bd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 14:10:03 +0530
Subject: [PATCH 0446/1765] platform: kendryte/k210: Set per-HART stack size to
 8KB

All platform except kendryte/k210 use 8KB of per-HART stack hence
this patch set per-HART stack size of kendryte/k210 to 8KB for
consistency.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/platform.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 0596a919df1..8e4664f5fb0 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -12,7 +12,7 @@
 #include <sbi/riscv_io.h>
 
 #define K210_HART_COUNT		2
-#define K210_HART_STACK_SIZE	4096
+#define K210_HART_STACK_SIZE	8192
 
 #define K210_UART_BAUDRATE	115200
 

From 678c3c3655158a42e4dd1e0d709b7071339312e4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 14:16:42 +0530
Subject: [PATCH 0447/1765] include: sbi_scratch: Set per-HART scratch size to
 4KB

Currently, the per-HART scratch size is 256 bytes on RV32 and
512 bytes on RV64. This patch set per-HART scratch size to 4KB
(4096 bytes) for both RV32 and RV64 so that we don't run-out
of scratch space anytime soon.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index d70c80d4ef7..030934983c3 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -36,8 +36,8 @@
 #define SBI_SCRATCH_OPTIONS_OFFSET		(9 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
 #define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(10 * __SIZEOF_POINTER__)
-/** Maximum size of sbi_scratch */
-#define SBI_SCRATCH_SIZE			(64 * __SIZEOF_POINTER__)
+/** Maximum size of sbi_scratch (4KB) */
+#define SBI_SCRATCH_SIZE			(0x1000)
 
 /* clang-format on */
 

From 2abc55bb3956a9ff0384b086158d242ea0d6414b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Mar 2020 19:17:57 -0700
Subject: [PATCH 0448/1765] lib: Sort build objects in alphabetical order

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/objects.mk          | 6 +++---
 lib/utils/libfdt/objects.mk | 4 ++--
 lib/utils/serial/objects.mk | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 5c30d970001..d2a3ebe4510 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -16,23 +16,23 @@ libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_base.o
+libsbi-objs-y += sbi_ecall_hsm.o
 libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_ecall_vendor.o
-libsbi-objs-y += sbi_ecall_hsm.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
-libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hart.o
+libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hsm.o
 libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
 libsbi-objs-y += sbi_misaligned_ldst.o
 libsbi-objs-y += sbi_scratch.o
+libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_system.o
 libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
-libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_unpriv.o
diff --git a/lib/utils/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
index a95c1bdf3d2..6e8149dcf53 100644
--- a/lib/utils/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -7,8 +7,8 @@
 #   Atish Patra<atish.patra@wdc.com>
 #
 
-libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \
-               fdt_empty_tree.o
+libfdt_files = fdt.o fdt_empty_tree.o fdt_ro.o fdt_rw.o fdt_strerror.o \
+               fdt_sw.o fdt_wip.o
 $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
 
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index d4f67556aa4..5b22031cfb5 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -7,5 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += serial/uart8250.o
 libsbiutils-objs-y += serial/sifive-uart.o
+libsbiutils-objs-y += serial/uart8250.o

From 6e87507db6ce7be39ccccb33d6283814f0283c09 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Mar 2020 19:17:58 -0700
Subject: [PATCH 0449/1765] platform: ae350: Sort build objects in alphabetical
 order

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/andes/ae350/objects.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
index 4ed152e7327..091d9e87f46 100644
--- a/platform/andes/ae350/objects.mk
+++ b/platform/andes/ae350/objects.mk
@@ -8,4 +8,4 @@
 #   Nylon Chen <nylon7@andestech.com>
 #
 
-platform-objs-y += plicsw.o plmt.o platform.o
+platform-objs-y += platform.o plicsw.o plmt.o

From 650c0e525ce60e80b6756aa8cc4eeae5b20ccbd8 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Mar 2020 20:52:41 -0700
Subject: [PATCH 0450/1765] lib: sbi: Fix coding style issues

This fixes various coding style issues found in the SBI codes.
No functional changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h           |  6 ++---
 include/sbi/sbi_bitops.h          | 14 +++++------
 include/sbi/sbi_const.h           |  7 +++---
 include/sbi/sbi_ecall_interface.h | 22 ++++++++--------
 include/sbi/sbi_error.h           | 32 +++++++++++------------
 include/sbi/sbi_hsm.h             |  2 +-
 include/sbi/sbi_ipi.h             | 21 +++++++++-------
 include/sbi/sbi_platform.h        | 17 +++++++------
 include/sbi/sbi_scratch.h         |  3 ++-
 include/sbi/sbi_types.h           |  3 ++-
 include/sbi/sbi_version.h         |  6 ++---
 lib/sbi/riscv_asm.c               |  2 +-
 lib/sbi/riscv_atomic.c            | 42 +++++++++++++++----------------
 lib/sbi/sbi_bitops.c              | 12 ++++-----
 lib/sbi/sbi_ecall.c               |  3 ++-
 lib/sbi/sbi_hart.c                |  4 +--
 lib/sbi/sbi_hsm.c                 | 14 +++++------
 lib/sbi/sbi_tlb.c                 |  4 +--
 lib/sbi/sbi_trap.c                |  2 +-
 19 files changed, 113 insertions(+), 103 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 63df3fc1866..4445fa16bfb 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -28,9 +28,9 @@
 #error "Unexpected __riscv_xlen"
 #endif
 
-#define PAGE_SHIFT      (12)
-#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
-#define PAGE_MASK       (~(PAGE_SIZE - 1))
+#define PAGE_SHIFT	(12)
+#define PAGE_SIZE	(_AC(1, UL) << PAGE_SHIFT)
+#define PAGE_MASK	(~(PAGE_SIZE - 1))
 
 #define REG_L		__REG_SEL(ld, lw)
 #define REG_S		__REG_SEL(sd, sw)
diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index c55ced04b3c..d920086789d 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -215,20 +215,20 @@ static inline unsigned long __fls(unsigned long word)
 	     (bit) = find_next_zero_bit((addr), (size), (bit) + 1))
 
 unsigned long find_first_bit(const unsigned long *addr,
-				    unsigned long size);
+			     unsigned long size);
 
 unsigned long find_first_zero_bit(const unsigned long *addr,
-					 unsigned long size);
+				  unsigned long size);
 
 unsigned long find_last_bit(const unsigned long *addr,
-				   unsigned long size);
+			    unsigned long size);
 
 unsigned long find_next_bit(const unsigned long *addr,
-				   unsigned long size, unsigned long offset);
+			    unsigned long size, unsigned long offset);
 
 unsigned long find_next_zero_bit(const unsigned long *addr,
-					unsigned long size,
-					unsigned long offset);
+				 unsigned long size,
+				 unsigned long offset);
 
 /**
  * __set_bit - Set a bit in memory
@@ -242,7 +242,7 @@ static inline void __set_bit(int nr, volatile unsigned long *addr)
 	unsigned long mask = BIT_MASK(nr);
 	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
 
-	*p  |= mask;
+	*p |= mask;
 }
 
 /**
diff --git a/include/sbi/sbi_const.h b/include/sbi/sbi_const.h
index 423d2cfa182..37866546a6d 100644
--- a/include/sbi/sbi_const.h
+++ b/include/sbi/sbi_const.h
@@ -10,7 +10,8 @@
 #ifndef __SBI_CONST_H__
 #define __SBI_CONST_H__
 
-/* Some constant macros are used in both assembler and
+/*
+ * Some constant macros are used in both assembler and
  * C code.  Therefore we cannot annotate them always with
  * 'UL' and other type specifiers unilaterally.  We
  * use the following macros to deal with this.
@@ -39,8 +40,8 @@
 #define UL(x)		(_UL(x))
 #define ULL(x)		(_ULL(x))
 
-#define	__STR(s)	#s
-#define	STRINGIFY(s)	__STR(s)
+#define __STR(s)	#s
+#define STRINGIFY(s)	__STR(s)
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 727a545471d..225dcd42b1c 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -31,11 +31,11 @@
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
 #define SBI_EXT_BASE_GET_IMP_ID			0x1
-#define	SBI_EXT_BASE_GET_IMP_VERSION		0x2
-#define	SBI_EXT_BASE_PROBE_EXT			0x3
-#define	SBI_EXT_BASE_GET_MVENDORID		0x4
-#define	SBI_EXT_BASE_GET_MARCHID		0x5
-#define	SBI_EXT_BASE_GET_MIMPID			0x6
+#define SBI_EXT_BASE_GET_IMP_VERSION		0x2
+#define SBI_EXT_BASE_PROBE_EXT			0x3
+#define SBI_EXT_BASE_GET_MVENDORID		0x4
+#define SBI_EXT_BASE_GET_MARCHID		0x5
+#define SBI_EXT_BASE_GET_MIMPID			0x6
 
 /* SBI function IDs for TIME extension*/
 #define SBI_EXT_TIME_SET_TIMER			0x0
@@ -44,7 +44,7 @@
 #define SBI_EXT_IPI_SEND_IPI			0x0
 
 /* SBI function IDs for RFENCE extension*/
-#define	SBI_EXT_RFENCE_REMOTE_FENCE_I		0x0
+#define SBI_EXT_RFENCE_REMOTE_FENCE_I		0x0
 #define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA	0x1
 #define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID	0x2
 #define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA	0x3
@@ -62,11 +62,11 @@
 #define SBI_HSM_HART_STATUS_START_PENDING	0x2
 #define SBI_HSM_HART_STATUS_STOP_PENDING	0x3
 
-#define SBI_SPEC_VERSION_MAJOR_OFFSET	24
-#define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
-#define SBI_SPEC_VERSION_MINOR_MASK	0xffffff
-#define SBI_EXT_VENDOR_START		0x09000000
-#define SBI_EXT_VENDOR_END		0x09FFFFFF
+#define SBI_SPEC_VERSION_MAJOR_OFFSET		24
+#define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
+#define SBI_SPEC_VERSION_MINOR_MASK		0xffffff
+#define SBI_EXT_VENDOR_START			0x09000000
+#define SBI_EXT_VENDOR_END			0x09FFFFFF
 /* clang-format on */
 
 #endif
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 91ba2eef44b..574a84d098f 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -12,22 +12,22 @@
 
 /* clang-format off */
 
-#define SBI_OK		0
-#define SBI_EFAIL	-1
-#define SBI_ENOTSUPP	-2
-#define SBI_EINVAL	-3
-#define SBI_DENIED	-4
-#define SBI_INVALID_ADDR -5
-#define SBI_ENODEV	-6
-#define SBI_ENOSYS	-7
-#define SBI_ETIMEDOUT	-8
-#define SBI_EIO		-9
-#define SBI_EILL	-10
-#define SBI_ENOSPC	-11
-#define SBI_ENOMEM	-12
-#define SBI_ETRAP	-13
-#define SBI_EUNKNOWN	-14
-#define SBI_ENOENT	-15
+#define SBI_OK			0
+#define SBI_EFAIL		-1
+#define SBI_ENOTSUPP		-2
+#define SBI_EINVAL		-3
+#define SBI_DENIED		-4
+#define SBI_INVALID_ADDR	-5
+#define SBI_ENODEV		-6
+#define SBI_ENOSYS		-7
+#define SBI_ETIMEDOUT		-8
+#define SBI_EIO			-9
+#define SBI_EILL		-10
+#define SBI_ENOSPC		-11
+#define SBI_ENOMEM		-12
+#define SBI_ETRAP		-13
+#define SBI_EUNKNOWN		-14
+#define SBI_ENOENT		-15
 #define SBI_EALREADY_STARTED	-16
 
 /* clang-format on */
diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 11ea7cfe2f3..a68eafbc637 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -22,7 +22,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
-			   ulong saddr, ulong priv);
+		       ulong saddr, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index d680148769d..bf91142ce00 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -25,23 +25,26 @@ struct sbi_ipi_event_ops {
 	/** Name of the IPI event operations */
 	char name[32];
 
-	/** Update callback to save/enqueue data for remote HART
-	 *  Note: This is an optional callback and it is called just before
-	 *  triggering IPI to remote HART.
+	/**
+	 * Update callback to save/enqueue data for remote HART
+	 * Note: This is an optional callback and it is called just before
+	 * triggering IPI to remote HART.
 	 */
 	int (* update)(struct sbi_scratch *scratch,
 			struct sbi_scratch *remote_scratch,
 			u32 remote_hartid, void *data);
 
-	/** Sync callback to wait for remote HART
-	 *  Note: This is an optional callback and it is called just after
-	 *  triggering IPI to remote HART.
+	/**
+	 * Sync callback to wait for remote HART
+	 * Note: This is an optional callback and it is called just after
+	 * triggering IPI to remote HART.
 	 */
 	void (* sync)(struct sbi_scratch *scratch);
 
-	/** Process callback to handle IPI event
-	 *  Note: This is a mandatory callback and it is called on the
-	 *  remote HART after IPI is triggered.
+	/**
+	 * Process callback to handle IPI event
+	 * Note: This is a mandatory callback and it is called on the
+	 * remote HART after IPI is triggered.
 	 */
 	void (* process)(struct sbi_scratch *scratch);
 };
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 462006e5e82..a28bc506c4d 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -10,9 +10,10 @@
 #ifndef __SBI_PLATFORM_H__
 #define __SBI_PLATFORM_H__
 
-/** OpenSBI 32-bit platform version with:
- *  1. upper 16-bits as major number
- *  2. lower 16-bits as minor number
+/**
+ * OpenSBI 32-bit platform version with:
+ * 1. upper 16-bits as major number
+ * 2. lower 16-bits as minor number
  */
 #define SBI_PLATFORM_VERSION(Major, Minor) ((Major << 16) | Minor)
 
@@ -81,12 +82,14 @@ struct sbi_platform_operations {
 	/** Platform final exit */
 	void (*final_exit)(void);
 
-	/** For platforms that do not implement misa, non-standard
+	/**
+	 * For platforms that do not implement misa, non-standard
 	 * methods are needed to determine cpu extension.
 	 */
 	int (*misa_check_extension)(char ext);
 
-	/** For platforms that do not implement misa, non-standard
+	/**
+	 * For platforms that do not implement misa, non-standard
 	 * methods are needed to get MXL field of misa.
 	 */
 	int (*misa_get_xlen)(void);
@@ -138,8 +141,8 @@ struct sbi_platform_operations {
 	/** Bringup the given hart from previous stage **/
 	int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
 	/**
-	 *  Stop the current hart from running. This call doesn't expect to
-	 *  return if success.
+	 * Stop the current hart from running. This call doesn't expect to
+	 * return if success.
 	 */
 	int (*hart_stop)(void);
 
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 030934983c3..1c85562b71a 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -85,7 +85,8 @@ enum sbi_scratch_options {
 #define sbi_scratch_thishart_arg1_ptr() \
 	((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
-/** Allocate from extra space in sbi_scratch
+/**
+ * Allocate from extra space in sbi_scratch
  *
  * @return zero on failure and non-zero (>= SBI_SCRATCH_EXTRA_SPACE_OFFSET)
  * on success
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index b1686bf312d..b59a6ff5a39 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -89,7 +89,8 @@ typedef unsigned long		physical_size_t;
 /* clang-format on */
 
 #else
-/* OPENSBI_EXTERNAL_SBI_TYPES could be defined in CFLAGS for using the
+/*
+ * OPENSBI_EXTERNAL_SBI_TYPES could be defined in CFLAGS for using the
  * external definitions of data types and common macros.
  * OPENSBI_EXTERNAL_SBI_TYPES is the file name to external header file,
  * the external build system should address the additional include
diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 62615a86d80..a71de3caf26 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -14,9 +14,9 @@
 #define OPENSBI_VERSION_MINOR 6
 
 /**
- *  OpenSBI 32-bit version with:
- *  1. upper 16-bits as major number
- *  2. lower 16-bits as minor number
+ * OpenSBI 32-bit version with:
+ * 1. upper 16-bits as major number
+ * 2. lower 16-bits as minor number
  */
 #define OPENSBI_VERSION ((OPENSBI_VERSION_MAJOR << 16) | \
 			 (OPENSBI_VERSION_MINOR))
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 7b612d4b1f3..79c45f5d22c 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -207,7 +207,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	if (n >= PMP_COUNT || log2len > __riscv_xlen || log2len < PMP_SHIFT)
 		return SBI_EINVAL;
 
-		/* calculate PMP register and offset */
+	/* calculate PMP register and offset */
 #if __riscv_xlen == 32
 	pmpcfg_csr   = CSR_PMPCFG0 + (n >> 2);
 	pmpcfg_shift = (n & 3) << 3;
diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 9d8199e0048..fcf3ed1fd01 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -49,7 +49,7 @@ long atomic_sub_return(atomic_t *atom, long value)
 	return ret - value;
 }
 
-#define __axchg(ptr, new, size)						\
+#define __axchg(ptr, new, size)							\
 	({									\
 		__typeof__(ptr) __ptr = (ptr);					\
 		__typeof__(new) __new = (new);					\
@@ -70,12 +70,12 @@ long atomic_sub_return(atomic_t *atom, long value)
 				: "memory");					\
 			break;							\
 		default:							\
-			break;						\
+			break;							\
 		}								\
 		__ret;								\
 	})
 
-#define axchg(ptr, x)							\
+#define axchg(ptr, x)								\
 	({									\
 		__typeof__(*(ptr)) _x_ = (x);					\
 		(__typeof__(*(ptr))) __axchg((ptr), _x_, sizeof(*(ptr)));	\
@@ -90,20 +90,20 @@ long atomic_sub_return(atomic_t *atom, long value)
 		register unsigned int __rc;                               \
 		switch (size) {                                           \
 		case 4:                                                   \
-			__asm__ __volatile__("0:	lr.w %0, %2\n"           \
-					     "	sc.w.rl %1, %z3, %2\n"     \
-					     "	bnez %1, 0b\n"             \
-					     "	fence rw, rw\n"            \
+			__asm__ __volatile__("0:	lr.w %0, %2\n"    \
+					     "	sc.w.rl %1, %z3, %2\n"    \
+					     "	bnez %1, 0b\n"            \
+					     "	fence rw, rw\n"           \
 					     : "=&r"(__ret), "=&r"(__rc), \
 					       "+A"(*__ptr)               \
 					     : "rJ"(__new)                \
 					     : "memory");                 \
 			break;                                            \
 		case 8:                                                   \
-			__asm__ __volatile__("0:	lr.d %0, %2\n"           \
-					     "	sc.d.rl %1, %z3, %2\n"     \
-					     "	bnez %1, 0b\n"             \
-					     "	fence rw, rw\n"            \
+			__asm__ __volatile__("0:	lr.d %0, %2\n"    \
+					     "	sc.d.rl %1, %z3, %2\n"    \
+					     "	bnez %1, 0b\n"            \
+					     "	fence rw, rw\n"           \
 					     : "=&r"(__ret), "=&r"(__rc), \
 					       "+A"(*__ptr)               \
 					     : "rJ"(__new)                \
@@ -130,11 +130,11 @@ long atomic_sub_return(atomic_t *atom, long value)
 		register unsigned int __rc;                               \
 		switch (size) {                                           \
 		case 4:                                                   \
-			__asm__ __volatile__("0:	lr.w %0, %2\n"           \
-					     "	bne  %0, %z3, 1f\n"        \
-					     "	sc.w.rl %1, %z4, %2\n"     \
-					     "	bnez %1, 0b\n"             \
-					     "	fence rw, rw\n"            \
+			__asm__ __volatile__("0:	lr.w %0, %2\n"    \
+					     "	bne  %0, %z3, 1f\n"       \
+					     "	sc.w.rl %1, %z4, %2\n"    \
+					     "	bnez %1, 0b\n"            \
+					     "	fence rw, rw\n"           \
 					     "1:\n"                       \
 					     : "=&r"(__ret), "=&r"(__rc), \
 					       "+A"(*__ptr)               \
@@ -142,11 +142,11 @@ long atomic_sub_return(atomic_t *atom, long value)
 					     : "memory");                 \
 			break;                                            \
 		case 8:                                                   \
-			__asm__ __volatile__("0:	lr.d %0, %2\n"           \
-					     "	bne %0, %z3, 1f\n"         \
-					     "	sc.d.rl %1, %z4, %2\n"     \
-					     "	bnez %1, 0b\n"             \
-					     "	fence rw, rw\n"            \
+			__asm__ __volatile__("0:	lr.d %0, %2\n"    \
+					     "	bne %0, %z3, 1f\n"        \
+					     "	sc.d.rl %1, %z4, %2\n"    \
+					     "	bnez %1, 0b\n"            \
+					     "	fence rw, rw\n"           \
 					     "1:\n"                       \
 					     : "=&r"(__ret), "=&r"(__rc), \
 					       "+A"(*__ptr)               \
diff --git a/lib/sbi/sbi_bitops.c b/lib/sbi/sbi_bitops.c
index 1355243a82d..de9d0457b34 100644
--- a/lib/sbi/sbi_bitops.c
+++ b/lib/sbi/sbi_bitops.c
@@ -20,7 +20,7 @@
  * Returns the bit number of the first set bit.
  */
 unsigned long find_first_bit(const unsigned long *addr,
-				    unsigned long size)
+			     unsigned long size)
 {
 	const unsigned long *p = addr;
 	unsigned long result = 0;
@@ -50,7 +50,7 @@ unsigned long find_first_bit(const unsigned long *addr,
  * Returns the bit number of the first cleared bit.
  */
 unsigned long find_first_zero_bit(const unsigned long *addr,
-					 unsigned long size)
+				  unsigned long size)
 {
 	const unsigned long *p = addr;
 	unsigned long result = 0;
@@ -80,7 +80,7 @@ unsigned long find_first_zero_bit(const unsigned long *addr,
  * Returns the bit number of the first set bit, or size.
  */
 unsigned long find_last_bit(const unsigned long *addr,
-				   unsigned long size)
+			    unsigned long size)
 {
 	unsigned long words;
 	unsigned long tmp;
@@ -115,7 +115,7 @@ unsigned long find_last_bit(const unsigned long *addr,
  * @size: The bitmap size in bits
  */
 unsigned long find_next_bit(const unsigned long *addr,
-				   unsigned long size, unsigned long offset)
+			    unsigned long size, unsigned long offset)
 {
 	const unsigned long *p = addr + BITOP_WORD(offset);
 	unsigned long result = offset & ~(BITS_PER_LONG-1);
@@ -160,8 +160,8 @@ unsigned long find_next_bit(const unsigned long *addr,
  * @size: The bitmap size in bits
  */
 unsigned long find_next_zero_bit(const unsigned long *addr,
-					unsigned long size,
-					unsigned long offset)
+				 unsigned long size,
+				 unsigned long offset)
 {
 	const unsigned long *p = addr + BITOP_WORD(offset);
 	unsigned long result = offset & ~(BITS_PER_LONG-1);
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 2383e4fd99f..6d7b15249b8 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -105,7 +105,8 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 		trap.epc = regs->mepc;
 		sbi_trap_redirect(regs, &trap, scratch);
 	} else {
-		/* This function should return non-zero value only in case of
+		/*
+		 * This function should return non-zero value only in case of
 		 * fatal error. However, there is no good way to distinguish
 		 * between a fatal and non-fatal errors yet. That's why we treat
 		 * every return value except ETRAP as non-fatal and just return
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index bce2fb5ba7c..c00e16a4449 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -75,7 +75,7 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 	unsigned long interrupts, exceptions;
 
 	if (!misa_extension('S'))
-		/* No delegation possible as mideleg does not exist*/
+		/* No delegation possible as mideleg does not exist */
 		return 0;
 
 	/* Send M-mode interrupts and most exceptions to S-mode */
@@ -342,7 +342,7 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	__builtin_unreachable();
 }
 
-static spinlock_t avail_hart_mask_lock	      = SPIN_LOCK_INITIALIZER;
+static spinlock_t avail_hart_mask_lock        = SPIN_LOCK_INITIALIZER;
 static volatile unsigned long avail_hart_mask = 0;
 
 void sbi_hart_mark_available(u32 hartid)
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index c1fd950bbb6..14a2d8450d6 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -81,7 +81,7 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 {
 	u32 oldstate;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
-							hart_data_offset);
+							    hart_data_offset);
 
 	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
 				       SBI_HART_STARTED);
@@ -94,7 +94,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	unsigned long saved_mie;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
-							hart_data_offset);
+							    hart_data_offset);
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
 
@@ -122,7 +122,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 	if (cold_boot) {
 		hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata),
-								    "HART_DATA");
+							    "HART_DATA");
 		if (!hart_data_offset)
 			return SBI_ENOMEM;
 		hart_count = sbi_platform_hart_count(plat);
@@ -147,7 +147,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 	u32 hstate;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
-							hart_data_offset);
+							    hart_data_offset);
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 
 	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
@@ -183,7 +183,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_scratch *rscratch = sbi_hart_id_to_scratch(scratch, hartid);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(rscratch,
-							hart_data_offset);
+							    hart_data_offset);
 
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return SBI_EINVAL;
@@ -225,14 +225,14 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	u32 hartid = sbi_current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
-							hart_data_offset);
+							    hart_data_offset);
 
 	if (sbi_platform_hart_disabled(plat, hartid) ||
 	    !sbi_hsm_hart_started(scratch, hartid))
 		return SBI_EINVAL;
 
 	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
-				     SBI_HART_STOPPING);
+				       SBI_HART_STOPPING);
 	if (oldstate != SBI_HART_STARTED) {
 		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
 			   __func__, oldstate);
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 072915f848e..21e243650bb 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -392,11 +392,11 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 
 	if (cold_boot) {
 		tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync),
-							    "IPI_TLB_SYNC");
+							"IPI_TLB_SYNC");
 		if (!tlb_sync_off)
 			return SBI_ENOMEM;
 		tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*tlb_q),
-							    "IPI_TLB_FIFO");
+							"IPI_TLB_FIFO");
 		if (!tlb_fifo_off) {
 			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index d5ab24b10ab..b5fbc5ea1ee 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -178,7 +178,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		regs->mstatus &= ~MSTATUS_MPP;
 		regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
 
-		/* Set SPP for S-mode*/
+		/* Set SPP for S-mode */
 		regs->mstatus &= ~MSTATUS_SPP;
 		if (prev_mode == PRV_S)
 			regs->mstatus |= (1UL << MSTATUS_SPP_SHIFT);

From 078686d75c929af72971bb51115438e3a2826896 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 8 Mar 2020 20:52:42 -0700
Subject: [PATCH 0451/1765] lib: serial: Fix coding style issues

This fixes various coding style issues found in the serial codes.
No functional changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/serial/sifive-uart.c |  2 +-
 lib/utils/serial/uart8250.c    | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index fd6f28dd917..b82a1b380b5 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -48,7 +48,7 @@ static inline unsigned int uart_min_clk_divisor(uint64_t in_freq,
 						uint64_t max_target_hz)
 {
 	uint64_t quotient = (in_freq + max_target_hz - 1) / (max_target_hz);
-	// Avoid underflow
+	/* Avoid underflow */
 	if (quotient == 0) {
 		return 0;
 	} else {
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index eace0619acf..42f18816166 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -26,15 +26,15 @@
 #define UART_SCR_OFFSET		7	/* I/O: Scratch Register */
 #define UART_MDR1_OFFSET	8	/* I/O:  Mode Register */
 
-#define UART_LSR_FIFOE		0x80    /* Fifo error */
-#define UART_LSR_TEMT		0x40    /* Transmitter empty */
-#define UART_LSR_THRE		0x20    /* Transmit-hold-register empty */
-#define UART_LSR_BI		0x10    /* Break interrupt indicator */
-#define UART_LSR_FE		0x08    /* Frame error indicator */
-#define UART_LSR_PE		0x04    /* Parity error indicator */
-#define UART_LSR_OE		0x02    /* Overrun error indicator */
-#define UART_LSR_DR		0x01    /* Receiver data ready */
-#define UART_LSR_BRK_ERROR_BITS	0x1E    /* BI, FE, PE, OE bits */
+#define UART_LSR_FIFOE		0x80	/* Fifo error */
+#define UART_LSR_TEMT		0x40	/* Transmitter empty */
+#define UART_LSR_THRE		0x20	/* Transmit-hold-register empty */
+#define UART_LSR_BI		0x10	/* Break interrupt indicator */
+#define UART_LSR_FE		0x08	/* Frame error indicator */
+#define UART_LSR_PE		0x04	/* Parity error indicator */
+#define UART_LSR_OE		0x02	/* Overrun error indicator */
+#define UART_LSR_DR		0x01	/* Receiver data ready */
+#define UART_LSR_BRK_ERROR_BITS	0x1E	/* BI, FE, PE, OE bits */
 
 /* clang-format on */
 
@@ -88,7 +88,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 {
 	u16 bdiv;
 
-	uart8250_base	   = (volatile void *)base;
+	uart8250_base      = (volatile void *)base;
 	uart8250_reg_shift = reg_shift;
 	uart8250_reg_width = reg_width;
 	uart8250_in_freq   = in_freq;

From 3226bd93ce41ed0c815a9021f5e489cfe3e83fa3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 12:29:15 +0530
Subject: [PATCH 0452/1765] lib: Simple bitmap library

We add simple bitmap library which will help us create and maintain
bitmaps. It will also help us create a simple HART mask library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_bitmap.h | 128 +++++++++++++++++++++++++++++++++++++++
 lib/sbi/objects.mk       |   1 +
 lib/sbi/sbi_bitmap.c     |  40 ++++++++++++
 3 files changed, 169 insertions(+)
 create mode 100644 include/sbi/sbi_bitmap.h
 create mode 100644 lib/sbi/sbi_bitmap.c

diff --git a/include/sbi/sbi_bitmap.h b/include/sbi/sbi_bitmap.h
new file mode 100644
index 00000000000..4f0ebb63a69
--- /dev/null
+++ b/include/sbi/sbi_bitmap.h
@@ -0,0 +1,128 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_BITMAP_H__
+#define __SBI_BITMAP_H__
+
+#include <sbi/sbi_bitops.h>
+
+#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) % BITS_PER_LONG))
+#define BITMAP_LAST_WORD_MASK(nbits)					\
+(									\
+	((nbits) % BITS_PER_LONG) ?					\
+		((1UL << ((nbits) % BITS_PER_LONG)) - 1) : ~0UL		\
+)
+
+#define small_const_nbits(nbits) \
+	(__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
+
+#define DECLARE_BITMAP(name, nbits)	unsigned long name[BITS_TO_LONGS(nbits)]
+#define DEFINE_BITMAP(name)		extern unsigned long name[]
+
+static inline unsigned long bitmap_estimate_size(int nbits)
+{
+	return (BITS_TO_LONGS(nbits) * sizeof(unsigned long));
+}
+
+void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
+		  const unsigned long *bitmap2, int bits);
+void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
+		 const unsigned long *bitmap2, int bits);
+void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1,
+		  const unsigned long *bitmap2, int bits);
+
+static inline void bitmap_set(unsigned long *bmap, int start, int len)
+{
+	int bit;
+	for (bit = start; bit < (start + len); bit++)
+		bmap[BIT_WORD(bit)] |= (0x1UL << BIT_WORD_OFFSET(bit));
+}
+
+static inline void bitmap_clear(unsigned long *bmap, int start, int len)
+{
+	int bit;
+	for (bit = start; bit < (start + len); bit++)
+		bmap[BIT_WORD(bit)] &= ~(0x1UL << BIT_WORD_OFFSET(bit));
+}
+
+static inline void bitmap_zero(unsigned long *dst, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = 0UL;
+	else {
+		size_t i, len = BITS_TO_LONGS(nbits);
+		for (i = 0; i < len; i++)
+			dst[i] = 0;
+	}
+}
+
+static inline void bitmap_zero_except(unsigned long *dst,
+				      int exception, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = 0UL;
+	else {
+		size_t i, len = BITS_TO_LONGS(nbits);
+		for (i = 0; i < len; i++)
+			dst[i] = 0;
+	}
+	if (exception < nbits)
+		__set_bit(exception, dst);
+}
+
+static inline void bitmap_fill(unsigned long *dst, int nbits)
+{
+	size_t i, nlongs = BITS_TO_LONGS(nbits);
+	if (!small_const_nbits(nbits)) {
+		for (i = 0; i < (nlongs - 1); i++)
+			dst[i] = -1UL;
+	}
+	dst[nlongs - 1] = BITMAP_LAST_WORD_MASK(nbits);
+}
+
+static inline void bitmap_copy(unsigned long *dst,
+			       const unsigned long *src, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = *src;
+	else {
+		size_t i, len = BITS_TO_LONGS(nbits);
+		for (i = 0; i < len; i++)
+			dst[i] = src[i];
+	}
+}
+
+static inline void bitmap_and(unsigned long *dst, const unsigned long *src1,
+			      const unsigned long *src2, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = *src1 & *src2;
+	else
+		__bitmap_and(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_or(unsigned long *dst, const unsigned long *src1,
+			     const unsigned long *src2, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = *src1 | *src2;
+	else
+		__bitmap_or(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1,
+			      const unsigned long *src2, int nbits)
+{
+	if (small_const_nbits(nbits))
+		*dst = *src1 ^ *src2;
+	else
+		__bitmap_xor(dst, src1, src2, nbits);
+}
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index d2a3ebe4510..5f1bdbfb181 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -12,6 +12,7 @@ libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
 
+libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_ecall.o
diff --git a/lib/sbi/sbi_bitmap.c b/lib/sbi/sbi_bitmap.c
new file mode 100644
index 00000000000..e74b6bbecfd
--- /dev/null
+++ b/lib/sbi/sbi_bitmap.c
@@ -0,0 +1,40 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_bitmap.h>
+
+void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
+		  const unsigned long *bitmap2, int bits)
+{
+	int k;
+	int nr = BITS_TO_LONGS(bits);
+
+	for (k = 0; k < nr; k++)
+		dst[k] = bitmap1[k] & bitmap2[k];
+}
+
+void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
+		 const unsigned long *bitmap2, int bits)
+{
+	int k;
+	int nr = BITS_TO_LONGS(bits);
+
+	for (k = 0; k < nr; k++)
+		dst[k] = bitmap1[k] | bitmap2[k];
+}
+
+void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1,
+		  const unsigned long *bitmap2, int bits)
+{
+	int k;
+	int nr = BITS_TO_LONGS(bits);
+
+	for (k = 0; k < nr; k++)
+		dst[k] = bitmap1[k] ^ bitmap2[k];
+}

From c741abcd40a843007007741984fb87ed561dfa90 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 13:58:22 +0530
Subject: [PATCH 0453/1765] include: Simple hartmask library

We add a simple hartmask library to create and maintain HART mask
in different parts of OpenSBI sources. This new library is build
as wrapper library on-top-of bitmap library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hartmask.h | 141 +++++++++++++++++++++++++++++++++++++
 1 file changed, 141 insertions(+)
 create mode 100644 include/sbi/sbi_hartmask.h

diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h
new file mode 100644
index 00000000000..77e42cb9f2d
--- /dev/null
+++ b/include/sbi/sbi_hartmask.h
@@ -0,0 +1,141 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_HARTMASK_H__
+#define __SBI_HARTMASK_H__
+
+#include <sbi/sbi_bitmap.h>
+
+/**
+ * Maximum number of bits in a hartmask
+ *
+ * The hartmask is indexed using physical HART id so this define
+ * also represents the maximum number of HART ids generic OpenSBI
+ * can handle.
+ */
+#define SBI_HARTMASK_MAX_BITS		128
+
+/** Representation of hartmask */
+struct sbi_hartmask {
+	DECLARE_BITMAP(bits, SBI_HARTMASK_MAX_BITS);
+};
+
+/** Initialize hartmask to zero */
+#define SBI_HARTMASK_INIT(__m)		\
+	bitmap_zero(((__m)->bits), SBI_HARTMASK_MAX_BITS)
+
+/** Initialize hartmask to zero except a particular HART id */
+#define SBI_HARTMASK_INIT_EXCEPT(__m, __h)	\
+	bitmap_zero_except(((__m)->bits), (__h), SBI_HARTMASK_MAX_BITS)
+
+/**
+ * Get underlying bitmap of hartmask
+ * @param m the hartmask pointer
+ */
+#define sbi_hartmask_bits(__m)		((__m)->bits)
+
+/**
+ * Set a HART in hartmask
+ * @param h HART id to set
+ * @param m the hartmask pointer
+ */
+static inline void sbi_hartmask_set_hart(u32 h, struct sbi_hartmask *m)
+{
+	if (h < SBI_HARTMASK_MAX_BITS)
+		__set_bit(h, m->bits);
+}
+
+/**
+ * Clear a HART in hartmask
+ * @param h HART id to clear
+ * @param m the hartmask pointer
+ */
+static inline void sbi_hartmask_clear_hart(u32 h, struct sbi_hartmask *m)
+{
+	if (h < SBI_HARTMASK_MAX_BITS)
+		__clear_bit(h, m->bits);
+}
+
+/**
+ * Test a HART in hartmask
+ * @param h HART id to test
+ * @param m the hartmask pointer
+ */
+static inline int sbi_hartmask_test_hart(u32 h, struct sbi_hartmask *m)
+{
+	if (h < SBI_HARTMASK_MAX_BITS)
+		return __test_bit(h, m->bits);
+	return 0;
+}
+
+/**
+ * Set all HARTs in a hartmask
+ * @param dstp the hartmask pointer
+ */
+static inline void sbi_hartmask_set_all(struct sbi_hartmask *dstp)
+{
+	bitmap_fill(sbi_hartmask_bits(dstp), SBI_HARTMASK_MAX_BITS);
+}
+
+/**
+ * Clear all HARTs in a hartmask
+ * @param dstp the hartmask pointer
+ */
+static inline void sbi_hartmask_clear_all(struct sbi_hartmask *dstp)
+{
+	bitmap_zero(sbi_hartmask_bits(dstp), SBI_HARTMASK_MAX_BITS);
+}
+
+/**
+ * *dstp = *src1p & *src2p
+ * @param dstp the hartmask result
+ * @param src1p the first input
+ * @param src2p the second input
+ */
+static inline void sbi_hartmask_and(struct sbi_hartmask *dstp,
+				    const struct sbi_hartmask *src1p,
+				    const struct sbi_hartmask *src2p)
+{
+	bitmap_and(sbi_hartmask_bits(dstp), sbi_hartmask_bits(src1p),
+		   sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
+}
+
+/**
+ * *dstp = *src1p | *src2p
+ * @param dstp the hartmask result
+ * @param src1p the first input
+ * @param src2p the second input
+ */
+static inline void sbi_hartmask_or(struct sbi_hartmask *dstp,
+				   const struct sbi_hartmask *src1p,
+				   const struct sbi_hartmask *src2p)
+{
+	bitmap_or(sbi_hartmask_bits(dstp), sbi_hartmask_bits(src1p),
+		  sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
+}
+
+/**
+ * *dstp = *src1p ^ *src2p
+ * @param dstp the hartmask result
+ * @param src1p the first input
+ * @param src2p the second input
+ */
+static inline void sbi_hartmask_xor(struct sbi_hartmask *dstp,
+				    const struct sbi_hartmask *src1p,
+				    const struct sbi_hartmask *src2p)
+{
+	bitmap_xor(sbi_hartmask_bits(dstp), sbi_hartmask_bits(src1p),
+		   sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
+}
+
+/** Iterate over each HART in hartmask */
+#define sbi_hartmask_for_each_hart(__h, __m)	\
+	for_each_set_bit(__h, (__m)->bits, SBI_HARTMASK_MAX_BITS)
+
+#endif

From d6d7e18d1d12c8eda2591f21a70d31dd95c2d32e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 14:30:49 +0530
Subject: [PATCH 0454/1765] lib: sbi_init: Don't allow HARTID greater than
 SBI_HARTMASK_MAX_BITS

We only allow HARTs with HARTID less than SBI_HARTMASK_MAX_BITS in
sbi_init() function so that sbi_hartmask can safely used across
OpenSBI sources.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 1f113b9b7b0..9a9e4335c6d 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
@@ -215,7 +216,8 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	u32 hartid			= sbi_current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (sbi_platform_hart_disabled(plat, hartid))
+	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
+	    sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 
 	if (atomic_add_return(&coldboot_lottery, 1) == 1)

From a4a6a81b7d69b39f4d806e96e6b54a9e0e36d3f3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 3 Mar 2020 19:41:09 +0530
Subject: [PATCH 0455/1765] lib: Introduce SBI_TLB_INFO_INIT() helper macro

We introduce SBI_TLB_INFO_INIT() helper macro to help easy
initialization of struct sbi_tlb_info which is passed to the
sbi_tlb_request() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_tlb.h       | 11 ++++++++-
 lib/sbi/sbi_ecall_legacy.c  | 28 ++++++++++------------
 lib/sbi/sbi_ecall_replace.c | 46 +++++++++++--------------------------
 3 files changed, 36 insertions(+), 49 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index eb3d925b7f1..3d52636fc8e 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -41,7 +41,16 @@ struct sbi_tlb_info {
 	unsigned long shart_mask;
 };
 
-#define SBI_TLB_INFO_SIZE			sizeof(struct sbi_tlb_info)
+#define SBI_TLB_INFO_INIT(__ptr, __start, __size, __asid, __type, __src_hart) \
+do { \
+	(__ptr)->start = (__start); \
+	(__ptr)->size = (__size); \
+	(__ptr)->asid = (__asid); \
+	(__ptr)->type = (__type); \
+	(__ptr)->shart_mask = 1UL << (__src_hart); \
+} while (0)
+
+#define SBI_TLB_INFO_SIZE		sizeof(struct sbi_tlb_info)
 
 int sbi_tlb_request(struct sbi_scratch *scratch, ulong hmask,
 		    ulong hbase, struct sbi_tlb_info *tinfo);
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 1150d7a452f..8995af4422c 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -72,35 +72,31 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
 			ret = sbi_ipi_send_smode(scratch, hmask, 0);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
-		tlb_info.start  = 0;
-		tlb_info.size  = 0;
-		tlb_info.type  = SBI_ITLB_FLUSH;
-		tlb_info.shart_mask = 1UL << source_hart;
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
+		if (ret != SBI_ETRAP) {
+			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
+					  SBI_ITLB_FLUSH, source_hart);
 			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		tlb_info.start = (unsigned long)args[1];
-		tlb_info.size  = (unsigned long)args[2];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA;
-		tlb_info.shart_mask = 1UL << source_hart;
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
+		if (ret != SBI_ETRAP) {
+			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0,
+					  SBI_TLB_FLUSH_VMA, source_hart);
 			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		tlb_info.start = (unsigned long)args[1];
-		tlb_info.size  = (unsigned long)args[2];
-		tlb_info.asid  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
 		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
 						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
+		if (ret != SBI_ETRAP) {
+			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],
+					  SBI_TLB_FLUSH_VMA_ASID, source_hart);
 			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
 		sbi_system_shutdown(scratch, 0);
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 7728d601cb5..57760f86d0b 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -59,58 +59,40 @@ static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
 
 	switch (funcid) {
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
-		tlb_info.start  = 0;
-		tlb_info.size  = 0;
-		tlb_info.type  = SBI_ITLB_FLUSH;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
+				  SBI_ITLB_FLUSH, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_GVMA;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+				  SBI_TLB_FLUSH_GVMA, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_GVMA_VMID;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+				  SBI_TLB_FLUSH_GVMA_VMID, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VVMA;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+				  SBI_TLB_FLUSH_VVMA, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_VVMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+				  SBI_TLB_FLUSH_VVMA_ASID, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+				  SBI_TLB_FLUSH_VMA, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
-		tlb_info.start = (unsigned long)args[2];
-		tlb_info.size  = (unsigned long)args[3];
-		tlb_info.asid  = (unsigned long)args[4];
-		tlb_info.type  = SBI_TLB_FLUSH_VMA_ASID;
-		tlb_info.shart_mask = 1UL << source_hart;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+				  SBI_TLB_FLUSH_VMA_ASID, source_hart);
 		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
 		break;
-
 	default:
 		ret = SBI_ENOTSUPP;
 	};

From d96316481dbc9a52e7e97c4cef70957507c2845f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 14:21:42 +0530
Subject: [PATCH 0456/1765] lib: sbi_tlb: Use sbi_hartmask in sbi_tlb_info

Instead of using single ulong as source mask for sbi_tlb_info,
we use sbi_hartmask. This way sbi_tlb_info can easily scale
for large number of HARTs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_tlb.h |  5 +++--
 lib/sbi/sbi_tlb.c     | 17 +++++++----------
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 3d52636fc8e..67c39000e6d 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -12,6 +12,7 @@
 #define __SBI_TLB_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_hartmask.h>
 
 /* clang-format off */
 
@@ -38,7 +39,7 @@ struct sbi_tlb_info {
 	unsigned long size;
 	unsigned long asid;
 	unsigned long type;
-	unsigned long shart_mask;
+	struct sbi_hartmask smask;
 };
 
 #define SBI_TLB_INFO_INIT(__ptr, __start, __size, __asid, __type, __src_hart) \
@@ -47,7 +48,7 @@ do { \
 	(__ptr)->size = (__size); \
 	(__ptr)->asid = (__asid); \
 	(__ptr)->type = (__type); \
-	(__ptr)->shart_mask = 1UL << (__src_hart); \
+	SBI_HARTMASK_INIT_EXCEPT(&(__ptr)->smask, (__src_hart)); \
 } while (0)
 
 #define SBI_TLB_INFO_SIZE		sizeof(struct sbi_tlb_info)
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 21e243650bb..3cae7eec81d 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -190,17 +190,14 @@ static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
 static void sbi_tlb_entry_process(struct sbi_scratch *scratch,
 				  struct sbi_tlb_info *tinfo)
 {
-	u32 i;
-	u64 m;
+	u32 rhartid;
 	struct sbi_scratch *rscratch = NULL;
 	unsigned long *rtlb_sync = NULL;
 
 	sbi_tlb_local_flush(tinfo);
-	for (i = 0, m = tinfo->shart_mask; m; i++, m >>= 1) {
-		if (!(m & 1UL))
-			continue;
 
-		rscratch = sbi_hart_id_to_scratch(scratch, i);
+	sbi_hartmask_for_each_hart(rhartid, &tinfo->smask) {
+		rscratch = sbi_hart_id_to_scratch(scratch, rhartid);
 		rtlb_sync = sbi_scratch_offset_ptr(rscratch, tlb_sync_off);
 		while (atomic_raw_xchg_ulong(rtlb_sync, 1)) ;
 	}
@@ -263,11 +260,11 @@ static inline int __sbi_tlb_range_check(struct sbi_tlb_info *curr,
 	if (next->start <= curr->start && next_end > curr_end) {
 		curr->start = next->start;
 		curr->size  = next->size;
-		curr->shart_mask = curr->shart_mask | next->shart_mask;
-		ret	    = SBI_FIFO_UPDATED;
+		sbi_hartmask_or(&curr->smask, &curr->smask, &next->smask);
+		ret = SBI_FIFO_UPDATED;
 	} else if (next->start >= curr->start && next_end <= curr_end) {
-		curr->shart_mask = curr->shart_mask | next->shart_mask;
-		ret		 = SBI_FIFO_SKIP;
+		sbi_hartmask_or(&curr->smask, &curr->smask, &next->smask);
+		ret = SBI_FIFO_SKIP;
 	}
 
 	return ret;

From 71d2b837c46e7528ab03bd6489fec86100681f22 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:50:01 +0530
Subject: [PATCH 0457/1765] lib: Move all coldboot wait APIs to sbi_init.c

The coldboot wait APIs are only used by sbi_init.c so no point in
having coldboot related code in sbi_hart.c.

As per-above rationale, we move all coldboot wait related APIs to
sbi_init.c as static/local functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_hart.h |  4 ---
 lib/sbi/sbi_hart.c     | 70 ----------------------------------------
 lib/sbi/sbi_init.c     | 72 ++++++++++++++++++++++++++++++++++++++++--
 3 files changed, 70 insertions(+), 76 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index d88c7de2f0e..2ec614dbed1 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -41,10 +41,6 @@ void sbi_hart_unmark_available(u32 hartid);
 struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 					   u32 hartid);
 
-void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid);
-
-void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid);
-
 u32 sbi_current_hartid(void);
 
 #endif
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c00e16a4449..9017db18369 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -377,73 +377,3 @@ struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 {
 	return ((h2s)scratch->hartid_to_scratch)(hartid);
 }
-
-#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
-static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
-static unsigned long coldboot_done = 0;
-static unsigned long coldboot_wait_bitmap = 0;
-
-void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
-{
-	unsigned long saved_mie, cmip;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-
-	if ((sbi_platform_hart_count(plat) <= hartid) ||
-	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
-		sbi_hart_hang();
-
-	/* Save MIE CSR */
-	saved_mie = csr_read(CSR_MIE);
-
-	/* Set MSIE bit to receive IPI */
-	csr_set(CSR_MIE, MIP_MSIP);
-
-	/* Acquire coldboot lock */
-	spin_lock(&coldboot_lock);
-
-	/* Mark current HART as waiting */
-	coldboot_wait_bitmap |= (1UL << hartid);
-
-	/* Wait for coldboot to finish using WFI */
-	while (!coldboot_done) {
-		spin_unlock(&coldboot_lock);
-		do {
-			wfi();
-			cmip = csr_read(CSR_MIP);
-		} while (!(cmip & MIP_MSIP));
-		spin_lock(&coldboot_lock);
-	};
-
-	/* Unmark current HART as waiting */
-	coldboot_wait_bitmap &= ~(1UL << hartid);
-
-	/* Release coldboot lock */
-	spin_unlock(&coldboot_lock);
-
-	/* Restore MIE CSR */
-	csr_write(CSR_MIE, saved_mie);
-
-	/* Clear current HART IPI */
-	sbi_platform_ipi_clear(plat, hartid);
-}
-
-void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
-{
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int max_hart			= sbi_platform_hart_count(plat);
-
-	/* Acquire coldboot lock */
-	spin_lock(&coldboot_lock);
-
-	/* Mark coldboot done */
-	coldboot_done = 1;
-
-	/* Send an IPI to all HARTs waiting for coldboot */
-	for (int i = 0; i < max_hart; i++) {
-		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
-			sbi_platform_ipi_send(plat, i);
-	}
-
-	/* Release coldboot lock */
-	spin_unlock(&coldboot_lock);
-}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 9a9e4335c6d..5179c0087e1 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
+#include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
@@ -74,6 +75,73 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_pmp_dump(scratch);
 }
 
+#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
+static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
+static unsigned long coldboot_done = 0;
+static unsigned long coldboot_wait_bitmap = 0;
+
+static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
+{
+	unsigned long saved_mie;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if ((sbi_platform_hart_count(plat) <= hartid) ||
+	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
+		sbi_hart_hang();
+
+	/* Save MIE CSR */
+	saved_mie = csr_read(CSR_MIE);
+
+	/* Set MSIE bit to receive IPI */
+	csr_set(CSR_MIE, MIP_MSIP);
+
+	/* Acquire coldboot lock */
+	spin_lock(&coldboot_lock);
+
+	/* Mark current HART as waiting */
+	coldboot_wait_bitmap |= (1UL << hartid);
+
+	/* Wait for coldboot to finish using WFI */
+	while (!coldboot_done) {
+		spin_unlock(&coldboot_lock);
+		wfi();
+		spin_lock(&coldboot_lock);
+	};
+
+	/* Unmark current HART as waiting */
+	coldboot_wait_bitmap &= ~(1UL << hartid);
+
+	/* Release coldboot lock */
+	spin_unlock(&coldboot_lock);
+
+	/* Restore MIE CSR */
+	csr_write(CSR_MIE, saved_mie);
+
+	/* Clear current HART IPI */
+	sbi_platform_ipi_clear(plat, hartid);
+}
+
+static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
+{
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	int max_hart			= sbi_platform_hart_count(plat);
+
+	/* Acquire coldboot lock */
+	spin_lock(&coldboot_lock);
+
+	/* Mark coldboot done */
+	coldboot_done = 1;
+
+	/* Send an IPI to all HARTs waiting for coldboot */
+	for (int i = 0; i < max_hart; i++) {
+		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
+			sbi_platform_ipi_send(plat, i);
+	}
+
+	/* Release coldboot lock */
+	spin_unlock(&coldboot_lock);
+}
+
 static unsigned long init_count_offset;
 
 static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
@@ -130,7 +198,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!(scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS))
 		sbi_boot_prints(scratch, hartid);
 
-	sbi_hart_wake_coldboot_harts(scratch, hartid);
+	wake_coldboot_harts(scratch, hartid);
 
 	sbi_hart_mark_available(hartid);
 
@@ -148,7 +216,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	unsigned long *init_count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	sbi_hart_wait_for_coldboot(scratch, hartid);
+	wait_for_coldboot(scratch, hartid);
 
 	if (!init_count_offset)
 		sbi_hart_hang();

From 2b945fc180026d8eef701226a9bf0a82976c71c1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Mar 2020 17:30:21 +0530
Subject: [PATCH 0458/1765] lib: sbi_init: Use hartmask for coldboot wait

The coldboot_wait_bitmap is of fixed size and has __riscv_xlen
bits. This limits us to scale beyond __riscv_xlen HARTs hence
we replace coldboot_wait_bitmap with coldboot_wait_hmask which
is of type struct sbi_hartmask.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 5179c0087e1..bfc59e42642 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -75,20 +75,15 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_pmp_dump(scratch);
 }
 
-#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
 static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
 static unsigned long coldboot_done = 0;
-static unsigned long coldboot_wait_bitmap = 0;
+static struct sbi_hartmask coldboot_wait_hmask = { 0 };
 
 static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long saved_mie;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if ((sbi_platform_hart_count(plat) <= hartid) ||
-	    (COLDBOOT_WAIT_BITMAP_SIZE <= hartid))
-		sbi_hart_hang();
-
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
 
@@ -99,7 +94,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	spin_lock(&coldboot_lock);
 
 	/* Mark current HART as waiting */
-	coldboot_wait_bitmap |= (1UL << hartid);
+	sbi_hartmask_set_hart(hartid, &coldboot_wait_hmask);
 
 	/* Wait for coldboot to finish using WFI */
 	while (!coldboot_done) {
@@ -109,7 +104,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	};
 
 	/* Unmark current HART as waiting */
-	coldboot_wait_bitmap &= ~(1UL << hartid);
+	sbi_hartmask_clear_hart(hartid, &coldboot_wait_hmask);
 
 	/* Release coldboot lock */
 	spin_unlock(&coldboot_lock);
@@ -134,7 +129,8 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Send an IPI to all HARTs waiting for coldboot */
 	for (int i = 0; i < max_hart; i++) {
-		if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
+		if ((i != hartid) &&
+		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
 			sbi_platform_ipi_send(plat, i);
 	}
 
@@ -285,6 +281,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
+	    (sbi_platform_hart_count(plat) <= hartid) ||
 	    sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 

From 44ce5b99e97eb0c3695414cdb64c61f07d9a76a4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 17:49:17 +0530
Subject: [PATCH 0459/1765] include: Remove disabled_hart_mask from
 sbi_platform

The disabled_hard_mask in sbi_platform is only 64bits wide so we
cannot disable a HART with HARTID > 63. To tackle this, we remove
disabled_hart_mask and replace it with hart_disabled() platform
callback.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h        | 15 +++++++--------
 platform/andes/ae350/platform.c   |  3 ---
 platform/ariane-fpga/platform.c   |  1 -
 platform/kendryte/k210/platform.c |  1 -
 platform/qemu/virt/platform.c     |  1 -
 platform/sifive/fu540/platform.c  |  7 ++++++-
 platform/spike/platform.c         |  1 -
 platform/template/platform.c      |  1 -
 platform/thead/c910/platform.c    |  1 -
 9 files changed, 13 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index a28bc506c4d..e4f1a7dbd92 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -29,12 +29,10 @@
 #define SBI_PLATFORM_HART_COUNT_OFFSET (0x50)
 /** Offset of hart_stack_size in struct sbi_platform */
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
-/** Offset of disabled_hart_mask in struct sbi_platform */
-#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x58)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x60)
+#define SBI_PLATFORM_OPS_OFFSET (0x58)
 /** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x58 + __SIZEOF_POINTER__)
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
@@ -138,6 +136,9 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
+	/** Check whether given hart is disabled */
+	bool (*hart_disabled)(u32 hartid);
+
 	/** Bringup the given hart from previous stage **/
 	int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
 	/**
@@ -182,8 +183,6 @@ struct sbi_platform {
 	u32 hart_count;
 	/** Per-HART stack size for exception/interrupt handling */
 	u32 hart_stack_size;
-	/** Mask representing the set of disabled HARTs */
-	u64 disabled_hart_mask;
 	/** Pointer to sbi platform operations */
 	unsigned long platform_ops_addr;
 	/** Pointer to system firmware specific context */
@@ -246,8 +245,8 @@ static inline const char *sbi_platform_name(const struct sbi_platform *plat)
 static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
 					      u32 hartid)
 {
-	if (plat && (plat->disabled_hart_mask & (1 << hartid)))
-		return TRUE;
+	if (plat && sbi_platform_ops(plat)->hart_disabled)
+		return sbi_platform_ops(plat)->hart_disabled(hartid);
 	return FALSE;
 }
 
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index d14266d95b7..08db3ebcc9e 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -156,7 +156,6 @@ static int ae350_system_shutdown(u32 type)
 
 /* Platform descriptor. */
 const struct sbi_platform_operations platform_ops = {
-
 	.final_init = ae350_final_init,
 
 	.pmp_region_count = ae350_pmp_region_count,
@@ -182,13 +181,11 @@ const struct sbi_platform_operations platform_ops = {
 };
 
 const struct sbi_platform platform = {
-
 	.opensbi_version = OPENSBI_VERSION,
 	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name = "Andes AE350",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = AE350_HART_COUNT,
 	.hart_stack_size = AE350_HART_STACK_SIZE,
-	.disabled_hart_mask = 0,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 5ebbff8b466..1975eb2d19f 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -201,6 +201,5 @@ const struct sbi_platform platform = {
 	.features = SBI_ARIANE_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
 	.hart_stack_size = 4096,
-	.disabled_hart_mask = 0,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 8ad1bf81c2c..1b49b39d77f 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -139,6 +139,5 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_HAS_TIMER_VALUE,
 	.hart_count		= K210_HART_COUNT,
 	.hart_stack_size	= K210_HART_STACK_SIZE,
-	.disabled_hart_mask	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 883555c9884..d2c841cf406 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -159,6 +159,5 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= VIRT_HART_COUNT,
 	.hart_stack_size	= VIRT_HART_STACK_SIZE,
-	.disabled_hart_mask	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 5f3d3ce0dfa..4a8c016f94f 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -194,6 +194,11 @@ static int fu540_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
+static bool fu540_hart_disabled(u32 hartid)
+{
+	return (FU540_HARITD_DISABLED & (1UL << hartid)) ? TRUE : FALSE;
+}
+
 static int fu540_system_down(u32 type)
 {
 	/* For now nothing to do. */
@@ -216,6 +221,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= fu540_timer_init,
+	.hart_disabled		= fu540_hart_disabled,
 	.system_reboot		= fu540_system_down,
 	.system_shutdown	= fu540_system_down
 };
@@ -227,6 +233,5 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= FU540_HART_COUNT,
 	.hart_stack_size	= FU540_HART_STACK_SIZE,
-	.disabled_hart_mask	= FU540_HARITD_DISABLED,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
index c0f93e227be..2b9b041ecd2 100644
--- a/platform/spike/platform.c
+++ b/platform/spike/platform.c
@@ -110,6 +110,5 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= SPIKE_HART_COUNT,
 	.hart_stack_size	= SPIKE_HART_STACK_SIZE,
-	.disabled_hart_mask	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/template/platform.c b/platform/template/platform.c
index f959a11198b..c98bbffa4ea 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -223,6 +223,5 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= 1,
 	.hart_stack_size	= 4096,
-	.disabled_hart_mask	= 0,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 9d73bf48ea5..482caad1bb2 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -153,6 +153,5 @@ const struct sbi_platform platform = {
 	.features            = SBI_THEAD_FEATURES,
 	.hart_count          = C910_HART_COUNT,
 	.hart_stack_size     = C910_HART_STACK_SIZE,
-	.disabled_hart_mask  = 0,
 	.platform_ops_addr   = (unsigned long)&platform_ops
 };

From 2db381fc7401c3ca1637e18ec0258b9e1eff3f93 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:13:50 +0530
Subject: [PATCH 0460/1765] lib: Introduce sbi_hsm_hart_started_mask() API

This patch introduce sbi_hsm_hart_started_mask() API as
a replacement of sbi_hart_available_mask() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_hsm.h |  3 +++
 lib/sbi/sbi_hsm.c     | 38 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index a68eafbc637..227bb6b1b80 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -27,5 +27,8 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
 bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid);
+int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
+			      ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
+
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 14a2d8450d6..713dbaf9c66 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -77,6 +77,44 @@ bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)
 		return FALSE;
 }
 
+/**
+ * Get ulong HART mask for given HART base ID
+ * @param scratch the per-HART scratch pointer
+ * @param hbase the HART base ID
+ * @param out_hmask the output ulong HART mask
+ * @return 0 on success and SBI_Exxx (< 0) on failure
+ * Note: the output HART mask will be set to zero on failure as well.
+ */
+int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
+			      ulong hbase, ulong *out_hmask)
+{
+	ulong i;
+	ulong hcount = sbi_platform_hart_count(sbi_platform_ptr(scratch));
+
+	/*
+	 * The SBI_HARTMASK_MAX_BITS represents the maximum HART ids generic
+	 * OpenSBI can handle whereas sbi_platform_hart_count() represents
+	 * the maximum HART ids (or HARTs) on underlying platform.
+	 *
+	 * Currently, we only support continuous HART ids so this function
+	 * is written with same assumption. In future, this function will
+	 * change when we support discontinuous and sparse HART ids.
+	 */
+
+	*out_hmask = 0;
+	if (hcount <= hbase)
+		return SBI_EINVAL;
+	if (BITS_PER_LONG < (hcount - hbase))
+		hcount = BITS_PER_LONG;
+
+	for (i = hbase; i < hcount; i++) {
+		if (sbi_hsm_hart_get_state(scratch, i) == SBI_HART_STARTED)
+			*out_hmask |= 1UL << (i - hbase);
+	}
+
+	return 0;
+}
+
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 {
 	u32 oldstate;

From 61f776861fcabd617f7d1cbd5e5b327500b04f38 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:17:49 +0530
Subject: [PATCH 0461/1765] lib: sbi_ecall_legacy: Use
 sbi_hsm_hart_started_mask() API

This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_ecall_legacy.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 8995af4422c..9099ee3b7a9 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
@@ -31,9 +32,10 @@ static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch,
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	} else {
-		mask = sbi_hart_available_mask();
+		sbi_hsm_hart_started_mask(scratch, 0, &mask);
 	}
 	*hmask = mask;
+
 	return 0;
 }
 

From 466fecb95732c6c7eb98e897df71996d0cef479b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:19:49 +0530
Subject: [PATCH 0462/1765] lib: sbi_system: Use sbi_hsm_hart_started_mask()
 API

This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_system.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 68fad0fe212..461e47030f7 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -38,12 +38,19 @@ void sbi_system_final_exit(struct sbi_scratch *scratch)
 
 void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 {
-	u32 current_hartid_mask = 1UL << sbi_current_hartid();
+	ulong hbase = 0, hmask;
+	u32 current_hartid = sbi_current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	sbi_ipi_send_halt(scratch,
-			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
+	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
+		if (hbase <= current_hartid)
+			hmask &= ~(1UL << (current_hartid - hbase));
+		if (hmask)
+			sbi_ipi_send_halt(scratch, hmask, hbase);
+		hbase += BITS_PER_LONG;
+	}
 
+	/* Stop current HART */
 	sbi_hsm_hart_stop(scratch, FALSE);
 
 	/* Platform specific reooot */
@@ -55,12 +62,19 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 
 void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 {
-	u32 current_hartid_mask = 1UL << sbi_current_hartid();
+	ulong hbase = 0, hmask;
+	u32 current_hartid = sbi_current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	sbi_ipi_send_halt(scratch,
-			  sbi_hart_available_mask() & ~current_hartid_mask, 0);
+	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
+		if (hbase <= current_hartid)
+			hmask &= ~(1UL << (current_hartid - hbase));
+		if (hmask)
+			sbi_ipi_send_halt(scratch, hmask, hbase);
+		hbase += BITS_PER_LONG;
+	}
 
+	/* Stop current HART */
 	sbi_hsm_hart_stop(scratch, FALSE);
 
 	/* Platform specific shutdown */

From 9aad831e87dae70bf78357d49529c7ee56bd7175 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:21:38 +0530
Subject: [PATCH 0463/1765] lib: sbi_ipi: Use sbi_hsm_hart_started_mask() API

This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_ipi.c | 46 ++++++++++++++++++++++------------------------
 1 file changed, 22 insertions(+), 24 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 006844b25d2..144b04ad666 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -37,8 +37,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	const struct sbi_ipi_event_ops *ipi_ops;
 
 	if ((SBI_IPI_EVENT_MAX <= event) ||
-	    !ipi_ops_array[event] ||
-	    sbi_platform_hart_disabled(plat, remote_hartid))
+	    !ipi_ops_array[event])
 		return SBI_EINVAL;
 	ipi_ops = ipi_ops_array[event];
 
@@ -74,33 +73,32 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 			u32 event, void *data)
 {
+	int rc;
 	ulong i, m;
-	ulong mask = sbi_hart_available_mask();
-	ulong tempmask;
-	unsigned long last_bit = __fls(mask);
 
 	if (hbase != -1UL) {
-		if (hbase > last_bit)
-			/* hart base is not available */
-			return SBI_EINVAL;
-		/**
-		 * FIXME: This check is valid only ULONG size. This is okay for
-		 * now as avaialble hart mask can support upto ULONG size only.
-		 */
-		tempmask = hmask << hbase;
-		tempmask = ~mask & tempmask;
-		if (tempmask)
-			/* at least one of the hart in hmask is not available */
-			return SBI_EINVAL;
-
-		mask &= (hmask << hbase);
+		rc = sbi_hsm_hart_started_mask(scratch, hbase, &m);
+		if (rc)
+			return rc;
+		m &= hmask;
+
+		/* Send IPIs */
+		for (i = hbase; m; i++, m >>= 1) {
+			if (m & 1UL)
+				sbi_ipi_send(scratch, i, event, data);
+		}
+	} else {
+		hbase = 0;
+		while (!sbi_hsm_hart_started_mask(scratch, hbase, &m)) {
+			/* Send IPIs */
+			for (i = hbase; m; i++, m >>= 1) {
+				if (m & 1UL)
+					sbi_ipi_send(scratch, i, event, data);
+			}
+			hbase += BITS_PER_LONG;
+		}
 	}
 
-	/* Send IPIs to every other hart on the set */
-	for (i = 0, m = mask; m; i++, m >>= 1)
-		if (m & 1UL)
-			sbi_ipi_send(scratch, i, event, data);
-
 	return 0;
 }
 

From eede1aa7c7f134192ca734e5a2e76ff1588c97d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 2 Mar 2020 16:33:07 +0530
Subject: [PATCH 0464/1765] lib: sbi_hart: Remove HART available mask and
 related APIs

The HART available mask and related APIs are now totally redundant
because of more extensive HART state machine implemented by sbi_hsm.

Due to above, we remove HART available mask and related APIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_hart.h |  6 ------
 lib/sbi/sbi_hart.c     | 29 -----------------------------
 lib/sbi/sbi_init.c     |  6 ------
 3 files changed, 41 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 2ec614dbed1..c999b58bc8d 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -32,12 +32,6 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 		     unsigned long next_addr, unsigned long next_mode,
 		     bool next_virt);
 
-void sbi_hart_mark_available(u32 hartid);
-
-ulong sbi_hart_available_mask(void);
-
-void sbi_hart_unmark_available(u32 hartid);
-
 struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
 					   u32 hartid);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 9017db18369..732ff5fc93d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -11,7 +11,6 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_fp.h>
-#include <sbi/riscv_locks.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
@@ -342,34 +341,6 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	__builtin_unreachable();
 }
 
-static spinlock_t avail_hart_mask_lock        = SPIN_LOCK_INITIALIZER;
-static volatile unsigned long avail_hart_mask = 0;
-
-void sbi_hart_mark_available(u32 hartid)
-{
-	spin_lock(&avail_hart_mask_lock);
-	avail_hart_mask |= (1UL << hartid);
-	spin_unlock(&avail_hart_mask_lock);
-}
-
-void sbi_hart_unmark_available(u32 hartid)
-{
-	spin_lock(&avail_hart_mask_lock);
-	avail_hart_mask &= ~(1UL << hartid);
-	spin_unlock(&avail_hart_mask_lock);
-}
-
-ulong sbi_hart_available_mask(void)
-{
-	ulong ret;
-
-	spin_lock(&avail_hart_mask_lock);
-	ret = avail_hart_mask;
-	spin_unlock(&avail_hart_mask_lock);
-
-	return ret;
-}
-
 typedef struct sbi_scratch *(*h2s)(ulong hartid);
 
 struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index bfc59e42642..e7afa1e4119 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -196,8 +196,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	wake_coldboot_harts(scratch, hartid);
 
-	sbi_hart_mark_available(hartid);
-
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
@@ -249,8 +247,6 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	sbi_hart_mark_available(hartid);
-
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
@@ -326,8 +322,6 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 	if (sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 
-	sbi_hart_unmark_available(hartid);
-
 	sbi_platform_early_exit(plat);
 
 	sbi_timer_exit(scratch);

From 757bb44e6eff4f093bcc8b38333db2a37ffe47a4 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 10 Mar 2020 16:46:53 -0700
Subject: [PATCH 0465/1765] docs: Remove out-of-date documentation

Upstream U-Boot now have SMP support and doesn't require any additional
patches for HiFive Unleashed.

Update the documentation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/firmware/payload_uboot.md | 29 ++---------------------------
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/docs/firmware/payload_uboot.md b/docs/firmware/payload_uboot.md
index d30f6f836e2..b8f0803e2ac 100644
--- a/docs/firmware/payload_uboot.md
+++ b/docs/firmware/payload_uboot.md
@@ -7,34 +7,9 @@ environment. In the context of OpenSBI, U-Boot can be specified as a payload to
 the OpenSBI firmware, becoming the boot stage following the OpenSBI firmware
 execution.
 
-The current stable upstream code of U-Boot does not yet include all patches
-necessary to fully support OpenSBI. To use U-Boot as an OpenSBI payload, the
-following out-of-tree patch series must be applied to the upstream U-Boot source
-code:
-
-HiFive Unleashed support for U-Boot
-
-https://lists.denx.de/pipermail/u-boot/2019-February/358058.html
-
-This patch series enables a single CPU to execute U-Boot. As a result, the next
-stage boot code such as a Linux kernel can also only execute on a single CPU.
-U-Boot SMP support for RISC-V can be enabled with the following additional
-patches:
-
-https://lists.denx.de/pipermail/u-boot/2019-February/358393.html
-
 Building and Generating U-Boot images
 =====================================
 Please refer to the U-Boot build documentation for detailed instructions on
-how to build U-Boot images.
-
-Once U-Boot images are built, the Linux kernel image needs to be converted
-into a format that U-Boot understands:
-
-```
-<uboot-dir>/tools/mkimage -A riscv -O linux -T kernel -C none -a 0x80200000 -e 0x80200000 -n Linux -d \
-		<linux_build_directory>arch/riscv/boot/Image \
-		<linux_build_directory>/arch/riscv/boot/uImage
-```
+how to build U-Boot image and boot high level operating systems from U-Boot
+prompt.
 
-Copy the uImage to your tftpboot server path if network boot is required.

From 86d37bbd7ddf44430eb63ac521261f2fa11733b0 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Thu, 12 Mar 2020 14:20:37 +0900
Subject: [PATCH 0466/1765] lib: sbi: Fix misaligned trap handling

Compile time checks of __riscv_compressed can only check if OpenSBI is
being compiled using compressed instructions or not. Checking this macro
does not indicate if an instruction that generated a misaligned trap is
a compressed instruction or not.

Since the misaligned trap handling code inspects instructions _C_ bits
to detect compressed instructions, we can remove all static checks on
__riscv_compressed and dissociate hanlding of misaligned traps and
OpenSBI compilation.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_misaligned_ldst.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 400372cdb91..b59efa01e79 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -72,7 +72,6 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		shift = 8 * (sizeof(ulong) - len);
 	} else if ((insn & INSN_MASK_LHU) == INSN_MATCH_LHU) {
 		len = 2;
-#ifdef __riscv_compressed
 #if __riscv_xlen >= 64
 	} else if ((insn & INSN_MASK_C_LD) == INSN_MATCH_C_LD) {
 		len   = 8;
@@ -108,7 +107,6 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		fp  = 1;
 		len = 4;
 #endif
-#endif
 #endif
 	} else {
 		uptrap.epc = regs->mepc;
@@ -189,7 +187,6 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 #endif
 	} else if ((insn & INSN_MASK_SH) == INSN_MATCH_SH) {
 		len = 2;
-#ifdef __riscv_compressed
 #if __riscv_xlen >= 64
 	} else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
 		len	       = 8;
@@ -221,7 +218,6 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		len	       = 4;
 		val.data_ulong = GET_F32_RS2C(insn, regs);
 #endif
-#endif
 #endif
 	} else {
 		uptrap.epc = regs->mepc;

From ffdc858f7277b5fca3bca8f19961c9ccfeb42c16 Mon Sep 17 00:00:00 2001
From: Panagiotis Peristerakis <perister@ics.forth.gr>
Date: Thu, 12 Mar 2020 15:56:24 +0200
Subject: [PATCH 0467/1765] platform: ariane-fpga: Change license for
 ariane-fpga from GPL-2.0 to BSD-2

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/ariane-fpga/config.mk  | 2 +-
 platform/ariane-fpga/objects.mk | 2 +-
 platform/ariane-fpga/platform.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/ariane-fpga/config.mk b/platform/ariane-fpga/config.mk
index f9f0c0d62ea..3556461a12f 100644
--- a/platform/ariane-fpga/config.mk
+++ b/platform/ariane-fpga/config.mk
@@ -1,5 +1,5 @@
 #
-# SPDX-License-Identifier: GPL-2.0
+# SPDX-License-Identifier: BSD-2-Clause
 #
 # Copyright (C) 2019 FORTH-ICS/CARV
 #		Panagiotis Peristerakis <perister@ics.forth.gr>
diff --git a/platform/ariane-fpga/objects.mk b/platform/ariane-fpga/objects.mk
index 520b00af951..814e6da6347 100644
--- a/platform/ariane-fpga/objects.mk
+++ b/platform/ariane-fpga/objects.mk
@@ -1,5 +1,5 @@
 #
-# SPDX-License-Identifier: GPL-2.0
+# SPDX-License-Identifier: BSD-2-Clause
 #
 # Copyright (C) 2019 FORTH-ICS/CARV
 #		Panagiotis Peristerakis <perister@ics.forth.gr>
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 1975eb2d19f..d5d0fbcf0b5 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: BSD-2-Clause */
 /*
  * Copyright (C) 2019 FORTH-ICS/CARV
  *				Panagiotis Peristerakis <perister@ics.forth.gr>

From 4b2f594b855176c828540c3356b0a94beb86f161 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 11 Mar 2020 22:46:26 -0700
Subject: [PATCH 0468/1765] sbi: Add definitions for true/false

We currently have TRUE/FALSE, but it could be convenient to have
true/false as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index b59a6ff5a39..153c1850ce2 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -56,6 +56,8 @@ typedef unsigned long		physical_size_t;
 
 #define TRUE			1
 #define FALSE			0
+#define true			TRUE
+#define false			FALSE
 
 #define NULL			((void *)0)
 

From 0cfe49ad63f1b31ffcc5345b53e32017cce5357a Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 11 Mar 2020 22:46:27 -0700
Subject: [PATCH 0469/1765] libfdt: Add INT32_MAX and UINT32_MAX in
 libfdt_env.h

Add two macros in preparation to sync libfdt codes to latest v1.5.1
release from upstream.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/libfdt_env.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index 535b6371d15..415acff8c43 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -57,6 +57,8 @@
 
 #define INT_MAX		((int)(~0U >> 1))
 #define UINT_MAX	((unsigned int)~0U)
+#define INT32_MAX	INT_MAX
+#define UINT32_MAX	UINT_MAX
 
 #ifdef __CHECKER__
 #define FDT_FORCE __attribute__((force))

From baac7e066d1d1eabffa7f40ab7414c23b38b9fae Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 11 Mar 2020 22:46:28 -0700
Subject: [PATCH 0470/1765] libfdt: Upgrade to v1.5.1 release

Sync with latest libfdt v1.5.1 release source codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/Makefile.libfdt   |   3 +
 lib/utils/libfdt/fdt.c             |  56 ++------
 lib/utils/libfdt/fdt.h             |  47 +------
 lib/utils/libfdt/fdt_addresses.c   | 102 ++++++++-------
 lib/utils/libfdt/fdt_empty_tree.c  |  47 +------
 lib/utils/libfdt/fdt_overlay.c     |  85 ++++--------
 lib/utils/libfdt/fdt_ro.c          | 108 ++++++----------
 lib/utils/libfdt/fdt_rw.c          |  69 +++-------
 lib/utils/libfdt/fdt_strerror.c    |  47 +------
 lib/utils/libfdt/fdt_sw.c          | 125 +++++++++---------
 lib/utils/libfdt/fdt_wip.c         |  47 +------
 lib/utils/libfdt/libfdt.h          | 199 ++++++++++++++++++++++-------
 lib/utils/libfdt/libfdt_env.h      |  47 +------
 lib/utils/libfdt/libfdt_internal.h |  57 +--------
 lib/utils/libfdt/version.lds       |  10 ++
 15 files changed, 394 insertions(+), 655 deletions(-)

diff --git a/lib/utils/libfdt/Makefile.libfdt b/lib/utils/libfdt/Makefile.libfdt
index 3af3656df80..e54639738c8 100644
--- a/lib/utils/libfdt/Makefile.libfdt
+++ b/lib/utils/libfdt/Makefile.libfdt
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 # Makefile.libfdt
 #
 # This is not a complete Makefile of itself.  Instead, it is designed to
@@ -9,7 +10,9 @@ LIBFDT_VERSION = version.lds
 LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
 	fdt_addresses.c fdt_overlay.c
 LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
+LIBFDT_LIB = libfdt-$(DTC_VERSION).$(SHAREDLIB_EXT)
 
 libfdt_clean:
 	@$(VECHO) CLEAN "(libfdt)"
 	rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%)
+	rm -f $(LIBFDT_dir)/$(LIBFDT_soname)
diff --git a/lib/utils/libfdt/fdt.c b/lib/utils/libfdt/fdt.c
index ae03b111296..d6ce7c052dc 100644
--- a/lib/utils/libfdt/fdt.c
+++ b/lib/utils/libfdt/fdt.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -60,8 +15,10 @@
  * that the given buffer contains what appears to be a flattened
  * device tree with sane information in its header.
  */
-int fdt_ro_probe_(const void *fdt)
+int32_t fdt_ro_probe_(const void *fdt)
 {
+	uint32_t totalsize = fdt_totalsize(fdt);
+
 	if (fdt_magic(fdt) == FDT_MAGIC) {
 		/* Complete tree */
 		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
@@ -76,7 +33,10 @@ int fdt_ro_probe_(const void *fdt)
 		return -FDT_ERR_BADMAGIC;
 	}
 
-	return 0;
+	if (totalsize < INT32_MAX)
+		return totalsize;
+	else
+		return -FDT_ERR_TRUNCATED;
 }
 
 static int check_off_(uint32_t hdrsize, uint32_t totalsize, uint32_t off)
diff --git a/lib/utils/libfdt/fdt.h b/lib/utils/libfdt/fdt.h
index 74961f9026d..f2e68807f27 100644
--- a/lib/utils/libfdt/fdt.h
+++ b/lib/utils/libfdt/fdt.h
@@ -1,55 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
 #ifndef FDT_H
 #define FDT_H
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
  * Copyright 2012 Kim Phillips, Freescale Semiconductor.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 #ifndef __ASSEMBLY__
diff --git a/lib/utils/libfdt/fdt_addresses.c b/lib/utils/libfdt/fdt_addresses.c
index f13a87dfa06..9a82cd0ba2f 100644
--- a/lib/utils/libfdt/fdt_addresses.c
+++ b/lib/utils/libfdt/fdt_addresses.c
@@ -1,53 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
  * Copyright (C) 2018 embedded brains GmbH
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -59,7 +14,7 @@
 static int fdt_cells(const void *fdt, int nodeoffset, const char *name)
 {
 	const fdt32_t *c;
-	int val;
+	uint32_t val;
 	int len;
 
 	c = fdt_getprop(fdt, nodeoffset, name, &len);
@@ -70,10 +25,10 @@ static int fdt_cells(const void *fdt, int nodeoffset, const char *name)
 		return -FDT_ERR_BADNCELLS;
 
 	val = fdt32_to_cpu(*c);
-	if ((val <= 0) || (val > FDT_MAX_NCELLS))
+	if (val > FDT_MAX_NCELLS)
 		return -FDT_ERR_BADNCELLS;
 
-	return val;
+	return (int)val;
 }
 
 int fdt_address_cells(const void *fdt, int nodeoffset)
@@ -81,6 +36,8 @@ int fdt_address_cells(const void *fdt, int nodeoffset)
 	int val;
 
 	val = fdt_cells(fdt, nodeoffset, "#address-cells");
+	if (val == 0)
+		return -FDT_ERR_BADNCELLS;
 	if (val == -FDT_ERR_NOTFOUND)
 		return 2;
 	return val;
@@ -95,3 +52,50 @@ int fdt_size_cells(const void *fdt, int nodeoffset)
 		return 1;
 	return val;
 }
+
+/* This function assumes that [address|size]_cells is 1 or 2 */
+int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset,
+			     const char *name, uint64_t addr, uint64_t size)
+{
+	int addr_cells, size_cells, ret;
+	uint8_t data[sizeof(fdt64_t) * 2], *prop;
+
+	ret = fdt_address_cells(fdt, parent);
+	if (ret < 0)
+		return ret;
+	addr_cells = ret;
+
+	ret = fdt_size_cells(fdt, parent);
+	if (ret < 0)
+		return ret;
+	size_cells = ret;
+
+	/* check validity of address */
+	prop = data;
+	if (addr_cells == 1) {
+		if ((addr > UINT32_MAX) || ((UINT32_MAX + 1 - addr) < size))
+			return -FDT_ERR_BADVALUE;
+
+		fdt32_st(prop, (uint32_t)addr);
+	} else if (addr_cells == 2) {
+		fdt64_st(prop, addr);
+	} else {
+		return -FDT_ERR_BADNCELLS;
+	}
+
+	/* check validity of size */
+	prop += addr_cells * sizeof(fdt32_t);
+	if (size_cells == 1) {
+		if (size > UINT32_MAX)
+			return -FDT_ERR_BADVALUE;
+
+		fdt32_st(prop, (uint32_t)size);
+	} else if (size_cells == 2) {
+		fdt64_st(prop, size);
+	} else {
+		return -FDT_ERR_BADNCELLS;
+	}
+
+	return fdt_appendprop(fdt, nodeoffset, name, data,
+			      (addr_cells + size_cells) * sizeof(fdt32_t));
+}
diff --git a/lib/utils/libfdt/fdt_empty_tree.c b/lib/utils/libfdt/fdt_empty_tree.c
index f2ae9b77c28..49d54d44b8e 100644
--- a/lib/utils/libfdt/fdt_empty_tree.c
+++ b/lib/utils/libfdt/fdt_empty_tree.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2012 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
diff --git a/lib/utils/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
index 5fdab6c6371..be718733661 100644
--- a/lib/utils/libfdt/fdt_overlay.c
+++ b/lib/utils/libfdt/fdt_overlay.c
@@ -1,53 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2016 Free Electrons
  * Copyright (C) 2016 NextThing Co.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -93,11 +48,11 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
  * @pathp: pointer which receives the path of the target (or NULL)
  *
  * overlay_get_target() retrieves the target offset in the base
- * device tree of a fragment, no matter how the actual targetting is
+ * device tree of a fragment, no matter how the actual targeting is
  * done (through a phandle or a path)
  *
  * returns:
- *      the targetted node offset in the base device tree
+ *      the targeted node offset in the base device tree
  *      Negative error code on error
  */
 static int overlay_get_target(const void *fdt, const void *fdto,
@@ -778,26 +733,36 @@ static int overlay_symbol_update(void *fdt, void *fdto)
 		/* keep end marker to avoid strlen() */
 		e = path + path_len;
 
-		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
-
 		if (*path != '/')
 			return -FDT_ERR_BADVALUE;
 
 		/* get fragment name first */
 		s = strchr(path + 1, '/');
-		if (!s)
-			return -FDT_ERR_BADOVERLAY;
+		if (!s) {
+			/* Symbol refers to something that won't end
+			 * up in the target tree */
+			continue;
+		}
 
 		frag_name = path + 1;
 		frag_name_len = s - path - 1;
 
 		/* verify format; safe since "s" lies in \0 terminated prop */
 		len = sizeof("/__overlay__/") - 1;
-		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
-			return -FDT_ERR_BADOVERLAY;
-
-		rel_path = s + len;
-		rel_path_len = e - rel_path;
+		if ((e - s) > len && (memcmp(s, "/__overlay__/", len) == 0)) {
+			/* /<fragment-name>/__overlay__/<relative-subnode-path> */
+			rel_path = s + len;
+			rel_path_len = e - rel_path;
+		} else if ((e - s) == len
+			   && (memcmp(s, "/__overlay__", len - 1) == 0)) {
+			/* /<fragment-name>/__overlay__ */
+			rel_path = "";
+			rel_path_len = 0;
+		} else {
+			/* Symbol refers to something that won't end
+			 * up in the target tree */
+			continue;
+		}
 
 		/* find the fragment index in which the symbol lies */
 		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
@@ -863,12 +828,16 @@ static int overlay_symbol_update(void *fdt, void *fdto)
 
 int fdt_overlay_apply(void *fdt, void *fdto)
 {
-	uint32_t delta = fdt_get_max_phandle(fdt);
+	uint32_t delta;
 	int ret;
 
 	FDT_RO_PROBE(fdt);
 	FDT_RO_PROBE(fdto);
 
+	ret = fdt_find_max_phandle(fdt, &delta);
+	if (ret)
+		goto err;
+
 	ret = overlay_adjust_local_phandles(fdto, delta);
 	if (ret)
 		goto err;
diff --git a/lib/utils/libfdt/fdt_ro.c b/lib/utils/libfdt/fdt_ro.c
index eafc1428289..a5c2797cde6 100644
--- a/lib/utils/libfdt/fdt_ro.c
+++ b/lib/utils/libfdt/fdt_ro.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -78,19 +33,20 @@ static int fdt_nodename_eq_(const void *fdt, int offset,
 
 const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
 {
+	int32_t totalsize = fdt_ro_probe_(fdt);
 	uint32_t absoffset = stroffset + fdt_off_dt_strings(fdt);
 	size_t len;
 	int err;
 	const char *s, *n;
 
-	err = fdt_ro_probe_(fdt);
-	if (err != 0)
+	err = totalsize;
+	if (totalsize < 0)
 		goto fail;
 
 	err = -FDT_ERR_BADOFFSET;
-	if (absoffset >= fdt_totalsize(fdt))
+	if (absoffset >= totalsize)
 		goto fail;
-	len = fdt_totalsize(fdt) - absoffset;
+	len = totalsize - absoffset;
 
 	if (fdt_magic(fdt) == FDT_MAGIC) {
 		if (stroffset < 0)
@@ -144,29 +100,49 @@ static int fdt_string_eq_(const void *fdt, int stroffset,
 	return p && (slen == len) && (memcmp(p, s, len) == 0);
 }
 
-uint32_t fdt_get_max_phandle(const void *fdt)
+int fdt_find_max_phandle(const void *fdt, uint32_t *phandle)
 {
-	uint32_t max_phandle = 0;
-	int offset;
+	uint32_t max = 0;
+	int offset = -1;
 
-	for (offset = fdt_next_node(fdt, -1, NULL);;
-	     offset = fdt_next_node(fdt, offset, NULL)) {
-		uint32_t phandle;
+	while (true) {
+		uint32_t value;
 
-		if (offset == -FDT_ERR_NOTFOUND)
-			return max_phandle;
+		offset = fdt_next_node(fdt, offset, NULL);
+		if (offset < 0) {
+			if (offset == -FDT_ERR_NOTFOUND)
+				break;
 
-		if (offset < 0)
-			return (uint32_t)-1;
+			return offset;
+		}
 
-		phandle = fdt_get_phandle(fdt, offset);
-		if (phandle == (uint32_t)-1)
-			continue;
+		value = fdt_get_phandle(fdt, offset);
 
-		if (phandle > max_phandle)
-			max_phandle = phandle;
+		if (value > max)
+			max = value;
 	}
 
+	if (phandle)
+		*phandle = max;
+
+	return 0;
+}
+
+int fdt_generate_phandle(const void *fdt, uint32_t *phandle)
+{
+	uint32_t max;
+	int err;
+
+	err = fdt_find_max_phandle(fdt, &max);
+	if (err < 0)
+		return err;
+
+	if (max == FDT_MAX_PHANDLE)
+		return -FDT_ERR_NOPHANDLES;
+
+	if (phandle)
+		*phandle = max + 1;
+
 	return 0;
 }
 
@@ -313,7 +289,7 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
 	const char *nameptr;
 	int err;
 
-	if (((err = fdt_ro_probe_(fdt)) != 0)
+	if (((err = fdt_ro_probe_(fdt)) < 0)
 	    || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))
 			goto fail;
 
diff --git a/lib/utils/libfdt/fdt_rw.c b/lib/utils/libfdt/fdt_rw.c
index 2e49855d7cf..8795947c00d 100644
--- a/lib/utils/libfdt/fdt_rw.c
+++ b/lib/utils/libfdt/fdt_rw.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -136,6 +91,14 @@ static int fdt_splice_struct_(void *fdt, void *p,
 	return 0;
 }
 
+/* Must only be used to roll back in case of error */
+static void fdt_del_last_string_(void *fdt, const char *s)
+{
+	int newlen = strlen(s) + 1;
+
+	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) - newlen);
+}
+
 static int fdt_splice_string_(void *fdt, int newlen)
 {
 	void *p = (char *)fdt
@@ -149,7 +112,7 @@ static int fdt_splice_string_(void *fdt, int newlen)
 	return 0;
 }
 
-static int fdt_find_add_string_(void *fdt, const char *s)
+static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
 {
 	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
 	const char *p;
@@ -157,6 +120,8 @@ static int fdt_find_add_string_(void *fdt, const char *s)
 	int len = strlen(s) + 1;
 	int err;
 
+	*allocated = 0;
+
 	p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s);
 	if (p)
 		/* found it */
@@ -167,6 +132,8 @@ static int fdt_find_add_string_(void *fdt, const char *s)
 	if (err)
 		return err;
 
+	*allocated = 1;
+
 	memcpy(new, s, len);
 	return (new - strtab);
 }
@@ -225,11 +192,12 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name,
 	int nextoffset;
 	int namestroff;
 	int err;
+	int allocated;
 
 	if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0)
 		return nextoffset;
 
-	namestroff = fdt_find_add_string_(fdt, name);
+	namestroff = fdt_find_add_string_(fdt, name, &allocated);
 	if (namestroff < 0)
 		return namestroff;
 
@@ -237,8 +205,11 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name,
 	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
 
 	err = fdt_splice_struct_(fdt, *prop, 0, proplen);
-	if (err)
+	if (err) {
+		if (allocated)
+			fdt_del_last_string_(fdt, name);
 		return err;
+	}
 
 	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
 	(*prop)->nameoff = cpu_to_fdt32(namestroff);
diff --git a/lib/utils/libfdt/fdt_strerror.c b/lib/utils/libfdt/fdt_strerror.c
index 9677a1887e5..768db66eada 100644
--- a/lib/utils/libfdt/fdt_strerror.c
+++ b/lib/utils/libfdt/fdt_strerror.c
@@ -1,51 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
@@ -82,6 +38,7 @@ static struct fdt_errtabent fdt_errtable[] = {
 	FDT_ERRTABENT(FDT_ERR_BADVALUE),
 	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
 	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
+	FDT_ERRTABENT(FDT_ERR_BADFLAGS),
 };
 #define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
 
diff --git a/lib/utils/libfdt/fdt_sw.c b/lib/utils/libfdt/fdt_sw.c
index 9fa4a94d83c..76bea22f734 100644
--- a/lib/utils/libfdt/fdt_sw.c
+++ b/lib/utils/libfdt/fdt_sw.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
@@ -121,6 +76,12 @@ static int fdt_sw_probe_struct_(void *fdt)
 			return err; \
 	}
 
+static inline uint32_t sw_flags(void *fdt)
+{
+	/* assert: (fdt_magic(fdt) == FDT_SW_MAGIC) */
+	return fdt_last_comp_version(fdt);
+}
+
 /* 'complete' state:	Enter this state after fdt_finish()
  *
  * Allowed functions: none
@@ -141,7 +102,7 @@ static void *fdt_grab_space_(void *fdt, size_t len)
 	return fdt_offset_ptr_w_(fdt, offset);
 }
 
-int fdt_create(void *buf, int bufsize)
+int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags)
 {
 	const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header),
 					 sizeof(struct fdt_reserve_entry));
@@ -150,11 +111,22 @@ int fdt_create(void *buf, int bufsize)
 	if (bufsize < hdrsize)
 		return -FDT_ERR_NOSPACE;
 
+	if (flags & ~FDT_CREATE_FLAGS_ALL)
+		return -FDT_ERR_BADFLAGS;
+
 	memset(buf, 0, bufsize);
 
+	/*
+	 * magic and last_comp_version keep intermediate state during the fdt
+	 * creation process, which is replaced with the proper FDT format by
+	 * fdt_finish().
+	 *
+	 * flags should be accessed with sw_flags().
+	 */
 	fdt_set_magic(fdt, FDT_SW_MAGIC);
 	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
-	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
+	fdt_set_last_comp_version(fdt, flags);
+
 	fdt_set_totalsize(fdt,  bufsize);
 
 	fdt_set_off_mem_rsvmap(fdt, hdrsize);
@@ -164,6 +136,11 @@ int fdt_create(void *buf, int bufsize)
 	return 0;
 }
 
+int fdt_create(void *buf, int bufsize)
+{
+	return fdt_create_with_flags(buf, bufsize, 0);
+}
+
 int fdt_resize(void *fdt, void *buf, int bufsize)
 {
 	size_t headsize, tailsize;
@@ -262,19 +239,13 @@ int fdt_end_node(void *fdt)
 	return 0;
 }
 
-static int fdt_find_add_string_(void *fdt, const char *s)
+static int fdt_add_string_(void *fdt, const char *s)
 {
 	char *strtab = (char *)fdt + fdt_totalsize(fdt);
-	const char *p;
 	int strtabsize = fdt_size_dt_strings(fdt);
 	int len = strlen(s) + 1;
 	int struct_top, offset;
 
-	p = fdt_find_string_(strtab - strtabsize, strtabsize, s);
-	if (p)
-		return p - strtab;
-
-	/* Add it */
 	offset = -strtabsize - len;
 	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
 	if (fdt_totalsize(fdt) + offset < struct_top)
@@ -285,20 +256,56 @@ static int fdt_find_add_string_(void *fdt, const char *s)
 	return offset;
 }
 
+/* Must only be used to roll back in case of error */
+static void fdt_del_last_string_(void *fdt, const char *s)
+{
+	int strtabsize = fdt_size_dt_strings(fdt);
+	int len = strlen(s) + 1;
+
+	fdt_set_size_dt_strings(fdt, strtabsize - len);
+}
+
+static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
+{
+	char *strtab = (char *)fdt + fdt_totalsize(fdt);
+	int strtabsize = fdt_size_dt_strings(fdt);
+	const char *p;
+
+	*allocated = 0;
+
+	p = fdt_find_string_(strtab - strtabsize, strtabsize, s);
+	if (p)
+		return p - strtab;
+
+	*allocated = 1;
+
+	return fdt_add_string_(fdt, s);
+}
+
 int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
 {
 	struct fdt_property *prop;
 	int nameoff;
+	int allocated;
 
 	FDT_SW_PROBE_STRUCT(fdt);
 
-	nameoff = fdt_find_add_string_(fdt, name);
+	/* String de-duplication can be slow, _NO_NAME_DEDUP skips it */
+	if (sw_flags(fdt) & FDT_CREATE_FLAG_NO_NAME_DEDUP) {
+		allocated = 1;
+		nameoff = fdt_add_string_(fdt, name);
+	} else {
+		nameoff = fdt_find_add_string_(fdt, name, &allocated);
+	}
 	if (nameoff == 0)
 		return -FDT_ERR_NOSPACE;
 
 	prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
-	if (! prop)
+	if (! prop) {
+		if (allocated)
+			fdt_del_last_string_(fdt, name);
 		return -FDT_ERR_NOSPACE;
+	}
 
 	prop->tag = cpu_to_fdt32(FDT_PROP);
 	prop->nameoff = cpu_to_fdt32(nameoff);
@@ -360,6 +367,10 @@ int fdt_finish(void *fdt)
 
 	/* Finally, adjust the header */
 	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
+
+	/* And fix up fields that were keeping intermediate state. */
+	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
 	fdt_set_magic(fdt, FDT_MAGIC);
+
 	return 0;
 }
diff --git a/lib/utils/libfdt/fdt_wip.c b/lib/utils/libfdt/fdt_wip.c
index 534c1cbbb2f..f64139e0b3d 100644
--- a/lib/utils/libfdt/fdt_wip.c
+++ b/lib/utils/libfdt/fdt_wip.c
@@ -1,52 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include "libfdt_env.h"
 
diff --git a/lib/utils/libfdt/libfdt.h b/lib/utils/libfdt/libfdt.h
index a470d1df6d2..8037f391a59 100644
--- a/lib/utils/libfdt/libfdt.h
+++ b/lib/utils/libfdt/libfdt.h
@@ -1,54 +1,9 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
 #ifndef LIBFDT_H
 #define LIBFDT_H
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 #include <libfdt_env.h>
@@ -138,7 +93,15 @@
 	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
 	 * phandle available anymore without causing an overflow */
 
-#define FDT_ERR_MAX		17
+#define FDT_ERR_BADFLAGS	18
+	/* FDT_ERR_BADFLAGS: The function was passed a flags field that
+	 * contains invalid flags or an invalid combination of flags. */
+
+#define FDT_ERR_MAX		18
+
+/* constants */
+#define FDT_MAX_PHANDLE 0xfffffffe
+	/* Valid values for phandles range from 1 to 2^32-2. */
 
 /**********************************************************************/
 /* Low-level functions (you probably don't need these)                */
@@ -171,6 +134,16 @@ static inline uint32_t fdt32_ld(const fdt32_t *p)
 		| bp[3];
 }
 
+static inline void fdt32_st(void *property, uint32_t value)
+{
+	uint8_t *bp = property;
+
+	bp[0] = value >> 24;
+	bp[1] = (value >> 16) & 0xff;
+	bp[2] = (value >> 8) & 0xff;
+	bp[3] = value & 0xff;
+}
+
 static inline uint64_t fdt64_ld(const fdt64_t *p)
 {
 	const uint8_t *bp = (const uint8_t *)p;
@@ -185,6 +158,20 @@ static inline uint64_t fdt64_ld(const fdt64_t *p)
 		| bp[7];
 }
 
+static inline void fdt64_st(void *property, uint64_t value)
+{
+	uint8_t *bp = property;
+
+	bp[0] = value >> 56;
+	bp[1] = (value >> 48) & 0xff;
+	bp[2] = (value >> 40) & 0xff;
+	bp[3] = (value >> 32) & 0xff;
+	bp[4] = (value >> 24) & 0xff;
+	bp[5] = (value >> 16) & 0xff;
+	bp[6] = (value >> 8) & 0xff;
+	bp[7] = value & 0xff;
+}
+
 /**********************************************************************/
 /* Traversal functions                                                */
 /**********************************************************************/
@@ -361,6 +348,20 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp);
  */
 const char *fdt_string(const void *fdt, int stroffset);
 
+/**
+ * fdt_find_max_phandle - find and return the highest phandle in a tree
+ * @fdt: pointer to the device tree blob
+ * @phandle: return location for the highest phandle value found in the tree
+ *
+ * fdt_find_max_phandle() finds the highest phandle value in the given device
+ * tree. The value returned in @phandle is only valid if the function returns
+ * success.
+ *
+ * returns:
+ *     0 on success or a negative error code on failure
+ */
+int fdt_find_max_phandle(const void *fdt, uint32_t *phandle);
+
 /**
  * fdt_get_max_phandle - retrieves the highest phandle in a tree
  * @fdt: pointer to the device tree blob
@@ -369,12 +370,39 @@ const char *fdt_string(const void *fdt, int stroffset);
  * device tree. This will ignore badly formatted phandles, or phandles
  * with a value of 0 or -1.
  *
+ * This function is deprecated in favour of fdt_find_max_phandle().
+ *
  * returns:
  *      the highest phandle on success
  *      0, if no phandle was found in the device tree
  *      -1, if an error occurred
  */
-uint32_t fdt_get_max_phandle(const void *fdt);
+static inline uint32_t fdt_get_max_phandle(const void *fdt)
+{
+	uint32_t phandle;
+	int err;
+
+	err = fdt_find_max_phandle(fdt, &phandle);
+	if (err < 0)
+		return (uint32_t)-1;
+
+	return phandle;
+}
+
+/**
+ * fdt_generate_phandle - return a new, unused phandle for a device tree blob
+ * @fdt: pointer to the device tree blob
+ * @phandle: return location for the new phandle
+ *
+ * Walks the device tree blob and looks for the highest phandle value. On
+ * success, the new, unused phandle value (one higher than the previously
+ * highest phandle value in the device tree blob) will be returned in the
+ * @phandle parameter.
+ *
+ * Returns:
+ *   0 on success or a negative error-code on failure
+ */
+int fdt_generate_phandle(const void *fdt, uint32_t *phandle);
 
 /**
  * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
@@ -1360,7 +1388,45 @@ int fdt_nop_node(void *fdt, int nodeoffset);
 /* Sequential write functions                                         */
 /**********************************************************************/
 
+/* fdt_create_with_flags flags */
+#define FDT_CREATE_FLAG_NO_NAME_DEDUP 0x1
+	/* FDT_CREATE_FLAG_NO_NAME_DEDUP: Do not try to de-duplicate property
+	 * names in the fdt. This can result in faster creation times, but
+	 * a larger fdt. */
+
+#define FDT_CREATE_FLAGS_ALL	(FDT_CREATE_FLAG_NO_NAME_DEDUP)
+
+/**
+ * fdt_create_with_flags - begin creation of a new fdt
+ * @fdt: pointer to memory allocated where fdt will be created
+ * @bufsize: size of the memory space at fdt
+ * @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0.
+ *
+ * fdt_create_with_flags() begins the process of creating a new fdt with
+ * the sequential write interface.
+ *
+ * fdt creation process must end with fdt_finished() to produce a valid fdt.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt
+ *	-FDT_ERR_BADFLAGS, flags is not valid
+ */
+int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags);
+
+/**
+ * fdt_create - begin creation of a new fdt
+ * @fdt: pointer to memory allocated where fdt will be created
+ * @bufsize: size of the memory space at fdt
+ *
+ * fdt_create() is equivalent to fdt_create_with_flags() with flags=0.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt
+ */
 int fdt_create(void *buf, int bufsize);
+
 int fdt_resize(void *fdt, void *buf, int bufsize);
 int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
 int fdt_finish_reservemap(void *fdt);
@@ -1831,6 +1897,43 @@ static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
 #define fdt_appendprop_string(fdt, nodeoffset, name, str) \
 	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
 
+/**
+ * fdt_appendprop_addrrange - append a address range property
+ * @fdt: pointer to the device tree blob
+ * @parent: offset of the parent node
+ * @nodeoffset: offset of the node to add a property at
+ * @name: name of property
+ * @addr: start address of a given range
+ * @size: size of a given range
+ *
+ * fdt_appendprop_addrrange() appends an address range value (start
+ * address and size) to the value of the named property in the given
+ * node, or creates a new property with that value if it does not
+ * already exist.
+ * If "name" is not specified, a default "reg" is used.
+ * Cell sizes are determined by parent's #address-cells and #size-cells.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#address-cells property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADVALUE, addr or size doesn't fit to respective cells size
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain a new property
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset,
+			     const char *name, uint64_t addr, uint64_t size);
+
 /**
  * fdt_delprop - delete a property
  * @fdt: pointer to the device tree blob
diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index 415acff8c43..7fcfe01571e 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -1,55 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
 #ifndef LIBFDT_ENV_H
 #define LIBFDT_ENV_H
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
  * Copyright 2012 Kim Phillips, Freescale Semiconductor.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 #include <sbi/sbi_string.h>
diff --git a/lib/utils/libfdt/libfdt_internal.h b/lib/utils/libfdt/libfdt_internal.h
index 4109f890ae6..741eeb31502 100644
--- a/lib/utils/libfdt/libfdt_internal.h
+++ b/lib/utils/libfdt/libfdt_internal.h
@@ -1,54 +1,9 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
 #ifndef LIBFDT_INTERNAL_H
 #define LIBFDT_INTERNAL_H
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * libfdt is dual licensed: you can use it either under the terms of
- * the GPL, or the BSD license, at your option.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- *     You should have received a copy of the GNU General Public
- *     License along with this library; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
- * Alternatively,
- *
- *  b) Redistribution and use in source and binary forms, with or
- *     without modification, are permitted provided that the following
- *     conditions are met:
- *
- *     1. Redistributions of source code must retain the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer.
- *     2. Redistributions in binary form must reproduce the above
- *        copyright notice, this list of conditions and the following
- *        disclaimer in the documentation and/or other materials
- *        provided with the distribution.
- *
- *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
- *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <fdt.h>
 
@@ -56,11 +11,11 @@
 #define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
 
 int fdt_ro_probe_(const void *fdt);
-#define FDT_RO_PROBE(fdt)			\
-	{ \
-		int err_; \
-		if ((err_ = fdt_ro_probe_(fdt)) != 0)	\
-			return err_; \
+#define FDT_RO_PROBE(fdt)					\
+	{							\
+		int totalsize_;					\
+		if ((totalsize_ = fdt_ro_probe_(fdt)) < 0)	\
+			return totalsize_;			\
 	}
 
 int fdt_check_node_offset_(const void *fdt, int offset);
diff --git a/lib/utils/libfdt/version.lds b/lib/utils/libfdt/version.lds
index 9f5d70880f2..ae32924e85a 100644
--- a/lib/utils/libfdt/version.lds
+++ b/lib/utils/libfdt/version.lds
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
 LIBFDT_1.2 {
 	global:
 		fdt_next_node;
@@ -66,6 +67,15 @@ LIBFDT_1.2 {
 		fdt_resize;
 		fdt_overlay_apply;
 		fdt_get_string;
+		fdt_find_max_phandle;
+		fdt_generate_phandle;
+		fdt_check_full;
+		fdt_setprop_placeholder;
+		fdt_property_placeholder;
+		fdt_header_size_;
+		fdt_appendprop_addrrange;
+		fdt_setprop_inplace_namelen_partial;
+		fdt_create_with_flags;
 	local:
 		*;
 };

From f92147c2b2fd01bd32debe4d6cb0375705dceeac Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Mar 2020 19:08:08 +0530
Subject: [PATCH 0471/1765] include: Make sbi_hart_id_to_scratch() as macro

The sbi_hart_id_to_scratch() just forwards call to firmware specific
hartid_to_scratch() callback so we make sbi_hart_id_to_scratch() as
macro in sbi_scratch.h instead of regular function in sbi_hart.c.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_hart.h    | 3 ---
 include/sbi/sbi_scratch.h | 6 ++++++
 lib/sbi/sbi_hart.c        | 8 --------
 3 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index c999b58bc8d..d91e58f5b35 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -32,9 +32,6 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 		     unsigned long next_addr, unsigned long next_mode,
 		     bool next_virt);
 
-struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
-					   u32 hartid);
-
 u32 sbi_current_hartid(void);
 
 #endif
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 1c85562b71a..8960c02160d 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -103,6 +103,12 @@ void sbi_scratch_free_offset(unsigned long offset);
 #define sbi_scratch_thishart_offset_ptr(offset)	\
 	((void *)sbi_scratch_thishart_ptr() + (offset))
 
+typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid);
+
+/** Get sbi_scratch from HART id */
+#define sbi_hart_id_to_scratch(__scratch, __hartid) \
+	((hartid2scratch)(__scratch)->hartid_to_scratch)(__hartid)
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 732ff5fc93d..f61a82f379f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -340,11 +340,3 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	__asm__ __volatile__("mret" : : "r"(a0), "r"(a1));
 	__builtin_unreachable();
 }
-
-typedef struct sbi_scratch *(*h2s)(ulong hartid);
-
-struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
-					   u32 hartid)
-{
-	return ((h2s)scratch->hartid_to_scratch)(hartid);
-}

From eeae3d95827ec33e74d853596b89ee49d83ff751 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Mar 2020 19:25:24 +0530
Subject: [PATCH 0472/1765] firmware: fw_base: Optimize _hartid_to_scratch()
 implementation

This patch optimizes _hartid_to_scratch() in following ways:
1. Use caller saved registers instead of callee saved registers
   so that we don't need to save/restore registers on stack
2. Remove second redundant mul instruction by re-arranging
   instructions

Overall, we reduce 9 instructions in _hartid_to_scratch()
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 firmware/fw_base.S | 37 ++++++++++++++-----------------------
 1 file changed, 14 insertions(+), 23 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 119622c67c4..dbe5b108dc8 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -409,35 +409,26 @@ _link_end:
 	.align 3
 	.globl _hartid_to_scratch
 _hartid_to_scratch:
-	add	sp, sp, -(3 * __SIZEOF_POINTER__)
-	REG_S	s0, (sp)
-	REG_S	s1, (__SIZEOF_POINTER__)(sp)
-	REG_S	s2, (__SIZEOF_POINTER__ * 2)(sp)
 	/*
 	 * a0 -> HART ID (passed by caller)
-	 * s0 -> HART Stack Size
-	 * s1 -> HART Stack End
-	 * s2 -> Temporary
+	 * t0 -> HART Stack Size
+	 * t1 -> HART Stack End
+	 * t2 -> Temporary
 	 */
-	la	s2, platform
+	la	t2, platform
 #if __riscv_xlen == 64
-	lwu	s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
-	lwu	s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+	lwu	t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
+	lwu	t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
 #else
-	lw	s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
-	lw	s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+	lw	t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
+	lw	t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
 #endif
-	mul	s2, s2, s0
-	la	s1, _fw_end
-	add	s1, s1, s2
-	mul	s2, s0, a0
-	sub	s1, s1, s2
-	li	s2, SBI_SCRATCH_SIZE
-	sub	a0, s1, s2
-	REG_L	s0, (sp)
-	REG_L	s1, (__SIZEOF_POINTER__)(sp)
-	REG_L	s2, (__SIZEOF_POINTER__ * 2)(sp)
-	add	sp, sp, (3 * __SIZEOF_POINTER__)
+	sub	t2, t2, a0
+	mul	t2, t2, t0
+	la	t1, _fw_end
+	add	t1, t1, t2
+	li	t2, SBI_SCRATCH_SIZE
+	sub	a0, t1, t2
 	ret
 
 	.section .entry, "ax", %progbits

From 16e7071f6ddd5ba69d416b5a68e4aa191fc19d3b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Mar 2020 19:34:39 +0530
Subject: [PATCH 0473/1765] lib: sbi_hsm: Optimize sbi_hsm_hart_get_state()
 implementation

Now that sbi_hart_id_to_scratch() is optimized, we don't need
the "if ()" statement. Also, the hstate local variable is
redundant so we remove that as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 713dbaf9c66..5fd785589b3 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -58,15 +58,11 @@ int sbi_hsm_hart_state_to_status(int state)
 int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
-	u32 hstate;
-
-	if (hartid != sbi_current_hartid())
-		scratch = sbi_hart_id_to_scratch(scratch, hartid);
 
+	scratch = sbi_hart_id_to_scratch(scratch, hartid);
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
-	hstate = atomic_read(&hdata->state);
 
-	return hstate;
+	return atomic_read(&hdata->state);
 }
 
 bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)

From 823345ecaed0deb7770d9bac1c881004a6410e91 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 12 Mar 2020 10:21:25 +0530
Subject: [PATCH 0474/1765] include: Make sbi_current_hartid() as macro in
 riscv_asm.h

The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h           |  2 ++
 include/sbi/sbi_hart.h            |  2 --
 lib/sbi/sbi_ecall_legacy.c        |  3 ++-
 lib/sbi/sbi_ecall_replace.c       |  4 ++--
 lib/sbi/sbi_hart.c                |  8 --------
 lib/sbi/sbi_hsm.c                 |  4 ++--
 lib/sbi/sbi_init.c                |  4 ++--
 lib/sbi/sbi_ipi.c                 |  2 +-
 lib/sbi/sbi_system.c              | 13 +++++++------
 lib/sbi/sbi_tlb.c                 |  2 +-
 lib/sbi/sbi_trap.c                |  2 +-
 lib/utils/sys/clint.c             | 12 ++++++------
 platform/andes/ae350/platform.c   |  4 ++--
 platform/andes/ae350/plicsw.c     | 12 ++++++------
 platform/andes/ae350/plmt.c       |  8 ++++----
 platform/ariane-fpga/platform.c   |  3 ++-
 platform/kendryte/k210/platform.c |  4 ++--
 platform/qemu/virt/platform.c     |  3 ++-
 platform/sifive/fu540/platform.c  |  6 +++---
 platform/template/platform.c      |  3 ++-
 20 files changed, 49 insertions(+), 52 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 4445fa16bfb..0d675f65838 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -157,6 +157,8 @@ void csr_write_num(int csr_num, unsigned long val);
 		__asm__ __volatile__("wfi" ::: "memory"); \
 	} while (0)
 
+/* Get current HART id */
+#define current_hartid()	((unsigned int)csr_read(CSR_MHARTID))
 
 /* determine CPU extension, return non-zero support */
 int misa_extension_imp(char ext);
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index d91e58f5b35..fb4a955a78e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -32,6 +32,4 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 		     unsigned long next_addr, unsigned long next_mode,
 		     bool next_virt);
 
-u32 sbi_current_hartid(void);
-
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 9099ee3b7a9..cffef23c8b5 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -8,6 +8,7 @@
  *   Atish Patra <atish.patra@wdc.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
@@ -46,7 +47,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
-	u32 source_hart = sbi_current_hartid();
+	u32 source_hart = current_hartid();
 	ulong hmask = 0;
 
 	switch (extid) {
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 57760f86d0b..21f3809bc17 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -8,6 +8,7 @@
  *   Atish Patra <atish.patra@wdc.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
@@ -15,7 +16,6 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
-#include <sbi/riscv_asm.h>
 
 static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
 				  unsigned long extid, unsigned long funcid,
@@ -50,7 +50,7 @@ static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
-	u32 source_hart = sbi_current_hartid();
+	u32 source_hart = current_hartid();
 
 	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
 	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index f61a82f379f..aa326154e19 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -17,14 +17,6 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 
-/**
- * Return HART ID of the caller.
- */
-unsigned int sbi_current_hartid()
-{
-	return (u32)csr_read(CSR_MHARTID);
-}
-
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 5fd785589b3..bd58782b0bd 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -204,7 +204,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 
 fail_exit:
 	/* It should never reach here */
-	sbi_printf("ERR: Failed stop hart [%u]\n", sbi_current_hartid());
+	sbi_printf("ERR: Failed stop hart [%u]\n", current_hartid());
 	sbi_hart_hang();
 }
 
@@ -256,7 +256,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 {
 	int oldstate;
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e7afa1e4119..11882d619f7 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -273,7 +273,7 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
 	bool coldboot			= FALSE;
-	u32 hartid			= sbi_current_hartid();
+	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
@@ -316,7 +316,7 @@ unsigned long sbi_init_count(u32 hartid)
  */
 void __noreturn sbi_exit(struct sbi_scratch *scratch)
 {
-	u32 hartid			= sbi_current_hartid();
+	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (sbi_platform_hart_disabled(plat, hartid))
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 144b04ad666..0781b74fcff 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -176,7 +176,7 @@ void sbi_ipi_process(struct sbi_scratch *scratch)
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
 
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	sbi_platform_ipi_clear(plat, hartid);
 
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 461e47030f7..061cbf68c29 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -8,6 +8,7 @@
  *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hsm.h>
@@ -39,12 +40,12 @@ void sbi_system_final_exit(struct sbi_scratch *scratch)
 void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 {
 	ulong hbase = 0, hmask;
-	u32 current_hartid = sbi_current_hartid();
+	u32 cur_hartid = current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
 	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
-		if (hbase <= current_hartid)
-			hmask &= ~(1UL << (current_hartid - hbase));
+		if (hbase <= cur_hartid)
+			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
 			sbi_ipi_send_halt(scratch, hmask, hbase);
 		hbase += BITS_PER_LONG;
@@ -63,12 +64,12 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 {
 	ulong hbase = 0, hmask;
-	u32 current_hartid = sbi_current_hartid();
+	u32 cur_hartid = current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
 	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
-		if (hbase <= current_hartid)
-			hmask &= ~(1UL << (current_hartid - hbase));
+		if (hbase <= cur_hartid)
+			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
 			sbi_ipi_send_halt(scratch, hmask, hbase);
 		hbase += BITS_PER_LONG;
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 3cae7eec81d..a46ddfe998a 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -319,7 +319,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 	int ret;
 	struct sbi_fifo *tlb_fifo_r;
 	struct sbi_tlb_info *tinfo = data;
-	u32 curr_hartid = sbi_current_hartid();
+	u32 curr_hartid = current_hartid();
 
 	/*
 	 * If address range to flush is too big then simply
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b5fbc5ea1ee..b4ba2aca124 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -217,7 +217,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 {
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
 	ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
 	struct sbi_trap_info trap, *uptrap;
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index ec855073bb2..22ba088e742 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -7,9 +7,9 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/riscv_io.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
-#include <sbi/sbi_hart.h>
+#include <sbi/riscv_io.h>
 #include <sbi_utils/sys/clint.h>
 
 static u32 clint_ipi_hart_count;
@@ -36,7 +36,7 @@ void clint_ipi_clear(u32 target_hart)
 
 int clint_warm_ipi_init(void)
 {
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 
 	if (!clint_ipi_base)
 		return -1;
@@ -105,7 +105,7 @@ u64 clint_timer_value(void)
 
 void clint_timer_event_stop(void)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (clint_time_hart_count <= target_hart)
 		return;
@@ -116,7 +116,7 @@ void clint_timer_event_stop(void)
 
 void clint_timer_event_start(u64 next_event)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (clint_time_hart_count <= target_hart)
 		return;
@@ -127,7 +127,7 @@ void clint_timer_event_start(u64 next_event)
 
 int clint_warm_timer_init(void)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (clint_time_hart_count <= target_hart || !clint_time_base)
 		return -1;
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 08db3ebcc9e..b85cec4b602 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -8,9 +8,9 @@
  *   Nylon Chen <nylon7@andestech.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_console.h>
 #include <sbi_utils/serial/uart8250.h>
@@ -94,7 +94,7 @@ static int ae350_console_init(void)
 /* Initialize the platform interrupt controller for current HART. */
 static int ae350_irqchip_init(bool cold_boot)
 {
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	int ret;
 
 	if (cold_boot) {
diff --git a/platform/andes/ae350/plicsw.c b/platform/andes/ae350/plicsw.c
index 17fe9478b3b..d07df28c802 100644
--- a/platform/andes/ae350/plicsw.c
+++ b/platform/andes/ae350/plicsw.c
@@ -8,9 +8,9 @@
  *   Nylon Chen <nylon7@andestech.com>
  */
 
-#include <sbi/sbi_types.h>
-#include <sbi/sbi_hart.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_types.h>
 #include "plicsw.h"
 #include "platform.h"
 
@@ -19,7 +19,7 @@ static struct plicsw plicsw_dev[AE350_HART_COUNT];
 
 static inline void plicsw_claim(void)
 {
-	u32 source_hart = sbi_current_hartid();
+	u32 source_hart = current_hartid();
 
 	plicsw_dev[source_hart].source_id =
 		readl(plicsw_dev[source_hart].plicsw_claim);
@@ -27,7 +27,7 @@ static inline void plicsw_claim(void)
 
 static inline void plicsw_complete(void)
 {
-	u32 source_hart = sbi_current_hartid();
+	u32 source_hart = current_hartid();
 	u32 source = plicsw_dev[source_hart].source_id;
 
 	writel(source, plicsw_dev[source_hart].plicsw_claim);
@@ -61,7 +61,7 @@ static inline void plic_sw_pending(u32 target_hart)
 	 * The bit 5 is used to send IPI to hart 2
 	 * The bit 4 is used to send IPI to hart 3
 	 */
-	u32 source_hart = sbi_current_hartid();
+	u32 source_hart = current_hartid();
 	u32 target_offset = (PLICSW_PENDING_PER_HART - 1) - target_hart;
 	u32 per_hart_offset = PLICSW_PENDING_PER_HART * source_hart;
 	u32 val = 1 << target_offset << per_hart_offset;
@@ -90,7 +90,7 @@ void plicsw_ipi_clear(u32 target_hart)
 
 int plicsw_warm_ipi_init(void)
 {
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 
 	if (!plicsw_dev[hartid].plicsw_pending
 	    && !plicsw_dev[hartid].plicsw_enable
diff --git a/platform/andes/ae350/plmt.c b/platform/andes/ae350/plmt.c
index db8081358a9..3848e158dd5 100644
--- a/platform/andes/ae350/plmt.c
+++ b/platform/andes/ae350/plmt.c
@@ -8,8 +8,8 @@
  *   Nylon Chen <nylon7@andestech.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
-#include <sbi/sbi_hart.h>
 
 static u32 plmt_time_hart_count;
 static volatile void *plmt_time_base;
@@ -34,7 +34,7 @@ u64 plmt_timer_value(void)
 
 void plmt_timer_event_stop(void)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (plmt_time_hart_count <= target_hart)
 		return;
@@ -50,7 +50,7 @@ void plmt_timer_event_stop(void)
 
 void plmt_timer_event_start(u64 next_event)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (plmt_time_hart_count <= target_hart)
 		return;
@@ -70,7 +70,7 @@ void plmt_timer_event_start(u64 next_event)
 
 int plmt_warm_timer_init(void)
 {
-	u32 target_hart = sbi_current_hartid();
+	u32 target_hart = current_hartid();
 
 	if (plmt_time_hart_count <= target_hart || !plmt_time_base)
 		return -1;
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index d5d0fbcf0b5..cc8429be7aa 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -4,6 +4,7 @@
  *				Panagiotis Peristerakis <perister@ics.forth.gr>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
@@ -105,7 +106,7 @@ static int plic_ariane_warm_irqchip_init(u32 target_hart,
  */
 static int ariane_irqchip_init(bool cold_boot)
 {
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	int ret;
 
 	if (cold_boot) {
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 1b49b39d77f..00b38f7020a 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -7,9 +7,9 @@
  *   Damien Le Moal <damien.lemoal@wdc.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_console.h>
 #include <sbi_utils/irqchip/plic.h>
@@ -55,7 +55,7 @@ static int k210_console_init(void)
 static int k210_irqchip_init(bool cold_boot)
 {
 	int rc;
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index d2c841cf406..fdc5a2c70f6 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -8,6 +8,7 @@
  *   Nick Kossifidis <mick@ics.forth.gr>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_const.h>
@@ -84,7 +85,7 @@ static int virt_console_init(void)
 static int virt_irqchip_init(bool cold_boot)
 {
 	int rc;
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 4a8c016f94f..848261c3d5b 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -9,12 +9,12 @@
 
 #include <libfdt.h>
 #include <fdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/riscv_io.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
 #include <sbi_utils/sys/clint.h>
@@ -148,7 +148,7 @@ static int fu540_console_init(void)
 static int fu540_irqchip_init(bool cold_boot)
 {
 	int rc;
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index c98bbffa4ea..60b65ea9135 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -4,6 +4,7 @@
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
@@ -82,7 +83,7 @@ static int platform_console_getc(void)
  */
 static int platform_irqchip_init(bool cold_boot)
 {
-	u32 hartid = sbi_current_hartid();
+	u32 hartid = current_hartid();
 	int ret;
 
 	/* Example if the generic PLIC driver is used */

From 9aabba2665f0e58df97d4fbf85d1b5a1b29a2e29 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Mar 2020 19:56:45 +0530
Subject: [PATCH 0475/1765] Makefile: Fix distclean make target

The default install directory is not being removed correctly by
distclean make target due to recent changes. This patch fixes
distclean make target to fix default install directory removal.

Fixes: 82ae8e8fe2a3 ("makefile: Do setup of the install target
more flexible")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index 58a2807270a..fe44ceb32f4 100644
--- a/Makefile
+++ b/Makefile
@@ -29,10 +29,11 @@ endif
 ifeq ($(build_dir),$(CURDIR))
 $(error Build directory is same as source directory.)
 endif
+install_root_dir_default=$(CURDIR)/install
 ifdef I
  install_root_dir=$(shell $(READLINK) -f $(I))
 else
- install_root_dir=$(CURDIR)/install/usr
+ install_root_dir=$(install_root_dir_default)/usr
 endif
 ifeq ($(install_root_dir),$(CURDIR))
 $(error Install root directory is same as source directory.)
@@ -456,7 +457,7 @@ ifeq ($(build_dir),$(CURDIR)/build)
 	$(if $(V), @echo " RM        $(build_dir)")
 	$(CMD_PREFIX)rm -rf $(build_dir)
 endif
-ifeq ($(install_root_dir),$(CURDIR)/install)
-	$(if $(V), @echo " RM        $(install_root_dir)")
-	$(CMD_PREFIX)rm -rf $(install_root_dir)
+ifeq ($(install_root_dir),$(install_root_dir_default)/usr)
+	$(if $(V), @echo " RM        $(install_root_dir_default)")
+	$(CMD_PREFIX)rm -rf $(install_root_dir_default)
 endif

From 9275ed39492a3924a780a24a2c85b97807726965 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 12 Mar 2020 22:39:52 -0700
Subject: [PATCH 0476/1765] platform: ariane-fpga: Set per-HART stack size to
 8KB

Recent commit

  4a603eb ("platform: kendryte/k210: Set per-HART stack size to 8KB")

forgot to update ariane-fpga codes, and the following commit

  678c3c3 ("include: sbi_scratch: Set per-HART scratch size to 4KB")

changed the per-HART scratch size to 4KB, which potentially breaks
ariane-fpga platform.

This patch set per-HART stack size of ariane-fpga to 8KB for consistency.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/ariane-fpga/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index cc8429be7aa..9d9207e7682 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -201,6 +201,6 @@ const struct sbi_platform platform = {
 	.name = "ARIANE RISC-V",
 	.features = SBI_ARIANE_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
-	.hart_stack_size = 4096,
+	.hart_stack_size = 8192,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };

From 2343efd0401c329187f1375114b79dd2fb102e55 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 12 Mar 2020 22:39:53 -0700
Subject: [PATCH 0477/1765] platform: Set per-HART stack size to 8KB in the
 template platform codes

The template platform codes should set per-HART stack size to 8KB
to avoid possible mistakes of future platform ports.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/template/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index 60b65ea9135..74ac9f4678f 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -223,6 +223,6 @@ const struct sbi_platform platform = {
 	.name			= "platform-name",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= 1,
-	.hart_stack_size	= 4096,
+	.hart_stack_size	= 8192,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 72a0628c7e8063f1e6c02541cbd459eff617dd07 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 12 Mar 2020 22:39:54 -0700
Subject: [PATCH 0478/1765] platform: Use one unified per-HART stack size macro
 for all platforms

As of today all platforms use 8KB of per-HART stack hence there is
no need for each platform to define its own macro or use the magic
number. Create one macro for all platforms. Platform still can use
its own version if needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h        | 3 +++
 platform/andes/ae350/platform.c   | 2 +-
 platform/andes/ae350/platform.h   | 1 -
 platform/ariane-fpga/platform.c   | 2 +-
 platform/kendryte/k210/platform.c | 2 +-
 platform/kendryte/k210/platform.h | 1 -
 platform/qemu/virt/platform.c     | 3 +--
 platform/sifive/fu540/platform.c  | 3 +--
 platform/spike/platform.c         | 3 +--
 platform/template/platform.c      | 2 +-
 platform/thead/c910/platform.c    | 2 +-
 platform/thead/c910/platform.h    | 1 -
 12 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e4f1a7dbd92..bc7991c0312 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -161,6 +161,9 @@ struct sbi_platform_operations {
 				   struct sbi_trap_info *out_trap);
 } __packed;
 
+/** Platform default per-HART stack size for exception/interrupt handling */
+#define SBI_PLATFORM_DEFAULT_HART_STACK_SIZE	8192
+
 /** Representation of a platform */
 struct sbi_platform {
 	/**
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index b85cec4b602..db5b46ecb97 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -186,6 +186,6 @@ const struct sbi_platform platform = {
 	.name = "Andes AE350",
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = AE350_HART_COUNT,
-	.hart_stack_size = AE350_HART_STACK_SIZE,
+	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index eff29963586..062b656b8ae 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -12,7 +12,6 @@
 #define _AE350_PLATFORM_H_
 
 #define AE350_HART_COUNT		4
-#define AE350_HART_STACK_SIZE		8192
 
 #define AE350_PLIC_ADDR			0xe4000000
 #define AE350_PLIC_NUM_SOURCES		71
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 9d9207e7682..d2b6de97155 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -201,6 +201,6 @@ const struct sbi_platform platform = {
 	.name = "ARIANE RISC-V",
 	.features = SBI_ARIANE_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
-	.hart_stack_size = 8192,
+	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 00b38f7020a..2044307c287 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -138,6 +138,6 @@ const struct sbi_platform platform = {
 	.name			= "Kendryte K210",
 	.features		= SBI_PLATFORM_HAS_TIMER_VALUE,
 	.hart_count		= K210_HART_COUNT,
-	.hart_stack_size	= K210_HART_STACK_SIZE,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 8e4664f5fb0..5269bc4fd3a 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -12,7 +12,6 @@
 #include <sbi/riscv_io.h>
 
 #define K210_HART_COUNT		2
-#define K210_HART_STACK_SIZE	8192
 
 #define K210_UART_BAUDRATE	115200
 
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index fdc5a2c70f6..92f34aa2d37 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -21,7 +21,6 @@
 /* clang-format off */
 
 #define VIRT_HART_COUNT			8
-#define VIRT_HART_STACK_SIZE		8192
 
 #define VIRT_TEST_ADDR			0x100000
 #define VIRT_TEST_FINISHER_FAIL		0x3333
@@ -159,6 +158,6 @@ const struct sbi_platform platform = {
 	.name			= "QEMU Virt Machine",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= VIRT_HART_COUNT,
-	.hart_stack_size	= VIRT_HART_STACK_SIZE,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 848261c3d5b..1cc1f27fbd5 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -22,7 +22,6 @@
 /* clang-format off */
 
 #define FU540_HART_COUNT			5
-#define FU540_HART_STACK_SIZE			8192
 
 #define FU540_SYS_CLK				1000000000
 
@@ -232,6 +231,6 @@ const struct sbi_platform platform = {
 	.name			= "SiFive Freedom U540",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= FU540_HART_COUNT,
-	.hart_stack_size	= FU540_HART_STACK_SIZE,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
index 2b9b041ecd2..25e5765a298 100644
--- a/platform/spike/platform.c
+++ b/platform/spike/platform.c
@@ -11,7 +11,6 @@
 /* clang-format off */
 
 #define SPIKE_HART_COUNT			8
-#define SPIKE_HART_STACK_SIZE			8192
 
 #define SPIKE_CLINT_ADDR			0x2000000
 
@@ -109,6 +108,6 @@ const struct sbi_platform platform = {
 	.name			= "Spike",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= SPIKE_HART_COUNT,
-	.hart_stack_size	= SPIKE_HART_STACK_SIZE,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 74ac9f4678f..d09b8bd7b10 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -223,6 +223,6 @@ const struct sbi_platform platform = {
 	.name			= "platform-name",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= 1,
-	.hart_stack_size	= 8192,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 482caad1bb2..ca2e0e2b774 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -152,6 +152,6 @@ const struct sbi_platform platform = {
 	.name                = "T-HEAD Xuantie c910",
 	.features            = SBI_THEAD_FEATURES,
 	.hart_count          = C910_HART_COUNT,
-	.hart_stack_size     = C910_HART_STACK_SIZE,
+	.hart_stack_size     = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr   = (unsigned long)&platform_ops
 };
diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
index 5dcfae88f8b..5e74128a40c 100644
--- a/platform/thead/c910/platform.h
+++ b/platform/thead/c910/platform.h
@@ -6,7 +6,6 @@
 #define _C910_PLATFORM_H_
 
 #define C910_HART_COUNT   16
-#define C910_HART_STACK_SIZE   8192
 
 #define SBI_THEAD_FEATURES	\
 	(SBI_PLATFORM_HAS_SCOUNTEREN | \

From 327ba362119a9cb36ff03575723546d8abcb5465 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 16 Mar 2020 02:43:46 -0700
Subject: [PATCH 0479/1765] scripts: Cover sifive/fu540 in the 32-bit build

We now support building sifive/fu540 as a 32-bit platform. Add it
in the 32-bit platform list of binary archive script.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 4a143186269..48f8a203971 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -85,6 +85,7 @@ case "${BUILD_RISCV_XLEN}" in
 32)
 	# Setup 32-bit platform list
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
+	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	;;
 64)
 	# Setup 64-bit platform list

From 5fbcd625bc8f8980164b4c905dc8097269461419 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:38 -0700
Subject: [PATCH 0480/1765] lib: sbi: Update pmp_get() to return decoded size
 directly

Currently pmp_get() returns the log2 length of the PMP memory
region size. The caller has to calculate the size based on that
and the same codes are duplicated.

Update this function to return decoded size directly.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h |  2 +-
 lib/sbi/riscv_asm.c     | 10 ++++++----
 lib/sbi/sbi_hart.c      | 16 ++++------------
 3 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 0d675f65838..6c5c72990ef 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -191,7 +191,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len);
 
 int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
-	    unsigned long *log2len_out);
+	    unsigned long *size);
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 79c45f5d22c..24f87710e74 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -249,16 +249,16 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 }
 
 int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
-	    unsigned long *log2len_out)
+	    unsigned long *size)
 {
 	int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
 	unsigned long cfgmask, pmpcfg, prot;
 	unsigned long t1, addr, log2len;
 
 	/* check parameters */
-	if (n >= PMP_COUNT || !prot_out || !addr_out || !log2len_out)
+	if (n >= PMP_COUNT || !prot_out || !addr_out || !size)
 		return SBI_EINVAL;
-	*prot_out = *addr_out = *log2len_out = 0;
+	*prot_out = *addr_out = *size = 0;
 
 	/* calculate PMP register and offset */
 #if __riscv_xlen == 32
@@ -299,7 +299,9 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 	/* return details */
 	*prot_out    = prot;
 	*addr_out    = addr;
-	*log2len_out = log2len;
+
+	if (log2len < __riscv_xlen)
+		*size = (1UL << log2len);
 
 	return 0;
 }
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index aa326154e19..e71725ceb63 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -125,20 +125,16 @@ unsigned long log2roundup(unsigned long x)
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	unsigned long prot, addr, size, l2l;
+	unsigned long prot, addr, size;
 	unsigned int i;
 
 	if (!sbi_platform_has_pmp(plat))
 		return;
 
 	for (i = 0; i < PMP_COUNT; i++) {
-		pmp_get(i, &prot, &addr, &l2l);
+		pmp_get(i, &prot, &addr, &size);
 		if (!(prot & PMP_A))
 			continue;
-		if (l2l < __riscv_xlen)
-			size = (1UL << l2l);
-		else
-			size = 0;
 #if __riscv_xlen == 32
 		sbi_printf("PMP%d    : 0x%08lx-0x%08lx (A",
 #else
@@ -160,20 +156,16 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 			    unsigned long attr)
 {
-	unsigned long prot, size, l2l, i, tempaddr;
+	unsigned long prot, size, i, tempaddr;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (!sbi_platform_has_pmp(plat))
 		return SBI_OK;
 
 	for (i = 0; i < PMP_COUNT; i++) {
-		pmp_get(i, &prot, &tempaddr, &l2l);
+		pmp_get(i, &prot, &tempaddr, &size);
 		if (!(prot & PMP_A))
 			continue;
-		if (l2l < __riscv_xlen)
-			size = (1UL << l2l);
-		else
-			size = 0;
 		if (tempaddr <= addr && addr <= tempaddr + size)
 			if (!(prot & attr))
 				return SBI_INVALID_ADDR;

From dce88467af77ed60e7b31ab3a9423fe640b8553c Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:39 -0700
Subject: [PATCH 0481/1765] libfdt: Compile fdt_addresses.c

Pull fdt_addresses.o in for fdt_address_cells() & fdt_size_cells().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/libfdt/objects.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
index 6e8149dcf53..8156cdee95a 100644
--- a/lib/utils/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -7,8 +7,8 @@
 #   Atish Patra<atish.patra@wdc.com>
 #
 
-libfdt_files = fdt.o fdt_empty_tree.o fdt_ro.o fdt_rw.o fdt_strerror.o \
-               fdt_sw.o fdt_wip.o
+libfdt_files = fdt.o fdt_addresses.o fdt_empty_tree.o fdt_ro.o fdt_rw.o \
+               fdt_strerror.o fdt_sw.o fdt_wip.o
 $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
 

From fcb1dedb2d4d2f2d77a165b1078244caf13363be Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:40 -0700
Subject: [PATCH 0482/1765] lib: utils: Add a fdt_reserved_memory_fixup()
 helper

Add a helper routine to insert a child node of the reserved memory
node in the device tree that describes the protected memory region
done by OpenSBI via PMP.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  25 +++++
 lib/utils/fdt/fdt_helper.c         | 142 +++++++++++++++++++++++++++++
 lib/utils/fdt/objects.mk           |   7 ++
 3 files changed, 174 insertions(+)
 create mode 100644 include/sbi_utils/fdt/fdt_helper.h
 create mode 100644 lib/utils/fdt/fdt_helper.c
 create mode 100644 lib/utils/fdt/objects.mk

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
new file mode 100644
index 00000000000..a6c30735d8c
--- /dev/null
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_helper.h - Flat Device Tree manipulation helper routines
+ * Implement helper routines on top of libfdt for OpenSBI usage
+ *
+ * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FDT_HELPER_H__
+#define __FDT_HELPER_H__
+
+/**
+ * Fix up the reserved memory node in the device tree
+ *
+ * This routine inserts a child node of the reserved memory node in the device
+ * tree that describes the protected memory region done by OpenSBI via PMP.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ * @return zero on success and -ve on failure
+ */
+int fdt_reserved_memory_fixup(void *fdt);
+
+#endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
new file mode 100644
index 00000000000..d95a056b441
--- /dev/null
+++ b/lib/utils/fdt/fdt_helper.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_helper.c - Flat Device Tree manipulation helper routines
+ * Implement helper routines on top of libfdt for OpenSBI usage
+ *
+ * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+
+/**
+ * We use PMP to protect OpenSBI firmware to safe-guard it from buggy S-mode
+ * software, see pmp_init() in lib/sbi/sbi_hart.c. The protected memory region
+ * information needs to be conveyed to S-mode software (e.g.: operating system)
+ * via some well-known method.
+ *
+ * With device tree, this can be done by inserting a child node of the reserved
+ * memory node which is used to specify one or more regions of reserved memory.
+ *
+ * For the reserved memory node bindings, see Linux kernel documentation at
+ * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
+ *
+ * Some additional memory spaces may be protected by platform codes via PMP as
+ * well, and corresponding child nodes will be inserted.
+ */
+int fdt_reserved_memory_fixup(void *fdt)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	unsigned long prot, addr, size;
+	int na = fdt_address_cells(fdt, 0);
+	int ns = fdt_size_cells(fdt, 0);
+	fdt32_t addr_high, addr_low;
+	fdt32_t size_high, size_low;
+	fdt32_t reg[4];
+	fdt32_t *val;
+	char name[32];
+	int parent, subnode;
+	int i, j;
+	int err;
+
+	if (!sbi_platform_has_pmp(plat))
+		return 0;
+
+	/* expand the device tree to accommodate new node */
+	err  = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 256);
+	if (err < 0)
+		return err;
+
+	/* try to locate the reserved memory node */
+	parent = fdt_path_offset(fdt, "/reserved-memory");
+	if (parent < 0) {
+		/* if such node does not exist, create one */
+		parent = fdt_add_subnode(fdt, 0, "reserved-memory");
+		if (parent < 0)
+			return parent;
+
+		/*
+		 * reserved-memory node has 3 required properties:
+		 * - #address-cells: the same value as the root node
+		 * - #size-cells: the same value as the root node
+		 * - ranges: should be empty
+		 */
+
+		err = fdt_setprop_empty(fdt, parent, "ranges");
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#size-cells", ns);
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#address-cells", na);
+		if (err < 0)
+			return err;
+	}
+
+	/*
+	 * We assume the given device tree does not contain any memory region
+	 * child node protected by PMP. Normally PMP programming happens at
+	 * M-mode firmware. The memory space used by OpenSBI is protected.
+	 * Some additional memory spaces may be protected by platform codes.
+	 *
+	 * With above assumption, we create child nodes directly.
+	 */
+
+	for (i = 0, j = 0; i < PMP_COUNT; i++) {
+		pmp_get(i, &prot, &addr, &size);
+		if (!(prot & PMP_A))
+			continue;
+		if (!(prot & (PMP_R | PMP_W | PMP_X))) {
+			addr_high = (u64)addr >> 32;
+			addr_low = addr;
+			size_high = (u64)size >> 32;
+			size_low = size;
+
+			if (na > 1 && addr_high)
+				sbi_snprintf(name, sizeof(name),
+					     "mmode_pmp%d@%x,%x", j,
+					     addr_high, addr_low);
+			else
+				sbi_snprintf(name, sizeof(name),
+					     "mmode_pmp%d@%x", j,
+					     addr_low);
+
+			subnode = fdt_add_subnode(fdt, parent, name);
+			if (subnode < 0)
+				return subnode;
+
+			/*
+			 * Tell operating system not to create a virtual
+			 * mapping of the region as part of its standard
+			 * mapping of system memory.
+			 */
+			err = fdt_setprop_empty(fdt, subnode, "no-map");
+			if (err < 0)
+				return err;
+
+			/* encode the <reg> property value */
+			val = reg;
+			if (na > 1)
+				*val++ = cpu_to_fdt32(addr_high);
+			*val++ = cpu_to_fdt32(addr_low);
+			if (ns > 1)
+				*val++ = cpu_to_fdt32(size_high);
+			*val++ = cpu_to_fdt32(size_low);
+
+			err = fdt_setprop(fdt, subnode, "reg", reg,
+					  (na + ns) * sizeof(fdt32_t));
+			if (err < 0)
+				return err;
+
+			j++;
+		}
+	}
+
+	return 0;
+}
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
new file mode 100644
index 00000000000..062e6bdeba8
--- /dev/null
+++ b/lib/utils/fdt/objects.mk
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
+#
+
+libsbiutils-objs-y += fdt/fdt_helper.o

From 666be6d62beffc380faf8700cc532142222826d8 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:41 -0700
Subject: [PATCH 0483/1765] platform: Clean up include header files

Adjust the order of include header files in alphabetical order in
platform codes. Also remove unnecessary inclusions.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/andes/ae350/platform.c   | 6 +++---
 platform/ariane-fpga/platform.c   | 9 +++------
 platform/kendryte/k210/platform.c | 4 ++--
 platform/sifive/fu540/platform.c  | 3 +--
 platform/spike/platform.c         | 2 +-
 platform/thead/c910/platform.c    | 4 ++--
 6 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index db5b46ecb97..13c2b45ec19 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -10,14 +10,14 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_console.h>
-#include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
 #include "platform.h"
-#include "plmt.h"
 #include "plicsw.h"
+#include "plmt.h"
 
 /* Platform final initialization. */
 static int ae350_final_init(bool cold_boot)
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index d2b6de97155..84ffec6fb6f 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -6,17 +6,14 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_hart.h>
-#include <libfdt.h>
-#include <fdt.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi/riscv_io.h>
 
 #define ARIANE_UART_ADDR			0x10000000
 #define ARIANE_UART_FREQ			50000000
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 2044307c287..16ee985d37c 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -9,12 +9,12 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_console.h>
 #include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/sys/clint.h>
 #include <sbi_utils/serial/sifive-uart.h>
+#include <sbi_utils/sys/clint.h>
 #include "platform.h"
 
 static u32 k210_get_clk_freq(void)
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 1cc1f27fbd5..2eb9fa1810e 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -8,12 +8,11 @@
  */
 
 #include <libfdt.h>
-#include <fdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_const.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
index 25e5765a298..0883ff631f5 100644
--- a/platform/spike/platform.c
+++ b/platform/spike/platform.c
@@ -5,8 +5,8 @@
  */
 
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/sys/htif.h>
 #include <sbi_utils/sys/clint.h>
+#include <sbi_utils/sys/htif.h>
 
 /* clang-format off */
 
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index ca2e0e2b774..9d98a312913 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -4,13 +4,13 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <sbi/sbi_console.h>
 #include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/sys/clint.h>
 #include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
 #include "platform.h"
 
 static struct c910_regs_struct c910_regs;

From 6af55769eb8cd5b9c7fdcd959586e0bc0fce3994 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:42 -0700
Subject: [PATCH 0484/1765] lib: utils: Move PLIC DT fix up codes to
 fdt_helper.c

Now that we have a dedicated fdt_helper.c file for DT releated
helper routines, move plic_fdt_fixup() codes from plic.c to
fdt_helper.c and rename it to fdt_plic_fixup() at the same time,
to keep name consistency in the same file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 13 +++++++++++++
 include/sbi_utils/irqchip/plic.h   |  2 --
 lib/utils/fdt/fdt_helper.c         | 25 +++++++++++++++++++++++++
 lib/utils/irqchip/plic.c           | 27 ---------------------------
 platform/andes/ae350/platform.c    |  3 ++-
 platform/ariane-fpga/platform.c    |  3 ++-
 platform/qemu/virt/platform.c      |  3 ++-
 platform/sifive/fu540/platform.c   |  3 ++-
 8 files changed, 46 insertions(+), 33 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index a6c30735d8c..67251f8f8bc 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -9,6 +9,19 @@
 #ifndef __FDT_HELPER_H__
 #define __FDT_HELPER_H__
 
+/**
+ * Fix up the PLIC node in the device tree
+ *
+ * This routine updates the "interrupt-extended" property of the PLIC node in
+ * the device tree to hide the M-mode external interrupt from CPUs.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ * @param compat: PLIC node compatible string
+ */
+void fdt_plic_fixup(void *fdt, const char *compat);
+
 /**
  * Fix up the reserved memory node in the device tree
  *
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 8d6cefad602..8e190ce4a4d 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -12,8 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-void plic_fdt_fixup(void *fdt, const char *compat);
-
 int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
 
 int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index d95a056b441..fcae968e812 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -12,6 +12,31 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 
+void fdt_plic_fixup(void *fdt, const char *compat)
+{
+	u32 *cells;
+	int i, cells_count;
+	int plic_off;
+
+	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
+	if (plic_off < 0)
+		return;
+
+	cells = (u32 *)fdt_getprop(fdt, plic_off,
+				   "interrupts-extended", &cells_count);
+	if (!cells)
+		return;
+
+	cells_count = cells_count / sizeof(u32);
+	if (!cells_count)
+		return;
+
+	for (i = 0; i < (cells_count / 2); i++) {
+		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
+			cells[2 * i + 1] = cpu_to_fdt32(0xffffffff);
+	}
+}
+
 /**
  * We use PMP to protect OpenSBI firmware to safe-guard it from buggy S-mode
  * software, see pmp_init() in lib/sbi/sbi_hart.c. The protected memory region
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 467938cf171..40c41706e89 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -12,8 +12,6 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/irqchip/plic.h>
-#include <libfdt.h>
-#include <fdt.h>
 
 #define PLIC_PRIORITY_BASE 0x0
 #define PLIC_PENDING_BASE 0x1000
@@ -47,31 +45,6 @@ void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 	writel(val, plic_ie + word_index * 4);
 }
 
-void plic_fdt_fixup(void *fdt, const char *compat)
-{
-	u32 *cells;
-	int i, cells_count;
-	int plic_off;
-
-	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
-	if (plic_off < 0)
-		return;
-
-	cells = (u32 *)fdt_getprop(fdt, plic_off,
-				   "interrupts-extended", &cells_count);
-	if (!cells)
-		return;
-
-	cells_count = cells_count / sizeof(u32);
-	if (!cells_count)
-		return;
-
-	for (i = 0; i < (cells_count / 2); i++) {
-		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
-			cells[2 * i + 1] = cpu_to_fdt32(0xffffffff);
-	}
-}
-
 int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic_num_sources / 32 + 1;
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 13c2b45ec19..a42db9ddbb4 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include "platform.h"
@@ -47,7 +48,7 @@ static int ae350_final_init(bool cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0");
+	fdt_plic_fixup(fdt, "riscv,plic0");
 
 	return 0;
 }
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 84ffec6fb6f..742386b1d2e 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
@@ -55,7 +56,7 @@ static int ariane_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0");
+	fdt_plic_fixup(fdt, "riscv,plic0");
 	return 0;
 }
 
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 92f34aa2d37..c103e851c8d 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
@@ -46,7 +47,7 @@ static int virt_final_init(bool cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	plic_fdt_fixup(fdt, "riscv,plic0");
+	fdt_plic_fixup(fdt, "riscv,plic0");
 
 	return 0;
 }
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 2eb9fa1810e..a10f50b2bc8 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
 #include <sbi_utils/sys/clint.h>
@@ -87,7 +88,7 @@ static void fu540_modify_dt(void *fdt)
 	fdt_setprop_string(fdt, chosen_offset, "stdout-path",
 			   "/soc/serial@10010000:115200");
 
-	plic_fdt_fixup(fdt, "riscv,plic0");
+	fdt_plic_fixup(fdt, "riscv,plic0");
 }
 
 static int fu540_final_init(bool cold_boot)

From e846ce168195c9b2c1dac73ad077c09333d92ce6 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:43 -0700
Subject: [PATCH 0485/1765] platform: andes/ae350: Fix up DT for reserved
 memory

This calls fdt_reserved_memory_fixup() helper in the platform's
final_init() routine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/andes/ae350/platform.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index a42db9ddbb4..210658918ba 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -50,6 +50,8 @@ static int ae350_final_init(bool cold_boot)
 	fdt = sbi_scratch_thishart_arg1_ptr();
 	fdt_plic_fixup(fdt, "riscv,plic0");
 
+	fdt_reserved_memory_fixup(fdt);
+
 	return 0;
 }
 

From 8135520e6f8c018510aa8a575b84b21ae858e9f4 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:44 -0700
Subject: [PATCH 0486/1765] platform: ariane-fpga: Fix up DT for reserved
 memory

This calls fdt_reserved_memory_fixup() helper in the platform's
final_init() routine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/ariane-fpga/platform.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 742386b1d2e..245dcd7f5a6 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -57,6 +57,9 @@ static int ariane_final_init(bool cold_boot)
 		return 0;
 	fdt = sbi_scratch_thishart_arg1_ptr();
 	fdt_plic_fixup(fdt, "riscv,plic0");
+
+	fdt_reserved_memory_fixup(fdt);
+
 	return 0;
 }
 

From c9a526877cb10e93efa26f8e5b2f7adce5ddef04 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:45 -0700
Subject: [PATCH 0487/1765] platform: qemu/virt: Fix up DT for reserved memory

This calls fdt_reserved_memory_fixup() helper in the platform's
final_init() routine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/qemu/virt/platform.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index c103e851c8d..c2e3b70c92d 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -49,6 +49,8 @@ static int virt_final_init(bool cold_boot)
 	fdt = sbi_scratch_thishart_arg1_ptr();
 	fdt_plic_fixup(fdt, "riscv,plic0");
 
+	fdt_reserved_memory_fixup(fdt);
+
 	return 0;
 }
 

From 6f9bb83c1ff1156bf01d04ab8105765bd3fc20f7 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:46 -0700
Subject: [PATCH 0488/1765] platform: sifive/fu540: Fix up DT for reserved
 memory

This calls fdt_reserved_memory_fixup() helper in the platform's
final_init() routine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/sifive/fu540/platform.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index a10f50b2bc8..c89ec477360 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -89,6 +89,8 @@ static void fu540_modify_dt(void *fdt)
 			   "/soc/serial@10010000:115200");
 
 	fdt_plic_fixup(fdt, "riscv,plic0");
+
+	fdt_reserved_memory_fixup(fdt);
 }
 
 static int fu540_final_init(bool cold_boot)

From 1071f0566359e1b8612b31a6953e6328cb5ff9be Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:47 -0700
Subject: [PATCH 0489/1765] platform: sifive/fu540: Remove "stdout-path" fix-up

As of today the upstream U-Boot & Linux kernel ships a device tree
that already has "stdout-path" properly set in the "/chosen" node.
This is the same with the QEMU 'sifive_u' machine. Hence the codes
to fix up the "stdout-path" in OpenSBI is not necessary.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/sifive/fu540/platform.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index c89ec477360..b655d45a805 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -59,7 +59,7 @@
 static void fu540_modify_dt(void *fdt)
 {
 	u32 i, size;
-	int chosen_offset, err;
+	int err;
 	int cpu_offset;
 	char cpu_node[32] = "";
 	const char *mmu_type;
@@ -84,10 +84,6 @@ static void fu540_modify_dt(void *fdt)
 		memset(cpu_node, 0, sizeof(cpu_node));
 	}
 
-	chosen_offset = fdt_path_offset(fdt, "/chosen");
-	fdt_setprop_string(fdt, chosen_offset, "stdout-path",
-			   "/soc/serial@10010000:115200");
-
 	fdt_plic_fixup(fdt, "riscv,plic0");
 
 	fdt_reserved_memory_fixup(fdt);

From dd9439fbace2196c24d90b9274a6014418d5b413 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:48 -0700
Subject: [PATCH 0490/1765] lib: utils: Add a fdt_cpu_fixup() helper

Add a helper routine to updates the "status" property of a CPU node
in the device tree to "disabled" if that hart is in disabled state.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 12 ++++++++++++
 lib/utils/fdt/fdt_helper.c         | 26 ++++++++++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 67251f8f8bc..d3b065a68ab 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -9,6 +9,18 @@
 #ifndef __FDT_HELPER_H__
 #define __FDT_HELPER_H__
 
+/**
+ * Fix up the CPU node in the device tree
+ *
+ * This routine updates the "status" property of a CPU node in the device tree
+ * to "disabled" if that hart is in disabled state in OpenSBI.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_cpu_fixup(void *fdt);
+
 /**
  * Fix up the PLIC node in the device tree
  *
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index fcae968e812..4ef7a5e480d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -12,6 +12,32 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 
+void fdt_cpu_fixup(void *fdt)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	char cpu_node[32] = "";
+	int cpu_offset;
+	int err;
+	u32 i;
+
+	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
+	if (err < 0)
+		return;
+
+	/* assume hart ids are continuous */
+	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
+		cpu_offset = fdt_path_offset(fdt, cpu_node);
+
+		if (sbi_platform_hart_disabled(plat, i))
+			fdt_setprop_string(fdt, cpu_offset, "status",
+					   "disabled");
+
+		memset(cpu_node, 0, sizeof(cpu_node));
+	}
+}
+
 void fdt_plic_fixup(void *fdt, const char *compat)
 {
 	u32 *cells;

From 3f1c847d1fec852a2b98ee408e4193d70949acd4 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:49 -0700
Subject: [PATCH 0491/1765] platform: sifive/fu540: Replace cpu0 node fix-up
 with the new helper

This replaces the FU540 specific cpu0 node "status" property fix-up
with the newly introduced generic fdt_cpu_fixup() helper.

Unlike previous logic, the helper routine does not test the "mmu-type"
property to determine which node we should fix up, instead it uses
sbi_platform_hart_disabled() API.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/platform.c | 26 +-------------------------
 1 file changed, 1 insertion(+), 25 deletions(-)

diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index b655d45a805..6a8c7b267fe 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -58,31 +58,7 @@
 
 static void fu540_modify_dt(void *fdt)
 {
-	u32 i, size;
-	int err;
-	int cpu_offset;
-	char cpu_node[32] = "";
-	const char *mmu_type;
-
-	size = fdt_totalsize(fdt);
-	err  = fdt_open_into(fdt, fdt, size + 256);
-	if (err < 0)
-		sbi_printf(
-			"Device Tree can't be expanded to accmodate new node");
-
-	for (i = 0; i < FU540_HART_COUNT; i++) {
-		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
-		cpu_offset = fdt_path_offset(fdt, cpu_node);
-		mmu_type   = fdt_getprop(fdt, cpu_offset, "mmu-type", NULL);
-		if (mmu_type && (!strcmp(mmu_type, "riscv,sv32") ||
-				 !strcmp(mmu_type, "riscv,sv39") ||
-				 !strcmp(mmu_type, "riscv,sv48")))
-			continue;
-		else
-			fdt_setprop_string(fdt, cpu_offset, "status",
-					   "disabled");
-		memset(cpu_node, 0, sizeof(cpu_node));
-	}
+	fdt_cpu_fixup(fdt);
 
 	fdt_plic_fixup(fdt, "riscv,plic0");
 

From db6a2b5c681e30351061df089ab2e86bae4509a9 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:50 -0700
Subject: [PATCH 0492/1765] lib: utils: Add a general device tree fix-up helper

This adds a general device tree fix-up helper to do all required
device tree fix-ups for a typical platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 13 +++++++++++++
 lib/utils/fdt/fdt_helper.c         |  7 +++++++
 2 files changed, 20 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index d3b065a68ab..079b6198bbe 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -47,4 +47,17 @@ void fdt_plic_fixup(void *fdt, const char *compat);
  */
 int fdt_reserved_memory_fixup(void *fdt);
 
+/**
+ * General device tree fix-up
+ *
+ * This routine do all required device tree fix-ups for a typical platform.
+ * It fixes up the PLIC node and the reserved memory node in the device tree
+ * by calling the corresponding helper routines to accomplish the task.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_fixups(void *fdt);
+
 #endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 4ef7a5e480d..47cd1d30ff5 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -191,3 +191,10 @@ int fdt_reserved_memory_fixup(void *fdt)
 
 	return 0;
 }
+
+void fdt_fixups(void *fdt)
+{
+	fdt_plic_fixup(fdt, "riscv,plic0");
+
+	fdt_reserved_memory_fixup(fdt);
+}

From 3f8d754c2c7f2937b10013ea2866d7e7ebfee60b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Tue, 17 Mar 2020 07:59:51 -0700
Subject: [PATCH 0493/1765] platform: Update to call general DT fix-up helper

Platform andes/ae350, ariane-fpga, qemu/virt and sifive/fu540 codes
have been updated to call this general DT fix-up helper.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/andes/ae350/platform.c  | 4 +---
 platform/ariane-fpga/platform.c  | 5 ++---
 platform/qemu/virt/platform.c    | 4 +---
 platform/sifive/fu540/platform.c | 4 +---
 4 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 210658918ba..5f1ab6cf4da 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -48,9 +48,7 @@ static int ae350_final_init(bool cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	fdt_plic_fixup(fdt, "riscv,plic0");
-
-	fdt_reserved_memory_fixup(fdt);
+	fdt_fixups(fdt);
 
 	return 0;
 }
diff --git a/platform/ariane-fpga/platform.c b/platform/ariane-fpga/platform.c
index 245dcd7f5a6..bba04d635cf 100644
--- a/platform/ariane-fpga/platform.c
+++ b/platform/ariane-fpga/platform.c
@@ -55,10 +55,9 @@ static int ariane_final_init(bool cold_boot)
 
 	if (!cold_boot)
 		return 0;
-	fdt = sbi_scratch_thishart_arg1_ptr();
-	fdt_plic_fixup(fdt, "riscv,plic0");
 
-	fdt_reserved_memory_fixup(fdt);
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt_fixups(fdt);
 
 	return 0;
 }
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index c2e3b70c92d..539006ebb64 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -47,9 +47,7 @@ static int virt_final_init(bool cold_boot)
 		return 0;
 
 	fdt = sbi_scratch_thishart_arg1_ptr();
-	fdt_plic_fixup(fdt, "riscv,plic0");
-
-	fdt_reserved_memory_fixup(fdt);
+	fdt_fixups(fdt);
 
 	return 0;
 }
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 6a8c7b267fe..db647ca0139 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -60,9 +60,7 @@ static void fu540_modify_dt(void *fdt)
 {
 	fdt_cpu_fixup(fdt);
 
-	fdt_plic_fixup(fdt, "riscv,plic0");
-
-	fdt_reserved_memory_fixup(fdt);
+	fdt_fixups(fdt);
 }
 
 static int fu540_final_init(bool cold_boot)

From 87a7ef7659e27cdd5ef9a639cd68cf628be3d2d3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 09:57:45 +0530
Subject: [PATCH 0494/1765] lib: sbi_scratch: Introduce HART id to scratch
 table

Instead of calling hartid_to_scratch() callback every time when
we want sbi_scratch pointer from HART id, we create a table of
sbi_scratch pointers and use that to get sbi_scratch pointer.

As a result of HART id to scratch table, the conversion of
HART id to sbi_scratch pointer is just 2-3 instructions which
was 9 instructions previously.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h |  8 ++++++--
 lib/sbi/sbi_init.c        |  5 +++++
 lib/sbi/sbi_scratch.c     | 17 +++++++++++++++++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 8960c02160d..ec47caf7910 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -85,6 +85,9 @@ enum sbi_scratch_options {
 #define sbi_scratch_thishart_arg1_ptr() \
 	((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
+/** Initialize scatch table and allocator */
+int sbi_scratch_init(struct sbi_scratch *scratch);
+
 /**
  * Allocate from extra space in sbi_scratch
  *
@@ -103,11 +106,12 @@ void sbi_scratch_free_offset(unsigned long offset);
 #define sbi_scratch_thishart_offset_ptr(offset)	\
 	((void *)sbi_scratch_thishart_ptr() + (offset))
 
-typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid);
+/** HART id to scratch table */
+extern struct sbi_scratch *hartid_to_scratch_table[];
 
 /** Get sbi_scratch from HART id */
 #define sbi_hart_id_to_scratch(__scratch, __hartid) \
-	((hartid2scratch)(__scratch)->hartid_to_scratch)(__hartid)
+	hartid_to_scratch_table[__hartid]
 
 #endif
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 11882d619f7..113987cf176 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -146,6 +146,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	unsigned long *init_count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	/* Note: This has to be first thing in coldboot init sequence */
+	rc = sbi_scratch_init(scratch);
+	if (rc)
+		sbi_hart_hang();
+
 	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
 						     "INIT_COUNT");
 	if (!init_count_offset)
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 26716c50fb5..68c5853f8fb 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -9,13 +9,30 @@
 
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
+struct sbi_scratch *hartid_to_scratch_table[SBI_HARTMASK_MAX_BITS] = { 0 };
+
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
 static unsigned long extra_offset = SBI_SCRATCH_EXTRA_SPACE_OFFSET;
 
+typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid);
+
+int sbi_scratch_init(struct sbi_scratch *scratch)
+{
+	u32 i;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	for (i = 0; i < sbi_platform_hart_count(plat); i++)
+		hartid_to_scratch_table[i] =
+			((hartid2scratch)scratch->hartid_to_scratch)(i);
+
+	return 0;
+}
+
 unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 {
 	u32 i;

From e23d3ba936698c52c83bbeed8d844fea22ae0859 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 14:20:22 +0530
Subject: [PATCH 0495/1765] include: Simplify HART id to scratch macro

This patch simplify HART id to scratch macro as follows:
1. Remove current "scratch" pointer argument because now we
   use HART id to scratch table
2. Rename sbi_hart_id_to_scratch() to sbi_hartid_to_scratch()
   to have macro name consistent with the name of callback
   in struct sbi_scratch

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 lib/sbi/sbi_hsm.c         | 6 +++---
 lib/sbi/sbi_init.c        | 2 +-
 lib/sbi/sbi_ipi.c         | 2 +-
 lib/sbi/sbi_scratch.c     | 2 +-
 lib/sbi/sbi_tlb.c         | 2 +-
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index ec47caf7910..e84890027ef 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -110,7 +110,7 @@ void sbi_scratch_free_offset(unsigned long offset);
 extern struct sbi_scratch *hartid_to_scratch_table[];
 
 /** Get sbi_scratch from HART id */
-#define sbi_hart_id_to_scratch(__scratch, __hartid) \
+#define sbi_hartid_to_scratch(__hartid) \
 	hartid_to_scratch_table[__hartid]
 
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index bd58782b0bd..e8ca428ea4a 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -59,7 +59,7 @@ int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
 
-	scratch = sbi_hart_id_to_scratch(scratch, hartid);
+	scratch = sbi_hartid_to_scratch(hartid);
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
 
 	return atomic_read(&hdata->state);
@@ -163,7 +163,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 		/* Initialize hart state data for every hart */
 		for (i = 0; i < hart_count; i++) {
-			rscratch = sbi_hart_id_to_scratch(scratch, i);
+			rscratch = sbi_hartid_to_scratch(i);
 			hdata = sbi_scratch_offset_ptr(rscratch,
 						       hart_data_offset);
 			ATOMIC_INIT(&hdata->state,
@@ -215,7 +215,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	unsigned int hstate;
 	int rc;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	struct sbi_scratch *rscratch = sbi_hart_id_to_scratch(scratch, hartid);
+	struct sbi_scratch *rscratch = sbi_hartid_to_scratch(hartid);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(rscratch,
 							    hart_data_offset);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 113987cf176..690152818cb 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -304,7 +304,7 @@ unsigned long sbi_init_count(u32 hartid)
 	    !init_count_offset)
 		return 0;
 
-	scratch = sbi_hart_id_to_scratch(sbi_scratch_thishart_ptr(), hartid);
+	scratch = sbi_hartid_to_scratch(hartid);
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 
 	return *init_count;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 0781b74fcff..fdd6e8aea0d 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -45,7 +45,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	 * Set IPI type on remote hart's scratch area and
 	 * trigger the interrupt
 	 */
-	remote_scratch = sbi_hart_id_to_scratch(scratch, remote_hartid);
+	remote_scratch = sbi_hartid_to_scratch(remote_hartid);
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
 
 	if (ipi_ops->update) {
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 68c5853f8fb..4dac8f7bd77 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -71,7 +71,7 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 		scratch = sbi_scratch_thishart_ptr();
 		plat = sbi_platform_ptr(scratch);
 		for (i = 0; i < sbi_platform_hart_count(plat); i++) {
-			rscratch = sbi_hart_id_to_scratch(scratch, i);
+			rscratch = sbi_hartid_to_scratch(i);
 			ptr = sbi_scratch_offset_ptr(rscratch, ret);
 			sbi_memset(ptr, 0, size);
 		}
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index a46ddfe998a..b21154cec09 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -197,7 +197,7 @@ static void sbi_tlb_entry_process(struct sbi_scratch *scratch,
 	sbi_tlb_local_flush(tinfo);
 
 	sbi_hartmask_for_each_hart(rhartid, &tinfo->smask) {
-		rscratch = sbi_hart_id_to_scratch(scratch, rhartid);
+		rscratch = sbi_hartid_to_scratch(rhartid);
 		rtlb_sync = sbi_scratch_offset_ptr(rscratch, tlb_sync_off);
 		while (atomic_raw_xchg_ulong(rtlb_sync, 1)) ;
 	}

From 19bd531a15d396130056c4853af487e498152795 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 14:39:56 +0530
Subject: [PATCH 0496/1765] lib: sbi_hsm: Simplify hart_get_state() and
 hart_started() APIs

We remove redundant scratch parameter from sbi_hsm_hart_get_state()
and sbi_hsm_hart_started() APIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h   |  4 ++--
 lib/sbi/sbi_ecall_hsm.c |  2 +-
 lib/sbi/sbi_hsm.c       | 11 ++++++-----
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 227bb6b1b80..11ae3ac325b 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -24,9 +24,9 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 		       ulong saddr, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
-int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid);
+int sbi_hsm_hart_get_state(u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
-bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid);
+bool sbi_hsm_hart_started(u32 hartid);
 int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
 			      ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 528bc801002..5b77726ad31 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -30,7 +30,7 @@ static int sbi_ecall_hsm_handler(struct sbi_scratch *scratch,
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
 		break;
 	case SBI_EXT_HSM_HART_GET_STATUS:
-		hstate = sbi_hsm_hart_get_state(scratch, args[0]);
+		hstate = sbi_hsm_hart_get_state(args[0]);
 		ret = sbi_hsm_hart_state_to_status(hstate);
 		break;
 	default:
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index e8ca428ea4a..b4034237ec6 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -55,9 +55,10 @@ int sbi_hsm_hart_state_to_status(int state)
 	return ret;
 }
 
-int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
+int sbi_hsm_hart_get_state(u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
+	struct sbi_scratch *scratch;
 
 	scratch = sbi_hartid_to_scratch(hartid);
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
@@ -65,9 +66,9 @@ int sbi_hsm_hart_get_state(struct sbi_scratch *scratch, u32 hartid)
 	return atomic_read(&hdata->state);
 }
 
-bool sbi_hsm_hart_started(struct sbi_scratch *scratch, u32 hartid)
+bool sbi_hsm_hart_started(u32 hartid)
 {
-	if (sbi_hsm_hart_get_state(scratch, hartid) == SBI_HART_STARTED)
+	if (sbi_hsm_hart_get_state(hartid) == SBI_HART_STARTED)
 		return TRUE;
 	else
 		return FALSE;
@@ -104,7 +105,7 @@ int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
 		hcount = BITS_PER_LONG;
 
 	for (i = hbase; i < hcount; i++) {
-		if (sbi_hsm_hart_get_state(scratch, i) == SBI_HART_STARTED)
+		if (sbi_hsm_hart_get_state(i) == SBI_HART_STARTED)
 			*out_hmask |= 1UL << (i - hbase);
 	}
 
@@ -262,7 +263,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 							    hart_data_offset);
 
 	if (sbi_platform_hart_disabled(plat, hartid) ||
-	    !sbi_hsm_hart_started(scratch, hartid))
+	    !sbi_hsm_hart_started(hartid))
 		return SBI_EINVAL;
 
 	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,

From 3ebfe0ec5d280b0c5ca61b8c5cfe4bc807907630 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 14:48:00 +0530
Subject: [PATCH 0497/1765] lib: sbi_tlb: Simplify sbi_tlb_entry_process()
 function

We remove redundant scratch parameter from sbi_tlb_entry_process()
function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_tlb.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index b21154cec09..aab0d877ad8 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -187,8 +187,7 @@ static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
 	return;
 }
 
-static void sbi_tlb_entry_process(struct sbi_scratch *scratch,
-				  struct sbi_tlb_info *tinfo)
+static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
 	u32 rhartid;
 	struct sbi_scratch *rscratch = NULL;
@@ -211,7 +210,7 @@ static void sbi_tlb_process_count(struct sbi_scratch *scratch, int count)
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 
 	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo)) {
-		sbi_tlb_entry_process(scratch, &tinfo);
+		sbi_tlb_entry_process(&tinfo);
 		deq_count++;
 		if (deq_count > count)
 			break;
@@ -226,7 +225,7 @@ static void sbi_tlb_process(struct sbi_scratch *scratch)
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 
 	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo))
-		sbi_tlb_entry_process(scratch, &tinfo);
+		sbi_tlb_entry_process(&tinfo);
 }
 
 static void sbi_tlb_sync(struct sbi_scratch *scratch)

From 209134d8f9c6e4ec9a555a7813f7e2c004b5b2d7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 18:55:53 +0530
Subject: [PATCH 0498/1765] lib: Handle failure of sbi_hartid_to_scratch() API

The sbi_hartid_to_scratch() API can fail for non-existent HARTs so
all uses of sbi_hartid_to_scratch() API should check return value.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h |  1 +
 lib/sbi/sbi_hsm.c     | 17 +++++++++++++----
 lib/sbi/sbi_init.c    |  3 +++
 lib/sbi/sbi_ipi.c     | 11 +++++++----
 lib/sbi/sbi_scratch.c |  2 ++
 lib/sbi/sbi_tlb.c     |  3 +++
 6 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 11ae3ac325b..65aff9f162c 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -17,6 +17,7 @@
 #define SBI_HART_STOPPING	1
 #define SBI_HART_STARTING	2
 #define SBI_HART_STARTED	3
+#define SBI_HART_UNKNOWN	4
 
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index b4034237ec6..12199241b67 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -61,6 +61,9 @@ int sbi_hsm_hart_get_state(u32 hartid)
 	struct sbi_scratch *scratch;
 
 	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return SBI_HART_UNKNOWN;
+
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
 
 	return atomic_read(&hdata->state);
@@ -165,6 +168,9 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 		/* Initialize hart state data for every hart */
 		for (i = 0; i < hart_count; i++) {
 			rscratch = sbi_hartid_to_scratch(i);
+			if (!rscratch)
+				continue;
+
 			hdata = sbi_scratch_offset_ptr(rscratch,
 						       hart_data_offset);
 			ATOMIC_INIT(&hdata->state,
@@ -212,14 +218,17 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 		       ulong saddr, ulong priv)
 {
+	int rc;
 	unsigned long init_count;
 	unsigned int hstate;
-	int rc;
+	struct sbi_scratch *rscratch;
+	struct sbi_hsm_data *hdata;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	struct sbi_scratch *rscratch = sbi_hartid_to_scratch(hartid);
-	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(rscratch,
-							    hart_data_offset);
 
+	rscratch = sbi_hartid_to_scratch(hartid);
+	if (!rscratch)
+		return SBI_EINVAL;
+	hdata = sbi_scratch_offset_ptr(rscratch, hart_data_offset);
 	if (sbi_platform_hart_disabled(plat, hartid))
 		return SBI_EINVAL;
 	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 690152818cb..f75b904a4ed 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -305,6 +305,9 @@ unsigned long sbi_init_count(u32 hartid)
 		return 0;
 
 	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return 0;
+
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 
 	return *init_count;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index fdd6e8aea0d..78db75201ea 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -41,11 +41,10 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 		return SBI_EINVAL;
 	ipi_ops = ipi_ops_array[event];
 
-	/*
-	 * Set IPI type on remote hart's scratch area and
-	 * trigger the interrupt
-	 */
 	remote_scratch = sbi_hartid_to_scratch(remote_hartid);
+	if (!remote_scratch)
+		return SBI_EINVAL;
+
 	ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
 
 	if (ipi_ops->update) {
@@ -55,6 +54,10 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 			return ret;
 	}
 
+	/*
+	 * Set IPI type on remote hart's scratch area and
+	 * trigger the interrupt
+	 */
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
 	smp_wmb();
 	sbi_platform_ipi_send(plat, remote_hartid);
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 4dac8f7bd77..2d03a60a7fb 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -72,6 +72,8 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 		plat = sbi_platform_ptr(scratch);
 		for (i = 0; i < sbi_platform_hart_count(plat); i++) {
 			rscratch = sbi_hartid_to_scratch(i);
+			if (!rscratch)
+				continue;
 			ptr = sbi_scratch_offset_ptr(rscratch, ret);
 			sbi_memset(ptr, 0, size);
 		}
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index aab0d877ad8..1b66fdf2de0 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -197,6 +197,9 @@ static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 
 	sbi_hartmask_for_each_hart(rhartid, &tinfo->smask) {
 		rscratch = sbi_hartid_to_scratch(rhartid);
+		if (!rscratch)
+			continue;
+
 		rtlb_sync = sbi_scratch_offset_ptr(rscratch, tlb_sync_off);
 		while (atomic_raw_xchg_ulong(rtlb_sync, 1)) ;
 	}

From bd6ef02d47015706bc7a79cc16b3f19946889a3b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 19:39:15 +0530
Subject: [PATCH 0499/1765] include: sbi_platform: Improve
 sbi_platform_hart_disabled() API

The sbi_platform_hart_disabled() should return TRUE for HART id
greater than platform hart count.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_platform.h | 36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index bc7991c0312..0264732fd7e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -237,22 +237,6 @@ static inline const char *sbi_platform_name(const struct sbi_platform *plat)
 	return "Unknown";
 }
 
-/**
- * Check whether the given HART is disabled
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return TRUE if HART is disabled and FALSE otherwise
- */
-static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
-					      u32 hartid)
-{
-	if (plat && sbi_platform_ops(plat)->hart_disabled)
-		return sbi_platform_ops(plat)->hart_disabled(hartid);
-	return FALSE;
-}
-
 /**
  * Get platform specific tlb range flush maximum value. Any request with size
  * higher than this is upgraded to a full flush.
@@ -297,6 +281,26 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Check whether the given HART is disabled
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return TRUE if HART is disabled and FALSE otherwise
+ */
+static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
+					      u32 hartid)
+{
+	if (plat) {
+		if (sbi_platform_hart_count(plat) <= hartid)
+			return TRUE;
+		if (sbi_platform_ops(plat)->hart_disabled)
+			return sbi_platform_ops(plat)->hart_disabled(hartid);
+	}
+	return FALSE;
+}
+
 /**
  * Bringup a given hart from previous stage. Platform should implement this
  * operation if they support a custom mechanism to start a hart. Otherwise,

From c9f60fc6b7d940c970d4562656424aa9519e9b90 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 19:21:24 +0530
Subject: [PATCH 0500/1765] lib: sbi_scratch: Don't set hartid_to_scratch table
 for disabled HART

As a step towards supporting discontinuous and sparse HART ids, we
don't set hartid_to_scratch table for disabled HARTs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_scratch.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 2d03a60a7fb..fe0856e328d 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -26,9 +26,12 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 	u32 i;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	for (i = 0; i < sbi_platform_hart_count(plat); i++)
+	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+		if (sbi_platform_hart_disabled(plat, i))
+			continue;
 		hartid_to_scratch_table[i] =
 			((hartid2scratch)scratch->hartid_to_scratch)(i);
+	}
 
 	return 0;
 }

From 680b09872dd9fe43adfaa29dd95d0d035f5e0ac2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 18 Mar 2020 15:13:06 +0530
Subject: [PATCH 0501/1765] lib: sbi_hsm: Don't use sbi_platform_hart_count()
 API

We remove usage of sbi_platform_hart_count() API from sbi_hsm
so that discontinuous and sparse HART ids can be supported.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_hsm.c | 19 ++++---------------
 1 file changed, 4 insertions(+), 15 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 12199241b67..906a8ebe737 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
@@ -89,17 +90,7 @@ int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
 			      ulong hbase, ulong *out_hmask)
 {
 	ulong i;
-	ulong hcount = sbi_platform_hart_count(sbi_platform_ptr(scratch));
-
-	/*
-	 * The SBI_HARTMASK_MAX_BITS represents the maximum HART ids generic
-	 * OpenSBI can handle whereas sbi_platform_hart_count() represents
-	 * the maximum HART ids (or HARTs) on underlying platform.
-	 *
-	 * Currently, we only support continuous HART ids so this function
-	 * is written with same assumption. In future, this function will
-	 * change when we support discontinuous and sparse HART ids.
-	 */
+	ulong hcount = SBI_HARTMASK_MAX_BITS;
 
 	*out_hmask = 0;
 	if (hcount <= hbase)
@@ -153,20 +144,18 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
+	u32 i;
 	struct sbi_scratch *rscratch;
 	struct sbi_hsm_data *hdata;
-	u32 hart_count, i;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (cold_boot) {
 		hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata),
 							    "HART_DATA");
 		if (!hart_data_offset)
 			return SBI_ENOMEM;
-		hart_count = sbi_platform_hart_count(plat);
 
 		/* Initialize hart state data for every hart */
-		for (i = 0; i < hart_count; i++) {
+		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 			rscratch = sbi_hartid_to_scratch(i);
 			if (!rscratch)
 				continue;

From db187d616c6bfd9f01bbc566117bf5a6241660c1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 18 Mar 2020 15:20:12 +0530
Subject: [PATCH 0502/1765] lib: sbi_hsm: Remove scratch parameter from
 hart_started_mask() API

The scratch parameter in sbi_hsm_hart_started_mask() API is now
redundant hence removing it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h      | 3 +--
 lib/sbi/sbi_ecall_legacy.c | 2 +-
 lib/sbi/sbi_hsm.c          | 4 +---
 lib/sbi/sbi_ipi.c          | 4 ++--
 lib/sbi/sbi_system.c       | 4 ++--
 5 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 65aff9f162c..f2f39baad59 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -28,8 +28,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
 bool sbi_hsm_hart_started(u32 hartid);
-int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
-			      ulong hbase, ulong *out_hmask);
+int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index cffef23c8b5..bd7ee5af85d 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -33,7 +33,7 @@ static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch,
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	} else {
-		sbi_hsm_hart_started_mask(scratch, 0, &mask);
+		sbi_hsm_hart_started_mask(0, &mask);
 	}
 	*hmask = mask;
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 906a8ebe737..4a457cea571 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -80,14 +80,12 @@ bool sbi_hsm_hart_started(u32 hartid)
 
 /**
  * Get ulong HART mask for given HART base ID
- * @param scratch the per-HART scratch pointer
  * @param hbase the HART base ID
  * @param out_hmask the output ulong HART mask
  * @return 0 on success and SBI_Exxx (< 0) on failure
  * Note: the output HART mask will be set to zero on failure as well.
  */
-int sbi_hsm_hart_started_mask(struct sbi_scratch *scratch,
-			      ulong hbase, ulong *out_hmask)
+int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask)
 {
 	ulong i;
 	ulong hcount = SBI_HARTMASK_MAX_BITS;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 78db75201ea..c60d34ba844 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -80,7 +80,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 	ulong i, m;
 
 	if (hbase != -1UL) {
-		rc = sbi_hsm_hart_started_mask(scratch, hbase, &m);
+		rc = sbi_hsm_hart_started_mask(hbase, &m);
 		if (rc)
 			return rc;
 		m &= hmask;
@@ -92,7 +92,7 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
 		}
 	} else {
 		hbase = 0;
-		while (!sbi_hsm_hart_started_mask(scratch, hbase, &m)) {
+		while (!sbi_hsm_hart_started_mask(hbase, &m)) {
 			/* Send IPIs */
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 061cbf68c29..46ec36fd656 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -43,7 +43,7 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 	u32 cur_hartid = current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
+	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
@@ -67,7 +67,7 @@ void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 	u32 cur_hartid = current_hartid();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_started_mask(scratch, hbase, &hmask)) {
+	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)

From 814f38dc1d9ec6cd7f75b0d6be15e861ddac9ac5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 19:26:22 +0530
Subject: [PATCH 0503/1765] lib: sbi_hsm: Don't use
 sbi_platform_hart_disabled() API

Checking return value of sbi_hartid_to_scratch() is sufficient
so no need to explicitly check for disabled HART using the
sbi_platform_hart_disabled() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 4a457cea571..10316c595da 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -216,8 +216,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	if (!rscratch)
 		return SBI_EINVAL;
 	hdata = sbi_scratch_offset_ptr(rscratch, hart_data_offset);
-	if (sbi_platform_hart_disabled(plat, hartid))
-		return SBI_EINVAL;
 	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
 				     SBI_HART_STARTING);
 	if (hstate == SBI_HART_STARTED)
@@ -254,12 +252,10 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 {
 	int oldstate;
 	u32 hartid = current_hartid();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	if (sbi_platform_hart_disabled(plat, hartid) ||
-	    !sbi_hsm_hart_started(hartid))
+	if (!sbi_hsm_hart_started(hartid))
 		return SBI_EINVAL;
 
 	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,

From 75eec9dd3f04febd7df8e5ee3fb90c236e50ded3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 14 Mar 2020 19:43:26 +0530
Subject: [PATCH 0504/1765] lib: Don't use sbi_platform_hart_count() API

We don't need to use sbi_platform_hart_count() in sbi_init and
sbi_scratch because checking sbi_platform_hart_disabled() or
return value of sbi_hartid_to_scratch() is sufficient.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c    | 9 ++-------
 lib/sbi/sbi_scratch.c | 9 +++------
 2 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f75b904a4ed..1c2f6b9e6a9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -59,8 +59,6 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
 	sbi_printf("Platform HART Features : RV%d%s\n", xlen, str);
-	sbi_printf("Platform Max HARTs     : %d\n",
-		   sbi_platform_hart_count(plat));
 	sbi_printf("Current Hart           : %u\n", hartid);
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
@@ -119,7 +117,6 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int max_hart			= sbi_platform_hart_count(plat);
 
 	/* Acquire coldboot lock */
 	spin_lock(&coldboot_lock);
@@ -128,7 +125,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	coldboot_done = 1;
 
 	/* Send an IPI to all HARTs waiting for coldboot */
-	for (int i = 0; i < max_hart; i++) {
+	for (int i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 		if ((i != hartid) &&
 		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
 			sbi_platform_ipi_send(plat, i);
@@ -282,7 +279,6 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
-	    (sbi_platform_hart_count(plat) <= hartid) ||
 	    sbi_platform_hart_disabled(plat, hartid))
 		sbi_hart_hang();
 
@@ -300,8 +296,7 @@ unsigned long sbi_init_count(u32 hartid)
 	struct sbi_scratch *scratch;
 	unsigned long *init_count;
 
-	if (sbi_platform_hart_count(sbi_platform_thishart_ptr()) <= hartid ||
-	    !init_count_offset)
+	if (!init_count_offset)
 		return 0;
 
 	scratch = sbi_hartid_to_scratch(hartid);
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index fe0856e328d..a756fa7884b 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -26,7 +26,7 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 	u32 i;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 		if (sbi_platform_hart_disabled(plat, i))
 			continue;
 		hartid_to_scratch_table[i] =
@@ -41,8 +41,7 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 	u32 i;
 	void *ptr;
 	unsigned long ret = 0;
-	struct sbi_scratch *scratch, *rscratch;
-	const struct sbi_platform *plat;
+	struct sbi_scratch *rscratch;
 
 	/*
 	 * We have a simple brain-dead allocator which never expects
@@ -71,9 +70,7 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 	spin_unlock(&extra_lock);
 
 	if (ret) {
-		scratch = sbi_scratch_thishart_ptr();
-		plat = sbi_platform_ptr(scratch);
-		for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 			rscratch = sbi_hartid_to_scratch(i);
 			if (!rscratch)
 				continue;

From c51f02cf143b081c2a81717393a0e6cef2ce2521 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 15 Mar 2020 11:39:25 +0530
Subject: [PATCH 0505/1765] include: sbi_platform: Introduce HART index to HART
 id table

A platform can have discontinuous and/or sparse HART ids so we
cannot always assume a set of HARTs with continuous HART ids.

This patch adds support for discontinuous and sparse HART ids by
introducing HART index to HART id table. This table has platform
hart_count entries and it maps HART index to HART id.

The HART index to HART id table has only two restrictions:
1. HART index < sbi_platform hart_count
2. HART id < SBI_HARTMASK_MAX_BITS

Example1:
Let's say we have a platform with 2 HART ids 11 and 22, for such a
a platform:
hart_count = 2
hart_index2id[0] = 11
hart_index2id[1] = 22

Example2:
Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4
but out of these HART with id 0 is not usable so for such a platform:
hart_count = 5
hart_index2id[0] = -1U
hart_index2id[1] = 1
hart_index2id[2] = 2
hart_index2id[3] = 3
hart_index2id[4] = 4
OR
hart_count = 4
hart_index2id[0] = 1
hart_index2id[1] = 2
hart_index2id[2] = 3
hart_index2id[3] = 4

With HART index to HART id table in place, the hart_disabled()
callback is now redundant so we remove it as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S               | 27 ++++++++++++--
 include/sbi/sbi_platform.h       | 63 ++++++++++++++++++++++++++------
 lib/sbi/sbi_init.c               |  4 +-
 lib/sbi/sbi_scratch.c            |  7 ++--
 lib/utils/fdt/fdt_helper.c       |  2 +-
 platform/sifive/fu540/platform.c | 14 ++++---
 6 files changed, 89 insertions(+), 28 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index dbe5b108dc8..d2aca98e445 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -351,6 +351,7 @@ _start_warm:
 	csrw	CSR_MIE, zero
 	csrw	CSR_MIP, zero
 
+	/* Find HART count and HART stack size */
 	la	a4, platform
 #if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
@@ -359,12 +360,29 @@ _start_warm:
 	lw	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lw	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 #endif
+	REG_L	s9, SBI_PLATFORM_HART_INDEX2ID_OFFSET(a4)
 
-	/* HART ID should be within expected limit */
+	/* Find HART id */
 	csrr	s6, CSR_MHARTID
-	bge	s6, s7, _start_hang
 
-	/* find the scratch space for this hart */
+	/* Find HART index */
+	beqz	s9, 3f
+	li	a4, 0
+1:
+#if __riscv_xlen == 64
+	lwu	a5, (s9)
+#else
+	lw	a5, (s9)
+#endif
+	beq	a5, s6, 2f
+	add	s9, s9, 4
+	add	a4, a4, 1
+	blt	a4, s7, 1b
+	li	a4, -1
+2:	add	s6, a4, zero
+3:	bge	s6, s7, _start_hang
+
+	/* Find the scratch space based on HART index */
 	la	tp, _fw_end
 	mul	a5, s7, s8
 	add	tp, tp, a5
@@ -411,6 +429,7 @@ _link_end:
 _hartid_to_scratch:
 	/*
 	 * a0 -> HART ID (passed by caller)
+	 * a1 -> HART Index (passed by caller)
 	 * t0 -> HART Stack Size
 	 * t1 -> HART Stack End
 	 * t2 -> Temporary
@@ -423,7 +442,7 @@ _hartid_to_scratch:
 	lw	t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
 	lw	t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
 #endif
-	sub	t2, t2, a0
+	sub	t2, t2, a1
 	mul	t2, t2, t0
 	la	t1, _fw_end
 	add	t1, t1, t2
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 0264732fd7e..c47ab463278 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -33,6 +33,8 @@
 #define SBI_PLATFORM_OPS_OFFSET (0x58)
 /** Offset of firmware_context in struct sbi_platform */
 #define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x58 + __SIZEOF_POINTER__)
+/** Offset of hart_index2id in struct sbi_platform */
+#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x58 + (__SIZEOF_POINTER__ * 2))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
@@ -136,9 +138,6 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
-	/** Check whether given hart is disabled */
-	bool (*hart_disabled)(u32 hartid);
-
 	/** Bringup the given hart from previous stage **/
 	int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
 	/**
@@ -190,6 +189,22 @@ struct sbi_platform {
 	unsigned long platform_ops_addr;
 	/** Pointer to system firmware specific context */
 	unsigned long firmware_context;
+	/**
+	 * HART index to HART id table
+	 *
+	 * For used HART index <abc>:
+	 *     hart_index2id[<abc>] = some HART id
+	 * For unused HART index <abc>:
+	 *     hart_index2id[<abc>] = -1U
+	 *
+	 * If hart_index2id == NULL then we assume identity mapping
+	 *     hart_index2id[<abc>] = <abc>
+	 *
+	 * We have only two restrictions:
+	 * 1. HART index < sbi_platform hart_count
+	 * 2. HART id < SBI_HARTMASK_MAX_BITS
+	 */
+	const u32 *hart_index2id;
 } __packed;
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */
@@ -282,22 +297,46 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 }
 
 /**
- * Check whether the given HART is disabled
+ * Get HART index for the given HART
  *
  * @param plat pointer to struct sbi_platform
  * @param hartid HART ID
  *
- * @return TRUE if HART is disabled and FALSE otherwise
+ * @return 0 <= value < hart_count for valid HART otherwise -1U
  */
-static inline bool sbi_platform_hart_disabled(const struct sbi_platform *plat,
-					      u32 hartid)
+static inline u32 sbi_platform_hart_index(const struct sbi_platform *plat,
+					  u32 hartid)
 {
-	if (plat) {
-		if (sbi_platform_hart_count(plat) <= hartid)
-			return TRUE;
-		if (sbi_platform_ops(plat)->hart_disabled)
-			return sbi_platform_ops(plat)->hart_disabled(hartid);
+	u32 i;
+
+	if (!plat)
+		return -1U;
+	if (plat->hart_index2id) {
+		for (i = 0; i < plat->hart_count; i++) {
+			if (plat->hart_index2id[i] == hartid)
+				return i;
+		}
+		return -1U;
 	}
+
+	return hartid;
+}
+
+/**
+ * Check whether given HART is invalid
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return TRUE if HART is invalid and FALSE otherwise
+ */
+static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
+					     u32 hartid)
+{
+	if (!plat)
+		return TRUE;
+	if (plat->hart_count <= sbi_platform_hart_index(plat, hartid))
+		return TRUE;
 	return FALSE;
 }
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 1c2f6b9e6a9..2b9afb74404 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -279,7 +279,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
-	    sbi_platform_hart_disabled(plat, hartid))
+	    sbi_platform_hart_invalid(plat, hartid))
 		sbi_hart_hang();
 
 	if (atomic_add_return(&coldboot_lottery, 1) == 1)
@@ -322,7 +322,7 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (sbi_platform_hart_disabled(plat, hartid))
+	if (sbi_platform_hart_invalid(plat, hartid))
 		sbi_hart_hang();
 
 	sbi_platform_early_exit(plat);
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index a756fa7884b..8b635705074 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -19,7 +19,7 @@ struct sbi_scratch *hartid_to_scratch_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
 static unsigned long extra_offset = SBI_SCRATCH_EXTRA_SPACE_OFFSET;
 
-typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid);
+typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid, ulong hartindex);
 
 int sbi_scratch_init(struct sbi_scratch *scratch)
 {
@@ -27,10 +27,11 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		if (sbi_platform_hart_disabled(plat, i))
+		if (sbi_platform_hart_invalid(plat, i))
 			continue;
 		hartid_to_scratch_table[i] =
-			((hartid2scratch)scratch->hartid_to_scratch)(i);
+			((hartid2scratch)scratch->hartid_to_scratch)(i,
+					sbi_platform_hart_index(plat, i));
 	}
 
 	return 0;
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 47cd1d30ff5..2ea52cafb7d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -30,7 +30,7 @@ void fdt_cpu_fixup(void *fdt)
 		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
 		cpu_offset = fdt_path_offset(fdt, cpu_node);
 
-		if (sbi_platform_hart_disabled(plat, i))
+		if (sbi_platform_hart_invalid(plat, i))
 			fdt_setprop_string(fdt, cpu_offset, "status",
 					   "disabled");
 
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index db647ca0139..6714cd546b5 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -165,10 +165,12 @@ static int fu540_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static bool fu540_hart_disabled(u32 hartid)
-{
-	return (FU540_HARITD_DISABLED & (1UL << hartid)) ? TRUE : FALSE;
-}
+static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
+	[0] = 1,
+	[1] = 2,
+	[2] = 3,
+	[3] = 4,
+};
 
 static int fu540_system_down(u32 type)
 {
@@ -192,7 +194,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= fu540_timer_init,
-	.hart_disabled		= fu540_hart_disabled,
 	.system_reboot		= fu540_system_down,
 	.system_shutdown	= fu540_system_down
 };
@@ -202,7 +203,8 @@ const struct sbi_platform platform = {
 	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "SiFive Freedom U540",
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count		= FU540_HART_COUNT,
+	.hart_count		= (FU540_HART_COUNT - 1),
+	.hart_index2id		= fu540_hart_index2id,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 315a87710fd16009ad709445d5cf55cc6cca2e69 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 16 Mar 2020 10:29:34 +0530
Subject: [PATCH 0506/1765] platform: sifive/fu540: Remove
 FU540_ENABLED_HART_MASK option

The FU540_ENABLED_HART_MASK compile time option was added for initial
bring-up on SiFive Unleashed. This option is redundant now because
disabled_hart_mask is already removed. Based on this rationale, we
remove FU540_ENABLED_HART_MASK compile time option.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md    | 12 ++----------
 platform/sifive/fu540/objects.mk |  3 ---
 platform/sifive/fu540/platform.c | 10 ----------
 3 files changed, 2 insertions(+), 23 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 065fd4d6410..2a06fa1b5d4 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -13,16 +13,8 @@ To build platform specific library and firmwares, provide the
 Platform Options
 ----------------
 
-As hart0 in the FU540 doesn't have an MMU, only harts 1-4 boot by default.
-A hart mask i.e. *FU540_ENABLED_HART_MASK* compile time option is provided
-to select any other hart for booting. Please keep in mind that this is not
-a generic option and it can only be specified for FU540 platform in the
-following way:
-
-```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=Image FU540_ENABLED_HART_MASK=0x02
-```
-This will let the board boot only hart1 instead of default 1-4.
+The *SiFive FU540 SoC* platform does not have any platform-specific
+options.
 
 Building SiFive Fu540 Platform
 ------------------------------
diff --git a/platform/sifive/fu540/objects.mk b/platform/sifive/fu540/objects.mk
index f09a30513cf..e0d05853819 100644
--- a/platform/sifive/fu540/objects.mk
+++ b/platform/sifive/fu540/objects.mk
@@ -8,6 +8,3 @@
 #
 
 platform-objs-y += platform.o
-ifdef FU540_ENABLED_HART_MASK
-platform-genflags-y += -DFU540_ENABLED_HART_MASK=$(FU540_ENABLED_HART_MASK)
-endif
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 6714cd546b5..6d43e920920 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -35,16 +35,6 @@
 #define FU540_UART1_ADDR			0x10011000
 #define FU540_UART_BAUDRATE			115200
 
-/**
- * The FU540 SoC has 5 HARTs but HART ID 0 doesn't have S mode. enable only
- * HARTs 1 to 4.
- */
-#ifndef FU540_ENABLED_HART_MASK
-#define FU540_ENABLED_HART_MASK	(1 << 1 | 1 << 2 | 1 << 3 | 1 << 4)
-#endif
-
-#define FU540_HARITD_DISABLED			~(FU540_ENABLED_HART_MASK)
-
 /* PRCI clock related macros */
 //TODO: Do we need a separate driver for this ?
 #define FU540_PRCI_BASE_ADDR			0x10000000

From a0c88ddb31ec5ce43f1dd8759a918ea590429176 Mon Sep 17 00:00:00 2001
From: Xiang Wang <merle@hardenedlinux.org>
Date: Thu, 19 Mar 2020 03:15:47 +0000
Subject: [PATCH 0507/1765] lib: Fix sbi_ecall_register_extension to prevent
 extension IDs overlap

The original code does not prevent the following scenarios:
> sbi_ecall_register_extension(ext1); /* extension id (70-80) */
> sbi_ecall_register_extension(ext2); /* extension id (50-100) */

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_ecall.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 6d7b15249b8..6acb1b7ef59 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -40,11 +40,19 @@ struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
 
 int sbi_ecall_register_extension(struct sbi_ecall_extension *ext)
 {
+	struct sbi_ecall_extension *t;
+
 	if (!ext || (ext->extid_end < ext->extid_start) || !ext->handle)
 		return SBI_EINVAL;
-	if (sbi_ecall_find_extension(ext->extid_start) ||
-	    sbi_ecall_find_extension(ext->extid_end))
-		return SBI_EINVAL;
+
+	sbi_list_for_each_entry(t, &ecall_exts_list, head) {
+		unsigned long start = t->extid_start;
+		unsigned long end = t->extid_end;
+		if (end < ext->extid_start || ext->extid_end < start)
+			/* no overlap */;
+		else
+			return SBI_EINVAL;
+	}
 
 	SBI_INIT_LIST_HEAD(&ext->head);
 	sbi_list_add_tail(&ext->head, &ecall_exts_list);

From 9a74a64ae08bfeda8dc366e931f5a60838d7bac0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 20 Mar 2020 15:10:36 -0700
Subject: [PATCH 0508/1765] lib: Check MSIP bit after returning from WFI

Commit 71d2b837c46e (lib: Move all coldboot wait APIs to sbi_init.c)
caused a regression while moving the code from sbi_hart.c to sbi_init.c.

As per original commit text, WFI can be implemented as a NOP according
to the RISC-V privilege specification. Software should ensure that
relevant interrupt pending bits are set. Otherwise, loop back to WFI.
Fix the regression by applying the original patch to sbi_init.c.

Fixes: 71d2b837c46e ("lib: Move all coldboot wait APIs to sbi_init.c")

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_init.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 2b9afb74404..90ec64cc736 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -79,7 +79,7 @@ static struct sbi_hartmask coldboot_wait_hmask = { 0 };
 
 static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
-	unsigned long saved_mie;
+	unsigned long saved_mie, cmip;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Save MIE CSR */
@@ -97,7 +97,10 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Wait for coldboot to finish using WFI */
 	while (!coldboot_done) {
 		spin_unlock(&coldboot_lock);
-		wfi();
+		do {
+			wfi();
+			cmip = csr_read(CSR_MIP);
+		 } while (!(cmip & MIP_MSIP));
 		spin_lock(&coldboot_lock);
 	};
 

From 59688948421deea18993836152af66765bdc76f6 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:54 -0700
Subject: [PATCH 0509/1765] platform: Move ariane standalone fpga project to
 its own project

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/{ariane-fpga.md => fpga-ariane.md} | 4 ++--
 docs/platform/platform.md                        | 2 +-
 platform/{ariane-fpga => fpga/ariane}/config.mk  | 0
 platform/{ariane-fpga => fpga/ariane}/objects.mk | 0
 platform/{ariane-fpga => fpga/ariane}/platform.c | 0
 scripts/create-binary-archive.sh                 | 2 +-
 6 files changed, 4 insertions(+), 4 deletions(-)
 rename docs/platform/{ariane-fpga.md => fpga-ariane.md} (89%)
 rename platform/{ariane-fpga => fpga/ariane}/config.mk (100%)
 rename platform/{ariane-fpga => fpga/ariane}/objects.mk (100%)
 rename platform/{ariane-fpga => fpga/ariane}/platform.c (100%)

diff --git a/docs/platform/ariane-fpga.md b/docs/platform/fpga-ariane.md
similarity index 89%
rename from docs/platform/ariane-fpga.md
rename to docs/platform/fpga-ariane.md
index 98cbc87aed4..f95001fb323 100644
--- a/docs/platform/ariane-fpga.md
+++ b/docs/platform/fpga-ariane.md
@@ -13,7 +13,7 @@ The FPGA SoC currently contains the following peripherals:
 - Bootrom containing zero stage bootloader and device tree.
 
 To build platform specific library and firmwares, provide the
-*PLATFORM=ariane-fpga* parameter to the top level `make` command.
+*PLATFORM=fpga/ariane* parameter to the top level `make` command.
 
 Platform Options
 ----------------
@@ -26,7 +26,7 @@ Building Ariane FPGA Platform
 **Linux Kernel Payload**
 
 ```
-make PLATFORM=ariane-fpga FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=fpga/ariane FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Booting Ariane FPGA Platform
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 2efa8b36522..d34ce7a298f 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -33,7 +33,7 @@ facilitate the implementation.
 
 [qemu_virt.md]: qemu_virt.md
 [sifive_fu540.md]: sifive_fu540.md
-[ariane-fpga.md]: ariane-fpga.md
+[fpga-ariane.md]: fpga-ariane.md
 [andes_ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
 [spike.md]: spike.md
diff --git a/platform/ariane-fpga/config.mk b/platform/fpga/ariane/config.mk
similarity index 100%
rename from platform/ariane-fpga/config.mk
rename to platform/fpga/ariane/config.mk
diff --git a/platform/ariane-fpga/objects.mk b/platform/fpga/ariane/objects.mk
similarity index 100%
rename from platform/ariane-fpga/objects.mk
rename to platform/fpga/ariane/objects.mk
diff --git a/platform/ariane-fpga/platform.c b/platform/fpga/ariane/platform.c
similarity index 100%
rename from platform/ariane-fpga/platform.c
rename to platform/fpga/ariane/platform.c
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 48f8a203971..5d7bfb46f2b 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -92,7 +92,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR=("qemu/virt")
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
-	BUILD_PLATFORM_SUBDIR+=("ariane-fpga")
+	BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
 	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 	BUILD_PLATFORM_SUBDIR+=("thead/c910")
 	BUILD_PLATFORM_SUBDIR+=("spike")

From ed265b4498cabdcdeb24f5f76548b9df73ae07f8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:55 -0700
Subject: [PATCH 0510/1765] platform: fpga/ariane: Remove redundant plic
 address macros

All the common PLIC specific macros are already defined in plic.c.

Remove it from platform code. While at it, Fix the other coding style
issues.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/fpga/ariane/platform.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index bba04d635cf..9c135294b7d 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -25,10 +25,6 @@
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR 0x2000000
-#define PLIC_ENABLE_BASE		0x2000
-#define PLIC_ENABLE_STRIDE		0x80
-#define PLIC_CONTEXT_BASE		0x200000
-#define PLIC_CONTEXT_STRIDE		0x1000
 
 #define SBI_ARIANE_FEATURES	\
 	(SBI_PLATFORM_HAS_TIMER_VALUE | \
@@ -36,7 +32,6 @@
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
-
 /*
  * Ariane platform early initialization.
  */
@@ -68,10 +63,10 @@ static int ariane_final_init(bool cold_boot)
 static int ariane_console_init(void)
 {
 	return uart8250_init(ARIANE_UART_ADDR,
-						 ARIANE_UART_FREQ,
-						 ARIANE_UART_BAUDRATE,
-						ARIANE_UART_REG_SHIFT,
-						ARIANE_UART_REG_WIDTH);
+			     ARIANE_UART_FREQ,
+			     ARIANE_UART_BAUDRATE,
+			     ARIANE_UART_REG_SHIFT,
+			     ARIANE_UART_REG_WIDTH);
 }
 
 static int plic_ariane_warm_irqchip_init(u32 target_hart,

From fb84879e66bc5a26241bcf0472688851f7240acb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:56 -0700
Subject: [PATCH 0511/1765] platform: Add OpenPiton platform support

OpenPiton is a research platform from Princeton University [1].

"OpenPiton is the world's first open source, general purpose,
multithreaded manycore processor. It is a tiled manycore
framework scalable from one to 1/2 billion cores."

Add OpenSBI support for OpenPiton. As it is based on ariane core,
it reuses the platform code from arine project.

[1]. https://github.com/PrincetonUniversity/openpiton

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/fpga-openpiton.md    |  33 +++++
 docs/platform/platform.md          |   4 +
 platform/fpga/openpiton/config.mk  |  35 +++++
 platform/fpga/openpiton/objects.mk |   7 +
 platform/fpga/openpiton/platform.c | 200 +++++++++++++++++++++++++++++
 scripts/create-binary-archive.sh   |   1 +
 6 files changed, 280 insertions(+)
 create mode 100644 docs/platform/fpga-openpiton.md
 create mode 100644 platform/fpga/openpiton/config.mk
 create mode 100644 platform/fpga/openpiton/objects.mk
 create mode 100644 platform/fpga/openpiton/platform.c

diff --git a/docs/platform/fpga-openpiton.md b/docs/platform/fpga-openpiton.md
new file mode 100644
index 00000000000..7861a197ce8
--- /dev/null
+++ b/docs/platform/fpga-openpiton.md
@@ -0,0 +1,33 @@
+OpenPiton FPGA SoC Platform
+========================
+OpenPiton is the world's first open source, general purpose, multithreaded
+manycore processor. It is a tiled manycore framework scalable from one to
+1/2 billion cores. Currently, OpenPiton supports the 64bit Ariane RISC-V
+processor from ETH Zurich. To this end, Ariane has been equipped with a
+different L1 cache subsystem that follows a write-through protocol and that has
+support for cache invalidations and atomics.
+
+To build platform specific library and firmwares, provide the
+*PLATFORM=fpga/openpiton* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *OpenPiton* platform does not have any platform-specific options.
+
+Building Ariane FPGA Platform
+-----------------------------
+
+**Linux Kernel Payload**
+
+```
+make PLATFORM=fpga/openpiton FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+```
+
+Booting Ariane FPGA Platform
+----------------------------
+
+**Linux Kernel Payload**
+
+As Linux kernel image is embedded in the OpenSBI firmware binary, Ariane will
+directly boot into Linux directly after powered on.
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index d34ce7a298f..5580283bc49 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -25,6 +25,9 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 * **Spike**: Platform support for the Spike emulator.
 
+* **OpenPiton FPGA SoC**: Platform support OpenPiton research platform based on
+ariane core.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -37,3 +40,4 @@ facilitate the implementation.
 [andes_ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
 [spike.md]: spike.md
+[fpga_openpiton.md]: fpga_openpiton.md
diff --git a/platform/fpga/openpiton/config.mk b/platform/fpga/openpiton/config.mk
new file mode 100644
index 00000000000..a969b250a24
--- /dev/null
+++ b/platform/fpga/openpiton/config.mk
@@ -0,0 +1,35 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+
+#for more infos, check out /platform/template/config.mk
+
+PLATFORM_RISCV_XLEN = 64
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_JUMP=n
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+ # This needs to be 4MB aligned for 32-bit support
+ FW_JUMP_ADDR=0x80400000
+ else
+ # This needs to be 2MB aligned for 64-bit support
+ FW_JUMP_ADDR=0x80200000
+ endif
+FW_JUMP_FDT_ADDR=0x82200000
+
+# Firmware with payload configuration.
+FW_PAYLOAD=y
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# This needs to be 4MB aligned for 32-bit support
+  FW_PAYLOAD_OFFSET=0x400000
+else
+# This needs to be 2MB aligned for 64-bit support
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=0x82200000
+FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/fpga/openpiton/objects.mk b/platform/fpga/openpiton/objects.mk
new file mode 100644
index 00000000000..30a3c4fb838
--- /dev/null
+++ b/platform/fpga/openpiton/objects.mk
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+
+platform-objs-y += platform.o
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
new file mode 100644
index 00000000000..e2ee6713c6f
--- /dev/null
+++ b/platform/fpga/openpiton/platform.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
+
+#define OPENPITON_UART_ADDR			0xfff0c2c000
+#define OPENPITON_UART_FREQ			60000000
+#define OPENPITON_UART_BAUDRATE			115200
+#define OPENPITON_UART_REG_SHIFT		0
+#define OPENPITON_UART_REG_WIDTH		1
+#define OPENPITON_PLIC_ADDR			0xfff1100000
+#define OPENPITON_PLIC_NUM_SOURCES		2
+#define OPENPITON_HART_COUNT			3
+#define OPENPITON_CLINT_ADDR			0xfff1020000
+
+#define SBI_OPENPITON_FEATURES	\
+	(SBI_PLATFORM_HAS_TIMER_VALUE | \
+	 SBI_PLATFORM_HAS_SCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MCOUNTEREN | \
+	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+
+/*
+ * OpenPiton platform early initialization.
+ */
+static int openpiton_early_init(bool cold_boot)
+{
+	/* For now nothing to do. */
+	return 0;
+}
+
+/*
+ * OpenPiton platform final initialization.
+ */
+static int openpiton_final_init(bool cold_boot)
+{
+	void *fdt;
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt_fixups(fdt);
+
+	return 0;
+}
+
+/*
+ * Initialize the openpiton console.
+ */
+static int openpiton_console_init(void)
+{
+	return uart8250_init(OPENPITON_UART_ADDR,
+			     OPENPITON_UART_FREQ,
+			     OPENPITON_UART_BAUDRATE,
+			     OPENPITON_UART_REG_SHIFT,
+			     OPENPITON_UART_REG_WIDTH);
+}
+
+static int plic_openpiton_warm_irqchip_init(u32 target_hart,
+			   int m_cntx_id, int s_cntx_id)
+{
+	size_t i, ie_words = OPENPITON_PLIC_NUM_SOURCES / 32 + 1;
+
+	if (target_hart >= OPENPITON_HART_COUNT)
+		return -1;
+	/* By default, enable all IRQs for M-mode of target HART */
+	if (m_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(m_cntx_id, i, 1);
+	}
+	/* Enable all IRQs for S-mode of target HART */
+	if (s_cntx_id > -1) {
+		for (i = 0; i < ie_words; i++)
+			plic_set_ie(s_cntx_id, i, 1);
+	}
+	/* By default, enable M-mode threshold */
+	if (m_cntx_id > -1)
+		plic_set_thresh(m_cntx_id, 1);
+	/* By default, disable S-mode threshold */
+	if (s_cntx_id > -1)
+		plic_set_thresh(s_cntx_id, 0);
+
+	return 0;
+}
+
+/*
+ * Initialize the openpiton interrupt controller for current HART.
+ */
+static int openpiton_irqchip_init(bool cold_boot)
+{
+	u32 hartid = current_hartid();
+	int ret;
+
+	if (cold_boot) {
+		ret = plic_cold_irqchip_init(OPENPITON_PLIC_ADDR,
+					     OPENPITON_PLIC_NUM_SOURCES,
+					     OPENPITON_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+	return plic_openpiton_warm_irqchip_init(hartid,
+					2 * hartid, 2 * hartid + 1);
+}
+
+/*
+ * Initialize IPI for current HART.
+ */
+static int openpiton_ipi_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_ipi_init(OPENPITON_CLINT_ADDR,
+					  OPENPITON_HART_COUNT);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+/*
+ * Initialize openpiton timer for current HART.
+ */
+static int openpiton_timer_init(bool cold_boot)
+{
+	int ret;
+
+	if (cold_boot) {
+		ret = clint_cold_timer_init(OPENPITON_CLINT_ADDR,
+					    OPENPITON_HART_COUNT, TRUE);
+		if (ret)
+			return ret;
+	}
+
+	return clint_warm_timer_init();
+}
+
+/*
+ * Reboot the openpiton.
+ */
+static int openpiton_system_reboot(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System reboot\n");
+	return 0;
+}
+
+/*
+ * Shutdown or poweroff the openpiton.
+ */
+static int openpiton_system_shutdown(u32 type)
+{
+	/* For now nothing to do. */
+	sbi_printf("System shutdown\n");
+	return 0;
+}
+
+/*
+ * Platform descriptor.
+ */
+const struct sbi_platform_operations platform_ops = {
+	.early_init = openpiton_early_init,
+	.final_init = openpiton_final_init,
+	.console_init = openpiton_console_init,
+	.console_putc = uart8250_putc,
+	.console_getc = uart8250_getc,
+	.irqchip_init = openpiton_irqchip_init,
+	.ipi_init = openpiton_ipi_init,
+	.ipi_send = clint_ipi_send,
+	.ipi_clear = clint_ipi_clear,
+	.timer_init = openpiton_timer_init,
+	.timer_value = clint_timer_value,
+	.timer_event_start = clint_timer_event_start,
+	.timer_event_stop = clint_timer_event_stop,
+	.system_reboot = openpiton_system_reboot,
+	.system_shutdown = openpiton_system_shutdown
+};
+
+const struct sbi_platform platform = {
+	.opensbi_version = OPENSBI_VERSION,
+	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+	.name = "OPENPITON RISC-V",
+	.features = SBI_OPENPITON_FEATURES,
+	.hart_count = OPENPITON_HART_COUNT,
+	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.platform_ops_addr = (unsigned long)&platform_ops
+};
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 5d7bfb46f2b..2711ac253c4 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -93,6 +93,7 @@ case "${BUILD_RISCV_XLEN}" in
 	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
 	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 	BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
+	BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
 	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 	BUILD_PLATFORM_SUBDIR+=("thead/c910")
 	BUILD_PLATFORM_SUBDIR+=("spike")

From d1d6560a878200679e6e12e77032d06add8847a5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:57 -0700
Subject: [PATCH 0512/1765] platform: fpga/common: Add a fdt parsing helper
 functions

Different DT based platforms from the sam family may reuse IP blocks with
different configurations. These different configurations can be obtained
by parsing the device tree.

Add a FDT parser framework that can parse various device configurations from
device tree. Currently, the parsing algorithms doesn't cover all the use cases
or possible combination of DT configurations. It will be improved over time.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  20 +++++
 lib/utils/fdt/fdt_helper.c         | 116 +++++++++++++++++++++++++++++
 2 files changed, 136 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 079b6198bbe..42baeab3842 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -9,6 +9,26 @@
 #ifndef __FDT_HELPER_H__
 #define __FDT_HELPER_H__
 
+struct platform_uart_data {
+	unsigned long addr;
+	unsigned long freq;
+	unsigned long baud;
+};
+
+struct platform_plic_data {
+	unsigned long addr;
+	unsigned long num_src;
+};
+
+int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
+		       const char *compatible);
+
+int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
+		   const char *compatible);
+
+int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
+		    const char *compatible);
+
 /**
  * Fix up the CPU node in the device tree
  *
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 2ea52cafb7d..81617c907e8 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 
 void fdt_cpu_fixup(void *fdt)
 {
@@ -198,3 +199,118 @@ void fdt_fixups(void *fdt)
 
 	fdt_reserved_memory_fixup(fdt);
 }
+
+static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
+				  unsigned long *size)
+{
+	int parent, len, i;
+	int cell_addr, cell_size;
+	const fdt32_t *prop_addr, *prop_size;
+	uint64_t temp = 0;
+
+	parent = fdt_parent_offset(fdt, node);
+	if (parent < 0)
+		return parent;
+	cell_addr = fdt_address_cells(fdt, parent);
+	if (cell_addr < 1)
+		return SBI_ENODEV;
+
+	cell_size = fdt_size_cells(fdt, parent);
+	if (cell_size < 0)
+		return SBI_ENODEV;
+
+	prop_addr = fdt_getprop(fdt, node, "reg", &len);
+	if (!prop_addr)
+		return SBI_ENODEV;
+	prop_size = prop_addr + cell_addr;
+
+	if (addr) {
+		for (i = 0; i < cell_addr; i++)
+			temp = (temp << 32) | fdt32_to_cpu(*prop_addr++);
+		*addr = temp;
+	}
+	temp = 0;
+
+	if (size) {
+		for (i = 0; i < cell_size; i++)
+			temp = (temp << 32) | fdt32_to_cpu(*prop_size++);
+		*size = temp;
+	}
+
+	return 0;
+}
+
+int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
+		   const char *compatible)
+{
+	int nodeoffset, len, rc;
+	fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+
+	/**
+	 * TODO: We don't know how to handle multiple nodes with the same
+	 * compatible sring. Just return the first node for now.
+	 */
+
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	uart->addr = reg_addr;
+
+	/**
+	 * UART address is mandaotry. clock-frequency and current-speed may not
+	 * be present. Don't return error.
+	 */
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
+	if (len > 0 && val)
+		uart->freq = fdt32_to_cpu(*val);
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
+	if (len > 0 && val)
+		uart->baud = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
+int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
+		   const char *compatible)
+{
+	int nodeoffset, len, rc;
+	const fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	plic->addr = reg_addr;
+
+	val = fdt_getprop(fdt, nodeoffset, "riscv,ndev", &len);
+	if (len > 0)
+		plic->num_src = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
+int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
+		    const char *compatible)
+{
+	int nodeoffset, rc;
+
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, clint_addr, NULL);
+	if (rc < 0 || !clint_addr)
+		return SBI_ENODEV;
+
+	return 0;
+}

From 040e4e2ec220403fb2508aa0809052924ef63a0b Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:58 -0700
Subject: [PATCH 0513/1765] lib: utils: Move fdt fixup helper routines to a
 different file

FDT helper file contain both fdt fixup and parsing functions.

Split the fixup related functions to a separate file for a better code
organization.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_fixup.h  |  64 +++++++++
 include/sbi_utils/fdt/fdt_helper.h |  56 +-------
 lib/utils/fdt/fdt_fixup.c          | 203 +++++++++++++++++++++++++++++
 lib/utils/fdt/fdt_helper.c         | 187 --------------------------
 lib/utils/fdt/objects.mk           |   1 +
 platform/andes/ae350/platform.c    |   2 +-
 platform/fpga/ariane/platform.c    |   2 +-
 platform/fpga/openpiton/platform.c |   1 +
 platform/qemu/virt/platform.c      |   2 +-
 platform/sifive/fu540/platform.c   |   2 +-
 10 files changed, 276 insertions(+), 244 deletions(-)
 create mode 100644 include/sbi_utils/fdt/fdt_fixup.h
 create mode 100644 lib/utils/fdt/fdt_fixup.c

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
new file mode 100644
index 00000000000..54568c2b27a
--- /dev/null
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_fixup.h - Flat Device Tree manipulation helper routines
+ * Implement platform specific DT fixups on top of libfdt. 
+ *
+ * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FDT_FIXUP_H__
+#define __FDT_FIXUP_H__
+
+/**
+ * Fix up the CPU node in the device tree
+ *
+ * This routine updates the "status" property of a CPU node in the device tree
+ * to "disabled" if that hart is in disabled state in OpenSBI.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_cpu_fixup(void *fdt);
+
+/**
+ * Fix up the PLIC node in the device tree
+ *
+ * This routine updates the "interrupt-extended" property of the PLIC node in
+ * the device tree to hide the M-mode external interrupt from CPUs.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ * @param compat: PLIC node compatible string
+ */
+void fdt_plic_fixup(void *fdt, const char *compat);
+
+/**
+ * Fix up the reserved memory node in the device tree
+ *
+ * This routine inserts a child node of the reserved memory node in the device
+ * tree that describes the protected memory region done by OpenSBI via PMP.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ * @return zero on success and -ve on failure
+ */
+int fdt_reserved_memory_fixup(void *fdt);
+
+/**
+ * General device tree fix-up
+ *
+ * This routine do all required device tree fix-ups for a typical platform.
+ * It fixes up the PLIC node and the reserved memory node in the device tree
+ * by calling the corresponding helper routines to accomplish the task.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_fixups(void *fdt);
+
+#endif /* __FDT_FIXUP_H__ */
+
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 42baeab3842..06b8a62a937 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -1,7 +1,8 @@
 // SPDX-License-Identifier: BSD-2-Clause
 /*
- * fdt_helper.h - Flat Device Tree manipulation helper routines
- * Implement helper routines on top of libfdt for OpenSBI usage
+ * fdt_helper.h - Flat Device Tree parsing helper routines
+ * Implement helper routines to parse FDT nodes on top of
+ * libfdt for OpenSBI usage
  *
  * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
  */
@@ -29,55 +30,4 @@ int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
 		    const char *compatible);
 
-/**
- * Fix up the CPU node in the device tree
- *
- * This routine updates the "status" property of a CPU node in the device tree
- * to "disabled" if that hart is in disabled state in OpenSBI.
- *
- * It is recommended that platform codes call this helper in their final_init()
- *
- * @param fdt: device tree blob
- */
-void fdt_cpu_fixup(void *fdt);
-
-/**
- * Fix up the PLIC node in the device tree
- *
- * This routine updates the "interrupt-extended" property of the PLIC node in
- * the device tree to hide the M-mode external interrupt from CPUs.
- *
- * It is recommended that platform codes call this helper in their final_init()
- *
- * @param fdt: device tree blob
- * @param compat: PLIC node compatible string
- */
-void fdt_plic_fixup(void *fdt, const char *compat);
-
-/**
- * Fix up the reserved memory node in the device tree
- *
- * This routine inserts a child node of the reserved memory node in the device
- * tree that describes the protected memory region done by OpenSBI via PMP.
- *
- * It is recommended that platform codes call this helper in their final_init()
- *
- * @param fdt: device tree blob
- * @return zero on success and -ve on failure
- */
-int fdt_reserved_memory_fixup(void *fdt);
-
-/**
- * General device tree fix-up
- *
- * This routine do all required device tree fix-ups for a typical platform.
- * It fixes up the PLIC node and the reserved memory node in the device tree
- * by calling the corresponding helper routines to accomplish the task.
- *
- * It is recommended that platform codes call this helper in their final_init()
- *
- * @param fdt: device tree blob
- */
-void fdt_fixups(void *fdt);
-
 #endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
new file mode 100644
index 00000000000..b91e95fdd6d
--- /dev/null
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_fixup.c - Flat Device Tree parsing helper routines
+ * Implement helper routines to parse FDT nodes on top of
+ * libfdt for OpenSBI usage
+ *
+ * Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+
+void fdt_cpu_fixup(void *fdt)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	char cpu_node[32] = "";
+	int cpu_offset;
+	int err;
+	u32 i;
+
+	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
+	if (err < 0)
+		return;
+
+	/* assume hart ids are continuous */
+	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
+		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
+		cpu_offset = fdt_path_offset(fdt, cpu_node);
+
+		if (sbi_platform_hart_invalid(plat, i))
+			fdt_setprop_string(fdt, cpu_offset, "status",
+					   "disabled");
+
+		memset(cpu_node, 0, sizeof(cpu_node));
+	}
+}
+
+void fdt_plic_fixup(void *fdt, const char *compat)
+{
+	u32 *cells;
+	int i, cells_count;
+	int plic_off;
+
+	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
+	if (plic_off < 0)
+		return;
+
+	cells = (u32 *)fdt_getprop(fdt, plic_off,
+				   "interrupts-extended", &cells_count);
+	if (!cells)
+		return;
+
+	cells_count = cells_count / sizeof(u32);
+	if (!cells_count)
+		return;
+
+	for (i = 0; i < (cells_count / 2); i++) {
+		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
+			cells[2 * i + 1] = cpu_to_fdt32(0xffffffff);
+	}
+}
+
+/**
+ * We use PMP to protect OpenSBI firmware to safe-guard it from buggy S-mode
+ * software, see pmp_init() in lib/sbi/sbi_hart.c. The protected memory region
+ * information needs to be conveyed to S-mode software (e.g.: operating system)
+ * via some well-known method.
+ *
+ * With device tree, this can be done by inserting a child node of the reserved
+ * memory node which is used to specify one or more regions of reserved memory.
+ *
+ * For the reserved memory node bindings, see Linux kernel documentation at
+ * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
+ *
+ * Some additional memory spaces may be protected by platform codes via PMP as
+ * well, and corresponding child nodes will be inserted.
+ */
+int fdt_reserved_memory_fixup(void *fdt)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	unsigned long prot, addr, size;
+	int na = fdt_address_cells(fdt, 0);
+	int ns = fdt_size_cells(fdt, 0);
+	fdt32_t addr_high, addr_low;
+	fdt32_t size_high, size_low;
+	fdt32_t reg[4];
+	fdt32_t *val;
+	char name[32];
+	int parent, subnode;
+	int i, j;
+	int err;
+
+	if (!sbi_platform_has_pmp(plat))
+		return 0;
+
+	/* expand the device tree to accommodate new node */
+	err  = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 256);
+	if (err < 0)
+		return err;
+
+	/* try to locate the reserved memory node */
+	parent = fdt_path_offset(fdt, "/reserved-memory");
+	if (parent < 0) {
+		/* if such node does not exist, create one */
+		parent = fdt_add_subnode(fdt, 0, "reserved-memory");
+		if (parent < 0)
+			return parent;
+
+		/*
+		 * reserved-memory node has 3 required properties:
+		 * - #address-cells: the same value as the root node
+		 * - #size-cells: the same value as the root node
+		 * - ranges: should be empty
+		 */
+
+		err = fdt_setprop_empty(fdt, parent, "ranges");
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#size-cells", ns);
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#address-cells", na);
+		if (err < 0)
+			return err;
+	}
+
+	/*
+	 * We assume the given device tree does not contain any memory region
+	 * child node protected by PMP. Normally PMP programming happens at
+	 * M-mode firmware. The memory space used by OpenSBI is protected.
+	 * Some additional memory spaces may be protected by platform codes.
+	 *
+	 * With above assumption, we create child nodes directly.
+	 */
+
+	for (i = 0, j = 0; i < PMP_COUNT; i++) {
+		pmp_get(i, &prot, &addr, &size);
+		if (!(prot & PMP_A))
+			continue;
+		if (!(prot & (PMP_R | PMP_W | PMP_X))) {
+			addr_high = (u64)addr >> 32;
+			addr_low = addr;
+			size_high = (u64)size >> 32;
+			size_low = size;
+
+			if (na > 1 && addr_high)
+				sbi_snprintf(name, sizeof(name),
+					     "mmode_pmp%d@%x,%x", j,
+					     addr_high, addr_low);
+			else
+				sbi_snprintf(name, sizeof(name),
+					     "mmode_pmp%d@%x", j,
+					     addr_low);
+
+			subnode = fdt_add_subnode(fdt, parent, name);
+			if (subnode < 0)
+				return subnode;
+
+			/*
+			 * Tell operating system not to create a virtual
+			 * mapping of the region as part of its standard
+			 * mapping of system memory.
+			 */
+			err = fdt_setprop_empty(fdt, subnode, "no-map");
+			if (err < 0)
+				return err;
+
+			/* encode the <reg> property value */
+			val = reg;
+			if (na > 1)
+				*val++ = cpu_to_fdt32(addr_high);
+			*val++ = cpu_to_fdt32(addr_low);
+			if (ns > 1)
+				*val++ = cpu_to_fdt32(size_high);
+			*val++ = cpu_to_fdt32(size_low);
+
+			err = fdt_setprop(fdt, subnode, "reg", reg,
+					  (na + ns) * sizeof(fdt32_t));
+			if (err < 0)
+				return err;
+
+			j++;
+		}
+	}
+
+	return 0;
+}
+
+void fdt_fixups(void *fdt)
+{
+	fdt_plic_fixup(fdt, "riscv,plic0");
+
+	fdt_reserved_memory_fixup(fdt);
+}
+
+
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 81617c907e8..07f722128ab 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -13,193 +13,6 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-void fdt_cpu_fixup(void *fdt)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	char cpu_node[32] = "";
-	int cpu_offset;
-	int err;
-	u32 i;
-
-	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
-	if (err < 0)
-		return;
-
-	/* assume hart ids are continuous */
-	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
-		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
-		cpu_offset = fdt_path_offset(fdt, cpu_node);
-
-		if (sbi_platform_hart_invalid(plat, i))
-			fdt_setprop_string(fdt, cpu_offset, "status",
-					   "disabled");
-
-		memset(cpu_node, 0, sizeof(cpu_node));
-	}
-}
-
-void fdt_plic_fixup(void *fdt, const char *compat)
-{
-	u32 *cells;
-	int i, cells_count;
-	int plic_off;
-
-	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
-	if (plic_off < 0)
-		return;
-
-	cells = (u32 *)fdt_getprop(fdt, plic_off,
-				   "interrupts-extended", &cells_count);
-	if (!cells)
-		return;
-
-	cells_count = cells_count / sizeof(u32);
-	if (!cells_count)
-		return;
-
-	for (i = 0; i < (cells_count / 2); i++) {
-		if (fdt32_to_cpu(cells[2 * i + 1]) == IRQ_M_EXT)
-			cells[2 * i + 1] = cpu_to_fdt32(0xffffffff);
-	}
-}
-
-/**
- * We use PMP to protect OpenSBI firmware to safe-guard it from buggy S-mode
- * software, see pmp_init() in lib/sbi/sbi_hart.c. The protected memory region
- * information needs to be conveyed to S-mode software (e.g.: operating system)
- * via some well-known method.
- *
- * With device tree, this can be done by inserting a child node of the reserved
- * memory node which is used to specify one or more regions of reserved memory.
- *
- * For the reserved memory node bindings, see Linux kernel documentation at
- * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
- *
- * Some additional memory spaces may be protected by platform codes via PMP as
- * well, and corresponding child nodes will be inserted.
- */
-int fdt_reserved_memory_fixup(void *fdt)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	unsigned long prot, addr, size;
-	int na = fdt_address_cells(fdt, 0);
-	int ns = fdt_size_cells(fdt, 0);
-	fdt32_t addr_high, addr_low;
-	fdt32_t size_high, size_low;
-	fdt32_t reg[4];
-	fdt32_t *val;
-	char name[32];
-	int parent, subnode;
-	int i, j;
-	int err;
-
-	if (!sbi_platform_has_pmp(plat))
-		return 0;
-
-	/* expand the device tree to accommodate new node */
-	err  = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 256);
-	if (err < 0)
-		return err;
-
-	/* try to locate the reserved memory node */
-	parent = fdt_path_offset(fdt, "/reserved-memory");
-	if (parent < 0) {
-		/* if such node does not exist, create one */
-		parent = fdt_add_subnode(fdt, 0, "reserved-memory");
-		if (parent < 0)
-			return parent;
-
-		/*
-		 * reserved-memory node has 3 required properties:
-		 * - #address-cells: the same value as the root node
-		 * - #size-cells: the same value as the root node
-		 * - ranges: should be empty
-		 */
-
-		err = fdt_setprop_empty(fdt, parent, "ranges");
-		if (err < 0)
-			return err;
-
-		err = fdt_setprop_u32(fdt, parent, "#size-cells", ns);
-		if (err < 0)
-			return err;
-
-		err = fdt_setprop_u32(fdt, parent, "#address-cells", na);
-		if (err < 0)
-			return err;
-	}
-
-	/*
-	 * We assume the given device tree does not contain any memory region
-	 * child node protected by PMP. Normally PMP programming happens at
-	 * M-mode firmware. The memory space used by OpenSBI is protected.
-	 * Some additional memory spaces may be protected by platform codes.
-	 *
-	 * With above assumption, we create child nodes directly.
-	 */
-
-	for (i = 0, j = 0; i < PMP_COUNT; i++) {
-		pmp_get(i, &prot, &addr, &size);
-		if (!(prot & PMP_A))
-			continue;
-		if (!(prot & (PMP_R | PMP_W | PMP_X))) {
-			addr_high = (u64)addr >> 32;
-			addr_low = addr;
-			size_high = (u64)size >> 32;
-			size_low = size;
-
-			if (na > 1 && addr_high)
-				sbi_snprintf(name, sizeof(name),
-					     "mmode_pmp%d@%x,%x", j,
-					     addr_high, addr_low);
-			else
-				sbi_snprintf(name, sizeof(name),
-					     "mmode_pmp%d@%x", j,
-					     addr_low);
-
-			subnode = fdt_add_subnode(fdt, parent, name);
-			if (subnode < 0)
-				return subnode;
-
-			/*
-			 * Tell operating system not to create a virtual
-			 * mapping of the region as part of its standard
-			 * mapping of system memory.
-			 */
-			err = fdt_setprop_empty(fdt, subnode, "no-map");
-			if (err < 0)
-				return err;
-
-			/* encode the <reg> property value */
-			val = reg;
-			if (na > 1)
-				*val++ = cpu_to_fdt32(addr_high);
-			*val++ = cpu_to_fdt32(addr_low);
-			if (ns > 1)
-				*val++ = cpu_to_fdt32(size_high);
-			*val++ = cpu_to_fdt32(size_low);
-
-			err = fdt_setprop(fdt, subnode, "reg", reg,
-					  (na + ns) * sizeof(fdt32_t));
-			if (err < 0)
-				return err;
-
-			j++;
-		}
-	}
-
-	return 0;
-}
-
-void fdt_fixups(void *fdt)
-{
-	fdt_plic_fixup(fdt, "riscv,plic0");
-
-	fdt_reserved_memory_fixup(fdt);
-}
-
 static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 				  unsigned long *size)
 {
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
index 062e6bdeba8..b860a83e877 100644
--- a/lib/utils/fdt/objects.mk
+++ b/lib/utils/fdt/objects.mk
@@ -5,3 +5,4 @@
 #
 
 libsbiutils-objs-y += fdt/fdt_helper.o
+libsbiutils-objs-y += fdt/fdt_fixup.o
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 5f1ab6cf4da..c1311d4a942 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -13,7 +13,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include "platform.h"
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 9c135294b7d..9537b64f49f 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -11,7 +11,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index e2ee6713c6f..96c2d57ce78 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 539006ebb64..86d1bcce7ee 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -14,7 +14,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 6d43e920920..baa0d139f59 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -14,7 +14,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
 #include <sbi_utils/sys/clint.h>

From 4c374511fd893ee4a7c7f1b225307f7d257e6bf1 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 23 Mar 2020 12:48:59 -0700
Subject: [PATCH 0514/1765] platform: openpiton: Read the device configurations
 from device tree

OpenPiton is designed to run on different FPGAs with different
configurations. Use the fdt parser to retrieve the required values
from device tree instead of using fixed values.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/fpga/openpiton/platform.c | 82 +++++++++++++++++++++---------
 1 file changed, 57 insertions(+), 25 deletions(-)

diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 96c2d57ce78..4c83f6d85e8 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -16,15 +16,15 @@
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
 
-#define OPENPITON_UART_ADDR			0xfff0c2c000
-#define OPENPITON_UART_FREQ			60000000
-#define OPENPITON_UART_BAUDRATE			115200
-#define OPENPITON_UART_REG_SHIFT		0
-#define OPENPITON_UART_REG_WIDTH		1
-#define OPENPITON_PLIC_ADDR			0xfff1100000
-#define OPENPITON_PLIC_NUM_SOURCES		2
-#define OPENPITON_HART_COUNT			3
-#define OPENPITON_CLINT_ADDR			0xfff1020000
+#define OPENPITON_DEFAULT_UART_ADDR		0xfff0c2c000
+#define OPENPITON_DEFAULT_UART_FREQ		60000000
+#define OPENPITON_DEFAULT_UART_BAUDRATE		115200
+#define OPENPITON_DEFAULT_UART_REG_SHIFT	0
+#define OPENPITON_DEFAULT_UART_REG_WIDTH	1
+#define OPENPITON_DEFAULT_PLIC_ADDR		0xfff1100000
+#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES	2
+#define OPENPITON_DEFAULT_HART_COUNT		3
+#define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
 
 #define SBI_OPENPITON_FEATURES	\
 	(SBI_PLATFORM_HAS_TIMER_VALUE | \
@@ -32,12 +32,44 @@
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
+static struct platform_uart_data uart = {
+		OPENPITON_DEFAULT_UART_ADDR,
+		OPENPITON_DEFAULT_UART_FREQ,
+		OPENPITON_DEFAULT_UART_BAUDRATE,
+	};
+static struct platform_plic_data plic = {
+		OPENPITON_DEFAULT_PLIC_ADDR,
+		OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
+	};
+static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR;
+
 /*
  * OpenPiton platform early initialization.
  */
 static int openpiton_early_init(bool cold_boot)
 {
-	/* For now nothing to do. */
+	void *fdt;
+	struct platform_uart_data uart_data;
+	struct platform_plic_data plic_data;
+	unsigned long clint_data;
+	int rc;
+
+	if (!cold_boot)
+		return 0;
+	fdt = sbi_scratch_thishart_arg1_ptr();
+
+	rc = fdt_parse_uart8250(fdt, &uart_data, "ns16550");
+	if (!rc)
+		uart = uart_data;
+
+	rc = fdt_parse_plic(fdt, &plic_data, "riscv,plic0");
+	if (!rc)
+		plic = plic_data;
+
+	rc = fdt_parse_clint(fdt, &clint_data, "riscv,clint0");
+	if (!rc)
+		clint_addr = clint_data;
+
 	return 0;
 }
 
@@ -62,19 +94,19 @@ static int openpiton_final_init(bool cold_boot)
  */
 static int openpiton_console_init(void)
 {
-	return uart8250_init(OPENPITON_UART_ADDR,
-			     OPENPITON_UART_FREQ,
-			     OPENPITON_UART_BAUDRATE,
-			     OPENPITON_UART_REG_SHIFT,
-			     OPENPITON_UART_REG_WIDTH);
+	return uart8250_init(uart.addr,
+			     uart.freq,
+			     uart.baud,
+			     OPENPITON_DEFAULT_UART_REG_SHIFT,
+			     OPENPITON_DEFAULT_UART_REG_WIDTH);
 }
 
 static int plic_openpiton_warm_irqchip_init(u32 target_hart,
 			   int m_cntx_id, int s_cntx_id)
 {
-	size_t i, ie_words = OPENPITON_PLIC_NUM_SOURCES / 32 + 1;
+	size_t i, ie_words = plic.num_src / 32 + 1;
 
-	if (target_hart >= OPENPITON_HART_COUNT)
+	if (target_hart >= OPENPITON_DEFAULT_HART_COUNT)
 		return -1;
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
@@ -105,9 +137,9 @@ static int openpiton_irqchip_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(OPENPITON_PLIC_ADDR,
-					     OPENPITON_PLIC_NUM_SOURCES,
-					     OPENPITON_HART_COUNT);
+		ret = plic_cold_irqchip_init(plic.addr,
+					     plic.num_src,
+					     OPENPITON_DEFAULT_HART_COUNT);
 		if (ret)
 			return ret;
 	}
@@ -123,8 +155,8 @@ static int openpiton_ipi_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(OPENPITON_CLINT_ADDR,
-					  OPENPITON_HART_COUNT);
+		ret = clint_cold_ipi_init(clint_addr,
+					  OPENPITON_DEFAULT_HART_COUNT);
 		if (ret)
 			return ret;
 	}
@@ -140,8 +172,8 @@ static int openpiton_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(OPENPITON_CLINT_ADDR,
-					    OPENPITON_HART_COUNT, TRUE);
+		ret = clint_cold_timer_init(clint_addr,
+					    OPENPITON_DEFAULT_HART_COUNT, TRUE);
 		if (ret)
 			return ret;
 	}
@@ -195,7 +227,7 @@ const struct sbi_platform platform = {
 	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name = "OPENPITON RISC-V",
 	.features = SBI_OPENPITON_FEATURES,
-	.hart_count = OPENPITON_HART_COUNT,
+	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };

From 4d93586bfa9a6875f1f28c5f430b17b650a19207 Mon Sep 17 00:00:00 2001
From: Xiang Wang <merle@hardenedlinux.org>
Date: Tue, 24 Mar 2020 10:11:48 +0000
Subject: [PATCH 0515/1765] lib: prevent coldboot_lottery from overflowing

HSM_STOP will trigger multiple executions of sbi_init, atomic_add_return may
trigger coldboot_lottery overflow

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 90ec64cc736..4e1699d59e7 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -285,7 +285,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	    sbi_platform_hart_invalid(plat, hartid))
 		sbi_hart_hang();
 
-	if (atomic_add_return(&coldboot_lottery, 1) == 1)
+	if (arch_atomic_xchg(&coldboot_lottery, 1) == 0)
 		coldboot = TRUE;
 
 	if (coldboot)

From 550ba88db1950d448f25cf71457ed89a91c401f7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Mar 2020 18:14:28 +0530
Subject: [PATCH 0516/1765] scripts: Extend create-binary-archive.sh for
 unified binary tar ball

This patch extends/revamps create-binary-archive.sh to allow creating
unified binary tar ball containing both RV32 and RV64 images. Users
can also create "RV32 only" or "RV64 only" tar balls as well.

Few example commands are as follows:
./scripts/create-binary-archive.sh (Build both RV32 & RV64 images)
./scripts/create-binary-archive.sh -x 32 (Build RV32 only images)
./scripts/create-binary-archive.sh -x 64 (Build RV64 only images)

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 176 ++++++++++++++++++-------------
 1 file changed, 101 insertions(+), 75 deletions(-)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 2711ac253c4..d2680252e32 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -7,23 +7,26 @@ function usage()
 	echo "Options:"
 	echo "     -h                       Display help or usage"
 	echo "     -p <opensbi_source_path> OpenSBI source path"
-	echo "     -o <build_output_path>   Build output path"
+	echo "     -o <output_path>         Build output path"
 	echo "     -d                       Build and install documentation"
 	echo "     -t                       Build only with no archive created"
 	echo "     -j <num_threads>         Number of threads for Make (Default: 1)"
 	echo "     -s <archive_suffix>      Archive name suffix (Default: unknown)"
-	echo "     -x <riscv_xlen>          RISC-V XLEN (Default: 64)"
+	echo "     -x <riscv_xlen>          RISC-V XLENs for Build (Default: 0)"
+	echo "                                 0: RV32 and RV64"
+	echo "                                32: RV32 only"
+	echo "                                64: RV64 only"
 	exit 1;
 }
 
 # Command line options
-BUILD_NUM_THREADS=1
-BUILD_OUTPUT_PATH="$(pwd)/build"
-BUILD_OPENSBI_SOURCE_PATH="$(pwd)"
-BUILD_DOCS="no"
-BUILD_ONLY="no"
-BUILD_ARCHIVE_SUFFIX="unknown"
-BUILD_RISCV_XLEN=64
+NUM_THREADS=1
+OUTPUT_PATH="$(pwd)/build"
+OPENSBI_SOURCE_PATH="$(pwd)"
+NEED_DOCS="no"
+COMPILE_ONLY="no"
+ARCHIVE_SUFFIX="unknown"
+RISCV_XLEN=0
 
 while getopts "hdtj:o:p:s:x:" o; do
 	case "${o}" in
@@ -31,25 +34,25 @@ while getopts "hdtj:o:p:s:x:" o; do
 		usage
 		;;
 	d)
-		BUILD_DOCS="yes"
+		NEED_DOCS="yes"
 		;;
 	t)
-		BUILD_ONLY="yes"
+		COMPILE_ONLY="yes"
 		;;
 	j)
-		BUILD_NUM_THREADS=${OPTARG}
+		NUM_THREADS=${OPTARG}
 		;;
 	o)
-		BUILD_OUTPUT_PATH=${OPTARG}
+		OUTPUT_PATH=${OPTARG}
 		;;
 	p)
-		BUILD_OPENSBI_SOURCE_PATH=${OPTARG}
+		OPENSBI_SOURCE_PATH=${OPTARG}
 		;;
 	s)
-		BUILD_ARCHIVE_SUFFIX=${OPTARG}
+		ARCHIVE_SUFFIX=${OPTARG}
 		;;
 	x)
-		BUILD_RISCV_XLEN=${OPTARG}
+		RISCV_XLEN=${OPTARG}
 		;;
 	*)
 		usage
@@ -58,85 +61,108 @@ while getopts "hdtj:o:p:s:x:" o; do
 done
 shift $((OPTIND-1))
 
-if [ -z "${BUILD_OPENSBI_SOURCE_PATH}" ]; then
+if [ -z "${OPENSBI_SOURCE_PATH}" ]; then
 	echo "Must specify OpenSBI source path"
 	usage
 fi
 
-if [ ! -d "${BUILD_OPENSBI_SOURCE_PATH}" ]; then
+if [ ! -d "${OPENSBI_SOURCE_PATH}" ]; then
 	echo "OpenSBI source path does not exist"
 	usage
 fi
 
-if [ -z "${BUILD_ARCHIVE_SUFFIX}" ]; then
+if [ -z "${ARCHIVE_SUFFIX}" ]; then
 	echo "Archive suffice cannot be empty"
 	usage
 fi
 
-# Get version of OpenSBI
-BUILD_VERSION_MAJOR=$(grep "define OPENSBI_VERSION_MAJOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/')
-BUILD_VERSION_MINOR=$(grep "define OPENSBI_VERSION_MINOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/')
+build_opensbi() {
+	# Setup parameters
+	BUILD_NUM_THREADS=$1
+	BUILD_OUTPUT_PATH=$2
+	BUILD_OPENSBI_SOURCE_PATH=$3
+	BUILD_DOCS=$4
+	BUILD_ONLY=$5
+	BUILD_RISCV_XLEN=$6
+	BUILD_ARCHIVE_RISCV_XLEN=$7
+	BUILD_ARCHIVE_SUFFIX=$8
 
-# Setup archive name
-BUILD_ARCHIVE_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BUILD_RISCV_XLEN}-${BUILD_ARCHIVE_SUFFIX}"
+	# Setup derived parameters
+	BUILD_VERSION_MAJOR=$(grep "define OPENSBI_VERSION_MAJOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/')
+	BUILD_VERSION_MINOR=$(grep "define OPENSBI_VERSION_MINOR" "${BUILD_OPENSBI_SOURCE_PATH}/include/sbi/sbi_version.h" | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/')
+	BUILD_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BUILD_RISCV_XLEN}"
+	BUILD_ARCHIVE_NAME="opensbi-${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BUILD_ARCHIVE_RISCV_XLEN}-${BUILD_ARCHIVE_SUFFIX}"
+	case "${BUILD_RISCV_XLEN}" in
+	32)
+		# Setup 32-bit platform list
+		BUILD_PLATFORM_SUBDIR=("qemu/virt")
+		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		;;
+	64)
+		# Setup 64-bit platform list
+		BUILD_PLATFORM_SUBDIR=("qemu/virt")
+		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
+		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
+		BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
+		BUILD_PLATFORM_SUBDIR+=("andes/ae350")
+		BUILD_PLATFORM_SUBDIR+=("thead/c910")
+		BUILD_PLATFORM_SUBDIR+=("spike")
+		;;
+	*)
+		echo "Invalid Build RISC-V XLEN"
+		usage
+		;;
+	esac
 
-# Setup platform list
-case "${BUILD_RISCV_XLEN}" in
+	# Ensure output directory is present
+	mkdir -p "${BUILD_OUTPUT_PATH}/${BUILD_NAME}"
+
+	# Build and install generic library
+	echo "Build and install generic library XLEN=${BUILD_RISCV_XLEN}"
+	echo ""
+	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}/${BUILD_NAME}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi install_libsbiutils -j "${BUILD_NUM_THREADS}"
+	echo ""
+
+	# Build and install relevant platforms
+	for INDEX in $(seq 0 1 "$(expr ${#BUILD_PLATFORM_SUBDIR[*]} - 1)")
+	do
+		echo "Build and install PLATFORM=${BUILD_PLATFORM_SUBDIR[${INDEX}]} XLEN=${BUILD_RISCV_XLEN}"
+		echo ""
+		make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}/${BUILD_NAME}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM="${BUILD_PLATFORM_SUBDIR[${INDEX}]}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libplatsbi install_firmwares -j "${BUILD_NUM_THREADS}"
+		echo ""
+	done
+
+	# Build and install docs
+	if [ "${BUILD_DOCS}" == "yes" ]; then
+		echo "Build and install docs"
+		echo ""
+		make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}/${BUILD_NAME}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" install_docs
+		echo ""
+	fi
+
+	# Create archive file
+	if [ "${BUILD_ONLY}" == "no" ]; then
+		echo "Create archive ${BUILD_ARCHIVE_NAME}.tar.xz"
+		echo ""
+		tar  -C "${BUILD_OUTPUT_PATH}" -cJvf "${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}.tar.xz" "${BUILD_ARCHIVE_NAME}"
+		echo ""
+	fi
+}
+
+case "${RISCV_XLEN}" in
+0)
+	build_opensbi ${NUM_THREADS} ${OUTPUT_PATH} ${OPENSBI_SOURCE_PATH} "no" "yes" "32" "" ${ARCHIVE_SUFFIX}
+	build_opensbi ${NUM_THREADS} ${OUTPUT_PATH} ${OPENSBI_SOURCE_PATH} ${NEED_DOCS} ${COMPILE_ONLY} "64" "" ${ARCHIVE_SUFFIX}
+	;;
 32)
-	# Setup 32-bit platform list
-	BUILD_PLATFORM_SUBDIR=("qemu/virt")
-	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+	build_opensbi ${NUM_THREADS} ${OUTPUT_PATH} ${OPENSBI_SOURCE_PATH} ${NEED_DOCS} ${COMPILE_ONLY} "32" "32" ${ARCHIVE_SUFFIX}
 	;;
 64)
-	# Setup 64-bit platform list
-	BUILD_PLATFORM_SUBDIR=("qemu/virt")
-	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
-	BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
-	BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
-	BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
-	BUILD_PLATFORM_SUBDIR+=("andes/ae350")
-	BUILD_PLATFORM_SUBDIR+=("thead/c910")
-	BUILD_PLATFORM_SUBDIR+=("spike")
+	build_opensbi ${NUM_THREADS} ${OUTPUT_PATH} ${OPENSBI_SOURCE_PATH} ${NEED_DOCS} ${COMPILE_ONLY} "64" "64" ${ARCHIVE_SUFFIX}
 	;;
 *)
 	echo "Invalid RISC-V XLEN"
 	usage
 	;;
 esac
-
-# Ensure output directory is present
-mkdir -p "${BUILD_OUTPUT_PATH}"
-
-# Do a clean build first
-make distclean
-
-# Build and install generic library
-echo "Build and install generic library XLEN=${BUILD_RISCV_XLEN}"
-echo ""
-make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi install_libsbiutils -j "${BUILD_NUM_THREADS}"
-echo ""
-
-# Build and install relevant platforms
-for INDEX in $(seq 0 1 "$(expr ${#BUILD_PLATFORM_SUBDIR[*]} - 1)")
-do
-	echo "Build and install PLATFORM=${BUILD_PLATFORM_SUBDIR[${INDEX}]} XLEN=${BUILD_RISCV_XLEN}"
-	echo ""
-	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM="${BUILD_PLATFORM_SUBDIR[${INDEX}]}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libplatsbi install_firmwares -j "${BUILD_NUM_THREADS}"
-	echo ""
-done
-
-# Build and install docs
-if [ "${BUILD_DOCS}" == "yes" ]; then
-	echo "Build and install docs"
-	echo ""
-	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" install_docs
-	echo ""
-fi
-
-# Create archive file
-if [ "${BUILD_ONLY}" == "no" ]; then
-	echo "Create archive ${BUILD_ARCHIVE_NAME}.tar.xz"
-	echo ""
-	tar  -C "${BUILD_OUTPUT_PATH}" -cJvf "${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}.tar.xz" "${BUILD_ARCHIVE_NAME}"
-	echo ""
-fi

From 160c88535f07084051ebba97689fc4a7b2e9037c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 11:23:41 +0530
Subject: [PATCH 0517/1765] lib: utils: Improve fdt_cpu_fixup() implementation

Currently, the fdt_cpu_fixup() implementation assumes:
1. We have one CPU DT for each HART under /cpus DT node
2. The CPU DT nodes are named sequentially (i.e cpu@0,
   cpu@1, ...) which is not true for discontinuous and
   sparse HART ids (i.e. cpu@0, cpu@4, cpu@5). Generally,
   CPU DT node are named based on HART id and not HART
   index

If any of the above assumptions are violated then the
fdt_cpu_fixup() will not work.

This improves fdt_cpu_fixup() implementation and makes
it independent of above assumptions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index b91e95fdd6d..d6e4cc1e8a1 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -12,30 +12,43 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
 
 void fdt_cpu_fixup(void *fdt)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	char cpu_node[32] = "";
-	int cpu_offset;
-	int err;
-	u32 i;
+	int err, len, cpu_offset, cpus_offset;
+	const fdt32_t *val;
+	const void *prop;
+	u32 hartid;
 
 	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
 	if (err < 0)
 		return;
 
-	/* assume hart ids are continuous */
-	for (i = 0; i < sbi_platform_hart_count(plat); i++) {
-		sbi_sprintf(cpu_node, "/cpus/cpu@%d", i);
-		cpu_offset = fdt_path_offset(fdt, cpu_node);
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		prop = fdt_getprop(fdt, cpu_offset, "device_type", &len);
+		if (!prop || !len)
+			continue;
+		if (sbi_strcmp(prop, "cpu"))
+			continue;
 
-		if (sbi_platform_hart_invalid(plat, i))
+		val = fdt_getprop(fdt, cpu_offset, "reg", &len);
+		if (!val || len < sizeof(fdt32_t))
+			continue;
+
+		if (len > sizeof(fdt32_t))
+			val++;
+		hartid = fdt32_to_cpu(*val);
+
+		if (sbi_platform_hart_invalid(plat, hartid))
 			fdt_setprop_string(fdt, cpu_offset, "status",
 					   "disabled");
-
-		memset(cpu_node, 0, sizeof(cpu_node));
 	}
 }
 

From 1de66d170e71fb94732ffc80dcf4e70e623c4f7a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 17:13:16 +0530
Subject: [PATCH 0518/1765] lib: Optimize unpriv load/store implementation

This patch optimize unpriv load/store implementation by having
dedicated unpriv trap handler (just like KVM RISC-V).

As a result of this optimization:
1. We have reduced roughly 13+ instruction in all unpriv load/store
   functions. The reduced instruction also include two function calls.
2. Per-HART trap info pointer in scratch space is now redundant
   hence removed.
3. The sbi_trap_handler() is now much cleaner because we don't have
   to handle unpriv load/store traps.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h    |   8 ++-
 include/sbi/sbi_trap.h    |  18 ++++++
 lib/sbi/objects.mk        |   1 +
 lib/sbi/sbi_hart.c        |  36 +++--------
 lib/sbi/sbi_trap.c        |  25 +-------
 lib/sbi/sbi_unpriv.c      | 128 ++++++++++++++++++--------------------
 lib/sbi/sbi_unpriv_trap.S |  56 +++++++++++++++++
 7 files changed, 147 insertions(+), 125 deletions(-)
 create mode 100644 lib/sbi/sbi_unpriv_trap.S

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index fb4a955a78e..4b83b84b622 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -16,9 +16,11 @@ struct sbi_scratch;
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 
-void *sbi_hart_get_trap_info(struct sbi_scratch *scratch);
-
-void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data);
+extern void (*sbi_hart_unpriv_trap)(void);
+static inline ulong sbi_hart_unpriv_trap_addr(void)
+{
+	return (ulong)sbi_hart_unpriv_trap;
+}
 
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 9a35a6e54e9..b6918e0d6bd 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -85,6 +85,19 @@
 /** Last member index in sbi_trap_regs */
 #define SBI_TRAP_REGS_last			35
 
+/** Index of epc member in sbi_trap_info */
+#define SBI_TRAP_INFO_epc			0
+/** Index of cause member in sbi_trap_info */
+#define SBI_TRAP_INFO_cause			1
+/** Index of tval member in sbi_trap_info */
+#define SBI_TRAP_INFO_tval			2
+/** Index of tval2 member in sbi_trap_info */
+#define SBI_TRAP_INFO_tval2			3
+/** Index of tinst member in sbi_trap_info */
+#define SBI_TRAP_INFO_tinst			4
+/** Last member index in sbi_trap_info */
+#define SBI_TRAP_INFO_last			5
+
 /* clang-format on */
 
 /** Get offset of member with name 'x' in sbi_trap_regs */
@@ -92,6 +105,11 @@
 /** Size (in bytes) of sbi_trap_regs */
 #define SBI_TRAP_REGS_SIZE SBI_TRAP_REGS_OFFSET(last)
 
+/** Get offset of member with name 'x' in sbi_trap_info */
+#define SBI_TRAP_INFO_OFFSET(x) ((SBI_TRAP_INFO_##x) * __SIZEOF_POINTER__)
+/** Size (in bytes) of sbi_trap_info */
+#define SBI_TRAP_INFO_SIZE SBI_TRAP_INFO_OFFSET(last)
+
 #ifndef __ASSEMBLY__
 
 #include <sbi/sbi_types.h>
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 5f1bdbfb181..7e700fa9939 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -37,3 +37,4 @@ libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_unpriv.o
+libsbi-objs-y += sbi_unpriv_trap.o
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e71725ceb63..b0f9919bd95 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -17,6 +17,11 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 
+extern void __sbi_unpriv_trap(void);
+extern void __sbi_unpriv_trap_hext(void);
+
+void (*sbi_hart_unpriv_trap)(void) = &__sbi_unpriv_trap;
+
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -203,17 +208,13 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	return 0;
 }
 
-static unsigned long trap_info_offset;
-
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	int rc;
 
 	if (cold_boot) {
-		trap_info_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
-							    "HART_TRAP_INFO");
-		if (!trap_info_offset)
-			return SBI_ENOMEM;
+		if (misa_extension('H'))
+			sbi_hart_unpriv_trap = &__sbi_unpriv_trap_hext;
 	}
 
 	mstatus_init(scratch, hartid);
@@ -229,29 +230,6 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	return pmp_init(scratch, hartid);
 }
 
-void *sbi_hart_get_trap_info(struct sbi_scratch *scratch)
-{
-	unsigned long *trap_info;
-
-	if (!trap_info_offset)
-		return NULL;
-
-	trap_info = sbi_scratch_offset_ptr(scratch, trap_info_offset);
-
-	return (void *)(*trap_info);
-}
-
-void sbi_hart_set_trap_info(struct sbi_scratch *scratch, void *data)
-{
-	unsigned long *trap_info;
-
-	if (!trap_info_offset)
-		return;
-
-	trap_info = sbi_scratch_offset_ptr(scratch, trap_info_offset);
-	*trap_info = (unsigned long)data;
-}
-
 void __attribute__((noreturn)) sbi_hart_hang(void)
 {
 	while (1)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b4ba2aca124..9aa6b857594 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -220,7 +220,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 	u32 hartid = current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
 	ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
-	struct sbi_trap_info trap, *uptrap;
+	struct sbi_trap_info trap;
 
 	if (misa_extension('H')) {
 		mtval2 = csr_read(CSR_MTVAL2);
@@ -266,29 +266,6 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		rc  = sbi_ecall_handler(hartid, mcause, regs, scratch);
 		msg = "ecall handler failed";
 		break;
-	case CAUSE_LOAD_ACCESS:
-	case CAUSE_STORE_ACCESS:
-	case CAUSE_LOAD_PAGE_FAULT:
-	case CAUSE_STORE_PAGE_FAULT:
-		uptrap = sbi_hart_get_trap_info(scratch);
-		if ((regs->mstatus & MSTATUS_MPRV) && uptrap) {
-			rc = 0;
-			uptrap->epc = regs->mepc;
-			regs->mepc += 4;
-			uptrap->cause = mcause;
-			uptrap->tval = mtval;
-			uptrap->tval2 = mtval2;
-			uptrap->tinst = mtinst;
-		} else {
-			trap.epc = regs->mepc;
-			trap.cause = mcause;
-			trap.tval = mtval;
-			trap.tval2 = mtval2;
-			trap.tinst = mtinst;
-			rc = sbi_trap_redirect(regs, &trap, scratch);
-		}
-		msg = "page/access fault handler failed";
-		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		trap.epc = regs->mepc;
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 77ff2e9ebc3..17244205bf5 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -19,25 +19,30 @@
 			     struct sbi_scratch *scratch,                     \
 			     struct sbi_trap_info *trap)                      \
 	{                                                                     \
-		register ulong __mstatus asm("a2");                           \
-		type val = 0;                                                 \
-		trap->epc = 0;                                                \
+		register ulong tinfo asm("a3");                               \
+		register ulong ttmp asm("a4");                                \
+		register ulong mstatus asm("a5");                             \
+		register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr(); \
+		type ret = 0;                                                 \
 		trap->cause = 0;                                              \
-		trap->tval = 0;                                               \
-		trap->tval2 = 0;                                              \
-		trap->tinst = 0;                                              \
-		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
-			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			"add %[tinfo], %[taddr], zero\n"                      \
+			"add %[ttmp], %[taddr], zero\n"                       \
+			"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"      \
+			"csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"   \
 			".option push\n"                                      \
 			".option norvc\n"                                     \
-			#insn " %1, %2\n"                                     \
+			#insn " %[ret], %[addr]\n"                            \
 			".option pop\n"                                       \
-			"csrw " STR(CSR_MSTATUS) ", %0"                       \
-		    : "+&r"(__mstatus), "=&r"(val)                            \
-		    : "m"(*addr), "r"(MSTATUS_MPRV));                         \
-		sbi_hart_set_trap_info(scratch, NULL);                        \
-		return val;                                                   \
+			"csrw " STR(CSR_MSTATUS) ", %[mstatus]\n"             \
+			"csrw " STR(CSR_MTVEC) ", %[mtvec]"                   \
+		    : [mstatus] "+&r"(mstatus), [mtvec] "+&r"(mtvec),         \
+		      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp),               \
+		      [ret] "=&r"(ret)                                        \
+		    : [addr] "m"(*addr), [mprv] "r"(MSTATUS_MPRV),            \
+		      [taddr] "r"((ulong)trap)                                \
+		    : "memory");                                              \
+		return ret;                                                   \
 	}
 
 #define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
@@ -45,23 +50,27 @@
 			      struct sbi_scratch *scratch,                    \
 			      struct sbi_trap_info *trap)                     \
 	{                                                                     \
-		register ulong __mstatus asm("a3");                           \
-		trap->epc = 0;                                                \
+		register ulong tinfo asm("a3");                               \
+		register ulong ttmp asm("a4");                                \
+		register ulong mstatus asm("a5");                             \
+		register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr(); \
 		trap->cause = 0;                                              \
-		trap->tval = 0;                                               \
-		trap->tval2 = 0;                                              \
-		trap->tinst = 0;                                              \
-		sbi_hart_set_trap_info(scratch, trap);                        \
 		asm volatile(                                                 \
-			"csrrs %0, " STR(CSR_MSTATUS) ", %3\n"                \
+			"add %[tinfo], %[taddr], zero\n"                      \
+			"add %[ttmp], %[taddr], zero\n"                       \
+			"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"      \
+			"csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"   \
 			".option push\n"                                      \
 			".option norvc\n"                                     \
-			#insn " %1, %2\n"                                     \
+			#insn " %[val], %[addr]\n"                            \
 			".option pop\n"                                       \
-			"csrw " STR(CSR_MSTATUS) ", %0"                       \
-			: "+&r"(__mstatus)                                    \
-			: "r"(val), "m"(*addr), "r"(MSTATUS_MPRV));           \
-		sbi_hart_set_trap_info(scratch, NULL);                        \
+			"csrw " STR(CSR_MSTATUS) ", %[mstatus]\n"             \
+			"csrw " STR(CSR_MTVEC) ", %[mtvec]"                   \
+		    : [mstatus] "+&r"(mstatus), [mtvec] "+&r"(mtvec),         \
+		      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp)                \
+		    : [addr] "m"(*addr), [mprv] "r"(MSTATUS_MPRV),            \
+		      [taddr] "r"((ulong)trap), [val] "r"(val)                \
+		    : "memory");              \
 	}
 
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
@@ -113,52 +122,33 @@ void sbi_store_u64(u64 *addr, u64 val,
 ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
 		   struct sbi_trap_info *trap)
 {
-	ulong __mstatus = 0, val = 0;
-#ifdef __riscv_compressed
-	ulong rvc_mask = 3, tmp;
-#endif
+	register ulong tinfo asm("a3");
+	register ulong ttmp asm("a4");
+	register ulong mstatus asm("a5");
+	register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr();
+	ulong insn = 0;
 
-	trap->epc = 0;
 	trap->cause = 0;
-	trap->tval = 0;
-	trap->tval2 = 0;
-	trap->tinst = 0;
-	sbi_hart_set_trap_info(scratch, trap);
 
-#ifndef __riscv_compressed
-	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
-	    ".option push\n"
-	    ".option norvc\n"
-#if __riscv_xlen == 64
-	    STR(LWU) " %[insn], (%[addr])\n"
-#else
-	    STR(LW) " %[insn], (%[addr])\n"
-#endif
-	    ".option pop\n"
-	    "csrw " STR(CSR_MSTATUS) ", %[mstatus]"
-	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc));
-#else
-	asm("csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
-	    ".option push\n"
-	    ".option norvc\n"
+	asm volatile(
+	    "add %[tinfo], %[taddr], zero\n"
+	    "csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"
+	    "csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"
 	    "lhu %[insn], (%[addr])\n"
-	    ".option pop\n"
-	    "and %[tmp], %[insn], %[rvc_mask]\n"
-	    "bne %[tmp], %[rvc_mask], 2f\n"
-	    ".option push\n"
-	    ".option norvc\n"
-	    "lhu %[tmp], 2(%[addr])\n"
-	    ".option pop\n"
-	    "sll %[tmp], %[tmp], 16\n"
-	    "add %[insn], %[insn], %[tmp]\n"
-	    "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]"
-	    : [mstatus] "+&r"(__mstatus), [insn] "=&r"(val), [tmp] "=&r"(tmp)
-	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR), [addr] "r"(mepc),
-	      [rvc_mask] "r"(rvc_mask));
-#endif
-
-	sbi_hart_set_trap_info(scratch, NULL);
+	    "andi %[ttmp], %[insn], 3\n"
+	    "addi %[ttmp], %[ttmp], -3\n"
+	    "bne %[ttmp], zero, 2f\n"
+	    "lhu %[ttmp], 2(%[addr])\n"
+	    "sll %[ttmp], %[ttmp], 16\n"
+	    "add %[insn], %[insn], %[ttmp]\n"
+	    "2: csrw " STR(CSR_MSTATUS) ", %[mstatus]\n"
+	    "csrw " STR(CSR_MTVEC) ", %[mtvec]"
+	    : [mstatus] "+&r"(mstatus), [mtvec] "+&r"(mtvec),
+	      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp),
+	      [insn] "=&r"(insn)
+	    : [mprv] "r"(MSTATUS_MPRV | MSTATUS_MXR),
+	      [taddr] "r"((ulong)trap), [addr] "r"(mepc)
+	    : "memory");
 
 	switch (trap->cause) {
 	case CAUSE_LOAD_ACCESS:
@@ -177,5 +167,5 @@ ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
 		break;
 	};
 
-	return val;
+	return insn;
 }
diff --git a/lib/sbi/sbi_unpriv_trap.S b/lib/sbi/sbi_unpriv_trap.S
new file mode 100644
index 00000000000..180c376da56
--- /dev/null
+++ b/lib/sbi/sbi_unpriv_trap.S
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_trap.h>
+
+	/*
+	 * We assume that faulting unpriv load/store instruction is
+	 * is 4-byte long and blindly increment SEPC by 4.
+	 *
+	 * The trap info will be saved as follows:
+	 * A3 <- pointer struct sbi_trap_info
+	 * A4 <- temporary
+	 */
+
+	.align 3
+	.global __sbi_unpriv_trap
+__sbi_unpriv_trap:
+	/* Without H-extension so, MTVAL2 and MTINST CSRs not available */
+	csrr	a4, CSR_MEPC
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
+	csrr	a4, CSR_MCAUSE
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
+	csrr	a4, CSR_MTVAL
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(tval)(a3)
+	REG_S	zero, SBI_TRAP_INFO_OFFSET(tval2)(a3)
+	REG_S	zero, SBI_TRAP_INFO_OFFSET(tinst)(a3)
+	csrr	a4, CSR_MEPC
+	addi	a4, a4, 4
+	csrw	CSR_MEPC, a4
+	mret
+
+	.align 3
+	.global __sbi_unpriv_trap_hext
+__sbi_unpriv_trap_hext:
+	/* With H-extension so, MTVAL2 and MTINST CSRs available */
+	csrr	a4, CSR_MEPC
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
+	csrr	a4, CSR_MCAUSE
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
+	csrr	a4, CSR_MTVAL
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(tval)(a3)
+	csrr	a4, CSR_MTVAL2
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(tval2)(a3)
+	csrr	a4, CSR_MTINST
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(tinst)(a3)
+	csrr	a4, CSR_MEPC
+	addi	a4, a4, 4
+	csrw	CSR_MEPC, a4
+	mret

From 626467cfd96f99230ff5d83f98562f23aee291c3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 17:37:54 +0530
Subject: [PATCH 0519/1765] lib: Remove scratch parameter from unpriv
 load/store functions

The scratch parameter of unpriv load/store functions is now redundant
hence we remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_unpriv.h      |  5 +----
 lib/sbi/sbi_ecall_legacy.c    | 13 ++++++-------
 lib/sbi/sbi_illegal_insn.c    |  2 +-
 lib/sbi/sbi_misaligned_ldst.c |  8 ++++----
 lib/sbi/sbi_unpriv.c          | 15 +++++----------
 5 files changed, 17 insertions(+), 26 deletions(-)

diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/sbi_unpriv.h
index 747ba731dd0..8cbd3de0ccc 100644
--- a/include/sbi/sbi_unpriv.h
+++ b/include/sbi/sbi_unpriv.h
@@ -17,12 +17,10 @@ struct sbi_trap_info;
 
 #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type)           \
 	type sbi_load_##type(const type *addr,             \
-			     struct sbi_scratch *scratch,  \
 			     struct sbi_trap_info *trap);
 
 #define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type)          \
 	void sbi_store_##type(type *addr, type val,        \
-			      struct sbi_scratch *scratch, \
 			      struct sbi_trap_info *trap);
 
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u8)
@@ -38,7 +36,6 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
 DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
 
-ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
-		   struct sbi_trap_info *trap);
+ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index bd7ee5af85d..70981e47478 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -22,14 +22,13 @@
 #include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 
-static int sbi_load_hart_mask_unpriv(struct sbi_scratch *scratch,
-				     ulong *pmask, ulong *hmask,
+static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 				     struct sbi_trap_info *uptrap)
 {
 	ulong mask = 0;
 
 	if (pmask) {
-		mask = sbi_load_ulong(pmask, scratch, uptrap);
+		mask = sbi_load_ulong(pmask, uptrap);
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	} else {
@@ -69,13 +68,13 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
 		sbi_ipi_clear_smode(scratch);
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
 			ret = sbi_ipi_send_smode(scratch, hmask, 0);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
@@ -84,7 +83,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0,
@@ -93,7 +92,7 @@ static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		ret = sbi_load_hart_mask_unpriv(scratch, (ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 413123d3713..81e419960ed 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -141,7 +141,7 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
 
 	if (unlikely((insn & 3) != 3)) {
 		if (insn == 0) {
-			insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+			insn = sbi_get_insn(regs->mepc, &uptrap);
 			if (uptrap.cause) {
 				uptrap.epc = regs->mepc;
 				return sbi_trap_redirect(regs, &uptrap,
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index b59efa01e79..73814c598a0 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -42,7 +42,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		 * Bit[0] == 0 implies trapped instruction value is
 		 * zero or special value.
 		 */
-		insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -120,7 +120,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	val.data_u64 = 0;
 	for (i = 0; i < len; i++) {
 		val.data_bytes[i] = sbi_load_u8((void *)(addr + i),
-						scratch, &uptrap);
+						&uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -162,7 +162,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		 * Bit[0] == 0 implies trapped instruction value is
 		 * zero or special value.
 		 */
-		insn = sbi_get_insn(regs->mepc, scratch, &uptrap);
+		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap, scratch);
@@ -230,7 +230,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 
 	for (i = 0; i < len; i++) {
 		sbi_store_u8((void *)(addr + i), val.data_bytes[i],
-			     scratch, &uptrap);
+			     &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap, scratch);
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 17244205bf5..ea050c9ed99 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -16,7 +16,6 @@
 
 #define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
 	type sbi_load_##type(const type *addr,                                \
-			     struct sbi_scratch *scratch,                     \
 			     struct sbi_trap_info *trap)                      \
 	{                                                                     \
 		register ulong tinfo asm("a3");                               \
@@ -47,7 +46,6 @@
 
 #define DEFINE_UNPRIVILEGED_STORE_FUNCTION(type, insn)                        \
 	void sbi_store_##type(type *addr, type val,                           \
-			      struct sbi_scratch *scratch,                    \
 			      struct sbi_trap_info *trap)                     \
 	{                                                                     \
 		register ulong tinfo asm("a3");                               \
@@ -91,14 +89,13 @@ DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
 u64 sbi_load_u64(const u64 *addr,
-		 struct sbi_scratch *scratch,
 		 struct sbi_trap_info *trap)
 {
-	u64 ret = sbi_load_u32((u32 *)addr, scratch, trap);
+	u64 ret = sbi_load_u32((u32 *)addr, trap);
 
 	if (trap->cause)
 		return 0;
-	ret |= ((u64)sbi_load_u32((u32 *)addr + 1, scratch, trap) << 32);
+	ret |= ((u64)sbi_load_u32((u32 *)addr + 1, trap) << 32);
 	if (trap->cause)
 		return 0;
 
@@ -106,21 +103,19 @@ u64 sbi_load_u64(const u64 *addr,
 }
 
 void sbi_store_u64(u64 *addr, u64 val,
-		   struct sbi_scratch *scratch,
 		   struct sbi_trap_info *trap)
 {
-	sbi_store_u32((u32 *)addr, val, scratch, trap);
+	sbi_store_u32((u32 *)addr, val, trap);
 	if (trap->cause)
 		return;
 
-	sbi_store_u32((u32 *)addr + 1, val >> 32, scratch, trap);
+	sbi_store_u32((u32 *)addr + 1, val >> 32, trap);
 	if (trap->cause)
 		return;
 }
 #endif
 
-ulong sbi_get_insn(ulong mepc, struct sbi_scratch *scratch,
-		   struct sbi_trap_info *trap)
+ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
 {
 	register ulong tinfo asm("a3");
 	register ulong ttmp asm("a4");

From cb78a482314e8e3c7f423bb13fc50bbd50c59b13 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 19:33:25 +0530
Subject: [PATCH 0520/1765] lib: sbi_trap: Remove scratch parameter from
 sbi_trap_redirect()

The scratch parameter of sbi_trap_redirect() is not used hence we
remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_trap.h        |  3 +--
 lib/sbi/sbi_ecall.c           |  2 +-
 lib/sbi/sbi_illegal_insn.c    |  5 ++---
 lib/sbi/sbi_misaligned_ldst.c | 12 ++++++------
 lib/sbi/sbi_trap.c            |  6 ++----
 5 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index b6918e0d6bd..54ccea7b2e2 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -205,8 +205,7 @@ struct sbi_trap_info {
 struct sbi_scratch;
 
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_trap_info *trap,
-		      struct sbi_scratch *scratch);
+		      struct sbi_trap_info *trap);
 
 void sbi_trap_handler(struct sbi_trap_regs *regs,
 		      struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 6acb1b7ef59..230dfa36367 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -111,7 +111,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 
 	if (ret == SBI_ETRAP) {
 		trap.epc = regs->mepc;
-		sbi_trap_redirect(regs, &trap, scratch);
+		sbi_trap_redirect(regs, &trap);
 	} else {
 		/*
 		 * This function should return non-zero value only in case of
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 81e419960ed..a374fa2ad82 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -32,7 +32,7 @@ static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
 	trap.tval2 = 0;
 	trap.tinst = 0;
 
-	return sbi_trap_redirect(regs, &trap, scratch);
+	return sbi_trap_redirect(regs, &trap);
 }
 
 static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
@@ -144,8 +144,7 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
 			insn = sbi_get_insn(regs->mepc, &uptrap);
 			if (uptrap.cause) {
 				uptrap.epc = regs->mepc;
-				return sbi_trap_redirect(regs, &uptrap,
-							 scratch);
+				return sbi_trap_redirect(regs, &uptrap);
 			}
 		}
 		if ((insn & 3) != 3)
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 73814c598a0..7c15a400c75 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -45,7 +45,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
-			return sbi_trap_redirect(regs, &uptrap, scratch);
+			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
 
@@ -114,7 +114,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
-		return sbi_trap_redirect(regs, &uptrap, scratch);
+		return sbi_trap_redirect(regs, &uptrap);
 	}
 
 	val.data_u64 = 0;
@@ -123,7 +123,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 						&uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
-			return sbi_trap_redirect(regs, &uptrap, scratch);
+			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
 
@@ -165,7 +165,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
-			return sbi_trap_redirect(regs, &uptrap, scratch);
+			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
 
@@ -225,7 +225,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
-		return sbi_trap_redirect(regs, &uptrap, scratch);
+		return sbi_trap_redirect(regs, &uptrap);
 	}
 
 	for (i = 0; i < len; i++) {
@@ -233,7 +233,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 			     &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
-			return sbi_trap_redirect(regs, &uptrap, scratch);
+			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 9aa6b857594..bab0571921a 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -74,13 +74,11 @@ static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
  *
  * @param regs pointer to register state
  * @param trap pointer to trap details
- * @param scratch pointer to sbi_scratch of current HART
  *
  * @return 0 on success and negative error code on failure
  */
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_trap_info *trap,
-		      struct sbi_scratch *scratch)
+		      struct sbi_trap_info *trap)
 {
 	ulong hstatus, vsstatus, prev_mode;
 #if __riscv_xlen == 32
@@ -273,7 +271,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		trap.tval = mtval;
 		trap.tval2 = mtval2;
 		trap.tinst = mtinst;
-		rc = sbi_trap_redirect(regs, &trap, scratch);
+		rc = sbi_trap_redirect(regs, &trap);
 		break;
 	};
 

From d11c79cd977443defe4260beec976fad29719eaf Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 19:46:00 +0530
Subject: [PATCH 0521/1765] lib: sbi_emulate_csr: Remove scratch and hartid
 parameter

We remove scratch and hartid parameter from various functions
for CSR emulation because we can always get current HART id
and current scratch pointer using just one CSR access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_emulate_csr.h |  9 ++++-----
 lib/sbi/sbi_emulate_csr.c     | 15 +++++++++------
 lib/sbi/sbi_illegal_insn.c    |  5 ++---
 3 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/include/sbi/sbi_emulate_csr.h b/include/sbi/sbi_emulate_csr.h
index fe357e50255..548056a1196 100644
--- a/include/sbi/sbi_emulate_csr.h
+++ b/include/sbi/sbi_emulate_csr.h
@@ -13,12 +13,11 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_trap_regs;
-struct sbi_scratch;
 
-int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
-			 struct sbi_scratch *scratch, ulong *csr_val);
+int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
+			 ulong *csr_val);
 
-int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
-			  struct sbi_scratch *scratch, ulong csr_val);
+int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
+			  ulong csr_val);
 
 #endif
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index dbb36cb92aa..41c92dfed29 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -13,14 +13,16 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
-			 struct sbi_scratch *scratch, ulong *csr_val)
+int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
+			 ulong *csr_val)
 {
 	int ret = 0;
 	ulong cen = -1UL;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
 	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
@@ -111,15 +113,16 @@ int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 
 	if (ret)
 		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
-			    __func__, hartid, csr_num);
+			    __func__, current_hartid(), csr_num);
 
 	return ret;
 }
 
-int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
-			  struct sbi_scratch *scratch, ulong csr_val)
+int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
+			  ulong csr_val)
 {
 	int ret = 0;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
 	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
@@ -179,7 +182,7 @@ int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
 
 	if (ret)
 		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
-			    __func__, hartid, csr_num);
+			    __func__, current_hartid(), csr_num);
 
 	return ret;
 }
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index a374fa2ad82..980b7dd7b54 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -57,7 +57,7 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 		return truly_illegal_insn(insn, hartid, mcause,
 					  regs, scratch);
 
-	if (sbi_emulate_csr_read(csr_num, hartid, regs, scratch, &csr_val))
+	if (sbi_emulate_csr_read(csr_num, regs, &csr_val))
 		return truly_illegal_insn(insn, hartid, mcause,
 					  regs, scratch);
 
@@ -87,8 +87,7 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 	};
 
-	if (do_write && sbi_emulate_csr_write(csr_num, hartid, regs,
-					      scratch, new_csr_val))
+	if (do_write && sbi_emulate_csr_write(csr_num, regs, new_csr_val))
 		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
 
 	SET_RD(insn, regs, csr_val);

From 5a7bd0c88d7455de46143ccd9c74a40162bd3611 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 19:54:32 +0530
Subject: [PATCH 0522/1765] lib: sbi_illegal_insn: Remove mcause, scratch and
 hartid parameters

We remove mcause, scratch and hartid parameters from various
functions for illegal instruction handling because we can always
get current HART id and current scratch pointer using just one
CSR access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_illegal_insn.h |  5 +----
 lib/sbi/sbi_illegal_insn.c     | 34 +++++++++++-----------------------
 lib/sbi/sbi_trap.c             |  3 +--
 3 files changed, 13 insertions(+), 29 deletions(-)

diff --git a/include/sbi/sbi_illegal_insn.h b/include/sbi/sbi_illegal_insn.h
index 1e1f74a1164..0397935e20e 100644
--- a/include/sbi/sbi_illegal_insn.h
+++ b/include/sbi/sbi_illegal_insn.h
@@ -13,10 +13,7 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_trap_regs;
-struct sbi_scratch;
 
-int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
-			     struct sbi_trap_regs *regs,
-			     struct sbi_scratch *scratch);
+int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs);
 
 #endif
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 980b7dd7b54..1b174875145 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -16,18 +16,14 @@
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
-typedef int (*illegal_insn_func)(ulong insn, u32 hartid, ulong mcause,
-				 struct sbi_trap_regs *regs,
-				 struct sbi_scratch *scratch);
+typedef int (*illegal_insn_func)(ulong insn, struct sbi_trap_regs *regs);
 
-static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
-			      struct sbi_trap_regs *regs,
-			      struct sbi_scratch *scratch)
+static int truly_illegal_insn(ulong insn, struct sbi_trap_regs *regs)
 {
 	struct sbi_trap_info trap;
 
 	trap.epc = regs->mepc;
-	trap.cause = mcause;
+	trap.cause = CAUSE_ILLEGAL_INSTRUCTION;
 	trap.tval = insn;
 	trap.tval2 = 0;
 	trap.tinst = 0;
@@ -35,9 +31,7 @@ static int truly_illegal_insn(ulong insn, u32 hartid, ulong mcause,
 	return sbi_trap_redirect(regs, &trap);
 }
 
-static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
-			      struct sbi_trap_regs *regs,
-			      struct sbi_scratch *scratch)
+static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 {
 	int do_write, rs1_num = (insn >> 15) & 0x1f;
 	ulong rs1_val = GET_RS1(insn, regs);
@@ -54,12 +48,10 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 	if ((regs->mstatus & MSTATUS_MPV) &&
 #endif
 	    (insn & INSN_MASK_WFI) == INSN_MATCH_WFI)
-		return truly_illegal_insn(insn, hartid, mcause,
-					  regs, scratch);
+		return truly_illegal_insn(insn, regs);
 
 	if (sbi_emulate_csr_read(csr_num, regs, &csr_val))
-		return truly_illegal_insn(insn, hartid, mcause,
-					  regs, scratch);
+		return truly_illegal_insn(insn, regs);
 
 	do_write = rs1_num;
 	switch (GET_RM(insn)) {
@@ -84,11 +76,11 @@ static int system_opcode_insn(ulong insn, u32 hartid, ulong mcause,
 		new_csr_val = csr_val & ~rs1_num;
 		break;
 	default:
-		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
+		return truly_illegal_insn(insn, regs);
 	};
 
 	if (do_write && sbi_emulate_csr_write(csr_num, regs, new_csr_val))
-		return truly_illegal_insn(insn, hartid, mcause, regs, scratch);
+		return truly_illegal_insn(insn, regs);
 
 	SET_RD(insn, regs, csr_val);
 
@@ -132,9 +124,7 @@ static illegal_insn_func illegal_insn_table[32] = {
 	truly_illegal_insn  /* 31 */
 };
 
-int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
-			     struct sbi_trap_regs *regs,
-			     struct sbi_scratch *scratch)
+int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
 {
 	struct sbi_trap_info uptrap;
 
@@ -147,10 +137,8 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause, ulong insn,
 			}
 		}
 		if ((insn & 3) != 3)
-			return truly_illegal_insn(insn, hartid, mcause, regs,
-						  scratch);
+			return truly_illegal_insn(insn, regs);
 	}
 
-	return illegal_insn_table[(insn & 0x7c) >> 2](insn, hartid, mcause,
-						      regs, scratch);
+	return illegal_insn_table[(insn & 0x7c) >> 2](insn, regs);
 }
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index bab0571921a..36702cac4d4 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -243,8 +243,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
-		rc  = sbi_illegal_insn_handler(hartid, mcause, mtval,
-					       regs, scratch);
+		rc  = sbi_illegal_insn_handler(mtval, regs);
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:

From fe37d7da29f67ae8ccc31f06e0f3e6c9a6b58054 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 21:30:02 +0530
Subject: [PATCH 0523/1765] lib: sbi_misaligned_ldst: Remove mcause, scratch
 and hartid parameters

We remove mcause, scratch and hartid parameters from various functions
for misaligned load/store handling because we can always get current
HART id and current scratch pointer using just one CSR access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_misaligned_ldst.h | 13 ++++---------
 lib/sbi/sbi_misaligned_ldst.c     | 16 ++++++----------
 lib/sbi/sbi_trap.c                |  8 ++------
 3 files changed, 12 insertions(+), 25 deletions(-)

diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h
index d95c8455a6c..ab27eb422fa 100644
--- a/include/sbi/sbi_misaligned_ldst.h
+++ b/include/sbi/sbi_misaligned_ldst.h
@@ -13,16 +13,11 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_trap_regs;
-struct sbi_scratch;
 
-int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
-				ulong addr, ulong tval2, ulong tinst,
-				struct sbi_trap_regs *regs,
-				struct sbi_scratch *scratch);
+int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
+				struct sbi_trap_regs *regs);
 
-int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
-				 ulong addr, ulong tval2, ulong tinst,
-				 struct sbi_trap_regs *regs,
-				 struct sbi_scratch *scratch);
+int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
+				 struct sbi_trap_regs *regs);
 
 #endif
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 7c15a400c75..29d79bb40f1 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -21,10 +21,8 @@ union reg_data {
 	u64 data_u64;
 };
 
-int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
-				ulong addr, ulong tval2, ulong tinst,
-				struct sbi_trap_regs *regs,
-				struct sbi_scratch *scratch)
+int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
+				struct sbi_trap_regs *regs)
 {
 	ulong insn;
 	union reg_data val;
@@ -110,7 +108,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 #endif
 	} else {
 		uptrap.epc = regs->mepc;
-		uptrap.cause = mcause;
+		uptrap.cause = CAUSE_MISALIGNED_LOAD;
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
@@ -141,10 +139,8 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
 	return 0;
 }
 
-int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
-				 ulong addr, ulong tval2, ulong tinst,
-				 struct sbi_trap_regs *regs,
-				 struct sbi_scratch *scratch)
+int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
+				 struct sbi_trap_regs *regs)
 {
 	ulong insn;
 	union reg_data val;
@@ -221,7 +217,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
 #endif
 	} else {
 		uptrap.epc = regs->mepc;
-		uptrap.cause = mcause;
+		uptrap.cause = CAUSE_MISALIGNED_STORE;
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 36702cac4d4..b06b33fb794 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -247,15 +247,11 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
-		rc = sbi_misaligned_load_handler(hartid, mcause, mtval,
-						 mtval2, mtinst, regs,
-						 scratch);
+		rc = sbi_misaligned_load_handler(mtval, mtval2, mtinst, regs);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
-		rc  = sbi_misaligned_store_handler(hartid, mcause, mtval,
-						   mtval2, mtinst, regs,
-						   scratch);
+		rc  = sbi_misaligned_store_handler(mtval, mtval2, mtinst, regs);
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:

From 7487116b41e6c06d3903b600a2231d2a68d0c4a4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Mar 2020 21:55:12 +0530
Subject: [PATCH 0524/1765] lib: sbi_ecall: Remove mcause, scratch and hartid
 parameters

We remove mcause, scratch and hartid parameters from various
functions for ecall handling because we can always get current
HART id and current scratch pointer using just one CSR access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h     | 10 +++-------
 include/sbi/sbi_hsm.h       |  2 ++
 lib/sbi/sbi_ecall.c         |  5 ++---
 lib/sbi/sbi_ecall_base.c    | 11 ++++-------
 lib/sbi/sbi_ecall_hsm.c     |  8 ++++----
 lib/sbi/sbi_ecall_legacy.c  |  5 +++--
 lib/sbi/sbi_ecall_replace.c | 19 ++++++++++---------
 lib/sbi/sbi_ecall_vendor.c  | 10 ++++------
 lib/sbi/sbi_trap.c          |  2 +-
 9 files changed, 33 insertions(+), 39 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 1b5649698a3..0b92e678a34 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -19,16 +19,13 @@
 
 struct sbi_trap_regs;
 struct sbi_trap_info;
-struct sbi_scratch;
 
 struct sbi_ecall_extension {
 	struct sbi_dlist head;
 	unsigned long extid_start;
 	unsigned long extid_end;
-	int (* probe)(struct sbi_scratch *scratch,
-		      unsigned long extid, unsigned long *out_val);
-	int (* handle)(struct sbi_scratch *scratch,
-		       unsigned long extid, unsigned long funcid,
+	int (* probe)(unsigned long extid, unsigned long *out_val);
+	int (* handle)(unsigned long extid, unsigned long funcid,
 		       unsigned long *args, unsigned long *out_val,
 		       struct sbi_trap_info *out_trap);
 };
@@ -51,8 +48,7 @@ int sbi_ecall_register_extension(struct sbi_ecall_extension *ext);
 
 void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext);
 
-int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch);
+int sbi_ecall_handler(struct sbi_trap_regs *regs);
 
 int sbi_ecall_init(void);
 
diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index f2f39baad59..57d41ff07ea 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -19,6 +19,8 @@
 #define SBI_HART_STARTED	3
 #define SBI_HART_UNKNOWN	4
 
+struct sbi_scratch;
+
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 230dfa36367..6c42553939f 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -79,8 +79,7 @@ void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext)
 		sbi_list_del_init(&ext->head);
 }
 
-int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch)
+int sbi_ecall_handler(struct sbi_trap_regs *regs)
 {
 	int ret = 0;
 	struct sbi_ecall_extension *ext;
@@ -100,7 +99,7 @@ int sbi_ecall_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs,
 
 	ext = sbi_ecall_find_extension(extension_id);
 	if (ext && ext->handle) {
-		ret = ext->handle(scratch, extension_id, func_id,
+		ret = ext->handle(extension_id, func_id,
 				  args, &out_val, &trap);
 		if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 		    extension_id <= SBI_EXT_0_1_SHUTDOWN)
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
index 6475745ec32..1049c806bb5 100644
--- a/lib/sbi/sbi_ecall_base.c
+++ b/lib/sbi/sbi_ecall_base.c
@@ -14,9 +14,7 @@
 #include <sbi/sbi_version.h>
 #include <sbi/riscv_asm.h>
 
-static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
-				unsigned long extid,
-				unsigned long *out_val)
+static int sbi_ecall_base_probe(unsigned long extid, unsigned long *out_val)
 {
 	struct sbi_ecall_extension *ext;
 
@@ -27,14 +25,13 @@ static int sbi_ecall_base_probe(struct sbi_scratch *scratch,
 	}
 
 	if (ext->probe)
-		return ext->probe(scratch, extid, out_val);
+		return ext->probe(extid, out_val);
 
 	*out_val = 1;
 	return 0;
 }
 
-static int sbi_ecall_base_handler(struct sbi_scratch *scratch,
-				  unsigned long extid, unsigned long funcid,
+static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
 				  unsigned long *args, unsigned long *out_val,
 				  struct sbi_trap_info *out_trap)
 {
@@ -64,7 +61,7 @@ static int sbi_ecall_base_handler(struct sbi_scratch *scratch,
 		*out_val = csr_read(CSR_MIMPID);
 		break;
 	case SBI_EXT_BASE_PROBE_EXT:
-		ret = sbi_ecall_base_probe(scratch, args[0], out_val);
+		ret = sbi_ecall_base_probe(args[0], out_val);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 5b77726ad31..028bf68ecfc 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -12,15 +12,15 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_version.h>
 #include <sbi/sbi_hsm.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/riscv_asm.h>
 
-static int sbi_ecall_hsm_handler(struct sbi_scratch *scratch,
-				 unsigned long extid, unsigned long funcid,
+static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 				 unsigned long *args, unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
-	int ret = 0;
-	int hstate;
+	int ret = 0, hstate;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	switch (funcid) {
 	case SBI_EXT_HSM_HART_START:
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 70981e47478..95f612aa4d9 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
@@ -39,14 +40,14 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 	return 0;
 }
 
-static int sbi_ecall_legacy_handler(struct sbi_scratch *scratch,
-				    unsigned long extid, unsigned long funcid,
+static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 				    unsigned long *args, unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong hmask = 0;
 
 	switch (extid) {
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 21f3809bc17..36a5c5c24b9 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -14,11 +14,11 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 
-static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
-				  unsigned long extid, unsigned long funcid,
+static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
 				  unsigned long *args, unsigned long *out_val,
 				  struct sbi_trap_info *out_trap)
 {
@@ -26,10 +26,11 @@ static int sbi_ecall_time_handler(struct sbi_scratch *scratch,
 
 	if (funcid == SBI_EXT_TIME_SET_TIMER) {
 #if __riscv_xlen == 32
-		sbi_timer_event_start(scratch,
+		sbi_timer_event_start(sbi_scratch_thishart_ptr(),
 				      (((u64)args[1] << 32) | (u64)args[0]));
 #else
-		sbi_timer_event_start(scratch, (u64)args[0]);
+		sbi_timer_event_start(sbi_scratch_thishart_ptr(),
+				      (u64)args[0]);
 #endif
 	} else
 		ret = SBI_ENOTSUPP;
@@ -43,14 +44,14 @@ struct sbi_ecall_extension ecall_time = {
 	.handle = sbi_ecall_time_handler,
 };
 
-static int sbi_ecall_rfence_handler(struct sbi_scratch *scratch,
-				    unsigned long extid, unsigned long funcid,
+static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 				    unsigned long *args, unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
 	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
@@ -106,15 +107,15 @@ struct sbi_ecall_extension ecall_rfence = {
 	.handle = sbi_ecall_rfence_handler,
 };
 
-static int sbi_ecall_ipi_handler(struct sbi_scratch *scratch,
-				 unsigned long extid, unsigned long funcid,
+static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
 				 unsigned long *args, unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
 	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_smode(scratch, args[0], args[1]);
+		ret = sbi_ipi_send_smode(sbi_scratch_thishart_ptr(),
+					 args[0], args[1]);
 	else
 		ret = SBI_ENOTSUPP;
 
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 70d044696fe..34c0be68224 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -13,21 +13,19 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
 
-static int sbi_ecall_vendor_probe(struct sbi_scratch *scratch,
-				  unsigned long extid,
+static int sbi_ecall_vendor_probe(unsigned long extid,
 				  unsigned long *out_val)
 {
-	*out_val = sbi_platform_vendor_ext_check(sbi_platform_ptr(scratch),
+	*out_val = sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr(),
 						 extid);
 	return 0;
 }
 
-static int sbi_ecall_vendor_handler(struct sbi_scratch *scratch,
-				    unsigned long extid, unsigned long funcid,
+static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 				    unsigned long *args, unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
-	return sbi_platform_vendor_ext_provider(sbi_platform_ptr(scratch),
+	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
 						extid, funcid, args,
 						out_val, out_trap);
 }
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b06b33fb794..7f8f30f791c 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -256,7 +256,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
 	case CAUSE_HYPERVISOR_ECALL:
-		rc  = sbi_ecall_handler(hartid, mcause, regs, scratch);
+		rc  = sbi_ecall_handler(regs);
 		msg = "ecall handler failed";
 		break;
 	default:

From 40b221baffd6bb348b63367784d4f6fcff53c24a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 20 Mar 2020 08:53:35 +0530
Subject: [PATCH 0525/1765] lib: sbi_trap: Simplify sbi_trap_handler() API

This patch simplify sbi_trap_handler() API as follows:
1. Remove current hartid local variable because sbi_trap_handler()
   itself does not need it.
2. Remove scratch parameter because none of the functions directly
   called by sbi_trap_handler() require it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S     |  1 -
 include/sbi/sbi_trap.h |  5 +----
 lib/sbi/sbi_trap.c     | 20 +++++++++-----------
 3 files changed, 10 insertions(+), 16 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d2aca98e445..cc6381da47a 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -556,7 +556,6 @@ _skip_mstatush_save:
 
 	/* Call C routine */
 	add	a0, sp, zero
-	csrr	a1, CSR_MSCRATCH
 	call	sbi_trap_handler
 
 	/* Restore all general regisers except SP and T0 */
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 54ccea7b2e2..5d0962fcb94 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -202,13 +202,10 @@ struct sbi_trap_info {
 	unsigned long tinst;
 };
 
-struct sbi_scratch;
-
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_trap_info *trap);
 
-void sbi_trap_handler(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch);
+void sbi_trap_handler(struct sbi_trap_regs *regs);
 
 #endif
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 7f8f30f791c..32fa699c6be 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -16,13 +16,16 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-static void __noreturn sbi_trap_error(const char *msg, int rc, u32 hartid,
+static void __noreturn sbi_trap_error(const char *msg, int rc,
 				      ulong mcause, ulong mtval, ulong mtval2,
 				      ulong mtinst, struct sbi_trap_regs *regs)
 {
+	u32 hartid = current_hartid();
+
 	sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc);
 	sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n",
 		   __func__, hartid, mcause, mtval);
@@ -208,14 +211,11 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
  * 7. Interrupts are disabled in MSTATUS CSR
  *
  * @param regs pointer to register state
- * @param scratch pointer to sbi_scratch of current HART
  */
-void sbi_trap_handler(struct sbi_trap_regs *regs,
-		      struct sbi_scratch *scratch)
+void sbi_trap_handler(struct sbi_trap_regs *regs)
 {
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
-	u32 hartid = current_hartid();
 	ulong mcause = csr_read(CSR_MCAUSE);
 	ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
 	struct sbi_trap_info trap;
@@ -229,10 +229,10 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 		mcause &= ~(1UL << (__riscv_xlen - 1));
 		switch (mcause) {
 		case IRQ_M_TIMER:
-			sbi_timer_process(scratch);
+			sbi_timer_process(sbi_scratch_thishart_ptr());
 			break;
 		case IRQ_M_SOFT:
-			sbi_ipi_process(scratch);
+			sbi_ipi_process(sbi_scratch_thishart_ptr());
 			break;
 		default:
 			msg = "unhandled external interrupt";
@@ -271,8 +271,6 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
 	};
 
 trap_error:
-	if (rc) {
-		sbi_trap_error(msg, rc, hartid, mcause, mtval,
-			       mtval2, mtinst, regs);
-	}
+	if (rc)
+		sbi_trap_error(msg, rc, mcause, mtval, mtval2, mtinst, regs);
 }

From 7b211ff92482379aa34c0a217e2aeded5713b2d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 20 Mar 2020 16:44:38 +0530
Subject: [PATCH 0526/1765] include: sbi_platform: Remove priv parameter from
 hart_start() callback

The priv parameter in hart_start() platform callback is redundant hence
we remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 14 ++++++--------
 lib/sbi/sbi_hsm.c          |  2 +-
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index c47ab463278..847e1744eac 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -138,8 +138,8 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
-	/** Bringup the given hart from previous stage **/
-	int (*hart_start)(u32 hartid, ulong saddr, ulong priv);
+	/** Bringup the given hart */
+	int (*hart_start)(u32 hartid, ulong saddr);
 	/**
 	 * Stop the current hart from running. This call doesn't expect to
 	 * return if success.
@@ -346,18 +346,16 @@ static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
  * a generic WFI based approach will be used to start/stop a hart in OpenSBI.
  *
  * @param plat pointer to struct sbi_platform
- * @param hartid Hart ID
- * @param saddr  Physical address in supervisor mode for hart to jump after
- *		 OpenSBI
- * @param priv	 A private context data from the caller
+ * @param hartid HART id
+ * @param saddr M-mode start physical address for the HART
  *
  * @return 0 if sucessful and negative error code on failure
  */
 static inline int sbi_platform_hart_start(const struct sbi_platform *plat,
-					  u32 hartid, ulong saddr, ulong priv)
+					  u32 hartid, ulong saddr)
 {
 	if (plat && sbi_platform_ops(plat)->hart_start)
-		return sbi_platform_ops(plat)->hart_start(hartid, saddr, priv);
+		return sbi_platform_ops(plat)->hart_start(hartid, saddr);
 	return SBI_ENOTSUPP;
 }
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 10316c595da..c896f7949bc 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -240,7 +240,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	if (sbi_platform_has_hart_hotplug(plat) ||
 	   (sbi_platform_has_hart_secondary_boot(plat) && !init_count)) {
 		return sbi_platform_hart_start(plat, hartid,
-					     scratch->warmboot_addr, priv);
+					       scratch->warmboot_addr);
 	} else {
 		sbi_platform_ipi_send(plat, hartid);
 	}

From 5b6957eed75ca7842861e0f6765d0f6a64408e05 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 26 Mar 2020 18:10:02 +0530
Subject: [PATCH 0527/1765] include: Use more consistent name for atomic xchg()
 and cmpxchg()

We should remove the "arch_" prefix from atomic xchg() and cmpxchg()
function names to have consistent naming of all atomic functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_atomic.h |  4 ++--
 lib/sbi/riscv_atomic.c     |  4 ++--
 lib/sbi/sbi_hsm.c          | 16 ++++++++--------
 lib/sbi/sbi_init.c         |  2 +-
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 8543f4d1899..3972e0b727c 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -29,9 +29,9 @@ long atomic_add_return(atomic_t *atom, long value);
 
 long atomic_sub_return(atomic_t *atom, long value);
 
-long arch_atomic_cmpxchg(atomic_t *atom, long oldval, long newval);
+long atomic_cmpxchg(atomic_t *atom, long oldval, long newval);
 
-long arch_atomic_xchg(atomic_t *atom, long newval);
+long atomic_xchg(atomic_t *atom, long newval);
 
 unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 				  unsigned int newval);
diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index fcf3ed1fd01..558bca8c139 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -167,7 +167,7 @@ long atomic_sub_return(atomic_t *atom, long value)
 			__cmpxchg((ptr), _o_, _n_, sizeof(*(ptr))); \
 	})
 
-long arch_atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
+long atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
 {
 #ifdef __riscv_atomic
 	return __sync_val_compare_and_swap(&atom->counter, oldval, newval);
@@ -176,7 +176,7 @@ long arch_atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
 #endif
 }
 
-long arch_atomic_xchg(atomic_t *atom, long newval)
+long atomic_xchg(atomic_t *atom, long newval)
 {
 	/* Atomically set new value and return old value. */
 #ifdef __riscv_atomic
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index c896f7949bc..e7b2f0471b9 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -110,8 +110,8 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
-				       SBI_HART_STARTED);
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
+				  SBI_HART_STARTED);
 	if (oldstate != SBI_HART_STARTING)
 		sbi_hart_hang();
 }
@@ -178,8 +178,8 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 							    hart_data_offset);
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 
-	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
-				     SBI_HART_STOPPED);
+	hstate = atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
+				SBI_HART_STOPPED);
 	if (hstate != SBI_HART_STOPPING)
 		goto fail_exit;
 
@@ -216,8 +216,8 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	if (!rscratch)
 		return SBI_EINVAL;
 	hdata = sbi_scratch_offset_ptr(rscratch, hart_data_offset);
-	hstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
-				     SBI_HART_STARTING);
+	hstate = atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
+				SBI_HART_STARTING);
 	if (hstate == SBI_HART_STARTED)
 		return SBI_EALREADY_STARTED;
 
@@ -258,8 +258,8 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	if (!sbi_hsm_hart_started(hartid))
 		return SBI_EINVAL;
 
-	oldstate = arch_atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
-				       SBI_HART_STOPPING);
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
+				  SBI_HART_STOPPING);
 	if (oldstate != SBI_HART_STARTED) {
 		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
 			   __func__, oldstate);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 4e1699d59e7..f0ce20943af 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -285,7 +285,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	    sbi_platform_hart_invalid(plat, hartid))
 		sbi_hart_hang();
 
-	if (arch_atomic_xchg(&coldboot_lottery, 1) == 0)
+	if (atomic_xchg(&coldboot_lottery, 1) == 0)
 		coldboot = TRUE;
 
 	if (coldboot)

From dd0f21c560f7139fc0c30bea1c264d8cb09144fe Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 26 Mar 2020 18:35:38 +0530
Subject: [PATCH 0528/1765] lib: sbi_scratch: Introduce
 sbi_scratch_last_hartid() API

The patch adds sbi_scratch_last_hartid() API which returns
last HART id having a scratch space. We can use this new API
to optimize places where we iterate over HART id from 0 to
SBI_HARTMASK_MAX_BITS.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 6 ++++++
 lib/sbi/sbi_hsm.c         | 4 ++--
 lib/sbi/sbi_init.c        | 2 +-
 lib/sbi/sbi_scratch.c     | 5 ++++-
 4 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e84890027ef..8086207fd84 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -113,6 +113,12 @@ extern struct sbi_scratch *hartid_to_scratch_table[];
 #define sbi_hartid_to_scratch(__hartid) \
 	hartid_to_scratch_table[__hartid]
 
+/** Last HART id having a sbi_scratch pointer */
+extern u32 last_hartid_having_scratch;
+
+/** Get last HART id having a sbi_scratch pointer */
+#define sbi_scratch_last_hartid()	last_hartid_having_scratch
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index e7b2f0471b9..4330a22f93c 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -88,7 +88,7 @@ bool sbi_hsm_hart_started(u32 hartid)
 int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask)
 {
 	ulong i;
-	ulong hcount = SBI_HARTMASK_MAX_BITS;
+	ulong hcount = sbi_scratch_last_hartid() + 1;
 
 	*out_hmask = 0;
 	if (hcount <= hbase)
@@ -153,7 +153,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 			return SBI_ENOMEM;
 
 		/* Initialize hart state data for every hart */
-		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+		for (i = 0; i <= sbi_scratch_last_hartid(); i++) {
 			rscratch = sbi_hartid_to_scratch(i);
 			if (!rscratch)
 				continue;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f0ce20943af..f448b794cc4 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -128,7 +128,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	coldboot_done = 1;
 
 	/* Send an IPI to all HARTs waiting for coldboot */
-	for (int i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+	for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&
 		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
 			sbi_platform_ipi_send(plat, i);
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 8b635705074..96bae5be400 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
+u32 last_hartid_having_scratch = SBI_HARTMASK_MAX_BITS;
 struct sbi_scratch *hartid_to_scratch_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
@@ -32,6 +33,8 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 		hartid_to_scratch_table[i] =
 			((hartid2scratch)scratch->hartid_to_scratch)(i,
 					sbi_platform_hart_index(plat, i));
+		if (hartid_to_scratch_table[i])
+			last_hartid_having_scratch = i;
 	}
 
 	return 0;
@@ -71,7 +74,7 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
 	spin_unlock(&extra_lock);
 
 	if (ret) {
-		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+		for (i = 0; i < sbi_scratch_last_hartid(); i++) {
 			rscratch = sbi_hartid_to_scratch(i);
 			if (!rscratch)
 				continue;

From 54b2779cfeeaaf7752df19deba56b79bad1caea6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Mar 2020 10:58:47 +0530
Subject: [PATCH 0529/1765] include: sbi_tlb: Remove scratch parameter from
 sbi_tlb_request()

The sbi_ipi_send_many() should get current HART scratch pointer
on it's own using eventually hence removing scratch parameter from
sbi_tlb_request().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_tlb.h       |  3 +--
 lib/sbi/sbi_ecall_legacy.c  |  6 +++---
 lib/sbi/sbi_ecall_replace.c | 15 +++++++--------
 lib/sbi/sbi_tlb.c           |  6 +++---
 4 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 67c39000e6d..6a07ee2c09f 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -53,8 +53,7 @@ do { \
 
 #define SBI_TLB_INFO_SIZE		sizeof(struct sbi_tlb_info)
 
-int sbi_tlb_request(struct sbi_scratch *scratch, ulong hmask,
-		    ulong hbase, struct sbi_tlb_info *tinfo);
+int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo);
 
 int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot);
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 95f612aa4d9..c16a6113e7f 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -80,7 +80,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
 					  SBI_ITLB_FLUSH, source_hart);
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
@@ -89,7 +89,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0,
 					  SBI_TLB_FLUSH_VMA, source_hart);
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
@@ -98,7 +98,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],
 					  SBI_TLB_FLUSH_VMA_ASID, source_hart);
-			ret = sbi_tlb_request(scratch, hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 36a5c5c24b9..585b16c634a 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -51,7 +51,6 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
 	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
@@ -62,37 +61,37 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
 		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
 				  SBI_ITLB_FLUSH, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
 				  SBI_TLB_FLUSH_GVMA, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
 				  SBI_TLB_FLUSH_GVMA_VMID, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
 				  SBI_TLB_FLUSH_VVMA, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
 				  SBI_TLB_FLUSH_VVMA_ASID, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
 				  SBI_TLB_FLUSH_VMA, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
 		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
 				  SBI_TLB_FLUSH_VMA_ASID, source_hart);
-		ret = sbi_tlb_request(scratch, args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 1b66fdf2de0..64ec28b0f46 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -375,10 +375,10 @@ static struct sbi_ipi_event_ops tlb_ops = {
 
 static u32 tlb_event = SBI_IPI_EVENT_MAX;
 
-int sbi_tlb_request(struct sbi_scratch *scratch, ulong hmask,
-		    ulong hbase, struct sbi_tlb_info *tinfo)
+int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase, tlb_event, tinfo);
+	return sbi_ipi_send_many(sbi_scratch_thishart_ptr(),
+				 hmask, hbase, tlb_event, tinfo);
 }
 
 int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)

From 9e52a45f4be89df7000dcc1009af669e2e30d850 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Mar 2020 11:26:11 +0530
Subject: [PATCH 0530/1765] include: sbi_ipi: Remove scratch parameter from
 most functions

This patch removes scratch parameter from most sbi_ipi functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ipi.h       | 11 +++++------
 lib/sbi/sbi_ecall_legacy.c  |  4 ++--
 lib/sbi/sbi_ecall_replace.c |  3 +--
 lib/sbi/sbi_ipi.c           | 19 ++++++++++---------
 lib/sbi/sbi_system.c        |  4 ++--
 lib/sbi/sbi_tlb.c           |  3 +--
 lib/sbi/sbi_trap.c          |  2 +-
 7 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index bf91142ce00..617872c1bf6 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -49,20 +49,19 @@ struct sbi_ipi_event_ops {
 	void (* process)(struct sbi_scratch *scratch);
 };
 
-int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask,
-		      ulong hbase, u32 event, void *data);
+int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data);
 
 int sbi_ipi_event_create(const struct sbi_ipi_event_ops *ops);
 
 void sbi_ipi_event_destroy(u32 event);
 
-int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
+int sbi_ipi_send_smode(ulong hmask, ulong hbase);
 
-void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
+void sbi_ipi_clear_smode(void);
 
-int sbi_ipi_send_halt(struct sbi_scratch *scratch, ulong hmask, ulong hbase);
+int sbi_ipi_send_halt(ulong hmask, ulong hbase);
 
-void sbi_ipi_process(struct sbi_scratch *scratch);
+void sbi_ipi_process(void);
 
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index c16a6113e7f..32183cbf520 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -66,13 +66,13 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_getc();
 		break;
 	case SBI_EXT_0_1_CLEAR_IPI:
-		sbi_ipi_clear_smode(scratch);
+		sbi_ipi_clear_smode();
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
 		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
-			ret = sbi_ipi_send_smode(scratch, hmask, 0);
+			ret = sbi_ipi_send_smode(hmask, 0);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 585b16c634a..7ef817da00d 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -113,8 +113,7 @@ static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
 	int ret = 0;
 
 	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_smode(sbi_scratch_thishart_ptr(),
-					 args[0], args[1]);
+		ret = sbi_ipi_send_smode(args[0], args[1]);
 	else
 		ret = SBI_ENOTSUPP;
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index c60d34ba844..a27dea0714e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -73,11 +73,11 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
  * set to all online harts if the intention is to send IPIs to all the harts.
  * If hmask is zero, no IPIs will be sent.
  */
-int sbi_ipi_send_many(struct sbi_scratch *scratch, ulong hmask, ulong hbase,
-			u32 event, void *data)
+int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
 	ulong i, m;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (hbase != -1UL) {
 		rc = sbi_hsm_hart_started_mask(hbase, &m);
@@ -143,12 +143,12 @@ static struct sbi_ipi_event_ops ipi_smode_ops = {
 
 static u32 ipi_smode_event = SBI_IPI_EVENT_MAX;
 
-int sbi_ipi_send_smode(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
+int sbi_ipi_send_smode(ulong hmask, ulong hbase)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase, ipi_smode_event, NULL);
+	return sbi_ipi_send_many(hmask, hbase, ipi_smode_event, NULL);
 }
 
-void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
+void sbi_ipi_clear_smode(void)
 {
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
@@ -165,16 +165,17 @@ static struct sbi_ipi_event_ops ipi_halt_ops = {
 
 static u32 ipi_halt_event = SBI_IPI_EVENT_MAX;
 
-int sbi_ipi_send_halt(struct sbi_scratch *scratch, ulong hmask, ulong hbase)
+int sbi_ipi_send_halt(ulong hmask, ulong hbase)
 {
-	return sbi_ipi_send_many(scratch, hmask, hbase, ipi_halt_event, NULL);
+	return sbi_ipi_send_many(hmask, hbase, ipi_halt_event, NULL);
 }
 
-void sbi_ipi_process(struct sbi_scratch *scratch)
+void sbi_ipi_process(void)
 {
 	unsigned long ipi_type;
 	unsigned int ipi_event;
 	const struct sbi_ipi_event_ops *ipi_ops;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
@@ -244,7 +245,7 @@ void sbi_ipi_exit(struct sbi_scratch *scratch)
 	csr_clear(CSR_MIE, MIP_MSIP);
 
 	/* Process pending IPIs */
-	sbi_ipi_process(scratch);
+	sbi_ipi_process();
 
 	/* Platform exit */
 	sbi_platform_ipi_exit(sbi_platform_ptr(scratch));
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 46ec36fd656..ffe0b41bdd8 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -47,7 +47,7 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
-			sbi_ipi_send_halt(scratch, hmask, hbase);
+			sbi_ipi_send_halt(hmask, hbase);
 		hbase += BITS_PER_LONG;
 	}
 
@@ -71,7 +71,7 @@ void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
-			sbi_ipi_send_halt(scratch, hmask, hbase);
+			sbi_ipi_send_halt(hmask, hbase);
 		hbase += BITS_PER_LONG;
 	}
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 64ec28b0f46..5e39da450a2 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -377,8 +377,7 @@ static u32 tlb_event = SBI_IPI_EVENT_MAX;
 
 int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 {
-	return sbi_ipi_send_many(sbi_scratch_thishart_ptr(),
-				 hmask, hbase, tlb_event, tinfo);
+	return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);
 }
 
 int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 32fa699c6be..84f1683e0d0 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -232,7 +232,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 			sbi_timer_process(sbi_scratch_thishart_ptr());
 			break;
 		case IRQ_M_SOFT:
-			sbi_ipi_process(sbi_scratch_thishart_ptr());
+			sbi_ipi_process();
 			break;
 		default:
 			msg = "unhandled external interrupt";

From ec0d80f5b4928ebedee8881be47f8c430db667af Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Mar 2020 11:43:37 +0530
Subject: [PATCH 0531/1765] include: sbi_system: Remove scratch parameter and
 redundant functions

This patch removes scratch parameter and redundant functions from
sbi_system.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_system.h   | 14 ++------------
 lib/sbi/sbi_ecall_legacy.c |  2 +-
 lib/sbi/sbi_init.c         |  8 ++++----
 lib/sbi/sbi_system.c       | 26 ++++----------------------
 4 files changed, 11 insertions(+), 39 deletions(-)

diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 3ad83484df3..8d9c18b3343 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -12,18 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
-struct sbi_scratch;
+void __noreturn sbi_system_reboot(u32 type);
 
-int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot);
-
-int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot);
-
-void sbi_system_early_exit(struct sbi_scratch *scratch);
-
-void sbi_system_final_exit(struct sbi_scratch *scratch);
-
-void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type);
-
-void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type);
+void __noreturn sbi_system_shutdown(u32 type);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 32183cbf520..36d6f17ff65 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -102,7 +102,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
-		sbi_system_shutdown(scratch, 0);
+		sbi_system_shutdown(0);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f448b794cc4..b01bff1ccca 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -160,7 +160,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_early_init(scratch, TRUE);
+	rc = sbi_platform_early_init(plat, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -192,7 +192,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_final_init(scratch, TRUE);
+	rc = sbi_platform_final_init(plat, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -224,7 +224,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_early_init(scratch, FALSE);
+	rc = sbi_platform_early_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -248,7 +248,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_system_final_init(scratch, FALSE);
+	rc = sbi_platform_final_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();
 
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index ffe0b41bdd8..5d4c7de8c19 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -17,30 +17,11 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
-int sbi_system_early_init(struct sbi_scratch *scratch, bool cold_boot)
-{
-	return sbi_platform_early_init(sbi_platform_ptr(scratch), cold_boot);
-}
-
-int sbi_system_final_init(struct sbi_scratch *scratch, bool cold_boot)
-{
-	return sbi_platform_final_init(sbi_platform_ptr(scratch), cold_boot);
-}
-
-void sbi_system_early_exit(struct sbi_scratch *scratch)
-{
-	sbi_platform_early_exit(sbi_platform_ptr(scratch));
-}
-
-void sbi_system_final_exit(struct sbi_scratch *scratch)
-{
-	sbi_platform_final_exit(sbi_platform_ptr(scratch));
-}
-
-void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
+void __noreturn sbi_system_reboot(u32 type)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Send HALT IPI to every hart other than the current hart */
 	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {
@@ -61,10 +42,11 @@ void __noreturn sbi_system_reboot(struct sbi_scratch *scratch, u32 type)
 	sbi_exit(scratch);
 }
 
-void __noreturn sbi_system_shutdown(struct sbi_scratch *scratch, u32 type)
+void __noreturn sbi_system_shutdown(u32 type)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Send HALT IPI to every hart other than the current hart */
 	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {

From 0a28ea54dce4140593a55dd61606437595ebe53d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Mar 2020 12:08:34 +0530
Subject: [PATCH 0532/1765] include: sbi_timer: Remove scratch parameter from
 most funcitons

This patch removes scratch parameter from most sbi_timer functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_timer.h     | 23 ++++++++++++++++-------
 lib/sbi/sbi_ecall_legacy.c  |  7 ++-----
 lib/sbi/sbi_ecall_replace.c |  7 ++-----
 lib/sbi/sbi_emulate_csr.c   | 24 ++++++++++++------------
 lib/sbi/sbi_timer.c         | 33 +++++++++++++++++++--------------
 lib/sbi/sbi_trap.c          |  3 +--
 6 files changed, 52 insertions(+), 45 deletions(-)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 401be683451..87bbdbfa086 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -14,22 +14,31 @@
 
 struct sbi_scratch;
 
-u64 sbi_timer_value(struct sbi_scratch *scratch);
+/** Get timer value for current HART */
+u64 sbi_timer_value(void);
 
-u64 sbi_timer_virt_value(struct sbi_scratch *scratch);
+/** Get virtualized timer value for current HART */
+u64 sbi_timer_virt_value(void);
 
-u64 sbi_timer_get_delta(struct sbi_scratch *scratch);
+/** Get timer delta value for current HART */
+u64 sbi_timer_get_delta(void);
 
-void sbi_timer_set_delta(struct sbi_scratch *scratch, ulong delta);
+/** Set timer delta value for current HART */
+void sbi_timer_set_delta(ulong delta);
 
-void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper);
+/** Set upper 32-bits of timer delta value for current HART */
+void sbi_timer_set_delta_upper(ulong delta_upper);
 
-void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event);
+/** Start timer event for current HART */
+void sbi_timer_event_start(u64 next_event);
 
-void sbi_timer_process(struct sbi_scratch *scratch);
+/** Process timer event for current HART */
+void sbi_timer_process(void);
 
+/* Initialize timer */
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot);
 
+/* Exit timer */
 void sbi_timer_exit(struct sbi_scratch *scratch);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 36d6f17ff65..8f32027bd23 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -15,7 +15,6 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
@@ -47,16 +46,14 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong hmask = 0;
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
 #if __riscv_xlen == 32
-		sbi_timer_event_start(scratch,
-				      (((u64)args[1] << 32) | (u64)args[0]));
+		sbi_timer_event_start((((u64)args[1] << 32) | (u64)args[0]));
 #else
-		sbi_timer_event_start(scratch, (u64)args[0]);
+		sbi_timer_event_start((u64)args[0]);
 #endif
 		break;
 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 7ef817da00d..88a6f08c072 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -14,7 +14,6 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 
@@ -26,11 +25,9 @@ static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
 
 	if (funcid == SBI_EXT_TIME_SET_TIMER) {
 #if __riscv_xlen == 32
-		sbi_timer_event_start(sbi_scratch_thishart_ptr(),
-				      (((u64)args[1] << 32) | (u64)args[0]));
+		sbi_timer_event_start((((u64)args[1] << 32) | (u64)args[0]));
 #else
-		sbi_timer_event_start(sbi_scratch_thishart_ptr(),
-				      (u64)args[0]);
+		sbi_timer_event_start((u64)args[0]);
 #endif
 	} else
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 41c92dfed29..a85277e495e 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -22,7 +22,6 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 {
 	int ret = 0;
 	ulong cen = -1UL;
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
 	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
@@ -36,7 +35,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	switch (csr_num) {
 	case CSR_HTIMEDELTA:
 		if (prev_mode == PRV_S && !virt)
-			*csr_val = sbi_timer_get_delta(scratch);
+			*csr_val = sbi_timer_get_delta();
 		else
 			ret = SBI_ENOTSUPP;
 		break;
@@ -48,8 +47,8 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	case CSR_TIME:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = (virt) ? sbi_timer_virt_value(scratch):
-				    sbi_timer_value(scratch);
+		*csr_val = (virt) ? sbi_timer_virt_value():
+				    sbi_timer_value();
 		break;
 	case CSR_INSTRET:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
@@ -69,7 +68,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 #if __riscv_xlen == 32
 	case CSR_HTIMEDELTAH:
 		if (prev_mode == PRV_S && !virt)
-			*csr_val = sbi_timer_get_delta(scratch) >> 32;
+			*csr_val = sbi_timer_get_delta() >> 32;
 		else
 			ret = SBI_ENOTSUPP;
 		break;
@@ -81,8 +80,8 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	case CSR_TIMEH:
 		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
 			return -1;
-		*csr_val = (virt) ? sbi_timer_virt_value(scratch) >> 32:
-				    sbi_timer_value(scratch) >> 32;
+		*csr_val = (virt) ? sbi_timer_virt_value() >> 32:
+				    sbi_timer_value() >> 32;
 		break;
 	case CSR_INSTRETH:
 		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
@@ -112,7 +111,8 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	};
 
 	if (ret)
-		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
+		sbi_dprintf(sbi_scratch_thishart_ptr(),
+			    "%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, current_hartid(), csr_num);
 
 	return ret;
@@ -122,7 +122,6 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 			  ulong csr_val)
 {
 	int ret = 0;
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
 	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
@@ -133,7 +132,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 	switch (csr_num) {
 	case CSR_HTIMEDELTA:
 		if (prev_mode == PRV_S && !virt)
-			sbi_timer_set_delta(scratch, csr_val);
+			sbi_timer_set_delta(csr_val);
 		else
 			ret = SBI_ENOTSUPP;
 		break;
@@ -152,7 +151,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 #if __riscv_xlen == 32
 	case CSR_HTIMEDELTAH:
 		if (prev_mode == PRV_S && !virt)
-			sbi_timer_set_delta_upper(scratch, csr_val);
+			sbi_timer_set_delta_upper(csr_val);
 		else
 			ret = SBI_ENOTSUPP;
 		break;
@@ -181,7 +180,8 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 	};
 
 	if (ret)
-		sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
+		sbi_dprintf(sbi_scratch_thishart_ptr(),
+			    "%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, current_hartid(), csr_num);
 
 	return ret;
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 60ddfaad4ec..60d9675e139 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -11,6 +11,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 
 static unsigned long time_delta_off;
@@ -37,9 +38,9 @@ u64 get_ticks(void)
 }
 #endif
 
-u64 sbi_timer_value(struct sbi_scratch *scratch)
+u64 sbi_timer_value(void)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
 	if (sbi_platform_has_timer_value(plat))
 		return sbi_platform_timer_value(plat);
@@ -47,43 +48,47 @@ u64 sbi_timer_value(struct sbi_scratch *scratch)
 		return get_ticks();
 }
 
-u64 sbi_timer_virt_value(struct sbi_scratch *scratch)
+u64 sbi_timer_virt_value(void)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						 time_delta_off);
 
-	return sbi_timer_value(scratch) + *time_delta;
+	return sbi_timer_value() + *time_delta;
 }
 
-u64 sbi_timer_get_delta(struct sbi_scratch *scratch)
+u64 sbi_timer_get_delta(void)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						 time_delta_off);
 
 	return *time_delta;
 }
 
-void sbi_timer_set_delta(struct sbi_scratch *scratch, ulong delta)
+void sbi_timer_set_delta(ulong delta)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						 time_delta_off);
 
 	*time_delta = (u64)delta;
 }
 
-void sbi_timer_set_delta_upper(struct sbi_scratch *scratch, ulong delta_upper)
+void sbi_timer_set_delta_upper(ulong delta_upper)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
+	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						 time_delta_off);
 
 	*time_delta &= 0xffffffffULL;
 	*time_delta |= ((u64)delta_upper << 32);
 }
 
-void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
+void sbi_timer_event_start(u64 next_event)
 {
-	sbi_platform_timer_event_start(sbi_platform_ptr(scratch), next_event);
+	sbi_platform_timer_event_start(sbi_platform_thishart_ptr(), next_event);
 	csr_clear(CSR_MIP, MIP_STIP);
 	csr_set(CSR_MIE, MIP_MTIP);
 }
 
-void sbi_timer_process(struct sbi_scratch *scratch)
+void sbi_timer_process(void)
 {
 	csr_clear(CSR_MIE, MIP_MTIP);
 	csr_set(CSR_MIP, MIP_STIP);
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 84f1683e0d0..d482ad5ba02 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -16,7 +16,6 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_misaligned_ldst.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
@@ -229,7 +228,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 		mcause &= ~(1UL << (__riscv_xlen - 1));
 		switch (mcause) {
 		case IRQ_M_TIMER:
-			sbi_timer_process(sbi_scratch_thishart_ptr());
+			sbi_timer_process();
 			break;
 		case IRQ_M_SOFT:
 			sbi_ipi_process();

From 648507a86791d4558e96c9876e757cee2c30b203 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 27 Mar 2020 12:16:16 +0530
Subject: [PATCH 0533/1765] include: sbi_console: Remove scratch parameter from
 sbi_dprintf()

This patch removes scratch parameter from sbi_dprintf() function
because sbi_dprintf() can use sbi_scratch_thishart_ptr() to get
current HART scratch space.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_console.h | 5 ++---
 lib/sbi/sbi_console.c     | 8 +++++---
 lib/sbi/sbi_emulate_csr.c | 7 ++-----
 lib/sbi/sbi_tlb.c         | 2 +-
 4 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 45af22f3035..7d648f0b515 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -30,10 +30,9 @@ int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, const char *format, ...);
 
 int __printf(1, 2) sbi_printf(const char *format, ...);
 
-struct sbi_scratch;
+int __printf(1, 2) sbi_dprintf(const char *format, ...);
 
-int __printf(2, 3) sbi_dprintf(struct sbi_scratch *scratch,
-			       const char *format, ...);
+struct sbi_scratch;
 
 int sbi_console_init(struct sbi_scratch *scratch);
 
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 03dcdb24e4e..7189b9bf230 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -7,9 +7,10 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/sbi_platform.h>
-#include <sbi/sbi_console.h>
 #include <sbi/riscv_locks.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
 
 static const struct sbi_platform *console_plat = NULL;
 static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
@@ -375,10 +376,11 @@ int sbi_printf(const char *format, ...)
 	return retval;
 }
 
-int sbi_dprintf(struct sbi_scratch *scratch, const char *format, ...)
+int sbi_dprintf(const char *format, ...)
 {
 	va_list args;
 	int retval = 0;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	va_start(args, format);
 	if (scratch->options & SBI_SCRATCH_DEBUG_PRINTS)
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index a85277e495e..62c21a66508 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -13,7 +13,6 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
@@ -111,8 +110,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	};
 
 	if (ret)
-		sbi_dprintf(sbi_scratch_thishart_ptr(),
-			    "%s: hartid%d: invalid csr_num=0x%x\n",
+		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, current_hartid(), csr_num);
 
 	return ret;
@@ -180,8 +178,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 	};
 
 	if (ret)
-		sbi_dprintf(sbi_scratch_thishart_ptr(),
-			    "%s: hartid%d: invalid csr_num=0x%x\n",
+		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
 			    __func__, current_hartid(), csr_num);
 
 	return ret;
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 5e39da450a2..d857162fe35 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -359,7 +359,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 		 * this properly.
 		 */
 		sbi_tlb_process_count(scratch, 1);
-		sbi_dprintf(remote_scratch, "hart%d: hart%d tlb fifo full\n",
+		sbi_dprintf("hart%d: hart%d tlb fifo full\n",
 			    curr_hartid, remote_hartid);
 	}
 

From e5a7f556ce22984128bed0a336551a968c818450 Mon Sep 17 00:00:00 2001
From: Liu Yibin <yibin_liu@c-sky.com>
Date: Fri, 27 Mar 2020 11:31:48 +0800
Subject: [PATCH 0534/1765] platform: thead/c910: Use HSM extension to boot
 secondary cores

Remove custom vendor extension and use HSM extension
to boot secondary cores

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 platform/thead/c910/platform.c | 20 +++-----------------
 platform/thead/c910/platform.h |  5 ++---
 2 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 9d98a312913..adb1a20acf2 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -106,25 +106,11 @@ static int c910_system_shutdown(u32 type)
 	return 0;
 }
 
-void sbi_boot_other_core(int hartid)
+int c910_hart_start(u32 hartid, ulong saddr)
 {
-	csr_write(CSR_MRVBR, FW_TEXT_START);
+	csr_write(CSR_MRVBR, saddr);
 	csr_write(CSR_MRMR, csr_read(CSR_MRMR) | (1 << hartid));
-}
 
-static int c910_vendor_ext_provider(long extid, long funcid,
-				unsigned long *args,
-				unsigned long *out_value,
-				struct sbi_trap_info *out_trap)
-{
-	switch (extid) {
-	case SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE:
-		sbi_boot_other_core((int)args[0]);
-		break;
-	default:
-		sbi_printf("Unsupported private sbi call: %ld\n", extid);
-		asm volatile ("ebreak");
-	}
 	return 0;
 }
 
@@ -143,7 +129,7 @@ const struct sbi_platform_operations platform_ops = {
 
 	.system_shutdown     = c910_system_shutdown,
 
-	.vendor_ext_provider = c910_vendor_ext_provider,
+	.hart_start          = c910_hart_start,
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
index 5e74128a40c..0faf2afde5a 100644
--- a/platform/thead/c910/platform.h
+++ b/platform/thead/c910/platform.h
@@ -10,7 +10,8 @@
 #define SBI_THEAD_FEATURES	\
 	(SBI_PLATFORM_HAS_SCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION | \
+	 SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
 
 #define CSR_MCOR         0x7c2
 #define CSR_MHCR         0x7c1
@@ -21,8 +22,6 @@
 #define CSR_MRMR         0x7c6
 #define CSR_MRVBR        0x7c7
 
-#define SBI_EXT_VENDOR_C910_BOOT_OTHER_CORE    0x09000003
-
 #define C910_PLIC_CLINT_OFFSET     0x04000000  /* 64M */
 #define C910_PLIC_DELEG_OFFSET     0x001ffffc
 #define C910_PLIC_DELEG_ENABLE     0x1

From f281de885ec9417a6d3ae702d0ed5acab6396bee Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 3 Apr 2020 11:13:08 -0700
Subject: [PATCH 0535/1765] lib: irqchip/plic: Fix maximum priority threshold
 value

As per the PLIC specification, maximum priority threshold value is 0x7.
Even though, writing a higher value doesn't cause any error in qemu
hifive unleashed, there may be some implementation which checks the upper
and may result in an illegal access.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/irqchip/plic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 40c41706e89..7c40d287839 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -66,11 +66,11 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 
 	/* By default, disable M-mode threshold */
 	if (m_cntx_id > -1)
-		plic_set_thresh(m_cntx_id, 0xffffffff);
+		plic_set_thresh(m_cntx_id, 0x7);
 
 	/* By default, disable S-mode threshold */
 	if (s_cntx_id > -1)
-		plic_set_thresh(s_cntx_id, 0xffffffff);
+		plic_set_thresh(s_cntx_id, 0x7);
 
 	return 0;
 }

From 6c7922e23b85bef624ef84a8b05ed89495e1eb20 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 16 Apr 2020 18:56:30 -0700
Subject: [PATCH 0536/1765] lib: Support vector extension

Enable vector context in mstatus by updating the corresponding bits
in mstatus if vector extension is supported by the hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_encoding.h | 2 ++
 lib/sbi/sbi_hart.c           | 9 ++++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 1cf624bff29..8c3e6f162cd 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -25,6 +25,7 @@
 #define MSTATUS_MPP			(_UL(3) << MSTATUS_MPP_SHIFT)
 #define MSTATUS_FS			_UL(0x00006000)
 #define MSTATUS_XS			_UL(0x00018000)
+#define MSTATUS_VS			_UL(0x01800000)
 #define MSTATUS_MPRV			_UL(0x00020000)
 #define MSTATUS_SUM			_UL(0x00040000)
 #define MSTATUS_MXR			_UL(0x00080000)
@@ -53,6 +54,7 @@
 #define SSTATUS_SPP			MSTATUS_SPP
 #define SSTATUS_FS			MSTATUS_FS
 #define SSTATUS_XS			MSTATUS_XS
+#define SSTATUS_VS			MSTATUS_VS
 #define SSTATUS_SUM			MSTATUS_SUM
 #define SSTATUS_MXR			MSTATUS_MXR
 #define SSTATUS32_SD			MSTATUS32_SD
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b0f9919bd95..b5df7c4f29f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -25,10 +25,17 @@ void (*sbi_hart_unpriv_trap)(void) = &__sbi_unpriv_trap;
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	unsigned long mstatus_val = 0;
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
-		csr_write(CSR_MSTATUS, MSTATUS_FS);
+		mstatus_val |=  MSTATUS_FS;
+
+	/* Enable Vector context */
+	if (misa_extension('V'))
+		mstatus_val |=  MSTATUS_VS;
+
+	csr_write(CSR_MSTATUS, mstatus_val);
 
 	/* Enable user/supervisor use of perf counters */
 	if (misa_extension('S') && sbi_platform_has_scounteren(plat))

From 615587c336091140a515ff59fed932a2100814c2 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 16 Apr 2020 18:56:31 -0700
Subject: [PATCH 0537/1765] docs: Update README about supported SBI versions

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/README.md b/README.md
index fffebce8819..d58bc4eb372 100644
--- a/README.md
+++ b/README.md
@@ -39,6 +39,27 @@ OpenSBI also provides several runtime firmware examples built using the platform
 *riscv-pk* bootloader (aka BBL) and enable the use of well-known bootloaders
 such as [U-Boot] (https://git.denx.de/u-boot.git).
 
+Supported SBI version
+---------------------
+Currently, OpenSBI fully supports SBI specification *v0.2*. OpenSBI also
+supports Hart State Management (HSM) SBI extension starting from OpenSBI v0.7.
+HSM extension allows S-mode software to boot all the harts a defined order
+rather than legacy method of random booting of harts. As a result, many
+required features such as CPU hotplug, kexec/kdump can also be supported easily
+in S-mode. HSM extension in OpenSBI is implemented in a non-backward compatible
+manner to reduce the maintenance burden and avoid confusion. That's why, any
+S-mode software using OpenSBI will not be able to boot more than 1 hart if HSM
+extension is not supported in S-mode.
+
+Linux kernel already supports SBI v0.2 and HSM SBI extension starting from
+**v5.7-rc1**. If you are using an Linux kernel older than **5.7-rc1** or any
+other S-mode software without HSM SBI extension, you should stick to OpenSBI
+v0.6 to boot all the harts. For a UMP systems, it doesn't matter.
+
+N.B. Any S-mode boot loader (i.e. U-Boot) doesn't need to support HSM extension,
+as it doesn't need to boot all the harts. The operating system should be
+capable enough to bring up all other non-booting harts using HSM extension.
+
 Required Toolchain
 ------------------
 

From 66d018499cf928e0c8c8a15e0a896e7f80ad5f99 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 17 Apr 2020 15:10:10 +0530
Subject: [PATCH 0538/1765] lib: Allow overriding SBI implementation ID

Ideally, the SBI implementation ID for OpenSBI should always be
0x1 (as mentioned in SBI v0.2 spec) but external firmware (such
as EDK2) which use OpenSBI as library might want to override the
SBI implementation ID with their custom implementation ID.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h  |  4 ++++
 lib/sbi/sbi_ecall.c      | 12 ++++++++++++
 lib/sbi/sbi_ecall_base.c |  2 +-
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 0b92e678a34..3273ba6d401 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -42,6 +42,10 @@ u16 sbi_ecall_version_major(void);
 
 u16 sbi_ecall_version_minor(void);
 
+unsigned long sbi_ecall_get_impid(void);
+
+void sbi_ecall_set_impid(unsigned long impid);
+
 struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid);
 
 int sbi_ecall_register_extension(struct sbi_ecall_extension *ext);
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 6c42553939f..1a54c6e2fca 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -22,6 +22,18 @@ u16 sbi_ecall_version_minor(void)
 	return SBI_ECALL_VERSION_MINOR;
 }
 
+static unsigned long ecall_impid = SBI_OPENSBI_IMPID;
+
+unsigned long sbi_ecall_get_impid(void)
+{
+	return ecall_impid;
+}
+
+void sbi_ecall_set_impid(unsigned long impid)
+{
+	ecall_impid = impid;
+}
+
 static SBI_LIST_HEAD(ecall_exts_list);
 
 struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
index 1049c806bb5..53c93c8633c 100644
--- a/lib/sbi/sbi_ecall_base.c
+++ b/lib/sbi/sbi_ecall_base.c
@@ -46,7 +46,7 @@ static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
 		*out_val = *out_val | SBI_ECALL_VERSION_MINOR;
 		break;
 	case SBI_EXT_BASE_GET_IMP_ID:
-		*out_val = SBI_OPENSBI_IMPID;
+		*out_val = sbi_ecall_get_impid();
 		break;
 	case SBI_EXT_BASE_GET_IMP_VERSION:
 		*out_val = OPENSBI_VERSION;

From 9f1b72ce66d659e91013b358939e832fb27223f5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 20 Apr 2020 16:28:42 +0530
Subject: [PATCH 0539/1765] include: Bump-up version to 0.7

This patch updates OpenSBI version to 0.7 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index a71de3caf26..bee4bbb4731 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 6
+#define OPENSBI_VERSION_MINOR 7
 
 /**
  * OpenSBI 32-bit version with:

From 1bb00ab3aeabde78579774eef8eadc7b7e765924 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 23 Apr 2020 11:52:30 +0530
Subject: [PATCH 0540/1765] lib: No need to provide default PMP region using
 platform callbacks

The default (usually last) PMP region provides S-mode access to
complete memory range not covered by other PMP regions.

Currently, the default PMP region is described as platform specific
PMP region which is not appropriate because all platforms need it
and default PMP region should be part of generic library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi/sbi_platform.h       |  5 +++--
 lib/sbi/sbi_hart.c               | 24 +++++++++++++++---------
 platform/andes/ae350/platform.c  | 32 --------------------------------
 platform/qemu/virt/platform.c    | 26 --------------------------
 platform/sifive/fu540/platform.c | 26 --------------------------
 platform/spike/platform.c        | 26 --------------------------
 platform/template/platform.c     | 20 --------------------
 7 files changed, 18 insertions(+), 141 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 847e1744eac..fc2913dbfbb 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -492,8 +492,9 @@ static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
 						ulong *log2size)
 {
 	if (plat && sbi_platform_ops(plat)->pmp_region_info)
-		return sbi_platform_ops(plat)->pmp_region_info(hartid, index, prot, addr,
-                                                                              log2size);
+		return sbi_platform_ops(plat)->pmp_region_info(hartid, index,
+							       prot, addr,
+							       log2size);
 	return 0;
 }
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b5df7c4f29f..24c3637845f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -188,7 +188,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 
 static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 {
-	u32 i, count;
+	u32 i, pmp_idx = 0, count;
 	unsigned long fw_start, fw_size_log2;
 	ulong prot, addr, log2size;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -196,22 +196,28 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	if (!sbi_platform_has_pmp(plat))
 		return 0;
 
+	/* Firmware PMP region to protect OpenSBI firmware */
 	fw_size_log2 = log2roundup(scratch->fw_size);
-	fw_start     = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
-
-	pmp_set(0, 0, fw_start, fw_size_log2);
+	fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
+	pmp_set(pmp_idx++, 0, fw_start, fw_size_log2);
 
+	/* Platform specific PMP regions */
 	count = sbi_platform_pmp_region_count(plat, hartid);
-	if ((PMP_COUNT - 1) < count)
-		count = (PMP_COUNT - 1);
-
-	for (i = 0; i < count; i++) {
+	for (i = 0; i < count && pmp_idx < (PMP_COUNT - 1); i++) {
 		if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr,
 						 &log2size))
 			continue;
-		pmp_set(i + 1, prot, addr, log2size);
+		pmp_set(pmp_idx++, prot, addr, log2size);
 	}
 
+	/*
+	 * Default PMP region for allowing S-mode and U-mode access to
+	 * memory not covered by:
+	 * 1) Firmware PMP region
+	 * 2) Platform specific PMP regions
+	 */
+	pmp_set(pmp_idx++, PMP_R | PMP_W | PMP_X, 0, __riscv_xlen);
+
 	return 0;
 }
 
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index c1311d4a942..69a3cbcf442 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -53,35 +53,6 @@ static int ae350_final_init(bool cold_boot)
 	return 0;
 }
 
-/* Get number of PMP regions for given HART. */
-static u32 ae350_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-/*
- * Get PMP regions details (namely: protection, base address, and size) for
- * a given HART.
- */
-static int ae350_pmp_region_info(u32 hartid, u32 index, ulong *prot,
-				 ulong *addr, ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot	  = PMP_R | PMP_W | PMP_X;
-		*addr	  = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
 /* Initialize the platform console. */
 static int ae350_console_init(void)
 {
@@ -159,9 +130,6 @@ static int ae350_system_shutdown(u32 type)
 const struct sbi_platform_operations platform_ops = {
 	.final_init = ae350_final_init,
 
-	.pmp_region_count = ae350_pmp_region_count,
-	.pmp_region_info  = ae350_pmp_region_info,
-
 	.console_init = ae350_console_init,
 	.console_putc = uart8250_putc,
 	.console_getc = uart8250_getc,
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 86d1bcce7ee..5c12f53afbb 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -52,30 +52,6 @@ static int virt_final_init(bool cold_boot)
 	return 0;
 }
 
-static u32 virt_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-static int virt_pmp_region_info(u32 hartid, u32 index, ulong *prot, ulong *addr,
-				ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot	  = PMP_R | PMP_W | PMP_X;
-		*addr	  = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
 static int virt_console_init(void)
 {
 	return uart8250_init(VIRT_UART16550_ADDR, VIRT_UART_SHIFTREG_ADDR,
@@ -135,8 +111,6 @@ static int virt_system_down(u32 type)
 }
 
 const struct sbi_platform_operations platform_ops = {
-	.pmp_region_count	= virt_pmp_region_count,
-	.pmp_region_info	= virt_pmp_region_info,
 	.final_init		= virt_final_init,
 	.console_putc		= uart8250_putc,
 	.console_getc		= uart8250_getc,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index baa0d139f59..3a9f4b5e867 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -66,30 +66,6 @@ static int fu540_final_init(bool cold_boot)
 	return 0;
 }
 
-static u32 fu540_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-static int fu540_pmp_region_info(u32 hartid, u32 index, ulong *prot,
-				 ulong *addr, ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot	  = PMP_R | PMP_W | PMP_X;
-		*addr	  = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
 static int fu540_console_init(void)
 {
 	unsigned long peri_in_freq;
@@ -169,8 +145,6 @@ static int fu540_system_down(u32 type)
 }
 
 const struct sbi_platform_operations platform_ops = {
-	.pmp_region_count	= fu540_pmp_region_count,
-	.pmp_region_info	= fu540_pmp_region_info,
 	.final_init		= fu540_final_init,
 	.console_putc		= sifive_uart_putc,
 	.console_getc		= sifive_uart_getc,
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
index 0883ff631f5..b09e7c6fc0b 100644
--- a/platform/spike/platform.c
+++ b/platform/spike/platform.c
@@ -21,30 +21,6 @@ static int spike_final_init(bool cold_boot)
 	return 0;
 }
 
-static u32 spike_pmp_region_count(u32 hartid)
-{
-	return 1;
-}
-
-static int spike_pmp_region_info(u32 hartid, u32 index, ulong *prot, ulong *addr,
-				ulong *log2size)
-{
-	int ret = 0;
-
-	switch (index) {
-	case 0:
-		*prot	  = PMP_R | PMP_W | PMP_X;
-		*addr	  = 0;
-		*log2size = __riscv_xlen;
-		break;
-	default:
-		ret = -1;
-		break;
-	};
-
-	return ret;
-}
-
 static int spike_console_init(void)
 {
 	return 0;
@@ -84,8 +60,6 @@ static int spike_timer_init(bool cold_boot)
 }
 
 const struct sbi_platform_operations platform_ops = {
-	.pmp_region_count	= spike_pmp_region_count,
-	.pmp_region_info	= spike_pmp_region_info,
 	.final_init		= spike_final_init,
 	.console_putc		= htif_putc,
 	.console_getc		= htif_getc,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index d09b8bd7b10..ef329413d12 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -33,24 +33,6 @@ static int platform_final_init(bool cold_boot)
 	return 0;
 }
 
-/*
- * Get number of PMP regions for given HART.
- */
-static u32 platform_pmp_region_count(u32 hartid)
-{
-	return 0;
-}
-
-/*
- * Get PMP regions details (namely: protection, base address, and size) for
- * a given HART.
- */
-static int platform_pmp_region_info(u32 hartid, u32 index, ulong *prot,
-				    ulong *addr, ulong *log2size)
-{
-	return 0;
-}
-
 /*
  * Initialize the platform console.
  */
@@ -201,8 +183,6 @@ static int platform_system_shutdown(u32 type)
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= platform_early_init,
 	.final_init		= platform_final_init,
-	.pmp_region_count	= platform_pmp_region_count,
-	.pmp_region_info	= platform_pmp_region_info,
 	.console_putc		= platform_console_putc,
 	.console_getc		= platform_console_getc,
 	.console_init		= platform_console_init,

From a9eac67ad019200e9a281a6fc10e394353a026f2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 12:26:22 +0530
Subject: [PATCH 0541/1765] include: sbi_platform: Combine reboot and shutdown
 into one callback

We can achieve shutdown, cold reboot, and warm reboot using just
one sbi_platform callback so we combine system_reboot() and
system_shutdown() callbacks into one system_reset() callback.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h         | 37 +++++++++---------------------
 include/sbi/sbi_system.h           |  4 +---
 include/sbi_utils/sys/htif.h       |  2 +-
 lib/sbi/sbi_ecall_legacy.c         |  3 ++-
 lib/sbi/sbi_system.c               | 34 ++++-----------------------
 lib/utils/sys/htif.c               |  2 +-
 platform/andes/ae350/platform.c    | 17 ++++----------
 platform/fpga/ariane/platform.c    | 19 ++++-----------
 platform/fpga/openpiton/platform.c | 19 ++++-----------
 platform/kendryte/k210/platform.c  | 15 +++---------
 platform/qemu/virt/platform.c      |  5 ++--
 platform/sifive/fu540/platform.c   |  5 ++--
 platform/spike/platform.c          |  3 +--
 platform/template/platform.c       | 15 +++---------
 platform/thead/c910/platform.c     |  4 ++--
 15 files changed, 46 insertions(+), 138 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index fc2913dbfbb..9eaf82e59c2 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -146,10 +146,11 @@ struct sbi_platform_operations {
 	 */
 	int (*hart_stop)(void);
 
-	/** Reboot the platform */
-	int (*system_reboot)(u32 type);
-	/** Shutdown or poweroff the platform */
-	int (*system_shutdown)(u32 type);
+	/** Reset the platform */
+#define SBI_PLATFORM_RESET_SHUTDOWN	0
+#define SBI_PLATFORM_RESET_COLD		1
+#define SBI_PLATFORM_RESET_WARM		2
+	int (*system_reset)(u32 reset_type);
 
 	/** platform specific SBI extension implementation probe function */
 	int (*vendor_ext_check)(long extid);
@@ -686,34 +687,18 @@ static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
 }
 
 /**
- * Reboot the platform
+ * Reset the platform
  *
  * @param plat pointer to struct sbi_platform
- * @param type type of reboot
+ * @param reset_type type of reset
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_system_reboot(const struct sbi_platform *plat,
-					     u32 type)
+static inline int sbi_platform_system_reset(const struct sbi_platform *plat,
+					    u32 reset_type)
 {
-	if (plat && sbi_platform_ops(plat)->system_reboot)
-		return sbi_platform_ops(plat)->system_reboot(type);
-	return 0;
-}
-
-/**
- * Shutdown or poweroff the platform
- *
- * @param plat pointer to struct sbi_platform
- * @param type type of shutdown or poweroff
- *
- * @return 0 on success and negative error code on failure
- */
-static inline int sbi_platform_system_shutdown(const struct sbi_platform *plat,
-					       u32 type)
-{
-	if (plat && sbi_platform_ops(plat)->system_shutdown)
-		return sbi_platform_ops(plat)->system_shutdown(type);
+	if (plat && sbi_platform_ops(plat)->system_reset)
+		return sbi_platform_ops(plat)->system_reset(reset_type);
 	return 0;
 }
 
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 8d9c18b3343..d44ef121908 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -12,8 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-void __noreturn sbi_system_reboot(u32 type);
-
-void __noreturn sbi_system_shutdown(u32 type);
+void __noreturn sbi_system_reset(u32 platform_reset_type);
 
 #endif
diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
index 42903e818fe..7384b48e0a7 100644
--- a/include/sbi_utils/sys/htif.h
+++ b/include/sbi_utils/sys/htif.h
@@ -14,6 +14,6 @@ void htif_putc(char ch);
 
 int htif_getc(void);
 
-int htif_system_down(u32 type);
+int htif_system_reset(u32 type);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 8f32027bd23..9f7a5b6d29a 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
@@ -99,7 +100,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
-		sbi_system_shutdown(0);
+		sbi_system_reset(SBI_PLATFORM_RESET_SHUTDOWN);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 5d4c7de8c19..6f7be1451ce 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -17,7 +17,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
-void __noreturn sbi_system_reboot(u32 type)
+void __noreturn sbi_system_reset(u32 platform_reset_type)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
@@ -35,34 +35,10 @@ void __noreturn sbi_system_reboot(u32 type)
 	/* Stop current HART */
 	sbi_hsm_hart_stop(scratch, FALSE);
 
-	/* Platform specific reooot */
-	sbi_platform_system_reboot(sbi_platform_ptr(scratch), type);
+	/* Platform specific reset */
+	sbi_platform_system_reset(sbi_platform_ptr(scratch),
+				  platform_reset_type);
 
-	/* If platform specific reboot did not work then do sbi_exit() */
-	sbi_exit(scratch);
-}
-
-void __noreturn sbi_system_shutdown(u32 type)
-{
-	ulong hbase = 0, hmask;
-	u32 cur_hartid = current_hartid();
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {
-		if (hbase <= cur_hartid)
-			hmask &= ~(1UL << (cur_hartid - hbase));
-		if (hmask)
-			sbi_ipi_send_halt(hmask, hbase);
-		hbase += BITS_PER_LONG;
-	}
-
-	/* Stop current HART */
-	sbi_hsm_hart_stop(scratch, FALSE);
-
-	/* Platform specific shutdown */
-	sbi_platform_system_shutdown(sbi_platform_ptr(scratch), type);
-
-	/* If platform specific shutdown did not work then do sbi_exit() */
+	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
 }
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index e82590fee44..ed800a50a2b 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -140,7 +140,7 @@ int htif_getc(void)
 	return ch - 1;
 }
 
-int htif_system_down(u32 type)
+int htif_system_reset(u32 type)
 {
 	while (1) {
 		fromhost = 0;
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 69a3cbcf442..774ea90c680 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -110,19 +110,11 @@ static int ae350_timer_init(bool cold_boot)
 	return plmt_warm_timer_init();
 }
 
-/* Reboot the platform. */
-static int ae350_system_reboot(u32 type)
+/* Reset the platform. */
+static int ae350_system_reset(u32 type)
 {
 	/* For now nothing to do. */
-	sbi_printf("System reboot\n");
-	return 0;
-}
-
-/* Shutdown or poweroff the platform. */
-static int ae350_system_shutdown(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System shutdown\n");
+	sbi_printf("System reset\n");
 	return 0;
 }
 
@@ -145,8 +137,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_start = plmt_timer_event_start,
 	.timer_event_stop  = plmt_timer_event_stop,
 
-	.system_reboot	 = ae350_system_reboot,
-	.system_shutdown = ae350_system_shutdown
+	.system_reset	 = ae350_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 9537b64f49f..7c76ff87dfc 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -150,22 +150,12 @@ static int ariane_timer_init(bool cold_boot)
 }
 
 /*
- * Reboot the ariane.
+ * Reset the ariane.
  */
-static int ariane_system_reboot(u32 type)
+static int ariane_system_reset(u32 type)
 {
 	/* For now nothing to do. */
-	sbi_printf("System reboot\n");
-	return 0;
-}
-
-/*
- * Shutdown or poweroff the ariane.
- */
-static int ariane_system_shutdown(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System shutdown\n");
+	sbi_printf("System reset\n");
 	return 0;
 }
 
@@ -186,8 +176,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_value = clint_timer_value,
 	.timer_event_start = clint_timer_event_start,
 	.timer_event_stop = clint_timer_event_stop,
-	.system_reboot = ariane_system_reboot,
-	.system_shutdown = ariane_system_shutdown
+	.system_reset = ariane_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 4c83f6d85e8..019dcc58b23 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -182,22 +182,12 @@ static int openpiton_timer_init(bool cold_boot)
 }
 
 /*
- * Reboot the openpiton.
+ * Reset the openpiton.
  */
-static int openpiton_system_reboot(u32 type)
+static int openpiton_system_reset(u32 type)
 {
 	/* For now nothing to do. */
-	sbi_printf("System reboot\n");
-	return 0;
-}
-
-/*
- * Shutdown or poweroff the openpiton.
- */
-static int openpiton_system_shutdown(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System shutdown\n");
+	sbi_printf("System reset\n");
 	return 0;
 }
 
@@ -218,8 +208,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_value = clint_timer_value,
 	.timer_event_start = clint_timer_event_start,
 	.timer_event_stop = clint_timer_event_stop,
-	.system_reboot = openpiton_system_reboot,
-	.system_shutdown = openpiton_system_shutdown
+	.system_reset = openpiton_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 16ee985d37c..69c0e2149cb 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -96,18 +96,10 @@ static int k210_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int k210_system_reboot(u32 type)
+static int k210_system_reset(u32 type)
 {
 	/* For now nothing to do. */
-	sbi_printf("System reboot\n");
-
-	return 0;
-}
-
-static int k210_system_shutdown(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System shutdown\n");
+	sbi_printf("System reset\n");
 
 	return 0;
 }
@@ -128,8 +120,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop  = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
 
-	.system_reboot	 = k210_system_reboot,
-	.system_shutdown = k210_system_shutdown
+	.system_reset	 = k210_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index 5c12f53afbb..fd4571df86f 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -100,7 +100,7 @@ static int virt_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int virt_system_down(u32 type)
+static int virt_system_reset(u32 type)
 {
 	/* Tell the "finisher" that the simulation
 	 * was successful so that QEMU exits
@@ -123,8 +123,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= virt_timer_init,
-	.system_reboot		= virt_system_down,
-	.system_shutdown	= virt_system_down
+	.system_reset		= virt_system_reset,
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 3a9f4b5e867..aeb2f41677b 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -138,7 +138,7 @@ static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
 	[3] = 4,
 };
 
-static int fu540_system_down(u32 type)
+static int fu540_system_reset(u32 type)
 {
 	/* For now nothing to do. */
 	return 0;
@@ -158,8 +158,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= fu540_timer_init,
-	.system_reboot		= fu540_system_down,
-	.system_shutdown	= fu540_system_down
+	.system_reset		= fu540_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
index b09e7c6fc0b..066720aae77 100644
--- a/platform/spike/platform.c
+++ b/platform/spike/platform.c
@@ -72,8 +72,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= spike_timer_init,
-	.system_reboot		= htif_system_down,
-	.system_shutdown	= htif_system_down
+	.system_reset		= htif_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/template/platform.c b/platform/template/platform.c
index ef329413d12..84fbf561354 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -162,17 +162,9 @@ static void platform_timer_event_stop(void)
 }
 
 /*
- * Reboot the platform.
+ * Reset the platform.
  */
-static int platform_system_reboot(u32 type)
-{
-	return 0;
-}
-
-/*
- * Shutdown or poweroff the platform.
- */
-static int platform_system_shutdown(u32 type)
+static int platform_system_reset(u32 type)
 {
 	return 0;
 }
@@ -194,8 +186,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= platform_timer_event_stop,
 	.timer_event_start	= platform_timer_event_start,
 	.timer_init		= platform_timer_init,
-	.system_reboot		= platform_system_reboot,
-	.system_shutdown	= platform_system_shutdown
+	.system_reset		= platform_system_reset
 };
 const struct sbi_platform platform = {
 	.opensbi_version	= OPENSBI_VERSION,
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index adb1a20acf2..82f910a7ba8 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -100,7 +100,7 @@ static int c910_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int c910_system_shutdown(u32 type)
+static int c910_system_reset(u32 type)
 {
 	asm volatile ("ebreak");
 	return 0;
@@ -127,7 +127,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_init          = c910_timer_init,
 	.timer_event_start   = clint_timer_event_start,
 
-	.system_shutdown     = c910_system_shutdown,
+	.system_reset        = c910_system_reset,
 
 	.hart_start          = c910_hart_start,
 };

From 6585fabbcca24bf1c1df0582d048d93b3caf7ce7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 12:26:23 +0530
Subject: [PATCH 0542/1765] lib: utils: Add SiFive test device

This patch factor-out SiFive test device related stuff into
it's own source file from qemu/virt platform. In future, we
can find SiFive test device address from device tree as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/sys/sifive_test.h | 19 +++++++++++++
 lib/utils/sys/objects.mk            |  1 +
 lib/utils/sys/sifive_test.c         | 44 +++++++++++++++++++++++++++++
 platform/qemu/virt/platform.c       | 24 ++++++++--------
 4 files changed, 75 insertions(+), 13 deletions(-)
 create mode 100644 include/sbi_utils/sys/sifive_test.h
 create mode 100644 lib/utils/sys/sifive_test.c

diff --git a/include/sbi_utils/sys/sifive_test.h b/include/sbi_utils/sys/sifive_test.h
new file mode 100644
index 00000000000..7e153d5774f
--- /dev/null
+++ b/include/sbi_utils/sys/sifive_test.h
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SYS_SIFIVE_TEST_H__
+#define __SYS_SIFIVE_TEST_H__
+
+#include <sbi/sbi_types.h>
+
+int sifive_test_system_reset(u32 type);
+
+int sifive_test_init(unsigned long base);
+
+#endif
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index c6df2bdccae..7878ca8b4e2 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -9,3 +9,4 @@
 
 libsbiutils-objs-y += sys/clint.o
 libsbiutils-objs-y += sys/htif.o
+libsbiutils-objs-y += sys/sifive_test.o
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
new file mode 100644
index 00000000000..15369dabc7b
--- /dev/null
+++ b/lib/utils/sys/sifive_test.c
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/sys/sifive_test.h>
+
+#define FINISHER_FAIL		0x3333
+#define FINISHER_PASS		0x5555
+#define FINISHER_RESET		0x7777
+
+static void *sifive_test_base;
+
+int sifive_test_system_reset(u32 type)
+{
+	/*
+	 * Tell the "finisher" that the simulation
+	 * was successful so that QEMU exits
+	 */
+	switch (type) {
+	case SBI_PLATFORM_RESET_SHUTDOWN:
+		writew(FINISHER_PASS, sifive_test_base);
+		break;
+	case SBI_PLATFORM_RESET_COLD:
+	case SBI_PLATFORM_RESET_WARM:
+		writew(FINISHER_RESET, sifive_test_base);
+		break;
+	}
+
+	return 0;
+}
+
+int sifive_test_init(unsigned long base)
+{
+	sifive_test_base = (void *)base;
+
+	return 0;
+}
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
index fd4571df86f..7836bee857c 100644
--- a/platform/qemu/virt/platform.c
+++ b/platform/qemu/virt/platform.c
@@ -18,14 +18,13 @@
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
+#include <sbi_utils/sys/sifive_test.h>
 
 /* clang-format off */
 
 #define VIRT_HART_COUNT			8
 
 #define VIRT_TEST_ADDR			0x100000
-#define VIRT_TEST_FINISHER_FAIL		0x3333
-#define VIRT_TEST_FINISHER_PASS		0x5555
 
 #define VIRT_CLINT_ADDR			0x2000000
 
@@ -39,6 +38,14 @@
 
 /* clang-format on */
 
+static int virt_early_init(bool cold_boot)
+{
+	if (!cold_boot)
+		return 0;
+
+	return sifive_test_init(VIRT_TEST_ADDR);
+}
+
 static int virt_final_init(bool cold_boot)
 {
 	void *fdt;
@@ -100,17 +107,8 @@ static int virt_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int virt_system_reset(u32 type)
-{
-	/* Tell the "finisher" that the simulation
-	 * was successful so that QEMU exits
-	 */
-	writew(VIRT_TEST_FINISHER_PASS, (void *)VIRT_TEST_ADDR);
-
-	return 0;
-}
-
 const struct sbi_platform_operations platform_ops = {
+	.early_init		= virt_early_init,
 	.final_init		= virt_final_init,
 	.console_putc		= uart8250_putc,
 	.console_getc		= uart8250_getc,
@@ -123,7 +121,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= virt_timer_init,
-	.system_reset		= virt_system_reset,
+	.system_reset		= sifive_test_system_reset,
 };
 
 const struct sbi_platform platform = {

From 4781545512537effc97ffb07079076cf0819842c Mon Sep 17 00:00:00 2001
From: Huaqi Fang <578567190@qq.com>
Date: Tue, 28 Apr 2020 22:43:40 +0800
Subject: [PATCH 0543/1765] platform: Add Nuclei UX600 platform

* Nuclei UX600 is a 64-bit RISC-V core developed
  by Nuclei System Technology, see https://nucleisys.com/product.php

* The ISA is configurable in hardware on your demand

Signed-off-by: Huaqi Fang <578567190@qq.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 docs/platform/nuclei_ux600.md    |  22 +++++
 platform/nuclei/ux600/config.mk  |  30 +++++++
 platform/nuclei/ux600/objects.mk |  11 +++
 platform/nuclei/ux600/platform.c | 144 +++++++++++++++++++++++++++++++
 4 files changed, 207 insertions(+)
 create mode 100644 docs/platform/nuclei_ux600.md
 create mode 100644 platform/nuclei/ux600/config.mk
 create mode 100644 platform/nuclei/ux600/objects.mk
 create mode 100644 platform/nuclei/ux600/platform.c

diff --git a/docs/platform/nuclei_ux600.md b/docs/platform/nuclei_ux600.md
new file mode 100644
index 00000000000..273b6b438c3
--- /dev/null
+++ b/docs/platform/nuclei_ux600.md
@@ -0,0 +1,22 @@
+
+Nuclei UX600 Platform
+=====================
+
+The **Nuclei UX600** is a 64-bit RISC-V Core which is capable of running Linux.
+
+> Nuclei UX600: single core, pipeline as single-issue and 6~9 variable stages, in-order dispatch and out-of-order write-back, running up to >1.2GHz
+
+To build the platform-specific library and firmware images, provide the
+*PLATFORM=nuclei/ux600* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *Nuclei UX600* platform does not have any platform-specific options.
+
+Building Nuclei UX600 Platform
+------------------------------
+
+```
+make PLATFORM=nuclei/ux600 clean all
+```
diff --git a/platform/nuclei/ux600/config.mk b/platform/nuclei/ux600/config.mk
new file mode 100644
index 00000000000..0d30f29d229
--- /dev/null
+++ b/platform/nuclei/ux600/config.mk
@@ -0,0 +1,30 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Nuclei Corporation or its affiliates.
+#
+# Authors:
+#   lujun <lujun@nucleisys.com>
+#   hqfang <578567190@qq.com>
+#
+
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Command for platform specific "make run"
+platform-runcmd = xl_spike \
+  $(build_dir)/platform/nuclei/ux600/firmware/fw_payload.elf
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
+FW_JUMP=y
+
+FW_JUMP_ADDR=0x80200000
+FW_JUMP_FDT_ADDR=0x88000000
+FW_PAYLOAD=y
+FW_PAYLOAD_OFFSET=0x200000
+FW_PAYLOAD_FDT_ADDR=0x88000000
diff --git a/platform/nuclei/ux600/objects.mk b/platform/nuclei/ux600/objects.mk
new file mode 100644
index 00000000000..8c36c90a71d
--- /dev/null
+++ b/platform/nuclei/ux600/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Nuclei Corporation or its affiliates.
+#
+# Authors:
+#   lujun <lujun@nuclesys.com>
+#   hqfang <578567190@qq.com>
+#
+
+platform-objs-y += platform.o
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
new file mode 100644
index 00000000000..6c8bf4d5811
--- /dev/null
+++ b/platform/nuclei/ux600/platform.c
@@ -0,0 +1,144 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) Nuclei Corporation or its affiliates.
+ *
+ * Authors:
+ *   lujun <lujun@nucleisys.com>
+ *   hqfang <578567190@qq.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/sifive-uart.h>
+#include <sbi_utils/sys/clint.h>
+
+/* clang-format off */
+
+#define UX600_HART_COUNT		1
+
+#define UX600_SYS_CLK			1000000000
+
+/* Nuclei timer base address */
+#define UX600_NUCLEI_TIMER_ADDR		0x2000000
+/* The clint compatiable timer offset is 0x1000 against nuclei timer */
+#define UX600_CLINT_TIMER_ADDR		(UX600_NUCLEI_TIMER_ADDR + 0x1000)
+
+#define UX600_PLIC_ADDR			0x8000000
+#define UX600_PLIC_NUM_SOURCES		0x35
+#define UX600_PLIC_NUM_PRIORITIES	7
+
+#define UX600_UART0_ADDR		0x10013000
+#define UX600_UART1_ADDR		0x10023000
+
+#define UX600_DEBUG_UART		UX600_UART0_ADDR
+#define UX600_UART_BAUDRATE		115200
+
+/* clang-format on */
+
+static void ux600_modify_dt(void *fdt)
+{
+	fdt_fixups(fdt);
+}
+
+static int ux600_final_init(bool cold_boot)
+{
+	void *fdt;
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+	ux600_modify_dt(fdt);
+
+	return 0;
+}
+
+static int ux600_console_init(void)
+{
+	return sifive_uart_init(UX600_DEBUG_UART, UX600_SYS_CLK,
+				UX600_UART_BAUDRATE);
+}
+
+static int ux600_irqchip_init(bool cold_boot)
+{
+	int rc;
+	u32 hartid = current_hartid();
+
+	if (cold_boot) {
+		rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
+					    UX600_PLIC_NUM_SOURCES,
+					    UX600_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+				      (hartid) ? (2 * hartid) : -1);
+}
+
+static int ux600_ipi_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_ipi_init(UX600_CLINT_TIMER_ADDR, UX600_HART_COUNT);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_ipi_init();
+}
+
+static int ux600_timer_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = clint_cold_timer_init(UX600_CLINT_TIMER_ADDR,
+					   UX600_HART_COUNT, TRUE);
+		if (rc)
+			return rc;
+	}
+
+	return clint_warm_timer_init();
+}
+
+static int ux600_system_reset(u32 type)
+{
+	/* For now nothing to do. */
+	return 0;
+}
+
+const struct sbi_platform_operations platform_ops = {
+	.final_init		= ux600_final_init,
+	.console_putc		= sifive_uart_putc,
+	.console_getc		= sifive_uart_getc,
+	.console_init		= ux600_console_init,
+	.irqchip_init		= ux600_irqchip_init,
+	.ipi_send		= clint_ipi_send,
+	.ipi_clear		= clint_ipi_clear,
+	.ipi_init		= ux600_ipi_init,
+	.timer_value		= clint_timer_value,
+	.timer_event_stop	= clint_timer_event_stop,
+	.timer_event_start	= clint_timer_event_start,
+	.timer_init		= ux600_timer_init,
+	.system_reset		= ux600_system_reset
+};
+
+const struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0U, 0x01U),
+	.name			= "Nuclei UX600",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= UX600_HART_COUNT,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.platform_ops_addr	= (unsigned long)&platform_ops
+};

From 3a326af9be09612a699d3dee7c2b91c4986de95f Mon Sep 17 00:00:00 2001
From: Huaqi Fang <578567190@qq.com>
Date: Wed, 29 Apr 2020 18:05:51 +0800
Subject: [PATCH 0544/1765] scripts: adapt binary archive script for Nuclei
 UX600

Signed-off-by: Huaqi Fang <578567190@qq.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 scripts/create-binary-archive.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index d2680252e32..eaf16b15280 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -102,6 +102,7 @@ build_opensbi() {
 		# Setup 64-bit platform list
 		BUILD_PLATFORM_SUBDIR=("qemu/virt")
 		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		BUILD_PLATFORM_SUBDIR+=("nuclei/ux600")
 		BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
 		BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")

From 5bdf022d07f1efcf8bc1647c78a294ab2baf4c9b Mon Sep 17 00:00:00 2001
From: Charles Papon <charles.papon.90@gmail.com>
Date: Fri, 1 May 2020 09:28:38 +0530
Subject: [PATCH 0545/1765] firmware: fw_base: Remove CSR_MTVEC update check

Remove unnecessary CSR_MTVEC read to reduce the openSBI CSR requirement.

Mux are costly in FPGA. Allowing CSR_MTVEC to be write only is usefull
for the FMax/Area of FPGA softcore.

https://github.com/SpinalHDL/opensbi.git branch mtvec

Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index cc6381da47a..07edc749d78 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -400,9 +400,6 @@ _start_warm:
 	/* Setup trap handler */
 	la	a4, _trap_handler
 	csrw	CSR_MTVEC, a4
-	/* Make sure that mtvec is updated */
-1:	csrr	a5, CSR_MTVEC
-	bne	a4, a5, 1b
 
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH

From e6c1345f89f0c2fa5d8b0dde733eb80366056632 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 25 Apr 2020 11:11:49 +0530
Subject: [PATCH 0546/1765] lib: utils/serial: Skip baudrate config if input
 frequency is zero

We should skip baudrate config for UART8250 and SiFive UART when
input frequency is zero.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/utils/serial/sifive-uart.c |  3 ++-
 lib/utils/serial/uart8250.c    | 12 ++++++++----
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index b82a1b380b5..72c8a62497f 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -89,7 +89,8 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 	uart_baudrate = baudrate;
 
 	/* Configure baudrate */
-	set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate));
+	if (in_freq)
+		set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate));
 	/* Disable interrupts */
 	set_reg(UART_REG_IE, 0);
 	/* Enable TX */
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 42f18816166..9635ba8632c 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -100,10 +100,14 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 	set_reg(UART_IER_OFFSET, 0x00);
 	/* Enable DLAB */
 	set_reg(UART_LCR_OFFSET, 0x80);
-	/* Set divisor low byte */
-	set_reg(UART_DLL_OFFSET, bdiv & 0xff);
-	/* Set divisor high byte */
-	set_reg(UART_DLM_OFFSET, (bdiv >> 8) & 0xff);
+
+	if (bdiv) {
+		/* Set divisor low byte */
+		set_reg(UART_DLL_OFFSET, bdiv & 0xff);
+		/* Set divisor high byte */
+		set_reg(UART_DLM_OFFSET, (bdiv >> 8) & 0xff);
+	}
+
 	/* 8 bits, no parity, one stop bit */
 	set_reg(UART_LCR_OFFSET, 0x03);
 	/* Enable FIFO */

From 01a8c8eebb6f219afb3873fce82a11a7cf49a03e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 15:21:34 +0530
Subject: [PATCH 0547/1765] lib: utils: Improve fdt_parse_uart8250() API

The information parsed by fdt_parse_uart8250() API is not complete.
We need to parse reg-shift and reg-io-width for UART 8520 as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  2 ++
 lib/utils/fdt/fdt_helper.c         | 21 +++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 06b8a62a937..d3cc791ec65 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -14,6 +14,8 @@ struct platform_uart_data {
 	unsigned long addr;
 	unsigned long freq;
 	unsigned long baud;
+	unsigned long reg_shift;
+	unsigned long reg_io_width;
 };
 
 struct platform_plic_data {
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 07f722128ab..f620e742005 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -13,6 +13,11 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
+#define DEFAULT_UART_FREQ		0
+#define DEFAULT_UART_BAUD		115200
+#define DEFAULT_UART_REG_SHIFT		0
+#define DEFAULT_UART_REG_IO_WIDTH	1
+
 static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 				  unsigned long *size)
 {
@@ -81,10 +86,26 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
 	if (len > 0 && val)
 		uart->freq = fdt32_to_cpu(*val);
+	else
+		uart->freq = DEFAULT_UART_FREQ;
 
 	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
 	if (len > 0 && val)
 		uart->baud = fdt32_to_cpu(*val);
+	else
+		uart->baud = DEFAULT_UART_BAUD;
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-shift", &len);
+	if (len > 0 && val)
+		uart->reg_shift = fdt32_to_cpu(*val);
+	else
+		uart->reg_shift = DEFAULT_UART_REG_SHIFT;
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-io-width", &len);
+	if (len > 0 && val)
+		uart->reg_io_width = fdt32_to_cpu(*val);
+	else
+		uart->reg_io_width = DEFAULT_UART_REG_IO_WIDTH;
 
 	return 0;
 }

From 0a0093b0bc8671d3a00cf1bb71d56cabab9474e1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 25 Apr 2020 18:33:54 +0530
Subject: [PATCH 0548/1765] lib: utils: Add fdt_parse_uart8250_node() function

We add fdt_parse_uart8250_node() function which will allow us
to parse a particular DT node as UART 8250 node. This will be
useful in parsing the node pointed by stdout-path.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  3 +++
 lib/utils/fdt/fdt_helper.c         | 37 +++++++++++++++++++-----------
 2 files changed, 26 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index d3cc791ec65..1fbc215e14d 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -23,6 +23,9 @@ struct platform_plic_data {
 	unsigned long num_src;
 };
 
+int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
+			    struct platform_uart_data *uart);
+
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index f620e742005..4757f19cd59 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -58,21 +58,15 @@ static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 	return 0;
 }
 
-int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
-		   const char *compatible)
+int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
+			    struct platform_uart_data *uart)
 {
-	int nodeoffset, len, rc;
-	fdt32_t *val;
+	int len, rc;
+	const fdt32_t *val;
 	unsigned long reg_addr, reg_size;
 
-	/**
-	 * TODO: We don't know how to handle multiple nodes with the same
-	 * compatible sring. Just return the first node for now.
-	 */
-
-	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
-	if (nodeoffset < 0)
-		return nodeoffset;
+	if (nodeoffset < 0 || !uart || !fdt)
+		return SBI_ENODEV;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
@@ -80,8 +74,8 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	uart->addr = reg_addr;
 
 	/**
-	 * UART address is mandaotry. clock-frequency and current-speed may not
-	 * be present. Don't return error.
+	 * UART address is mandaotry. clock-frequency and current-speed
+	 * may not be present. Don't return error.
 	 */
 	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
 	if (len > 0 && val)
@@ -110,6 +104,21 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return 0;
 }
 
+int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
+		   const char *compatible)
+{
+	int nodeoffset;
+
+	if (!compatible || !uart || !fdt)
+		return SBI_ENODEV;
+
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
+}
+
 int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 		   const char *compatible)
 {

From 243b0d0c0c74c7d5281b0748a779f587263f1d21 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 16:22:45 +0530
Subject: [PATCH 0549/1765] lib: utils: Remove redundant clint_ipi_sync()
 declaration

The clint_ipi_sync() was removed long time back hence we remove
redundant declaration from clint.h

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/sys/clint.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
index 5749d462429..a26f1481087 100644
--- a/include/sbi_utils/sys/clint.h
+++ b/include/sbi_utils/sys/clint.h
@@ -14,8 +14,6 @@
 
 void clint_ipi_send(u32 target_hart);
 
-void clint_ipi_sync(u32 target_hart);
-
 void clint_ipi_clear(u32 target_hart);
 
 int clint_warm_ipi_init(void);

From e3ad7c13a07275df7f3dbee68e3e95d73d7a1e0e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 16:41:06 +0530
Subject: [PATCH 0550/1765] lib: utils: Rename fdt_parse_clint() to
 fdt_parse_compat_addr()

The fdt_parse_clint() is quite generic and can be used for other
types of devices so we rename it to fdt_parse_compat_addr().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 4 ++--
 lib/utils/fdt/fdt_helper.c         | 8 ++++----
 platform/fpga/openpiton/platform.c | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 1fbc215e14d..57c47201168 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -32,7 +32,7 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 		   const char *compatible);
 
-int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
-		    const char *compatible);
+int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+			  const char *compatible);
 
 #endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 4757f19cd59..573cc71fdf7 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -142,8 +142,8 @@ int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 	return 0;
 }
 
-int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
-		    const char *compatible)
+int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+			  const char *compatible)
 {
 	int nodeoffset, rc;
 
@@ -151,8 +151,8 @@ int fdt_parse_clint(void *fdt, unsigned long *clint_addr,
 	if (nodeoffset < 0)
 		return nodeoffset;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, clint_addr, NULL);
-	if (rc < 0 || !clint_addr)
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, addr, NULL);
+	if (rc < 0 || !addr)
 		return SBI_ENODEV;
 
 	return 0;
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 019dcc58b23..c549a95d891 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -66,7 +66,7 @@ static int openpiton_early_init(bool cold_boot)
 	if (!rc)
 		plic = plic_data;
 
-	rc = fdt_parse_clint(fdt, &clint_data, "riscv,clint0");
+	rc = fdt_parse_compat_addr(fdt, &clint_data, "riscv,clint0");
 	if (!rc)
 		clint_addr = clint_data;
 

From a39cd6fe4c263f00228daaefc41c2b03b96f784d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 18:32:10 +0530
Subject: [PATCH 0551/1765] lib: utils: Add FDT match table based node lookup

This patch adds FDT match table based node lookup funcitons.

These functions will be useful in implementing simple FDT
based driver frameworks.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 11 ++++++++
 lib/utils/fdt/fdt_helper.c         | 41 ++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 57c47201168..a52549306c5 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -10,6 +10,11 @@
 #ifndef __FDT_HELPER_H__
 #define __FDT_HELPER_H__
 
+struct fdt_match {
+	const char *compatible;
+	void *data;
+};
+
 struct platform_uart_data {
 	unsigned long addr;
 	unsigned long freq;
@@ -23,6 +28,12 @@ struct platform_plic_data {
 	unsigned long num_src;
 };
 
+const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
+				       const struct fdt_match *match_table);
+
+int fdt_find_match(void *fdt, const struct fdt_match *match_table,
+		   const struct fdt_match **out_match);
+
 int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 			    struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 573cc71fdf7..e8c927dee5d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -18,6 +18,47 @@
 #define DEFAULT_UART_REG_SHIFT		0
 #define DEFAULT_UART_REG_IO_WIDTH	1
 
+const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
+				       const struct fdt_match *match_table)
+{
+	int ret;
+
+	if (!fdt || nodeoff < 0 || !match_table)
+		return NULL;
+
+	while (match_table->compatible) {
+		ret = fdt_node_check_compatible(fdt, nodeoff,
+						match_table->compatible);
+		if (!ret)
+			return match_table;
+		match_table++;
+	}
+
+	return NULL;
+}
+
+int fdt_find_match(void *fdt, const struct fdt_match *match_table,
+		   const struct fdt_match **out_match)
+{
+	int nodeoff;
+
+	if (!fdt || !match_table)
+		return SBI_ENODEV;
+
+	while (match_table->compatible) {
+		nodeoff = fdt_node_offset_by_compatible(fdt, -1,
+						match_table->compatible);
+		if (nodeoff >= 0) {
+			if (out_match)
+				*out_match = match_table;
+			return nodeoff;
+		}
+		match_table++;
+	}
+
+	return SBI_ENODEV;
+}
+
 static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 				  unsigned long *size)
 {

From dd33b9e0a152699416ade045ad6f630432e7f968 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 18:35:25 +0530
Subject: [PATCH 0552/1765] lib: utils: Make fdt_get_node_addr_size() public
 function

The fdt_get_node_addr_size() will be useful in FDT based simple
driver frameworks so we make it a public function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 3 +++
 lib/utils/fdt/fdt_helper.c         | 4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index a52549306c5..a4ad1c17579 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -34,6 +34,9 @@ const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 int fdt_find_match(void *fdt, const struct fdt_match *match_table,
 		   const struct fdt_match **out_match);
 
+int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
+			   unsigned long *size);
+
 int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 			    struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index e8c927dee5d..8fe4ace6683 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -59,8 +59,8 @@ int fdt_find_match(void *fdt, const struct fdt_match *match_table,
 	return SBI_ENODEV;
 }
 
-static int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
-				  unsigned long *size)
+int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
+			   unsigned long *size)
 {
 	int parent, len, i;
 	int cell_addr, cell_size;

From 66185b3ec9f103fef14e034550102a6f2a58bf57 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 25 Apr 2020 18:50:37 +0530
Subject: [PATCH 0553/1765] lib: utils: Add fdt_parse_sifive_uart_node()
 function

We add fdt_parse_sifive_uart_node() function which will allow
us to parse a particular DT node as SiFive UART node. This will
be useful in parsing the node pointed by stdout-path.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  3 +++
 lib/utils/fdt/fdt_helper.c         | 43 ++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index a4ad1c17579..3a15aca9e9e 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -37,6 +37,9 @@ int fdt_find_match(void *fdt, const struct fdt_match *match_table,
 int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 			   unsigned long *size);
 
+int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart);
+
 int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 			    struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 8fe4ace6683..3186f642cae 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -18,6 +18,11 @@
 #define DEFAULT_UART_REG_SHIFT		0
 #define DEFAULT_UART_REG_IO_WIDTH	1
 
+#define DEFAULT_SIFIVE_UART_FREQ		0
+#define DEFAULT_SIFIVE_UART_BAUD		115200
+#define DEFAULT_SIFIVE_UART_REG_SHIFT		0
+#define DEFAULT_SIFIVE_UART_REG_IO_WIDTH	4
+
 const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 				       const struct fdt_match *match_table)
 {
@@ -99,6 +104,44 @@ int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 	return 0;
 }
 
+int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart)
+{
+	int len, rc;
+	const fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+
+	if (nodeoffset < 0 || !uart || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	uart->addr = reg_addr;
+
+	/**
+	 * UART address is mandaotry. clock-frequency and current-speed
+	 * may not be present. Don't return error.
+	 */
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
+	if (len > 0 && val)
+		uart->freq = fdt32_to_cpu(*val);
+	else
+		uart->freq = DEFAULT_SIFIVE_UART_FREQ;
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
+	if (len > 0 && val)
+		uart->baud = fdt32_to_cpu(*val);
+	else
+		uart->baud = DEFAULT_SIFIVE_UART_BAUD;
+
+	/* For SiFive UART, the reg-shift and reg-io-width are fixed .*/
+	uart->reg_shift = DEFAULT_SIFIVE_UART_REG_SHIFT;
+	uart->reg_io_width = DEFAULT_SIFIVE_UART_REG_IO_WIDTH;
+
+	return 0;
+}
+
 int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 			    struct platform_uart_data *uart)
 {

From 19e966b8622e21c6beb2872d3e4373de9dbfef45 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 26 Apr 2020 12:39:13 +0530
Subject: [PATCH 0554/1765] lib: utils: Add fdt_parse_hart_id() function

Parsing HART id from a CPU DT node is a common requirement for
RISC-V systems. The newly added fdt_parse_hart_id() also helps
reduce duplicate code between fdt_cpu_fixup() function and
fdt_parse_hart_count() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  4 ++++
 lib/utils/fdt/fdt_fixup.c          | 20 +++++---------------
 lib/utils/fdt/fdt_helper.c         | 28 ++++++++++++++++++++++++++++
 3 files changed, 37 insertions(+), 15 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 3a15aca9e9e..98c789bfa3e 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -10,6 +10,8 @@
 #ifndef __FDT_HELPER_H__
 #define __FDT_HELPER_H__
 
+#include <sbi/sbi_types.h>
+
 struct fdt_match {
 	const char *compatible;
 	void *data;
@@ -37,6 +39,8 @@ int fdt_find_match(void *fdt, const struct fdt_match *match_table,
 int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 			   unsigned long *size);
 
+int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index d6e4cc1e8a1..9a9b43549b8 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -13,14 +13,14 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 
 void fdt_cpu_fixup(void *fdt)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int err, len, cpu_offset, cpus_offset;
-	const fdt32_t *val;
-	const void *prop;
+	int err, cpu_offset, cpus_offset;
 	u32 hartid;
 
 	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
@@ -32,19 +32,9 @@ void fdt_cpu_fixup(void *fdt)
 		return;
 
 	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
-		prop = fdt_getprop(fdt, cpu_offset, "device_type", &len);
-		if (!prop || !len)
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
 			continue;
-		if (sbi_strcmp(prop, "cpu"))
-			continue;
-
-		val = fdt_getprop(fdt, cpu_offset, "reg", &len);
-		if (!val || len < sizeof(fdt32_t))
-			continue;
-
-		if (len > sizeof(fdt32_t))
-			val++;
-		hartid = fdt32_to_cpu(*val);
 
 		if (sbi_platform_hart_invalid(plat, hartid))
 			fdt_setprop_string(fdt, cpu_offset, "status",
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 3186f642cae..af13810abec 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -104,6 +104,34 @@ int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 	return 0;
 }
 
+int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
+{
+	int len;
+	const void *prop;
+	const fdt32_t *val;
+
+	if (!fdt || cpu_offset < 0)
+		return SBI_EINVAL;
+
+	prop = fdt_getprop(fdt, cpu_offset, "device_type", &len);
+	if (!prop || !len)
+		return SBI_EINVAL;
+	if (sbi_strcmp(prop, "cpu"))
+		return SBI_EINVAL;
+
+	val = fdt_getprop(fdt, cpu_offset, "reg", &len);
+	if (!val || len < sizeof(fdt32_t))
+		return SBI_EINVAL;
+
+	if (len > sizeof(fdt32_t))
+		val++;
+
+	if (hartid)
+		*hartid = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {

From 44dd7be3b2b3b821912e32a1021706a2edb9d44b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 15:08:19 +0530
Subject: [PATCH 0555/1765] lib: utils: Add fdt_parse_max_hart_id() API

We add fdt_parse_max_hart_id() API which return max HART id based
on CPU DT nodes. This will be used by generic FDT based drivers in
subsequent patches.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  2 ++
 lib/utils/fdt/fdt_helper.c         | 28 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 98c789bfa3e..5a0a719ee2b 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -41,6 +41,8 @@ int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
+int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index af13810abec..2d79f759c9d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -132,6 +132,34 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
 	return 0;
 }
 
+int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
+{
+	u32 hartid;
+	int err, cpu_offset, cpus_offset;
+
+	if (!fdt)
+		return SBI_EINVAL;
+	if (!max_hartid)
+		return 0;
+
+	*max_hartid = 0;
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			continue;
+
+		if (hartid > *max_hartid)
+			*max_hartid = hartid;
+	}
+
+	return 0;
+}
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {

From f0eb503db4c14176f165ca067798b079571decda Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 29 Apr 2020 14:21:52 +0530
Subject: [PATCH 0556/1765] lib: utils: Add fdt_parse_plic_node() function

We add fdt_parse_plic_node() function which will allow us to parse
a particular DT node as PLIC node. This will be useful in parsing
the DT node which we have found by matching compatible string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  3 +++
 lib/utils/fdt/fdt_helper.c         | 26 ++++++++++++++++++++------
 2 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 5a0a719ee2b..6be942a17ae 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -52,6 +52,9 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
+int fdt_parse_plic_node(void *fdt, int nodeoffset,
+			struct platform_plic_data *plic);
+
 int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 		   const char *compatible);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 2d79f759c9d..ee733e79234 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -259,16 +259,15 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
 }
 
-int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
-		   const char *compatible)
+int fdt_parse_plic_node(void *fdt, int nodeoffset,
+			struct platform_plic_data *plic)
 {
-	int nodeoffset, len, rc;
+	int len, rc;
 	const fdt32_t *val;
 	unsigned long reg_addr, reg_size;
 
-	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
-	if (nodeoffset < 0)
-		return nodeoffset;
+	if (nodeoffset < 0 || !plic || !fdt)
+		return SBI_ENODEV;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
@@ -282,6 +281,21 @@ int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
 	return 0;
 }
 
+int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
+		   const char *compatible)
+{
+	int nodeoffset;
+
+	if (!compatible || !plic || !fdt)
+		return SBI_ENODEV;
+
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	return fdt_parse_plic_node(fdt, nodeoffset, plic);
+}
+
 int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
 			  const char *compatible)
 {

From 1ac794cb618fea55db81cc697f46442bf70469d8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 18:37:10 +0530
Subject: [PATCH 0557/1765] include: Add array_size() macro

Getting array size of a dynmaic array can be very handy hence
this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_types.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 153c1850ce2..0952d5c8212 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -78,6 +78,8 @@ typedef unsigned long		physical_size_t;
 	const typeof(((type *)0)->member) * __mptr = (ptr);	\
 	(type *)((char *)__mptr - offsetof(type, member)); })
 
+#define array_size(x) 	(sizeof(x) / sizeof((x)[0]))
+
 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 #define MIN(a, b) ((a) < (b) ? (a) : (b))
 #define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)

From 8ff2b94ea16ccd361cb1821390fffde1e7ff7a5d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 16:50:40 +0530
Subject: [PATCH 0558/1765] lib: utils: Add simple FDT timer framework

We add simple timer framework which will select and use timer driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/timer/fdt_timer.h |  35 +++++++++
 lib/utils/timer/fdt_timer.c         | 110 ++++++++++++++++++++++++++++
 lib/utils/timer/fdt_timer_clint.c   |  46 ++++++++++++
 lib/utils/timer/objects.mk          |  11 +++
 4 files changed, 202 insertions(+)
 create mode 100644 include/sbi_utils/timer/fdt_timer.h
 create mode 100644 lib/utils/timer/fdt_timer.c
 create mode 100644 lib/utils/timer/fdt_timer_clint.c
 create mode 100644 lib/utils/timer/objects.mk

diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
new file mode 100644
index 00000000000..770a0f3c537
--- /dev/null
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_TIMER_H__
+#define __FDT_TIMER_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_timer {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+	u64 (*value)(void);
+	void (*event_stop)(void);
+	void (*event_start)(u64 next_event);
+};
+
+u64 fdt_timer_value(void);
+
+void fdt_timer_event_stop(void);
+
+void fdt_timer_event_start(u64 next_event);
+
+void fdt_timer_exit(void);
+
+int fdt_timer_init(bool cold_boot);
+
+#endif
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
new file mode 100644
index 00000000000..1ad08fe4f31
--- /dev/null
+++ b/lib/utils/timer/fdt_timer.c
@@ -0,0 +1,110 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/timer/fdt_timer.h>
+
+extern struct fdt_timer fdt_timer_clint;
+
+static struct fdt_timer *timer_drivers[] = {
+	&fdt_timer_clint
+};
+
+static u64 dummy_value(void)
+{
+	return 0;
+}
+
+static void dummy_event_stop(void)
+{
+}
+
+static void dummy_event_start(u64 next_event)
+{
+}
+
+static struct fdt_timer dummy = {
+	.match_table = NULL,
+	.cold_init = NULL,
+	.warm_init = NULL,
+	.exit = NULL,
+	.value = dummy_value,
+	.event_stop = dummy_event_stop,
+	.event_start = dummy_event_start
+};
+
+static struct fdt_timer *current_driver = &dummy;
+
+u64 fdt_timer_value(void)
+{
+	return current_driver->value();
+}
+
+void fdt_timer_event_stop(void)
+{
+	current_driver->event_stop();
+}
+
+void fdt_timer_event_start(u64 next_event)
+{
+	current_driver->event_start(next_event);
+}
+
+void fdt_timer_exit(void)
+{
+	if (current_driver->exit)
+		current_driver->exit();
+}
+
+static int fdt_timer_warm_init(void)
+{
+	if (current_driver->warm_init)
+		return current_driver->warm_init();
+	return 0;
+}
+
+static int fdt_timer_cold_init(void)
+{
+	int pos, noff, rc;
+	struct fdt_timer *drv;
+	const struct fdt_match *match;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (pos = 0; pos < array_size(timer_drivers); pos++) {
+		drv = timer_drivers[pos];
+
+		noff = fdt_find_match(fdt, drv->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		if (drv->cold_init) {
+			rc = drv->cold_init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+	return 0;
+}
+
+int fdt_timer_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = fdt_timer_cold_init();
+		if (rc)
+			return rc;
+	}
+
+	return fdt_timer_warm_init();
+}
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
new file mode 100644
index 00000000000..6aa6929f58f
--- /dev/null
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -0,0 +1,46 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/sys/clint.h>
+
+static int timer_clint_cold_init(void *fdt, int nodeoff,
+				  const struct fdt_match *match)
+{
+	int rc;
+	u32 max_hartid;
+	unsigned long addr;
+
+	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
+	if (rc)
+		return rc;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
+	if (rc)
+		return rc;
+
+	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
+	return clint_cold_timer_init(addr, max_hartid + 1, TRUE);
+}
+
+static const struct fdt_match timer_clint_match[] = {
+	{ .compatible = "riscv,clint0" },
+	{ },
+};
+
+struct fdt_timer fdt_timer_clint = {
+	.match_table = timer_clint_match,
+	.cold_init = timer_clint_cold_init,
+	.warm_init = clint_warm_timer_init,
+	.exit = NULL,
+	.value = clint_timer_value,
+	.event_stop = clint_timer_event_stop,
+	.event_start = clint_timer_event_start,
+};
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
new file mode 100644
index 00000000000..1b84e926cbc
--- /dev/null
+++ b/lib/utils/timer/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+libsbiutils-objs-y += timer/fdt_timer.o
+libsbiutils-objs-y += timer/fdt_timer_clint.o

From 76f0f814075338970c7e7914ab94644e855632f7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 16:53:32 +0530
Subject: [PATCH 0559/1765] lib: utils: Add simple FDT ipi framework

We add simple ipi framework which will select and use ipi driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/ipi/fdt_ipi.h | 32 +++++++++++
 lib/utils/ipi/fdt_ipi.c         | 99 +++++++++++++++++++++++++++++++++
 lib/utils/ipi/fdt_ipi_clint.c   | 44 +++++++++++++++
 lib/utils/ipi/objects.mk        | 11 ++++
 4 files changed, 186 insertions(+)
 create mode 100644 include/sbi_utils/ipi/fdt_ipi.h
 create mode 100644 lib/utils/ipi/fdt_ipi.c
 create mode 100644 lib/utils/ipi/fdt_ipi_clint.c
 create mode 100644 lib/utils/ipi/objects.mk

diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
new file mode 100644
index 00000000000..e817141ac92
--- /dev/null
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_IPI_H__
+#define __FDT_IPI_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_ipi {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+	void (*send)(u32 target_hart);
+	void (*clear)(u32 target_hart);
+};
+
+void fdt_ipi_send(u32 target_hart);
+
+void fdt_ipi_clear(u32 target_hart);
+
+void fdt_ipi_exit(void);
+
+int fdt_ipi_init(bool cold_boot);
+
+#endif
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
new file mode 100644
index 00000000000..d8ba0b24f60
--- /dev/null
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -0,0 +1,99 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+
+extern struct fdt_ipi fdt_ipi_clint;
+
+static struct fdt_ipi *ipi_drivers[] = {
+	&fdt_ipi_clint
+};
+
+static void dummy_send(u32 target_hart)
+{
+}
+
+static void dummy_clear(u32 target_hart)
+{
+}
+
+static struct fdt_ipi dummy = {
+	.match_table = NULL,
+	.cold_init = NULL,
+	.warm_init = NULL,
+	.exit = NULL,
+	.send = dummy_send,
+	.clear = dummy_clear
+};
+
+static struct fdt_ipi *current_driver = &dummy;
+
+void fdt_ipi_send(u32 target_hart)
+{
+	current_driver->send(target_hart);
+}
+
+void fdt_ipi_clear(u32 target_hart)
+{
+	current_driver->clear(target_hart);
+}
+
+void fdt_ipi_exit(void)
+{
+	if (current_driver->exit)
+		current_driver->exit();
+}
+
+static int fdt_ipi_warm_init(void)
+{
+	if (current_driver->warm_init)
+		return current_driver->warm_init();
+	return 0;
+}
+
+static int fdt_ipi_cold_init(void)
+{
+	int pos, noff, rc;
+	struct fdt_ipi *drv;
+	const struct fdt_match *match;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (pos = 0; pos < array_size(ipi_drivers); pos++) {
+		drv = ipi_drivers[pos];
+
+		noff = fdt_find_match(fdt, drv->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		if (drv->cold_init) {
+			rc = drv->cold_init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+	return 0;
+}
+
+int fdt_ipi_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = fdt_ipi_cold_init();
+		if (rc)
+			return rc;
+	}
+
+	return fdt_ipi_warm_init();
+}
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
new file mode 100644
index 00000000000..05b66c60987
--- /dev/null
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/sys/clint.h>
+
+static int ipi_clint_cold_init(void *fdt, int nodeoff,
+			       const struct fdt_match *match)
+{
+	int rc;
+	u32 max_hartid;
+	unsigned long addr;
+
+	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
+	if (rc)
+		return rc;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
+	if (rc)
+		return rc;
+
+	return clint_cold_ipi_init(addr, max_hartid + 1);
+}
+
+static const struct fdt_match ipi_clint_match[] = {
+	{ .compatible = "riscv,clint0" },
+	{ },
+};
+
+struct fdt_ipi fdt_ipi_clint = {
+	.match_table = ipi_clint_match,
+	.cold_init = ipi_clint_cold_init,
+	.warm_init = clint_warm_ipi_init,
+	.exit = NULL,
+	.send = clint_ipi_send,
+	.clear = clint_ipi_clear,
+};
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
new file mode 100644
index 00000000000..00719579d53
--- /dev/null
+++ b/lib/utils/ipi/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+libsbiutils-objs-y += ipi/fdt_ipi.o
+libsbiutils-objs-y += ipi/fdt_ipi_clint.o

From 75322a634bc8494fc5cf0f5290c81e1100789631 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 16:56:33 +0530
Subject: [PATCH 0560/1765] lib: utils: Add simple FDT irqchip framework

We add simple irqchip framework which will select and use irqchip driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/irqchip/fdt_irqchip.h |  26 ++++++
 lib/utils/irqchip/fdt_irqchip.c         |  72 ++++++++++++++++
 lib/utils/irqchip/fdt_irqchip_plic.c    | 110 ++++++++++++++++++++++++
 lib/utils/irqchip/objects.mk            |   2 +
 4 files changed, 210 insertions(+)
 create mode 100644 include/sbi_utils/irqchip/fdt_irqchip.h
 create mode 100644 lib/utils/irqchip/fdt_irqchip.c
 create mode 100644 lib/utils/irqchip/fdt_irqchip_plic.c

diff --git a/include/sbi_utils/irqchip/fdt_irqchip.h b/include/sbi_utils/irqchip/fdt_irqchip.h
new file mode 100644
index 00000000000..13ef6f71159
--- /dev/null
+++ b/include/sbi_utils/irqchip/fdt_irqchip.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_IRQCHIP_H__
+#define __FDT_IRQCHIP_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_irqchip {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+};
+
+void fdt_irqchip_exit(void);
+
+int fdt_irqchip_init(bool cold_boot);
+
+#endif
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
new file mode 100644
index 00000000000..5f5cf97d7d7
--- /dev/null
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -0,0 +1,72 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+
+extern struct fdt_irqchip fdt_irqchip_plic;
+
+static struct fdt_irqchip *irqchip_drivers[] = {
+	&fdt_irqchip_plic
+};
+
+static struct fdt_irqchip *current_driver = NULL;
+
+void fdt_irqchip_exit(void)
+{
+	if (current_driver && current_driver->exit)
+		current_driver->exit();
+}
+
+static int fdt_irqchip_warm_init(void)
+{
+	if (current_driver && current_driver->warm_init)
+		return current_driver->warm_init();
+	return 0;
+}
+
+static int fdt_irqchip_cold_init(void)
+{
+	int pos, noff, rc;
+	struct fdt_irqchip *drv;
+	const struct fdt_match *match;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (pos = 0; pos < array_size(irqchip_drivers); pos++) {
+		drv = irqchip_drivers[pos];
+
+		noff = fdt_find_match(fdt, drv->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		if (drv->cold_init) {
+			rc = drv->cold_init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+	return 0;
+}
+
+int fdt_irqchip_init(bool cold_boot)
+{
+	int rc;
+
+	if (cold_boot) {
+		rc = fdt_irqchip_cold_init();
+		if (rc)
+			return rc;
+	}
+
+	return fdt_irqchip_warm_init();
+}
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
new file mode 100644
index 00000000000..5bac6a7a8b5
--- /dev/null
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -0,0 +1,110 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/irqchip/plic.h>
+
+static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
+
+static int irqchip_plic_warm_init(void)
+{
+	u32 hartid = current_hartid();
+
+	return plic_warm_irqchip_init(hartid,
+				      plic_hartid2context[hartid][0],
+				      plic_hartid2context[hartid][1]);
+}
+
+static int irqchip_plic_parse_hartid2context(void *fdt, int nodeoff)
+{
+	const fdt32_t *val;
+	u32 phandle, hwirq, hartid;
+	int i, err, count, cpu_offset, cpu_intc_offset;
+
+	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+		plic_hartid2context[i][0] = -1;
+		plic_hartid2context[i][1] = -1;
+	}
+
+	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
+	if (!val || count < sizeof(fdt32_t))
+		return SBI_EINVAL;
+	count = count / sizeof(fdt32_t);
+
+	for (i = 0; i < count; i += 2) {
+		phandle = fdt32_to_cpu(val[i]);
+		hwirq = fdt32_to_cpu(val[i + 1]);
+
+		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		switch (hwirq) {
+		case IRQ_M_EXT:
+			plic_hartid2context[hartid][0] = i / 2;
+			break;
+		case IRQ_S_EXT:
+			plic_hartid2context[hartid][1] = i / 2;
+			break;
+		}
+	}
+
+	return 0;
+}
+
+static int irqchip_plic_cold_init(void *fdt, int nodeoff,
+				  const struct fdt_match *match)
+{
+	int rc;
+	u32 max_hartid;
+	struct platform_plic_data plic;
+
+	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
+	if (rc)
+		return rc;
+
+	rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
+	if (rc)
+		return rc;
+
+	rc = plic_cold_irqchip_init(plic.addr, plic.num_src, max_hartid + 1);
+	if (rc)
+		return rc;
+
+	return irqchip_plic_parse_hartid2context(fdt, nodeoff);
+}
+
+static const struct fdt_match irqchip_plic_match[] = {
+	{ .compatible = "riscv,plic0" },
+	{ .compatible = "sifive,plic-1.0.0" },
+	{ },
+};
+
+struct fdt_irqchip fdt_irqchip_plic = {
+	.match_table = irqchip_plic_match,
+	.cold_init = irqchip_plic_cold_init,
+	.warm_init = irqchip_plic_warm_init,
+	.exit = NULL,
+};
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index e3a09024a16..934f706b611 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -7,4 +7,6 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+libsbiutils-objs-y += irqchip/fdt_irqchip.o
+libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
 libsbiutils-objs-y += irqchip/plic.o

From 76a89403c8efa58582fe35cf942e80be7f5f36f9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 17:00:37 +0530
Subject: [PATCH 0561/1765] lib: utils: Add simple FDT serial framework

We add simple serial framework which will select and use serial driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/serial/fdt_serial.h  |  28 +++++++
 lib/utils/serial/fdt_serial.c          | 109 +++++++++++++++++++++++++
 lib/utils/serial/fdt_serial_htif.c     |  24 ++++++
 lib/utils/serial/fdt_serial_sifive.c   |  38 +++++++++
 lib/utils/serial/fdt_serial_uart8250.c |  39 +++++++++
 lib/utils/serial/objects.mk            |   4 +
 6 files changed, 242 insertions(+)
 create mode 100644 include/sbi_utils/serial/fdt_serial.h
 create mode 100644 lib/utils/serial/fdt_serial.c
 create mode 100644 lib/utils/serial/fdt_serial_htif.c
 create mode 100644 lib/utils/serial/fdt_serial_sifive.c
 create mode 100644 lib/utils/serial/fdt_serial_uart8250.c

diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
new file mode 100644
index 00000000000..08f97996fb3
--- /dev/null
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_SERIAL_H__
+#define __FDT_SERIAL_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_serial {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	void (*putc)(char ch);
+	int (*getc)(void);
+};
+
+void fdt_serial_putc(char ch);
+
+int fdt_serial_getc(void);
+
+int fdt_serial_init(void);
+
+#endif
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
new file mode 100644
index 00000000000..ae1aeea9326
--- /dev/null
+++ b/lib/utils/serial/fdt_serial.c
@@ -0,0 +1,109 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+
+extern struct fdt_serial fdt_serial_uart8250;
+extern struct fdt_serial fdt_serial_sifive;
+extern struct fdt_serial fdt_serial_htif;
+
+static struct fdt_serial *serial_drivers[] = {
+	&fdt_serial_uart8250,
+	&fdt_serial_sifive,
+	&fdt_serial_htif,
+};
+
+static void dummy_putc(char ch)
+{
+}
+
+static int dummy_getc(void)
+{
+	return -1;
+}
+
+static struct fdt_serial dummy = {
+	.match_table = NULL,
+	.init = NULL,
+	.putc = dummy_putc,
+	.getc = dummy_getc,
+};
+
+static struct fdt_serial *current_driver = &dummy;
+
+void fdt_serial_putc(char ch)
+{
+	current_driver->putc(ch);
+}
+
+int fdt_serial_getc(void)
+{
+	return current_driver->getc();
+}
+
+int fdt_serial_init(void)
+{
+	const void *prop;
+	struct fdt_serial *drv;
+	const struct fdt_match *match;
+	int pos, noff = -1, len, coff, rc;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	/* Find offset of node pointed by stdout-path */
+	coff = fdt_path_offset(fdt, "/chosen");
+	if (-1 < coff) {
+		prop = fdt_getprop(fdt, coff, "stdout-path", &len);
+		if (prop && len)
+			noff = fdt_path_offset(fdt, prop);
+	}
+
+	/* First check DT node pointed by stdout-path */
+	for (pos = 0; pos < array_size(serial_drivers) && -1 < noff; pos++) {
+		drv = serial_drivers[pos];
+
+		match = fdt_match_node(fdt, noff, drv->match_table);
+		if (!match)
+			continue;
+
+		if (drv->init) {
+			rc = drv->init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+	/* Check if we found desired driver */
+	if (current_driver != &dummy)
+		goto done;
+
+	/* Lastly check all DT nodes */
+	for (pos = 0; pos < array_size(serial_drivers); pos++) {
+		drv = serial_drivers[pos];
+
+		noff = fdt_find_match(fdt, drv->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		if (drv->init) {
+			rc = drv->init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+done:
+	return 0;
+}
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
new file mode 100644
index 00000000000..32d695317e6
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -0,0 +1,24 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/sys/htif.h>
+
+static const struct fdt_match serial_htif_match[] = {
+	{ .compatible = "ucb,htif0" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_htif = {
+	.match_table = serial_htif_match,
+	.init = NULL,
+	.getc = htif_getc,
+	.putc = htif_putc
+};
diff --git a/lib/utils/serial/fdt_serial_sifive.c b/lib/utils/serial/fdt_serial_sifive.c
new file mode 100644
index 00000000000..9e487a2b5ab
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_sifive.c
@@ -0,0 +1,38 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/sifive-uart.h>
+
+static int serial_sifive_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart;
+
+	rc = fdt_parse_sifive_uart_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return sifive_uart_init(uart.addr, uart.freq, uart.baud);
+}
+
+static const struct fdt_match serial_sifive_match[] = {
+	{ .compatible = "sifive,fu540-c000-uart" },
+	{ .compatible = "sifive,uart0" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_sifive = {
+	.match_table = serial_sifive_match,
+	.init = serial_sifive_init,
+	.getc = sifive_uart_getc,
+	.putc = sifive_uart_putc
+};
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
new file mode 100644
index 00000000000..5030b823a62
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -0,0 +1,39 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/uart8250.h>
+
+static int serial_uart8250_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart;
+
+	rc = fdt_parse_uart8250_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return uart8250_init(uart.addr, uart.freq, uart.baud,
+			     uart.reg_shift, uart.reg_io_width);
+}
+
+static const struct fdt_match serial_uart8250_match[] = {
+	{ .compatible = "ns16550" },
+	{ .compatible = "ns16550a" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_uart8250 = {
+	.match_table = serial_uart8250_match,
+	.init = serial_uart8250_init,
+	.getc = uart8250_getc,
+	.putc = uart8250_putc
+};
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 5b22031cfb5..d81663bf2d1 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -7,5 +7,9 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+libsbiutils-objs-y += serial/fdt_serial.o
+libsbiutils-objs-y += serial/fdt_serial_htif.o
+libsbiutils-objs-y += serial/fdt_serial_sifive.o
+libsbiutils-objs-y += serial/fdt_serial_uart8250.o
 libsbiutils-objs-y += serial/sifive-uart.o
 libsbiutils-objs-y += serial/uart8250.o

From 7cc6fa4d8a65e08048e1dd469087805ce89bf306 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Apr 2020 17:02:48 +0530
Subject: [PATCH 0562/1765] lib: utils: Add simple FDT reset framework

We add simple reset framework which will select and use reset driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/reset/fdt_reset.h | 25 +++++++++++++
 lib/utils/reset/fdt_reset.c         | 55 +++++++++++++++++++++++++++++
 lib/utils/reset/fdt_reset_htif.c    | 22 ++++++++++++
 lib/utils/reset/fdt_reset_sifive.c  | 37 +++++++++++++++++++
 lib/utils/reset/objects.mk          | 12 +++++++
 5 files changed, 151 insertions(+)
 create mode 100644 include/sbi_utils/reset/fdt_reset.h
 create mode 100644 lib/utils/reset/fdt_reset.c
 create mode 100644 lib/utils/reset/fdt_reset_htif.c
 create mode 100644 lib/utils/reset/fdt_reset_sifive.c
 create mode 100644 lib/utils/reset/objects.mk

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
new file mode 100644
index 00000000000..789a6acef80
--- /dev/null
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_RESET_H__
+#define __FDT_RESET_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_reset {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*system_reset)(u32 reset_type);
+};
+
+int fdt_system_reset(u32 reset_type);
+
+int fdt_reset_init(void);
+
+#endif
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
new file mode 100644
index 00000000000..98fbb549d36
--- /dev/null
+++ b/lib/utils/reset/fdt_reset.c
@@ -0,0 +1,55 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+extern struct fdt_reset fdt_reset_sifive;
+extern struct fdt_reset fdt_reset_htif;
+
+static struct fdt_reset *reset_drivers[] = {
+	&fdt_reset_sifive,
+	&fdt_reset_htif,
+};
+
+static struct fdt_reset *current_driver = NULL;
+
+int fdt_system_reset(u32 reset_type)
+{
+	if (current_driver && current_driver->system_reset)
+		return current_driver->system_reset(reset_type);
+	return 0;
+}
+
+int fdt_reset_init(void)
+{
+	int pos, noff, rc;
+	struct fdt_reset *drv;
+	const struct fdt_match *match;
+	void *fdt = sbi_scratch_thishart_arg1_ptr();
+
+	for (pos = 0; pos < array_size(reset_drivers); pos++) {
+		drv = reset_drivers[pos];
+
+		noff = fdt_find_match(fdt, drv->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		if (drv->init) {
+			rc = drv->init(fdt, noff, match);
+			if (rc)
+				return rc;
+		}
+		current_driver = drv;
+		break;
+	}
+
+	return 0;
+}
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
new file mode 100644
index 00000000000..e453d05eb3c
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/sys/htif.h>
+
+static const struct fdt_match htif_reset_match[] = {
+	{ .compatible = "ucb,htif0" },
+	{ },
+};
+
+struct fdt_reset fdt_reset_htif = {
+	.match_table = htif_reset_match,
+	.system_reset = htif_system_reset
+};
diff --git a/lib/utils/reset/fdt_reset_sifive.c b/lib/utils/reset/fdt_reset_sifive.c
new file mode 100644
index 00000000000..6a171cabebf
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_sifive.c
@@ -0,0 +1,37 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/sys/sifive_test.h>
+
+static int sifive_test_reset_init(void *fdt, int nodeoff,
+				  const struct fdt_match *match)
+{
+	int rc;
+	unsigned long addr;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
+	if (rc)
+		return rc;
+
+	return sifive_test_init(addr);
+}
+
+static const struct fdt_match sifive_test_reset_match[] = {
+	{ .compatible = "sifive,test1" },
+	{ },
+};
+
+struct fdt_reset fdt_reset_sifive = {
+	.match_table = sifive_test_reset_match,
+	.init = sifive_test_reset_init,
+	.system_reset = sifive_test_system_reset
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
new file mode 100644
index 00000000000..b447261f81f
--- /dev/null
+++ b/lib/utils/reset/objects.mk
@@ -0,0 +1,12 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+libsbiutils-objs-y += reset/fdt_reset.o
+libsbiutils-objs-y += reset/fdt_reset_htif.o
+libsbiutils-objs-y += reset/fdt_reset_sifive.o

From 4d063538f0493916dc6263276c4c84f31446db41 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 26 Apr 2020 14:31:28 +0530
Subject: [PATCH 0563/1765] firmware: fw_base: Introduce optional
 fw_platform_init()

We add optional fw_platform_init() function which will allow
platform specific code to update "struct sbi_platform platform"
before it is used.

The fw_platform_init() can be a regular C function so before
callint it we:
1. zero-out BSS section
2. Setup temporary trap handler to catch bugs
3. Setup temporary stack pointer

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 41 +++++++++++++++++++++++++++++++++--------
 1 file changed, 33 insertions(+), 8 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 07edc749d78..5cb0dfab580 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -160,6 +160,32 @@ _relocate_done:
 	li	ra, 0
 	call	_reset_regs
 
+	/* Zero-out BSS */
+	la	s4, _bss_start
+	la	s5, _bss_end
+_bss_zero:
+	REG_S	zero, (s4)
+	add	s4, s4, __SIZEOF_POINTER__
+	blt	s4, s5, _bss_zero
+
+	/* Setup temporary trap handler */
+	la	s4, _start_hang
+	csrw	CSR_MTVEC, s4
+
+	/* Setup temporary stack */
+	la	s4, _fw_end
+	li	s5, (SBI_SCRATCH_SIZE * 2)
+	add	sp, s4, s5
+
+	/*
+	 * Initialize platform
+	 * Note: The a0 to a4 registers passed to the
+	 * firmware are parameters to this function.
+	 */
+	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
+	call	fw_platform_init
+	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
+
 	/* Allow main firmware to save info */
 	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
 	call	fw_save_info
@@ -245,14 +271,6 @@ _scratch_init:
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
 
-	/* Zero-out BSS */
-	la	a4, _bss_start
-	la	a5, _bss_end
-_bss_zero:
-	REG_S	zero, (a4)
-	add	a4, a4, __SIZEOF_POINTER__
-	blt	a4, a5, _bss_zero
-
 	/* Override pervious arg1 */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_prev_arg1
@@ -454,6 +472,13 @@ _start_hang:
 	wfi
 	j	_start_hang
 
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl fw_platform_init
+	.weak fw_platform_init
+fw_platform_init:
+	ret
+
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _trap_handler

From f1aa9e54e00006ae70aeac638d5b75093520f65d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 28 Apr 2020 09:23:30 +0530
Subject: [PATCH 0564/1765] platform: Add generic FDT based platform support

We add generic FDT based platform support which provides platform
specific functionality based on the FDT passed by previous booting
stage.

By default, the generic FDT platform makes following assumptions:
1. platform FW_TEXT_START is 0x80000000
2. platform features are default
3. platform stack size is default
4. platform has no quirks or work-arounds

The above assumptions (except 1) can be overridden by adding special
platform callbacks which will be called based on the FDT root node
compatible string.

By default, we compile OpenSBI generic platform as follows:
$ make PLATFORM=generic

For a non-standard FW_TEXT_START, we can compile OpenSBI generic
platform as follows:
$ make PLATFORM=generic FW_TEXT_START=<non_standard_text_start>

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/generic.md                     |  42 ++++
 docs/platform/platform.md                    |   6 +
 platform/generic/config.mk                   |  40 ++++
 platform/generic/include/platform_override.h |  26 +++
 platform/generic/objects.mk                  |  10 +
 platform/generic/platform.c                  | 209 +++++++++++++++++++
 6 files changed, 333 insertions(+)
 create mode 100644 docs/platform/generic.md
 create mode 100644 platform/generic/config.mk
 create mode 100644 platform/generic/include/platform_override.h
 create mode 100644 platform/generic/objects.mk
 create mode 100644 platform/generic/platform.c

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
new file mode 100644
index 00000000000..73b6fcadb6c
--- /dev/null
+++ b/docs/platform/generic.md
@@ -0,0 +1,42 @@
+Generic Platform
+================
+
+The **Generic** platform is a flattened device tree (FDT) based platform
+where all platform specific functionality is provided based on FDT passed
+by previous booting stage. The **Generic** platform allows us to use same
+OpenSBI firmware binaries on various emulators, simulators, FPGAs, and
+boards.
+
+By default, the generic FDT platform makes following assumptions:
+
+1. platform FW_TEXT_START is 0x80000000
+2. platform features are default
+3. platform stack size is default
+4. platform has no quirks or work-arounds
+
+The above assumptions (except 1) can be overridden by adding special platform
+callbacks which will be called based on FDT root node compatible string.
+
+Users of the generic FDT platform will have to ensure that:
+
+1. Various FDT based drivers under lib/utils directory are upto date
+   based on their platform requirements
+2. The FDT passed by previous booting stage has DT compatible strings and
+   DT properties in sync with the FDT based drivers under lib/utils directory
+
+To build the platform-specific library and firmware images, provide the
+*PLATFORM=generic* parameter to the top level `make` command.
+
+For custom FW_TEXT_START, we can build the platform-specific library and
+firmware images by passing *PLATFORM=generic FW_TEXT_START=<custom_text_start>*
+parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *Generic* platform does not have any platform-specific options.
+
+RISC-V Platforms Using Generic Platform
+---------------------------------------
+
+To be added later.
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 5580283bc49..c8f6adeb881 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -3,6 +3,11 @@ OpenSBI Supported Platforms
 
 OpenSBI currently supports the following virtual and hardware platforms:
 
+* **Generic**: Flattened device tree (FDT) based platform where platform
+  specific functionality is provided based on the FDT passed by previous
+  booting stage. More details on this platform can be found in the file
+  *[generic.md]*.
+
 * **QEMU RISC-V Virt Machine**: Platform support for the QEMU *virt* virtual
   RISC-V machine. This virtual machine is intended for RISC-V software
   development and tests. More details on this platform can be found in the
@@ -34,6 +39,7 @@ template files for implementing support for a new platform. The *object.mk*,
 *config.mk* and *platform.c* template files provides enough comments to
 facilitate the implementation.
 
+[generic.md]: generic.md
 [qemu_virt.md]: qemu_virt.md
 [sifive_fu540.md]: sifive_fu540.md
 [fpga-ariane.md]: fpga-ariane.md
diff --git a/platform/generic/config.mk b/platform/generic/config.mk
new file mode 100644
index 00000000000..8d63ecec64e
--- /dev/null
+++ b/platform/generic/config.mk
@@ -0,0 +1,40 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Command for platform specific "make run"
+platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
+  -nographic -kernel $(build_dir)/platform/generic/firmware/fw_payload.elf
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
+FW_JUMP=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x400000)))
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x200000)))
+endif
+FW_JUMP_FDT_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x2200000)))
+FW_PAYLOAD=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
new file mode 100644
index 00000000000..1262627e2ff
--- /dev/null
+++ b/platform/generic/include/platform_override.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __PLATFORM_OVERRIDE_H__
+#define __PLATFORM_OVERRIDE_H__
+
+#include <sbi/sbi_types.h>
+
+struct platform_override {
+	const struct fdt_match *match_table;
+	u64 (*features)(const struct fdt_match *match);
+	u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+	int (*early_init)(bool cold_boot, const struct fdt_match *match);
+	int (*final_init)(bool cold_boot, const struct fdt_match *match);
+	void (*early_exit)(const struct fdt_match *match);
+	void (*final_exit)(const struct fdt_match *match);
+	int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+};
+
+#endif
diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
new file mode 100644
index 00000000000..5ed44373b41
--- /dev/null
+++ b/platform/generic/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+platform-objs-y += platform.o
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
new file mode 100644
index 00000000000..cb16cc44145
--- /dev/null
+++ b/platform/generic/platform.c
@@ -0,0 +1,209 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <platform_override.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+static const struct platform_override *special_platforms[] = { };
+
+static const struct platform_override *generic_plat = NULL;
+static const struct fdt_match *generic_plat_match = NULL;
+
+static void fw_platform_lookup_special(void *fdt, int root_offset)
+{
+	int pos, noff;
+	const struct platform_override *plat;
+	const struct fdt_match *match;
+
+	for (pos = 0; pos < array_size(special_platforms); pos++) {
+		plat = special_platforms[pos];
+		if (!plat->match_table)
+			continue;
+
+		noff = fdt_find_match(fdt, plat->match_table, &match);
+		if (noff < 0)
+			continue;
+
+		generic_plat = plat;
+		generic_plat_match = match;
+		break;
+	}
+}
+
+extern struct sbi_platform platform;
+static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
+
+/*
+ * The fw_platform_init() function is called very early on the boot HART
+ * OpenSBI reference firmwares so that platform specific code get chance
+ * to update "platform" instance before it is used.
+ *
+ * The arguments passed to fw_platform_init() function are boot time state
+ * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
+ * be address of FDT passed by previous booting stage.
+ */
+void fw_platform_init(unsigned long arg0, unsigned long arg1,
+		      unsigned long arg2, unsigned long arg3,
+		      unsigned long arg4)
+{
+	const char *model, *mmu_type;
+	void *fdt = (void *)arg1;
+	u32 hartid, hart_count = 0;
+	int rc, root_offset, cpus_offset, cpu_offset, len;
+
+	root_offset = fdt_path_offset(fdt, "/");
+	if (root_offset < 0)
+		goto fail;
+
+	fw_platform_lookup_special(fdt, root_offset);
+
+	model = fdt_getprop(fdt, root_offset, "model", &len);
+	if (model)
+		sbi_strncpy(platform.name, model, sizeof(platform.name));
+
+	if (generic_plat && generic_plat->features)
+		platform.features = generic_plat->features(generic_plat_match);
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		goto fail;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (rc)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
+		if (!mmu_type || !len)
+			hartid = -1U;
+
+		generic_hart_index2id[hart_count++] = hartid;
+	}
+
+	platform.hart_count = hart_count;
+
+	return;
+
+fail:
+	while (1)
+		wfi();
+}
+
+static int generic_early_init(bool cold_boot)
+{
+	int rc;
+
+	if (generic_plat && generic_plat->early_init) {
+		rc = generic_plat->early_init(cold_boot, generic_plat_match);
+		if (rc)
+			return rc;
+	}
+
+	if (!cold_boot)
+		return 0;
+
+	return fdt_reset_init();
+}
+
+static int generic_final_init(bool cold_boot)
+{
+	void *fdt;
+	int rc;
+
+	if (generic_plat && generic_plat->final_init) {
+		rc = generic_plat->final_init(cold_boot, generic_plat_match);
+		if (rc)
+			return rc;
+	}
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+
+	fdt_cpu_fixup(fdt);
+	fdt_fixups(fdt);
+
+	return 0;
+}
+
+static void generic_early_exit(void)
+{
+	if (generic_plat && generic_plat->early_exit)
+		generic_plat->early_exit(generic_plat_match);
+}
+
+static void generic_final_exit(void)
+{
+	if (generic_plat && generic_plat->final_exit)
+		generic_plat->final_exit(generic_plat_match);
+}
+
+static u64 generic_tlbr_flush_limit(void)
+{
+	if (generic_plat && generic_plat->tlbr_flush_limit)
+		return generic_plat->tlbr_flush_limit(generic_plat_match);
+	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
+}
+
+static int generic_system_reset(u32 reset_type)
+{
+	if (generic_plat && generic_plat->system_reset)
+		return generic_plat->system_reset(reset_type,
+						  generic_plat_match);
+	return fdt_system_reset(reset_type);
+}
+
+const struct sbi_platform_operations platform_ops = {
+	.early_init		= generic_early_init,
+	.final_init		= generic_final_init,
+	.early_exit		= generic_early_exit,
+	.final_exit		= generic_final_exit,
+	.console_putc		= fdt_serial_putc,
+	.console_getc		= fdt_serial_getc,
+	.console_init		= fdt_serial_init,
+	.irqchip_init		= fdt_irqchip_init,
+	.irqchip_exit		= fdt_irqchip_exit,
+	.ipi_send		= fdt_ipi_send,
+	.ipi_clear		= fdt_ipi_clear,
+	.ipi_init		= fdt_ipi_init,
+	.ipi_exit		= fdt_ipi_exit,
+	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
+	.timer_value		= fdt_timer_value,
+	.timer_event_stop	= fdt_timer_event_stop,
+	.timer_event_start	= fdt_timer_event_start,
+	.timer_init		= fdt_timer_init,
+	.timer_exit		= fdt_timer_exit,
+	.system_reset		= generic_system_reset,
+};
+
+struct sbi_platform platform = {
+	.opensbi_version	= OPENSBI_VERSION,
+	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
+	.name			= "Generic",
+	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
+	.hart_count		= SBI_HARTMASK_MAX_BITS,
+	.hart_index2id		= generic_hart_index2id,
+	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.platform_ops_addr	= (unsigned long)&platform_ops
+};

From 1f21b99ff04ff7f13249f79777755fcb988e5ef9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 26 Apr 2020 15:52:26 +0530
Subject: [PATCH 0565/1765] lib: sbi: Print platform hart count at boot time

Now that we have generic platform which detects hart count from
DTB, we should print platform hart count at boot time.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index b01bff1ccca..629eb838521 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -59,7 +59,9 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
 	sbi_printf("Platform HART Features : RV%d%s\n", xlen, str);
-	sbi_printf("Current Hart           : %u\n", hartid);
+	sbi_printf("Platform HART Count    : %u\n",
+		   sbi_platform_hart_count(plat));
+	sbi_printf("Current HART ID        : %u\n", hartid);
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size          : %d KB\n",

From 2ba7087b09123f9f4eb6328e2d10e942e181d096 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 27 Apr 2020 18:32:19 +0530
Subject: [PATCH 0566/1765] scripts: Add generic platform to
 create-binary-archive.sh

This patch adds generic platform to create-binary-archive.sh
script.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 scripts/create-binary-archive.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index eaf16b15280..c2575ab2ffa 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -97,6 +97,7 @@ build_opensbi() {
 		# Setup 32-bit platform list
 		BUILD_PLATFORM_SUBDIR=("qemu/virt")
 		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	64)
 		# Setup 64-bit platform list
@@ -109,6 +110,7 @@ build_opensbi() {
 		BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 		BUILD_PLATFORM_SUBDIR+=("thead/c910")
 		BUILD_PLATFORM_SUBDIR+=("spike")
+		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	*)
 		echo "Invalid Build RISC-V XLEN"

From 4f18c6e55049d858c62e87d2605dd41c06956e4e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 28 Apr 2020 09:35:32 +0530
Subject: [PATCH 0567/1765] platform: generic: Add Sifive FU540 TLB flush range
 limit override

We need to override the remote TLB flush range limit for SiFive FU540
so we add platform override to achieve this.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/generic/objects.mk     |  1 +
 platform/generic/platform.c     |  6 +++++-
 platform/generic/sifive_fu540.c | 33 +++++++++++++++++++++++++++++++++
 3 files changed, 39 insertions(+), 1 deletion(-)
 create mode 100644 platform/generic/sifive_fu540.c

diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index 5ed44373b41..d6c8a42d6e0 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -8,3 +8,4 @@
 #
 
 platform-objs-y += platform.o
+platform-objs-y += sifive_fu540.o
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index cb16cc44145..7b4a0aef337 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -21,7 +21,11 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
-static const struct platform_override *special_platforms[] = { };
+extern const struct platform_override sifive_fu540;
+
+static const struct platform_override *special_platforms[] = {
+	&sifive_fu540,
+};
 
 static const struct platform_override *generic_plat = NULL;
 static const struct fdt_match *generic_plat_match = NULL;
diff --git a/platform/generic/sifive_fu540.c b/platform/generic/sifive_fu540.c
new file mode 100644
index 00000000000..9ddafa0e9bc
--- /dev/null
+++ b/platform/generic/sifive_fu540.c
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <platform_override.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
+{
+	/*
+	 * The sfence.vma by virtual address does not work on
+	 * SiFive FU540 so we return remote TLB flush limit as zero.
+	 */
+	return 0;
+}
+
+static const struct fdt_match sifive_fu540_match[] = {
+	{ .compatible = "sifive,fu540" },
+	{ .compatible = "sifive,fu540g" },
+	{ .compatible = "sifive,fu540-c000" },
+	{ .compatible = "sifive,hifive-unleashed-a00" },
+	{ },
+};
+
+const struct platform_override sifive_fu540 = {
+	.match_table = sifive_fu540_match,
+	.tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
+};

From 13717a8e53a382769e9678f6d9357c20446cde0c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 1 May 2020 12:06:56 +0530
Subject: [PATCH 0568/1765] platform: Remove qemu/virt directory

The OpenSBI generic platform works perfectly fine on the QEMU virt
machine so let's remove dedicated QEMU virt machine platform from
OpenSBI.

All QEMU virt machine related documentation in OpenSBI will now
suggest using OpenSBI generic platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 README.md                        |   2 +-
 docs/platform/generic.md         |   4 +-
 docs/platform/qemu_virt.md       |  46 +++++------
 platform/qemu/virt/config.mk     |  40 ---------
 platform/qemu/virt/objects.mk    |  10 ---
 platform/qemu/virt/platform.c    | 135 -------------------------------
 scripts/create-binary-archive.sh |   6 +-
 7 files changed, 28 insertions(+), 215 deletions(-)
 delete mode 100644 platform/qemu/virt/config.mk
 delete mode 100644 platform/qemu/virt/objects.mk
 delete mode 100644 platform/qemu/virt/platform.c

diff --git a/README.md b/README.md
index d58bc4eb372..23950126195 100644
--- a/README.md
+++ b/README.md
@@ -115,7 +115,7 @@ line, the platform-specific static library *libplatsbi.a* and firmware examples
 are built for the platform *<platform_subdir>* present in the directory
 *platform* in the OpenSBI top directory. For example, to compile the platform
 library and the firmware examples for the QEMU RISC-V *virt* machine,
-*<platform_subdir>* should be *qemu/virt*.
+*<platform_subdir>* should be *generic*.
 
 To build *libsbi.a*, *libplatsbi.a* and the firmware for one of the supported
 platforms, run:
diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index 73b6fcadb6c..f4281a2d9c5 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -39,4 +39,6 @@ The *Generic* platform does not have any platform-specific options.
 RISC-V Platforms Using Generic Platform
 ---------------------------------------
 
-To be added later.
+* **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
+
+[qemu_virt.md]: qemu_virt.md
diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 6d8a3d04a5f..2196e5af20b 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -7,7 +7,7 @@ software development and testing. It is also referred to as
 storage, and other types of IO.
 
 To build the platform-specific library and firmware images, provide the
-*PLATFORM=qemu/virt* parameter to the top level `make` command.
+*PLATFORM=generic* parameter to the top level `make` command.
 
 Platform Options
 ----------------
@@ -22,13 +22,13 @@ Execution on QEMU RISC-V 64-bit
 
 Build:
 ```
-make PLATFORM=qemu/virt
+make PLATFORM=generic
 ```
 
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+	-kernel build/platform/generic/firmware/fw_payload.bin
 ```
 
 **U-Boot Payload**
@@ -38,19 +38,19 @@ the `qemu-riscv64_smode_defconfig` configuration.
 
 Build:
 ```
-make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+make PLATFORM=generic FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 ```
 
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+	-kernel build/platform/generic/firmware/fw_payload.elf
 ```
 or
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80200000
+	-bios build/platform/generic/firmware/fw_jump.bin \
+	-kernel <uboot_build_directory>/u-boot.bin
 ```
 
 **Linux Kernel Payload**
@@ -60,13 +60,13 @@ Note: We assume that the Linux kernel is compiled using
 
 Build:
 ```
-make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf \
+	-kernel build/platform/generic/firmware/fw_payload.elf \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
@@ -74,8 +74,8 @@ qemu-system-riscv64 -M virt -m 256M -nographic \
 or
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80200000 \
+	-bios build/platform/generic/firmware/fw_jump.bin \
+	-kernel <linux_build_directory>/arch/riscv/boot/Image \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
@@ -89,13 +89,13 @@ Execution on QEMU RISC-V 32-bit
 
 Build:
 ```
-make PLATFORM=qemu/virt
+make PLATFORM=generic PLATFORM_RISCV_XLEN=32
 ```
 
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+	-kernel build/platform/generic/firmware/fw_payload.bin
 ```
 
 **U-Boot Payload**
@@ -105,37 +105,35 @@ the `qemu-riscv32_smode_defconfig` configuration.
 
 Build:
 ```
-make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
+make PLATFORM=generic PLATFORM_RISCV_XLEN=32 FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 ```
 
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf
+	-kernel build/platform/generic/firmware/fw_payload.elf
 ```
 or
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<uboot_build_directory>/u-boot.bin,addr=0x80400000
+	-bios build/platform/generic/firmware/fw_jump.bin \
+	-kernel <uboot_build_directory>/u-boot.bin
 ```
 
 **Linux Kernel Payload**
 
 Note: We assume that the Linux kernel is compiled using
-*arch/riscv/configs/rv32_defconfig* (kernel 5.1 and newer)
-respectively using *arch/riscv/configs/defconfig* plus setting
-CONFIG_ARCH_RV32I=y (kernel 5.0 and older).
+*arch/riscv/configs/rv32_defconfig*.
 
 Build:
 ```
-make PLATFORM=qemu/virt FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=generic PLATFORM_RISCV_XLEN=32 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_payload.elf \
+	-kernel build/platform/generic/firmware/fw_payload.elf \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
@@ -143,8 +141,8 @@ qemu-system-riscv32 -M virt -m 256M -nographic \
 or
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/qemu/virt/firmware/fw_jump.elf \
-	-device loader,file=<linux_build_directory>/arch/riscv/boot/Image,addr=0x80400000 \
+	-bios build/platform/generic/firmware/fw_jump.bin \
+	-kernel <linux_build_directory>/arch/riscv/boot/Image \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
diff --git a/platform/qemu/virt/config.mk b/platform/qemu/virt/config.mk
deleted file mode 100644
index 025cd616601..00000000000
--- a/platform/qemu/virt/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
-  -nographic -kernel $(build_dir)/platform/qemu/virt/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_DYNAMIC=y
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_JUMP_ADDR=0x80400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_JUMP_ADDR=0x80200000
-endif
-FW_JUMP_FDT_ADDR=0x82200000
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/qemu/virt/objects.mk b/platform/qemu/virt/objects.mk
deleted file mode 100644
index c382cbfb26a..00000000000
--- a/platform/qemu/virt/objects.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-platform-objs-y += platform.o
diff --git a/platform/qemu/virt/platform.c b/platform/qemu/virt/platform.c
deleted file mode 100644
index 7836bee857c..00000000000
--- a/platform/qemu/virt/platform.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- *   Nick Kossifidis <mick@ics.forth.gr>
- */
-
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_encoding.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/uart8250.h>
-#include <sbi_utils/sys/clint.h>
-#include <sbi_utils/sys/sifive_test.h>
-
-/* clang-format off */
-
-#define VIRT_HART_COUNT			8
-
-#define VIRT_TEST_ADDR			0x100000
-
-#define VIRT_CLINT_ADDR			0x2000000
-
-#define VIRT_PLIC_ADDR			0xc000000
-#define VIRT_PLIC_NUM_SOURCES		127
-#define VIRT_PLIC_NUM_PRIORITIES	7
-
-#define VIRT_UART16550_ADDR		0x10000000
-#define VIRT_UART_BAUDRATE		115200
-#define VIRT_UART_SHIFTREG_ADDR		1843200
-
-/* clang-format on */
-
-static int virt_early_init(bool cold_boot)
-{
-	if (!cold_boot)
-		return 0;
-
-	return sifive_test_init(VIRT_TEST_ADDR);
-}
-
-static int virt_final_init(bool cold_boot)
-{
-	void *fdt;
-
-	if (!cold_boot)
-		return 0;
-
-	fdt = sbi_scratch_thishart_arg1_ptr();
-	fdt_fixups(fdt);
-
-	return 0;
-}
-
-static int virt_console_init(void)
-{
-	return uart8250_init(VIRT_UART16550_ADDR, VIRT_UART_SHIFTREG_ADDR,
-			     VIRT_UART_BAUDRATE, 0, 1);
-}
-
-static int virt_irqchip_init(bool cold_boot)
-{
-	int rc;
-	u32 hartid = current_hartid();
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(
-			VIRT_PLIC_ADDR, VIRT_PLIC_NUM_SOURCES, VIRT_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return plic_warm_irqchip_init(hartid, (2 * hartid), (2 * hartid + 1));
-}
-
-static int virt_ipi_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_ipi_init(VIRT_CLINT_ADDR, VIRT_HART_COUNT);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_ipi_init();
-}
-
-static int virt_timer_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_timer_init(VIRT_CLINT_ADDR,
-					   VIRT_HART_COUNT, TRUE);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_timer_init();
-}
-
-const struct sbi_platform_operations platform_ops = {
-	.early_init		= virt_early_init,
-	.final_init		= virt_final_init,
-	.console_putc		= uart8250_putc,
-	.console_getc		= uart8250_getc,
-	.console_init		= virt_console_init,
-	.irqchip_init		= virt_irqchip_init,
-	.ipi_send		= clint_ipi_send,
-	.ipi_clear		= clint_ipi_clear,
-	.ipi_init		= virt_ipi_init,
-	.timer_value		= clint_timer_value,
-	.timer_event_stop	= clint_timer_event_stop,
-	.timer_event_start	= clint_timer_event_start,
-	.timer_init		= virt_timer_init,
-	.system_reset		= sifive_test_system_reset,
-};
-
-const struct sbi_platform platform = {
-	.opensbi_version	= OPENSBI_VERSION,
-	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name			= "QEMU Virt Machine",
-	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count		= VIRT_HART_COUNT,
-	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-	.platform_ops_addr	= (unsigned long)&platform_ops
-};
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index c2575ab2ffa..32e53cf9c34 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -95,14 +95,12 @@ build_opensbi() {
 	case "${BUILD_RISCV_XLEN}" in
 	32)
 		# Setup 32-bit platform list
-		BUILD_PLATFORM_SUBDIR=("qemu/virt")
-		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		BUILD_PLATFORM_SUBDIR=("sifive/fu540")
 		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	64)
 		# Setup 64-bit platform list
-		BUILD_PLATFORM_SUBDIR=("qemu/virt")
-		BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
+		BUILD_PLATFORM_SUBDIR=("sifive/fu540")
 		BUILD_PLATFORM_SUBDIR+=("nuclei/ux600")
 		BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")

From 65c06b026db6352f1ff2bdb235f3149e5e99e2ba Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 1 May 2020 12:15:50 +0530
Subject: [PATCH 0569/1765] platform: Remove spike directory

The OpenSBI generic platform works perfectly fine on the QEMU spike
machine and Spike emulator so let's remove dedicated Spike platform
from OpenSBI.

All Spike platform related documentation in OpenSBI will now suggest
using OpenSBI generic platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/platform/generic.md         |  2 +
 docs/platform/spike.md           | 20 ++++----
 platform/spike/config.mk         | 36 -------------
 platform/spike/objects.mk        |  7 ---
 platform/spike/platform.c        | 86 --------------------------------
 scripts/create-binary-archive.sh |  1 -
 6 files changed, 12 insertions(+), 140 deletions(-)
 delete mode 100644 platform/spike/config.mk
 delete mode 100644 platform/spike/objects.mk
 delete mode 100644 platform/spike/platform.c

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index f4281a2d9c5..e2d1b63039f 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -40,5 +40,7 @@ RISC-V Platforms Using Generic Platform
 ---------------------------------------
 
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
+* **Spike** (*[spike.md]*)
 
 [qemu_virt.md]: qemu_virt.md
+[spike.md]: spike.md
diff --git a/docs/platform/spike.md b/docs/platform/spike.md
index 40fa4ba153e..8d6b4221965 100644
--- a/docs/platform/spike.md
+++ b/docs/platform/spike.md
@@ -9,7 +9,7 @@ on **Spike** simulator and QEMU Spike machine.
 For more details, refer [Spike on GitHub](https://github.com/riscv/riscv-isa-sim)
 
 To build the platform-specific library and firmware images, provide the
-*PLATFORM=spike* parameter to the top level `make` command.
+*PLATFORM=generic* parameter to the top level `make` command.
 
 Platform Options
 ----------------
@@ -23,12 +23,12 @@ Execution on Spike Simulator
 
 Build:
 ```
-make PLATFORM=spike
+make PLATFORM=generic
 ```
 
 Run:
 ```
-spike build/platform/spike/firmware/fw_payload.elf
+spike build/platform/generic/firmware/fw_payload.elf
 ```
 
 **Linux Kernel Payload**
@@ -38,12 +38,12 @@ Note: We assume that the Linux kernel is compiled using
 
 Build:
 ```
-make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Run:
 ```
-spike --initrd <path_to_cpio_ramdisk> build/platform/spike/firmware/fw_payload.elf
+spike --initrd <path_to_cpio_ramdisk> build/platform/generic/firmware/fw_payload.elf
 ```
 
 Execution on QEMU RISC-V 64-bit
@@ -53,13 +53,13 @@ Execution on QEMU RISC-V 64-bit
 
 Build:
 ```
-make PLATFORM=spike
+make PLATFORM=generic
 ```
 
 Run:
 ```
 qemu-system-riscv64 -M spike -m 256M -nographic \
-	-kernel build/platform/spike/firmware/fw_payload.elf
+	-kernel build/platform/generic/firmware/fw_payload.elf
 ```
 
 **Linux Kernel Payload**
@@ -69,20 +69,20 @@ Note: We assume that the Linux kernel is compiled using
 
 Build:
 ```
-make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 ```
 
 Run:
 ```
 qemu-system-riscv64 -M spike -m 256M -nographic \
-	-kernel build/platform/spike/firmware/fw_payload.elf \
+	-kernel build/platform/generic/firmware/fw_payload.elf \
 	-initrd <path_to_cpio_ramdisk> \
 	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
 ```
 or
 ```
 qemu-system-riscv64 -M spike -m 256M -nographic \
-	-bios build/platform/spike/firmware/fw_jump.elf \
+	-bios build/platform/generic/firmware/fw_jump.elf \
 	-kernel <linux_build_directory>/arch/riscv/boot/Image \
 	-initrd <path_to_cpio_ramdisk> \
 	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
diff --git a/platform/spike/config.mk b/platform/spike/config.mk
deleted file mode 100644
index 4bde3fdb74a..00000000000
--- a/platform/spike/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2020 Western Digital Corporation or its affiliates.
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = spike \
-  $(build_dir)/platform/spike/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_JUMP_ADDR=0x80400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_JUMP_ADDR=0x80200000
-endif
-FW_JUMP_FDT_ADDR=0x82200000
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/spike/objects.mk b/platform/spike/objects.mk
deleted file mode 100644
index 30a3c4fb838..00000000000
--- a/platform/spike/objects.mk
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2020 Western Digital Corporation or its affiliates.
-#
-
-platform-objs-y += platform.o
diff --git a/platform/spike/platform.c b/platform/spike/platform.c
deleted file mode 100644
index 066720aae77..00000000000
--- a/platform/spike/platform.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- */
-
-#include <sbi/sbi_platform.h>
-#include <sbi_utils/sys/clint.h>
-#include <sbi_utils/sys/htif.h>
-
-/* clang-format off */
-
-#define SPIKE_HART_COUNT			8
-
-#define SPIKE_CLINT_ADDR			0x2000000
-
-/* clang-format on */
-
-static int spike_final_init(bool cold_boot)
-{
-	return 0;
-}
-
-static int spike_console_init(void)
-{
-	return 0;
-}
-
-static int spike_irqchip_init(bool cold_boot)
-{
-	return 0;
-}
-
-static int spike_ipi_init(bool cold_boot)
-{
-	int ret;
-
-	if (cold_boot) {
-		ret = clint_cold_ipi_init(SPIKE_CLINT_ADDR,
-					  SPIKE_HART_COUNT);
-		if (ret)
-			return ret;
-	}
-
-	return clint_warm_ipi_init();
-}
-
-static int spike_timer_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_timer_init(SPIKE_CLINT_ADDR,
-					   SPIKE_HART_COUNT, TRUE);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_timer_init();
-}
-
-const struct sbi_platform_operations platform_ops = {
-	.final_init		= spike_final_init,
-	.console_putc		= htif_putc,
-	.console_getc		= htif_getc,
-	.console_init		= spike_console_init,
-	.irqchip_init		= spike_irqchip_init,
-	.ipi_send		= clint_ipi_send,
-	.ipi_clear		= clint_ipi_clear,
-	.ipi_init		= spike_ipi_init,
-	.timer_value		= clint_timer_value,
-	.timer_event_stop	= clint_timer_event_stop,
-	.timer_event_start	= clint_timer_event_start,
-	.timer_init		= spike_timer_init,
-	.system_reset		= htif_system_reset
-};
-
-const struct sbi_platform platform = {
-	.opensbi_version	= OPENSBI_VERSION,
-	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name			= "Spike",
-	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count		= SPIKE_HART_COUNT,
-	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-	.platform_ops_addr	= (unsigned long)&platform_ops
-};
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 32e53cf9c34..c19af269837 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -107,7 +107,6 @@ build_opensbi() {
 		BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
 		BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 		BUILD_PLATFORM_SUBDIR+=("thead/c910")
-		BUILD_PLATFORM_SUBDIR+=("spike")
 		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	*)

From d62603725824d5fc573d1f4aefedda25d8122206 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 1 May 2020 15:20:47 +0530
Subject: [PATCH 0570/1765] docs: Add missing links in platform.md

The links to some of the platforms were missing in platform.md
file hence this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 docs/platform/platform.md | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index c8f6adeb881..3e0dc39c263 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -22,16 +22,21 @@ OpenSBI currently supports the following virtual and hardware platforms:
   boards such as the Kendryte KD233 or the Sipeed MAIX Dock.
 
 * **Ariane FPGA SoC**: Platform support for the Ariane FPGA SoC used on
-  Genesys 2 board.
+  Genesys 2 board. More details on this platform can be found in the file
+  *[fpga-ariane.md]*.
 
-* **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350).
+* **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350). More
+  details on this platform can be found in the file *[andes-ae350.md]*.
 
-* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
+* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor. More
+  details on this platform can be found in the file *[thead-c910.md]*.
 
-* **Spike**: Platform support for the Spike emulator.
+* **Spike**: Platform support for the Spike emulator. More
+  details on this platform can be found in the file *[spike.md]*.
 
-* **OpenPiton FPGA SoC**: Platform support OpenPiton research platform based on
-ariane core.
+* **OpenPiton FPGA SoC**: Platform support OpenPiton research platform based
+  on ariane core. More details on this platform can be found in the file
+  *[fpga_openpiton.md]*.
 
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
@@ -43,7 +48,7 @@ facilitate the implementation.
 [qemu_virt.md]: qemu_virt.md
 [sifive_fu540.md]: sifive_fu540.md
 [fpga-ariane.md]: fpga-ariane.md
-[andes_ae350.md]: andes-ae350.md
+[andes-ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
 [spike.md]: spike.md
 [fpga_openpiton.md]: fpga_openpiton.md

From 7993ca2c8e092428eb59febea13a31659450850c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 6 May 2020 13:35:00 +0530
Subject: [PATCH 0571/1765] include: sbi: Remove redundant page table related
 defines

We don't have page table programming in OpenSBI so let's remove
redundant page table related defines from riscv_encoding.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 8c3e6f162cd..674e9b934c6 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -123,35 +123,15 @@
 #define PMP_SHIFT			2
 #define PMP_COUNT			16
 
-/* page table entry (PTE) fields */
-#define PTE_V				_UL(0x001) /* Valid */
-#define PTE_R				_UL(0x002) /* Read */
-#define PTE_W				_UL(0x004) /* Write */
-#define PTE_X				_UL(0x008) /* Execute */
-#define PTE_U				_UL(0x010) /* User */
-#define PTE_G				_UL(0x020) /* Global */
-#define PTE_A				_UL(0x040) /* Accessed */
-#define PTE_D				_UL(0x080) /* Dirty */
-#define PTE_SOFT			_UL(0x300) /* Reserved for Software */
-
-#define PTE_PPN_SHIFT			10
-
-#define PTE_TABLE(PTE)			\
-	(((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
-
 #if __riscv_xlen == 64
 #define MSTATUS_SD			MSTATUS64_SD
 #define SSTATUS_SD			SSTATUS64_SD
-#define RISCV_PGLEVEL_BITS		9
 #define SATP_MODE			SATP64_MODE
 #else
 #define MSTATUS_SD			MSTATUS32_SD
 #define SSTATUS_SD			SSTATUS32_SD
-#define RISCV_PGLEVEL_BITS		10
 #define SATP_MODE			SATP32_MODE
 #endif
-#define RISCV_PGSHIFT			12
-#define RISCV_PGSIZE			(1 << RISCV_PGSHIFT)
 
 #define CSR_USTATUS			0x0
 #define CSR_FFLAGS			0x1

From 5338679ff043d68f5c26265de144e5ec54109724 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 4 May 2020 10:58:07 +0530
Subject: [PATCH 0572/1765] lib: sbi_tlb: Fix remote TLB HFENCE VVMA
 implementation

The HFENCE VVMA instructions flushes TLB based on the VMID
present in HGATP CSR. To handle this, we get the current
VMID for SBI HFENCE VVMA call and we use this current VMID
to do remote TLB HFENCE VVMA on desired set of HARTs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 25 +++++++++++++++++++++++++
 include/sbi/sbi_tlb.h        | 14 ++++++++------
 lib/sbi/sbi_ecall_legacy.c   |  7 ++++---
 lib/sbi/sbi_ecall_replace.c  | 19 ++++++++++++-------
 lib/sbi/sbi_tlb.c            | 26 ++++++++++++++++++++------
 5 files changed, 69 insertions(+), 22 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 674e9b934c6..fd96b0fd910 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -111,6 +111,21 @@
 #define SATP_MODE_SV57			_UL(10)
 #define SATP_MODE_SV64			_UL(11)
 
+#define HGATP_MODE_OFF			_UL(0)
+#define HGATP_MODE_SV32X4		_UL(1)
+#define HGATP_MODE_SV39X4		_UL(8)
+#define HGATP_MODE_SV48X4		_UL(9)
+
+#define HGATP32_MODE_SHIFT		31
+#define HGATP32_VMID_SHIFT		22
+#define HGATP32_VMID_MASK		_UL(0x1FC00000)
+#define HGATP32_PPN			_UL(0x003FFFFF)
+
+#define HGATP64_MODE_SHIFT		60
+#define HGATP64_VMID_SHIFT		44
+#define HGATP64_VMID_MASK		_ULL(0x03FFF00000000000)
+#define HGATP64_PPN			_ULL(0x00000FFFFFFFFFFF)
+
 #define PMP_R				_UL(0x01)
 #define PMP_W				_UL(0x02)
 #define PMP_X				_UL(0x04)
@@ -127,10 +142,20 @@
 #define MSTATUS_SD			MSTATUS64_SD
 #define SSTATUS_SD			SSTATUS64_SD
 #define SATP_MODE			SATP64_MODE
+
+#define HGATP_PPN			HGATP64_PPN
+#define HGATP_VMID_SHIFT		HGATP64_VMID_SHIFT
+#define HGATP_VMID_MASK			HGATP64_VMID_MASK
+#define HGATP_MODE_SHIFT		HGATP64_MODE_SHIFT
 #else
 #define MSTATUS_SD			MSTATUS32_SD
 #define SSTATUS_SD			SSTATUS32_SD
 #define SATP_MODE			SATP32_MODE
+
+#define HGATP_PPN			HGATP32_PPN
+#define HGATP_VMID_SHIFT		HGATP32_VMID_SHIFT
+#define HGATP_VMID_MASK			HGATP32_VMID_MASK
+#define HGATP_MODE_SHIFT		HGATP32_MODE_SHIFT
 #endif
 
 #define CSR_USTATUS			0x0
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 6a07ee2c09f..6ee64a90eb7 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -38,17 +38,19 @@ struct sbi_tlb_info {
 	unsigned long start;
 	unsigned long size;
 	unsigned long asid;
+	unsigned long vmid;
 	unsigned long type;
 	struct sbi_hartmask smask;
 };
 
-#define SBI_TLB_INFO_INIT(__ptr, __start, __size, __asid, __type, __src_hart) \
+#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __type, __src) \
 do { \
-	(__ptr)->start = (__start); \
-	(__ptr)->size = (__size); \
-	(__ptr)->asid = (__asid); \
-	(__ptr)->type = (__type); \
-	SBI_HARTMASK_INIT_EXCEPT(&(__ptr)->smask, (__src_hart)); \
+	(__p)->start = (__start); \
+	(__p)->size = (__size); \
+	(__p)->asid = (__asid); \
+	(__p)->vmid = (__vmid); \
+	(__p)->type = (__type); \
+	SBI_HARTMASK_INIT_EXCEPT(&(__p)->smask, (__src)); \
 } while (0)
 
 #define SBI_TLB_INFO_SIZE		sizeof(struct sbi_tlb_info)
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 9f7a5b6d29a..3bfe7496341 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -76,7 +76,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
-			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
+			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 					  SBI_ITLB_FLUSH, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
@@ -85,7 +85,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
-			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0,
+			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0, 0,
 					  SBI_TLB_FLUSH_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
@@ -95,7 +95,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],
-					  SBI_TLB_FLUSH_VMA_ASID, source_hart);
+					  0, SBI_TLB_FLUSH_VMA_ASID,
+					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 88a6f08c072..e460c3050c8 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -46,6 +46,7 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
+	unsigned long vmid;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
 
@@ -56,37 +57,41 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 
 	switch (funcid) {
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
-		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0,
+		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 				  SBI_ITLB_FLUSH, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, 0,
 				  SBI_TLB_FLUSH_GVMA, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, args[4],
 				  SBI_TLB_FLUSH_GVMA_VMID, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
+		vmid = vmid >> HGATP_VMID_SHIFT;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, vmid,
 				  SBI_TLB_FLUSH_VVMA, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
+		vmid = vmid >> HGATP_VMID_SHIFT;
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4], vmid,
 				  SBI_TLB_FLUSH_VVMA_ASID, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0,
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, 0,
 				  SBI_TLB_FLUSH_VMA, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4],
+		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4], 0,
 				  SBI_TLB_FLUSH_VMA_ASID, source_hart);
 		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
 		break;
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index d857162fe35..c6ca7b195ee 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -36,16 +36,23 @@ static void sbi_tlb_hfence_vvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
-	unsigned long i;
+	unsigned long vmid  = tinfo->vmid;
+	unsigned long i, hgatp;
+
+	hgatp = csr_swap(CSR_HGATP,
+			 (vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
 
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		__sbi_hfence_vvma_all();
-		return;
+		goto done;
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
 		__sbi_hfence_vvma_va(start+i);
 	}
+
+done:
+	csr_write(CSR_HGATP, hgatp);
 }
 
 static void sbi_tlb_hfence_gvma(struct sbi_tlb_info *tinfo)
@@ -88,28 +95,35 @@ static void sbi_tlb_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
 	unsigned long asid  = tinfo->asid;
-	unsigned long i;
+	unsigned long vmid  = tinfo->vmid;
+	unsigned long i, hgatp;
+
+	hgatp = csr_swap(CSR_HGATP,
+			 (vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
 
 	if (start == 0 && size == 0) {
 		__sbi_hfence_vvma_all();
-		return;
+		goto done;
 	}
 
 	if (size == SBI_TLB_FLUSH_ALL) {
 		__sbi_hfence_vvma_asid(asid);
-		return;
+		goto done;
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
 		__sbi_hfence_vvma_asid_va(asid, start + i);
 	}
+
+done:
+	csr_write(CSR_HGATP, hgatp);
 }
 
 static void sbi_tlb_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
-	unsigned long vmid  = tinfo->asid;
+	unsigned long vmid  = tinfo->vmid;
 	unsigned long i;
 
 	if (start == 0 && size == 0) {

From dc38929dfb441cbecb4e31a299b463bac11d02cf Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 5 May 2020 11:46:25 +0530
Subject: [PATCH 0573/1765] lib: sbi: Improve misa_string() implementation

The RISC-V ISA string does not follow alphabetical order. Instead,
we have a RISC-V specific ordering of extensions in the RISC-V ISA
string. This patch improves misa_string() implementation to return
a valid RISC-V ISA string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h | 15 ++-----------
 lib/sbi/riscv_asm.c     | 48 +++++++++++++++++++++++++++++++++++++++--
 lib/sbi/sbi_init.c      |  8 +++----
 3 files changed, 52 insertions(+), 19 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 6c5c72990ef..6e093ca396c 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -173,19 +173,8 @@ int misa_extension_imp(char ext);
 /* Get MXL field of misa, return -1 on error */
 int misa_xlen(void);
 
-static inline void misa_string(char *out, unsigned int out_sz)
-{
-	unsigned long i;
-
-	for (i = 0; i < 26; i++) {
-		if (misa_extension_imp('A' + i)) {
-			*out = 'A' + i;
-			out++;
-		}
-	}
-	*out = '\0';
-	out++;
-}
+/* Get RISC-V ISA string representation */
+void misa_string(int xlen, char *out, unsigned int out_sz);
 
 int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len);
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 24f87710e74..3c3a5ad03f8 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -17,8 +17,13 @@ int misa_extension_imp(char ext)
 {
 	unsigned long misa = csr_read(CSR_MISA);
 
-	if (misa)
-		return misa & (1 << (ext - 'A'));
+	if (misa) {
+		if ('A' <= ext && ext <= 'Z')
+			return misa & (1 << (ext - 'A'));
+		if ('a' <= ext && ext <= 'z')
+			return misa & (1 << (ext - 'a'));
+		return 0;
+	}
 
 	return sbi_platform_misa_extension(sbi_platform_thishart_ptr(), ext);
 }
@@ -44,6 +49,45 @@ int misa_xlen(void)
 	return r ? r : -1;
 }
 
+void misa_string(int xlen, char *out, unsigned int out_sz)
+{
+	unsigned int i, pos = 0;
+	const char valid_isa_order[] = "iemafdqclbjtpvnsuhkorwxyzg";
+
+	if (!out)
+		return;
+
+	if (5 <= (out_sz - pos)) {
+		out[pos++] = 'r';
+		out[pos++] = 'v';
+		switch (xlen) {
+		case 1:
+			out[pos++] = '3';
+			out[pos++] = '2';
+			break;
+		case 2:
+			out[pos++] = '6';
+			out[pos++] = '4';
+			break;
+		case 3:
+			out[pos++] = '1';
+			out[pos++] = '2';
+			out[pos++] = '8';
+			break;
+		default:
+			return;
+		}
+	}
+
+	for (i = 0; i < array_size(valid_isa_order) && (pos < out_sz); i++) {
+		if (misa_extension_imp(valid_isa_order[i]))
+			out[pos++] = valid_isa_order[i];
+	}
+
+	if (pos < out_sz)
+		out[pos++] = '\0';
+}
+
 unsigned long csr_read_num(int csr_num)
 {
 	unsigned long ret = 0;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 629eb838521..bf4b4532836 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -53,15 +53,15 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 		sbi_printf("Error %d getting MISA XLEN\n", xlen);
 		sbi_hart_hang();
 	}
-	xlen = 16 * (1 << xlen);
-	misa_string(str, sizeof(str));
+	misa_string(xlen, str, sizeof(str));
 
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
-	sbi_printf("Platform HART Features : RV%d%s\n", xlen, str);
 	sbi_printf("Platform HART Count    : %u\n",
 		   sbi_platform_hart_count(plat));
-	sbi_printf("Current HART ID        : %u\n", hartid);
+	/* Boot HART details */
+	sbi_printf("Boot HART ID           : %u\n", hartid);
+	sbi_printf("Boot HART ISA          : %s\n", str);
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size          : %d KB\n",

From 433bac7242d3d15be64753dde940f042a5d85e71 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 5 May 2020 09:53:40 +0530
Subject: [PATCH 0574/1765] docs: platform/generic: Add details about
 stdout-path DT property

The generic platform will try to select serial console based on the
stdout-path DT property in /chosen DT node hence we document this.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/generic.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index e2d1b63039f..dc3b269861d 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -23,6 +23,8 @@ Users of the generic FDT platform will have to ensure that:
    based on their platform requirements
 2. The FDT passed by previous booting stage has DT compatible strings and
    DT properties in sync with the FDT based drivers under lib/utils directory
+3. The FDT must have "stdout-path" DT property in the "/chosen" DT node when
+   a platform has multiple serial ports or consoles
 
 To build the platform-specific library and firmware images, provide the
 *PLATFORM=generic* parameter to the top level `make` command.

From b4efa70d12cd0ef0c479c8dc455d1932e96c0c8b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 6 May 2020 10:12:11 +0530
Subject: [PATCH 0575/1765] docs: platform/generic: Add details about IPI and
 timer expectations

The generic platform provides IPI and timer functionality based on
DT node provided in the FDT passed by previous booting stage. This
patch updates generic platform documentation about IPI and timer
expectations.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/generic.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index dc3b269861d..60916c7b53d 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -25,6 +25,10 @@ Users of the generic FDT platform will have to ensure that:
    DT properties in sync with the FDT based drivers under lib/utils directory
 3. The FDT must have "stdout-path" DT property in the "/chosen" DT node when
    a platform has multiple serial ports or consoles
+4. On multi-HART platform, the FDT must have a DT node for IPI device and
+   lib/utils/ipi directory must have corresponding FDT based IPI driver
+5. The FDT must have a DT node for timer device and lib/utils/timer directory
+   must have corresponding FDT based timer driver
 
 To build the platform-specific library and firmware images, provide the
 *PLATFORM=generic* parameter to the top level `make` command.

From dfd9dd67dcac5d0cb639988e4420ab82516ba8be Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 5 May 2020 09:46:46 +0530
Subject: [PATCH 0576/1765] docs: Add platform requirements document

We add platform requirements document to clarify OpenSBI
expectations from a RISC-V platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
 README.md                     |  2 ++
 docs/doxygen.cfg              |  1 +
 docs/platform_requirements.md | 44 +++++++++++++++++++++++++++++++++++
 3 files changed, 47 insertions(+)
 create mode 100644 docs/platform_requirements.md

diff --git a/README.md b/README.md
index 23950126195..88367b780d9 100644
--- a/README.md
+++ b/README.md
@@ -218,6 +218,7 @@ Detailed documentation of various aspects of OpenSBI can be found under the
 
 * [Contribution Guideline]: Guideline for contributing code to OpenSBI project
 * [Library Usage]: API documentation of OpenSBI static library *libsbi.a*
+* [Platform Requirements]: Requirements for using OpenSBI on a platform
 * [Platform Support Guide]: Guideline for implementing support for new platforms
 * [Platform Documentation]: Documentation of the platforms currently supported.
 * [Firmware Documentation]: Documentation for the different types of firmware
@@ -270,6 +271,7 @@ make I=<install_directory> install_docs
 [Contribution Guideline]: docs/contributing.md
 [Contributors List]: CONTRIBUTORS.md
 [Library Usage]: docs/library_usage.md
+[Platform Requirements]: docs/platform_requirements.md
 [Platform Support Guide]: docs/platform_guide.md
 [Platform Documentation]: docs/platform/platform.md
 [Firmware Documentation]: docs/firmware/fw.md
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 8ab53ed3530..52346be71de 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -793,6 +793,7 @@ WARN_LOGFILE           =
 INPUT                  = @@SRC_DIR@@/README.md \
                          @@SRC_DIR@@/docs/contributing.md \
                          @@SRC_DIR@@/docs/platform_guide.md \
+                         @@SRC_DIR@@/docs/platform_requirements.md \
                          @@SRC_DIR@@/docs/library_usage.md \
                          @@SRC_DIR@@/docs/firmware \
                          @@SRC_DIR@@/docs/platform \
diff --git a/docs/platform_requirements.md b/docs/platform_requirements.md
new file mode 100644
index 00000000000..68dc3935a96
--- /dev/null
+++ b/docs/platform_requirements.md
@@ -0,0 +1,44 @@
+OpenSBI Platform Requirements
+=============================
+
+The RISC-V platform requirements for OpenSBI can change over time
+with advances in RISC-V specifications and ecosystem.
+
+To handle this, we have two types of RISC-V platform requirements:
+
+1. **Base platform requirements** which apply to all OpenSBI releases
+2. **Release specific platform requirements** which apply to a OpenSBI
+   release and later releases
+
+Currently, we don't have any **Release specific platform requirements**
+but such platform requirements will be added in future.
+
+Base Platform Requirements
+--------------------------
+
+The base RISC-V platform requirements for OpenSBI are as follows:
+
+1. At least rv32ima or rv64ima required on all HARTs
+2. At least one HART should have S-mode support because:
+
+     * SBI calls are meant for RISC-V S-mode (Supervisor mode)
+     * OpenSBI implements SBI calls for S-mode software
+
+3. The MTVEC CSR on all HARTs must support direct mode
+4. The PMP CSRs are optional. If PMP CSRs are not implemented then
+   OpenSBI cannot protect M-mode firmware and secured memory regions
+5. The TIME CSR is optional. If TIME CSR is not implemented in
+   hardware then a 64-bit MMIO counter is required to track time
+   and emulate TIME CSR
+6. Hardware support for injecting M-mode software interrupts on
+   a multi-HART platform
+
+The RISC-V extensions not covered by rv32ima or rv64ima are optional
+for OpenSBI. Although, OpenSBI will detect and handle some of these
+optional RISC-V extensions at runtime.
+
+The optional RISC-V extensions handled by OpenSBI at runtime are:
+
+* D-extension: Double precision floating point
+* F-extension: Single precision floating point
+* H-extension: Hypervisor

From c2286b6f042d80ccd6b047421570d59967568d3f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 6 May 2020 12:16:48 +0530
Subject: [PATCH 0577/1765] docs: Fix ordering of pages in table of contents

Currently, all markdown pages are randomly arranged in table of
contents so to fix this we treat top-level README.md as mainpage
and enable Doxygen TREEVIEW.

Also, there should not be any text before title of a markdown
page so we move project copyright as separate section in top-level
README.md.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 README.md        | 69 +++++++++++++++++++++++++-----------------------
 docs/doxygen.cfg |  2 +-
 2 files changed, 37 insertions(+), 34 deletions(-)

diff --git a/README.md b/README.md
index 88367b780d9..3fcd9d7a497 100644
--- a/README.md
+++ b/README.md
@@ -1,9 +1,41 @@
-Copyright (c) 2019 Western Digital Corporation or its affiliates
-and other contributors.
-
-RISC-V Open Source Supervisor Binary Interface (OpenSBI)
+RISC-V Open Source Supervisor Binary Interface (OpenSBI) {#mainpage}
 ========================================================
 
+Copyright and License
+---------------------
+
+The OpenSBI project is copyright (c) 2019 Western Digital Corporation
+or its affiliates and other contributors.
+
+It is distributed under the terms of the BSD 2-clause license
+("Simplified BSD License" or "FreeBSD License", SPDX: *BSD-2-Clause*).
+A copy of this license with OpenSBI copyright can be found in the file
+[COPYING.BSD].
+
+All source files in OpenSBI contain the 2-Clause BSD license SPDX short
+identifier in place of the full license text.
+
+```
+SPDX-License-Identifier:    BSD-2-Clause
+```
+
+This enables machine processing of license information based on the SPDX
+License Identifiers that are available on the [SPDX] web site.
+
+OpenSBI source code also contains code reused from other projects as listed
+below. The original license text of these projects is included in the source
+files where the reused code is present.
+
+* The libfdt source code is disjunctively dual licensed
+  (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
+  under the terms of the BSD 2-Clause license. Any contributions to this
+  code must be made under the terms of both licenses.
+
+See also the [third party notices] file for more information.
+
+Introduction
+------------
+
 The **RISC-V Supervisor Binary Interface (SBI)** is the recommended interface
 between:
 
@@ -171,35 +203,6 @@ export PLATFORM_RISCV_XLEN=32
 
 will generate 32-bit OpenSBI images. And vice vesa.
 
-License
--------
-
-OpenSBI is distributed under the terms of the BSD 2-clause license
-("Simplified BSD License" or "FreeBSD License", SPDX: *BSD-2-Clause*).
-A copy of this license with OpenSBI copyright can be found in the file
-[COPYING.BSD].
-
-All source files in OpenSBI contain the 2-Clause BSD license SPDX short
-identifier in place of the full license text.
-
-```
-SPDX-License-Identifier:    BSD-2-Clause
-```
-
-This enables machine processing of license information based on the SPDX
-License Identifiers that are available on the [SPDX] web site.
-
-OpenSBI source code also contains code reused from other projects as listed
-below. The original license text of these projects is included in the source
-files where the reused code is present.
-
-* The libfdt source code is disjunctively dual licensed
-  (GPL-2.0+ OR BSD-2-Clause). Some of this project code is used in OpenSBI
-  under the terms of the BSD 2-Clause license. Any contributions to this
-  code must be made under the terms of both licenses.
-
-See also the [third party notices] file for more information.
-
 Contributing to OpenSBI
 -----------------------
 
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 52346be71de..f32ada1c959 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -1445,7 +1445,7 @@ DISABLE_INDEX          = NO
 # The default value is: NO.
 # This tag requires that the tag GENERATE_HTML is set to YES.
 
-GENERATE_TREEVIEW      = NO
+GENERATE_TREEVIEW      = YES
 
 # The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
 # doxygen will group on one line in the generated HTML documentation.

From 7be75f519f7705367030258c4410d9ff9ea24a6f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 6 May 2020 12:27:38 +0530
Subject: [PATCH 0578/1765] docs: Don't use italic text in page title

Doxygen does not support italic text in page title so fix
some of the markdown files accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/firmware/fw_dynamic.md | 2 +-
 docs/firmware/fw_jump.md    | 2 +-
 docs/firmware/fw_payload.md | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/firmware/fw_dynamic.md b/docs/firmware/fw_dynamic.md
index 041b6cc3be9..01f43f9f423 100644
--- a/docs/firmware/fw_dynamic.md
+++ b/docs/firmware/fw_dynamic.md
@@ -1,4 +1,4 @@
-OpenSBI Firmware with Dynamic Information *FW_DYNAMIC*
+OpenSBI Firmware with Dynamic Information (FW_DYNAMIC)
 ======================================================
 
 OpenSBI **firmware with dynamic info (FW_DYNAMIC)** is a firmware which gets
diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 4faaf50a1bc..eea30138781 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -1,4 +1,4 @@
-OpenSBI Firmware with Jump Address *FW_JUMP*
+OpenSBI Firmware with Jump Address (FW_JUMP)
 ============================================
 
 OpenSBI **firmware with Jump Address (FW_JUMP)** is a firmware which only
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 3fb3ffc29ab..d950eb61013 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -1,4 +1,4 @@
-OpenSBI Firmware with Payload *FW_PAYLOAD*
+OpenSBI Firmware with Payload (FW_PAYLOAD)
 ==========================================
 
 OpenSBI **firmware with Payload (FW_PAYLOAD)** is a firmware which directly

From 63a513edeccee1758bbfe5111ccc4fbec8f18a12 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:23 -0700
Subject: [PATCH 0579/1765] lib: Rename unprivileged trap handler

Unprivileged trap handler can be reused for any cases where the executing
code expects a trap.

Rename it to "expected" trap handler as it will be used in other cases in
future.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h                             |  6 +++---
 lib/sbi/objects.mk                                 |  2 +-
 lib/sbi/{sbi_unpriv_trap.S => sbi_expected_trap.S} | 12 ++++++------
 lib/sbi/sbi_hart.c                                 |  8 ++++----
 lib/sbi/sbi_unpriv.c                               |  6 +++---
 5 files changed, 17 insertions(+), 17 deletions(-)
 rename lib/sbi/{sbi_unpriv_trap.S => sbi_expected_trap.S} (84%)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 4b83b84b622..6a2ba4ea6d8 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -16,10 +16,10 @@ struct sbi_scratch;
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 
-extern void (*sbi_hart_unpriv_trap)(void);
-static inline ulong sbi_hart_unpriv_trap_addr(void)
+extern void (*sbi_hart_expected_trap)(void);
+static inline ulong sbi_hart_expected_trap_addr(void)
 {
-	return (ulong)sbi_hart_unpriv_trap;
+	return (ulong)sbi_hart_expected_trap;
 }
 
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 7e700fa9939..190ee127880 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -37,4 +37,4 @@ libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_unpriv.o
-libsbi-objs-y += sbi_unpriv_trap.o
+libsbi-objs-y += sbi_expected_trap.o
diff --git a/lib/sbi/sbi_unpriv_trap.S b/lib/sbi/sbi_expected_trap.S
similarity index 84%
rename from lib/sbi/sbi_unpriv_trap.S
rename to lib/sbi/sbi_expected_trap.S
index 180c376da56..24891c74cd7 100644
--- a/lib/sbi/sbi_unpriv_trap.S
+++ b/lib/sbi/sbi_expected_trap.S
@@ -11,8 +11,8 @@
 #include <sbi/sbi_trap.h>
 
 	/*
-	 * We assume that faulting unpriv load/store instruction is
-	 * is 4-byte long and blindly increment SEPC by 4.
+	 * We assume that faulting instruction is is 4-byte long and blindly
+	 * increment SEPC by 4.
 	 *
 	 * The trap info will be saved as follows:
 	 * A3 <- pointer struct sbi_trap_info
@@ -20,8 +20,8 @@
 	 */
 
 	.align 3
-	.global __sbi_unpriv_trap
-__sbi_unpriv_trap:
+	.global __sbi_expected_trap
+__sbi_expected_trap:
 	/* Without H-extension so, MTVAL2 and MTINST CSRs not available */
 	csrr	a4, CSR_MEPC
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
@@ -37,8 +37,8 @@ __sbi_unpriv_trap:
 	mret
 
 	.align 3
-	.global __sbi_unpriv_trap_hext
-__sbi_unpriv_trap_hext:
+	.global __sbi_expected_trap_hext
+__sbi_expected_trap_hext:
 	/* With H-extension so, MTVAL2 and MTINST CSRs available */
 	csrr	a4, CSR_MEPC
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 24c3637845f..00e593f091f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -17,10 +17,10 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 
-extern void __sbi_unpriv_trap(void);
-extern void __sbi_unpriv_trap_hext(void);
+extern void __sbi_expected_trap(void);
+extern void __sbi_expected_trap_hext(void);
 
-void (*sbi_hart_unpriv_trap)(void) = &__sbi_unpriv_trap;
+void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
@@ -227,7 +227,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 	if (cold_boot) {
 		if (misa_extension('H'))
-			sbi_hart_unpriv_trap = &__sbi_unpriv_trap_hext;
+			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
 	}
 
 	mstatus_init(scratch, hartid);
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index ea050c9ed99..fad720e3800 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -21,7 +21,7 @@
 		register ulong tinfo asm("a3");                               \
 		register ulong ttmp asm("a4");                                \
 		register ulong mstatus asm("a5");                             \
-		register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr(); \
+		register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr(); \
 		type ret = 0;                                                 \
 		trap->cause = 0;                                              \
 		asm volatile(                                                 \
@@ -51,7 +51,7 @@
 		register ulong tinfo asm("a3");                               \
 		register ulong ttmp asm("a4");                                \
 		register ulong mstatus asm("a5");                             \
-		register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr(); \
+		register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr(); \
 		trap->cause = 0;                                              \
 		asm volatile(                                                 \
 			"add %[tinfo], %[taddr], zero\n"                      \
@@ -120,7 +120,7 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
 	register ulong tinfo asm("a3");
 	register ulong ttmp asm("a4");
 	register ulong mstatus asm("a5");
-	register ulong mtvec asm("a6") = sbi_hart_unpriv_trap_addr();
+	register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr();
 	ulong insn = 0;
 
 	trap->cause = 0;

From aef9a60d521a7810557d1caf826311bc349691ac Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:24 -0700
Subject: [PATCH 0580/1765] lib: Add csr detect support

As RISC-V ISA allows many CSRs such as pmp, s/mcounteren to be optional
in hardware, OpenSBI should provide an option to dynamically detect
these csr access capability at run time.

Implement a csr read/write access check helper macros.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_csr_detect.h | 50 ++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 include/sbi/sbi_csr_detect.h

diff --git a/include/sbi/sbi_csr_detect.h b/include/sbi/sbi_csr_detect.h
new file mode 100644
index 00000000000..f29488845af
--- /dev/null
+++ b/include/sbi/sbi_csr_detect.h
@@ -0,0 +1,50 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __SBI_CSR_DETECT__H
+#define __SBI_CSR_DETECT__H
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_hart.h>
+
+#define csr_read_allowed(csr_num, trap)					\
+	({								\
+	register ulong tinfo asm("a3") = (ulong)trap;			\
+	register ulong ttmp asm("a4");					\
+	register ulong mtvec = sbi_hart_expected_trap_addr();		\
+	register ulong ret = 0;						\
+	asm volatile(							\
+		"add %[ttmp], %[tinfo], zero\n"				\
+		"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"	\
+		"csrr %[ret], %[csr]\n"					\
+		"csrw " STR(CSR_MTVEC) ", %[mtvec]"			\
+	    : [mtvec] "+&r"(mtvec), [tinfo] "+&r"(tinfo),		\
+	      [ttmp] "+&r"(ttmp), [ret] "=&r" (ret)			\
+	    : [csr] "i" (csr_num)					\
+	    : "memory");						\
+	ret;								\
+	})								\
+
+#define csr_write_allowed(csr_num, trap, value)				\
+	({								\
+	register ulong tinfo asm("a3") = (ulong)trap;			\
+	register ulong ttmp asm("a4");					\
+	register ulong mtvec = sbi_hart_expected_trap_addr();		\
+	asm volatile(							\
+		"add %[ttmp], %[tinfo], zero\n"				\
+		"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"	\
+		"csrw %[csr], %[val]\n"					\
+		"csrw " STR(CSR_MTVEC) ", %[mtvec]"			\
+	    : [mtvec] "+&r"(mtvec),					\
+	      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp)			\
+	    : [csr] "i" (csr_num), [val] "r" (value)			\
+	    : "memory");						\
+	})								\
+
+#endif

From 13ca20d8df3b402d12e5701c651a53409db167d8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:25 -0700
Subject: [PATCH 0581/1765] lib: Create a separate math helper function file

There may be few common mathematics helper functions which can be used
anywhere in OpenSBI project.

Add a separate math helper function file to add these functions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_math.h | 15 +++++++++++++++
 lib/sbi/objects.mk     |  1 +
 lib/sbi/sbi_hart.c     | 14 +-------------
 lib/sbi/sbi_math.c     | 23 +++++++++++++++++++++++
 4 files changed, 40 insertions(+), 13 deletions(-)
 create mode 100644 include/sbi/sbi_math.h
 create mode 100644 lib/sbi/sbi_math.c

diff --git a/include/sbi/sbi_math.h b/include/sbi/sbi_math.h
new file mode 100644
index 00000000000..564fd585c6a
--- /dev/null
+++ b/include/sbi/sbi_math.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __SBI_MATH_H__
+#define __SBI_MATH_H__
+
+unsigned long log2roundup(unsigned long x);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 190ee127880..31aaad5ed2d 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -24,6 +24,7 @@ libsbi-objs-y += sbi_ecall_vendor.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hart.o
+libsbi-objs-y += sbi_math.o
 libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hsm.o
 libsbi-objs-y += sbi_illegal_insn.o
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 00e593f091f..b789900be2d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
 
 extern void __sbi_expected_trap(void);
@@ -121,19 +122,6 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
 #endif
 }
 
-unsigned long log2roundup(unsigned long x)
-{
-	unsigned long ret = 0;
-
-	while (ret < __riscv_xlen) {
-		if (x <= (1UL << ret))
-			break;
-		ret++;
-	}
-
-	return ret;
-}
-
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
diff --git a/lib/sbi/sbi_math.c b/lib/sbi/sbi_math.c
new file mode 100644
index 00000000000..8ba0831d84c
--- /dev/null
+++ b/lib/sbi/sbi_math.c
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Common helper functions used across OpenSBI project.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+unsigned long log2roundup(unsigned long x)
+{
+	unsigned long ret = 0;
+
+	while (ret < __riscv_xlen) {
+		if (x <= (1UL << ret))
+			break;
+		ret++;
+	}
+
+	return ret;
+}

From 79d0fadb0681acbba55bb6b4afcd3c2e6f725928 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:26 -0700
Subject: [PATCH 0582/1765] lib: utils: Update reserved memory fdt node even if
 PMP is not present

As per RISC-V ISA, pmp is not mandatory. Currently, we only add reserved
memory node in DT only if PMP is present. That allows supervisor to access
the memory where OpenSBI continue to exist without realizing it for non-pmp
based platforms. It may result in corrupting OpenSBI. That's why OpenSBI
should at least let the supervisor know where it continue to exist.
This a best effort service provided by OpenSBI expecting that supervisor
software is not buggy and properly sets up its memory after parsing the
reserved-memory device tree node.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 123 ++++++++++++++++++++++----------------
 1 file changed, 71 insertions(+), 52 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 9a9b43549b8..e209cb661b4 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -10,6 +10,7 @@
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
@@ -67,6 +68,63 @@ void fdt_plic_fixup(void *fdt, const char *compat)
 	}
 }
 
+static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
+				       unsigned long size, int index,
+				       int parent)
+{
+	int na = fdt_address_cells(fdt, 0);
+	int ns = fdt_size_cells(fdt, 0);
+	fdt32_t addr_high, addr_low;
+	fdt32_t size_high, size_low;
+	int subnode, err;
+	fdt32_t reg[4];
+	fdt32_t *val;
+	char name[32];
+
+	addr_high = (u64)addr >> 32;
+	addr_low = addr;
+	size_high = (u64)size >> 32;
+	size_low = size;
+
+	if (na > 1 && addr_high)
+		sbi_snprintf(name, sizeof(name),
+			     "mmode_pmp%d@%x,%x", index,
+			     addr_high, addr_low);
+	else
+		sbi_snprintf(name, sizeof(name),
+			     "mmode_pmp%d@%x", index,
+			     addr_low);
+
+	subnode = fdt_add_subnode(fdt, parent, name);
+	if (subnode < 0)
+		return subnode;
+
+	/*
+	 * Tell operating system not to create a virtual
+	 * mapping of the region as part of its standard
+	 * mapping of system memory.
+	 */
+	err = fdt_setprop_empty(fdt, subnode, "no-map");
+	if (err < 0)
+		return err;
+
+	/* encode the <reg> property value */
+	val = reg;
+	if (na > 1)
+		*val++ = cpu_to_fdt32(addr_high);
+	*val++ = cpu_to_fdt32(addr_low);
+	if (ns > 1)
+		*val++ = cpu_to_fdt32(size_high);
+	*val++ = cpu_to_fdt32(size_low);
+
+	err = fdt_setprop(fdt, subnode, "reg", reg,
+			  (na + ns) * sizeof(fdt32_t));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
 /**
  * We use PMP to protect OpenSBI firmware to safe-guard it from buggy S-mode
  * software, see pmp_init() in lib/sbi/sbi_hart.c. The protected memory region
@@ -87,19 +145,10 @@ int fdt_reserved_memory_fixup(void *fdt)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long prot, addr, size;
+	int parent, i, j;
+	int err;
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
-	fdt32_t addr_high, addr_low;
-	fdt32_t size_high, size_low;
-	fdt32_t reg[4];
-	fdt32_t *val;
-	char name[32];
-	int parent, subnode;
-	int i, j;
-	int err;
-
-	if (!sbi_platform_has_pmp(plat))
-		return 0;
 
 	/* expand the device tree to accommodate new node */
 	err  = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 256);
@@ -134,6 +183,15 @@ int fdt_reserved_memory_fixup(void *fdt)
 			return err;
 	}
 
+	if (!sbi_platform_has_pmp(plat)) {
+		/* update the DT with firmware start & size even if PMP is not
+		 * supported. This makes sure that supervisor OS is always
+		 * aware of wheren OpenSBI resident memory area.
+		 */
+		addr = scratch->fw_start & ~(scratch->fw_size - 1UL);
+		size = (1UL << log2roundup(scratch->fw_size));
+		return fdt_resv_memory_update_node(fdt, addr, size, 0, parent);
+	}
 	/*
 	 * We assume the given device tree does not contain any memory region
 	 * child node protected by PMP. Normally PMP programming happens at
@@ -148,47 +206,8 @@ int fdt_reserved_memory_fixup(void *fdt)
 		if (!(prot & PMP_A))
 			continue;
 		if (!(prot & (PMP_R | PMP_W | PMP_X))) {
-			addr_high = (u64)addr >> 32;
-			addr_low = addr;
-			size_high = (u64)size >> 32;
-			size_low = size;
-
-			if (na > 1 && addr_high)
-				sbi_snprintf(name, sizeof(name),
-					     "mmode_pmp%d@%x,%x", j,
-					     addr_high, addr_low);
-			else
-				sbi_snprintf(name, sizeof(name),
-					     "mmode_pmp%d@%x", j,
-					     addr_low);
-
-			subnode = fdt_add_subnode(fdt, parent, name);
-			if (subnode < 0)
-				return subnode;
-
-			/*
-			 * Tell operating system not to create a virtual
-			 * mapping of the region as part of its standard
-			 * mapping of system memory.
-			 */
-			err = fdt_setprop_empty(fdt, subnode, "no-map");
-			if (err < 0)
-				return err;
-
-			/* encode the <reg> property value */
-			val = reg;
-			if (na > 1)
-				*val++ = cpu_to_fdt32(addr_high);
-			*val++ = cpu_to_fdt32(addr_low);
-			if (ns > 1)
-				*val++ = cpu_to_fdt32(size_high);
-			*val++ = cpu_to_fdt32(size_low);
-
-			err = fdt_setprop(fdt, subnode, "reg", reg,
-					  (na + ns) * sizeof(fdt32_t));
-			if (err < 0)
-				return err;
-
+			return fdt_resv_memory_update_node(fdt, addr, size,
+							   j, parent);
 			j++;
 		}
 	}

From 6a053f6e6cb4db8a291239e882e9a778c2738e0a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:27 -0700
Subject: [PATCH 0583/1765] lib: Add support for hart specific features

There may be some features which are hart specific rather than a platform
specific feature. Add a framework to support that.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h |  1 +
 lib/sbi/sbi_hart.c     | 23 +++++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 6a2ba4ea6d8..e285bdf9947 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,6 +26,7 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
+bool sbi_hart_has_feature(u32 hartid, unsigned long feature);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b789900be2d..cf3e9fbc729 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -22,6 +22,7 @@ extern void __sbi_expected_trap(void);
 extern void __sbi_expected_trap_hext(void);
 
 void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
+static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
@@ -209,14 +210,36 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	return 0;
 }
 
+bool sbi_hart_has_feature(u32 hartid, unsigned long feature)
+{
+	unsigned long *hart_features;
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	if (*hart_features & feature)
+		return true;
+	else
+		return false;
+}
+
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	int rc;
+	unsigned long *hart_features;
 
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
+		hart_features_offset = sbi_scratch_alloc_offset(
+							sizeof(hart_features),
+							"HART_FEATURES");
+		if (!hart_features_offset)
+			return SBI_ENOMEM;
 	}
+	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	*hart_features = 0;
 
 	mstatus_init(scratch, hartid);
 

From b2df751acfd2858f2370d896f91543593647b243 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:28 -0700
Subject: [PATCH 0584/1765] platform: Move platform features to hart

PMP & performance counters belong to a hart rather than a platform.
In addition to that, these features enable reading/writing from a
particular csr. Thus, they can be detected and set at runtime rather
than compile time.

Move PMP/MCOUNTEREN/SCOUNTEREN features to hart and detect them at runtime.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h             | 11 +++++
 include/sbi/sbi_platform.h         | 22 ++--------
 lib/sbi/sbi_hart.c                 | 68 ++++++++++++++++++++++++++----
 lib/utils/fdt/fdt_fixup.c          |  4 +-
 platform/fpga/ariane/platform.c    |  2 -
 platform/fpga/openpiton/platform.c |  2 -
 platform/thead/c910/platform.h     |  4 +-
 7 files changed, 77 insertions(+), 36 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index e285bdf9947..f7870d97711 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -12,6 +12,16 @@
 
 #include <sbi/sbi_types.h>
 
+/** Possible feature flags of a hart */
+enum sbi_hart_features {
+	/** Hart has PMP support */
+	SBI_HART_HAS_PMP = (1 << 0),
+	/** Hart has S-mode counter enable */
+	SBI_HART_HAS_SCOUNTEREN = (1 << 1),
+	/** Hart has M-mode counter enable */
+	SBI_HART_HAS_MCOUNTEREN = (1 << 2),
+};
+
 struct sbi_scratch;
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
@@ -27,6 +37,7 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
 bool sbi_hart_has_feature(u32 hartid, unsigned long feature);
+unsigned long sbi_hart_get_features(u32 hartid);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 9eaf82e59c2..675d021b078 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -52,23 +52,15 @@ enum sbi_platform_features {
 	SBI_PLATFORM_HAS_TIMER_VALUE = (1 << 0),
 	/** Platform has HART hotplug support */
 	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1),
-	/** Platform has PMP support */
-	SBI_PLATFORM_HAS_PMP = (1 << 2),
-	/** Platform has S-mode counter enable */
-	SBI_PLATFORM_HAS_SCOUNTEREN = (1 << 3),
-	/** Platform has M-mode counter enable */
-	SBI_PLATFORM_HAS_MCOUNTEREN = (1 << 4),
 	/** Platform has fault delegation support */
-	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 5),
+	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 2),
 	/** Platform has custom secondary hart booting support */
-	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 6),
+	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 3),
 };
 
 /** Default feature set for a platform */
 #define SBI_PLATFORM_DEFAULT_FEATURES                                \
-	(SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_PMP |       \
-	 SBI_PLATFORM_HAS_SCOUNTEREN | SBI_PLATFORM_HAS_MCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+	(SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 /** Platform functions */
 struct sbi_platform_operations {
@@ -224,14 +216,6 @@ struct sbi_platform {
 /** Check whether the platform supports HART hotplug */
 #define sbi_platform_has_hart_hotplug(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
-/** Check whether the platform has PMP support */
-#define sbi_platform_has_pmp(__p) ((__p)->features & SBI_PLATFORM_HAS_PMP)
-/** Check whether the platform supports scounteren CSR */
-#define sbi_platform_has_scounteren(__p) \
-	((__p)->features & SBI_PLATFORM_HAS_SCOUNTEREN)
-/** Check whether the platform supports mcounteren CSR */
-#define sbi_platform_has_mcounteren(__p) \
-	((__p)->features & SBI_PLATFORM_HAS_MCOUNTEREN)
 /** Check whether the platform supports fault delegation */
 #define sbi_platform_has_mfaults_delegation(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index cf3e9fbc729..10972c800eb 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -13,6 +13,7 @@
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_csr_detect.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_math.h>
@@ -26,7 +27,6 @@ static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long mstatus_val = 0;
 
 	/* Enable FPU */
@@ -40,9 +40,10 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 	csr_write(CSR_MSTATUS, mstatus_val);
 
 	/* Enable user/supervisor use of perf counters */
-	if (misa_extension('S') && sbi_platform_has_scounteren(plat))
+	if (misa_extension('S') &&
+	    sbi_hart_has_feature(hartid, SBI_HART_HAS_SCOUNTEREN))
 		csr_write(CSR_SCOUNTEREN, -1);
-	if (sbi_platform_has_mcounteren(plat))
+	if (!sbi_hart_has_feature(hartid, SBI_HART_HAS_MCOUNTEREN))
 		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* Disable all interrupts */
@@ -125,11 +126,10 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
 
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long prot, addr, size;
 	unsigned int i;
 
-	if (!sbi_platform_has_pmp(plat))
+	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
 		return;
 
 	for (i = 0; i < PMP_COUNT; i++) {
@@ -158,9 +158,8 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 			    unsigned long attr)
 {
 	unsigned long prot, size, i, tempaddr;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!sbi_platform_has_pmp(plat))
+	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
 		return SBI_OK;
 
 	for (i = 0; i < PMP_COUNT; i++) {
@@ -182,7 +181,7 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	ulong prot, addr, log2size;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!sbi_platform_has_pmp(plat))
+	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
 		return 0;
 
 	/* Firmware PMP region to protect OpenSBI firmware */
@@ -224,6 +223,57 @@ bool sbi_hart_has_feature(u32 hartid, unsigned long feature)
 		return false;
 }
 
+static void sbi_hart_set_feature(u32 hartid, unsigned long feature)
+{
+	unsigned long *hart_features;
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	*hart_features = *hart_features | feature;
+}
+
+static void sbi_hart_detect_features(u32 hartid)
+{
+	struct sbi_trap_info trap = {0};
+	unsigned long feature = 0;
+	unsigned long csr_val;
+
+	if (hartid != current_hartid())
+		sbi_hart_hang();
+
+	/* Detect if hart supports PMP feature */
+	csr_val = csr_read_allowed(CSR_PMPCFG0, (unsigned long)&trap);
+	if (!trap.cause) {
+		csr_write_allowed(CSR_PMPCFG0, (unsigned long)&trap, csr_val);
+		if (!trap.cause)
+			feature |= SBI_HART_HAS_PMP;
+	}
+
+	/* Detect if hart supports SCOUNTEREN feature */
+	trap.cause = 0;
+	csr_val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
+	if (!trap.cause) {
+		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap,
+				  csr_val);
+		if (!trap.cause)
+			feature |= SBI_HART_HAS_SCOUNTEREN;
+	}
+
+	/* Detect if hart supports MCOUNTEREN feature */
+	trap.cause = 0;
+	csr_val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
+	if (!trap.cause) {
+		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap,
+				  csr_val);
+		if (!trap.cause)
+			feature |= SBI_HART_HAS_MCOUNTEREN;
+	}
+
+	sbi_hart_set_feature(hartid, feature);
+}
+
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	int rc;
@@ -251,6 +301,8 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	if (rc)
 		return rc;
 
+	sbi_hart_detect_features(hartid);
+
 	return pmp_init(scratch, hartid);
 }
 
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index e209cb661b4..e69ba1de682 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -11,6 +11,7 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_math.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
@@ -143,7 +144,6 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 int fdt_reserved_memory_fixup(void *fdt)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long prot, addr, size;
 	int parent, i, j;
 	int err;
@@ -183,7 +183,7 @@ int fdt_reserved_memory_fixup(void *fdt)
 			return err;
 	}
 
-	if (!sbi_platform_has_pmp(plat)) {
+	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP)) {
 		/* update the DT with firmware start & size even if PMP is not
 		 * supported. This makes sure that supervisor OS is always
 		 * aware of wheren OpenSBI resident memory area.
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 7c76ff87dfc..ad64c7430e0 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -28,8 +28,6 @@
 
 #define SBI_ARIANE_FEATURES	\
 	(SBI_PLATFORM_HAS_TIMER_VALUE | \
-	 SBI_PLATFORM_HAS_SCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index c549a95d891..89512e13ea7 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -28,8 +28,6 @@
 
 #define SBI_OPENPITON_FEATURES	\
 	(SBI_PLATFORM_HAS_TIMER_VALUE | \
-	 SBI_PLATFORM_HAS_SCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MCOUNTEREN | \
 	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 static struct platform_uart_data uart = {
diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
index 0faf2afde5a..354404ef75b 100644
--- a/platform/thead/c910/platform.h
+++ b/platform/thead/c910/platform.h
@@ -8,9 +8,7 @@
 #define C910_HART_COUNT   16
 
 #define SBI_THEAD_FEATURES	\
-	(SBI_PLATFORM_HAS_SCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MCOUNTEREN | \
-	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION | \
+	 (SBI_PLATFORM_HAS_MFAULTS_DELEGATION | \
 	 SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
 
 #define CSR_MCOR         0x7c2

From 49380244202460aa2fd322dc9a3bdd79b388bf9d Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:29 -0700
Subject: [PATCH 0585/1765] platform: fpga: Remove redundant platform specific
 features

Any platform feature that belongs to a hart, have already been moved to
hart features and are detected at run time. The remaining platform features
are identical to platform default features.

Use the platform default features instead of defining a separate copy of it.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/fpga/ariane/platform.c    | 6 +-----
 platform/fpga/openpiton/platform.c | 6 +-----
 2 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index ad64c7430e0..ba9ef9dc60a 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -26,10 +26,6 @@
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR 0x2000000
 
-#define SBI_ARIANE_FEATURES	\
-	(SBI_PLATFORM_HAS_TIMER_VALUE | \
-	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
-
 /*
  * Ariane platform early initialization.
  */
@@ -181,7 +177,7 @@ const struct sbi_platform platform = {
 	.opensbi_version = OPENSBI_VERSION,
 	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name = "ARIANE RISC-V",
-	.features = SBI_ARIANE_FEATURES,
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 89512e13ea7..776ca35e3d2 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -26,10 +26,6 @@
 #define OPENPITON_DEFAULT_HART_COUNT		3
 #define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
 
-#define SBI_OPENPITON_FEATURES	\
-	(SBI_PLATFORM_HAS_TIMER_VALUE | \
-	 SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
-
 static struct platform_uart_data uart = {
 		OPENPITON_DEFAULT_UART_ADDR,
 		OPENPITON_DEFAULT_UART_FREQ,
@@ -213,7 +209,7 @@ const struct sbi_platform platform = {
 	.opensbi_version = OPENSBI_VERSION,
 	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name = "OPENPITON RISC-V",
-	.features = SBI_OPENPITON_FEATURES,
+	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops

From ec0d2a7d7d8b78193375651627aa6f65b9219afe Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:30 -0700
Subject: [PATCH 0586/1765] lib: timer: Provide a hart based timer feature

As per the RISC-V specification, time value can be obtained from a time
CSR implemented in hardware or a MMIO based IP block. Qemu virt machine
already supports timer csr while CLINT provides the timer for other
platforms.

Implement a hart specific timer feature that can be detected at runtime.
As CSR based timer implementation are faster than MMIO address based, it
is always preferred over MMIO based one.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h |  2 ++
 lib/sbi/sbi_hart.c     |  6 ++++++
 lib/sbi/sbi_timer.c    | 29 ++++++++++++++++++++---------
 3 files changed, 28 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index f7870d97711..beb61b6fd4c 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -20,6 +20,8 @@ enum sbi_hart_features {
 	SBI_HART_HAS_SCOUNTEREN = (1 << 1),
 	/** Hart has M-mode counter enable */
 	SBI_HART_HAS_MCOUNTEREN = (1 << 2),
+	/** HART has timer csr implementation in hardware */
+	SBI_HART_HAS_TIME = (1 << 3),
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 10972c800eb..181cea4fca9 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -271,6 +271,12 @@ static void sbi_hart_detect_features(u32 hartid)
 			feature |= SBI_HART_HAS_MCOUNTEREN;
 	}
 
+	/* Detect if hart supports time CSR */
+	trap.cause = 0;
+	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
+	if (!trap.cause)
+		feature |= SBI_HART_HAS_TIME;
+
 	sbi_hart_set_feature(hartid, feature);
 }
 
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 60d9675e139..4a3ea2498cf 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -10,14 +10,16 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 
 static unsigned long time_delta_off;
+static u64 (*get_time_val)(const struct sbi_platform *plat);
 
 #if __riscv_xlen == 32
-u64 get_ticks(void)
+static u64 get_ticks(const struct sbi_platform *plat)
 {
 	u32 lo, hi, tmp;
 	__asm__ __volatile__("1:\n"
@@ -29,7 +31,7 @@ u64 get_ticks(void)
 	return ((u64)hi << 32) | lo;
 }
 #else
-u64 get_ticks(void)
+static u64 get_ticks(const struct sbi_platform *plat)
 {
 	unsigned long n;
 
@@ -40,12 +42,7 @@ u64 get_ticks(void)
 
 u64 sbi_timer_value(void)
 {
-	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
-
-	if (sbi_platform_has_timer_value(plat))
-		return sbi_platform_timer_value(plat);
-	else
-		return get_ticks();
+	return get_time_val(sbi_platform_thishart_ptr());
 }
 
 u64 sbi_timer_virt_value(void)
@@ -97,6 +94,8 @@ void sbi_timer_process(void)
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	u64 *time_delta;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	int ret;
 
 	if (cold_boot) {
 		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta),
@@ -111,7 +110,19 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
 	*time_delta = 0;
 
-	return sbi_platform_timer_init(sbi_platform_ptr(scratch), cold_boot);
+	ret = sbi_platform_timer_init(plat, cold_boot);
+	if (ret)
+		return ret;
+
+	if (sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_TIME))
+		get_time_val = get_ticks;
+	else if (sbi_platform_has_timer_value(plat))
+		get_time_val = sbi_platform_timer_value;
+	else
+		/* There is no method to provide timer value */
+		return SBI_ENODEV;
+
+	return 0;
 }
 
 void sbi_timer_exit(struct sbi_scratch *scratch)

From 1f235ec47f85ba90916493c7eb1378b5427a66b5 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:31 -0700
Subject: [PATCH 0587/1765] lib: Add platform features in boot time print

We have now clear distinction between platform and hart features.
Modify the boot print messages to print platform features in a string
format. In the process, this patch moved relatively larger functions
to its own file from platform.h header file.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_platform.h |  67 ++++++++++++++----------
 lib/sbi/objects.mk         |   1 +
 lib/sbi/sbi_init.c         |  13 ++++-
 lib/sbi/sbi_platform.c     | 104 +++++++++++++++++++++++++++++++++++++
 4 files changed, 158 insertions(+), 27 deletions(-)
 create mode 100644 lib/sbi/sbi_platform.c

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 675d021b078..dd25aa1b61e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -56,6 +56,9 @@ enum sbi_platform_features {
 	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 2),
 	/** Platform has custom secondary hart booting support */
 	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 3),
+
+	/** Last index of Platform features*/
+	SBI_PLATFORM_HAS_LAST_FEATURE = SBI_PLATFORM_HAS_HART_SECONDARY_BOOT,
 };
 
 /** Default feature set for a platform */
@@ -223,6 +226,29 @@ struct sbi_platform {
 #define sbi_platform_has_hart_secondary_boot(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
 
+/**
+ * Get HART index for the given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return 0 <= value < hart_count for valid HART otherwise -1U
+ */
+u32 sbi_platform_hart_index(const struct sbi_platform *plat, u32 hartid);
+
+/**
+ * Get the platform features in string format
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param features_str pointer to a char array where the features string will be
+ *		       updated
+ * @param nfstr length of the features_str. The feature string will be truncated
+ *		if nfstr is not long enough.
+ * @return the features value currently set for the given platform
+ */
+int sbi_platform_get_features_str(const struct sbi_platform *plat,
+				  char *features_str, int nfstr);
+
 /**
  * Get name of the platform
  *
@@ -237,6 +263,21 @@ static inline const char *sbi_platform_name(const struct sbi_platform *plat)
 	return "Unknown";
 }
 
+/**
+ * Get the platform features
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return the features value currently set for the given platform
+ */
+static inline unsigned long sbi_platform_get_features(
+						const struct sbi_platform *plat)
+{
+	if (plat)
+		return plat->features;
+	return 0;
+}
+
 /**
  * Get platform specific tlb range flush maximum value. Any request with size
  * higher than this is upgraded to a full flush.
@@ -281,32 +322,6 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 	return 0;
 }
 
-/**
- * Get HART index for the given HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return 0 <= value < hart_count for valid HART otherwise -1U
- */
-static inline u32 sbi_platform_hart_index(const struct sbi_platform *plat,
-					  u32 hartid)
-{
-	u32 i;
-
-	if (!plat)
-		return -1U;
-	if (plat->hart_index2id) {
-		for (i = 0; i < plat->hart_count; i++) {
-			if (plat->hart_index2id[i] == hartid)
-				return i;
-		}
-		return -1U;
-	}
-
-	return hartid;
-}
-
 /**
  * Check whether given HART is invalid
  *
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 31aaad5ed2d..fa808a031be 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -31,6 +31,7 @@ libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
 libsbi-objs-y += sbi_misaligned_ldst.o
+libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_scratch.o
 libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_system.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index bf4b4532836..2924784faa1 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -18,6 +18,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
+#include <sbi/sbi_string.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_version.h>
@@ -34,8 +35,10 @@
 
 static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 {
-	int xlen;
+	int xlen, ret;
 	char str[64];
+	int max_fstr_len = 128;
+	char features[128];
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 #ifdef OPENSBI_VERSION_GIT
@@ -59,6 +62,14 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
 	sbi_printf("Platform HART Count    : %u\n",
 		   sbi_platform_hart_count(plat));
+
+	sbi_memset(features, 0, max_fstr_len);
+	ret = sbi_platform_get_features_str(plat, features, max_fstr_len);
+	if (!ret)
+		sbi_printf("Platform Features      : %s\n", features);
+	else
+		sbi_printf("Platform Features      : %s\n", "none");
+
 	/* Boot HART details */
 	sbi_printf("Boot HART ID           : %u\n", hartid);
 	sbi_printf("Boot HART ISA          : %s\n", str);
diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
new file mode 100644
index 00000000000..1912512fee9
--- /dev/null
+++ b/lib/sbi/sbi_platform.c
@@ -0,0 +1,104 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
+
+static inline char *sbi_platform_feature_id2string(unsigned long feature)
+{
+	char *fstr = NULL;
+
+	if (!feature)
+		return NULL;
+
+	switch (feature) {
+	case SBI_PLATFORM_HAS_TIMER_VALUE:
+		fstr = "timer";
+		break;
+	case SBI_PLATFORM_HAS_HART_HOTPLUG:
+		fstr = "hotplug";
+		break;
+	case SBI_PLATFORM_HAS_MFAULTS_DELEGATION:
+		fstr = "mfdeleg";
+		break;
+	case SBI_PLATFORM_HAS_HART_SECONDARY_BOOT:
+		fstr = "sec_boot";
+		break;
+	default:
+		break;
+	}
+
+	return fstr;
+}
+
+/**
+ * Get the platform features in string format
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param features_str pointer to a char array where the features string will be
+ *		       updated
+ * @param nfstr length of the features_str. The feature string will be truncated
+ *		if nfstr is not long enough.
+ * @return the features value currently set for the given platform
+ */
+int sbi_platform_get_features_str(const struct sbi_platform *plat,
+						char *features_str, int nfstr)
+{
+	unsigned long features, feat = 1UL;
+	char *temp;
+	int offset = 0;
+
+	if (!plat || !features_str || !nfstr)
+		return SBI_EINVAL;
+
+	features = sbi_platform_get_features(plat);
+
+	do {
+		if (features & feat) {
+			temp = sbi_platform_feature_id2string(feat);
+			if (temp) {
+				sbi_snprintf(features_str + offset, nfstr,
+					     "%s,", temp);
+				offset = offset + sbi_strlen(temp) + 1;
+			}
+		}
+		feat = feat << 1;
+	} while (feat <= SBI_PLATFORM_HAS_LAST_FEATURE);
+
+	features_str[offset - 1] = '\0';
+
+	return 0;
+}
+
+/**
+ * Get HART index for the given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return 0 <= value < hart_count for valid HART otherwise -1U
+ */
+u32 sbi_platform_hart_index(const struct sbi_platform *plat,
+					  u32 hartid)
+{
+	u32 i;
+
+	if (!plat)
+		return -1U;
+	if (plat->hart_index2id) {
+		for (i = 0; i < plat->hart_count; i++) {
+			if (plat->hart_index2id[i] == hartid)
+				return i;
+		}
+		return -1U;
+	}
+
+	return hartid;
+}

From 22c4334f5c27c11cebeeba0a4426d26fcdb37327 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 9 May 2020 16:47:32 -0700
Subject: [PATCH 0588/1765] lib: Add hart features in boot time print

We have now clear distinction between platform and hart features.
Modify the boot print messages to print hart specific features in
a string format.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h |  4 +++
 lib/sbi/sbi_hart.c     | 77 ++++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c     |  8 +++++
 3 files changed, 89 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index beb61b6fd4c..cdcd8657329 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -22,6 +22,9 @@ enum sbi_hart_features {
 	SBI_HART_HAS_MCOUNTEREN = (1 << 2),
 	/** HART has timer csr implementation in hardware */
 	SBI_HART_HAS_TIME = (1 << 3),
+
+	/** Last index of Hart features*/
+	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
 };
 
 struct sbi_scratch;
@@ -40,6 +43,7 @@ int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
 bool sbi_hart_has_feature(u32 hartid, unsigned long feature);
 unsigned long sbi_hart_get_features(u32 hartid);
+int sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 181cea4fca9..28cfeaa4e0c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -18,6 +18,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
 
 extern void __sbi_expected_trap(void);
 extern void __sbi_expected_trap_hext(void);
@@ -223,6 +224,82 @@ bool sbi_hart_has_feature(u32 hartid, unsigned long feature)
 		return false;
 }
 
+unsigned long sbi_hart_get_features(u32 hartid)
+{
+	unsigned long *hart_features;
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return *hart_features;
+}
+
+static inline char *sbi_hart_feature_id2string(unsigned long feature)
+{
+	char *fstr = NULL;
+
+	if (!feature)
+		return NULL;
+
+	switch (feature) {
+	case SBI_HART_HAS_PMP:
+		fstr = "pmp";
+		break;
+	case SBI_HART_HAS_SCOUNTEREN:
+		fstr = "scountern";
+		break;
+	case SBI_HART_HAS_MCOUNTEREN:
+		fstr = "mcounteren";
+		break;
+	case SBI_HART_HAS_TIME:
+		fstr = "time";
+		break;
+	default:
+		break;
+	}
+
+	return fstr;
+}
+
+/**
+ * Get the hart features in string format
+ *
+ * @param hartid Hart ID of the hart whose feature list is requested
+ * @param features_str pointer to a char array where the features string will be
+ *		       updated
+ * @param nfstr length of the features_str. The feature string will be truncated
+ *		if nfstr is not long enough.
+ * @return the features value currently set for the given platform
+ */
+int sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
+{
+	unsigned long features, feat = 1UL;
+	char *temp;
+	int offset = 0;
+
+	if (!features_str || !nfstr)
+		return SBI_EINVAL;
+
+	features = sbi_hart_get_features(hartid);
+
+	do {
+		if (features & feat) {
+			temp = sbi_hart_feature_id2string(feat);
+			if (temp) {
+				sbi_snprintf(features_str + offset, nfstr,
+					     "%s,", temp);
+				offset = offset + sbi_strlen(temp) + 1;
+			}
+		}
+		feat = feat << 1;
+	} while (feat <= SBI_HART_HAS_LAST_FEATURE);
+
+	features_str[offset - 1] = '\0';
+
+	return 0;
+}
+
 static void sbi_hart_set_feature(u32 hartid, unsigned long feature)
 {
 	unsigned long *hart_features;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 2924784faa1..f89258250a3 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -73,6 +73,14 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	/* Boot HART details */
 	sbi_printf("Boot HART ID           : %u\n", hartid);
 	sbi_printf("Boot HART ISA          : %s\n", str);
+
+	sbi_memset(features, 0, max_fstr_len);
+	ret = sbi_hart_get_features_str(hartid, features, max_fstr_len);
+	if (!ret)
+		sbi_printf("BOOT HART Features     : %s\n", features);
+	else
+		sbi_printf("BOOT HART Features     : %s\n", "none");
+
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size          : %d KB\n",

From 36833abfbb48ddf6a959b09c9e0e341ae33a811a Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 15 May 2020 15:30:33 -0700
Subject: [PATCH 0589/1765] lib: Optimize inline assembly for unprivilege
 access functions

Currently, unprivileged access functions uses few additional instructions
which are redundant. It also uses specific registers which are not necessary.

Remove those additional instructions and let the compiler choose the
registers.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_unpriv.c | 33 ++++++++++++++++-----------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index fad720e3800..42461241f73 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -14,19 +14,21 @@
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
+/**
+ * a3 must a pointer to the sbi_trap_info and a4 is used as a temporary
+ * register in the trap handler. Make sure that compiler doesn't use a3 & a4.
+ */
 #define DEFINE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                         \
 	type sbi_load_##type(const type *addr,                                \
 			     struct sbi_trap_info *trap)                      \
 	{                                                                     \
 		register ulong tinfo asm("a3");                               \
-		register ulong ttmp asm("a4");                                \
-		register ulong mstatus asm("a5");                             \
-		register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr(); \
+		register ulong mstatus = 0;                                   \
+		register ulong mtvec = sbi_hart_expected_trap_addr();         \
 		type ret = 0;                                                 \
 		trap->cause = 0;                                              \
 		asm volatile(                                                 \
 			"add %[tinfo], %[taddr], zero\n"                      \
-			"add %[ttmp], %[taddr], zero\n"                       \
 			"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"      \
 			"csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"   \
 			".option push\n"                                      \
@@ -36,11 +38,10 @@
 			"csrw " STR(CSR_MSTATUS) ", %[mstatus]\n"             \
 			"csrw " STR(CSR_MTVEC) ", %[mtvec]"                   \
 		    : [mstatus] "+&r"(mstatus), [mtvec] "+&r"(mtvec),         \
-		      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp),               \
-		      [ret] "=&r"(ret)                                        \
+		      [tinfo] "+&r"(tinfo), [ret] "=&r"(ret)                  \
 		    : [addr] "m"(*addr), [mprv] "r"(MSTATUS_MPRV),            \
 		      [taddr] "r"((ulong)trap)                                \
-		    : "memory");                                              \
+		    : "a4", "memory");                                        \
 		return ret;                                                   \
 	}
 
@@ -48,14 +49,12 @@
 	void sbi_store_##type(type *addr, type val,                           \
 			      struct sbi_trap_info *trap)                     \
 	{                                                                     \
-		register ulong tinfo asm("a3");                               \
-		register ulong ttmp asm("a4");                                \
-		register ulong mstatus asm("a5");                             \
-		register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr(); \
+		register ulong tinfo asm("a3") = (ulong)trap;                 \
+		register ulong mstatus = 0;                                   \
+		register ulong mtvec = sbi_hart_expected_trap_addr();         \
 		trap->cause = 0;                                              \
 		asm volatile(                                                 \
 			"add %[tinfo], %[taddr], zero\n"                      \
-			"add %[ttmp], %[taddr], zero\n"                       \
 			"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"      \
 			"csrrs %[mstatus], " STR(CSR_MSTATUS) ", %[mprv]\n"   \
 			".option push\n"                                      \
@@ -65,10 +64,10 @@
 			"csrw " STR(CSR_MSTATUS) ", %[mstatus]\n"             \
 			"csrw " STR(CSR_MTVEC) ", %[mtvec]"                   \
 		    : [mstatus] "+&r"(mstatus), [mtvec] "+&r"(mtvec),         \
-		      [tinfo] "+&r"(tinfo), [ttmp] "+&r"(ttmp)                \
+		      [tinfo] "+&r"(tinfo)                                    \
 		    : [addr] "m"(*addr), [mprv] "r"(MSTATUS_MPRV),            \
-		      [taddr] "r"((ulong)trap), [val] "r"(val)                \
-		    : "memory");              \
+		      [val] "r"(val), [taddr] "r"((ulong)trap)                \
+		    : "a4", "memory");                                        \
 	}
 
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u8, lbu)
@@ -119,8 +118,8 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
 {
 	register ulong tinfo asm("a3");
 	register ulong ttmp asm("a4");
-	register ulong mstatus asm("a5");
-	register ulong mtvec asm("a6") = sbi_hart_expected_trap_addr();
+	register ulong mstatus = 0;
+	register ulong mtvec = sbi_hart_expected_trap_addr();
 	ulong insn = 0;
 
 	trap->cause = 0;

From 38a4b54cdc3fd77574c4ef166154819a976e9fa0 Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <daniel.schaefer@hpe.com>
Date: Fri, 15 May 2020 11:38:12 +0200
Subject: [PATCH 0590/1765] firmware: Correct spelling mistakes

Signed-off-by: Daniel Schaefer <git@danielschaefer.me>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 5cb0dfab580..732bc3bd72b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -271,7 +271,7 @@ _scratch_init:
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
 
-	/* Override pervious arg1 */
+	/* Override previous arg1 */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_prev_arg1
 	add	t1, a0, zero
@@ -349,7 +349,7 @@ _fdt_reloc_done:
 	fence	rw, rw
 	j	_start_warm
 
-	/* waitting for boot hart done (_boot_status == 2) */
+	/* waiting for boot hart to be done (_boot_status == 2) */
 _wait_for_boot_hart:
 	li	t0, BOOT_STATUS_BOOT_HART_DONE
 	la	t1, _boot_status

From 28b40528499755ec19a6f8a06dc47e65619fb96c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 10 May 2020 11:13:00 +0530
Subject: [PATCH 0591/1765] lib: sbi: detect features before everything else in
 sbi_hart_init()

We should detect HART features in sbi_hart_init() before
mstatus_init(), delegate_traps() and pmp_init().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 28cfeaa4e0c..2a284fd26f4 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -247,7 +247,7 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		fstr = "pmp";
 		break;
 	case SBI_HART_HAS_SCOUNTEREN:
-		fstr = "scountern";
+		fstr = "scounteren";
 		break;
 	case SBI_HART_HAS_MCOUNTEREN:
 		fstr = "mcounteren";
@@ -371,8 +371,10 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 		if (!hart_features_offset)
 			return SBI_ENOMEM;
 	}
+
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	*hart_features = 0;
+	sbi_hart_detect_features(hartid);
 
 	mstatus_init(scratch, hartid);
 
@@ -384,8 +386,6 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	if (rc)
 		return rc;
 
-	sbi_hart_detect_features(hartid);
-
 	return pmp_init(scratch, hartid);
 }
 

From 49841832b85bbcc8ae99dc2b808175a1a8650ff3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 10 May 2020 11:36:14 +0530
Subject: [PATCH 0592/1765] lib: sbi: Improve get_feature_str() implementation
 and usage

We do following improvements for get_feature_str():
1. We should return "none" from get_feature_str() no features
   available instead of sbi_boot_prints() explicitly handling
   failure.
2. We don't need to return failure (just like misa_xlen())
   because we are returning "none" for no features and we are
   truncating output when space is not available.
3. Based on 1 and 2, the sbi_boot_prints() can be further
   simplified.
4. No need for two char[] in sbi_boot_prints()

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h     |  2 +-
 include/sbi/sbi_platform.h |  5 ++---
 lib/sbi/sbi_hart.c         | 18 +++++++++++-------
 lib/sbi/sbi_init.c         | 27 ++++++++-------------------
 lib/sbi/sbi_platform.c     | 38 ++++++++++++--------------------------
 5 files changed, 34 insertions(+), 56 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index cdcd8657329..a624dfdf3ee 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -43,7 +43,7 @@ int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
 bool sbi_hart_has_feature(u32 hartid, unsigned long feature);
 unsigned long sbi_hart_get_features(u32 hartid);
-int sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr);
+void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index dd25aa1b61e..808714869ab 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -244,10 +244,9 @@ u32 sbi_platform_hart_index(const struct sbi_platform *plat, u32 hartid);
  *		       updated
  * @param nfstr length of the features_str. The feature string will be truncated
  *		if nfstr is not long enough.
- * @return the features value currently set for the given platform
  */
-int sbi_platform_get_features_str(const struct sbi_platform *plat,
-				  char *features_str, int nfstr);
+void sbi_platform_get_features_str(const struct sbi_platform *plat,
+				   char *features_str, int nfstr);
 
 /**
  * Get name of the platform
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 2a284fd26f4..f101395811f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -270,18 +270,20 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
  *		       updated
  * @param nfstr length of the features_str. The feature string will be truncated
  *		if nfstr is not long enough.
- * @return the features value currently set for the given platform
  */
-int sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
+void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
 {
 	unsigned long features, feat = 1UL;
 	char *temp;
 	int offset = 0;
 
-	if (!features_str || !nfstr)
-		return SBI_EINVAL;
+	if (!features_str || nfstr <= 0)
+		return;
+	sbi_memset(features_str, 0, nfstr);
 
 	features = sbi_hart_get_features(hartid);
+	if (!features)
+		goto done;
 
 	do {
 		if (features & feat) {
@@ -295,9 +297,11 @@ int sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
 		feat = feat << 1;
 	} while (feat <= SBI_HART_HAS_LAST_FEATURE);
 
-	features_str[offset - 1] = '\0';
-
-	return 0;
+done:
+	if (offset)
+		features_str[offset - 1] = '\0';
+	else
+		sbi_strncpy(features_str, "none", nfstr);
 }
 
 static void sbi_hart_set_feature(u32 hartid, unsigned long feature)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f89258250a3..bbf9ac17032 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -35,10 +35,8 @@
 
 static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 {
-	int xlen, ret;
-	char str[64];
-	int max_fstr_len = 128;
-	char features[128];
+	int xlen;
+	char str[128];
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 #ifdef OPENSBI_VERSION_GIT
@@ -56,35 +54,26 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 		sbi_printf("Error %d getting MISA XLEN\n", xlen);
 		sbi_hart_hang();
 	}
-	misa_string(xlen, str, sizeof(str));
 
 	/* Platform details */
 	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
 	sbi_printf("Platform HART Count    : %u\n",
 		   sbi_platform_hart_count(plat));
-
-	sbi_memset(features, 0, max_fstr_len);
-	ret = sbi_platform_get_features_str(plat, features, max_fstr_len);
-	if (!ret)
-		sbi_printf("Platform Features      : %s\n", features);
-	else
-		sbi_printf("Platform Features      : %s\n", "none");
+	sbi_platform_get_features_str(plat, str, sizeof(str));
+	sbi_printf("Platform Features      : %s\n", str);
 
 	/* Boot HART details */
 	sbi_printf("Boot HART ID           : %u\n", hartid);
+	misa_string(xlen, str, sizeof(str));
 	sbi_printf("Boot HART ISA          : %s\n", str);
-
-	sbi_memset(features, 0, max_fstr_len);
-	ret = sbi_hart_get_features_str(hartid, features, max_fstr_len);
-	if (!ret)
-		sbi_printf("BOOT HART Features     : %s\n", features);
-	else
-		sbi_printf("BOOT HART Features     : %s\n", "none");
+	sbi_hart_get_features_str(hartid, str, sizeof(str));
+	sbi_printf("BOOT HART Features     : %s\n", str);
 
 	/* Firmware details */
 	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size          : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
+
 	/* Generic details */
 	sbi_printf("Runtime SBI Version    : %d.%d\n",
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index 1912512fee9..568d9566130 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -38,27 +38,20 @@ static inline char *sbi_platform_feature_id2string(unsigned long feature)
 	return fstr;
 }
 
-/**
- * Get the platform features in string format
- *
- * @param plat pointer to struct sbi_platform
- * @param features_str pointer to a char array where the features string will be
- *		       updated
- * @param nfstr length of the features_str. The feature string will be truncated
- *		if nfstr is not long enough.
- * @return the features value currently set for the given platform
- */
-int sbi_platform_get_features_str(const struct sbi_platform *plat,
-						char *features_str, int nfstr)
+void sbi_platform_get_features_str(const struct sbi_platform *plat,
+				   char *features_str, int nfstr)
 {
 	unsigned long features, feat = 1UL;
 	char *temp;
 	int offset = 0;
 
 	if (!plat || !features_str || !nfstr)
-		return SBI_EINVAL;
+		return;
+	sbi_memset(features_str, 0, nfstr);
 
 	features = sbi_platform_get_features(plat);
+	if (!features)
+		goto done;
 
 	do {
 		if (features & feat) {
@@ -72,21 +65,14 @@ int sbi_platform_get_features_str(const struct sbi_platform *plat,
 		feat = feat << 1;
 	} while (feat <= SBI_PLATFORM_HAS_LAST_FEATURE);
 
-	features_str[offset - 1] = '\0';
-
-	return 0;
+done:
+	if (offset)
+		features_str[offset - 1] = '\0';
+	else
+		sbi_strncpy(features_str, "none", nfstr);
 }
 
-/**
- * Get HART index for the given HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return 0 <= value < hart_count for valid HART otherwise -1U
- */
-u32 sbi_platform_hart_index(const struct sbi_platform *plat,
-					  u32 hartid)
+u32 sbi_platform_hart_index(const struct sbi_platform *plat, u32 hartid)
 {
 	u32 i;
 

From 3aa1036f91a20d3cd9c83c9f0e4511db931f4d7d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 10 May 2020 11:46:55 +0530
Subject: [PATCH 0593/1765] lib: sbi: Remove extra spaces from boot time prints

We remove extra spaces from boot time prints.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index bbf9ac17032..de54854841b 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -56,26 +56,26 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	}
 
 	/* Platform details */
-	sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
-	sbi_printf("Platform HART Count    : %u\n",
+	sbi_printf("Platform Name       : %s\n", sbi_platform_name(plat));
+	sbi_printf("Platform HART Count : %u\n",
 		   sbi_platform_hart_count(plat));
 	sbi_platform_get_features_str(plat, str, sizeof(str));
-	sbi_printf("Platform Features      : %s\n", str);
+	sbi_printf("Platform Features   : %s\n", str);
 
 	/* Boot HART details */
-	sbi_printf("Boot HART ID           : %u\n", hartid);
+	sbi_printf("Boot HART ID        : %u\n", hartid);
 	misa_string(xlen, str, sizeof(str));
-	sbi_printf("Boot HART ISA          : %s\n", str);
+	sbi_printf("Boot HART ISA       : %s\n", str);
 	sbi_hart_get_features_str(hartid, str, sizeof(str));
-	sbi_printf("BOOT HART Features     : %s\n", str);
+	sbi_printf("BOOT HART Features  : %s\n", str);
 
 	/* Firmware details */
-	sbi_printf("Firmware Base          : 0x%lx\n", scratch->fw_start);
-	sbi_printf("Firmware Size          : %d KB\n",
+	sbi_printf("Firmware Base       : 0x%lx\n", scratch->fw_start);
+	sbi_printf("Firmware Size       : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
 
 	/* Generic details */
-	sbi_printf("Runtime SBI Version    : %d.%d\n",
+	sbi_printf("Runtime SBI Version : %d.%d\n",
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
 

From 3a8fc8135714e39bef99cbf2a4b31e6f2f19a929 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 10 May 2020 11:49:59 +0530
Subject: [PATCH 0594/1765] lib: sbi: Print platform HART count just before
 boot HART id

On platforms with continuous HART ids starting from zero:
0 <= boot HART id < platform HART count

The above co-relation of boot HART id and platform HART count
is true for most RISC-V platfors so it's better to print platform
HART count just before boot HART id.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index de54854841b..c573fd8c7ab 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -57,10 +57,10 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Platform details */
 	sbi_printf("Platform Name       : %s\n", sbi_platform_name(plat));
-	sbi_printf("Platform HART Count : %u\n",
-		   sbi_platform_hart_count(plat));
 	sbi_platform_get_features_str(plat, str, sizeof(str));
 	sbi_printf("Platform Features   : %s\n", str);
+	sbi_printf("Platform HART Count : %u\n",
+		   sbi_platform_hart_count(plat));
 
 	/* Boot HART details */
 	sbi_printf("Boot HART ID        : %u\n", hartid);

From 63b0f5f71a4d6bf8539a8cbfa27228dc76e7d71a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 May 2020 11:30:15 +0530
Subject: [PATCH 0595/1765] include: sbi: Use scratch pointer as parmeter in
 HART feature APIs

It makes more sense to have scratch pointer as parameter in
HART feature APIs because:
1. We already have scratch pointer at places where these APIs
   are used.
2. This is consistent with lot of other APIs in sbi_hart.h

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h    |  6 ++---
 lib/sbi/sbi_hart.c        | 46 +++++++++++++++++++--------------------
 lib/sbi/sbi_init.c        |  2 +-
 lib/sbi/sbi_timer.c       |  2 +-
 lib/utils/fdt/fdt_fixup.c |  7 +++---
 5 files changed, 32 insertions(+), 31 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index a624dfdf3ee..ac7a067f120 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -41,9 +41,9 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
-bool sbi_hart_has_feature(u32 hartid, unsigned long feature);
-unsigned long sbi_hart_get_features(u32 hartid);
-void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr);
+bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
+void sbi_hart_get_features_str(struct sbi_scratch *scratch,
+			       char *features_str, int nfstr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index f101395811f..c0eb6ca13ab 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -42,9 +42,9 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Enable user/supervisor use of perf counters */
 	if (misa_extension('S') &&
-	    sbi_hart_has_feature(hartid, SBI_HART_HAS_SCOUNTEREN))
+	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
 		csr_write(CSR_SCOUNTEREN, -1);
-	if (!sbi_hart_has_feature(hartid, SBI_HART_HAS_MCOUNTEREN))
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
 		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* Disable all interrupts */
@@ -130,7 +130,7 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 	unsigned long prot, addr, size;
 	unsigned int i;
 
-	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
 		return;
 
 	for (i = 0; i < PMP_COUNT; i++) {
@@ -160,7 +160,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 {
 	unsigned long prot, size, i, tempaddr;
 
-	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
 		return SBI_OK;
 
 	for (i = 0; i < PMP_COUNT; i++) {
@@ -182,7 +182,7 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	ulong prot, addr, log2size;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP))
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
 		return 0;
 
 	/* Firmware PMP region to protect OpenSBI firmware */
@@ -210,12 +210,17 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	return 0;
 }
 
-bool sbi_hart_has_feature(u32 hartid, unsigned long feature)
+/**
+ * Check whether a particular hart feature is available
+ *
+ * @param scratch pointer to the HART scratch space
+ * @param feature the feature to check
+ * @returns true (feature available) or false (feature not available)
+ */
+bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature)
 {
 	unsigned long *hart_features;
-	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	if (*hart_features & feature)
@@ -224,12 +229,10 @@ bool sbi_hart_has_feature(u32 hartid, unsigned long feature)
 		return false;
 }
 
-unsigned long sbi_hart_get_features(u32 hartid)
+static unsigned long hart_get_features(struct sbi_scratch *scratch)
 {
 	unsigned long *hart_features;
-	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return *hart_features;
@@ -265,13 +268,14 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 /**
  * Get the hart features in string format
  *
- * @param hartid Hart ID of the hart whose feature list is requested
+ * @param scratch pointer to the HART scratch space
  * @param features_str pointer to a char array where the features string will be
  *		       updated
  * @param nfstr length of the features_str. The feature string will be truncated
  *		if nfstr is not long enough.
  */
-void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
+void sbi_hart_get_features_str(struct sbi_scratch *scratch,
+			       char *features_str, int nfstr)
 {
 	unsigned long features, feat = 1UL;
 	char *temp;
@@ -281,7 +285,7 @@ void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
 		return;
 	sbi_memset(features_str, 0, nfstr);
 
-	features = sbi_hart_get_features(hartid);
+	features = hart_get_features(scratch);
 	if (!features)
 		goto done;
 
@@ -304,26 +308,22 @@ void sbi_hart_get_features_str(u32 hartid, char *features_str, int nfstr)
 		sbi_strncpy(features_str, "none", nfstr);
 }
 
-static void sbi_hart_set_feature(u32 hartid, unsigned long feature)
+static void sbi_hart_set_feature(struct sbi_scratch *scratch,
+				 unsigned long feature)
 {
 	unsigned long *hart_features;
-	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	*hart_features = *hart_features | feature;
 }
 
-static void sbi_hart_detect_features(u32 hartid)
+static void sbi_hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
 	unsigned long feature = 0;
 	unsigned long csr_val;
 
-	if (hartid != current_hartid())
-		sbi_hart_hang();
-
 	/* Detect if hart supports PMP feature */
 	csr_val = csr_read_allowed(CSR_PMPCFG0, (unsigned long)&trap);
 	if (!trap.cause) {
@@ -358,7 +358,7 @@ static void sbi_hart_detect_features(u32 hartid)
 	if (!trap.cause)
 		feature |= SBI_HART_HAS_TIME;
 
-	sbi_hart_set_feature(hartid, feature);
+	sbi_hart_set_feature(scratch, feature);
 }
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
@@ -378,7 +378,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	*hart_features = 0;
-	sbi_hart_detect_features(hartid);
+	sbi_hart_detect_features(scratch);
 
 	mstatus_init(scratch, hartid);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index c573fd8c7ab..7b8d6a79d7a 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -66,7 +66,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Boot HART ID        : %u\n", hartid);
 	misa_string(xlen, str, sizeof(str));
 	sbi_printf("Boot HART ISA       : %s\n", str);
-	sbi_hart_get_features_str(hartid, str, sizeof(str));
+	sbi_hart_get_features_str(scratch, str, sizeof(str));
 	sbi_printf("BOOT HART Features  : %s\n", str);
 
 	/* Firmware details */
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 4a3ea2498cf..b571b174036 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -114,7 +114,7 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	if (ret)
 		return ret;
 
-	if (sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_TIME))
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_TIME))
 		get_time_val = get_ticks;
 	else if (sbi_platform_has_timer_value(plat))
 		get_time_val = sbi_platform_timer_value;
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index e69ba1de682..6b11b415e58 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -183,10 +183,11 @@ int fdt_reserved_memory_fixup(void *fdt)
 			return err;
 	}
 
-	if (!sbi_hart_has_feature(current_hartid(), SBI_HART_HAS_PMP)) {
-		/* update the DT with firmware start & size even if PMP is not
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP)) {
+		/*
+		 * Update the DT with firmware start & size even if PMP is not
 		 * supported. This makes sure that supervisor OS is always
-		 * aware of wheren OpenSBI resident memory area.
+		 * aware of OpenSBI resident memory area.
 		 */
 		addr = scratch->fw_start & ~(scratch->fw_size - 1UL);
 		size = (1UL << log2roundup(scratch->fw_size));

From 2966510eedf03e47e13f3e1a88039bd4199c1085 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 May 2020 11:42:54 +0530
Subject: [PATCH 0596/1765] lib: sbi: Few cosmetic improvements to HART feature
 detection

This patch does few cosmetic improvements to HART feature detection:
1. Remove sbi_ perfix from HART feature detection functions
   because all local/static functions in sbi_hart.c don't have
   sbi_ prefix
2. Remove sbi_hart_set_feature() because it's quite small and
   local/static in sbi_hart.c

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 32 ++++++++++++--------------------
 1 file changed, 12 insertions(+), 20 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c0eb6ca13ab..e62992d6d12 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -308,28 +308,20 @@ void sbi_hart_get_features_str(struct sbi_scratch *scratch,
 		sbi_strncpy(features_str, "none", nfstr);
 }
 
-static void sbi_hart_set_feature(struct sbi_scratch *scratch,
-				 unsigned long feature)
+static void hart_detect_features(struct sbi_scratch *scratch)
 {
+	struct sbi_trap_info trap = {0};
 	unsigned long *hart_features;
+	unsigned long csr_val;
 
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	*hart_features = *hart_features | feature;
-}
-
-static void sbi_hart_detect_features(struct sbi_scratch *scratch)
-{
-	struct sbi_trap_info trap = {0};
-	unsigned long feature = 0;
-	unsigned long csr_val;
-
 	/* Detect if hart supports PMP feature */
 	csr_val = csr_read_allowed(CSR_PMPCFG0, (unsigned long)&trap);
 	if (!trap.cause) {
 		csr_write_allowed(CSR_PMPCFG0, (unsigned long)&trap, csr_val);
 		if (!trap.cause)
-			feature |= SBI_HART_HAS_PMP;
+			*hart_features |= SBI_HART_HAS_PMP;
 	}
 
 	/* Detect if hart supports SCOUNTEREN feature */
@@ -339,7 +331,7 @@ static void sbi_hart_detect_features(struct sbi_scratch *scratch)
 		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap,
 				  csr_val);
 		if (!trap.cause)
-			feature |= SBI_HART_HAS_SCOUNTEREN;
+			*hart_features |= SBI_HART_HAS_SCOUNTEREN;
 	}
 
 	/* Detect if hart supports MCOUNTEREN feature */
@@ -349,16 +341,14 @@ static void sbi_hart_detect_features(struct sbi_scratch *scratch)
 		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap,
 				  csr_val);
 		if (!trap.cause)
-			feature |= SBI_HART_HAS_MCOUNTEREN;
+			*hart_features |= SBI_HART_HAS_MCOUNTEREN;
 	}
 
 	/* Detect if hart supports time CSR */
 	trap.cause = 0;
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
-		feature |= SBI_HART_HAS_TIME;
-
-	sbi_hart_set_feature(scratch, feature);
+		*hart_features |= SBI_HART_HAS_TIME;
 }
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
@@ -369,16 +359,18 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
+
 		hart_features_offset = sbi_scratch_alloc_offset(
-							sizeof(hart_features),
-							"HART_FEATURES");
+						sizeof(*hart_features),
+						"HART_FEATURES");
 		if (!hart_features_offset)
 			return SBI_ENOMEM;
 	}
 
 	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	*hart_features = 0;
-	sbi_hart_detect_features(scratch);
+
+	hart_detect_features(scratch);
 
 	mstatus_init(scratch, hartid);
 

From a38bea9341a2da29bec00d5253ac71da8ca06bab Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 18 May 2020 12:04:18 +0530
Subject: [PATCH 0597/1765] lib: sbi_hart: Detect number of supported PMP
 regions

It is not mandatory for a RISC-V systems to implement all PMP
regions so we have to check all PMPADDRx CSRs to determine excat
number of supported PMP regions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h    |   4 ++
 lib/sbi/sbi_hart.c        | 116 ++++++++++++++++++++++++++------------
 lib/sbi/sbi_init.c        |   1 +
 lib/utils/fdt/fdt_fixup.c |  34 +++++------
 4 files changed, 103 insertions(+), 52 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index ac7a067f120..51c2c353810 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -38,6 +38,10 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 }
 
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
+unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
+int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
+		     unsigned long *prot_out, unsigned long *addr_out,
+		     unsigned long *size);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
 			     unsigned long attr);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e62992d6d12..5fa30f38965 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -24,6 +24,11 @@ extern void __sbi_expected_trap(void);
 extern void __sbi_expected_trap_hext(void);
 
 void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
+
+struct hart_features {
+	unsigned long features;
+	unsigned int pmp_count;
+};
 static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
@@ -125,15 +130,34 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
 #endif
 }
 
+unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->pmp_count;
+}
+
+int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
+		     unsigned long *prot_out, unsigned long *addr_out,
+		     unsigned long *size)
+{
+	if (sbi_hart_pmp_count(scratch) <= n)
+		return SBI_EINVAL;
+
+	return pmp_get(n, prot_out, addr_out, size);
+}
+
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
 	unsigned long prot, addr, size;
-	unsigned int i;
+	unsigned int i, pmp_count;
 
 	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
 		return;
 
-	for (i = 0; i < PMP_COUNT; i++) {
+	pmp_count = sbi_hart_pmp_count(scratch);
+	for (i = 0; i < pmp_count; i++) {
 		pmp_get(i, &prot, &addr, &size);
 		if (!(prot & PMP_A))
 			continue;
@@ -158,12 +182,14 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 			    unsigned long attr)
 {
-	unsigned long prot, size, i, tempaddr;
+	unsigned long prot, size, tempaddr;
+	unsigned int i, pmp_count;
 
 	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
 		return SBI_OK;
 
-	for (i = 0; i < PMP_COUNT; i++) {
+	pmp_count = sbi_hart_pmp_count(scratch);
+	for (i = 0; i < pmp_count; i++) {
 		pmp_get(i, &prot, &tempaddr, &size);
 		if (!(prot & PMP_A))
 			continue;
@@ -177,7 +203,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 
 static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 {
-	u32 i, pmp_idx = 0, count;
+	u32 i, pmp_idx = 0, pmp_count, count;
 	unsigned long fw_start, fw_size_log2;
 	ulong prot, addr, log2size;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -192,7 +218,8 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 
 	/* Platform specific PMP regions */
 	count = sbi_platform_pmp_region_count(plat, hartid);
-	for (i = 0; i < count && pmp_idx < (PMP_COUNT - 1); i++) {
+	pmp_count = sbi_hart_pmp_count(scratch);
+	for (i = 0; i < count && pmp_idx < (pmp_count - 1); i++) {
 		if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr,
 						 &log2size))
 			continue;
@@ -219,11 +246,10 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
  */
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature)
 {
-	unsigned long *hart_features;
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
-
-	if (*hart_features & feature)
+	if (hfeatures->features & feature)
 		return true;
 	else
 		return false;
@@ -231,11 +257,10 @@ bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature)
 
 static unsigned long hart_get_features(struct sbi_scratch *scratch)
 {
-	unsigned long *hart_features;
-
-	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	return *hart_features;
+	return hfeatures->features;
 }
 
 static inline char *sbi_hart_feature_id2string(unsigned long feature)
@@ -311,65 +336,84 @@ void sbi_hart_get_features_str(struct sbi_scratch *scratch,
 static void hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
-	unsigned long *hart_features;
-	unsigned long csr_val;
+	struct hart_features *hfeatures;
+	unsigned long val;
 
-	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	/* Reset hart features */
+	hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	hfeatures->features = 0;
+	hfeatures->pmp_count = 0;
 
 	/* Detect if hart supports PMP feature */
-	csr_val = csr_read_allowed(CSR_PMPCFG0, (unsigned long)&trap);
-	if (!trap.cause) {
-		csr_write_allowed(CSR_PMPCFG0, (unsigned long)&trap, csr_val);
-		if (!trap.cause)
-			*hart_features |= SBI_HART_HAS_PMP;
+#define __detect_pmp(__pmp_csr)					\
+	val = csr_read_allowed(__pmp_csr, (ulong)&trap);	\
+	if (!trap.cause) {					\
+		csr_write_allowed(__pmp_csr, (ulong)&trap, val);\
+		if (!trap.cause)				\
+			hfeatures->pmp_count++;			\
 	}
+	__detect_pmp(CSR_PMPADDR0);
+	__detect_pmp(CSR_PMPADDR1);
+	__detect_pmp(CSR_PMPADDR2);
+	__detect_pmp(CSR_PMPADDR3);
+	__detect_pmp(CSR_PMPADDR4);
+	__detect_pmp(CSR_PMPADDR5);
+	__detect_pmp(CSR_PMPADDR6);
+	__detect_pmp(CSR_PMPADDR7);
+	__detect_pmp(CSR_PMPADDR8);
+	__detect_pmp(CSR_PMPADDR9);
+	__detect_pmp(CSR_PMPADDR10);
+	__detect_pmp(CSR_PMPADDR11);
+	__detect_pmp(CSR_PMPADDR12);
+	__detect_pmp(CSR_PMPADDR13);
+	__detect_pmp(CSR_PMPADDR14);
+	__detect_pmp(CSR_PMPADDR15);
+#undef __detect_pmp
+
+	/* Set hart PMP feature if we have at least one PMP region */
+	if (hfeatures->pmp_count)
+		hfeatures->features |= SBI_HART_HAS_PMP;
 
 	/* Detect if hart supports SCOUNTEREN feature */
 	trap.cause = 0;
-	csr_val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
+	val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
-		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap,
-				  csr_val);
+		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
 		if (!trap.cause)
-			*hart_features |= SBI_HART_HAS_SCOUNTEREN;
+			hfeatures->features |= SBI_HART_HAS_SCOUNTEREN;
 	}
 
 	/* Detect if hart supports MCOUNTEREN feature */
 	trap.cause = 0;
-	csr_val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
+	val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
-		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap,
-				  csr_val);
+		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
 		if (!trap.cause)
-			*hart_features |= SBI_HART_HAS_MCOUNTEREN;
+			hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
 	}
 
 	/* Detect if hart supports time CSR */
 	trap.cause = 0;
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
-		*hart_features |= SBI_HART_HAS_TIME;
+		hfeatures->features |= SBI_HART_HAS_TIME;
 }
 
 int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	int rc;
-	unsigned long *hart_features;
 
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
 
 		hart_features_offset = sbi_scratch_alloc_offset(
-						sizeof(*hart_features),
+						sizeof(struct hart_features),
 						"HART_FEATURES");
 		if (!hart_features_offset)
 			return SBI_ENOMEM;
 	}
 
-	hart_features = sbi_scratch_offset_ptr(scratch, hart_features_offset);
-	*hart_features = 0;
-
 	hart_detect_features(scratch);
 
 	mstatus_init(scratch, hartid);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 7b8d6a79d7a..a7fb848742b 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -68,6 +68,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Boot HART ISA       : %s\n", str);
 	sbi_hart_get_features_str(scratch, str, sizeof(str));
 	sbi_printf("BOOT HART Features  : %s\n", str);
+	sbi_printf("BOOT HART PMP Count : %d\n", sbi_hart_pmp_count(scratch));
 
 	/* Firmware details */
 	sbi_printf("Firmware Base       : 0x%lx\n", scratch->fw_start);
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 6b11b415e58..49848b2d5ad 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -8,7 +8,6 @@
  */
 
 #include <libfdt.h>
-#include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_hart.h>
@@ -183,6 +182,15 @@ int fdt_reserved_memory_fixup(void *fdt)
 			return err;
 	}
 
+	/*
+	 * We assume the given device tree does not contain any memory region
+	 * child node protected by PMP. Normally PMP programming happens at
+	 * M-mode firmware. The memory space used by OpenSBI is protected.
+	 * Some additional memory spaces may be protected by platform codes.
+	 *
+	 * With above assumption, we create child nodes directly.
+	 */
+
 	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP)) {
 		/*
 		 * Update the DT with firmware start & size even if PMP is not
@@ -193,24 +201,18 @@ int fdt_reserved_memory_fixup(void *fdt)
 		size = (1UL << log2roundup(scratch->fw_size));
 		return fdt_resv_memory_update_node(fdt, addr, size, 0, parent);
 	}
-	/*
-	 * We assume the given device tree does not contain any memory region
-	 * child node protected by PMP. Normally PMP programming happens at
-	 * M-mode firmware. The memory space used by OpenSBI is protected.
-	 * Some additional memory spaces may be protected by platform codes.
-	 *
-	 * With above assumption, we create child nodes directly.
-	 */
 
-	for (i = 0, j = 0; i < PMP_COUNT; i++) {
-		pmp_get(i, &prot, &addr, &size);
+	for (i = 0, j = 0; i < sbi_hart_pmp_count(scratch); i++) {
+		err = sbi_hart_pmp_get(scratch, i, &prot, &addr, &size);
+		if (err)
+			continue;
 		if (!(prot & PMP_A))
 			continue;
-		if (!(prot & (PMP_R | PMP_W | PMP_X))) {
-			return fdt_resv_memory_update_node(fdt, addr, size,
-							   j, parent);
-			j++;
-		}
+		if (prot & (PMP_R | PMP_W | PMP_X))
+			continue;
+
+		fdt_resv_memory_update_node(fdt, addr, size, j, parent);
+		j++;
 	}
 
 	return 0;

From 89ba63493c4ce98861144180e408d6db391fd1c3 Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <git@danielschaefer.me>
Date: Fri, 15 May 2020 11:34:55 +0200
Subject: [PATCH 0598/1765] include: sbi: Add firmware extension constants

Cc: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <git@danielschaefer.me>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 225dcd42b1c..0cdde393d6b 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -67,6 +67,8 @@
 #define SBI_SPEC_VERSION_MINOR_MASK		0xffffff
 #define SBI_EXT_VENDOR_START			0x09000000
 #define SBI_EXT_VENDOR_END			0x09FFFFFF
+#define SBI_EXT_FIRMWARE_START			0x0A000000
+#define SBI_EXT_FIRMWARE_END			0x0AFFFFFF
 /* clang-format on */
 
 #endif

From 73d6ef3b2933ccf0b3a8a0ba110bf53ad9720b51 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 12 May 2020 10:14:43 +0530
Subject: [PATCH 0599/1765] lib: utils: Remove redundant parameters from PLIC
 init functions

The "target_hart" and "hart_count" parameters of PLIC cold and
warm init functions are only used for sanity checks and not
required in PLIC initialization.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/irqchip/plic.h     |  4 ++--
 lib/utils/irqchip/fdt_irqchip_plic.c | 10 ++--------
 lib/utils/irqchip/plic.c             |  9 ++-------
 platform/andes/ae350/platform.c      |  5 ++---
 platform/fpga/ariane/platform.c      | 11 +++--------
 platform/fpga/openpiton/platform.c   | 11 +++--------
 platform/kendryte/k210/platform.c    |  5 ++---
 platform/nuclei/ux600/platform.c     |  5 ++---
 platform/sifive/fu540/platform.c     |  5 ++---
 platform/template/platform.c         |  5 ++---
 10 files changed, 22 insertions(+), 48 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 8e190ce4a4d..68034beaf2c 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -12,9 +12,9 @@
 
 #include <sbi/sbi_types.h>
 
-int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
+int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id);
 
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources);
 
 void plic_set_thresh(u32 cntxid, u32 val);
 
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 5bac6a7a8b5..11ed300515c 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -21,8 +21,7 @@ static int irqchip_plic_warm_init(void)
 {
 	u32 hartid = current_hartid();
 
-	return plic_warm_irqchip_init(hartid,
-				      plic_hartid2context[hartid][0],
+	return plic_warm_irqchip_init(plic_hartid2context[hartid][0],
 				      plic_hartid2context[hartid][1]);
 }
 
@@ -78,18 +77,13 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	u32 max_hartid;
 	struct platform_plic_data plic;
 
-	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
-	if (rc)
-		return rc;
-
 	rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
 	if (rc)
 		return rc;
 
-	rc = plic_cold_irqchip_init(plic.addr, plic.num_src, max_hartid + 1);
+	rc = plic_cold_irqchip_init(plic.addr, plic.num_src);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 7c40d287839..8975729c4c3 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -20,7 +20,6 @@
 #define PLIC_CONTEXT_BASE 0x200000
 #define PLIC_CONTEXT_STRIDE 0x1000
 
-static u32 plic_hart_count;
 static u32 plic_num_sources;
 static volatile void *plic_base;
 
@@ -45,13 +44,10 @@ void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
 	writel(val, plic_ie + word_index * 4);
 }
 
-int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
+int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic_num_sources / 32 + 1;
 
-	if (plic_hart_count <= target_hart)
-		return -1;
-
 	/* By default, disable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
@@ -75,11 +71,10 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
 	return 0;
 }
 
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count)
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources)
 {
 	int i;
 
-	plic_hart_count	 = hart_count;
 	plic_num_sources = num_sources;
 	plic_base	 = (void *)base;
 
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 774ea90c680..16443fb08d2 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -71,13 +71,12 @@ static int ae350_irqchip_init(bool cold_boot)
 
 	if (cold_boot) {
 		ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
-					     AE350_PLIC_NUM_SOURCES,
-					     AE350_HART_COUNT);
+					     AE350_PLIC_NUM_SOURCES);
 		if (ret)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
 }
 
 /* Initialize IPI for current HART. */
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index ba9ef9dc60a..c3f3f654ef3 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -63,13 +63,10 @@ static int ariane_console_init(void)
 			     ARIANE_UART_REG_WIDTH);
 }
 
-static int plic_ariane_warm_irqchip_init(u32 target_hart,
-			   int m_cntx_id, int s_cntx_id)
+static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
 
-	if (ARIANE_HART_COUNT <= target_hart)
-		return -1;
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
@@ -99,14 +96,12 @@ static int ariane_irqchip_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(ARIANE_PLIC_ADDR,
-					     ARIANE_PLIC_NUM_SOURCES,
+		ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
 					     ARIANE_HART_COUNT);
 		if (ret)
 			return ret;
 	}
-	return plic_ariane_warm_irqchip_init(hartid,
-					2 * hartid, 2 * hartid + 1);
+	return plic_ariane_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 776ca35e3d2..781da177008 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -95,13 +95,10 @@ static int openpiton_console_init(void)
 			     OPENPITON_DEFAULT_UART_REG_WIDTH);
 }
 
-static int plic_openpiton_warm_irqchip_init(u32 target_hart,
-			   int m_cntx_id, int s_cntx_id)
+static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words = plic.num_src / 32 + 1;
 
-	if (target_hart >= OPENPITON_DEFAULT_HART_COUNT)
-		return -1;
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
@@ -132,13 +129,11 @@ static int openpiton_irqchip_init(bool cold_boot)
 
 	if (cold_boot) {
 		ret = plic_cold_irqchip_init(plic.addr,
-					     plic.num_src,
-					     OPENPITON_DEFAULT_HART_COUNT);
+					     plic.num_src);
 		if (ret)
 			return ret;
 	}
-	return plic_openpiton_warm_irqchip_init(hartid,
-					2 * hartid, 2 * hartid + 1);
+	return plic_openpiton_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 69c0e2149cb..c852e7f68c2 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -59,13 +59,12 @@ static int k210_irqchip_init(bool cold_boot)
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
-					    K210_PLIC_NUM_SOURCES,
-					    K210_HART_COUNT);
+					    K210_PLIC_NUM_SOURCES);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid, hartid * 2, hartid * 2 + 1);
+	return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
 }
 
 static int k210_ipi_init(bool cold_boot)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 6c8bf4d5811..914cf996525 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -74,13 +74,12 @@ static int ux600_irqchip_init(bool cold_boot)
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
-					    UX600_PLIC_NUM_SOURCES,
-					    UX600_HART_COUNT);
+					    UX600_PLIC_NUM_SOURCES);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+	return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
 				      (hartid) ? (2 * hartid) : -1);
 }
 
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index aeb2f41677b..bef17f19756 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -89,13 +89,12 @@ static int fu540_irqchip_init(bool cold_boot)
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
-					    FU540_PLIC_NUM_SOURCES,
-					    FU540_HART_COUNT);
+					    FU540_PLIC_NUM_SOURCES);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+	return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
 				      (hartid) ? (2 * hartid) : -1);
 }
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 84fbf561354..3a3bdac5032 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -71,13 +71,12 @@ static int platform_irqchip_init(bool cold_boot)
 	/* Example if the generic PLIC driver is used */
 	if (cold_boot) {
 		ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
-					     PLATFORM_PLIC_NUM_SOURCES,
-					     PLATFORM_HART_COUNT);
+					     PLATFORM_PLIC_NUM_SOURCES);
 		if (ret)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
 }
 
 /*

From 446a9c6d1eb97fcedd6a94ac76d15e941a6087a8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 12 May 2020 12:57:52 +0530
Subject: [PATCH 0600/1765] lib: utils: Allow PLIC functions to be used for
 multiple PLICs

We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h   | 13 ++----
 include/sbi_utils/irqchip/plic.h     | 14 +++++--
 lib/utils/fdt/fdt_helper.c           | 11 +++--
 lib/utils/irqchip/fdt_irqchip_plic.c |  6 +--
 lib/utils/irqchip/plic.c             | 60 +++++++++++++++++-----------
 platform/andes/ae350/platform.c      | 10 +++--
 platform/fpga/ariane/platform.c      | 16 +++++---
 platform/fpga/openpiton/platform.c   | 29 +++++++-------
 platform/kendryte/k210/platform.c    | 10 +++--
 platform/nuclei/ux600/platform.c     | 10 +++--
 platform/sifive/fu540/platform.c     | 10 +++--
 platform/template/platform.c         | 20 ++++++++--
 12 files changed, 127 insertions(+), 82 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 6be942a17ae..42390e8fd36 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -25,11 +25,6 @@ struct platform_uart_data {
 	unsigned long reg_io_width;
 };
 
-struct platform_plic_data {
-	unsigned long addr;
-	unsigned long num_src;
-};
-
 const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 				       const struct fdt_match *match_table);
 
@@ -52,11 +47,11 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
-int fdt_parse_plic_node(void *fdt, int nodeoffset,
-			struct platform_plic_data *plic);
+struct plic_data;
+
+int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 
-int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
-		   const char *compatible);
+int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
 int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
 			  const char *compatible);
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 68034beaf2c..0e56d801ef5 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -12,12 +12,18 @@
 
 #include <sbi/sbi_types.h>
 
-int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id);
+struct plic_data {
+	unsigned long addr;
+	unsigned long num_src;
+};
 
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources);
+int plic_warm_irqchip_init(struct plic_data *plic,
+			   int m_cntx_id, int s_cntx_id);
 
-void plic_set_thresh(u32 cntxid, u32 val);
+int plic_cold_irqchip_init(struct plic_data *plic);
 
-void plic_set_ie(u32 cntxid, u32 word_index, u32 val);
+void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val);
+
+void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val);
 
 #endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index ee733e79234..61d70d97939 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/plic.h>
 
 #define DEFAULT_UART_FREQ		0
 #define DEFAULT_UART_BAUD		115200
@@ -259,8 +260,7 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
 }
 
-int fdt_parse_plic_node(void *fdt, int nodeoffset,
-			struct platform_plic_data *plic)
+int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 {
 	int len, rc;
 	const fdt32_t *val;
@@ -281,15 +281,14 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_plic(void *fdt, struct platform_plic_data *plic,
-		   const char *compatible)
+int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 {
 	int nodeoffset;
 
-	if (!compatible || !plic || !fdt)
+	if (!compat || !plic || !fdt)
 		return SBI_ENODEV;
 
-	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+	nodeoffset = fdt_node_offset_by_compatible(fdt, -1, compat);
 	if (nodeoffset < 0)
 		return nodeoffset;
 
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 11ed300515c..e0ad3e22367 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -15,13 +15,14 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/plic.h>
 
+static struct plic_data plic;
 static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
 
 static int irqchip_plic_warm_init(void)
 {
 	u32 hartid = current_hartid();
 
-	return plic_warm_irqchip_init(plic_hartid2context[hartid][0],
+	return plic_warm_irqchip_init(&plic, plic_hartid2context[hartid][0],
 				      plic_hartid2context[hartid][1]);
 }
 
@@ -77,13 +78,12 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	struct platform_plic_data plic;
 
 	rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
 	if (rc)
 		return rc;
 
-	rc = plic_cold_irqchip_init(plic.addr, plic.num_src);
+	rc = plic_cold_irqchip_init(&plic);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 8975729c4c3..7665c62ee63 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -10,6 +10,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/irqchip/plic.h>
 
@@ -20,67 +21,80 @@
 #define PLIC_CONTEXT_BASE 0x200000
 #define PLIC_CONTEXT_STRIDE 0x1000
 
-static u32 plic_num_sources;
-static volatile void *plic_base;
-
-static void plic_set_priority(u32 source, u32 val)
+static void plic_set_priority(struct plic_data *plic, u32 source, u32 val)
 {
-	volatile void *plic_priority =
-		plic_base + PLIC_PRIORITY_BASE + 4 * source;
+	volatile void *plic_priority = (void *)plic->addr +
+			PLIC_PRIORITY_BASE + 4 * source;
 	writel(val, plic_priority);
 }
 
-void plic_set_thresh(u32 cntxid, u32 val)
+void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
 {
-	volatile void *plic_thresh =
-		plic_base + PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
+	volatile void *plic_thresh;
+
+	if (!plic)
+		return;
+
+	plic_thresh = (void *)plic->addr +
+		      PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
 	writel(val, plic_thresh);
 }
 
-void plic_set_ie(u32 cntxid, u32 word_index, u32 val)
+void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
 {
-	volatile void *plic_ie =
-		plic_base + PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
+	volatile void *plic_ie;
+
+	if (!plic)
+		return;
+
+	plic_ie = (void *)plic->addr +
+		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
 	writel(val, plic_ie + word_index * 4);
 }
 
-int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
+int plic_warm_irqchip_init(struct plic_data *plic,
+			   int m_cntx_id, int s_cntx_id)
 {
-	size_t i, ie_words = plic_num_sources / 32 + 1;
+	size_t i, ie_words;
+
+	if (!plic)
+		return SBI_EINVAL;
+
+	ie_words = plic->num_src / 32 + 1;
 
 	/* By default, disable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(m_cntx_id, i, 0);
+			plic_set_ie(plic, m_cntx_id, i, 0);
 	}
 
 	/* By default, disable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(s_cntx_id, i, 0);
+			plic_set_ie(plic, s_cntx_id, i, 0);
 	}
 
 	/* By default, disable M-mode threshold */
 	if (m_cntx_id > -1)
-		plic_set_thresh(m_cntx_id, 0x7);
+		plic_set_thresh(plic, m_cntx_id, 0x7);
 
 	/* By default, disable S-mode threshold */
 	if (s_cntx_id > -1)
-		plic_set_thresh(s_cntx_id, 0x7);
+		plic_set_thresh(plic, s_cntx_id, 0x7);
 
 	return 0;
 }
 
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources)
+int plic_cold_irqchip_init(struct plic_data *plic)
 {
 	int i;
 
-	plic_num_sources = num_sources;
-	plic_base	 = (void *)base;
+	if (!plic)
+		return SBI_EINVAL;
 
 	/* Configure default priorities of all IRQs */
-	for (i = 1; i <= plic_num_sources; i++)
-		plic_set_priority(i, 0);
+	for (i = 1; i <= plic->num_src; i++)
+		plic_set_priority(plic, i, 0);
 
 	return 0;
 }
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 16443fb08d2..9f013d870e6 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -20,6 +20,11 @@
 #include "plicsw.h"
 #include "plmt.h"
 
+static struct plic_data plic = {
+	.addr = AE350_PLIC_ADDR,
+	.num_src = AE350_PLIC_NUM_SOURCES,
+};
+
 /* Platform final initialization. */
 static int ae350_final_init(bool cold_boot)
 {
@@ -70,13 +75,12 @@ static int ae350_irqchip_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
-					     AE350_PLIC_NUM_SOURCES);
+		ret = plic_cold_irqchip_init(&plic);
 		if (ret)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
 }
 
 /* Initialize IPI for current HART. */
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index c3f3f654ef3..275f2cefd61 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -26,6 +26,11 @@
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR 0x2000000
 
+static struct plic_data plic = {
+	.addr = ARIANE_PLIC_ADDR,
+	.num_src = ARIANE_PLIC_NUM_SOURCES,
+};
+
 /*
  * Ariane platform early initialization.
  */
@@ -70,19 +75,19 @@ static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(m_cntx_id, i, 1);
+			plic_set_ie(&plic, m_cntx_id, i, 1);
 	}
 	/* Enable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(s_cntx_id, i, 1);
+			plic_set_ie(&plic, s_cntx_id, i, 1);
 	}
 	/* By default, enable M-mode threshold */
 	if (m_cntx_id > -1)
-		plic_set_thresh(m_cntx_id, 1);
+		plic_set_thresh(&plic, m_cntx_id, 1);
 	/* By default, disable S-mode threshold */
 	if (s_cntx_id > -1)
-		plic_set_thresh(s_cntx_id, 0);
+		plic_set_thresh(&plic, s_cntx_id, 0);
 
 	return 0;
 }
@@ -96,8 +101,7 @@ static int ariane_irqchip_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
-					     ARIANE_HART_COUNT);
+		ret = plic_cold_irqchip_init(&plic);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 781da177008..e56ee51bae0 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -27,14 +27,14 @@
 #define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
 
 static struct platform_uart_data uart = {
-		OPENPITON_DEFAULT_UART_ADDR,
-		OPENPITON_DEFAULT_UART_FREQ,
-		OPENPITON_DEFAULT_UART_BAUDRATE,
-	};
-static struct platform_plic_data plic = {
-		OPENPITON_DEFAULT_PLIC_ADDR,
-		OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
-	};
+	OPENPITON_DEFAULT_UART_ADDR,
+	OPENPITON_DEFAULT_UART_FREQ,
+	OPENPITON_DEFAULT_UART_BAUDRATE,
+};
+static struct plic_data plic = {
+	.addr = OPENPITON_DEFAULT_PLIC_ADDR,
+	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
+};
 static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR;
 
 /*
@@ -44,7 +44,7 @@ static int openpiton_early_init(bool cold_boot)
 {
 	void *fdt;
 	struct platform_uart_data uart_data;
-	struct platform_plic_data plic_data;
+	struct plic_data plic_data;
 	unsigned long clint_data;
 	int rc;
 
@@ -102,19 +102,19 @@ static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(m_cntx_id, i, 1);
+			plic_set_ie(&plic, m_cntx_id, i, 1);
 	}
 	/* Enable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
 		for (i = 0; i < ie_words; i++)
-			plic_set_ie(s_cntx_id, i, 1);
+			plic_set_ie(&plic, s_cntx_id, i, 1);
 	}
 	/* By default, enable M-mode threshold */
 	if (m_cntx_id > -1)
-		plic_set_thresh(m_cntx_id, 1);
+		plic_set_thresh(&plic, m_cntx_id, 1);
 	/* By default, disable S-mode threshold */
 	if (s_cntx_id > -1)
-		plic_set_thresh(s_cntx_id, 0);
+		plic_set_thresh(&plic, s_cntx_id, 0);
 
 	return 0;
 }
@@ -128,8 +128,7 @@ static int openpiton_irqchip_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(plic.addr,
-					     plic.num_src);
+		ret = plic_cold_irqchip_init(&plic);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index c852e7f68c2..db2186abb5e 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -17,6 +17,11 @@
 #include <sbi_utils/sys/clint.h>
 #include "platform.h"
 
+static struct plic_data plic = {
+	.addr = K210_PLIC_BASE_ADDR,
+	.num_src = K210_PLIC_NUM_SOURCES,
+};
+
 static u32 k210_get_clk_freq(void)
 {
 	u32 clksel0, pll0;
@@ -58,13 +63,12 @@ static int k210_irqchip_init(bool cold_boot)
 	u32 hartid = current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
-					    K210_PLIC_NUM_SOURCES);
+		rc = plic_cold_irqchip_init(&plic);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
+	return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
 }
 
 static int k210_ipi_init(bool cold_boot)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 914cf996525..f999c99657c 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -43,6 +43,11 @@
 
 /* clang-format on */
 
+static struct plic_data plic = {
+	.addr = UX600_PLIC_ADDR,
+	.num_src = UX600_PLIC_NUM_SOURCES,
+};
+
 static void ux600_modify_dt(void *fdt)
 {
 	fdt_fixups(fdt);
@@ -73,13 +78,12 @@ static int ux600_irqchip_init(bool cold_boot)
 	u32 hartid = current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
-					    UX600_PLIC_NUM_SOURCES);
+		rc = plic_cold_irqchip_init(&plic);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
+	return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
 				      (hartid) ? (2 * hartid) : -1);
 }
 
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index bef17f19756..7a62fc30c0f 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -46,6 +46,11 @@
 
 /* clang-format on */
 
+static struct plic_data plic = {
+	.addr = FU540_PLIC_ADDR,
+	.num_src = FU540_PLIC_NUM_SOURCES,
+};
+
 static void fu540_modify_dt(void *fdt)
 {
 	fdt_cpu_fixup(fdt);
@@ -88,13 +93,12 @@ static int fu540_irqchip_init(bool cold_boot)
 	u32 hartid = current_hartid();
 
 	if (cold_boot) {
-		rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
-					    FU540_PLIC_NUM_SOURCES);
+		rc = plic_cold_irqchip_init(&plic);
 		if (rc)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
+	return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
 				      (hartid) ? (2 * hartid) : -1);
 }
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 3a3bdac5032..c8453807a78 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -17,6 +17,19 @@
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
 
+#define PLATFORM_PLIC_ADDR			0xc000000
+#define PLATFORM_PLIC_NUM_SOURCES		128
+#define PLATFORM_HART_COUNT			4
+#define PLATFORM_CLINT_ADDR			0x2000000
+#define PLATFORM_UART_ADDR		0x09000000
+#define PLATFORM_UART_INPUT_FREQ	10000000
+#define PLATFORM_UART_BAUDRATE		115200
+
+static struct plic_data plic = {
+	.addr = PLATFORM_PLIC_ADDR,
+	.num_src = PLATFORM_PLIC_NUM_SOURCES,
+};
+
 /*
  * Platform early initialization.
  */
@@ -39,7 +52,7 @@ static int platform_final_init(bool cold_boot)
 static int platform_console_init(void)
 {
 	/* Example if the generic UART8250 driver is used */
-	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_SHIFTREG_ADDR,
+	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
 			     PLATFORM_UART_BAUDRATE, 0, 1);
 }
 
@@ -70,13 +83,12 @@ static int platform_irqchip_init(bool cold_boot)
 
 	/* Example if the generic PLIC driver is used */
 	if (cold_boot) {
-		ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
-					     PLATFORM_PLIC_NUM_SOURCES);
+		ret = plic_cold_irqchip_init(&plic);
 		if (ret)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
 }
 
 /*

From 2c685c214f2815c12f9d70422d85daa7f48003cf Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 12 May 2020 13:59:52 +0530
Subject: [PATCH 0601/1765] lib: utils: Extend fdt_find_match() Implementation

We extend fdt_find_match() implementation by adding node offset
parameter which represents the first node to match from.

The improved fdt_find_match() can be used to find multiple
match nodes.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 3 ++-
 lib/utils/fdt/fdt_helper.c         | 5 +++--
 lib/utils/ipi/fdt_ipi.c            | 2 +-
 lib/utils/irqchip/fdt_irqchip.c    | 2 +-
 lib/utils/reset/fdt_reset.c        | 2 +-
 lib/utils/serial/fdt_serial.c      | 2 +-
 lib/utils/timer/fdt_timer.c        | 2 +-
 platform/generic/platform.c        | 2 +-
 8 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 42390e8fd36..72fb1673c79 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -28,7 +28,8 @@ struct platform_uart_data {
 const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 				       const struct fdt_match *match_table);
 
-int fdt_find_match(void *fdt, const struct fdt_match *match_table,
+int fdt_find_match(void *fdt, int startoff,
+		   const struct fdt_match *match_table,
 		   const struct fdt_match **out_match);
 
 int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 61d70d97939..58f8951638c 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -43,7 +43,8 @@ const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 	return NULL;
 }
 
-int fdt_find_match(void *fdt, const struct fdt_match *match_table,
+int fdt_find_match(void *fdt, int startoff,
+		   const struct fdt_match *match_table,
 		   const struct fdt_match **out_match)
 {
 	int nodeoff;
@@ -52,7 +53,7 @@ int fdt_find_match(void *fdt, const struct fdt_match *match_table,
 		return SBI_ENODEV;
 
 	while (match_table->compatible) {
-		nodeoff = fdt_node_offset_by_compatible(fdt, -1,
+		nodeoff = fdt_node_offset_by_compatible(fdt, startoff,
 						match_table->compatible);
 		if (nodeoff >= 0) {
 			if (out_match)
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index d8ba0b24f60..d99a9414263 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -69,7 +69,7 @@ static int fdt_ipi_cold_init(void)
 	for (pos = 0; pos < array_size(ipi_drivers); pos++) {
 		drv = ipi_drivers[pos];
 
-		noff = fdt_find_match(fdt, drv->match_table, &match);
+		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
 			continue;
 
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 5f5cf97d7d7..87def5252d5 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -42,7 +42,7 @@ static int fdt_irqchip_cold_init(void)
 	for (pos = 0; pos < array_size(irqchip_drivers); pos++) {
 		drv = irqchip_drivers[pos];
 
-		noff = fdt_find_match(fdt, drv->match_table, &match);
+		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
 			continue;
 
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 98fbb549d36..dfbd33ef874 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -38,7 +38,7 @@ int fdt_reset_init(void)
 	for (pos = 0; pos < array_size(reset_drivers); pos++) {
 		drv = reset_drivers[pos];
 
-		noff = fdt_find_match(fdt, drv->match_table, &match);
+		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
 			continue;
 
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index ae1aeea9326..fa6c478596b 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -91,7 +91,7 @@ int fdt_serial_init(void)
 	for (pos = 0; pos < array_size(serial_drivers); pos++) {
 		drv = serial_drivers[pos];
 
-		noff = fdt_find_match(fdt, drv->match_table, &match);
+		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
 			continue;
 
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 1ad08fe4f31..46edb83afa9 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -80,7 +80,7 @@ static int fdt_timer_cold_init(void)
 	for (pos = 0; pos < array_size(timer_drivers); pos++) {
 		drv = timer_drivers[pos];
 
-		noff = fdt_find_match(fdt, drv->match_table, &match);
+		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
 			continue;
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 7b4a0aef337..a4a07e3988d 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -41,7 +41,7 @@ static void fw_platform_lookup_special(void *fdt, int root_offset)
 		if (!plat->match_table)
 			continue;
 
-		noff = fdt_find_match(fdt, plat->match_table, &match);
+		noff = fdt_find_match(fdt, -1, plat->match_table, &match);
 		if (noff < 0)
 			continue;
 

From d30bb684481b6be642a0eaa9e7f0778d6519cc15 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 12 May 2020 14:59:59 +0530
Subject: [PATCH 0602/1765] lib: utils/irqchip: Initialize all matching irqchip
 DT nodes

We can have multiple matching DT nodes of the same FDT irqchip
driver so in this case we should call cold_init() for all matching
DT nodes instead of just first matching DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/irqchip/fdt_irqchip.c      | 22 ++++++++-------
 lib/utils/irqchip/fdt_irqchip_plic.c | 40 +++++++++++++++++++---------
 2 files changed, 40 insertions(+), 22 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 87def5252d5..3630be657ae 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -42,17 +42,19 @@ static int fdt_irqchip_cold_init(void)
 	for (pos = 0; pos < array_size(irqchip_drivers); pos++) {
 		drv = irqchip_drivers[pos];
 
-		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-		if (noff < 0)
-			continue;
-
-		if (drv->cold_init) {
-			rc = drv->cold_init(fdt, noff, match);
-			if (rc)
-				return rc;
+		noff = -1;
+		while ((noff = fdt_find_match(fdt, noff,
+					drv->match_table, &match)) >= 0) {
+			if (drv->cold_init) {
+				rc = drv->cold_init(fdt, noff, match);
+				if (rc)
+					return rc;
+			}
+			current_driver = drv;
 		}
-		current_driver = drv;
-		break;
+
+		if (current_driver)
+			break;
 	}
 
 	return 0;
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index e0ad3e22367..18d2797c93c 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -15,28 +15,30 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/plic.h>
 
-static struct plic_data plic;
+#define PLIC_MAX_NR			16
+
+static unsigned long plic_count = 0;
+static struct plic_data plic[PLIC_MAX_NR];
+
+static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
 static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
 
 static int irqchip_plic_warm_init(void)
 {
 	u32 hartid = current_hartid();
 
-	return plic_warm_irqchip_init(&plic, plic_hartid2context[hartid][0],
+	return plic_warm_irqchip_init(plic_hartid2data[hartid],
+				      plic_hartid2context[hartid][0],
 				      plic_hartid2context[hartid][1]);
 }
 
-static int irqchip_plic_parse_hartid2context(void *fdt, int nodeoff)
+static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
+					    struct plic_data *pd)
 {
 	const fdt32_t *val;
 	u32 phandle, hwirq, hartid;
 	int i, err, count, cpu_offset, cpu_intc_offset;
 
-	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		plic_hartid2context[i][0] = -1;
-		plic_hartid2context[i][1] = -1;
-	}
-
 	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
 	if (!val || count < sizeof(fdt32_t))
 		return SBI_EINVAL;
@@ -61,6 +63,7 @@ static int irqchip_plic_parse_hartid2context(void *fdt, int nodeoff)
 		if (SBI_HARTMASK_MAX_BITS <= hartid)
 			continue;
 
+		plic_hartid2data[hartid] = pd;
 		switch (hwirq) {
 		case IRQ_M_EXT:
 			plic_hartid2context[hartid][0] = i / 2;
@@ -77,17 +80,30 @@ static int irqchip_plic_parse_hartid2context(void *fdt, int nodeoff)
 static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
-	int rc;
+	int i, rc;
+	struct plic_data *pd;
 
-	rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
+	if (PLIC_MAX_NR <= plic_count)
+		return SBI_ENOSPC;
+	pd = &plic[plic_count++];
+
+	rc = fdt_parse_plic_node(fdt, nodeoff, pd);
 	if (rc)
 		return rc;
 
-	rc = plic_cold_irqchip_init(&plic);
+	rc = plic_cold_irqchip_init(pd);
 	if (rc)
 		return rc;
 
-	return irqchip_plic_parse_hartid2context(fdt, nodeoff);
+	if (plic_count == 1) {
+		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+			plic_hartid2data[i] = NULL;
+			plic_hartid2context[i][0] = -1;
+			plic_hartid2context[i][1] = -1;
+		}
+	}
+
+	return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
 }
 
 static const struct fdt_match irqchip_plic_match[] = {

From a9a97511851198559e75640a9e5e67f65695dc2e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 12 May 2020 18:38:31 +0530
Subject: [PATCH 0603/1765] lib: utils: Allow CLINT functions to be used for
 multiple CLINTs

We extend CLINT cold init function to have a "struct clint_data *"
parameter pointing to CLINT details. This allows platforms to use
CLINT functions for multiple CLINT instances.

When multiple CLINTs are present, the platform can also provide
one of the CLINT as reference CLINT for other CLINTs. This will
help CLINTs to sync their time value with reference CLINT using
a time_delta computed in warm init function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/sys/clint.h      |  23 ++++-
 lib/utils/ipi/fdt_ipi_clint.c      |  10 +-
 lib/utils/sys/clint.c              | 142 +++++++++++++++++++----------
 lib/utils/timer/fdt_timer_clint.c  |   9 +-
 platform/fpga/ariane/platform.c    |  15 ++-
 platform/fpga/openpiton/platform.c |  20 ++--
 platform/kendryte/k210/platform.c  |  13 ++-
 platform/nuclei/ux600/platform.c   |  12 ++-
 platform/sifive/fu540/platform.c   |  12 ++-
 platform/template/platform.c       |  21 +++--
 platform/thead/c910/platform.c     |  14 ++-
 11 files changed, 203 insertions(+), 88 deletions(-)

diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
index a26f1481087..b07cf62ef0e 100644
--- a/include/sbi_utils/sys/clint.h
+++ b/include/sbi_utils/sys/clint.h
@@ -12,13 +12,30 @@
 
 #include <sbi/sbi_types.h>
 
+struct clint_data {
+	/* Public details */
+	unsigned long addr;
+	u32 first_hartid;
+	u32 hart_count;
+	bool has_64bit_mmio;
+	/* Private details (initialized and used by CLINT library)*/
+	u32 *ipi;
+	struct clint_data *time_delta_reference;
+	unsigned long time_delta_computed;
+	u64 time_delta;
+	u64 *time_val;
+	u64 *time_cmp;
+	u64 (*time_rd)(volatile u64 *addr);
+	void (*time_wr)(u64 value, volatile u64 *addr);
+};
+
 void clint_ipi_send(u32 target_hart);
 
 void clint_ipi_clear(u32 target_hart);
 
 int clint_warm_ipi_init(void);
 
-int clint_cold_ipi_init(unsigned long base, u32 hart_count);
+int clint_cold_ipi_init(struct clint_data *clint);
 
 u64 clint_timer_value(void);
 
@@ -28,7 +45,7 @@ void clint_timer_event_start(u64 next_event);
 
 int clint_warm_timer_init(void);
 
-int clint_cold_timer_init(unsigned long base, u32 hart_count,
-			  bool has_64bit_mmio);
+int clint_cold_timer_init(struct clint_data *clint,
+			  struct clint_data *reference);
 
 #endif
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index 05b66c60987..c4ac0df4cb2 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -11,6 +11,8 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/sys/clint.h>
 
+static struct clint_data clint_ipi;
+
 static int ipi_clint_cold_init(void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
@@ -26,7 +28,13 @@ static int ipi_clint_cold_init(void *fdt, int nodeoff,
 	if (rc)
 		return rc;
 
-	return clint_cold_ipi_init(addr, max_hartid + 1);
+	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
+	clint_ipi.addr = addr;
+	clint_ipi.first_hartid = 0;
+	clint_ipi.hart_count = max_hartid + 1;
+	clint_ipi.has_64bit_mmio = TRUE;
+
+	return clint_cold_ipi_init(&clint_ipi);
 }
 
 static const struct fdt_match ipi_clint_match[] = {
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 22ba088e742..7a392aad83b 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -10,57 +10,70 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi_utils/sys/clint.h>
 
-static u32 clint_ipi_hart_count;
-static volatile void *clint_ipi_base;
-static volatile u32 *clint_ipi;
+#define CLINT_IPI_OFF		0
+#define CLINT_TIME_CMP_OFF	0x4000
+#define CLINT_TIME_VAL_OFF	0xbff8
+
+static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS];
 
 void clint_ipi_send(u32 target_hart)
 {
-	if (clint_ipi_hart_count <= target_hart)
+	struct clint_data *clint;
+
+	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+		return;
+	clint = clint_ipi_hartid2data[target_hart];
+	if (!clint)
 		return;
 
 	/* Set CLINT IPI */
-	writel(1, &clint_ipi[target_hart]);
+	writel(1, &clint->ipi[target_hart - clint->first_hartid]);
 }
 
 void clint_ipi_clear(u32 target_hart)
 {
-	if (clint_ipi_hart_count <= target_hart)
+	struct clint_data *clint;
+
+	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+		return;
+	clint = clint_ipi_hartid2data[target_hart];
+	if (!clint)
 		return;
 
 	/* Clear CLINT IPI */
-	writel(0, &clint_ipi[target_hart]);
+	writel(0, &clint->ipi[target_hart - clint->first_hartid]);
 }
 
 int clint_warm_ipi_init(void)
 {
-	u32 hartid = current_hartid();
-
-	if (!clint_ipi_base)
-		return -1;
-
-	/* Clear CLINT IPI */
-	clint_ipi_clear(hartid);
+	/* Clear CLINT IPI for current HART */
+	clint_ipi_clear(current_hartid());
 
 	return 0;
 }
 
-int clint_cold_ipi_init(unsigned long base, u32 hart_count)
+int clint_cold_ipi_init(struct clint_data *clint)
 {
-	/* Figure-out CLINT IPI register address */
-	clint_ipi_hart_count = hart_count;
-	clint_ipi_base	     = (void *)base;
-	clint_ipi	     = (u32 *)clint_ipi_base;
+	u32 i;
+
+	if (!clint)
+		return SBI_EINVAL;
+
+	/* Initialize private data */
+	clint->ipi = (void *)clint->addr;
+
+	/* Update IPI hartid table */
+	for (i = 0; i < clint->hart_count; i++)
+		clint_ipi_hartid2data[clint->first_hartid + i] = clint;
 
 	return 0;
 }
 
-static u32 clint_time_hart_count;
-static volatile void *clint_time_base;
-static volatile u64 *clint_time_val;
-static volatile u64 *clint_time_cmp;
+static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS];
 
 #if __riscv_xlen != 32
 static u64 clint_time_rd64(volatile u64 *addr)
@@ -94,66 +107,97 @@ static void clint_time_wr32(u64 value, volatile u64 *addr)
 	writel_relaxed(value >> 32, (void *)(addr) + 0x04);
 }
 
-static u64 (*clint_time_rd)(volatile u64 *addr) = clint_time_rd32;
-static void (*clint_time_wr)(u64 value, volatile u64 *addr) = clint_time_wr32;
-
 u64 clint_timer_value(void)
 {
+	struct clint_data *clint = clint_timer_hartid2data[current_hartid()];
+
 	/* Read CLINT Time Value */
-	return clint_time_rd(clint_time_val);
+	return clint->time_rd(clint->time_val) + clint->time_delta;
 }
 
 void clint_timer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
-
-	if (clint_time_hart_count <= target_hart)
-		return;
+	struct clint_data *clint = clint_timer_hartid2data[target_hart];
 
 	/* Clear CLINT Time Compare */
-	clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
+	clint->time_wr(-1ULL,
+			&clint->time_cmp[target_hart - clint->first_hartid]);
 }
 
 void clint_timer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
-
-	if (clint_time_hart_count <= target_hart)
-		return;
+	struct clint_data *clint = clint_timer_hartid2data[target_hart];
 
 	/* Program CLINT Time Compare */
-	clint_time_wr(next_event, &clint_time_cmp[target_hart]);
+	clint->time_wr(next_event - clint->time_delta,
+		       &clint->time_cmp[target_hart - clint->first_hartid]);
 }
 
 int clint_warm_timer_init(void)
 {
+	u64 v1, v2, mv;
 	u32 target_hart = current_hartid();
-
-	if (clint_time_hart_count <= target_hart || !clint_time_base)
-		return -1;
+	struct clint_data *reference;
+	struct clint_data *clint = clint_timer_hartid2data[target_hart];
+
+	if (!clint)
+		return SBI_ENODEV;
+
+	/*
+	 * Compute delta if reference available
+	 *
+	 * We deliberately compute time_delta in warm init so that time_delta
+	 * is computed on a HART which is going to use given CLINT. We use
+	 * atomic flag timer_delta_computed to ensure that only one HART does
+	 * time_delta computation.
+	 */
+	if (clint->time_delta_reference) {
+		reference = clint->time_delta_reference;
+		if (!atomic_raw_xchg_ulong(&clint->time_delta_computed, 1)) {
+			v1 = clint->time_rd(clint->time_val);
+			mv = reference->time_rd(reference->time_val);
+			v2 = clint->time_rd(clint->time_val);
+			clint->time_delta = mv - ((v1 / 2) + (v2 / 2));
+		}
+	}
 
 	/* Clear CLINT Time Compare */
-	clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
+	clint->time_wr(-1ULL,
+		       &clint->time_cmp[target_hart - clint->first_hartid]);
 
 	return 0;
 }
 
-int clint_cold_timer_init(unsigned long base, u32 hart_count,
-			  bool has_64bit_mmio)
+int clint_cold_timer_init(struct clint_data *clint,
+			  struct clint_data *reference)
 {
-	/* Figure-out CLINT Time register address */
-	clint_time_hart_count		= hart_count;
-	clint_time_base			= (void *)base;
-	clint_time_val			= (u64 *)(clint_time_base + 0xbff8);
-	clint_time_cmp			= (u64 *)(clint_time_base + 0x4000);
+	u32 i;
+
+	if (!clint)
+		return SBI_EINVAL;
+
+	/* Initialize private data */
+	clint->time_delta_reference = reference;
+	clint->time_delta_computed = 0;
+	clint->time_delta = 0;
+	clint->time_val = (u64 *)((void *)clint->addr + CLINT_TIME_VAL_OFF);
+	clint->time_cmp = (u64 *)((void *)clint->addr + CLINT_TIME_CMP_OFF);
+	clint->time_rd = clint_time_rd32;
+	clint->time_wr = clint_time_wr32;
 
 	/* Override read/write accessors for 64bit MMIO */
 #if __riscv_xlen != 32
-	if (has_64bit_mmio) {
-		clint_time_rd		= clint_time_rd64;
-		clint_time_wr		= clint_time_wr64;
+	if (clint->has_64bit_mmio) {
+		clint->time_rd = clint_time_rd64;
+		clint->time_wr = clint_time_wr64;
 	}
 #endif
 
+	/* Update timer hartid table */
+	for (i = 0; i < clint->hart_count; i++)
+		clint_timer_hartid2data[clint->first_hartid + i] = clint;
+
 	return 0;
 }
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index 6aa6929f58f..2f5f283dfb6 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -11,6 +11,8 @@
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/sys/clint.h>
 
+static struct clint_data clint_timer;
+
 static int timer_clint_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
@@ -27,7 +29,12 @@ static int timer_clint_cold_init(void *fdt, int nodeoff,
 		return rc;
 
 	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
-	return clint_cold_timer_init(addr, max_hartid + 1, TRUE);
+	clint_timer.addr = addr;
+	clint_timer.first_hartid = 0;
+	clint_timer.hart_count = max_hartid + 1;
+	clint_timer.has_64bit_mmio = TRUE;
+
+	return clint_cold_timer_init(&clint_timer, NULL);
 }
 
 static const struct fdt_match timer_clint_match[] = {
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 275f2cefd61..a4d437e4977 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -24,13 +24,20 @@
 #define ARIANE_PLIC_ADDR			0xc000000
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
-#define ARIANE_CLINT_ADDR 0x2000000
+#define ARIANE_CLINT_ADDR			0x2000000
 
 static struct plic_data plic = {
 	.addr = ARIANE_PLIC_ADDR,
 	.num_src = ARIANE_PLIC_NUM_SOURCES,
 };
 
+static struct clint_data clint = {
+	.addr = ARIANE_CLINT_ADDR,
+	.first_hartid = 0,
+	.hart_count = ARIANE_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
+
 /*
  * Ariane platform early initialization.
  */
@@ -116,8 +123,7 @@ static int ariane_ipi_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(ARIANE_CLINT_ADDR,
-					  ARIANE_HART_COUNT);
+		ret = clint_cold_ipi_init(&clint);
 		if (ret)
 			return ret;
 	}
@@ -133,8 +139,7 @@ static int ariane_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(ARIANE_CLINT_ADDR,
-					    ARIANE_HART_COUNT, TRUE);
+		ret = clint_cold_timer_init(&clint, NULL);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index e56ee51bae0..095004de4ba 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -35,7 +35,13 @@ static struct plic_data plic = {
 	.addr = OPENPITON_DEFAULT_PLIC_ADDR,
 	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
 };
-static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR;
+
+static struct clint_data clint = {
+	.addr = OPENPITON_DEFAULT_CLINT_ADDR,
+	.first_hartid = 0,
+	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
 
 /*
  * OpenPiton platform early initialization.
@@ -45,7 +51,7 @@ static int openpiton_early_init(bool cold_boot)
 	void *fdt;
 	struct platform_uart_data uart_data;
 	struct plic_data plic_data;
-	unsigned long clint_data;
+	unsigned long clint_addr;
 	int rc;
 
 	if (!cold_boot)
@@ -60,9 +66,9 @@ static int openpiton_early_init(bool cold_boot)
 	if (!rc)
 		plic = plic_data;
 
-	rc = fdt_parse_compat_addr(fdt, &clint_data, "riscv,clint0");
+	rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
 	if (!rc)
-		clint_addr = clint_data;
+		clint.addr = clint_addr;
 
 	return 0;
 }
@@ -143,8 +149,7 @@ static int openpiton_ipi_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(clint_addr,
-					  OPENPITON_DEFAULT_HART_COUNT);
+		ret = clint_cold_ipi_init(&clint);
 		if (ret)
 			return ret;
 	}
@@ -160,8 +165,7 @@ static int openpiton_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(clint_addr,
-					    OPENPITON_DEFAULT_HART_COUNT, TRUE);
+		ret = clint_cold_timer_init(&clint, NULL);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index db2186abb5e..ef0f18fa4fd 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -22,6 +22,13 @@ static struct plic_data plic = {
 	.num_src = K210_PLIC_NUM_SOURCES,
 };
 
+static struct clint_data clint = {
+	.addr = K210_CLINT_BASE_ADDR,
+	.first_hartid = 0,
+	.hart_count = K210_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
+
 static u32 k210_get_clk_freq(void)
 {
 	u32 clksel0, pll0;
@@ -76,8 +83,7 @@ static int k210_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(K210_CLINT_BASE_ADDR,
-					 K210_HART_COUNT);
+		rc = clint_cold_ipi_init(&clint);
 		if (rc)
 			return rc;
 	}
@@ -90,8 +96,7 @@ static int k210_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(K210_CLINT_BASE_ADDR,
-					   K210_HART_COUNT, TRUE);
+		rc = clint_cold_timer_init(&clint, NULL);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index f999c99657c..ad4ba2b29fd 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -48,6 +48,13 @@ static struct plic_data plic = {
 	.num_src = UX600_PLIC_NUM_SOURCES,
 };
 
+static struct clint_data clint = {
+	.addr = UX600_CLINT_TIMER_ADDR,
+	.first_hartid = 0,
+	.hart_count = UX600_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
+
 static void ux600_modify_dt(void *fdt)
 {
 	fdt_fixups(fdt);
@@ -92,7 +99,7 @@ static int ux600_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(UX600_CLINT_TIMER_ADDR, UX600_HART_COUNT);
+		rc = clint_cold_ipi_init(&clint);
 		if (rc)
 			return rc;
 	}
@@ -105,8 +112,7 @@ static int ux600_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(UX600_CLINT_TIMER_ADDR,
-					   UX600_HART_COUNT, TRUE);
+		rc = clint_cold_timer_init(&clint, NULL);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 7a62fc30c0f..48d887f8513 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -51,6 +51,13 @@ static struct plic_data plic = {
 	.num_src = FU540_PLIC_NUM_SOURCES,
 };
 
+static struct clint_data clint = {
+	.addr = FU540_CLINT_ADDR,
+	.first_hartid = 0,
+	.hart_count = FU540_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
+
 static void fu540_modify_dt(void *fdt)
 {
 	fdt_cpu_fixup(fdt);
@@ -107,7 +114,7 @@ static int fu540_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(FU540_CLINT_ADDR, FU540_HART_COUNT);
+		rc = clint_cold_ipi_init(&clint);
 		if (rc)
 			return rc;
 	}
@@ -125,8 +132,7 @@ static int fu540_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(FU540_CLINT_ADDR,
-					   FU540_HART_COUNT, TRUE);
+		rc = clint_cold_timer_init(&clint, NULL);
 		if (rc)
 			return rc;
 	}
diff --git a/platform/template/platform.c b/platform/template/platform.c
index c8453807a78..9cd750e107a 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -17,10 +17,10 @@
 #include <sbi_utils/serial/uart8250.h>
 #include <sbi_utils/sys/clint.h>
 
-#define PLATFORM_PLIC_ADDR			0xc000000
-#define PLATFORM_PLIC_NUM_SOURCES		128
-#define PLATFORM_HART_COUNT			4
-#define PLATFORM_CLINT_ADDR			0x2000000
+#define PLATFORM_PLIC_ADDR		0xc000000
+#define PLATFORM_PLIC_NUM_SOURCES	128
+#define PLATFORM_HART_COUNT		4
+#define PLATFORM_CLINT_ADDR		0x2000000
 #define PLATFORM_UART_ADDR		0x09000000
 #define PLATFORM_UART_INPUT_FREQ	10000000
 #define PLATFORM_UART_BAUDRATE		115200
@@ -30,6 +30,13 @@ static struct plic_data plic = {
 	.num_src = PLATFORM_PLIC_NUM_SOURCES,
 };
 
+static struct clint_data clint = {
+	.addr = PLATFORM_CLINT_ADDR,
+	.first_hartid = 0,
+	.hart_count = PLATFORM_HART_COUNT,
+	.has_64bit_mmio = TRUE,
+};
+
 /*
  * Platform early initialization.
  */
@@ -100,8 +107,7 @@ static int platform_ipi_init(bool cold_boot)
 
 	/* Example if the generic CLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(PLATFORM_CLINT_ADDR,
-					  PLATFORM_HART_COUNT);
+		ret = clint_cold_ipi_init(&clint, NULL);
 		if (ret)
 			return ret;
 	}
@@ -136,8 +142,7 @@ static int platform_timer_init(bool cold_boot)
 
 	/* Example if the generic CLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_timer_init(PLATFORM_CLINT_ADDR,
-					    PLATFORM_HART_COUNT, TRUE);
+		ret = clint_cold_timer_init(&clint);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index 82f910a7ba8..df7658a321d 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -15,6 +15,13 @@
 
 static struct c910_regs_struct c910_regs;
 
+static struct clint_data clint = {
+	.addr = 0, /* Updated at cold boot time */
+	.first_hartid = 0,
+	.hart_count = C910_HART_COUNT,
+	.has_64bit_mmio = FALSE,
+};
+
 static int c910_early_init(bool cold_boot)
 {
 	if (cold_boot) {
@@ -78,7 +85,8 @@ static int c910_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(c910_regs.clint_base_addr, C910_HART_COUNT);
+		clint.addr = c910_regs.clint_base_addr;
+		rc = clint_cold_ipi_init(&clint);
 		if (rc)
 			return rc;
 	}
@@ -91,8 +99,8 @@ static int c910_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(c910_regs.clint_base_addr,
-					C910_HART_COUNT, FALSE);
+		clint.addr = c910_regs.clint_base_addr;
+		ret = clint_cold_timer_init(&clint, NULL);
 		if (ret)
 			return ret;
 	}

From 569dd64b7270fd1cd17006e1b76484d84b1a0a71 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 13 May 2020 09:55:28 +0530
Subject: [PATCH 0604/1765] lib: utils: Add fdt_parse_clint_node() function

We add fdt_parse_clint_node() function which will be used by
fdt_ipi_clint and fdt_timer_clint drivers to parse CLINT details
from DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  5 +++
 lib/utils/fdt/fdt_helper.c         | 69 ++++++++++++++++++++++++++++++
 lib/utils/ipi/fdt_ipi_clint.c      | 14 +-----
 lib/utils/timer/fdt_timer_clint.c  | 14 +-----
 4 files changed, 76 insertions(+), 26 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 72fb1673c79..1b780fb7e4b 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -54,6 +54,11 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 
 int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
+struct clint_data;
+
+int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
+			 struct clint_data *clint);
+
 int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
 			  const char *compatible);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 58f8951638c..887d6ed654a 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -9,10 +9,12 @@
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/sys/clint.h>
 
 #define DEFAULT_UART_FREQ		0
 #define DEFAULT_UART_BAUD		115200
@@ -296,6 +298,73 @@ int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 	return fdt_parse_plic_node(fdt, nodeoffset, plic);
 }
 
+int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
+			 struct clint_data *clint)
+{
+	const fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+	int i, rc, count, cpu_offset, cpu_intc_offset;
+	u32 phandle, hwirq, hartid, first_hartid, last_hartid;
+	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
+
+	if (nodeoffset < 0 || !clint || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	clint->addr = reg_addr;
+
+	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
+	if (!val || count < sizeof(fdt32_t))
+		return SBI_EINVAL;
+	count = count / sizeof(fdt32_t);
+
+	first_hartid = -1U;
+	last_hartid = 0;
+	clint->hart_count = 0;
+	for (i = 0; i < count; i += 2) {
+		phandle = fdt32_to_cpu(val[i]);
+		hwirq = fdt32_to_cpu(val[i + 1]);
+
+		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (rc)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		if (match_hwirq == hwirq) {
+			if (hartid < first_hartid)
+				first_hartid = hartid;
+			if (hartid > last_hartid)
+				last_hartid = hartid;
+			clint->hart_count++;
+		}
+	}
+
+	if ((last_hartid < first_hartid) || first_hartid == -1U)
+		return SBI_ENODEV;
+
+	clint->first_hartid = first_hartid;
+	count = last_hartid - first_hartid + 1;
+	if (clint->hart_count < count)
+		clint->hart_count = count;
+
+	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
+	clint->has_64bit_mmio = TRUE;
+
+	return 0;
+}
+
 int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
 			  const char *compatible)
 {
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index c4ac0df4cb2..eead8b33585 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -17,23 +17,11 @@ static int ipi_clint_cold_init(void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
-	u32 max_hartid;
-	unsigned long addr;
 
-	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
+	rc = fdt_parse_clint_node(fdt, nodeoff, FALSE, &clint_ipi);
 	if (rc)
 		return rc;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
-	if (rc)
-		return rc;
-
-	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
-	clint_ipi.addr = addr;
-	clint_ipi.first_hartid = 0;
-	clint_ipi.hart_count = max_hartid + 1;
-	clint_ipi.has_64bit_mmio = TRUE;
-
 	return clint_cold_ipi_init(&clint_ipi);
 }
 
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index 2f5f283dfb6..85779b781b8 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -17,23 +17,11 @@ static int timer_clint_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	u32 max_hartid;
-	unsigned long addr;
 
-	rc = fdt_parse_max_hart_id(fdt, &max_hartid);
+	rc = fdt_parse_clint_node(fdt, nodeoff, TRUE, &clint_timer);
 	if (rc)
 		return rc;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
-	if (rc)
-		return rc;
-
-	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
-	clint_timer.addr = addr;
-	clint_timer.first_hartid = 0;
-	clint_timer.hart_count = max_hartid + 1;
-	clint_timer.has_64bit_mmio = TRUE;
-
 	return clint_cold_timer_init(&clint_timer, NULL);
 }
 

From 6956e83a944df1c54e4be3554f2ed4863ebe2f75 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 13 May 2020 13:14:33 +0530
Subject: [PATCH 0605/1765] lib: utils/ipi: Initialize all matching ipi DT
 nodes

We can have multiple matching DT nodes of the same FDT ipi driver
so in this case we should call cold_init() for all matching DT nodes
instead of just first matching DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/ipi/fdt_ipi.c       | 22 ++++++++++++----------
 lib/utils/ipi/fdt_ipi_clint.c | 15 ++++++++++++---
 2 files changed, 24 insertions(+), 13 deletions(-)

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index d99a9414263..6562469da91 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -69,17 +69,19 @@ static int fdt_ipi_cold_init(void)
 	for (pos = 0; pos < array_size(ipi_drivers); pos++) {
 		drv = ipi_drivers[pos];
 
-		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-		if (noff < 0)
-			continue;
-
-		if (drv->cold_init) {
-			rc = drv->cold_init(fdt, noff, match);
-			if (rc)
-				return rc;
+		noff = -1;
+		while ((noff = fdt_find_match(fdt, noff,
+					drv->match_table, &match)) >= 0) {
+			if (drv->cold_init) {
+				rc = drv->cold_init(fdt, noff, match);
+				if (rc)
+					return rc;
+			}
+			current_driver = drv;
 		}
-		current_driver = drv;
-		break;
+
+		if (current_driver != &dummy)
+			break;
 	}
 
 	return 0;
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index eead8b33585..e9924406482 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -7,22 +7,31 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/sys/clint.h>
 
-static struct clint_data clint_ipi;
+#define CLINT_IPI_MAX_NR			16
+
+static unsigned long clint_ipi_count = 0;
+static struct clint_data clint_ipi[CLINT_IPI_MAX_NR];
 
 static int ipi_clint_cold_init(void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
+	struct clint_data *ci;
+
+	if (CLINT_IPI_MAX_NR <= clint_ipi_count)
+		return SBI_ENOSPC;
+	ci = &clint_ipi[clint_ipi_count++];
 
-	rc = fdt_parse_clint_node(fdt, nodeoff, FALSE, &clint_ipi);
+	rc = fdt_parse_clint_node(fdt, nodeoff, FALSE, ci);
 	if (rc)
 		return rc;
 
-	return clint_cold_ipi_init(&clint_ipi);
+	return clint_cold_ipi_init(ci);
 }
 
 static const struct fdt_match ipi_clint_match[] = {

From a63f05f3dea6fde8b5d545c2c6a5762faa56539a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 13 May 2020 13:11:44 +0530
Subject: [PATCH 0606/1765] lib: utils/timer: Initialize all matching timer DT
 nodes

We can have multiple matching DT nodes of the same FDT timer driver
so in this case we should call cold_init() for all matching DT nodes
instead of just first matching DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/timer/fdt_timer.c       | 22 ++++++++++++----------
 lib/utils/timer/fdt_timer_clint.c | 17 ++++++++++++++---
 2 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 46edb83afa9..d1d0e0ce17b 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -80,17 +80,19 @@ static int fdt_timer_cold_init(void)
 	for (pos = 0; pos < array_size(timer_drivers); pos++) {
 		drv = timer_drivers[pos];
 
-		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-		if (noff < 0)
-			continue;
-
-		if (drv->cold_init) {
-			rc = drv->cold_init(fdt, noff, match);
-			if (rc)
-				return rc;
+		noff = -1;
+		while ((noff = fdt_find_match(fdt, noff,
+					drv->match_table, &match)) >= 0) {
+			if (drv->cold_init) {
+				rc = drv->cold_init(fdt, noff, match);
+				if (rc)
+					return rc;
+			}
+			current_driver = drv;
 		}
-		current_driver = drv;
-		break;
+
+		if (current_driver != &dummy)
+			break;
 	}
 
 	return 0;
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index 85779b781b8..fe6670866c7 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -7,22 +7,33 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/sys/clint.h>
 
-static struct clint_data clint_timer;
+#define CLINT_TIMER_MAX_NR			16
+
+static unsigned long clint_timer_count = 0;
+static struct clint_data clint_timer[CLINT_TIMER_MAX_NR];
 
 static int timer_clint_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
+	struct clint_data *ct, *ctmaster = NULL;
+
+	if (CLINT_TIMER_MAX_NR <= clint_timer_count)
+		return SBI_ENOSPC;
+	ct = &clint_timer[clint_timer_count++];
+	if (1 < clint_timer_count)
+		ctmaster = &clint_timer[0];
 
-	rc = fdt_parse_clint_node(fdt, nodeoff, TRUE, &clint_timer);
+	rc = fdt_parse_clint_node(fdt, nodeoff, TRUE, ct);
 	if (rc)
 		return rc;
 
-	return clint_cold_timer_init(&clint_timer, NULL);
+	return clint_cold_timer_init(ct, ctmaster);
 }
 
 static const struct fdt_match timer_clint_match[] = {

From 30b60401e1a88164d91ed0c7cccaecb17f71afd8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 23 May 2020 11:31:18 +0530
Subject: [PATCH 0607/1765] Makefile: Fix builtin DTB compilation for
 out-of-tree platforms

The make rule for builtin DTB compilation does not consider
out-of-tree platforms so this patch fixes it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index fe44ceb32f4..79af171f203 100644
--- a/Makefile
+++ b/Makefile
@@ -348,6 +348,9 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+$(platform_build_dir)/%.dtb: $(platform_src_dir)/%.dts
+	$(call compile_dts,$@,$<)
+
 $(platform_build_dir)/%.dep: $(src_dir)/%.c
 	$(call compile_cc_dep,$@,$<)
 
@@ -360,9 +363,6 @@ $(platform_build_dir)/%.dep: $(src_dir)/%.S
 $(platform_build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(build_dir)/%.dtb: $(src_dir)/%.dts
-	$(call compile_dts,$@,$<)
-
 # Rule for "make docs"
 $(build_dir)/docs/latex/refman.pdf: $(build_dir)/docs/latex/refman.tex
 	$(CMD_PREFIX)mkdir -p $(build_dir)/docs

From 64f140830d758ebcf9d9b6ab071ae24fcc37b884 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 23 May 2020 11:37:15 +0530
Subject: [PATCH 0608/1765] firmware: fw_base: Make builtin DTB available to
 fw_platform_init()

Currently, fw_prev_arg1() is called after fw_platform_init() which
caused builtin DTB to be not available to fw_platform_init().

To allow builtin DTB available to fw_platform_init(), we should
call fw_save_info() and fw_prev_arg1() before fw_platform_init().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 732bc3bd72b..b28119ab241 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -177,6 +177,20 @@ _bss_zero:
 	li	s5, (SBI_SCRATCH_SIZE * 2)
 	add	sp, s4, s5
 
+	/* Allow main firmware to save info */
+	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
+	call	fw_save_info
+	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
+
+	/* Override previous arg1 */
+	MOV_3R	s0, a0, s1, a1, s2, a2
+	call	fw_prev_arg1
+	add	t1, a0, zero
+	MOV_3R	a0, s0, a1, s1, a2, s2
+	beqz	t1, _prev_arg1_override_done
+	add	a1, t1, zero
+_prev_arg1_override_done:
+
 	/*
 	 * Initialize platform
 	 * Note: The a0 to a4 registers passed to the
@@ -186,11 +200,6 @@ _bss_zero:
 	call	fw_platform_init
 	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
 
-	/* Allow main firmware to save info */
-	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
-	call	fw_save_info
-	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
-
 	/* Preload HART details
 	 * s7 -> HART Count
 	 * s8 -> HART Stack Size
@@ -271,15 +280,6 @@ _scratch_init:
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
 
-	/* Override previous arg1 */
-	MOV_3R	s0, a0, s1, a1, s2, a2
-	call	fw_prev_arg1
-	add	t1, a0, zero
-	MOV_3R	a0, s0, a1, s1, a2, s2
-	beqz	t1, _prev_arg1_override_done
-	add	a1, t1, zero
-_prev_arg1_override_done:
-
 	/*
 	 * Relocate Flatened Device Tree (FDT)
 	 * source FDT address = previous arg1

From 4ce6b7a82ac2c9f57186c00f23223dd39067555b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 23 May 2020 12:09:57 +0530
Subject: [PATCH 0609/1765] firmware: fw_base: Don't OR forced FW_OPTIONS

Currently, we are ORing FW_OPTIONS with the options passed by
previous booting stage to fw_dynamic. This causes confusion
because compiling fw_dynamic with FW_OPTIONS=0x2 does not force
enable boot prints as the U-Boot SPL passes options=0x1 in
fw_dyanmic_info.

The best thing to do is always prefer FW_OPTIONS when available.
This is intuitive for OpenSBI users and easy in debugging.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b28119ab241..b354cb8c1c6 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -268,13 +268,11 @@ _scratch_init:
 	/* Store firmware options in scratch space */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 #ifdef FW_OPTIONS
-	li	a4, FW_OPTIONS
+	li	a0, FW_OPTIONS
 #else
-	add	a4, zero, zero
-#endif
 	call	fw_options
-	or	a4, a4, a0
-	REG_S	a4, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+#endif
+	REG_S	a0, SBI_SCRATCH_OPTIONS_OFFSET(tp)
 	MOV_3R	a0, s0, a1, s1, a2, s2
 	/* Move to next scratch space */
 	add	t1, t1, t2

From 86ec5341e421b3f6ac39c75da648b7a22e56f248 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 24 May 2020 10:03:13 +0530
Subject: [PATCH 0610/1765] firmware: Allow fw_platform_init() to return
 updated FDT location

Currently, the fw_platform_init() does not return anything but we can
further improve by allowing fw_platform_init() to return updated FDT
location.

It is certainly not mandatory for fw_platform_init() to return a new
location of FDT (or modify FDT). In fact, the fw_platform_init() can
always return the original FDT location (i.e. 'arg1') unmodified.

This new capability of fw_platform_init() will allow platforms to:
1. Have multiple built-in FDTs and select one
2. Modify FDT before using based on platform specific straps or OTP

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S          |  3 +++
 platform/generic/platform.c | 13 +++++++++----
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b354cb8c1c6..b66ac41c4ce 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -198,7 +198,9 @@ _prev_arg1_override_done:
 	 */
 	MOV_5R	s0, a0, s1, a1, s2, a2, s3, a3, s4, a4
 	call	fw_platform_init
+	add	t0, a0, zero
 	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
+	add	a1, t0, zero
 
 	/* Preload HART details
 	 * s7 -> HART Count
@@ -475,6 +477,7 @@ _start_hang:
 	.globl fw_platform_init
 	.weak fw_platform_init
 fw_platform_init:
+	add	a0, a1, zero
 	ret
 
 	.section .entry, "ax", %progbits
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index a4a07e3988d..57058ff134a 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -62,10 +62,14 @@ static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
  * The arguments passed to fw_platform_init() function are boot time state
  * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
  * be address of FDT passed by previous booting stage.
+ *
+ * The return value of fw_platform_init() function is the FDT location. If
+ * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
+ * can always return the original FDT location (i.e. 'arg1') unmodified.
  */
-void fw_platform_init(unsigned long arg0, unsigned long arg1,
-		      unsigned long arg2, unsigned long arg3,
-		      unsigned long arg4)
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+				unsigned long arg2, unsigned long arg3,
+				unsigned long arg4)
 {
 	const char *model, *mmu_type;
 	void *fdt = (void *)arg1;
@@ -106,7 +110,8 @@ void fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 	platform.hart_count = hart_count;
 
-	return;
+	/* Return original FDT pointer */
+	return arg1;
 
 fail:
 	while (1)

From c6c65ee8614d51395242c0500b4419dfa35a4e33 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 24 May 2020 13:11:00 +0530
Subject: [PATCH 0611/1765] Makefile: Preprocess builtin DTS

In order to use GCC style defines and macros in DTS, we should
preporcess builtin DTS before converting it to DTB.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 79af171f203..5c084143825 100644
--- a/Makefile
+++ b/Makefile
@@ -227,7 +227,7 @@ MERGEFLAGS	+=	-r
 MERGEFLAGS	+=	-b elf$(PLATFORM_RISCV_XLEN)-littleriscv
 MERGEFLAGS	+=	-m elf$(PLATFORM_RISCV_XLEN)lriscv
 
-DTCFLAGS	=	-O dtb
+DTSCPPFLAGS	=	$(CPPFLAGS) -nostdinc -nostdlib -fno-builtin -D__DTS__ -x assembler-with-cpp
 
 # Setup functions for compilation
 define dynamic_flags
@@ -289,7 +289,7 @@ compile_objcopy = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(OBJCOPY) -S -O binary $(2) $(1)
 compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " DTC       $(subst $(build_dir)/,,$(1))"; \
-	     $(DTC) $(DTCFLAGS) -o $(1) $(2)
+	     $(CPP) $(DTSCPPFLAGS) $(2) | $(DTC) -O dtb -i `dirname $(2)` -o $(1)
 
 targets-y  = $(build_dir)/lib/libsbi.a
 targets-y  += $(build_dir)/lib/libsbiutils.a

From 4e3876d5be1118aae5318c91e431e8cfedf580b1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 25 May 2020 14:42:35 +0530
Subject: [PATCH 0612/1765] Makefile: Add mechanism for platforms to have
 multiple builtin DTBs

Currently, we can only include one DTB as builtin for a platform
using FDT_PAYLOAD_DTB make variable in platform config.mk.

This patch adds new mechanism using which we can convert any DTS
file to C source and futher compile-n-link it with libplatsbi.a.

The generated C source will have the DTB contents as an array
"const char <varprefix>_start[]" where <varprefix> is specified
in platform objects.mk makefile.

Example1
--------
If we have built-in k210.dts and desired <varprefix> is
"dt_k210" then specify following in platform objects.mk:
platform-objs-y += k210.o
platform-varprefix-k210.o = dt_k210

Example2
--------
If we have built-in abc/k210.dts and desired <varprefix> is
"dt_abc_k210" then specify following in platform objects.mk:
platform-objs-y += abc/k210.o
platform-varprefix-abc-k210.o = dt_abc_k210

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile       | 17 +++++++++++++
 scripts/d2c.sh | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)
 create mode 100755 scripts/d2c.sh

diff --git a/Makefile b/Makefile
index 5c084143825..bf9c9830d72 100644
--- a/Makefile
+++ b/Makefile
@@ -290,6 +290,12 @@ compile_objcopy = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " DTC       $(subst $(build_dir)/,,$(1))"; \
 	     $(CPP) $(DTSCPPFLAGS) $(2) | $(DTC) -O dtb -i `dirname $(2)` -o $(1)
+compile_d2c = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " D2C       $(subst $(build_dir)/,,$(1))"; \
+	     $(src_dir)/scripts/d2c.sh -i $(4) -a $(3) -p $(2) > $(1)
+compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " GEN-DEP   $(subst $(build_dir)/,,$(1))"; \
+	     echo "$(1:.dep=$(2)): $(3)" >> $(1)
 
 targets-y  = $(build_dir)/lib/libsbi.a
 targets-y  += $(build_dir)/lib/libsbiutils.a
@@ -342,12 +348,23 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
+$(platform_build_dir)/%.o: $(platform_build_dir)/%.c
+	$(call compile_cc,$@,$<)
+
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
 	$(call compile_as_dep,$@,$<)
 
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts
+	$(call compile_gen_dep,$@,.dtb,$<)
+	$(call compile_gen_dep,$@,.c,$(@:.dep=.dtb))
+	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
+
+$(platform_build_dir)/%.c: $(platform_build_dir)/%.dtb
+	$(call compile_d2c,$@,$(platform-varprefix-$(subst .dtb,.o,$(subst /,-,$(subst $(platform_build_dir)/,,$<)))),16,$<)
+
 $(platform_build_dir)/%.dtb: $(platform_src_dir)/%.dts
 	$(call compile_dts,$@,$<)
 
diff --git a/scripts/d2c.sh b/scripts/d2c.sh
new file mode 100755
index 00000000000..821a9959a61
--- /dev/null
+++ b/scripts/d2c.sh
@@ -0,0 +1,67 @@
+#!/bin/bash
+
+function usage()
+{
+	echo "Usage:"
+	echo " $0 [options]"
+	echo "Options:"
+	echo "     -h                   Display help or usage"
+	echo "     -i <input_file_path> Input binary file path"
+	echo "     -a <c_align>         Output C array alignment"
+	echo "     -p <c_prefix>        Output C array name prefix"
+	exit 1;
+}
+
+# Command line options
+INPUT_PATH=""
+OUTPUT_C_ALIGN=""
+OUTPUT_C_PREFIX=""
+
+while getopts "hi:a:p:o:" o; do
+	case "${o}" in
+	h)
+		usage
+		;;
+	i)
+		INPUT_PATH=${OPTARG}
+		;;
+	a)
+		OUTPUT_C_ALIGN=${OPTARG}
+		;;
+	p)
+		OUTPUT_C_PREFIX=${OPTARG}
+		;;
+	*)
+		usage
+		;;
+	esac
+done
+shift $((OPTIND-1))
+
+if [ -z "${INPUT_PATH}" ]; then
+	echo "Must specify input file path"
+	usage
+fi
+
+if [ ! -f "${INPUT_PATH}" ]; then
+	echo "The input path should be a file"
+	usage
+fi
+
+if [ -z "${OUTPUT_C_ALIGN}" ]; then
+	echo "Must provide output C array alignment"
+	usage
+fi
+
+if [ -z "${OUTPUT_C_PREFIX}" ]; then
+	echo "Must provide output C array name prefix"
+	usage
+fi
+
+printf "const char __attribute__((aligned(%s))) %s_start[] = {\n" "${OUTPUT_C_ALIGN}" "${OUTPUT_C_PREFIX}"
+
+od -v -t x1 -An ${INPUT_PATH} | awk '{for (i=1; i<=NF; i++) printf " 0x%s,", $i; printf "\n"; }'
+
+printf "};\n"
+
+printf "const unsigned long %s_size = sizeof(%s_start);\n" "${OUTPUT_C_PREFIX}" "${OUTPUT_C_PREFIX}"

From 72019ee2020fbc196a730dc4f52309e39d6b764a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 2 Jun 2020 10:37:15 +0530
Subject: [PATCH 0613/1765] platform: kendryte/k210: Use new mechanism of
 builtin DTB

We update kendryte/k210 to use new mechanism of having builtin DTB
where we convert k210.dts to C source and further compile-n-link it
with libplatsbi.a.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/config.mk  | 1 -
 platform/kendryte/k210/objects.mk | 4 +++-
 platform/kendryte/k210/platform.c | 9 +++++++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
index e0f8d3a064c..8a9b81418a2 100644
--- a/platform/kendryte/k210/config.mk
+++ b/platform/kendryte/k210/config.mk
@@ -17,4 +17,3 @@ platform-ldflags-y =
 FW_TEXT_START=0x80000000
 FW_PAYLOAD=y
 FW_PAYLOAD_ALIGN=0x1000
-FW_PAYLOAD_FDT=k210.dtb
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 7288e74da8b..106f9f212cf 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -8,4 +8,6 @@
 #
 
 platform-objs-y += platform.o
-platform-dtb-y += k210.dtb
+
+platform-objs-y += k210.o
+platform-varprefix-k210.o = dt_k210
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index ef0f18fa4fd..5c28fd91880 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -17,6 +17,15 @@
 #include <sbi_utils/sys/clint.h>
 #include "platform.h"
 
+extern const char dt_k210_start[];
+
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+				unsigned long arg2, unsigned long arg3,
+				unsigned long arg4)
+{
+	return (unsigned long)&dt_k210_start[0];
+}
+
 static struct plic_data plic = {
 	.addr = K210_PLIC_BASE_ADDR,
 	.num_src = K210_PLIC_NUM_SOURCES,

From 51f0e4a0533fe8b5d713379ab3a6cb676add82da Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 25 May 2020 15:13:31 +0530
Subject: [PATCH 0614/1765] firmware: Remove FW_PAYLOAD_FDT and related
 documentation

Now that no platform is using FW_PAYLOAD_FDT mechanism, we
remove related code from Makefile and related documentation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile                     |  2 --
 docs/firmware/fw_payload.md  | 16 ++--------------
 firmware/objects.mk          |  5 -----
 platform/template/config.mk  |  1 -
 platform/template/objects.mk |  8 ++++----
 5 files changed, 6 insertions(+), 26 deletions(-)

diff --git a/Makefile b/Makefile
index bf9c9830d72..cebb78e220d 100644
--- a/Makefile
+++ b/Makefile
@@ -130,7 +130,6 @@ libsbi-objs-path-y=$(foreach obj,$(libsbi-objs-y),$(build_dir)/lib/sbi/$(obj))
 libsbiutils-objs-path-y=$(foreach obj,$(libsbiutils-objs-y),$(build_dir)/lib/utils/$(obj))
 ifdef PLATFORM
 platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(platform_build_dir)/$(obj))
-platform-dtb-path-y=$(foreach obj,$(platform-dtb-y),$(platform_build_dir)/$(obj))
 firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(platform_build_dir)/firmware/$(bin))
 endif
 firmware-elfs-path-y=$(firmware-bins-path-y:.bin=.elf)
@@ -301,7 +300,6 @@ targets-y  = $(build_dir)/lib/libsbi.a
 targets-y  += $(build_dir)/lib/libsbiutils.a
 ifdef PLATFORM
 targets-y += $(platform_build_dir)/lib/libplatsbi.a
-targets-y += $(platform-dtb-path-y)
 endif
 targets-y += $(firmware-bins-path-y)
 
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index d950eb61013..bc712d26e38 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -57,17 +57,8 @@ file. The parameters currently defined are as follows:
 
 * **FW_PAYLOAD_FDT_PATH** - Path to an external flattened device tree binary
   file to be embedded in the *.text* section of the final firmware. If this
-  option is not provided and no internal device tree file is specified by the
-  platform (c.f. *FW_PAYLOAD_FDT*), then the firmware will expect the FDT to
-  be passed as an argument by the prior booting stage.
-
-* **FW_PAYLOAD_FDT** - Path to an internal flattened device tree binary file
-  defined by the platform code. The file name must match the DTB file name
-  specified in the platform *objects.mk* file with the *platform-dtb-y* entry.
-  This option results in *FW_PAYLOAD_FDT_PATH* to be automatically set.
-  Specifying *FW_PAYLOAD_FDT_PATH* on the `make` command line disables
-  *FW_PAYLOAD_FDT* and the command line specified device tree binary file is
-  used for building the final firmware.
+  option is not provided then the firmware will expect the FDT to be passed
+  as an argument by the prior booting stage.
 
 * **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior booting
   stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and embedded in
@@ -83,7 +74,4 @@ The *[qemu/virt]* platforms illustrate how to configure and use a *FW_PAYLOAD*
 firmware. Detailed information regarding these platforms can be found in the
 platform documentation files.
 
-The *kendryte/k210* platform also enables a build of a *FW_PAYLOAD* using an
-internally defined device tree file (*FW_PAYLOAD_FDT*).
-
 [qemu/virt]: ../platform/qemu_virt.md
diff --git a/firmware/objects.mk b/firmware/objects.mk
index e8969e67dcc..c9803629aa9 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -41,11 +41,6 @@ ifdef FW_PAYLOAD_ALIGN
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_ALIGN=$(FW_PAYLOAD_ALIGN)
 endif
 
-ifndef FW_PAYLOAD_FDT_PATH
-ifdef FW_PAYLOAD_FDT
-FW_PAYLOAD_FDT_PATH=$(platform_build_dir)/$(FW_PAYLOAD_FDT)
-endif
-endif
 ifdef FW_PAYLOAD_FDT_PATH
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=\"$(FW_PAYLOAD_FDT_PATH)\"
 endif
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 70f2db85278..7bcf9377f80 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -72,5 +72,4 @@ endif
 # FW_PAYLOAD_ALIGN=0x1000
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
 # FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"
-# FW_PAYLOAD_FDT="name of the platform defined flattened device tree file"
 # FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/template/objects.mk b/platform/template/objects.mk
index b9ba2317a19..caaec2bee9e 100644
--- a/platform/template/objects.mk
+++ b/platform/template/objects.mk
@@ -8,8 +8,8 @@
 platform-objs-y += platform.o
 
 #
-# If the platform support requires a device tree file, the name of the device
-# tree compiled file should be specified here. The device tree source file
-# be in the form <dt file name>.dts
+# If the platform support requires a builtin device tree file, the name of
+# the device tree compiled file should be specified here. The device tree
+# source file be in the form <dt file name>.dts
 #
-# platform-dtb-y += <dt file name>.dtb
+# platform-objs-y += <dt file name>.o

From 1b8c0128f1d79d69ea0a46b758fef4be8dc0a73e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 28 May 2020 08:37:42 +0530
Subject: [PATCH 0615/1765] lib: Add RISC-V hypervisor v0.6.1 support

To support RISC-V hypervisor v0.6.1, we:
1. Don't need to explicitly forward WFI traps from VS/VU-mode
2. Have to delegate virtual instruction trap to HS-mode
3. Have to update trap redirection for changes in HSTATUS CSR

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 15 ++++++++++++---
 lib/sbi/sbi_hart.c           |  1 +
 lib/sbi/sbi_illegal_insn.c   | 12 +-----------
 lib/sbi/sbi_trap.c           |  8 +++-----
 4 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index fd96b0fd910..827c86c40bf 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -61,12 +61,20 @@
 #define SSTATUS64_UXL			MSTATUS_UXL
 #define SSTATUS64_SD			MSTATUS64_SD
 
+#if __riscv_xlen == 64
+#define HSTATUS_VSXL			_UL(0x300000000)
+#define HSTATUS_VSXL_SHIFT		32
+#endif
 #define HSTATUS_VTSR			_UL(0x00400000)
+#define HSTATUS_VTW			_UL(0x00200000)
 #define HSTATUS_VTVM			_UL(0x00100000)
-#define HSTATUS_SP2V			_UL(0x00000200)
-#define HSTATUS_SP2P			_UL(0x00000100)
+#define HSTATUS_VGEIN			_UL(0x0003f000)
+#define HSTATUS_VGEIN_SHIFT		12
+#define HSTATUS_HU			_UL(0x00000200)
+#define HSTATUS_SPVP			_UL(0x00000100)
 #define HSTATUS_SPV			_UL(0x00000080)
-#define HSTATUS_SPRV			_UL(0x00000001)
+#define HSTATUS_GVA			_UL(0x00000040)
+#define HSTATUS_VSBE			_UL(0x00000020)
 
 #define IRQ_S_SOFT			1
 #define IRQ_VS_SOFT			2
@@ -424,6 +432,7 @@
 #define CAUSE_STORE_PAGE_FAULT		0xf
 #define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
 #define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
+#define CAUSE_VIRTUAL_INST_FAULT	0x16
 #define CAUSE_STORE_GUEST_PAGE_FAULT	0x17
 
 #define INSN_MATCH_LB			0x3
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 5fa30f38965..88d0ac81d6d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -110,6 +110,7 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 		exceptions |= (1U << CAUSE_SUPERVISOR_ECALL);
 		exceptions |= (1U << CAUSE_FETCH_GUEST_PAGE_FAULT);
 		exceptions |= (1U << CAUSE_LOAD_GUEST_PAGE_FAULT);
+		exceptions |= (1U << CAUSE_VIRTUAL_INST_FAULT);
 		exceptions |= (1U << CAUSE_STORE_GUEST_PAGE_FAULT);
 	}
 
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 1b174875145..0e5523f60de 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -38,17 +38,7 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 	int csr_num   = (u32)insn >> 20;
 	ulong csr_val, new_csr_val;
 
-	/*
-	 * WFI always traps as illegal instruction when executed from
-	 * VS/VU mode so we just forward it to HS-mode.
-	 */
-#if __riscv_xlen == 32
-	if ((regs->mstatusH & MSTATUSH_MPV) &&
-#else
-	if ((regs->mstatus & MSTATUS_MPV) &&
-#endif
-	    (insn & INSN_MASK_WFI) == INSN_MATCH_WFI)
-		return truly_illegal_insn(insn, regs);
+	/* TODO: Ensure that we got CSR read/write instruction */
 
 	if (sbi_emulate_csr_read(csr_num, regs, &csr_val))
 		return truly_illegal_insn(insn, regs);
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index d482ad5ba02..930119d248c 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -120,12 +120,10 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 
 	/* Update HSTATUS for VS/VU-mode to HS-mode transition */
 	if (misa_extension('H') && prev_virt && !next_virt) {
-		/* Update HSTATUS SP2P, SP2V, and SPV bits */
+		/* Update HSTATUS SPVP and SPV bits */
 		hstatus = csr_read(CSR_HSTATUS);
-		hstatus &= ~HSTATUS_SP2P;
-		hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SP2P : 0;
-		hstatus &= ~HSTATUS_SP2V;
-		hstatus |= (hstatus & HSTATUS_SPV) ? HSTATUS_SP2V : 0;
+		hstatus &= ~HSTATUS_SPVP;
+		hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SPVP : 0;
 		hstatus &= ~HSTATUS_SPV;
 		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
 		csr_write(CSR_HSTATUS, hstatus);

From 79bfd67f9a2ed5cae966b72cc2a72f68824c4ab8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 4 Jun 2020 23:31:48 -0700
Subject: [PATCH 0616/1765] docs: Use doxygen config to mark the main page

The doxygen config option "USE_MDFILE_AS_MAINPAGE" can be used to set
the main page in doxygen generated pdf. This allows us to remove the
"#mainpage" from the README file which markdown doesn't parse.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 README.md        | 2 +-
 docs/doxygen.cfg | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index 3fcd9d7a497..8958343b155 100644
--- a/README.md
+++ b/README.md
@@ -1,4 +1,4 @@
-RISC-V Open Source Supervisor Binary Interface (OpenSBI) {#mainpage}
+RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
 Copyright and License
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index f32ada1c959..dbf8ef9871b 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -949,7 +949,7 @@ FILTER_SOURCE_PATTERNS =
 # (index.html). This can be useful if you have a project on for instance GitHub
 # and want to reuse the introduction page also for the doxygen output.
 
-USE_MDFILE_AS_MAINPAGE = 
+USE_MDFILE_AS_MAINPAGE = README.md
 
 #---------------------------------------------------------------------------
 # Configuration options related to source browsing

From 106b888e201bea80eb6c31ce2ed851884a5e0ec7 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Thu, 4 Jun 2020 23:31:49 -0700
Subject: [PATCH 0617/1765] docs: Remove redundant documentation about combined
 payload use case

U-Boot now supports loading Linux kernel image via network and storage
media. Thus, we don't need to use a combined payload containing both
U-Boot & Linux kernel image to boot Linux from U-Boot prompt.

Remove the old documentation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md | 23 -----------------------
 1 file changed, 23 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 2a06fa1b5d4..934284678c1 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -49,29 +49,6 @@ The detailed U-Boot booting guide is avaialble at [U-Boot].
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
 ```
 
-**U-Boot & Linux Kernel as a single payload**
-
-A single monolithic image containing both U-Boot & Linux can also be used if
-network boot setup is not available.
-
-1. Create a temporary image with u-boot-dtb.bin as the first payload. The
-command-line example here assumes that U-Boot was compiled using
-sifive_fu540_defconfig configuration.
-```
-dd if=~/workspace/u-boot-riscv/u-boot-dtb.bin of=/tmp/temp.bin bs=1M
-```
-2. Append the Linux Kernel image.
-```
-dd if=<linux_build_directory>/arch/riscv/boot/Image of=/tmp/temp.bin bs=1M seek=4
-```
-3. Compile OpenSBI with temp.bin (generated in step 2) as payload.
-```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
-or
-(For U-Boot which follows Linux v5.2 (or higher) DT bindings)
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=/tmp/temp.bin
-```
-
 Flashing the OpenSBI firmware binary to storage media:
 ------------------------------------------------------
 The first stage boot loader ([FSBL]) expects the storage media to have a GPT

From 980290651fc28b063633a6a59b63a6938ee13cff Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon7@andestech.com>
Date: Tue, 9 Jun 2020 13:56:57 +0800
Subject: [PATCH 0618/1765] platform: Add AE350 platform specific SBI handler

We add AE350 platform specific SBI handler to implement
AE350 specific SBI calls.

Signed-off-by: Nylon Chen <nylon7@andestech.com>
Reviewed-by: Anup Patel <Anup.Patel@wdc.com>
Reviewed-by: Atish Patra <Atish.Patra@wdc.com>
---
 platform/andes/ae350/platform.c | 18 +++++++++++++++++-
 platform/andes/ae350/platform.h | 15 +++++++++++++--
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 9f013d870e6..c75affeafae 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -121,6 +121,20 @@ static int ae350_system_reset(u32 type)
 	return 0;
 }
 
+/* Vendor-Specific SBI handler */
+static int ae350_vendor_ext_provider(long extid, long funcid,
+	unsigned long *args, unsigned long *out_value,
+	struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	switch (funcid) {
+	default:
+		sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);
+		asm volatile("ebreak");
+	}
+	return ret;
+}
+
 /* Platform descriptor. */
 const struct sbi_platform_operations platform_ops = {
 	.final_init = ae350_final_init,
@@ -140,7 +154,9 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_start = plmt_timer_event_start,
 	.timer_event_stop  = plmt_timer_event_stop,
 
-	.system_reset	 = ae350_system_reset
+	.system_reset	 = ae350_system_reset,
+
+	.vendor_ext_provider = ae350_vendor_ext_provider
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 062b656b8ae..03cd4215f4c 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -29,8 +29,19 @@
 #define AE350_UART_REG_SHIFT		2
 #define AE350_UART_REG_WIDTH		0
 
-/* nds mcache_ctl register*/
-#define CSR_MCACHECTL			0x7ca
+
+enum sbi_ext_andes_fid {
+	SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS = 0,
+	SBI_EXT_ANDES_GET_MMISC_CTL_STATUS,
+	SBI_EXT_ANDES_SET_MCACHE_CTL,
+	SBI_EXT_ANDES_SET_MMISC_CTL,
+	SBI_EXT_ANDES_ICACHE_OP,
+	SBI_EXT_ANDES_DCACHE_OP,
+	SBI_EXT_ANDES_L1CACHE_I_PREFETCH,
+	SBI_EXT_ANDES_L1CACHE_D_PREFETCH,
+	SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE,
+	SBI_EXT_ANDES_WRITE_AROUND,
+};
 
 #define V5_MCACHE_CTL_IC_EN_OFFSET      0
 #define V5_MCACHE_CTL_DC_EN_OFFSET      1

From 32f87e5a8668445097473d4ad3ab5a0de7b1dd6f Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon7@andestech.com>
Date: Tue, 9 Jun 2020 13:56:58 +0800
Subject: [PATCH 0619/1765] platform: Add AE350 cache control SBIs

This patch contains the following AE350 specific SBIs:

- get mcache_ctl status
- get mmisc_ctl status
- set mcache_ctl status
- set mmisc_ctl status
- I-cache operation
- D-cache operation
- enable/disable L1-I-cache prefetch
- enable/disable L1-D-cache prefetch
- enable/disable non-blocking load store
- enable/disable write-around

Signed-off-by: Nylon Chen <nylon7@andestech.com>
Reviewed-by: Anup Patel <Anup.Patel@wdc.com>
Reviewed-by: Atish Patra <Atish.Patra@wdc.com>
---
 platform/andes/ae350/cache.c    | 89 +++++++++++++++++++++++++++++++++
 platform/andes/ae350/cache.h    | 17 +++++++
 platform/andes/ae350/objects.mk |  2 +-
 platform/andes/ae350/platform.c | 31 ++++++++++++
 platform/andes/ae350/platform.h | 48 ++++++++++++++++++
 5 files changed, 186 insertions(+), 1 deletion(-)
 create mode 100644 platform/andes/ae350/cache.c
 create mode 100644 platform/andes/ae350/cache.h

diff --git a/platform/andes/ae350/cache.c b/platform/andes/ae350/cache.c
new file mode 100644
index 00000000000..af724c5c7ff
--- /dev/null
+++ b/platform/andes/ae350/cache.c
@@ -0,0 +1,89 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Andes Technology Corporation
+ *
+ * Authors:
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_types.h>
+#include "platform.h"
+
+uintptr_t mcall_set_mcache_ctl(unsigned long input)
+{
+	csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_MASK);
+	csr_write(CSR_MCACHECTL, input);
+	return 0;
+}
+
+uintptr_t mcall_set_mmisc_ctl(unsigned long input)
+{
+	csr_clear(CSR_MMISCCTL, V5_MMISC_CTL_MASK);
+	csr_write(CSR_MMISCCTL, input);
+	return 0;
+}
+
+uintptr_t mcall_icache_op(unsigned int enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_IC_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_IC_EN);
+		asm volatile("fence.i\n\t");
+	}
+	return 0;
+}
+
+uintptr_t mcall_dcache_op(unsigned int enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_DC_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_DC_EN);
+		csr_write(CSR_MCCTLCOMMAND, V5_UCCTL_L1D_WBINVAL_ALL);
+	}
+	return 0;
+}
+
+uintptr_t mcall_l1_cache_i_prefetch_op(unsigned long enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_L1I_PREFETCH_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_L1I_PREFETCH_EN);
+	}
+	return 0;
+}
+
+uintptr_t mcall_l1_cache_d_prefetch_op(unsigned long enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_L1D_PREFETCH_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_L1D_PREFETCH_EN);
+	}
+	return 0;
+}
+
+uintptr_t mcall_non_blocking_load_store(unsigned long enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MMISC_CTL_NON_BLOCKING_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MMISC_CTL_NON_BLOCKING_EN);
+	}
+	return 0;
+}
+
+uintptr_t mcall_write_around(unsigned long enable)
+{
+	if (enable) {
+		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_DC_WAROUND_1_EN);
+	} else {
+		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_DC_WAROUND_1_EN);
+	}
+	return 0;
+}
diff --git a/platform/andes/ae350/cache.h b/platform/andes/ae350/cache.h
new file mode 100644
index 00000000000..e1c1826f3c5
--- /dev/null
+++ b/platform/andes/ae350/cache.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Andes Technology Corporation
+ *
+ * Authors:
+ *   Nylon Chen <nylon7@andestech.com>
+ */
+
+uintptr_t mcall_set_mcache_ctl(unsigned long input);
+uintptr_t mcall_set_mmisc_ctl(unsigned long input);
+uintptr_t mcall_icache_op(unsigned int enable);
+uintptr_t mcall_dcache_op(unsigned int enable);
+uintptr_t mcall_l1_cache_i_prefetch_op(unsigned long enable);
+uintptr_t mcall_l1_cache_d_prefetch_op(unsigned long enable);
+uintptr_t mcall_non_blocking_load_store(unsigned long enable);
+uintptr_t mcall_write_around(unsigned long enable);
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
index 091d9e87f46..5369677c3b1 100644
--- a/platform/andes/ae350/objects.mk
+++ b/platform/andes/ae350/objects.mk
@@ -8,4 +8,4 @@
 #   Nylon Chen <nylon7@andestech.com>
 #
 
-platform-objs-y += platform.o plicsw.o plmt.o
+platform-objs-y += cache.o platform.o plicsw.o plmt.o
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index c75affeafae..954942c7585 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -19,6 +19,7 @@
 #include "platform.h"
 #include "plicsw.h"
 #include "plmt.h"
+#include "cache.h"
 
 static struct plic_data plic = {
 	.addr = AE350_PLIC_ADDR,
@@ -128,6 +129,36 @@ static int ae350_vendor_ext_provider(long extid, long funcid,
 {
 	int ret = 0;
 	switch (funcid) {
+	case SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS:
+		*out_value = csr_read(CSR_MCACHECTL);
+		break;
+	case SBI_EXT_ANDES_GET_MMISC_CTL_STATUS:
+		*out_value = csr_read(CSR_MMISCCTL);
+		break;
+	case SBI_EXT_ANDES_SET_MCACHE_CTL:
+		ret = mcall_set_mcache_ctl(args[0]);
+		break;
+	case SBI_EXT_ANDES_SET_MMISC_CTL:
+		ret = mcall_set_mmisc_ctl(args[0]);
+		break;
+	case SBI_EXT_ANDES_ICACHE_OP:
+		ret = mcall_icache_op(args[0]);
+		break;
+	case SBI_EXT_ANDES_DCACHE_OP:
+		ret = mcall_dcache_op(args[0]);
+		break;
+	case SBI_EXT_ANDES_L1CACHE_I_PREFETCH:
+		ret = mcall_l1_cache_i_prefetch_op(args[0]);
+		break;
+	case SBI_EXT_ANDES_L1CACHE_D_PREFETCH:
+		ret = mcall_l1_cache_d_prefetch_op(args[0]);
+		break;
+	case SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE:
+		ret = mcall_non_blocking_load_store(args[0]);
+		break;
+	case SBI_EXT_ANDES_WRITE_AROUND:
+		ret = mcall_write_around(args[0]);
+		break;
 	default:
 		sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);
 		asm volatile("ebreak");
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 03cd4215f4c..f34ca0fcc19 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -29,6 +29,19 @@
 #define AE350_UART_REG_SHIFT		2
 #define AE350_UART_REG_WIDTH		0
 
+/*Memory and Miscellaneous Registers*/
+#define CSR_MILMB		0x7c0
+#define CSR_MDLMB		0x7c1
+#define CSR_MECC_CDOE		0x7c2
+#define CSR_MNVEC		0x7c3
+#define CSR_MPFTCTL		0x7c5
+#define CSR_MCACHECTL		0x7ca
+#define CSR_MCCTLBEGINADDR	0x7cb
+#define CSR_MCCTLCOMMAND	0x7cc
+#define CSR_MCCTLDATA		0x7cc
+#define CSR_SCCTLDATA		0x9cd
+#define CSR_UCCTLBEGINADDR	0x80c
+#define CSR_MMISCCTL		0x7d0
 
 enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS = 0,
@@ -43,6 +56,31 @@ enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_WRITE_AROUND,
 };
 
+/* nds v5 mmisc_ctl register*/
+#define V5_MMISC_CTL_VEC_PLIC_OFFSET            1
+#define V5_MMISC_CTL_RVCOMPM_OFFSET             2
+#define V5_MMISC_CTL_BRPE_OFFSET                3
+#define V5_MMISC_CTL_MSA_OR_UNA_OFFSET          6
+#define V5_MMISC_CTL_NON_BLOCKING_OFFSET        8
+#define V5_MCACHE_CTL_L1I_PREFETCH_OFFSET       9
+#define V5_MCACHE_CTL_L1D_PREFETCH_OFFSET       10
+#define V5_MCACHE_CTL_DC_WAROUND_OFFSET_1       13
+#define V5_MCACHE_CTL_DC_WAROUND_OFFSET_2       14
+
+#define V5_MMISC_CTL_VEC_PLIC_EN        (1UL << V5_MMISC_CTL_VEC_PLIC_OFFSET)
+#define V5_MMISC_CTL_RVCOMPM_EN         (1UL << V5_MMISC_CTL_RVCOMPM_OFFSET)
+#define V5_MMISC_CTL_BRPE_EN            (1UL << V5_MMISC_CTL_BRPE_OFFSET)
+#define V5_MMISC_CTL_MSA_OR_UNA_EN      (1UL << V5_MMISC_CTL_MSA_OR_UNA_OFFSET)
+#define V5_MMISC_CTL_NON_BLOCKING_EN    (1UL << V5_MMISC_CTL_NON_BLOCKING_OFFSET)
+#define V5_MCACHE_CTL_L1I_PREFETCH_EN   (1UL << V5_MCACHE_CTL_L1I_PREFETCH_OFFSET)
+#define V5_MCACHE_CTL_L1D_PREFETCH_EN   (1UL << V5_MCACHE_CTL_L1D_PREFETCH_OFFSET)
+#define V5_MCACHE_CTL_DC_WAROUND_1_EN   (1UL << V5_MCACHE_CTL_DC_WAROUND_OFFSET_1)
+#define V5_MCACHE_CTL_DC_WAROUND_2_EN   (1UL << V5_MCACHE_CTL_DC_WAROUND_OFFSET_2)
+
+#define V5_MMISC_CTL_MASK  (V5_MMISC_CTL_VEC_PLIC_EN | V5_MMISC_CTL_RVCOMPM_EN \
+	| V5_MMISC_CTL_BRPE_EN | V5_MMISC_CTL_MSA_OR_UNA_EN | V5_MMISC_CTL_NON_BLOCKING_EN)
+
+/* nds mcache_ctl register*/
 #define V5_MCACHE_CTL_IC_EN_OFFSET      0
 #define V5_MCACHE_CTL_DC_EN_OFFSET      1
 #define V5_MCACHE_CTL_IC_ECCEN_OFFSET   2
@@ -51,12 +89,22 @@ enum sbi_ext_andes_fid {
 #define V5_MCACHE_CTL_DC_RWECC_OFFSET   7
 #define V5_MCACHE_CTL_CCTL_SUEN_OFFSET  8
 
+/*nds cctl command*/
+#define V5_UCCTL_L1D_WBINVAL_ALL 6
+#define V5_UCCTL_L1D_WB_ALL 7
+
 #define V5_MCACHE_CTL_IC_EN     (1UL << V5_MCACHE_CTL_IC_EN_OFFSET)
 #define V5_MCACHE_CTL_DC_EN     (1UL << V5_MCACHE_CTL_DC_EN_OFFSET)
 #define V5_MCACHE_CTL_IC_RWECC  (1UL << V5_MCACHE_CTL_IC_RWECC_OFFSET)
 #define V5_MCACHE_CTL_DC_RWECC  (1UL << V5_MCACHE_CTL_DC_RWECC_OFFSET)
 #define V5_MCACHE_CTL_CCTL_SUEN (1UL << V5_MCACHE_CTL_CCTL_SUEN_OFFSET)
 
+#define V5_MCACHE_CTL_MASK (V5_MCACHE_CTL_IC_EN | V5_MCACHE_CTL_DC_EN \
+	| V5_MCACHE_CTL_IC_RWECC | V5_MCACHE_CTL_DC_RWECC \
+	| V5_MCACHE_CTL_CCTL_SUEN | V5_MCACHE_CTL_L1I_PREFETCH_EN \
+	| V5_MCACHE_CTL_L1D_PREFETCH_EN | V5_MCACHE_CTL_DC_WAROUND_1_EN \
+	| V5_MCACHE_CTL_DC_WAROUND_2_EN)
+
 #define V5_L2C_CTL_OFFSET           0x8
 #define V5_L2C_CTL_ENABLE_OFFSET    0
 #define V5_L2C_CTL_IPFDPT_OFFSET    3

From e2c3f01af4329aa7e9009edee13b7cfdf379071f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 6 Jun 2020 17:33:48 +0530
Subject: [PATCH 0620/1765] lib: Fix __sbi_hfence_gvma_vmid_gpa() and
 __sbi_hfence_vvma_asid_va()

The arguments/parameters of __sbi_hfence_gvma_vmid_gpa() and
__sbi_hfence_vvma_asid_va() functions are swapped so we fix it.

Currently, we did not face any issues because QEMU does a full
TLB flush for all HFENCE instructions.

We also improve documentation of HFENCE.GVMA and HFENCE.VVMA
instruction encoding.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hfence.h |  6 ++-
 lib/sbi/sbi_hfence.S     | 84 ++++++++++++++++++++++++++++++++++------
 lib/sbi/sbi_tlb.c        |  4 +-
 3 files changed, 78 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_hfence.h b/include/sbi/sbi_hfence.h
index 824a8d60aab..4420f279352 100644
--- a/include/sbi/sbi_hfence.h
+++ b/include/sbi/sbi_hfence.h
@@ -10,8 +10,9 @@
 
 #ifndef __SBI_FENCE_H__
 #define __SBI_FENCE_H__
+
 /** Invalidate Stage2 TLBs for given VMID and guest physical address */
-void __sbi_hfence_gvma_vmid_gpa(unsigned long vmid, unsigned long gpa);
+void __sbi_hfence_gvma_vmid_gpa(unsigned long gpa, unsigned long vmid);
 
 /** Invalidate Stage2 TLBs for given VMID */
 void __sbi_hfence_gvma_vmid(unsigned long vmid);
@@ -23,7 +24,7 @@ void __sbi_hfence_gvma_gpa(unsigned long gpa);
 void __sbi_hfence_gvma_all(void);
 
 /** Invalidate unified TLB entries for given asid and guest virtual address */
-void __sbi_hfence_vvma_asid_va(unsigned long asid, unsigned long va);
+void __sbi_hfence_vvma_asid_va(unsigned long va, unsigned long asid);
 
 /** Invalidate unified TLB entries for given ASID for a guest*/
 void __sbi_hfence_vvma_asid(unsigned long asid);
@@ -33,4 +34,5 @@ void __sbi_hfence_vvma_va(unsigned long va);
 
 /** Invalidate all possible Stage2 TLBs */
 void __sbi_hfence_vvma_all(void);
+
 #endif
diff --git a/lib/sbi/sbi_hfence.S b/lib/sbi/sbi_hfence.S
index 30a6e9fa9a4..d05becbf2f5 100644
--- a/lib/sbi/sbi_hfence.S
+++ b/lib/sbi/sbi_hfence.S
@@ -9,67 +9,127 @@
  */
 
 	/*
-	 * Instruction encoding of hfence.gvma is:
+	 * HFENCE.GVMA rs1, rs2
+	 * HFENCE.GVMA zero, rs2
+	 * HFENCE.GVMA rs1
+	 * HFENCE.GVMA
+	 *
+	 * rs1!=zero and rs2!=zero ==> HFENCE.GVMA rs1, rs2
+	 * rs1==zero and rs2!=zero ==> HFENCE.GVMA zero, rs2
+	 * rs1!=zero and rs2==zero ==> HFENCE.GVMA rs1
+	 * rs1==zero and rs2==zero ==> HFENCE.GVMA
+	 *
+	 * Instruction encoding of HFENCE.GVMA is:
 	 * 0110001 rs2(5) rs1(5) 000 00000 1110011
 	 */
 
 	.align 3
 	.global __sbi_hfence_gvma_vmid_gpa
 __sbi_hfence_gvma_vmid_gpa:
-	/* hfence.gvma a1, a0 */
-	.word 0x62a60073
+	/*
+	 * rs1 = a0 (GPA)
+	 * rs2 = a1 (VMID)
+	 * HFENCE.GVMA a0, a1
+	 * 0110001 01011 01010 000 00000 1110011
+	 */
+	.word 0x62b50073
 	ret
 
 	.align 3
 	.global __sbi_hfence_gvma_vmid
 __sbi_hfence_gvma_vmid:
-	/* hfence.gvma zero, a0 */
+	/*
+	 * rs1 = zero
+	 * rs2 = a0 (VMID)
+	 * HFENCE.GVMA zero, a0
+	 * 0110001 01010 00000 000 00000 1110011
+	 */
 	.word 0x62a00073
 	ret
 
 	.align 3
 	.global __sbi_hfence_gvma_gpa
 __sbi_hfence_gvma_gpa:
-	/* hfence.gvma a0 */
+	/*
+	 * rs1 = a0 (GPA)
+	 * rs2 = zero
+	 * HFENCE.GVMA a0
+	 * 0110001 00000 01010 000 00000 1110011
+	 */
 	.word 0x62050073
 	ret
 
 	.align 3
 	.global __sbi_hfence_gvma_all
 __sbi_hfence_gvma_all:
-	/* hfence.gvma */
+	/*
+	 * rs1 = zero
+	 * rs2 = zero
+	 * HFENCE.GVMA
+	 * 0110001 00000 00000 000 00000 1110011
+	 */
 	.word 0x62000073
 	ret
 
 	/*
-	 * Instruction encoding of hfence.bvma is:
+	 * HFENCE.VVMA rs1, rs2
+	 * HFENCE.VVMA zero, rs2
+	 * HFENCE.VVMA rs1
+	 * HFENCE.VVMA
+	 *
+	 * rs1!=zero and rs2!=zero ==> HFENCE.VVMA rs1, rs2
+	 * rs1==zero and rs2!=zero ==> HFENCE.VVMA zero, rs2
+	 * rs1!=zero and rs2==zero ==> HFENCE.VVMA rs1
+	 * rs1==zero and rs2==zero ==> HFENCE.vVMA
+	 *
+	 * Instruction encoding of HFENCE.VVMA is:
 	 * 0010001 rs2(5) rs1(5) 000 00000 1110011
 	 */
 
 	.align 3
 	.global __sbi_hfence_vvma_asid_va
 __sbi_hfence_vvma_asid_va:
-	/* hfence.bvma a1, a0 */
-	.word 0x22a60073
+	/*
+	 * rs1 = a0 (VA)
+	 * rs2 = a1 (ASID)
+	 * HFENCE.VVMA a0, a1
+	 * 0010001 01011 01010 000 00000 1110011
+	 */
+	.word 0x22b50073
 	ret
 
 	.align 3
 	.global __sbi_hfence_vvma_asid
 __sbi_hfence_vvma_asid:
-	/* hfence.bvma zero, a0 */
+	/*
+	 * rs1 = zero
+	 * rs2 = a0 (ASID)
+	 * HFENCE.VVMA zero, a0
+	 * 0010001 01010 00000 000 00000 1110011
+	 */
 	.word 0x22a00073
 	ret
 
 	.align 3
 	.global __sbi_hfence_vvma_va
 __sbi_hfence_vvma_va:
-	/* hfence.bvma a0 */
+	/*
+	 * rs1 = a0 (VA)
+	 * rs2 = zero
+	 * HFENCE.VVMA zero, a0
+	 * 0010001 00000 01010 000 00000 1110011
+	 */
 	.word 0x22050073
 	ret
 
 	.align 3
 	.global __sbi_hfence_vvma_all
 __sbi_hfence_vvma_all:
-	/* hfence.bvma */
+	/*
+	 * rs1 = zero
+	 * rs2 = zero
+	 * HFENCE.VVMA
+	 * 0010001 00000 00000 000 00000 1110011
+	 */
 	.word 0x22000073
 	ret
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index c6ca7b195ee..c8e62cdd261 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -112,7 +112,7 @@ static void sbi_tlb_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__sbi_hfence_vvma_asid_va(asid, start + i);
+		__sbi_hfence_vvma_asid_va(start + i, asid);
 	}
 
 done:
@@ -137,7 +137,7 @@ static void sbi_tlb_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__sbi_hfence_gvma_vmid_gpa(vmid, start+i);
+		__sbi_hfence_gvma_vmid_gpa(start + i, vmid);
 	}
 }
 

From 6966ad0abe7077b1b5c9342f588621426d997c38 Mon Sep 17 00:00:00 2001
From: Alexandre Ghiti <alex@ghiti.fr>
Date: Sat, 13 Jun 2020 02:59:13 -0400
Subject: [PATCH 0621/1765] platform/lib: Allow the OS to map the regions that
 are protected by PMP

This is achieved by removing the 'no-map' property from the
'reserved-memory' node when PMP is present, otherwise we keep it as it
offers a small protection if the OS does not map this region at all.
A new callback in platform_override is introduced and allows to fixup the
device-tree. It is used here to override this new default behaviour on
SiFive Fu540 platforms that has an erratum that prevents S-mode software
to access a PMP protected region using 1GB page table mapping.

If PMP is present, telling the OS not to map the reserved regions does not
add much protection since it only avoids access to regions that are already
protected by PMP. But by not allowing the OS to map those regions, it
creates holes in the OS system memory map and prevents the use of
hugepages which would generate, among other benefits, less TLB miss.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_fixup.h            | 14 ++++++
 lib/utils/fdt/fdt_fixup.c                    | 49 +++++++++++++++-----
 platform/generic/include/platform_override.h |  1 +
 platform/generic/platform.c                  |  6 +++
 platform/generic/sifive_fu540.c              | 14 ++++++
 platform/sifive/fu540/platform.c             |  7 +++
 6 files changed, 80 insertions(+), 11 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index 54568c2b27a..0697a18ee81 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -47,6 +47,20 @@ void fdt_plic_fixup(void *fdt, const char *compat);
  */
 int fdt_reserved_memory_fixup(void *fdt);
 
+/**
+ * Fix up the reserved memory subnodes in the device tree
+ *
+ * This routine adds the no-map property to the reserved memory subnodes so
+ * that the OS does not map those PMP protected memory regions.
+ *
+ * Platform codes must call this helper in their final_init() after fdt_fixups()
+ * if the OS should not map the PMP protected reserved regions.
+ *
+ * @param fdt: device tree blob
+ * @return zero on success and -ve on failure
+ */
+int fdt_reserved_memory_nomap_fixup(void *fdt);
+
 /**
  * General device tree fix-up
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 49848b2d5ad..adf1be3d15d 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -70,7 +70,7 @@ void fdt_plic_fixup(void *fdt, const char *compat)
 
 static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 				       unsigned long size, int index,
-				       int parent)
+				       int parent, bool no_map)
 {
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
@@ -99,14 +99,16 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 	if (subnode < 0)
 		return subnode;
 
-	/*
-	 * Tell operating system not to create a virtual
-	 * mapping of the region as part of its standard
-	 * mapping of system memory.
-	 */
-	err = fdt_setprop_empty(fdt, subnode, "no-map");
-	if (err < 0)
-		return err;
+	if (no_map) {
+		/*
+		 * Tell operating system not to create a virtual
+		 * mapping of the region as part of its standard
+		 * mapping of system memory.
+		 */
+		err = fdt_setprop_empty(fdt, subnode, "no-map");
+		if (err < 0)
+			return err;
+	}
 
 	/* encode the <reg> property value */
 	val = reg;
@@ -199,7 +201,8 @@ int fdt_reserved_memory_fixup(void *fdt)
 		 */
 		addr = scratch->fw_start & ~(scratch->fw_size - 1UL);
 		size = (1UL << log2roundup(scratch->fw_size));
-		return fdt_resv_memory_update_node(fdt, addr, size, 0, parent);
+		return fdt_resv_memory_update_node(fdt, addr, size,
+						   0, parent, true);
 	}
 
 	for (i = 0, j = 0; i < sbi_hart_pmp_count(scratch); i++) {
@@ -211,13 +214,37 @@ int fdt_reserved_memory_fixup(void *fdt)
 		if (prot & (PMP_R | PMP_W | PMP_X))
 			continue;
 
-		fdt_resv_memory_update_node(fdt, addr, size, j, parent);
+		fdt_resv_memory_update_node(fdt, addr, size, j, parent, false);
 		j++;
 	}
 
 	return 0;
 }
 
+int fdt_reserved_memory_nomap_fixup(void *fdt)
+{
+	int parent, subnode;
+	int err;
+
+	/* Locate the reserved memory node */
+	parent = fdt_path_offset(fdt, "/reserved-memory");
+	if (parent < 0)
+		return parent;
+
+	fdt_for_each_subnode(subnode, fdt, parent) {
+		/*
+		 * Tell operating system not to create a virtual
+		 * mapping of the region as part of its standard
+		 * mapping of system memory.
+		 */
+		err = fdt_setprop_empty(fdt, subnode, "no-map");
+		if (err < 0)
+			return err;
+	}
+
+	return 0;
+}
+
 void fdt_fixups(void *fdt)
 {
 	fdt_plic_fixup(fdt, "riscv,plic0");
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 1262627e2ff..8a53cdf9ac2 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -21,6 +21,7 @@ struct platform_override {
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
 	int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
 };
 
 #endif
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 57058ff134a..c3cf423d1eb 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -153,6 +153,12 @@ static int generic_final_init(bool cold_boot)
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
 
+	if (generic_plat && generic_plat->fdt_fixup) {
+		rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
+		if (rc)
+			return rc;
+	}
+
 	return 0;
 }
 
diff --git a/platform/generic/sifive_fu540.c b/platform/generic/sifive_fu540.c
index 9ddafa0e9bc..08f7bfc401e 100644
--- a/platform/generic/sifive_fu540.c
+++ b/platform/generic/sifive_fu540.c
@@ -9,6 +9,7 @@
 
 #include <platform_override.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 
 static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
 {
@@ -19,6 +20,18 @@ static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
 	return 0;
 }
 
+static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match)
+{
+	/*
+	 * SiFive Freedom U540 has an erratum that prevents S-mode software
+	 * to access a PMP protected region using 1GB page table mapping, so
+	 * always add the no-map attribute on this platform.
+	 */
+	fdt_reserved_memory_nomap_fixup(fdt);
+
+	return 0;
+}
+
 static const struct fdt_match sifive_fu540_match[] = {
 	{ .compatible = "sifive,fu540" },
 	{ .compatible = "sifive,fu540g" },
@@ -30,4 +43,5 @@ static const struct fdt_match sifive_fu540_match[] = {
 const struct platform_override sifive_fu540 = {
 	.match_table = sifive_fu540_match,
 	.tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
+	.fdt_fixup = sifive_fu540_fdt_fixup,
 };
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 48d887f8513..755e479c9da 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -63,6 +63,13 @@ static void fu540_modify_dt(void *fdt)
 	fdt_cpu_fixup(fdt);
 
 	fdt_fixups(fdt);
+
+	/*
+	 * SiFive Freedom U540 has an erratum that prevents S-mode software
+	 * to access a PMP protected region using 1GB page table mapping, so
+	 * always add the no-map attribute on this platform.
+	 */
+	fdt_reserved_memory_nomap_fixup(fdt);
 }
 
 static int fu540_final_init(bool cold_boot)

From 518e85cccb18a6dfe71fc8d1227c8f8d74527dc9 Mon Sep 17 00:00:00 2001
From: Huaqi Fang <578567190@qq.com>
Date: Fri, 12 Jun 2020 17:01:49 +0800
Subject: [PATCH 0622/1765] platform: Update Nuclei ux600 platform support

Changes are made to support our FPGA evaluation board,
it has DDR memory(0xA0000000-0xB0000000).

* Adapt the config.mk to match FPGA evaluation board DDR memory address
* Since the RISC-V CPU core frequency of FPGA might change, so we use the
  fixed TIMER frequency to measure the real CPU core frequency.
* And the UART baudrate has to set to 57600bps for Nuclei FPGA evaluation
  board when CPU core frequency is about 8MHz, otherwise the UART input
  will not work correctly.

Signed-off-by: Huaqi Fang <578567190@qq.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/nuclei/ux600/config.mk  |  8 ++--
 platform/nuclei/ux600/platform.c | 80 ++++++++++++++++++++++++++++++--
 2 files changed, 79 insertions(+), 9 deletions(-)

diff --git a/platform/nuclei/ux600/config.mk b/platform/nuclei/ux600/config.mk
index 0d30f29d229..dddcc4ea567 100644
--- a/platform/nuclei/ux600/config.mk
+++ b/platform/nuclei/ux600/config.mk
@@ -19,12 +19,12 @@ platform-runcmd = xl_spike \
   $(build_dir)/platform/nuclei/ux600/firmware/fw_payload.elf
 
 # Blobs to build
-FW_TEXT_START=0x80000000
+FW_TEXT_START=0xA0000000
 FW_DYNAMIC=y
 FW_JUMP=y
 
-FW_JUMP_ADDR=0x80200000
-FW_JUMP_FDT_ADDR=0x88000000
+FW_JUMP_ADDR=0xA0200000
+FW_JUMP_FDT_ADDR=0xA8000000
 FW_PAYLOAD=y
 FW_PAYLOAD_OFFSET=0x200000
-FW_PAYLOAD_FDT_ADDR=0x88000000
+FW_PAYLOAD_FDT_ADDR=0xA8000000
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index ad4ba2b29fd..ba6803eaa42 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -23,11 +23,12 @@
 /* clang-format off */
 
 #define UX600_HART_COUNT		1
-
-#define UX600_SYS_CLK			1000000000
+#define UX600_TIMER_FREQ		32768
 
 /* Nuclei timer base address */
 #define UX600_NUCLEI_TIMER_ADDR		0x2000000
+#define UX600_NUCLEI_TIMER_MSFTRST_OFS	0xFF0
+#define UX600_NUCLEI_TIMER_MSFTRST_KEY	0x80000A5F
 /* The clint compatiable timer offset is 0x1000 against nuclei timer */
 #define UX600_CLINT_TIMER_ADDR		(UX600_NUCLEI_TIMER_ADDR + 0x1000)
 
@@ -39,9 +40,20 @@
 #define UX600_UART1_ADDR		0x10023000
 
 #define UX600_DEBUG_UART		UX600_UART0_ADDR
-#define UX600_UART_BAUDRATE		115200
+
+#ifndef UX600_UART_BAUDRATE
+#define UX600_UART_BAUDRATE		57600
+#endif
+
+#define UX600_GPIO_ADDR			0x10012000
+#define UX600_GPIO_IOF_EN_OFS		0x38
+#define UX600_GPIO_IOF_SEL_OFS		0x3C
+#define UX600_GPIO_IOF_UART0_MASK	0x00030000
+
+#define UX600_TIMER_VALUE()		readl((void *)UX600_NUCLEI_TIMER_ADDR)
 
 /* clang-format on */
+static u32 ux600_clk_freq = 8000000;
 
 static struct plic_data plic = {
 	.addr = UX600_PLIC_ADDR,
@@ -54,6 +66,60 @@ static struct clint_data clint = {
 	.hart_count = UX600_HART_COUNT,
 	.has_64bit_mmio = TRUE,
 };
+static u32 measure_cpu_freq(u32 n)
+{
+	u32 start_mtime, delta_mtime;
+	u32 mtime_freq = UX600_TIMER_FREQ;
+	u32 tmp = (u32)UX600_TIMER_VALUE();
+	u32 start_mcycle, delta_mcycle, freq;
+
+	/* Don't start measuring until we see an mtime tick */
+	do {
+		start_mtime = (u32)UX600_TIMER_VALUE();
+	} while (start_mtime == tmp);
+
+	start_mcycle = csr_read(mcycle);
+
+	do {
+		delta_mtime = (u32)UX600_TIMER_VALUE() - start_mtime;
+	} while (delta_mtime < n);
+
+	delta_mcycle = csr_read(mcycle) - start_mcycle;
+
+	freq = (delta_mcycle / delta_mtime) * mtime_freq
+		+ ((delta_mcycle % delta_mtime) * mtime_freq) / delta_mtime;
+
+	return freq;
+}
+
+static u32 ux600_get_clk_freq(void)
+{
+	u32 cpu_freq;
+
+	/* warm up */
+	measure_cpu_freq(1);
+	/* measure for real */
+	cpu_freq = measure_cpu_freq(100);
+
+	return cpu_freq;
+}
+
+static int ux600_early_init(bool cold_boot)
+{
+	u32 regval;
+
+	/* Measure CPU Frequency using Timer */
+	ux600_clk_freq = ux600_get_clk_freq();
+
+	/* Init GPIO UART pinmux */
+	regval = readl((void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_SEL_OFS)) &
+		 ~UX600_GPIO_IOF_UART0_MASK;
+	writel(regval, (void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_SEL_OFS));
+	regval = readl((void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS)) |
+		UX600_GPIO_IOF_UART0_MASK;
+	writel(regval, (void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS));
+	return 0;
+}
 
 static void ux600_modify_dt(void *fdt)
 {
@@ -75,7 +141,7 @@ static int ux600_final_init(bool cold_boot)
 
 static int ux600_console_init(void)
 {
-	return sifive_uart_init(UX600_DEBUG_UART, UX600_SYS_CLK,
+	return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
 				UX600_UART_BAUDRATE);
 }
 
@@ -122,11 +188,15 @@ static int ux600_timer_init(bool cold_boot)
 
 static int ux600_system_reset(u32 type)
 {
-	/* For now nothing to do. */
+	/* Reset system using MSFTRST register in Nuclei Timer. */
+	writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR
+					+ UX600_NUCLEI_TIMER_MSFTRST_OFS));
+	while(1);
 	return 0;
 }
 
 const struct sbi_platform_operations platform_ops = {
+	.early_init		= ux600_early_init,
 	.final_init		= ux600_final_init,
 	.console_putc		= sifive_uart_putc,
 	.console_getc		= sifive_uart_getc,

From d5725c24c6ea04368d90bc0f5af3ec20862b4a3b Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 16 Jun 2020 17:06:15 -0700
Subject: [PATCH 0623/1765] lib: Don't print delegation CSRs if there is no
 S-Mode

If the platform doesn't support S-Mode don't print the delegation
registers.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_hart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 88d0ac81d6d..e943346b53b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -122,6 +122,10 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
 {
+	if (!misa_extension('S'))
+		/* No delegation possible as mideleg does not exist*/
+		return;
+
 #if __riscv_xlen == 32
 	sbi_printf("MIDELEG : 0x%08lx\n", csr_read(CSR_MIDELEG));
 	sbi_printf("MEDELEG : 0x%08lx\n", csr_read(CSR_MEDELEG));

From 637b348224d557cd27c187d4465a90852ddde8a9 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Tue, 16 Jun 2020 17:07:33 -0700
Subject: [PATCH 0624/1765] lib: Fix the SBI_HART_HAS_MCOUNTEREN feature check

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e943346b53b..1d1c6d670fd 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -49,7 +49,7 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 	if (misa_extension('S') &&
 	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
 		csr_write(CSR_SCOUNTEREN, -1);
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
 		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* Disable all interrupts */

From db56ef367cd6dc9dab94076f4c8a3fa9d91bd1f2 Mon Sep 17 00:00:00 2001
From: Vijai Kumar K <vijai@behindbytes.com>
Date: Wed, 17 Jun 2020 19:25:16 +0530
Subject: [PATCH 0625/1765] platform: Add support for Shakti C-class SoC from
 IIT-M

C-Class is a member of the SHAKTI family of processors from Indian
Institute of Technology - Madras(IIT-M).
It is an extremely configurable and commercial-grade 5-stage in-order
core supporting the standard RV64GCSUN ISA extensions.

https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md

We add OpenSBI support for Shakti C-class SoC.

Signed-off-by: Vijai Kumar K <vijai@behindbytes.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/generic.md               |  2 ++
 docs/platform/platform.md              |  5 +++
 docs/platform/shakti_cclass.md         | 33 +++++++++++++++++++
 include/sbi_utils/fdt/fdt_helper.h     |  3 ++
 include/sbi_utils/serial/shakti-uart.h | 18 +++++++++++
 lib/utils/fdt/fdt_helper.c             | 37 ++++++++++++++++++++++
 lib/utils/serial/fdt_serial.c          |  2 ++
 lib/utils/serial/fdt_serial_shakti.c   | 35 ++++++++++++++++++++
 lib/utils/serial/objects.mk            |  2 ++
 lib/utils/serial/shakti-uart.c         | 44 ++++++++++++++++++++++++++
 10 files changed, 181 insertions(+)
 create mode 100644 docs/platform/shakti_cclass.md
 create mode 100644 include/sbi_utils/serial/shakti-uart.h
 create mode 100644 lib/utils/serial/fdt_serial_shakti.c
 create mode 100644 lib/utils/serial/shakti-uart.c

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index 60916c7b53d..f1f7f6424fe 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -47,6 +47,8 @@ RISC-V Platforms Using Generic Platform
 
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
 * **Spike** (*[spike.md]*)
+* **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
 
 [qemu_virt.md]: qemu_virt.md
 [spike.md]: spike.md
+[shakti_cclass.md]: shakti_cclass.md
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 3e0dc39c263..7f470681369 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -38,6 +38,10 @@ OpenSBI currently supports the following virtual and hardware platforms:
   on ariane core. More details on this platform can be found in the file
   *[fpga_openpiton.md]*.
 
+* **Shakti C-class SoC Platform**: Platform support for Shakti C-class
+  processor based SOCs. More details on this platform can be found in the
+  file *[shakti_cclass.md]*.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *object.mk*,
@@ -52,3 +56,4 @@ facilitate the implementation.
 [thead-c910.md]: thead-c910.md
 [spike.md]: spike.md
 [fpga_openpiton.md]: fpga_openpiton.md
+[shakti_cclass.md]: shakti_cclass.md
diff --git a/docs/platform/shakti_cclass.md b/docs/platform/shakti_cclass.md
new file mode 100644
index 00000000000..2f4a699b0ca
--- /dev/null
+++ b/docs/platform/shakti_cclass.md
@@ -0,0 +1,33 @@
+Shakti C-class SoC Platform
+===========================
+C-Class is a member of the SHAKTI family of processors from
+Indian Institute of Technology - Madras (IIT-M).
+
+It is an extremely configurable and commercial-grade 5-stage
+in-order core supporting the standard RV64GCSUN ISA extensions.
+
+For more details, refer:
+* https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md
+* https://c-class.readthedocs.io/en/latest
+* https://shakti.org.in
+
+Platform Options
+----------------
+
+The *Shakti C-class SoC* platform does not have any platform-specific
+options.
+
+Building Shakti C-class Platform
+--------------------------------
+
+**Linux Kernel Payload**
+
+```
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<shakti.dtb path>
+```
+
+**Test Payload**
+
+```
+make PLATFORM=generic FW_PAYLOAD_FDT_PATH=<shakti.dtb path>
+```
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 1b780fb7e4b..f5222deb478 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -39,6 +39,9 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
 int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
 
+int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart);
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
diff --git a/include/sbi_utils/serial/shakti-uart.h b/include/sbi_utils/serial/shakti-uart.h
new file mode 100644
index 00000000000..08043be110a
--- /dev/null
+++ b/include/sbi_utils/serial/shakti-uart.h
@@ -0,0 +1,18 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Vijai Kumar K <vijai@behindbytes.com>
+ */
+
+#ifndef __SERIAL_SHAKTI_UART_H__
+#define __SERIAL_SHAKTI_UART_H__
+
+#include <sbi/sbi_types.h>
+
+void shakti_uart_putc(char ch);
+
+int shakti_uart_getc(void);
+
+int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
+
+#endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 887d6ed654a..78077f79015 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -26,6 +26,9 @@
 #define DEFAULT_SIFIVE_UART_REG_SHIFT		0
 #define DEFAULT_SIFIVE_UART_REG_IO_WIDTH	4
 
+#define DEFAULT_SHAKTI_UART_FREQ		50000000
+#define DEFAULT_SHAKTI_UART_BAUD		115200
+
 const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 				       const struct fdt_match *match_table)
 {
@@ -164,6 +167,40 @@ int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
 	return 0;
 }
 
+int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart)
+{
+	int len, rc;
+	const fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+
+	if (nodeoffset < 0 || !uart || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	uart->addr = reg_addr;
+
+	/**
+	 * UART address is mandaotry. clock-frequency and current-speed
+	 * may not be present. Don't return error.
+	 */
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
+	if (len > 0 && val)
+		uart->freq = fdt32_to_cpu(*val);
+	else
+		uart->freq = DEFAULT_SHAKTI_UART_FREQ;
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
+	if (len > 0 && val)
+		uart->baud = fdt32_to_cpu(*val);
+	else
+		uart->baud = DEFAULT_SHAKTI_UART_BAUD;
+
+	return 0;
+}
+
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index fa6c478596b..b9ce67ef1df 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -15,11 +15,13 @@
 extern struct fdt_serial fdt_serial_uart8250;
 extern struct fdt_serial fdt_serial_sifive;
 extern struct fdt_serial fdt_serial_htif;
+extern struct fdt_serial fdt_serial_shakti;
 
 static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_uart8250,
 	&fdt_serial_sifive,
 	&fdt_serial_htif,
+	&fdt_serial_shakti,
 };
 
 static void dummy_putc(char ch)
diff --git a/lib/utils/serial/fdt_serial_shakti.c b/lib/utils/serial/fdt_serial_shakti.c
new file mode 100644
index 00000000000..c6385a577f8
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_shakti.c
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Vijai Kumar K <vijai@behindbytes.com>
+ *
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/shakti-uart.h>
+
+static int serial_shakti_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart;
+
+	rc = fdt_parse_shakti_uart_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return shakti_uart_init(uart.addr, uart.freq, uart.baud);
+}
+
+static const struct fdt_match serial_shakti_match[] = {
+	{ .compatible = "shakti,uart0" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_shakti = {
+	.match_table = serial_shakti_match,
+	.init = serial_shakti_init,
+	.getc = shakti_uart_getc,
+	.putc = shakti_uart_putc
+};
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index d81663bf2d1..c0746f07ef3 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -9,7 +9,9 @@
 
 libsbiutils-objs-y += serial/fdt_serial.o
 libsbiutils-objs-y += serial/fdt_serial_htif.o
+libsbiutils-objs-y += serial/fdt_serial_shakti.o
 libsbiutils-objs-y += serial/fdt_serial_sifive.o
 libsbiutils-objs-y += serial/fdt_serial_uart8250.o
+libsbiutils-objs-y += serial/shakti-uart.o
 libsbiutils-objs-y += serial/sifive-uart.o
 libsbiutils-objs-y += serial/uart8250.o
diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
new file mode 100644
index 00000000000..493edcf7d4d
--- /dev/null
+++ b/lib/utils/serial/shakti-uart.c
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Vijai Kumar K <vijai@behindbytes.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/shakti-uart.h>
+
+#define REG_BAUD	0x00
+#define REG_TX		0x04
+#define REG_RX		0x08
+#define REG_STATUS	0x0C
+#define REG_DELAY	0x10
+#define REG_CONTROL	0x14
+#define REG_INT_EN	0x18
+#define REG_IQ_CYCLES	0x1C
+#define REG_RX_THRES	0x20
+
+static volatile void *uart_base;
+
+void shakti_uart_putc(char ch)
+{
+	while((readw(uart_base + REG_STATUS) & 0x2) == 0);
+	writeb(ch, uart_base + REG_TX);
+}
+
+int shakti_uart_getc(void)
+{
+	u16 status = readw(uart_base + REG_STATUS);
+	if (status & 0x8)
+		return readb(uart_base + REG_RX);
+	return -1;
+}
+
+int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
+{
+	uart_base = (volatile void *)base;
+	u16 baud = (u16)(in_freq/(16 * baudrate));
+	writew(baud, uart_base + REG_BAUD);
+
+	return 0;
+}

From 9bd5f8f17d31f8989525643a04da87d090fe3033 Mon Sep 17 00:00:00 2001
From: Liush <liush.damon@gmail.com>
Date: Fri, 19 Jun 2020 11:55:19 +0800
Subject: [PATCH 0626/1765] lib: sbi: Fix 32/64 bits variable compatibility

On RV64,"unsigned long" is 64bit and "unsigned int" is 32bit. So in
function "pmp_get" and "pmp_set", if "pmpcfg_shift >= 32", "0xff << pmpcfg_shift"
will go beyond "unsigned int" width. This patch tries to fix this issue.

In function 'pmp_get':
	cfgmask = (0xff << pmpcfg_shift);
			-->
	cfgmask = (0xffUL << pmpcfg_shift);
In function 'pmp_set':
	cfgmask = ~(0xff << pmpcfg_shift);
			-->
	cfgmask = ~(0xffUL << pmpcfg_shift);

Signed-off-by: Liush <liush.damon@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 3c3a5ad03f8..6dfebd91d0d 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -268,7 +268,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 
 	/* encode PMP config */
 	prot |= (log2len == PMP_SHIFT) ? PMP_A_NA4 : PMP_A_NAPOT;
-	cfgmask = ~(0xff << pmpcfg_shift);
+	cfgmask = ~(0xffUL << pmpcfg_shift);
 	pmpcfg	= (csr_read_num(pmpcfg_csr) & cfgmask);
 	pmpcfg |= ((prot << pmpcfg_shift) & ~cfgmask);
 
@@ -320,7 +320,7 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 		return SBI_ENOTSUPP;
 
 	/* decode PMP config */
-	cfgmask = (0xff << pmpcfg_shift);
+	cfgmask = (0xffUL << pmpcfg_shift);
 	pmpcfg	= csr_read_num(pmpcfg_csr) & cfgmask;
 	prot	= pmpcfg >> pmpcfg_shift;
 

From 2314101989684585f942b50a827aac4886825ba1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 10 Jun 2020 18:39:53 +0530
Subject: [PATCH 0627/1765] lib: Don't return any invalid error from SBI ecall

We should only return valid error codes from SBI ecalls as
defined by the RISC-V SBI spec.

To achieve this:
1. We use SBI_Exxxx defines for OpenSBI internal errors with
   error values starting from -1000
2. We use SBI_ERR_xxxx defines for errors defined by SBI spec
3. We map some of the SBI_Exxxx defines to SBI_ERR_xxxx defines
   which are semantically same
4. We throw a error print and force return error code to
   SBI_ERR_FAILED in sbi_ecall_handler() if we see an invalid
   error code being returned to S-mode

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 14 ++++++++++++-
 include/sbi/sbi_error.h           | 35 +++++++++++++++++--------------
 lib/sbi/sbi_ecall.c               |  8 +++++++
 lib/sbi/sbi_hart.c                |  2 +-
 lib/sbi/sbi_hsm.c                 |  4 ++--
 5 files changed, 43 insertions(+), 20 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 0cdde393d6b..af30500ea25 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -13,7 +13,7 @@
 /* clang-format off */
 
 /* SBI Extension IDs */
-#define	SBI_EXT_0_1_SET_TIMER			0x0
+#define SBI_EXT_0_1_SET_TIMER			0x0
 #define SBI_EXT_0_1_CONSOLE_PUTCHAR		0x1
 #define SBI_EXT_0_1_CONSOLE_GETCHAR		0x2
 #define SBI_EXT_0_1_CLEAR_IPI			0x3
@@ -69,6 +69,18 @@
 #define SBI_EXT_VENDOR_END			0x09FFFFFF
 #define SBI_EXT_FIRMWARE_START			0x0A000000
 #define SBI_EXT_FIRMWARE_END			0x0AFFFFFF
+
+/* SBI return error codes */
+#define SBI_SUCCESS				0
+#define SBI_ERR_FAILED				-1
+#define SBI_ERR_NOT_SUPPORTED			-2
+#define SBI_ERR_INVALID_PARAM			-3
+#define SBI_ERR_DENIED				-4
+#define SBI_ERR_INVALID_ADDRESS			-5
+#define SBI_ERR_ALREADY_AVAILABLE		-6
+
+#define SBI_LAST_ERR				SBI_ERR_ALREADY_AVAILABLE
+
 /* clang-format on */
 
 #endif
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 574a84d098f..3655d122006 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -10,25 +10,28 @@
 #ifndef __SBI_ERROR_H__
 #define __SBI_ERROR_H__
 
+#include <sbi/sbi_ecall_interface.h>
+
 /* clang-format off */
 
 #define SBI_OK			0
-#define SBI_EFAIL		-1
-#define SBI_ENOTSUPP		-2
-#define SBI_EINVAL		-3
-#define SBI_DENIED		-4
-#define SBI_INVALID_ADDR	-5
-#define SBI_ENODEV		-6
-#define SBI_ENOSYS		-7
-#define SBI_ETIMEDOUT		-8
-#define SBI_EIO			-9
-#define SBI_EILL		-10
-#define SBI_ENOSPC		-11
-#define SBI_ENOMEM		-12
-#define SBI_ETRAP		-13
-#define SBI_EUNKNOWN		-14
-#define SBI_ENOENT		-15
-#define SBI_EALREADY_STARTED	-16
+#define SBI_EFAIL		SBI_ERR_FAILED
+#define SBI_ENOTSUPP		SBI_ERR_NOT_SUPPORTED
+#define SBI_EINVAL		SBI_ERR_INVALID_PARAM
+#define SBI_EDENIED		SBI_ERR_DENIED
+#define SBI_EINVALID_ADDR	SBI_ERR_INVALID_ADDRESS
+#define SBI_EALREADY		SBI_ERR_ALREADY_AVAILABLE
+
+#define SBI_ENODEV		-1000
+#define SBI_ENOSYS		-1001
+#define SBI_ETIMEDOUT		-1002
+#define SBI_EIO			-1003
+#define SBI_EILL		-1004
+#define SBI_ENOSPC		-1005
+#define SBI_ENOMEM		-1006
+#define SBI_ETRAP		-1007
+#define SBI_EUNKNOWN		-1008
+#define SBI_ENOENT		-1009
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 1a54c6e2fca..64c99337099 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
@@ -124,6 +125,13 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 		trap.epc = regs->mepc;
 		sbi_trap_redirect(regs, &trap);
 	} else {
+		if (ret < SBI_LAST_ERR) {
+			sbi_printf("%s: Invalid error %d for ext=0x%lx "
+				   "func=0x%lx\n", __func__, ret,
+				   extension_id, func_id);
+			ret = SBI_ERR_FAILED;
+		}
+
 		/*
 		 * This function should return non-zero value only in case of
 		 * fatal error. However, there is no good way to distinguish
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 1d1c6d670fd..fa20bd2556e 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -200,7 +200,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 			continue;
 		if (tempaddr <= addr && addr <= tempaddr + size)
 			if (!(prot & attr))
-				return SBI_INVALID_ADDR;
+				return SBI_EINVALID_ADDR;
 	}
 
 	return SBI_OK;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 4330a22f93c..013647a9b01 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -219,7 +219,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	hstate = atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
 				SBI_HART_STARTING);
 	if (hstate == SBI_HART_STARTED)
-		return SBI_EALREADY_STARTED;
+		return SBI_EALREADY;
 
 	/**
 	 * if a hart is already transition to start or stop, another start call
@@ -263,7 +263,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	if (oldstate != SBI_HART_STARTED) {
 		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
 			   __func__, oldstate);
-		return SBI_DENIED;
+		return SBI_EDENIED;
 	}
 
 	if (exitnow)

From a98258d0b537a295f517bbc8d813007336731fa9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 20 Jun 2020 11:57:24 +0530
Subject: [PATCH 0628/1765] include: Bump-up version to 0.8

This patch updates OpenSBI version to 0.8 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index bee4bbb4731..86c8b90c537 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 7
+#define OPENSBI_VERSION_MINOR 8
 
 /**
  * OpenSBI 32-bit version with:

From 35bc810252f4e45beab3b66e30ffe4502e91f22c Mon Sep 17 00:00:00 2001
From: Bin Meng <bin.meng@windriver.com>
Date: Thu, 25 Jun 2020 18:26:02 -0700
Subject: [PATCH 0629/1765] docs/platform: Update QEMU parameter for fw_payload

Since QEMU v5.1, if there is no "-bios" option provided, the default
OpenSBI firmware will be loaded by QEMU as the BIOS automatically,
hence to load fw_payload type image, we should explicitly pass the
"-bios" option to QEMU.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/qemu_virt.md | 12 ++++++------
 docs/platform/spike.md     |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 2196e5af20b..27771485c85 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -28,7 +28,7 @@ make PLATFORM=generic
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.bin
+	-bios build/platform/generic/firmware/fw_payload.bin
 ```
 
 **U-Boot Payload**
@@ -44,7 +44,7 @@ make PLATFORM=generic FW_PAYLOAD_PATH=<uboot_build_directory>/u-boot.bin
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf
+	-bios build/platform/generic/firmware/fw_payload.elf
 ```
 or
 ```
@@ -66,7 +66,7 @@ make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Im
 Run:
 ```
 qemu-system-riscv64 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf \
+	-bios build/platform/generic/firmware/fw_payload.elf \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
@@ -95,7 +95,7 @@ make PLATFORM=generic PLATFORM_RISCV_XLEN=32
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.bin
+	-bios build/platform/generic/firmware/fw_payload.bin
 ```
 
 **U-Boot Payload**
@@ -111,7 +111,7 @@ make PLATFORM=generic PLATFORM_RISCV_XLEN=32 FW_PAYLOAD_PATH=<uboot_build_direct
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf
+	-bios build/platform/generic/firmware/fw_payload.elf
 ```
 or
 ```
@@ -133,7 +133,7 @@ make PLATFORM=generic PLATFORM_RISCV_XLEN=32 FW_PAYLOAD_PATH=<linux_build_direct
 Run:
 ```
 qemu-system-riscv32 -M virt -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf \
+	-bios build/platform/generic/firmware/fw_payload.elf \
 	-drive file=<path_to_linux_rootfs>,format=raw,id=hd0 \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
diff --git a/docs/platform/spike.md b/docs/platform/spike.md
index 8d6b4221965..79e2eb2b0d2 100644
--- a/docs/platform/spike.md
+++ b/docs/platform/spike.md
@@ -59,7 +59,7 @@ make PLATFORM=generic
 Run:
 ```
 qemu-system-riscv64 -M spike -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf
+	-bios build/platform/generic/firmware/fw_payload.elf
 ```
 
 **Linux Kernel Payload**
@@ -75,7 +75,7 @@ make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Im
 Run:
 ```
 qemu-system-riscv64 -M spike -m 256M -nographic \
-	-kernel build/platform/generic/firmware/fw_payload.elf \
+	-bios build/platform/generic/firmware/fw_payload.elf \
 	-initrd <path_to_cpio_ramdisk> \
 	-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
 ```

From 78afe11ba2e7585d48ac4e3c38b71906c83cbe6c Mon Sep 17 00:00:00 2001
From: Bin Meng <bin.meng@windriver.com>
Date: Thu, 25 Jun 2020 18:26:03 -0700
Subject: [PATCH 0630/1765] config.mk: Update QEMU run command for generic and
 sifive fu540 platforms

Since QEMU v5.1, if there is no "-bios" option provided, the default
OpenSBI firmware will be loaded by QEMU as the BIOS automatically,
hence to load fw_payload type image, we should explicitly pass the
"-bios" option to QEMU.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/generic/config.mk      | 2 +-
 platform/sifive/fu540/config.mk | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/generic/config.mk b/platform/generic/config.mk
index 8d63ecec64e..8151974f2f8 100644
--- a/platform/generic/config.mk
+++ b/platform/generic/config.mk
@@ -15,7 +15,7 @@ platform-ldflags-y =
 
 # Command for platform specific "make run"
 platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
-  -nographic -kernel $(build_dir)/platform/generic/firmware/fw_payload.elf
+  -nographic -bios $(build_dir)/platform/generic/firmware/fw_payload.elf
 
 # Blobs to build
 FW_TEXT_START=0x80000000
diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
index e76adcd5e71..23169b1b9c6 100644
--- a/platform/sifive/fu540/config.mk
+++ b/platform/sifive/fu540/config.mk
@@ -15,7 +15,7 @@ platform-ldflags-y =
 
 # Command for platform specific "make run"
 platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
-  -nographic -kernel $(build_dir)/platform/sifive/fu540/firmware/fw_payload.elf
+  -nographic -bios $(build_dir)/platform/sifive/fu540/firmware/fw_payload.elf
 
 # Blobs to build
 FW_TEXT_START=0x80000000

From ec3e5b14d52a26531f1a315e5cced326a8323ca9 Mon Sep 17 00:00:00 2001
From: Bin Meng <bin.meng@windriver.com>
Date: Thu, 25 Jun 2020 18:26:04 -0700
Subject: [PATCH 0631/1765] docs/platform: sifive_fu540: Update U-Boot
 instructions

U-Boot v2020.07 release adds SPL support to SiFive HiFive Unleashed.
Update the doc to mention that detailed build instructions are in the
U-Boot doc.

This also adds detailed command line description to show how to boot
U-Boot v2020.07 S-mode payload in the QEMU chapter.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 35 ++++++++++++++++++++++++++++++-----
 1 file changed, 30 insertions(+), 5 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 934284678c1..10084322ec8 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -41,13 +41,14 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/bo
 **U-Boot Payload**
 
 The command-line example here assumes that U-Boot was compiled using the
-sifive_fu540_defconfig configuration and with U-Boot v2020.01 (or higher).
-
-The detailed U-Boot booting guide is avaialble at [U-Boot].
+sifive_fu540_defconfig configuration and with U-Boot v2020.01, and up to
+v2020.07-rc3.
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
 ```
+For U-Boot v2020.07-rc4 or later releases, SPL support was added in U-Boot.
+Please refer to the detailed U-Boot booting guide available at [U-Boot].
 
 Flashing the OpenSBI firmware binary to storage media:
 ------------------------------------------------------
@@ -155,13 +156,37 @@ Linux kernel.
 When U-Boot v2020.01 (or higher) is used as the payload, as the SiFive FU540
 DTB for the real hardware is embedded in U-Boot binary itself, due to the same
 reason above, we need to switch the U-Boot sifive_fu540_defconfig configuration
-from CONFIG_OF_SEPARATE to CONFIG_OF_PRIOR_STAGE so that U-Boot uses the DTB
-generated by QEMU, and u-boot.bin should be used as the payload image, like:
+from **CONFIG_OF_SEPARATE** to **CONFIG_OF_PRIOR_STAGE** so that U-Boot uses the
+DTB generated by QEMU, and u-boot.bin should be used as the payload image, like:
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
 ```
 
+U-Boot v2020.07 release added SPL support to SiFive HiFive Unleashed board,
+hence a build error will be seen after you switch to **CONFIG_OF_PRIOR_STAGE**.
+
+```
+./tools/mkimage: Can't open arch/riscv/dts/hifive-unleashed-a00.dtb: No such file or directory
+./tools/mkimage: failed to build FIT
+Makefile:1402: recipe for target 'u-boot.img' failed
+make: *** [u-boot.img] Error 1
+```
+
+The above errors can be safely ignored as we don't run U-Boot SPL under QEMU.
+
+Run:
+```
+qemu-system-riscv64 -M sifive_u -m 256M -nographic \
+	-bios build/platform/sifive/fu540/firmware/fw_payload.bin
+```
+or
+```
+qemu-system-riscv64 -M sifive_u -m 256M -nographic \
+	-bios build/platform/sifive/fu540/firmware/fw_jump.bin \
+	-kernel <uboot_build_dir>/u-boot.bin
+```
+
 While the real hardware operates at the 64-bit mode, it's possible for QEMU to
 test the 32-bit OpenSBI firmware. This can be helpful for testing 32-bit SiFive
 specific drivers.

From 7d61a687755323989a35d6ba88d333cb006bab4a Mon Sep 17 00:00:00 2001
From: Tobias Klauser <tklauser@distanz.ch>
Date: Wed, 1 Jul 2020 15:07:08 +0200
Subject: [PATCH 0632/1765] README.md: fix markdown link formatting

Consistently use reference-style markdown links in the README. This
won't show the URL next to the linked text for the [Github] and [U-Boot]
links and link the text "Bootlin toolchain repository" instead of
showing it verbatim with the URL next to it.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index 8958343b155..bd41ba3a1b6 100644
--- a/README.md
+++ b/README.md
@@ -45,7 +45,7 @@ between:
    executing in VS-mode.
 
 The *RISC-V SBI specification* is maintained as an independent project by the
-RISC-V Foundation on [Github] (https://github.com/riscv/riscv-sbi-doc).
+RISC-V Foundation on [Github].
 
 The goal of the OpenSBI project is to provide an open-source reference
 implementation of the RISC-V SBI specifications for platform-specific firmwares
@@ -69,7 +69,7 @@ platform-dependent hardware manipulation functions. For all supported platforms,
 OpenSBI also provides several runtime firmware examples built using the platform
 *libplatsbi.a*. These example firmwares can be used to replace the legacy
 *riscv-pk* bootloader (aka BBL) and enable the use of well-known bootloaders
-such as [U-Boot] (https://git.denx.de/u-boot.git).
+such as [U-Boot].
 
 Supported SBI version
 ---------------------
@@ -97,8 +97,7 @@ Required Toolchain
 
 OpenSBI can be compiled natively or cross-compiled on a x86 host. For
 cross-compilation, you can build your own toolchain or just download
-a prebuilt one from the
-[Bootlin toolchain repository] (https://toolchains.bootlin.com/).
+a prebuilt one from the [Bootlin toolchain repository].
 
 Please note that only a 64-bit version of the toolchain is available in
 the Bootlin toolchain repository for now.
@@ -269,6 +268,7 @@ make I=<install_directory> install_docs
 
 [Github]: https://github.com/riscv/riscv-sbi-doc
 [U-Boot]: https://www.denx.de/wiki/U-Boot/SourceCode
+[Bootlin toolchain repository]: https://toolchains.bootlin.com/
 [COPYING.BSD]: COPYING.BSD
 [SPDX]: http://spdx.org/licenses/
 [Contribution Guideline]: docs/contributing.md

From a5f9104330353491fc6c0fdb42262543d39518d9 Mon Sep 17 00:00:00 2001
From: Bin Meng <bin.meng@windriver.com>
Date: Thu, 25 Jun 2020 02:36:39 -0700
Subject: [PATCH 0633/1765] lib/utils: fdt: Update FDT expand size to 1024 for
 reserved memory node

Currently 256 bytes is used for the FDT expand size when fixing up
reserved memory node. Increase it to 1024 bytes with an estimated
size of 64 bytes per PMP memory region by 16 regions in total.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index adf1be3d15d..a3bccae61e9 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -151,8 +151,14 @@ int fdt_reserved_memory_fixup(void *fdt)
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
 
-	/* expand the device tree to accommodate new node */
-	err  = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 256);
+	/*
+	 * Expand the device tree to accommodate new node
+	 * by the following estimated size:
+	 *
+	 * Each PMP memory region entry occupies 64 bytes.
+	 * With 16 PMP memory regions we need 64 * 16 = 1024 bytes.
+	 */
+	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 1024);
 	if (err < 0)
 		return err;
 

From ec1abf665737af032b8d58f8a5373bcaddedd902 Mon Sep 17 00:00:00 2001
From: Tobias Klauser <tklauser@distanz.ch>
Date: Tue, 7 Jul 2020 11:56:55 +0200
Subject: [PATCH 0634/1765] include: sbi_bitops: Remove dead shift assignment
 in ffs/fls

The value assigned to x by the shift assignment in the last if block of
ffs/fls is never read. Remove it.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_bitops.h | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index d920086789d..879430d4b90 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -66,10 +66,8 @@ static inline int ffs(int x)
 		x >>= 2;
 		r += 2;
 	}
-	if (!(x & 1)) {
-		x >>= 1;
+	if (!(x & 1))
 		r += 1;
-	}
 	return r;
 }
 
@@ -148,10 +146,8 @@ static inline int fls(int x)
 		x <<= 2;
 		r -= 2;
 	}
-	if (!(x & 0x80000000u)) {
-		x <<= 1;
+	if (!(x & 0x80000000u))
 		r -= 1;
-	}
 	return r;
 }
 

From 8e47649eff96c303e02fbd58cdc6c4ed341066ec Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 25 Jul 2020 17:30:39 +0800
Subject: [PATCH 0635/1765] lib: Add sbi_strncmp implementation

This commit add an implementation of sbi_strncmp.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_string.h |  7 +++++++
 lib/sbi/sbi_string.c     | 13 +++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/include/sbi/sbi_string.h b/include/sbi/sbi_string.h
index 338075fcf28..b7c2bc22abd 100644
--- a/include/sbi/sbi_string.h
+++ b/include/sbi/sbi_string.h
@@ -12,8 +12,15 @@
 
 #include <sbi/sbi_types.h>
 
+/*
+  Provides sbi_strcmp for the completeness of supporting string functions.
+  it is not recommended to use sbi_strcmp() but use sbi_strncmp instead.
+*/
+
 int sbi_strcmp(const char *a, const char *b);
 
+int sbi_strncmp(const char *a, const char *b, size_t count);
+
 size_t sbi_strlen(const char *str);
 
 size_t sbi_strnlen(const char *str, size_t count);
diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index 38b700bbcdc..7805ba4adfc 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -14,6 +14,10 @@
 
 #include <sbi/sbi_string.h>
 
+/*
+  Provides sbi_strcmp for the completeness of supporting string functions.
+  it is not recommended to use sbi_strcmp() but use sbi_strncmp instead.
+*/
 int sbi_strcmp(const char *a, const char *b)
 {
 	/* search first diff or end of string */
@@ -23,6 +27,15 @@ int sbi_strcmp(const char *a, const char *b)
 	return *a - *b;
 }
 
+int sbi_strncmp(const char *a, const char *b, size_t count)
+{
+	/* search first diff or end of string */
+	for (; count > 0 && *a == *b && *a != '\0'; a++, b++, count--)
+		;
+
+	return *a - *b;
+}
+
 size_t sbi_strlen(const char *str)
 {
 	unsigned long ret = 0;

From 2845d2d2cf4fb74a89452ba223995aa4a118c07e Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 25 Jul 2020 17:30:40 +0800
Subject: [PATCH 0636/1765] lib: utils: Add a macro in libfdt_env.h for strncmp

This commit add a macro to replace strncmp with sbi_strncmp.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/libfdt_env.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index 7fcfe01571e..bc3e7588660 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -32,6 +32,7 @@
 #define strrchr		sbi_strrchr
 #define strcpy		sbi_strcpy
 #define strcmp		sbi_strcmp
+#define strncmp		sbi_strncmp
 #define strlen		sbi_strlen
 #define strnlen		sbi_strnlen
 

From 2cfd2fc9048806353298a1b967abf985901e36e8 Mon Sep 17 00:00:00 2001
From: Abner Chang <abner.chang@hpe.com>
Date: Sat, 25 Jul 2020 17:30:41 +0800
Subject: [PATCH 0637/1765] lib: utils: Use strncmp in fdt_parse_hart_id()

Use strncmp instead of using sbi_strcmp directly in fdt_parse_hart_id()
to allow compiling fdt_helper.c by external firmware.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 78077f79015..aec73a0598d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -123,7 +123,7 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
 	prop = fdt_getprop(fdt, cpu_offset, "device_type", &len);
 	if (!prop || !len)
 		return SBI_EINVAL;
-	if (sbi_strcmp(prop, "cpu"))
+	if (strncmp (prop, "cpu", strlen ("cpu")))
 		return SBI_EINVAL;
 
 	val = fdt_getprop(fdt, cpu_offset, "reg", &len);

From 937caee0833115f69d697ca190001ba0aa5c7368 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 29 Jul 2020 17:10:16 +0530
Subject: [PATCH 0638/1765] lib: sbi_misaligned_ldst: Determine transformed
 instruction length correctly

If MTINST[0:0] bit is 1 then we have transformed instruction encoding
in MTINST CSR. For transformed instructions, if the MTINST[1:1] bit
is Zero then original trapped instruction was a 16bit instruction
which was converted to 32bit instruction at time of taking trap.

We should use MTINST[1:1] bit to determine correct instruction length
of transformed instruction.

This patch updates misaligned load/store emulation as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_misaligned_ldst.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 29d79bb40f1..964a372fadd 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -24,7 +24,7 @@ union reg_data {
 int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 				struct sbi_trap_regs *regs)
 {
-	ulong insn;
+	ulong insn, insn_len;
 	union reg_data val;
 	struct sbi_trap_info uptrap;
 	int i, fp = 0, shift = 0, len = 0;
@@ -35,6 +35,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		 * transformed instruction or custom instruction.
 		 */
 		insn = tinst | INSN_16BIT_MASK;
+		insn_len = (tinst & 0x2) ? INSN_LEN(insn) : 2;
 	} else {
 		/*
 		 * Bit[0] == 0 implies trapped instruction value is
@@ -45,6 +46,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap);
 		}
+		insn_len = INSN_LEN(insn);
 	}
 
 	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
@@ -134,7 +136,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		SET_F32_RD(insn, regs, val.data_ulong);
 #endif
 
-	regs->mepc += INSN_LEN(insn);
+	regs->mepc += insn_len;
 
 	return 0;
 }
@@ -142,7 +144,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 				 struct sbi_trap_regs *regs)
 {
-	ulong insn;
+	ulong insn, insn_len;
 	union reg_data val;
 	struct sbi_trap_info uptrap;
 	int i, len = 0;
@@ -153,6 +155,7 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		 * transformed instruction or custom instruction.
 		 */
 		insn = tinst | INSN_16BIT_MASK;
+		insn_len = (tinst & 0x2) ? INSN_LEN(insn) : 2;
 	} else {
 		/*
 		 * Bit[0] == 0 implies trapped instruction value is
@@ -163,6 +166,7 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap);
 		}
+		insn_len = INSN_LEN(insn);
 	}
 
 	val.data_ulong = GET_RS2(insn, regs);
@@ -233,7 +237,7 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		}
 	}
 
-	regs->mepc += INSN_LEN(insn);
+	regs->mepc += insn_len;
 
 	return 0;
 }

From 4b18a2acc2f4568746efc82ec25705f33c4ae31e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 10 Aug 2020 18:37:46 +0530
Subject: [PATCH 0639/1765] firmware: fw_base: Improve exception stack setup in
 trap handler

Currently, the low-level trap handler (i.e. _trap_handler()) uses
branch instructions to conditionally setup exception stack based
on which mode trap occured.

This patch implements exception stack setup using xor instructions
which is faster with same number of instructions due to lack of
branch instructions.

The new exception stack setup approach can be best described by the
following pseudocode:

 Came_From_M_Mode = ((MSTATUS.MPP < PRV_M) ? 1 : 0) - 1;
 Exception_Stack = TP ^ (Came_From_M_Mode & (SP ^ TP))

 Came_From_M_Mode = 0    ==>    Exception_Stack = TP
 Came_From_M_Mode = -1   ==>    Exception_Stack = SP

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 47 +++++++++++++++++++++-------------------------
 1 file changed, 21 insertions(+), 26 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b66ac41c4ce..0271d9a367b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -490,35 +490,30 @@ _trap_handler:
 	/* Save T0 in scratch space */
 	REG_S	t0, SBI_SCRATCH_TMP0_OFFSET(tp)
 
-	/* Check which mode we came from */
+	/*
+	 * Set T0 to appropriate exception stack
+	 *
+	 * Came_From_M_Mode = ((MSTATUS.MPP < PRV_M) ? 1 : 0) - 1;
+	 * Exception_Stack = TP ^ (Came_From_M_Mode & (SP ^ TP))
+	 *
+	 * Came_From_M_Mode = 0    ==>    Exception_Stack = TP
+	 * Came_From_M_Mode = -1   ==>    Exception_Stack = SP
+	 */
 	csrr	t0, CSR_MSTATUS
 	srl	t0, t0, MSTATUS_MPP_SHIFT
 	and	t0, t0, PRV_M
-	xori	t0, t0, PRV_M
-	beq	t0, zero, _trap_handler_m_mode
-
-	/* We came from S-mode or U-mode */
-_trap_handler_s_mode:
-	/* Set T0 to original SP */
-	add	t0, sp, zero
-
-	/* Setup exception stack */
-	add	sp, tp, -(SBI_TRAP_REGS_SIZE)
-
-	/* Jump to code common for all modes */
-	j	_trap_handler_all_mode
-
-	/* We came from M-mode */
-_trap_handler_m_mode:
-	/* Set T0 to original SP */
-	add	t0, sp, zero
-
-	/* Re-use current SP as exception stack */
-	add	sp, sp, -(SBI_TRAP_REGS_SIZE)
-
-_trap_handler_all_mode:
-	/* Save original SP (from T0) on stack */
-	REG_S	t0, SBI_TRAP_REGS_OFFSET(sp)(sp)
+	slti	t0, t0, PRV_M
+	add	t0, t0, -1
+	xor	sp, sp, tp
+	and	t0, t0, sp
+	xor	sp, sp, tp
+	xor	t0, tp, t0
+
+	/* Save original SP on exception stack */
+	REG_S	sp, (SBI_TRAP_REGS_OFFSET(sp) - SBI_TRAP_REGS_SIZE)(t0)
+
+	/* Set SP to exception stack and make room for trap registers */
+	add	sp, t0, -(SBI_TRAP_REGS_SIZE)
 
 	/* Restore T0 from scratch space */
 	REG_L	t0, SBI_SCRATCH_TMP0_OFFSET(tp)

From 9d56961b2314f31f9d66e53204c02e01fada7c32 Mon Sep 17 00:00:00 2001
From: Georg Kotheimer <georg.kotheimer@tu-dresden.de>
Date: Fri, 14 Aug 2020 23:01:29 +0200
Subject: [PATCH 0640/1765] lib: sbi_trap: Fix hstatus.SPVP update in
 sbi_trap_redirect()

When redirecting from VS/VU-mode to HS-mode, hstatus.SPVP was set
to the value of mstatus.SPP, as according to the specification both
flags should be set to the same value.
However, the assignment of SPVP takes place before SPP itself is
updated, which results in SPVP having an outdated value.

Signed-off-by: Georg Kotheimer <georg.kotheimer@tu-dresden.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_trap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 930119d248c..c2bd061a46f 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -123,7 +123,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		/* Update HSTATUS SPVP and SPV bits */
 		hstatus = csr_read(CSR_HSTATUS);
 		hstatus &= ~HSTATUS_SPVP;
-		hstatus |= (regs->mstatus & MSTATUS_SPP) ? HSTATUS_SPVP : 0;
+		hstatus |= (prev_mode == PRV_S) ? HSTATUS_SPVP : 0;
 		hstatus &= ~HSTATUS_SPV;
 		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
 		csr_write(CSR_HSTATUS, hstatus);

From d7f87d99a33b71b20af527c62e7ef95dcb61ee22 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Tue, 18 Aug 2020 17:48:37 +0200
Subject: [PATCH 0641/1765] platform: kendryte/k210: fixup FDT

When passing the device tree to the next stage we should apply necessary
device tree fix-ups first. These include:

* fix up the CPU node in the device tree
* fix up the PLIC node in the device tree
* fix up the reserved memory node in the device tree

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/platform.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 5c28fd91880..75883ed7435 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
 #include <sbi_utils/sys/clint.h>
@@ -67,6 +68,21 @@ static u32 k210_get_clk_freq(void)
 	return pll0_freq / div;
 }
 
+static int k210_final_init(bool cold_boot)
+{
+	void *fdt;
+
+	if (!cold_boot)
+		return 0;
+
+	fdt = sbi_scratch_thishart_arg1_ptr();
+
+	fdt_cpu_fixup(fdt);
+	fdt_fixups(fdt);
+
+	return 0;
+}
+
 static int k210_console_init(void)
 {
 	return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
@@ -122,6 +138,8 @@ static int k210_system_reset(u32 type)
 }
 
 const struct sbi_platform_operations platform_ops = {
+	.final_init	= k210_final_init,
+
 	.console_init	= k210_console_init,
 	.console_putc	= sifive_uart_putc,
 	.console_getc	= sifive_uart_getc,

From e435ba05248a10a5085858c46fe11854373d5dbc Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 15 Aug 2020 19:41:11 +0530
Subject: [PATCH 0642/1765] lib: sbi_init: Avoid thundering hurd problem with
 coldboot_lock

We can have thundering hurd problem with coldboot_lock where the
boot HART can potentially starve trying to acquire coldboot_lock
because some of the non-boot HARTs are continuously acquiring and
releasing coldboot_lock. This can happen if MIP.MSIP bit is already
set for some of the non-boot HARTs.

To avoid thundering hurd problem for coldboot_lock, we use the
__smp_load_acquire() and __smp_store_release() for coldboot_done
flag and use coldboot_lock only for coldboot_wait_hmask.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
 lib/sbi/sbi_init.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index a7fb848742b..c438eaa2535 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
+#include <sbi/riscv_barrier.h>
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
@@ -85,9 +86,10 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 }
 
 static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
-static unsigned long coldboot_done = 0;
 static struct sbi_hartmask coldboot_wait_hmask = { 0 };
 
+static unsigned long coldboot_done;
+
 static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long saved_mie, cmip;
@@ -105,16 +107,20 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Mark current HART as waiting */
 	sbi_hartmask_set_hart(hartid, &coldboot_wait_hmask);
 
+	/* Release coldboot lock */
+	spin_unlock(&coldboot_lock);
+
 	/* Wait for coldboot to finish using WFI */
-	while (!coldboot_done) {
-		spin_unlock(&coldboot_lock);
+	while (!__smp_load_acquire(&coldboot_done)) {
 		do {
 			wfi();
 			cmip = csr_read(CSR_MIP);
 		 } while (!(cmip & MIP_MSIP));
-		spin_lock(&coldboot_lock);
 	};
 
+	/* Acquire coldboot lock */
+	spin_lock(&coldboot_lock);
+
 	/* Unmark current HART as waiting */
 	sbi_hartmask_clear_hart(hartid, &coldboot_wait_hmask);
 
@@ -132,12 +138,12 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	/* Mark coldboot done */
+	__smp_store_release(&coldboot_done, 1);
+
 	/* Acquire coldboot lock */
 	spin_lock(&coldboot_lock);
 
-	/* Mark coldboot done */
-	coldboot_done = 1;
-
 	/* Send an IPI to all HARTs waiting for coldboot */
 	for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&

From 4f3bad6e43f0e5a1a124847edf910e309ae9d59a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 15 Aug 2020 22:17:58 +0530
Subject: [PATCH 0643/1765] lib: sbi: Handle the case where MTVAL has illegal
 instruction address

The Kendryte K210 follows RISC-V v1.9 spec so MTVAL has instruction
address (instead of instruction encoding) on illegal instruction trap.

To handle above case, we fix sbi_illegal_insn_handler() without any
impact on RISC-V v1.10 (or higher) systems. This achieved by exploiting
the fact that program counter (and instruction address) is always 2-byte
aligned in RISC-V world.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_illegal_insn.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 0e5523f60de..9af3d24d797 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -118,13 +118,22 @@ int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
 {
 	struct sbi_trap_info uptrap;
 
+	/*
+	 * We only deal with 32-bit (or longer) illegal instructions. If we
+	 * see instruction is zero OR instruction is 16-bit then we fetch and
+	 * check the instruction encoding using unprivilege access.
+	 *
+	 * The program counter (PC) in RISC-V world is always 2-byte aligned
+	 * so handling only 32-bit (or longer) illegal instructions also help
+	 * the case where MTVAL CSR contains instruction address for illegal
+	 * instruction trap.
+	 */
+
 	if (unlikely((insn & 3) != 3)) {
-		if (insn == 0) {
-			insn = sbi_get_insn(regs->mepc, &uptrap);
-			if (uptrap.cause) {
-				uptrap.epc = regs->mepc;
-				return sbi_trap_redirect(regs, &uptrap);
-			}
+		insn = sbi_get_insn(regs->mepc, &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc = regs->mepc;
+			return sbi_trap_redirect(regs, &uptrap);
 		}
 		if ((insn & 3) != 3)
 			return truly_illegal_insn(insn, regs);

From 7b0b289887380d2e71210f12b5ce0f3afc011b35 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 18 Aug 2020 11:51:16 +0530
Subject: [PATCH 0644/1765] lib: sbi: Remove redundant SBI_HART_HAS_PMP feature

The SBI_HART_HAS_PMP feature is redundant because we already
have number of PMP regions returned by sbi_hart_pmp_count().

Checking whether PMP is supported for a HART can be simply done
by checking non-zero value returned by sbi_hart_pmp_count().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h    |  8 +++-----
 lib/sbi/sbi_hart.c        | 15 +--------------
 lib/utils/fdt/fdt_fixup.c |  2 +-
 3 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 51c2c353810..c2ea68691e8 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -14,14 +14,12 @@
 
 /** Possible feature flags of a hart */
 enum sbi_hart_features {
-	/** Hart has PMP support */
-	SBI_HART_HAS_PMP = (1 << 0),
 	/** Hart has S-mode counter enable */
-	SBI_HART_HAS_SCOUNTEREN = (1 << 1),
+	SBI_HART_HAS_SCOUNTEREN = (1 << 0),
 	/** Hart has M-mode counter enable */
-	SBI_HART_HAS_MCOUNTEREN = (1 << 2),
+	SBI_HART_HAS_MCOUNTEREN = (1 << 1),
 	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 3),
+	SBI_HART_HAS_TIME = (1 << 2),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index fa20bd2556e..80ed86a927f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -158,9 +158,6 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 	unsigned long prot, addr, size;
 	unsigned int i, pmp_count;
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
-		return;
-
 	pmp_count = sbi_hart_pmp_count(scratch);
 	for (i = 0; i < pmp_count; i++) {
 		pmp_get(i, &prot, &addr, &size);
@@ -190,9 +187,6 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
 	unsigned long prot, size, tempaddr;
 	unsigned int i, pmp_count;
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
-		return SBI_OK;
-
 	pmp_count = sbi_hart_pmp_count(scratch);
 	for (i = 0; i < pmp_count; i++) {
 		pmp_get(i, &prot, &tempaddr, &size);
@@ -213,7 +207,7 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	ulong prot, addr, log2size;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP))
+	if (!sbi_hart_pmp_count(scratch))
 		return 0;
 
 	/* Firmware PMP region to protect OpenSBI firmware */
@@ -276,9 +270,6 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		return NULL;
 
 	switch (feature) {
-	case SBI_HART_HAS_PMP:
-		fstr = "pmp";
-		break;
 	case SBI_HART_HAS_SCOUNTEREN:
 		fstr = "scounteren";
 		break;
@@ -375,10 +366,6 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	__detect_pmp(CSR_PMPADDR15);
 #undef __detect_pmp
 
-	/* Set hart PMP feature if we have at least one PMP region */
-	if (hfeatures->pmp_count)
-		hfeatures->features |= SBI_HART_HAS_PMP;
-
 	/* Detect if hart supports SCOUNTEREN feature */
 	trap.cause = 0;
 	val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index a3bccae61e9..4da7397d310 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -199,7 +199,7 @@ int fdt_reserved_memory_fixup(void *fdt)
 	 * With above assumption, we create child nodes directly.
 	 */
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_PMP)) {
+	if (!sbi_hart_pmp_count(scratch)) {
 		/*
 		 * Update the DT with firmware start & size even if PMP is not
 		 * supported. This makes sure that supervisor OS is always

From 74d1db706293f42f5a4e87c907978339b2d0993d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 18 Aug 2020 13:28:08 +0530
Subject: [PATCH 0645/1765] lib: sbi: Improve PMP CSR detection and progamming

As-per latest RISC-V privilege spec up to 64 PMP entries are supported.
Implementations may implement zero, 16, or 64 PMP CSRs. All PMP CSR
fields are WARL and may be hardwired to zero.

This patch improves PMP CSR detection and progamming considering
above facts.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h |  67 ++++++++++++-
 lib/sbi/riscv_asm.c          | 186 +++++++++++++----------------------
 lib/sbi/sbi_hart.c           |  72 +++++++++-----
 3 files changed, 180 insertions(+), 145 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 827c86c40bf..073261fea58 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -144,7 +144,12 @@
 #define PMP_L				_UL(0x80)
 
 #define PMP_SHIFT			2
-#define PMP_COUNT			16
+#define PMP_COUNT			64
+#if __riscv_xlen == 64
+#define PMP_ADDR_MASK			((_ULL(0x1) << 54) - 1)
+#else
+#define PMP_ADDR_MASK			_UL(0xFFFFFFFF)
+#endif
 
 #if __riscv_xlen == 64
 #define MSTATUS_SD			MSTATUS64_SD
@@ -263,6 +268,18 @@
 #define CSR_PMPCFG1			0x3a1
 #define CSR_PMPCFG2			0x3a2
 #define CSR_PMPCFG3			0x3a3
+#define CSR_PMPCFG4			0x3a4
+#define CSR_PMPCFG5			0x3a5
+#define CSR_PMPCFG6			0x3a6
+#define CSR_PMPCFG7			0x3a7
+#define CSR_PMPCFG8			0x3a8
+#define CSR_PMPCFG9			0x3a9
+#define CSR_PMPCFG10			0x3aa
+#define CSR_PMPCFG11			0x3ab
+#define CSR_PMPCFG12			0x3ac
+#define CSR_PMPCFG13			0x3ad
+#define CSR_PMPCFG14			0x3ae
+#define CSR_PMPCFG15			0x3af
 #define CSR_PMPADDR0			0x3b0
 #define CSR_PMPADDR1			0x3b1
 #define CSR_PMPADDR2			0x3b2
@@ -279,6 +296,54 @@
 #define CSR_PMPADDR13			0x3bd
 #define CSR_PMPADDR14			0x3be
 #define CSR_PMPADDR15			0x3bf
+#define CSR_PMPADDR16			0x3c0
+#define CSR_PMPADDR17			0x3c1
+#define CSR_PMPADDR18			0x3c2
+#define CSR_PMPADDR19			0x3c3
+#define CSR_PMPADDR20			0x3c4
+#define CSR_PMPADDR21			0x3c5
+#define CSR_PMPADDR22			0x3c6
+#define CSR_PMPADDR23			0x3c7
+#define CSR_PMPADDR24			0x3c8
+#define CSR_PMPADDR25			0x3c9
+#define CSR_PMPADDR26			0x3ca
+#define CSR_PMPADDR27			0x3cb
+#define CSR_PMPADDR28			0x3cc
+#define CSR_PMPADDR29			0x3cd
+#define CSR_PMPADDR30			0x3ce
+#define CSR_PMPADDR31			0x3cf
+#define CSR_PMPADDR32			0x3d0
+#define CSR_PMPADDR33			0x3d1
+#define CSR_PMPADDR34			0x3d2
+#define CSR_PMPADDR35			0x3d3
+#define CSR_PMPADDR36			0x3d4
+#define CSR_PMPADDR37			0x3d5
+#define CSR_PMPADDR38			0x3d6
+#define CSR_PMPADDR39			0x3d7
+#define CSR_PMPADDR40			0x3d8
+#define CSR_PMPADDR41			0x3d9
+#define CSR_PMPADDR42			0x3da
+#define CSR_PMPADDR43			0x3db
+#define CSR_PMPADDR44			0x3dc
+#define CSR_PMPADDR45			0x3dd
+#define CSR_PMPADDR46			0x3de
+#define CSR_PMPADDR47			0x3df
+#define CSR_PMPADDR48			0x3e0
+#define CSR_PMPADDR49			0x3e1
+#define CSR_PMPADDR50			0x3e2
+#define CSR_PMPADDR51			0x3e3
+#define CSR_PMPADDR52			0x3e4
+#define CSR_PMPADDR53			0x3e5
+#define CSR_PMPADDR54			0x3e6
+#define CSR_PMPADDR55			0x3e7
+#define CSR_PMPADDR56			0x3e8
+#define CSR_PMPADDR57			0x3e9
+#define CSR_PMPADDR58			0x3ea
+#define CSR_PMPADDR59			0x3eb
+#define CSR_PMPADDR60			0x3ec
+#define CSR_PMPADDR61			0x3ed
+#define CSR_PMPADDR62			0x3ee
+#define CSR_PMPADDR63			0x3ef
 #define CSR_TSELECT			0x7a0
 #define CSR_TDATA1			0x7a1
 #define CSR_TDATA2			0x7a2
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 6dfebd91d0d..799123fa187 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -90,142 +90,88 @@ void misa_string(int xlen, char *out, unsigned int out_sz)
 
 unsigned long csr_read_num(int csr_num)
 {
+#define switchcase_csr_read(__csr_num, __val)		\
+	case __csr_num:					\
+		__val = csr_read(__csr_num);		\
+		break;
+#define switchcase_csr_read_2(__csr_num, __val)	\
+	switchcase_csr_read(__csr_num + 0, __val)	\
+	switchcase_csr_read(__csr_num + 1, __val)
+#define switchcase_csr_read_4(__csr_num, __val)	\
+	switchcase_csr_read_2(__csr_num + 0, __val)	\
+	switchcase_csr_read_2(__csr_num + 2, __val)
+#define switchcase_csr_read_8(__csr_num, __val)	\
+	switchcase_csr_read_4(__csr_num + 0, __val)	\
+	switchcase_csr_read_4(__csr_num + 4, __val)
+#define switchcase_csr_read_16(__csr_num, __val)	\
+	switchcase_csr_read_8(__csr_num + 0, __val)	\
+	switchcase_csr_read_8(__csr_num + 8, __val)
+#define switchcase_csr_read_32(__csr_num, __val)	\
+	switchcase_csr_read_16(__csr_num + 0, __val)	\
+	switchcase_csr_read_16(__csr_num + 16, __val)
+#define switchcase_csr_read_64(__csr_num, __val)	\
+	switchcase_csr_read_32(__csr_num + 0, __val)	\
+	switchcase_csr_read_32(__csr_num + 32, __val)
+
 	unsigned long ret = 0;
 
 	switch (csr_num) {
-	case CSR_PMPCFG0:
-		ret = csr_read(CSR_PMPCFG0);
-		break;
-	case CSR_PMPCFG1:
-		ret = csr_read(CSR_PMPCFG1);
-		break;
-	case CSR_PMPCFG2:
-		ret = csr_read(CSR_PMPCFG2);
-		break;
-	case CSR_PMPCFG3:
-		ret = csr_read(CSR_PMPCFG3);
-		break;
-	case CSR_PMPADDR0:
-		ret = csr_read(CSR_PMPADDR0);
-		break;
-	case CSR_PMPADDR1:
-		ret = csr_read(CSR_PMPADDR1);
-		break;
-	case CSR_PMPADDR2:
-		ret = csr_read(CSR_PMPADDR2);
-		break;
-	case CSR_PMPADDR3:
-		ret = csr_read(CSR_PMPADDR3);
-		break;
-	case CSR_PMPADDR4:
-		ret = csr_read(CSR_PMPADDR4);
-		break;
-	case CSR_PMPADDR5:
-		ret = csr_read(CSR_PMPADDR5);
-		break;
-	case CSR_PMPADDR6:
-		ret = csr_read(CSR_PMPADDR6);
-		break;
-	case CSR_PMPADDR7:
-		ret = csr_read(CSR_PMPADDR7);
-		break;
-	case CSR_PMPADDR8:
-		ret = csr_read(CSR_PMPADDR8);
-		break;
-	case CSR_PMPADDR9:
-		ret = csr_read(CSR_PMPADDR9);
-		break;
-	case CSR_PMPADDR10:
-		ret = csr_read(CSR_PMPADDR10);
-		break;
-	case CSR_PMPADDR11:
-		ret = csr_read(CSR_PMPADDR11);
-		break;
-	case CSR_PMPADDR12:
-		ret = csr_read(CSR_PMPADDR12);
-		break;
-	case CSR_PMPADDR13:
-		ret = csr_read(CSR_PMPADDR13);
-		break;
-	case CSR_PMPADDR14:
-		ret = csr_read(CSR_PMPADDR14);
-		break;
-	case CSR_PMPADDR15:
-		ret = csr_read(CSR_PMPADDR15);
-		break;
+	switchcase_csr_read_16(CSR_PMPCFG0, ret)
+	switchcase_csr_read_64(CSR_PMPADDR0, ret)
 	default:
 		break;
 	};
 
 	return ret;
+
+#undef switchcase_csr_read_64
+#undef switchcase_csr_read_32
+#undef switchcase_csr_read_16
+#undef switchcase_csr_read_8
+#undef switchcase_csr_read_4
+#undef switchcase_csr_read_2
+#undef switchcase_csr_read
 }
 
 void csr_write_num(int csr_num, unsigned long val)
 {
+#define switchcase_csr_write(__csr_num, __val)		\
+	case __csr_num:					\
+		csr_write(__csr_num, __val);		\
+		break;
+#define switchcase_csr_write_2(__csr_num, __val)	\
+	switchcase_csr_write(__csr_num + 0, __val)	\
+	switchcase_csr_write(__csr_num + 1, __val)
+#define switchcase_csr_write_4(__csr_num, __val)	\
+	switchcase_csr_write_2(__csr_num + 0, __val)	\
+	switchcase_csr_write_2(__csr_num + 2, __val)
+#define switchcase_csr_write_8(__csr_num, __val)	\
+	switchcase_csr_write_4(__csr_num + 0, __val)	\
+	switchcase_csr_write_4(__csr_num + 4, __val)
+#define switchcase_csr_write_16(__csr_num, __val)	\
+	switchcase_csr_write_8(__csr_num + 0, __val)	\
+	switchcase_csr_write_8(__csr_num + 8, __val)
+#define switchcase_csr_write_32(__csr_num, __val)	\
+	switchcase_csr_write_16(__csr_num + 0, __val)	\
+	switchcase_csr_write_16(__csr_num + 16, __val)
+#define switchcase_csr_write_64(__csr_num, __val)	\
+	switchcase_csr_write_32(__csr_num + 0, __val)	\
+	switchcase_csr_write_32(__csr_num + 32, __val)
+
 	switch (csr_num) {
-	case CSR_PMPCFG0:
-		csr_write(CSR_PMPCFG0, val);
-		break;
-	case CSR_PMPCFG1:
-		csr_write(CSR_PMPCFG1, val);
-		break;
-	case CSR_PMPCFG2:
-		csr_write(CSR_PMPCFG2, val);
-		break;
-	case CSR_PMPCFG3:
-		csr_write(CSR_PMPCFG3, val);
-		break;
-	case CSR_PMPADDR0:
-		csr_write(CSR_PMPADDR0, val);
-		break;
-	case CSR_PMPADDR1:
-		csr_write(CSR_PMPADDR1, val);
-		break;
-	case CSR_PMPADDR2:
-		csr_write(CSR_PMPADDR2, val);
-		break;
-	case CSR_PMPADDR3:
-		csr_write(CSR_PMPADDR3, val);
-		break;
-	case CSR_PMPADDR4:
-		csr_write(CSR_PMPADDR4, val);
-		break;
-	case CSR_PMPADDR5:
-		csr_write(CSR_PMPADDR5, val);
-		break;
-	case CSR_PMPADDR6:
-		csr_write(CSR_PMPADDR6, val);
-		break;
-	case CSR_PMPADDR7:
-		csr_write(CSR_PMPADDR7, val);
-		break;
-	case CSR_PMPADDR8:
-		csr_write(CSR_PMPADDR8, val);
-		break;
-	case CSR_PMPADDR9:
-		csr_write(CSR_PMPADDR9, val);
-		break;
-	case CSR_PMPADDR10:
-		csr_write(CSR_PMPADDR10, val);
-		break;
-	case CSR_PMPADDR11:
-		csr_write(CSR_PMPADDR11, val);
-		break;
-	case CSR_PMPADDR12:
-		csr_write(CSR_PMPADDR12, val);
-		break;
-	case CSR_PMPADDR13:
-		csr_write(CSR_PMPADDR13, val);
-		break;
-	case CSR_PMPADDR14:
-		csr_write(CSR_PMPADDR14, val);
-		break;
-	case CSR_PMPADDR15:
-		csr_write(CSR_PMPADDR15, val);
-		break;
+	switchcase_csr_write_16(CSR_PMPCFG0, val)
+	switchcase_csr_write_64(CSR_PMPADDR0, val)
 	default:
 		break;
 	};
+
+#undef switchcase_csr_write_64
+#undef switchcase_csr_write_32
+#undef switchcase_csr_write_16
+#undef switchcase_csr_write_8
+#undef switchcase_csr_write_4
+#undef switchcase_csr_write_2
+#undef switchcase_csr_write
 }
 
 static unsigned long ctz(unsigned long x)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 80ed86a927f..8f31d58877a 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -340,31 +340,55 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->features = 0;
 	hfeatures->pmp_count = 0;
 
-	/* Detect if hart supports PMP feature */
-#define __detect_pmp(__pmp_csr)					\
-	val = csr_read_allowed(__pmp_csr, (ulong)&trap);	\
-	if (!trap.cause) {					\
-		csr_write_allowed(__pmp_csr, (ulong)&trap, val);\
-		if (!trap.cause)				\
-			hfeatures->pmp_count++;			\
+#define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
+	val = csr_read_allowed(__csr, (ulong)&trap);			\
+	if (!trap.cause) {						\
+		if (__rdonly) {						\
+			(hfeatures->__field)++;				\
+		} else {						\
+			csr_write_allowed(__csr, (ulong)&trap, __wrval);\
+			if (!trap.cause) {				\
+				if (csr_swap(__csr, val) == __wrval)	\
+					(hfeatures->__field)++;		\
+				else					\
+					goto __skip;			\
+			} else {					\
+				goto __skip;				\
+			}						\
+		}							\
+	} else {							\
+		goto __skip;						\
 	}
-	__detect_pmp(CSR_PMPADDR0);
-	__detect_pmp(CSR_PMPADDR1);
-	__detect_pmp(CSR_PMPADDR2);
-	__detect_pmp(CSR_PMPADDR3);
-	__detect_pmp(CSR_PMPADDR4);
-	__detect_pmp(CSR_PMPADDR5);
-	__detect_pmp(CSR_PMPADDR6);
-	__detect_pmp(CSR_PMPADDR7);
-	__detect_pmp(CSR_PMPADDR8);
-	__detect_pmp(CSR_PMPADDR9);
-	__detect_pmp(CSR_PMPADDR10);
-	__detect_pmp(CSR_PMPADDR11);
-	__detect_pmp(CSR_PMPADDR12);
-	__detect_pmp(CSR_PMPADDR13);
-	__detect_pmp(CSR_PMPADDR14);
-	__detect_pmp(CSR_PMPADDR15);
-#undef __detect_pmp
+#define __check_csr_2(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr(__csr + 1, __rdonly, __wrval, __field, __skip)
+#define __check_csr_4(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_2(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_2(__csr + 2, __rdonly, __wrval, __field, __skip)
+#define __check_csr_8(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_4(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_4(__csr + 4, __rdonly, __wrval, __field, __skip)
+#define __check_csr_16(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_8(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_8(__csr + 8, __rdonly, __wrval, __field, __skip)
+#define __check_csr_32(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_16(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_16(__csr + 16, __rdonly, __wrval, __field, __skip)
+#define __check_csr_64(__csr, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_32(__csr + 0, __rdonly, __wrval, __field, __skip)	\
+	__check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip)
+
+	/* Detect number of PMP regions */
+	__check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK, pmp_count, __pmp_skip);
+__pmp_skip:
+
+#undef __check_csr_64
+#undef __check_csr_32
+#undef __check_csr_16
+#undef __check_csr_8
+#undef __check_csr_4
+#undef __check_csr_2
+#undef __check_csr
 
 	/* Detect if hart supports SCOUNTEREN feature */
 	trap.cause = 0;

From 2c341f7844f439017c9aab42ae92e919c3b98253 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 19 Aug 2020 17:31:37 +0530
Subject: [PATCH 0646/1765] lib: sbi: Detect and print MHPM counters at
 boot-time

A RISC-V platform can leave unimplemented MHPM counters hard-wired
to zero. We extend hart_detect_features() to detect MHPM counters
which are accessible and not hard-wired to zero. We also print
number of available MHPM counters as part of boot prints.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  1 +
 lib/sbi/sbi_hart.c     | 17 +++++++++++++++++
 lib/sbi/sbi_init.c     |  1 +
 3 files changed, 19 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index c2ea68691e8..1e1eb67c28e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -35,6 +35,7 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 	return (ulong)sbi_hart_expected_trap;
 }
 
+unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
 int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 8f31d58877a..2211c3ce92c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -28,6 +28,7 @@ void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 struct hart_features {
 	unsigned long features;
 	unsigned int pmp_count;
+	unsigned int mhpm_count;
 };
 static unsigned long hart_features_offset;
 
@@ -135,6 +136,14 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
 #endif
 }
 
+unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->mhpm_count;
+}
+
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 {
 	struct hart_features *hfeatures =
@@ -339,6 +348,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	hfeatures->features = 0;
 	hfeatures->pmp_count = 0;
+	hfeatures->mhpm_count = 0;
 
 #define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
 	val = csr_read_allowed(__csr, (ulong)&trap);			\
@@ -382,6 +392,13 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	__check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK, pmp_count, __pmp_skip);
 __pmp_skip:
 
+	/* Detect number of MHPM counters */
+	__check_csr(CSR_MHPMCOUNTER3, 0, 1UL, mhpm_count, __mhpm_skip);
+	__check_csr_4(CSR_MHPMCOUNTER4, 0, 1UL, mhpm_count, __mhpm_skip);
+	__check_csr_8(CSR_MHPMCOUNTER8, 0, 1UL, mhpm_count, __mhpm_skip);
+	__check_csr_16(CSR_MHPMCOUNTER16, 0, 1UL, mhpm_count, __mhpm_skip);
+__mhpm_skip:
+
 #undef __check_csr_64
 #undef __check_csr_32
 #undef __check_csr_16
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index c438eaa2535..e1a1d96dff9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -70,6 +70,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_get_features_str(scratch, str, sizeof(str));
 	sbi_printf("BOOT HART Features  : %s\n", str);
 	sbi_printf("BOOT HART PMP Count : %d\n", sbi_hart_pmp_count(scratch));
+	sbi_printf("BOOT HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch));
 
 	/* Firmware details */
 	sbi_printf("Firmware Base       : 0x%lx\n", scratch->fw_start);

From 162d453b49a56331a36c97dfb6cc30e6c3dad7ab Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Aug 2020 18:19:32 +0530
Subject: [PATCH 0647/1765] include: sbi: Few cosmetic changes in
 riscv_encoding.h

This patch does following cosmentic changes to riscv_encoding.h:
1. Re-organize CSR defines to match CSR listing in latest RISC-V
   privilege spec
2. Rename CSR_HCOUNTERNEN to CSR_HCOUNTEREN

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 226 +++++++++++++++++++++--------------
 1 file changed, 139 insertions(+), 87 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 073261fea58..ccd2c69cdfe 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -171,18 +171,27 @@
 #define HGATP_MODE_SHIFT		HGATP32_MODE_SHIFT
 #endif
 
-#define CSR_USTATUS			0x0
-#define CSR_FFLAGS			0x1
-#define CSR_FRM				0x2
-#define CSR_FCSR			0x3
+/* ===== User-level CSRs ===== */
+
+/* User Trap Setup (N-extension) */
+#define CSR_USTATUS			0x000
+#define CSR_UIE				0x004
+#define CSR_UTVEC			0x005
+
+/* User Trap Handling (N-extension) */
+#define CSR_USCRATCH			0x040
+#define CSR_UEPC			0x041
+#define CSR_UCAUSE			0x042
+#define CSR_UTVAL			0x043
+#define CSR_UIP				0x044
+
+/* User Floating-point CSRs */
+#define CSR_FFLAGS			0x001
+#define CSR_FRM				0x002
+#define CSR_FCSR			0x003
+
+/* User Counters/Timers */
 #define CSR_CYCLE			0xc00
-#define CSR_UIE				0x4
-#define CSR_UTVEC			0x5
-#define CSR_USCRATCH			0x40
-#define CSR_UEPC			0x41
-#define CSR_UCAUSE			0x42
-#define CSR_UTVAL			0x43
-#define CSR_UIP				0x44
 #define CSR_TIME			0xc01
 #define CSR_INSTRET			0xc02
 #define CSR_HPMCOUNTER3			0xc03
@@ -214,31 +223,84 @@
 #define CSR_HPMCOUNTER29		0xc1d
 #define CSR_HPMCOUNTER30		0xc1e
 #define CSR_HPMCOUNTER31		0xc1f
+#define CSR_CYCLEH			0xc80
+#define CSR_TIMEH			0xc81
+#define CSR_INSTRETH			0xc82
+#define CSR_HPMCOUNTER3H		0xc83
+#define CSR_HPMCOUNTER4H		0xc84
+#define CSR_HPMCOUNTER5H		0xc85
+#define CSR_HPMCOUNTER6H		0xc86
+#define CSR_HPMCOUNTER7H		0xc87
+#define CSR_HPMCOUNTER8H		0xc88
+#define CSR_HPMCOUNTER9H		0xc89
+#define CSR_HPMCOUNTER10H		0xc8a
+#define CSR_HPMCOUNTER11H		0xc8b
+#define CSR_HPMCOUNTER12H		0xc8c
+#define CSR_HPMCOUNTER13H		0xc8d
+#define CSR_HPMCOUNTER14H		0xc8e
+#define CSR_HPMCOUNTER15H		0xc8f
+#define CSR_HPMCOUNTER16H		0xc90
+#define CSR_HPMCOUNTER17H		0xc91
+#define CSR_HPMCOUNTER18H		0xc92
+#define CSR_HPMCOUNTER19H		0xc93
+#define CSR_HPMCOUNTER20H		0xc94
+#define CSR_HPMCOUNTER21H		0xc95
+#define CSR_HPMCOUNTER22H		0xc96
+#define CSR_HPMCOUNTER23H		0xc97
+#define CSR_HPMCOUNTER24H		0xc98
+#define CSR_HPMCOUNTER25H		0xc99
+#define CSR_HPMCOUNTER26H		0xc9a
+#define CSR_HPMCOUNTER27H		0xc9b
+#define CSR_HPMCOUNTER28H		0xc9c
+#define CSR_HPMCOUNTER29H		0xc9d
+#define CSR_HPMCOUNTER30H		0xc9e
+#define CSR_HPMCOUNTER31H		0xc9f
+
+/* ===== Supervisor-level CSRs ===== */
+
+/* Supervisor Trap Setup */
 #define CSR_SSTATUS			0x100
+#define CSR_SEDELEG			0x102
+#define CSR_SIDELEG			0x103
 #define CSR_SIE				0x104
 #define CSR_STVEC			0x105
 #define CSR_SCOUNTEREN			0x106
+
+/* Supervisor Trap Handling */
 #define CSR_SSCRATCH			0x140
 #define CSR_SEPC			0x141
 #define CSR_SCAUSE			0x142
 #define CSR_STVAL			0x143
 #define CSR_SIP				0x144
+
+/* Supervisor Protection and Translation */
 #define CSR_SATP			0x180
 
+/* ===== Hypervisor-level CSRs ===== */
+
+/* Hypervisor Trap Setup (H-extension) */
 #define CSR_HSTATUS			0x600
 #define CSR_HEDELEG			0x602
 #define CSR_HIDELEG			0x603
 #define CSR_HIE				0x604
-#define CSR_HTIMEDELTA			0x605
-#define CSR_HTIMEDELTAH			0x615
-#define CSR_HCOUNTERNEN			0x606
+#define CSR_HCOUNTEREN			0x606
 #define CSR_HGEIE			0x607
+
+/* Hypervisor Trap Handling (H-extension) */
 #define CSR_HTVAL			0x643
 #define CSR_HIP				0x644
+#define CSR_HVIP			0x645
 #define CSR_HTINST			0x64a
+#define CSR_HGEIP			0xe12
+
+/* Hypervisor Protection and Translation (H-extension) */
 #define CSR_HGATP			0x680
-#define CSR_HGEIP			0xe07
 
+/* Hypervisor Counter/Timer Virtualization Registers (H-extension) */
+#define CSR_HTIMEDELTA			0x605
+#define CSR_HTIMEDELTAH			0x615
+
+/* Virtual Supervisor Registers (H-extension) */
 #define CSR_VSSTATUS			0x200
 #define CSR_VSIE			0x204
 #define CSR_VSTVEC			0x205
@@ -249,6 +311,15 @@
 #define CSR_VSIP			0x244
 #define CSR_VSATP			0x280
 
+/* ===== Machine-level CSRs ===== */
+
+/* Machine Information Registers */
+#define CSR_MVENDORID			0xf11
+#define CSR_MARCHID			0xf12
+#define CSR_MIMPID			0xf13
+#define CSR_MHARTID			0xf14
+
+/* Machine Trap Setup */
 #define CSR_MSTATUS			0x300
 #define CSR_MISA			0x301
 #define CSR_MEDELEG			0x302
@@ -257,6 +328,8 @@
 #define CSR_MTVEC			0x305
 #define CSR_MCOUNTEREN			0x306
 #define CSR_MSTATUSH			0x310
+
+/* Machine Trap Handling */
 #define CSR_MSCRATCH			0x340
 #define CSR_MEPC			0x341
 #define CSR_MCAUSE			0x342
@@ -264,6 +337,8 @@
 #define CSR_MIP				0x344
 #define CSR_MTINST			0x34a
 #define CSR_MTVAL2			0x34b
+
+/* Machine Memory Protection */
 #define CSR_PMPCFG0			0x3a0
 #define CSR_PMPCFG1			0x3a1
 #define CSR_PMPCFG2			0x3a2
@@ -344,14 +419,8 @@
 #define CSR_PMPADDR61			0x3ed
 #define CSR_PMPADDR62			0x3ee
 #define CSR_PMPADDR63			0x3ef
-#define CSR_TSELECT			0x7a0
-#define CSR_TDATA1			0x7a1
-#define CSR_TDATA2			0x7a2
-#define CSR_TDATA3			0x7a3
-#define CSR_DCSR			0x7b0
-#define CSR_DPC				0x7b1
-#define CSR_DSCRATCH			0x7b2
 
+/* Machine Counters/Timers */
 #define CSR_MCYCLE			0xb00
 #define CSR_MINSTRET			0xb02
 #define CSR_MHPMCOUNTER3		0xb03
@@ -383,71 +452,6 @@
 #define CSR_MHPMCOUNTER29		0xb1d
 #define CSR_MHPMCOUNTER30		0xb1e
 #define CSR_MHPMCOUNTER31		0xb1f
-#define CSR_MHPMEVENT3			0x323
-#define CSR_MHPMEVENT4			0x324
-#define CSR_MHPMEVENT5			0x325
-#define CSR_MHPMEVENT6			0x326
-#define CSR_MHPMEVENT7			0x327
-#define CSR_MHPMEVENT8			0x328
-#define CSR_MHPMEVENT9			0x329
-#define CSR_MHPMEVENT10			0x32a
-#define CSR_MHPMEVENT11			0x32b
-#define CSR_MHPMEVENT12			0x32c
-#define CSR_MHPMEVENT13			0x32d
-#define CSR_MHPMEVENT14			0x32e
-#define CSR_MHPMEVENT15			0x32f
-#define CSR_MHPMEVENT16			0x330
-#define CSR_MHPMEVENT17			0x331
-#define CSR_MHPMEVENT18			0x332
-#define CSR_MHPMEVENT19			0x333
-#define CSR_MHPMEVENT20			0x334
-#define CSR_MHPMEVENT21			0x335
-#define CSR_MHPMEVENT22			0x336
-#define CSR_MHPMEVENT23			0x337
-#define CSR_MHPMEVENT24			0x338
-#define CSR_MHPMEVENT25			0x339
-#define CSR_MHPMEVENT26			0x33a
-#define CSR_MHPMEVENT27			0x33b
-#define CSR_MHPMEVENT28			0x33c
-#define CSR_MHPMEVENT29			0x33d
-#define CSR_MHPMEVENT30			0x33e
-#define CSR_MHPMEVENT31			0x33f
-#define CSR_MVENDORID			0xf11
-#define CSR_MARCHID			0xf12
-#define CSR_MIMPID			0xf13
-#define CSR_MHARTID			0xf14
-#define CSR_CYCLEH			0xc80
-#define CSR_TIMEH			0xc81
-#define CSR_INSTRETH			0xc82
-#define CSR_HPMCOUNTER3H		0xc83
-#define CSR_HPMCOUNTER4H		0xc84
-#define CSR_HPMCOUNTER5H		0xc85
-#define CSR_HPMCOUNTER6H		0xc86
-#define CSR_HPMCOUNTER7H		0xc87
-#define CSR_HPMCOUNTER8H		0xc88
-#define CSR_HPMCOUNTER9H		0xc89
-#define CSR_HPMCOUNTER10H		0xc8a
-#define CSR_HPMCOUNTER11H		0xc8b
-#define CSR_HPMCOUNTER12H		0xc8c
-#define CSR_HPMCOUNTER13H		0xc8d
-#define CSR_HPMCOUNTER14H		0xc8e
-#define CSR_HPMCOUNTER15H		0xc8f
-#define CSR_HPMCOUNTER16H		0xc90
-#define CSR_HPMCOUNTER17H		0xc91
-#define CSR_HPMCOUNTER18H		0xc92
-#define CSR_HPMCOUNTER19H		0xc93
-#define CSR_HPMCOUNTER20H		0xc94
-#define CSR_HPMCOUNTER21H		0xc95
-#define CSR_HPMCOUNTER22H		0xc96
-#define CSR_HPMCOUNTER23H		0xc97
-#define CSR_HPMCOUNTER24H		0xc98
-#define CSR_HPMCOUNTER25H		0xc99
-#define CSR_HPMCOUNTER26H		0xc9a
-#define CSR_HPMCOUNTER27H		0xc9b
-#define CSR_HPMCOUNTER28H		0xc9c
-#define CSR_HPMCOUNTER29H		0xc9d
-#define CSR_HPMCOUNTER30H		0xc9e
-#define CSR_HPMCOUNTER31H		0xc9f
 #define CSR_MCYCLEH			0xb80
 #define CSR_MINSTRETH			0xb82
 #define CSR_MHPMCOUNTER3H		0xb83
@@ -480,6 +484,52 @@
 #define CSR_MHPMCOUNTER30H		0xb9e
 #define CSR_MHPMCOUNTER31H		0xb9f
 
+/* Machine Counter Setup */
+#define CSR_MCOUNTINHIBIT		0x320
+#define CSR_MHPMEVENT3			0x323
+#define CSR_MHPMEVENT4			0x324
+#define CSR_MHPMEVENT5			0x325
+#define CSR_MHPMEVENT6			0x326
+#define CSR_MHPMEVENT7			0x327
+#define CSR_MHPMEVENT8			0x328
+#define CSR_MHPMEVENT9			0x329
+#define CSR_MHPMEVENT10			0x32a
+#define CSR_MHPMEVENT11			0x32b
+#define CSR_MHPMEVENT12			0x32c
+#define CSR_MHPMEVENT13			0x32d
+#define CSR_MHPMEVENT14			0x32e
+#define CSR_MHPMEVENT15			0x32f
+#define CSR_MHPMEVENT16			0x330
+#define CSR_MHPMEVENT17			0x331
+#define CSR_MHPMEVENT18			0x332
+#define CSR_MHPMEVENT19			0x333
+#define CSR_MHPMEVENT20			0x334
+#define CSR_MHPMEVENT21			0x335
+#define CSR_MHPMEVENT22			0x336
+#define CSR_MHPMEVENT23			0x337
+#define CSR_MHPMEVENT24			0x338
+#define CSR_MHPMEVENT25			0x339
+#define CSR_MHPMEVENT26			0x33a
+#define CSR_MHPMEVENT27			0x33b
+#define CSR_MHPMEVENT28			0x33c
+#define CSR_MHPMEVENT29			0x33d
+#define CSR_MHPMEVENT30			0x33e
+#define CSR_MHPMEVENT31			0x33f
+
+/* Debug/Trace Registers */
+#define CSR_TSELECT			0x7a0
+#define CSR_TDATA1			0x7a1
+#define CSR_TDATA2			0x7a2
+#define CSR_TDATA3			0x7a3
+
+/* Debug Mode Registers */
+#define CSR_DCSR			0x7b0
+#define CSR_DPC				0x7b1
+#define CSR_DSCRATCH0			0x7b2
+#define CSR_DSCRATCH1			0x7b3
+
+/* ===== Trap/Exception Causes ===== */
+
 #define CAUSE_MISALIGNED_FETCH		0x0
 #define CAUSE_FETCH_ACCESS		0x1
 #define CAUSE_ILLEGAL_INSTRUCTION	0x2
@@ -500,6 +550,8 @@
 #define CAUSE_VIRTUAL_INST_FAULT	0x16
 #define CAUSE_STORE_GUEST_PAGE_FAULT	0x17
 
+/* ===== Instruction Encodings ===== */
+
 #define INSN_MATCH_LB			0x3
 #define INSN_MASK_LB			0x707f
 #define INSN_MATCH_LH			0x1003

From ebc8ebc0f84618b2cef8b9b77cc705e4c7c2d8d6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 Aug 2020 18:24:14 +0530
Subject: [PATCH 0648/1765] lib: sbi: Improve HPM CSR read/write emulation

We improve HPM CSR read/write emulation as follows:
1. Fail for unimplemented counters so that trap is redirected
   to S-mode which can further help debugging S-mode software.
2. Check permissions in both MCOUNTEREN and SCOUNTEREN for
   HS-mode and U-mode.
3. Don't check permissions for TIME CSR because we emulate
   TIME CSR for both Host (HS/U-mode) and Guest (VS/VU-mode).
   Also, faster TIME CSR read is very helpful for good
   performance of S-mode software.
4. Don't emulate S-mode CSR read/write to M-mode HPM CSRs
   because these should not be accessible to S-mode software.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_emulate_csr.c | 147 +++++++++++++++++++-------------------
 1 file changed, 75 insertions(+), 72 deletions(-)

diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 62c21a66508..bee7761c4bb 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -13,14 +13,31 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
+static bool hpm_allowed(int hpm_num, ulong prev_mode, bool virt)
+{
+	ulong cen = -1UL;
+
+	if (prev_mode <= PRV_S) {
+		cen &= csr_read(CSR_MCOUNTEREN);
+		if (virt)
+			cen &= csr_read(CSR_HCOUNTEREN);
+	}
+	if (prev_mode == PRV_U)
+		cen &= csr_read(CSR_SCOUNTEREN);
+
+	return ((cen >> hpm_num) & 1) ? TRUE : FALSE;
+}
+
 int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 			 ulong *csr_val)
 {
 	int ret = 0;
-	ulong cen = -1UL;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
 	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
@@ -28,9 +45,6 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
 #endif
 
-	if (prev_mode == PRV_U)
-		cen = csr_read(CSR_SCOUNTEREN);
-
 	switch (csr_num) {
 	case CSR_HTIMEDELTA:
 		if (prev_mode == PRV_S && !virt)
@@ -39,31 +53,27 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 			ret = SBI_ENOTSUPP;
 		break;
 	case CSR_CYCLE:
-		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
-			return -1;
+		if (!hpm_allowed(csr_num - CSR_CYCLE, prev_mode, virt))
+			return SBI_ENOTSUPP;
 		*csr_val = csr_read(CSR_MCYCLE);
 		break;
 	case CSR_TIME:
-		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
-			return -1;
+		/*
+		 * We emulate TIME CSR for both Host (HS/U-mode) and
+		 * Guest (VS/VU-mode).
+		 *
+		 * Faster TIME CSR reads are critical for good performance
+		 * in S-mode software so we don't check CSR permissions.
+		 */
 		*csr_val = (virt) ? sbi_timer_virt_value():
 				    sbi_timer_value();
 		break;
 	case CSR_INSTRET:
-		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
-			return -1;
+		if (!hpm_allowed(csr_num - CSR_CYCLE, prev_mode, virt))
+			return SBI_ENOTSUPP;
 		*csr_val = csr_read(CSR_MINSTRET);
 		break;
-	case CSR_MHPMCOUNTER3:
-		if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
-			return -1;
-		*csr_val = csr_read(CSR_MHPMCOUNTER3);
-		break;
-	case CSR_MHPMCOUNTER4:
-		if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
-			return -1;
-		*csr_val = csr_read(CSR_MHPMCOUNTER4);
-		break;
+
 #if __riscv_xlen == 32
 	case CSR_HTIMEDELTAH:
 		if (prev_mode == PRV_S && !virt)
@@ -72,38 +82,61 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 			ret = SBI_ENOTSUPP;
 		break;
 	case CSR_CYCLEH:
-		if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
-			return -1;
+		if (!hpm_allowed(csr_num - CSR_CYCLEH, prev_mode, virt))
+			return SBI_ENOTSUPP;
 		*csr_val = csr_read(CSR_MCYCLEH);
 		break;
 	case CSR_TIMEH:
-		if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
-			return -1;
+		/* Refer comments on TIME CSR above. */
 		*csr_val = (virt) ? sbi_timer_virt_value() >> 32:
 				    sbi_timer_value() >> 32;
 		break;
 	case CSR_INSTRETH:
-		if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
-			return -1;
+		if (!hpm_allowed(csr_num - CSR_CYCLEH, prev_mode, virt))
+			return SBI_ENOTSUPP;
 		*csr_val = csr_read(CSR_MINSTRETH);
 		break;
-	case CSR_MHPMCOUNTER3H:
-		if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
-			return -1;
-		*csr_val = csr_read(CSR_MHPMCOUNTER3H);
-		break;
-	case CSR_MHPMCOUNTER4H:
-		if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
-			return -1;
-		*csr_val = csr_read(CSR_MHPMCOUNTER4H);
-		break;
 #endif
-	case CSR_MHPMEVENT3:
-		*csr_val = csr_read(CSR_MHPMEVENT3);
-		break;
-	case CSR_MHPMEVENT4:
-		*csr_val = csr_read(CSR_MHPMEVENT4);
-		break;
+
+#define switchcase_hpm(__uref, __mref, __csr)				\
+	case __csr:							\
+		if ((sbi_hart_mhpm_count(scratch) + 3) <= (__csr - __uref))\
+			return SBI_ENOTSUPP;				\
+		if (!hpm_allowed(__csr - __uref, prev_mode, virt))	\
+			return SBI_ENOTSUPP;				\
+		*csr_val = csr_read(__mref + __csr - __uref);		\
+		break;
+#define switchcase_hpm_2(__uref, __mref, __csr)			\
+	switchcase_hpm(__uref, __mref, __csr + 0)			\
+	switchcase_hpm(__uref, __mref, __csr + 1)
+#define switchcase_hpm_4(__uref, __mref, __csr)			\
+	switchcase_hpm_2(__uref, __mref, __csr + 0)			\
+	switchcase_hpm_2(__uref, __mref, __csr + 2)
+#define switchcase_hpm_8(__uref, __mref, __csr)			\
+	switchcase_hpm_4(__uref, __mref, __csr + 0)			\
+	switchcase_hpm_4(__uref, __mref, __csr + 4)
+#define switchcase_hpm_16(__uref, __mref, __csr)			\
+	switchcase_hpm_8(__uref, __mref, __csr + 0)			\
+	switchcase_hpm_8(__uref, __mref, __csr + 8)
+
+	switchcase_hpm(CSR_CYCLE, CSR_MCYCLE, CSR_HPMCOUNTER3)
+	switchcase_hpm_4(CSR_CYCLE, CSR_MCYCLE, CSR_HPMCOUNTER4)
+	switchcase_hpm_8(CSR_CYCLE, CSR_MCYCLE, CSR_HPMCOUNTER8)
+	switchcase_hpm_16(CSR_CYCLE, CSR_MCYCLE, CSR_HPMCOUNTER16)
+
+#if __riscv_xlen == 32
+	switchcase_hpm(CSR_CYCLEH, CSR_MCYCLEH, CSR_HPMCOUNTER3H)
+	switchcase_hpm_4(CSR_CYCLEH, CSR_MCYCLEH, CSR_HPMCOUNTER4H)
+	switchcase_hpm_8(CSR_CYCLEH, CSR_MCYCLEH, CSR_HPMCOUNTER8H)
+	switchcase_hpm_16(CSR_CYCLEH, CSR_MCYCLEH, CSR_HPMCOUNTER16H)
+#endif
+
+#undef switchcase_hpm_16
+#undef switchcase_hpm_8
+#undef switchcase_hpm_4
+#undef switchcase_hpm_2
+#undef switchcase_hpm
+
 	default:
 		ret = SBI_ENOTSUPP;
 		break;
@@ -134,18 +167,6 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 		else
 			ret = SBI_ENOTSUPP;
 		break;
-	case CSR_CYCLE:
-		csr_write(CSR_MCYCLE, csr_val);
-		break;
-	case CSR_INSTRET:
-		csr_write(CSR_MINSTRET, csr_val);
-		break;
-	case CSR_MHPMCOUNTER3:
-		csr_write(CSR_MHPMCOUNTER3, csr_val);
-		break;
-	case CSR_MHPMCOUNTER4:
-		csr_write(CSR_MHPMCOUNTER4, csr_val);
-		break;
 #if __riscv_xlen == 32
 	case CSR_HTIMEDELTAH:
 		if (prev_mode == PRV_S && !virt)
@@ -153,25 +174,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 		else
 			ret = SBI_ENOTSUPP;
 		break;
-	case CSR_CYCLEH:
-		csr_write(CSR_MCYCLEH, csr_val);
-		break;
-	case CSR_INSTRETH:
-		csr_write(CSR_MINSTRETH, csr_val);
-		break;
-	case CSR_MHPMCOUNTER3H:
-		csr_write(CSR_MHPMCOUNTER3H, csr_val);
-		break;
-	case CSR_MHPMCOUNTER4H:
-		csr_write(CSR_MHPMCOUNTER4H, csr_val);
-		break;
 #endif
-	case CSR_MHPMEVENT3:
-		csr_write(CSR_MHPMEVENT3, csr_val);
-		break;
-	case CSR_MHPMEVENT4:
-		csr_write(CSR_MHPMEVENT4, csr_val);
-		break;
 	default:
 		ret = SBI_ENOTSUPP;
 		break;

From dcb10c0056f37d3de6ce2794b8e6f7c322ac4d46 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 1 Sep 2020 17:50:14 +0530
Subject: [PATCH 0649/1765] lib: sbi: Don't handle VS-mode ecall in
 sbi_trap_handler()

The VS-mode ecall is supposed to be handled by HS-mode so
sbi_trap_handler() should fallback to default case for
VS-mode ecall trap.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_trap.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index c2bd061a46f..8fe675330cd 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -251,7 +251,6 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 		rc  = sbi_misaligned_store_handler(mtval, mtval2, mtinst, regs);
 		msg = "misaligned store handler failed";
 		break;
-	case CAUSE_SUPERVISOR_ECALL:
 	case CAUSE_HYPERVISOR_ECALL:
 		rc  = sbi_ecall_handler(regs);
 		msg = "ecall handler failed";

From bef63d68489a3026f2fdf4c07a8915d3dcdf14cd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 1 Sep 2020 17:54:29 +0530
Subject: [PATCH 0650/1765] include: Rename ECALL defines to match latest
 RISC-V spec

We rename CAUSE_HYPERVISOR_ECALL to CAUSE_SUPERVISOR_ECALL and
CAUSE_SUPERVISOR_ECALL to CAUSE_VIRTUAL_SUPERVISOR_ECALL so that
it matches latest RISC-V privilege spec.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 4 ++--
 lib/sbi/sbi_hart.c           | 2 +-
 lib/sbi/sbi_trap.c           | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index ccd2c69cdfe..e1d0b463c66 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -539,8 +539,8 @@
 #define CAUSE_MISALIGNED_STORE		0x6
 #define CAUSE_STORE_ACCESS		0x7
 #define CAUSE_USER_ECALL		0x8
-#define CAUSE_HYPERVISOR_ECALL		0x9
-#define CAUSE_SUPERVISOR_ECALL		0xa
+#define CAUSE_SUPERVISOR_ECALL		0x9
+#define CAUSE_VIRTUAL_SUPERVISOR_ECALL	0xa
 #define CAUSE_MACHINE_ECALL		0xb
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 2211c3ce92c..d7889188e79 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -108,7 +108,7 @@ static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
 	 * from VS-mode), Guest page faults and Virtual interrupts.
 	 */
 	if (misa_extension('H')) {
-		exceptions |= (1U << CAUSE_SUPERVISOR_ECALL);
+		exceptions |= (1U << CAUSE_VIRTUAL_SUPERVISOR_ECALL);
 		exceptions |= (1U << CAUSE_FETCH_GUEST_PAGE_FAULT);
 		exceptions |= (1U << CAUSE_LOAD_GUEST_PAGE_FAULT);
 		exceptions |= (1U << CAUSE_VIRTUAL_INST_FAULT);
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 8fe675330cd..b8bb20cc8fc 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -251,7 +251,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 		rc  = sbi_misaligned_store_handler(mtval, mtval2, mtinst, regs);
 		msg = "misaligned store handler failed";
 		break;
-	case CAUSE_HYPERVISOR_ECALL:
+	case CAUSE_SUPERVISOR_ECALL:
 		rc  = sbi_ecall_handler(regs);
 		msg = "ecall handler failed";
 		break;

From c1c7c3ee9eb70e5c25914621f0363bfe244ebc79 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 4 Sep 2020 16:39:49 +0530
Subject: [PATCH 0651/1765] lib: sbi_trap: Allow M-mode to M-mode ECALLs

We should allow M-mode to M-mode ECALLs because:
1. No other mode can handle M-mode ECALLs
2. In future, we can allow M-mode baremetal application (not
   linked to OpenSBI) running independently and cooperatively
   without corrupting OpenSBI M-mode state (CSRs and memory).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_trap.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b8bb20cc8fc..db5aa2fa40d 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -252,6 +252,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
+	case CAUSE_MACHINE_ECALL:
 		rc  = sbi_ecall_handler(regs);
 		msg = "ecall handler failed";
 		break;

From 6734304f8c759c782cab12ecfd6c20fb23b8ee44 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 7 Sep 2020 11:11:29 +0530
Subject: [PATCH 0652/1765] lib: sbi: Allow specifying start mode to
 sbi_hsm_hart_start() API

The sbi_scratch already has provision to specify the next stage mode
so we can leverage this to specify start mode to sbi_hsm_hart_start().

In future, this will be useful in providing SBI calls to U-mode on
embedded cores where we M-mode and U-mode but no S-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h   | 2 +-
 lib/sbi/sbi_ecall_hsm.c | 6 +++++-
 lib/sbi/sbi_hsm.c       | 6 +++++-
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 57d41ff07ea..18d129be0fc 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -25,7 +25,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
-		       ulong saddr, ulong priv);
+		       ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 028bf68ecfc..992c93aa01c 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -19,12 +19,16 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 				 unsigned long *args, unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
+	ulong smode;
 	int ret = 0, hstate;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	switch (funcid) {
 	case SBI_EXT_HSM_HART_START:
-		ret = sbi_hsm_hart_start(scratch, args[0], args[1], args[2]);
+		smode = csr_read(CSR_MSTATUS);
+		smode = (smode & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+		ret = sbi_hsm_hart_start(scratch, args[0], args[1],
+					 smode, args[2]);
 		break;
 	case SBI_EXT_HSM_HART_STOP:
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 013647a9b01..b430793471e 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -203,7 +203,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 }
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
-		       ulong saddr, ulong priv)
+		       ulong saddr, ulong smode, ulong priv)
 {
 	int rc;
 	unsigned long init_count;
@@ -212,6 +212,9 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	struct sbi_hsm_data *hdata;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	if (smode != PRV_M && smode != PRV_S && smode != PRV_U)
+		return SBI_EINVAL;
+
 	rscratch = sbi_hartid_to_scratch(hartid);
 	if (!rscratch)
 		return SBI_EINVAL;
@@ -236,6 +239,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	init_count = sbi_init_count(hartid);
 	rscratch->next_arg1 = priv;
 	rscratch->next_addr = saddr;
+	rscratch->next_mode = smode;
 
 	if (sbi_platform_has_hart_hotplug(plat) ||
 	   (sbi_platform_has_hart_secondary_boot(plat) && !init_count)) {

From 7ccf6bf54c2d7db6331f3fa319ef4e7019108c28 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 7 Sep 2020 15:50:33 +0530
Subject: [PATCH 0653/1765] lib: sbi: Allow specifying mode in
 sbi_hart_pmp_check_addr() API

We extend sbi_hart_pmp_check_addr() API so that users can specify
privilege mode of the address for checking PMP access permissions.

To achieve this, we end-up converting "unsigned long *size" parameter
to "unsigned long *log2len" for pmp_get() implementation so that we
can deal with regions of "1UL << __riscv_xlen" size in a special case
in sbi_hart_pmp_check_addr() implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_asm.h |  2 +-
 include/sbi/sbi_hart.h  |  3 ++-
 lib/sbi/riscv_asm.c     | 18 ++++++++----------
 lib/sbi/sbi_hart.c      | 28 +++++++++++++++++++++-------
 lib/sbi/sbi_hsm.c       |  2 +-
 5 files changed, 33 insertions(+), 20 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 6e093ca396c..10f31a7fc3b 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -180,7 +180,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len);
 
 int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
-	    unsigned long *size);
+	    unsigned long *log2len);
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 1e1eb67c28e..0ba68f0cf93 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -42,7 +42,8 @@ int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
 		     unsigned long *prot_out, unsigned long *addr_out,
 		     unsigned long *size);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
-int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
+int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
+			     unsigned long daddr, unsigned long mode,
 			     unsigned long attr);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 799123fa187..8c54c11147e 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -239,16 +239,16 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 }
 
 int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
-	    unsigned long *size)
+	    unsigned long *log2len)
 {
 	int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
 	unsigned long cfgmask, pmpcfg, prot;
-	unsigned long t1, addr, log2len;
+	unsigned long t1, addr, len;
 
 	/* check parameters */
-	if (n >= PMP_COUNT || !prot_out || !addr_out || !size)
+	if (n >= PMP_COUNT || !prot_out || !addr_out || !log2len)
 		return SBI_EINVAL;
-	*prot_out = *addr_out = *size = 0;
+	*prot_out = *addr_out = *log2len = 0;
 
 	/* calculate PMP register and offset */
 #if __riscv_xlen == 32
@@ -275,23 +275,21 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 		addr = csr_read_num(pmpaddr_csr);
 		if (addr == -1UL) {
 			addr	= 0;
-			log2len = __riscv_xlen;
+			len	= __riscv_xlen;
 		} else {
 			t1	= ctz(~addr);
 			addr	= (addr & ~((1UL << t1) - 1)) << PMP_SHIFT;
-			log2len = (t1 + PMP_SHIFT + 1);
+			len	= (t1 + PMP_SHIFT + 1);
 		}
 	} else {
 		addr	= csr_read_num(pmpaddr_csr) << PMP_SHIFT;
-		log2len = PMP_SHIFT;
+		len	= PMP_SHIFT;
 	}
 
 	/* return details */
 	*prot_out    = prot;
 	*addr_out    = addr;
-
-	if (log2len < __riscv_xlen)
-		*size = (1UL << log2len);
+	*log2len     = len;
 
 	return 0;
 }
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d7889188e79..4cbe8ce16cc 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -156,22 +156,31 @@ int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
 		     unsigned long *prot_out, unsigned long *addr_out,
 		     unsigned long *size)
 {
+	int err;
+	unsigned long log2size;
+
 	if (sbi_hart_pmp_count(scratch) <= n)
 		return SBI_EINVAL;
 
-	return pmp_get(n, prot_out, addr_out, size);
+	err = pmp_get(n, prot_out, addr_out, &log2size);
+	if (err)
+		return err;
+	*size = (log2size < __riscv_xlen) ? 1UL << log2size : 0;
+
+	return 0;
 }
 
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
-	unsigned long prot, addr, size;
+	unsigned long prot, addr, size, log2size;
 	unsigned int i, pmp_count;
 
 	pmp_count = sbi_hart_pmp_count(scratch);
 	for (i = 0; i < pmp_count; i++) {
-		pmp_get(i, &prot, &addr, &size);
+		pmp_get(i, &prot, &addr, &log2size);
 		if (!(prot & PMP_A))
 			continue;
+		size = (log2size < __riscv_xlen) ? 1UL << log2size : 0;
 #if __riscv_xlen == 32
 		sbi_printf("PMP%d    : 0x%08lx-0x%08lx (A",
 #else
@@ -190,18 +199,23 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 	}
 }
 
-int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
+int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
+			    unsigned long addr, unsigned long mode,
 			    unsigned long attr)
 {
-	unsigned long prot, size, tempaddr;
+	unsigned long prot, size, log2size, tempaddr;
 	unsigned int i, pmp_count;
 
 	pmp_count = sbi_hart_pmp_count(scratch);
 	for (i = 0; i < pmp_count; i++) {
-		pmp_get(i, &prot, &tempaddr, &size);
+		pmp_get(i, &prot, &tempaddr, &log2size);
 		if (!(prot & PMP_A))
 			continue;
-		if (tempaddr <= addr && addr <= tempaddr + size)
+		if (mode == PRV_M && !(prot & PMP_L))
+			continue;
+		size = 1UL << log2size;
+		if ((log2size >= __riscv_xlen) ||
+		    ((tempaddr <= addr && addr <= tempaddr + size)))
 			if (!(prot & attr))
 				return SBI_EINVALID_ADDR;
 	}
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index b430793471e..8c1b7b0eaa9 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -231,7 +231,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	if (hstate != SBI_HART_STOPPED)
 		return SBI_EINVAL;
 
-	rc = sbi_hart_pmp_check_addr(scratch, saddr, PMP_X);
+	rc = sbi_hart_pmp_check_addr(scratch, saddr, smode, PMP_X);
 	if (rc)
 		return rc;
 	//TODO: We also need to check saddr for valid physical address as well.

From 9f935a4a4372657e43b25fe2f4022fdeb3ca2387 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 7 Sep 2020 19:16:27 +0530
Subject: [PATCH 0654/1765] lib: utils: Improve fdt_cpu_fixup() implementation

The fdt_cpu_fixup() should work fine even if HARTs without MMU
are not marked invalid by platform support code.

In future, we plan to treat HARTs without MMU as valid in the
generic platform support so that we can hold these HARTs in
HSM STOPPED state.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 4da7397d310..8f554e17249 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -21,7 +21,8 @@ void fdt_cpu_fixup(void *fdt)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int err, cpu_offset, cpus_offset;
+	int err, cpu_offset, cpus_offset, len;
+	const char *mmu_type;
 	u32 hartid;
 
 	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
@@ -37,7 +38,15 @@ void fdt_cpu_fixup(void *fdt)
 		if (err)
 			continue;
 
-		if (sbi_platform_hart_invalid(plat, hartid))
+		/*
+		 * Disable a HART DT node if one of the following is true:
+		 * 1. The HART is marked invalid by platform support
+		 * 2. MMU is not available for the HART
+		 */
+
+		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
+		if (sbi_platform_hart_invalid(plat, hartid) ||
+		    !mmu_type || !len)
 			fdt_setprop_string(fdt, cpu_offset, "status",
 					   "disabled");
 	}

From 172fa1601c7faaa01c547e8c498f5bdefd52d7cb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 9 Sep 2020 09:19:09 +0530
Subject: [PATCH 0655/1765] lib: sbi: Ensure coldboot HART supports next
 privilege mode

The coldboot HART jumps to the next booting stage at the end of
init_coldboot() so it is absolutely necessary for coldboot HART
to support the privilege mode expected by the next booting stage.

We extend the coldboot HART selection in sbi_init() to ensure that
the selected coldboot HART always supports privilege mode specified
in scratch space (i.e. scratch->next_mode). This will further help
us allow E-core (without MMU) on SiFive Unleashed and PolarFire
ICICLE boards to proceed further and wait in HSM STOPPED state.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e1a1d96dff9..65d81bacce8 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -295,6 +295,7 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  */
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
+	bool next_mode_supported	= FALSE;
 	bool coldboot			= FALSE;
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -303,7 +304,33 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	    sbi_platform_hart_invalid(plat, hartid))
 		sbi_hart_hang();
 
-	if (atomic_xchg(&coldboot_lottery, 1) == 0)
+	switch (scratch->next_mode) {
+	case PRV_M:
+		next_mode_supported = TRUE;
+		break;
+	case PRV_S:
+		if (misa_extension('S'))
+			next_mode_supported = TRUE;
+		break;
+	case PRV_U:
+		if (misa_extension('U'))
+			next_mode_supported = TRUE;
+		break;
+	default:
+		sbi_hart_hang();
+	}
+
+	/*
+	 * Only the HART supporting privilege mode specified in the
+	 * scratch->next_mode should be allowed to become the coldboot
+	 * HART because the coldboot HART will be directly jumping to
+	 * the next booting stage.
+	 *
+	 * We use a lottery mechanism to select coldboot HART among
+	 * HARTs which satisfy above condition.
+	 */
+
+	if (next_mode_supported && atomic_xchg(&coldboot_lottery, 1) == 0)
 		coldboot = TRUE;
 
 	if (coldboot)

From aaeca7eb4efa96cfde3973f425a6769b50285756 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 9 Sep 2020 13:54:03 +0530
Subject: [PATCH 0656/1765] platform: generic: Don't mark non-MMU HARTs as
 invalid

Currently, the generic platform fw_platform_init() marks non-MMU
HARTs (e.g. E-core on SiFive Unleashed) as invalid. This means
such non-MMU HARTs won't be allowed to go ahead by sbi_init().

The sbi_init() now has a check for next stage privilege mode when
selecting coldboot HART. This check will force non-MMU HARTS (i.e.
HARTs without S-mode) to proceed in warmboot path and wait in the
HSM STOPPED state. This means we don't need to mark non-MMU HARTs
as invalid in generic platform fw_platform_init().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/generic/platform.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index c3cf423d1eb..d902e71769b 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -71,7 +71,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 				unsigned long arg2, unsigned long arg3,
 				unsigned long arg4)
 {
-	const char *model, *mmu_type;
+	const char *model;
 	void *fdt = (void *)arg1;
 	u32 hartid, hart_count = 0;
 	int rc, root_offset, cpus_offset, cpu_offset, len;
@@ -101,10 +101,6 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 		if (SBI_HARTMASK_MAX_BITS <= hartid)
 			continue;
 
-		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
-		if (!mmu_type || !len)
-			hartid = -1U;
-
 		generic_hart_index2id[hart_count++] = hartid;
 	}
 

From 7701ea13be4c6e2e16cce334e03ff8ab5b5e1d60 Mon Sep 17 00:00:00 2001
From: Pragnesh Patel <pragnesh.patel@sifive.com>
Date: Wed, 23 Sep 2020 12:44:17 +0530
Subject: [PATCH 0657/1765] lib: sbi: Fix PMP CSR detection

HiFive unleashed currently implements fewer than 56 bits of physical
address so existing PMP CSR detection is broken.

PMP address register encodes bits 55-2 of a 56-bit physical address,
Not all physical address bits may be implemented, So just check
minimum 1 bit.

Fixes: 74d1db706293 ("lib: sbi: Improve PMP CSR detection and
progamming")

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 4cbe8ce16cc..64131948e60 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -403,7 +403,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	__check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip)
 
 	/* Detect number of PMP regions */
-	__check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK, pmp_count, __pmp_skip);
+	__check_csr_64(CSR_PMPADDR0, 0, 1UL, pmp_count, __pmp_skip);
 __pmp_skip:
 
 	/* Detect number of MHPM counters */

From 79bf80b44e578181436be3647b0c475fc42b14e8 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Thu, 1 Oct 2020 12:27:47 +0200
Subject: [PATCH 0658/1765] lib: sbi_scratch: typo scatch

%s/scatch/scratch

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 8086207fd84..9f3453d3823 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -85,7 +85,7 @@ enum sbi_scratch_options {
 #define sbi_scratch_thishart_arg1_ptr() \
 	((void *)(sbi_scratch_thishart_ptr()->next_arg1))
 
-/** Initialize scatch table and allocator */
+/** Initialize scratch table and allocator */
 int sbi_scratch_init(struct sbi_scratch *scratch);
 
 /**

From a04c46506a6e5bd7425bd63430645a6c85145b10 Mon Sep 17 00:00:00 2001
From: Damien Le Moal <damien.lemoal@wdc.com>
Date: Mon, 5 Oct 2020 23:55:53 +0900
Subject: [PATCH 0659/1765] makefile: fix clean directive

Add cleaning of compiled device tree files (.dtb files).

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Makefile b/Makefile
index cebb78e220d..2a352ef52a0 100644
--- a/Makefile
+++ b/Makefile
@@ -461,6 +461,8 @@ clean:
 	$(CMD_PREFIX)find $(build_dir) -type f -name "*.elf" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.bin")
 	$(CMD_PREFIX)find $(build_dir) -type f -name "*.bin" -exec rm -rf {} +
+	$(if $(V), @echo " RM        $(build_dir)/*.dtb")
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.dtb" -exec rm -rf {} +
 
 # Rule for "make distclean"
 .PHONY: distclean

From af4b50f896684040dd3f56f2fdcad702f527c633 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 14 Oct 2020 13:44:18 +0530
Subject: [PATCH 0660/1765] Makefile: Build ELF, BIN and LD script in platform
 build directory

Currently, the make rules for ELF, BIN and LD script are little
generic to allowing ELF, BIN and LD script to be anywhere in the
build directory. For OpenSBI firmwares, the ELF, BIN, and LD script
are always platform specific so we update make rules accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/Makefile b/Makefile
index 2a352ef52a0..6c36f09ff26 100644
--- a/Makefile
+++ b/Makefile
@@ -310,15 +310,6 @@ all: $(targets-y)
 # Preserve all intermediate files
 .SECONDARY:
 
-$(build_dir)/%.bin: $(build_dir)/%.elf
-	$(call compile_objcopy,$@,$<)
-
-$(build_dir)/%.elf: $(build_dir)/%.o $(build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
-	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
-
-$(platform_build_dir)/%.ld: $(src_dir)/%.ldS
-	$(call compile_cpp,$@,$<)
-
 $(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 	$(call compile_ar,$@,$^)
 
@@ -340,6 +331,15 @@ $(build_dir)/%.dep: $(src_dir)/%.S
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+$(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
+	$(call compile_objcopy,$@,$<)
+
+$(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
+	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
+
+$(platform_build_dir)/%.ld: $(src_dir)/%.ldS
+	$(call compile_cpp,$@,$<)
+
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c
 	$(call compile_cc_dep,$@,$<)
 

From 6ca096977d723f3ac50291d668719bd938a85544 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 14 Oct 2020 16:03:35 +0530
Subject: [PATCH 0661/1765] firmware: Add common FW_FDT_PATH compile-time
 option

Currently, only FW_PAYLOAD has mechanism to embed external
FDT using FW_PAYLOAD_FDT_PATH compile-time option.

This patch adds a common FW_FDT_PATH compile-time option to
embed external FDT for all OpenSBI firmwares (i.e FW_JUMP,
FW_PAYLOAD, and FW_DYNAMIC).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/firmware/fw.md       | 16 +++++++++++-----
 firmware/external_deps.mk |  4 ++++
 firmware/fw_base.S        | 16 ++++++++++++++++
 firmware/objects.mk       |  7 +++++++
 4 files changed, 38 insertions(+), 5 deletions(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 4133c23fe4d..cc0cc9e56ee 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -51,11 +51,17 @@ case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree in the
 Firmware Configuration and Compilation
 --------------------------------------
 
-All firmware types mandate the definition of the following compile time
-configuration parameter.
-
-* **FW_TEXT_ADDR** - Defines the address at which the previous booting stage
-  loads OpenSBI firmware.
+All firmware types support the following common compile time configuration
+parameters:
+
+* **FW_TEXT_ADDR** - Defines the execution address of the OpenSBI firmware.
+  This configuration parameter is mandatory.
+* **FW_FDT_PATH** - Path to an external flattened device tree binary file to
+  be embedded in the *.rodata* section of the final firmware. If this option
+  is not provided then the firmware will expect the FDT to be passed as an
+  argument by the prior booting stage.
+* **FW_FDT_PADDING** - Optional zero bytes padding to the embedded flattened
+  device tree binary file specified by **FW_FDT_PATH** option.
 
 Additionally, each firmware type as a set of type specific configuration
 parameters. Detailed information for each firmware type can be found in the
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
index 2b8f9f67d47..f43ac06cea4 100644
--- a/firmware/external_deps.mk
+++ b/firmware/external_deps.mk
@@ -7,5 +7,9 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+$(platform_build_dir)/firmware/fw_dynamic.o: $(FW_FDT_PATH)
+$(platform_build_dir)/firmware/fw_jump.o: $(FW_FDT_PATH)
+$(platform_build_dir)/firmware/fw_payload.o: $(FW_FDT_PATH)
+
 $(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
 $(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 0271d9a367b..95197dacf9e 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -182,6 +182,11 @@ _bss_zero:
 	call	fw_save_info
 	MOV_5R	a0, s0, a1, s1, a2, s2, a3, s3, a4, s4
 
+#ifdef FW_FDT_PATH
+	/* Override previous arg1 */
+	la	a1, fw_fdt_bin
+#endif
+
 	/* Override previous arg1 */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_prev_arg1
@@ -668,3 +673,14 @@ _reset_regs:
 	csrw CSR_MSCRATCH, 0
 
 	ret
+
+#ifdef FW_FDT_PATH
+	.section .rodata
+	.align 4
+	.globl fw_fdt_bin
+fw_fdt_bin:
+	.incbin FW_FDT_PATH
+#ifdef FW_FDT_PADDING
+	.fill FW_FDT_PADDING, 1, 0
+#endif
+#endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index c9803629aa9..2eea54c15d7 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -17,6 +17,13 @@ ifdef FW_TEXT_START
 firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
 endif
 
+ifdef FW_FDT_PATH
+firmware-genflags-y += -DFW_FDT_PATH=\"$(FW_FDT_PATH)\"
+ifdef FW_FDT_PADDING
+firmware-genflags-y += -DFW_FDT_PADDING=$(FW_FDT_PADDING)
+endif
+endif
+
 firmware-bins-$(FW_DYNAMIC) += fw_dynamic.bin
 
 firmware-bins-$(FW_JUMP) += fw_jump.bin

From 9c07c513aa9b2df64a971432e8dae3338a8e22ab Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 14 Oct 2020 16:43:34 +0530
Subject: [PATCH 0662/1765] firmware: Remove FW_PAYLOAD_FDT_PATH compile-time
 option

The FW_PAYLOAD_FDT_PATH compile-time option is replaced by
FW_FDT_PATH compile-time option which is more flexible and
common across all OpenSBI firmwares.

This patch removes FW_PAYLOAD_FDT_PATH and updates related
documentation to use FW_FDT_PATH.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/firmware/fw_payload.md    |  9 ++-------
 docs/platform/andes-ae350.md   |  4 ++--
 docs/platform/shakti_cclass.md |  4 ++--
 docs/platform/sifive_fu540.md  |  6 +++---
 firmware/external_deps.mk      |  1 -
 firmware/fw_base.S             |  9 ---------
 firmware/fw_dynamic.S          | 13 -------------
 firmware/fw_jump.S             | 13 -------------
 firmware/fw_payload.S          | 25 -------------------------
 firmware/objects.mk            |  3 ---
 platform/template/config.mk    |  4 +++-
 11 files changed, 12 insertions(+), 79 deletions(-)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index bc712d26e38..09474480695 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -55,14 +55,9 @@ file. The parameters currently defined are as follows:
   automatically generated and used as a payload. This test payload executes
   an infinite `while (1)` loop after printing a message on the platform console.
 
-* **FW_PAYLOAD_FDT_PATH** - Path to an external flattened device tree binary
-  file to be embedded in the *.text* section of the final firmware. If this
-  option is not provided then the firmware will expect the FDT to be passed
-  as an argument by the prior booting stage.
-
 * **FW_PAYLOAD_FDT_ADDR** - Address where the FDT passed by the prior booting
-  stage or specified by the *FW_PAYLOAD_FDT_PATH* parameter and embedded in
-  the *.text* section will be placed before executing the next booting stage,
+  stage or specified by the *FW_FDT_PATH* parameter and embedded in the
+  *.rodata* section will be placed before executing the next booting stage,
   that is, the payload firmware. If this option is not provided, then the
   firmware will pass the FDT address passed by the previous booting stage
   to the next booting stage.
diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index 5a98707b230..46889a1f1cd 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -19,12 +19,12 @@ Building Andes AE350 Platform
 -----------------------------
 
 To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using
-the compile time option FW_PAYLOAD_FDT_PATH.
+the compile time option FW_FDT_PATH.
 
 AE350's dts is included in https://github.com/andestech/linux/tree/ast-v3_2_0-release-public
 
 **Linux Kernel Payload**
 
 ```
-make PLATFORM=andes/ae350 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<ae350.dtb path>
+make PLATFORM=andes/ae350 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<ae350.dtb path>
 ```
diff --git a/docs/platform/shakti_cclass.md b/docs/platform/shakti_cclass.md
index 2f4a699b0ca..05c9b3a4c84 100644
--- a/docs/platform/shakti_cclass.md
+++ b/docs/platform/shakti_cclass.md
@@ -23,11 +23,11 @@ Building Shakti C-class Platform
 **Linux Kernel Payload**
 
 ```
-make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<shakti.dtb path>
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<shakti.dtb path>
 ```
 
 **Test Payload**
 
 ```
-make PLATFORM=generic FW_PAYLOAD_FDT_PATH=<shakti.dtb path>
+make PLATFORM=generic FW_FDT_PATH=<shakti.dtb path>
 ```
diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 10084322ec8..c9513eb67b0 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -29,13 +29,13 @@ DT (device tree) is not backward compatible with the DT passed from FSBL.
 
 To use Linux v5.2 (or higher, the pre-built DTB (DT binary) from Linux v5.2
 (or higher) should be used to build SiFive FU540 OpenSBI binaries by using
-the compile time option *FW_PAYLOAD_FDT_PATH*.
+the compile time option *FW_FDT_PATH*.
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 or
 (For Linux v5.2 or higher)
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_PAYLOAD_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
+make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
 ```
 
 **U-Boot Payload**
@@ -147,7 +147,7 @@ booti ${kernel_addr_r} - ${fdt_addr_r}
 QEMU Specific Instructions
 --------------------------
 If you want to test OpenSBI with QEMU 'sifive_u' machine, please follow the
-same instructions above, with the exception of not passing FW_PAYLOAD_FDT_PATH.
+same instructions above, with the exception of not passing FW_FDT_PATH.
 
 This is because QEMU generates a device tree blob on the fly based on the
 command line parameters and it's compatible with the one used in the upstream
diff --git a/firmware/external_deps.mk b/firmware/external_deps.mk
index f43ac06cea4..6264005bc1c 100644
--- a/firmware/external_deps.mk
+++ b/firmware/external_deps.mk
@@ -12,4 +12,3 @@ $(platform_build_dir)/firmware/fw_jump.o: $(FW_FDT_PATH)
 $(platform_build_dir)/firmware/fw_payload.o: $(FW_FDT_PATH)
 
 $(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_PATH_FINAL)
-$(platform_build_dir)/firmware/fw_payload.o: $(FW_PAYLOAD_FDT_PATH)
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 95197dacf9e..1d9b375bb05 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -187,15 +187,6 @@ _bss_zero:
 	la	a1, fw_fdt_bin
 #endif
 
-	/* Override previous arg1 */
-	MOV_3R	s0, a0, s1, a1, s2, a2
-	call	fw_prev_arg1
-	add	t1, a0, zero
-	MOV_3R	a0, s0, a1, s1, a2, s2
-	beqz	t1, _prev_arg1_override_done
-	add	a1, t1, zero
-_prev_arg1_override_done:
-
 	/*
 	 * Initialize platform
 	 * Note: The a0 to a4 registers passed to the
diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index d6580116411..8b56947af5a 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -86,19 +86,6 @@ fw_save_info:
 2:
 	ret
 
-	.section .entry, "ax", %progbits
-	.align 3
-	.global fw_prev_arg1
-	/*
-	 * We can only use a0, a1, and a2 registers here.
-	 * The a0, a1, and a2 registers will be same as passed by
-	 * previous booting stage.
-	 * The previous arg1 should be returned in 'a0'.
-	 */
-fw_prev_arg1:
-	add	a0, zero, zero
-	ret
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.global fw_next_arg1
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index afbcec0e5aa..8553f8c7f9b 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -34,19 +34,6 @@ fw_boot_hart:
 fw_save_info:
 	ret
 
-	.section .entry, "ax", %progbits
-	.align 3
-	.global fw_prev_arg1
-	/*
-	 * We can only use a0, a1, and a2 registers here.
-	 * The a0, a1, and a2 registers will be same as passed by
-	 * previous booting stage.
-	 * The previous arg1 should be returned in 'a0'.
-	 */
-fw_prev_arg1:
-	add	a0, zero, zero
-	ret
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.global fw_next_arg1
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 9805d8c651a..1ef121e280a 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -34,23 +34,6 @@ fw_boot_hart:
 fw_save_info:
 	ret
 
-	.section .entry, "ax", %progbits
-	.align 3
-	.global fw_prev_arg1
-	/*
-	 * We can only use a0, a1, and a2 registers here.
-	 * The a0, a1, and a2 registers will be same as passed by
-	 * previous booting stage.
-	 * The previous arg1 should be returned in 'a0'.
-	 */
-fw_prev_arg1:
-#ifdef FW_PAYLOAD_FDT_PATH
-	la	a0, fdt_bin
-#else
-	add	a0, zero, zero
-#endif
-	ret
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.global fw_next_arg1
@@ -102,14 +85,6 @@ fw_options:
 	add	a0, zero, zero
 	ret
 
-#ifdef FW_PAYLOAD_FDT_PATH
-	.section .text, "ax", %progbits
-	.align 4
-	.globl fdt_bin
-fdt_bin:
-	.incbin	FW_PAYLOAD_FDT_PATH
-#endif
-
 	.section .payload, "ax", %progbits
 	.align 4
 	.globl payload_bin
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 2eea54c15d7..b2ace7512f4 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -48,9 +48,6 @@ ifdef FW_PAYLOAD_ALIGN
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_ALIGN=$(FW_PAYLOAD_ALIGN)
 endif
 
-ifdef FW_PAYLOAD_FDT_PATH
-firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_PATH=\"$(FW_PAYLOAD_FDT_PATH)\"
-endif
 ifdef FW_PAYLOAD_FDT_ADDR
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
 endif
diff --git a/platform/template/config.mk b/platform/template/config.mk
index 7bcf9377f80..f817342c29b 100644
--- a/platform/template/config.mk
+++ b/platform/template/config.mk
@@ -34,6 +34,9 @@ platform-ldflags-y =
 # Firmware load address configuration. This is mandatory.
 FW_TEXT_START=0x80000000
 
+# Optional parameter for path to external FDT
+# FW_FDT_PATH="path to platform flattened device tree file"
+
 #
 # Dynamic firmware configuration.
 # Optional parameters are commented out. Uncomment and define these parameters
@@ -71,5 +74,4 @@ FW_PAYLOAD_OFFSET=0x200000
 endif
 # FW_PAYLOAD_ALIGN=0x1000
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
-# FW_PAYLOAD_FDT_PATH="path to platform flattened device tree file"
 # FW_PAYLOAD_FDT_ADDR=0x82200000

From e9a4bfb7b51e1d43f2c5d6d387354ba4b14411f2 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Wed, 14 Oct 2020 22:05:31 +0530
Subject: [PATCH 0663/1765] Makefile: Allow padding zeros when converting DTB
 to C source

We extend d2c.sh to allow padding zeros in output C source when
converting DTB to C source. Using this feature, platforms can
create extra room for in-place FDT fixups on built-in DTBs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 Makefile       | 7 +++++--
 scripts/d2c.sh | 9 ++++++++-
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 6c36f09ff26..a2318812df7 100644
--- a/Makefile
+++ b/Makefile
@@ -291,7 +291,10 @@ compile_dts = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(CPP) $(DTSCPPFLAGS) $(2) | $(DTC) -O dtb -i `dirname $(2)` -o $(1)
 compile_d2c = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " D2C       $(subst $(build_dir)/,,$(1))"; \
-	     $(src_dir)/scripts/d2c.sh -i $(4) -a $(3) -p $(2) > $(1)
+	     $(if $($(2)-varalign-$(3)),$(eval D2C_ALIGN_BYTES := $($(2)-varalign-$(3))),$(eval D2C_ALIGN_BYTES := $(4))) \
+	     $(if $($(2)-varprefix-$(3)),$(eval D2C_NAME_PREFIX := $($(2)-varprefix-$(3))),$(eval D2C_NAME_PREFIX := $(5))) \
+	     $(if $($(2)-padding-$(3)),$(eval D2C_PADDING_BYTES := $($(2)-padding-$(3))),$(eval D2C_PADDING_BYTES := 0)) \
+	     $(src_dir)/scripts/d2c.sh -i $(6) -a $(D2C_ALIGN_BYTES) -p $(D2C_NAME_PREFIX) -t $(D2C_PADDING_BYTES) > $(1)
 compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " GEN-DEP   $(subst $(build_dir)/,,$(1))"; \
 	     echo "$(1:.dep=$(2)): $(3)" >> $(1)
@@ -361,7 +364,7 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
 $(platform_build_dir)/%.c: $(platform_build_dir)/%.dtb
-	$(call compile_d2c,$@,$(platform-varprefix-$(subst .dtb,.o,$(subst /,-,$(subst $(platform_build_dir)/,,$<)))),16,$<)
+	$(call compile_d2c,$@,platform,$(subst .dtb,.o,$(subst /,-,$(subst $(platform_build_dir)/,,$<))),16,dt,$<)
 
 $(platform_build_dir)/%.dtb: $(platform_src_dir)/%.dts
 	$(call compile_dts,$@,$<)
diff --git a/scripts/d2c.sh b/scripts/d2c.sh
index 821a9959a61..33a3ccf76a4 100755
--- a/scripts/d2c.sh
+++ b/scripts/d2c.sh
@@ -9,6 +9,7 @@ function usage()
 	echo "     -i <input_file_path> Input binary file path"
 	echo "     -a <c_align>         Output C array alignment"
 	echo "     -p <c_prefix>        Output C array name prefix"
+	echo "     -t <num_zero_bytes>  Output padding zero bytes"
 	exit 1;
 }
 
@@ -16,8 +17,9 @@ function usage()
 INPUT_PATH=""
 OUTPUT_C_ALIGN=""
 OUTPUT_C_PREFIX=""
+NUM_ZERO_BYTES=0
 
-while getopts "hi:a:p:o:" o; do
+while getopts "hi:a:p:t:" o; do
 	case "${o}" in
 	h)
 		usage
@@ -31,6 +33,9 @@ while getopts "hi:a:p:o:" o; do
 	p)
 		OUTPUT_C_PREFIX=${OPTARG}
 		;;
+	t)
+		NUM_ZERO_BYTES=${OPTARG}
+		;;
 	*)
 		usage
 		;;
@@ -62,6 +67,8 @@ printf "const char __attribute__((aligned(%s))) %s_start[] = {\n" "${OUTPUT_C_AL
 
 od -v -t x1 -An ${INPUT_PATH} | awk '{for (i=1; i<=NF; i++) printf " 0x%s,", $i; printf "\n"; }'
 
+echo __dummy__ | awk "{for (i=1; i<=${NUM_ZERO_BYTES}; i++) { printf \" 0x00,\"; if (i % 16 == 0) printf \"\n\"; } }"
+
 printf "};\n"
 
 printf "const unsigned long %s_size = sizeof(%s_start);\n" "${OUTPUT_C_PREFIX}" "${OUTPUT_C_PREFIX}"

From a0f2d4a10c8b58065416bf963987b7358168fba9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 15 Oct 2020 10:27:57 +0530
Subject: [PATCH 0664/1765] platform: kendryte/k210: Add some padding for FDT
 fixups

The Kendryte K210 platform has built-in DTB and does not provides
FW_PAYLOAD_FDT_ADDR. This means the FDT fixups will be done on
the built-in DTB in absence of FW_PAYLOAD_FDT_ADDR. This patch
adds some padding in built-in DTB for FDT fixups.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/kendryte/k210/objects.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 106f9f212cf..b74da7407bc 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -11,3 +11,4 @@ platform-objs-y += platform.o
 
 platform-objs-y += k210.o
 platform-varprefix-k210.o = dt_k210
+platform-padding-k210.o = 2048

From dbeeacb878b1b11c8d1df35f8a5db2b6ccf69c7b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 17 Sep 2020 15:51:00 +0530
Subject: [PATCH 0665/1765] include: sbi: Remove redundant includes from
 sbi_platform.h

The sbi_ecall.h and sbi_trap.h are not required to be included in
sbi_platform.h hence we remove it. This way sources requiring
these headers will have to explicitly include it thereby reducing
implicit includes.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_platform.h | 4 ++--
 lib/sbi/sbi_hart.c         | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 808714869ab..f51e36a2ed3 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -40,12 +40,12 @@
 
 #ifndef __ASSEMBLY__
 
-#include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
-#include <sbi/sbi_trap.h>
 #include <sbi/sbi_version.h>
 
+struct sbi_trap_info;
+
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
 	/** Platform has timer value */
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 64131948e60..55a04da7679 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -19,6 +19,7 @@
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_trap.h>
 
 extern void __sbi_expected_trap(void);
 extern void __sbi_expected_trap_hext(void);

From a12d46a5e736b9eb582af9c43c876c6228bb4bda Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 17 Sep 2020 16:04:55 +0530
Subject: [PATCH 0666/1765] include: sbi: Remove pmp_region callbacks from
 sbi_platform_operations

The pmp_region_xyz() callbacks are not required in sbi_platform_operations
because we will be using OpenSBI domain memory regions to program the
PMP CSRs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_platform.h | 50 --------------------------------------
 lib/sbi/sbi_hart.c         | 14 +----------
 2 files changed, 1 insertion(+), 63 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index f51e36a2ed3..f2c3237aa47 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -89,15 +89,6 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
-	/** Get number of PMP regions for given HART */
-	u32 (*pmp_region_count)(u32 hartid);
-	/**
-	 * Get PMP regions details (namely: protection, base address,
-	 * and size) for given HART
-	 */
-	int (*pmp_region_info)(u32 hartid, u32 index, ulong *prot, ulong *addr,
-			       ulong *log2size);
-
 	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
 	/** Read a character from the platform console input */
@@ -456,47 +447,6 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
-/**
- * Get the number of PMP regions of a HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return number of PMP regions
- */
-static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat,
-						u32 hartid)
-{
-	if (plat && sbi_platform_ops(plat)->pmp_region_count)
-		return sbi_platform_ops(plat)->pmp_region_count(hartid);
-	return 0;
-}
-
-/**
- * Get PMP regions details (namely: protection, base address,
- * and size) of a HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- * @param index index of PMP region for which we want details
- * @param prot output pointer for PMP region protection
- * @param addr output pointer for PMP region base address
- * @param log2size output pointer for log-of-2 PMP region size
- *
- * @return 0 on success and negative error code on failure
- */
-static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
-						u32 hartid, u32 index,
-						ulong *prot, ulong *addr,
-						ulong *log2size)
-{
-	if (plat && sbi_platform_ops(plat)->pmp_region_info)
-		return sbi_platform_ops(plat)->pmp_region_info(hartid, index,
-							       prot, addr,
-							       log2size);
-	return 0;
-}
-
 /**
  * Write a character to the platform console output
  *
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 55a04da7679..edf79b72770 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -226,10 +226,8 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
 
 static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 {
-	u32 i, pmp_idx = 0, pmp_count, count;
+	u32 pmp_idx = 0;
 	unsigned long fw_start, fw_size_log2;
-	ulong prot, addr, log2size;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (!sbi_hart_pmp_count(scratch))
 		return 0;
@@ -239,16 +237,6 @@ static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
 	fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
 	pmp_set(pmp_idx++, 0, fw_start, fw_size_log2);
 
-	/* Platform specific PMP regions */
-	count = sbi_platform_pmp_region_count(plat, hartid);
-	pmp_count = sbi_hart_pmp_count(scratch);
-	for (i = 0; i < count && pmp_idx < (pmp_count - 1); i++) {
-		if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr,
-						 &log2size))
-			continue;
-		pmp_set(pmp_idx++, prot, addr, log2size);
-	}
-
 	/*
 	 * Default PMP region for allowing S-mode and U-mode access to
 	 * memory not covered by:

From a126886bfa4bd11a8b1595dab8246476741fc098 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 20 Sep 2020 10:09:32 +0530
Subject: [PATCH 0667/1765] lib: sbi: Configure PMP late in coldboot and
 warmboot path

We factor-out PMP configuration from sbi_hart_init() as a separate
sbi_hart_pmp_configure() function and do the PMP configuration very
late in coldboot and warmboot path just before platform_final_init().

Eventually, this enable us to configure PMP totally based on OpenSBI
domain where OpenSBI domains can be parsed from device-tree in any of
the platform operations except platform_final_init().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_hart.h | 1 +
 lib/sbi/sbi_hart.c     | 4 ++--
 lib/sbi/sbi_init.c     | 8 ++++++++
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 0ba68f0cf93..9207f4cad59 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -45,6 +45,7 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
 			     unsigned long daddr, unsigned long mode,
 			     unsigned long attr);
+int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
 			       char *features_str, int nfstr);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index edf79b72770..7244f1c1fdc 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -224,7 +224,7 @@ int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
 	return SBI_OK;
 }
 
-static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
+int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	u32 pmp_idx = 0;
 	unsigned long fw_start, fw_size_log2;
@@ -462,7 +462,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	if (rc)
 		return rc;
 
-	return pmp_init(scratch, hartid);
+	return 0;
 }
 
 void __attribute__((noreturn)) sbi_hart_hang(void)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 65d81bacce8..85a5f13f231 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -210,6 +210,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_hart_pmp_configure(scratch);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_platform_final_init(plat, TRUE);
 	if (rc)
 		sbi_hart_hang();
@@ -266,6 +270,10 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_hart_pmp_configure(scratch);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_platform_final_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();

From f81d6f6f43c661829b796a849058676eaadc2533 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 20 Sep 2020 13:49:02 +0530
Subject: [PATCH 0668/1765] lib: sbi: Remove redundant hartid parameter from
 sbi_hart_init()

The hartid parameter of sbi_hart_init() is not used anywhere in
sbi_hart_init() implementation so let's remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_hart.h |  2 +-
 lib/sbi/sbi_hart.c     | 14 +++++++-------
 lib/sbi/sbi_init.c     |  4 ++--
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 9207f4cad59..2efe44d384e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -27,7 +27,7 @@ enum sbi_hart_features {
 
 struct sbi_scratch;
 
-int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
+int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot);
 
 extern void (*sbi_hart_expected_trap)(void);
 static inline ulong sbi_hart_expected_trap_addr(void)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 7244f1c1fdc..88ffab0063f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -33,7 +33,7 @@ struct hart_features {
 };
 static unsigned long hart_features_offset;
 
-static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
+static void mstatus_init(struct sbi_scratch *scratch)
 {
 	unsigned long mstatus_val = 0;
 
@@ -62,7 +62,7 @@ static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
 		csr_write(CSR_SATP, 0);
 }
 
-static int fp_init(u32 hartid)
+static int fp_init(struct sbi_scratch *scratch)
 {
 #ifdef __riscv_flen
 	int i;
@@ -83,7 +83,7 @@ static int fp_init(u32 hartid)
 	return 0;
 }
 
-static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
+static int delegate_traps(struct sbi_scratch *scratch)
 {
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	unsigned long interrupts, exceptions;
@@ -435,7 +435,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 		hfeatures->features |= SBI_HART_HAS_TIME;
 }
 
-int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
+int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int rc;
 
@@ -452,13 +452,13 @@ int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 	hart_detect_features(scratch);
 
-	mstatus_init(scratch, hartid);
+	mstatus_init(scratch);
 
-	rc = fp_init(hartid);
+	rc = fp_init(scratch);
 	if (rc)
 		return rc;
 
-	rc = delegate_traps(scratch, hartid);
+	rc = delegate_traps(scratch);
 	if (rc)
 		return rc;
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 85a5f13f231..5cedb150706 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -182,7 +182,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, hartid, TRUE);
+	rc = sbi_hart_init(scratch, TRUE);
 	if (rc)
 		sbi_hart_hang();
 
@@ -250,7 +250,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, hartid, FALSE);
+	rc = sbi_hart_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
 

From 8b650050ecb61da143ee18fc150dd95ac5b0eca1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 24 Sep 2020 16:04:02 +0530
Subject: [PATCH 0669/1765] include: sbi: Make hartmask pointer const in
 sbi_hartmask_test_hart()

The sbi_hartmask_test_hart() does not modify hartmask so the
hartmask pointer parameter should be declared const.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_hartmask.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h
index 77e42cb9f2d..f1cef0c2a07 100644
--- a/include/sbi/sbi_hartmask.h
+++ b/include/sbi/sbi_hartmask.h
@@ -67,7 +67,7 @@ static inline void sbi_hartmask_clear_hart(u32 h, struct sbi_hartmask *m)
  * @param h HART id to test
  * @param m the hartmask pointer
  */
-static inline int sbi_hartmask_test_hart(u32 h, struct sbi_hartmask *m)
+static inline int sbi_hartmask_test_hart(u32 h, const struct sbi_hartmask *m)
 {
 	if (h < SBI_HARTMASK_MAX_BITS)
 		return __test_bit(h, m->bits);

From b1678af210dc4b4e6d586d6d96617e9641618994 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 18 Sep 2020 17:07:49 +0530
Subject: [PATCH 0670/1765] lib: sbi: Add initial domain support

An OpenSBI domain is a logical entity representing a set of HARTs
and a set of memory regions for these HARTs.

The OpenSBI domains support will allow OpenSBI platforms and previous
booting stage (i.e. U-Boot SPL, Coreboot, etc) to partition a system
into multiple domains where each domain will run it's own software.

For inter-domain isolation, OpenSBI will eventually use various HW
features such as PMP, ePMP, IOPMP, SiFive shield, etc but initial
implementation only use HW PMP support.

This patch provides initial implementation of OpenSBI domains where
we have a root/default domain and OpenSBI platforms can provide
non-root/custom domains using domain_get() callback.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_domain.h   | 147 ++++++++++++++
 include/sbi/sbi_platform.h |  20 ++
 lib/sbi/objects.mk         |   1 +
 lib/sbi/sbi_domain.c       | 380 +++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c         |  20 ++
 5 files changed, 568 insertions(+)
 create mode 100644 include/sbi/sbi_domain.h
 create mode 100644 lib/sbi/sbi_domain.c

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
new file mode 100644
index 00000000000..4bb08dc61ec
--- /dev/null
+++ b/include/sbi/sbi_domain.h
@@ -0,0 +1,147 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __SBI_DOMAIN_H__
+#define __SBI_DOMAIN_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_hartmask.h>
+
+struct sbi_scratch;
+
+/** Domain access types */
+enum sbi_domain_access {
+	SBI_DOMAIN_READ = (1UL << 0),
+	SBI_DOMAIN_WRITE = (1UL << 1),
+	SBI_DOMAIN_EXECUTE = (1UL << 2),
+	SBI_DOMAIN_MMIO = (1UL << 3)
+};
+
+/** Representation of OpenSBI domain memory region */
+struct sbi_domain_memregion {
+	/**
+	 * Size of memory region as power of 2
+	 * It has to be minimum 3 and maximum __riscv_xlen
+	 */
+	unsigned long order;
+	/**
+	 * Base address of memory region
+	 * It must be 2^order aligned address
+	 */
+	unsigned long base;
+	/** Flags representing memory region attributes */
+#define SBI_DOMAIN_MEMREGION_READABLE		(1UL << 0)
+#define SBI_DOMAIN_MEMREGION_WRITEABLE		(1UL << 1)
+#define SBI_DOMAIN_MEMREGION_EXECUTABLE		(1UL << 2)
+#define SBI_DOMAIN_MEMREGION_MMIO		(1UL << 3)
+#define SBI_DOMAIN_MEMREGION_MMODE		(1UL << 4)
+	unsigned long flags;
+};
+
+/** Maximum number of domains */
+#define SBI_DOMAIN_MAX_INDEX			32
+
+/** Representation of OpenSBI domain */
+struct sbi_domain {
+	/**
+	 * Logical index of this domain
+	 * Note: This set by sbi_domain_finalize() in the coldboot path
+	 */
+	u32 index;
+	/**
+	 * HARTs assigned to this domain
+	 * Note: This set by sbi_domain_init() and sbi_domain_finalize()
+	 * in the coldboot path
+	 */
+	struct sbi_hartmask assigned_harts;
+	/** Name of this domain */
+	char name[64];
+	/** Possible HARTs in this domain */
+	const struct sbi_hartmask *possible_harts;
+	/** Array of memory regions terminated by a region with order zero */
+	struct sbi_domain_memregion *regions;
+	/** HART id of the HART booting this domain */
+	u32 boot_hartid;
+	/** Arg1 (or 'a1' register) of next booting stage for this domain */
+	unsigned long next_arg1;
+	/** Address of next booting stage for this domain */
+	unsigned long next_addr;
+	/** Privilege mode of next booting stage for this domain */
+	unsigned long next_mode;
+	/** Is domain allowed to reset the system */
+	bool system_reset_allowed;
+};
+
+/** HART id to domain table */
+extern struct sbi_domain *hartid_to_domain_table[];
+
+/** Get pointer to sbi_domain from HART id */
+#define sbi_hartid_to_domain(__hartid) \
+	hartid_to_domain_table[__hartid]
+
+/** Get pointer to sbi_domain for current HART */
+#define sbi_domain_thishart_ptr() \
+	sbi_hartid_to_domain(current_hartid())
+
+/** Index to domain table */
+extern struct sbi_domain *domidx_to_domain_table[];
+
+/** Get pointer to sbi_domain from index */
+#define sbi_index_to_domain(__index) \
+	domidx_to_domain_table[__index]
+
+/** Iterate over each domain */
+#define sbi_domain_for_each(__i, __d) \
+	for ((__i) = 0; ((__d) = sbi_index_to_domain(__i)); (__i)++)
+
+/** Iterate over each memory region of a domain */
+#define sbi_domain_for_each_memregion(__d, __r) \
+	for ((__r) = (__d)->regions; (__r)->order; (__r)++)
+
+/**
+ * Check whether given HART is assigned to specified domain
+ * @param dom pointer to domain
+ * @param hartid the HART ID
+ * @return TRUE if HART is assigned to domain otherwise FALSE
+ */
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
+
+/**
+ * Get ulong assigned HART mask for given domain and HART base ID
+ * @param dom pointer to domain
+ * @param hbase the HART base ID
+ * @return ulong possible HART mask
+ * Note: the return ulong mask will be set to zero on failure.
+ */
+ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				       ulong hbase);
+
+/** Initialize a domain memory region as firmware region */
+void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg);
+
+/**
+ * Check whether we can access specified address for given mode and
+ * memory region flags under a domain
+ * @param dom pointer to domain
+ * @param addr the address to be checked
+ * @param mode the privilege mode of access
+ * @param access_flags bitmask of domain access types (enum sbi_domain_access)
+ * @return TRUE if access allowed otherwise FALSE
+ */
+bool sbi_domain_check_addr(const struct sbi_domain *dom,
+			   unsigned long addr, unsigned long mode,
+			   unsigned long access_flags);
+
+/** Finalize domain tables and startup non-root domains */
+int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
+
+/** Initialize domains */
+int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid);
+
+#endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index f2c3237aa47..e1355d8884b 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -44,6 +44,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_version.h>
 
+struct sbi_domain;
 struct sbi_trap_info;
 
 /** Possible feature flags of a platform */
@@ -89,6 +90,9 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
+	/** Get domain pointer for given HART id */
+	struct sbi_domain *(*domain_get)(u32 hartid);
+
 	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
 	/** Read a character from the platform console input */
@@ -447,6 +451,22 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
+/**
+ * Get domain pointer for given HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid shorthand letter for CPU extensions
+ *
+ * @return non-NULL domain pointer on success and NULL on failure
+ */
+static inline struct sbi_domain *sbi_platform_domain_get(
+				const struct sbi_platform *plat, u32 hartid)
+{
+	if (plat && sbi_platform_ops(plat)->domain_get)
+		return sbi_platform_ops(plat)->domain_get(hartid);
+	return NULL;
+}
+
 /**
  * Write a character to the platform console output
  *
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index fa808a031be..6f2c06f5b50 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -15,6 +15,7 @@ libsbi-objs-y += riscv_locks.o
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
+libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_base.o
 libsbi-objs-y += sbi_ecall_hsm.o
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
new file mode 100644
index 00000000000..86dfefddc2c
--- /dev/null
+++ b/lib/sbi/sbi_domain.c
@@ -0,0 +1,380 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_math.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+
+struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 };
+struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX] = { 0 };
+
+static u32 domain_count = 0;
+
+static struct sbi_hartmask root_hmask = { 0 };
+
+#define ROOT_FW_REGION		0
+#define ROOT_ALL_REGION	1
+#define ROOT_END_REGION	2
+static struct sbi_domain_memregion root_memregs[ROOT_END_REGION + 1] = { 0 };
+
+static struct sbi_domain root = {
+	.name = "root",
+	.possible_harts = &root_hmask,
+	.regions = root_memregs,
+	.system_reset_allowed = TRUE,
+};
+
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
+{
+	if (dom)
+		return sbi_hartmask_test_hart(hartid, &dom->assigned_harts);
+
+	return FALSE;
+}
+
+ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				       ulong hbase)
+{
+	ulong ret, bword, boff;
+
+	if (!dom)
+		return 0;
+
+	bword = BIT_WORD(hbase);
+	boff = BIT_WORD_OFFSET(hbase);
+
+	ret = sbi_hartmask_bits(&dom->assigned_harts)[bword++] >> boff;
+	if (boff && bword < BIT_WORD(SBI_HARTMASK_MAX_BITS)) {
+		ret |= (sbi_hartmask_bits(&dom->assigned_harts)[bword] &
+			(BIT(boff) - 1UL)) << (BITS_PER_LONG - boff);
+	}
+
+	return ret;
+}
+
+void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg)
+{
+	if (!reg)
+		return;
+
+	sbi_memcpy(reg, &root_memregs[ROOT_FW_REGION], sizeof(*reg));
+}
+
+bool sbi_domain_check_addr(const struct sbi_domain *dom,
+			   unsigned long addr, unsigned long mode,
+			   unsigned long access_flags)
+{
+	bool mmio = FALSE;
+	struct sbi_domain_memregion *reg;
+	unsigned long rstart, rend, rflags, rwx = 0;
+
+	if (!dom)
+		return FALSE;
+
+	if (access_flags & SBI_DOMAIN_READ)
+		rwx |= SBI_DOMAIN_MEMREGION_READABLE;
+	if (access_flags & SBI_DOMAIN_WRITE)
+		rwx |= SBI_DOMAIN_MEMREGION_WRITEABLE;
+	if (access_flags & SBI_DOMAIN_EXECUTE)
+		rwx |= SBI_DOMAIN_MEMREGION_EXECUTABLE;
+	if (access_flags & SBI_DOMAIN_MMIO)
+		mmio = TRUE;
+
+	sbi_domain_for_each_memregion(dom, reg) {
+		rflags = reg->flags;
+		if (mode == PRV_M && !(rflags & SBI_DOMAIN_MEMREGION_MMODE))
+			continue;
+
+		rstart = reg->base;
+		rend = (reg->order < __riscv_xlen) ?
+			rstart + ((1UL << reg->order) - 1) : -1UL;
+		if (rstart <= addr && addr <= rend) {
+			if ((mmio && !(rflags & SBI_DOMAIN_MEMREGION_MMIO)) ||
+			    (!mmio && (rflags & SBI_DOMAIN_MEMREGION_MMIO)))
+				return FALSE;
+			return ((rflags & rwx) == rwx) ? TRUE : FALSE;
+		}
+	}
+
+	return (mode == PRV_M) ? TRUE : FALSE;
+}
+
+/* Check if region complies with constraints */
+static bool is_region_valid(const struct sbi_domain_memregion *reg)
+{
+	if (reg->order < 3 || __riscv_xlen < reg->order)
+		return FALSE;
+
+	if (reg->base & (BIT(reg->order) - 1))
+		return FALSE;
+
+	return TRUE;
+}
+
+/** Check if regionA is sub-region of regionB */
+static bool is_region_subset(const struct sbi_domain_memregion *regA,
+			     const struct sbi_domain_memregion *regB)
+{
+	ulong regA_start = regA->base;
+	ulong regA_end = regA->base + (BIT(regA->order) - 1);
+	ulong regB_start = regB->base;
+	ulong regB_end = regB->base + (BIT(regA->order) - 1);
+
+	if ((regB_start <= regA_start) &&
+	    (regA_start < regB_end) &&
+	    (regB_start < regA_end) &&
+	    (regA_end <= regB_end))
+		return TRUE;
+
+	return FALSE;
+}
+
+/** Check if regionA conflicts regionB */
+static bool is_region_conflict(const struct sbi_domain_memregion *regA,
+				const struct sbi_domain_memregion *regB)
+{
+	if ((is_region_subset(regA, regB) || is_region_subset(regB, regA)) &&
+	    regA->flags == regB->flags)
+		return TRUE;
+
+	return FALSE;
+}
+
+/** Check if regionA should be placed before regionB */
+static bool is_region_before(const struct sbi_domain_memregion *regA,
+			     const struct sbi_domain_memregion *regB)
+{
+	if (regA->order < regB->order)
+		return TRUE;
+
+	if ((regA->order == regB->order) &&
+	    (regA->base < regB->base))
+		return TRUE;
+
+	return FALSE;
+}
+
+static int sanitize_domain(const struct sbi_platform *plat,
+			   struct sbi_domain *dom)
+{
+	u32 i, j, count;
+	bool have_fw_reg;
+	struct sbi_domain_memregion treg, *reg, *reg1;
+
+	/* Check possible HARTs */
+	if (!dom->possible_harts)
+		return SBI_EINVAL;
+	sbi_hartmask_for_each_hart(i, dom->possible_harts) {
+		if (sbi_platform_hart_invalid(plat, i))
+			return SBI_EINVAL;
+	};
+
+	/* Check memory regions */
+	if (!dom->regions)
+		return SBI_EINVAL;
+	sbi_domain_for_each_memregion(dom, reg) {
+		if (!is_region_valid(reg))
+			return SBI_EINVAL;
+	}
+
+	/* Count memory regions and check presence of firmware region */
+	count = 0;
+	have_fw_reg = FALSE;
+	sbi_domain_for_each_memregion(dom, reg) {
+		if (reg->order == root_memregs[ROOT_FW_REGION].order &&
+		    reg->base == root_memregs[ROOT_FW_REGION].base &&
+		    reg->flags == root_memregs[ROOT_FW_REGION].flags)
+			have_fw_reg = TRUE;
+		count++;
+	}
+	if (!have_fw_reg)
+		return SBI_EINVAL;
+
+	/* Sort the memory regions */
+	for (i = 0; i < (count - 1); i++) {
+		reg = &dom->regions[i];
+		for (j = i + 1; j < count; j++) {
+			reg1 = &dom->regions[j];
+
+			if (is_region_conflict(reg1, reg))
+				return SBI_EINVAL;
+
+			if (!is_region_before(reg1, reg))
+				continue;
+
+			sbi_memcpy(&treg, reg1, sizeof(treg));
+			sbi_memcpy(reg1, reg, sizeof(treg));
+			sbi_memcpy(reg, &treg, sizeof(treg));
+		}
+	}
+
+	/*
+	 * We don't need to check boot HART id of domain because if boot
+	 * HART id is not possible/assigned to this domain then it won't
+	 * be started at boot-time by sbi_domain_finalize().
+	 */
+
+	/*
+	 * Check next mode
+	 *
+	 * We only allow next mode to be S-mode or U-mode.so that we can
+	 * protect M-mode context and enforce checks on memory accesses.
+	 */
+	if (dom->next_mode != PRV_S &&
+	    dom->next_mode != PRV_U)
+		return SBI_EINVAL;
+
+	/* Check next address and next mode*/
+	if (!sbi_domain_check_addr(dom, dom->next_addr, dom->next_mode,
+				   SBI_DOMAIN_EXECUTE))
+		return SBI_EINVAL;
+
+	return 0;
+}
+
+int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
+{
+	int rc;
+	u32 i, j, dhart;
+	bool dom_exists;
+	struct sbi_domain *dom, *tdom;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	/* Discover domains */
+	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+		/* Ignore invalid HART */
+		if (sbi_platform_hart_invalid(plat, i))
+			continue;
+
+		/* Get domain assigned to HART */
+		dom = sbi_platform_domain_get(plat, i);
+		if (!dom)
+			continue;
+
+		/* Check if domain already discovered */
+		dom_exists = FALSE;
+		sbi_domain_for_each(j, tdom) {
+			if (tdom == dom) {
+				dom_exists = TRUE;
+				break;
+			}
+		}
+
+		/* Newly discovered domain */
+		if (!dom_exists) {
+			/*
+			 * Ensure that we have room for Domain Index to
+			 * HART ID mapping
+			 */
+			if (domain_count <= SBI_DOMAIN_MAX_INDEX)
+				return SBI_ENOSPC;
+
+			/* Sanitize discovered domain */
+			rc = sanitize_domain(plat, dom);
+			if (rc)
+				return rc;
+
+			/* Assign index to domain */
+			dom->index = domain_count++;
+			domidx_to_domain_table[dom->index] = dom;
+
+			/* Clear assigned HARTs of domain */
+			sbi_hartmask_clear_all(&dom->assigned_harts);
+		}
+
+		/* Assign domain to HART if HART is a possible HART */
+		if (sbi_hartmask_test_hart(i, dom->possible_harts)) {
+			tdom = hartid_to_domain_table[i];
+			if (tdom)
+				sbi_hartmask_clear_hart(i,
+						&tdom->assigned_harts);
+			hartid_to_domain_table[i] = dom;
+			sbi_hartmask_set_hart(i, &dom->assigned_harts);
+		}
+	}
+
+	/* Startup boot HART of domains */
+	sbi_domain_for_each(i, dom) {
+		/* Domain boot HART */
+		dhart = dom->boot_hartid;
+
+		/* Ignore if boot HART not possible for this domain */
+		if (!sbi_hartmask_test_hart(i, dom->possible_harts))
+			continue;
+
+		/* Ignore if boot HART assigned different domain */
+		if (sbi_hartid_to_domain(dhart) != dom ||
+		    !sbi_hartmask_test_hart(i, &dom->assigned_harts))
+			continue;
+
+		/* Startup boot HART of domain */
+		if (dhart == cold_hartid) {
+			scratch->next_addr = dom->next_addr;
+			scratch->next_mode = dom->next_mode;
+			scratch->next_arg1 = dom->next_arg1;
+		} else {
+			rc = sbi_hsm_hart_start(scratch, dhart, dom->next_addr,
+					dom->next_mode, dom->next_arg1);
+			if (rc)
+				return rc;
+		}
+	}
+
+	return 0;
+}
+
+int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
+{
+	u32 i;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	/* Root domain firmware memory region */
+	root_memregs[ROOT_FW_REGION].order = log2roundup(scratch->fw_size);
+	root_memregs[ROOT_FW_REGION].base = scratch->fw_start &
+				~((1UL << root_memregs[0].order) - 1UL);
+	root_memregs[ROOT_FW_REGION].flags = 0;
+
+	/* Root domain allow everything memory region */
+	root_memregs[ROOT_ALL_REGION].order = __riscv_xlen;
+	root_memregs[ROOT_ALL_REGION].base = 0;
+	root_memregs[ROOT_ALL_REGION].flags = (SBI_DOMAIN_MEMREGION_READABLE |
+						SBI_DOMAIN_MEMREGION_WRITEABLE |
+						SBI_DOMAIN_MEMREGION_EXECUTABLE);
+
+	/* Root domain memory region end */
+	root_memregs[ROOT_END_REGION].order = 0;
+
+	/* Root domain boot HART id is same as coldboot HART id */
+	root.boot_hartid = cold_hartid;
+
+	/* Root domain next booting stage details */
+	root.next_arg1 = scratch->next_arg1;
+	root.next_addr = scratch->next_addr;
+	root.next_mode = scratch->next_mode;
+
+	/* Select root domain for all valid HARTs */
+	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
+		if (sbi_platform_hart_invalid(plat, i))
+			continue;
+		sbi_hartmask_set_hart(i, &root_hmask);
+		hartid_to_domain_table[i] = &root;
+		sbi_hartmask_set_hart(i, &root.assigned_harts);
+	}
+
+	/* Set root domain index */
+	root.index = domain_count++;
+	domidx_to_domain_table[root.index] = &root;
+
+	return 0;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 5cedb150706..406cb3fa6c8 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hartmask.h>
@@ -169,6 +170,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	/* Note: This has to be second thing in coldboot init sequence */
+	rc = sbi_domain_init(scratch, hartid);
+	if (rc)
+		sbi_hart_hang();
+
 	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
 						     "INIT_COUNT");
 	if (!init_count_offset)
@@ -210,10 +216,24 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	/*
+	 * Note: Finalize domains after HSM initialization so that we
+	 * can startup non-root domains.
+	 * Note: Finalize domains before HART PMP configuration so
+	 * that we use correct domain for configuring PMP.
+	 */
+	rc = sbi_domain_finalize(scratch, hartid);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_hart_pmp_configure(scratch);
 	if (rc)
 		sbi_hart_hang();
 
+	/*
+	 * Note: Platform final initialization should be last so that
+	 * it sees correct domain assignment and PMP configuration.
+	 */
 	rc = sbi_platform_final_init(plat, TRUE);
 	if (rc)
 		sbi_hart_hang();

From e73b92d8623e9599245c6921025cfe0b40141f07 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 24 Sep 2020 17:49:27 +0530
Subject: [PATCH 0671/1765] lib: sbi: Extend sbi_hsm_hart_started_mask() for
 domains

The sbi_hsm_hart_started_mask() API should take one more parameter
to allow caller specify domain under which started_mask is being
generated. Further, the sbi_hsm_hart_started_mask() depends on
sbi_hsm_hart_get_state() which also should return HART state under
specified domain.

This patch updates both sbi_hsm_hart_started_mask() and
sbi_hsm_hart_get_state() as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_hsm.h      |  7 ++++---
 lib/sbi/sbi_ecall_hsm.c    |  4 +++-
 lib/sbi/sbi_ecall_legacy.c |  4 +++-
 lib/sbi/sbi_hsm.c          | 17 ++++++++++-------
 lib/sbi/sbi_ipi.c          |  6 ++++--
 lib/sbi/sbi_system.c       |  4 +++-
 6 files changed, 27 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 18d129be0fc..296b267fa4b 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -19,6 +19,7 @@
 #define SBI_HART_STARTED	3
 #define SBI_HART_UNKNOWN	4
 
+struct sbi_domain;
 struct sbi_scratch;
 
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
@@ -27,10 +28,10 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 		       ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
-int sbi_hsm_hart_get_state(u32 hartid);
+int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
-bool sbi_hsm_hart_started(u32 hartid);
-int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask);
+int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
+			      ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 992c93aa01c..3698a41f65e 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -7,6 +7,7 @@
  *   Atish Patra <atish.patra@wdc.com>
  */
 
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
@@ -34,7 +35,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
 		break;
 	case SBI_EXT_HSM_HART_GET_STATUS:
-		hstate = sbi_hsm_hart_get_state(args[0]);
+		hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
+						args[0]);
 		ret = sbi_hsm_hart_state_to_status(hstate);
 		break;
 	default:
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 3bfe7496341..909cbe35686 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -10,6 +10,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
@@ -33,7 +34,8 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	} else {
-		sbi_hsm_hart_started_mask(0, &mask);
+		sbi_hsm_hart_started_mask(sbi_domain_thishart_ptr(),
+					  0, &mask);
 	}
 	*hmask = mask;
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 8c1b7b0eaa9..65e7f3d8b3a 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -13,6 +13,7 @@
 #include <sbi/riscv_atomic.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
@@ -56,13 +57,13 @@ int sbi_hsm_hart_state_to_status(int state)
 	return ret;
 }
 
-int sbi_hsm_hart_get_state(u32 hartid)
+int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
 	struct sbi_scratch *scratch;
 
 	scratch = sbi_hartid_to_scratch(hartid);
-	if (!scratch)
+	if (!scratch || !sbi_domain_is_assigned_hart(dom, hartid))
 		return SBI_HART_UNKNOWN;
 
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
@@ -70,9 +71,9 @@ int sbi_hsm_hart_get_state(u32 hartid)
 	return atomic_read(&hdata->state);
 }
 
-bool sbi_hsm_hart_started(u32 hartid)
+static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
 {
-	if (sbi_hsm_hart_get_state(hartid) == SBI_HART_STARTED)
+	if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HART_STARTED)
 		return TRUE;
 	else
 		return FALSE;
@@ -80,12 +81,14 @@ bool sbi_hsm_hart_started(u32 hartid)
 
 /**
  * Get ulong HART mask for given HART base ID
+ * @param dom the domain to be used for output HART mask
  * @param hbase the HART base ID
  * @param out_hmask the output ulong HART mask
  * @return 0 on success and SBI_Exxx (< 0) on failure
  * Note: the output HART mask will be set to zero on failure as well.
  */
-int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask)
+int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
+			      ulong hbase, ulong *out_hmask)
 {
 	ulong i;
 	ulong hcount = sbi_scratch_last_hartid() + 1;
@@ -97,7 +100,7 @@ int sbi_hsm_hart_started_mask(ulong hbase, ulong *out_hmask)
 		hcount = BITS_PER_LONG;
 
 	for (i = hbase; i < hcount; i++) {
-		if (sbi_hsm_hart_get_state(i) == SBI_HART_STARTED)
+		if (sbi_hsm_hart_get_state(dom, i) == SBI_HART_STARTED)
 			*out_hmask |= 1UL << (i - hbase);
 	}
 
@@ -259,7 +262,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	if (!sbi_hsm_hart_started(hartid))
+	if (!sbi_hsm_hart_started(sbi_domain_thishart_ptr(), hartid))
 		return SBI_EINVAL;
 
 	oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index a27dea0714e..43478328b84 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
 #include <sbi/sbi_bitops.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hsm.h>
@@ -77,10 +78,11 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
 	ulong i, m;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (hbase != -1UL) {
-		rc = sbi_hsm_hart_started_mask(hbase, &m);
+		rc = sbi_hsm_hart_started_mask(dom, hbase, &m);
 		if (rc)
 			return rc;
 		m &= hmask;
@@ -92,7 +94,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 		}
 	} else {
 		hbase = 0;
-		while (!sbi_hsm_hart_started_mask(hbase, &m)) {
+		while (!sbi_hsm_hart_started_mask(dom, hbase, &m)) {
 			/* Send IPIs */
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 6f7be1451ce..a938003ff04 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -10,6 +10,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_bitops.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_platform.h>
@@ -21,10 +22,11 @@ void __noreturn sbi_system_reset(u32 platform_reset_type)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_started_mask(hbase, &hmask)) {
+	while (!sbi_hsm_hart_started_mask(dom, hbase, &hmask)) {
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)

From 3a30d2c34d9c287f49419b44c768ffb70764325c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 19 Sep 2020 14:26:52 +0530
Subject: [PATCH 0672/1765] lib: sbi: Extend sbi_hsm_hart_start() for domains

The sbi_hsm_hart_start() should consider the domain under which we
are trying to start the HART. This will help ensure that HART A can
start HART B only if both HARTs A and B belong to the same domain.

We also have a special case when we bring-up boot HART of non-root
domains in sbi_domain_finalize() where we should skip domain checks
in sbi_hsm_hart_start(). To achieve this, sbi_hsm_hart_start() should
do domain checks only when domain parameter is non-NULL.

This patch extends sbi_hsm_hart_start() as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h   |  5 +++--
 lib/sbi/sbi_domain.c    |  6 ++++--
 lib/sbi/sbi_ecall_hsm.c |  4 ++--
 lib/sbi/sbi_hsm.c       | 19 ++++++++++---------
 4 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 296b267fa4b..48233830960 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -25,8 +25,9 @@ struct sbi_scratch;
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
-int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
-		       ulong saddr, ulong smode, ulong priv);
+int sbi_hsm_hart_start(struct sbi_scratch *scratch,
+		       const struct sbi_domain *dom,
+		       u32 hartid, ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_state_to_status(int state);
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 86dfefddc2c..9bde5fbadec 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -324,8 +324,10 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 			scratch->next_mode = dom->next_mode;
 			scratch->next_arg1 = dom->next_arg1;
 		} else {
-			rc = sbi_hsm_hart_start(scratch, dhart, dom->next_addr,
-					dom->next_mode, dom->next_arg1);
+			rc = sbi_hsm_hart_start(scratch, NULL, dhart,
+						dom->next_addr,
+						dom->next_mode,
+						dom->next_arg1);
 			if (rc)
 				return rc;
 		}
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 3698a41f65e..376740c179e 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -28,8 +28,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_HSM_HART_START:
 		smode = csr_read(CSR_MSTATUS);
 		smode = (smode & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
-		ret = sbi_hsm_hart_start(scratch, args[0], args[1],
-					 smode, args[2]);
+		ret = sbi_hsm_hart_start(scratch, sbi_domain_thishart_ptr(),
+					 args[0], args[1], smode, args[2]);
 		break;
 	case SBI_EXT_HSM_HART_STOP:
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 65e7f3d8b3a..8121efbb428 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -205,17 +205,23 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 	sbi_hart_hang();
 }
 
-int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
-		       ulong saddr, ulong smode, ulong priv)
+int sbi_hsm_hart_start(struct sbi_scratch *scratch,
+		       const struct sbi_domain *dom,
+		       u32 hartid, ulong saddr, ulong smode, ulong priv)
 {
-	int rc;
 	unsigned long init_count;
 	unsigned int hstate;
 	struct sbi_scratch *rscratch;
 	struct sbi_hsm_data *hdata;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (smode != PRV_M && smode != PRV_S && smode != PRV_U)
+	/* For now, we only allow start mode to be S-mode or U-mode. */
+	if (smode != PRV_S && smode != PRV_U)
+		return SBI_EINVAL;
+	if (dom && !sbi_domain_is_assigned_hart(dom, hartid))
+		return SBI_EINVAL;
+	if (dom && !sbi_domain_check_addr(dom, saddr, smode,
+					  SBI_DOMAIN_EXECUTE))
 		return SBI_EINVAL;
 
 	rscratch = sbi_hartid_to_scratch(hartid);
@@ -234,11 +240,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch, u32 hartid,
 	if (hstate != SBI_HART_STOPPED)
 		return SBI_EINVAL;
 
-	rc = sbi_hart_pmp_check_addr(scratch, saddr, smode, PMP_X);
-	if (rc)
-		return rc;
-	//TODO: We also need to check saddr for valid physical address as well.
-
 	init_count = sbi_init_count(hartid);
 	rscratch->next_arg1 = priv;
 	rscratch->next_addr = saddr;

From 530e95bd63f60337140ffa55de335e9acc3811b4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 25 Sep 2020 10:08:24 +0530
Subject: [PATCH 0673/1765] lib: sbi: Optimize sbi_hsm_hart_started_mask()
 implementation

Instead of calling sbi_hsm_hart_get_state() in a loop, we can simply
call a new inline __sbi_hsm_hart_get_state() which only takes "hartid"
and enforce domain checks using sbi_domain_assigned_hartmask().

This patch optimizes sbi_hsm_hart_started_mask() as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 8121efbb428..e1b2b2c3d12 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -57,20 +57,27 @@ int sbi_hsm_hart_state_to_status(int state)
 	return ret;
 }
 
-int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
+static inline int __sbi_hsm_hart_get_state(u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
 	struct sbi_scratch *scratch;
 
 	scratch = sbi_hartid_to_scratch(hartid);
-	if (!scratch || !sbi_domain_is_assigned_hart(dom, hartid))
+	if (!scratch)
 		return SBI_HART_UNKNOWN;
 
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
-
 	return atomic_read(&hdata->state);
 }
 
+int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
+{
+	if (!sbi_domain_is_assigned_hart(dom, hartid))
+		return SBI_HART_UNKNOWN;
+
+	return __sbi_hsm_hart_get_state(hartid);
+}
+
 static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
 {
 	if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HART_STARTED)
@@ -90,18 +97,21 @@ static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
 int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
 			      ulong hbase, ulong *out_hmask)
 {
-	ulong i;
-	ulong hcount = sbi_scratch_last_hartid() + 1;
+	ulong i, hmask, dmask;
+	ulong hend = sbi_scratch_last_hartid() + 1;
 
 	*out_hmask = 0;
-	if (hcount <= hbase)
+	if (hend <= hbase)
 		return SBI_EINVAL;
-	if (BITS_PER_LONG < (hcount - hbase))
-		hcount = BITS_PER_LONG;
-
-	for (i = hbase; i < hcount; i++) {
-		if (sbi_hsm_hart_get_state(dom, i) == SBI_HART_STARTED)
-			*out_hmask |= 1UL << (i - hbase);
+	if (BITS_PER_LONG < (hend - hbase))
+		hend = hbase + BITS_PER_LONG;
+
+	dmask = sbi_domain_get_assigned_hartmask(dom, hbase);
+	for (i = hbase; i < hend; i++) {
+		hmask = 1UL << (i - hbase);
+		if ((dmask & hmask) &&
+		    (__sbi_hsm_hart_get_state(i) == SBI_HART_STARTED))
+			*out_hmask |= hmask;
 	}
 
 	return 0;

From 3e200370eeda75917a0711d8995391bbbaf58b97 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 19 Sep 2020 17:23:46 +0530
Subject: [PATCH 0674/1765] lib: sbi: Extend sbi_system_reset() for domains

The sbi_system_reset() should issue platform system reset only if
domain of current HART is allowed to do system reset.

This patch extends sbi_system_reset() as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_system.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index a938003ff04..96290b30b83 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -37,9 +37,10 @@ void __noreturn sbi_system_reset(u32 platform_reset_type)
 	/* Stop current HART */
 	sbi_hsm_hart_stop(scratch, FALSE);
 
-	/* Platform specific reset */
-	sbi_platform_system_reset(sbi_platform_ptr(scratch),
-				  platform_reset_type);
+	/* Platform specific reset if domain allowed system reset */
+	if (dom->system_reset_allowed)
+		sbi_platform_system_reset(sbi_platform_ptr(scratch),
+					  platform_reset_type);
 
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);

From 5edbb7cda1849b3d05e33256cafb7708c36f3020 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 21 Sep 2020 15:58:14 +0530
Subject: [PATCH 0675/1765] lib: utils: Update fdt_reserved_memory_fixup() to
 use current domain

Now that each HART is mapped to a domain having a set of memory
regions, we update fdt_reserved_memory_fixup() to use domain memory
regions for adding reserved memory nodes in device tree.

We also change reserved memory node name prefix from "mmode_pmp"
to "mmode_resv" because domain memory regions can impact other
hardware configurations (such as IOPMP, etc) along with PMP.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 47 ++++++++++++++++++---------------------
 1 file changed, 22 insertions(+), 25 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 8f554e17249..e9e1dffb360 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -9,6 +9,7 @@
 
 #include <libfdt.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
@@ -97,11 +98,11 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 
 	if (na > 1 && addr_high)
 		sbi_snprintf(name, sizeof(name),
-			     "mmode_pmp%d@%x,%x", index,
+			     "mmode_resv%d@%x,%x", index,
 			     addr_high, addr_low);
 	else
 		sbi_snprintf(name, sizeof(name),
-			     "mmode_pmp%d@%x", index,
+			     "mmode_resv%d@%x", index,
 			     addr_low);
 
 	subnode = fdt_add_subnode(fdt, parent, name);
@@ -153,10 +154,11 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
  */
 int fdt_reserved_memory_fixup(void *fdt)
 {
+	struct sbi_domain_memregion *reg;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	unsigned long prot, addr, size;
-	int parent, i, j;
-	int err;
+	unsigned long addr, size;
+	int err, parent, i;
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
 
@@ -203,34 +205,29 @@ int fdt_reserved_memory_fixup(void *fdt)
 	 * We assume the given device tree does not contain any memory region
 	 * child node protected by PMP. Normally PMP programming happens at
 	 * M-mode firmware. The memory space used by OpenSBI is protected.
-	 * Some additional memory spaces may be protected by platform codes.
+	 * Some additional memory spaces may be protected by domain memory
+	 * regions.
 	 *
 	 * With above assumption, we create child nodes directly.
 	 */
 
-	if (!sbi_hart_pmp_count(scratch)) {
-		/*
-		 * Update the DT with firmware start & size even if PMP is not
-		 * supported. This makes sure that supervisor OS is always
-		 * aware of OpenSBI resident memory area.
-		 */
-		addr = scratch->fw_start & ~(scratch->fw_size - 1UL);
-		size = (1UL << log2roundup(scratch->fw_size));
-		return fdt_resv_memory_update_node(fdt, addr, size,
-						   0, parent, true);
-	}
-
-	for (i = 0, j = 0; i < sbi_hart_pmp_count(scratch); i++) {
-		err = sbi_hart_pmp_get(scratch, i, &prot, &addr, &size);
-		if (err)
+	i = 0;
+	sbi_domain_for_each_memregion(dom, reg) {
+		/* Ignore MMIO or READABLE or WRITABLE or EXECUTABLE regions */
+		if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO)
+			continue;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
 			continue;
-		if (!(prot & PMP_A))
+		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
 			continue;
-		if (prot & (PMP_R | PMP_W | PMP_X))
+		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
 			continue;
 
-		fdt_resv_memory_update_node(fdt, addr, size, j, parent, false);
-		j++;
+		addr = reg->base;
+		size = 1UL << reg->order;
+		fdt_resv_memory_update_node(fdt, addr, size, i, parent,
+			(sbi_hart_pmp_count(scratch)) ? false : true);
+		i++;
 	}
 
 	return 0;

From 5fd99dbdaa39238ebed45df3ea7dc6b47424a583 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Sep 2020 14:40:08 +0530
Subject: [PATCH 0676/1765] lib: utils: Update fdt_cpu_fixup() to use current
 domain

The fdt_cpu_fixup() should disable a HART in DT if the HART
is not assigned to the current HART domain. This patch updates
fdt_cpu_fixup() accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index e9e1dffb360..eea450d8049 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -12,7 +12,6 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_hart.h>
-#include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
@@ -20,8 +19,7 @@
 
 void fdt_cpu_fixup(void *fdt)
 {
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	int err, cpu_offset, cpus_offset, len;
 	const char *mmu_type;
 	u32 hartid;
@@ -41,12 +39,12 @@ void fdt_cpu_fixup(void *fdt)
 
 		/*
 		 * Disable a HART DT node if one of the following is true:
-		 * 1. The HART is marked invalid by platform support
+		 * 1. The HART is not assigned to the current domain
 		 * 2. MMU is not available for the HART
 		 */
 
 		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
-		if (sbi_platform_hart_invalid(plat, hartid) ||
+		if (!sbi_domain_is_assigned_hart(dom, hartid) ||
 		    !mmu_type || !len)
 			fdt_setprop_string(fdt, cpu_offset, "status",
 					   "disabled");

From e856462ac2f191216897a492b8ca02b5b1037e9c Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Sep 2020 11:12:51 +0530
Subject: [PATCH 0677/1765] lib: sbi: Remove redundant sbi_hart_pmp_xyz()
 functions

The sbi_hart_pmp_get() and sbi_hart_pmp_check_addr() functions
are not used anymore hence this patch removes these functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  6 ------
 lib/sbi/sbi_hart.c     | 42 ------------------------------------------
 2 files changed, 48 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 2efe44d384e..79d745a2b98 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -38,13 +38,7 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
-int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
-		     unsigned long *prot_out, unsigned long *addr_out,
-		     unsigned long *size);
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
-int  sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
-			     unsigned long daddr, unsigned long mode,
-			     unsigned long attr);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 88ffab0063f..ea5d4790da3 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -153,24 +153,6 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 	return hfeatures->pmp_count;
 }
 
-int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
-		     unsigned long *prot_out, unsigned long *addr_out,
-		     unsigned long *size)
-{
-	int err;
-	unsigned long log2size;
-
-	if (sbi_hart_pmp_count(scratch) <= n)
-		return SBI_EINVAL;
-
-	err = pmp_get(n, prot_out, addr_out, &log2size);
-	if (err)
-		return err;
-	*size = (log2size < __riscv_xlen) ? 1UL << log2size : 0;
-
-	return 0;
-}
-
 void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 {
 	unsigned long prot, addr, size, log2size;
@@ -200,30 +182,6 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 	}
 }
 
-int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch,
-			    unsigned long addr, unsigned long mode,
-			    unsigned long attr)
-{
-	unsigned long prot, size, log2size, tempaddr;
-	unsigned int i, pmp_count;
-
-	pmp_count = sbi_hart_pmp_count(scratch);
-	for (i = 0; i < pmp_count; i++) {
-		pmp_get(i, &prot, &tempaddr, &log2size);
-		if (!(prot & PMP_A))
-			continue;
-		if (mode == PRV_M && !(prot & PMP_L))
-			continue;
-		size = 1UL << log2size;
-		if ((log2size >= __riscv_xlen) ||
-		    ((tempaddr <= addr && addr <= tempaddr + size)))
-			if (!(prot & attr))
-				return SBI_EINVALID_ADDR;
-	}
-
-	return SBI_OK;
-}
-
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	u32 pmp_idx = 0;

From c10c30b485e286b7ebe3f63897616107fb05ddce Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 22 Sep 2020 15:36:15 +0530
Subject: [PATCH 0678/1765] lib: sbi: Configure PMP based on domain memory
 regions

The PMP configuration on each HART should be only based on the memory
regions of the assigned domain because each domain includes a memory
region to protect the underlying firmware.

This patch updates the sbi_hart_pmp_configure() function accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index ea5d4790da3..1871a1edab7 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -13,6 +13,7 @@
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_csr_detect.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
@@ -184,24 +185,30 @@ void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
 
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
-	u32 pmp_idx = 0;
-	unsigned long fw_start, fw_size_log2;
+	struct sbi_domain_memregion *reg;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	unsigned int pmp_idx = 0, pmp_flags;
+	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
 
-	if (!sbi_hart_pmp_count(scratch))
+	if (!pmp_count)
 		return 0;
 
-	/* Firmware PMP region to protect OpenSBI firmware */
-	fw_size_log2 = log2roundup(scratch->fw_size);
-	fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
-	pmp_set(pmp_idx++, 0, fw_start, fw_size_log2);
-
-	/*
-	 * Default PMP region for allowing S-mode and U-mode access to
-	 * memory not covered by:
-	 * 1) Firmware PMP region
-	 * 2) Platform specific PMP regions
-	 */
-	pmp_set(pmp_idx++, PMP_R | PMP_W | PMP_X, 0, __riscv_xlen);
+	sbi_domain_for_each_memregion(dom, reg) {
+		if (pmp_count <= pmp_idx)
+			break;
+
+		pmp_flags = 0;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
+			pmp_flags |= PMP_R;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
+			pmp_flags |= PMP_W;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
+			pmp_flags |= PMP_X;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE)
+			pmp_flags |= PMP_L;
+
+		pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
+	}
 
 	return 0;
 }

From c347408a39eb66c9705ccc0cbd4537149fda938f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 23 Sep 2020 21:49:01 +0530
Subject: [PATCH 0679/1765] lib: sbi: Display domain details in boot prints

We extend boot prints to display details of each domain. In the
process, we remove sbi_hart_pmp_dump() because it shows redundant
information which domain details already show.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_domain.h |  6 +++
 include/sbi/sbi_hart.h   |  4 +-
 lib/sbi/sbi_domain.c     | 94 ++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_hart.c       | 44 +++++--------------
 lib/sbi/sbi_init.c       | 27 +++++++-----
 5 files changed, 127 insertions(+), 48 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 4bb08dc61ec..6f90b26cd85 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -138,6 +138,12 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
 			   unsigned long access_flags);
 
+/** Dump domain details on the console */
+void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix);
+
+/** Dump all domain details on the console */
+void sbi_domain_dump_all(const char *suffix);
+
 /** Finalize domain tables and startup non-root domains */
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
 
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 79d745a2b98..3ac150036c7 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -36,9 +36,9 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 }
 
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
-void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
+void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
+			      const char *prefix, const char *suffix);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
-void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 9bde5fbadec..d4b82fed35f 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -8,6 +8,7 @@
  */
 
 #include <sbi/riscv_asm.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_hsm.h>
@@ -243,6 +244,99 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	return 0;
 }
 
+void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
+{
+	u32 i, k;
+	unsigned long rstart, rend;
+	struct sbi_domain_memregion *reg;
+
+	sbi_printf("Domain%d Name        %s: %s\n",
+		   dom->index, suffix, dom->name);
+
+	sbi_printf("Domain%d Boot HART   %s: %d\n",
+		   dom->index, suffix, dom->boot_hartid);
+
+	k = 0;
+	sbi_printf("Domain%d HARTs       %s: ", dom->index, suffix);
+	sbi_hartmask_for_each_hart(i, dom->possible_harts)
+		sbi_printf("%s%d%s", (k++) ? "," : "",
+			   i, sbi_domain_is_assigned_hart(dom, i) ? "*" : "");
+	sbi_printf("\n");
+
+	i = 0;
+	sbi_domain_for_each_memregion(dom, reg) {
+		rstart = reg->base;
+		rend = (reg->order < __riscv_xlen) ?
+			rstart + ((1UL << reg->order) - 1) : -1UL;
+
+#if __riscv_xlen == 32
+		sbi_printf("Domain%d Region%02d    %s: 0x%08lx-0x%08lx ",
+#else
+		sbi_printf("Domain%d Region%02d    %s: 0x%016lx-0x%016lx ",
+#endif
+			   dom->index, i, suffix, rstart, rend);
+
+		k = 0;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE)
+			sbi_printf("%cM", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO)
+			sbi_printf("%cI", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
+			sbi_printf("%cR", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
+			sbi_printf("%cW", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
+			sbi_printf("%cX", (k++) ? ',' : '(');
+		sbi_printf("%s\n", (k++) ? ")" : "()");
+
+		i++;
+	}
+
+#if __riscv_xlen == 32
+	sbi_printf("Domain%d Next Address%s: 0x%08lx\n",
+#else
+	sbi_printf("Domain%d Next Address%s: 0x%016lx\n",
+#endif
+		   dom->index, suffix, dom->next_addr);
+
+#if __riscv_xlen == 32
+	sbi_printf("Domain%d Next Arg1   %s: 0x%08lx\n",
+#else
+	sbi_printf("Domain%d Next Arg1   %s: 0x%016lx\n",
+#endif
+		   dom->index, suffix, dom->next_arg1);
+
+	sbi_printf("Domain%d Next Mode   %s: ", dom->index, suffix);
+	switch (dom->next_mode) {
+	case PRV_M:
+		sbi_printf("M-mode\n");
+		break;
+	case PRV_S:
+		sbi_printf("S-mode\n");
+		break;
+	case PRV_U:
+		sbi_printf("U-mode\n");
+		break;
+	default:
+		sbi_printf("Unknown\n");
+		break;
+	};
+
+	sbi_printf("Domain%d SysReset    %s: %s\n",
+		   dom->index, suffix, (dom->system_reset_allowed) ? "yes" : "no");
+}
+
+void sbi_domain_dump_all(const char *suffix)
+{
+	u32 i;
+	const struct sbi_domain *dom;
+
+	sbi_domain_for_each(i, dom) {
+		sbi_domain_dump(dom, suffix);
+		sbi_printf("\n");
+	}
+}
+
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 1871a1edab7..ff18c9d6910 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -123,18 +123,23 @@ static int delegate_traps(struct sbi_scratch *scratch)
 	return 0;
 }
 
-void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
+void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
+			      const char *prefix, const char *suffix)
 {
 	if (!misa_extension('S'))
 		/* No delegation possible as mideleg does not exist*/
 		return;
 
 #if __riscv_xlen == 32
-	sbi_printf("MIDELEG : 0x%08lx\n", csr_read(CSR_MIDELEG));
-	sbi_printf("MEDELEG : 0x%08lx\n", csr_read(CSR_MEDELEG));
+	sbi_printf("%sMIDELEG%s: 0x%08lx\n",
+		   prefix, suffix, csr_read(CSR_MIDELEG));
+	sbi_printf("%sMEDELEG%s: 0x%08lx\n",
+		   prefix, suffix, csr_read(CSR_MEDELEG));
 #else
-	sbi_printf("MIDELEG : 0x%016lx\n", csr_read(CSR_MIDELEG));
-	sbi_printf("MEDELEG : 0x%016lx\n", csr_read(CSR_MEDELEG));
+	sbi_printf("%sMIDELEG%s: 0x%016lx\n",
+		   prefix, suffix, csr_read(CSR_MIDELEG));
+	sbi_printf("%sMEDELEG%s: 0x%016lx\n",
+		   prefix, suffix, csr_read(CSR_MEDELEG));
 #endif
 }
 
@@ -154,35 +159,6 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 	return hfeatures->pmp_count;
 }
 
-void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
-{
-	unsigned long prot, addr, size, log2size;
-	unsigned int i, pmp_count;
-
-	pmp_count = sbi_hart_pmp_count(scratch);
-	for (i = 0; i < pmp_count; i++) {
-		pmp_get(i, &prot, &addr, &log2size);
-		if (!(prot & PMP_A))
-			continue;
-		size = (log2size < __riscv_xlen) ? 1UL << log2size : 0;
-#if __riscv_xlen == 32
-		sbi_printf("PMP%d    : 0x%08lx-0x%08lx (A",
-#else
-		sbi_printf("PMP%d    : 0x%016lx-0x%016lx (A",
-#endif
-			   i, addr, addr + size - 1);
-		if (prot & PMP_L)
-			sbi_printf(",L");
-		if (prot & PMP_R)
-			sbi_printf(",R");
-		if (prot & PMP_W)
-			sbi_printf(",W");
-		if (prot & PMP_X)
-			sbi_printf(",X");
-		sbi_printf(")\n");
-	}
-}
-
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	struct sbi_domain_memregion *reg;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 406cb3fa6c8..5151d36a2b3 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -39,6 +39,7 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 {
 	int xlen;
 	char str[128];
+	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 #ifdef OPENSBI_VERSION_GIT
@@ -64,27 +65,29 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Platform HART Count : %u\n",
 		   sbi_platform_hart_count(plat));
 
-	/* Boot HART details */
-	sbi_printf("Boot HART ID        : %u\n", hartid);
-	misa_string(xlen, str, sizeof(str));
-	sbi_printf("Boot HART ISA       : %s\n", str);
-	sbi_hart_get_features_str(scratch, str, sizeof(str));
-	sbi_printf("BOOT HART Features  : %s\n", str);
-	sbi_printf("BOOT HART PMP Count : %d\n", sbi_hart_pmp_count(scratch));
-	sbi_printf("BOOT HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch));
-
 	/* Firmware details */
 	sbi_printf("Firmware Base       : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size       : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
 
-	/* Generic details */
+	/* SBI details */
 	sbi_printf("Runtime SBI Version : %d.%d\n",
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
 
-	sbi_hart_delegation_dump(scratch);
-	sbi_hart_pmp_dump(scratch);
+	/* Domain details */
+	sbi_domain_dump_all("");
+
+	/* Boot HART details */
+	sbi_printf("Boot HART ID        : %u\n", hartid);
+	sbi_printf("Boot HART Domain    : %s\n", dom->name);
+	misa_string(xlen, str, sizeof(str));
+	sbi_printf("Boot HART ISA       : %s\n", str);
+	sbi_hart_get_features_str(scratch, str, sizeof(str));
+	sbi_printf("Boot HART Features  : %s\n", str);
+	sbi_printf("Boot HART PMP Count : %d\n", sbi_hart_pmp_count(scratch));
+	sbi_printf("Boot HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch));
+	sbi_hart_delegation_dump(scratch, "Boot HART ", "   ");
 }
 
 static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;

From fdf5d5c322533223146d3fac8a6ecfb47f68fb6f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 24 Sep 2020 15:15:31 +0530
Subject: [PATCH 0680/1765] docs: Add initial documentation for domain support

We add initial documentation for OpenSBI domain support to help
RISC-V platform vendors achieve system-level partitioning.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 README.md              |   3 ++
 docs/domain_support.md | 106 +++++++++++++++++++++++++++++++++++++++++
 docs/doxygen.cfg       |   1 +
 3 files changed, 110 insertions(+)
 create mode 100644 docs/domain_support.md

diff --git a/README.md b/README.md
index bd41ba3a1b6..03c02fb1c37 100644
--- a/README.md
+++ b/README.md
@@ -225,6 +225,8 @@ Detailed documentation of various aspects of OpenSBI can be found under the
 * [Platform Documentation]: Documentation of the platforms currently supported.
 * [Firmware Documentation]: Documentation for the different types of firmware
   examples build supported by OpenSBI.
+* [Domain Support]: Documentation for the OpenSBI domain support which helps
+  users achieve system-level partitioning using OpenSBI.
 
 OpenSBI source code is also well documented. For source level documentation,
 doxygen style is used. Please refer to the [Doxygen manual] for details on this
@@ -278,6 +280,7 @@ make I=<install_directory> install_docs
 [Platform Support Guide]: docs/platform_guide.md
 [Platform Documentation]: docs/platform/platform.md
 [Firmware Documentation]: docs/firmware/fw.md
+[Domain Support]: docs/domain_support.md
 [Doxygen manual]: http://www.doxygen.nl/manual/index.html
 [Kendryte standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
 [third party notices]: ThirdPartyNotices.md
diff --git a/docs/domain_support.md b/docs/domain_support.md
new file mode 100644
index 00000000000..04989df273d
--- /dev/null
+++ b/docs/domain_support.md
@@ -0,0 +1,106 @@
+OpenSBI Domain Support
+======================
+
+An OpenSBI domain is a system-level partition (subset) of underlying hardware
+having it's own memory regions (RAM and MMIO devices) and HARTs. The OpenSBI
+will try to achieve secure isolation between domains using RISC-V platform
+features such as PMP, ePMP, IOPMP, SiFive Shield, etc.
+
+Important entities which help implement OpenSBI domain support are:
+
+* **struct sbi_domain_memregion** - Representation of a domain memory region
+* **struct sbi_hartmask** - Representation of domain HART set
+* **struct sbi_domain** - Representation of a domain instance
+
+Each HART of a RISC-V platform must have an OpenSBI domain assigned to it.
+The OpenSBI platform support is responsible for populating domains and
+providing HART id to domain mapping. The OpenSBI domain support will by
+default assign **the ROOT domain** to all HARTs of a RISC-V platform so
+it is not mandatory for the OpenSBI platform support to populate domains.
+
+Domain Memory Region
+--------------------
+
+A domain memory region is represented by **struct sbi_domain_memregion** in
+OpenSBI and has following details:
+
+* **order** - The size of a memory region is **2 ^ order** where **order**
+  must be **3 <= order <= __riscv_xlen**
+* **base** - The base address of a memory region is **2 ^ order**
+  aligned start address
+* **flags** - The flags of a memory region represent memory type (i.e.
+  RAM or MMIO) and allowed accesses (i.e. READ, WRITE, EXECUTE, etc)
+
+Domain Instance
+---------------
+
+A domain instance is represented by **struct sbi_domain** in OpenSBI and
+has following details:
+
+* **index** - Logical index of this domain
+* **name** - Name of this domain
+* **assigned_harts** - HARTs assigned to this domain
+* **possible_harts** - HARTs possible in this domain
+* **regions** - Array of memory regions terminated by a memory region
+  with order zero
+* **boot_hartid** - HART id of the HART booting this domain. The domain
+  boot HART will be started at boot-time if boot HART is possible and
+  assigned for this domain.
+* **next_addr** - Address of the next booting stage for this domain
+* **next_arg1** - Arg1 (or 'a1' register) of the next booting stage for
+  this domain
+* **next_mode** - Privilege mode of the next booting stage for this
+  domain. This can be either S-mode or U-mode.
+* **system_reset_allowed** - Is domain allowed to reset the system?
+
+The memory regions represented by **regions** in **struct sbi_domain** have
+following additional constraints to align with RISC-V PMP requirements:
+
+* A memory region to protect OpenSBI firmware from S-mode and U-mode
+  should always be present
+* For two overlapping memory regions, one should be sub-region of another
+* Two overlapping memory regions should not be of same size
+* Two overlapping memory regions cannot have same flags
+* Memory access checks on overlapping address should prefer smallest
+  overlapping memory region flags.
+
+ROOT Domain
+-----------
+
+**The ROOT domain** is the default OpenSBI domain which is assigned by
+default to all HARTs of a RISC-V platform. The OpenSBI domain support
+will hand-craft **the ROOT domain** very early at boot-time in the
+following manner:
+
+* **index** - Logical index of the ROOT domain is always zero
+* **name** - Name of the ROOT domain is "root"
+* **assigned_harts** - At boot-time all valid HARTs of a RISC-V platform
+  are assigned the ROOT domain which changes later based on OpenSBI
+  platform support
+* **possible_harts** - All valid HARTs of a RISC-V platform are possible
+  HARTs of the ROOT domain
+* **regions** - Two memory regions available to the ROOT domain:
+  **A)** A memory region to protect OpenSBI firmware from S-mode and U-mode
+  **B)** A memory region of **order=__riscv_xlen** allowing S-mode and
+  U-mode access to full memory address space
+* **boot_hartid** - Coldboot HART is the HART booting the ROOT domain
+* **next_addr** - Next booting stage address in coldboot HART scratch
+  space is the next address for the ROOT domain
+* **next_arg1** - Next booting stage arg1 in coldboot HART scratch space
+  is the next arg1 for the ROOT domain
+* **next_mode** - Next booting stage mode in coldboot HART scratch space
+  is the next mode for the ROOT domain
+* **system_reset_allowed** - The ROOT domain is allowed to reset the system
+
+Domain Effects
+--------------
+
+Few noteworthy effects of a system partitioned into domains are as follows:
+
+* At any point in time, a HART is running in exactly one OpenSBI domain context
+* The SBI IPI and RFENCE calls from HART A are restricted to the HARTs in
+  domain assigned to HART A
+* The SBI HSM calls which try to change/read state of HART B from HART A will
+  only work if both HART A and HART B are assigned same domain
+* A HART running in S-mode or U-mode can only access memory based on the
+  memory regions of the domain assigned to the HART
diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index dbf8ef9871b..82f31a7ae6f 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -795,6 +795,7 @@ INPUT                  = @@SRC_DIR@@/README.md \
                          @@SRC_DIR@@/docs/platform_guide.md \
                          @@SRC_DIR@@/docs/platform_requirements.md \
                          @@SRC_DIR@@/docs/library_usage.md \
+                         @@SRC_DIR@@/docs/domain_support.md \
                          @@SRC_DIR@@/docs/firmware \
                          @@SRC_DIR@@/docs/platform \
                          @@SRC_DIR@@/include \

From 74c0ea1e835de38e13be7c8e6440bde94bcc07d0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Fri, 23 Oct 2020 15:47:39 -0700
Subject: [PATCH 0681/1765] lib: utils: Implement "ranges" property parsing

The "reg" property in a device node may not be the correct address always.
If a parent node defines a "ranges" property, the child address need to be
translated with respect to parents address. If the ranges property is not
present, it will just use 1:1 translation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_helper.c | 50 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 48 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index aec73a0598d..bf19ff92d5b 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -71,10 +71,48 @@ int fdt_find_match(void *fdt, int startoff,
 	return SBI_ENODEV;
 }
 
+static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
+				 unsigned long *addr)
+{
+	int i, rlen;
+	int cell_addr, cell_size;
+	const fdt32_t *ranges;
+	uint64_t offset = 0, caddr = 0, paddr = 0, rsize = 0;
+
+	cell_addr = fdt_address_cells(fdt, parent);
+	if (cell_addr < 1)
+		return SBI_ENODEV;
+
+	cell_size = fdt_size_cells(fdt, parent);
+	if (cell_size < 0)
+		return SBI_ENODEV;
+
+	ranges = fdt_getprop(fdt, parent, "ranges", &rlen);
+	if (ranges && rlen > 0) {
+		for (i = 0; i < cell_addr; i++)
+			caddr = (caddr << 32) | fdt32_to_cpu(*ranges++);
+		for (i = 0; i < cell_addr; i++)
+			paddr = (paddr << 32) | fdt32_to_cpu(*ranges++);
+		for (i = 0; i < cell_size; i++)
+			rsize = (rsize << 32) | fdt32_to_cpu(*ranges++);
+		if (reg < caddr || caddr >= (reg + rsize )) {
+			sbi_printf("invalid address translation\n");
+			return SBI_ENODEV;
+		}
+		offset = reg - caddr;
+		*addr = paddr + offset;
+	} else {
+		/* No translation required */
+		*addr = reg;
+	}
+
+	return 0;
+}
+
 int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 			   unsigned long *size)
 {
-	int parent, len, i;
+	int parent, len, i, rc;
 	int cell_addr, cell_size;
 	const fdt32_t *prop_addr, *prop_size;
 	uint64_t temp = 0;
@@ -98,7 +136,15 @@ int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 	if (addr) {
 		for (i = 0; i < cell_addr; i++)
 			temp = (temp << 32) | fdt32_to_cpu(*prop_addr++);
-		*addr = temp;
+		do {
+			if (parent < 0)
+				break;
+			rc  = fdt_translate_address(fdt, temp, parent, addr);
+			if (rc)
+				break;
+			parent = fdt_parent_offset(fdt, parent);
+			temp = *addr;
+		} while (1);
 	}
 	temp = 0;
 

From bf21632860b4e9974967765b747d1d4b7df346bb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 26 Oct 2020 14:03:33 -0700
Subject: [PATCH 0682/1765] lib: sbi: Detect PMP granularity and number of
 address bits

As per RISC-V privilege specification, a platform may choose to implement
a coarser granularity scheme for PMP addresses. In that case, we shouldn't
allow any pmp region size smaller than the platform supports. A platform
may not also implement all the bits for a PMP address specified in the priv
specification.

The pmp range granularity and address bits should be detected dynamically
before detecing PMP regions. Any pmp modification request beyond these detected
value must not succeed.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_hart.h |  2 ++
 lib/sbi/sbi_hart.c     | 62 +++++++++++++++++++++++++++++++++++++++---
 2 files changed, 60 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 3ac150036c7..ec9e30f913c 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -39,6 +39,8 @@ unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 			      const char *prefix, const char *suffix);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
+unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
+unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index ff18c9d6910..30d8aefe0ae 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -30,6 +30,8 @@ void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 struct hart_features {
 	unsigned long features;
 	unsigned int pmp_count;
+	unsigned int pmp_addr_bits;
+	unsigned long pmp_gran;
 	unsigned int mhpm_count;
 };
 static unsigned long hart_features_offset;
@@ -159,16 +161,37 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 	return hfeatures->pmp_count;
 }
 
+unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->pmp_gran;
+}
+
+unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->pmp_addr_bits;
+}
+
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	struct sbi_domain_memregion *reg;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	unsigned int pmp_idx = 0, pmp_flags;
+	unsigned int pmp_idx = 0, pmp_flags, pmp_bits, pmp_gran_log2;
 	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
+	unsigned long pmp_addr = 0, pmp_addr_max = 0;
 
 	if (!pmp_count)
 		return 0;
 
+	pmp_gran_log2 = log2roundup(sbi_hart_pmp_granularity(scratch));
+	pmp_bits = sbi_hart_pmp_addrbits(scratch) - 1;
+	pmp_addr_max = (1UL << pmp_bits) | ((1UL << pmp_bits) - 1);
+
 	sbi_domain_for_each_memregion(dom, reg) {
 		if (pmp_count <= pmp_idx)
 			break;
@@ -183,7 +206,14 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 		if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE)
 			pmp_flags |= PMP_L;
 
-		pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
+		pmp_addr =  reg->base >> PMP_SHIFT;
+		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max)
+			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
+		else {
+			sbi_printf("Can not configure pmp for domain %s", dom->name);
+			sbi_printf("because memory region address %lx or size %lx is not in range\n",
+				    reg->base, reg->order);
+		}
 	}
 
 	return 0;
@@ -282,6 +312,21 @@ void sbi_hart_get_features_str(struct sbi_scratch *scratch,
 		sbi_strncpy(features_str, "none", nfstr);
 }
 
+static unsigned long hart_pmp_get_allowed_addr(void)
+{
+	unsigned long val = 0;
+	struct sbi_trap_info trap = {0};
+
+	csr_write_allowed(CSR_PMPADDR0, (ulong)&trap, PMP_ADDR_MASK);			\
+	if (!trap.cause) {
+		val = csr_read_allowed(CSR_PMPADDR0, (ulong)&trap);
+		if (trap.cause)
+			val = 0;
+	}
+
+	return val;
+}
+
 static void hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
@@ -332,8 +377,17 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	__check_csr_32(__csr + 0, __rdonly, __wrval, __field, __skip)	\
 	__check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip)
 
-	/* Detect number of PMP regions */
-	__check_csr_64(CSR_PMPADDR0, 0, 1UL, pmp_count, __pmp_skip);
+	/**
+	 * Detect the allowed address bits & granularity. At least PMPADDR0
+	 * should be implemented.
+	 */
+	val = hart_pmp_get_allowed_addr();
+	if (val) {
+		hfeatures->pmp_gran =  1 << (__ffs(val) + 2);
+		hfeatures->pmp_addr_bits = __fls(val) + 1;
+		/* Detect number of PMP regions. At least PMPADDR0 should be implemented*/
+		__check_csr_64(CSR_PMPADDR0, 0, val, pmp_count, __pmp_skip);
+	}
 __pmp_skip:
 
 	/* Detect number of MHPM counters */

From a809f406b97cdd699f49a977f031ae9c864fe5c3 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 26 Oct 2020 14:03:34 -0700
Subject: [PATCH 0683/1765] lib: sbi: Improve boot time print with additional
 PMP information

We know about pmp granularity and number of bits supported by PMP.
Show those information in the boot time info print

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_init.c | 37 +++++++++++++++++++++++--------------
 1 file changed, 23 insertions(+), 14 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 5151d36a2b3..15ae9dafedc 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -59,35 +59,44 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	}
 
 	/* Platform details */
-	sbi_printf("Platform Name       : %s\n", sbi_platform_name(plat));
+	sbi_printf("Platform Name             : %s\n",
+		   sbi_platform_name(plat));
 	sbi_platform_get_features_str(plat, str, sizeof(str));
-	sbi_printf("Platform Features   : %s\n", str);
-	sbi_printf("Platform HART Count : %u\n",
+	sbi_printf("Platform Features         : %s\n", str);
+	sbi_printf("Platform HART Count       : %u\n",
 		   sbi_platform_hart_count(plat));
 
 	/* Firmware details */
-	sbi_printf("Firmware Base       : 0x%lx\n", scratch->fw_start);
-	sbi_printf("Firmware Size       : %d KB\n",
+	sbi_printf("Firmware Base             : 0x%lx\n", scratch->fw_start);
+	sbi_printf("Firmware Size             : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
 
 	/* SBI details */
-	sbi_printf("Runtime SBI Version : %d.%d\n",
+	sbi_printf("Runtime SBI Version       : %d.%d\n",
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
 
 	/* Domain details */
-	sbi_domain_dump_all("");
+	sbi_domain_dump_all("      ");
 
 	/* Boot HART details */
-	sbi_printf("Boot HART ID        : %u\n", hartid);
-	sbi_printf("Boot HART Domain    : %s\n", dom->name);
+	sbi_printf("Boot HART ID              : %u\n", hartid);
+	sbi_printf("Boot HART Domain          : %s\n", dom->name);
 	misa_string(xlen, str, sizeof(str));
-	sbi_printf("Boot HART ISA       : %s\n", str);
+	sbi_printf("Boot HART ISA             : %s\n", str);
 	sbi_hart_get_features_str(scratch, str, sizeof(str));
-	sbi_printf("Boot HART Features  : %s\n", str);
-	sbi_printf("Boot HART PMP Count : %d\n", sbi_hart_pmp_count(scratch));
-	sbi_printf("Boot HART MHPM Count: %d\n", sbi_hart_mhpm_count(scratch));
-	sbi_hart_delegation_dump(scratch, "Boot HART ", "   ");
+	sbi_printf("Boot HART Features        : %s\n", str);
+	sbi_printf("Boot HART PMP Count       : %d\n",
+		   sbi_hart_pmp_count(scratch));
+	sbi_printf("Boot HART PMP Granularity : %lu\n",
+		   sbi_hart_pmp_granularity(scratch));
+	sbi_printf("Boot HART PMP Address Bits: %d\n",
+		   sbi_hart_pmp_addrbits(scratch));
+	sbi_printf("Boot HART MHPM Count      : %d\n",
+		   sbi_hart_mhpm_count(scratch));
+	sbi_printf("Boot HART MHPM Count      : %d\n",
+		   sbi_hart_mhpm_count(scratch));
+	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }
 
 static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;

From 914f81fbee28da409eac680ab3e76f1d5982c6e7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 20 Oct 2020 10:29:43 +0530
Subject: [PATCH 0684/1765] Makefile: Add option to use toolchain default ABI
 and ISA string

When PLATFORM_RISCV_ABI and PLATFORM_RISCV_ISA are not specified,
we force "-mabi=lp64 -march=rv64gc" for RV64 and force "-mabi=ilp32
-march=rv32gc" for RV32. This can prevent users from using the
toolchain default "-mabi" and "-march" options.

To allow using toolchain defaults, we add compile-time option
PLATFORM_RISCV_TOOLCHAIN_DEFAULT which when enabled forces the
top-level makefile to use toolchain default ABI and ISA string.

To enable the option, pass "PLATFORM_RISCV_TOOLCHAIN_DEFAULT=1"
to top-level make.

Reported-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index a2318812df7..d6f097d30af 100644
--- a/Makefile
+++ b/Makefile
@@ -94,6 +94,8 @@ DTC		=	dtc
 
 # Guess the compillers xlen
 OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine | sed 's/riscv\([0-9][0-9]\).*/\1/'`; echo $${TMP})
+OPENSBI_CC_ABI := $(shell TMP=`$(CC) -v 2>&1 | sed -n 's/.*\(with\-abi=\([a-zA-Z0-9]*\)\).*/\2/p'`; echo $${TMP})
+OPENSBI_CC_ISA := $(shell TMP=`$(CC) -v 2>&1 | sed -n 's/.*\(with\-arch=\([a-zA-Z0-9]*\)\).*/\2/p'`; echo $${TMP})
 
 # Setup platform XLEN
 ifndef PLATFORM_RISCV_XLEN
@@ -143,14 +145,22 @@ deps-y+=$(firmware-objs-path-y:.o=.dep)
 
 # Setup platform ABI, ISA and Code Model
 ifndef PLATFORM_RISCV_ABI
-  ifeq ($(PLATFORM_RISCV_XLEN), 32)
-    PLATFORM_RISCV_ABI = ilp$(PLATFORM_RISCV_XLEN)
+  ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
+    ifeq ($(PLATFORM_RISCV_XLEN), 32)
+      PLATFORM_RISCV_ABI = ilp$(PLATFORM_RISCV_XLEN)
+    else
+      PLATFORM_RISCV_ABI = lp$(PLATFORM_RISCV_XLEN)
+    endif
   else
-    PLATFORM_RISCV_ABI = lp$(PLATFORM_RISCV_XLEN)
+    PLATFORM_RISCV_ABI = $(OPENSBI_CC_ABI)
   endif
 endif
 ifndef PLATFORM_RISCV_ISA
-  PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+  ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
+    PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+  else
+    PLATFORM_RISCV_ISA = $(OPENSBI_CC_ISA)
+  endif
 endif
 ifndef PLATFORM_RISCV_CODE_MODEL
   PLATFORM_RISCV_CODE_MODEL = medany

From 48616b3de2dd67c315e3c000b9c1721cf37ad63a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 4 Nov 2020 15:16:20 +0530
Subject: [PATCH 0685/1765] lib: sbi: Improve boot prints in cold boot sequence

Currently, we have all boot prints at the end of cold boot sequence
which means if there is any failure in cold boot sequence before
boot prints then we don't get any print.

This patch improves boot prints in cold boot sequence as follows:
1. We divide the boot prints into multiple parts and print it
   from different locations after sbi_console_init()
2. We throw an error print if there is any failure in cold boot
   sequence after sbi_console_init()

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 90 +++++++++++++++++++++++++++++++++++-----------
 1 file changed, 69 insertions(+), 21 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 15ae9dafedc..0e824588efa 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -35,12 +35,10 @@
 	"        | |\n"                                     \
 	"        |_|\n\n"
 
-static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
+static void sbi_boot_print_banner(struct sbi_scratch *scratch)
 {
-	int xlen;
-	char str[128];
-	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
+		return;
 
 #ifdef OPENSBI_VERSION_GIT
 	sbi_printf("\nOpenSBI %s\n", OPENSBI_VERSION_GIT);
@@ -50,13 +48,15 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 #endif
 
 	sbi_printf(BANNER);
+}
 
-	/* Determine MISA XLEN and MISA string */
-	xlen = misa_xlen();
-	if (xlen < 1) {
-		sbi_printf("Error %d getting MISA XLEN\n", xlen);
-		sbi_hart_hang();
-	}
+static void sbi_boot_print_general(struct sbi_scratch *scratch)
+{
+	char str[128];
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
+		return;
 
 	/* Platform details */
 	sbi_printf("Platform Name             : %s\n",
@@ -75,9 +75,32 @@ static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Runtime SBI Version       : %d.%d\n",
 		   sbi_ecall_version_major(), sbi_ecall_version_minor());
 	sbi_printf("\n");
+}
+
+static void sbi_boot_print_domains(struct sbi_scratch *scratch)
+{
+	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
+		return;
 
 	/* Domain details */
 	sbi_domain_dump_all("      ");
+}
+
+static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
+{
+	int xlen;
+	char str[128];
+	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
+
+	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
+		return;
+
+	/* Determine MISA XLEN and MISA string */
+	xlen = misa_xlen();
+	if (xlen < 1) {
+		sbi_printf("Error %d getting MISA XLEN\n", xlen);
+		sbi_hart_hang();
+	}
 
 	/* Boot HART details */
 	sbi_printf("Boot HART ID              : %u\n", hartid);
@@ -208,25 +231,40 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	sbi_boot_print_banner(scratch);
+
 	rc = sbi_platform_irqchip_init(plat, TRUE);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: platform irqchip init failed (error %d)\n",
+			   __func__, rc);
 		sbi_hart_hang();
+	}
 
 	rc = sbi_ipi_init(scratch, TRUE);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: ipi init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
+	}
 
 	rc = sbi_tlb_init(scratch, TRUE);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: tlb init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
+	}
 
 	rc = sbi_timer_init(scratch, TRUE);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: timer init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
+	}
 
 	rc = sbi_ecall_init();
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: ecall init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
+	}
+
+	sbi_boot_print_general(scratch);
 
 	/*
 	 * Note: Finalize domains after HSM initialization so that we
@@ -235,23 +273,33 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	 * that we use correct domain for configuring PMP.
 	 */
 	rc = sbi_domain_finalize(scratch, hartid);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: domain finalize failed (error %d)\n",
+			   __func__, rc);
 		sbi_hart_hang();
+	}
+
+	sbi_boot_print_domains(scratch);
 
 	rc = sbi_hart_pmp_configure(scratch);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: PMP configure failed (error %d)\n",
+			   __func__, rc);
 		sbi_hart_hang();
+	}
 
 	/*
 	 * Note: Platform final initialization should be last so that
 	 * it sees correct domain assignment and PMP configuration.
 	 */
 	rc = sbi_platform_final_init(plat, TRUE);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: platform final init failed (error %d)\n",
+			   __func__, rc);
 		sbi_hart_hang();
+	}
 
-	if (!(scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS))
-		sbi_boot_prints(scratch, hartid);
+	sbi_boot_print_hart(scratch, hartid);
 
 	wake_coldboot_harts(scratch, hartid);
 

From 781cafdbee0fc9c8b0296149da35e7929abb6224 Mon Sep 17 00:00:00 2001
From: Yuan Li <dskwelmcy@163.com>
Date: Wed, 25 Nov 2020 23:13:19 +0800
Subject: [PATCH 0686/1765] docs: fix a typo error

fix a typo error in docs/platform/sifive_fu540.md

Signed-off-by: Yuan Li <dskwelmcy@163.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/sifive_fu540.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index c9513eb67b0..b4d3c605127 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -27,7 +27,7 @@ U-Boot v2020.01 (or higher) should be used.
 The HiFive Unleashed device tree(DT) is merged in Linux v5.2 release. This
 DT (device tree) is not backward compatible with the DT passed from FSBL.
 
-To use Linux v5.2 (or higher, the pre-built DTB (DT binary) from Linux v5.2
+To use Linux v5.2 (or higher), the pre-built DTB (DT binary) from Linux v5.2
 (or higher) should be used to build SiFive FU540 OpenSBI binaries by using
 the compile time option *FW_FDT_PATH*.
 

From 54a7734d86fb43d3a7892d474c7d4593f34c124e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Nov 2020 09:50:00 +0530
Subject: [PATCH 0687/1765] include: sbi: Add SBI SRST extension related
 defines

We extend the SBI ecall interface header for the SBI SRST extension
recently accepted in SBI specification v0.3-draft.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index af30500ea25..002c6f9cbe1 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -27,6 +27,7 @@
 #define SBI_EXT_IPI				0x735049
 #define SBI_EXT_RFENCE				0x52464E43
 #define SBI_EXT_HSM				0x48534D
+#define SBI_EXT_SRST				0x53525354
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -62,6 +63,17 @@
 #define SBI_HSM_HART_STATUS_START_PENDING	0x2
 #define SBI_HSM_HART_STATUS_STOP_PENDING	0x3
 
+/* SBI function IDs for SRST extension */
+#define SBI_EXT_SRST_RESET			0x0
+
+#define SBI_SRST_RESET_TYPE_SHUTDOWN		0x0
+#define SBI_SRST_RESET_TYPE_COLD_REBOOT	0x1
+#define SBI_SRST_RESET_TYPE_WARM_REBOOT	0x2
+#define SBI_SRST_RESET_TYPE_LAST	SBI_SRST_RESET_TYPE_WARM_REBOOT
+
+#define SBI_SRST_RESET_REASON_NONE	0x0
+#define SBI_SRST_RESET_REASON_SYSFAIL	0x1
+
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
 #define SBI_SPEC_VERSION_MINOR_MASK		0xffffff

From c4acc60a4694a45ac154948efa300adbf30d0425 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Nov 2020 10:13:16 +0530
Subject: [PATCH 0688/1765] include: sbi: Remove opensbi specific reset type
 defines

We can now use the standard SBI SRST extension reset types instead
of the opensbi specific (SBI_PLATFORM_RESET_xyz) reset types hence
remove related opensbi specific defines. The "platform_" prefix of
the reset type parameter of sbi_system_reset() function should also
be removed.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h  | 4 +---
 include/sbi/sbi_system.h    | 2 +-
 lib/sbi/sbi_ecall_legacy.c  | 2 +-
 lib/sbi/sbi_system.c        | 4 ++--
 lib/utils/sys/sifive_test.c | 6 +++---
 5 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e1355d8884b..b06aaa6c3a9 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -40,6 +40,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_version.h>
@@ -137,9 +138,6 @@ struct sbi_platform_operations {
 	int (*hart_stop)(void);
 
 	/** Reset the platform */
-#define SBI_PLATFORM_RESET_SHUTDOWN	0
-#define SBI_PLATFORM_RESET_COLD		1
-#define SBI_PLATFORM_RESET_WARM		2
 	int (*system_reset)(u32 reset_type);
 
 	/** platform specific SBI extension implementation probe function */
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index d44ef121908..309e263c7d2 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -12,6 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-void __noreturn sbi_system_reset(u32 platform_reset_type);
+void __noreturn sbi_system_reset(u32 reset_type);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 909cbe35686..683b8dceac3 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -103,7 +103,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
-		sbi_system_reset(SBI_PLATFORM_RESET_SHUTDOWN);
+		sbi_system_reset(SBI_SRST_RESET_TYPE_SHUTDOWN);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 96290b30b83..2f1b7fb9939 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -18,7 +18,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
-void __noreturn sbi_system_reset(u32 platform_reset_type)
+void __noreturn sbi_system_reset(u32 reset_type)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
@@ -40,7 +40,7 @@ void __noreturn sbi_system_reset(u32 platform_reset_type)
 	/* Platform specific reset if domain allowed system reset */
 	if (dom->system_reset_allowed)
 		sbi_platform_system_reset(sbi_platform_ptr(scratch),
-					  platform_reset_type);
+					  reset_type);
 
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
index 15369dabc7b..06fbfb221c1 100644
--- a/lib/utils/sys/sifive_test.c
+++ b/lib/utils/sys/sifive_test.c
@@ -24,11 +24,11 @@ int sifive_test_system_reset(u32 type)
 	 * was successful so that QEMU exits
 	 */
 	switch (type) {
-	case SBI_PLATFORM_RESET_SHUTDOWN:
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
 		writew(FINISHER_PASS, sifive_test_base);
 		break;
-	case SBI_PLATFORM_RESET_COLD:
-	case SBI_PLATFORM_RESET_WARM:
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
 		writew(FINISHER_RESET, sifive_test_base);
 		break;
 	}

From da074796df871f6323d052f123b7668d390980dc Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Nov 2020 11:18:27 +0530
Subject: [PATCH 0689/1765] platform: Remove dummy system reset functions

Few platforms have dummy system reset functions so let's remove
these dummy system reset functions to allow generic code deal
with it in the right way.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/andes/ae350/platform.c    | 10 ----------
 platform/fpga/ariane/platform.c    | 11 -----------
 platform/fpga/openpiton/platform.c | 11 -----------
 platform/kendryte/k210/platform.c  | 10 ----------
 platform/sifive/fu540/platform.c   |  7 -------
 5 files changed, 49 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 954942c7585..6d6ce4ecfe8 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -114,14 +114,6 @@ static int ae350_timer_init(bool cold_boot)
 	return plmt_warm_timer_init();
 }
 
-/* Reset the platform. */
-static int ae350_system_reset(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System reset\n");
-	return 0;
-}
-
 /* Vendor-Specific SBI handler */
 static int ae350_vendor_ext_provider(long extid, long funcid,
 	unsigned long *args, unsigned long *out_value,
@@ -185,8 +177,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_start = plmt_timer_event_start,
 	.timer_event_stop  = plmt_timer_event_stop,
 
-	.system_reset	 = ae350_system_reset,
-
 	.vendor_ext_provider = ae350_vendor_ext_provider
 };
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index a4d437e4977..ea179e52d31 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -147,16 +147,6 @@ static int ariane_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-/*
- * Reset the ariane.
- */
-static int ariane_system_reset(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System reset\n");
-	return 0;
-}
-
 /*
  * Platform descriptor.
  */
@@ -174,7 +164,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_value = clint_timer_value,
 	.timer_event_start = clint_timer_event_start,
 	.timer_event_stop = clint_timer_event_stop,
-	.system_reset = ariane_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 095004de4ba..5eae47799e6 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -173,16 +173,6 @@ static int openpiton_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-/*
- * Reset the openpiton.
- */
-static int openpiton_system_reset(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System reset\n");
-	return 0;
-}
-
 /*
  * Platform descriptor.
  */
@@ -200,7 +190,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_value = clint_timer_value,
 	.timer_event_start = clint_timer_event_start,
 	.timer_event_stop = clint_timer_event_stop,
-	.system_reset = openpiton_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 75883ed7435..944b388855b 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -129,14 +129,6 @@ static int k210_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int k210_system_reset(u32 type)
-{
-	/* For now nothing to do. */
-	sbi_printf("System reset\n");
-
-	return 0;
-}
-
 const struct sbi_platform_operations platform_ops = {
 	.final_init	= k210_final_init,
 
@@ -154,8 +146,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_value	   = clint_timer_value,
 	.timer_event_stop  = clint_timer_event_stop,
 	.timer_event_start = clint_timer_event_start,
-
-	.system_reset	 = k210_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 755e479c9da..cdd829363d0 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -154,12 +154,6 @@ static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
 	[3] = 4,
 };
 
-static int fu540_system_reset(u32 type)
-{
-	/* For now nothing to do. */
-	return 0;
-}
-
 const struct sbi_platform_operations platform_ops = {
 	.final_init		= fu540_final_init,
 	.console_putc		= sifive_uart_putc,
@@ -174,7 +168,6 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= fu540_timer_init,
-	.system_reset		= fu540_system_reset
 };
 
 const struct sbi_platform platform = {

From 5c429ae2133e1a82b81403146a3e38e2b4b8350e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Nov 2020 11:59:05 +0530
Subject: [PATCH 0690/1765] lib: sbi: Improve system reset platform operations

To implement the SBI SRST extension, we need two platform operations
for system reset:
1) system_reset_check() - This operation will check whether given
   reset type and reason are supported by the platform
2) system_reset() - This operation will do the actual platform
   system reset and it will not return if reset type and reason
   are supported by the platform

This patch updates system reset related code everywhere as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h                   | 35 ++++++++++++++++----
 include/sbi/sbi_system.h                     |  4 ++-
 include/sbi_utils/reset/fdt_reset.h          |  7 ++--
 include/sbi_utils/sys/htif.h                 |  4 ++-
 include/sbi_utils/sys/sifive_test.h          |  4 ++-
 lib/sbi/sbi_ecall_legacy.c                   |  3 +-
 lib/sbi/sbi_system.c                         | 13 ++++++--
 lib/utils/reset/fdt_reset.c                  | 13 ++++++--
 lib/utils/reset/fdt_reset_htif.c             |  1 +
 lib/utils/reset/fdt_reset_sifive.c           |  1 +
 lib/utils/sys/htif.c                         |  7 +++-
 lib/utils/sys/sifive_test.c                  | 23 ++++++++++---
 platform/generic/include/platform_override.h |  5 ++-
 platform/generic/platform.c                  | 23 ++++++++++---
 platform/nuclei/ux600/platform.c             |  9 +++--
 platform/template/platform.c                 | 12 +++++--
 platform/thead/c910/platform.c               |  9 +++--
 17 files changed, 137 insertions(+), 36 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index b06aaa6c3a9..ee723233bde 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -137,8 +137,10 @@ struct sbi_platform_operations {
 	 */
 	int (*hart_stop)(void);
 
+	/* Check whether reset type and reason supported by the platform */
+	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
 	/** Reset the platform */
-	int (*system_reset)(u32 reset_type);
+	void (*system_reset)(u32 reset_type, u32 reset_reason);
 
 	/** platform specific SBI extension implementation probe function */
 	int (*vendor_ext_check)(long extid);
@@ -653,21 +655,40 @@ static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
 }
 
 /**
- * Reset the platform
+ * Check whether reset type and reason supported by the platform
  *
  * @param plat pointer to struct sbi_platform
  * @param reset_type type of reset
+ * @param reset_reason reason for reset
  *
- * @return 0 on success and negative error code on failure
+ * @return 0 if reset type and reason not supported and 1 if supported
  */
-static inline int sbi_platform_system_reset(const struct sbi_platform *plat,
-					    u32 reset_type)
+static inline int sbi_platform_system_reset_check(
+					    const struct sbi_platform *plat,
+					    u32 reset_type, u32 reset_reason)
 {
-	if (plat && sbi_platform_ops(plat)->system_reset)
-		return sbi_platform_ops(plat)->system_reset(reset_type);
+	if (plat && sbi_platform_ops(plat)->system_reset_check)
+		return sbi_platform_ops(plat)->system_reset_check(reset_type,
+								  reset_reason);
 	return 0;
 }
 
+/**
+ * Reset the platform
+ *
+ * This function will not return for supported reset type and reset reason
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param reset_type type of reset
+ * @param reset_reason reason for reset
+ */
+static inline void sbi_platform_system_reset(const struct sbi_platform *plat,
+					     u32 reset_type, u32 reset_reason)
+{
+	if (plat && sbi_platform_ops(plat)->system_reset)
+		sbi_platform_ops(plat)->system_reset(reset_type, reset_reason);
+}
+
 /**
  * Check if a vendor extension is implemented or not.
  *
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 309e263c7d2..34ba7669ad6 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -12,6 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
-void __noreturn sbi_system_reset(u32 reset_type);
+bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason);
+
+void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason);
 
 #endif
diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index 789a6acef80..cce441a84d9 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -15,10 +15,13 @@
 struct fdt_reset {
 	const struct fdt_match *match_table;
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
-	int (*system_reset)(u32 reset_type);
+	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
+	void (*system_reset)(u32 reset_type, u32 reset_reason);
 };
 
-int fdt_system_reset(u32 reset_type);
+int fdt_system_reset_check(u32 reset_type, u32 reset_reason);
+
+void fdt_system_reset(u32 reset_type, u32 reset_reason);
 
 int fdt_reset_init(void);
 
diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
index 7384b48e0a7..a43172348be 100644
--- a/include/sbi_utils/sys/htif.h
+++ b/include/sbi_utils/sys/htif.h
@@ -14,6 +14,8 @@ void htif_putc(char ch);
 
 int htif_getc(void);
 
-int htif_system_reset(u32 type);
+int htif_system_reset_check(u32 type, u32 reason);
+
+void htif_system_reset(u32 type, u32 reason);
 
 #endif
diff --git a/include/sbi_utils/sys/sifive_test.h b/include/sbi_utils/sys/sifive_test.h
index 7e153d5774f..958622e6aa3 100644
--- a/include/sbi_utils/sys/sifive_test.h
+++ b/include/sbi_utils/sys/sifive_test.h
@@ -12,7 +12,9 @@
 
 #include <sbi/sbi_types.h>
 
-int sifive_test_system_reset(u32 type);
+int sifive_test_system_reset_check(u32 type, u32 reason);
+
+void sifive_test_system_reset(u32 type, u32 reason);
 
 int sifive_test_init(unsigned long base);
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 683b8dceac3..7844fbbca42 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -103,7 +103,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
-		sbi_system_reset(SBI_SRST_RESET_TYPE_SHUTDOWN);
+		sbi_system_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
+				 SBI_SRST_RESET_REASON_NONE);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 2f1b7fb9939..08a8b47c788 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -18,7 +18,16 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
-void __noreturn sbi_system_reset(u32 reset_type)
+bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason)
+{
+	if (sbi_platform_system_reset_check(sbi_platform_thishart_ptr(),
+					    reset_type, reset_reason))
+		return TRUE;
+
+	return FALSE;
+}
+
+void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 {
 	ulong hbase = 0, hmask;
 	u32 cur_hartid = current_hartid();
@@ -40,7 +49,7 @@ void __noreturn sbi_system_reset(u32 reset_type)
 	/* Platform specific reset if domain allowed system reset */
 	if (dom->system_reset_allowed)
 		sbi_platform_system_reset(sbi_platform_ptr(scratch),
-					  reset_type);
+					  reset_type, reset_reason);
 
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index dfbd33ef874..dead8a34238 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -21,13 +21,20 @@ static struct fdt_reset *reset_drivers[] = {
 
 static struct fdt_reset *current_driver = NULL;
 
-int fdt_system_reset(u32 reset_type)
+int fdt_system_reset_check(u32 reset_type, u32 reset_reason)
 {
-	if (current_driver && current_driver->system_reset)
-		return current_driver->system_reset(reset_type);
+	if (current_driver && current_driver->system_reset_check)
+		return current_driver->system_reset_check(reset_type,
+							  reset_reason);
 	return 0;
 }
 
+void fdt_system_reset(u32 reset_type, u32 reset_reason)
+{
+	if (current_driver && current_driver->system_reset)
+		current_driver->system_reset(reset_type, reset_reason);
+}
+
 int fdt_reset_init(void)
 {
 	int pos, noff, rc;
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
index e453d05eb3c..587e7d65e6a 100644
--- a/lib/utils/reset/fdt_reset_htif.c
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -18,5 +18,6 @@ static const struct fdt_match htif_reset_match[] = {
 
 struct fdt_reset fdt_reset_htif = {
 	.match_table = htif_reset_match,
+	.system_reset_check = htif_system_reset_check,
 	.system_reset = htif_system_reset
 };
diff --git a/lib/utils/reset/fdt_reset_sifive.c b/lib/utils/reset/fdt_reset_sifive.c
index 6a171cabebf..38b520c4881 100644
--- a/lib/utils/reset/fdt_reset_sifive.c
+++ b/lib/utils/reset/fdt_reset_sifive.c
@@ -33,5 +33,6 @@ static const struct fdt_match sifive_test_reset_match[] = {
 struct fdt_reset fdt_reset_sifive = {
 	.match_table = sifive_test_reset_match,
 	.init = sifive_test_reset_init,
+	.system_reset_check = sifive_test_system_reset_check,
 	.system_reset = sifive_test_system_reset
 };
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index ed800a50a2b..fd70fb98199 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -140,7 +140,12 @@ int htif_getc(void)
 	return ch - 1;
 }
 
-int htif_system_reset(u32 type)
+int htif_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+void htif_system_reset(u32 type, u32 reason)
 {
 	while (1) {
 		fromhost = 0;
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
index 06fbfb221c1..fdf31690c13 100644
--- a/lib/utils/sys/sifive_test.c
+++ b/lib/utils/sys/sifive_test.c
@@ -8,7 +8,7 @@
  */
 
 #include <sbi/riscv_io.h>
-#include <sbi/sbi_platform.h>
+#include <sbi/sbi_ecall_interface.h>
 #include <sbi_utils/sys/sifive_test.h>
 
 #define FINISHER_FAIL		0x3333
@@ -17,7 +17,19 @@
 
 static void *sifive_test_base;
 
-int sifive_test_system_reset(u32 type)
+int sifive_test_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return 1;
+	}
+
+	return 0;
+}
+
+void sifive_test_system_reset(u32 type, u32 reason)
 {
 	/*
 	 * Tell the "finisher" that the simulation
@@ -25,15 +37,16 @@ int sifive_test_system_reset(u32 type)
 	 */
 	switch (type) {
 	case SBI_SRST_RESET_TYPE_SHUTDOWN:
-		writew(FINISHER_PASS, sifive_test_base);
+		if (reason == SBI_SRST_RESET_REASON_NONE)
+			writew(FINISHER_PASS, sifive_test_base);
+		else
+			writew(FINISHER_FAIL, sifive_test_base);
 		break;
 	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
 	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
 		writew(FINISHER_RESET, sifive_test_base);
 		break;
 	}
-
-	return 0;
 }
 
 int sifive_test_init(unsigned long base)
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 8a53cdf9ac2..77a90d645eb 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -20,7 +20,10 @@ struct platform_override {
 	int (*final_init)(bool cold_boot, const struct fdt_match *match);
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
-	int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+	int (*system_reset_check)(u32 reset_type, u32 reset_reason,
+				  const struct fdt_match *match);
+	void (*system_reset)(u32 reset_type, u32 reset_reason,
+			     const struct fdt_match *match);
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
 };
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index d902e71769b..abb696aeff8 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -177,12 +177,24 @@ static u64 generic_tlbr_flush_limit(void)
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
-static int generic_system_reset(u32 reset_type)
+static int generic_system_reset_check(u32 reset_type, u32 reset_reason)
 {
-	if (generic_plat && generic_plat->system_reset)
-		return generic_plat->system_reset(reset_type,
-						  generic_plat_match);
-	return fdt_system_reset(reset_type);
+	if (generic_plat && generic_plat->system_reset_check)
+		return generic_plat->system_reset_check(reset_type,
+							reset_reason,
+							generic_plat_match);
+	return fdt_system_reset_check(reset_type, reset_reason);
+}
+
+static void generic_system_reset(u32 reset_type, u32 reset_reason)
+{
+	if (generic_plat && generic_plat->system_reset) {
+		generic_plat->system_reset(reset_type, reset_reason,
+					   generic_plat_match);
+		return;
+	}
+
+	fdt_system_reset(reset_type, reset_reason);
 }
 
 const struct sbi_platform_operations platform_ops = {
@@ -205,6 +217,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_start	= fdt_timer_event_start,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,
+	.system_reset_check	= generic_system_reset_check,
 	.system_reset		= generic_system_reset,
 };
 
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index ba6803eaa42..d0a45a2ef8b 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -186,13 +186,17 @@ static int ux600_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int ux600_system_reset(u32 type)
+static int ux600_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void ux600_system_reset(u32 type, u32 reason)
 {
 	/* Reset system using MSFTRST register in Nuclei Timer. */
 	writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR
 					+ UX600_NUCLEI_TIMER_MSFTRST_OFS));
 	while(1);
-	return 0;
 }
 
 const struct sbi_platform_operations platform_ops = {
@@ -209,6 +213,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= clint_timer_event_stop,
 	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= ux600_timer_init,
+	.system_reset_check	= ux600_system_reset_check,
 	.system_reset		= ux600_system_reset
 };
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 9cd750e107a..758e95f6dc2 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -178,13 +178,20 @@ static void platform_timer_event_stop(void)
 }
 
 /*
- * Reset the platform.
+ * Check reset type and reason supported by the platform.
  */
-static int platform_system_reset(u32 type)
+static int platform_system_reset_check(u32 type, u32 reason)
 {
 	return 0;
 }
 
+/*
+ * Reset the platform.
+ */
+static void platform_system_reset(u32 type, u32 reason)
+{
+}
+
 /*
  * Platform descriptor.
  */
@@ -202,6 +209,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_event_stop	= platform_timer_event_stop,
 	.timer_event_start	= platform_timer_event_start,
 	.timer_init		= platform_timer_init,
+	.system_reset_check	= platform_system_reset_check,
 	.system_reset		= platform_system_reset
 };
 const struct sbi_platform platform = {
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
index df7658a321d..dfa484ad277 100644
--- a/platform/thead/c910/platform.c
+++ b/platform/thead/c910/platform.c
@@ -108,10 +108,14 @@ static int c910_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int c910_system_reset(u32 type)
+static int c910_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void c910_system_reset(u32 type, u32 reason)
 {
 	asm volatile ("ebreak");
-	return 0;
 }
 
 int c910_hart_start(u32 hartid, ulong saddr)
@@ -135,6 +139,7 @@ const struct sbi_platform_operations platform_ops = {
 	.timer_init          = c910_timer_init,
 	.timer_event_start   = clint_timer_event_start,
 
+	.system_reset_check  = c910_system_reset_check,
 	.system_reset        = c910_system_reset,
 
 	.hart_start          = c910_hart_start,

From 548d03e577490f74af8b57706655e5d81c9b94a1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 24 Nov 2020 14:20:19 +0530
Subject: [PATCH 0691/1765] lib: sbi: Implement System Reset (SRST) SBI
 extension

The SBI SRST extension has been accepted and merged in the latest
SBI v0.3-draft specification.
(Refer, https://github.com/riscv/riscv-sbi-doc)

It allows to S-mode software to request system shutdown, cold reboot,
and warm reboot.

This patch implements SBI SRST extension as a replacement of the
legacy sbi_shutdown() call of SBI v0.1 specification.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h     |  1 +
 lib/sbi/sbi_ecall.c         |  3 ++
 lib/sbi/sbi_ecall_replace.c | 60 +++++++++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 3273ba6d401..1ef86e2d411 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -37,6 +37,7 @@ extern struct sbi_ecall_extension ecall_rfence;
 extern struct sbi_ecall_extension ecall_ipi;
 extern struct sbi_ecall_extension ecall_vendor;
 extern struct sbi_ecall_extension ecall_hsm;
+extern struct sbi_ecall_extension ecall_srst;
 
 u16 sbi_ecall_version_major(void);
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 64c99337099..6d41cffacd7 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -167,6 +167,9 @@ int sbi_ecall_init(void)
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_hsm);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_srst);
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_legacy);
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index e460c3050c8..d06dfa23b18 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 
@@ -127,3 +128,62 @@ struct sbi_ecall_extension ecall_ipi = {
 	.extid_end = SBI_EXT_IPI,
 	.handle = sbi_ecall_ipi_handler,
 };
+
+static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
+				  unsigned long *args, unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	if (funcid == SBI_EXT_SRST_RESET) {
+		if ((((u32)-1U) <= ((u64)args[0])) ||
+		    (((u32)-1U) <= ((u64)args[1])))
+			return SBI_EINVAL;
+
+		switch (args[0]) {
+		case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+			break;
+		default:
+			return SBI_ENOTSUPP;
+		}
+
+		switch (args[1]) {
+		case SBI_SRST_RESET_REASON_NONE:
+		case SBI_SRST_RESET_REASON_SYSFAIL:
+			break;
+		default:
+			return SBI_ENOTSUPP;
+		}
+
+		if (sbi_system_reset_supported(args[0], args[1]))
+			sbi_system_reset(args[0], args[1]);
+	}
+
+	return SBI_ENOTSUPP;
+}
+
+static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
+{
+	u32 type, count = 0;
+
+	/*
+	 * At least one standard reset types should be supported by
+	 * the platform for SBI SRST extension to be usable.
+	 */
+
+	for (type = 0; type <= SBI_SRST_RESET_TYPE_LAST; type++) {
+		if (sbi_system_reset_supported(type,
+					SBI_SRST_RESET_REASON_NONE))
+			count++;
+	}
+
+	*out_val = (count) ? 1 : 0;
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_srst = {
+	.extid_start = SBI_EXT_SRST,
+	.extid_end = SBI_EXT_SRST,
+	.handle = sbi_ecall_srst_handler,
+	.probe = sbi_ecall_srst_probe,
+};

From 2677324f906133db8596de4868df87cb1224f113 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 22 Nov 2020 11:47:22 +0530
Subject: [PATCH 0692/1765] firmware: fw_base: Optimize trap handler for RV32
 systems

On RV32 systems, we have two CSRs for M-mode status (MSTATUS and
MSTATUSH) when H-extension is implemented. This means we have to
save/restore MSTATUSH for RV32 systems only when H-extension is
implemented. The current _trap_handler() has extra instructions
(roughly 10) for conditional save/restore of MSTATUSH CSR.

These extra instructions in RV32 _trap_handler() can be avoided
if we create separate low-level trap handler for RV32 systems
having H-extension. This patch optimizes low-level trap handler
for RV32 systems accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 firmware/fw_base.S | 87 ++++++++++++++++++++++++++++++++++++----------
 1 file changed, 68 insertions(+), 19 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 1d9b375bb05..fb504e862f7 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -413,6 +413,14 @@ _start_warm:
 
 	/* Setup trap handler */
 	la	a4, _trap_handler
+#if __riscv_xlen == 32
+	csrr	a5, CSR_MISA
+	srli	a5, a5, ('H' - 'A')
+	andi	a5, a5, 0x1
+	beq	a5, zero, _skip_trap_handler_rv32_hyp
+	la	a4, _trap_handler_rv32_hyp
+_skip_trap_handler_rv32_hyp:
+#endif
 	csrw	CSR_MTVEC, a4
 
 	/* Initialize SBI runtime */
@@ -476,10 +484,7 @@ fw_platform_init:
 	add	a0, a1, zero
 	ret
 
-	.section .entry, "ax", %progbits
-	.align 3
-	.globl _trap_handler
-_trap_handler:
+.macro	TRAP_SAVE_AND_SETUP_SP_T0
 	/* Swap TP and MSCRATCH */
 	csrrw	tp, CSR_MSCRATCH, tp
 
@@ -519,23 +524,23 @@ _trap_handler:
 
 	/* Swap TP and MSCRATCH */
 	csrrw	tp, CSR_MSCRATCH, tp
+.endm
 
+.macro	TRAP_SAVE_MEPC_MSTATUS have_mstatush
 	/* Save MEPC and MSTATUS CSRs */
 	csrr	t0, CSR_MEPC
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
 	csrr	t0, CSR_MSTATUS
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
-	REG_S	zero, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
-#if __riscv_xlen == 32
-	csrr	t0, CSR_MISA
-	srli	t0, t0, ('H' - 'A')
-	andi	t0, t0, 0x1
-	beq	t0, zero, _skip_mstatush_save
+	.if \have_mstatush
 	csrr	t0, CSR_MSTATUSH
 	REG_S	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
-_skip_mstatush_save:
-#endif
+	.else
+	REG_S	zero, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+	.endif
+.endm
 
+.macro	TRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0
 	/* Save all general regisers except SP and T0 */
 	REG_S	zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
 	REG_S	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
@@ -567,11 +572,15 @@ _skip_mstatush_save:
 	REG_S	t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
 	REG_S	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
 	REG_S	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
+.endm
 
+.macro	TRAP_CALL_C_ROUTINE
 	/* Call C routine */
 	add	a0, sp, zero
 	call	sbi_trap_handler
+.endm
 
+.macro	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
 	/* Restore all general regisers except SP and T0 */
 	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
 	REG_L	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
@@ -602,30 +611,70 @@ _skip_mstatush_save:
 	REG_L	t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
 	REG_L	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
 	REG_L	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
+.endm
 
+.macro	TRAP_RESTORE_MEPC_MSTATUS have_mstatush
 	/* Restore MEPC and MSTATUS CSRs */
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
 	csrw	CSR_MEPC, t0
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
 	csrw	CSR_MSTATUS, t0
-#if __riscv_xlen == 32
-	csrr	t0, CSR_MISA
-	srli	t0, t0, ('H' - 'A')
-	andi	t0, t0, 0x1
-	beq	t0, zero, _skip_mstatush_restore
+	.if \have_mstatush
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
 	csrw	CSR_MSTATUSH, t0
-_skip_mstatush_restore:
-#endif
+	.endif
+.endm
 
+.macro TRAP_RESTORE_SP_T0
 	/* Restore T0 */
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
 
 	/* Restore SP */
 	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
+.endm
+
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl _trap_handler
+_trap_handler:
+	TRAP_SAVE_AND_SETUP_SP_T0
+
+	TRAP_SAVE_MEPC_MSTATUS 0
+
+	TRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_CALL_C_ROUTINE
+
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_RESTORE_MEPC_MSTATUS 0
+
+	TRAP_RESTORE_SP_T0
 
 	mret
 
+#if __riscv_xlen == 32
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl _trap_handler_rv32_hyp
+_trap_handler_rv32_hyp:
+	TRAP_SAVE_AND_SETUP_SP_T0
+
+	TRAP_SAVE_MEPC_MSTATUS 1
+
+	TRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_CALL_C_ROUTINE
+
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_RESTORE_MEPC_MSTATUS 1
+
+	TRAP_RESTORE_SP_T0
+
+	mret
+#endif
+
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _reset_regs

From 8d2edc4fc957588e23d09c8f567a94cd737405d3 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 21 Nov 2020 11:28:39 +0530
Subject: [PATCH 0693/1765] lib: sbi: Fix sbi_hart_switch_mode() for u-mode

We should check and access N-extension CSRs in sbi_hart_switch_mode()
when next_mode is u-mode because N-extension is optional.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 30d8aefe0ae..fc86e9f31fc 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -522,9 +522,11 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 		csr_write(CSR_SIE, 0);
 		csr_write(CSR_SATP, 0);
 	} else if (next_mode == PRV_U) {
-		csr_write(CSR_UTVEC, next_addr);
-		csr_write(CSR_USCRATCH, 0);
-		csr_write(CSR_UIE, 0);
+		if (misa_extension('N')) {
+			csr_write(CSR_UTVEC, next_addr);
+			csr_write(CSR_USCRATCH, 0);
+			csr_write(CSR_UIE, 0);
+		}
 	}
 
 	register unsigned long a0 asm("a0") = arg0;

From 3d921fad0dc4c815b6be9c92df3df00a8b6439ef Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Nov 2020 09:31:39 +0530
Subject: [PATCH 0694/1765] lib: sbi: Fix typo in sbi_domain_finalize()

There has been typo in automatic domain boot hart startup
for non-root domains so this patch fixes it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_domain.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index d4b82fed35f..4c98a1bf362 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -404,12 +404,12 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 		dhart = dom->boot_hartid;
 
 		/* Ignore if boot HART not possible for this domain */
-		if (!sbi_hartmask_test_hart(i, dom->possible_harts))
+		if (!sbi_hartmask_test_hart(dhart, dom->possible_harts))
 			continue;
 
 		/* Ignore if boot HART assigned different domain */
 		if (sbi_hartid_to_domain(dhart) != dom ||
-		    !sbi_hartmask_test_hart(i, &dom->assigned_harts))
+		    !sbi_hartmask_test_hart(dhart, &dom->assigned_harts))
 			continue;
 
 		/* Startup boot HART of domain */

From 4e370224dff1a3e9886165dd7b429016d8907c5f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 20 Nov 2020 10:17:38 +0530
Subject: [PATCH 0695/1765] lib: sbi: Fix domain_count check in
 sbi_domain_finalize()

The domain_count check in sbi_domain_finalize() for newly discovered
domain is incorrect and should be reversed.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4c98a1bf362..ac920b8d53f 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -371,7 +371,7 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 			 * Ensure that we have room for Domain Index to
 			 * HART ID mapping
 			 */
-			if (domain_count <= SBI_DOMAIN_MAX_INDEX)
+			if (SBI_DOMAIN_MAX_INDEX <= domain_count)
 				return SBI_ENOSPC;
 
 			/* Sanitize discovered domain */

From c709d40a671f38bf956532a8d573c14d327d66e5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 11 Nov 2020 10:43:11 +0530
Subject: [PATCH 0696/1765] lib: sbi: Auto start domain only if boot HART
 within limits

The sbi_domain_finalize() should auto start a domain only if the
boot HART is withing limits (i.e. less than SBI_HARTMASK_MAX_BITS).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_domain.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index ac920b8d53f..ecb098c958c 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -403,6 +403,10 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 		/* Domain boot HART */
 		dhart = dom->boot_hartid;
 
+		/* Ignore of boot HART is off limits */
+		if (SBI_HARTMASK_MAX_BITS <= dhart)
+			continue;
+
 		/* Ignore if boot HART not possible for this domain */
 		if (!sbi_hartmask_test_hart(dhart, dom->possible_harts))
 			continue;

From c1f6d8967889438638618e1d1f5615d7b2344454 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 15 Nov 2020 11:46:20 +0530
Subject: [PATCH 0697/1765] include: sbi: Use lower bits for domain memory
 region permissions

We should use lower bits for domain memory region access permissions
and higher bits for other domain memory region attributes. This helps
us use same bit assignment for parsing domain memory region access
permissions from device tree.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_domain.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 6f90b26cd85..a7cb61e9e33 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -39,8 +39,10 @@ struct sbi_domain_memregion {
 #define SBI_DOMAIN_MEMREGION_READABLE		(1UL << 0)
 #define SBI_DOMAIN_MEMREGION_WRITEABLE		(1UL << 1)
 #define SBI_DOMAIN_MEMREGION_EXECUTABLE		(1UL << 2)
-#define SBI_DOMAIN_MEMREGION_MMIO		(1UL << 3)
-#define SBI_DOMAIN_MEMREGION_MMODE		(1UL << 4)
+#define SBI_DOMAIN_MEMREGION_MMODE		(1UL << 3)
+#define SBI_DOMAIN_MEMREGION_ACCESS_MASK	(0xfUL)
+
+#define SBI_DOMAIN_MEMREGION_MMIO		(1UL << 31)
 	unsigned long flags;
 };
 

From 62ea4f4e2a107e4f35661cb24673e6d3d24d9dbd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 15 Nov 2020 13:30:29 +0530
Subject: [PATCH 0698/1765] lib: sbi: Override domain boot HART when coldboot
 HART assigned to it

If coldboot HART is assigned to a domain then we should use coldboot
HART as the boot HART of the domain. This allows coldboot HART to
continue boot sequence even when it is assigned to some non-root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_domain.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index ecb098c958c..1b50604f364 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -395,6 +395,17 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 						&tdom->assigned_harts);
 			hartid_to_domain_table[i] = dom;
 			sbi_hartmask_set_hart(i, &dom->assigned_harts);
+
+			/*
+			 * If cold boot HART is assigned to this domain then
+			 * override boot HART of this domain.
+			 */
+			if (i == cold_hartid &&
+			    dom->boot_hartid != cold_hartid) {
+				sbi_printf("Domain%d Boot HARTID forced to"
+					   " %d\n", dom->index, cold_hartid);
+				dom->boot_hartid = cold_hartid;
+			}
 		}
 	}
 

From 555e73778add1f1bc85011f98b3210c7103d60a5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 15 Nov 2020 15:11:21 +0530
Subject: [PATCH 0699/1765] lib: sbi: Add error prints in sbi_domain_finalize()

We add error prints in sbi_domain_finalize() and sanitize_domain()
to help debug domain configuration issues.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_domain.c | 63 ++++++++++++++++++++++++++++++++++++--------
 1 file changed, 52 insertions(+), 11 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 1b50604f364..639e016179a 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -174,19 +174,33 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	struct sbi_domain_memregion treg, *reg, *reg1;
 
 	/* Check possible HARTs */
-	if (!dom->possible_harts)
+	if (!dom->possible_harts) {
+		sbi_printf("%s: %s possible HART mask is NULL\n",
+			   __func__, dom->name);
 		return SBI_EINVAL;
+	}
 	sbi_hartmask_for_each_hart(i, dom->possible_harts) {
-		if (sbi_platform_hart_invalid(plat, i))
+		if (sbi_platform_hart_invalid(plat, i)) {
+			sbi_printf("%s: %s possible HART mask has invalid "
+				   "hart %d\n", __func__, dom->name, i);
 			return SBI_EINVAL;
+		}
 	};
 
 	/* Check memory regions */
-	if (!dom->regions)
+	if (!dom->regions) {
+		sbi_printf("%s: %s regions is NULL\n",
+			   __func__, dom->name);
 		return SBI_EINVAL;
+	}
 	sbi_domain_for_each_memregion(dom, reg) {
-		if (!is_region_valid(reg))
+		if (!is_region_valid(reg)) {
+			sbi_printf("%s: %s has invalid region base=0x%lx "
+				   "order=%lu flags=0x%lx\n", __func__,
+				   dom->name, reg->base, reg->order,
+				   reg->flags);
 			return SBI_EINVAL;
+		}
 	}
 
 	/* Count memory regions and check presence of firmware region */
@@ -199,8 +213,11 @@ static int sanitize_domain(const struct sbi_platform *plat,
 			have_fw_reg = TRUE;
 		count++;
 	}
-	if (!have_fw_reg)
+	if (!have_fw_reg) {
+		sbi_printf("%s: %s does not have firmware region\n",
+			   __func__, dom->name);
 		return SBI_EINVAL;
+	}
 
 	/* Sort the memory regions */
 	for (i = 0; i < (count - 1); i++) {
@@ -208,8 +225,15 @@ static int sanitize_domain(const struct sbi_platform *plat,
 		for (j = i + 1; j < count; j++) {
 			reg1 = &dom->regions[j];
 
-			if (is_region_conflict(reg1, reg))
+			if (is_region_conflict(reg1, reg)) {
+				sbi_printf("%s: %s conflict between regions "
+					"(base=0x%lx order=%lu flags=0x%lx) and "
+					"(base=0x%lx order=%lu flags=0x%lx)\n",
+					__func__, dom->name,
+					reg->base, reg->order, reg->flags,
+					reg1->base, reg1->order, reg1->flags);
 				return SBI_EINVAL;
+			}
 
 			if (!is_region_before(reg1, reg))
 				continue;
@@ -233,13 +257,19 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	 * protect M-mode context and enforce checks on memory accesses.
 	 */
 	if (dom->next_mode != PRV_S &&
-	    dom->next_mode != PRV_U)
+	    dom->next_mode != PRV_U) {
+		sbi_printf("%s: %s invalid next booting stage mode 0x%lx\n",
+			   __func__, dom->name, dom->next_mode);
 		return SBI_EINVAL;
+	}
 
 	/* Check next address and next mode*/
 	if (!sbi_domain_check_addr(dom, dom->next_addr, dom->next_mode,
-				   SBI_DOMAIN_EXECUTE))
+				   SBI_DOMAIN_EXECUTE)) {
+		sbi_printf("%s: %s next booting stage addres 0x%lx can't "
+			   "execute\n", __func__, dom->name, dom->next_addr);
 		return SBI_EINVAL;
+	}
 
 	return 0;
 }
@@ -371,13 +401,20 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 			 * Ensure that we have room for Domain Index to
 			 * HART ID mapping
 			 */
-			if (SBI_DOMAIN_MAX_INDEX <= domain_count)
+			if (SBI_DOMAIN_MAX_INDEX <= domain_count) {
+				sbi_printf("%s: No room for %s\n",
+					   __func__, dom->name);
 				return SBI_ENOSPC;
+			}
 
 			/* Sanitize discovered domain */
 			rc = sanitize_domain(plat, dom);
-			if (rc)
+			if (rc) {
+				sbi_printf("%s: sanity checks failed for"
+					   " %s (error %d)\n", __func__,
+					   dom->name, rc);
 				return rc;
+			}
 
 			/* Assign index to domain */
 			dom->index = domain_count++;
@@ -437,8 +474,12 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 						dom->next_addr,
 						dom->next_mode,
 						dom->next_arg1);
-			if (rc)
+			if (rc) {
+				sbi_printf("%s: failed to start boot HART %d"
+					   " for %s (error %d)\n", __func__,
+					   dhart, dom->name, rc);
 				return rc;
+			}
 		}
 	}
 

From 9b65dcaedd737b36c21cd9ff585585c188a92b41 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 20 Nov 2020 16:42:15 +0530
Subject: [PATCH 0700/1765] include: sbi: Add domains_init() platform operation

We introduce domains_init() platform operation which can be used by
platform support to initialize/populate domains in the coldboot path.

The domains_init() is called late in the coldboot sequence from the
sbi_domain_finalize() so sbi_printf() can be used by platform support
to print errors/warnings at time of populating domains.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 16 ++++++++++++++++
 lib/sbi/sbi_domain.c       |  8 ++++++++
 2 files changed, 24 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index ee723233bde..3681a78e47a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -91,6 +91,8 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
+	/** Initialize (or populate) domains for the platform */
+	int (*domains_init)(void);
 	/** Get domain pointer for given HART id */
 	struct sbi_domain *(*domain_get)(u32 hartid);
 
@@ -451,6 +453,20 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
+/**
+ * Initialize (or populate) domains for the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_domains_init(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->domains_init)
+		return sbi_platform_ops(plat)->domains_init();
+	return 0;
+}
+
 /**
  * Get domain pointer for given HART
  *
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 639e016179a..1a3651ba310 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -375,6 +375,14 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 	struct sbi_domain *dom, *tdom;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	/* Initialize domains for the platform */
+	rc = sbi_platform_domains_init(plat);
+	if (rc) {
+		sbi_printf("%s: platform domains_init() failed (error %d)\n",
+			   __func__, rc);
+		return rc;
+	}
+
 	/* Discover domains */
 	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 		/* Ignore invalid HART */

From c0d2baa8c0be532ff0ce77946cc44cdf4de92669 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 15 Nov 2020 15:37:21 +0530
Subject: [PATCH 0701/1765] docs: Add domain device tree binding documentation

This patch adds domain device tree binding documentation in the
OpenSBI domain support documentation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/domain_support.md | 208 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 208 insertions(+)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 04989df273d..73931f1da70 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -104,3 +104,211 @@ Few noteworthy effects of a system partitioned into domains are as follows:
   only work if both HART A and HART B are assigned same domain
 * A HART running in S-mode or U-mode can only access memory based on the
   memory regions of the domain assigned to the HART
+
+Domain Device Tree Bindings
+---------------------------
+
+The OpenSBI domains can be described in the **device tree (DT) blob** (or
+flattened device tree) passed to the OpenSBI firmwares by the previous
+booting stage. This allows OpenSBI platform support to parse and populate
+OpenSBI domains from the device tree blob (or flattened device tree).
+
+### Domain Configuration Node
+
+All OpenSBI domain description related DT nodes should be under the domain
+configuration DT node. The **/chosen** DT node is the preferred parent of
+the domain configuration DT node.
+
+The DT properties of a domain configuration DT node are as follows:
+
+* **compatible** (Mandatory) - The compatible string of the domain
+  configuration. This DT property should have value *"opensbi,domain,config"*
+
+### Domain Memory Region Node
+
+The domain memory region DT node describes details of a memory region and
+can be pointed by multiple domain instance DT nodes. The access permissions
+of the memory region are specified separately in domain instance node.
+
+The DT properties of a domain memory region DT node are as follows:
+
+* **compatible** (Mandatory) - The compatible string of the domain memory
+  region. This DT property should have value *"opensbi,domain,memregion"*
+* **base** (Mandatory) - The base address of the domain memory region. This
+  DT property should have a **2 ^ order** aligned 64 bit address (i.e. two
+  DT cells).
+* **order** (Mandatory) - The order of the domain memory region. This DT
+  property should have a 32 bit value (i.e. one DT cell) in the range
+  **3 <= order <= __riscv_xlen**.
+* **mmio** (Optional) - A boolean flag representing whether the domain
+  memory region is a memory-mapped I/O (MMIO) region.
+* **devices** (Optional) - The list of device DT node phandles for devices
+  which fall under this domain memory region.
+
+### Domain Instance Node
+
+The domain instance DT node describes set of possible HARTs, set of memory
+regions, and other details of a domain instance.
+
+The DT properties of a domain instance DT node are as follows:
+
+* **compatible** (Mandatory) - The compatible string of the domain instance.
+  This DT property should have value *"opensbi,domain,instance"*
+* **possible-harts** (Optional) - The list of CPU DT node phandles for the
+  the domain instance. This list represents the possible HARTs of the
+  domain instance.
+* **regions** (Optional) - The list of domain memory region DT node phandle
+  and access permissions for the domain instance. Each list entry is a pair
+  of DT node phandle and access permissions. The access permissions are
+  represented as a 32bit bitmask having bits: **readable** (BIT[0]),
+  **writeable** (BIT[1]), **executable** (BIT[2]), and **m-mode** (BIT[3]).
+* **boot-hart** (Optional) - The DT node phandle of the HART booting the
+  domain instance. If coldboot HART is assigned to the domain instance then
+  this DT property is ignored and the coldboot HART is assumed to be the
+  boot HART of the domain instance.
+* **next-arg1** (Optional) - The 64 bit next booting stage arg1 for the
+  domain instance. If this DT property is not available and coldboot HART
+  is not assigned to the domain instance then **0x0** is used as default
+  value. If this DT property is not available and coldboot HART is assigned
+  to the domain instance then **next booting stage arg1 of coldboot HART**
+  is used as default value.
+* **next-addr** (Optional) - The 64 bit next booting stage address for the
+  domain instance. If this DT property is not available and coldboot HART
+  is not assigned to the domain instance then **0x0** is used as default
+  value. If this DT property is not available and coldboot HART is assigned
+  to the domain instance then **next booting stage address of coldboot HART**
+  is used as default value.
+* **next-mode** (Optional) - The 32 bit next booting stage mode for the
+  domain instance. The possible values of this DT property are: **0x1**
+  (s-mode), and **0x0** (u-mode). If this DT property is not available
+  and coldboot HART is not assigned to the domain instance then **0x1**
+  is used as default value. If this DT property is not available and
+  coldboot HART is assigned to the domain instance then **next booting
+  stage mode of coldboot HART** is used as default value.
+* **system-reset-allowed** (Optional) - A boolean flag representing
+  whether the domain instance is allowed to do system reset.
+
+### Assigning HART To Domain Instance
+
+By default, all HARTs are assigned to **the ROOT domain**. The OpenSBI
+platform support can provide the HART to domain instance assignment using
+platform specific callback.
+
+The HART to domain instance assignment can be parsed from the device tree
+using optional DT property **opensbi,domain** in each CPU DT node. The
+value of DT property **opensbi,domain** is the DT phandle of the domain
+instance DT node. If **opensbi,domain** DT property is not specified then
+corresponding HART is assigned to **the ROOT domain**.
+
+### Domain Configuration Only Accessible to OpenSBI
+
+The software running inside a domain instance should only be aware of
+devices and hardware resources accessible to itself.
+
+To hide domain configuration from domain instances, the following should
+be done:
+
+* The previous booting stage should preferably provide a separate device
+  tree for each domain instance and mention location of device tree in
+  respective domain instance DT nodes using **next-arg1** DT property.
+* If domain assigned to a HART does not have separate device tree then
+  OpenSBI platform support should remove all domain configuration details
+  from the device tree passed by previous booting stage before passing it
+  to the next booting stage.
+
+### Example
+
+```
+    chosen {
+        opensbi-domains {
+            compatible = "opensbi,domain,config";
+
+            tmem: tmem {
+                compatible = "opensbi,domain,memregion";
+                base = <0x0 0x80100000>;
+                order = <20>;
+            };
+
+            tuart: tuart {
+                compatible = "opensbi,domain,memregion";
+                base = <0x0 0x10011000>;
+                order = <12>;
+                mmio;
+                devices = <&uart1>;
+            };
+
+            allmem: allmem {
+                compatible = "opensbi,domain,memregion";
+                base = <0x0 0x0>;
+                order = <64>;
+            };
+
+            tdomain: trusted-domain {
+                compatible = "opensbi,domain,instance";
+                possible-harts = <&cpu0>;
+                regions = <&tmem 0x7>, <&tuart 0x7>;
+                boot-hart = <&cpu0>;
+                next-arg1 = <0x0 0x0>;
+                next-addr = <0x0 0x80100000>;
+                next-mode = <0x0>;
+                system-reset-allowed;
+            };
+
+            udomain: untrusted-domain {
+                compatible = "opensbi,domain,instance";
+                possible-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
+                regions = <&tmem 0x0>, <&tuart 0x0>, <&allmem 0x7>;
+            };
+        };
+    };
+
+    cpus {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        timebase-frequency = <10000000>;
+
+        cpu0: cpu@0 {
+            device_type = "cpu";
+            reg = <0x00>;
+            compatible = "riscv";
+            opensbi-domain = <&tdomain>;
+            ...
+        };
+
+        cpu1: cpu@1 {
+            device_type = "cpu";
+            reg = <0x01>;
+            compatible = "riscv";
+            opensbi-domain = <&udomain>;
+            ...
+        };
+
+        cpu2: cpu@2 {
+            device_type = "cpu";
+            reg = <0x02>;
+            compatible = "riscv";
+            opensbi-domain = <&udomain>;
+            ...
+        };
+
+        cpu3: cpu@3 {
+            device_type = "cpu";
+            reg = <0x03>;
+            compatible = "riscv";
+            opensbi-domain = <&udomain>;
+            ...
+        };
+
+        cpu4: cpu@4 {
+            device_type = "cpu";
+            reg = <0x04>;
+            compatible = "riscv";
+            opensbi-domain = <&udomain>;
+            ...
+        };
+    };
+
+    uart1: serial@10011000 {
+        ...
+    };
+```

From ba741ea0ad01314be916f9095384c31c6ccfa363 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 18 Nov 2020 16:40:21 +0530
Subject: [PATCH 0702/1765] lib: utils: Add helper routines to populate domains
 from FDT

We add various helper routines to populate domains, iterate domains,
iterate domain memregions, and parse HART to domain assignment from
the FDT.

These helper routines can be used by platform support code and FDT
fixup code.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_domain.h |  80 ++++++
 lib/utils/fdt/fdt_domain.c         | 445 +++++++++++++++++++++++++++++
 lib/utils/fdt/objects.mk           |   1 +
 3 files changed, 526 insertions(+)
 create mode 100644 include/sbi_utils/fdt/fdt_domain.h
 create mode 100644 lib/utils/fdt/fdt_domain.c

diff --git a/include/sbi_utils/fdt/fdt_domain.h b/include/sbi_utils/fdt/fdt_domain.h
new file mode 100644
index 00000000000..3c02d56d740
--- /dev/null
+++ b/include/sbi_utils/fdt/fdt_domain.h
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_domain.c - Flat Device Tree Domain helper routines
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_DOMAIN_H__
+#define __FDT_DOMAIN_H__
+
+#include <sbi/sbi_types.h>
+
+struct sbi_domain;
+
+/**
+ * Iterate over each domains in device tree
+ *
+ * @param fdt device tree blob
+ * @param opaque private pointer for each iteration
+ * @param fn callback function for each iteration
+ */
+void fdt_iterate_each_domain(void *fdt, void *opaque,
+			     void (*fn)(void *fdt, int domain_offset,
+					void *opaque));
+
+/**
+ * Iterate over each memregion of a domain in device tree
+ *
+ * @param fdt device tree blob
+ * @param domain_offset domain DT node offset
+ * @param opaque private pointer for each iteration
+ * @param fn callback function for each iteration
+ */
+void fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
+				void (*fn)(void *fdt, int domain_offset,
+					   int region_offset, u32 region_access,
+					   void *opaque));
+
+/**
+ * Fix up the domain configuration in the device tree
+ *
+ * This routine:
+ * 1. Disables MMIO devices not accessible to the coldboot HART domain
+ * 2. Removes "opensbi-domain" DT property from CPU DT nodes
+ * 3. Removes domain configuration DT node under /chosen DT node
+ *
+ * It is recommended that platform support call this function in
+ * their final_init() platform operation.
+ *
+ * @param fdt device tree blob
+ */
+void fdt_domain_fixup(void *fdt);
+
+/**
+ * Get domain instance for given HART
+ *
+ * Note: Domains should be populated before using this function.
+ *
+ * @param hartid the HART for which domain instance is needed
+ *
+ * @return pointer to domain instance on success and NULL on failure
+ */
+struct sbi_domain *fdt_domain_get(u32 hartid);
+
+/**
+ * Populate domains from device tree
+ *
+ * It is recommended that platform support call this function in
+ * their domains_init() platform operation.
+ *
+ * @param fdt device tree blob
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int fdt_domains_populate(void *fdt);
+
+#endif /* __FDT_DOMAIN_H__ */
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
new file mode 100644
index 00000000000..972a1f4bb41
--- /dev/null
+++ b/lib/utils/fdt/fdt_domain.c
@@ -0,0 +1,445 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_domain.c - Flat Device Tree Domain helper routines
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_domain.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+void fdt_iterate_each_domain(void *fdt, void *opaque,
+			     void (*fn)(void *fdt, int domain_offset,
+					void *opaque))
+{
+	int doffset, poffset;
+
+	if (!fdt || !fn)
+		return;
+
+	poffset = fdt_path_offset(fdt, "/chosen");
+	if (poffset < 0)
+		return;
+	poffset = fdt_node_offset_by_compatible(fdt, poffset,
+						"opensbi,domain,config");
+	if (poffset < 0)
+		return;
+
+	fdt_for_each_subnode(doffset, fdt, poffset) {
+		if (fdt_node_check_compatible(fdt, doffset,
+					      "opensbi,domain,instance"))
+			continue;
+
+		fn(fdt, doffset, opaque);
+	}
+}
+
+void fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
+				void (*fn)(void *fdt, int domain_offset,
+					   int region_offset, u32 region_access,
+					   void *opaque))
+{
+	u32 i, rcount;
+	int len, region_offset;
+	const u32 *regions;
+
+	if (!fdt || (domain_offset < 0) || !fn)
+		return;
+
+	if (fdt_node_check_compatible(fdt, domain_offset,
+				      "opensbi,domain,instance"))
+		return;
+
+	regions = fdt_getprop(fdt, domain_offset, "regions", &len);
+	if (!regions)
+		return;
+
+	rcount = (u32)len / (sizeof(u32) * 2);
+	for (i = 0; i < rcount; i++) {
+		region_offset = fdt_node_offset_by_phandle(fdt,
+						fdt32_to_cpu(regions[2 * i]));
+		if (region_offset < 0)
+			continue;
+
+		if (fdt_node_check_compatible(fdt, region_offset,
+					      "opensbi,domain,memregion"))
+			continue;
+
+		fn(fdt, domain_offset, region_offset,
+		   fdt32_to_cpu(regions[(2 * i) + 1]), opaque);
+	}
+}
+
+struct __fixup_find_domain_offset_info {
+	const char *name;
+	int *doffset;
+};
+
+static void __fixup_find_domain_offset(void *fdt, int doff, void *p)
+{
+	struct __fixup_find_domain_offset_info *fdo = p;
+
+	if (sbi_strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
+		return;
+
+	*fdo->doffset = doff;
+}
+
+#define DISABLE_DEVICES_MASK	(SBI_DOMAIN_MEMREGION_READABLE | \
+				 SBI_DOMAIN_MEMREGION_WRITEABLE | \
+				 SBI_DOMAIN_MEMREGION_EXECUTABLE)
+
+static void __fixup_count_disable_devices(void *fdt, int doff, int roff,
+					  u32 perm, void *p)
+{
+	int len;
+	u32 *dcount = p;
+
+	if (perm & DISABLE_DEVICES_MASK)
+		return;
+
+	len = 0;
+	if (fdt_getprop(fdt, roff, "devices", &len))
+		*dcount += len / sizeof(u32);
+}
+
+static void __fixup_disable_devices(void *fdt, int doff, int roff,
+				    u32 raccess, void *p)
+{
+	int i, len, coff;
+	const u32 *devices;
+
+	if (raccess & DISABLE_DEVICES_MASK)
+		return;
+
+	len = 0;
+	devices = fdt_getprop(fdt, roff, "devices", &len);
+	if (!devices)
+		return;
+	len = len / sizeof(u32);
+
+	for (i = 0; i < len; i++) {
+		coff = fdt_node_offset_by_phandle(fdt,
+					fdt32_to_cpu(devices[i]));
+		if (coff < 0)
+			continue;
+
+		fdt_setprop_string(fdt, coff, "status", "disabled");
+	}
+}
+
+void fdt_domain_fixup(void *fdt)
+{
+	u32 i, dcount;
+	int err, poffset, doffset;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	struct __fixup_find_domain_offset_info fdo;
+
+	/* Remove the domain assignment DT property from CPU DT nodes */
+	poffset = fdt_path_offset(fdt, "/cpus");
+	if (poffset < 0)
+		return;
+	fdt_for_each_subnode(doffset, fdt, poffset) {
+		err = fdt_parse_hart_id(fdt, doffset, &i);
+		if (err)
+			continue;
+
+		fdt_nop_property(fdt, doffset, "opensbi-domain");
+	}
+
+	/* Skip device disable for root domain */
+	if (!dom->index)
+		goto skip_device_disable;
+
+	/* Find current domain DT node */
+	doffset = -1;
+	fdo.name = dom->name;
+	fdo.doffset = &doffset;
+	fdt_iterate_each_domain(fdt, &fdo, __fixup_find_domain_offset);
+	if (doffset < 0)
+		goto skip_device_disable;
+
+	/* Count current domain device DT nodes to be disabled */
+	dcount = 0;
+	fdt_iterate_each_memregion(fdt, doffset, &dcount,
+				   __fixup_count_disable_devices);
+	if (!dcount)
+		goto skip_device_disable;
+
+	/* Expand FDT based on device DT nodes to be disabled */
+	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + dcount * 32);
+	if (err < 0)
+		return;
+
+	/* Again find current domain DT node */
+	doffset = -1;
+	fdo.name = dom->name;
+	fdo.doffset = &doffset;
+	fdt_iterate_each_domain(fdt, &fdo, __fixup_find_domain_offset);
+	if (doffset < 0)
+		goto skip_device_disable;
+
+	/* Disable device DT nodes for current domain */
+	fdt_iterate_each_memregion(fdt, doffset, NULL,
+				   __fixup_disable_devices);
+skip_device_disable:
+
+	/* Remove the OpenSBI domain config DT node */
+	poffset = fdt_path_offset(fdt, "/chosen");
+	if (poffset < 0)
+		return;
+	poffset = fdt_node_offset_by_compatible(fdt, poffset,
+						"opensbi,domain,config");
+	if (poffset < 0)
+		return;
+	fdt_nop_node(fdt, poffset);
+}
+
+static struct sbi_domain *fdt_hartid_to_domain[SBI_HARTMASK_MAX_BITS];
+
+#define FDT_DOMAIN_MAX_COUNT		8
+#define FDT_DOMAIN_REGION_MAX_COUNT	16
+
+static u32 fdt_domains_count;
+static struct sbi_domain fdt_domains[FDT_DOMAIN_MAX_COUNT];
+static struct sbi_hartmask fdt_masks[FDT_DOMAIN_MAX_COUNT];
+static struct sbi_domain_memregion
+	fdt_regions[FDT_DOMAIN_MAX_COUNT][FDT_DOMAIN_REGION_MAX_COUNT + 2];
+
+struct sbi_domain *fdt_domain_get(u32 hartid)
+{
+	if (SBI_HARTMASK_MAX_BITS <= hartid)
+		return NULL;
+	return fdt_hartid_to_domain[hartid];
+}
+
+static void __fdt_parse_region(void *fdt, int domain_offset,
+			       int region_offset, u32 region_access,
+			       void *opaque)
+{
+	int len;
+	u32 val32;
+	u64 val64;
+	const u32 *val;
+	u32 *region_count = opaque;
+	struct sbi_domain_memregion *region;
+
+	/* Find next region of the domain */
+	if (FDT_DOMAIN_REGION_MAX_COUNT <= *region_count)
+		return;
+	region = &fdt_regions[fdt_domains_count][*region_count];
+
+	/* Read "base" DT property */
+	val = fdt_getprop(fdt, region_offset, "base", &len);
+	if (!val && len >= 8)
+		return;
+	val64 = fdt32_to_cpu(val[0]);
+	val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
+	region->base = val64;
+
+	/* Read "order" DT property */
+	val = fdt_getprop(fdt, region_offset, "order", &len);
+	if (!val && len >= 4)
+		return;
+	val32 = fdt32_to_cpu(*val);
+	if (val32 < 3 || __riscv_xlen < val32)
+		return;
+	region->order = val32;
+
+	/* Read "mmio" DT property */
+	region->flags = region_access & SBI_DOMAIN_MEMREGION_ACCESS_MASK;
+	if (fdt_get_property(fdt, region_offset, "mmio", NULL))
+		region->flags |= SBI_DOMAIN_MEMREGION_MMIO;
+
+	(*region_count)++;
+}
+
+static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
+{
+	u32 val32;
+	u64 val64;
+	const u32 *val;
+	struct sbi_domain *dom;
+	struct sbi_hartmask *mask;
+	int i, err, len, cpu_offset;
+	int *cold_domain_offset = opaque;
+	struct sbi_domain_memregion *regions;
+
+	/* Sanity check on maximum domains we can handle */
+	if (FDT_DOMAIN_MAX_COUNT <= fdt_domains_count)
+		return;
+	dom = &fdt_domains[fdt_domains_count];
+	mask = &fdt_masks[fdt_domains_count];
+	regions = &fdt_regions[fdt_domains_count][0];
+
+	/* Read DT node name */
+	sbi_strncpy(dom->name, fdt_get_name(fdt, domain_offset, NULL),
+		    sizeof(dom->name));
+	dom->name[sizeof(dom->name) - 1] = '\0';
+
+	/* Setup possible HARTs mask */
+	SBI_HARTMASK_INIT(mask);
+	dom->possible_harts = mask;
+	val = fdt_getprop(fdt, domain_offset, "possible-harts", &len);
+	len = len / sizeof(u32);
+	if (val && len) {
+		for (i = 0; i < len; i++) {
+			cpu_offset = fdt_node_offset_by_phandle(fdt,
+							fdt32_to_cpu(val[i]));
+			if (cpu_offset < 0)
+				continue;
+
+			err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
+			if (err)
+				continue;
+
+			sbi_hartmask_set_hart(val32, mask);
+		}
+	}
+
+	/* Setup memregions from DT */
+	val32 = 0;
+	sbi_memset(regions, 0,
+		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 2));
+	dom->regions = regions;
+	fdt_iterate_each_memregion(fdt, domain_offset, &val32,
+				   __fdt_parse_region);
+	sbi_domain_memregion_initfw(&regions[val32]);
+
+	/* Read "boot-hart" DT property */
+	val32 = -1U;
+	val = fdt_getprop(fdt, domain_offset, "boot-hart", &len);
+	if (val && len >= 4) {
+		cpu_offset = fdt_node_offset_by_phandle(fdt,
+							 fdt32_to_cpu(*val));
+		if (cpu_offset >= 0)
+			fdt_parse_hart_id(fdt, cpu_offset, &val32);
+	} else {
+		if (domain_offset == *cold_domain_offset)
+			val32 = current_hartid();
+	}
+	dom->boot_hartid = val32;
+
+	/* Read "next-arg1" DT property */
+	val64 = 0;
+	val = fdt_getprop(fdt, domain_offset, "next-arg1", &len);
+	if (val && len >= 8) {
+		val64 = fdt32_to_cpu(val[0]);
+		val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
+	} else {
+		if (domain_offset == *cold_domain_offset)
+			val64 = sbi_scratch_thishart_ptr()->next_arg1;
+	}
+	dom->next_arg1 = val64;
+
+	/* Read "next-addr" DT property */
+	val64 = 0;
+	val = fdt_getprop(fdt, domain_offset, "next-addr", &len);
+	if (val && len >= 8) {
+		val64 = fdt32_to_cpu(val[0]);
+		val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
+	} else {
+		if (domain_offset == *cold_domain_offset)
+			val64 = sbi_scratch_thishart_ptr()->next_addr;
+	}
+	dom->next_addr = val64;
+
+	/* Read "next-mode" DT property */
+	val32 = 0x1;
+	val = fdt_getprop(fdt, domain_offset, "next-mode", &len);
+	if (val && len >= 4) {
+		val32 = fdt32_to_cpu(val[0]);
+		if (val32 != 0x0 && val32 != 0x1)
+			val32 = 0x1;
+	} else {
+		if (domain_offset == *cold_domain_offset)
+			val32 = sbi_scratch_thishart_ptr()->next_mode;
+	}
+	dom->next_mode = val32;
+
+	/* Read "system-reset-allowed" DT property */
+	if (fdt_get_property(fdt, domain_offset,
+			     "system-reset-allowed", NULL))
+		dom->system_reset_allowed = TRUE;
+	else
+		dom->system_reset_allowed = FALSE;
+
+	/* Increment domains count */
+	fdt_domains_count++;
+}
+
+int fdt_domains_populate(void *fdt)
+{
+	const u32 *val;
+	int cold_domain_offset;
+	u32 i, hartid, cold_hartid;
+	int err, len, cpus_offset, cpu_offset, domain_offset;
+
+	/* Sanity checks */
+	if (!fdt)
+		return SBI_EINVAL;
+
+	/* Find /cpus DT node */
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	/* Find coldboot HART domain DT node offset */
+	cold_domain_offset = -1;
+	cold_hartid = current_hartid();
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			continue;
+
+		if (hartid != cold_hartid)
+			continue;
+
+		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
+		if (val && len >= 4)
+			cold_domain_offset = fdt_node_offset_by_phandle(fdt,
+							   fdt32_to_cpu(*val));
+
+		break;
+	}
+
+	/* Iterate over each domain in FDT and populate details */
+	fdt_iterate_each_domain(fdt, &cold_domain_offset, __fdt_parse_domain);
+
+	/* HART to domain assignment based on CPU DT nodes*/
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
+		if (!val || len < 4)
+			continue;
+
+		domain_offset = fdt_node_offset_by_phandle(fdt,
+							   fdt32_to_cpu(*val));
+		if (domain_offset < 0)
+			continue;
+
+		for (i = 0; i < fdt_domains_count; i++) {
+			if (!sbi_strcmp(fdt_domains[i].name,
+				fdt_get_name(fdt, domain_offset, NULL))) {
+				fdt_hartid_to_domain[hartid] = &fdt_domains[i];
+				break;
+			}
+		}
+	}
+
+	return 0;
+}
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
index b860a83e877..d9f1eae1929 100644
--- a/lib/utils/fdt/objects.mk
+++ b/lib/utils/fdt/objects.mk
@@ -4,5 +4,6 @@
 # Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
 #
 
+libsbiutils-objs-y += fdt/fdt_domain.o
 libsbiutils-objs-y += fdt/fdt_helper.o
 libsbiutils-objs-y += fdt/fdt_fixup.o

From 4fffb53269156c8ea593ababbe4a664a1c06a1cd Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 19 Nov 2020 12:25:31 +0530
Subject: [PATCH 0703/1765] platform: generic: Populate domains from FDT

The generic platform should populate domains from FDT using the
domain FDT helper routines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/generic/platform.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index abb696aeff8..6c93a51abeb 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
@@ -148,6 +149,7 @@ static int generic_final_init(bool cold_boot)
 
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
+	fdt_domain_fixup(fdt);
 
 	if (generic_plat && generic_plat->fdt_fixup) {
 		rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
@@ -170,6 +172,11 @@ static void generic_final_exit(void)
 		generic_plat->final_exit(generic_plat_match);
 }
 
+static int generic_domains_init(void)
+{
+	return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
+}
+
 static u64 generic_tlbr_flush_limit(void)
 {
 	if (generic_plat && generic_plat->tlbr_flush_limit)
@@ -202,6 +209,8 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init		= generic_final_init,
 	.early_exit		= generic_early_exit,
 	.final_exit		= generic_final_exit,
+	.domains_init		= generic_domains_init,
+	.domain_get		= fdt_domain_get,
 	.console_putc		= fdt_serial_putc,
 	.console_getc		= fdt_serial_getc,
 	.console_init		= fdt_serial_init,

From e7da0b4204c175f2fe936ff47acc93472e5b5b9a Mon Sep 17 00:00:00 2001
From: Dimitri John Ledkov <xnox@ubuntu.com>
Date: Thu, 10 Dec 2020 11:03:57 +0000
Subject: [PATCH 0704/1765] lib: utils/libfdt: Upgrade to v1.6.0 release

Sync with libfdt v1.6.0 release source codes.

Signed-off-by: Dimitri John Ledkov <xnox@ubuntu.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/Makefile.libfdt   |   2 +-
 lib/utils/libfdt/fdt.c             |  99 ++++++++++++--------
 lib/utils/libfdt/fdt_check.c       |  74 +++++++++++++++
 lib/utils/libfdt/fdt_overlay.c     |   2 +-
 lib/utils/libfdt/fdt_ro.c          | 143 ++++++++++-------------------
 lib/utils/libfdt/fdt_rw.c          |  29 ++++--
 lib/utils/libfdt/fdt_sw.c          |  19 ++--
 lib/utils/libfdt/libfdt.h          |  13 +--
 lib/utils/libfdt/libfdt_internal.h | 126 ++++++++++++++++++++++++-
 lib/utils/libfdt/objects.mk        |   2 +-
 lib/utils/libfdt/version.lds       |   1 +
 11 files changed, 356 insertions(+), 154 deletions(-)
 create mode 100644 lib/utils/libfdt/fdt_check.c

diff --git a/lib/utils/libfdt/Makefile.libfdt b/lib/utils/libfdt/Makefile.libfdt
index e54639738c8..b6d8fc02dd0 100644
--- a/lib/utils/libfdt/Makefile.libfdt
+++ b/lib/utils/libfdt/Makefile.libfdt
@@ -8,7 +8,7 @@ LIBFDT_soname = libfdt.$(SHAREDLIB_EXT).1
 LIBFDT_INCLUDES = fdt.h libfdt.h libfdt_env.h
 LIBFDT_VERSION = version.lds
 LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
-	fdt_addresses.c fdt_overlay.c
+	fdt_addresses.c fdt_overlay.c fdt_check.c
 LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
 LIBFDT_LIB = libfdt-$(DTC_VERSION).$(SHAREDLIB_EXT)
 
diff --git a/lib/utils/libfdt/fdt.c b/lib/utils/libfdt/fdt.c
index d6ce7c052dc..c28fcc11577 100644
--- a/lib/utils/libfdt/fdt.c
+++ b/lib/utils/libfdt/fdt.c
@@ -19,15 +19,21 @@ int32_t fdt_ro_probe_(const void *fdt)
 {
 	uint32_t totalsize = fdt_totalsize(fdt);
 
+	if (can_assume(VALID_DTB))
+		return totalsize;
+
 	if (fdt_magic(fdt) == FDT_MAGIC) {
 		/* Complete tree */
-		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
-		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
+		if (!can_assume(LATEST)) {
+			if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+				return -FDT_ERR_BADVERSION;
+			if (fdt_last_comp_version(fdt) >
+					FDT_LAST_SUPPORTED_VERSION)
+				return -FDT_ERR_BADVERSION;
+		}
 	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
 		/* Unfinished sequential-write blob */
-		if (fdt_size_dt_struct(fdt) == 0)
+		if (!can_assume(VALID_INPUT) && fdt_size_dt_struct(fdt) == 0)
 			return -FDT_ERR_BADSTATE;
 	} else {
 		return -FDT_ERR_BADMAGIC;
@@ -70,44 +76,59 @@ size_t fdt_header_size_(uint32_t version)
 		return FDT_V17_SIZE;
 }
 
+size_t fdt_header_size(const void *fdt)
+{
+	return can_assume(LATEST) ? FDT_V17_SIZE :
+		fdt_header_size_(fdt_version(fdt));
+}
+
 int fdt_check_header(const void *fdt)
 {
 	size_t hdrsize;
 
 	if (fdt_magic(fdt) != FDT_MAGIC)
 		return -FDT_ERR_BADMAGIC;
+	if (!can_assume(LATEST)) {
+		if ((fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+		    || (fdt_last_comp_version(fdt) >
+			FDT_LAST_SUPPORTED_VERSION))
+			return -FDT_ERR_BADVERSION;
+		if (fdt_version(fdt) < fdt_last_comp_version(fdt))
+			return -FDT_ERR_BADVERSION;
+	}
 	hdrsize = fdt_header_size(fdt);
-	if ((fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
-	    || (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION))
-		return -FDT_ERR_BADVERSION;
-	if (fdt_version(fdt) < fdt_last_comp_version(fdt))
-		return -FDT_ERR_BADVERSION;
-
-	if ((fdt_totalsize(fdt) < hdrsize)
-	    || (fdt_totalsize(fdt) > INT_MAX))
-		return -FDT_ERR_TRUNCATED;
+	if (!can_assume(VALID_DTB)) {
 
-	/* Bounds check memrsv block */
-	if (!check_off_(hdrsize, fdt_totalsize(fdt), fdt_off_mem_rsvmap(fdt)))
-		return -FDT_ERR_TRUNCATED;
+		if ((fdt_totalsize(fdt) < hdrsize)
+		    || (fdt_totalsize(fdt) > INT_MAX))
+			return -FDT_ERR_TRUNCATED;
 
-	/* Bounds check structure block */
-	if (fdt_version(fdt) < 17) {
+		/* Bounds check memrsv block */
 		if (!check_off_(hdrsize, fdt_totalsize(fdt),
-				fdt_off_dt_struct(fdt)))
+				fdt_off_mem_rsvmap(fdt)))
 			return -FDT_ERR_TRUNCATED;
-	} else {
+	}
+
+	if (!can_assume(VALID_DTB)) {
+		/* Bounds check structure block */
+		if (!can_assume(LATEST) && fdt_version(fdt) < 17) {
+			if (!check_off_(hdrsize, fdt_totalsize(fdt),
+					fdt_off_dt_struct(fdt)))
+				return -FDT_ERR_TRUNCATED;
+		} else {
+			if (!check_block_(hdrsize, fdt_totalsize(fdt),
+					  fdt_off_dt_struct(fdt),
+					  fdt_size_dt_struct(fdt)))
+				return -FDT_ERR_TRUNCATED;
+		}
+
+		/* Bounds check strings block */
 		if (!check_block_(hdrsize, fdt_totalsize(fdt),
-				  fdt_off_dt_struct(fdt),
-				  fdt_size_dt_struct(fdt)))
+				  fdt_off_dt_strings(fdt),
+				  fdt_size_dt_strings(fdt)))
 			return -FDT_ERR_TRUNCATED;
 	}
 
-	/* Bounds check strings block */
-	if (!check_block_(hdrsize, fdt_totalsize(fdt),
-			  fdt_off_dt_strings(fdt), fdt_size_dt_strings(fdt)))
-		return -FDT_ERR_TRUNCATED;
-
 	return 0;
 }
 
@@ -115,12 +136,13 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
 {
 	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
 
-	if ((absoffset < offset)
-	    || ((absoffset + len) < absoffset)
-	    || (absoffset + len) > fdt_totalsize(fdt))
-		return NULL;
+	if (!can_assume(VALID_INPUT))
+		if ((absoffset < offset)
+		    || ((absoffset + len) < absoffset)
+		    || (absoffset + len) > fdt_totalsize(fdt))
+			return NULL;
 
-	if (fdt_version(fdt) >= 0x11)
+	if (can_assume(LATEST) || fdt_version(fdt) >= 0x11)
 		if (((offset + len) < offset)
 		    || ((offset + len) > fdt_size_dt_struct(fdt)))
 			return NULL;
@@ -137,7 +159,7 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
 
 	*nextoffset = -FDT_ERR_TRUNCATED;
 	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
-	if (!tagp)
+	if (!can_assume(VALID_DTB) && !tagp)
 		return FDT_END; /* premature end */
 	tag = fdt32_to_cpu(*tagp);
 	offset += FDT_TAGSIZE;
@@ -149,18 +171,19 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
 		do {
 			p = fdt_offset_ptr(fdt, offset++, 1);
 		} while (p && (*p != '\0'));
-		if (!p)
+		if (!can_assume(VALID_DTB) && !p)
 			return FDT_END; /* premature end */
 		break;
 
 	case FDT_PROP:
 		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
-		if (!lenp)
+		if (!can_assume(VALID_DTB) && !lenp)
 			return FDT_END; /* premature end */
 		/* skip-name offset, length and value */
 		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
 			+ fdt32_to_cpu(*lenp);
-		if (fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 &&
+		if (!can_assume(LATEST) &&
+		    fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 &&
 		    ((offset - fdt32_to_cpu(*lenp)) % 8) != 0)
 			offset += 4;
 		break;
@@ -183,6 +206,8 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
 
 int fdt_check_node_offset_(const void *fdt, int offset)
 {
+	if (can_assume(VALID_INPUT))
+		return offset;
 	if ((offset < 0) || (offset % FDT_TAGSIZE)
 	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
 		return -FDT_ERR_BADOFFSET;
diff --git a/lib/utils/libfdt/fdt_check.c b/lib/utils/libfdt/fdt_check.c
new file mode 100644
index 00000000000..7f6a96c6bbb
--- /dev/null
+++ b/lib/utils/libfdt/fdt_check.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_check_full(const void *fdt, size_t bufsize)
+{
+	int err;
+	int num_memrsv;
+	int offset, nextoffset = 0;
+	uint32_t tag;
+	unsigned int depth = 0;
+	const void *prop;
+	const char *propname;
+
+	if (bufsize < FDT_V1_SIZE)
+		return -FDT_ERR_TRUNCATED;
+	err = fdt_check_header(fdt);
+	if (err != 0)
+		return err;
+	if (bufsize < fdt_totalsize(fdt))
+		return -FDT_ERR_TRUNCATED;
+
+	num_memrsv = fdt_num_mem_rsv(fdt);
+	if (num_memrsv < 0)
+		return num_memrsv;
+
+	while (1) {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		if (nextoffset < 0)
+			return nextoffset;
+
+		switch (tag) {
+		case FDT_NOP:
+			break;
+
+		case FDT_END:
+			if (depth != 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			return 0;
+
+		case FDT_BEGIN_NODE:
+			depth++;
+			if (depth > INT_MAX)
+				return -FDT_ERR_BADSTRUCTURE;
+			break;
+
+		case FDT_END_NODE:
+			if (depth == 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			depth--;
+			break;
+
+		case FDT_PROP:
+			prop = fdt_getprop_by_offset(fdt, offset, &propname,
+						     &err);
+			if (!prop)
+				return err;
+			break;
+
+		default:
+			return -FDT_ERR_INTERNAL;
+		}
+	}
+}
diff --git a/lib/utils/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
index be718733661..b310e49a698 100644
--- a/lib/utils/libfdt/fdt_overlay.c
+++ b/lib/utils/libfdt/fdt_overlay.c
@@ -752,7 +752,7 @@ static int overlay_symbol_update(void *fdt, void *fdto)
 		if ((e - s) > len && (memcmp(s, "/__overlay__/", len) == 0)) {
 			/* /<fragment-name>/__overlay__/<relative-subnode-path> */
 			rel_path = s + len;
-			rel_path_len = e - rel_path;
+			rel_path_len = e - rel_path - 1;
 		} else if ((e - s) == len
 			   && (memcmp(s, "/__overlay__", len - 1) == 0)) {
 			/* /<fragment-name>/__overlay__ */
diff --git a/lib/utils/libfdt/fdt_ro.c b/lib/utils/libfdt/fdt_ro.c
index a5c2797cde6..e03570a56eb 100644
--- a/lib/utils/libfdt/fdt_ro.c
+++ b/lib/utils/libfdt/fdt_ro.c
@@ -33,17 +33,26 @@ static int fdt_nodename_eq_(const void *fdt, int offset,
 
 const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
 {
-	int32_t totalsize = fdt_ro_probe_(fdt);
-	uint32_t absoffset = stroffset + fdt_off_dt_strings(fdt);
+	int32_t totalsize;
+	uint32_t absoffset;
 	size_t len;
 	int err;
 	const char *s, *n;
 
+	if (can_assume(VALID_INPUT)) {
+		s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
+
+		if (lenp)
+			*lenp = strlen(s);
+		return s;
+	}
+	totalsize = fdt_ro_probe_(fdt);
 	err = totalsize;
 	if (totalsize < 0)
 		goto fail;
 
 	err = -FDT_ERR_BADOFFSET;
+	absoffset = stroffset + fdt_off_dt_strings(fdt);
 	if (absoffset >= totalsize)
 		goto fail;
 	len = totalsize - absoffset;
@@ -51,7 +60,7 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
 	if (fdt_magic(fdt) == FDT_MAGIC) {
 		if (stroffset < 0)
 			goto fail;
-		if (fdt_version(fdt) >= 17) {
+		if (can_assume(LATEST) || fdt_version(fdt) >= 17) {
 			if (stroffset >= fdt_size_dt_strings(fdt))
 				goto fail;
 			if ((fdt_size_dt_strings(fdt) - stroffset) < len)
@@ -151,10 +160,13 @@ static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n)
 	int offset = n * sizeof(struct fdt_reserve_entry);
 	int absoffset = fdt_off_mem_rsvmap(fdt) + offset;
 
-	if (absoffset < fdt_off_mem_rsvmap(fdt))
-		return NULL;
-	if (absoffset > fdt_totalsize(fdt) - sizeof(struct fdt_reserve_entry))
-		return NULL;
+	if (!can_assume(VALID_INPUT)) {
+		if (absoffset < fdt_off_mem_rsvmap(fdt))
+			return NULL;
+		if (absoffset > fdt_totalsize(fdt) -
+		    sizeof(struct fdt_reserve_entry))
+			return NULL;
+	}
 	return fdt_mem_rsv_(fdt, n);
 }
 
@@ -164,7 +176,7 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
 
 	FDT_RO_PROBE(fdt);
 	re = fdt_mem_rsv(fdt, n);
-	if (!re)
+	if (!can_assume(VALID_INPUT) && !re)
 		return -FDT_ERR_BADOFFSET;
 
 	*address = fdt64_ld(&re->address);
@@ -295,7 +307,7 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
 
 	nameptr = nh->name;
 
-	if (fdt_version(fdt) < 0x10) {
+	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) {
 		/*
 		 * For old FDT versions, match the naming conventions of V16:
 		 * give only the leaf name (after all /). The actual tree
@@ -346,7 +358,8 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt,
 	int err;
 	const struct fdt_property *prop;
 
-	if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) {
+	if (!can_assume(VALID_INPUT) &&
+	    (err = fdt_check_prop_offset_(fdt, offset)) < 0) {
 		if (lenp)
 			*lenp = err;
 		return NULL;
@@ -367,7 +380,7 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
 	/* Prior to version 16, properties may need realignment
 	 * and this API does not work. fdt_getprop_*() will, however. */
 
-	if (fdt_version(fdt) < 0x10) {
+	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) {
 		if (lenp)
 			*lenp = -FDT_ERR_BADVERSION;
 		return NULL;
@@ -388,7 +401,8 @@ static const struct fdt_property *fdt_get_property_namelen_(const void *fdt,
 	     (offset = fdt_next_property_offset(fdt, offset))) {
 		const struct fdt_property *prop;
 
-		if (!(prop = fdt_get_property_by_offset_(fdt, offset, lenp))) {
+		prop = fdt_get_property_by_offset_(fdt, offset, lenp);
+		if (!can_assume(LIBFDT_FLAWLESS) && !prop) {
 			offset = -FDT_ERR_INTERNAL;
 			break;
 		}
@@ -413,7 +427,7 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt,
 {
 	/* Prior to version 16, properties may need realignment
 	 * and this API does not work. fdt_getprop_*() will, however. */
-	if (fdt_version(fdt) < 0x10) {
+	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10) {
 		if (lenp)
 			*lenp = -FDT_ERR_BADVERSION;
 		return NULL;
@@ -444,8 +458,8 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 		return NULL;
 
 	/* Handle realignment */
-	if (fdt_version(fdt) < 0x10 && (poffset + sizeof(*prop)) % 8 &&
-	    fdt32_ld(&prop->len) >= 8)
+	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 &&
+	    (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8)
 		return prop->data + 4;
 	return prop->data;
 }
@@ -461,19 +475,24 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
 	if (namep) {
 		const char *name;
 		int namelen;
-		name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff),
-				      &namelen);
-		if (!name) {
-			if (lenp)
-				*lenp = namelen;
-			return NULL;
+
+		if (!can_assume(VALID_INPUT)) {
+			name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff),
+					      &namelen);
+			if (!name) {
+				if (lenp)
+					*lenp = namelen;
+				return NULL;
+			}
+			*namep = name;
+		} else {
+			*namep = fdt_string(fdt, fdt32_ld(&prop->nameoff));
 		}
-		*namep = name;
 	}
 
 	/* Handle realignment */
-	if (fdt_version(fdt) < 0x10 && (offset + sizeof(*prop)) % 8 &&
-	    fdt32_ld(&prop->len) >= 8)
+	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 &&
+	    (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8)
 		return prop->data + 4;
 	return prop->data;
 }
@@ -598,10 +617,12 @@ int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
 		}
 	}
 
-	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
-		return -FDT_ERR_BADOFFSET;
-	else if (offset == -FDT_ERR_BADOFFSET)
-		return -FDT_ERR_BADSTRUCTURE;
+	if (!can_assume(VALID_INPUT)) {
+		if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+			return -FDT_ERR_BADOFFSET;
+		else if (offset == -FDT_ERR_BADOFFSET)
+			return -FDT_ERR_BADSTRUCTURE;
+	}
 
 	return offset; /* error from fdt_next_node() */
 }
@@ -613,7 +634,8 @@ int fdt_node_depth(const void *fdt, int nodeoffset)
 
 	err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth);
 	if (err)
-		return (err < 0) ? err : -FDT_ERR_INTERNAL;
+		return (can_assume(LIBFDT_FLAWLESS) || err < 0) ? err :
+			-FDT_ERR_INTERNAL;
 	return nodedepth;
 }
 
@@ -833,66 +855,3 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 
 	return offset; /* error from fdt_next_node() */
 }
-
-int fdt_check_full(const void *fdt, size_t bufsize)
-{
-	int err;
-	int num_memrsv;
-	int offset, nextoffset = 0;
-	uint32_t tag;
-	unsigned depth = 0;
-	const void *prop;
-	const char *propname;
-
-	if (bufsize < FDT_V1_SIZE)
-		return -FDT_ERR_TRUNCATED;
-	err = fdt_check_header(fdt);
-	if (err != 0)
-		return err;
-	if (bufsize < fdt_totalsize(fdt))
-		return -FDT_ERR_TRUNCATED;
-
-	num_memrsv = fdt_num_mem_rsv(fdt);
-	if (num_memrsv < 0)
-		return num_memrsv;
-
-	while (1) {
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-
-		if (nextoffset < 0)
-			return nextoffset;
-
-		switch (tag) {
-		case FDT_NOP:
-			break;
-
-		case FDT_END:
-			if (depth != 0)
-				return -FDT_ERR_BADSTRUCTURE;
-			return 0;
-
-		case FDT_BEGIN_NODE:
-			depth++;
-			if (depth > INT_MAX)
-				return -FDT_ERR_BADSTRUCTURE;
-			break;
-
-		case FDT_END_NODE:
-			if (depth == 0)
-				return -FDT_ERR_BADSTRUCTURE;
-			depth--;
-			break;
-
-		case FDT_PROP:
-			prop = fdt_getprop_by_offset(fdt, offset, &propname,
-						     &err);
-			if (!prop)
-				return err;
-			break;
-
-		default:
-			return -FDT_ERR_INTERNAL;
-		}
-	}
-}
diff --git a/lib/utils/libfdt/fdt_rw.c b/lib/utils/libfdt/fdt_rw.c
index 8795947c00d..13854253ff8 100644
--- a/lib/utils/libfdt/fdt_rw.c
+++ b/lib/utils/libfdt/fdt_rw.c
@@ -24,14 +24,16 @@ static int fdt_blocks_misordered_(const void *fdt,
 
 static int fdt_rw_probe_(void *fdt)
 {
+	if (can_assume(VALID_DTB))
+		return 0;
 	FDT_RO_PROBE(fdt);
 
-	if (fdt_version(fdt) < 17)
+	if (!can_assume(LATEST) && fdt_version(fdt) < 17)
 		return -FDT_ERR_BADVERSION;
 	if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry),
 				   fdt_size_dt_struct(fdt)))
 		return -FDT_ERR_BADLAYOUT;
-	if (fdt_version(fdt) > 17)
+	if (!can_assume(LATEST) && fdt_version(fdt) > 17)
 		fdt_set_version(fdt, 17);
 
 	return 0;
@@ -112,6 +114,15 @@ static int fdt_splice_string_(void *fdt, int newlen)
 	return 0;
 }
 
+/**
+ * fdt_find_add_string_() - Find or allocate a string
+ *
+ * @fdt: pointer to the device tree to check/adjust
+ * @s: string to find/add
+ * @allocated: Set to 0 if the string was found, 1 if not found and so
+ *	allocated. Ignored if can_assume(NO_ROLLBACK)
+ * @return offset of string in the string table (whether found or added)
+ */
 static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
 {
 	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
@@ -120,7 +131,8 @@ static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
 	int len = strlen(s) + 1;
 	int err;
 
-	*allocated = 0;
+	if (!can_assume(NO_ROLLBACK))
+		*allocated = 0;
 
 	p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s);
 	if (p)
@@ -132,7 +144,8 @@ static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
 	if (err)
 		return err;
 
-	*allocated = 1;
+	if (!can_assume(NO_ROLLBACK))
+		*allocated = 1;
 
 	memcpy(new, s, len);
 	return (new - strtab);
@@ -206,7 +219,8 @@ static int fdt_add_property_(void *fdt, int nodeoffset, const char *name,
 
 	err = fdt_splice_struct_(fdt, *prop, 0, proplen);
 	if (err) {
-		if (allocated)
+		/* Delete the string if we failed to add it */
+		if (!can_assume(NO_ROLLBACK) && allocated)
 			fdt_del_last_string_(fdt, name);
 		return err;
 	}
@@ -411,7 +425,7 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
 	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
 		* sizeof(struct fdt_reserve_entry);
 
-	if (fdt_version(fdt) >= 17) {
+	if (can_assume(LATEST) || fdt_version(fdt) >= 17) {
 		struct_size = fdt_size_dt_struct(fdt);
 	} else {
 		struct_size = 0;
@@ -421,7 +435,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
 			return struct_size;
 	}
 
-	if (!fdt_blocks_misordered_(fdt, mem_rsv_size, struct_size)) {
+	if (can_assume(LIBFDT_ORDER) |
+	    !fdt_blocks_misordered_(fdt, mem_rsv_size, struct_size)) {
 		/* no further work necessary */
 		err = fdt_move(fdt, buf, bufsize);
 		if (err)
diff --git a/lib/utils/libfdt/fdt_sw.c b/lib/utils/libfdt/fdt_sw.c
index 76bea22f734..26759d5dfb8 100644
--- a/lib/utils/libfdt/fdt_sw.c
+++ b/lib/utils/libfdt/fdt_sw.c
@@ -12,10 +12,13 @@
 
 static int fdt_sw_probe_(void *fdt)
 {
-	if (fdt_magic(fdt) == FDT_MAGIC)
-		return -FDT_ERR_BADSTATE;
-	else if (fdt_magic(fdt) != FDT_SW_MAGIC)
-		return -FDT_ERR_BADMAGIC;
+	if (!can_assume(VALID_INPUT)) {
+		if (fdt_magic(fdt) == FDT_MAGIC)
+			return -FDT_ERR_BADSTATE;
+		else if (fdt_magic(fdt) != FDT_SW_MAGIC)
+			return -FDT_ERR_BADMAGIC;
+	}
+
 	return 0;
 }
 
@@ -38,7 +41,7 @@ static int fdt_sw_probe_memrsv_(void *fdt)
 	if (err)
 		return err;
 
-	if (fdt_off_dt_strings(fdt) != 0)
+	if (!can_assume(VALID_INPUT) && fdt_off_dt_strings(fdt) != 0)
 		return -FDT_ERR_BADSTATE;
 	return 0;
 }
@@ -64,7 +67,8 @@ static int fdt_sw_probe_struct_(void *fdt)
 	if (err)
 		return err;
 
-	if (fdt_off_dt_strings(fdt) != fdt_totalsize(fdt))
+	if (!can_assume(VALID_INPUT) &&
+	    fdt_off_dt_strings(fdt) != fdt_totalsize(fdt))
 		return -FDT_ERR_BADSTATE;
 	return 0;
 }
@@ -151,7 +155,8 @@ int fdt_resize(void *fdt, void *buf, int bufsize)
 	headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
 	tailsize = fdt_size_dt_strings(fdt);
 
-	if ((headsize + tailsize) > fdt_totalsize(fdt))
+	if (!can_assume(VALID_DTB) &&
+	    headsize + tailsize > fdt_totalsize(fdt))
 		return -FDT_ERR_INTERNAL;
 
 	if ((headsize + tailsize) > bufsize)
diff --git a/lib/utils/libfdt/libfdt.h b/lib/utils/libfdt/libfdt.h
index 8037f391a59..48f375c9c11 100644
--- a/lib/utils/libfdt/libfdt.h
+++ b/lib/utils/libfdt/libfdt.h
@@ -136,7 +136,7 @@ static inline uint32_t fdt32_ld(const fdt32_t *p)
 
 static inline void fdt32_st(void *property, uint32_t value)
 {
-	uint8_t *bp = property;
+	uint8_t *bp = (uint8_t *)property;
 
 	bp[0] = value >> 24;
 	bp[1] = (value >> 16) & 0xff;
@@ -160,7 +160,7 @@ static inline uint64_t fdt64_ld(const fdt64_t *p)
 
 static inline void fdt64_st(void *property, uint64_t value)
 {
-	uint8_t *bp = property;
+	uint8_t *bp = (uint8_t *)property;
 
 	bp[0] = value >> 56;
 	bp[1] = (value >> 48) & 0xff;
@@ -266,11 +266,12 @@ fdt_set_hdr_(size_dt_struct);
  * fdt_header_size - return the size of the tree's header
  * @fdt: pointer to a flattened device tree
  */
+size_t fdt_header_size(const void *fdt);
+
+/**
+ * fdt_header_size_ - internal function which takes a version number
+ */
 size_t fdt_header_size_(uint32_t version);
-static inline size_t fdt_header_size(const void *fdt)
-{
-	return fdt_header_size_(fdt_version(fdt));
-}
 
 /**
  * fdt_check_header - sanity check a device tree header
diff --git a/lib/utils/libfdt/libfdt_internal.h b/lib/utils/libfdt/libfdt_internal.h
index 741eeb31502..d4e0bd49c03 100644
--- a/lib/utils/libfdt/libfdt_internal.h
+++ b/lib/utils/libfdt/libfdt_internal.h
@@ -10,10 +10,10 @@
 #define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
 #define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
 
-int fdt_ro_probe_(const void *fdt);
+int32_t fdt_ro_probe_(const void *fdt);
 #define FDT_RO_PROBE(fdt)					\
 	{							\
-		int totalsize_;					\
+		int32_t totalsize_;				\
 		if ((totalsize_ = fdt_ro_probe_(fdt)) < 0)	\
 			return totalsize_;			\
 	}
@@ -48,4 +48,126 @@ static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n)
 
 #define FDT_SW_MAGIC		(~FDT_MAGIC)
 
+/**********************************************************************/
+/* Checking controls                                                  */
+/**********************************************************************/
+
+#ifndef FDT_ASSUME_MASK
+#define FDT_ASSUME_MASK 0
+#endif
+
+/*
+ * Defines assumptions which can be enabled. Each of these can be enabled
+ * individually. For maximum safety, don't enable any assumptions!
+ *
+ * For minimal code size and no safety, use ASSUME_PERFECT at your own risk.
+ * You should have another method of validating the device tree, such as a
+ * signature or hash check before using libfdt.
+ *
+ * For situations where security is not a concern it may be safe to enable
+ * ASSUME_SANE.
+ */
+enum {
+	/*
+	 * This does essentially no checks. Only the latest device-tree
+	 * version is correctly handled. Inconsistencies or errors in the device
+	 * tree may cause undefined behaviour or crashes. Invalid parameters
+	 * passed to libfdt may do the same.
+	 *
+	 * If an error occurs when modifying the tree it may leave the tree in
+	 * an intermediate (but valid) state. As an example, adding a property
+	 * where there is insufficient space may result in the property name
+	 * being added to the string table even though the property itself is
+	 * not added to the struct section.
+	 *
+	 * Only use this if you have a fully validated device tree with
+	 * the latest supported version and wish to minimise code size.
+	 */
+	ASSUME_PERFECT		= 0xff,
+
+	/*
+	 * This assumes that the device tree is sane. i.e. header metadata
+	 * and basic hierarchy are correct.
+	 *
+	 * With this assumption enabled, normal device trees produced by libfdt
+	 * and the compiler should be handled safely. Malicious device trees and
+	 * complete garbage may cause libfdt to behave badly or crash. Truncated
+	 * device trees (e.g. those only partially loaded) can also cause
+	 * problems.
+	 *
+	 * Note: Only checks that relate exclusively to the device tree itself
+	 * (not the parameters passed to libfdt) are disabled by this
+	 * assumption. This includes checking headers, tags and the like.
+	 */
+	ASSUME_VALID_DTB	= 1 << 0,
+
+	/*
+	 * This builds on ASSUME_VALID_DTB and further assumes that libfdt
+	 * functions are called with valid parameters, i.e. not trigger
+	 * FDT_ERR_BADOFFSET or offsets that are out of bounds. It disables any
+	 * extensive checking of parameters and the device tree, making various
+	 * assumptions about correctness.
+	 *
+	 * It doesn't make sense to enable this assumption unless
+	 * ASSUME_VALID_DTB is also enabled.
+	 */
+	ASSUME_VALID_INPUT	= 1 << 1,
+
+	/*
+	 * This disables checks for device-tree version and removes all code
+	 * which handles older versions.
+	 *
+	 * Only enable this if you know you have a device tree with the latest
+	 * version.
+	 */
+	ASSUME_LATEST		= 1 << 2,
+
+	/*
+	 * This assumes that it is OK for a failed addition to the device tree,
+	 * due to lack of space or some other problem, to skip any rollback
+	 * steps (such as dropping the property name from the string table).
+	 * This is safe to enable in most circumstances, even though it may
+	 * leave the tree in a sub-optimal state.
+	 */
+	ASSUME_NO_ROLLBACK	= 1 << 3,
+
+	/*
+	 * This assumes that the device tree components appear in a 'convenient'
+	 * order, i.e. the memory reservation block first, then the structure
+	 * block and finally the string block.
+	 *
+	 * This order is not specified by the device-tree specification,
+	 * but is expected by libfdt. The device-tree compiler always created
+	 * device trees with this order.
+	 *
+	 * This assumption disables a check in fdt_open_into() and removes the
+	 * ability to fix the problem there. This is safe if you know that the
+	 * device tree is correctly ordered. See fdt_blocks_misordered_().
+	 */
+	ASSUME_LIBFDT_ORDER	= 1 << 4,
+
+	/*
+	 * This assumes that libfdt itself does not have any internal bugs. It
+	 * drops certain checks that should never be needed unless libfdt has an
+	 * undiscovered bug.
+	 *
+	 * This can generally be considered safe to enable.
+	 */
+	ASSUME_LIBFDT_FLAWLESS	= 1 << 5,
+};
+
+/**
+ * can_assume_() - check if a particular assumption is enabled
+ *
+ * @mask: Mask to check (ASSUME_...)
+ * @return true if that assumption is enabled, else false
+ */
+static inline bool can_assume_(int mask)
+{
+	return FDT_ASSUME_MASK & mask;
+}
+
+/** helper macros for checking assumptions */
+#define can_assume(_assume)	can_assume_(ASSUME_ ## _assume)
+
 #endif /* LIBFDT_INTERNAL_H */
diff --git a/lib/utils/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
index 8156cdee95a..8c060df9de4 100644
--- a/lib/utils/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -7,7 +7,7 @@
 #   Atish Patra<atish.patra@wdc.com>
 #
 
-libfdt_files = fdt.o fdt_addresses.o fdt_empty_tree.o fdt_ro.o fdt_rw.o \
+libfdt_files = fdt.o fdt_addresses.o fdt_check.o fdt_empty_tree.o fdt_ro.o fdt_rw.o \
                fdt_strerror.o fdt_sw.o fdt_wip.o
 $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
diff --git a/lib/utils/libfdt/version.lds b/lib/utils/libfdt/version.lds
index ae32924e85a..7ab85f1d9d8 100644
--- a/lib/utils/libfdt/version.lds
+++ b/lib/utils/libfdt/version.lds
@@ -20,6 +20,7 @@ LIBFDT_1.2 {
 		fdt_get_alias_namelen;
 		fdt_get_alias;
 		fdt_get_path;
+                fdt_header_size;
 		fdt_supernode_atdepth_offset;
 		fdt_node_depth;
 		fdt_parent_offset;

From 2179777364cae3726c0e612f64b97a9bff05fc5b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 13 Dec 2020 11:23:05 +0530
Subject: [PATCH 0705/1765] lib: utils: Allow FDT domain iteration functions to
 fail

We extend fdt_iterate_each_domain() and fdt_iterate_each_memregion()
functions to allow underlying iteration function to fail. This will
help us catch more domain misconfiguration issues at boot time.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_domain.h |  18 +++--
 lib/utils/fdt/fdt_domain.c         | 115 +++++++++++++++++------------
 2 files changed, 79 insertions(+), 54 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_domain.h b/include/sbi_utils/fdt/fdt_domain.h
index 3c02d56d740..68daacc857b 100644
--- a/include/sbi_utils/fdt/fdt_domain.h
+++ b/include/sbi_utils/fdt/fdt_domain.h
@@ -21,10 +21,12 @@ struct sbi_domain;
  * @param fdt device tree blob
  * @param opaque private pointer for each iteration
  * @param fn callback function for each iteration
+ *
+ * @return 0 on success and negative error code on failure
  */
-void fdt_iterate_each_domain(void *fdt, void *opaque,
-			     void (*fn)(void *fdt, int domain_offset,
-					void *opaque));
+int fdt_iterate_each_domain(void *fdt, void *opaque,
+			    int (*fn)(void *fdt, int domain_offset,
+				      void *opaque));
 
 /**
  * Iterate over each memregion of a domain in device tree
@@ -33,11 +35,13 @@ void fdt_iterate_each_domain(void *fdt, void *opaque,
  * @param domain_offset domain DT node offset
  * @param opaque private pointer for each iteration
  * @param fn callback function for each iteration
+ *
+ * @return 0 on success and negative error code on failure
  */
-void fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
-				void (*fn)(void *fdt, int domain_offset,
-					   int region_offset, u32 region_access,
-					   void *opaque));
+int fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
+			       int (*fn)(void *fdt, int domain_offset,
+					 int region_offset, u32 region_access,
+					 void *opaque));
 
 /**
  * Fix up the domain configuration in the device tree
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 972a1f4bb41..0352af55b8e 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -16,66 +16,74 @@
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-void fdt_iterate_each_domain(void *fdt, void *opaque,
-			     void (*fn)(void *fdt, int domain_offset,
-					void *opaque))
+int fdt_iterate_each_domain(void *fdt, void *opaque,
+			    int (*fn)(void *fdt, int domain_offset,
+				       void *opaque))
 {
-	int doffset, poffset;
+	int rc, doffset, poffset;
 
 	if (!fdt || !fn)
-		return;
+		return SBI_EINVAL;
 
 	poffset = fdt_path_offset(fdt, "/chosen");
 	if (poffset < 0)
-		return;
+		return 0;
 	poffset = fdt_node_offset_by_compatible(fdt, poffset,
 						"opensbi,domain,config");
 	if (poffset < 0)
-		return;
+		return 0;
 
 	fdt_for_each_subnode(doffset, fdt, poffset) {
 		if (fdt_node_check_compatible(fdt, doffset,
 					      "opensbi,domain,instance"))
 			continue;
 
-		fn(fdt, doffset, opaque);
+		rc = fn(fdt, doffset, opaque);
+		if (rc)
+			return rc;
 	}
+
+	return 0;
 }
 
-void fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
-				void (*fn)(void *fdt, int domain_offset,
-					   int region_offset, u32 region_access,
-					   void *opaque))
+int fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
+			       int (*fn)(void *fdt, int domain_offset,
+					 int region_offset, u32 region_access,
+					 void *opaque))
 {
 	u32 i, rcount;
-	int len, region_offset;
+	int rc, len, region_offset;
 	const u32 *regions;
 
 	if (!fdt || (domain_offset < 0) || !fn)
-		return;
+		return SBI_EINVAL;
 
 	if (fdt_node_check_compatible(fdt, domain_offset,
 				      "opensbi,domain,instance"))
-		return;
+		return SBI_EINVAL;
 
 	regions = fdt_getprop(fdt, domain_offset, "regions", &len);
 	if (!regions)
-		return;
+		return 0;
 
 	rcount = (u32)len / (sizeof(u32) * 2);
 	for (i = 0; i < rcount; i++) {
 		region_offset = fdt_node_offset_by_phandle(fdt,
 						fdt32_to_cpu(regions[2 * i]));
 		if (region_offset < 0)
-			continue;
+			return region_offset;
 
 		if (fdt_node_check_compatible(fdt, region_offset,
 					      "opensbi,domain,memregion"))
-			continue;
+			return SBI_EINVAL;
 
-		fn(fdt, domain_offset, region_offset,
-		   fdt32_to_cpu(regions[(2 * i) + 1]), opaque);
+		rc = fn(fdt, domain_offset, region_offset,
+			fdt32_to_cpu(regions[(2 * i) + 1]), opaque);
+		if (rc)
+			return rc;
 	}
+
+	return 0;
 }
 
 struct __fixup_find_domain_offset_info {
@@ -83,57 +91,61 @@ struct __fixup_find_domain_offset_info {
 	int *doffset;
 };
 
-static void __fixup_find_domain_offset(void *fdt, int doff, void *p)
+static int __fixup_find_domain_offset(void *fdt, int doff, void *p)
 {
 	struct __fixup_find_domain_offset_info *fdo = p;
 
-	if (sbi_strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
-		return;
+	if (!sbi_strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
+		*fdo->doffset = doff;
 
-	*fdo->doffset = doff;
+	return 0;
 }
 
 #define DISABLE_DEVICES_MASK	(SBI_DOMAIN_MEMREGION_READABLE | \
 				 SBI_DOMAIN_MEMREGION_WRITEABLE | \
 				 SBI_DOMAIN_MEMREGION_EXECUTABLE)
 
-static void __fixup_count_disable_devices(void *fdt, int doff, int roff,
-					  u32 perm, void *p)
+static int __fixup_count_disable_devices(void *fdt, int doff, int roff,
+					 u32 perm, void *p)
 {
 	int len;
 	u32 *dcount = p;
 
 	if (perm & DISABLE_DEVICES_MASK)
-		return;
+		return 0;
 
 	len = 0;
 	if (fdt_getprop(fdt, roff, "devices", &len))
 		*dcount += len / sizeof(u32);
+
+	return 0;
 }
 
-static void __fixup_disable_devices(void *fdt, int doff, int roff,
-				    u32 raccess, void *p)
+static int __fixup_disable_devices(void *fdt, int doff, int roff,
+				   u32 raccess, void *p)
 {
 	int i, len, coff;
 	const u32 *devices;
 
 	if (raccess & DISABLE_DEVICES_MASK)
-		return;
+		return 0;
 
 	len = 0;
 	devices = fdt_getprop(fdt, roff, "devices", &len);
 	if (!devices)
-		return;
+		return 0;
 	len = len / sizeof(u32);
 
 	for (i = 0; i < len; i++) {
 		coff = fdt_node_offset_by_phandle(fdt,
 					fdt32_to_cpu(devices[i]));
 		if (coff < 0)
-			continue;
+			return coff;
 
 		fdt_setprop_string(fdt, coff, "status", "disabled");
 	}
+
+	return 0;
 }
 
 void fdt_domain_fixup(void *fdt)
@@ -221,9 +233,9 @@ struct sbi_domain *fdt_domain_get(u32 hartid)
 	return fdt_hartid_to_domain[hartid];
 }
 
-static void __fdt_parse_region(void *fdt, int domain_offset,
-			       int region_offset, u32 region_access,
-			       void *opaque)
+static int __fdt_parse_region(void *fdt, int domain_offset,
+			      int region_offset, u32 region_access,
+			      void *opaque)
 {
 	int len;
 	u32 val32;
@@ -234,13 +246,13 @@ static void __fdt_parse_region(void *fdt, int domain_offset,
 
 	/* Find next region of the domain */
 	if (FDT_DOMAIN_REGION_MAX_COUNT <= *region_count)
-		return;
+		return SBI_EINVAL;
 	region = &fdt_regions[fdt_domains_count][*region_count];
 
 	/* Read "base" DT property */
 	val = fdt_getprop(fdt, region_offset, "base", &len);
 	if (!val && len >= 8)
-		return;
+		return SBI_EINVAL;
 	val64 = fdt32_to_cpu(val[0]);
 	val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
 	region->base = val64;
@@ -248,10 +260,10 @@ static void __fdt_parse_region(void *fdt, int domain_offset,
 	/* Read "order" DT property */
 	val = fdt_getprop(fdt, region_offset, "order", &len);
 	if (!val && len >= 4)
-		return;
+		return SBI_EINVAL;
 	val32 = fdt32_to_cpu(*val);
 	if (val32 < 3 || __riscv_xlen < val32)
-		return;
+		return SBI_EINVAL;
 	region->order = val32;
 
 	/* Read "mmio" DT property */
@@ -260,9 +272,11 @@ static void __fdt_parse_region(void *fdt, int domain_offset,
 		region->flags |= SBI_DOMAIN_MEMREGION_MMIO;
 
 	(*region_count)++;
+
+	return 0;
 }
 
-static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
+static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 {
 	u32 val32;
 	u64 val64;
@@ -275,7 +289,7 @@ static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 
 	/* Sanity check on maximum domains we can handle */
 	if (FDT_DOMAIN_MAX_COUNT <= fdt_domains_count)
-		return;
+		return SBI_EINVAL;
 	dom = &fdt_domains[fdt_domains_count];
 	mask = &fdt_masks[fdt_domains_count];
 	regions = &fdt_regions[fdt_domains_count][0];
@@ -295,11 +309,11 @@ static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			cpu_offset = fdt_node_offset_by_phandle(fdt,
 							fdt32_to_cpu(val[i]));
 			if (cpu_offset < 0)
-				continue;
+				return cpu_offset;
 
 			err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
 			if (err)
-				continue;
+				return err;
 
 			sbi_hartmask_set_hart(val32, mask);
 		}
@@ -310,8 +324,10 @@ static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	sbi_memset(regions, 0,
 		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 2));
 	dom->regions = regions;
-	fdt_iterate_each_memregion(fdt, domain_offset, &val32,
-				   __fdt_parse_region);
+	err = fdt_iterate_each_memregion(fdt, domain_offset, &val32,
+					 __fdt_parse_region);
+	if (err)
+		return err;
 	sbi_domain_memregion_initfw(&regions[val32]);
 
 	/* Read "boot-hart" DT property */
@@ -374,12 +390,14 @@ static void __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 
 	/* Increment domains count */
 	fdt_domains_count++;
+
+	return 0;
 }
 
 int fdt_domains_populate(void *fdt)
 {
 	const u32 *val;
-	int cold_domain_offset;
+	int rc, cold_domain_offset;
 	u32 i, hartid, cold_hartid;
 	int err, len, cpus_offset, cpu_offset, domain_offset;
 
@@ -412,7 +430,10 @@ int fdt_domains_populate(void *fdt)
 	}
 
 	/* Iterate over each domain in FDT and populate details */
-	fdt_iterate_each_domain(fdt, &cold_domain_offset, __fdt_parse_domain);
+	rc = fdt_iterate_each_domain(fdt, &cold_domain_offset,
+				     __fdt_parse_domain);
+	if (rc)
+		return rc;
 
 	/* HART to domain assignment based on CPU DT nodes*/
 	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {

From 7baccfca790c429b85cf30ae83d06c6e8b934e86 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 13 Dec 2020 15:09:42 +0530
Subject: [PATCH 0706/1765] lib: sbi: Add function to register new domain

We add sbi_domain_register() function to help platform code register
a new domain explicitly instead of depending on domain_get() platform
callback. This function will eventually help us completely remove the
domain_get() platform callback.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_domain.h | 10 ++++++
 lib/sbi/sbi_domain.c     | 71 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index a7cb61e9e33..1f8b942c481 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -146,6 +146,16 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix);
 /** Dump all domain details on the console */
 void sbi_domain_dump_all(const char *suffix);
 
+/**
+ * Register a new domain
+ * @param dom pointer to domain
+ * @param assign_mask pointer to HART mask of HARTs assigned to the domain
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_domain_register(struct sbi_domain *dom,
+			const struct sbi_hartmask *assign_mask);
+
 /** Finalize domain tables and startup non-root domains */
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
 
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 1a3651ba310..d22fb907e07 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -367,6 +367,77 @@ void sbi_domain_dump_all(const char *suffix)
 	}
 }
 
+int sbi_domain_register(struct sbi_domain *dom,
+			const struct sbi_hartmask *assign_mask)
+{
+	u32 i;
+	int rc;
+	struct sbi_domain *tdom;
+	u32 cold_hartid = current_hartid();
+	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
+
+	if (!dom || !assign_mask)
+		return SBI_EINVAL;
+
+	/* Check if domain already discovered */
+	sbi_domain_for_each(i, tdom) {
+		if (tdom == dom)
+			return SBI_EALREADY;
+	}
+
+	/*
+	 * Ensure that we have room for Domain Index to
+	 * HART ID mapping
+	 */
+	if (SBI_DOMAIN_MAX_INDEX <= domain_count) {
+		sbi_printf("%s: No room for %s\n",
+			   __func__, dom->name);
+		return SBI_ENOSPC;
+	}
+
+	/* Sanitize discovered domain */
+	rc = sanitize_domain(plat, dom);
+	if (rc) {
+		sbi_printf("%s: sanity checks failed for"
+			   " %s (error %d)\n", __func__,
+			   dom->name, rc);
+		return rc;
+	}
+
+	/* Assign index to domain */
+	dom->index = domain_count++;
+	domidx_to_domain_table[dom->index] = dom;
+
+	/* Clear assigned HARTs of domain */
+	sbi_hartmask_clear_all(&dom->assigned_harts);
+
+	/* Assign domain to HART if HART is a possible HART */
+	sbi_hartmask_for_each_hart(i, assign_mask) {
+		if (!sbi_hartmask_test_hart(i, dom->possible_harts))
+			continue;
+
+		tdom = hartid_to_domain_table[i];
+		if (tdom)
+			sbi_hartmask_clear_hart(i,
+					&tdom->assigned_harts);
+		hartid_to_domain_table[i] = dom;
+		sbi_hartmask_set_hart(i, &dom->assigned_harts);
+
+		/*
+		 * If cold boot HART is assigned to this domain then
+		 * override boot HART of this domain.
+		 */
+		if (i == cold_hartid &&
+		    dom->boot_hartid != cold_hartid) {
+			sbi_printf("Domain%d Boot HARTID forced to"
+				   " %d\n", dom->index, cold_hartid);
+			dom->boot_hartid = cold_hartid;
+		}
+	}
+
+	return 0;
+}
+
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;

From 6fc1986f5024196e46a46aa979cc2c884319af28 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 13 Dec 2020 15:37:34 +0530
Subject: [PATCH 0707/1765] lib: utils: Remove fdt_domain_get() function

The fdt_domain_get() function is now redundant because the
fdt_domains_populate() function can explicitly register new
domains using the sbi_domain_register() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_domain.h | 11 ----
 lib/utils/fdt/fdt_domain.c         | 83 +++++++++++++-----------------
 platform/generic/platform.c        |  1 -
 3 files changed, 36 insertions(+), 59 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_domain.h b/include/sbi_utils/fdt/fdt_domain.h
index 68daacc857b..5448eb4d957 100644
--- a/include/sbi_utils/fdt/fdt_domain.h
+++ b/include/sbi_utils/fdt/fdt_domain.h
@@ -58,17 +58,6 @@ int fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
  */
 void fdt_domain_fixup(void *fdt);
 
-/**
- * Get domain instance for given HART
- *
- * Note: Domains should be populated before using this function.
- *
- * @param hartid the HART for which domain instance is needed
- *
- * @return pointer to domain instance on success and NULL on failure
- */
-struct sbi_domain *fdt_domain_get(u32 hartid);
-
 /**
  * Populate domains from device tree
  *
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 0352af55b8e..09615e53e90 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -215,8 +215,6 @@ void fdt_domain_fixup(void *fdt)
 	fdt_nop_node(fdt, poffset);
 }
 
-static struct sbi_domain *fdt_hartid_to_domain[SBI_HARTMASK_MAX_BITS];
-
 #define FDT_DOMAIN_MAX_COUNT		8
 #define FDT_DOMAIN_REGION_MAX_COUNT	16
 
@@ -226,13 +224,6 @@ static struct sbi_hartmask fdt_masks[FDT_DOMAIN_MAX_COUNT];
 static struct sbi_domain_memregion
 	fdt_regions[FDT_DOMAIN_MAX_COUNT][FDT_DOMAIN_REGION_MAX_COUNT + 2];
 
-struct sbi_domain *fdt_domain_get(u32 hartid)
-{
-	if (SBI_HARTMASK_MAX_BITS <= hartid)
-		return NULL;
-	return fdt_hartid_to_domain[hartid];
-}
-
 static int __fdt_parse_region(void *fdt, int domain_offset,
 			      int region_offset, u32 region_access,
 			      void *opaque)
@@ -283,9 +274,10 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	const u32 *val;
 	struct sbi_domain *dom;
 	struct sbi_hartmask *mask;
-	int i, err, len, cpu_offset;
+	struct sbi_hartmask assign_mask;
 	int *cold_domain_offset = opaque;
 	struct sbi_domain_memregion *regions;
+	int i, err, len, cpus_offset, cpu_offset, doffset;
 
 	/* Sanity check on maximum domains we can handle */
 	if (FDT_DOMAIN_MAX_COUNT <= fdt_domains_count)
@@ -388,18 +380,46 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	else
 		dom->system_reset_allowed = FALSE;
 
+	/* Find /cpus DT node */
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	/* HART to domain assignment mask based on CPU DT nodes */
+	sbi_hartmask_clear_all(&assign_mask);
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
+		if (err)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= val32)
+			continue;
+
+		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
+		if (!val || len < 4)
+			return SBI_EINVAL;
+
+		doffset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
+		if (doffset < 0)
+			return doffset;
+
+		if (doffset == domain_offset)
+			sbi_hartmask_set_hart(val32, &assign_mask);
+	}
+
 	/* Increment domains count */
 	fdt_domains_count++;
 
-	return 0;
+	/* Register the domain */
+	return sbi_domain_register(dom, &assign_mask);
 }
 
 int fdt_domains_populate(void *fdt)
 {
 	const u32 *val;
-	int rc, cold_domain_offset;
-	u32 i, hartid, cold_hartid;
-	int err, len, cpus_offset, cpu_offset, domain_offset;
+	int cold_domain_offset;
+	u32 hartid, cold_hartid;
+	int err, len, cpus_offset, cpu_offset;
 
 	/* Sanity checks */
 	if (!fdt)
@@ -430,37 +450,6 @@ int fdt_domains_populate(void *fdt)
 	}
 
 	/* Iterate over each domain in FDT and populate details */
-	rc = fdt_iterate_each_domain(fdt, &cold_domain_offset,
-				     __fdt_parse_domain);
-	if (rc)
-		return rc;
-
-	/* HART to domain assignment based on CPU DT nodes*/
-	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
-		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
-		if (err)
-			continue;
-
-		if (SBI_HARTMASK_MAX_BITS <= hartid)
-			continue;
-
-		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
-		if (!val || len < 4)
-			continue;
-
-		domain_offset = fdt_node_offset_by_phandle(fdt,
-							   fdt32_to_cpu(*val));
-		if (domain_offset < 0)
-			continue;
-
-		for (i = 0; i < fdt_domains_count; i++) {
-			if (!sbi_strcmp(fdt_domains[i].name,
-				fdt_get_name(fdt, domain_offset, NULL))) {
-				fdt_hartid_to_domain[hartid] = &fdt_domains[i];
-				break;
-			}
-		}
-	}
-
-	return 0;
+	return fdt_iterate_each_domain(fdt, &cold_domain_offset,
+				       __fdt_parse_domain);
 }
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 6c93a51abeb..8c1e06f1244 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -210,7 +210,6 @@ const struct sbi_platform_operations platform_ops = {
 	.early_exit		= generic_early_exit,
 	.final_exit		= generic_final_exit,
 	.domains_init		= generic_domains_init,
-	.domain_get		= fdt_domain_get,
 	.console_putc		= fdt_serial_putc,
 	.console_getc		= fdt_serial_getc,
 	.console_init		= fdt_serial_init,

From a029bd90c63307e9ef2d7ddbaa2eb2c799fca98a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 13 Dec 2020 15:44:22 +0530
Subject: [PATCH 0708/1765] lib: sbi: Remove domain_get() platform callback
 function

The domain_get() platform callback function is now redundant
because fdt_domain_populate() register new domain explicitly
using the sbi_domain_register() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 18 ---------
 lib/sbi/sbi_domain.c       | 78 ++------------------------------------
 2 files changed, 3 insertions(+), 93 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 3681a78e47a..58aba71dbea 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -93,8 +93,6 @@ struct sbi_platform_operations {
 
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
-	/** Get domain pointer for given HART id */
-	struct sbi_domain *(*domain_get)(u32 hartid);
 
 	/** Write a character to the platform console output */
 	void (*console_putc)(char ch);
@@ -467,22 +465,6 @@ static inline int sbi_platform_domains_init(const struct sbi_platform *plat)
 	return 0;
 }
 
-/**
- * Get domain pointer for given HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid shorthand letter for CPU extensions
- *
- * @return non-NULL domain pointer on success and NULL on failure
- */
-static inline struct sbi_domain *sbi_platform_domain_get(
-				const struct sbi_platform *plat, u32 hartid)
-{
-	if (plat && sbi_platform_ops(plat)->domain_get)
-		return sbi_platform_ops(plat)->domain_get(hartid);
-	return NULL;
-}
-
 /**
  * Write a character to the platform console output
  *
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index d22fb907e07..6d4c6082a2f 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -441,12 +441,11 @@ int sbi_domain_register(struct sbi_domain *dom,
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
-	u32 i, j, dhart;
-	bool dom_exists;
-	struct sbi_domain *dom, *tdom;
+	u32 i, dhart;
+	struct sbi_domain *dom;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	/* Initialize domains for the platform */
+	/* Initialize and populate domains for the platform */
 	rc = sbi_platform_domains_init(plat);
 	if (rc) {
 		sbi_printf("%s: platform domains_init() failed (error %d)\n",
@@ -454,77 +453,6 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 		return rc;
 	}
 
-	/* Discover domains */
-	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		/* Ignore invalid HART */
-		if (sbi_platform_hart_invalid(plat, i))
-			continue;
-
-		/* Get domain assigned to HART */
-		dom = sbi_platform_domain_get(plat, i);
-		if (!dom)
-			continue;
-
-		/* Check if domain already discovered */
-		dom_exists = FALSE;
-		sbi_domain_for_each(j, tdom) {
-			if (tdom == dom) {
-				dom_exists = TRUE;
-				break;
-			}
-		}
-
-		/* Newly discovered domain */
-		if (!dom_exists) {
-			/*
-			 * Ensure that we have room for Domain Index to
-			 * HART ID mapping
-			 */
-			if (SBI_DOMAIN_MAX_INDEX <= domain_count) {
-				sbi_printf("%s: No room for %s\n",
-					   __func__, dom->name);
-				return SBI_ENOSPC;
-			}
-
-			/* Sanitize discovered domain */
-			rc = sanitize_domain(plat, dom);
-			if (rc) {
-				sbi_printf("%s: sanity checks failed for"
-					   " %s (error %d)\n", __func__,
-					   dom->name, rc);
-				return rc;
-			}
-
-			/* Assign index to domain */
-			dom->index = domain_count++;
-			domidx_to_domain_table[dom->index] = dom;
-
-			/* Clear assigned HARTs of domain */
-			sbi_hartmask_clear_all(&dom->assigned_harts);
-		}
-
-		/* Assign domain to HART if HART is a possible HART */
-		if (sbi_hartmask_test_hart(i, dom->possible_harts)) {
-			tdom = hartid_to_domain_table[i];
-			if (tdom)
-				sbi_hartmask_clear_hart(i,
-						&tdom->assigned_harts);
-			hartid_to_domain_table[i] = dom;
-			sbi_hartmask_set_hart(i, &dom->assigned_harts);
-
-			/*
-			 * If cold boot HART is assigned to this domain then
-			 * override boot HART of this domain.
-			 */
-			if (i == cold_hartid &&
-			    dom->boot_hartid != cold_hartid) {
-				sbi_printf("Domain%d Boot HARTID forced to"
-					   " %d\n", dom->index, cold_hartid);
-				dom->boot_hartid = cold_hartid;
-			}
-		}
-	}
-
 	/* Startup boot HART of domains */
 	sbi_domain_for_each(i, dom) {
 		/* Domain boot HART */

From 7dcb1e1753e9c5daec0580779ea8c31778bff152 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 19 Dec 2020 17:39:57 +0530
Subject: [PATCH 0709/1765] lib: sbi: Fix sign-extension in
 sbi_misaligned_load_handler()

The misaligned load emulation does not sign-extend values correctly
due to missing sign typecast in value passed to the SET_RD() macro.

A very easy way to reproduce this issue is to load 16-bit value
0xff1e from a byte aligned address using LH instruction on hardware
lacking misaligned load/store.

This patch fixes sbi_misaligned_load_handler() for above issue.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_misaligned_ldst.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 964a372fadd..5057cb5ecd5 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -128,7 +128,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 	}
 
 	if (!fp)
-		SET_RD(insn, regs, val.data_ulong << shift >> shift);
+		SET_RD(insn, regs, ((long)(val.data_ulong << shift)) >> shift);
 #ifdef __riscv_flen
 	else if (len == 8)
 		SET_F64_RD(insn, regs, val.data_u64);

From 80bc5065bb67f9d118b83f64cbe96f2e3e1bc0c6 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 28 Dec 2020 18:25:18 +0530
Subject: [PATCH 0710/1765] lib: sbi: Replace args with trap registers in ecall
 handler

We had added args pointer in ecall handler to ensure that ecall
handler only implements functionality and does not deal with
SBI calling convention. This also helped us to keep SBI calling
convention related code in one place at sbi_ecall_handler().

The Keystone Enclavce project needs access to the trap regsiters
in their ecall handler so that they can context switch enclaves
in custom SBI calls. To help the Keystone Enclave project, we
replace the args pointer in ecall handler parameter with a const
pointer to trap registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h         |  3 +-
 include/sbi/sbi_platform.h      |  9 ++---
 lib/sbi/sbi_ecall.c             | 10 +-----
 lib/sbi/sbi_ecall_base.c        |  6 ++--
 lib/sbi/sbi_ecall_hsm.c         |  8 +++--
 lib/sbi/sbi_ecall_legacy.c      | 25 +++++++-------
 lib/sbi/sbi_ecall_replace.c     | 59 ++++++++++++++++++---------------
 lib/sbi/sbi_ecall_vendor.c      |  6 ++--
 platform/andes/ae350/platform.c | 19 ++++++-----
 9 files changed, 76 insertions(+), 69 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 1ef86e2d411..d3570854442 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -26,7 +26,8 @@ struct sbi_ecall_extension {
 	unsigned long extid_end;
 	int (* probe)(unsigned long extid, unsigned long *out_val);
 	int (* handle)(unsigned long extid, unsigned long funcid,
-		       unsigned long *args, unsigned long *out_val,
+		       const struct sbi_trap_regs *regs,
+		       unsigned long *out_val,
 		       struct sbi_trap_info *out_trap);
 };
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 58aba71dbea..7b8fe899e26 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -47,6 +47,7 @@
 
 struct sbi_domain;
 struct sbi_trap_info;
+struct sbi_trap_regs;
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
@@ -146,7 +147,7 @@ struct sbi_platform_operations {
 	int (*vendor_ext_check)(long extid);
 	/** platform specific SBI extension implementation provider */
 	int (*vendor_ext_provider)(long extid, long funcid,
-				   unsigned long *args,
+				   const struct sbi_trap_regs *regs,
 				   unsigned long *out_value,
 				   struct sbi_trap_info *out_trap);
 } __packed;
@@ -710,7 +711,7 @@ static inline int sbi_platform_vendor_ext_check(const struct sbi_platform *plat,
  * @param plat pointer to struct sbi_platform
  * @param extid	vendor SBI extension id
  * @param funcid SBI function id within the extension id
- * @param args pointer to arguments passed by the caller
+ * @param regs pointer to trap registers passed by the caller
  * @param out_value output value that can be filled by the callee
  * @param out_trap trap info that can be filled by the callee
  *
@@ -719,13 +720,13 @@ static inline int sbi_platform_vendor_ext_check(const struct sbi_platform *plat,
 static inline int sbi_platform_vendor_ext_provider(
 					const struct sbi_platform *plat,
 					long extid, long funcid,
-					unsigned long *args,
+					const struct sbi_trap_regs *regs,
 					unsigned long *out_value,
 					struct sbi_trap_info *out_trap)
 {
 	if (plat && sbi_platform_ops(plat)->vendor_ext_provider) {
 		return sbi_platform_ops(plat)->vendor_ext_provider(extid,
-								funcid, args,
+								funcid, regs,
 								out_value,
 								out_trap);
 	}
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 6d41cffacd7..e92a5393046 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -101,19 +101,11 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 	struct sbi_trap_info trap = {0};
 	unsigned long out_val = 0;
 	bool is_0_1_spec = 0;
-	unsigned long args[6];
-
-	args[0] = regs->a0;
-	args[1] = regs->a1;
-	args[2] = regs->a2;
-	args[3] = regs->a3;
-	args[4] = regs->a4;
-	args[5] = regs->a5;
 
 	ext = sbi_ecall_find_extension(extension_id);
 	if (ext && ext->handle) {
 		ret = ext->handle(extension_id, func_id,
-				  args, &out_val, &trap);
+				  regs, &out_val, &trap);
 		if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 		    extension_id <= SBI_EXT_0_1_SHUTDOWN)
 			is_0_1_spec = 1;
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
index 53c93c8633c..786d2ac6792 100644
--- a/lib/sbi/sbi_ecall_base.c
+++ b/lib/sbi/sbi_ecall_base.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
 #include <sbi/sbi_version.h>
 #include <sbi/riscv_asm.h>
 
@@ -32,7 +33,8 @@ static int sbi_ecall_base_probe(unsigned long extid, unsigned long *out_val)
 }
 
 static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
-				  unsigned long *args, unsigned long *out_val,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
 				  struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
@@ -61,7 +63,7 @@ static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
 		*out_val = csr_read(CSR_MIMPID);
 		break;
 	case SBI_EXT_BASE_PROBE_EXT:
-		ret = sbi_ecall_base_probe(args[0], out_val);
+		ret = sbi_ecall_base_probe(regs->a0, out_val);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 376740c179e..df29d51964a 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -11,13 +11,15 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
 #include <sbi/sbi_version.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/riscv_asm.h>
 
 static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
-				 unsigned long *args, unsigned long *out_val,
+				 const struct sbi_trap_regs *regs,
+				 unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
 	ulong smode;
@@ -29,14 +31,14 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 		smode = csr_read(CSR_MSTATUS);
 		smode = (smode & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 		ret = sbi_hsm_hart_start(scratch, sbi_domain_thishart_ptr(),
-					 args[0], args[1], smode, args[2]);
+					 regs->a0, regs->a1, smode, regs->a2);
 		break;
 	case SBI_EXT_HSM_HART_STOP:
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
 		break;
 	case SBI_EXT_HSM_HART_GET_STATUS:
 		hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
-						args[0]);
+						regs->a0);
 		ret = sbi_hsm_hart_state_to_status(hstate);
 		break;
 	default:
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 7844fbbca42..8afeb00720b 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -43,7 +43,8 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 }
 
 static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
-				    unsigned long *args, unsigned long *out_val,
+				    const struct sbi_trap_regs *regs,
+				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
@@ -54,13 +55,13 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
 #if __riscv_xlen == 32
-		sbi_timer_event_start((((u64)args[1] << 32) | (u64)args[0]));
+		sbi_timer_event_start((((u64)regs->a1 << 32) | (u64)regs->a0));
 #else
-		sbi_timer_event_start((u64)args[0]);
+		sbi_timer_event_start((u64)regs->a0);
 #endif
 		break;
 	case SBI_EXT_0_1_CONSOLE_PUTCHAR:
-		sbi_putc(args[0]);
+		sbi_putc(regs->a0);
 		break;
 	case SBI_EXT_0_1_CONSOLE_GETCHAR:
 		ret = sbi_getc();
@@ -69,13 +70,13 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		sbi_ipi_clear_smode();
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP)
 			ret = sbi_ipi_send_smode(hmask, 0);
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
-		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
@@ -84,21 +85,21 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
-			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], 0, 0,
+			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
 					  SBI_TLB_FLUSH_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		ret = sbi_load_hart_mask_unpriv((ulong *)args[0],
+		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
-			SBI_TLB_INFO_INIT(&tlb_info, args[1], args[2], args[3],
-					  0, SBI_TLB_FLUSH_VMA_ASID,
-					  source_hart);
+			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
+					  regs->a2, regs->a3, 0,
+					  SBI_TLB_FLUSH_VMA_ASID, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index d06dfa23b18..a95821b3bcd 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -17,18 +17,20 @@
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
+#include <sbi/sbi_trap.h>
 
 static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
-				  unsigned long *args, unsigned long *out_val,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
 				  struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
 	if (funcid == SBI_EXT_TIME_SET_TIMER) {
 #if __riscv_xlen == 32
-		sbi_timer_event_start((((u64)args[1] << 32) | (u64)args[0]));
+		sbi_timer_event_start((((u64)regs->a1 << 32) | (u64)regs->a0));
 #else
-		sbi_timer_event_start((u64)args[0]);
+		sbi_timer_event_start((u64)regs->a0);
 #endif
 	} else
 		ret = SBI_ENOTSUPP;
@@ -43,7 +45,8 @@ struct sbi_ecall_extension ecall_time = {
 };
 
 static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
-				    unsigned long *args, unsigned long *out_val,
+				    const struct sbi_trap_regs *regs,
+				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
@@ -60,41 +63,41 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
 		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 				  SBI_ITLB_FLUSH, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, 0,
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
 				  SBI_TLB_FLUSH_GVMA, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, args[4],
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, regs->a4,
 				  SBI_TLB_FLUSH_GVMA_VMID, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, vmid,
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, vmid,
 				  SBI_TLB_FLUSH_VVMA, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4], vmid,
-				  SBI_TLB_FLUSH_VVMA_ASID, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4,
+				  vmid, SBI_TLB_FLUSH_VVMA_ASID, source_hart);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], 0, 0,
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
 				  SBI_TLB_FLUSH_VMA, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
-		SBI_TLB_INFO_INIT(&tlb_info, args[2], args[3], args[4], 0,
+		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4, 0,
 				  SBI_TLB_FLUSH_VMA_ASID, source_hart);
-		ret = sbi_tlb_request(args[0], args[1], &tlb_info);
+		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
@@ -110,13 +113,14 @@ struct sbi_ecall_extension ecall_rfence = {
 };
 
 static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
-				 unsigned long *args, unsigned long *out_val,
+				 const struct sbi_trap_regs *regs,
+				 unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
 
 	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_smode(args[0], args[1]);
+		ret = sbi_ipi_send_smode(regs->a0, regs->a1);
 	else
 		ret = SBI_ENOTSUPP;
 
@@ -130,15 +134,16 @@ struct sbi_ecall_extension ecall_ipi = {
 };
 
 static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
-				  unsigned long *args, unsigned long *out_val,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
 				  struct sbi_trap_info *out_trap)
 {
 	if (funcid == SBI_EXT_SRST_RESET) {
-		if ((((u32)-1U) <= ((u64)args[0])) ||
-		    (((u32)-1U) <= ((u64)args[1])))
+		if ((((u32)-1U) <= ((u64)regs->a0)) ||
+		    (((u32)-1U) <= ((u64)regs->a1)))
 			return SBI_EINVAL;
 
-		switch (args[0]) {
+		switch (regs->a0) {
 		case SBI_SRST_RESET_TYPE_SHUTDOWN:
 		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
 		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
@@ -147,7 +152,7 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 			return SBI_ENOTSUPP;
 		}
 
-		switch (args[1]) {
+		switch (regs->a1) {
 		case SBI_SRST_RESET_REASON_NONE:
 		case SBI_SRST_RESET_REASON_SYSFAIL:
 			break;
@@ -155,8 +160,8 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 			return SBI_ENOTSUPP;
 		}
 
-		if (sbi_system_reset_supported(args[0], args[1]))
-			sbi_system_reset(args[0], args[1]);
+		if (sbi_system_reset_supported(regs->a0, regs->a1))
+			sbi_system_reset(regs->a0, regs->a1);
 	}
 
 	return SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 34c0be68224..9252829633a 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_trap.h>
 
 static int sbi_ecall_vendor_probe(unsigned long extid,
 				  unsigned long *out_val)
@@ -22,11 +23,12 @@ static int sbi_ecall_vendor_probe(unsigned long extid,
 }
 
 static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
-				    unsigned long *args, unsigned long *out_val,
+				    const struct sbi_trap_regs *regs,
+				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
-						extid, funcid, args,
+						extid, funcid, regs,
 						out_val, out_trap);
 }
 
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 6d6ce4ecfe8..aec91cdff40 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_trap.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
@@ -116,7 +117,7 @@ static int ae350_timer_init(bool cold_boot)
 
 /* Vendor-Specific SBI handler */
 static int ae350_vendor_ext_provider(long extid, long funcid,
-	unsigned long *args, unsigned long *out_value,
+	const struct sbi_trap_regs *regs, unsigned long *out_value,
 	struct sbi_trap_info *out_trap)
 {
 	int ret = 0;
@@ -128,28 +129,28 @@ static int ae350_vendor_ext_provider(long extid, long funcid,
 		*out_value = csr_read(CSR_MMISCCTL);
 		break;
 	case SBI_EXT_ANDES_SET_MCACHE_CTL:
-		ret = mcall_set_mcache_ctl(args[0]);
+		ret = mcall_set_mcache_ctl(regs->a0);
 		break;
 	case SBI_EXT_ANDES_SET_MMISC_CTL:
-		ret = mcall_set_mmisc_ctl(args[0]);
+		ret = mcall_set_mmisc_ctl(regs->a0);
 		break;
 	case SBI_EXT_ANDES_ICACHE_OP:
-		ret = mcall_icache_op(args[0]);
+		ret = mcall_icache_op(regs->a0);
 		break;
 	case SBI_EXT_ANDES_DCACHE_OP:
-		ret = mcall_dcache_op(args[0]);
+		ret = mcall_dcache_op(regs->a0);
 		break;
 	case SBI_EXT_ANDES_L1CACHE_I_PREFETCH:
-		ret = mcall_l1_cache_i_prefetch_op(args[0]);
+		ret = mcall_l1_cache_i_prefetch_op(regs->a0);
 		break;
 	case SBI_EXT_ANDES_L1CACHE_D_PREFETCH:
-		ret = mcall_l1_cache_d_prefetch_op(args[0]);
+		ret = mcall_l1_cache_d_prefetch_op(regs->a0);
 		break;
 	case SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE:
-		ret = mcall_non_blocking_load_store(args[0]);
+		ret = mcall_non_blocking_load_store(regs->a0);
 		break;
 	case SBI_EXT_ANDES_WRITE_AROUND:
-		ret = mcall_write_around(args[0]);
+		ret = mcall_write_around(regs->a0);
 		break;
 	default:
 		sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);

From b7df5e4392d34d8b8d5290d5b857676e672d4c96 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Dec 2020 11:39:22 +0530
Subject: [PATCH 0711/1765] lib: sbi: Introduce sbi_trap_exit() API

We introduce sbi_trap_exit() API which can help non-firmware
(i.e. generic or platform) code to force exit trap/interrupt
handling and resume execution at context pointed by parameter
"const struct sbi_trap_regs *regs".

This new sbi_trap_exit() API will help Keystone Enclave project
to resume execution of enclave from custom SBI call handler.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S        | 43 +++++++++++++++++++++++++++++++++++++++
 include/sbi/sbi_scratch.h | 10 ++++++---
 include/sbi/sbi_trap.h    |  2 ++
 lib/sbi/sbi_trap.c        | 20 ++++++++++++++++++
 4 files changed, 72 insertions(+), 3 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index fb504e862f7..ab33e110241 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -261,6 +261,9 @@ _scratch_init:
 	/* Store hartid-to-scratch function address in scratch space */
 	la	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
+	/* Store trap-exit function address in scratch space */
+	la	a4, _trap_exit
+	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(tp)
 	/* Clear tmp0 in scratch space */
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 	/* Store firmware options in scratch space */
@@ -423,6 +426,18 @@ _skip_trap_handler_rv32_hyp:
 #endif
 	csrw	CSR_MTVEC, a4
 
+#if __riscv_xlen == 32
+	/* Override trap exit for H-extension */
+	csrr	a5, CSR_MISA
+	srli	a5, a5, ('H' - 'A')
+	andi	a5, a5, 0x1
+	beq	a5, zero, _skip_trap_exit_rv32_hyp
+	la	a4, _trap_exit_rv32_hyp
+	csrr	a5, CSR_MSCRATCH
+	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
+_skip_trap_exit_rv32_hyp:
+#endif
+
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH
 	call	sbi_init
@@ -653,6 +668,20 @@ _trap_handler:
 
 	mret
 
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl _trap_exit
+_trap_exit:
+	add	sp, a0, zero
+
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_RESTORE_MEPC_MSTATUS 0
+
+	TRAP_RESTORE_SP_T0
+
+	mret
+
 #if __riscv_xlen == 32
 	.section .entry, "ax", %progbits
 	.align 3
@@ -673,6 +702,20 @@ _trap_handler_rv32_hyp:
 	TRAP_RESTORE_SP_T0
 
 	mret
+
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl _trap_exit_rv32_hyp
+_trap_exit_rv32_hyp:
+	add	sp, a0, zero
+
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+
+	TRAP_RESTORE_MEPC_MSTATUS 1
+
+	TRAP_RESTORE_SP_T0
+
+	mret
 #endif
 
 	.section .entry, "ax", %progbits
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 9f3453d3823..e7079f5424a 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -30,12 +30,14 @@
 #define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
+/** Offset of trap_exit member in sbi_scratch */
+#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(8 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(8 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET			(9 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET		(9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET		(10 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(10 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(11 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -63,6 +65,8 @@ struct sbi_scratch {
 	unsigned long platform_addr;
 	/** Address of HART ID to sbi_scratch conversion function */
 	unsigned long hartid_to_scratch;
+	/** Address of trap exit function */
+	unsigned long trap_exit;
 	/** Temporary storage */
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 5d0962fcb94..04001df7a7f 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -207,6 +207,8 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 
 void sbi_trap_handler(struct sbi_trap_regs *regs);
 
+void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs);
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index db5aa2fa40d..b7349d2c914 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
@@ -271,3 +272,22 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 	if (rc)
 		sbi_trap_error(msg, rc, mcause, mtval, mtval2, mtinst, regs);
 }
+
+typedef void (*trap_exit_t)(const struct sbi_trap_regs *regs);
+
+/**
+ * Exit trap/interrupt handling
+ *
+ * This function is called by non-firmware code to abruptly exit
+ * trap/interrupt handling and resume execution at context pointed
+ * by given register state.
+ *
+ * @param regs pointer to register state
+ */
+void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	((trap_exit_t)scratch->trap_exit)(regs);
+	__builtin_unreachable();
+}

From 12394a269b8b60e2d37b56afb2fa39fde6a3a4b8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 29 Dec 2020 13:51:06 +0530
Subject: [PATCH 0712/1765] lib: sbi: Allow custom local TLB flush function

Currently, we have fixed TLB flush types supported by the
remote TLB library. This approach is not flexible and does
not allow custom local TLB flush function. For example,
after updating PMP entries on a set of HARTs at runtime,
we have to flush TLB on these HARTs as well.

To support custom local TLB flush function, we replace the
"type" field of "struct sbi_tlb_info" with a local TLB flush
function pointer. We also provide definitions of standard TLB
flush operations (such as fence_i, sfence.vma, hfence.vvma,
hfence.gvma, etc).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_tlb.h       | 24 +++++++--------
 lib/sbi/sbi_ecall_legacy.c  |  9 ++++--
 lib/sbi/sbi_ecall_replace.c | 16 +++++-----
 lib/sbi/sbi_tlb.c           | 59 +++++++++++--------------------------
 4 files changed, 44 insertions(+), 64 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 6ee64a90eb7..48f1962d7dc 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -22,16 +22,6 @@
 
 #define SBI_TLB_FIFO_NUM_ENTRIES		8
 
-enum sbi_tlb_info_types {
-	SBI_TLB_FLUSH_VMA,
-	SBI_TLB_FLUSH_VMA_ASID,
-	SBI_TLB_FLUSH_GVMA,
-	SBI_TLB_FLUSH_GVMA_VMID,
-	SBI_TLB_FLUSH_VVMA,
-	SBI_TLB_FLUSH_VVMA_ASID,
-	SBI_ITLB_FLUSH
-};
-
 struct sbi_scratch;
 
 struct sbi_tlb_info {
@@ -39,17 +29,25 @@ struct sbi_tlb_info {
 	unsigned long size;
 	unsigned long asid;
 	unsigned long vmid;
-	unsigned long type;
+	void (*local_fn)(struct sbi_tlb_info *tinfo);
 	struct sbi_hartmask smask;
 };
 
-#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __type, __src) \
+void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo);
+void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo);
+
+#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __lfn, __src) \
 do { \
 	(__p)->start = (__start); \
 	(__p)->size = (__size); \
 	(__p)->asid = (__asid); \
 	(__p)->vmid = (__vmid); \
-	(__p)->type = (__type); \
+	(__p)->local_fn = (__lfn); \
 	SBI_HARTMASK_INIT_EXCEPT(&(__p)->smask, (__src)); \
 } while (0)
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 8afeb00720b..1a7fe26e4bc 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -80,7 +80,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
-					  SBI_ITLB_FLUSH, source_hart);
+					  sbi_tlb_local_fence_i,
+					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
@@ -89,7 +90,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
-					  SBI_TLB_FLUSH_VMA, source_hart);
+					  sbi_tlb_local_sfence_vma,
+					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
@@ -99,7 +101,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
-					  SBI_TLB_FLUSH_VMA_ASID, source_hart);
+					  sbi_tlb_local_sfence_vma_asid,
+					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index a95821b3bcd..a7935d97300 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -62,41 +62,43 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	switch (funcid) {
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
 		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
-				  SBI_ITLB_FLUSH, source_hart);
+				  sbi_tlb_local_fence_i, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
-				  SBI_TLB_FLUSH_GVMA, source_hart);
+				  sbi_tlb_local_hfence_gvma, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, regs->a4,
-				  SBI_TLB_FLUSH_GVMA_VMID, source_hart);
+				  sbi_tlb_local_hfence_gvma_vmid,
+				  source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, vmid,
-				  SBI_TLB_FLUSH_VVMA, source_hart);
+				  sbi_tlb_local_hfence_vvma, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4,
-				  vmid, SBI_TLB_FLUSH_VVMA_ASID, source_hart);
+				  vmid, sbi_tlb_local_hfence_vvma_asid,
+				  source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
-				  SBI_TLB_FLUSH_VMA, source_hart);
+				  sbi_tlb_local_sfence_vma, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4, 0,
-				  SBI_TLB_FLUSH_VMA_ASID, source_hart);
+				  sbi_tlb_local_sfence_vma_asid, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	default:
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index c8e62cdd261..73f59e8681e 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -32,7 +32,7 @@ static void sbi_tlb_flush_all(void)
 	__asm__ __volatile("sfence.vma");
 }
 
-static void sbi_tlb_hfence_vvma(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -55,7 +55,7 @@ static void sbi_tlb_hfence_vvma(struct sbi_tlb_info *tinfo)
 	csr_write(CSR_HGATP, hgatp);
 }
 
-static void sbi_tlb_hfence_gvma(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -71,7 +71,7 @@ static void sbi_tlb_hfence_gvma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_sfence_vma(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -90,7 +90,7 @@ static void sbi_tlb_sfence_vma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -119,7 +119,7 @@ static void sbi_tlb_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	csr_write(CSR_HGATP, hgatp);
 }
 
-static void sbi_tlb_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -141,7 +141,7 @@ static void sbi_tlb_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -170,35 +170,9 @@ static void sbi_tlb_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_local_flush(struct sbi_tlb_info *tinfo)
+void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)
 {
-	switch (tinfo->type) {
-	case SBI_TLB_FLUSH_VMA:
-		sbi_tlb_sfence_vma(tinfo);
-		break;
-	case SBI_TLB_FLUSH_VMA_ASID:
-		sbi_tlb_sfence_vma_asid(tinfo);
-		break;
-	case SBI_TLB_FLUSH_GVMA:
-		sbi_tlb_hfence_gvma(tinfo);
-		break;
-	case SBI_TLB_FLUSH_GVMA_VMID:
-		sbi_tlb_hfence_gvma_vmid(tinfo);
-		break;
-	case SBI_TLB_FLUSH_VVMA:
-		sbi_tlb_hfence_vvma(tinfo);
-		break;
-	case SBI_TLB_FLUSH_VVMA_ASID:
-		sbi_tlb_hfence_vvma_asid(tinfo);
-		break;
-	case SBI_ITLB_FLUSH:
-		__asm__ __volatile("fence.i");
-		break;
-	default:
-		sbi_printf("Invalid tlb flush request type [%lu]\n",
-			   tinfo->type);
-	}
-	return;
+	__asm__ __volatile("fence.i");
 }
 
 static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
@@ -207,7 +181,7 @@ static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 	struct sbi_scratch *rscratch = NULL;
 	unsigned long *rtlb_sync = NULL;
 
-	sbi_tlb_local_flush(tinfo);
+	tinfo->local_fn(tinfo);
 
 	sbi_hartmask_for_each_hart(rhartid, &tinfo->smask) {
 		rscratch = sbi_hartid_to_scratch(rhartid);
@@ -316,13 +290,13 @@ static int sbi_tlb_update_cb(void *in, void *data)
 	curr = (struct sbi_tlb_info *)data;
 	next = (struct sbi_tlb_info *)in;
 
-	if (next->type == SBI_TLB_FLUSH_VMA_ASID &&
-	    curr->type == SBI_TLB_FLUSH_VMA_ASID) {
+	if (next->local_fn == sbi_tlb_local_sfence_vma_asid &&
+	    curr->local_fn == sbi_tlb_local_sfence_vma_asid) {
 		if (next->asid == curr->asid)
 			ret = __sbi_tlb_range_check(curr, next);
-	} else if (next->type == SBI_TLB_FLUSH_VMA &&
-		   curr->type == SBI_TLB_FLUSH_VMA) {
-			ret = __sbi_tlb_range_check(curr, next);
+	} else if (next->local_fn == sbi_tlb_local_sfence_vma &&
+		   curr->local_fn == sbi_tlb_local_sfence_vma) {
+		ret = __sbi_tlb_range_check(curr, next);
 	}
 
 	return ret;
@@ -352,7 +326,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 	 * then just do a local flush and return;
 	 */
 	if (remote_hartid == curr_hartid) {
-		sbi_tlb_local_flush(tinfo);
+		tinfo->local_fn(tinfo);
 		return -1;
 	}
 
@@ -391,6 +365,9 @@ static u32 tlb_event = SBI_IPI_EVENT_MAX;
 
 int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 {
+	if (!tinfo->local_fn)
+		return SBI_EINVAL;
+
 	return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);
 }
 

From 0d49c3bc1823df8bf229ba3ece8ca0a753f0622b Mon Sep 17 00:00:00 2001
From: Vijai Kumar K <vijai@behindbytes.com>
Date: Mon, 7 Dec 2020 22:24:16 +0530
Subject: [PATCH 0713/1765] lib: utils: Fix shakti uart implementation

Fix uart_putc implementation.
Due to a bug in the IP, this went unnoticed.
Use macros instead of magic numbers to make the code
more readable.

Signed-off-by: Vijai Kumar K <vijai@behindbytes.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/serial/shakti-uart.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
index 493edcf7d4d..7c1148ee15f 100644
--- a/lib/utils/serial/shakti-uart.c
+++ b/lib/utils/serial/shakti-uart.c
@@ -18,18 +18,22 @@
 #define REG_IQ_CYCLES	0x1C
 #define REG_RX_THRES	0x20
 
+#define UART_TX_FULL  0x2
+#define UART_RX_FULL  0x8
+
 static volatile void *uart_base;
 
 void shakti_uart_putc(char ch)
 {
-	while((readw(uart_base + REG_STATUS) & 0x2) == 0);
+	while((readw(uart_base + REG_STATUS) & UART_TX_FULL))
+		;
 	writeb(ch, uart_base + REG_TX);
 }
 
 int shakti_uart_getc(void)
 {
 	u16 status = readw(uart_base + REG_STATUS);
-	if (status & 0x8)
+	if (status & UART_RX_FULL)
 		return readb(uart_base + REG_RX);
 	return -1;
 }

From db56341dfa1f89e258921d260449eb5edee922c4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 8 Jan 2021 10:07:01 +0530
Subject: [PATCH 0714/1765] lib: sbi: Allow platforms to provide root domain
 memory regions

Currently, the root domain memory regions are fixed in generic
code but some of the platforms may want to explicitly define
memory regions for the root domain.

This patch adds optional domains_root_regions() platform callback
which platforms can use to provide platform specific root domain
memory regions. Due to this changes, the root domain should also
undergo all sanity checks (just like regular domain) so we use
sbi_domain_register() to register root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 20 +++++++++++++++++++-
 lib/sbi/sbi_domain.c       | 16 ++++++++--------
 2 files changed, 27 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 7b8fe899e26..c2526286eaf 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -45,7 +45,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_version.h>
 
-struct sbi_domain;
+struct sbi_domain_memregion;
 struct sbi_trap_info;
 struct sbi_trap_regs;
 
@@ -92,6 +92,8 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
+	/** Get platform specific root domain memory regions */
+	struct sbi_domain_memregion *(*domains_root_regions)(void);
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
 
@@ -452,6 +454,22 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
+/**
+ * Get platform specific root domain memory regions
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return an array of memory regions terminated by a region with order zero
+ * or NULL for no memory regions
+ */
+static inline struct sbi_domain_memregion *
+sbi_platform_domains_root_regions(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->domains_root_regions)
+		return sbi_platform_ops(plat)->domains_root_regions();
+	return NULL;
+}
+
 /**
  * Initialize (or populate) domains for the platform
  *
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 6d4c6082a2f..195c9413c71 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -496,6 +496,7 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	u32 i;
+	struct sbi_domain_memregion *memregs;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Root domain firmware memory region */
@@ -514,6 +515,11 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	/* Root domain memory region end */
 	root_memregs[ROOT_END_REGION].order = 0;
 
+	/* Use platform specific root memory regions when available */
+	memregs = sbi_platform_domains_root_regions(plat);
+	if (memregs)
+		root.regions = memregs;
+
 	/* Root domain boot HART id is same as coldboot HART id */
 	root.boot_hartid = cold_hartid;
 
@@ -522,18 +528,12 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	root.next_addr = scratch->next_addr;
 	root.next_mode = scratch->next_mode;
 
-	/* Select root domain for all valid HARTs */
+	/* Root domain possible and assigned HARTs */
 	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 		if (sbi_platform_hart_invalid(plat, i))
 			continue;
 		sbi_hartmask_set_hart(i, &root_hmask);
-		hartid_to_domain_table[i] = &root;
-		sbi_hartmask_set_hart(i, &root.assigned_harts);
 	}
 
-	/* Set root domain index */
-	root.index = domain_count++;
-	domidx_to_domain_table[root.index] = &root;
-
-	return 0;
+	return sbi_domain_register(&root, &root_hmask);
 }

From e884416650c46c69c41f83235407dc840cfc9c3f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 Jan 2021 16:25:38 +0530
Subject: [PATCH 0715/1765] include: sbi: No need to pack struct sbi_trap_regs

All members in struct sbi_trap_regs are of machine word size so
no need to pack this structure. This also allows GCC to generate
more optimized instruction sequence when accessing members of
struct sbi_trap_regs.

Reported-by: Paul Campbell <taniwha@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_trap.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 04001df7a7f..5fb94f980e6 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -186,7 +186,7 @@ struct sbi_trap_regs {
 	unsigned long mstatus;
 	/** mstatusH register state (only for 32-bit) */
 	unsigned long mstatusH;
-} __packed;
+};
 
 /** Representation of trap details */
 struct sbi_trap_info {

From 386eba21bf349201f48e3e01ca129e6bffd7e674 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 Jan 2021 16:45:14 +0530
Subject: [PATCH 0716/1765] include: sbi: No need to pack struct sbi_scratch

All members in struct sbi_scrach are of machine word size so no need
to pack this structure. This also allows GCC to generate more optimized
instruction sequence when accessing members of struct sbi_scratch.

Reported-by: Paul Campbell <taniwha@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e7079f5424a..e35122bed15 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -71,7 +71,7 @@ struct sbi_scratch {
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
 	unsigned long options;
-} __packed;
+};
 
 /** Possible options for OpenSBI library */
 enum sbi_scratch_options {

From 1bbf36183ef5beeeb6358ff4450611c9c76a2ea2 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 Jan 2021 17:15:00 +0530
Subject: [PATCH 0717/1765] include: sbi: Don't pack struct sbi_platform and
 sbi_platform_operations

We don't need to pack struct sbi_platform and sbi_platform_operations
because GCC ensures member offsets match member data type irrespective
to the target system (RV32 or RV64). This also allows GCC to generate
more optimized instruction sequence when accessing members of struct
sbi_platform and struct sbi_platform_operations.

Reported-by: Paul Campbell <taniwha@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index c2526286eaf..cc7e3ff9918 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -152,7 +152,7 @@ struct sbi_platform_operations {
 				   const struct sbi_trap_regs *regs,
 				   unsigned long *out_value,
 				   struct sbi_trap_info *out_trap);
-} __packed;
+};
 
 /** Platform default per-HART stack size for exception/interrupt handling */
 #define SBI_PLATFORM_DEFAULT_HART_STACK_SIZE	8192
@@ -199,7 +199,7 @@ struct sbi_platform {
 	 * 2. HART id < SBI_HARTMASK_MAX_BITS
 	 */
 	const u32 *hart_index2id;
-} __packed;
+};
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s) \

From da5293f7425964b7eae554711fc507003db9881b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 18 Jan 2021 09:29:33 +0530
Subject: [PATCH 0718/1765] platform: template: Fix compile error

This clint driver init functions were incorrectly used in
template platform which resulted in compile error. This patch
fixes clint driver function usage in template platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 platform/template/platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/template/platform.c b/platform/template/platform.c
index 758e95f6dc2..5bdb186c178 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -107,7 +107,7 @@ static int platform_ipi_init(bool cold_boot)
 
 	/* Example if the generic CLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(&clint, NULL);
+		ret = clint_cold_ipi_init(&clint);
 		if (ret)
 			return ret;
 	}
@@ -142,7 +142,7 @@ static int platform_timer_init(bool cold_boot)
 
 	/* Example if the generic CLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_timer_init(&clint);
+		ret = clint_cold_timer_init(&clint, NULL);
 		if (ret)
 			return ret;
 	}

From 234ed8e427f4d92903123199f6590d144e0d9351 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 18 Jan 2021 18:47:19 +0530
Subject: [PATCH 0719/1765] include: Bump-up version to 0.9

This patch updates OpenSBI version to 0.9 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 86c8b90c537..3f734fe9dac 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 8
+#define OPENSBI_VERSION_MINOR 9
 
 /**
  * OpenSBI 32-bit version with:

From ec5274b04ce1433778af8aed2d583e6d85b8a702 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Fri, 26 Feb 2021 09:25:10 +0000
Subject: [PATCH 0720/1765] platform: implement K210 system reset

Implement rebooting the K210 via the system reset extension.

All reset types are treated in the same way.
A request for shutdown results in a reboot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/kendryte/k210/platform.c | 19 +++++++++++++++++++
 platform/kendryte/k210/platform.h |  9 +++++++++
 2 files changed, 28 insertions(+)

diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 944b388855b..0c50af52289 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -129,6 +129,22 @@ static int k210_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
+static int k210_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void k210_system_reset(u32 type, u32 reason)
+{
+	u32 val;
+
+	val = k210_read_sysreg(K210_RESET);
+	val |= K210_RESET_MASK;
+	k210_write_sysreg(val, K210_RESET);
+
+	while (1);
+}
+
 const struct sbi_platform_operations platform_ops = {
 	.final_init	= k210_final_init,
 
@@ -142,6 +158,9 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send  = clint_ipi_send,
 	.ipi_clear = clint_ipi_clear,
 
+	.system_reset_check	= k210_system_reset_check,
+	.system_reset		= k210_system_reset,
+
 	.timer_init	   = k210_timer_init,
 	.timer_value	   = clint_timer_value,
 	.timer_event_stop  = clint_timer_event_stop,
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 5269bc4fd3a..e425fafe687 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -27,10 +27,19 @@
 /* Registers */
 #define K210_PLL0		0x08
 #define K210_CLKSEL0		0x20
+#define K210_RESET		0x30
+
+/* Register bit masks */
+#define K210_RESET_MASK		0x01
 
 static inline u32 k210_read_sysreg(u32 reg)
 {
 	return readl((volatile void *)(K210_SYSCTL_BASE_ADDR + reg));
 }
 
+static inline void k210_write_sysreg(u32 val, u32 reg)
+{
+	writel(val, (volatile void *)(K210_SYSCTL_BASE_ADDR + reg));
+}
+
 #endif /* _K210_PLATFORM_H_ */

From 5487cf095daecf72c81e2813dcce13e203398a55 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 1 Feb 2021 10:12:47 +0530
Subject: [PATCH 0721/1765] include: sbi: Simplify HSM state define names

We simplify HSM state define names so that these defines can directly
replace SBI_HART_xyz defines used by SBI HSM implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 8 ++++----
 lib/sbi/sbi_hsm.c                 | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 002c6f9cbe1..b2722130dd9 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -58,10 +58,10 @@
 #define SBI_EXT_HSM_HART_STOP			0x1
 #define SBI_EXT_HSM_HART_GET_STATUS		0x2
 
-#define SBI_HSM_HART_STATUS_STARTED		0x0
-#define SBI_HSM_HART_STATUS_STOPPED		0x1
-#define SBI_HSM_HART_STATUS_START_PENDING	0x2
-#define SBI_HSM_HART_STATUS_STOP_PENDING	0x3
+#define SBI_HSM_STATE_STARTED			0x0
+#define SBI_HSM_STATE_STOPPED			0x1
+#define SBI_HSM_STATE_START_PENDING		0x2
+#define SBI_HSM_STATE_STOP_PENDING		0x3
 
 /* SBI function IDs for SRST extension */
 #define SBI_EXT_SRST_RESET			0x0
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index e1b2b2c3d12..1722280c92f 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -39,16 +39,16 @@ int sbi_hsm_hart_state_to_status(int state)
 
 	switch (state) {
 	case SBI_HART_STOPPED:
-		ret = SBI_HSM_HART_STATUS_STOPPED;
+		ret = SBI_HSM_STATE_STOPPED;
 		break;
 	case SBI_HART_STOPPING:
-		ret = SBI_HSM_HART_STATUS_STOP_PENDING;
+		ret = SBI_HSM_STATE_STOP_PENDING;
 		break;
 	case SBI_HART_STARTING:
-		ret = SBI_HSM_HART_STATUS_START_PENDING;
+		ret = SBI_HSM_STATE_START_PENDING;
 		break;
 	case SBI_HART_STARTED:
-		ret = SBI_HSM_HART_STATUS_STARTED;
+		ret = SBI_HSM_STATE_STARTED;
 		break;
 	default:
 		ret = SBI_EINVAL;

From 8df1f9a0d33f295fc9f9cd5f6b9b723be96ba13b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 1 Feb 2021 16:13:03 +0530
Subject: [PATCH 0722/1765] lib: sbi: Use SBI_HSM_STATE_xyz defines instead of
 SBI_STATE_xyz defines

We replace the use of SBI_STATE_xyz defines with SBI_HSM_STATE_xyz
defines because the HSM state defines are complete enough to implement
HSM state machine in OpenSBI. As a result of this, we can now remove
sbi_hsm_hart_state_to_status() function because it is now redundant
and sbi_hsm_hart_get_state() can directly return HSM state or error.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h   |  8 ------
 lib/sbi/sbi_ecall_hsm.c |  7 ++---
 lib/sbi/sbi_hsm.c       | 64 ++++++++++++++---------------------------
 3 files changed, 24 insertions(+), 55 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 48233830960..69ddee7d729 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -12,13 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-/** Hart state values **/
-#define SBI_HART_STOPPED	0
-#define SBI_HART_STOPPING	1
-#define SBI_HART_STARTING	2
-#define SBI_HART_STARTED	3
-#define SBI_HART_UNKNOWN	4
-
 struct sbi_domain;
 struct sbi_scratch;
 
@@ -30,7 +23,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       u32 hartid, ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
-int sbi_hsm_hart_state_to_status(int state);
 int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
 			      ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index df29d51964a..79a9f218957 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -23,7 +23,7 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 				 struct sbi_trap_info *out_trap)
 {
 	ulong smode;
-	int ret = 0, hstate;
+	int ret = 0;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	switch (funcid) {
@@ -37,9 +37,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_hsm_hart_stop(scratch, TRUE);
 		break;
 	case SBI_EXT_HSM_HART_GET_STATUS:
-		hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
-						regs->a0);
-		ret = sbi_hsm_hart_state_to_status(hstate);
+		ret = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
+					     regs->a0);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 1722280c92f..1f54c9dc596 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -33,30 +33,6 @@ struct sbi_hsm_data {
 	atomic_t state;
 };
 
-int sbi_hsm_hart_state_to_status(int state)
-{
-	int ret;
-
-	switch (state) {
-	case SBI_HART_STOPPED:
-		ret = SBI_HSM_STATE_STOPPED;
-		break;
-	case SBI_HART_STOPPING:
-		ret = SBI_HSM_STATE_STOP_PENDING;
-		break;
-	case SBI_HART_STARTING:
-		ret = SBI_HSM_STATE_START_PENDING;
-		break;
-	case SBI_HART_STARTED:
-		ret = SBI_HSM_STATE_STARTED;
-		break;
-	default:
-		ret = SBI_EINVAL;
-	}
-
-	return ret;
-}
-
 static inline int __sbi_hsm_hart_get_state(u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
@@ -64,7 +40,7 @@ static inline int __sbi_hsm_hart_get_state(u32 hartid)
 
 	scratch = sbi_hartid_to_scratch(hartid);
 	if (!scratch)
-		return SBI_HART_UNKNOWN;
+		return SBI_EINVAL;
 
 	hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset);
 	return atomic_read(&hdata->state);
@@ -73,14 +49,14 @@ static inline int __sbi_hsm_hart_get_state(u32 hartid)
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 {
 	if (!sbi_domain_is_assigned_hart(dom, hartid))
-		return SBI_HART_UNKNOWN;
+		return SBI_EINVAL;
 
 	return __sbi_hsm_hart_get_state(hartid);
 }
 
 static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
 {
-	if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HART_STARTED)
+	if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HSM_STATE_STARTED)
 		return TRUE;
 	else
 		return FALSE;
@@ -110,7 +86,7 @@ int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
 	for (i = hbase; i < hend; i++) {
 		hmask = 1UL << (i - hbase);
 		if ((dmask & hmask) &&
-		    (__sbi_hsm_hart_get_state(i) == SBI_HART_STARTED))
+		    (__sbi_hsm_hart_get_state(i) == SBI_HSM_STATE_STARTED))
 			*out_hmask |= hmask;
 	}
 
@@ -123,9 +99,9 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTING,
-				  SBI_HART_STARTED);
-	if (oldstate != SBI_HART_STARTING)
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_START_PENDING,
+				  SBI_HSM_STATE_STARTED);
+	if (oldstate != SBI_HSM_STATE_START_PENDING)
 		sbi_hart_hang();
 }
 
@@ -142,7 +118,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	csr_set(CSR_MIE, MIP_MSIP);
 
 	/* Wait for hart_add call*/
-	while (atomic_read(&hdata->state) != SBI_HART_STARTING) {
+	while (atomic_read(&hdata->state) != SBI_HSM_STATE_START_PENDING) {
 		wfi();
 	};
 
@@ -174,7 +150,9 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 			hdata = sbi_scratch_offset_ptr(rscratch,
 						       hart_data_offset);
 			ATOMIC_INIT(&hdata->state,
-			(i == hartid) ? SBI_HART_STARTING : SBI_HART_STOPPED);
+				    (i == hartid) ?
+				    SBI_HSM_STATE_START_PENDING :
+				    SBI_HSM_STATE_STOPPED);
 		}
 	} else {
 		sbi_hsm_hart_wait(scratch, hartid);
@@ -191,9 +169,9 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 							    hart_data_offset);
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 
-	hstate = atomic_cmpxchg(&hdata->state, SBI_HART_STOPPING,
-				SBI_HART_STOPPED);
-	if (hstate != SBI_HART_STOPPING)
+	hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOP_PENDING,
+				SBI_HSM_STATE_STOPPED);
+	if (hstate != SBI_HSM_STATE_STOP_PENDING)
 		goto fail_exit;
 
 	if (sbi_platform_has_hart_hotplug(plat)) {
@@ -238,16 +216,16 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	if (!rscratch)
 		return SBI_EINVAL;
 	hdata = sbi_scratch_offset_ptr(rscratch, hart_data_offset);
-	hstate = atomic_cmpxchg(&hdata->state, SBI_HART_STOPPED,
-				SBI_HART_STARTING);
-	if (hstate == SBI_HART_STARTED)
+	hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOPPED,
+				SBI_HSM_STATE_START_PENDING);
+	if (hstate == SBI_HSM_STATE_STARTED)
 		return SBI_EALREADY;
 
 	/**
 	 * if a hart is already transition to start or stop, another start call
 	 * is considered as invalid request.
 	 */
-	if (hstate != SBI_HART_STOPPED)
+	if (hstate != SBI_HSM_STATE_STOPPED)
 		return SBI_EINVAL;
 
 	init_count = sbi_init_count(hartid);
@@ -276,9 +254,9 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	if (!sbi_hsm_hart_started(sbi_domain_thishart_ptr(), hartid))
 		return SBI_EINVAL;
 
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HART_STARTED,
-				  SBI_HART_STOPPING);
-	if (oldstate != SBI_HART_STARTED) {
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STARTED,
+				  SBI_HSM_STATE_STOP_PENDING);
+	if (oldstate != SBI_HSM_STATE_STARTED) {
 		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
 			   __func__, oldstate);
 		return SBI_EDENIED;

From 7c867fd19f92ac36aa2cd329f1eb687c6e630a26 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 2 Feb 2021 09:51:54 +0530
Subject: [PATCH 0723/1765] lib: sbi: Rename sbi_hsm_hart_started_mask()
 function

A hart can take interrupt in the new HSM states introduced by the
SBI HSM suspend function (such as SUSPENDED state) so we rename
sbi_hsm_hart_started_mask() to something more generic such as
sbi_hsm_hart_interruptible_mask().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h      | 4 ++--
 lib/sbi/sbi_ecall_legacy.c | 4 ++--
 lib/sbi/sbi_hsm.c          | 4 ++--
 lib/sbi/sbi_ipi.c          | 4 ++--
 lib/sbi/sbi_system.c       | 2 +-
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 69ddee7d729..4250515bc0f 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -23,8 +23,8 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       u32 hartid, ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
-int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
-			      ulong hbase, ulong *out_hmask);
+int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
+				    ulong hbase, ulong *out_hmask);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
 
 #endif
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 1a7fe26e4bc..e20de766d27 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -34,8 +34,8 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 		if (uptrap->cause)
 			return SBI_ETRAP;
 	} else {
-		sbi_hsm_hart_started_mask(sbi_domain_thishart_ptr(),
-					  0, &mask);
+		sbi_hsm_hart_interruptible_mask(sbi_domain_thishart_ptr(),
+						0, &mask);
 	}
 	*hmask = mask;
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 1f54c9dc596..a81b821b07d 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -70,8 +70,8 @@ static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
  * @return 0 on success and SBI_Exxx (< 0) on failure
  * Note: the output HART mask will be set to zero on failure as well.
  */
-int sbi_hsm_hart_started_mask(const struct sbi_domain *dom,
-			      ulong hbase, ulong *out_hmask)
+int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
+				    ulong hbase, ulong *out_hmask)
 {
 	ulong i, hmask, dmask;
 	ulong hend = sbi_scratch_last_hartid() + 1;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 43478328b84..a3a6ce61c2a 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -82,7 +82,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (hbase != -1UL) {
-		rc = sbi_hsm_hart_started_mask(dom, hbase, &m);
+		rc = sbi_hsm_hart_interruptible_mask(dom, hbase, &m);
 		if (rc)
 			return rc;
 		m &= hmask;
@@ -94,7 +94,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 		}
 	} else {
 		hbase = 0;
-		while (!sbi_hsm_hart_started_mask(dom, hbase, &m)) {
+		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
 			/* Send IPIs */
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 08a8b47c788..10915b4446f 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -35,7 +35,7 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_started_mask(dom, hbase, &hmask)) {
+	while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &hmask)) {
 		if (hbase <= cur_hartid)
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)

From 638c948ab90e8630be5c43c17abb63cb3154919f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 2 Feb 2021 10:36:14 +0530
Subject: [PATCH 0724/1765] lib: sbi: Remove redundant sbi_hsm_hart_started()
 function

The sbi_hsm_hart_started() function is only used by sbi_hsm_hart_stop()
for checking state of calling HART and current domain assignment.

The atomic_cmpxchg() called by sbi_hsm_hart_stop() will check state of
calling hart anyway and domain assignment can be checked by other domain
function such as sbi_domain_is_assigned_hart().

This means sbi_hsm_hart_started() is redundant and can be removed.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index a81b821b07d..10099c2ae1b 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -54,14 +54,6 @@ int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 	return __sbi_hsm_hart_get_state(hartid);
 }
 
-static bool sbi_hsm_hart_started(const struct sbi_domain *dom, u32 hartid)
-{
-	if (sbi_hsm_hart_get_state(dom, hartid) == SBI_HSM_STATE_STARTED)
-		return TRUE;
-	else
-		return FALSE;
-}
-
 /**
  * Get ulong HART mask for given HART base ID
  * @param dom the domain to be used for output HART mask
@@ -247,12 +239,12 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 {
 	int oldstate;
-	u32 hartid = current_hartid();
+	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	if (!sbi_hsm_hart_started(sbi_domain_thishart_ptr(), hartid))
-		return SBI_EINVAL;
+	if (!dom)
+		return SBI_EFAIL;
 
 	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STARTED,
 				  SBI_HSM_STATE_STOP_PENDING);

From ca864a978d923dc44236e977b797d470c3ee2c00 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 24 Feb 2021 15:26:44 +0530
Subject: [PATCH 0725/1765] lib: sbi: Fix error codes returned by HSM start()
 and stop() functions

The sbi_hsm_hart_start() and sbi_hsm_hart_stop() functions should
only return error codes as defined by the SBI specification.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 10099c2ae1b..63fa8c21c76 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -202,7 +202,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		return SBI_EINVAL;
 	if (dom && !sbi_domain_check_addr(dom, saddr, smode,
 					  SBI_DOMAIN_EXECUTE))
-		return SBI_EINVAL;
+		return SBI_EINVALID_ADDR;
 
 	rscratch = sbi_hartid_to_scratch(hartid);
 	if (!rscratch)
@@ -251,7 +251,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	if (oldstate != SBI_HSM_STATE_STARTED) {
 		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
 			   __func__, oldstate);
-		return SBI_EDENIED;
+		return SBI_EFAIL;
 	}
 
 	if (exitnow)

From 6290a22e3428ffe79266310a3a10072efc198e97 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 1 Feb 2021 17:24:54 +0530
Subject: [PATCH 0726/1765] include: sbi: Add HSM suspend related defines

This patch adds SBI HSM suspend related defines to ecall interface
header.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index b2722130dd9..7fcb3730afb 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -57,11 +57,28 @@
 #define SBI_EXT_HSM_HART_START			0x0
 #define SBI_EXT_HSM_HART_STOP			0x1
 #define SBI_EXT_HSM_HART_GET_STATUS		0x2
+#define SBI_EXT_HSM_HART_SUSPEND		0x3
 
 #define SBI_HSM_STATE_STARTED			0x0
 #define SBI_HSM_STATE_STOPPED			0x1
 #define SBI_HSM_STATE_START_PENDING		0x2
 #define SBI_HSM_STATE_STOP_PENDING		0x3
+#define SBI_HSM_STATE_SUSPENDED			0x4
+#define SBI_HSM_STATE_SUSPEND_PENDING		0x5
+#define SBI_HSM_STATE_RESUME_PENDING		0x6
+
+#define SBI_HSM_SUSP_BASE_MASK			0x7fffffff
+#define SBI_HSM_SUSP_NON_RET_BIT		0x80000000
+#define SBI_HSM_SUSP_PLAT_BASE			0x10000000
+
+#define SBI_HSM_SUSPEND_RET_DEFAULT		0x00000000
+#define SBI_HSM_SUSPEND_RET_PLATFORM		SBI_HSM_SUSP_PLAT_BASE
+#define SBI_HSM_SUSPEND_RET_LAST		SBI_HSM_SUSP_BASE_MASK
+#define SBI_HSM_SUSPEND_NON_RET_DEFAULT		SBI_HSM_SUSP_NON_RET_BIT
+#define SBI_HSM_SUSPEND_NON_RET_PLATFORM	(SBI_HSM_SUSP_NON_RET_BIT | \
+						 SBI_HSM_SUSP_PLAT_BASE)
+#define SBI_HSM_SUSPEND_NON_RET_LAST		(SBI_HSM_SUSP_NON_RET_BIT | \
+						 SBI_HSM_SUSP_BASE_MASK)
 
 /* SBI function IDs for SRST extension */
 #define SBI_EXT_SRST_RESET			0x0

From 4b05df6700adbc71cfa5f681bf9263447c9140c4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 5 Feb 2021 17:32:30 +0530
Subject: [PATCH 0727/1765] lib: sbi: Add sbi_hart_reinit() function

We add sbi_hart_reinit() function which will re-initialize HART CSRs
assuming HART features are already detected. This new function will
be useful in re-initializing HART after it resumes from HSM SUSPENDED
state.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  1 +
 lib/sbi/sbi_hart.c     | 29 +++++++++++++++++------------
 2 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index ec9e30f913c..031c7b08a81 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -27,6 +27,7 @@ enum sbi_hart_features {
 
 struct sbi_scratch;
 
+int sbi_hart_reinit(struct sbi_scratch *scratch);
 int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot);
 
 extern void (*sbi_hart_expected_trap)(void);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index fc86e9f31fc..d91b08cf1ce 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -430,10 +430,25 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 		hfeatures->features |= SBI_HART_HAS_TIME;
 }
 
-int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
+int sbi_hart_reinit(struct sbi_scratch *scratch)
 {
 	int rc;
 
+	mstatus_init(scratch);
+
+	rc = fp_init(scratch);
+	if (rc)
+		return rc;
+
+	rc = delegate_traps(scratch);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
+{
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
@@ -447,17 +462,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 
 	hart_detect_features(scratch);
 
-	mstatus_init(scratch);
-
-	rc = fp_init(scratch);
-	if (rc)
-		return rc;
-
-	rc = delegate_traps(scratch);
-	if (rc)
-		return rc;
-
-	return 0;
+	return sbi_hart_reinit(scratch);
 }
 
 void __attribute__((noreturn)) sbi_hart_hang(void)

From 807d71c4ff11b8dd9a6366819314db704e0f6aca Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 5 Feb 2021 17:47:48 +0530
Subject: [PATCH 0728/1765] include: sbi: Add hart_suspend() platform callback

We add hart_suspend() callback in platform operations which will
be used by HSM implementation to enter retentive or non-retentive
suspend state.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index cc7e3ff9918..dadbc1e94e1 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -139,6 +139,11 @@ struct sbi_platform_operations {
 	 * return if success.
 	 */
 	int (*hart_stop)(void);
+	/**
+	 * Put the current hart in platform specific suspend (or low-power)
+	 * state.
+	 */
+	int (*hart_suspend)(u32 suspend_type, ulong raddr);
 
 	/* Check whether reset type and reason supported by the platform */
 	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
@@ -370,6 +375,31 @@ static inline int sbi_platform_hart_stop(const struct sbi_platform *plat)
 	return SBI_ENOTSUPP;
 }
 
+/**
+ * Put the current hart in platform specific suspend (or low-power) state.
+ *
+ * For successful retentive suspend, the call will return 0 when the hart
+ * resumes normal execution.
+ *
+ * For successful non-retentive suspend, the hart will resume from specified
+ * resume address
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param suspend_type the type of suspend
+ * @param raddr physical address where the hart can resume in M-mode after
+ * non-retantive suspend
+ *
+ * @return 0 if successful and negative error code on failure
+ */
+static inline int sbi_platform_hart_suspend(const struct sbi_platform *plat,
+					    u32 suspend_type, ulong raddr)
+{
+	if (plat && sbi_platform_ops(plat)->hart_suspend)
+		return sbi_platform_ops(plat)->hart_suspend(suspend_type,
+							    raddr);
+	return SBI_ENOTSUPP;
+}
+
 /**
  * Early initialization for current HART
  *

From 74756891cc3524084add9879d451cd67bf446bd7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 6 Feb 2021 14:48:56 +0530
Subject: [PATCH 0729/1765] lib: sbi: Implement SBI HSM suspend function

This patch implements the SBI HSM suspend function. Using this
new SBI call, the S-mode software can put calling HART in platform
specific suspend (i.e. low-power) state. For a successful retentive
suspend, the SBI call will return without errors upon resuming
whereas for a successful non-retentive suspend, the SBI call will
resume from a user provided resume address.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hsm.h   |   4 +
 lib/sbi/sbi_ecall_hsm.c |   9 +-
 lib/sbi/sbi_hsm.c       | 193 +++++++++++++++++++++++++++++++++++++++-
 lib/sbi/sbi_init.c      |  38 +++++++-
 4 files changed, 235 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 4250515bc0f..bf0c1a520b1 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -22,6 +22,10 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       const struct sbi_domain *dom,
 		       u32 hartid, ulong saddr, ulong smode, ulong priv);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
+void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch);
+void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch);
+int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
+			 ulong raddr, ulong rmode, ulong priv);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask);
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 79a9f218957..a339abf07c1 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -22,14 +22,13 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 				 unsigned long *out_val,
 				 struct sbi_trap_info *out_trap)
 {
-	ulong smode;
 	int ret = 0;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	ulong smode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >>
+			MSTATUS_MPP_SHIFT;
 
 	switch (funcid) {
 	case SBI_EXT_HSM_HART_START:
-		smode = csr_read(CSR_MSTATUS);
-		smode = (smode & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 		ret = sbi_hsm_hart_start(scratch, sbi_domain_thishart_ptr(),
 					 regs->a0, regs->a1, smode, regs->a2);
 		break;
@@ -40,6 +39,10 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
 					     regs->a0);
 		break;
+	case SBI_EXT_HSM_HART_SUSPEND:
+		ret = sbi_hsm_hart_suspend(scratch, regs->a0, regs->a1,
+					   smode, regs->a2);
+		break;
 	default:
 		ret = SBI_ENOTSUPP;
 	};
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 63fa8c21c76..ace6a9d9d87 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -31,6 +31,9 @@ static unsigned long hart_data_offset;
 /** Per hart specific data to manage state transition **/
 struct sbi_hsm_data {
 	atomic_t state;
+	unsigned long suspend_type;
+	unsigned long saved_mie;
+	unsigned long saved_mip;
 };
 
 static inline int __sbi_hsm_hart_get_state(u32 hartid)
@@ -65,6 +68,7 @@ int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask)
 {
+	int hstate;
 	ulong i, hmask, dmask;
 	ulong hend = sbi_scratch_last_hartid() + 1;
 
@@ -77,9 +81,12 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 	dmask = sbi_domain_get_assigned_hartmask(dom, hbase);
 	for (i = hbase; i < hend; i++) {
 		hmask = 1UL << (i - hbase);
-		if ((dmask & hmask) &&
-		    (__sbi_hsm_hart_get_state(i) == SBI_HSM_STATE_STARTED))
-			*out_hmask |= hmask;
+		if (dmask & hmask) {
+			hstate = __sbi_hsm_hart_get_state(i);
+			if (hstate == SBI_HSM_STATE_STARTED ||
+			    hstate == SBI_HSM_STATE_SUSPENDED)
+				*out_hmask |= hmask;
+		}
 	}
 
 	return 0;
@@ -259,3 +266,183 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 
 	return 0;
 }
+
+static int __sbi_hsm_suspend_ret_default(struct sbi_scratch *scratch)
+{
+	/* Wait for interrupt */
+	wfi();
+
+	return 0;
+}
+
+static void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
+{
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+
+	/*
+	 * We will be resuming in warm-boot path so the MIE and MIP CSRs
+	 * will be back to initial state. It is possible that HART has
+	 * configured timer event before going to suspend state so we
+	 * should save MIE and MIP CSRs and restore it after resuming.
+	 *
+	 * Further, the M-mode bits in MIP CSR are read-only and set by
+	 * external devices (such as interrupt controller) whereas all
+	 * VS-mode bits in MIP are read-only alias of bits in HVIP CSR.
+	 *
+	 * This means we should only save/restore S-mode bits of MIP CSR
+	 * such as MIP.SSIP and MIP.STIP.
+	 */
+
+	hdata->saved_mie = csr_read(CSR_MIE);
+	hdata->saved_mip = csr_read(CSR_MIP) & (MIP_SSIP | MIP_STIP);
+}
+
+static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
+{
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+
+	csr_write(CSR_MIE, hdata->saved_mie);
+	csr_write(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));
+}
+
+static int __sbi_hsm_suspend_non_ret_default(struct sbi_scratch *scratch,
+					     ulong raddr)
+{
+	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
+
+	/*
+	 * Save some of the M-mode CSRs which should be restored after
+	 * resuming from suspend state
+	 */
+	__sbi_hsm_suspend_non_ret_save(scratch);
+
+	/* Wait for interrupt */
+	wfi();
+
+	/*
+	 * Directly jump to warm reboot to simulate resume from a
+	 * non-retentive suspend.
+	 */
+	jump_warmboot();
+
+	return 0;
+}
+
+void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)
+{
+	int oldstate;
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+
+	/* If current HART was SUSPENDED then set RESUME_PENDING state */
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_SUSPENDED,
+			SBI_HSM_STATE_RESUME_PENDING);
+	if (oldstate != SBI_HSM_STATE_SUSPENDED) {
+		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
+			   __func__, oldstate);
+		sbi_hart_hang();
+	}
+}
+
+void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
+{
+	u32 oldstate;
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+
+	/* If current HART was RESUME_PENDING then set STARTED state */
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_RESUME_PENDING,
+				  SBI_HSM_STATE_STARTED);
+	if (oldstate != SBI_HSM_STATE_RESUME_PENDING) {
+		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
+			   __func__, oldstate);
+		sbi_hart_hang();
+	}
+
+	/*
+	 * Restore some of the M-mode CSRs which we are re-configured by
+	 * the warm-boot sequence.
+	 */
+	__sbi_hsm_suspend_non_ret_restore(scratch);
+}
+
+int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
+			 ulong raddr, ulong rmode, ulong priv)
+{
+	int oldstate, ret;
+	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+
+	/* For now, we only allow suspend from S-mode or U-mode. */
+
+	/* Sanity check on domain assigned to current HART */
+	if (!dom)
+		return SBI_EINVAL;
+
+	/* Sanity check on suspend type */
+	if (SBI_HSM_SUSPEND_RET_DEFAULT < suspend_type &&
+	    suspend_type < SBI_HSM_SUSPEND_RET_PLATFORM)
+		return SBI_EINVAL;
+	if (SBI_HSM_SUSPEND_NON_RET_DEFAULT < suspend_type &&
+	    suspend_type < SBI_HSM_SUSPEND_NON_RET_PLATFORM)
+		return SBI_EINVAL;
+
+	/* Additional sanity check for non-retentive suspend */
+	if (suspend_type & SBI_HSM_SUSP_NON_RET_BIT) {
+		if (rmode != PRV_S && rmode != PRV_U)
+			return SBI_EINVAL;
+		if (dom && !sbi_domain_check_addr(dom, raddr, rmode,
+						  SBI_DOMAIN_EXECUTE))
+			return SBI_EINVALID_ADDR;
+	}
+
+	/* Save the resume address and resume mode */
+	scratch->next_arg1 = priv;
+	scratch->next_addr = raddr;
+	scratch->next_mode = rmode;
+
+	/* Directly move from STARTED to SUSPENDED state */
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STARTED,
+				  SBI_HSM_STATE_SUSPENDED);
+	if (oldstate != SBI_HSM_STATE_STARTED) {
+		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
+			   __func__, oldstate);
+		ret = SBI_EDENIED;
+		goto fail_restore_state;
+	}
+
+	/* Save the suspend type */
+	hdata->suspend_type = suspend_type;
+
+	/* Try platform specific suspend */
+	ret = sbi_platform_hart_suspend(plat, suspend_type,
+					scratch->warmboot_addr);
+	if (ret == SBI_ENOTSUPP) {
+		/* Try generic implementation of default suspend types */
+		if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT) {
+			ret = __sbi_hsm_suspend_ret_default(scratch);
+		} else if (suspend_type == SBI_HSM_SUSPEND_NON_RET_DEFAULT) {
+			ret = __sbi_hsm_suspend_non_ret_default(scratch,
+						scratch->warmboot_addr);
+		}
+	}
+
+fail_restore_state:
+	/*
+	 * We might have successfully resumed from retentive suspend
+	 * or suspend failed. In both cases, we restore state of hart.
+	 */
+	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_SUSPENDED,
+				  SBI_HSM_STATE_STARTED);
+	if (oldstate != SBI_HSM_STATE_SUSPENDED) {
+		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
+			   __func__, oldstate);
+		sbi_hart_hang();
+	}
+
+	return ret;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 0e824588efa..1d4a838b921 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -311,14 +311,12 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 			     scratch->next_mode, FALSE);
 }
 
-static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
+static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
 	unsigned long *init_count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	wait_for_coldboot(scratch, hartid);
-
 	if (!init_count_offset)
 		sbi_hart_hang();
 
@@ -362,6 +360,40 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	(*init_count)++;
 
 	sbi_hsm_prepare_next_jump(scratch, hartid);
+}
+
+static void init_warm_resume(struct sbi_scratch *scratch)
+{
+	int rc;
+
+	sbi_hsm_hart_resume_start(scratch);
+
+	rc = sbi_hart_reinit(scratch);
+	if (rc)
+		sbi_hart_hang();
+
+	rc = sbi_hart_pmp_configure(scratch);
+	if (rc)
+		sbi_hart_hang();
+
+	sbi_hsm_hart_resume_finish(scratch);
+}
+
+static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
+{
+	int hstate;
+
+	wait_for_coldboot(scratch, hartid);
+
+	hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(), hartid);
+	if (hstate < 0)
+		sbi_hart_hang();
+
+	if (hstate == SBI_HSM_STATE_SUSPENDED)
+		init_warm_resume(scratch);
+	else
+		init_warm_startup(scratch, hartid);
+
 	sbi_hart_switch_mode(hartid, scratch->next_arg1,
 			     scratch->next_addr,
 			     scratch->next_mode, FALSE);

From b9cf617a9f15168e109a9c95989093b36b4f0135 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 12 Feb 2021 11:58:50 +0530
Subject: [PATCH 0730/1765] include: sbi: Upgrade SBI implementation version to
 v0.3

The OpenSBI SBI implementation is now compliant with latest draft
SBI v0.3 specification so let's upgrade SBI implementation version.

This will also help HSM suspend function detection in S-mode because
HSM suspend function is only present when HSM extension is present
and SBI implementation version is 0.3 (or higher).

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index d3570854442..63ef866ba2d 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -14,7 +14,7 @@
 #include <sbi/sbi_list.h>
 
 #define SBI_ECALL_VERSION_MAJOR		0
-#define SBI_ECALL_VERSION_MINOR		2
+#define SBI_ECALL_VERSION_MINOR		3
 #define SBI_OPENSBI_IMPID		1
 
 struct sbi_trap_regs;

From 50d4fde1c5a4ceb063d7f9a402769fb5be6d59ad Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 19 Feb 2021 09:54:05 +0530
Subject: [PATCH 0731/1765] lib: Remove redundant sbi_platform_ipi_clear()
 calls

The sbi_platform_ipi_clear() called from wait_for_coldboot() and
sbi_hsm_hart_wait() is redundant because IPI will be automatically
cleared by sbi_platform_ipi_init() called from sbi_ipi_init().

Further, wait_for_coldboot() is common for warm startup and warm
resume path so the sbi_platform_ipi_clear() called in warm resume
path cause resuming HART to miss an IPI injected other HART to
wakeup the HART.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hsm.c  |  7 ++++---
 lib/sbi/sbi_init.c | 11 ++++++++---
 lib/sbi/sbi_ipi.c  |  5 ++++-
 3 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index ace6a9d9d87..bbc4ce954e7 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -107,7 +107,6 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long saved_mie;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 	/* Save MIE CSR */
@@ -124,8 +123,10 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	/* Restore MIE CSR */
 	csr_write(CSR_MIE, saved_mie);
 
-	/* Clear current HART IPI */
-	sbi_platform_ipi_clear(plat, hartid);
+	/*
+	 * No need to clear IPI here because the sbi_ipi_init() will
+	 * clear it for current HART via sbi_platform_ipi_init().
+	 */
 }
 
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 1d4a838b921..4de2dfa7c99 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -130,7 +130,6 @@ static unsigned long coldboot_done;
 static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long saved_mie, cmip;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
@@ -167,8 +166,14 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Restore MIE CSR */
 	csr_write(CSR_MIE, saved_mie);
 
-	/* Clear current HART IPI */
-	sbi_platform_ipi_clear(plat, hartid);
+	/*
+	 * The wait for coldboot is common for both warm startup and
+	 * warm resume path so clearing IPI here would result in losing
+	 * an IPI in warm resume path.
+	 *
+	 * Also, the sbi_platform_ipi_init() called from sbi_ipi_init()
+	 * will automatically clear IPI for current HART.
+	 */
 }
 
 static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index a3a6ce61c2a..b50735e4099 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -230,7 +230,10 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	ipi_data->ipi_type = 0x00;
 
-	/* Platform init */
+	/*
+	 * Initialize platform IPI support. This will also clear any
+	 * pending IPIs for current/calling HART.
+	 */
 	ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
 	if (ret)
 		return ret;

From ff5bd949d55b14e1d308288ace71366b090f822d Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Tue, 9 Mar 2021 12:31:22 +0100
Subject: [PATCH 0732/1765] include: sbi: SBI function IDs for RFENCE extension

The SBI function IDs for RFENCE extension must match the SBI specification.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 7fcb3730afb..559a33e7ced 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -48,10 +48,10 @@
 #define SBI_EXT_RFENCE_REMOTE_FENCE_I		0x0
 #define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA	0x1
 #define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID	0x2
-#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA	0x3
-#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID	0x4
-#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA	0x5
-#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID	0x6
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID	0x3
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA	0x4
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID	0x5
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA	0x6
 
 /* SBI function IDs for HSM extension */
 #define SBI_EXT_HSM_HART_START			0x0

From 22d8ee9758128070aa838f7c8c46f9e50d6aaf5a Mon Sep 17 00:00:00 2001
From: Vincent Chen <vincent.chen@sifive.com>
Date: Wed, 17 Mar 2021 09:16:37 +0800
Subject: [PATCH 0733/1765] firmware: Use lla to access all global symbols

When OpenSBI is compiled as fPIE mode, the assembler will translate "la"
to GOT reference pattern. It will cause to cost an additional load
instruction when obtaining the symbol address. However, if the symbol
locates within the positive or negative 2GB region, we can use "lla"
instead of "la" to avoid unneeded GOT references. This patch assumes that
the OpenSBI image excluding the payload does not exceed 2GB. Based on
this assumption, all "la" instructions are replaced by "lla" to avoid
performance degradation when compiling as fPIE mode.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S            | 88 +++++++++++++++++------------------
 firmware/fw_dynamic.S         | 18 +++----
 firmware/fw_jump.S            |  2 +-
 firmware/fw_payload.S         |  2 +-
 firmware/payloads/test_head.S | 18 +++----
 5 files changed, 64 insertions(+), 64 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ab33e110241..6cc5f884c8b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -57,39 +57,39 @@ _start:
 	bne	a0, a6, _wait_relocate_copy_done
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
-	la	a6, _relocate_lottery
+	lla	a6, _relocate_lottery
 	li	a7, 1
 	amoadd.w a6, a7, (a6)
 	bnez	a6, _wait_relocate_copy_done
 
 	/* Save load address */
-	la	t0, _load_start
-	la	t1, _start
+	lla	t0, _load_start
+	lla	t1, _start
 	REG_S	t1, 0(t0)
 
 	/* Relocate if load address != link address */
 _relocate:
-	la	t0, _link_start
+	lla	t0, _link_start
 	REG_L	t0, 0(t0)
-	la	t1, _link_end
+	lla	t1, _link_end
 	REG_L	t1, 0(t1)
-	la	t2, _load_start
+	lla	t2, _load_start
 	REG_L	t2, 0(t2)
 	sub	t3, t1, t0
 	add	t3, t3, t2
 	beq	t0, t2, _relocate_done
-	la	t4, _relocate_done
+	lla	t4, _relocate_done
 	sub	t4, t4, t2
 	add	t4, t4, t0
 	blt	t2, t0, _relocate_copy_to_upper
 _relocate_copy_to_lower:
 	ble	t1, t2, _relocate_copy_to_lower_loop
-	la	t3, _relocate_lottery
+	lla	t3, _relocate_lottery
 	BRANGE	t2, t1, t3, _start_hang
-	la	t3, _boot_status
+	lla	t3, _boot_status
 	BRANGE	t2, t1, t3, _start_hang
-	la	t3, _relocate
-	la	t5, _relocate_done
+	lla	t3, _relocate
+	lla	t5, _relocate_done
 	BRANGE	t2, t1, t3, _start_hang
 	BRANGE	t2, t1, t5, _start_hang
 	BRANGE  t3, t5, t2, _start_hang
@@ -102,12 +102,12 @@ _relocate_copy_to_lower_loop:
 	jr	t4
 _relocate_copy_to_upper:
 	ble	t3, t0, _relocate_copy_to_upper_loop
-	la	t2, _relocate_lottery
+	lla	t2, _relocate_lottery
 	BRANGE	t0, t3, t2, _start_hang
-	la	t2, _boot_status
+	lla	t2, _boot_status
 	BRANGE	t0, t3, t2, _start_hang
-	la	t2, _relocate
-	la	t5, _relocate_done
+	lla	t2, _relocate
+	lla	t5, _relocate_done
 	BRANGE	t0, t3, t2, _start_hang
 	BRANGE	t0, t3, t5, _start_hang
 	BRANGE	t2, t5, t0, _start_hang
@@ -119,12 +119,12 @@ _relocate_copy_to_upper_loop:
 	blt	t0, t1, _relocate_copy_to_upper_loop
 	jr	t4
 _wait_relocate_copy_done:
-	la	t0, _start
-	la	t1, _link_start
+	lla	t0, _start
+	lla	t1, _link_start
 	REG_L	t1, 0(t1)
 	beq	t0, t1, _wait_for_boot_hart
-	la	t2, _boot_status
-	la	t3, _wait_for_boot_hart
+	lla	t2, _boot_status
+	lla	t3, _wait_for_boot_hart
 	sub	t3, t3, t0
 	add	t3, t3, t1
 1:
@@ -143,10 +143,10 @@ _relocate_done:
 	 * Mark relocate copy done
 	 * Use _boot_status copy relative to the load address
 	 */
-	la	t0, _boot_status
-	la	t1, _link_start
+	lla	t0, _boot_status
+	lla	t1, _link_start
 	REG_L	t1, 0(t1)
-	la	t2, _load_start
+	lla	t2, _load_start
 	REG_L	t2, 0(t2)
 	sub	t0, t0, t1
 	add	t0, t0, t2
@@ -161,19 +161,19 @@ _relocate_done:
 	call	_reset_regs
 
 	/* Zero-out BSS */
-	la	s4, _bss_start
-	la	s5, _bss_end
+	lla	s4, _bss_start
+	lla	s5, _bss_end
 _bss_zero:
 	REG_S	zero, (s4)
 	add	s4, s4, __SIZEOF_POINTER__
 	blt	s4, s5, _bss_zero
 
 	/* Setup temporary trap handler */
-	la	s4, _start_hang
+	lla	s4, _start_hang
 	csrw	CSR_MTVEC, s4
 
 	/* Setup temporary stack */
-	la	s4, _fw_end
+	lla	s4, _fw_end
 	li	s5, (SBI_SCRATCH_SIZE * 2)
 	add	sp, s4, s5
 
@@ -184,7 +184,7 @@ _bss_zero:
 
 #ifdef FW_FDT_PATH
 	/* Override previous arg1 */
-	la	a1, fw_fdt_bin
+	lla	a1, fw_fdt_bin
 #endif
 
 	/*
@@ -202,7 +202,7 @@ _bss_zero:
 	 * s7 -> HART Count
 	 * s8 -> HART Stack Size
 	 */
-	la	a4, platform
+	lla	a4, platform
 #if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
@@ -212,7 +212,7 @@ _bss_zero:
 #endif
 
 	/* Setup scratch space for all the HARTs*/
-	la	tp, _fw_end
+	lla	tp, _fw_end
 	mul	a5, s7, s8
 	add	tp, tp, a5
 	/* Keep a copy of tp */
@@ -230,8 +230,8 @@ _scratch_init:
 
 	/* Initialize scratch space */
 	/* Store fw_start and fw_size in scratch space */
-	la	a4, _fw_start
-	la	a5, _fw_end
+	lla	a4, _fw_start
+	lla	a5, _fw_end
 	mul	t0, s7, s8
 	add	a5, a5, t0
 	sub	a5, a5, a4
@@ -253,16 +253,16 @@ _scratch_init:
 	REG_S	a0, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
 	MOV_3R	a0, s0, a1, s1, a2, s2
 	/* Store warm_boot address in scratch space */
-	la	a4, _start_warm
+	lla	a4, _start_warm
 	REG_S	a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
 	/* Store platform address in scratch space */
-	la	a4, platform
+	lla	a4, platform
 	REG_S	a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
 	/* Store hartid-to-scratch function address in scratch space */
-	la	a4, _hartid_to_scratch
+	lla	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
 	/* Store trap-exit function address in scratch space */
-	la	a4, _trap_exit
+	lla	a4, _trap_exit
 	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(tp)
 	/* Clear tmp0 in scratch space */
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
@@ -343,7 +343,7 @@ _fdt_reloc_done:
 
 	/* mark boot hart done */
 	li	t0, BOOT_STATUS_BOOT_HART_DONE
-	la	t1, _boot_status
+	lla	t1, _boot_status
 	REG_S	t0, 0(t1)
 	fence	rw, rw
 	j	_start_warm
@@ -351,7 +351,7 @@ _fdt_reloc_done:
 	/* waiting for boot hart to be done (_boot_status == 2) */
 _wait_for_boot_hart:
 	li	t0, BOOT_STATUS_BOOT_HART_DONE
-	la	t1, _boot_status
+	lla	t1, _boot_status
 	REG_L	t1, 0(t1)
 	/* Reduce the bus traffic so that boot hart may proceed faster */
 	nop
@@ -369,7 +369,7 @@ _start_warm:
 	csrw	CSR_MIP, zero
 
 	/* Find HART count and HART stack size */
-	la	a4, platform
+	lla	a4, platform
 #if __riscv_xlen == 64
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
@@ -400,7 +400,7 @@ _start_warm:
 3:	bge	s6, s7, _start_hang
 
 	/* Find the scratch space based on HART index */
-	la	tp, _fw_end
+	lla	tp, _fw_end
 	mul	a5, s7, s8
 	add	tp, tp, a5
 	mul	a5, s8, s6
@@ -415,13 +415,13 @@ _start_warm:
 	add	sp, tp, zero
 
 	/* Setup trap handler */
-	la	a4, _trap_handler
+	lla	a4, _trap_handler
 #if __riscv_xlen == 32
 	csrr	a5, CSR_MISA
 	srli	a5, a5, ('H' - 'A')
 	andi	a5, a5, 0x1
 	beq	a5, zero, _skip_trap_handler_rv32_hyp
-	la	a4, _trap_handler_rv32_hyp
+	lla	a4, _trap_handler_rv32_hyp
 _skip_trap_handler_rv32_hyp:
 #endif
 	csrw	CSR_MTVEC, a4
@@ -432,7 +432,7 @@ _skip_trap_handler_rv32_hyp:
 	srli	a5, a5, ('H' - 'A')
 	andi	a5, a5, 0x1
 	beq	a5, zero, _skip_trap_exit_rv32_hyp
-	la	a4, _trap_exit_rv32_hyp
+	lla	a4, _trap_exit_rv32_hyp
 	csrr	a5, CSR_MSCRATCH
 	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
 _skip_trap_exit_rv32_hyp:
@@ -468,7 +468,7 @@ _hartid_to_scratch:
 	 * t1 -> HART Stack End
 	 * t2 -> Temporary
 	 */
-	la	t2, platform
+	lla	t2, platform
 #if __riscv_xlen == 64
 	lwu	t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
 	lwu	t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
@@ -478,7 +478,7 @@ _hartid_to_scratch:
 #endif
 	sub	t2, t2, a1
 	mul	t2, t2, t0
-	la	t1, _fw_end
+	lla	t1, _fw_end
 	add	t1, t1, t2
 	li	t2, SBI_SCRATCH_SIZE
 	sub	a0, t1, t2
diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 8b56947af5a..0705e63cf71 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -54,7 +54,7 @@ fw_boot_hart:
 	 */
 fw_save_info:
 	/* Save next arg1 in 'a1' */
-	la	a4, _dynamic_next_arg1
+	lla	a4, _dynamic_next_arg1
 	REG_S	a1, (a4)
 
 	/* Sanity checks */
@@ -66,13 +66,13 @@ fw_save_info:
 	bgt	a3, a4, _bad_dynamic_info
 
 	/* Save version == 0x1 fields */
-	la	a4, _dynamic_next_addr
+	lla	a4, _dynamic_next_addr
 	REG_L	a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)
 	REG_S	a3, (a4)
-	la	a4, _dynamic_next_mode
+	lla	a4, _dynamic_next_mode
 	REG_L	a3, FW_DYNAMIC_INFO_NEXT_MODE_OFFSET(a2)
 	REG_S	a3, (a4)
-	la	a4, _dynamic_options
+	lla	a4, _dynamic_options
 	REG_L	a3, FW_DYNAMIC_INFO_OPTIONS_OFFSET(a2)
 	REG_S	a3, (a4)
 
@@ -80,7 +80,7 @@ fw_save_info:
 	li	a4, 0x2
 	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
 	blt	a3, a4, 2f
-	la	a4, _dynamic_boot_hart
+	lla	a4, _dynamic_boot_hart
 	REG_L	a3, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
 	REG_S	a3, (a4)
 2:
@@ -96,7 +96,7 @@ fw_save_info:
 	 * The next arg1 should be returned in 'a0'.
 	 */
 fw_next_arg1:
-	la	a0, _dynamic_next_arg1
+	lla	a0, _dynamic_next_arg1
 	REG_L	a0, (a0)
 	ret
 
@@ -108,7 +108,7 @@ fw_next_arg1:
 	 * The next address should be returned in 'a0'.
 	 */
 fw_next_addr:
-	la	a0, _dynamic_next_addr
+	lla	a0, _dynamic_next_addr
 	REG_L	a0, (a0)
 	ret
 
@@ -120,7 +120,7 @@ fw_next_addr:
 	 * The next address should be returned in 'a0'
 	 */
 fw_next_mode:
-	la	a0, _dynamic_next_mode
+	lla	a0, _dynamic_next_mode
 	REG_L	a0, (a0)
 	ret
 
@@ -133,7 +133,7 @@ fw_next_mode:
 	 * The next address should be returned in 'a0'.
 	 */
 fw_options:
-	la	a0, _dynamic_options
+	lla	a0, _dynamic_options
 	REG_L	a0, (a0)
 	ret
 
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index 8553f8c7f9b..5b24f8b765a 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -59,7 +59,7 @@ fw_next_arg1:
 	 * The next address should be returned in 'a0'.
 	 */
 fw_next_addr:
-	la	a0, _jump_addr
+	lla	a0, _jump_addr
 	REG_L	a0, (a0)
 	ret
 
diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index 1ef121e280a..c53a3bb030a 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -59,7 +59,7 @@ fw_next_arg1:
 	 * The next address should be returned in 'a0'.
 	 */
 fw_next_addr:
-	la	a0, payload_bin
+	lla	a0, payload_bin
 	ret
 
 	.section .entry, "ax", %progbits
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S
index 840013e4e7c..4852f715f5d 100644
--- a/firmware/payloads/test_head.S
+++ b/firmware/payloads/test_head.S
@@ -28,20 +28,20 @@
 	.globl _start
 _start:
 	/* Pick one hart to run the main boot sequence */
-	la	a3, _hart_lottery
+	lla	a3, _hart_lottery
 	li	a2, 1
 	amoadd.w a3, a2, (a3)
 	bnez	a3, _start_hang
 
 	/* Save a0 and a1 */
-	la	a3, _boot_a0
+	lla	a3, _boot_a0
 	REG_S	a0, 0(a3)
-	la	a3, _boot_a1
+	lla	a3, _boot_a1
 	REG_S	a1, 0(a3)
 
 	/* Zero-out BSS */
-	la	a4, _bss_start
-	la	a5, _bss_end
+	lla	a4, _bss_start
+	lla	a5, _bss_end
 _bss_zero:
 	REG_S	zero, (a4)
 	add	a4, a4, __SIZEOF_POINTER__
@@ -53,18 +53,18 @@ _start_warm:
 	csrw	CSR_SIP, zero
 
 	/* Setup exception vectors */
-	la	a3, _start_hang
+	lla	a3, _start_hang
 	csrw	CSR_STVEC, a3
 
 	/* Setup stack */
-	la	a3, _payload_end
+	lla	a3, _payload_end
 	li	a4, 0x2000
 	add	sp, a3, a4
 
 	/* Jump to C main */
-	la	a3, _boot_a0
+	lla	a3, _boot_a0
 	REG_L	a0, 0(a3)
-	la	a3, _boot_a1
+	lla	a3, _boot_a1
 	REG_L	a1, 0(a3)
 	call	test_main
 

From 0f20e8adcf42d31bc478d6700b625d00a68cb30e Mon Sep 17 00:00:00 2001
From: Vincent Chen <vincent.chen@sifive.com>
Date: Wed, 17 Mar 2021 09:16:38 +0800
Subject: [PATCH 0734/1765] firmware: Support position independent execution

Enable OpenSBI to support position independent execution. Because the
position independent code will cause an additional GOT reference when
accessing the global variables, it will reduce performance a bit. Therefore,
the position independent execution is disabled by default. Users can
through specifying "FW_PIC=y" on the make command to enable this feature.

In theory, after enabling position-independent execution, the OpenSBI
can run at arbitrary address with appropriate alignment. Therefore, the
original relocation mechanism will be skipped. In other words, OpenSBI will
directly run at the load address without any code movement.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                |  2 +-
 firmware/fw_base.S      | 62 ++++++++++++++++++++++++++++++++++++++++-
 firmware/fw_base.ldS    | 13 +++++++++
 firmware/objects.mk     |  7 +++++
 include/sbi/riscv_elf.h | 14 ++++++++++
 5 files changed, 96 insertions(+), 2 deletions(-)
 create mode 100644 include/sbi/riscv_elf.h

diff --git a/Makefile b/Makefile
index d6f097d30af..038cc996858 100644
--- a/Makefile
+++ b/Makefile
@@ -210,8 +210,8 @@ CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
-CFLAGS		+=	$(firmware-cflags-y)
 CFLAGS		+=	-fno-pie -no-pie
+CFLAGS		+=	$(firmware-cflags-y)
 
 CPPFLAGS	+=	$(GENFLAGS)
 CPPFLAGS	+=	$(platform-cppflags-y)
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 6cc5f884c8b..2ce385178cb 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/riscv_elf.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
@@ -67,6 +68,58 @@ _try_lottery:
 	lla	t1, _start
 	REG_S	t1, 0(t0)
 
+#ifdef FW_PIC
+	/* relocate the global table content */
+	lla	t0, _link_start
+	REG_L	t0, 0(t0)
+	/* t1 shall has the address of _start */
+	sub	t2, t1, t0
+	lla	t3, _runtime_offset
+	REG_S	t2, (t3)
+	lla	t0, __rel_dyn_start
+	lla	t1, __rel_dyn_end
+	beq	t0, t1, _relocate_done
+	j	5f
+2:
+	REG_L	t5, -(REGBYTES*2)(t0)	/* t5 <-- relocation info:type */
+	li	t3, R_RISCV_RELATIVE	/* reloc type R_RISCV_RELATIVE */
+	bne	t5, t3, 3f
+	REG_L	t3, -(REGBYTES*3)(t0)
+	REG_L	t5, -(REGBYTES)(t0)	/* t5 <-- addend */
+	add	t5, t5, t2
+	add	t3, t3, t2
+	REG_S	t5, 0(t3)		/* store runtime address to the GOT entry */
+	j	5f
+
+3:
+	lla	t4, __dyn_sym_start
+
+4:
+	REG_L	t5, -(REGBYTES*2)(t0)	/* t5 <-- relocation info:type */
+	srli	t6, t5, SYM_INDEX	/* t6 <--- sym table index */
+	andi	t5, t5, 0xFF		/* t5 <--- relocation type */
+	li	t3, RELOC_TYPE
+	bne	t5, t3, 5f
+
+	/* address R_RISCV_64 or R_RISCV_32 cases*/
+	REG_L	t3, -(REGBYTES*3)(t0)
+	li	t5, SYM_SIZE
+	mul	t6, t6, t5
+	add	s5, t4, t6
+	REG_L	t6, -(REGBYTES)(t0)	/* t0 <-- addend */
+	REG_L	t5, REGBYTES(s5)
+	add	t5, t5, t6
+	add	t5, t5, t2		/* t5 <-- location to fix up in RAM */
+	add	t3, t3, t2		/* t3 <-- location to fix up in RAM */
+	REG_S	t5, 0(t3)		/* store runtime address to the variable */
+
+5:
+	addi	t0, t0, (REGBYTES*3)
+	ble	t0, t1, 2b
+	j	_relocate_done
+_wait_relocate_copy_done:
+	j	_wait_for_boot_hart
+#else
 	/* Relocate if load address != link address */
 _relocate:
 	lla	t0, _link_start
@@ -137,6 +190,7 @@ _wait_relocate_copy_done:
 	nop
 	bgt     t4, t5, 1b
 	jr	t3
+#endif
 _relocate_done:
 
 	/*
@@ -144,12 +198,14 @@ _relocate_done:
 	 * Use _boot_status copy relative to the load address
 	 */
 	lla	t0, _boot_status
+#ifndef FW_PIC
 	lla	t1, _link_start
 	REG_L	t1, 0(t1)
 	lla	t2, _load_start
 	REG_L	t2, 0(t2)
 	sub	t0, t0, t1
 	add	t0, t0, t2
+#endif
 	li	t1, BOOT_STATUS_RELOCATE_DONE
 	REG_S	t1, 0(t0)
 	fence	rw, rw
@@ -446,6 +502,10 @@ _skip_trap_exit_rv32_hyp:
 	j	_start_hang
 
 	.align 3
+#ifdef FW_PIC
+_runtime_offset:
+	RISCV_PTR	0
+#endif
 _relocate_lottery:
 	RISCV_PTR	0
 _boot_status:
@@ -453,7 +513,7 @@ _boot_status:
 _load_start:
 	RISCV_PTR	_fw_start
 _link_start:
-	RISCV_PTR	_fw_start
+	RISCV_PTR	FW_TEXT_START
 _link_end:
 	RISCV_PTR	_fw_reloc_end
 
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 0ac75f200e6..0d222da2d7f 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -61,6 +61,19 @@
 		PROVIDE(_data_end = .);
 	}
 
+	.dynsym : {
+		PROVIDE(__dyn_sym_start = .);
+		*(.dynsym)
+		PROVIDE(__dyn_sym_end = .);
+	}
+
+	.rela.dyn : {
+		PROVIDE(__rel_dyn_start = .);
+		*(.rela*)
+		. = ALIGN(8);
+		PROVIDE(__rel_dyn_end = .);
+	}
+
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
 	.bss :
diff --git a/firmware/objects.mk b/firmware/objects.mk
index b2ace7512f4..c1f632eb15e 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -13,6 +13,13 @@ firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
+ifeq ($(FW_PIC),y)
+firmware-genflags-y +=	-DFW_PIC
+firmware-asflags-y  +=	-fpic
+firmware-cflags-y   +=	-fPIE -pie
+firmware-ldflags-y  +=  -Wl,--no-dynamic-linker
+endif
+
 ifdef FW_TEXT_START
 firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
 endif
diff --git a/include/sbi/riscv_elf.h b/include/sbi/riscv_elf.h
new file mode 100644
index 00000000000..3b62c38b4a2
--- /dev/null
+++ b/include/sbi/riscv_elf.h
@@ -0,0 +1,14 @@
+#ifndef __RISCV_ELF_H__
+#define __RISCV_ELF_H__
+
+#include <sbi/riscv_asm.h>
+
+#define R_RISCV_32		1
+#define R_RISCV_64		2
+#define R_RISCV_RELATIVE	3
+
+#define RELOC_TYPE		__REG_SEL(R_RISCV_64, R_RISCV_32)
+#define SYM_INDEX		__REG_SEL(0x20,	0x8)
+#define SYM_SIZE		__REG_SEL(0x18,0x10)
+
+#endif

From ddad02d62550ca8884a2bd21345dad8c6c216777 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Fri, 19 Mar 2021 11:04:50 +0100
Subject: [PATCH 0735/1765] lib: sbi: illegal CSR 0x306 access in hpm_allowed()

The trap handler sbi_emulate_csr_read() invokes hpm_allowed() which reads
CSR 0x306 (mcounteren). The K210 does not support CSR 0x306. While trying
to handle a trap occurring in S-mode code this creates an additional trap
in M-mode. This results in failure to redirect to S-mode and the system
hanging in sbi_hart_hang().

In hart_detect_features() we have already determined if CSR 0x306 is
available and stored that information in the scratch area. We can use this
information to decide if CSR 0x306 shall be accessed in hpm_allowed() and
thus avoid the M-mode trap.

Likewise if CSR scounteren is not available we have to avoid reading CSR
0x106.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_emulate_csr.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index bee7761c4bb..dbb17552fa5 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -21,14 +21,23 @@
 static bool hpm_allowed(int hpm_num, ulong prev_mode, bool virt)
 {
 	ulong cen = -1UL;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (prev_mode <= PRV_S) {
-		cen &= csr_read(CSR_MCOUNTEREN);
-		if (virt)
-			cen &= csr_read(CSR_HCOUNTEREN);
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
+			cen &= csr_read(CSR_MCOUNTEREN);
+			if (virt)
+				cen &= csr_read(CSR_HCOUNTEREN);
+		} else {
+			cen = 0;
+		}
+	}
+	if (prev_mode == PRV_U) {
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
+			cen &= csr_read(CSR_SCOUNTEREN);
+		else
+			cen = 0;
 	}
-	if (prev_mode == PRV_U)
-		cen &= csr_read(CSR_SCOUNTEREN);
 
 	return ((cen >> hpm_num) & 1) ? TRUE : FALSE;
 }

From bfc85c70e7517dc633b74e33768247b4df6a661c Mon Sep 17 00:00:00 2001
From: Marouene Boubakri <marouene.boubakri@nxp.com>
Date: Fri, 12 Mar 2021 12:00:01 +0100
Subject: [PATCH 0736/1765] include: headers: Replace __ASSEMBLY__ with
 __ASSEMBLER__

GCC has already a predefined macro __ASSEMBLER__ therefore, it can be
used without the need to define a new flag with -D__ASSEMBLY__.
This is useful when adding the library to projects having a build
system such one can build without the need to make changes.
THe build system does not use the Makefile in the sources tree.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                   |  2 +-
 include/sbi/fw_dynamic.h   |  2 +-
 include/sbi/riscv_asm.h    | 10 +++++-----
 include/sbi/sbi_const.h    |  2 +-
 include/sbi/sbi_platform.h |  2 +-
 include/sbi/sbi_scratch.h  |  2 +-
 include/sbi/sbi_trap.h     |  2 +-
 lib/utils/libfdt/fdt.h     |  2 +-
 8 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/Makefile b/Makefile
index 038cc996858..eeffe6bad04 100644
--- a/Makefile
+++ b/Makefile
@@ -217,7 +217,7 @@ CPPFLAGS	+=	$(GENFLAGS)
 CPPFLAGS	+=	$(platform-cppflags-y)
 CPPFLAGS	+=	$(firmware-cppflags-y)
 
-ASFLAGS		=	-g -Wall -nostdlib -D__ASSEMBLY__
+ASFLAGS		=	-g -Wall -nostdlib
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-mno-save-restore -mstrict-align
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
index 3c088311ff3..25c0eb88aea 100644
--- a/include/sbi/fw_dynamic.h
+++ b/include/sbi/fw_dynamic.h
@@ -40,7 +40,7 @@
 
 /* clang-format on */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <sbi/sbi_types.h>
 
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 10f31a7fc3b..9fa0fe5c372 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -14,7 +14,7 @@
 
 /* clang-format off */
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define __ASM_STR(x)	x
 #else
 #define __ASM_STR(x)	#x
@@ -38,7 +38,7 @@
 #define LGREG		__REG_SEL(3, 2)
 
 #if __SIZEOF_POINTER__ == 8
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define RISCV_PTR		.dword
 #define RISCV_SZPTR		8
 #define RISCV_LGPTR		3
@@ -48,7 +48,7 @@
 #define RISCV_LGPTR		"3"
 #endif
 #elif __SIZEOF_POINTER__ == 4
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define RISCV_PTR		.word
 #define RISCV_SZPTR		4
 #define RISCV_LGPTR		2
@@ -79,7 +79,7 @@
 
 /* clang-format on */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #define csr_swap(csr, val)                                              \
 	({                                                              \
@@ -182,6 +182,6 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 	    unsigned long *log2len);
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif
diff --git a/include/sbi/sbi_const.h b/include/sbi/sbi_const.h
index 37866546a6d..fc75f187858 100644
--- a/include/sbi/sbi_const.h
+++ b/include/sbi/sbi_const.h
@@ -22,7 +22,7 @@
 
 /* clang-format off */
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define _AC(X,Y)	X
 #define _AT(T,X)	X
 #else
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index dadbc1e94e1..837a75d1c4f 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -38,7 +38,7 @@
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e35122bed15..e83b234c4e4 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -43,7 +43,7 @@
 
 /* clang-format on */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <sbi/sbi_types.h>
 
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 5fb94f980e6..070d000f193 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -110,7 +110,7 @@
 /** Size (in bytes) of sbi_trap_info */
 #define SBI_TRAP_INFO_SIZE SBI_TRAP_INFO_OFFSET(last)
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <sbi/sbi_types.h>
 
diff --git a/lib/utils/libfdt/fdt.h b/lib/utils/libfdt/fdt.h
index f2e68807f27..57fe566306d 100644
--- a/lib/utils/libfdt/fdt.h
+++ b/lib/utils/libfdt/fdt.h
@@ -7,7 +7,7 @@
  * Copyright 2012 Kim Phillips, Freescale Semiconductor.
  */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 struct fdt_header {
 	fdt32_t magic;			 /* magic word FDT_MAGIC */

From 9190ad12f7053497f2bd06af29f25015f7890278 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 27 Mar 2021 13:05:25 +0800
Subject: [PATCH 0737/1765] lib/utils: Support the official clint DT bindings

Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
adds the official DT bindings for CLINT, which uses "sifive,clint0"
as the compatible string. "riscv,clint0" is now legacy and has to
be kept for backward compatibility of legacy systems.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/ipi/fdt_ipi_clint.c     | 1 +
 lib/utils/timer/fdt_timer_clint.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index e9924406482..e799fd7e200 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -36,6 +36,7 @@ static int ipi_clint_cold_init(void *fdt, int nodeoff,
 
 static const struct fdt_match ipi_clint_match[] = {
 	{ .compatible = "riscv,clint0" },
+	{ .compatible = "sifive,clint0" },
 	{ },
 };
 
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index fe6670866c7..6ba6c7b2805 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -38,6 +38,7 @@ static int timer_clint_cold_init(void *fdt, int nodeoff,
 
 static const struct fdt_match timer_clint_match[] = {
 	{ .compatible = "riscv,clint0" },
+	{ .compatible = "sifive,clint0" },
 	{ },
 };
 

From ca3f35821baa18e309d856c0cf886b81970f2a00 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 27 Mar 2021 13:05:26 +0800
Subject: [PATCH 0738/1765] lib/utils: Drop the 'compat' parameter of
 fdt_plic_fixup()

At present fdt_plic_fixup() accepts a 'compat' parameter for PLIC
compatible string. In preparation to support the new DT bindings,
drop this and use "riscv,plic0" directly in fdt_plic_fixup().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_fixup.h | 3 +--
 lib/utils/fdt/fdt_fixup.c         | 6 +++---
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index 0697a18ee81..c38e5d91e95 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -30,9 +30,8 @@ void fdt_cpu_fixup(void *fdt);
  * It is recommended that platform codes call this helper in their final_init()
  *
  * @param fdt: device tree blob
- * @param compat: PLIC node compatible string
  */
-void fdt_plic_fixup(void *fdt, const char *compat);
+void fdt_plic_fixup(void *fdt);
 
 /**
  * Fix up the reserved memory node in the device tree
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index eea450d8049..a306ff5b6b2 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -51,13 +51,13 @@ void fdt_cpu_fixup(void *fdt)
 	}
 }
 
-void fdt_plic_fixup(void *fdt, const char *compat)
+void fdt_plic_fixup(void *fdt)
 {
 	u32 *cells;
 	int i, cells_count;
 	int plic_off;
 
-	plic_off = fdt_node_offset_by_compatible(fdt, 0, compat);
+	plic_off = fdt_node_offset_by_compatible(fdt, 0, "riscv,plic0");
 	if (plic_off < 0)
 		return;
 
@@ -257,7 +257,7 @@ int fdt_reserved_memory_nomap_fixup(void *fdt)
 
 void fdt_fixups(void *fdt)
 {
-	fdt_plic_fixup(fdt, "riscv,plic0");
+	fdt_plic_fixup(fdt);
 
 	fdt_reserved_memory_fixup(fdt);
 }

From 4edc8224073e61498b1de338c67174f47fc3c5e1 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 27 Mar 2021 13:05:27 +0800
Subject: [PATCH 0739/1765] lib/utils: Support fixing up the official DT
 bindings of PLIC

Current fdt_plic_fixup() only does necessary fix-up against the legacy
"riscv,plic0" node. The upstream Linux kernel defines its official DT
bindings which uses "sifive,plic-1.0.0" as the compatible string and
we should check that first, and if not present fall back to legacy.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_fixup.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index a306ff5b6b2..14655000b81 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -57,9 +57,12 @@ void fdt_plic_fixup(void *fdt)
 	int i, cells_count;
 	int plic_off;
 
-	plic_off = fdt_node_offset_by_compatible(fdt, 0, "riscv,plic0");
-	if (plic_off < 0)
-		return;
+	plic_off = fdt_node_offset_by_compatible(fdt, 0, "sifive,plic-1.0.0");
+	if (plic_off < 0) {
+		plic_off = fdt_node_offset_by_compatible(fdt, 0, "riscv,plic0");
+		if (plic_off < 0)
+			return;
+	}
 
 	cells = (u32 *)fdt_getprop(fdt, plic_off,
 				   "interrupts-extended", &cells_count);

From 4ef2f5d3e6b25356a8fab19574bed76ce60edeee Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 30 Mar 2021 20:07:35 +0800
Subject: [PATCH 0740/1765] firware: optimize the exception exit code

There are two copies of the same abnormal exit code, this patch deletes one

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S     | 24 ++----------------------
 include/sbi/sbi_trap.h |  2 +-
 lib/sbi/sbi_trap.c     |  5 +++--
 3 files changed, 6 insertions(+), 25 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 2ce385178cb..c897ed08015 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -711,6 +711,7 @@ fw_platform_init:
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _trap_handler
+	.globl _trap_exit
 _trap_handler:
 	TRAP_SAVE_AND_SETUP_SP_T0
 
@@ -720,17 +721,6 @@ _trap_handler:
 
 	TRAP_CALL_C_ROUTINE
 
-	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
-
-	TRAP_RESTORE_MEPC_MSTATUS 0
-
-	TRAP_RESTORE_SP_T0
-
-	mret
-
-	.section .entry, "ax", %progbits
-	.align 3
-	.globl _trap_exit
 _trap_exit:
 	add	sp, a0, zero
 
@@ -746,6 +736,7 @@ _trap_exit:
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _trap_handler_rv32_hyp
+	.globl _trap_exit_rv32_hyp
 _trap_handler_rv32_hyp:
 	TRAP_SAVE_AND_SETUP_SP_T0
 
@@ -755,17 +746,6 @@ _trap_handler_rv32_hyp:
 
 	TRAP_CALL_C_ROUTINE
 
-	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
-
-	TRAP_RESTORE_MEPC_MSTATUS 1
-
-	TRAP_RESTORE_SP_T0
-
-	mret
-
-	.section .entry, "ax", %progbits
-	.align 3
-	.globl _trap_exit_rv32_hyp
 _trap_exit_rv32_hyp:
 	add	sp, a0, zero
 
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 070d000f193..d205056da1d 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -205,7 +205,7 @@ struct sbi_trap_info {
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_trap_info *trap);
 
-void sbi_trap_handler(struct sbi_trap_regs *regs);
+struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
 
 void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs);
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b7349d2c914..1ba649074b7 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -210,7 +210,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
  *
  * @param regs pointer to register state
  */
-void sbi_trap_handler(struct sbi_trap_regs *regs)
+struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 {
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
@@ -236,7 +236,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 			msg = "unhandled external interrupt";
 			goto trap_error;
 		};
-		return;
+		return regs;
 	}
 
 	switch (mcause) {
@@ -271,6 +271,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs)
 trap_error:
 	if (rc)
 		sbi_trap_error(msg, rc, mcause, mtval, mtval2, mtinst, regs);
+	return regs;
 }
 
 typedef void (*trap_exit_t)(const struct sbi_trap_regs *regs);

From 3d8a952737935dd98200b05b68dacb5e94071877 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 1 Apr 2021 15:59:40 +0800
Subject: [PATCH 0741/1765] lib: fix csr detect support

csr_read_allowed/csr_read_allowed requires trap.case to detect the results,
but if no exception occurs, the value of trap.case will remain unchanged,
which makes the detection results unreliable. Add code to initialize
trap.case to 0.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_csr_detect.h | 3 +++
 lib/sbi/sbi_hart.c           | 3 ---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_csr_detect.h b/include/sbi/sbi_csr_detect.h
index f29488845af..89ba294af15 100644
--- a/include/sbi/sbi_csr_detect.h
+++ b/include/sbi/sbi_csr_detect.h
@@ -12,6 +12,7 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_trap.h>
 
 #define csr_read_allowed(csr_num, trap)					\
 	({								\
@@ -19,6 +20,7 @@
 	register ulong ttmp asm("a4");					\
 	register ulong mtvec = sbi_hart_expected_trap_addr();		\
 	register ulong ret = 0;						\
+	((struct sbi_trap_info *)(trap))->cause = 0;			\
 	asm volatile(							\
 		"add %[ttmp], %[tinfo], zero\n"				\
 		"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"	\
@@ -36,6 +38,7 @@
 	register ulong tinfo asm("a3") = (ulong)trap;			\
 	register ulong ttmp asm("a4");					\
 	register ulong mtvec = sbi_hart_expected_trap_addr();		\
+	((struct sbi_trap_info *)(trap))->cause = 0;			\
 	asm volatile(							\
 		"add %[ttmp], %[tinfo], zero\n"				\
 		"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n"	\
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d91b08cf1ce..de59b1431b5 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -406,7 +406,6 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 #undef __check_csr
 
 	/* Detect if hart supports SCOUNTEREN feature */
-	trap.cause = 0;
 	val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
 		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
@@ -415,7 +414,6 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	}
 
 	/* Detect if hart supports MCOUNTEREN feature */
-	trap.cause = 0;
 	val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
 		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
@@ -424,7 +422,6 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	}
 
 	/* Detect if hart supports time CSR */
-	trap.cause = 0;
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
 		hfeatures->features |= SBI_HART_HAS_TIME;

From e71a7c10a934cdfa4c88f0f7b0c8ecb33c9bcff1 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 1 Apr 2021 16:31:00 +0530
Subject: [PATCH 0742/1765] firmware: Remove redundant add instruction from
 trap restore path

The "add sp, a0, zero" instruction in the trap restore path is redundant
and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the
base register instead of sp.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 firmware/fw_base.S | 88 ++++++++++++++++++++++------------------------
 1 file changed, 42 insertions(+), 46 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index c897ed08015..a5ce946aa3f 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -655,57 +655,57 @@ fw_platform_init:
 	call	sbi_trap_handler
 .endm
 
-.macro	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
-	/* Restore all general regisers except SP and T0 */
-	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
-	REG_L	gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
-	REG_L	tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
-	REG_L	t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
-	REG_L	t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
-	REG_L	s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
-	REG_L	s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
-	REG_L	a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
-	REG_L	a1, SBI_TRAP_REGS_OFFSET(a1)(sp)
-	REG_L	a2, SBI_TRAP_REGS_OFFSET(a2)(sp)
-	REG_L	a3, SBI_TRAP_REGS_OFFSET(a3)(sp)
-	REG_L	a4, SBI_TRAP_REGS_OFFSET(a4)(sp)
-	REG_L	a5, SBI_TRAP_REGS_OFFSET(a5)(sp)
-	REG_L	a6, SBI_TRAP_REGS_OFFSET(a6)(sp)
-	REG_L	a7, SBI_TRAP_REGS_OFFSET(a7)(sp)
-	REG_L	s2, SBI_TRAP_REGS_OFFSET(s2)(sp)
-	REG_L	s3, SBI_TRAP_REGS_OFFSET(s3)(sp)
-	REG_L	s4, SBI_TRAP_REGS_OFFSET(s4)(sp)
-	REG_L	s5, SBI_TRAP_REGS_OFFSET(s5)(sp)
-	REG_L	s6, SBI_TRAP_REGS_OFFSET(s6)(sp)
-	REG_L	s7, SBI_TRAP_REGS_OFFSET(s7)(sp)
-	REG_L	s8, SBI_TRAP_REGS_OFFSET(s8)(sp)
-	REG_L	s9, SBI_TRAP_REGS_OFFSET(s9)(sp)
-	REG_L	s10, SBI_TRAP_REGS_OFFSET(s10)(sp)
-	REG_L	s11, SBI_TRAP_REGS_OFFSET(s11)(sp)
-	REG_L	t3, SBI_TRAP_REGS_OFFSET(t3)(sp)
-	REG_L	t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
-	REG_L	t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
-	REG_L	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
+.macro	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
+	/* Restore all general regisers except A0 and T0 */
+	REG_L	ra, SBI_TRAP_REGS_OFFSET(ra)(a0)
+	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(a0)
+	REG_L	gp, SBI_TRAP_REGS_OFFSET(gp)(a0)
+	REG_L	tp, SBI_TRAP_REGS_OFFSET(tp)(a0)
+	REG_L	t1, SBI_TRAP_REGS_OFFSET(t1)(a0)
+	REG_L	t2, SBI_TRAP_REGS_OFFSET(t2)(a0)
+	REG_L	s0, SBI_TRAP_REGS_OFFSET(s0)(a0)
+	REG_L	s1, SBI_TRAP_REGS_OFFSET(s1)(a0)
+	REG_L	a1, SBI_TRAP_REGS_OFFSET(a1)(a0)
+	REG_L	a2, SBI_TRAP_REGS_OFFSET(a2)(a0)
+	REG_L	a3, SBI_TRAP_REGS_OFFSET(a3)(a0)
+	REG_L	a4, SBI_TRAP_REGS_OFFSET(a4)(a0)
+	REG_L	a5, SBI_TRAP_REGS_OFFSET(a5)(a0)
+	REG_L	a6, SBI_TRAP_REGS_OFFSET(a6)(a0)
+	REG_L	a7, SBI_TRAP_REGS_OFFSET(a7)(a0)
+	REG_L	s2, SBI_TRAP_REGS_OFFSET(s2)(a0)
+	REG_L	s3, SBI_TRAP_REGS_OFFSET(s3)(a0)
+	REG_L	s4, SBI_TRAP_REGS_OFFSET(s4)(a0)
+	REG_L	s5, SBI_TRAP_REGS_OFFSET(s5)(a0)
+	REG_L	s6, SBI_TRAP_REGS_OFFSET(s6)(a0)
+	REG_L	s7, SBI_TRAP_REGS_OFFSET(s7)(a0)
+	REG_L	s8, SBI_TRAP_REGS_OFFSET(s8)(a0)
+	REG_L	s9, SBI_TRAP_REGS_OFFSET(s9)(a0)
+	REG_L	s10, SBI_TRAP_REGS_OFFSET(s10)(a0)
+	REG_L	s11, SBI_TRAP_REGS_OFFSET(s11)(a0)
+	REG_L	t3, SBI_TRAP_REGS_OFFSET(t3)(a0)
+	REG_L	t4, SBI_TRAP_REGS_OFFSET(t4)(a0)
+	REG_L	t5, SBI_TRAP_REGS_OFFSET(t5)(a0)
+	REG_L	t6, SBI_TRAP_REGS_OFFSET(t6)(a0)
 .endm
 
 .macro	TRAP_RESTORE_MEPC_MSTATUS have_mstatush
 	/* Restore MEPC and MSTATUS CSRs */
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(a0)
 	csrw	CSR_MEPC, t0
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)
 	csrw	CSR_MSTATUS, t0
 	.if \have_mstatush
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(a0)
 	csrw	CSR_MSTATUSH, t0
 	.endif
 .endm
 
-.macro TRAP_RESTORE_SP_T0
+.macro TRAP_RESTORE_A0_T0
 	/* Restore T0 */
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(t0)(a0)
 
-	/* Restore SP */
-	REG_L	sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
+	/* Restore A0 */
+	REG_L	a0, SBI_TRAP_REGS_OFFSET(a0)(a0)
 .endm
 
 	.section .entry, "ax", %progbits
@@ -722,13 +722,11 @@ _trap_handler:
 	TRAP_CALL_C_ROUTINE
 
 _trap_exit:
-	add	sp, a0, zero
-
-	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
 
 	TRAP_RESTORE_MEPC_MSTATUS 0
 
-	TRAP_RESTORE_SP_T0
+	TRAP_RESTORE_A0_T0
 
 	mret
 
@@ -747,13 +745,11 @@ _trap_handler_rv32_hyp:
 	TRAP_CALL_C_ROUTINE
 
 _trap_exit_rv32_hyp:
-	add	sp, a0, zero
-
-	TRAP_RESTORE_GENERAL_REGS_EXCEPT_SP_T0
+	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
 
 	TRAP_RESTORE_MEPC_MSTATUS 1
 
-	TRAP_RESTORE_SP_T0
+	TRAP_RESTORE_A0_T0
 
 	mret
 #endif

From d4a94ea471451f0a24e02e2e7ebf869bb4f7dbf4 Mon Sep 17 00:00:00 2001
From: Christoph Muellner <cmuellner@linux.com>
Date: Tue, 6 Apr 2021 03:53:52 +0200
Subject: [PATCH 0743/1765] include: types: Add __aligned(x) to define the
 minimum alignement

The __aligned(x) macro is a common wrapper around compiler's
aligned attribute, which allow to define the minimum alignement
of a data type. Let's add this macro.

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 0952d5c8212..38e3565b486 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -63,6 +63,7 @@ typedef unsigned long		physical_size_t;
 
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
+#define __aligned(x)		__attribute__((aligned(x)))
 
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)

From d0e406fa44a108210d29b26281777206961cd772 Mon Sep 17 00:00:00 2001
From: Christoph Muellner <cmuellner@linux.com>
Date: Tue, 6 Apr 2021 03:53:53 +0200
Subject: [PATCH 0744/1765] include: sbi: Allow direct initialization via
 SPIN_LOCK_INIT()

The current implementation of SPIN_LOCK_INIT() provides the spinlock
to be initialized as reference. This does not allow a direct
initialization of the spinlock object at the creation site.

Let's pass the spinlock directly instead (like Linux does as well)
and adjust all users of the macro (in fact there is only one user).

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_locks.h | 2 +-
 lib/sbi/sbi_fifo.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h
index 55da7c01c1a..faa96763fa3 100644
--- a/include/sbi/riscv_locks.h
+++ b/include/sbi/riscv_locks.h
@@ -16,7 +16,7 @@ typedef struct {
 
 #define __RISCV_SPIN_UNLOCKED 0
 
-#define SPIN_LOCK_INIT(_lptr) (_lptr)->lock = __RISCV_SPIN_UNLOCKED
+#define SPIN_LOCK_INIT(x) (x).lock = __RISCV_SPIN_UNLOCKED
 
 #define SPIN_LOCK_INITIALIZER                  \
 	{                                      \
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 8d1dbf04431..2a5c0129807 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -18,7 +18,7 @@ void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 	fifo->queue	  = queue_mem;
 	fifo->num_entries = entries;
 	fifo->entry_size  = entry_size;
-	SPIN_LOCK_INIT(&fifo->qlock);
+	SPIN_LOCK_INIT(fifo->qlock);
 	fifo->avail = fifo->tail = 0;
 	sbi_memset(fifo->queue, 0, (size_t)entries * entry_size);
 }

From 4d8e2f135d659697337f8d4a33fec60cd475f0dc Mon Sep 17 00:00:00 2001
From: Christoph Muellner <cmuellner@linux.com>
Date: Tue, 6 Apr 2021 03:53:54 +0200
Subject: [PATCH 0745/1765] lib: sbi: Replace test-and-set locks by ticket
 locks

Replace the test-and-set spinlock implementation with ticket locks
in order to get fairness (in form of FIFO order).

The implementation uses a 32-bit wide struct, which consists of
two 16-bit counters (owner and next). This is inspired by similar
spinlock implementations on other architectures.
This allows that the code works for both, RV32 and RV64.

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/riscv_locks.h | 33 +++++++++++++-------
 lib/sbi/riscv_locks.c     | 66 +++++++++++++++++++++++++++++----------
 2 files changed, 71 insertions(+), 28 deletions(-)

diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h
index faa96763fa3..492935f5d60 100644
--- a/include/sbi/riscv_locks.h
+++ b/include/sbi/riscv_locks.h
@@ -2,26 +2,37 @@
  * SPDX-License-Identifier: BSD-2-Clause
  *
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
+ * Copyright (c) 2021 Christoph Müllner <cmuellner@linux.com>
  */
 
 #ifndef __RISCV_LOCKS_H__
 #define __RISCV_LOCKS_H__
 
+#include <sbi/sbi_types.h>
+
+#define TICKET_SHIFT	16
+
 typedef struct {
-	volatile long lock;
-} spinlock_t;
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+       u16 next;
+       u16 owner;
+#else
+       u16 owner;
+       u16 next;
+#endif
+} __aligned(4) spinlock_t;
+
+#define __SPIN_LOCK_UNLOCKED	\
+	(spinlock_t) { 0, 0 }
 
-#define __RISCV_SPIN_UNLOCKED 0
+#define SPIN_LOCK_INIT(x)	\
+	x = __SPIN_LOCK_UNLOCKED
 
-#define SPIN_LOCK_INIT(x) (x).lock = __RISCV_SPIN_UNLOCKED
+#define SPIN_LOCK_INITIALIZER	\
+	__SPIN_LOCK_UNLOCKED
 
-#define SPIN_LOCK_INITIALIZER                  \
-	{                                      \
-		.lock = __RISCV_SPIN_UNLOCKED, \
-	}
+#define DEFINE_SPIN_LOCK(x)	\
+	spinlock_t SPIN_LOCK_INIT(x)
 
 int spin_lock_check(spinlock_t *lock);
 
diff --git a/lib/sbi/riscv_locks.c b/lib/sbi/riscv_locks.c
index 4d1d9c0c14b..75b443bd35b 100644
--- a/lib/sbi/riscv_locks.c
+++ b/lib/sbi/riscv_locks.c
@@ -2,44 +2,76 @@
  * SPDX-License-Identifier: BSD-2-Clause
  *
  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
+ * Copyright (c) 2021 Christoph Müllner <cmuellner@linux.com>
  */
 
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_locks.h>
 
-int spin_lock_check(spinlock_t *lock)
+static inline int spin_lock_unlocked(spinlock_t lock)
+{
+	return lock.owner == lock.next;
+}
+
+bool spin_lock_check(spinlock_t *lock)
 {
-	return (lock->lock == __RISCV_SPIN_UNLOCKED) ? 0 : 1;
+	RISCV_FENCE(r, rw);
+	return !spin_lock_unlocked(*lock);
 }
 
 int spin_trylock(spinlock_t *lock)
 {
-	int tmp = 1, busy;
+	unsigned long inc = 1u << TICKET_SHIFT;
+	unsigned long mask = 0xffffu << TICKET_SHIFT;
+	u32 l0, tmp1, tmp2;
 
 	__asm__ __volatile__(
-		"	amoswap.w %0, %2, %1\n" RISCV_ACQUIRE_BARRIER
-		: "=r"(busy), "+A"(lock->lock)
-		: "r"(tmp)
+		/* Get the current lock counters. */
+		"1:	lr.w.aq	%0, %3\n"
+		"	slli	%2, %0, %6\n"
+		"	and	%2, %2, %5\n"
+		"	and	%1, %0, %5\n"
+		/* Is the lock free right now? */
+		"	bne	%1, %2, 2f\n"
+		"	add	%0, %0, %4\n"
+		/* Acquire the lock. */
+		"	sc.w.rl	%0, %0, %3\n"
+		"	bnez	%0, 1b\n"
+		"2:"
+		: "=&r"(l0), "=&r"(tmp1), "=&r"(tmp2), "+A"(*lock)
+		: "r"(inc), "r"(mask), "I"(TICKET_SHIFT)
 		: "memory");
 
-	return !busy;
+	return !l0;
 }
 
 void spin_lock(spinlock_t *lock)
 {
-	while (1) {
-		if (spin_lock_check(lock))
-			continue;
+	unsigned long inc = 1u << TICKET_SHIFT;
+	unsigned long mask = 0xffffu;
+	u32 l0, tmp1, tmp2;
 
-		if (spin_trylock(lock))
-			break;
-	}
+	__asm__ __volatile__(
+		/* Atomically increment the next ticket. */
+		"	amoadd.w.aqrl	%0, %4, %3\n"
+
+		/* Did we get the lock? */
+		"	srli	%1, %0, %6\n"
+		"	and	%1, %1, %5\n"
+		"1:	and	%2, %0, %5\n"
+		"	beq	%1, %2, 2f\n"
+
+		/* If not, then spin on the lock. */
+		"	lw	%0, %3\n"
+		RISCV_ACQUIRE_BARRIER
+		"	j	1b\n"
+		"2:"
+		: "=&r"(l0), "=&r"(tmp1), "=&r"(tmp2), "+A"(*lock)
+		: "r"(inc), "r"(mask), "I"(TICKET_SHIFT)
+		: "memory");
 }
 
 void spin_unlock(spinlock_t *lock)
 {
-	__smp_store_release(&lock->lock, __RISCV_SPIN_UNLOCKED);
+	__smp_store_release(&lock->owner, lock->owner + 1);
 }

From 70ffc3e2e690f2b7bcea456f49206b636420ef5f Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 6 Apr 2021 11:34:38 +0800
Subject: [PATCH 0746/1765] lib: sbi: fix atomic_add_return

The unsigned length may be 4 bytes or 8 bytes, amoadd.w only applies
to 4 bytes hence this patch.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_atomic.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 558bca8c139..528686f4e9c 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -28,25 +28,23 @@ void atomic_write(atomic_t *atom, long value)
 long atomic_add_return(atomic_t *atom, long value)
 {
 	long ret;
-
+#if __SIZEOF_LONG__ == 4
 	__asm__ __volatile__("	amoadd.w.aqrl  %1, %2, %0"
 			     : "+A"(atom->counter), "=r"(ret)
 			     : "r"(value)
 			     : "memory");
-
+#elif __SIZEOF_LONG__ == 8
+	__asm__ __volatile__("	amoadd.d.aqrl  %1, %2, %0"
+			     : "+A"(atom->counter), "=r"(ret)
+			     : "r"(value)
+			     : "memory");
+#endif
 	return ret + value;
 }
 
 long atomic_sub_return(atomic_t *atom, long value)
 {
-	long ret;
-
-	__asm__ __volatile__("	amoadd.w.aqrl  %1, %2, %0"
-			     : "+A"(atom->counter), "=r"(ret)
-			     : "r"(-value)
-			     : "memory");
-
-	return ret - value;
+	return atomic_add_return(atom, -value);
 }
 
 #define __axchg(ptr, new, size)							\

From 27a16b1545f750bc4d15d46a737a4411861bd9d3 Mon Sep 17 00:00:00 2001
From: hasheddan <georgedanielmangum@gmail.com>
Date: Sat, 10 Apr 2021 07:08:03 -0500
Subject: [PATCH 0747/1765] docs: fix link to OpenPiton documentation

Updates link in platforms documentation to point to the correct
OpenPiton document.

Signed-off-by: hasheddan <georgedanielmangum@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/platform.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 7f470681369..8ee8754f715 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -36,7 +36,7 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 * **OpenPiton FPGA SoC**: Platform support OpenPiton research platform based
   on ariane core. More details on this platform can be found in the file
-  *[fpga_openpiton.md]*.
+  *[fpga-openpiton.md]*.
 
 * **Shakti C-class SoC Platform**: Platform support for Shakti C-class
   processor based SOCs. More details on this platform can be found in the
@@ -55,5 +55,5 @@ facilitate the implementation.
 [andes-ae350.md]: andes-ae350.md
 [thead-c910.md]: thead-c910.md
 [spike.md]: spike.md
-[fpga_openpiton.md]: fpga_openpiton.md
+[fpga-openpiton.md]: fpga-openpiton.md
 [shakti_cclass.md]: shakti_cclass.md

From b1df1acd201e388a5ce96fd045593ee5b29c0387 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 9 Apr 2021 09:20:08 +0530
Subject: [PATCH 0748/1765] lib: sbi: Domains can be registered only before
 finalizing domains

The domains are boot-time system-level partitions so we should
allow platform support to register domains only before hart
domain assignments are finalized.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi/sbi_domain.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 195c9413c71..28492410438 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -19,8 +19,8 @@
 
 struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX] = { 0 };
-
 static u32 domain_count = 0;
+static bool domain_finalized = false;
 
 static struct sbi_hartmask root_hmask = { 0 };
 
@@ -376,7 +376,8 @@ int sbi_domain_register(struct sbi_domain *dom,
 	u32 cold_hartid = current_hartid();
 	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
-	if (!dom || !assign_mask)
+	/* Sanity checks */
+	if (!dom || !assign_mask || domain_finalized)
 		return SBI_EINVAL;
 
 	/* Check if domain already discovered */
@@ -490,6 +491,12 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 		}
 	}
 
+	/*
+	 * Set the finalized flag so that the root domain
+	 * regions can't be changed.
+	 */
+	domain_finalized = true;
+
 	return 0;
 }
 

From 7495bce6f96388f0aeadd95d59e64365cd008450 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 9 Apr 2021 16:02:40 +0530
Subject: [PATCH 0749/1765] lib: sbi: Add sbi_domain_memregion_init() API

This patch adds sbi_domain_memregion_init() helper API which can
be used by platform support to initialize a domain memory region
before adding it to the root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_domain.h | 14 +++++++++++++
 lib/sbi/sbi_domain.c     | 45 ++++++++++++++++++++++++++++++++--------
 2 files changed, 50 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 1f8b942c481..f9f4f7d0dff 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -127,6 +127,20 @@ ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 /** Initialize a domain memory region as firmware region */
 void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg);
 
+/**
+ * Initialize a domain memory region based on it's physical
+ * address and size.
+ *
+ * @param addr start physical address of memory region
+ * @param size physical size of memory region
+ * @param flags memory region flags
+ * @param reg pointer to memory region being initialized
+ */
+void sbi_domain_memregion_init(unsigned long addr,
+				unsigned long size,
+				unsigned long flags,
+				struct sbi_domain_memregion *reg);
+
 /**
  * Check whether we can access specified address for given mode and
  * memory region flags under a domain
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 28492410438..164f35cadb8 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -72,6 +72,35 @@ void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg)
 	sbi_memcpy(reg, &root_memregs[ROOT_FW_REGION], sizeof(*reg));
 }
 
+void sbi_domain_memregion_init(unsigned long addr,
+				unsigned long size,
+				unsigned long flags,
+				struct sbi_domain_memregion *reg)
+{
+	unsigned long base = 0, order;
+
+	for (order = log2roundup(size) ; order <= __riscv_xlen; order++) {
+		if (order < __riscv_xlen) {
+			base = addr & ~((1UL << order) - 1UL);
+			if ((base <= addr) &&
+			    (addr < (base + (1UL << order))) &&
+			    (base <= (addr + size - 1UL)) &&
+			    ((addr + size - 1UL) < (base + (1UL << order))))
+				break;
+		} else {
+			base = 0;
+			break;
+		}
+
+	}
+
+	if (reg) {
+		reg->base = base;
+		reg->order = order;
+		reg->flags = flags;
+	}
+}
+
 bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
 			   unsigned long access_flags)
@@ -507,17 +536,15 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Root domain firmware memory region */
-	root_memregs[ROOT_FW_REGION].order = log2roundup(scratch->fw_size);
-	root_memregs[ROOT_FW_REGION].base = scratch->fw_start &
-				~((1UL << root_memregs[0].order) - 1UL);
-	root_memregs[ROOT_FW_REGION].flags = 0;
+	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size, 0,
+				  &root_memregs[ROOT_FW_REGION]);
 
 	/* Root domain allow everything memory region */
-	root_memregs[ROOT_ALL_REGION].order = __riscv_xlen;
-	root_memregs[ROOT_ALL_REGION].base = 0;
-	root_memregs[ROOT_ALL_REGION].flags = (SBI_DOMAIN_MEMREGION_READABLE |
-						SBI_DOMAIN_MEMREGION_WRITEABLE |
-						SBI_DOMAIN_MEMREGION_EXECUTABLE);
+	sbi_domain_memregion_init(0, ~0UL,
+				  (SBI_DOMAIN_MEMREGION_READABLE |
+				   SBI_DOMAIN_MEMREGION_WRITEABLE |
+				   SBI_DOMAIN_MEMREGION_EXECUTABLE),
+				  &root_memregs[ROOT_ALL_REGION]);
 
 	/* Root domain memory region end */
 	root_memregs[ROOT_END_REGION].order = 0;

From 4dc0001b09477c20856ece363ecf50346e7ddddb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 9 Apr 2021 10:01:11 +0530
Subject: [PATCH 0750/1765] lib: sbi: Add sbi_domain_root_add_memregion() API

We should allow platform support to add more root memory regions
before domains are finalized. This will help platform support to
protect critical M-mode only resources.

This patch adds sbi_domain_root_add_memregion() API for above
described purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_domain.h |  8 ++++
 lib/sbi/sbi_domain.c     | 83 ++++++++++++++++++++++++++++++++++------
 2 files changed, 80 insertions(+), 11 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index f9f4f7d0dff..84d17da48b9 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -170,6 +170,14 @@ void sbi_domain_dump_all(const char *suffix);
 int sbi_domain_register(struct sbi_domain *dom,
 			const struct sbi_hartmask *assign_mask);
 
+/**
+ * Add a memory region to the root domain
+ * @param reg pointer to the memory region to be added
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
+
 /** Finalize domain tables and startup non-root domains */
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
 
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 164f35cadb8..4b5a89fe182 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -24,10 +24,10 @@ static bool domain_finalized = false;
 
 static struct sbi_hartmask root_hmask = { 0 };
 
-#define ROOT_FW_REGION		0
-#define ROOT_ALL_REGION	1
-#define ROOT_END_REGION	2
-static struct sbi_domain_memregion root_memregs[ROOT_END_REGION + 1] = { 0 };
+#define ROOT_REGION_MAX	16
+static u32 root_memregs_count = 0;
+static struct sbi_domain_memregion root_fw_region;
+static struct sbi_domain_memregion root_memregs[ROOT_REGION_MAX + 1] = { 0 };
 
 static struct sbi_domain root = {
 	.name = "root",
@@ -69,7 +69,7 @@ void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg)
 	if (!reg)
 		return;
 
-	sbi_memcpy(reg, &root_memregs[ROOT_FW_REGION], sizeof(*reg));
+	sbi_memcpy(reg, &root_fw_region, sizeof(*reg));
 }
 
 void sbi_domain_memregion_init(unsigned long addr,
@@ -236,9 +236,9 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	count = 0;
 	have_fw_reg = FALSE;
 	sbi_domain_for_each_memregion(dom, reg) {
-		if (reg->order == root_memregs[ROOT_FW_REGION].order &&
-		    reg->base == root_memregs[ROOT_FW_REGION].base &&
-		    reg->flags == root_memregs[ROOT_FW_REGION].flags)
+		if (reg->order == root_fw_region.order &&
+		    reg->base == root_fw_region.base &&
+		    reg->flags == root_fw_region.flags)
 			have_fw_reg = TRUE;
 		count++;
 	}
@@ -468,6 +468,66 @@ int sbi_domain_register(struct sbi_domain *dom,
 	return 0;
 }
 
+int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
+{
+	int rc;
+	bool reg_merged;
+	struct sbi_domain_memregion *nreg, *nreg1, *nreg2;
+	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
+
+	/* Sanity checks */
+	if (!reg || domain_finalized ||
+	    (root.regions != root_memregs) ||
+	    (ROOT_REGION_MAX <= root_memregs_count))
+		return SBI_EINVAL;
+
+	/* Check for conflicts */
+	sbi_domain_for_each_memregion(&root, nreg) {
+		if (is_region_conflict(reg, nreg))
+			return SBI_EINVAL;
+	}
+
+	/* Append the memregion to root memregions */
+	nreg = &root_memregs[root_memregs_count];
+	sbi_memcpy(nreg, reg, sizeof(*reg));
+	root_memregs_count++;
+	root_memregs[root_memregs_count].order = 0;
+
+	/* Sort and optimize root regions */
+	do {
+		/* Sanitize the root domain so that memregions are sorted */
+		rc = sanitize_domain(plat, &root);
+		if (rc) {
+			sbi_printf("%s: sanity checks failed for"
+				   " %s (error %d)\n", __func__,
+				   root.name, rc);
+			return rc;
+		}
+
+		/* Merge consecutive memregions with same order and flags */
+		reg_merged = false;
+		sbi_domain_for_each_memregion(&root, nreg) {
+			nreg1 = nreg + 1;
+			if (!nreg1->order)
+				continue;
+
+			if ((nreg->base + BIT(nreg->order)) == nreg1->base &&
+			    nreg->order == nreg1->order &&
+			    nreg->flags == nreg1->flags) {
+				nreg->order++;
+				while (nreg1->order) {
+					nreg2 = nreg1 + 1;
+					sbi_memcpy(nreg1, nreg2, sizeof(*nreg1));
+					nreg1++;
+				}
+				reg_merged = true;
+			}
+		}
+	} while (reg_merged);
+
+	return 0;
+}
+
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
@@ -537,17 +597,18 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	/* Root domain firmware memory region */
 	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size, 0,
-				  &root_memregs[ROOT_FW_REGION]);
+				  &root_fw_region);
+	sbi_domain_memregion_initfw(&root_memregs[root_memregs_count++]);
 
 	/* Root domain allow everything memory region */
 	sbi_domain_memregion_init(0, ~0UL,
 				  (SBI_DOMAIN_MEMREGION_READABLE |
 				   SBI_DOMAIN_MEMREGION_WRITEABLE |
 				   SBI_DOMAIN_MEMREGION_EXECUTABLE),
-				  &root_memregs[ROOT_ALL_REGION]);
+				  &root_memregs[root_memregs_count++]);
 
 	/* Root domain memory region end */
-	root_memregs[ROOT_END_REGION].order = 0;
+	root_memregs[root_memregs_count].order = 0;
 
 	/* Use platform specific root memory regions when available */
 	memregs = sbi_platform_domains_root_regions(plat);

From 8b569803475e130b85987b97fdd47c19e900bf82 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 9 Apr 2021 18:09:06 +0530
Subject: [PATCH 0751/1765] lib: utils/sys: Add CLINT memregion in the root
 domain

The CLINT memory should not be accessed by the supervisor-mode
software so let's protect it by adding CLINT memregion to the
root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/utils/sys/clint.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 7a392aad83b..80e04fbd62e 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -10,13 +10,19 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi_utils/sys/clint.h>
 
 #define CLINT_IPI_OFF		0
+#define CLINT_IPI_SIZE		0x4000
+
 #define CLINT_TIME_CMP_OFF	0x4000
+#define CLINT_TIME_CMP_SIZE	0x4000
+
 #define CLINT_TIME_VAL_OFF	0xbff8
+#define CLINT_TIME_VAL_SIZE	0x4000
 
 static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS];
 
@@ -59,6 +65,7 @@ int clint_warm_ipi_init(void)
 int clint_cold_ipi_init(struct clint_data *clint)
 {
 	u32 i;
+	struct sbi_domain_memregion reg;
 
 	if (!clint)
 		return SBI_EINVAL;
@@ -70,7 +77,11 @@ int clint_cold_ipi_init(struct clint_data *clint)
 	for (i = 0; i < clint->hart_count; i++)
 		clint_ipi_hartid2data[clint->first_hartid + i] = clint;
 
-	return 0;
+	/* Add CLINT ipi region to the root domain */
+	sbi_domain_memregion_init(clint->addr + CLINT_IPI_OFF,
+				  CLINT_IPI_SIZE,
+				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+	return sbi_domain_root_add_memregion(&reg);
 }
 
 static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS];
@@ -174,6 +185,8 @@ int clint_cold_timer_init(struct clint_data *clint,
 			  struct clint_data *reference)
 {
 	u32 i;
+	int rc;
+	struct sbi_domain_memregion reg;
 
 	if (!clint)
 		return SBI_EINVAL;
@@ -199,5 +212,17 @@ int clint_cold_timer_init(struct clint_data *clint,
 	for (i = 0; i < clint->hart_count; i++)
 		clint_timer_hartid2data[clint->first_hartid + i] = clint;
 
-	return 0;
+	/* Add CLINT mtime region to the root domain */
+	sbi_domain_memregion_init(clint->addr + CLINT_TIME_VAL_OFF,
+				  CLINT_TIME_VAL_SIZE,
+				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+	rc = sbi_domain_root_add_memregion(&reg);
+	if (rc)
+		return rc;
+
+	/* Add CLINT timecmp region to the root domain */
+	sbi_domain_memregion_init(clint->addr + CLINT_TIME_CMP_OFF,
+				  CLINT_TIME_CMP_SIZE,
+				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+	return sbi_domain_root_add_memregion(&reg);
 }

From fc37c9712d50a8900a13eacae64bc4e640e528e9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 10 Apr 2021 09:09:00 +0530
Subject: [PATCH 0752/1765] lib: sbi: Make the root domain instance global
 variable

We make the the root domain instance global variable so that
platform support and drivers can iterate over the root domain
regions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_domain.h | 3 +++
 lib/sbi/sbi_domain.c     | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 84d17da48b9..27316dec60f 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -80,6 +80,9 @@ struct sbi_domain {
 	bool system_reset_allowed;
 };
 
+/** The root domain instance */
+extern struct sbi_domain root;
+
 /** HART id to domain table */
 extern struct sbi_domain *hartid_to_domain_table[];
 
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4b5a89fe182..c95c3c3bc7b 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -29,7 +29,7 @@ static u32 root_memregs_count = 0;
 static struct sbi_domain_memregion root_fw_region;
 static struct sbi_domain_memregion root_memregs[ROOT_REGION_MAX + 1] = { 0 };
 
-static struct sbi_domain root = {
+struct sbi_domain root = {
 	.name = "root",
 	.possible_harts = &root_hmask,
 	.regions = root_memregs,

From e7e4bcd5b95ed9abcac850725edb1955e772ed3d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 10 Apr 2021 09:37:23 +0530
Subject: [PATCH 0753/1765] lib: utils: Copy over restricted root domain
 memregions to FDT domains

We should copy over all restricted memregions from the root domain
to the domains populated from FDT. These restricted root memregions
are typically firmware memregion and M-mode only mmio memregions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/utils/fdt/fdt_domain.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 09615e53e90..95c195d6523 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -222,7 +222,7 @@ static u32 fdt_domains_count;
 static struct sbi_domain fdt_domains[FDT_DOMAIN_MAX_COUNT];
 static struct sbi_hartmask fdt_masks[FDT_DOMAIN_MAX_COUNT];
 static struct sbi_domain_memregion
-	fdt_regions[FDT_DOMAIN_MAX_COUNT][FDT_DOMAIN_REGION_MAX_COUNT + 2];
+	fdt_regions[FDT_DOMAIN_MAX_COUNT][FDT_DOMAIN_REGION_MAX_COUNT + 1];
 
 static int __fdt_parse_region(void *fdt, int domain_offset,
 			      int region_offset, u32 region_access,
@@ -276,7 +276,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	struct sbi_hartmask *mask;
 	struct sbi_hartmask assign_mask;
 	int *cold_domain_offset = opaque;
-	struct sbi_domain_memregion *regions;
+	struct sbi_domain_memregion *reg, *regions;
 	int i, err, len, cpus_offset, cpu_offset, doffset;
 
 	/* Sanity check on maximum domains we can handle */
@@ -314,13 +314,31 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	/* Setup memregions from DT */
 	val32 = 0;
 	sbi_memset(regions, 0,
-		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 2));
+		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 1));
 	dom->regions = regions;
 	err = fdt_iterate_each_memregion(fdt, domain_offset, &val32,
 					 __fdt_parse_region);
 	if (err)
 		return err;
-	sbi_domain_memregion_initfw(&regions[val32]);
+
+	/*
+	 * Copy over root domain memregions which don't allow
+	 * read, write and execute from lower privilege modes.
+	 *
+	 * These root domain memregions without read, write,
+	 * and execute permissions include:
+	 * 1) firmware region protecting the firmware memory
+	 * 2) mmio regions protecting M-mode only mmio devices
+	 */
+	sbi_domain_for_each_memregion(&root, reg) {
+		if ((reg->flags & SBI_DOMAIN_MEMREGION_READABLE) ||
+		    (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE) ||
+		    (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE))
+			continue;
+		if (FDT_DOMAIN_REGION_MAX_COUNT <= val32)
+			return SBI_EINVAL;
+		sbi_memcpy(&regions[val32++], reg, sizeof(*reg));
+	}
 
 	/* Read "boot-hart" DT property */
 	val32 = -1U;

From f41196a9d245f024a87a08e7d159ca6dc0a6c298 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 10 Apr 2021 10:08:23 +0530
Subject: [PATCH 0754/1765] lib: sbi: Make sbi_domain_memregion_initfw() a
 local function

The sbi_domain_memregion_initfw() is no longer used outside
sbi_domain.c so let's make it a local function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_domain.h | 3 ---
 lib/sbi/sbi_domain.c     | 4 ++--
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 27316dec60f..15e3a5397df 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -127,9 +127,6 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
 ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 				       ulong hbase);
 
-/** Initialize a domain memory region as firmware region */
-void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg);
-
 /**
  * Initialize a domain memory region based on it's physical
  * address and size.
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index c95c3c3bc7b..69a3795b1b5 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -64,7 +64,7 @@ ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 	return ret;
 }
 
-void sbi_domain_memregion_initfw(struct sbi_domain_memregion *reg)
+static void domain_memregion_initfw(struct sbi_domain_memregion *reg)
 {
 	if (!reg)
 		return;
@@ -598,7 +598,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	/* Root domain firmware memory region */
 	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size, 0,
 				  &root_fw_region);
-	sbi_domain_memregion_initfw(&root_memregs[root_memregs_count++]);
+	domain_memregion_initfw(&root_memregs[root_memregs_count++]);
 
 	/* Root domain allow everything memory region */
 	sbi_domain_memregion_init(0, ~0UL,

From c5d064505236d8c272fffcd58fb27482325e14fd Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Sat, 17 Apr 2021 16:26:16 +0000
Subject: [PATCH 0755/1765] lib: utils: Implement "64bit-mmio" property parsing

Figure out CLINT has_64bit_mmio from DT node and using antonym for
compatibility.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_helper.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index bf19ff92d5b..909de013d3d 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -442,8 +442,9 @@ int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
 	if (clint->hart_count < count)
 		clint->hart_count = count;
 
-	/* TODO: We should figure-out CLINT has_64bit_mmio from DT node */
 	clint->has_64bit_mmio = TRUE;
+	if (fdt_getprop(fdt, nodeoffset, "clint,has-no-64bit-mmio", &count))
+		clint->has_64bit_mmio = FALSE;
 
 	return 0;
 }

From 49e422c5ad7abee9be0bb1066b1db65676e61985 Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Sat, 17 Apr 2021 16:26:17 +0000
Subject: [PATCH 0756/1765] lib: utils: reset: Add T-HEAD sample platform reset
 driver

This driver is for T-HEAD test chip, fpga. It could work with
all T-HEAD riscv processors: C9xx series.

example1: (Using io-regs for reset)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
	entry-reg = <0xff 0xff019050>;
	entry-cnt = <4>;
	control-reg = <0xff 0xff015004>;
	control-val = <0x1c>;
	csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
};

example2: (Using csr-regs for reset)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
	using-csr-reset;
	csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
		    0x3b0 0x3b1 0x3b2 0x3b3
		    0x3b4 0x3b5 0x3b6 0x3b7
		    0x3a0>;
};

example3: (Only delegate plic enable to S-mode)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
};

After this patch, all T-HEAD c9xx would use platform/generic with fw_dynamic
as default:

CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make

The platform/thead will be deprecated.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_asm.h               |   5 +
 include/sbi/riscv_barrier.h           |   3 +
 lib/utils/reset/fdt_reset.c           |   2 +
 lib/utils/reset/fdt_reset_thead.c     | 132 ++++++++++++++++++++++++++
 lib/utils/reset/fdt_reset_thead.h     |  23 +++++
 lib/utils/reset/fdt_reset_thead_asm.S |  47 +++++++++
 lib/utils/reset/objects.mk            |   2 +
 7 files changed, 214 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_thead.c
 create mode 100644 lib/utils/reset/fdt_reset_thead.h
 create mode 100644 lib/utils/reset/fdt_reset_thead_asm.S

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 9fa0fe5c372..1ff36de76e3 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -157,6 +157,11 @@ void csr_write_num(int csr_num, unsigned long val);
 		__asm__ __volatile__("wfi" ::: "memory"); \
 	} while (0)
 
+#define ebreak()                                             \
+	do {                                              \
+		__asm__ __volatile__("ebreak" ::: "memory"); \
+	} while (0)
+
 /* Get current HART id */
 #define current_hartid()	((unsigned int)csr_read(CSR_MHARTID))
 
diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h
index 905ecb40fd2..1fba8b82760 100644
--- a/include/sbi/riscv_barrier.h
+++ b/include/sbi/riscv_barrier.h
@@ -18,6 +18,9 @@
 #define RISCV_FENCE(p, s) \
 	__asm__ __volatile__ ("fence " #p "," #s : : : "memory")
 
+#define RISCV_FENCE_I \
+	__asm__ __volatile__ ("fence.i" : : : "memory")
+
 /* Read & Write Memory barrier */
 #define mb()			RISCV_FENCE(iorw,iorw)
 
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index dead8a34238..82532c2b37e 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -13,10 +13,12 @@
 
 extern struct fdt_reset fdt_reset_sifive;
 extern struct fdt_reset fdt_reset_htif;
+extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
 	&fdt_reset_sifive,
 	&fdt_reset_htif,
+	&fdt_reset_thead,
 };
 
 static struct fdt_reset *current_driver = NULL;
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
new file mode 100644
index 00000000000..ea81fc9eb73
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -0,0 +1,132 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include "fdt_reset_thead.h"
+
+struct custom_csr custom_csr[MAX_CUSTOM_CSR];
+
+#define CSR_OPCODE 0x39073
+static void clone_csrs(int cnt)
+{
+	unsigned long i;
+
+	for (i = 0; i < cnt; i++) {
+		/* Write csr BIT[31 - 20] to stub */
+		__reset_thead_csr_stub[3*i + 1] =
+				CSR_OPCODE | (custom_csr[i].index << 20);
+
+		/* Mask csr BIT[31 - 20] */
+		*(u32 *)&__fdt_reset_thead_csrr &= BIT(20) - 1;
+		smp_mb();
+
+		/* Write csr BIT[31 - 20] to __fdt_reset_thead_csrr */
+		*(u32 *)&__fdt_reset_thead_csrr |= custom_csr[i].index << 20;
+		smp_mb();
+
+		RISCV_FENCE_I;
+
+		custom_csr[i].value = __fdt_reset_thead_csrr();
+	}
+}
+
+extern void __thead_pre_start_warm(void);
+static int thead_reset_init(void *fdt, int nodeoff,
+				 const struct fdt_match *match)
+{
+	void *p;
+	const fdt64_t *val;
+	const fdt32_t *val_w;
+	int len, i, cnt;
+	u32 t, tmp = 0;
+
+	/* Prepare clone csrs */
+	val_w = fdt_getprop(fdt, nodeoff, "csr-copy", &len);
+	if (len > 0 && val_w) {
+		cnt = len / sizeof(fdt32_t);
+
+		if (cnt > MAX_CUSTOM_CSR)
+			sbi_hart_hang();
+
+		for (i = 0; i < cnt; i++) {
+			custom_csr[i].index = fdt32_to_cpu(val_w[i]);
+		}
+	}
+
+	if (cnt)
+		clone_csrs(cnt);
+
+	/* Delegate plic enable regs for S-mode */
+	val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len);
+	if (len > 0 && val) {
+		p = (void *)(ulong)fdt64_to_cpu(*val);
+		writel(BIT(0), p);
+	}
+
+	/* Old reset method for secondary harts */
+	if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
+		csr_write(0x7c7, (ulong)&__thead_pre_start_warm);
+		csr_write(0x7c6, -1);
+	}
+
+	/* Custom reset method for secondary harts */
+	val = fdt_getprop(fdt, nodeoff, "entry-reg", &len);
+	if (len > 0 && val) {
+		p = (void *)(ulong)fdt64_to_cpu(*val);
+
+		val_w = fdt_getprop(fdt, nodeoff, "entry-cnt", &len);
+		if (len > 0 && val_w) {
+			tmp = fdt32_to_cpu(*val_w);
+
+			for (i = 0; i < tmp; i++) {
+				t = (ulong)&__thead_pre_start_warm;
+				writel(t, p + (8 * i));
+				t = (u64)(ulong)&__thead_pre_start_warm >> 32;
+				writel(t, p + (8 * i) + 4);
+			}
+		}
+
+		val = fdt_getprop(fdt, nodeoff, "control-reg", &len);
+		if (len > 0 && val) {
+			p = (void *)(ulong)fdt64_to_cpu(*val);
+
+			val_w = fdt_getprop(fdt, nodeoff, "control-val", &len);
+			if (len > 0 && val_w) {
+				tmp = fdt32_to_cpu(*val_w);
+				tmp |= readl(p);
+				writel(tmp, p);
+			}
+		}
+	}
+
+	return 0;
+}
+
+int thead_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+void thead_system_reset(u32 type, u32 reason)
+{
+	ebreak();
+}
+
+static const struct fdt_match thead_reset_match[] = {
+	{ .compatible = "thead,reset-sample" },
+	{ },
+};
+
+struct fdt_reset fdt_reset_thead = {
+	.match_table = thead_reset_match,
+	.init = thead_reset_init,
+	.system_reset_check = thead_system_reset_check,
+	.system_reset = thead_system_reset
+};
diff --git a/lib/utils/reset/fdt_reset_thead.h b/lib/utils/reset/fdt_reset_thead.h
new file mode 100644
index 00000000000..d7a686ec931
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_thead.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __FDT_RESET_THEAD_H__
+#define __FDT_RESET_THEAD_H__
+
+#define MAX_CUSTOM_CSR	32
+
+#ifndef __ASSEMBLER__
+struct custom_csr {
+	unsigned long index;
+	unsigned long value;
+};
+
+u64  __fdt_reset_thead_csrr(void);
+
+extern struct custom_csr custom_csr[MAX_CUSTOM_CSR];
+extern u32 __reset_thead_csr_stub[];
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* __FDT_RESET_THEAD_H__ */
diff --git a/lib/utils/reset/fdt_reset_thead_asm.S b/lib/utils/reset/fdt_reset_thead_asm.S
new file mode 100644
index 00000000000..8237951fd82
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_thead_asm.S
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <sbi/riscv_asm.h>
+#include "fdt_reset_thead.h"
+
+/*
+ * csrrs rd, csr, rs1
+ * |31   20|19   15|14   12|11  7|6       0|
+ *    csr     rs1     010     rd   1110011
+ */
+#define CSR_STUB	addi    x0, x0, 0
+
+	.option norvc
+	.align 3
+	.global __fdt_reset_thead_csrr
+__fdt_reset_thead_csrr:
+	csrrs a0, 0, x0
+	ret
+
+	.align 3
+	.global __thead_pre_start_warm
+__thead_pre_start_warm:
+	/*
+	 * Clear L1 cache & BTB & BHT ...
+	 */
+	li	t1, 0x70013
+	csrw	0x7c2, t1
+	fence rw,rw
+
+	lla	t1, custom_csr
+
+	.global __reset_thead_csr_stub
+__reset_thead_csr_stub:
+.rept	MAX_CUSTOM_CSR
+	REG_L	t2, 8(t1)
+	CSR_STUB
+	addi	t1, t1, 16
+.endr
+	/*
+	 * Clear L1 cache & BTB & BHT ...
+	 */
+	li	t1, 0x70013
+	csrw	0x7c2, t1
+	fence rw,rw
+	j _start_warm
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index b447261f81f..b6619f44f38 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -10,3 +10,5 @@
 libsbiutils-objs-y += reset/fdt_reset.o
 libsbiutils-objs-y += reset/fdt_reset_htif.o
 libsbiutils-objs-y += reset/fdt_reset_sifive.o
+libsbiutils-objs-y += reset/fdt_reset_thead.o
+libsbiutils-objs-y += reset/fdt_reset_thead_asm.o

From 0d56293817315073b2b07471d5889a5bdf6550ee Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 22 Apr 2021 17:12:26 +0530
Subject: [PATCH 0757/1765] lib: sbi: Fix sbi_domain_root_add_memregion() for
 merging memregions

We should decrement root_memregs_count by one after merging two
memregions otherwise new memregion added after a merge will be
appended after last sentinel memregion of zero order.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_domain.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 69a3795b1b5..1b2e6e3af43 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -521,6 +521,7 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 					nreg1++;
 				}
 				reg_merged = true;
+				root_memregs_count--;
 			}
 		}
 	} while (reg_merged);

From bf3ef53bb7f59edd2a54b34e080fd4462d938630 Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Tue, 27 Apr 2021 07:00:25 +0000
Subject: [PATCH 0758/1765] firmware: Enable FW_PIC by default

Let's have FW_PIC enabled by default so that OpenSBI firmware
can by default run from any physical address.

Tested with qemu_rv32 & rv64, T-HEAD all hardwares.

Suggested-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Tested-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/objects.mk | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/firmware/objects.mk b/firmware/objects.mk
index c1f632eb15e..ce91c2f826c 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -13,6 +13,10 @@ firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
+ifndef FW_PIC
+FW_PIC := y
+endif
+
 ifeq ($(FW_PIC),y)
 firmware-genflags-y +=	-DFW_PIC
 firmware-asflags-y  +=	-fpic

From 1db843622a0c2e255961bf8bb247c433c44d2a73 Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Tue, 27 Apr 2021 06:47:52 +0000
Subject: [PATCH 0759/1765] platform: Remove platform/thead

We could use platform/generic instead, and won't use
platform/thead/c910 again.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/platform.md        |   3 -
 docs/platform/thead-c910.md      |  34 -------
 platform/thead/c910/config.mk    |  14 ---
 platform/thead/c910/objects.mk   |   5 -
 platform/thead/c910/platform.c   | 156 -------------------------------
 platform/thead/c910/platform.h   |  46 ---------
 scripts/create-binary-archive.sh |   1 -
 7 files changed, 259 deletions(-)
 delete mode 100644 docs/platform/thead-c910.md
 delete mode 100644 platform/thead/c910/config.mk
 delete mode 100644 platform/thead/c910/objects.mk
 delete mode 100644 platform/thead/c910/platform.c
 delete mode 100644 platform/thead/c910/platform.h

diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index 8ee8754f715..cb4bec60f6f 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -28,9 +28,6 @@ OpenSBI currently supports the following virtual and hardware platforms:
 * **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350). More
   details on this platform can be found in the file *[andes-ae350.md]*.
 
-* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor. More
-  details on this platform can be found in the file *[thead-c910.md]*.
-
 * **Spike**: Platform support for the Spike emulator. More
   details on this platform can be found in the file *[spike.md]*.
 
diff --git a/docs/platform/thead-c910.md b/docs/platform/thead-c910.md
deleted file mode 100644
index 786b47d032d..00000000000
--- a/docs/platform/thead-c910.md
+++ /dev/null
@@ -1,34 +0,0 @@
-T-HEAD C910 Processor
-=====================
-C910 is a 12-stage, 3 issues, 8 executions, out-of-order 64-bit RISC-V CPU which
-supports 16 cores, runs with 2.5GHz, and is capable of running Linux.
-
-To build platform specific library and firmwares, provide the
-*PLATFORM=thead/c910* parameter to the top level make command.
-
-Platform Options
-----------------
-
-The *T-HEAD C910* platform does not have any platform-specific options.
-
-Building T-HEAD C910 Platform
------------------------------
-
-```
-make PLATFORM=thead/c910
-```
-
-Booting T-HEAD C910 Platform
-----------------------------
-
-**No Payload**
-
-As there's no payload, you may download vmlinux or u-boot to FW_JUMP_ADDR which
-specified in config.mk or compile commands with GDB. And the execution flow will
-turn to vmlinux or u-boot when opensbi ends.
-
-**Linux Kernel Payload**
-
-You can also choose to use Linux kernel as payload by enabling FW_PAYLOAD=y
-along with specifying FW_PAYLOAD_OFFSET. The kernel image will be embedded in
-the OPENSBI firmware binary, T-head will directly boot into Linux after OpenSBI.
diff --git a/platform/thead/c910/config.mk b/platform/thead/c910/config.mk
deleted file mode 100644
index bd5eab716a5..00000000000
--- a/platform/thead/c910/config.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Blobs to build
-FW_TEXT_START?=0x0
-FW_JUMP=y
-FW_JUMP_ADDR?=0x00200000
diff --git a/platform/thead/c910/objects.mk b/platform/thead/c910/objects.mk
deleted file mode 100644
index d025a3642a9..00000000000
--- a/platform/thead/c910/objects.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-
-platform-objs-y += platform.o
diff --git a/platform/thead/c910/platform.c b/platform/thead/c910/platform.c
deleted file mode 100644
index dfa484ad277..00000000000
--- a/platform/thead/c910/platform.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#include <sbi/riscv_encoding.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_platform.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/uart8250.h>
-#include <sbi_utils/sys/clint.h>
-#include "platform.h"
-
-static struct c910_regs_struct c910_regs;
-
-static struct clint_data clint = {
-	.addr = 0, /* Updated at cold boot time */
-	.first_hartid = 0,
-	.hart_count = C910_HART_COUNT,
-	.has_64bit_mmio = FALSE,
-};
-
-static int c910_early_init(bool cold_boot)
-{
-	if (cold_boot) {
-		/* Load from boot core */
-		c910_regs.pmpaddr0 = csr_read(CSR_PMPADDR0);
-		c910_regs.pmpaddr1 = csr_read(CSR_PMPADDR1);
-		c910_regs.pmpaddr2 = csr_read(CSR_PMPADDR2);
-		c910_regs.pmpaddr3 = csr_read(CSR_PMPADDR3);
-		c910_regs.pmpaddr4 = csr_read(CSR_PMPADDR4);
-		c910_regs.pmpaddr5 = csr_read(CSR_PMPADDR5);
-		c910_regs.pmpaddr6 = csr_read(CSR_PMPADDR6);
-		c910_regs.pmpaddr7 = csr_read(CSR_PMPADDR7);
-		c910_regs.pmpcfg0  = csr_read(CSR_PMPCFG0);
-
-		c910_regs.mcor     = csr_read(CSR_MCOR);
-		c910_regs.mhcr     = csr_read(CSR_MHCR);
-		c910_regs.mccr2    = csr_read(CSR_MCCR2);
-		c910_regs.mhint    = csr_read(CSR_MHINT);
-		c910_regs.mxstatus = csr_read(CSR_MXSTATUS);
-
-		c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
-		c910_regs.clint_base_addr =
-			c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
-	} else {
-		/* Store to other core */
-		csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0);
-		csr_write(CSR_PMPADDR1, c910_regs.pmpaddr1);
-		csr_write(CSR_PMPADDR2, c910_regs.pmpaddr2);
-		csr_write(CSR_PMPADDR3, c910_regs.pmpaddr3);
-		csr_write(CSR_PMPADDR4, c910_regs.pmpaddr4);
-		csr_write(CSR_PMPADDR5, c910_regs.pmpaddr5);
-		csr_write(CSR_PMPADDR6, c910_regs.pmpaddr6);
-		csr_write(CSR_PMPADDR7, c910_regs.pmpaddr7);
-		csr_write(CSR_PMPCFG0, c910_regs.pmpcfg0);
-
-		csr_write(CSR_MCOR, c910_regs.mcor);
-		csr_write(CSR_MHCR, c910_regs.mhcr);
-		csr_write(CSR_MHINT, c910_regs.mhint);
-		csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
-	}
-
-	return 0;
-}
-
-static int c910_final_init(bool cold_boot)
-{
-	return 0;
-}
-
-static int c910_irqchip_init(bool cold_boot)
-{
-	/* Delegate plic enable into S-mode */
-	writel(C910_PLIC_DELEG_ENABLE,
-		(void *)c910_regs.plic_base_addr + C910_PLIC_DELEG_OFFSET);
-
-	return 0;
-}
-
-static int c910_ipi_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		clint.addr = c910_regs.clint_base_addr;
-		rc = clint_cold_ipi_init(&clint);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_ipi_init();
-}
-
-static int c910_timer_init(bool cold_boot)
-{
-	int ret;
-
-	if (cold_boot) {
-		clint.addr = c910_regs.clint_base_addr;
-		ret = clint_cold_timer_init(&clint, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return clint_warm_timer_init();
-}
-
-static int c910_system_reset_check(u32 type, u32 reason)
-{
-	return 1;
-}
-
-static void c910_system_reset(u32 type, u32 reason)
-{
-	asm volatile ("ebreak");
-}
-
-int c910_hart_start(u32 hartid, ulong saddr)
-{
-	csr_write(CSR_MRVBR, saddr);
-	csr_write(CSR_MRMR, csr_read(CSR_MRMR) | (1 << hartid));
-
-	return 0;
-}
-
-const struct sbi_platform_operations platform_ops = {
-	.early_init          = c910_early_init,
-	.final_init          = c910_final_init,
-
-	.irqchip_init        = c910_irqchip_init,
-
-	.ipi_init            = c910_ipi_init,
-	.ipi_send            = clint_ipi_send,
-	.ipi_clear           = clint_ipi_clear,
-
-	.timer_init          = c910_timer_init,
-	.timer_event_start   = clint_timer_event_start,
-
-	.system_reset_check  = c910_system_reset_check,
-	.system_reset        = c910_system_reset,
-
-	.hart_start          = c910_hart_start,
-};
-
-const struct sbi_platform platform = {
-	.opensbi_version     = OPENSBI_VERSION,
-	.platform_version    = SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name                = "T-HEAD Xuantie c910",
-	.features            = SBI_THEAD_FEATURES,
-	.hart_count          = C910_HART_COUNT,
-	.hart_stack_size     = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-	.platform_ops_addr   = (unsigned long)&platform_ops
-};
diff --git a/platform/thead/c910/platform.h b/platform/thead/c910/platform.h
deleted file mode 100644
index 354404ef75b..00000000000
--- a/platform/thead/c910/platform.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#ifndef _C910_PLATFORM_H_
-#define _C910_PLATFORM_H_
-
-#define C910_HART_COUNT   16
-
-#define SBI_THEAD_FEATURES	\
-	 (SBI_PLATFORM_HAS_MFAULTS_DELEGATION | \
-	 SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
-
-#define CSR_MCOR         0x7c2
-#define CSR_MHCR         0x7c1
-#define CSR_MCCR2        0x7c3
-#define CSR_MHINT        0x7c5
-#define CSR_MXSTATUS     0x7c0
-#define CSR_PLIC_BASE    0xfc1
-#define CSR_MRMR         0x7c6
-#define CSR_MRVBR        0x7c7
-
-#define C910_PLIC_CLINT_OFFSET     0x04000000  /* 64M */
-#define C910_PLIC_DELEG_OFFSET     0x001ffffc
-#define C910_PLIC_DELEG_ENABLE     0x1
-
-struct c910_regs_struct {
-	u64 pmpaddr0;
-	u64 pmpaddr1;
-	u64 pmpaddr2;
-	u64 pmpaddr3;
-	u64 pmpaddr4;
-	u64 pmpaddr5;
-	u64 pmpaddr6;
-	u64 pmpaddr7;
-	u64 pmpcfg0;
-	u64 mcor;
-	u64 mhcr;
-	u64 mccr2;
-	u64 mhint;
-	u64 mxstatus;
-	u64 plic_base_addr;
-	u64 clint_base_addr;
-};
-
-#endif /* _C910_PLATFORM_H_ */
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index c19af269837..a8bd335f195 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -106,7 +106,6 @@ build_opensbi() {
 		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
 		BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
 		BUILD_PLATFORM_SUBDIR+=("andes/ae350")
-		BUILD_PLATFORM_SUBDIR+=("thead/c910")
 		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	*)

From 6d1642f85693395e19b9b7087f216a2c02e4c81e Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Tue, 27 Apr 2021 06:47:53 +0000
Subject: [PATCH 0760/1765] docs: generic: Add T-HEAD C9xx series processors

Add description and dts examples for T-HEAD C9xx platforms.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/generic.md    |   2 +
 docs/platform/thead-c9xx.md | 204 ++++++++++++++++++++++++++++++++++++
 2 files changed, 206 insertions(+)
 create mode 100644 docs/platform/thead-c9xx.md

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index f1f7f6424fe..8c3b0dd0760 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -48,7 +48,9 @@ RISC-V Platforms Using Generic Platform
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
 * **Spike** (*[spike.md]*)
 * **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
+* **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*)
 
 [qemu_virt.md]: qemu_virt.md
 [spike.md]: spike.md
 [shakti_cclass.md]: shakti_cclass.md
+[thead-c9xx.md]: thead-c9xx.md
diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
new file mode 100644
index 00000000000..8f1021aa37f
--- /dev/null
+++ b/docs/platform/thead-c9xx.md
@@ -0,0 +1,204 @@
+T-HEAD C9xx Series Processors
+=============================
+
+The **C9xx** series processors are high-performance RISC-V architecture
+multi-core processors with AI vector acceleration engine.
+
+For more details, refer [T-HEAD.CN](https://www.t-head.cn/)
+
+To build the platform-specific library and firmware images, provide the
+*PLATFORM=generic* parameter to the top level `make` command.
+
+Platform Options
+----------------
+
+The *T-HEAD C9xx* does not have any platform-specific compile options
+because it use generic platform.
+
+```
+CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make
+```
+
+The *T-HEAD C9xx* DTB provided to OpenSBI generic firmwares will usually have
+"riscv,clint0", "riscv,plic0", "thead,reset-sample" compatible strings.
+
+DTS Example1: (Single core, eg: Allwinner D1 - c906)
+----------------------------------------------------
+
+```
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcv";
+			mmu-type = "riscv,sv39";
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+
+		reset: reset-sample {
+			compatible = "thead,reset-sample";
+			plic-delegate = <0x0 0x101ffffc>;
+		};
+
+		clint0: clint@14000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				>;
+			reg = <0x0 0x14000000 0x0 0x04000000>;
+			clint,has-no-64bit-mmio;
+		};
+
+		intc: interrupt-controller@10000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc  0xffffffff &cpu0_intc  9
+				>;
+			reg = <0x0 0x10000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <200>;
+		};
+	}
+```
+
+DTS Example2: (Multi cores with soc reset-regs)
+-----------------------------------------------
+
+```
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			mmu-type = "riscv,sv39";
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "fail";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			mmu-type = "riscv,sv39";
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@2 {
+			device_type = "cpu";
+			reg = <2>;
+			status = "fail";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			mmu-type = "riscv,sv39";
+			cpu2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@3 {
+			device_type = "cpu";
+			reg = <3>;
+			status = "fail";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			mmu-type = "riscv,sv39";
+			cpu3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+
+		reset: reset-sample {
+			compatible = "thead,reset-sample";
+			plic-delegate = <0xff 0xd81ffffc>;
+			entry-reg = <0xff 0xff019050>;
+			entry-cnt = <4>;
+			control-reg = <0xff 0xff015004>;
+			control-val = <0x1c>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+		};
+
+		clint0: clint@ffdc000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				&cpu1_intc  3 &cpu1_intc  7
+				&cpu2_intc  3 &cpu2_intc  7
+				&cpu3_intc  3 &cpu3_intc  7
+				&cpu4_intc  3 &cpu4_intc  7
+				>;
+			reg = <0xff 0xdc000000 0x0 0x04000000>;
+			clint,has-no-64bit-mmio;
+		};
+
+		intc: interrupt-controller@ffd8000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc  0xffffffff &cpu0_intc  9
+				&cpu1_intc  0xffffffff &cpu1_intc  9
+				&cpu2_intc  0xffffffff &cpu2_intc  9
+				&cpu3_intc  0xffffffff &cpu3_intc  9
+				>;
+			reg = <0xff 0xd8000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <80>;
+		};
+	}
+```
+
+DTS Example2: (Multi cores with old reset csrs)
+-----------------------------------------------
+```
+	reset: reset-sample {
+		compatible = "thead,reset-sample";
+		plic-delegate = <0xff 0xd81ffffc>;
+		using-csr-reset;
+		csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
+			    0x3b0 0x3b1 0x3b2 0x3b3
+			    0x3b4 0x3b5 0x3b6 0x3b7
+			    0x3a0>;
+	};
+```

From a3689db92a0e83ef25c52887aa686e4527e35a22 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 21 Apr 2021 16:46:15 +0530
Subject: [PATCH 0761/1765] lib: sbi: Remove domains_root_regions() platform
 callback

We now have sbi_domain_root_add_memregion() which allows platform
support to add root domain regions at boot-time so let's remove
the domains_root_regions() platform callback which was added
for this purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_platform.h | 18 ------------------
 lib/sbi/sbi_domain.c       |  6 ------
 2 files changed, 24 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 837a75d1c4f..67361696620 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -92,8 +92,6 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
-	/** Get platform specific root domain memory regions */
-	struct sbi_domain_memregion *(*domains_root_regions)(void);
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
 
@@ -484,22 +482,6 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
-/**
- * Get platform specific root domain memory regions
- *
- * @param plat pointer to struct sbi_platform
- *
- * @return an array of memory regions terminated by a region with order zero
- * or NULL for no memory regions
- */
-static inline struct sbi_domain_memregion *
-sbi_platform_domains_root_regions(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->domains_root_regions)
-		return sbi_platform_ops(plat)->domains_root_regions();
-	return NULL;
-}
-
 /**
  * Initialize (or populate) domains for the platform
  *
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 1b2e6e3af43..84f30b935a5 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -593,7 +593,6 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	u32 i;
-	struct sbi_domain_memregion *memregs;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Root domain firmware memory region */
@@ -611,11 +610,6 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	/* Root domain memory region end */
 	root_memregs[root_memregs_count].order = 0;
 
-	/* Use platform specific root memory regions when available */
-	memregs = sbi_platform_domains_root_regions(plat);
-	if (memregs)
-		root.regions = memregs;
-
 	/* Root domain boot HART id is same as coldboot HART id */
 	root.boot_hartid = cold_hartid;
 

From 068ca086af2312d56efe51a724d78d84e1339ab4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 21 Apr 2021 18:03:50 +0530
Subject: [PATCH 0762/1765] lib: sbi: Simplify console platform operations

Instead of having console_putc() and console_getc() callbacks in
platform operations, it will be much simpler for console driver to
directly register these operations as device to the sbi_console
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_console.h              | 15 +++++++++++++
 include/sbi/sbi_platform.h             | 31 --------------------------
 include/sbi_utils/serial/fdt_serial.h  |  6 -----
 include/sbi_utils/serial/shakti-uart.h |  4 ----
 include/sbi_utils/serial/sifive-uart.h |  4 ----
 include/sbi_utils/serial/uart8250.h    |  4 ----
 include/sbi_utils/sys/htif.h           |  4 +---
 lib/sbi/sbi_console.c                  | 31 +++++++++++++++++++-------
 lib/utils/serial/fdt_serial.c          | 21 -----------------
 lib/utils/serial/fdt_serial_htif.c     | 10 ++++++---
 lib/utils/serial/fdt_serial_shakti.c   |  4 +---
 lib/utils/serial/fdt_serial_sifive.c   |  4 +---
 lib/utils/serial/fdt_serial_uart8250.c |  2 --
 lib/utils/serial/shakti-uart.c         | 12 ++++++++--
 lib/utils/serial/sifive-uart.c         | 12 ++++++++--
 lib/utils/serial/uart8250.c            | 13 +++++++++--
 lib/utils/sys/htif.c                   | 20 ++++++++++++++---
 platform/andes/ae350/platform.c        |  2 --
 platform/fpga/ariane/platform.c        |  2 --
 platform/fpga/openpiton/platform.c     |  2 --
 platform/generic/platform.c            |  2 --
 platform/kendryte/k210/platform.c      |  2 --
 platform/nuclei/ux600/platform.c       |  2 --
 platform/sifive/fu540/platform.c       |  2 --
 platform/template/platform.c           | 19 ----------------
 25 files changed, 96 insertions(+), 134 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 7d648f0b515..e24ba5f6b05 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -12,6 +12,17 @@
 
 #include <sbi/sbi_types.h>
 
+struct sbi_console_device {
+	/** Name of the console device */
+	char name[32];
+
+	/** Write a character to the console output */
+	void (*console_putc)(char ch);
+
+	/** Read a character from the console input */
+	int (*console_getc)(void);
+};
+
 #define __printf(a, b) __attribute__((format(printf, a, b)))
 
 bool sbi_isprintable(char ch);
@@ -32,6 +43,10 @@ int __printf(1, 2) sbi_printf(const char *format, ...);
 
 int __printf(1, 2) sbi_dprintf(const char *format, ...);
 
+const struct sbi_console_device *sbi_console_get_device(void);
+
+void sbi_console_set_device(const struct sbi_console_device *dev);
+
 struct sbi_scratch;
 
 int sbi_console_init(struct sbi_scratch *scratch);
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 67361696620..0d18ef2aa2a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -95,10 +95,6 @@ struct sbi_platform_operations {
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
 
-	/** Write a character to the platform console output */
-	void (*console_putc)(char ch);
-	/** Read a character from the platform console input */
-	int (*console_getc)(void);
 	/** Initialize the platform console */
 	int (*console_init)(void);
 
@@ -496,33 +492,6 @@ static inline int sbi_platform_domains_init(const struct sbi_platform *plat)
 	return 0;
 }
 
-/**
- * Write a character to the platform console output
- *
- * @param plat pointer to struct sbi_platform
- * @param ch character to write
- */
-static inline void sbi_platform_console_putc(const struct sbi_platform *plat,
-						char ch)
-{
-	if (plat && sbi_platform_ops(plat)->console_putc)
-		sbi_platform_ops(plat)->console_putc(ch);
-}
-
-/**
- * Read a character from the platform console input
- *
- * @param plat pointer to struct sbi_platform
- *
- * @return character read from console input
- */
-static inline int sbi_platform_console_getc(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->console_getc)
-		return sbi_platform_ops(plat)->console_getc();
-	return -1;
-}
-
 /**
  * Initialize the platform console
  *
diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
index 08f97996fb3..6451c23ec2d 100644
--- a/include/sbi_utils/serial/fdt_serial.h
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -15,14 +15,8 @@
 struct fdt_serial {
 	const struct fdt_match *match_table;
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
-	void (*putc)(char ch);
-	int (*getc)(void);
 };
 
-void fdt_serial_putc(char ch);
-
-int fdt_serial_getc(void);
-
 int fdt_serial_init(void);
 
 #endif
diff --git a/include/sbi_utils/serial/shakti-uart.h b/include/sbi_utils/serial/shakti-uart.h
index 08043be110a..bcb019e6425 100644
--- a/include/sbi_utils/serial/shakti-uart.h
+++ b/include/sbi_utils/serial/shakti-uart.h
@@ -9,10 +9,6 @@
 
 #include <sbi/sbi_types.h>
 
-void shakti_uart_putc(char ch);
-
-int shakti_uart_getc(void);
-
 int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
 
 #endif
diff --git a/include/sbi_utils/serial/sifive-uart.h b/include/sbi_utils/serial/sifive-uart.h
index f3233921f4d..9c465ec17e8 100644
--- a/include/sbi_utils/serial/sifive-uart.h
+++ b/include/sbi_utils/serial/sifive-uart.h
@@ -12,10 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-void sifive_uart_putc(char ch);
-
-int sifive_uart_getc(void);
-
 int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
 
 #endif
diff --git a/include/sbi_utils/serial/uart8250.h b/include/sbi_utils/serial/uart8250.h
index 0a1b5d368b4..6b9b48b0e75 100644
--- a/include/sbi_utils/serial/uart8250.h
+++ b/include/sbi_utils/serial/uart8250.h
@@ -12,10 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-void uart8250_putc(char ch);
-
-int uart8250_getc(void);
-
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 		  u32 reg_width);
 
diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
index a43172348be..8073a447a44 100644
--- a/include/sbi_utils/sys/htif.h
+++ b/include/sbi_utils/sys/htif.h
@@ -10,9 +10,7 @@
 
 #include <sbi/sbi_types.h>
 
-void htif_putc(char ch);
-
-int htif_getc(void);
+int htif_serial_init(void);
 
 int htif_system_reset_check(u32 type, u32 reason);
 
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 7189b9bf230..b54f7a252fe 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -12,7 +12,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 
-static const struct sbi_platform *console_plat = NULL;
+static const struct sbi_console_device *console_dev = NULL;
 static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
 
 bool sbi_isprintable(char c)
@@ -26,14 +26,18 @@ bool sbi_isprintable(char c)
 
 int sbi_getc(void)
 {
-	return sbi_platform_console_getc(console_plat);
+	if (console_dev && console_dev->console_getc)
+		return console_dev->console_getc();
+	return -1;
 }
 
 void sbi_putc(char ch)
 {
-	if (ch == '\n')
-		sbi_platform_console_putc(console_plat, '\r');
-	sbi_platform_console_putc(console_plat, ch);
+	if (console_dev && console_dev->console_putc) {
+		if (ch == '\n')
+			console_dev->console_putc('\r');
+		console_dev->console_putc(ch);
+	}
 }
 
 void sbi_puts(const char *str)
@@ -390,9 +394,20 @@ int sbi_dprintf(const char *format, ...)
 	return retval;
 }
 
-int sbi_console_init(struct sbi_scratch *scratch)
+const struct sbi_console_device *sbi_console_get_device(void)
+{
+	return console_dev;
+}
+
+void sbi_console_set_device(const struct sbi_console_device *dev)
 {
-	console_plat = sbi_platform_ptr(scratch);
+	if (!dev || console_dev)
+		return;
 
-	return sbi_platform_console_init(console_plat);
+	console_dev = dev;
+}
+
+int sbi_console_init(struct sbi_scratch *scratch)
+{
+	return sbi_platform_console_init(sbi_platform_ptr(scratch));
 }
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index b9ce67ef1df..43c55e83697 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -24,34 +24,13 @@ static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_shakti,
 };
 
-static void dummy_putc(char ch)
-{
-}
-
-static int dummy_getc(void)
-{
-	return -1;
-}
-
 static struct fdt_serial dummy = {
 	.match_table = NULL,
 	.init = NULL,
-	.putc = dummy_putc,
-	.getc = dummy_getc,
 };
 
 static struct fdt_serial *current_driver = &dummy;
 
-void fdt_serial_putc(char ch)
-{
-	current_driver->putc(ch);
-}
-
-int fdt_serial_getc(void)
-{
-	return current_driver->getc();
-}
-
 int fdt_serial_init(void)
 {
 	const void *prop;
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
index 32d695317e6..fae55b8add3 100644
--- a/lib/utils/serial/fdt_serial_htif.c
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -16,9 +16,13 @@ static const struct fdt_match serial_htif_match[] = {
 	{ },
 };
 
+static int serial_htif_init(void *fdt, int nodeoff,
+			    const struct fdt_match *match)
+{
+	return htif_serial_init();
+}
+
 struct fdt_serial fdt_serial_htif = {
 	.match_table = serial_htif_match,
-	.init = NULL,
-	.getc = htif_getc,
-	.putc = htif_putc
+	.init = serial_htif_init
 };
diff --git a/lib/utils/serial/fdt_serial_shakti.c b/lib/utils/serial/fdt_serial_shakti.c
index c6385a577f8..4f91419ef53 100644
--- a/lib/utils/serial/fdt_serial_shakti.c
+++ b/lib/utils/serial/fdt_serial_shakti.c
@@ -29,7 +29,5 @@ static const struct fdt_match serial_shakti_match[] = {
 
 struct fdt_serial fdt_serial_shakti = {
 	.match_table = serial_shakti_match,
-	.init = serial_shakti_init,
-	.getc = shakti_uart_getc,
-	.putc = shakti_uart_putc
+	.init = serial_shakti_init
 };
diff --git a/lib/utils/serial/fdt_serial_sifive.c b/lib/utils/serial/fdt_serial_sifive.c
index 9e487a2b5ab..f4c833c1573 100644
--- a/lib/utils/serial/fdt_serial_sifive.c
+++ b/lib/utils/serial/fdt_serial_sifive.c
@@ -32,7 +32,5 @@ static const struct fdt_match serial_sifive_match[] = {
 
 struct fdt_serial fdt_serial_sifive = {
 	.match_table = serial_sifive_match,
-	.init = serial_sifive_init,
-	.getc = sifive_uart_getc,
-	.putc = sifive_uart_putc
+	.init = serial_sifive_init
 };
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 5030b823a62..918193ae9d8 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -34,6 +34,4 @@ static const struct fdt_match serial_uart8250_match[] = {
 struct fdt_serial fdt_serial_uart8250 = {
 	.match_table = serial_uart8250_match,
 	.init = serial_uart8250_init,
-	.getc = uart8250_getc,
-	.putc = uart8250_putc
 };
diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
index 7c1148ee15f..e77a9858678 100644
--- a/lib/utils/serial/shakti-uart.c
+++ b/lib/utils/serial/shakti-uart.c
@@ -23,14 +23,14 @@
 
 static volatile void *uart_base;
 
-void shakti_uart_putc(char ch)
+static void shakti_uart_putc(char ch)
 {
 	while((readw(uart_base + REG_STATUS) & UART_TX_FULL))
 		;
 	writeb(ch, uart_base + REG_TX);
 }
 
-int shakti_uart_getc(void)
+static int shakti_uart_getc(void)
 {
 	u16 status = readw(uart_base + REG_STATUS);
 	if (status & UART_RX_FULL)
@@ -38,11 +38,19 @@ int shakti_uart_getc(void)
 	return -1;
 }
 
+static struct sbi_console_device shakti_console = {
+	.name = "shakti_uart",
+	.console_putc = shakti_uart_putc,
+	.console_getc = shakti_uart_getc
+};
+
 int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
 	uart_base = (volatile void *)base;
 	u16 baud = (u16)(in_freq/(16 * baudrate));
 	writew(baud, uart_base + REG_BAUD);
 
+	sbi_console_set_device(&shakti_console);
+
 	return 0;
 }
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 72c8a62497f..57d80fa4cfb 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -66,7 +66,7 @@ static void set_reg(u32 num, u32 val)
 	writel(val, uart_base + (num * 0x4));
 }
 
-void sifive_uart_putc(char ch)
+static void sifive_uart_putc(char ch)
 {
 	while (get_reg(UART_REG_TXFIFO) & UART_TXFIFO_FULL)
 		;
@@ -74,7 +74,7 @@ void sifive_uart_putc(char ch)
 	set_reg(UART_REG_TXFIFO, ch);
 }
 
-int sifive_uart_getc(void)
+static int sifive_uart_getc(void)
 {
 	u32 ret = get_reg(UART_REG_RXFIFO);
 	if (!(ret & UART_RXFIFO_EMPTY))
@@ -82,6 +82,12 @@ int sifive_uart_getc(void)
 	return -1;
 }
 
+static struct sbi_console_device sifive_console = {
+	.name = "sifive_uart",
+	.console_putc = sifive_uart_putc,
+	.console_getc = sifive_uart_getc
+};
+
 int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
 	uart_base     = (volatile void *)base;
@@ -98,5 +104,7 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 	/* Enable Rx */
 	set_reg(UART_REG_RXCTRL, UART_RXCTRL_RXEN);
 
+	sbi_console_set_device(&sifive_console);
+
 	return 0;
 }
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 9635ba8632c..1cf6624d83d 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -8,6 +8,7 @@
  */
 
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
 #include <sbi_utils/serial/uart8250.h>
 
 /* clang-format off */
@@ -68,7 +69,7 @@ static void set_reg(u32 num, u32 val)
 		writel(val, uart8250_base + offset);
 }
 
-void uart8250_putc(char ch)
+static void uart8250_putc(char ch)
 {
 	while ((get_reg(UART_LSR_OFFSET) & UART_LSR_THRE) == 0)
 		;
@@ -76,13 +77,19 @@ void uart8250_putc(char ch)
 	set_reg(UART_THR_OFFSET, ch);
 }
 
-int uart8250_getc(void)
+static int uart8250_getc(void)
 {
 	if (get_reg(UART_LSR_OFFSET) & UART_LSR_DR)
 		return get_reg(UART_RBR_OFFSET);
 	return -1;
 }
 
+static struct sbi_console_device uart8250_console = {
+	.name = "uart8250",
+	.console_putc = uart8250_putc,
+	.console_getc = uart8250_getc
+};
+
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 		  u32 reg_width)
 {
@@ -121,5 +128,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 	/* Set scratchpad */
 	set_reg(UART_SCR_OFFSET, 0x00);
 
+	sbi_console_set_device(&uart8250_console);
+
 	return 0;
 }
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index fd70fb98199..2fd38a7c616 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -6,6 +6,7 @@
  */
 
 #include <sbi/riscv_locks.h>
+#include <sbi/sbi_console.h>
 #include <sbi_utils/sys/htif.h>
 
 #define HTIF_DATA_BITS		48
@@ -98,7 +99,7 @@ static void do_tohost_fromhost(uint64_t dev, uint64_t cmd, uint64_t data)
 	spin_unlock(&htif_lock);
 }
 
-void htif_putc(char ch)
+static void htif_putc(char ch)
 {
 	/* HTIF devices are not supported on RV32, so do a proxy write call */
 	volatile uint64_t magic_mem[8];
@@ -109,7 +110,7 @@ void htif_putc(char ch)
 	do_tohost_fromhost(HTIF_DEV_SYSTEM, 0, (uint64_t)(uintptr_t)magic_mem);
 }
 #else
-void htif_putc(char ch)
+static void htif_putc(char ch)
 {
 	spin_lock(&htif_lock);
 	__set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch);
@@ -117,7 +118,7 @@ void htif_putc(char ch)
 }
 #endif
 
-int htif_getc(void)
+static int htif_getc(void)
 {
 	int ch;
 
@@ -140,6 +141,19 @@ int htif_getc(void)
 	return ch - 1;
 }
 
+static struct sbi_console_device htif_console = {
+	.name = "htif",
+	.console_putc = htif_putc,
+	.console_getc = htif_getc
+};
+
+int htif_serial_init(void)
+{
+	sbi_console_set_device(&htif_console);
+
+	return 0;
+}
+
 int htif_system_reset_check(u32 type, u32 reason)
 {
 	return 1;
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index aec91cdff40..338159dd9f1 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -164,8 +164,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init = ae350_final_init,
 
 	.console_init = ae350_console_init,
-	.console_putc = uart8250_putc,
-	.console_getc = uart8250_getc,
 
 	.irqchip_init = ae350_irqchip_init,
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index ea179e52d31..4f32c42549a 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -154,8 +154,6 @@ const struct sbi_platform_operations platform_ops = {
 	.early_init = ariane_early_init,
 	.final_init = ariane_final_init,
 	.console_init = ariane_console_init,
-	.console_putc = uart8250_putc,
-	.console_getc = uart8250_getc,
 	.irqchip_init = ariane_irqchip_init,
 	.ipi_init = ariane_ipi_init,
 	.ipi_send = clint_ipi_send,
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 5eae47799e6..77403c90c96 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -180,8 +180,6 @@ const struct sbi_platform_operations platform_ops = {
 	.early_init = openpiton_early_init,
 	.final_init = openpiton_final_init,
 	.console_init = openpiton_console_init,
-	.console_putc = uart8250_putc,
-	.console_getc = uart8250_getc,
 	.irqchip_init = openpiton_irqchip_init,
 	.ipi_init = openpiton_ipi_init,
 	.ipi_send = clint_ipi_send,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 8c1e06f1244..445cbcfcbc9 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -210,8 +210,6 @@ const struct sbi_platform_operations platform_ops = {
 	.early_exit		= generic_early_exit,
 	.final_exit		= generic_final_exit,
 	.domains_init		= generic_domains_init,
-	.console_putc		= fdt_serial_putc,
-	.console_getc		= fdt_serial_getc,
 	.console_init		= fdt_serial_init,
 	.irqchip_init		= fdt_irqchip_init,
 	.irqchip_exit		= fdt_irqchip_exit,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 0c50af52289..495d214b353 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -149,8 +149,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init	= k210_final_init,
 
 	.console_init	= k210_console_init,
-	.console_putc	= sifive_uart_putc,
-	.console_getc	= sifive_uart_getc,
 
 	.irqchip_init = k210_irqchip_init,
 
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index d0a45a2ef8b..4f4f88428e7 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -202,8 +202,6 @@ static void ux600_system_reset(u32 type, u32 reason)
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= ux600_early_init,
 	.final_init		= ux600_final_init,
-	.console_putc		= sifive_uart_putc,
-	.console_getc		= sifive_uart_getc,
 	.console_init		= ux600_console_init,
 	.irqchip_init		= ux600_irqchip_init,
 	.ipi_send		= clint_ipi_send,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index cdd829363d0..82f6f752d24 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -156,8 +156,6 @@ static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
 
 const struct sbi_platform_operations platform_ops = {
 	.final_init		= fu540_final_init,
-	.console_putc		= sifive_uart_putc,
-	.console_getc		= sifive_uart_getc,
 	.console_init		= fu540_console_init,
 	.irqchip_init		= fu540_irqchip_init,
 	.ipi_send		= clint_ipi_send,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 5bdb186c178..fbbac3092a8 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -63,23 +63,6 @@ static int platform_console_init(void)
 			     PLATFORM_UART_BAUDRATE, 0, 1);
 }
 
-/*
- * Write a character to the platform console output.
- */
-static void platform_console_putc(char ch)
-{
-	/* Example if the generic UART8250 driver is used */
-	uart8250_putc(ch);
-}
-
-/*
- * Read a character from the platform console input.
- */
-static int platform_console_getc(void)
-{
-	return uart8250_getc();
-}
-
 /*
  * Initialize the platform interrupt controller for current HART.
  */
@@ -198,8 +181,6 @@ static void platform_system_reset(u32 type, u32 reason)
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= platform_early_init,
 	.final_init		= platform_final_init,
-	.console_putc		= platform_console_putc,
-	.console_getc		= platform_console_getc,
 	.console_init		= platform_console_init,
 	.irqchip_init		= platform_irqchip_init,
 	.ipi_send		= platform_ipi_send,

From 559a8f1d3be3210d4903c0db54c2d36e2f8d6ad4 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 21 Apr 2021 22:04:17 +0530
Subject: [PATCH 0763/1765] lib: sbi: Simplify timer platform operations

Instead of having timer_value(), timer_event_start(), and
timer_event_stop() callbacks in platform operations, it will
be much simpler for timer driver to directly register these
operations as device to the sbi_timer implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_platform.h          | 58 ++---------------------------
 include/sbi/sbi_timer.h             | 21 +++++++++++
 include/sbi_utils/sys/clint.h       |  6 ---
 include/sbi_utils/timer/fdt_timer.h |  9 -----
 lib/sbi/sbi_platform.c              |  3 --
 lib/sbi/sbi_timer.c                 | 55 +++++++++++++++++----------
 lib/utils/sys/clint.c               | 22 +++++++++--
 lib/utils/timer/fdt_timer.c         | 31 ---------------
 lib/utils/timer/fdt_timer_clint.c   |  3 --
 platform/andes/ae350/platform.c     |  3 --
 platform/andes/ae350/plmt.c         | 16 ++++++--
 platform/andes/ae350/plmt.h         |  6 ---
 platform/fpga/ariane/platform.c     |  3 --
 platform/fpga/openpiton/platform.c  |  3 --
 platform/generic/platform.c         |  3 --
 platform/kendryte/k210/platform.c   |  5 +--
 platform/nuclei/ux600/platform.c    |  3 --
 platform/sifive/fu540/platform.c    |  3 --
 platform/template/platform.c        | 30 ---------------
 19 files changed, 92 insertions(+), 191 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 0d18ef2aa2a..a2084c1a4a0 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -51,14 +51,12 @@ struct sbi_trap_regs;
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
-	/** Platform has timer value */
-	SBI_PLATFORM_HAS_TIMER_VALUE = (1 << 0),
 	/** Platform has HART hotplug support */
-	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 1),
+	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 0),
 	/** Platform has fault delegation support */
-	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 2),
+	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 1),
 	/** Platform has custom secondary hart booting support */
-	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 3),
+	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 2),
 
 	/** Last index of Platform features*/
 	SBI_PLATFORM_HAS_LAST_FEATURE = SBI_PLATFORM_HAS_HART_SECONDARY_BOOT,
@@ -66,7 +64,7 @@ enum sbi_platform_features {
 
 /** Default feature set for a platform */
 #define SBI_PLATFORM_DEFAULT_FEATURES                                \
-	(SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+	(SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
 /** Platform functions */
 struct sbi_platform_operations {
@@ -115,12 +113,6 @@ struct sbi_platform_operations {
 	/** Get tlb flush limit value **/
 	u64 (*get_tlbr_flush_limit)(void);
 
-	/** Get platform timer value */
-	u64 (*timer_value)(void);
-	/** Start platform timer event for current HART */
-	void (*timer_event_start)(u64 next_event);
-	/** Stop platform timer event for current HART */
-	void (*timer_event_stop)(void);
 	/** Initialize platform timer for current HART */
 	int (*timer_init)(bool cold_boot);
 	/** Exit platform timer for current HART */
@@ -210,9 +202,6 @@ struct sbi_platform {
 #define sbi_platform_ops(__p) \
 	((const struct sbi_platform_operations *)(__p)->platform_ops_addr)
 
-/** Check whether the platform supports timer value */
-#define sbi_platform_has_timer_value(__p) \
-	((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
 /** Check whether the platform supports HART hotplug */
 #define sbi_platform_has_hart_hotplug(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
@@ -586,45 +575,6 @@ static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
 		sbi_platform_ops(plat)->ipi_exit();
 }
 
-/**
- * Get platform timer value
- *
- * @param plat pointer to struct sbi_platform
- *
- * @return 64-bit timer value
- */
-static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->timer_value)
-		return sbi_platform_ops(plat)->timer_value();
-	return 0;
-}
-
-/**
- * Start platform timer event for current HART
- *
- * @param plat pointer to struct struct sbi_platform
- * @param next_event timer value when timer event will happen
- */
-static inline void
-sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event)
-{
-	if (plat && sbi_platform_ops(plat)->timer_event_start)
-		sbi_platform_ops(plat)->timer_event_start(next_event);
-}
-
-/**
- * Stop platform timer event for current HART
- *
- * @param plat pointer to struct sbi_platform
- */
-static inline void
-sbi_platform_timer_event_stop(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->timer_event_stop)
-		sbi_platform_ops(plat)->timer_event_stop();
-}
-
 /**
  * Initialize the platform timer for current HART
  *
diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 87bbdbfa086..1ba6da05e30 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -12,6 +12,21 @@
 
 #include <sbi/sbi_types.h>
 
+/** Timer hardware device */
+struct sbi_timer_device {
+	/** Name of the timer operations */
+	char name[32];
+
+	/** Get free-running timer value */
+	u64 (*timer_value)(void);
+
+	/** Start timer event for current HART */
+	void (*timer_event_start)(u64 next_event);
+
+	/** Stop timer event for current HART */
+	void (*timer_event_stop)(void);
+};
+
 struct sbi_scratch;
 
 /** Get timer value for current HART */
@@ -35,6 +50,12 @@ void sbi_timer_event_start(u64 next_event);
 /** Process timer event for current HART */
 void sbi_timer_process(void);
 
+/** Get current timer device */
+const struct sbi_timer_device *sbi_timer_get_device(void);
+
+/** Register timer device */
+void sbi_timer_set_device(const struct sbi_timer_device *dev);
+
 /* Initialize timer */
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot);
 
diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
index b07cf62ef0e..e102196e899 100644
--- a/include/sbi_utils/sys/clint.h
+++ b/include/sbi_utils/sys/clint.h
@@ -37,12 +37,6 @@ int clint_warm_ipi_init(void);
 
 int clint_cold_ipi_init(struct clint_data *clint);
 
-u64 clint_timer_value(void);
-
-void clint_timer_event_stop(void);
-
-void clint_timer_event_start(u64 next_event);
-
 int clint_warm_timer_init(void);
 
 int clint_cold_timer_init(struct clint_data *clint,
diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
index 770a0f3c537..36202a41528 100644
--- a/include/sbi_utils/timer/fdt_timer.h
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -17,17 +17,8 @@ struct fdt_timer {
 	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
 	int (*warm_init)(void);
 	void (*exit)(void);
-	u64 (*value)(void);
-	void (*event_stop)(void);
-	void (*event_start)(u64 next_event);
 };
 
-u64 fdt_timer_value(void);
-
-void fdt_timer_event_stop(void);
-
-void fdt_timer_event_start(u64 next_event);
-
 void fdt_timer_exit(void);
 
 int fdt_timer_init(bool cold_boot);
diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index 568d9566130..e78119ae953 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -19,9 +19,6 @@ static inline char *sbi_platform_feature_id2string(unsigned long feature)
 		return NULL;
 
 	switch (feature) {
-	case SBI_PLATFORM_HAS_TIMER_VALUE:
-		fstr = "timer";
-		break;
 	case SBI_PLATFORM_HAS_HART_HOTPLUG:
 		fstr = "hotplug";
 		break;
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index b571b174036..63e8ea98ead 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -16,10 +16,11 @@
 #include <sbi/sbi_timer.h>
 
 static unsigned long time_delta_off;
-static u64 (*get_time_val)(const struct sbi_platform *plat);
+static u64 (*get_time_val)(void);
+static const struct sbi_timer_device *timer_dev = NULL;
 
 #if __riscv_xlen == 32
-static u64 get_ticks(const struct sbi_platform *plat)
+static u64 get_ticks(void)
 {
 	u32 lo, hi, tmp;
 	__asm__ __volatile__("1:\n"
@@ -31,7 +32,7 @@ static u64 get_ticks(const struct sbi_platform *plat)
 	return ((u64)hi << 32) | lo;
 }
 #else
-static u64 get_ticks(const struct sbi_platform *plat)
+static u64 get_ticks(void)
 {
 	unsigned long n;
 
@@ -40,9 +41,16 @@ static u64 get_ticks(const struct sbi_platform *plat)
 }
 #endif
 
+static u64 get_platform_ticks(void)
+{
+	return timer_dev->timer_value();
+}
+
 u64 sbi_timer_value(void)
 {
-	return get_time_val(sbi_platform_thishart_ptr());
+	if (get_time_val)
+		return get_time_val();
+	return 0;
 }
 
 u64 sbi_timer_virt_value(void)
@@ -80,7 +88,8 @@ void sbi_timer_set_delta_upper(ulong delta_upper)
 
 void sbi_timer_event_start(u64 next_event)
 {
-	sbi_platform_timer_event_start(sbi_platform_thishart_ptr(), next_event);
+	if (timer_dev && timer_dev->timer_event_start)
+		timer_dev->timer_event_start(next_event);
 	csr_clear(CSR_MIP, MIP_STIP);
 	csr_set(CSR_MIE, MIP_MTIP);
 }
@@ -91,17 +100,34 @@ void sbi_timer_process(void)
 	csr_set(CSR_MIP, MIP_STIP);
 }
 
+const struct sbi_timer_device *sbi_timer_get_device(void)
+{
+	return timer_dev;
+}
+
+void sbi_timer_set_device(const struct sbi_timer_device *dev)
+{
+	if (!dev || timer_dev)
+		return;
+
+	timer_dev = dev;
+	if (!get_time_val && timer_dev->timer_value)
+		get_time_val = get_platform_ticks;
+}
+
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	u64 *time_delta;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-	int ret;
 
 	if (cold_boot) {
 		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta),
 							  "TIME_DELTA");
 		if (!time_delta_off)
 			return SBI_ENOMEM;
+
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_TIME))
+			get_time_val = get_ticks;
 	} else {
 		if (!time_delta_off)
 			return SBI_ENOMEM;
@@ -110,24 +136,13 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
 	*time_delta = 0;
 
-	ret = sbi_platform_timer_init(plat, cold_boot);
-	if (ret)
-		return ret;
-
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_TIME))
-		get_time_val = get_ticks;
-	else if (sbi_platform_has_timer_value(plat))
-		get_time_val = sbi_platform_timer_value;
-	else
-		/* There is no method to provide timer value */
-		return SBI_ENODEV;
-
-	return 0;
+	return sbi_platform_timer_init(plat, cold_boot);
 }
 
 void sbi_timer_exit(struct sbi_scratch *scratch)
 {
-	sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
+	if (timer_dev && timer_dev->timer_event_stop)
+		timer_dev->timer_event_stop();
 
 	csr_clear(CSR_MIP, MIP_STIP);
 	csr_clear(CSR_MIE, MIP_MTIP);
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 80e04fbd62e..4b1963af137 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_timer.h>
 #include <sbi_utils/sys/clint.h>
 
 #define CLINT_IPI_OFF		0
@@ -118,7 +119,7 @@ static void clint_time_wr32(u64 value, volatile u64 *addr)
 	writel_relaxed(value >> 32, (void *)(addr) + 0x04);
 }
 
-u64 clint_timer_value(void)
+static u64 clint_timer_value(void)
 {
 	struct clint_data *clint = clint_timer_hartid2data[current_hartid()];
 
@@ -126,7 +127,7 @@ u64 clint_timer_value(void)
 	return clint->time_rd(clint->time_val) + clint->time_delta;
 }
 
-void clint_timer_event_stop(void)
+static void clint_timer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
 	struct clint_data *clint = clint_timer_hartid2data[target_hart];
@@ -136,7 +137,7 @@ void clint_timer_event_stop(void)
 			&clint->time_cmp[target_hart - clint->first_hartid]);
 }
 
-void clint_timer_event_start(u64 next_event)
+static void clint_timer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
 	struct clint_data *clint = clint_timer_hartid2data[target_hart];
@@ -146,6 +147,13 @@ void clint_timer_event_start(u64 next_event)
 		       &clint->time_cmp[target_hart - clint->first_hartid]);
 }
 
+static struct sbi_timer_device clint_timer = {
+	.name = "clint",
+	.timer_value = clint_timer_value,
+	.timer_event_start = clint_timer_event_start,
+	.timer_event_stop = clint_timer_event_stop
+};
+
 int clint_warm_timer_init(void)
 {
 	u64 v1, v2, mv;
@@ -224,5 +232,11 @@ int clint_cold_timer_init(struct clint_data *clint,
 	sbi_domain_memregion_init(clint->addr + CLINT_TIME_CMP_OFF,
 				  CLINT_TIME_CMP_SIZE,
 				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-	return sbi_domain_root_add_memregion(&reg);
+	rc = sbi_domain_root_add_memregion(&reg);
+	if (rc)
+		return rc;
+
+	sbi_timer_set_device(&clint_timer);
+
+	return 0;
 }
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index d1d0e0ce17b..92198cd5a5d 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -17,46 +17,15 @@ static struct fdt_timer *timer_drivers[] = {
 	&fdt_timer_clint
 };
 
-static u64 dummy_value(void)
-{
-	return 0;
-}
-
-static void dummy_event_stop(void)
-{
-}
-
-static void dummy_event_start(u64 next_event)
-{
-}
-
 static struct fdt_timer dummy = {
 	.match_table = NULL,
 	.cold_init = NULL,
 	.warm_init = NULL,
 	.exit = NULL,
-	.value = dummy_value,
-	.event_stop = dummy_event_stop,
-	.event_start = dummy_event_start
 };
 
 static struct fdt_timer *current_driver = &dummy;
 
-u64 fdt_timer_value(void)
-{
-	return current_driver->value();
-}
-
-void fdt_timer_event_stop(void)
-{
-	current_driver->event_stop();
-}
-
-void fdt_timer_event_start(u64 next_event)
-{
-	current_driver->event_start(next_event);
-}
-
 void fdt_timer_exit(void)
 {
 	if (current_driver->exit)
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index 6ba6c7b2805..0352e535b5f 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -47,7 +47,4 @@ struct fdt_timer fdt_timer_clint = {
 	.cold_init = timer_clint_cold_init,
 	.warm_init = clint_warm_timer_init,
 	.exit = NULL,
-	.value = clint_timer_value,
-	.event_stop = clint_timer_event_stop,
-	.event_start = clint_timer_event_start,
 };
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 338159dd9f1..17a4e48bad2 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -172,9 +172,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_clear    = plicsw_ipi_clear,
 
 	.timer_init	   = ae350_timer_init,
-	.timer_value	   = plmt_timer_value,
-	.timer_event_start = plmt_timer_event_start,
-	.timer_event_stop  = plmt_timer_event_stop,
 
 	.vendor_ext_provider = ae350_vendor_ext_provider
 };
diff --git a/platform/andes/ae350/plmt.c b/platform/andes/ae350/plmt.c
index 3848e158dd5..54dcb94927b 100644
--- a/platform/andes/ae350/plmt.c
+++ b/platform/andes/ae350/plmt.c
@@ -10,13 +10,14 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_timer.h>
 
 static u32 plmt_time_hart_count;
 static volatile void *plmt_time_base;
 static volatile u64 *plmt_time_val;
 static volatile u64 *plmt_time_cmp;
 
-u64 plmt_timer_value(void)
+static u64 plmt_timer_value(void)
 {
 #if __riscv_xlen == 64
 	return readq_relaxed(plmt_time_val);
@@ -32,7 +33,7 @@ u64 plmt_timer_value(void)
 #endif
 }
 
-void plmt_timer_event_stop(void)
+static void plmt_timer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
 
@@ -48,7 +49,7 @@ void plmt_timer_event_stop(void)
 #endif
 }
 
-void plmt_timer_event_start(u64 next_event)
+static void plmt_timer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
 
@@ -68,6 +69,13 @@ void plmt_timer_event_start(u64 next_event)
 
 }
 
+static struct sbi_timer_device plmt_timer = {
+	.name = "ae350_plmt",
+	.timer_value = plmt_timer_value,
+	.timer_event_start = plmt_timer_event_start,
+	.timer_event_stop = plmt_timer_event_stop
+};
+
 int plmt_warm_timer_init(void)
 {
 	u32 target_hart = current_hartid();
@@ -93,5 +101,7 @@ int plmt_cold_timer_init(unsigned long base, u32 hart_count)
 	plmt_time_val        = (u64 *)(plmt_time_base);
 	plmt_time_cmp        = (u64 *)(plmt_time_base + 0x8);
 
+	sbi_timer_set_device(&plmt_timer);
+
 	return 0;
 }
diff --git a/platform/andes/ae350/plmt.h b/platform/andes/ae350/plmt.h
index 129fcf8d146..db093e03020 100644
--- a/platform/andes/ae350/plmt.h
+++ b/platform/andes/ae350/plmt.h
@@ -10,12 +10,6 @@
 #ifndef _AE350_PLMT_H_
 #define _AE350_PLMT_H_
 
-u64 plmt_timer_value(void);
-
-void plmt_timer_event_stop(void);
-
-void plmt_timer_event_start(u64 next_event);
-
 int plmt_warm_timer_init(void);
 
 int plmt_cold_timer_init(unsigned long base, u32 hart_count);
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 4f32c42549a..73c8b9c046e 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -159,9 +159,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send = clint_ipi_send,
 	.ipi_clear = clint_ipi_clear,
 	.timer_init = ariane_timer_init,
-	.timer_value = clint_timer_value,
-	.timer_event_start = clint_timer_event_start,
-	.timer_event_stop = clint_timer_event_stop,
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 77403c90c96..4d876c92004 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -185,9 +185,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send = clint_ipi_send,
 	.ipi_clear = clint_ipi_clear,
 	.timer_init = openpiton_timer_init,
-	.timer_value = clint_timer_value,
-	.timer_event_start = clint_timer_event_start,
-	.timer_event_stop = clint_timer_event_stop,
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 445cbcfcbc9..cf18a1bcdce 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -218,9 +218,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_init		= fdt_ipi_init,
 	.ipi_exit		= fdt_ipi_exit,
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
-	.timer_value		= fdt_timer_value,
-	.timer_event_stop	= fdt_timer_event_stop,
-	.timer_event_start	= fdt_timer_event_start,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,
 	.system_reset_check	= generic_system_reset_check,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 495d214b353..c8fd45ece33 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -160,16 +160,13 @@ const struct sbi_platform_operations platform_ops = {
 	.system_reset		= k210_system_reset,
 
 	.timer_init	   = k210_timer_init,
-	.timer_value	   = clint_timer_value,
-	.timer_event_stop  = clint_timer_event_stop,
-	.timer_event_start = clint_timer_event_start,
 };
 
 const struct sbi_platform platform = {
 	.opensbi_version	= OPENSBI_VERSION,
 	.platform_version   	= SBI_PLATFORM_VERSION(0x0, 0x01),
 	.name			= "Kendryte K210",
-	.features		= SBI_PLATFORM_HAS_TIMER_VALUE,
+	.features		= 0,
 	.hart_count		= K210_HART_COUNT,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr	= (unsigned long)&platform_ops
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 4f4f88428e7..86130c86ea4 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -207,9 +207,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send		= clint_ipi_send,
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= ux600_ipi_init,
-	.timer_value		= clint_timer_value,
-	.timer_event_stop	= clint_timer_event_stop,
-	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= ux600_timer_init,
 	.system_reset_check	= ux600_system_reset_check,
 	.system_reset		= ux600_system_reset
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 82f6f752d24..78de30d29ba 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -162,9 +162,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= fu540_ipi_init,
 	.get_tlbr_flush_limit	= fu540_get_tlbr_flush_limit,
-	.timer_value		= clint_timer_value,
-	.timer_event_stop	= clint_timer_event_stop,
-	.timer_event_start	= clint_timer_event_start,
 	.timer_init		= fu540_timer_init,
 };
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index fbbac3092a8..16916529a3f 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -133,33 +133,6 @@ static int platform_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-/*
- * Get platform timer value.
- */
-static u64 platform_timer_value(void)
-{
-	/* Example if the generic CLINT driver is used */
-	return clint_timer_value();
-}
-
-/*
- * Start platform timer event for current HART.
- */
-static void platform_timer_event_start(u64 next_event)
-{
-	/* Example if the generic CLINT driver is used */
-	clint_timer_event_start(next_event);
-}
-
-/*
- * Stop platform timer event for current HART.
- */
-static void platform_timer_event_stop(void)
-{
-	/* Example if the generic CLINT driver is used */
-	clint_timer_event_stop();
-}
-
 /*
  * Check reset type and reason supported by the platform.
  */
@@ -186,9 +159,6 @@ const struct sbi_platform_operations platform_ops = {
 	.ipi_send		= platform_ipi_send,
 	.ipi_clear		= platform_ipi_clear,
 	.ipi_init		= platform_ipi_init,
-	.timer_value		= platform_timer_value,
-	.timer_event_stop	= platform_timer_event_stop,
-	.timer_event_start	= platform_timer_event_start,
 	.timer_init		= platform_timer_init,
 	.system_reset_check	= platform_system_reset_check,
 	.system_reset		= platform_system_reset

From dc39c7b630a607b96c25f8ea50f0bb1af619928a Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 22 Apr 2021 10:27:15 +0530
Subject: [PATCH 0764/1765] lib: sbi: Simplify ipi platform operations

Instead of having ipi_send() and ipi_clear() callbacks in
platform operations, it will be much simpler for ipi driver
to directly register these operations as a device to sbi_ipi
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_ipi.h              | 18 +++++++++++++++++
 include/sbi/sbi_platform.h         | 30 ----------------------------
 include/sbi_utils/ipi/fdt_ipi.h    |  6 ------
 include/sbi_utils/sys/clint.h      |  4 ----
 lib/sbi/sbi_hsm.c                  |  2 +-
 lib/sbi/sbi_init.c                 |  4 +---
 lib/sbi/sbi_ipi.c                  | 32 ++++++++++++++++++++++++------
 lib/utils/ipi/fdt_ipi.c            | 20 -------------------
 lib/utils/ipi/fdt_ipi_clint.c      |  2 --
 lib/utils/sys/clint.c              | 20 ++++++++++++++++---
 platform/andes/ae350/platform.c    | 11 ++++++++--
 platform/fpga/ariane/platform.c    |  2 --
 platform/fpga/openpiton/platform.c |  2 --
 platform/generic/platform.c        |  2 --
 platform/kendryte/k210/platform.c  |  2 --
 platform/nuclei/ux600/platform.c   |  2 --
 platform/sifive/fu540/platform.c   |  2 --
 platform/template/platform.c       | 20 -------------------
 18 files changed, 72 insertions(+), 109 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 617872c1bf6..fb7d658b666 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -18,6 +18,18 @@
 
 /* clang-format on */
 
+/** IPI hardware device */
+struct sbi_ipi_device {
+	/** Name of the IPI device */
+	char name[32];
+
+	/** Send IPI to a target HART */
+	void (*ipi_send)(u32 target_hart);
+
+	/** Clear IPI for a target HART */
+	void (*ipi_clear)(u32 target_hart);
+};
+
 struct sbi_scratch;
 
 /** IPI event operations or callbacks */
@@ -63,6 +75,12 @@ int sbi_ipi_send_halt(ulong hmask, ulong hbase);
 
 void sbi_ipi_process(void);
 
+void sbi_ipi_raw_send(u32 target_hart);
+
+const struct sbi_ipi_device *sbi_ipi_get_device(void);
+
+void sbi_ipi_set_device(const struct sbi_ipi_device *dev);
+
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
 
 void sbi_ipi_exit(struct sbi_scratch *scratch);
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index a2084c1a4a0..2756d73d453 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -101,10 +101,6 @@ struct sbi_platform_operations {
 	/** Exit the platform interrupt controller for current HART */
 	void (*irqchip_exit)(void);
 
-	/** Send IPI to a target HART */
-	void (*ipi_send)(u32 target_hart);
-	/** Clear IPI for a target HART */
-	void (*ipi_clear)(u32 target_hart);
 	/** Initialize IPI for current HART */
 	int (*ipi_init)(bool cold_boot);
 	/** Exit IPI for current HART */
@@ -522,32 +518,6 @@ static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
 		sbi_platform_ops(plat)->irqchip_exit();
 }
 
-/**
- * Send IPI to a target HART
- *
- * @param plat pointer to struct sbi_platform
- * @param target_hart HART ID of IPI target
- */
-static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
-					 u32 target_hart)
-{
-	if (plat && sbi_platform_ops(plat)->ipi_send)
-		sbi_platform_ops(plat)->ipi_send(target_hart);
-}
-
-/**
- * Clear IPI for a target HART
- *
- * @param plat pointer to struct sbi_platform
- * @param target_hart HART ID of IPI target
- */
-static inline void sbi_platform_ipi_clear(const struct sbi_platform *plat,
-					  u32 target_hart)
-{
-	if (plat && sbi_platform_ops(plat)->ipi_clear)
-		sbi_platform_ops(plat)->ipi_clear(target_hart);
-}
-
 /**
  * Initialize the platform IPI support for current HART
  *
diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
index e817141ac92..93373532870 100644
--- a/include/sbi_utils/ipi/fdt_ipi.h
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -17,14 +17,8 @@ struct fdt_ipi {
 	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
 	int (*warm_init)(void);
 	void (*exit)(void);
-	void (*send)(u32 target_hart);
-	void (*clear)(u32 target_hart);
 };
 
-void fdt_ipi_send(u32 target_hart);
-
-void fdt_ipi_clear(u32 target_hart);
-
 void fdt_ipi_exit(void);
 
 int fdt_ipi_init(bool cold_boot);
diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
index e102196e899..1e2b40b622f 100644
--- a/include/sbi_utils/sys/clint.h
+++ b/include/sbi_utils/sys/clint.h
@@ -29,10 +29,6 @@ struct clint_data {
 	void (*time_wr)(u64 value, volatile u64 *addr);
 };
 
-void clint_ipi_send(u32 target_hart);
-
-void clint_ipi_clear(u32 target_hart);
-
 int clint_warm_ipi_init(void);
 
 int clint_cold_ipi_init(struct clint_data *clint);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index bbc4ce954e7..64d299bb73c 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -238,7 +238,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		return sbi_platform_hart_start(plat, hartid,
 					       scratch->warmboot_addr);
 	} else {
-		sbi_platform_ipi_send(plat, hartid);
+		sbi_ipi_raw_send(hartid);
 	}
 
 	return 0;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 4de2dfa7c99..7380d014932 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -178,8 +178,6 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-
 	/* Mark coldboot done */
 	__smp_store_release(&coldboot_done, 1);
 
@@ -190,7 +188,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&
 		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
-			sbi_platform_ipi_send(plat, i);
+			sbi_ipi_raw_send(i);
 	}
 
 	/* Release coldboot lock */
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index b50735e4099..bfaf4e9766e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -25,7 +25,7 @@ struct sbi_ipi_data {
 };
 
 static unsigned long ipi_data_off;
-
+static const struct sbi_ipi_device *ipi_dev = NULL;
 static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];
 
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
@@ -33,7 +33,6 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 {
 	int ret;
 	struct sbi_scratch *remote_scratch = NULL;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data;
 	const struct sbi_ipi_event_ops *ipi_ops;
 
@@ -61,7 +60,9 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	 */
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
 	smp_wmb();
-	sbi_platform_ipi_send(plat, remote_hartid);
+
+	if (ipi_dev && ipi_dev->ipi_send)
+		ipi_dev->ipi_send(remote_hartid);
 
 	if (ipi_ops->sync)
 		ipi_ops->sync(scratch);
@@ -178,12 +179,12 @@ void sbi_ipi_process(void)
 	unsigned int ipi_event;
 	const struct sbi_ipi_event_ops *ipi_ops;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
-
 	u32 hartid = current_hartid();
-	sbi_platform_ipi_clear(plat, hartid);
+
+	if (ipi_dev && ipi_dev->ipi_clear)
+		ipi_dev->ipi_clear(hartid);
 
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
 	ipi_event = 0;
@@ -201,6 +202,25 @@ void sbi_ipi_process(void)
 	};
 }
 
+void sbi_ipi_raw_send(u32 target_hart)
+{
+	if (ipi_dev && ipi_dev->ipi_send)
+		ipi_dev->ipi_send(target_hart);
+}
+
+const struct sbi_ipi_device *sbi_ipi_get_device(void)
+{
+	return ipi_dev;
+}
+
+void sbi_ipi_set_device(const struct sbi_ipi_device *dev)
+{
+	if (!dev || ipi_dev)
+		return;
+
+	ipi_dev = dev;
+}
+
 int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int ret;
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 6562469da91..efca37e61a2 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -17,35 +17,15 @@ static struct fdt_ipi *ipi_drivers[] = {
 	&fdt_ipi_clint
 };
 
-static void dummy_send(u32 target_hart)
-{
-}
-
-static void dummy_clear(u32 target_hart)
-{
-}
-
 static struct fdt_ipi dummy = {
 	.match_table = NULL,
 	.cold_init = NULL,
 	.warm_init = NULL,
 	.exit = NULL,
-	.send = dummy_send,
-	.clear = dummy_clear
 };
 
 static struct fdt_ipi *current_driver = &dummy;
 
-void fdt_ipi_send(u32 target_hart)
-{
-	current_driver->send(target_hart);
-}
-
-void fdt_ipi_clear(u32 target_hart)
-{
-	current_driver->clear(target_hart);
-}
-
 void fdt_ipi_exit(void)
 {
 	if (current_driver->exit)
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index e799fd7e200..529f978380d 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -45,6 +45,4 @@ struct fdt_ipi fdt_ipi_clint = {
 	.cold_init = ipi_clint_cold_init,
 	.warm_init = clint_warm_ipi_init,
 	.exit = NULL,
-	.send = clint_ipi_send,
-	.clear = clint_ipi_clear,
 };
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
index 4b1963af137..e8c2bd9e797 100644
--- a/lib/utils/sys/clint.c
+++ b/lib/utils/sys/clint.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_ipi.h>
 #include <sbi/sbi_timer.h>
 #include <sbi_utils/sys/clint.h>
 
@@ -27,7 +28,7 @@
 
 static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS];
 
-void clint_ipi_send(u32 target_hart)
+static void clint_ipi_send(u32 target_hart)
 {
 	struct clint_data *clint;
 
@@ -41,7 +42,7 @@ void clint_ipi_send(u32 target_hart)
 	writel(1, &clint->ipi[target_hart - clint->first_hartid]);
 }
 
-void clint_ipi_clear(u32 target_hart)
+static void clint_ipi_clear(u32 target_hart)
 {
 	struct clint_data *clint;
 
@@ -55,6 +56,12 @@ void clint_ipi_clear(u32 target_hart)
 	writel(0, &clint->ipi[target_hart - clint->first_hartid]);
 }
 
+static struct sbi_ipi_device clint_ipi = {
+	.name = "clint",
+	.ipi_send = clint_ipi_send,
+	.ipi_clear = clint_ipi_clear
+};
+
 int clint_warm_ipi_init(void)
 {
 	/* Clear CLINT IPI for current HART */
@@ -66,6 +73,7 @@ int clint_warm_ipi_init(void)
 int clint_cold_ipi_init(struct clint_data *clint)
 {
 	u32 i;
+	int rc;
 	struct sbi_domain_memregion reg;
 
 	if (!clint)
@@ -82,7 +90,13 @@ int clint_cold_ipi_init(struct clint_data *clint)
 	sbi_domain_memregion_init(clint->addr + CLINT_IPI_OFF,
 				  CLINT_IPI_SIZE,
 				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-	return sbi_domain_root_add_memregion(&reg);
+	rc = sbi_domain_root_add_memregion(&reg);
+	if (rc)
+		return rc;
+
+	sbi_ipi_set_device(&clint_ipi);
+
+	return 0;
 }
 
 static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS];
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 17a4e48bad2..ae4ef71718b 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_trap.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
@@ -85,6 +86,12 @@ static int ae350_irqchip_init(bool cold_boot)
 	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
 }
 
+static struct sbi_ipi_device plicsw_ipi = {
+	.name = "ae350_plicsw",
+	.ipi_send = plicsw_ipi_send,
+	.ipi_clear = plicsw_ipi_clear
+};
+
 /* Initialize IPI for current HART. */
 static int ae350_ipi_init(bool cold_boot)
 {
@@ -95,6 +102,8 @@ static int ae350_ipi_init(bool cold_boot)
 					   AE350_HART_COUNT);
 		if (ret)
 			return ret;
+
+		sbi_ipi_set_device(&plicsw_ipi);
 	}
 
 	return plicsw_warm_ipi_init();
@@ -168,8 +177,6 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_init = ae350_irqchip_init,
 
 	.ipi_init     = ae350_ipi_init,
-	.ipi_send     = plicsw_ipi_send,
-	.ipi_clear    = plicsw_ipi_clear,
 
 	.timer_init	   = ae350_timer_init,
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 73c8b9c046e..42e43fab55d 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -156,8 +156,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init = ariane_console_init,
 	.irqchip_init = ariane_irqchip_init,
 	.ipi_init = ariane_ipi_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_clear = clint_ipi_clear,
 	.timer_init = ariane_timer_init,
 };
 
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 4d876c92004..894bfdc2fa4 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -182,8 +182,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init = openpiton_console_init,
 	.irqchip_init = openpiton_irqchip_init,
 	.ipi_init = openpiton_ipi_init,
-	.ipi_send = clint_ipi_send,
-	.ipi_clear = clint_ipi_clear,
 	.timer_init = openpiton_timer_init,
 };
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index cf18a1bcdce..4ae8b88f4f6 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -213,8 +213,6 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= fdt_serial_init,
 	.irqchip_init		= fdt_irqchip_init,
 	.irqchip_exit		= fdt_irqchip_exit,
-	.ipi_send		= fdt_ipi_send,
-	.ipi_clear		= fdt_ipi_clear,
 	.ipi_init		= fdt_ipi_init,
 	.ipi_exit		= fdt_ipi_exit,
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index c8fd45ece33..4b89939220d 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -153,8 +153,6 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_init = k210_irqchip_init,
 
 	.ipi_init  = k210_ipi_init,
-	.ipi_send  = clint_ipi_send,
-	.ipi_clear = clint_ipi_clear,
 
 	.system_reset_check	= k210_system_reset_check,
 	.system_reset		= k210_system_reset,
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 86130c86ea4..ac81d035e7d 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -204,8 +204,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init		= ux600_final_init,
 	.console_init		= ux600_console_init,
 	.irqchip_init		= ux600_irqchip_init,
-	.ipi_send		= clint_ipi_send,
-	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= ux600_ipi_init,
 	.timer_init		= ux600_timer_init,
 	.system_reset_check	= ux600_system_reset_check,
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
index 78de30d29ba..a17034db3b1 100644
--- a/platform/sifive/fu540/platform.c
+++ b/platform/sifive/fu540/platform.c
@@ -158,8 +158,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init		= fu540_final_init,
 	.console_init		= fu540_console_init,
 	.irqchip_init		= fu540_irqchip_init,
-	.ipi_send		= clint_ipi_send,
-	.ipi_clear		= clint_ipi_clear,
 	.ipi_init		= fu540_ipi_init,
 	.get_tlbr_flush_limit	= fu540_get_tlbr_flush_limit,
 	.timer_init		= fu540_timer_init,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 16916529a3f..04334b24ac3 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -98,24 +98,6 @@ static int platform_ipi_init(bool cold_boot)
 	return clint_warm_ipi_init();
 }
 
-/*
- * Send IPI to a target HART
- */
-static void platform_ipi_send(u32 target_hart)
-{
-	/* Example if the generic CLINT driver is used */
-	clint_ipi_send(target_hart);
-}
-
-/*
- * Clear IPI for a target HART.
- */
-static void platform_ipi_clear(u32 target_hart)
-{
-	/* Example if the generic CLINT driver is used */
-	clint_ipi_clear(target_hart);
-}
-
 /*
  * Initialize platform timer for current HART.
  */
@@ -156,8 +138,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init		= platform_final_init,
 	.console_init		= platform_console_init,
 	.irqchip_init		= platform_irqchip_init,
-	.ipi_send		= platform_ipi_send,
-	.ipi_clear		= platform_ipi_clear,
 	.ipi_init		= platform_ipi_init,
 	.timer_init		= platform_timer_init,
 	.system_reset_check	= platform_system_reset_check,

From 043d088e3964ec64b091f739e2282f53f7d264fb Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 22 Apr 2021 11:53:32 +0530
Subject: [PATCH 0765/1765] lib: sbi: Simplify system reset platform operations

Instead of having system_reset_check() and system_reset() callbacks
in platform operations, it will be much simpler for reset driver to
directly register these operations as a device to the sbi_system
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_platform.h                   | 40 ---------------
 include/sbi/sbi_system.h                     | 16 ++++++
 include/sbi_utils/reset/fdt_reset.h          |  6 ---
 include/sbi_utils/sys/htif.h                 |  4 +-
 include/sbi_utils/sys/sifive_test.h          |  4 --
 lib/sbi/sbi_system.c                         | 25 ++++++++--
 lib/utils/reset/fdt_reset.c                  | 14 ------
 lib/utils/reset/fdt_reset_htif.c             |  9 +++-
 lib/utils/reset/fdt_reset_sifive.c           |  2 -
 lib/utils/reset/fdt_reset_thead.c            | 34 ++++++++-----
 lib/utils/sys/htif.c                         | 18 ++++++-
 lib/utils/sys/sifive_test.c                  | 12 ++++-
 platform/generic/include/platform_override.h |  4 --
 platform/generic/platform.c                  | 22 ---------
 platform/kendryte/k210/platform.c            | 52 +++++++++++++-------
 platform/nuclei/ux600/platform.c             | 38 ++++++++------
 platform/template/platform.c                 | 19 +------
 17 files changed, 148 insertions(+), 171 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 2756d73d453..921d39c4bc7 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -127,11 +127,6 @@ struct sbi_platform_operations {
 	 */
 	int (*hart_suspend)(u32 suspend_type, ulong raddr);
 
-	/* Check whether reset type and reason supported by the platform */
-	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
-	/** Reset the platform */
-	void (*system_reset)(u32 reset_type, u32 reset_reason);
-
 	/** platform specific SBI extension implementation probe function */
 	int (*vendor_ext_check)(long extid);
 	/** platform specific SBI extension implementation provider */
@@ -572,41 +567,6 @@ static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
 		sbi_platform_ops(plat)->timer_exit();
 }
 
-/**
- * Check whether reset type and reason supported by the platform
- *
- * @param plat pointer to struct sbi_platform
- * @param reset_type type of reset
- * @param reset_reason reason for reset
- *
- * @return 0 if reset type and reason not supported and 1 if supported
- */
-static inline int sbi_platform_system_reset_check(
-					    const struct sbi_platform *plat,
-					    u32 reset_type, u32 reset_reason)
-{
-	if (plat && sbi_platform_ops(plat)->system_reset_check)
-		return sbi_platform_ops(plat)->system_reset_check(reset_type,
-								  reset_reason);
-	return 0;
-}
-
-/**
- * Reset the platform
- *
- * This function will not return for supported reset type and reset reason
- *
- * @param plat pointer to struct sbi_platform
- * @param reset_type type of reset
- * @param reset_reason reason for reset
- */
-static inline void sbi_platform_system_reset(const struct sbi_platform *plat,
-					     u32 reset_type, u32 reset_reason)
-{
-	if (plat && sbi_platform_ops(plat)->system_reset)
-		sbi_platform_ops(plat)->system_reset(reset_type, reset_reason);
-}
-
 /**
  * Check if a vendor extension is implemented or not.
  *
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 34ba7669ad6..a9fa5466bca 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -12,6 +12,22 @@
 
 #include <sbi/sbi_types.h>
 
+/** System reset hardware device */
+struct sbi_system_reset_device {
+	/** Name of the system reset device */
+	char name[32];
+
+	/* Check whether reset type and reason supported by the device */
+	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
+
+	/** Reset the system */
+	void (*system_reset)(u32 reset_type, u32 reset_reason);
+};
+
+const struct sbi_system_reset_device *sbi_system_reset_get_device(void);
+
+void sbi_system_reset_set_device(const struct sbi_system_reset_device *dev);
+
 bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason);
 
 void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason);
diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index cce441a84d9..6d586974487 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -15,14 +15,8 @@
 struct fdt_reset {
 	const struct fdt_match *match_table;
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
-	int (*system_reset_check)(u32 reset_type, u32 reset_reason);
-	void (*system_reset)(u32 reset_type, u32 reset_reason);
 };
 
-int fdt_system_reset_check(u32 reset_type, u32 reset_reason);
-
-void fdt_system_reset(u32 reset_type, u32 reset_reason);
-
 int fdt_reset_init(void);
 
 #endif
diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
index 8073a447a44..9cc963452b5 100644
--- a/include/sbi_utils/sys/htif.h
+++ b/include/sbi_utils/sys/htif.h
@@ -12,8 +12,6 @@
 
 int htif_serial_init(void);
 
-int htif_system_reset_check(u32 type, u32 reason);
-
-void htif_system_reset(u32 type, u32 reason);
+int htif_system_reset_init(void);
 
 #endif
diff --git a/include/sbi_utils/sys/sifive_test.h b/include/sbi_utils/sys/sifive_test.h
index 958622e6aa3..0a09499d519 100644
--- a/include/sbi_utils/sys/sifive_test.h
+++ b/include/sbi_utils/sys/sifive_test.h
@@ -12,10 +12,6 @@
 
 #include <sbi/sbi_types.h>
 
-int sifive_test_system_reset_check(u32 type, u32 reason);
-
-void sifive_test_system_reset(u32 type, u32 reason);
-
 int sifive_test_init(unsigned long base);
 
 #endif
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 10915b4446f..479060b9d28 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -18,10 +18,25 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
+static const struct sbi_system_reset_device *reset_dev = NULL;
+
+const struct sbi_system_reset_device *sbi_system_reset_get_device(void)
+{
+	return reset_dev;
+}
+
+void sbi_system_reset_set_device(const struct sbi_system_reset_device *dev)
+{
+	if (!dev || reset_dev)
+		return;
+
+	reset_dev = dev;
+}
+
 bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason)
 {
-	if (sbi_platform_system_reset_check(sbi_platform_thishart_ptr(),
-					    reset_type, reset_reason))
+	if (reset_dev && reset_dev->system_reset_check &&
+	    reset_dev->system_reset_check(reset_type, reset_reason))
 		return TRUE;
 
 	return FALSE;
@@ -47,9 +62,9 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 	sbi_hsm_hart_stop(scratch, FALSE);
 
 	/* Platform specific reset if domain allowed system reset */
-	if (dom->system_reset_allowed)
-		sbi_platform_system_reset(sbi_platform_ptr(scratch),
-					  reset_type, reset_reason);
+	if (dom->system_reset_allowed &&
+	    reset_dev && reset_dev->system_reset)
+		reset_dev->system_reset(reset_type, reset_reason);
 
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 82532c2b37e..b01b0d116bf 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -23,20 +23,6 @@ static struct fdt_reset *reset_drivers[] = {
 
 static struct fdt_reset *current_driver = NULL;
 
-int fdt_system_reset_check(u32 reset_type, u32 reset_reason)
-{
-	if (current_driver && current_driver->system_reset_check)
-		return current_driver->system_reset_check(reset_type,
-							  reset_reason);
-	return 0;
-}
-
-void fdt_system_reset(u32 reset_type, u32 reset_reason)
-{
-	if (current_driver && current_driver->system_reset)
-		current_driver->system_reset(reset_type, reset_reason);
-}
-
 int fdt_reset_init(void)
 {
 	int pos, noff, rc;
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
index 587e7d65e6a..dd086605f9d 100644
--- a/lib/utils/reset/fdt_reset_htif.c
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -11,6 +11,12 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/sys/htif.h>
 
+static int htif_reset_init(void *fdt, int nodeoff,
+			   const struct fdt_match *match)
+{
+	return htif_system_reset_init();
+}
+
 static const struct fdt_match htif_reset_match[] = {
 	{ .compatible = "ucb,htif0" },
 	{ },
@@ -18,6 +24,5 @@ static const struct fdt_match htif_reset_match[] = {
 
 struct fdt_reset fdt_reset_htif = {
 	.match_table = htif_reset_match,
-	.system_reset_check = htif_system_reset_check,
-	.system_reset = htif_system_reset
+	.init = htif_reset_init
 };
diff --git a/lib/utils/reset/fdt_reset_sifive.c b/lib/utils/reset/fdt_reset_sifive.c
index 38b520c4881..928dee94dc7 100644
--- a/lib/utils/reset/fdt_reset_sifive.c
+++ b/lib/utils/reset/fdt_reset_sifive.c
@@ -33,6 +33,4 @@ static const struct fdt_match sifive_test_reset_match[] = {
 struct fdt_reset fdt_reset_sifive = {
 	.match_table = sifive_test_reset_match,
 	.init = sifive_test_reset_init,
-	.system_reset_check = sifive_test_system_reset_check,
-	.system_reset = sifive_test_system_reset
 };
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
index ea81fc9eb73..95f8c369ce1 100644
--- a/lib/utils/reset/fdt_reset_thead.c
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -7,8 +7,10 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
+
 #include "fdt_reset_thead.h"
 
 struct custom_csr custom_csr[MAX_CUSTOM_CSR];
@@ -37,6 +39,22 @@ static void clone_csrs(int cnt)
 	}
 }
 
+static int thead_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void thead_system_reset(u32 type, u32 reason)
+{
+	ebreak();
+}
+
+static struct sbi_system_reset_device thead_reset = {
+	.name = "thead_reset",
+	.system_reset_check = thead_system_reset_check,
+	.system_reset = thead_system_reset
+};
+
 extern void __thead_pre_start_warm(void);
 static int thead_reset_init(void *fdt, int nodeoff,
 				 const struct fdt_match *match)
@@ -106,17 +124,9 @@ static int thead_reset_init(void *fdt, int nodeoff,
 		}
 	}
 
-	return 0;
-}
-
-int thead_system_reset_check(u32 type, u32 reason)
-{
-	return 1;
-}
+	sbi_system_reset_set_device(&thead_reset);
 
-void thead_system_reset(u32 type, u32 reason)
-{
-	ebreak();
+	return 0;
 }
 
 static const struct fdt_match thead_reset_match[] = {
@@ -126,7 +136,5 @@ static const struct fdt_match thead_reset_match[] = {
 
 struct fdt_reset fdt_reset_thead = {
 	.match_table = thead_reset_match,
-	.init = thead_reset_init,
-	.system_reset_check = thead_system_reset_check,
-	.system_reset = thead_system_reset
+	.init = thead_reset_init
 };
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index 2fd38a7c616..330a9a6997b 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -7,6 +7,7 @@
 
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/sys/htif.h>
 
 #define HTIF_DATA_BITS		48
@@ -154,15 +155,28 @@ int htif_serial_init(void)
 	return 0;
 }
 
-int htif_system_reset_check(u32 type, u32 reason)
+static int htif_system_reset_check(u32 type, u32 reason)
 {
 	return 1;
 }
 
-void htif_system_reset(u32 type, u32 reason)
+static void htif_system_reset(u32 type, u32 reason)
 {
 	while (1) {
 		fromhost = 0;
 		tohost = 1;
 	}
 }
+
+static struct sbi_system_reset_device htif_reset = {
+	.name = "htif",
+	.system_reset_check = htif_system_reset_check,
+	.system_reset = htif_system_reset
+};
+
+int htif_system_reset_init(void)
+{
+	sbi_system_reset_set_device(&htif_reset);
+
+	return 0;
+}
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
index fdf31690c13..45339543305 100644
--- a/lib/utils/sys/sifive_test.c
+++ b/lib/utils/sys/sifive_test.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/sys/sifive_test.h>
 
 #define FINISHER_FAIL		0x3333
@@ -17,7 +18,7 @@
 
 static void *sifive_test_base;
 
-int sifive_test_system_reset_check(u32 type, u32 reason)
+static int sifive_test_system_reset_check(u32 type, u32 reason)
 {
 	switch (type) {
 	case SBI_SRST_RESET_TYPE_SHUTDOWN:
@@ -29,7 +30,7 @@ int sifive_test_system_reset_check(u32 type, u32 reason)
 	return 0;
 }
 
-void sifive_test_system_reset(u32 type, u32 reason)
+static void sifive_test_system_reset(u32 type, u32 reason)
 {
 	/*
 	 * Tell the "finisher" that the simulation
@@ -49,9 +50,16 @@ void sifive_test_system_reset(u32 type, u32 reason)
 	}
 }
 
+static struct sbi_system_reset_device sifive_test_reset = {
+	.name = "sifive_test",
+	.system_reset_check = sifive_test_system_reset_check,
+	.system_reset = sifive_test_system_reset
+};
+
 int sifive_test_init(unsigned long base)
 {
 	sifive_test_base = (void *)base;
+	sbi_system_reset_set_device(&sifive_test_reset);
 
 	return 0;
 }
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 77a90d645eb..4af87544f6e 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -20,10 +20,6 @@ struct platform_override {
 	int (*final_init)(bool cold_boot, const struct fdt_match *match);
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
-	int (*system_reset_check)(u32 reset_type, u32 reset_reason,
-				  const struct fdt_match *match);
-	void (*system_reset)(u32 reset_type, u32 reset_reason,
-			     const struct fdt_match *match);
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
 };
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 4ae8b88f4f6..da0c1af8f92 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -184,26 +184,6 @@ static u64 generic_tlbr_flush_limit(void)
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
-static int generic_system_reset_check(u32 reset_type, u32 reset_reason)
-{
-	if (generic_plat && generic_plat->system_reset_check)
-		return generic_plat->system_reset_check(reset_type,
-							reset_reason,
-							generic_plat_match);
-	return fdt_system_reset_check(reset_type, reset_reason);
-}
-
-static void generic_system_reset(u32 reset_type, u32 reset_reason)
-{
-	if (generic_plat && generic_plat->system_reset) {
-		generic_plat->system_reset(reset_type, reset_reason,
-					   generic_plat_match);
-		return;
-	}
-
-	fdt_system_reset(reset_type, reset_reason);
-}
-
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= generic_early_init,
 	.final_init		= generic_final_init,
@@ -218,8 +198,6 @@ const struct sbi_platform_operations platform_ops = {
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,
-	.system_reset_check	= generic_system_reset_check,
-	.system_reset		= generic_system_reset,
 };
 
 struct sbi_platform platform = {
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 4b89939220d..66a0392aa99 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
@@ -68,6 +69,36 @@ static u32 k210_get_clk_freq(void)
 	return pll0_freq / div;
 }
 
+static int k210_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void k210_system_reset(u32 type, u32 reason)
+{
+	u32 val;
+
+	val = k210_read_sysreg(K210_RESET);
+	val |= K210_RESET_MASK;
+	k210_write_sysreg(val, K210_RESET);
+
+	while (1);
+}
+
+static struct sbi_system_reset_device k210_reset = {
+	.name = "kendryte_k210_reset",
+	.system_reset_check = k210_system_reset_check,
+	.system_reset = k210_system_reset
+};
+
+static int k210_early_init(bool cold_boot)
+{
+	if (cold_boot)
+		sbi_system_reset_set_device(&k210_reset);
+
+	return 0;
+}
+
 static int k210_final_init(bool cold_boot)
 {
 	void *fdt;
@@ -129,23 +160,9 @@ static int k210_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int k210_system_reset_check(u32 type, u32 reason)
-{
-	return 1;
-}
-
-static void k210_system_reset(u32 type, u32 reason)
-{
-	u32 val;
-
-	val = k210_read_sysreg(K210_RESET);
-	val |= K210_RESET_MASK;
-	k210_write_sysreg(val, K210_RESET);
-
-	while (1);
-}
-
 const struct sbi_platform_operations platform_ops = {
+	.early_init	= k210_early_init,
+
 	.final_init	= k210_final_init,
 
 	.console_init	= k210_console_init,
@@ -154,9 +171,6 @@ const struct sbi_platform_operations platform_ops = {
 
 	.ipi_init  = k210_ipi_init,
 
-	.system_reset_check	= k210_system_reset_check,
-	.system_reset		= k210_system_reset,
-
 	.timer_init	   = k210_timer_init,
 };
 
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index ac81d035e7d..5414316ca0a 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
@@ -104,10 +105,32 @@ static u32 ux600_get_clk_freq(void)
 	return cpu_freq;
 }
 
+static int ux600_system_reset_check(u32 type, u32 reason)
+{
+	return 1;
+}
+
+static void ux600_system_reset(u32 type, u32 reason)
+{
+	/* Reset system using MSFTRST register in Nuclei Timer. */
+	writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR
+					+ UX600_NUCLEI_TIMER_MSFTRST_OFS));
+	while(1);
+}
+
+static struct sbi_system_reset_device ux600_reset = {
+	.name = "nuclei_ux600_reset",
+	.system_reset_check = ux600_system_reset_check,
+	.system_reset = ux600_system_reset
+};
+
 static int ux600_early_init(bool cold_boot)
 {
 	u32 regval;
 
+	if (cold_boot)
+		sbi_system_reset_set_device(&ux600_reset);
+
 	/* Measure CPU Frequency using Timer */
 	ux600_clk_freq = ux600_get_clk_freq();
 
@@ -186,19 +209,6 @@ static int ux600_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-static int ux600_system_reset_check(u32 type, u32 reason)
-{
-	return 1;
-}
-
-static void ux600_system_reset(u32 type, u32 reason)
-{
-	/* Reset system using MSFTRST register in Nuclei Timer. */
-	writel(UX600_NUCLEI_TIMER_MSFTRST_KEY, (void *)(UX600_NUCLEI_TIMER_ADDR
-					+ UX600_NUCLEI_TIMER_MSFTRST_OFS));
-	while(1);
-}
-
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= ux600_early_init,
 	.final_init		= ux600_final_init,
@@ -206,8 +216,6 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_init		= ux600_irqchip_init,
 	.ipi_init		= ux600_ipi_init,
 	.timer_init		= ux600_timer_init,
-	.system_reset_check	= ux600_system_reset_check,
-	.system_reset		= ux600_system_reset
 };
 
 const struct sbi_platform platform = {
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 04334b24ac3..d407fd5aa62 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -115,21 +115,6 @@ static int platform_timer_init(bool cold_boot)
 	return clint_warm_timer_init();
 }
 
-/*
- * Check reset type and reason supported by the platform.
- */
-static int platform_system_reset_check(u32 type, u32 reason)
-{
-	return 0;
-}
-
-/*
- * Reset the platform.
- */
-static void platform_system_reset(u32 type, u32 reason)
-{
-}
-
 /*
  * Platform descriptor.
  */
@@ -139,9 +124,7 @@ const struct sbi_platform_operations platform_ops = {
 	.console_init		= platform_console_init,
 	.irqchip_init		= platform_irqchip_init,
 	.ipi_init		= platform_ipi_init,
-	.timer_init		= platform_timer_init,
-	.system_reset_check	= platform_system_reset_check,
-	.system_reset		= platform_system_reset
+	.timer_init		= platform_timer_init
 };
 const struct sbi_platform platform = {
 	.opensbi_version	= OPENSBI_VERSION,

From a84a1ddbbabb2389b5af91473250d0aff90e40d7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 22 Apr 2021 14:14:02 +0530
Subject: [PATCH 0766/1765] lib: sbi: Simplify HSM platform operations

Instead of having hsm_start(), hsm_stop() and hsm_suspend()
callbacks in platform operations, it will be much simpler for
HSM driver to directly register these operations as a device
to the sbi_hsm implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 include/sbi/sbi_hsm.h      | 31 ++++++++++++++
 include/sbi/sbi_platform.h | 83 +-------------------------------------
 lib/sbi/sbi_hsm.c          | 68 +++++++++++++++++++++++++------
 lib/sbi/sbi_platform.c     |  6 ---
 4 files changed, 88 insertions(+), 100 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index bf0c1a520b1..c16e87180dc 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -12,9 +12,40 @@
 
 #include <sbi/sbi_types.h>
 
+/** Hart state managment device */
+struct sbi_hsm_device {
+	/** Name of the hart state managment device */
+	char name[32];
+
+	/** Start (or power-up) the given hart */
+	int (*hart_start)(u32 hartid, ulong saddr);
+
+	/**
+	 * Stop (or power-down) the current hart from running. This call
+	 * doesn't expect to return if success.
+	 */
+	int (*hart_stop)(void);
+
+	/**
+	 * Put the current hart in platform specific suspend (or low-power)
+	 * state.
+	 *
+	 * For successful retentive suspend, the call will return 0 when
+	 * the hart resumes normal execution.
+	 *
+	 * For successful non-retentive suspend, the hart will resume from
+	 * specified resume address
+	 */
+	int (*hart_suspend)(u32 suspend_type, ulong raddr);
+};
+
 struct sbi_domain;
 struct sbi_scratch;
 
+const struct sbi_hsm_device *sbi_hsm_get_device(void);
+
+void sbi_hsm_set_device(const struct sbi_hsm_device *dev);
+
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 921d39c4bc7..f8074d28db6 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -51,15 +51,11 @@ struct sbi_trap_regs;
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
-	/** Platform has HART hotplug support */
-	SBI_PLATFORM_HAS_HART_HOTPLUG = (1 << 0),
 	/** Platform has fault delegation support */
 	SBI_PLATFORM_HAS_MFAULTS_DELEGATION = (1 << 1),
-	/** Platform has custom secondary hart booting support */
-	SBI_PLATFORM_HAS_HART_SECONDARY_BOOT = (1 << 2),
 
 	/** Last index of Platform features*/
-	SBI_PLATFORM_HAS_LAST_FEATURE = SBI_PLATFORM_HAS_HART_SECONDARY_BOOT,
+	SBI_PLATFORM_HAS_LAST_FEATURE = SBI_PLATFORM_HAS_MFAULTS_DELEGATION,
 };
 
 /** Default feature set for a platform */
@@ -114,19 +110,6 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
-	/** Bringup the given hart */
-	int (*hart_start)(u32 hartid, ulong saddr);
-	/**
-	 * Stop the current hart from running. This call doesn't expect to
-	 * return if success.
-	 */
-	int (*hart_stop)(void);
-	/**
-	 * Put the current hart in platform specific suspend (or low-power)
-	 * state.
-	 */
-	int (*hart_suspend)(u32 suspend_type, ulong raddr);
-
 	/** platform specific SBI extension implementation probe function */
 	int (*vendor_ext_check)(long extid);
 	/** platform specific SBI extension implementation provider */
@@ -193,15 +176,9 @@ struct sbi_platform {
 #define sbi_platform_ops(__p) \
 	((const struct sbi_platform_operations *)(__p)->platform_ops_addr)
 
-/** Check whether the platform supports HART hotplug */
-#define sbi_platform_has_hart_hotplug(__p) \
-	((__p)->features & SBI_PLATFORM_HAS_HART_HOTPLUG)
 /** Check whether the platform supports fault delegation */
 #define sbi_platform_has_mfaults_delegation(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
-/** Check whether the platform supports custom secondary hart booting support */
-#define sbi_platform_has_hart_secondary_boot(__p) \
-	((__p)->features & SBI_PLATFORM_HAS_HART_SECONDARY_BOOT)
 
 /**
  * Get HART index for the given HART
@@ -316,64 +293,6 @@ static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
 	return FALSE;
 }
 
-/**
- * Bringup a given hart from previous stage. Platform should implement this
- * operation if they support a custom mechanism to start a hart. Otherwise,
- * a generic WFI based approach will be used to start/stop a hart in OpenSBI.
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART id
- * @param saddr M-mode start physical address for the HART
- *
- * @return 0 if sucessful and negative error code on failure
- */
-static inline int sbi_platform_hart_start(const struct sbi_platform *plat,
-					  u32 hartid, ulong saddr)
-{
-	if (plat && sbi_platform_ops(plat)->hart_start)
-		return sbi_platform_ops(plat)->hart_start(hartid, saddr);
-	return SBI_ENOTSUPP;
-}
-
-/**
- * Stop the current hart in OpenSBI.
- *
- * @param plat pointer to struct sbi_platform
- *
- * @return Negative error code on failure. It doesn't return on success.
- */
-static inline int sbi_platform_hart_stop(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->hart_stop)
-		return sbi_platform_ops(plat)->hart_stop();
-	return SBI_ENOTSUPP;
-}
-
-/**
- * Put the current hart in platform specific suspend (or low-power) state.
- *
- * For successful retentive suspend, the call will return 0 when the hart
- * resumes normal execution.
- *
- * For successful non-retentive suspend, the hart will resume from specified
- * resume address
- *
- * @param plat pointer to struct sbi_platform
- * @param suspend_type the type of suspend
- * @param raddr physical address where the hart can resume in M-mode after
- * non-retantive suspend
- *
- * @return 0 if successful and negative error code on failure
- */
-static inline int sbi_platform_hart_suspend(const struct sbi_platform *plat,
-					    u32 suspend_type, ulong raddr)
-{
-	if (plat && sbi_platform_ops(plat)->hart_suspend)
-		return sbi_platform_ops(plat)->hart_suspend(suspend_type,
-							    raddr);
-	return SBI_ENOTSUPP;
-}
-
 /**
  * Early initialization for current HART
  *
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 64d299bb73c..4662150e717 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -21,11 +21,12 @@
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
-#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_console.h>
 
+static const struct sbi_hsm_device *hsm_dev = NULL;
 static unsigned long hart_data_offset;
 
 /** Per hart specific data to manage state transition **/
@@ -129,6 +130,54 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	 */
 }
 
+const struct sbi_hsm_device *sbi_hsm_get_device(void)
+{
+	return hsm_dev;
+}
+
+void sbi_hsm_set_device(const struct sbi_hsm_device *dev)
+{
+	if (!dev || hsm_dev)
+		return;
+
+	hsm_dev = dev;
+}
+
+static bool hsm_device_has_hart_hotplug(void)
+{
+	if (hsm_dev && hsm_dev->hart_start && hsm_dev->hart_stop)
+		return true;
+	return false;
+}
+
+static bool hsm_device_has_hart_secondary_boot(void)
+{
+	if (hsm_dev && hsm_dev->hart_start && !hsm_dev->hart_stop)
+		return true;
+	return false;
+}
+
+static int hsm_device_hart_start(u32 hartid, ulong saddr)
+{
+	if (hsm_dev && hsm_dev->hart_start)
+		return hsm_dev->hart_start(hartid, saddr);
+	return SBI_ENOTSUPP;
+}
+
+static int hsm_device_hart_stop(void)
+{
+	if (hsm_dev && hsm_dev->hart_stop)
+		return hsm_dev->hart_stop();
+	return SBI_ENOTSUPP;
+}
+
+static int hsm_device_hart_suspend(u32 suspend_type, ulong raddr)
+{
+	if (hsm_dev && hsm_dev->hart_suspend)
+		return hsm_dev->hart_suspend(suspend_type, raddr);
+	return SBI_ENOTSUPP;
+}
+
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	u32 i;
@@ -164,7 +213,6 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 {
 	u32 hstate;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
@@ -174,8 +222,8 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 	if (hstate != SBI_HSM_STATE_STOP_PENDING)
 		goto fail_exit;
 
-	if (sbi_platform_has_hart_hotplug(plat)) {
-		sbi_platform_hart_stop(plat);
+	if (hsm_device_has_hart_hotplug()) {
+		hsm_device_hart_stop();
 		/* It should never reach here */
 		goto fail_exit;
 	}
@@ -201,7 +249,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	unsigned int hstate;
 	struct sbi_scratch *rscratch;
 	struct sbi_hsm_data *hdata;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* For now, we only allow start mode to be S-mode or U-mode. */
 	if (smode != PRV_S && smode != PRV_U)
@@ -233,10 +280,9 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	rscratch->next_addr = saddr;
 	rscratch->next_mode = smode;
 
-	if (sbi_platform_has_hart_hotplug(plat) ||
-	   (sbi_platform_has_hart_secondary_boot(plat) && !init_count)) {
-		return sbi_platform_hart_start(plat, hartid,
-					       scratch->warmboot_addr);
+	if (hsm_device_has_hart_hotplug() ||
+	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
+		return hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
 		sbi_ipi_raw_send(hartid);
 	}
@@ -374,7 +420,6 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 {
 	int oldstate, ret;
 	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
@@ -420,8 +465,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	hdata->suspend_type = suspend_type;
 
 	/* Try platform specific suspend */
-	ret = sbi_platform_hart_suspend(plat, suspend_type,
-					scratch->warmboot_addr);
+	ret = hsm_device_hart_suspend(suspend_type, scratch->warmboot_addr);
 	if (ret == SBI_ENOTSUPP) {
 		/* Try generic implementation of default suspend types */
 		if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT) {
diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index e78119ae953..e8b94a3d009 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -19,15 +19,9 @@ static inline char *sbi_platform_feature_id2string(unsigned long feature)
 		return NULL;
 
 	switch (feature) {
-	case SBI_PLATFORM_HAS_HART_HOTPLUG:
-		fstr = "hotplug";
-		break;
 	case SBI_PLATFORM_HAS_MFAULTS_DELEGATION:
 		fstr = "mfdeleg";
 		break;
-	case SBI_PLATFORM_HAS_HART_SECONDARY_BOOT:
-		fstr = "sec_boot";
-		break;
 	default:
 		break;
 	}

From e9a27ab8eab4a30490ff1d7470cd57cbbe4c11c8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 22 Apr 2021 14:49:44 +0530
Subject: [PATCH 0767/1765] lib: sbi: Show devices provided by platform in boot
 prints

We extend the boot-time prints to show various devices provided
(or registered) by the platform support. This will help users
verify hardware devices available for OpenSBI firmwares.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/sbi/sbi_init.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 7380d014932..3f44a2b8715 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -53,6 +53,11 @@ static void sbi_boot_print_banner(struct sbi_scratch *scratch)
 static void sbi_boot_print_general(struct sbi_scratch *scratch)
 {
 	char str[128];
+	const struct sbi_hsm_device *hdev;
+	const struct sbi_ipi_device *idev;
+	const struct sbi_timer_device *tdev;
+	const struct sbi_console_device *cdev;
+	const struct sbi_system_reset_device *srdev;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
@@ -65,6 +70,21 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	sbi_printf("Platform Features         : %s\n", str);
 	sbi_printf("Platform HART Count       : %u\n",
 		   sbi_platform_hart_count(plat));
+	idev = sbi_ipi_get_device();
+	sbi_printf("Platform IPI Device       : %s\n",
+		   (idev) ? idev->name : "---");
+	tdev = sbi_timer_get_device();
+	sbi_printf("Platform Timer Device     : %s\n",
+		   (tdev) ? tdev->name : "---");
+	cdev = sbi_console_get_device();
+	sbi_printf("Platform Console Device   : %s\n",
+		   (cdev) ? cdev->name : "---");
+	hdev = sbi_hsm_get_device();
+	sbi_printf("Platform HSM Device       : %s\n",
+		   (hdev) ? hdev->name : "---");
+	srdev = sbi_system_reset_get_device();
+	sbi_printf("Platform SysReset Device  : %s\n",
+		   (srdev) ? srdev->name : "---");
 
 	/* Firmware details */
 	sbi_printf("Firmware Base             : 0x%lx\n", scratch->fw_start);

From 632e27bb91b824974b88dd46f8419729d7f9825d Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 21 Apr 2021 12:20:04 +0800
Subject: [PATCH 0768/1765] docs/platform: sifive_fu540: Update U-Boot
 defconfig name

With latest U-Boot upstream (v2021.07 in development), the defconfig
name has been changed to sifive_unleashed_defconfig. Update the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/sifive_fu540.md | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index b4d3c605127..b38df47f0ec 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -42,7 +42,7 @@ make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/bo
 
 The command-line example here assumes that U-Boot was compiled using the
 sifive_fu540_defconfig configuration and with U-Boot v2020.01, and up to
-v2020.07-rc3.
+v2021.04. sifive_unleashed_defconfig shall be used with v2021.07 or above.
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
@@ -153,11 +153,12 @@ This is because QEMU generates a device tree blob on the fly based on the
 command line parameters and it's compatible with the one used in the upstream
 Linux kernel.
 
-When U-Boot v2020.01 (or higher) is used as the payload, as the SiFive FU540
+When U-Boot v2021.07 (or higher) is used as the payload, as the SiFive FU540
 DTB for the real hardware is embedded in U-Boot binary itself, due to the same
-reason above, we need to switch the U-Boot sifive_fu540_defconfig configuration
-from **CONFIG_OF_SEPARATE** to **CONFIG_OF_PRIOR_STAGE** so that U-Boot uses the
-DTB generated by QEMU, and u-boot.bin should be used as the payload image, like:
+reason above, we need to switch the U-Boot sifive_unleashed_defconfig
+configuration from **CONFIG_OF_SEPARATE** to **CONFIG_OF_PRIOR_STAGE** so that
+U-Boot uses the DTB generated by QEMU, and u-boot.bin should be used as the
+payload image, like:
 
 ```
 make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin

From 117fb6dcb147913034fe82d0ed038fa7a05f1a1d Mon Sep 17 00:00:00 2001
From: Daniel Cederman <cederman@gaisler.com>
Date: Fri, 30 Apr 2021 08:35:56 +0200
Subject: [PATCH 0769/1765] lib: utils/serial: Add support for Gaisler APBUART

This patch adds support for the UART used by the NOEL-V processor.

Cobham Gaisler's NOEL-V RISC-V processor IP is available under GPL
and commercial license and is described in more detail at
https://www.gaisler.com/noelv.

Signed-off-by: Daniel Cederman <cederman@gaisler.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 include/sbi_utils/fdt/fdt_helper.h      |  3 +
 include/sbi_utils/serial/gaisler-uart.h | 17 +++++
 lib/utils/fdt/fdt_helper.c              | 40 ++++++++++++
 lib/utils/serial/fdt_serial.c           |  2 +
 lib/utils/serial/fdt_serial_gaisler.c   | 35 ++++++++++
 lib/utils/serial/gaisler-uart.c         | 86 +++++++++++++++++++++++++
 lib/utils/serial/objects.mk             |  2 +
 7 files changed, 185 insertions(+)
 create mode 100644 include/sbi_utils/serial/gaisler-uart.h
 create mode 100644 lib/utils/serial/fdt_serial_gaisler.c
 create mode 100644 lib/utils/serial/gaisler-uart.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index f5222deb478..c89f2e68157 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -39,6 +39,9 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
 int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
 
+int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
+				struct platform_uart_data *uart);
+
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
diff --git a/include/sbi_utils/serial/gaisler-uart.h b/include/sbi_utils/serial/gaisler-uart.h
new file mode 100644
index 00000000000..11d1f20b354
--- /dev/null
+++ b/include/sbi_utils/serial/gaisler-uart.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Cobham Gaisler AB.
+ *
+ * Authors:
+ *   Daniel Cederman <cederman@gaisler.com>
+ */
+
+#ifndef __SERIAL_GAISLER_APBUART_H__
+#define __SERIAL_GAISLER_APBUART_H__
+
+#include <sbi/sbi_types.h>
+
+int gaisler_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
+
+#endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 909de013d3d..9143e44b39e 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -26,6 +26,8 @@
 #define DEFAULT_SIFIVE_UART_REG_SHIFT		0
 #define DEFAULT_SIFIVE_UART_REG_IO_WIDTH	4
 
+#define DEFAULT_GAISLER_UART_REG_IO_WIDTH	4
+
 #define DEFAULT_SHAKTI_UART_FREQ		50000000
 #define DEFAULT_SHAKTI_UART_BAUD		115200
 
@@ -213,6 +215,44 @@ int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
 	return 0;
 }
 
+int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
+				struct platform_uart_data *uart)
+{
+	int len, rc;
+	const fdt32_t *val;
+	unsigned long reg_addr, reg_size;
+
+	if (nodeoffset < 0 || !uart || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	uart->addr = reg_addr;
+
+	/**
+	 * UART address is mandatory. clock-frequency and current-speed
+	 * may not be present. Don't return error.
+	 */
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
+	if (len > 0 && val)
+		uart->freq = fdt32_to_cpu(*val);
+	else
+		uart->freq = DEFAULT_UART_FREQ;
+
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
+	if (len > 0 && val)
+		uart->baud = fdt32_to_cpu(*val);
+	else
+		uart->baud = DEFAULT_UART_BAUD;
+
+	/* For Gaisler APBUART, the reg-shift and reg-io-width are fixed .*/
+	uart->reg_shift	   = DEFAULT_UART_REG_SHIFT;
+	uart->reg_io_width = DEFAULT_GAISLER_UART_REG_IO_WIDTH;
+
+	return 0;
+}
+
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 43c55e83697..bad33871395 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -16,12 +16,14 @@ extern struct fdt_serial fdt_serial_uart8250;
 extern struct fdt_serial fdt_serial_sifive;
 extern struct fdt_serial fdt_serial_htif;
 extern struct fdt_serial fdt_serial_shakti;
+extern struct fdt_serial fdt_serial_gaisler;
 
 static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_uart8250,
 	&fdt_serial_sifive,
 	&fdt_serial_htif,
 	&fdt_serial_shakti,
+	&fdt_serial_gaisler
 };
 
 static struct fdt_serial dummy = {
diff --git a/lib/utils/serial/fdt_serial_gaisler.c b/lib/utils/serial/fdt_serial_gaisler.c
new file mode 100644
index 00000000000..9a9f9a8b796
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_gaisler.c
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Cobham Gaisler AB.
+ *
+ * Authors:
+ *   Daniel Cederman <cederman@gaisler.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/gaisler-uart.h>
+
+static int serial_gaisler_init(void *fdt, int nodeoff,
+			       const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart;
+
+	rc = fdt_parse_gaisler_uart_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return gaisler_uart_init(uart.addr, uart.freq, uart.baud);
+}
+
+static const struct fdt_match serial_gaisler_match[] = {
+	{ .compatible = "gaisler,apbuart" },
+	{},
+};
+
+struct fdt_serial fdt_serial_gaisler = {
+	.match_table = serial_gaisler_match,
+	.init = serial_gaisler_init
+};
diff --git a/lib/utils/serial/gaisler-uart.c b/lib/utils/serial/gaisler-uart.c
new file mode 100644
index 00000000000..49298e9afe9
--- /dev/null
+++ b/lib/utils/serial/gaisler-uart.c
@@ -0,0 +1,86 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Cobham Gaisler AB.
+ *
+ * Authors:
+ *   Daniel Cederman <cederman@gaisler.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/gaisler-uart.h>
+
+/* clang-format off */
+
+#define UART_REG_DATA		0
+#define UART_REG_STATUS		1
+#define UART_REG_CTRL		2
+#define UART_REG_SCALER		3
+
+#define UART_DATA_DATA		0x000000ff
+#define UART_STATUS_FIFOFULL	0x00000200
+#define UART_STATUS_DATAREADY	0x00000001
+
+#define UART_CTRL_DB		(1<<11)
+#define UART_CTRL_FL		(1<<6)
+#define UART_CTRL_TE		(1<<1)
+#define UART_CTRL_RE		(1<<0)
+
+/* clang-format on */
+
+static volatile void *uart_base;
+
+static u32 get_reg(u32 num)
+{
+	return readl(uart_base + (num * 0x4));
+}
+
+static void set_reg(u32 num, u32 val)
+{
+	writel(val, uart_base + (num * 0x4));
+}
+
+static void gaisler_uart_putc(char ch)
+{
+	while (get_reg(UART_REG_STATUS) & UART_STATUS_FIFOFULL)
+		;
+
+	set_reg(UART_REG_DATA, ch);
+}
+
+static int gaisler_uart_getc(void)
+{
+	u32 ret = get_reg(UART_REG_STATUS);
+	if (!(ret & UART_STATUS_DATAREADY))
+		return -1;
+	return get_reg(UART_REG_DATA) & UART_DATA_DATA;
+}
+
+static struct sbi_console_device gaisler_console = {
+	.name	      = "gaisler_uart",
+	.console_putc = gaisler_uart_putc,
+	.console_getc = gaisler_uart_getc
+};
+
+int gaisler_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
+{
+	u32 ctrl;
+
+	uart_base = (volatile void *)base;
+
+	/* Configure baudrate */
+	if (in_freq)
+		set_reg(UART_REG_SCALER, in_freq / (baudrate * 8 + 7));
+
+	ctrl = get_reg(UART_REG_CTRL);
+	/* Preserve debug mode and flow control */
+	ctrl &= (UART_CTRL_DB | UART_CTRL_FL);
+	/* Enable TX and RX */
+	ctrl |= UART_CTRL_TE | UART_CTRL_RE;
+	set_reg(UART_REG_CTRL, ctrl);
+
+	sbi_console_set_device(&gaisler_console);
+
+	return 0;
+}
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index c0746f07ef3..9fb09027438 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -8,10 +8,12 @@
 #
 
 libsbiutils-objs-y += serial/fdt_serial.o
+libsbiutils-objs-y += serial/fdt_serial_gaisler.o
 libsbiutils-objs-y += serial/fdt_serial_htif.o
 libsbiutils-objs-y += serial/fdt_serial_shakti.o
 libsbiutils-objs-y += serial/fdt_serial_sifive.o
 libsbiutils-objs-y += serial/fdt_serial_uart8250.o
+libsbiutils-objs-y += serial/gaisler-uart.o
 libsbiutils-objs-y += serial/shakti-uart.o
 libsbiutils-objs-y += serial/sifive-uart.o
 libsbiutils-objs-y += serial/uart8250.o

From 552f53f36088a25e2c2a51f41c13e7edae6c32e3 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 29 Apr 2021 18:16:07 +0800
Subject: [PATCH 0770/1765] docs: platform: Sort platform names

Let's sort the platform names in alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/generic.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index 8c3b0dd0760..e0bf8fe632f 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -46,11 +46,11 @@ RISC-V Platforms Using Generic Platform
 ---------------------------------------
 
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
-* **Spike** (*[spike.md]*)
 * **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
+* **Spike** (*[spike.md]*)
 * **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*)
 
 [qemu_virt.md]: qemu_virt.md
-[spike.md]: spike.md
 [shakti_cclass.md]: shakti_cclass.md
+[spike.md]: spike.md
 [thead-c9xx.md]: thead-c9xx.md

From d4177e72179e7898b79b7316deeea7af3866871f Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 29 Apr 2021 18:16:08 +0800
Subject: [PATCH 0771/1765] docs: platform: Describe sifive_fu540 as supported
 generic platform

The upstream U-Boot/QEMU have been using generic platform for SiFive
HiFive Unleashed board for some time. Let's document sifive_fu540 as
one of the supported targets for "generic" platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/generic.md      |  2 ++
 docs/platform/sifive_fu540.md | 16 ++++++++--------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index e0bf8fe632f..73a8afa437a 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -47,10 +47,12 @@ RISC-V Platforms Using Generic Platform
 
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
 * **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
+* **SiFive HiFive Unleashed** (*[sifive_fu540.md]*)
 * **Spike** (*[spike.md]*)
 * **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*)
 
 [qemu_virt.md]: qemu_virt.md
 [shakti_cclass.md]: shakti_cclass.md
+[sifive_fu540.md]: sifive_fu540.md
 [spike.md]: spike.md
 [thead-c9xx.md]: thead-c9xx.md
diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index b38df47f0ec..5cbca21acc2 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -8,7 +8,7 @@ With QEMU v4.2 or above release, the 'sifive_u' machine can be used to test
 OpenSBI image built for the real hardware as well.
 
 To build platform specific library and firmwares, provide the
-*PLATFORM=sifive/fu540* parameter to the top level `make` command.
+*PLATFORM=generic* parameter to the top level `make` command.
 
 Platform Options
 ----------------
@@ -32,10 +32,10 @@ To use Linux v5.2 (or higher), the pre-built DTB (DT binary) from Linux v5.2
 the compile time option *FW_FDT_PATH*.
 
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
 or
 (For Linux v5.2 or higher)
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<hifive-unleashed-a00.dtb path from Linux kernel>
 ```
 
 **U-Boot Payload**
@@ -45,7 +45,7 @@ sifive_fu540_defconfig configuration and with U-Boot v2020.01, and up to
 v2021.04. sifive_unleashed_defconfig shall be used with v2021.07 or above.
 
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
+make PLATFORM=generic FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot-dtb.bin
 ```
 For U-Boot v2020.07-rc4 or later releases, SPL support was added in U-Boot.
 Please refer to the detailed U-Boot booting guide available at [U-Boot].
@@ -64,7 +64,7 @@ That's why the generated firmware binary in above steps should be copied to
 the partition of the sdcard with above GUID.
 
 ```
-dd if=build/platform/sifive/fu540/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
+dd if=build/platform/generic/firmware/fw_payload.bin of=/dev/disk2s1 bs=1024
 ```
 
 In my case, it is the first partition is **disk2s1** that has been formatted
@@ -161,7 +161,7 @@ U-Boot uses the DTB generated by QEMU, and u-boot.bin should be used as the
 payload image, like:
 
 ```
-make PLATFORM=sifive/fu540 FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
+make PLATFORM=generic FW_PAYLOAD_PATH=<u-boot_build_dir>/u-boot.bin
 ```
 
 U-Boot v2020.07 release added SPL support to SiFive HiFive Unleashed board,
@@ -179,12 +179,12 @@ The above errors can be safely ignored as we don't run U-Boot SPL under QEMU.
 Run:
 ```
 qemu-system-riscv64 -M sifive_u -m 256M -nographic \
-	-bios build/platform/sifive/fu540/firmware/fw_payload.bin
+	-bios build/platform/generic/firmware/fw_payload.bin
 ```
 or
 ```
 qemu-system-riscv64 -M sifive_u -m 256M -nographic \
-	-bios build/platform/sifive/fu540/firmware/fw_jump.bin \
+	-bios build/platform/generic/firmware/fw_jump.bin \
 	-kernel <uboot_build_dir>/u-boot.bin
 ```
 

From 26998f3d116992ae3fc6670c8f724bcc630d33fd Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 29 Apr 2021 18:16:09 +0800
Subject: [PATCH 0772/1765] platform: Remove sifive/fu540 platform

Now that SiFive HiFive Unleashed board is using the generic platform
support in OpenSBI, let's remove the old non-generic one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/sifive/fu540/config.mk  |  40 -------
 platform/sifive/fu540/objects.mk |  10 --
 platform/sifive/fu540/platform.c | 175 -------------------------------
 scripts/create-binary-archive.sh |   2 -
 4 files changed, 227 deletions(-)
 delete mode 100644 platform/sifive/fu540/config.mk
 delete mode 100644 platform/sifive/fu540/objects.mk
 delete mode 100644 platform/sifive/fu540/platform.c

diff --git a/platform/sifive/fu540/config.mk b/platform/sifive/fu540/config.mk
deleted file mode 100644
index 23169b1b9c6..00000000000
--- a/platform/sifive/fu540/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Atish Patra <atish.patra@wdc.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M sifive_u -m 256M \
-  -nographic -bios $(build_dir)/platform/sifive/fu540/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_DYNAMIC=y
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_JUMP_ADDR=0x80400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_JUMP_ADDR=0x80200000
-endif
-FW_JUMP_FDT_ADDR=0x88000000
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x88000000
diff --git a/platform/sifive/fu540/objects.mk b/platform/sifive/fu540/objects.mk
deleted file mode 100644
index e0d05853819..00000000000
--- a/platform/sifive/fu540/objects.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Atish Patra <atish.patra@wdc.com>
-#
-
-platform-objs-y += platform.o
diff --git a/platform/sifive/fu540/platform.c b/platform/sifive/fu540/platform.c
deleted file mode 100644
index a17034db3b1..00000000000
--- a/platform/sifive/fu540/platform.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Atish Patra <atish.patra@wdc.com>
- */
-
-#include <libfdt.h>
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_platform.h>
-#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
-
-/* clang-format off */
-
-#define FU540_HART_COUNT			5
-
-#define FU540_SYS_CLK				1000000000
-
-#define FU540_CLINT_ADDR			0x2000000
-
-#define FU540_PLIC_ADDR				0xc000000
-#define FU540_PLIC_NUM_SOURCES			0x35
-#define FU540_PLIC_NUM_PRIORITIES		7
-
-#define FU540_UART0_ADDR			0x10010000
-#define FU540_UART1_ADDR			0x10011000
-#define FU540_UART_BAUDRATE			115200
-
-/* PRCI clock related macros */
-//TODO: Do we need a separate driver for this ?
-#define FU540_PRCI_BASE_ADDR			0x10000000
-#define FU540_PRCI_CLKMUXSTATUSREG		0x002C
-#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL	(0x1 << 1)
-
-/* Full tlb flush always */
-#define FU540_TLB_RANGE_FLUSH_LIMIT		0
-
-/* clang-format on */
-
-static struct plic_data plic = {
-	.addr = FU540_PLIC_ADDR,
-	.num_src = FU540_PLIC_NUM_SOURCES,
-};
-
-static struct clint_data clint = {
-	.addr = FU540_CLINT_ADDR,
-	.first_hartid = 0,
-	.hart_count = FU540_HART_COUNT,
-	.has_64bit_mmio = TRUE,
-};
-
-static void fu540_modify_dt(void *fdt)
-{
-	fdt_cpu_fixup(fdt);
-
-	fdt_fixups(fdt);
-
-	/*
-	 * SiFive Freedom U540 has an erratum that prevents S-mode software
-	 * to access a PMP protected region using 1GB page table mapping, so
-	 * always add the no-map attribute on this platform.
-	 */
-	fdt_reserved_memory_nomap_fixup(fdt);
-}
-
-static int fu540_final_init(bool cold_boot)
-{
-	void *fdt;
-
-	if (!cold_boot)
-		return 0;
-
-	fdt = sbi_scratch_thishart_arg1_ptr();
-	fu540_modify_dt(fdt);
-
-	return 0;
-}
-
-static int fu540_console_init(void)
-{
-	unsigned long peri_in_freq;
-
-	if (readl((volatile void *)FU540_PRCI_BASE_ADDR +
-		  FU540_PRCI_CLKMUXSTATUSREG) &
-	    FU540_PRCI_CLKMUX_STATUS_TLCLKSEL) {
-		peri_in_freq = FU540_SYS_CLK;
-	} else {
-		peri_in_freq = FU540_SYS_CLK / 2;
-	}
-
-	return sifive_uart_init(FU540_UART0_ADDR, peri_in_freq,
-				FU540_UART_BAUDRATE);
-}
-
-static int fu540_irqchip_init(bool cold_boot)
-{
-	int rc;
-	u32 hartid = current_hartid();
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(&plic);
-		if (rc)
-			return rc;
-	}
-
-	return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
-				      (hartid) ? (2 * hartid) : -1);
-}
-
-static int fu540_ipi_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_ipi_init(&clint);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_ipi_init();
-}
-
-static u64 fu540_get_tlbr_flush_limit(void)
-{
-	return FU540_TLB_RANGE_FLUSH_LIMIT;
-}
-
-static int fu540_timer_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = clint_cold_timer_init(&clint, NULL);
-		if (rc)
-			return rc;
-	}
-
-	return clint_warm_timer_init();
-}
-
-static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
-	[0] = 1,
-	[1] = 2,
-	[2] = 3,
-	[3] = 4,
-};
-
-const struct sbi_platform_operations platform_ops = {
-	.final_init		= fu540_final_init,
-	.console_init		= fu540_console_init,
-	.irqchip_init		= fu540_irqchip_init,
-	.ipi_init		= fu540_ipi_init,
-	.get_tlbr_flush_limit	= fu540_get_tlbr_flush_limit,
-	.timer_init		= fu540_timer_init,
-};
-
-const struct sbi_platform platform = {
-	.opensbi_version	= OPENSBI_VERSION,
-	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name			= "SiFive Freedom U540",
-	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count		= (FU540_HART_COUNT - 1),
-	.hart_index2id		= fu540_hart_index2id,
-	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-	.platform_ops_addr	= (unsigned long)&platform_ops
-};
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index a8bd335f195..43c54523305 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -95,12 +95,10 @@ build_opensbi() {
 	case "${BUILD_RISCV_XLEN}" in
 	32)
 		# Setup 32-bit platform list
-		BUILD_PLATFORM_SUBDIR=("sifive/fu540")
 		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	64)
 		# Setup 64-bit platform list
-		BUILD_PLATFORM_SUBDIR=("sifive/fu540")
 		BUILD_PLATFORM_SUBDIR+=("nuclei/ux600")
 		BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")

From f90c4c2e0298a6a6e7ade87bf1b704a3a07aa7b9 Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <git@danielschaefer.me>
Date: Thu, 13 May 2021 12:52:35 +0800
Subject: [PATCH 0773/1765] lib: sbi: Have spinlock checks return bool

spin_lock_check already returned bool in the source file but not in the
header. With some toolchains that causes an error, as it should.

Because it and related functions all essentially return a bool, we can
use this opportunity to change them.

Signed-off-by: Daniel Schaefer <git@danielschaefer.me>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_locks.h | 4 ++--
 lib/sbi/riscv_locks.c     | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/sbi/riscv_locks.h b/include/sbi/riscv_locks.h
index 492935f5d60..38d9cbeb7b2 100644
--- a/include/sbi/riscv_locks.h
+++ b/include/sbi/riscv_locks.h
@@ -34,9 +34,9 @@ typedef struct {
 #define DEFINE_SPIN_LOCK(x)	\
 	spinlock_t SPIN_LOCK_INIT(x)
 
-int spin_lock_check(spinlock_t *lock);
+bool spin_lock_check(spinlock_t *lock);
 
-int spin_trylock(spinlock_t *lock);
+bool spin_trylock(spinlock_t *lock);
 
 void spin_lock(spinlock_t *lock);
 
diff --git a/lib/sbi/riscv_locks.c b/lib/sbi/riscv_locks.c
index 75b443bd35b..acab7769240 100644
--- a/lib/sbi/riscv_locks.c
+++ b/lib/sbi/riscv_locks.c
@@ -8,7 +8,7 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_locks.h>
 
-static inline int spin_lock_unlocked(spinlock_t lock)
+static inline bool spin_lock_unlocked(spinlock_t lock)
 {
 	return lock.owner == lock.next;
 }
@@ -19,7 +19,7 @@ bool spin_lock_check(spinlock_t *lock)
 	return !spin_lock_unlocked(*lock);
 }
 
-int spin_trylock(spinlock_t *lock)
+bool spin_trylock(spinlock_t *lock)
 {
 	unsigned long inc = 1u << TICKET_SHIFT;
 	unsigned long mask = 0xffffu << TICKET_SHIFT;
@@ -42,7 +42,7 @@ int spin_trylock(spinlock_t *lock)
 		: "r"(inc), "r"(mask), "I"(TICKET_SHIFT)
 		: "memory");
 
-	return !l0;
+	return l0 == 0;
 }
 
 void spin_lock(spinlock_t *lock)

From e822b7504df0583a6a227d51cb7da8ea9fc79c0a Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 14 May 2021 09:16:13 +0800
Subject: [PATCH 0774/1765] lib: utils/serial: Support Synopsys DesignWare APB
 UART

Synopsys DesignWare APB UART is seen on the StarFive JH7100 SoC.
Its programming interface is compatible with the existing 8250
UART driver. Simply add its compatible string to the driver makes
it work with the StarFive JH7100 SoC on a BeagleV board.

With this patch, the generic platform firmware can be used out of
the box on the BeagleV board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/serial/fdt_serial_uart8250.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 918193ae9d8..36f364cfe39 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -28,6 +28,7 @@ static int serial_uart8250_init(void *fdt, int nodeoff,
 static const struct fdt_match serial_uart8250_match[] = {
 	{ .compatible = "ns16550" },
 	{ .compatible = "ns16550a" },
+	{ .compatible = "snps,dw-apb-uart" },
 	{ },
 };
 

From 6139ab272b1e69e4ff8a37655969c877ae86de49 Mon Sep 17 00:00:00 2001
From: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Date: Sat, 15 May 2021 10:16:38 +0200
Subject: [PATCH 0775/1765] Makefile: unconditionally disable SSP

Though -nostdlib is passed in CFLAGS, -fno-stack-protector must also be
passed to avoid linking errors related to undefined references to
'__stack_chk_guard' and '__stack_chk_fail' if toolchain enforces
-fstack-protector.

Fixes:
 - https://gitlab.com/kubu93/buildroot/-/jobs/1247043359

Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index eeffe6bad04..6b64205532e 100644
--- a/Makefile
+++ b/Makefile
@@ -203,7 +203,7 @@ GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-strict-aliasing -O2
+CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)

From c9ef2bc7e4fd805325d4466ea7d42cc36980862d Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <daniel.schaefer@hpe.com>
Date: Wed, 19 May 2021 15:54:08 +0800
Subject: [PATCH 0776/1765] lib: utils: Add strncpy macro to libfdt_env.h

we want to use sbi_strncpy as strncpy in the OpenSBI implementation for
libfdt.

Just like 2845d2d2cf4fb74a89452ba223995aa4a118c07e

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/libfdt_env.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index bc3e7588660..f9d9c6783c5 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -31,6 +31,7 @@
 #define strchr		sbi_strchr
 #define strrchr		sbi_strrchr
 #define strcpy		sbi_strcpy
+#define strncpy		sbi_strncpy
 #define strcmp		sbi_strcmp
 #define strncmp		sbi_strncmp
 #define strlen		sbi_strlen

From ee7c2b27ea8d875db8d7d39116432d9958267415 Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <daniel.schaefer@hpe.com>
Date: Wed, 19 May 2021 15:54:09 +0800
Subject: [PATCH 0777/1765] lib: utils/fdt: Don't use sbi_string functions

When SBI is built by external firmware, we need to use their functions,
defined in libfdt_env.h.

Just like 2cfd2fc9048806353298a1b967abf985901e36e8

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_domain.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 95c195d6523..fc8ad423eb8 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -9,6 +9,7 @@
  */
 
 #include <libfdt.h>
+#include <libfdt_env.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
@@ -95,7 +96,7 @@ static int __fixup_find_domain_offset(void *fdt, int doff, void *p)
 {
 	struct __fixup_find_domain_offset_info *fdo = p;
 
-	if (!sbi_strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
+	if (!strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
 		*fdo->doffset = doff;
 
 	return 0;
@@ -287,7 +288,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	regions = &fdt_regions[fdt_domains_count][0];
 
 	/* Read DT node name */
-	sbi_strncpy(dom->name, fdt_get_name(fdt, domain_offset, NULL),
+	strncpy(dom->name, fdt_get_name(fdt, domain_offset, NULL),
 		    sizeof(dom->name));
 	dom->name[sizeof(dom->name) - 1] = '\0';
 
@@ -313,7 +314,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 
 	/* Setup memregions from DT */
 	val32 = 0;
-	sbi_memset(regions, 0,
+	memset(regions, 0,
 		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 1));
 	dom->regions = regions;
 	err = fdt_iterate_each_memregion(fdt, domain_offset, &val32,
@@ -337,7 +338,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			continue;
 		if (FDT_DOMAIN_REGION_MAX_COUNT <= val32)
 			return SBI_EINVAL;
-		sbi_memcpy(&regions[val32++], reg, sizeof(*reg));
+		memcpy(&regions[val32++], reg, sizeof(*reg));
 	}
 
 	/* Read "boot-hart" DT property */

From fe92347b9f91c147b314065cc3c2c2b196c55b34 Mon Sep 17 00:00:00 2001
From: Daniel Schaefer <daniel.schaefer@hpe.com>
Date: Wed, 19 May 2021 15:54:10 +0800
Subject: [PATCH 0778/1765] lib: utils/fdt: Replace strcmp with strncmp

Use strncmp() instead of strcmp() in __fixup_find_domain_offset()
so that it compiles fine when linking with external firmware (such
as EDK2).

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/fdt/fdt_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index fc8ad423eb8..676c7579082 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -96,7 +96,7 @@ static int __fixup_find_domain_offset(void *fdt, int doff, void *p)
 {
 	struct __fixup_find_domain_offset_info *fdo = p;
 
-	if (!strcmp(fdo->name, fdt_get_name(fdt, doff, NULL)))
+	if (!strncmp(fdo->name, fdt_get_name(fdt, doff, NULL), strlen(fdo->name)))
 		*fdo->doffset = doff;
 
 	return 0;

From b2dbbc0577e326b6dc1babaa53fb46605c996a72 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 15:47:07 +0530
Subject: [PATCH 0779/1765] lib: Check region base for merging in
 sbi_domain_root_add_memregion()

We can merge region B onto region A only if base of region A is
aligned to region A order + 1.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_domain.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 84f30b935a5..3096af0a12d 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -511,7 +511,8 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 			if (!nreg1->order)
 				continue;
 
-			if ((nreg->base + BIT(nreg->order)) == nreg1->base &&
+			if (!(nreg->base & (BIT(nreg->order + 1) - 1)) &&
+			    (nreg->base + BIT(nreg->order)) == nreg1->base &&
 			    nreg->order == nreg1->order &&
 			    nreg->flags == nreg1->flags) {
 				nreg->order++;

From 54d7def6c254058f9458a0e26205b3c93a48bb42 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 21:16:25 +0530
Subject: [PATCH 0780/1765] lib: utils: Try other FDT drivers when we see
 SBI_ENODEV

We should try other FDT drivers when we see SBI_ENODEV returned
by cold_init() of FDT driver.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/ipi/fdt_ipi.c         | 3 +++
 lib/utils/irqchip/fdt_irqchip.c | 3 +++
 lib/utils/reset/fdt_reset.c     | 3 +++
 lib/utils/serial/fdt_serial.c   | 5 +++++
 lib/utils/timer/fdt_timer.c     | 3 +++
 5 files changed, 17 insertions(+)

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index efca37e61a2..3932f509188 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
@@ -54,6 +55,8 @@ static int fdt_ipi_cold_init(void)
 					drv->match_table, &match)) >= 0) {
 			if (drv->cold_init) {
 				rc = drv->cold_init(fdt, noff, match);
+				if (rc == SBI_ENODEV)
+					continue;
 				if (rc)
 					return rc;
 			}
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 3630be657ae..1306d50861b 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
@@ -47,6 +48,8 @@ static int fdt_irqchip_cold_init(void)
 					drv->match_table, &match)) >= 0) {
 			if (drv->cold_init) {
 				rc = drv->cold_init(fdt, noff, match);
+				if (rc == SBI_ENODEV)
+					continue;
 				if (rc)
 					return rc;
 			}
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index b01b0d116bf..1d687dcb04f 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
@@ -39,6 +40,8 @@ int fdt_reset_init(void)
 
 		if (drv->init) {
 			rc = drv->init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
 			if (rc)
 				return rc;
 		}
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index bad33871395..25982ec3abc 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -8,6 +8,7 @@
  */
 
 #include <libfdt.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/serial/fdt_serial.h>
@@ -59,6 +60,8 @@ int fdt_serial_init(void)
 
 		if (drv->init) {
 			rc = drv->init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
 			if (rc)
 				return rc;
 		}
@@ -80,6 +83,8 @@ int fdt_serial_init(void)
 
 		if (drv->init) {
 			rc = drv->init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
 			if (rc)
 				return rc;
 		}
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 92198cd5a5d..1fad42c2509 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
@@ -54,6 +55,8 @@ static int fdt_timer_cold_init(void)
 					drv->match_table, &match)) >= 0) {
 			if (drv->cold_init) {
 				rc = drv->cold_init(fdt, noff, match);
+				if (rc == SBI_ENODEV)
+					continue;
 				if (rc)
 					return rc;
 			}

From d9ba6536d307f05a838e7c96cd20b0b7e43ec886 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Fri, 28 May 2021 18:22:14 +0200
Subject: [PATCH 0781/1765] docs: debugging OpenSBI

Describe how to debug OpenSBI on QEMU with GDB.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 docs/platform/qemu_virt.md | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 27771485c85..0783be4a1f4 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -147,3 +147,27 @@ qemu-system-riscv32 -M virt -m 256M -nographic \
 	-device virtio-blk-device,drive=hd0 \
 	-append "root=/dev/vda rw console=ttyS0"
 ```
+
+Debugging with GDB
+------------------
+
+In a first console start OpenSBI with QEMU:
+
+```
+qemu-system-riscv64 -M virt -m 256M -nographic \
+	-bios build/platform/generic/firmware/fw_payload.bin \
+	-gdb tcp::1234 \
+	-S
+
+```
+
+Parameter *-gdb tcp::1234* specifies 1234 as the debug port.
+Parameter *-S* lets QEMU wait at the first instruction.
+
+In a second console start GDB:
+
+```
+gdb build/platform/generic/firmware/fw_payload.elf \
+	-ex 'target remote localhost:1234'
+
+```

From 66c4fca532288c750681f33339016772b0ffbf2a Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Fri, 28 May 2021 19:06:32 +0200
Subject: [PATCH 0782/1765] lib: utils: consider ':' in stdout-path
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The value of the /chosen/stdout-path devicetree property is used to
determine the UART used by openSBI. According to the devicetree
specification the value may contain a hyphen, e.g.

	chosen {
                stdout-path = "/serial@f00:115200";
        };

If the character ':' is present, it terminates the path of the device.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/serial/fdt_serial.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 25982ec3abc..1d1eba8866c 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -42,12 +42,21 @@ int fdt_serial_init(void)
 	int pos, noff = -1, len, coff, rc;
 	void *fdt = sbi_scratch_thishart_arg1_ptr();
 
-	/* Find offset of node pointed by stdout-path */
+	/* Find offset of node pointed to by stdout-path */
 	coff = fdt_path_offset(fdt, "/chosen");
 	if (-1 < coff) {
 		prop = fdt_getprop(fdt, coff, "stdout-path", &len);
-		if (prop && len)
-			noff = fdt_path_offset(fdt, prop);
+		if (prop && len) {
+			const char *sep, *start = prop;
+
+			/* The device path may be followed by ':' */
+			sep = strchr(start, ':');
+			if (sep)
+				noff = fdt_path_offset_namelen(fdt, prop,
+							       sep - start);
+			else
+				noff = fdt_path_offset(fdt, prop);
+		}
 	}
 
 	/* First check DT node pointed by stdout-path */

From f30b18944e900174bfa9a372ed9d344256891e3a Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Sat, 29 May 2021 21:54:29 +0200
Subject: [PATCH 0783/1765] lib: sbi_scratch: remove owner from
 sbi_scratch_alloc_offset

The parameter owner of function sbi_scratch_alloc_offset() is never used.
The scratch memory is small. We should not use it for debug information in
future. Hence eliminate the parameter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_scratch.h | 2 +-
 lib/sbi/sbi_hart.c        | 3 +--
 lib/sbi/sbi_hsm.c         | 3 +--
 lib/sbi/sbi_init.c        | 3 +--
 lib/sbi/sbi_ipi.c         | 3 +--
 lib/sbi/sbi_scratch.c     | 2 +-
 lib/sbi/sbi_timer.c       | 3 +--
 lib/sbi/sbi_tlb.c         | 9 +++------
 8 files changed, 10 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e83b234c4e4..186a40c885f 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -98,7 +98,7 @@ int sbi_scratch_init(struct sbi_scratch *scratch);
  * @return zero on failure and non-zero (>= SBI_SCRATCH_EXTRA_SPACE_OFFSET)
  * on success
  */
-unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner);
+unsigned long sbi_scratch_alloc_offset(unsigned long size);
 
 /** Free-up extra space in sbi_scratch */
 void sbi_scratch_free_offset(unsigned long offset);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index de59b1431b5..56878b47624 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -451,8 +451,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
 
 		hart_features_offset = sbi_scratch_alloc_offset(
-						sizeof(struct hart_features),
-						"HART_FEATURES");
+						sizeof(struct hart_features));
 		if (!hart_features_offset)
 			return SBI_ENOMEM;
 	}
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 4662150e717..67890f3944c 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -185,8 +185,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 	struct sbi_hsm_data *hdata;
 
 	if (cold_boot) {
-		hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata),
-							    "HART_DATA");
+		hart_data_offset = sbi_scratch_alloc_offset(sizeof(*hdata));
 		if (!hart_data_offset)
 			return SBI_ENOMEM;
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 3f44a2b8715..b1583145ea9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -233,8 +233,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
-						     "INIT_COUNT");
+	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__);
 	if (!init_count_offset)
 		sbi_hart_hang();
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index bfaf4e9766e..75f86d8e76f 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -227,8 +227,7 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	struct sbi_ipi_data *ipi_data;
 
 	if (cold_boot) {
-		ipi_data_off = sbi_scratch_alloc_offset(sizeof(*ipi_data),
-							"IPI_DATA");
+		ipi_data_off = sbi_scratch_alloc_offset(sizeof(*ipi_data));
 		if (!ipi_data_off)
 			return SBI_ENOMEM;
 		ret = sbi_ipi_event_create(&ipi_smode_ops);
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 96bae5be400..7cf5b434e13 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -40,7 +40,7 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 	return 0;
 }
 
-unsigned long sbi_scratch_alloc_offset(unsigned long size, const char *owner)
+unsigned long sbi_scratch_alloc_offset(unsigned long size)
 {
 	u32 i;
 	void *ptr;
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 63e8ea98ead..77d6f95032a 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -121,8 +121,7 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (cold_boot) {
-		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta),
-							  "TIME_DELTA");
+		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta));
 		if (!time_delta_off)
 			return SBI_ENOMEM;
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 73f59e8681e..2ba1b7b0340 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -380,19 +380,16 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (cold_boot) {
-		tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync),
-							"IPI_TLB_SYNC");
+		tlb_sync_off = sbi_scratch_alloc_offset(sizeof(*tlb_sync));
 		if (!tlb_sync_off)
 			return SBI_ENOMEM;
-		tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*tlb_q),
-							"IPI_TLB_FIFO");
+		tlb_fifo_off = sbi_scratch_alloc_offset(sizeof(*tlb_q));
 		if (!tlb_fifo_off) {
 			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
 		}
 		tlb_fifo_mem_off = sbi_scratch_alloc_offset(
-				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE,
-				"IPI_TLB_FIFO_MEM");
+				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE);
 		if (!tlb_fifo_mem_off) {
 			sbi_scratch_free_offset(tlb_fifo_off);
 			sbi_scratch_free_offset(tlb_sync_off);

From a03ea2e2b1e5e81c018c4ebcce34e241eb2c6b90 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 4 Jun 2021 23:35:42 +0800
Subject: [PATCH 0784/1765] platform: andes/ae350: Cosmetic fixes in plicsw.c

- %s/CLINT/PLICSW
- replace '.' with a space
- add a space around * in plicsw_cold_ipi_init()

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/andes/ae350/plicsw.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/andes/ae350/plicsw.c b/platform/andes/ae350/plicsw.c
index d07df28c802..4df73179533 100644
--- a/platform/andes/ae350/plicsw.c
+++ b/platform/andes/ae350/plicsw.c
@@ -83,7 +83,7 @@ void plicsw_ipi_clear(u32 target_hart)
 	if (plicsw_ipi_hart_count <= target_hart)
 		return;
 
-	/* Clear CLINT IPI */
+	/* Clear PLICSW IPI */
 	plicsw_claim();
 	plicsw_complete();
 }
@@ -108,10 +108,10 @@ int plicsw_cold_ipi_init(unsigned long base, u32 hart_count)
 	/* Setup source priority */
 	uint32_t *priority = (void *)base + PLICSW_PRIORITY_BASE;
 
-	for (int i = 0; i < AE350_HART_COUNT*PLICSW_PENDING_PER_HART; i++)
+	for (int i = 0; i < AE350_HART_COUNT * PLICSW_PENDING_PER_HART; i++)
 		writel(1, &priority[i]);
 
-	/* Setup target enable.*/
+	/* Setup target enable */
 	uint32_t enable_mask = PLICSW_HART_MASK;
 
 	for (int i = 0; i < AE350_HART_COUNT; i++) {

From b32fac4b65aabcd5fb555a87fcd94b4f2e297357 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 4 Jun 2021 23:35:43 +0800
Subject: [PATCH 0785/1765] docs/platform: andes-ae350: Fix missing spaces

Fix several places in the docmentation that are missing spaces.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/andes-ae350.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index 46889a1f1cd..1cf83cf7fe8 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -1,9 +1,9 @@
 Andes AE350 SoC Platform
 ========================
 The AE350 AXI/AHB-based platform N25(F)/NX25(F)/D25F/A25/AX25 CPU with level-one
-memories,interrupt controller, debug module, AXI and AHB Bus Matrix Controller,
-AXI-to-AHB Bridge and a collection of fundamentalAHB/APB bus IP components
-pre-integrated together as a system design.The high-quality and configurable
+memories, interrupt controller, debug module, AXI and AHB Bus Matrix Controller,
+AXI-to-AHB Bridge and a collection of fundamental AHB/APB bus IP components
+pre-integrated together as a system design. The high-quality and configurable
 AHB/APB IPs suites a majority embedded systems, and the verified platform serves
 as a starting point to jump start SoC designs.
 

From de446ccf180575db3fe85d4bca468848faee359f Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 4 Jun 2021 23:35:44 +0800
Subject: [PATCH 0786/1765] platform: andes/ae350: Drop plicsw_get_pending()

This is not used anywhere. Drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/andes/ae350/plicsw.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/platform/andes/ae350/plicsw.c b/platform/andes/ae350/plicsw.c
index 4df73179533..edbbb114720 100644
--- a/platform/andes/ae350/plicsw.c
+++ b/platform/andes/ae350/plicsw.c
@@ -33,12 +33,6 @@ static inline void plicsw_complete(void)
 	writel(source, plicsw_dev[source_hart].plicsw_claim);
 }
 
-static inline u32 plicsw_get_pending(u32 source_hart, u32 target_hart)
-{
-	return readl(plicsw_dev[source_hart].plicsw_pending)
-	       & (PLICSW_HART_MASK >> target_hart);
-}
-
 static inline void plic_sw_pending(u32 target_hart)
 {
 	/*

From 434198e3be65732d2a326b369377d4db732c1af8 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 4 Jun 2021 23:35:45 +0800
Subject: [PATCH 0787/1765] platform: andes/ae350: Drop plicsw_ipi_sync()

plicsw_ipi_sync() is a forward declaration but without the actual
implementation. Drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/andes/ae350/plicsw.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/platform/andes/ae350/plicsw.h b/platform/andes/ae350/plicsw.h
index 8be61945b9d..58728f629d2 100644
--- a/platform/andes/ae350/plicsw.h
+++ b/platform/andes/ae350/plicsw.h
@@ -35,8 +35,6 @@ struct plicsw {
 
 void plicsw_ipi_send(u32 target_hart);
 
-void plicsw_ipi_sync(u32 target_hart);
-
 void plicsw_ipi_clear(u32 target_hart);
 
 int plicsw_warm_ipi_init(void);

From 1da3d80b5bc074fce077adc47c97f3179c0addd9 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Sat, 5 Jun 2021 14:22:43 +0200
Subject: [PATCH 0788/1765] lib: sbi_scratch: zero out scratch memory on all
 harts

In sbi_scratch_init() we determine the last hart. The index of the last
hart cannot exceed SBI_HARTMASK_MAX_BITS - 1. We should not initialize
last_hartid_having_scratch to a higher number to avoid buffer overflows
when using this value before calling sbi_scratch_init().

When allocating scratch memory in sbi_scratch_alloc_offset() we zero out
the allocated memory for all harts except for the last one. We should not
skip the last hart.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_scratch.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 7cf5b434e13..87b34c6d4de 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -14,7 +14,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
-u32 last_hartid_having_scratch = SBI_HARTMASK_MAX_BITS;
+u32 last_hartid_having_scratch = SBI_HARTMASK_MAX_BITS - 1;
 struct sbi_scratch *hartid_to_scratch_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
@@ -74,7 +74,7 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size)
 	spin_unlock(&extra_lock);
 
 	if (ret) {
-		for (i = 0; i < sbi_scratch_last_hartid(); i++) {
+		for (i = 0; i <= sbi_scratch_last_hartid(); i++) {
 			rscratch = sbi_hartid_to_scratch(i);
 			if (!rscratch)
 				continue;

From 360ab88569201f8d282cf98546b86b8576b6f2ad Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Tue, 8 Jun 2021 22:05:46 +0200
Subject: [PATCH 0789/1765] lib: utils: missing initialization in
 thead_reset_init

If property csr-copy does not exist, fdt_getprop() will return NULL and cnt
will have a random value from the stack.

Call clone_csrs() only if cnt is initialized to a non-zero value.

Fixes: 49e422c5ad7a ("lib: utils: reset: Add T-HEAD sample platform reset driver")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/reset/fdt_reset_thead.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
index 95f8c369ce1..9f2fe032143 100644
--- a/lib/utils/reset/fdt_reset_thead.c
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -62,24 +62,26 @@ static int thead_reset_init(void *fdt, int nodeoff,
 	void *p;
 	const fdt64_t *val;
 	const fdt32_t *val_w;
-	int len, i, cnt;
+	int len, i;
 	u32 t, tmp = 0;
 
 	/* Prepare clone csrs */
 	val_w = fdt_getprop(fdt, nodeoff, "csr-copy", &len);
 	if (len > 0 && val_w) {
-		cnt = len / sizeof(fdt32_t);
+		int cnt;
 
+		cnt = len / sizeof(fdt32_t);
 		if (cnt > MAX_CUSTOM_CSR)
 			sbi_hart_hang();
 
 		for (i = 0; i < cnt; i++) {
 			custom_csr[i].index = fdt32_to_cpu(val_w[i]);
 		}
+
+		if (cnt)
+			clone_csrs(cnt);
 	}
 
-	if (cnt)
-		clone_csrs(cnt);
 
 	/* Delegate plic enable regs for S-mode */
 	val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len);

From 79f9b4220ffa7f74356054be25d450d7958bf16c Mon Sep 17 00:00:00 2001
From: Charles Papon <charles.papon.90@gmail.com>
Date: Sat, 12 Jun 2021 09:53:33 +0530
Subject: [PATCH 0790/1765] lib: sbi: Fix GET_F64_REG inline assembly

Current, GET_F64_REG() macro does not generate correct inline
assembly for the RV32 systems. This patch provides separate
definitions of GET_F64_REG() macro for RV32 and RV64 systems.

Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/riscv_fp.h | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index a685884a52b..b3dc08b9db6 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -42,15 +42,28 @@
 			: "t0");                                                                            \
 	})
 #define init_fp_reg(i) SET_F32_REG((i) << 3, 3, 0, 0)
+
+#if __riscv_xlen == 64
 #define GET_F64_REG(insn, pos, regs)                                                                    \
 	({                                                                                              \
-		register ulong value asm("a0") =                                                        \
-			SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                              \
+		register ulong value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                     \
 		ulong tmp;                                                                              \
 		asm("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" \
 		    : "=&r"(tmp), "+&r"(value)::"t0");                                                  \
-		sizeof(ulong) == 4 ? *(int64_t *)value : (int64_t)value;                                \
+		value;                                                                                  \
 	})
+#else
+#define GET_F64_REG(insn, pos, regs)                                                                     \
+	({                                                                                               \
+		u64 value;                                                                               \
+		ulong offset = SHIFT_RIGHT(insn, (pos)-3) & 0xf8;                                        \
+		register ulong ptr asm("a0") = (ulong)&value;                                            \
+		asm ("1: auipc t1, %%pcrel_hi(get_f64_reg); add t1, t1, %2; jalr t0, t1, %%pcrel_lo(1b)" \
+		    : "=m"(value) : "r"(ptr), "r"(offset) : "t0", "t1");                                 \
+		value;                                                                                   \
+	})
+#endif
+
 #define SET_F64_REG(insn, pos, regs, val)                                                                   \
 	({                                                                                                  \
 		uint64_t __val = (val);                                                                     \

From eb90e0a16cd9ab890522f2057868dc695533a3d1 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 11 Jun 2021 15:27:27 +0800
Subject: [PATCH 0791/1765] lib: utils/libfdt: Upgrade to v1.6.1 release

Sync with libfdt v1.6.1 release source codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/libfdt/fdt.c             |  39 ++++++---
 lib/utils/libfdt/fdt.h             |   2 +-
 lib/utils/libfdt/fdt_check.c       |  19 ++++
 lib/utils/libfdt/fdt_overlay.c     |   3 +-
 lib/utils/libfdt/fdt_ro.c          |  40 +++++----
 lib/utils/libfdt/fdt_rw.c          |  37 +++++---
 lib/utils/libfdt/fdt_strerror.c    |   4 +-
 lib/utils/libfdt/fdt_sw.c          |  31 ++++---
 lib/utils/libfdt/fdt_wip.c         |   2 +-
 lib/utils/libfdt/libfdt.h          | 134 ++++++++++++++++++++---------
 lib/utils/libfdt/libfdt_internal.h |  19 ++++
 11 files changed, 226 insertions(+), 104 deletions(-)

diff --git a/lib/utils/libfdt/fdt.c b/lib/utils/libfdt/fdt.c
index c28fcc11577..9fe7cf4b747 100644
--- a/lib/utils/libfdt/fdt.c
+++ b/lib/utils/libfdt/fdt.c
@@ -22,6 +22,10 @@ int32_t fdt_ro_probe_(const void *fdt)
 	if (can_assume(VALID_DTB))
 		return totalsize;
 
+	/* The device tree must be at an 8-byte aligned address */
+	if ((uintptr_t)fdt & 7)
+		return -FDT_ERR_ALIGNMENT;
+
 	if (fdt_magic(fdt) == FDT_MAGIC) {
 		/* Complete tree */
 		if (!can_assume(LATEST)) {
@@ -86,6 +90,10 @@ int fdt_check_header(const void *fdt)
 {
 	size_t hdrsize;
 
+	/* The device tree must be at an 8-byte aligned address */
+	if ((uintptr_t)fdt & 7)
+		return -FDT_ERR_ALIGNMENT;
+
 	if (fdt_magic(fdt) != FDT_MAGIC)
 		return -FDT_ERR_BADMAGIC;
 	if (!can_assume(LATEST)) {
@@ -134,16 +142,20 @@ int fdt_check_header(const void *fdt)
 
 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
 {
-	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
+	unsigned int uoffset = offset;
+	unsigned int absoffset = offset + fdt_off_dt_struct(fdt);
+
+	if (offset < 0)
+		return NULL;
 
 	if (!can_assume(VALID_INPUT))
-		if ((absoffset < offset)
+		if ((absoffset < uoffset)
 		    || ((absoffset + len) < absoffset)
 		    || (absoffset + len) > fdt_totalsize(fdt))
 			return NULL;
 
 	if (can_assume(LATEST) || fdt_version(fdt) >= 0x11)
-		if (((offset + len) < offset)
+		if (((uoffset + len) < uoffset)
 		    || ((offset + len) > fdt_size_dt_struct(fdt)))
 			return NULL;
 
@@ -206,10 +218,11 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
 
 int fdt_check_node_offset_(const void *fdt, int offset)
 {
-	if (can_assume(VALID_INPUT))
-		return offset;
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
+	if (!can_assume(VALID_INPUT)
+	    && ((offset < 0) || (offset % FDT_TAGSIZE)))
+		return -FDT_ERR_BADOFFSET;
+
+	if (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)
 		return -FDT_ERR_BADOFFSET;
 
 	return offset;
@@ -217,8 +230,11 @@ int fdt_check_node_offset_(const void *fdt, int offset)
 
 int fdt_check_prop_offset_(const void *fdt, int offset)
 {
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
+	if (!can_assume(VALID_INPUT)
+	    && ((offset < 0) || (offset % FDT_TAGSIZE)))
+		return -FDT_ERR_BADOFFSET;
+
+	if (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)
 		return -FDT_ERR_BADOFFSET;
 
 	return offset;
@@ -306,9 +322,12 @@ const char *fdt_find_string_(const char *strtab, int tabsize, const char *s)
 
 int fdt_move(const void *fdt, void *buf, int bufsize)
 {
+	if (!can_assume(VALID_INPUT) && bufsize < 0)
+		return -FDT_ERR_NOSPACE;
+
 	FDT_RO_PROBE(fdt);
 
-	if (fdt_totalsize(fdt) > bufsize)
+	if (fdt_totalsize(fdt) > (unsigned int)bufsize)
 		return -FDT_ERR_NOSPACE;
 
 	memmove(buf, fdt, fdt_totalsize(fdt));
diff --git a/lib/utils/libfdt/fdt.h b/lib/utils/libfdt/fdt.h
index 57fe566306d..f2e68807f27 100644
--- a/lib/utils/libfdt/fdt.h
+++ b/lib/utils/libfdt/fdt.h
@@ -7,7 +7,7 @@
  * Copyright 2012 Kim Phillips, Freescale Semiconductor.
  */
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 
 struct fdt_header {
 	fdt32_t magic;			 /* magic word FDT_MAGIC */
diff --git a/lib/utils/libfdt/fdt_check.c b/lib/utils/libfdt/fdt_check.c
index 7f6a96c6bbb..fa410a86e28 100644
--- a/lib/utils/libfdt/fdt_check.c
+++ b/lib/utils/libfdt/fdt_check.c
@@ -19,9 +19,12 @@ int fdt_check_full(const void *fdt, size_t bufsize)
 	unsigned int depth = 0;
 	const void *prop;
 	const char *propname;
+	bool expect_end = false;
 
 	if (bufsize < FDT_V1_SIZE)
 		return -FDT_ERR_TRUNCATED;
+	if (bufsize < fdt_header_size(fdt))
+		return -FDT_ERR_TRUNCATED;
 	err = fdt_check_header(fdt);
 	if (err != 0)
 		return err;
@@ -39,6 +42,10 @@ int fdt_check_full(const void *fdt, size_t bufsize)
 		if (nextoffset < 0)
 			return nextoffset;
 
+		/* If we see two root nodes, something is wrong */
+		if (expect_end && tag != FDT_END)
+			return -FDT_ERR_BADSTRUCTURE;
+
 		switch (tag) {
 		case FDT_NOP:
 			break;
@@ -52,12 +59,24 @@ int fdt_check_full(const void *fdt, size_t bufsize)
 			depth++;
 			if (depth > INT_MAX)
 				return -FDT_ERR_BADSTRUCTURE;
+
+			/* The root node must have an empty name */
+			if (depth == 1) {
+				const char *name;
+				int len;
+
+				name = fdt_get_name(fdt, offset, &len);
+				if (*name || len)
+					return -FDT_ERR_BADSTRUCTURE;
+			}
 			break;
 
 		case FDT_END_NODE:
 			if (depth == 0)
 				return -FDT_ERR_BADSTRUCTURE;
 			depth--;
+			if (depth == 0)
+				expect_end = true;
 			break;
 
 		case FDT_PROP:
diff --git a/lib/utils/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
index b310e49a698..d217e79b672 100644
--- a/lib/utils/libfdt/fdt_overlay.c
+++ b/lib/utils/libfdt/fdt_overlay.c
@@ -241,6 +241,7 @@ static int overlay_update_local_node_references(void *fdto,
 
 		if (fixup_len % sizeof(uint32_t))
 			return -FDT_ERR_BADOVERLAY;
+		fixup_len /= sizeof(uint32_t);
 
 		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
 		if (!tree_val) {
@@ -250,7 +251,7 @@ static int overlay_update_local_node_references(void *fdto,
 			return tree_len;
 		}
 
-		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
+		for (i = 0; i < fixup_len; i++) {
 			fdt32_t adj_val;
 			uint32_t poffset;
 
diff --git a/lib/utils/libfdt/fdt_ro.c b/lib/utils/libfdt/fdt_ro.c
index e03570a56eb..17584da2576 100644
--- a/lib/utils/libfdt/fdt_ro.c
+++ b/lib/utils/libfdt/fdt_ro.c
@@ -53,7 +53,7 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
 
 	err = -FDT_ERR_BADOFFSET;
 	absoffset = stroffset + fdt_off_dt_strings(fdt);
-	if (absoffset >= totalsize)
+	if (absoffset >= (unsigned)totalsize)
 		goto fail;
 	len = totalsize - absoffset;
 
@@ -61,17 +61,19 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp)
 		if (stroffset < 0)
 			goto fail;
 		if (can_assume(LATEST) || fdt_version(fdt) >= 17) {
-			if (stroffset >= fdt_size_dt_strings(fdt))
+			if ((unsigned)stroffset >= fdt_size_dt_strings(fdt))
 				goto fail;
 			if ((fdt_size_dt_strings(fdt) - stroffset) < len)
 				len = fdt_size_dt_strings(fdt) - stroffset;
 		}
 	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
-		if ((stroffset >= 0)
-		    || (stroffset < -fdt_size_dt_strings(fdt)))
+		unsigned int sw_stroffset = -stroffset;
+
+		if ((stroffset >= 0) ||
+		    (sw_stroffset > fdt_size_dt_strings(fdt)))
 			goto fail;
-		if ((-stroffset) < len)
-			len = -stroffset;
+		if (sw_stroffset < len)
+			len = sw_stroffset;
 	} else {
 		err = -FDT_ERR_INTERNAL;
 		goto fail;
@@ -157,8 +159,8 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle)
 
 static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n)
 {
-	int offset = n * sizeof(struct fdt_reserve_entry);
-	int absoffset = fdt_off_mem_rsvmap(fdt) + offset;
+	unsigned int offset = n * sizeof(struct fdt_reserve_entry);
+	unsigned int absoffset = fdt_off_mem_rsvmap(fdt) + offset;
 
 	if (!can_assume(VALID_INPUT)) {
 		if (absoffset < fdt_off_mem_rsvmap(fdt))
@@ -179,8 +181,8 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
 	if (!can_assume(VALID_INPUT) && !re)
 		return -FDT_ERR_BADOFFSET;
 
-	*address = fdt64_ld(&re->address);
-	*size = fdt64_ld(&re->size);
+	*address = fdt64_ld_(&re->address);
+	*size = fdt64_ld_(&re->size);
 	return 0;
 }
 
@@ -190,7 +192,7 @@ int fdt_num_mem_rsv(const void *fdt)
 	const struct fdt_reserve_entry *re;
 
 	for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) {
-		if (fdt64_ld(&re->size) == 0)
+		if (fdt64_ld_(&re->size) == 0)
 			return i;
 	}
 	return -FDT_ERR_TRUNCATED;
@@ -368,7 +370,7 @@ static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt,
 	prop = fdt_offset_ptr_(fdt, offset);
 
 	if (lenp)
-		*lenp = fdt32_ld(&prop->len);
+		*lenp = fdt32_ld_(&prop->len);
 
 	return prop;
 }
@@ -406,7 +408,7 @@ static const struct fdt_property *fdt_get_property_namelen_(const void *fdt,
 			offset = -FDT_ERR_INTERNAL;
 			break;
 		}
-		if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff),
+		if (fdt_string_eq_(fdt, fdt32_ld_(&prop->nameoff),
 				   name, namelen)) {
 			if (poffset)
 				*poffset = offset;
@@ -459,7 +461,7 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 
 	/* Handle realignment */
 	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 &&
-	    (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8)
+	    (poffset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >= 8)
 		return prop->data + 4;
 	return prop->data;
 }
@@ -477,7 +479,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
 		int namelen;
 
 		if (!can_assume(VALID_INPUT)) {
-			name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff),
+			name = fdt_get_string(fdt, fdt32_ld_(&prop->nameoff),
 					      &namelen);
 			if (!name) {
 				if (lenp)
@@ -486,13 +488,13 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
 			}
 			*namep = name;
 		} else {
-			*namep = fdt_string(fdt, fdt32_ld(&prop->nameoff));
+			*namep = fdt_string(fdt, fdt32_ld_(&prop->nameoff));
 		}
 	}
 
 	/* Handle realignment */
 	if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 &&
-	    (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8)
+	    (offset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >= 8)
 		return prop->data + 4;
 	return prop->data;
 }
@@ -517,7 +519,7 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
 			return 0;
 	}
 
-	return fdt32_ld(php);
+	return fdt32_ld_(php);
 }
 
 const char *fdt_get_alias_namelen(const void *fdt,
@@ -680,7 +682,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
 {
 	int offset;
 
-	if ((phandle == 0) || (phandle == -1))
+	if ((phandle == 0) || (phandle == ~0U))
 		return -FDT_ERR_BADPHANDLE;
 
 	FDT_RO_PROBE(fdt);
diff --git a/lib/utils/libfdt/fdt_rw.c b/lib/utils/libfdt/fdt_rw.c
index 13854253ff8..3621d3651d3 100644
--- a/lib/utils/libfdt/fdt_rw.c
+++ b/lib/utils/libfdt/fdt_rw.c
@@ -46,7 +46,7 @@ static int fdt_rw_probe_(void *fdt)
 			return err_; \
 	}
 
-static inline int fdt_data_size_(void *fdt)
+static inline unsigned int fdt_data_size_(void *fdt)
 {
 	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
 }
@@ -54,15 +54,16 @@ static inline int fdt_data_size_(void *fdt)
 static int fdt_splice_(void *fdt, void *splicepoint, int oldlen, int newlen)
 {
 	char *p = splicepoint;
-	char *end = (char *)fdt + fdt_data_size_(fdt);
+	unsigned int dsize = fdt_data_size_(fdt);
+	size_t soff = p - (char *)fdt;
 
-	if (((p + oldlen) < p) || ((p + oldlen) > end))
+	if ((oldlen < 0) || (soff + oldlen < soff) || (soff + oldlen > dsize))
 		return -FDT_ERR_BADOFFSET;
-	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
+	if ((p < (char *)fdt) || (dsize + newlen < (unsigned)oldlen))
 		return -FDT_ERR_BADOFFSET;
-	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
+	if (dsize - oldlen + newlen > fdt_totalsize(fdt))
 		return -FDT_ERR_NOSPACE;
-	memmove(p + newlen, p + oldlen, end - p - oldlen);
+	memmove(p + newlen, p + oldlen, ((char *)fdt + dsize) - (p + oldlen));
 	return 0;
 }
 
@@ -348,7 +349,10 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset,
 		return offset;
 
 	/* Try to place the new node after the parent's properties */
-	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
+	tag = fdt_next_tag(fdt, parentoffset, &nextoffset);
+	/* the fdt_subnode_offset_namelen() should ensure this never hits */
+	if (!can_assume(LIBFDT_FLAWLESS) && (tag != FDT_BEGIN_NODE))
+		return -FDT_ERR_INTERNAL;
 	do {
 		offset = nextoffset;
 		tag = fdt_next_tag(fdt, offset, &nextoffset);
@@ -390,7 +394,9 @@ int fdt_del_node(void *fdt, int nodeoffset)
 }
 
 static void fdt_packblocks_(const char *old, char *new,
-			    int mem_rsv_size, int struct_size)
+			    int mem_rsv_size,
+			    int struct_size,
+			    int strings_size)
 {
 	int mem_rsv_off, struct_off, strings_off;
 
@@ -405,8 +411,7 @@ static void fdt_packblocks_(const char *old, char *new,
 	fdt_set_off_dt_struct(new, struct_off);
 	fdt_set_size_dt_struct(new, struct_size);
 
-	memmove(new + strings_off, old + fdt_off_dt_strings(old),
-		fdt_size_dt_strings(old));
+	memmove(new + strings_off, old + fdt_off_dt_strings(old), strings_size);
 	fdt_set_off_dt_strings(new, strings_off);
 	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
 }
@@ -427,15 +432,17 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
 
 	if (can_assume(LATEST) || fdt_version(fdt) >= 17) {
 		struct_size = fdt_size_dt_struct(fdt);
-	} else {
+	} else if (fdt_version(fdt) == 16) {
 		struct_size = 0;
 		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
 			;
 		if (struct_size < 0)
 			return struct_size;
+	} else {
+		return -FDT_ERR_BADVERSION;
 	}
 
-	if (can_assume(LIBFDT_ORDER) |
+	if (can_assume(LIBFDT_ORDER) ||
 	    !fdt_blocks_misordered_(fdt, mem_rsv_size, struct_size)) {
 		/* no further work necessary */
 		err = fdt_move(fdt, buf, bufsize);
@@ -464,7 +471,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
 			return -FDT_ERR_NOSPACE;
 	}
 
-	fdt_packblocks_(fdt, tmp, mem_rsv_size, struct_size);
+	fdt_packblocks_(fdt, tmp, mem_rsv_size, struct_size,
+			fdt_size_dt_strings(fdt));
 	memmove(buf, tmp, newsize);
 
 	fdt_set_magic(buf, FDT_MAGIC);
@@ -484,7 +492,8 @@ int fdt_pack(void *fdt)
 
 	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
 		* sizeof(struct fdt_reserve_entry);
-	fdt_packblocks_(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
+	fdt_packblocks_(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt),
+			fdt_size_dt_strings(fdt));
 	fdt_set_totalsize(fdt, fdt_data_size_(fdt));
 
 	return 0;
diff --git a/lib/utils/libfdt/fdt_strerror.c b/lib/utils/libfdt/fdt_strerror.c
index 768db66eada..b4356931b06 100644
--- a/lib/utils/libfdt/fdt_strerror.c
+++ b/lib/utils/libfdt/fdt_strerror.c
@@ -40,7 +40,7 @@ static struct fdt_errtabent fdt_errtable[] = {
 	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
 	FDT_ERRTABENT(FDT_ERR_BADFLAGS),
 };
-#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
+#define FDT_ERRTABSIZE	((int)(sizeof(fdt_errtable) / sizeof(fdt_errtable[0])))
 
 const char *fdt_strerror(int errval)
 {
@@ -48,7 +48,7 @@ const char *fdt_strerror(int errval)
 		return "<valid offset/length>";
 	else if (errval == 0)
 		return "<no error>";
-	else if (errval > -FDT_ERRTABSIZE) {
+	else if (-errval < FDT_ERRTABSIZE) {
 		const char *s = fdt_errtable[-errval].str;
 
 		if (s)
diff --git a/lib/utils/libfdt/fdt_sw.c b/lib/utils/libfdt/fdt_sw.c
index 26759d5dfb8..4c569ee7eb0 100644
--- a/lib/utils/libfdt/fdt_sw.c
+++ b/lib/utils/libfdt/fdt_sw.c
@@ -32,7 +32,7 @@ static int fdt_sw_probe_(void *fdt)
 /* 'memrsv' state:	Initial state after fdt_create()
  *
  * Allowed functions:
- *	fdt_add_reservmap_entry()
+ *	fdt_add_reservemap_entry()
  *	fdt_finish_reservemap()		[moves to 'struct' state]
  */
 static int fdt_sw_probe_memrsv_(void *fdt)
@@ -93,8 +93,8 @@ static inline uint32_t sw_flags(void *fdt)
 
 static void *fdt_grab_space_(void *fdt, size_t len)
 {
-	int offset = fdt_size_dt_struct(fdt);
-	int spaceleft;
+	unsigned int offset = fdt_size_dt_struct(fdt);
+	unsigned int spaceleft;
 
 	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
 		- fdt_size_dt_strings(fdt);
@@ -108,8 +108,8 @@ static void *fdt_grab_space_(void *fdt, size_t len)
 
 int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags)
 {
-	const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header),
-					 sizeof(struct fdt_reserve_entry));
+	const int hdrsize = FDT_ALIGN(sizeof(struct fdt_header),
+				      sizeof(struct fdt_reserve_entry));
 	void *fdt = buf;
 
 	if (bufsize < hdrsize)
@@ -152,6 +152,9 @@ int fdt_resize(void *fdt, void *buf, int bufsize)
 
 	FDT_SW_PROBE(fdt);
 
+	if (bufsize < 0)
+		return -FDT_ERR_NOSPACE;
+
 	headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
 	tailsize = fdt_size_dt_strings(fdt);
 
@@ -159,7 +162,7 @@ int fdt_resize(void *fdt, void *buf, int bufsize)
 	    headsize + tailsize > fdt_totalsize(fdt))
 		return -FDT_ERR_INTERNAL;
 
-	if ((headsize + tailsize) > bufsize)
+	if ((headsize + tailsize) > (unsigned)bufsize)
 		return -FDT_ERR_NOSPACE;
 
 	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
@@ -247,18 +250,18 @@ int fdt_end_node(void *fdt)
 static int fdt_add_string_(void *fdt, const char *s)
 {
 	char *strtab = (char *)fdt + fdt_totalsize(fdt);
-	int strtabsize = fdt_size_dt_strings(fdt);
-	int len = strlen(s) + 1;
-	int struct_top, offset;
+	unsigned int strtabsize = fdt_size_dt_strings(fdt);
+	unsigned int len = strlen(s) + 1;
+	unsigned int struct_top, offset;
 
-	offset = -strtabsize - len;
+	offset = strtabsize + len;
 	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
-	if (fdt_totalsize(fdt) + offset < struct_top)
+	if (fdt_totalsize(fdt) - offset < struct_top)
 		return 0; /* no more room :( */
 
-	memcpy(strtab + offset, s, len);
+	memcpy(strtab - offset, s, len);
 	fdt_set_size_dt_strings(fdt, strtabsize + len);
-	return offset;
+	return -offset;
 }
 
 /* Must only be used to roll back in case of error */
@@ -374,7 +377,7 @@ int fdt_finish(void *fdt)
 	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
 
 	/* And fix up fields that were keeping intermediate state. */
-	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
+	fdt_set_last_comp_version(fdt, FDT_LAST_COMPATIBLE_VERSION);
 	fdt_set_magic(fdt, FDT_MAGIC);
 
 	return 0;
diff --git a/lib/utils/libfdt/fdt_wip.c b/lib/utils/libfdt/fdt_wip.c
index f64139e0b3d..c2d7566a67d 100644
--- a/lib/utils/libfdt/fdt_wip.c
+++ b/lib/utils/libfdt/fdt_wip.c
@@ -23,7 +23,7 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
 	if (!propval)
 		return proplen;
 
-	if (proplen < (len + idx))
+	if ((unsigned)proplen < (len + idx))
 		return -FDT_ERR_NOSPACE;
 
 	memcpy((char *)propval + idx, val, len);
diff --git a/lib/utils/libfdt/libfdt.h b/lib/utils/libfdt/libfdt.h
index 48f375c9c11..73467f75c58 100644
--- a/lib/utils/libfdt/libfdt.h
+++ b/lib/utils/libfdt/libfdt.h
@@ -9,7 +9,12 @@
 #include <libfdt_env.h>
 #include <fdt.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define FDT_FIRST_SUPPORTED_VERSION	0x02
+#define FDT_LAST_COMPATIBLE_VERSION 0x10
 #define FDT_LAST_SUPPORTED_VERSION	0x11
 
 /* Error codes: informative error codes */
@@ -97,7 +102,11 @@
 	/* FDT_ERR_BADFLAGS: The function was passed a flags field that
 	 * contains invalid flags or an invalid combination of flags. */
 
-#define FDT_ERR_MAX		18
+#define FDT_ERR_ALIGNMENT	19
+	/* FDT_ERR_ALIGNMENT: The device tree base address is not 8-byte
+	 * aligned. */
+
+#define FDT_ERR_MAX		19
 
 /* constants */
 #define FDT_MAX_PHANDLE 0xfffffffe
@@ -118,12 +127,10 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
 uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
 
 /*
- * Alignment helpers:
- *     These helpers access words from a device tree blob.  They're
- *     built to work even with unaligned pointers on platforms (ike
- *     ARM) that don't like unaligned loads and stores
+ * External helpers to access words from a device tree blob. They're built
+ * to work even with unaligned pointers on platforms (such as ARMv5) that don't
+ * like unaligned loads and stores.
  */
-
 static inline uint32_t fdt32_ld(const fdt32_t *p)
 {
 	const uint8_t *bp = (const uint8_t *)p;
@@ -180,23 +187,23 @@ int fdt_next_node(const void *fdt, int offset, int *depth);
 
 /**
  * fdt_first_subnode() - get offset of first direct subnode
- *
  * @fdt:	FDT blob
  * @offset:	Offset of node to check
- * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ *
+ * Return: offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
  */
 int fdt_first_subnode(const void *fdt, int offset);
 
 /**
  * fdt_next_subnode() - get offset of next direct subnode
+ * @fdt:	FDT blob
+ * @offset:	Offset of previous subnode
  *
  * After first calling fdt_first_subnode(), call this function repeatedly to
  * get direct subnodes of a parent node.
  *
- * @fdt:	FDT blob
- * @offset:	Offset of previous subnode
- * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
- * subnodes
+ * Return: offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ *         subnodes
  */
 int fdt_next_subnode(const void *fdt, int offset);
 
@@ -221,7 +228,6 @@ int fdt_next_subnode(const void *fdt, int offset);
  * Note that this is implemented as a macro and @node is used as
  * iterator in the loop. The parent variable be constant or even a
  * literal.
- *
  */
 #define fdt_for_each_subnode(node, fdt, parent)		\
 	for (node = fdt_first_subnode(fdt, parent);	\
@@ -265,17 +271,21 @@ fdt_set_hdr_(size_dt_struct);
 /**
  * fdt_header_size - return the size of the tree's header
  * @fdt: pointer to a flattened device tree
+ *
+ * Return: size of DTB header in bytes
  */
 size_t fdt_header_size(const void *fdt);
 
 /**
- * fdt_header_size_ - internal function which takes a version number
+ * fdt_header_size_ - internal function to get header size from a version number
+ * @version: devicetree version number
+ *
+ * Return: size of DTB header in bytes
  */
 size_t fdt_header_size_(uint32_t version);
 
 /**
  * fdt_check_header - sanity check a device tree header
-
  * @fdt: pointer to data which might be a flattened device tree
  *
  * fdt_check_header() checks that the given buffer contains what
@@ -400,8 +410,7 @@ static inline uint32_t fdt_get_max_phandle(const void *fdt)
  * highest phandle value in the device tree blob) will be returned in the
  * @phandle parameter.
  *
- * Returns:
- *   0 on success or a negative error-code on failure
+ * Return: 0 on success or a negative error-code on failure
  */
 int fdt_generate_phandle(const void *fdt, uint32_t *phandle);
 
@@ -421,9 +430,11 @@ int fdt_num_mem_rsv(const void *fdt);
 /**
  * fdt_get_mem_rsv - retrieve one memory reserve map entry
  * @fdt: pointer to the device tree blob
- * @address, @size: pointers to 64-bit variables
+ * @n: index of reserve map entry
+ * @address: pointer to 64-bit variable to hold the start address
+ * @size: pointer to 64-bit variable to hold the size of the entry
  *
- * On success, *address and *size will contain the address and size of
+ * On success, @address and @size will contain the address and size of
  * the n-th reserve map entry from the device tree blob, in
  * native-endian format.
  *
@@ -446,6 +457,8 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
  * namelen characters of name for matching the subnode name.  This is
  * useful for finding subnodes based on a portion of a larger string,
  * such as a full path.
+ *
+ * Return: offset of the subnode or -FDT_ERR_NOTFOUND if name not found.
  */
 #ifndef SWIG /* Not available in Python */
 int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
@@ -485,6 +498,8 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
  *
  * Identical to fdt_path_offset(), but only consider the first namelen
  * characters of path as the path name.
+ *
+ * Return: offset of the node or negative libfdt error value otherwise
  */
 #ifndef SWIG /* Not available in Python */
 int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
@@ -584,9 +599,9 @@ int fdt_next_property_offset(const void *fdt, int offset);
 /**
  * fdt_for_each_property_offset - iterate over all properties of a node
  *
- * @property_offset:	property offset (int, lvalue)
- * @fdt:		FDT blob (const void *)
- * @node:		node offset (int)
+ * @property:	property offset (int, lvalue)
+ * @fdt:	FDT blob (const void *)
+ * @node:	node offset (int)
  *
  * This is actually a wrapper around a for loop and would be used like so:
  *
@@ -649,6 +664,9 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
  *
  * Identical to fdt_get_property(), but only examine the first namelen
  * characters of name for matching the property name.
+ *
+ * Return: pointer to the structure representing the property, or NULL
+ *         if not found
  */
 #ifndef SWIG /* Not available in Python */
 const struct fdt_property *fdt_get_property_namelen(const void *fdt,
@@ -741,6 +759,8 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
  *
  * Identical to fdt_getprop(), but only examine the first namelen
  * characters of name for matching the property name.
+ *
+ * Return: pointer to the property's value or NULL on error
  */
 #ifndef SWIG /* Not available in Python */
 const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
@@ -762,10 +782,10 @@ static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
  * @lenp: pointer to an integer variable (will be overwritten) or NULL
  *
  * fdt_getprop() retrieves a pointer to the value of the property
- * named 'name' of the node at offset nodeoffset (this will be a
+ * named @name of the node at offset @nodeoffset (this will be a
  * pointer to within the device blob itself, not a copy of the value).
- * If lenp is non-NULL, the length of the property value is also
- * returned, in the integer pointed to by lenp.
+ * If @lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by @lenp.
  *
  * returns:
  *	pointer to the property's value
@@ -810,8 +830,11 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
  * @name: name of the alias th look up
  * @namelen: number of characters of name to consider
  *
- * Identical to fdt_get_alias(), but only examine the first namelen
- * characters of name for matching the alias name.
+ * Identical to fdt_get_alias(), but only examine the first @namelen
+ * characters of @name for matching the alias name.
+ *
+ * Return: a pointer to the expansion of the alias named @name, if it exists,
+ *	   NULL otherwise
  */
 #ifndef SWIG /* Not available in Python */
 const char *fdt_get_alias_namelen(const void *fdt,
@@ -824,7 +847,7 @@ const char *fdt_get_alias_namelen(const void *fdt,
  * @name: name of the alias th look up
  *
  * fdt_get_alias() retrieves the value of a given alias.  That is, the
- * value of the property named 'name' in the node /aliases.
+ * value of the property named @name in the node /aliases.
  *
  * returns:
  *	a pointer to the expansion of the alias named 'name', if it exists
@@ -1000,14 +1023,13 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
 int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
 
 /**
- * fdt_node_check_compatible: check a node's compatible property
+ * fdt_node_check_compatible - check a node's compatible property
  * @fdt: pointer to the device tree blob
  * @nodeoffset: offset of a tree node
  * @compatible: string to match against
  *
- *
  * fdt_node_check_compatible() returns 0 if the given node contains a
- * 'compatible' property with the given string as one of its elements,
+ * @compatible property with the given string as one of its elements,
  * it returns non-zero otherwise, or on error.
  *
  * returns:
@@ -1071,7 +1093,7 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
  * one or more strings, each terminated by \0, as is found in a device tree
  * "compatible" property.
  *
- * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ * Return: 1 if the string is found in the list, 0 not found, or invalid list
  */
 int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
 
@@ -1080,7 +1102,8 @@ int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
  * @fdt: pointer to the device tree blob
  * @nodeoffset: offset of a tree node
  * @property: name of the property containing the string list
- * @return:
+ *
+ * Return:
  *   the number of strings in the given property
  *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
  *   -FDT_ERR_NOTFOUND if the property does not exist
@@ -1100,7 +1123,7 @@ int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
  * small-valued cell properties, such as #address-cells, when searching for
  * the empty string.
  *
- * @return:
+ * return:
  *   the index of the string in the list of strings
  *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
  *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
@@ -1124,7 +1147,7 @@ int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
  * If non-NULL, the length of the string (on success) or a negative error-code
  * (on failure) will be stored in the integer pointer to by lenp.
  *
- * @return:
+ * Return:
  *   A pointer to the string at the given index in the string list or NULL on
  *   failure. On success the length of the string will be stored in the memory
  *   location pointed to by the lenp parameter, if non-NULL. On failure one of
@@ -1213,6 +1236,8 @@ int fdt_size_cells(const void *fdt, int nodeoffset);
  * starting from the given index, and using only the first characters
  * of the name. It is useful when you want to manipulate only one value of
  * an array and you have a string that doesn't end with \0.
+ *
+ * Return: 0 on success, negative libfdt error value otherwise
  */
 #ifndef SWIG /* Not available in Python */
 int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
@@ -1326,8 +1351,13 @@ static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
 
 /**
  * fdt_setprop_inplace_cell - change the value of a single-cell property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node containing the property
+ * @name: name of the property to change the value of
+ * @val: new value of the 32-bit cell
  *
  * This is an alternative name for fdt_setprop_inplace_u32()
+ * Return: 0 on success, negative libfdt error number otherwise.
  */
 static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
 					   const char *name, uint32_t val)
@@ -1399,7 +1429,7 @@ int fdt_nop_node(void *fdt, int nodeoffset);
 
 /**
  * fdt_create_with_flags - begin creation of a new fdt
- * @fdt: pointer to memory allocated where fdt will be created
+ * @buf: pointer to memory allocated where fdt will be created
  * @bufsize: size of the memory space at fdt
  * @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0.
  *
@@ -1417,7 +1447,7 @@ int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags);
 
 /**
  * fdt_create - begin creation of a new fdt
- * @fdt: pointer to memory allocated where fdt will be created
+ * @buf: pointer to memory allocated where fdt will be created
  * @bufsize: size of the memory space at fdt
  *
  * fdt_create() is equivalent to fdt_create_with_flags() with flags=0.
@@ -1482,7 +1512,8 @@ int fdt_pack(void *fdt);
 /**
  * fdt_add_mem_rsv - add one memory reserve map entry
  * @fdt: pointer to the device tree blob
- * @address, @size: 64-bit values (native endian)
+ * @address: 64-bit start address of the reserve map entry
+ * @size: 64-bit size of the reserved region
  *
  * Adds a reserve map entry to the given blob reserving a region at
  * address address of length size.
@@ -1687,8 +1718,14 @@ static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
 
 /**
  * fdt_setprop_cell - set a property to a single cell value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value for the property (native endian)
  *
  * This is an alternative name for fdt_setprop_u32()
+ *
+ * Return: 0 on success, negative libfdt error value otherwise.
  */
 static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
 				   uint32_t val)
@@ -1859,8 +1896,14 @@ static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
 
 /**
  * fdt_appendprop_cell - append a single cell value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to append to the property (native endian)
  *
  * This is an alternative name for fdt_appendprop_u32()
+ *
+ * Return: 0 on success, negative libfdt error value otherwise.
  */
 static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
 				      const char *name, uint32_t val)
@@ -1963,13 +2006,16 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name);
  * fdt_add_subnode_namelen - creates a new node based on substring
  * @fdt: pointer to the device tree blob
  * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
+ * @name: name of the subnode to create
  * @namelen: number of characters of name to consider
  *
- * Identical to fdt_add_subnode(), but use only the first namelen
- * characters of name as the name of the new node.  This is useful for
+ * Identical to fdt_add_subnode(), but use only the first @namelen
+ * characters of @name as the name of the new node.  This is useful for
  * creating subnodes based on a portion of a larger string, such as a
  * full path.
+ *
+ * Return: structure block offset of the created subnode (>=0),
+ *	   negative libfdt error value otherwise
  */
 #ifndef SWIG /* Not available in Python */
 int fdt_add_subnode_namelen(void *fdt, int parentoffset,
@@ -1988,7 +2034,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset,
  *
  * This function will insert data into the blob, and will therefore
  * change the offsets of some existing nodes.
-
+ *
  * returns:
  *	structure block offset of the created nodeequested subnode (>=0), on
  *		success
@@ -2069,4 +2115,8 @@ int fdt_overlay_apply(void *fdt, void *fdto);
 
 const char *fdt_strerror(int errval);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* LIBFDT_H */
diff --git a/lib/utils/libfdt/libfdt_internal.h b/lib/utils/libfdt/libfdt_internal.h
index d4e0bd49c03..16bda1906a7 100644
--- a/lib/utils/libfdt/libfdt_internal.h
+++ b/lib/utils/libfdt/libfdt_internal.h
@@ -46,6 +46,25 @@ static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n)
 	return (void *)(uintptr_t)fdt_mem_rsv_(fdt, n);
 }
 
+/*
+ * Internal helpers to access tructural elements of the device tree
+ * blob (rather than for exaple reading integers from within property
+ * values).  We assume that we are either given a naturally aligned
+ * address for the platform or if we are not, we are on a platform
+ * where unaligned memory reads will be handled in a graceful manner.
+ * If not the external helpers fdtXX_ld() from libfdt.h can be used
+ * instead.
+ */
+static inline uint32_t fdt32_ld_(const fdt32_t *p)
+{
+	return fdt32_to_cpu(*p);
+}
+
+static inline uint64_t fdt64_ld_(const fdt64_t *p)
+{
+	return fdt64_to_cpu(*p);
+}
+
 #define FDT_SW_MAGIC		(~FDT_MAGIC)
 
 /**********************************************************************/

From cdcf907b1989c8816bf67bf078780b6353a516ce Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Mon, 21 Jun 2021 21:50:10 +0200
Subject: [PATCH 0792/1765] lib: sign conflict in sbi_tlb_entry_process()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Compiling sbi_tlb_entry_process() with GCC 11 and -Wextra yields:

lib/sbi/sbi_tlb.c: In function ‘sbi_tlb_process_count’:
lib/sbi/sbi_tlb.c:206:31:
error: comparison of integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Werror=sign-compare]
  206 |                 if (deq_count > count)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_tlb.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 2ba1b7b0340..8bbe92b0978 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -193,10 +193,11 @@ static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_process_count(struct sbi_scratch *scratch, int count)
+static void sbi_tlb_process_count(struct sbi_scratch *scratch,
+				  unsigned int count)
 {
 	struct sbi_tlb_info tinfo;
-	u32 deq_count = 0;
+	unsigned int deq_count = 0;
 	struct sbi_fifo *tlb_fifo =
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 

From 99017946f36525c0689d287fbad21426575944c4 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Mon, 21 Jun 2021 21:37:54 +0200
Subject: [PATCH 0793/1765] lib: sign conflict in wake_coldboot_harts()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Compiling wake_coldboot_harts() with GCC 11 and -Wextra yields:

lib/sbi/sbi_init.c:208:27:
error: comparison of integer expressions of different signedness:
‘int’ and ‘u32’ {aka ‘unsigned int’} [-Werror=sign-compare]
  208 |         for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
      |                           ^~

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index b1583145ea9..e396d95d424 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -205,7 +205,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	spin_lock(&coldboot_lock);
 
 	/* Send an IPI to all HARTs waiting for coldboot */
-	for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
+	for (u32 i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&
 		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
 			sbi_ipi_raw_send(i);

From 11c345f14a3e3c67e688024094f72de4f92c87a4 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Mon, 21 Jun 2021 21:03:16 +0200
Subject: [PATCH 0794/1765] lib: simplify sbi_fifo_inplace_update()

Don't assign an unused value to variable index.

Use operator '-=' where applicable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_fifo.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 2a5c0129807..b2395f33fac 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -118,7 +118,7 @@ bool sbi_fifo_reset(struct sbi_fifo *fifo)
 int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 			    int (*fptr)(void *in, void *data))
 {
-	int i, index = 0;
+	int i, index;
 	int ret = SBI_FIFO_UNCHANGED;
 	void *entry;
 
@@ -135,7 +135,7 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 	for (i = 0; i < fifo->avail; i++) {
 		index = fifo->tail + i;
 		if (index >= fifo->num_entries)
-			index = index - fifo->num_entries;
+			index -= fifo->num_entries;
 		entry = (void *)fifo->queue + (u32)index * fifo->entry_size;
 		ret = fptr(in, entry);
 

From 4519e29c51315205119ce03ff0e5152def647ed5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 11:01:57 +0530
Subject: [PATCH 0795/1765] lib: utils/timer: Add ACLINT MTIMER library

We add common ACLINT MTIMER library similar to the CLINT library
so that OpenSBI platforms can use it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/timer/aclint_mtimer.h |  41 ++++++
 lib/utils/timer/aclint_mtimer.c         | 180 ++++++++++++++++++++++++
 lib/utils/timer/objects.mk              |   1 +
 3 files changed, 222 insertions(+)
 create mode 100644 include/sbi_utils/timer/aclint_mtimer.h
 create mode 100644 lib/utils/timer/aclint_mtimer.c

diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
new file mode 100644
index 00000000000..62aa0865138
--- /dev/null
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -0,0 +1,41 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __TIMER_ACLINT_MTIMER_H__
+#define __TIMER_ACLINT_MTIMER_H__
+
+#include <sbi/sbi_types.h>
+
+#define ACLINT_MTIMER_ALIGN		0x1000
+#define ACLINT_MTIMER_SIZE		0x8000
+#define ACLINT_MTIMER_MAX_HARTS	4095
+
+#define CLINT_MTIMER_OFFSET		0x4000
+
+struct aclint_mtimer_data {
+	/* Public details */
+	unsigned long addr;
+	unsigned long size;
+	u32 first_hartid;
+	u32 hart_count;
+	bool has_64bit_mmio;
+	/* Private details (initialized and used by ACLINT MTIMER library) */
+	struct aclint_mtimer_data *time_delta_reference;
+	unsigned long time_delta_computed;
+	u64 time_delta;
+	u64 (*time_rd)(volatile u64 *addr);
+	void (*time_wr)(bool timecmp, u64 value, volatile u64 *addr);
+};
+
+int aclint_mtimer_warm_init(void);
+
+int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
+			    struct aclint_mtimer_data *reference);
+
+#endif
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
new file mode 100644
index 00000000000..41b02900b27
--- /dev/null
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -0,0 +1,180 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_atomic.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_timer.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
+
+#define MTIMER_CMP_OFF		0x0000
+#define MTIMER_VAL_OFF		0x7ff8
+
+static struct aclint_mtimer_data *mtimer_hartid2data[SBI_HARTMASK_MAX_BITS];
+
+#if __riscv_xlen != 32
+static u64 mtimer_time_rd64(volatile u64 *addr)
+{
+	return readq_relaxed(addr);
+}
+
+static void mtimer_time_wr64(bool timecmp, u64 value, volatile u64 *addr)
+{
+	writeq_relaxed(value, addr);
+}
+#endif
+
+static u64 mtimer_time_rd32(volatile u64 *addr)
+{
+	u32 lo, hi;
+
+	do {
+		hi = readl_relaxed((u32 *)addr + 1);
+		lo = readl_relaxed((u32 *)addr);
+	} while (hi != readl_relaxed((u32 *)addr + 1));
+
+	return ((u64)hi << 32) | (u64)lo;
+}
+
+static void mtimer_time_wr32(bool timecmp, u64 value, volatile u64 *addr)
+{
+	writel_relaxed((timecmp) ? -1U : 0U, (void *)(addr));
+	writel_relaxed((u32)(value >> 32), (void *)(addr) + 0x04);
+	writel_relaxed((u32)value, (void *)(addr));
+}
+
+static u64 mtimer_value(void)
+{
+	struct aclint_mtimer_data *mt = mtimer_hartid2data[current_hartid()];
+	u64 *time_val = ((void *)mt->addr) + MTIMER_VAL_OFF;
+
+	/* Read MTIMER Time Value */
+	return mt->time_rd(time_val) + mt->time_delta;
+}
+
+static void mtimer_event_stop(void)
+{
+	u32 target_hart = current_hartid();
+	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
+	u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+
+	/* Clear MTIMER Time Compare */
+	mt->time_wr(true, -1ULL, &time_cmp[target_hart - mt->first_hartid]);
+}
+
+static void mtimer_event_start(u64 next_event)
+{
+	u32 target_hart = current_hartid();
+	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
+	u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+
+	/* Program MTIMER Time Compare */
+	mt->time_wr(true, next_event - mt->time_delta,
+		    &time_cmp[target_hart - mt->first_hartid]);
+}
+
+static struct sbi_timer_device mtimer = {
+	.name = "aclint-mtimer",
+	.timer_value = mtimer_value,
+	.timer_event_start = mtimer_event_start,
+	.timer_event_stop = mtimer_event_stop
+};
+
+int aclint_mtimer_warm_init(void)
+{
+	u64 v1, v2, mv;
+	u32 target_hart = current_hartid();
+	struct aclint_mtimer_data *reference;
+	u64 *mt_time_val, *mt_time_cmp, *ref_time_val;
+	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
+
+	if (!mt)
+		return SBI_ENODEV;
+
+	/*
+	 * Compute delta if reference available
+	 *
+	 * We deliberately compute time_delta in warm init so that time_delta
+	 * is computed on a HART which is going to use given MTIMER. We use
+	 * atomic flag timer_delta_computed to ensure that only one HART does
+	 * time_delta computation.
+	 */
+	if (mt->time_delta_reference) {
+		reference = mt->time_delta_reference;
+		mt_time_val = (void *)mt->addr + MTIMER_VAL_OFF;
+		ref_time_val = (void *)reference->addr + MTIMER_VAL_OFF;
+		if (!atomic_raw_xchg_ulong(&mt->time_delta_computed, 1)) {
+			v1 = mt->time_rd(mt_time_val);
+			mv = reference->time_rd(ref_time_val);
+			v2 = mt->time_rd(mt_time_val);
+			mt->time_delta = mv - ((v1 / 2) + (v2 / 2));
+		}
+	}
+
+	/* Clear Time Compare */
+	mt_time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+	mt->time_wr(true, -1ULL,
+		    &mt_time_cmp[target_hart - mt->first_hartid]);
+
+	return 0;
+}
+
+int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
+			    struct aclint_mtimer_data *reference)
+{
+	u32 i;
+	int rc;
+	unsigned long pos, region_size;
+	struct sbi_domain_memregion reg;
+
+	/* Sanity checks */
+	if (!mt || (mt->addr & (ACLINT_MTIMER_ALIGN - 1)) ||
+	    (mt->size < ACLINT_MTIMER_SIZE) ||
+	    (mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
+	    (mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
+		return SBI_EINVAL;
+
+	/* Initialize private data */
+	mt->time_delta_reference = reference;
+	mt->time_delta_computed = 0;
+	mt->time_delta = 0;
+	mt->time_rd = mtimer_time_rd32;
+	mt->time_wr = mtimer_time_wr32;
+
+	/* Override read/write accessors for 64bit MMIO */
+#if __riscv_xlen != 32
+	if (mt->has_64bit_mmio) {
+		mt->time_rd = mtimer_time_rd64;
+		mt->time_wr = mtimer_time_wr64;
+	}
+#endif
+
+	/* Update MTIMER hartid table */
+	for (i = 0; i < mt->hart_count; i++)
+		mtimer_hartid2data[mt->first_hartid + i] = mt;
+
+	/* Add MTIMER regions to the root domain */
+	for (pos = 0; pos < mt->size; pos += ACLINT_MTIMER_ALIGN) {
+		region_size = ((mt->size - pos) < ACLINT_MTIMER_ALIGN) ?
+			      (mt->size - pos) : ACLINT_MTIMER_ALIGN;
+		sbi_domain_memregion_init(mt->addr + pos, region_size,
+					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+	}
+
+	sbi_timer_set_device(&mtimer);
+
+	return 0;
+}
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index 1b84e926cbc..1d8b1e548c0 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -7,5 +7,6 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+libsbiutils-objs-y += timer/aclint_mtimer.o
 libsbiutils-objs-y += timer/fdt_timer.o
 libsbiutils-objs-y += timer/fdt_timer_clint.o

From 5a049fe1d6a5d1c381113853fce3afad6573bb56 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 13:00:46 +0530
Subject: [PATCH 0796/1765] lib: utils/ipi: Add ACLINT MSWI library

We add common ACLINT MSWI library similar to the CLINT library
so that OpenSBI platforms can use it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/ipi/aclint_mswi.h |  33 +++++++++
 lib/utils/ipi/aclint_mswi.c         | 100 ++++++++++++++++++++++++++++
 lib/utils/ipi/objects.mk            |   1 +
 3 files changed, 134 insertions(+)
 create mode 100644 include/sbi_utils/ipi/aclint_mswi.h
 create mode 100644 lib/utils/ipi/aclint_mswi.c

diff --git a/include/sbi_utils/ipi/aclint_mswi.h b/include/sbi_utils/ipi/aclint_mswi.h
new file mode 100644
index 00000000000..e373a8cbc51
--- /dev/null
+++ b/include/sbi_utils/ipi/aclint_mswi.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __IPI_ACLINT_MSWI_H__
+#define __IPI_ACLINT_MSWI_H__
+
+#include <sbi/sbi_types.h>
+
+#define ACLINT_MSWI_ALIGN		0x1000
+#define ACLINT_MSWI_SIZE		0x4000
+#define ACLINT_MSWI_MAX_HARTS		4095
+
+#define CLINT_MSWI_OFFSET		0x0000
+
+struct aclint_mswi_data {
+	/* Public details */
+	unsigned long addr;
+	unsigned long size;
+	u32 first_hartid;
+	u32 hart_count;
+};
+
+int aclint_mswi_warm_init(void);
+
+int aclint_mswi_cold_init(struct aclint_mswi_data *mswi);
+
+#endif
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
new file mode 100644
index 00000000000..a3de2f552aa
--- /dev/null
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -0,0 +1,100 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_atomic.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_timer.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
+
+static struct aclint_mswi_data *mswi_hartid2data[SBI_HARTMASK_MAX_BITS];
+
+static void mswi_ipi_send(u32 target_hart)
+{
+	u32 *msip;
+	struct aclint_mswi_data *mswi;
+
+	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+		return;
+	mswi = mswi_hartid2data[target_hart];
+	if (!mswi)
+		return;
+
+	/* Set ACLINT IPI */
+	msip = (void *)mswi->addr;
+	writel(1, &msip[target_hart - mswi->first_hartid]);
+}
+
+static void mswi_ipi_clear(u32 target_hart)
+{
+	u32 *msip;
+	struct aclint_mswi_data *mswi;
+
+	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+		return;
+	mswi = mswi_hartid2data[target_hart];
+	if (!mswi)
+		return;
+
+	/* Clear ACLINT IPI */
+	msip = (void *)mswi->addr;
+	writel(0, &msip[target_hart - mswi->first_hartid]);
+}
+
+static struct sbi_ipi_device aclint_mswi = {
+	.name = "aclint-mswi",
+	.ipi_send = mswi_ipi_send,
+	.ipi_clear = mswi_ipi_clear
+};
+
+int aclint_mswi_warm_init(void)
+{
+	/* Clear IPI for current HART */
+	mswi_ipi_clear(current_hartid());
+
+	return 0;
+}
+
+int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
+{
+	u32 i;
+	int rc;
+	unsigned long pos, region_size;
+	struct sbi_domain_memregion reg;
+
+	/* Sanity checks */
+	if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
+	    (mswi->size < ACLINT_MSWI_SIZE) ||
+	    (mswi->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
+	    (mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
+		return SBI_EINVAL;
+
+	/* Update MSWI hartid table */
+	for (i = 0; i < mswi->hart_count; i++)
+		mswi_hartid2data[mswi->first_hartid + i] = mswi;
+
+	/* Add MSWI regions to the root domain */
+	for (pos = 0; pos < mswi->size; pos += ACLINT_MSWI_ALIGN) {
+		region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ?
+			      (mswi->size - pos) : ACLINT_MSWI_ALIGN;
+		sbi_domain_memregion_init(mswi->addr + pos, region_size,
+					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+	}
+
+	sbi_ipi_set_device(&aclint_mswi);
+
+	return 0;
+}
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 00719579d53..7e378167dbc 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -7,5 +7,6 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+libsbiutils-objs-y += ipi/aclint_mswi.o
 libsbiutils-objs-y += ipi/fdt_ipi.o
 libsbiutils-objs-y += ipi/fdt_ipi_clint.o

From bd5d2089b80742a210b257c8e6c1361310725200 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 13:38:38 +0530
Subject: [PATCH 0797/1765] lib: utils: Add FDT parsing API common for both
 ACLINT and CLINT

We add fdt_parse_aclint_node() which can parse both ACLINT and
CLINT DT nodes. This means fdt_parse_clint_node() is not required
anymore so we remove it as well.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  7 +++----
 lib/utils/fdt/fdt_helper.c         | 31 +++++++++++++++---------------
 lib/utils/ipi/fdt_ipi_clint.c      |  5 ++++-
 lib/utils/timer/fdt_timer_clint.c  |  9 ++++++++-
 4 files changed, 30 insertions(+), 22 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index c89f2e68157..871f9b90f7d 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -60,10 +60,9 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 
 int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
-struct clint_data;
-
-int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
-			 struct clint_data *clint);
+int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
+			  unsigned long *out_addr, unsigned long *out_size,
+			  u32 *out_first_hartid, u32 *out_hart_count);
 
 int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
 			  const char *compatible);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 9143e44b39e..de7719622fa 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -14,7 +14,6 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/sys/clint.h>
 
 #define DEFAULT_UART_FREQ		0
 #define DEFAULT_UART_BAUD		115200
@@ -421,8 +420,9 @@ int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 	return fdt_parse_plic_node(fdt, nodeoffset, plic);
 }
 
-int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
-			 struct clint_data *clint)
+int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
+			  unsigned long *out_addr, unsigned long *out_size,
+			  u32 *out_first_hartid, u32 *out_hart_count)
 {
 	const fdt32_t *val;
 	unsigned long reg_addr, reg_size;
@@ -430,22 +430,25 @@ int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
 	u32 phandle, hwirq, hartid, first_hartid, last_hartid;
 	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
 
-	if (nodeoffset < 0 || !clint || !fdt)
-		return SBI_ENODEV;
+	if (nodeoffset < 0 || !fdt ||
+	    !out_addr || !out_size ||
+	    !out_first_hartid || !out_hart_count)
+		return SBI_EINVAL;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
-	clint->addr = reg_addr;
+	*out_addr = reg_addr;
+	*out_size = reg_size;
 
 	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
 	if (!val || count < sizeof(fdt32_t))
-		return SBI_EINVAL;
+		return SBI_ENODEV;
 	count = count / sizeof(fdt32_t);
 
 	first_hartid = -1U;
 	last_hartid = 0;
-	clint->hart_count = 0;
+	*out_hart_count = 0;
 	for (i = 0; i < count; i += 2) {
 		phandle = fdt32_to_cpu(val[i]);
 		hwirq = fdt32_to_cpu(val[i + 1]);
@@ -470,21 +473,17 @@ int fdt_parse_clint_node(void *fdt, int nodeoffset, bool for_timer,
 				first_hartid = hartid;
 			if (hartid > last_hartid)
 				last_hartid = hartid;
-			clint->hart_count++;
+			(*out_hart_count)++;
 		}
 	}
 
 	if ((last_hartid < first_hartid) || first_hartid == -1U)
 		return SBI_ENODEV;
 
-	clint->first_hartid = first_hartid;
+	*out_first_hartid = first_hartid;
 	count = last_hartid - first_hartid + 1;
-	if (clint->hart_count < count)
-		clint->hart_count = count;
-
-	clint->has_64bit_mmio = TRUE;
-	if (fdt_getprop(fdt, nodeoffset, "clint,has-no-64bit-mmio", &count))
-		clint->has_64bit_mmio = FALSE;
+	if (*out_hart_count < count)
+		*out_hart_count = count;
 
 	return 0;
 }
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
index 529f978380d..ce0ca8eca71 100644
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ b/lib/utils/ipi/fdt_ipi_clint.c
@@ -21,15 +21,18 @@ static int ipi_clint_cold_init(void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
+	unsigned long cisize;
 	struct clint_data *ci;
 
 	if (CLINT_IPI_MAX_NR <= clint_ipi_count)
 		return SBI_ENOSPC;
 	ci = &clint_ipi[clint_ipi_count++];
 
-	rc = fdt_parse_clint_node(fdt, nodeoff, FALSE, ci);
+	rc = fdt_parse_aclint_node(fdt, nodeoff, false, &ci->addr, &cisize,
+				   &ci->first_hartid, &ci->hart_count);
 	if (rc)
 		return rc;
+	ci->has_64bit_mmio = false;
 
 	return clint_cold_ipi_init(ci);
 }
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
index 0352e535b5f..63d6586b196 100644
--- a/lib/utils/timer/fdt_timer_clint.c
+++ b/lib/utils/timer/fdt_timer_clint.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <libfdt.h>
 #include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
@@ -21,6 +22,7 @@ static int timer_clint_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
+	unsigned long ctsize;
 	struct clint_data *ct, *ctmaster = NULL;
 
 	if (CLINT_TIMER_MAX_NR <= clint_timer_count)
@@ -29,10 +31,15 @@ static int timer_clint_cold_init(void *fdt, int nodeoff,
 	if (1 < clint_timer_count)
 		ctmaster = &clint_timer[0];
 
-	rc = fdt_parse_clint_node(fdt, nodeoff, TRUE, ct);
+	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &ct->addr, &ctsize,
+				   &ct->first_hartid, &ct->hart_count);
 	if (rc)
 		return rc;
 
+	ct->has_64bit_mmio = true;
+	if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
+		ct->has_64bit_mmio = false;
+
 	return clint_cold_timer_init(ct, ctmaster);
 }
 

From 56fc5f7618b70a83425a764cafd67ffcf3605b5d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 14:43:06 +0530
Subject: [PATCH 0798/1765] lib: utils/ipi: Add FDT based ACLINT MSWI IPI
 driver

We add a new FDT based ACLINT MSWI IPI driver which works for both
CLINT device and standalone ACLINT MSWI device.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/ipi/fdt_ipi.c       |  4 +--
 lib/utils/ipi/fdt_ipi_clint.c | 51 --------------------------
 lib/utils/ipi/fdt_ipi_mswi.c  | 67 +++++++++++++++++++++++++++++++++++
 lib/utils/ipi/objects.mk      |  2 +-
 4 files changed, 70 insertions(+), 54 deletions(-)
 delete mode 100644 lib/utils/ipi/fdt_ipi_clint.c
 create mode 100644 lib/utils/ipi/fdt_ipi_mswi.c

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 3932f509188..ed56e4920f4 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -12,10 +12,10 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 
-extern struct fdt_ipi fdt_ipi_clint;
+extern struct fdt_ipi fdt_ipi_mswi;
 
 static struct fdt_ipi *ipi_drivers[] = {
-	&fdt_ipi_clint
+	&fdt_ipi_mswi
 };
 
 static struct fdt_ipi dummy = {
diff --git a/lib/utils/ipi/fdt_ipi_clint.c b/lib/utils/ipi/fdt_ipi_clint.c
deleted file mode 100644
index ce0ca8eca71..00000000000
--- a/lib/utils/ipi/fdt_ipi_clint.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/sbi_error.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/ipi/fdt_ipi.h>
-#include <sbi_utils/sys/clint.h>
-
-#define CLINT_IPI_MAX_NR			16
-
-static unsigned long clint_ipi_count = 0;
-static struct clint_data clint_ipi[CLINT_IPI_MAX_NR];
-
-static int ipi_clint_cold_init(void *fdt, int nodeoff,
-			       const struct fdt_match *match)
-{
-	int rc;
-	unsigned long cisize;
-	struct clint_data *ci;
-
-	if (CLINT_IPI_MAX_NR <= clint_ipi_count)
-		return SBI_ENOSPC;
-	ci = &clint_ipi[clint_ipi_count++];
-
-	rc = fdt_parse_aclint_node(fdt, nodeoff, false, &ci->addr, &cisize,
-				   &ci->first_hartid, &ci->hart_count);
-	if (rc)
-		return rc;
-	ci->has_64bit_mmio = false;
-
-	return clint_cold_ipi_init(ci);
-}
-
-static const struct fdt_match ipi_clint_match[] = {
-	{ .compatible = "riscv,clint0" },
-	{ .compatible = "sifive,clint0" },
-	{ },
-};
-
-struct fdt_ipi fdt_ipi_clint = {
-	.match_table = ipi_clint_match,
-	.cold_init = ipi_clint_cold_init,
-	.warm_init = clint_warm_ipi_init,
-	.exit = NULL,
-};
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
new file mode 100644
index 00000000000..f119f9ce03f
--- /dev/null
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -0,0 +1,67 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
+
+#define MSWI_MAX_NR			16
+
+static unsigned long mswi_count = 0;
+static struct aclint_mswi_data mswi[MSWI_MAX_NR];
+
+static int ipi_mswi_cold_init(void *fdt, int nodeoff,
+			      const struct fdt_match *match)
+{
+	int rc;
+	unsigned long offset;
+	struct aclint_mswi_data *ms;
+
+	if (MSWI_MAX_NR <= mswi_count)
+		return SBI_ENOSPC;
+	ms = &mswi[mswi_count];
+
+	rc = fdt_parse_aclint_node(fdt, nodeoff, false, &ms->addr, &ms->size,
+				   &ms->first_hartid, &ms->hart_count);
+	if (rc)
+		return rc;
+
+	if (match->data) {
+		/* Adjust MSWI address and size for CLINT device */
+		offset = *((unsigned long *)match->data);
+		ms->addr += offset;
+		if ((ms->size - offset) < ACLINT_MSWI_SIZE)
+			return SBI_EINVAL;
+		ms->size = ACLINT_MSWI_SIZE;
+	}
+
+	rc = aclint_mswi_cold_init(ms);
+	if (rc)
+		return rc;
+
+	mswi_count++;
+	return 0;
+}
+
+static unsigned long clint_offset = CLINT_MSWI_OFFSET;
+
+static const struct fdt_match ipi_mswi_match[] = {
+	{ .compatible = "riscv,clint0", .data = &clint_offset },
+	{ .compatible = "sifive,clint0", .data = &clint_offset },
+	{ .compatible = "riscv,aclint-mswi" },
+	{ },
+};
+
+struct fdt_ipi fdt_ipi_mswi = {
+	.match_table = ipi_mswi_match,
+	.cold_init = ipi_mswi_cold_init,
+	.warm_init = aclint_mswi_warm_init,
+	.exit = NULL,
+};
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 7e378167dbc..129eea85b1e 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -9,4 +9,4 @@
 
 libsbiutils-objs-y += ipi/aclint_mswi.o
 libsbiutils-objs-y += ipi/fdt_ipi.o
-libsbiutils-objs-y += ipi/fdt_ipi_clint.o
+libsbiutils-objs-y += ipi/fdt_ipi_mswi.o

From 03d6bb51ba96a16a8ac9a2fcbaebec9f6c31d900 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 20 May 2021 15:32:46 +0530
Subject: [PATCH 0799/1765] lib: utils/timer: Add FDT based ACLINT MTIMER
 driver

We add a new FDT based ACLINT MTIMER driver which works for
both CLINT device and standalone ACLINT MTIMER device.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/timer/fdt_timer.c        |  4 +-
 lib/utils/timer/fdt_timer_clint.c  | 57 -----------------------
 lib/utils/timer/fdt_timer_mtimer.c | 74 ++++++++++++++++++++++++++++++
 lib/utils/timer/objects.mk         |  2 +-
 4 files changed, 77 insertions(+), 60 deletions(-)
 delete mode 100644 lib/utils/timer/fdt_timer_clint.c
 create mode 100644 lib/utils/timer/fdt_timer_mtimer.c

diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 1fad42c2509..148c05edfb1 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -12,10 +12,10 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
 
-extern struct fdt_timer fdt_timer_clint;
+extern struct fdt_timer fdt_timer_mtimer;
 
 static struct fdt_timer *timer_drivers[] = {
-	&fdt_timer_clint
+	&fdt_timer_mtimer
 };
 
 static struct fdt_timer dummy = {
diff --git a/lib/utils/timer/fdt_timer_clint.c b/lib/utils/timer/fdt_timer_clint.c
deleted file mode 100644
index 63d6586b196..00000000000
--- a/lib/utils/timer/fdt_timer_clint.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <libfdt.h>
-#include <sbi/sbi_error.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/timer/fdt_timer.h>
-#include <sbi_utils/sys/clint.h>
-
-#define CLINT_TIMER_MAX_NR			16
-
-static unsigned long clint_timer_count = 0;
-static struct clint_data clint_timer[CLINT_TIMER_MAX_NR];
-
-static int timer_clint_cold_init(void *fdt, int nodeoff,
-				  const struct fdt_match *match)
-{
-	int rc;
-	unsigned long ctsize;
-	struct clint_data *ct, *ctmaster = NULL;
-
-	if (CLINT_TIMER_MAX_NR <= clint_timer_count)
-		return SBI_ENOSPC;
-	ct = &clint_timer[clint_timer_count++];
-	if (1 < clint_timer_count)
-		ctmaster = &clint_timer[0];
-
-	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &ct->addr, &ctsize,
-				   &ct->first_hartid, &ct->hart_count);
-	if (rc)
-		return rc;
-
-	ct->has_64bit_mmio = true;
-	if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
-		ct->has_64bit_mmio = false;
-
-	return clint_cold_timer_init(ct, ctmaster);
-}
-
-static const struct fdt_match timer_clint_match[] = {
-	{ .compatible = "riscv,clint0" },
-	{ .compatible = "sifive,clint0" },
-	{ },
-};
-
-struct fdt_timer fdt_timer_clint = {
-	.match_table = timer_clint_match,
-	.cold_init = timer_clint_cold_init,
-	.warm_init = clint_warm_timer_init,
-	.exit = NULL,
-};
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
new file mode 100644
index 00000000000..49074287900
--- /dev/null
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -0,0 +1,74 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
+
+#define MTIMER_MAX_NR			16
+
+static unsigned long mtimer_count = 0;
+static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
+
+static int timer_mtimer_cold_init(void *fdt, int nodeoff,
+				  const struct fdt_match *match)
+{
+	int rc;
+	unsigned long offset;
+	struct aclint_mtimer_data *mt, *mtmaster = NULL;
+
+	if (MTIMER_MAX_NR <= mtimer_count)
+		return SBI_ENOSPC;
+	mt = &mtimer[mtimer_count];
+	if (0 < mtimer_count)
+		mtmaster = &mtimer[0];
+
+	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &mt->addr, &mt->size,
+				   &mt->first_hartid, &mt->hart_count);
+	if (rc)
+		return rc;
+	mt->has_64bit_mmio = true;
+
+	if (match->data) {
+		/* Adjust MTIMER address and size for CLINT device */
+		offset = *((unsigned long *)match->data);
+		mt->addr += offset;
+		if ((mt->size - offset) < ACLINT_MTIMER_SIZE)
+			return SBI_EINVAL;
+		mt->size -= offset;
+		/* Parse additional CLINT properties */
+		if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
+			mt->has_64bit_mmio = false;
+	}
+
+	rc = aclint_mtimer_cold_init(mt, mtmaster);
+	if (rc)
+		return rc;
+
+	mtimer_count++;
+	return 0;
+}
+
+static unsigned long clint_offset = CLINT_MTIMER_OFFSET;
+
+static const struct fdt_match timer_mtimer_match[] = {
+	{ .compatible = "riscv,clint0", .data = &clint_offset },
+	{ .compatible = "sifive,clint0", .data = &clint_offset },
+	{ .compatible = "riscv,aclint-mtimer" },
+	{ },
+};
+
+struct fdt_timer fdt_timer_mtimer = {
+	.match_table = timer_mtimer_match,
+	.cold_init = timer_mtimer_cold_init,
+	.warm_init = aclint_mtimer_warm_init,
+	.exit = NULL,
+};
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index 1d8b1e548c0..12cffcf099f 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -9,4 +9,4 @@
 
 libsbiutils-objs-y += timer/aclint_mtimer.o
 libsbiutils-objs-y += timer/fdt_timer.o
-libsbiutils-objs-y += timer/fdt_timer_clint.o
+libsbiutils-objs-y += timer/fdt_timer_mtimer.o

From a731c7e36988c3308e1978ecde491f2f6182d490 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 21 May 2021 16:33:33 +0530
Subject: [PATCH 0800/1765] platform: Replace CLINT library usage with ACLINT
 library

The ACLINT devices are backward compatible with SiFive CLINT
so we replace all CLINT library usage in various platforms
with ACLINT library. As a result of this replacement, the
CLINT library is not used by any part of OpenSBI hence we
remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/sys/clint.h      |  41 -----
 lib/utils/sys/clint.c              | 256 -----------------------------
 lib/utils/sys/objects.mk           |   1 -
 platform/fpga/ariane/platform.c    |  27 ++-
 platform/fpga/openpiton/platform.c |  33 +++-
 platform/kendryte/k210/platform.c  |  23 ++-
 platform/kendryte/k210/platform.h  |   4 +
 platform/nuclei/ux600/platform.c   |  28 +++-
 platform/template/platform.c       |  31 +++-
 9 files changed, 107 insertions(+), 337 deletions(-)
 delete mode 100644 include/sbi_utils/sys/clint.h
 delete mode 100644 lib/utils/sys/clint.c

diff --git a/include/sbi_utils/sys/clint.h b/include/sbi_utils/sys/clint.h
deleted file mode 100644
index 1e2b40b622f..00000000000
--- a/include/sbi_utils/sys/clint.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#ifndef __SYS_CLINT_H__
-#define __SYS_CLINT_H__
-
-#include <sbi/sbi_types.h>
-
-struct clint_data {
-	/* Public details */
-	unsigned long addr;
-	u32 first_hartid;
-	u32 hart_count;
-	bool has_64bit_mmio;
-	/* Private details (initialized and used by CLINT library)*/
-	u32 *ipi;
-	struct clint_data *time_delta_reference;
-	unsigned long time_delta_computed;
-	u64 time_delta;
-	u64 *time_val;
-	u64 *time_cmp;
-	u64 (*time_rd)(volatile u64 *addr);
-	void (*time_wr)(u64 value, volatile u64 *addr);
-};
-
-int clint_warm_ipi_init(void);
-
-int clint_cold_ipi_init(struct clint_data *clint);
-
-int clint_warm_timer_init(void);
-
-int clint_cold_timer_init(struct clint_data *clint,
-			  struct clint_data *reference);
-
-#endif
diff --git a/lib/utils/sys/clint.c b/lib/utils/sys/clint.c
deleted file mode 100644
index e8c2bd9e797..00000000000
--- a/lib/utils/sys/clint.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_atomic.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_domain.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_hartmask.h>
-#include <sbi/sbi_ipi.h>
-#include <sbi/sbi_timer.h>
-#include <sbi_utils/sys/clint.h>
-
-#define CLINT_IPI_OFF		0
-#define CLINT_IPI_SIZE		0x4000
-
-#define CLINT_TIME_CMP_OFF	0x4000
-#define CLINT_TIME_CMP_SIZE	0x4000
-
-#define CLINT_TIME_VAL_OFF	0xbff8
-#define CLINT_TIME_VAL_SIZE	0x4000
-
-static struct clint_data *clint_ipi_hartid2data[SBI_HARTMASK_MAX_BITS];
-
-static void clint_ipi_send(u32 target_hart)
-{
-	struct clint_data *clint;
-
-	if (SBI_HARTMASK_MAX_BITS <= target_hart)
-		return;
-	clint = clint_ipi_hartid2data[target_hart];
-	if (!clint)
-		return;
-
-	/* Set CLINT IPI */
-	writel(1, &clint->ipi[target_hart - clint->first_hartid]);
-}
-
-static void clint_ipi_clear(u32 target_hart)
-{
-	struct clint_data *clint;
-
-	if (SBI_HARTMASK_MAX_BITS <= target_hart)
-		return;
-	clint = clint_ipi_hartid2data[target_hart];
-	if (!clint)
-		return;
-
-	/* Clear CLINT IPI */
-	writel(0, &clint->ipi[target_hart - clint->first_hartid]);
-}
-
-static struct sbi_ipi_device clint_ipi = {
-	.name = "clint",
-	.ipi_send = clint_ipi_send,
-	.ipi_clear = clint_ipi_clear
-};
-
-int clint_warm_ipi_init(void)
-{
-	/* Clear CLINT IPI for current HART */
-	clint_ipi_clear(current_hartid());
-
-	return 0;
-}
-
-int clint_cold_ipi_init(struct clint_data *clint)
-{
-	u32 i;
-	int rc;
-	struct sbi_domain_memregion reg;
-
-	if (!clint)
-		return SBI_EINVAL;
-
-	/* Initialize private data */
-	clint->ipi = (void *)clint->addr;
-
-	/* Update IPI hartid table */
-	for (i = 0; i < clint->hart_count; i++)
-		clint_ipi_hartid2data[clint->first_hartid + i] = clint;
-
-	/* Add CLINT ipi region to the root domain */
-	sbi_domain_memregion_init(clint->addr + CLINT_IPI_OFF,
-				  CLINT_IPI_SIZE,
-				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-	rc = sbi_domain_root_add_memregion(&reg);
-	if (rc)
-		return rc;
-
-	sbi_ipi_set_device(&clint_ipi);
-
-	return 0;
-}
-
-static struct clint_data *clint_timer_hartid2data[SBI_HARTMASK_MAX_BITS];
-
-#if __riscv_xlen != 32
-static u64 clint_time_rd64(volatile u64 *addr)
-{
-	return readq_relaxed(addr);
-}
-
-static void clint_time_wr64(u64 value, volatile u64 *addr)
-{
-	writeq_relaxed(value, addr);
-}
-#endif
-
-static u64 clint_time_rd32(volatile u64 *addr)
-{
-	u32 lo, hi;
-
-	do {
-		hi = readl_relaxed((u32 *)addr + 1);
-		lo = readl_relaxed((u32 *)addr);
-	} while (hi != readl_relaxed((u32 *)addr + 1));
-
-	return ((u64)hi << 32) | (u64)lo;
-}
-
-static void clint_time_wr32(u64 value, volatile u64 *addr)
-{
-	u32 mask = -1U;
-
-	writel_relaxed(value & mask, (void *)(addr));
-	writel_relaxed(value >> 32, (void *)(addr) + 0x04);
-}
-
-static u64 clint_timer_value(void)
-{
-	struct clint_data *clint = clint_timer_hartid2data[current_hartid()];
-
-	/* Read CLINT Time Value */
-	return clint->time_rd(clint->time_val) + clint->time_delta;
-}
-
-static void clint_timer_event_stop(void)
-{
-	u32 target_hart = current_hartid();
-	struct clint_data *clint = clint_timer_hartid2data[target_hart];
-
-	/* Clear CLINT Time Compare */
-	clint->time_wr(-1ULL,
-			&clint->time_cmp[target_hart - clint->first_hartid]);
-}
-
-static void clint_timer_event_start(u64 next_event)
-{
-	u32 target_hart = current_hartid();
-	struct clint_data *clint = clint_timer_hartid2data[target_hart];
-
-	/* Program CLINT Time Compare */
-	clint->time_wr(next_event - clint->time_delta,
-		       &clint->time_cmp[target_hart - clint->first_hartid]);
-}
-
-static struct sbi_timer_device clint_timer = {
-	.name = "clint",
-	.timer_value = clint_timer_value,
-	.timer_event_start = clint_timer_event_start,
-	.timer_event_stop = clint_timer_event_stop
-};
-
-int clint_warm_timer_init(void)
-{
-	u64 v1, v2, mv;
-	u32 target_hart = current_hartid();
-	struct clint_data *reference;
-	struct clint_data *clint = clint_timer_hartid2data[target_hart];
-
-	if (!clint)
-		return SBI_ENODEV;
-
-	/*
-	 * Compute delta if reference available
-	 *
-	 * We deliberately compute time_delta in warm init so that time_delta
-	 * is computed on a HART which is going to use given CLINT. We use
-	 * atomic flag timer_delta_computed to ensure that only one HART does
-	 * time_delta computation.
-	 */
-	if (clint->time_delta_reference) {
-		reference = clint->time_delta_reference;
-		if (!atomic_raw_xchg_ulong(&clint->time_delta_computed, 1)) {
-			v1 = clint->time_rd(clint->time_val);
-			mv = reference->time_rd(reference->time_val);
-			v2 = clint->time_rd(clint->time_val);
-			clint->time_delta = mv - ((v1 / 2) + (v2 / 2));
-		}
-	}
-
-	/* Clear CLINT Time Compare */
-	clint->time_wr(-1ULL,
-		       &clint->time_cmp[target_hart - clint->first_hartid]);
-
-	return 0;
-}
-
-int clint_cold_timer_init(struct clint_data *clint,
-			  struct clint_data *reference)
-{
-	u32 i;
-	int rc;
-	struct sbi_domain_memregion reg;
-
-	if (!clint)
-		return SBI_EINVAL;
-
-	/* Initialize private data */
-	clint->time_delta_reference = reference;
-	clint->time_delta_computed = 0;
-	clint->time_delta = 0;
-	clint->time_val = (u64 *)((void *)clint->addr + CLINT_TIME_VAL_OFF);
-	clint->time_cmp = (u64 *)((void *)clint->addr + CLINT_TIME_CMP_OFF);
-	clint->time_rd = clint_time_rd32;
-	clint->time_wr = clint_time_wr32;
-
-	/* Override read/write accessors for 64bit MMIO */
-#if __riscv_xlen != 32
-	if (clint->has_64bit_mmio) {
-		clint->time_rd = clint_time_rd64;
-		clint->time_wr = clint_time_wr64;
-	}
-#endif
-
-	/* Update timer hartid table */
-	for (i = 0; i < clint->hart_count; i++)
-		clint_timer_hartid2data[clint->first_hartid + i] = clint;
-
-	/* Add CLINT mtime region to the root domain */
-	sbi_domain_memregion_init(clint->addr + CLINT_TIME_VAL_OFF,
-				  CLINT_TIME_VAL_SIZE,
-				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-	rc = sbi_domain_root_add_memregion(&reg);
-	if (rc)
-		return rc;
-
-	/* Add CLINT timecmp region to the root domain */
-	sbi_domain_memregion_init(clint->addr + CLINT_TIME_CMP_OFF,
-				  CLINT_TIME_CMP_SIZE,
-				  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-	rc = sbi_domain_root_add_memregion(&reg);
-	if (rc)
-		return rc;
-
-	sbi_timer_set_device(&clint_timer);
-
-	return 0;
-}
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index 7878ca8b4e2..06be322392b 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -7,6 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += sys/clint.o
 libsbiutils-objs-y += sys/htif.o
 libsbiutils-objs-y += sys/sifive_test.o
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 42e43fab55d..0b47aa030b7 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -12,9 +12,10 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
 
 #define ARIANE_UART_ADDR			0x10000000
 #define ARIANE_UART_FREQ			50000000
@@ -25,14 +26,26 @@
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR			0x2000000
+#define ARIANE_ACLINT_MSWI_ADDR			(ARIANE_CLINT_ADDR + \
+						 CLINT_MSWI_OFFSET)
+#define ARIANE_ACLINT_MTIMER_ADDR		(ARIANE_CLINT_ADDR + \
+						 CLINT_MTIMER_OFFSET)
 
 static struct plic_data plic = {
 	.addr = ARIANE_PLIC_ADDR,
 	.num_src = ARIANE_PLIC_NUM_SOURCES,
 };
 
-static struct clint_data clint = {
-	.addr = ARIANE_CLINT_ADDR,
+static struct aclint_mswi_data mswi = {
+	.addr = ARIANE_ACLINT_MSWI_ADDR,
+	.size = ACLINT_MSWI_SIZE,
+	.first_hartid = 0,
+	.hart_count = ARIANE_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.addr = ARIANE_ACLINT_MTIMER_ADDR,
+	.size = ACLINT_MTIMER_SIZE,
 	.first_hartid = 0,
 	.hart_count = ARIANE_HART_COUNT,
 	.has_64bit_mmio = TRUE,
@@ -123,12 +136,12 @@ static int ariane_ipi_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(&clint);
+		ret = aclint_mswi_cold_init(&mswi);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 /*
@@ -139,12 +152,12 @@ static int ariane_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(&clint, NULL);
+		ret = aclint_mtimer_cold_init(&mtimer, NULL);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 894bfdc2fa4..57ec21b7918 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -12,9 +12,10 @@
 #include <sbi/sbi_platform.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
 
 #define OPENPITON_DEFAULT_UART_ADDR		0xfff0c2c000
 #define OPENPITON_DEFAULT_UART_FREQ		60000000
@@ -25,6 +26,10 @@
 #define OPENPITON_DEFAULT_PLIC_NUM_SOURCES	2
 #define OPENPITON_DEFAULT_HART_COUNT		3
 #define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
+#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR	\
+		(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
+#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR	\
+		(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MTIMER_OFFSET)
 
 static struct platform_uart_data uart = {
 	OPENPITON_DEFAULT_UART_ADDR,
@@ -36,8 +41,16 @@ static struct plic_data plic = {
 	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
 };
 
-static struct clint_data clint = {
-	.addr = OPENPITON_DEFAULT_CLINT_ADDR,
+static struct aclint_mswi_data mswi = {
+	.addr = OPENPITON_DEFAULT_ACLINT_MSWI_ADDR,
+	.size = ACLINT_MSWI_SIZE,
+	.first_hartid = 0,
+	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR,
+	.size = ACLINT_MTIMER_SIZE,
 	.first_hartid = 0,
 	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
 	.has_64bit_mmio = TRUE,
@@ -67,8 +80,10 @@ static int openpiton_early_init(bool cold_boot)
 		plic = plic_data;
 
 	rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
-	if (!rc)
-		clint.addr = clint_addr;
+	if (!rc) {
+		mswi.addr = clint_addr;
+		mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET;
+	}
 
 	return 0;
 }
@@ -149,12 +164,12 @@ static int openpiton_ipi_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(&clint);
+		ret = aclint_mswi_cold_init(&mswi);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 /*
@@ -165,12 +180,12 @@ static int openpiton_timer_init(bool cold_boot)
 	int ret;
 
 	if (cold_boot) {
-		ret = clint_cold_timer_init(&clint, NULL);
+		ret = aclint_mtimer_cold_init(&mtimer, NULL);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 66a0392aa99..55c4b1ee6ef 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -14,9 +14,10 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
 #include "platform.h"
 
 extern const char dt_k210_start[];
@@ -33,8 +34,16 @@ static struct plic_data plic = {
 	.num_src = K210_PLIC_NUM_SOURCES,
 };
 
-static struct clint_data clint = {
-	.addr = K210_CLINT_BASE_ADDR,
+static struct aclint_mswi_data mswi = {
+	.addr = K210_ACLINT_MSWI_ADDR,
+	.size = ACLINT_MSWI_SIZE,
+	.first_hartid = 0,
+	.hart_count = K210_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.addr = K210_ACLINT_MTIMER_ADDR,
+	.size = ACLINT_MTIMER_SIZE,
 	.first_hartid = 0,
 	.hart_count = K210_HART_COUNT,
 	.has_64bit_mmio = TRUE,
@@ -139,12 +148,12 @@ static int k210_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(&clint);
+		rc = aclint_mswi_cold_init(&mswi);
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 static int k210_timer_init(bool cold_boot)
@@ -152,12 +161,12 @@ static int k210_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(&clint, NULL);
+		rc = aclint_mtimer_cold_init(&mtimer, NULL);
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index e425fafe687..0a32530e7a9 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -22,6 +22,10 @@
 #define K210_SYSCTL_BASE_ADDR	0x50440000ULL
 #define K210_UART_BASE_ADDR	0x38000000ULL
 #define K210_CLINT_BASE_ADDR	0x02000000ULL
+#define K210_ACLINT_MSWI_ADDR	\
+		(K210_CLINT_BASE_ADDR + CLINT_MSWI_OFFSET)
+#define K210_ACLINT_MTIMER_ADDR \
+		(K210_CLINT_BASE_ADDR + CLINT_MTIMER_OFFSET)
 #define K210_PLIC_BASE_ADDR	0x0C000000ULL
 
 /* Registers */
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 5414316ca0a..22ca4c9cf5e 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -17,9 +17,10 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
 
 /* clang-format off */
 
@@ -32,6 +33,10 @@
 #define UX600_NUCLEI_TIMER_MSFTRST_KEY	0x80000A5F
 /* The clint compatiable timer offset is 0x1000 against nuclei timer */
 #define UX600_CLINT_TIMER_ADDR		(UX600_NUCLEI_TIMER_ADDR + 0x1000)
+#define UX600_ACLINT_MSWI_ADDR		(UX600_CLINT_TIMER_ADDR + \
+					 CLINT_MSWI_OFFSET)
+#define UX600_ACLINT_MTIMER_ADDR	(UX600_CLINT_TIMER_ADDR + \
+					 CLINT_MTIMER_OFFSET)
 
 #define UX600_PLIC_ADDR			0x8000000
 #define UX600_PLIC_NUM_SOURCES		0x35
@@ -61,12 +66,21 @@ static struct plic_data plic = {
 	.num_src = UX600_PLIC_NUM_SOURCES,
 };
 
-static struct clint_data clint = {
-	.addr = UX600_CLINT_TIMER_ADDR,
+static struct aclint_mswi_data mswi = {
+	.addr = UX600_ACLINT_MSWI_ADDR,
+	.size = ACLINT_MSWI_SIZE,
+	.first_hartid = 0,
+	.hart_count = UX600_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.addr = UX600_ACLINT_MTIMER_ADDR,
+	.size = ACLINT_MTIMER_SIZE,
 	.first_hartid = 0,
 	.hart_count = UX600_HART_COUNT,
 	.has_64bit_mmio = TRUE,
 };
+
 static u32 measure_cpu_freq(u32 n)
 {
 	u32 start_mtime, delta_mtime;
@@ -188,12 +202,12 @@ static int ux600_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(&clint);
+		rc = aclint_mswi_cold_init(&mswi);
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 static int ux600_timer_init(bool cold_boot)
@@ -201,12 +215,12 @@ static int ux600_timer_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_timer_init(&clint, NULL);
+		rc = aclint_mtimer_cold_init(&mtimer, NULL);
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/template/platform.c b/platform/template/platform.c
index d407fd5aa62..3f09d9898eb 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -13,14 +13,19 @@
  * Include these files as needed.
  * See config.mk PLATFORM_xxx configuration parameters.
  */
+#include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
 
 #define PLATFORM_PLIC_ADDR		0xc000000
 #define PLATFORM_PLIC_NUM_SOURCES	128
 #define PLATFORM_HART_COUNT		4
 #define PLATFORM_CLINT_ADDR		0x2000000
+#define PLATFORM_ACLINT_MSWI_ADDR	(PLATFORM_CLINT_ADDR + \
+					 CLINT_MSWI_OFFSET)
+#define PLATFORM_ACLINT_MTIMER_ADDR	(PLATFORM_CLINT_ADDR + \
+					 CLINT_MTIMER_OFFSET)
 #define PLATFORM_UART_ADDR		0x09000000
 #define PLATFORM_UART_INPUT_FREQ	10000000
 #define PLATFORM_UART_BAUDRATE		115200
@@ -30,8 +35,16 @@ static struct plic_data plic = {
 	.num_src = PLATFORM_PLIC_NUM_SOURCES,
 };
 
-static struct clint_data clint = {
-	.addr = PLATFORM_CLINT_ADDR,
+static struct aclint_mswi_data mswi = {
+	.addr = PLATFORM_ACLINT_MSWI_ADDR,
+	.size = ACLINT_MSWI_SIZE,
+	.first_hartid = 0,
+	.hart_count = PLATFORM_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.addr = PLATFORM_ACLINT_MTIMER_ADDR,
+	.size = ACLINT_MTIMER_SIZE,
 	.first_hartid = 0,
 	.hart_count = PLATFORM_HART_COUNT,
 	.has_64bit_mmio = TRUE,
@@ -88,14 +101,14 @@ static int platform_ipi_init(bool cold_boot)
 {
 	int ret;
 
-	/* Example if the generic CLINT driver is used */
+	/* Example if the generic ACLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_ipi_init(&clint);
+		ret = aclint_mswi_cold_init(&mswi);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 /*
@@ -105,14 +118,14 @@ static int platform_timer_init(bool cold_boot)
 {
 	int ret;
 
-	/* Example if the generic CLINT driver is used */
+	/* Example if the generic ACLINT driver is used */
 	if (cold_boot) {
-		ret = clint_cold_timer_init(&clint, NULL);
+		ret = aclint_mtimer_cold_init(&mtimer, NULL);
 		if (ret)
 			return ret;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 /*

From b7f2cd268b639c19f3aae09e57e60d3eb2ac2ed0 Mon Sep 17 00:00:00 2001
From: Green Wan <green.wan@sifive.com>
Date: Thu, 1 Jul 2021 15:39:55 +0800
Subject: [PATCH 0801/1765] lib: utils: reset: unify naming of 'sifive_test'
 device

Unify all the file and function names of 'sifive_test' device, to use
the same prefix. This is also a preparatory patch for upcoming sifive
reset device.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/reset/fdt_reset.c                                   | 4 ++--
 .../reset/{fdt_reset_sifive.c => fdt_reset_sifive_test.c}     | 2 +-
 lib/utils/reset/objects.mk                                    | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)
 rename lib/utils/reset/{fdt_reset_sifive.c => fdt_reset_sifive_test.c} (94%)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 1d687dcb04f..48a49fb5f04 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -12,12 +12,12 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
-extern struct fdt_reset fdt_reset_sifive;
+extern struct fdt_reset fdt_reset_sifive_test;
 extern struct fdt_reset fdt_reset_htif;
 extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
-	&fdt_reset_sifive,
+	&fdt_reset_sifive_test,
 	&fdt_reset_htif,
 	&fdt_reset_thead,
 };
diff --git a/lib/utils/reset/fdt_reset_sifive.c b/lib/utils/reset/fdt_reset_sifive_test.c
similarity index 94%
rename from lib/utils/reset/fdt_reset_sifive.c
rename to lib/utils/reset/fdt_reset_sifive_test.c
index 928dee94dc7..f98f03d8f90 100644
--- a/lib/utils/reset/fdt_reset_sifive.c
+++ b/lib/utils/reset/fdt_reset_sifive_test.c
@@ -30,7 +30,7 @@ static const struct fdt_match sifive_test_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_sifive = {
+struct fdt_reset fdt_reset_sifive_test = {
 	.match_table = sifive_test_reset_match,
 	.init = sifive_test_reset_init,
 };
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index b6619f44f38..672aad9cf04 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -9,6 +9,6 @@
 
 libsbiutils-objs-y += reset/fdt_reset.o
 libsbiutils-objs-y += reset/fdt_reset_htif.o
-libsbiutils-objs-y += reset/fdt_reset_sifive.o
 libsbiutils-objs-y += reset/fdt_reset_thead.o
 libsbiutils-objs-y += reset/fdt_reset_thead_asm.o
+libsbiutils-objs-y += reset/fdt_reset_sifive_test.o

From 197e08941bd394b6b88ad07c5a3adfe67f5b3b10 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 3 Jul 2021 23:09:29 +0800
Subject: [PATCH 0802/1765] docs/platform: thead-c9xx: Remove FW_PIC=y

FW_PIC is on by default. Hence no need to explicitly require it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/thead-c9xx.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index 8f1021aa37f..c0daeb70266 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -16,7 +16,7 @@ The *T-HEAD C9xx* does not have any platform-specific compile options
 because it use generic platform.
 
 ```
-CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make
+CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic /usr/bin/make
 ```
 
 The *T-HEAD C9xx* DTB provided to OpenSBI generic firmwares will usually have

From 17e23b678dac2e4579e714705cec137b351f7e9b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sun, 4 Jul 2021 23:01:13 +0800
Subject: [PATCH 0803/1765] platform: generic: Terminate platform.name with
 null

fw_platform_init() fills platform.name without considering the
ending null character. Fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/generic/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index da0c1af8f92..79d52300a0f 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -85,7 +85,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 	model = fdt_getprop(fdt, root_offset, "model", &len);
 	if (model)
-		sbi_strncpy(platform.name, model, sizeof(platform.name));
+		sbi_strncpy(platform.name, model, sizeof(platform.name) - 1);
 
 	if (generic_plat && generic_plat->features)
 		platform.features = generic_plat->features(generic_plat_match);

From 3e8b31aca988955800d15329f1d4e48b4fbe7233 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:02 -0700
Subject: [PATCH 0804/1765] docs: Add device tree bindings for SBI PMU
 extension

SBI PMU extension requires a firmware to be aware of the event to
counter/mhpmevent mappings supported by the hardware. One approach
is to encode that information in the device tree.

Define a device tree binding that allows a hardware to describe
all the PMU mappings required in concise format.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/pmu_support.md | 79 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 docs/pmu_support.md

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
new file mode 100644
index 00000000000..6533c99f899
--- /dev/null
+++ b/docs/pmu_support.md
@@ -0,0 +1,79 @@
+OpenSBI SBI PMU extension support
+==================================
+SBI PMU extension supports allow supervisor software to configure/start/stop
+any performance counter at anytime. Thus, an user can leverage full
+capability of performance analysis tools such as perf if SBI PMU extension is
+enabled. The OpenSBI implementation makes the following assumptions about the
+hardware platform.
+
+ * MCOUNTINHIBIT CSR must be implemented in the hardware. Otherwise, SBI PMU
+extension will not be enabled.
+
+ * The platform must provide information about PMU event to counter mapping
+via device tree or platform specific hooks. Otherwise, SBI PMU extension will
+not be enabled.
+
+ * The platforms should provide information about the PMU event selector values
+that should be encoded in the expected value of MHPMEVENTx while configuring
+MHPMCOUNTERx for that specific event. This can be done via a device tree or
+platform specific hooks. The exact value to be written to he MHPMEVENTx is
+completely depends on platform. Generic platform writes the zero-extended event_idx
+as the expected value for hardware cache/generic events as suggested by the SBI
+specification.
+
+SBI PMU Device Tree Bindings
+----------------------------
+
+Platforms may choose to describe PMU event selector and event to counter mapping
+values via device tree. The following sections describes the PMU DT node
+bindings in details.
+
+* **compatible** (Mandatory) - The compatible string of SBI PMU device tree node.
+This DT property must have the value **riscv,pmu**.
+
+* **pmu,event-to-mhpmevent**(Optional) - It represents an ONE-to-ONE mapping
+between a PMU event and the event selector value that platform expects to be
+written to the MHPMEVENTx CSR for that event. The mapping is encoded in a
+table format where each row represents an event. The first column represent the
+event idx where the 2nd & 3rd column represent the event selector value that
+should be encoded in the expected value to be written in MHPMEVENTx.
+This property shouldn't encode any raw hardware event.
+
+* **pmu,event-to-mhpmcounters**(Optional) - It represents a MANY-to-MANY
+mapping between a range of events and all the MHPMCOUNTERx in a bitmap format
+that can be used to monitor these range of events. The information is encoded in
+a table format where each row represent a certain range of events and
+corresponding counters. The first column represents starting of the pmu event id
+and 2nd column represents the end of the pmu event id. The third column
+represent a bitmap of all the MHPMCOUNTERx. This property is mandatory if
+event-to-mhpmevent is present. Otherwise, it can be omitted. This property
+shouldn't encode any raw event.
+
+* **pmu,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY
+mapping between a raw event and all the MHPMCOUNTERx in a bitmap format that can
+be used to monitor that raw event. The information is encoded in a table format
+where each raw represent a specific raw event. The first column stores the
+expected event selector value that should be encoded in the expected value to be
+written in MHPMEVENTx. The second column stores a bitmap of all the MHPMCOUNTERx
+that can be used for monitoring the specified event.
+
+*Note:* A platform may choose to provide the mapping between event & counters
+via platform hooks rather than the device tree.
+
+### Example
+
+```
+pmu {
+	compatible 			= "riscv,pmu";
+	interrupts 			= <0x100>;
+	interrupt-parent 			= <&plic>
+	pmu,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>,
+	pmu,event-to-mhpmcounters 	= <0x00001 0x00001 0x00000001>,
+						  <0x00002 0x00002 0x00000004>,
+						  <0x00003 0x0000A 0x00000ff8>,
+						  <0x10000 0x10033 0x000ff000>,
+	pmu,raw-event-to-mhpmcounters 	= <0x0000 0x0002 0x00000f8>,
+					  <0x0000 0x0003 0x00000ff0>,
+};
+
+```

From fde28fadc2603c7c7a4afa7c2e7b96cc7b11d2e2 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:03 -0700
Subject: [PATCH 0805/1765] lib: sbi: Detect mcountinihibit support at runtime

RISC-V ISA specification v1.11 defined mcountinhibit CSR that allows
software to stop any counter from incrementing. The SBI PMU extension
depends on this CSR support in hardware.

Define mcountinhibit as a hart specific feature and detect it at runtime.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  4 +++-
 lib/sbi/sbi_hart.c     | 11 +++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 031c7b08a81..9e317c52008 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -18,8 +18,10 @@ enum sbi_hart_features {
 	SBI_HART_HAS_SCOUNTEREN = (1 << 0),
 	/** Hart has M-mode counter enable */
 	SBI_HART_HAS_MCOUNTEREN = (1 << 1),
+	/** Hart has counter inhibit CSR */
+	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 2),
 	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 2),
+	SBI_HART_HAS_TIME = (1 << 3),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 56878b47624..0bd1db1ab85 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -259,6 +259,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_MCOUNTEREN:
 		fstr = "mcounteren";
 		break;
+	case SBI_HART_HAS_MCOUNTINHIBIT:
+		fstr = "mcountinhibit";
+		break;
 	case SBI_HART_HAS_TIME:
 		fstr = "time";
 		break;
@@ -421,6 +424,14 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 			hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
 	}
 
+	/* Detect if hart supports MCOUNTINHIBIT feature */
+	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
+	if (!trap.cause) {
+		csr_write_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap, val);
+		if (!trap.cause)
+			hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT;
+	}
+
 	/* Detect if hart supports time CSR */
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)

From d3a96cc46989783c2fbb47e11349dbd5d652938d Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:04 -0700
Subject: [PATCH 0806/1765] lib: sbi: Remove stray '\' character

Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 0bd1db1ab85..9c01cf75c0b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -320,7 +320,7 @@ static unsigned long hart_pmp_get_allowed_addr(void)
 	unsigned long val = 0;
 	struct sbi_trap_info trap = {0};
 
-	csr_write_allowed(CSR_PMPADDR0, (ulong)&trap, PMP_ADDR_MASK);			\
+	csr_write_allowed(CSR_PMPADDR0, (ulong)&trap, PMP_ADDR_MASK);
 	if (!trap.cause) {
 		val = csr_read_allowed(CSR_PMPADDR0, (ulong)&trap);
 		if (trap.cause)

From 0829f2bc284c07576a0dc9a569beea2a2d68dc3d Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:05 -0700
Subject: [PATCH 0807/1765] lib: sbi: Detect number of bits implemented in
 mhpmcounter

RISC-V privilege specification allows the implementation to have less
than 64 bits.

Add a function to detect the number of implemented bits in mhpmcounter
dynamically at runtime.

Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  1 +
 lib/sbi/sbi_hart.c     | 48 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 9e317c52008..0c18ef9325b 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -44,6 +44,7 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
 unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
+unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 9c01cf75c0b..e8cd0421b5e 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -33,6 +33,7 @@ struct hart_features {
 	unsigned int pmp_addr_bits;
 	unsigned long pmp_gran;
 	unsigned int mhpm_count;
+	unsigned int mhpm_bits;
 };
 static unsigned long hart_features_offset;
 
@@ -177,6 +178,14 @@ unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch)
 	return hfeatures->pmp_addr_bits;
 }
 
+unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->mhpm_bits;
+}
+
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	struct sbi_domain_memregion *reg;
@@ -330,6 +339,37 @@ static unsigned long hart_pmp_get_allowed_addr(void)
 	return val;
 }
 
+static int hart_pmu_get_allowed_bits(void)
+{
+	unsigned long val = ~(0UL);
+	struct sbi_trap_info trap = {0};
+	int num_bits = 0;
+
+	/**
+	 * It is assumed that platforms will implement same number of bits for
+	 * all the performance counters including mcycle/minstret.
+	 */
+	csr_write_allowed(CSR_MHPMCOUNTER3, (ulong)&trap, val);
+	if (!trap.cause) {
+		val = csr_read_allowed(CSR_MHPMCOUNTER3, (ulong)&trap);
+		if (trap.cause)
+			return 0;
+	}
+	num_bits = __fls(val) + 1;
+#if __riscv_xlen == 32
+	csr_write_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap, val);
+	if (!trap.cause) {
+		val = csr_read_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap);
+		if (trap.cause)
+			return num_bits;
+	}
+	num_bits += __fls(val) + 1;
+
+#endif
+
+	return num_bits;
+}
+
 static void hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
@@ -395,9 +435,17 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 
 	/* Detect number of MHPM counters */
 	__check_csr(CSR_MHPMCOUNTER3, 0, 1UL, mhpm_count, __mhpm_skip);
+	hfeatures->mhpm_bits = hart_pmu_get_allowed_bits();
+
 	__check_csr_4(CSR_MHPMCOUNTER4, 0, 1UL, mhpm_count, __mhpm_skip);
 	__check_csr_8(CSR_MHPMCOUNTER8, 0, 1UL, mhpm_count, __mhpm_skip);
 	__check_csr_16(CSR_MHPMCOUNTER16, 0, 1UL, mhpm_count, __mhpm_skip);
+
+	/**
+	 * No need to check for MHPMCOUNTERH for RV32 as they are expected to be
+	 * implemented if MHPMCOUNTER is implemented.
+	 */
+
 __mhpm_skip:
 
 #undef __check_csr_64

From 9c9b4ad24bf5891272679a6e994c64463db8ca03 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:06 -0700
Subject: [PATCH 0808/1765] lib: sbi: Disable m/scounteren & enable
 mcountinhibit

Currently, all bits in mcountern are enabled unconditionally at boot time.
With SBI PMU extension, all the programmable counters should enabled only
during performance monitoring for a particular event. However, this is done
only if mcountinhibit is implemented because the supervisor mode can not
start/stop any event without mcountinhibit.

Similarly, supervisor should take care enabling scounteren which allows
U-mode to access programmable pmu counters. All the non-programmable ones
(CY, TM, IR) should be enabled in M-mode because some userspace may rely on
builtins such as __builtin_readcyclecounter. Supervisor OS can still disable
them during initial configuration.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 25 +++++++++++++++++++++----
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e8cd0421b5e..6254452e11b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -51,12 +51,29 @@ static void mstatus_init(struct sbi_scratch *scratch)
 
 	csr_write(CSR_MSTATUS, mstatus_val);
 
-	/* Enable user/supervisor use of perf counters */
+	/* Disable user mode usage of all perf counters except default ones (CY, TM, IR) */
 	if (misa_extension('S') &&
 	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
-		csr_write(CSR_SCOUNTEREN, -1);
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
-		csr_write(CSR_MCOUNTEREN, -1);
+		csr_write(CSR_SCOUNTEREN, 7);
+
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+			/**
+			 * Just enable the default counters (CY, TM, IR) because
+			 * some OS (e.g FreeBSD) expect them to be enabled.
+			 *
+			 * All other counters will be enabled at runtime after
+			 * S-mode request.
+			 */
+			csr_write(CSR_MCOUNTEREN, 7);
+		else
+			/* Supervisor mode usage are enabled by default */
+			csr_write(CSR_MCOUNTEREN, -1);
+	}
+
+	/* All programmable counters will start running at runtime after S-mode request */
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
 	/* Disable all interrupts */
 	csr_write(CSR_MIE, 0);

From 41ae63cd0a75474ce380a944d5b4f1fb9b6fd2e0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:07 -0700
Subject: [PATCH 0809/1765] include: Add a list empty check function

Implement a list helper function that checks for empty lists.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_list.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/sbi/sbi_list.h b/include/sbi/sbi_list.h
index 1174ad274c5..b1178dfc9b8 100644
--- a/include/sbi/sbi_list.h
+++ b/include/sbi/sbi_list.h
@@ -43,6 +43,17 @@ static inline void __sbi_list_add(struct sbi_dlist *new,
 	next->prev = new;
 }
 
+/**
+ * Checks if the list is empty or not.
+ * @param head List head
+ *
+ * Retruns TRUE if list is empty, FALSE otherwise.
+ */
+static inline bool sbi_list_empty(struct sbi_dlist *head)
+{
+	return head->next == head;
+}
+
 /**
  * Adds the new node after the given head.
  * @param new New node that needs to be added to list.

From fd9116bd46e59ef8fbeaa147bb102527635615ba Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:08 -0700
Subject: [PATCH 0810/1765] lib: sbi: Remove redundant boot time print
 statement

This patch removes redundant print from sbi_boot_print_hart().

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_init.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e396d95d424..30747776f3b 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -137,8 +137,6 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 		   sbi_hart_pmp_addrbits(scratch));
 	sbi_printf("Boot HART MHPM Count      : %d\n",
 		   sbi_hart_mhpm_count(scratch));
-	sbi_printf("Boot HART MHPM Count      : %d\n",
-		   sbi_hart_mhpm_count(scratch));
 	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }
 

From 49966db30658a3d5070e1a10200bd8c73dab0851 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:09 -0700
Subject: [PATCH 0811/1765] lib: sbi: Use csr_read/write_num to read/update PMU
 counters

Currently, csr_read/write_num functions are used to read/write PMP related
CSRs where CSR value is decided at runtime. Expand this function to include
PMU related CSRs as well.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/riscv_asm.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 8c54c11147e..4c24a513219 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -118,6 +118,21 @@ unsigned long csr_read_num(int csr_num)
 	switch (csr_num) {
 	switchcase_csr_read_16(CSR_PMPCFG0, ret)
 	switchcase_csr_read_64(CSR_PMPADDR0, ret)
+	switchcase_csr_read(CSR_MCYCLE, ret)
+	switchcase_csr_read(CSR_MINSTRET, ret)
+	switchcase_csr_read(CSR_MHPMCOUNTER3, ret)
+	switchcase_csr_read_4(CSR_MHPMCOUNTER4, ret)
+	switchcase_csr_read_8(CSR_MHPMCOUNTER8, ret)
+	switchcase_csr_read_16(CSR_MHPMCOUNTER16, ret)
+#if __riscv_xlen == 32
+	switchcase_csr_read(CSR_MCYCLEH, ret)
+	switchcase_csr_read(CSR_MINSTRETH, ret)
+	switchcase_csr_read(CSR_MHPMCOUNTER3H, ret)
+	switchcase_csr_read_4(CSR_MHPMCOUNTER4H, ret)
+	switchcase_csr_read_8(CSR_MHPMCOUNTER8H, ret)
+	switchcase_csr_read_16(CSR_MHPMCOUNTER16H, ret)
+#endif
+
 	default:
 		break;
 	};
@@ -161,6 +176,26 @@ void csr_write_num(int csr_num, unsigned long val)
 	switch (csr_num) {
 	switchcase_csr_write_16(CSR_PMPCFG0, val)
 	switchcase_csr_write_64(CSR_PMPADDR0, val)
+	switchcase_csr_write(CSR_MCYCLE, val)
+	switchcase_csr_write(CSR_MINSTRET, val)
+	switchcase_csr_write(CSR_MHPMCOUNTER3, val)
+	switchcase_csr_write_4(CSR_MHPMCOUNTER4, val)
+	switchcase_csr_write_8(CSR_MHPMCOUNTER8, val)
+	switchcase_csr_write_16(CSR_MHPMCOUNTER16, val)
+#if __riscv_xlen == 32
+	switchcase_csr_write(CSR_MCYCLEH, val)
+	switchcase_csr_write(CSR_MINSTRETH, val)
+	switchcase_csr_write(CSR_MHPMCOUNTER3H, val)
+	switchcase_csr_write_4(CSR_MHPMCOUNTER4H, val)
+	switchcase_csr_write_8(CSR_MHPMCOUNTER8H, val)
+	switchcase_csr_write_16(CSR_MHPMCOUNTER16H, val)
+#endif
+	switchcase_csr_write(CSR_MCOUNTINHIBIT, val)
+	switchcase_csr_write(CSR_MHPMEVENT3, val)
+	switchcase_csr_write_4(CSR_MHPMEVENT4, val)
+	switchcase_csr_write_8(CSR_MHPMEVENT8, val)
+	switchcase_csr_write_16(CSR_MHPMEVENT16, val)
+
 	default:
 		break;
 	};

From e7cc7a3ab2770b9f40569a84c417afdad59531bc Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:10 -0700
Subject: [PATCH 0812/1765] lib: sbi: Add PMU specific platform hooks

A platform hook to initialize PMU allows platform vendors to provide
their own mechanism to define pmu event-counter mappings in addition
to the DT based approach.

Another platform hook that allows platform vendors customize the
final mhpmevent value configuration.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_platform.h | 39 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index f8074d28db6..4d192f2a0ec 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -89,6 +89,12 @@ struct sbi_platform_operations {
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
 
+	/** Initialize hw performance counters */
+	int (*pmu_init)(void);
+
+	/** Get platform specific mhpmevent value */
+	uint64_t (*pmu_xlate_to_mhpmevent)(uint32_t event_idx, uint64_t data);
+
 	/** Initialize the platform console */
 	int (*console_init)(void);
 
@@ -391,6 +397,39 @@ static inline int sbi_platform_domains_init(const struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Setup hw PMU events for the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_pmu_init(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->pmu_init)
+		return sbi_platform_ops(plat)->pmu_init();
+	return 0;
+}
+
+/**
+ * Get the value to be written in mhpmeventx for event_idx
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param event_idx ID of the PMU event
+ * @param data Additional configuration data passed from supervisor software
+ *
+ * @return expected value by the platform or 0 if platform doesn't know about
+ * the event
+ */
+static inline uint64_t sbi_platform_pmu_xlate_to_mhpmevent(const struct sbi_platform *plat,
+						      uint32_t event_idx, uint64_t data)
+{
+	if (plat && sbi_platform_ops(plat)->pmu_xlate_to_mhpmevent)
+		return sbi_platform_ops(plat)->pmu_xlate_to_mhpmevent(event_idx,
+								      data);
+	return 0;
+}
+
 /**
  * Initialize the platform console
  *

From 13d40f21d588e17a31624ed415f114987b6bd3d0 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:11 -0700
Subject: [PATCH 0813/1765] lib: sbi: Add PMU support

RISC-V SBI v0.3 specification defined a PMU extension to configure/start/stop
the hardware/firmware pmu events.

Implement PMU support in OpenSBI library. The implementation is agnostic of
event to counter mapping & mhpmevent value configuration. That means, it
expects platform hooks will be used to set up the mapping and provide
the mhpmevent value at runtime.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall_interface.h | 138 ++++++-
 include/sbi/sbi_error.h           |   2 +
 include/sbi/sbi_pmu.h             |  73 ++++
 lib/sbi/objects.mk                |   1 +
 lib/sbi/sbi_init.c                |  11 +
 lib/sbi/sbi_pmu.c                 | 620 ++++++++++++++++++++++++++++++
 6 files changed, 844 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi/sbi_pmu.h
 create mode 100644 lib/sbi/sbi_pmu.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 559a33e7ced..70a3bf7abfa 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -28,6 +28,7 @@
 #define SBI_EXT_RFENCE				0x52464E43
 #define SBI_EXT_HSM				0x48534D
 #define SBI_EXT_SRST				0x53525354
+#define SBI_EXT_PMU				0x504D55
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -91,6 +92,139 @@
 #define SBI_SRST_RESET_REASON_NONE	0x0
 #define SBI_SRST_RESET_REASON_SYSFAIL	0x1
 
+/* SBI function IDs for PMU extension */
+#define SBI_EXT_PMU_NUM_COUNTERS	0x0
+#define SBI_EXT_PMU_COUNTER_GET_INFO	0x1
+#define SBI_EXT_PMU_COUNTER_CFG_MATCH	0x2
+#define SBI_EXT_PMU_COUNTER_START	0x3
+#define SBI_EXT_PMU_COUNTER_STOP	0x4
+#define SBI_EXT_PMU_COUNTER_FW_READ	0x5
+
+/** General pmu event codes specified in SBI PMU extension */
+enum sbi_pmu_hw_generic_events_t {
+	SBI_PMU_HW_NO_EVENT			= 0,
+	SBI_PMU_HW_CPU_CYCLES			= 1,
+	SBI_PMU_HW_INSTRUCTIONS			= 2,
+	SBI_PMU_HW_CACHE_REFERENCES		= 3,
+	SBI_PMU_HW_CACHE_MISSES			= 4,
+	SBI_PMU_HW_BRANCH_INSTRUCTIONS		= 5,
+	SBI_PMU_HW_BRANCH_MISSES		= 6,
+	SBI_PMU_HW_BUS_CYCLES			= 7,
+	SBI_PMU_HW_STALLED_CYCLES_FRONTEND	= 8,
+	SBI_PMU_HW_STALLED_CYCLES_BACKEND	= 9,
+	SBI_PMU_HW_REF_CPU_CYCLES		= 10,
+
+	SBI_PMU_HW_GENERAL_MAX,
+};
+
+/**
+ * Generalized hardware cache events:
+ *
+ *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
+ *       { read, write, prefetch } x
+ *       { accesses, misses }
+ */
+enum sbi_pmu_hw_cache_id {
+	SBI_PMU_HW_CACHE_L1D		= 0,
+	SBI_PMU_HW_CACHE_L1I		= 1,
+	SBI_PMU_HW_CACHE_LL		= 2,
+	SBI_PMU_HW_CACHE_DTLB		= 3,
+	SBI_PMU_HW_CACHE_ITLB		= 4,
+	SBI_PMU_HW_CACHE_BPU		= 5,
+	SBI_PMU_HW_CACHE_NODE		= 6,
+
+	SBI_PMU_HW_CACHE_MAX,
+};
+
+enum sbi_pmu_hw_cache_op_id {
+	SBI_PMU_HW_CACHE_OP_READ	= 0,
+	SBI_PMU_HW_CACHE_OP_WRITE	= 1,
+	SBI_PMU_HW_CACHE_OP_PREFETCH	= 2,
+
+	SBI_PMU_HW_CACHE_OP_MAX,
+};
+
+enum sbi_pmu_hw_cache_op_result_id {
+	SBI_PMU_HW_CACHE_RESULT_ACCESS	= 0,
+	SBI_PMU_HW_CACHE_RESULT_MISS	= 1,
+
+	SBI_PMU_HW_CACHE_RESULT_MAX,
+};
+
+/**
+ * Special "firmware" events provided by the OpenSBI, even if the hardware
+ * does not support performance events. These events are encoded as a raw
+ * event type in Linux kernel perf framework.
+ */
+enum sbi_pmu_fw_event_code_id {
+	SBI_PMU_FW_MISALIGNED_LOAD	= 0,
+	SBI_PMU_FW_MISALIGNED_STORE	= 1,
+	SBI_PMU_FW_ACCESS_LOAD		= 2,
+	SBI_PMU_FW_ACCESS_STORE		= 3,
+	SBI_PMU_FW_ILLEGAL_INSN		= 4,
+	SBI_PMU_FW_SET_TIMER		= 5,
+	SBI_PMU_FW_IPI_SENT		= 6,
+	SBI_PMU_FW_IPI_RECVD		= 7,
+	SBI_PMU_FW_FENCE_I_SENT		= 8,
+	SBI_PMU_FW_FENCE_I_RECVD	= 9,
+	SBI_PMU_FW_SFENCE_VMA_SENT	= 10,
+	SBI_PMU_FW_SFENCE_VMA_RCVD	= 11,
+	SBI_PMU_FW_SFENCE_VMA_ASID_SENT	= 12,
+	SBI_PMU_FW_SFENCE_VMA_ASID_RCVD	= 13,
+
+	SBI_PMU_FW_HFENCE_GVMA_SENT	= 14,
+	SBI_PMU_FW_HFENCE_GVMA_RCVD	= 15,
+	SBI_PMU_FW_HFENCE_GVMA_VMID_SENT = 16,
+	SBI_PMU_FW_HFENCE_GVMA_VMID_RCVD = 17,
+
+	SBI_PMU_FW_HFENCE_VVMA_SENT	= 18,
+	SBI_PMU_FW_HFENCE_VVMA_RCVD	= 19,
+	SBI_PMU_FW_HFENCE_VVMA_ASID_SENT = 20,
+	SBI_PMU_FW_HFENCE_VVMA_ASID_RCVD = 21,
+	SBI_PMU_FW_MAX,
+};
+
+/** SBI PMU event idx type */
+enum sbi_pmu_event_type_id {
+	SBI_PMU_EVENT_TYPE_HW				= 0x0,
+	SBI_PMU_EVENT_TYPE_HW_CACHE			= 0x1,
+	SBI_PMU_EVENT_TYPE_HW_RAW			= 0x2,
+	SBI_PMU_EVENT_TYPE_FW				= 0xf,
+	SBI_PMU_EVENT_TYPE_MAX,
+};
+
+/** SBI PMU counter type */
+enum sbi_pmu_ctr_type {
+	SBI_PMU_CTR_TYPE_HW = 0,
+	SBI_PMU_CTR_TYPE_FW,
+};
+
+/* Helper macros to decode event idx */
+#define SBI_PMU_EVENT_IDX_OFFSET 20
+#define SBI_PMU_EVENT_IDX_MASK 0xFFFFF
+#define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF
+#define SBI_PMU_EVENT_IDX_TYPE_MASK 0xF0000
+#define SBI_PMU_EVENT_RAW_IDX 0x20000
+
+#define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF
+
+/* Flags defined for config matching function */
+#define SBI_PMU_CFG_FLAG_SKIP_MATCH	(1 << 0)
+#define SBI_PMU_CFG_FLAG_CLEAR_VALUE	(1 << 1)
+#define SBI_PMU_CFG_FLAG_AUTO_START	(1 << 2)
+#define SBI_PMU_CFG_FLAG_SET_VUINH	(1 << 3)
+#define SBI_PMU_CFG_FLAG_SET_VSINH	(1 << 4)
+#define SBI_PMU_CFG_FLAG_SET_UINH	(1 << 5)
+#define SBI_PMU_CFG_FLAG_SET_SINH	(1 << 6)
+#define SBI_PMU_CFG_FLAG_SET_MINH	(1 << 7)
+
+/* Flags defined for counter start function */
+#define SBI_PMU_START_FLAG_SET_INIT_VALUE (1 << 0)
+
+/* Flags defined for counter stop function */
+#define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+
+/* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
 #define SBI_SPEC_VERSION_MINOR_MASK		0xffffff
@@ -107,8 +241,10 @@
 #define SBI_ERR_DENIED				-4
 #define SBI_ERR_INVALID_ADDRESS			-5
 #define SBI_ERR_ALREADY_AVAILABLE		-6
+#define SBI_ERR_ALREADY_STARTED			-7
+#define SBI_ERR_ALREADY_STOPPED			-8
 
-#define SBI_LAST_ERR				SBI_ERR_ALREADY_AVAILABLE
+#define SBI_LAST_ERR				SBI_ERR_ALREADY_STOPPED
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 3655d122006..dd65e14b6fc 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -21,6 +21,8 @@
 #define SBI_EDENIED		SBI_ERR_DENIED
 #define SBI_EINVALID_ADDR	SBI_ERR_INVALID_ADDRESS
 #define SBI_EALREADY		SBI_ERR_ALREADY_AVAILABLE
+#define SBI_EALREADY_STARTED	SBI_ERR_ALREADY_STARTED
+#define SBI_EALREADY_STOPPED	SBI_ERR_ALREADY_STOPPED
 
 #define SBI_ENODEV		-1000
 #define SBI_ENOSYS		-1001
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
new file mode 100644
index 00000000000..b3010cc5c1c
--- /dev/null
+++ b/include/sbi/sbi_pmu.h
@@ -0,0 +1,73 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __SBI_PMU_H__
+#define __SBI_PMU_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_ecall_interface.h>
+
+/* Event related macros */
+/* Maximum number of hardware events that can mapped by OpenSBI */
+#define SBI_PMU_HW_EVENT_MAX 64
+
+/* Maximum number of firmware events that can mapped by OpenSBI */
+#define SBI_PMU_FW_EVENT_MAX 32
+
+/* Counter related macros */
+#define SBI_PMU_FW_CTR_MAX 16
+#define SBI_PMU_HW_CTR_MAX 32
+#define SBI_PMU_CTR_MAX	   (SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX)
+
+/** Initialize PMU */
+int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot);
+
+/** Reset PMU during hart exit */
+void sbi_pmu_exit(struct sbi_scratch *scratch);
+
+/**
+ * Add the hardware event to counter mapping information. This should be called
+ * from the platform code to update the mapping table.
+ * @param eidx_start Start of the event idx range for supported counters
+ * @param eidx_end   End of the event idx range for supported counters
+ * @param cmap       A bitmap representing counters supporting the event range
+ * @return 0 on success, error otherwise.
+ */
+int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap);
+
+/**
+ * Add the raw hardware event selector and supported counter information. This
+ * should be called from the platform code to update the mapping table.
+ * @param info  a pointer to the hardware event info
+ * @return 0 on success, error otherwise.
+ */
+
+int sbi_pmu_add_raw_event_counter_map(uint64_t select, u32 cmap);
+
+int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval);
+
+int sbi_pmu_ctr_stop(unsigned long cidx_base, unsigned long cidx_mask,
+		     unsigned long flag);
+
+int sbi_pmu_ctr_start(unsigned long cidx_base, unsigned long cidx_mask,
+		      unsigned long flags, uint64_t ival);
+
+int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info);
+
+unsigned long sbi_pmu_num_ctr(void);
+
+int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
+			  unsigned long flags, unsigned long event_idx,
+			  uint64_t event_data);
+
+int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 6f2c06f5b50..d9068b70785 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -33,6 +33,7 @@ libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
 libsbi-objs-y += sbi_misaligned_ldst.o
 libsbi-objs-y += sbi_platform.o
+libsbi-objs-y += sbi_pmu.o
 libsbi-objs-y += sbi_scratch.o
 libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_system.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 30747776f3b..6ef8742a949 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -19,6 +19,7 @@
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_timer.h>
@@ -251,6 +252,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_pmu_init(scratch, TRUE);
+	if (rc)
+		sbi_hart_hang();
+
 	sbi_boot_print_banner(scratch);
 
 	rc = sbi_platform_irqchip_init(plat, TRUE);
@@ -352,6 +357,10 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_pmu_init(scratch, FALSE);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_platform_irqchip_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();
@@ -515,6 +524,8 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_platform_early_exit(plat);
 
+	sbi_pmu_exit(scratch);
+
 	sbi_timer_exit(scratch);
 
 	sbi_ipi_exit(scratch);
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
new file mode 100644
index 00000000000..d01e248fb47
--- /dev/null
+++ b/lib/sbi/sbi_pmu.c
@@ -0,0 +1,620 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+
+/** Information about hardware counters */
+struct sbi_pmu_hw_event {
+	uint32_t counters;
+	uint32_t start_idx;
+	uint32_t end_idx;
+	/* Event selector value used only for raw events */
+	uint64_t select;
+};
+
+/** Representation of a firmware event */
+struct sbi_pmu_fw_event {
+	/* Event associated with the particular counter */
+	uint32_t event_idx;
+
+	/* Current value of the counter */
+	unsigned long curr_count;
+
+	/* A flag indicating pmu event monitoring is started */
+	bool bStarted;
+};
+
+/* Information about PMU counters as per SBI specification */
+union sbi_pmu_ctr_info {
+	unsigned long value;
+	struct {
+		unsigned long csr:12;
+		unsigned long width:6;
+#if __riscv_xlen == 32
+		unsigned long reserved:13;
+#else
+		unsigned long reserved:45;
+#endif
+		unsigned long type:1;
+	};
+};
+
+/* Mapping between event range and possible counters  */
+static struct sbi_pmu_hw_event hw_event_map[SBI_PMU_HW_EVENT_MAX] = {0};
+
+/* counter to enabled event mapping */
+static uint32_t active_events[SBI_HARTMASK_MAX_BITS][SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX];
+
+/* Contains all the information about firmwares events */
+static struct sbi_pmu_fw_event fw_event_map[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_EVENT_MAX] = {0};
+
+/* Maximum number of hardware events available */
+static uint32_t num_hw_events;
+/* Maximum number of hardware counters available */
+static uint32_t num_hw_ctrs;
+
+/* Maximum number of counters available */
+static uint32_t total_ctrs;
+
+/* Helper macros to retrieve event idx and code type */
+#define get_cidx_type(x) ((x & SBI_PMU_EVENT_IDX_TYPE_MASK) >> 16)
+#define get_cidx_code(x) (x & SBI_PMU_EVENT_IDX_CODE_MASK)
+
+/**
+ * Perform a sanity check on event & counter mappings with event range overlap check
+ * @param evtA Pointer to the existing hw event structure
+ * @param evtB Pointer to the new hw event structure
+ *
+ * Return FALSE if the range doesn't overlap, TRUE otherwise
+ */
+static bool pmu_event_range_overlap(struct sbi_pmu_hw_event *evtA,
+				    struct sbi_pmu_hw_event *evtB)
+{
+	/* check if the range of events overlap with a previous entry */
+	if (((evtA->end_idx < evtB->start_idx) && (evtA->end_idx < evtB->end_idx)) ||
+	   ((evtA->start_idx > evtB->start_idx) && (evtA->start_idx > evtB->end_idx)))
+		return FALSE;
+	return TRUE;
+}
+
+static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
+				     uint64_t select_val)
+{
+	if (evt->select == select_val)
+		return TRUE;
+
+	return FALSE;
+}
+
+static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code)
+{
+	uint32_t event_idx_val;
+	uint32_t event_idx_type;
+	u32 hartid = current_hartid();
+
+	event_idx_val = active_events[hartid][cidx];
+
+	if (cidx >= total_ctrs || (event_idx_val == SBI_PMU_EVENT_IDX_INVALID))
+		return SBI_EINVAL;
+
+	event_idx_type = get_cidx_type(event_idx_val);
+	if (event_idx_type >= SBI_PMU_EVENT_TYPE_MAX)
+		return SBI_EINVAL;
+
+	*event_idx_code = get_cidx_code(event_idx_val);
+
+	return event_idx_type;
+}
+
+static int pmu_ctr_read_fw(uint32_t cidx, unsigned long *cval,
+			       uint32_t fw_evt_code)
+{
+	u32 hartid = current_hartid();
+	struct sbi_pmu_fw_event fevent;
+
+	fevent = fw_event_map[hartid][fw_evt_code];
+	*cval = fevent.curr_count;
+
+	return 0;
+}
+
+/* Add a hardware counter read for completeness for future purpose */
+static int pmu_ctr_read_hw(uint32_t cidx, uint64_t *cval)
+{
+	/* Check for invalid hw counter read requests */
+	if (unlikely(cidx == 1))
+		return SBI_EINVAL;
+#if __riscv_xlen == 32
+	uint32_t temp, temph = 0;
+
+	temp = csr_read_num(CSR_MCYCLE + cidx);
+	temph = csr_read_num(CSR_MCYCLEH + cidx);
+	*cval = ((uint64_t)temph << 32) | temp;
+#else
+	*cval = csr_read_num(CSR_MCYCLE + cidx);
+#endif
+
+	return 0;
+}
+
+int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval)
+{
+	int event_idx_type;
+	uint32_t event_code;
+	uint64_t cval64;
+
+	event_idx_type = pmu_ctr_validate(cidx, &event_code);
+	if (event_idx_type < 0)
+		return SBI_EINVAL;
+	else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
+		pmu_ctr_read_fw(cidx, cval, event_code);
+	else
+		pmu_ctr_read_hw(cidx, &cval64);
+
+	return 0;
+}
+
+static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
+				uint64_t select)
+{
+	int i = 0;
+	bool is_overlap;
+	struct sbi_pmu_hw_event *event = &hw_event_map[num_hw_events];
+
+	/* The first two counters are reserved by priv spec */
+	if ((eidx_start == SBI_PMU_HW_CPU_CYCLES && cmap != 0x1) ||
+	    (eidx_start == SBI_PMU_HW_INSTRUCTIONS && cmap != 0x4) ||
+	    (eidx_start > SBI_PMU_HW_INSTRUCTIONS && (cmap & 0x07)))
+		return SBI_EDENIED;
+
+	if (num_hw_events >= SBI_PMU_HW_EVENT_MAX - 1) {
+		sbi_printf("Can not handle more than %d perf events\n",
+			    SBI_PMU_HW_EVENT_MAX);
+		return SBI_EFAIL;
+	}
+
+	event->start_idx = eidx_start;
+	event->end_idx = eidx_end;
+	event->counters = cmap;
+	event->select = select;
+
+	/* Sanity check */
+	for (i = 0; i < num_hw_events; i++) {
+		if (eidx_start == SBI_PMU_EVENT_RAW_IDX)
+		/* All raw events have same event idx. Just do sanity check on select */
+			is_overlap = pmu_event_select_overlap(&hw_event_map[i], select);
+		else
+			is_overlap = pmu_event_range_overlap(&hw_event_map[i], event);
+		if (is_overlap)
+			return SBI_EINVALID_ADDR;
+	}
+	num_hw_events++;
+
+	return 0;
+}
+
+/**
+ * Logical counter ids are assigned to hardware counters are assigned consecutively.
+ * E.g. counter0 must count MCYCLE where counter2 must count minstret. Similarly,
+ * counterX will mhpmcounterX.
+ */
+int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap)
+{
+	if ((eidx_start > eidx_end) || eidx_start == SBI_PMU_EVENT_RAW_IDX ||
+	     eidx_end == SBI_PMU_EVENT_RAW_IDX)
+		return SBI_EINVAL;
+
+	return pmu_add_hw_event_map(eidx_start, eidx_end, cmap, 0);
+}
+
+int sbi_pmu_add_raw_event_counter_map(uint64_t select, u32 cmap)
+{
+	return pmu_add_hw_event_map(SBI_PMU_EVENT_RAW_IDX,
+				    SBI_PMU_EVENT_RAW_IDX, cmap, select);
+}
+
+static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
+{
+#if __riscv_xlen == 32
+	csr_write_num(CSR_MCYCLE + cidx, 0);
+	csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFF);
+	csr_write_num(CSR_MCYCLEH + cidx, ival >> BITS_PER_LONG);
+#else
+	csr_write_num(CSR_MCYCLE + cidx, ival);
+#endif
+}
+
+static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
+{
+	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
+	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+
+	/* Make sure the counter index lies within the range and is not TM bit */
+	if (cidx > num_hw_ctrs || cidx == 1)
+		return SBI_EINVAL;
+
+	if (__test_bit(cidx, &mctr_en) && !__test_bit(cidx, &mctr_inhbt))
+		return SBI_EALREADY_STARTED;
+
+	__set_bit(cidx, &mctr_en);
+	__clear_bit(cidx, &mctr_inhbt);
+
+	if (ival_update)
+		pmu_ctr_write_hw(cidx, ival);
+
+	csr_write(CSR_MCOUNTEREN, mctr_en);
+	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
+
+	return 0;
+}
+
+static int pmu_ctr_start_fw(uint32_t cidx, uint32_t fw_evt_code,
+			    uint64_t ival, bool ival_update)
+{
+	u32 hartid = current_hartid();
+	struct sbi_pmu_fw_event *fevent;
+
+	fevent = &fw_event_map[hartid][fw_evt_code];
+	if (ival_update)
+		fevent->curr_count = ival;
+	fevent->bStarted = TRUE;
+
+	return 0;
+}
+
+int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
+		      unsigned long flags, uint64_t ival)
+{
+	int event_idx_type;
+	uint32_t event_code;
+	unsigned long ctr_mask = cmask << cbase;
+	int ret = SBI_EINVAL;
+	bool bUpdate = FALSE;
+
+	if (__fls(ctr_mask) >= total_ctrs)
+		return ret;
+
+	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
+		bUpdate = TRUE;
+
+	for_each_set_bit_from(cbase, &ctr_mask, total_ctrs) {
+		event_idx_type = pmu_ctr_validate(cbase, &event_code);
+		if (event_idx_type < 0)
+			/* Continue the start operation for other counters */
+			continue;
+		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
+			ret = pmu_ctr_start_fw(cbase, event_code, ival, bUpdate);
+		else
+			ret = pmu_ctr_start_hw(cbase, ival, bUpdate);
+	}
+
+	return ret;
+}
+
+static int pmu_ctr_stop_hw(uint32_t cidx)
+{
+	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
+	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+
+	/* Make sure the counter index lies within the range and is not TM bit */
+	if (cidx > num_hw_ctrs || cidx == 1)
+		return SBI_EINVAL;
+
+	if (__test_bit(cidx, &mctr_en) && !__test_bit(cidx, &mctr_inhbt)) {
+		__set_bit(cidx, &mctr_inhbt);
+		__clear_bit(cidx, &mctr_en);
+		csr_write(CSR_MCOUNTEREN, mctr_en);
+		csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
+		return 0;
+	} else
+		return SBI_EALREADY_STOPPED;
+}
+
+static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t fw_evt_code)
+{
+	u32 hartid = current_hartid();
+
+	fw_event_map[hartid][fw_evt_code].bStarted = FALSE;
+
+	return 0;
+}
+
+int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
+		     unsigned long flag)
+{
+	u32 hartid = current_hartid();
+	int ret = SBI_EINVAL;
+	int event_idx_type;
+	uint32_t event_code;
+	unsigned long ctr_mask = cmask << cbase;
+
+	if (__fls(ctr_mask) >= total_ctrs)
+		return SBI_EINVAL;
+
+	for_each_set_bit_from(cbase, &ctr_mask, total_ctrs) {
+		event_idx_type = pmu_ctr_validate(cbase, &event_code);
+		if (event_idx_type < 0)
+			/* Continue the stop operation for other counters */
+			continue;
+
+		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
+			ret = pmu_ctr_stop_fw(cbase, event_code);
+		else
+			ret = pmu_ctr_stop_hw(cbase);
+
+		if (!ret && (flag & SBI_PMU_STOP_FLAG_RESET))
+			active_events[hartid][cbase] = SBI_PMU_EVENT_IDX_INVALID;
+	}
+
+	return ret;
+}
+
+static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
+				    unsigned long eindex, uint64_t data)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	uint64_t mhpmevent_val;
+
+	/* Get the final mhpmevent value to be written from platform */
+	mhpmevent_val = sbi_platform_pmu_xlate_to_mhpmevent(plat, eindex, data);
+
+	if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return SBI_EFAIL;
+
+	/* TODO: The upper 8 bits of mhpmevent is reserved by sscofpmf extension.
+	 * Update those bits based on the flags received from supervisor.
+	 * The OVF bit also should be cleared here in case it was not cleared
+	 * during event stop.
+	 */
+	csr_write_num(CSR_MCOUNTINHIBIT + ctr_idx, mhpmevent_val);
+
+	return 0;
+}
+
+static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask,
+			   unsigned long event_idx, uint64_t data)
+{
+	unsigned long ctr_mask;
+	int i, ret = 0, ctr_idx = SBI_ENOTSUPP;
+	struct sbi_pmu_hw_event *temp;
+	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
+	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+	int evt_idx_code = get_cidx_code(event_idx);
+
+	if (cbase > num_hw_ctrs)
+		return SBI_EINVAL;
+
+	/* Non-programmables counters are enabled always. No need to do lookup */
+	if (evt_idx_code == SBI_PMU_HW_CPU_CYCLES)
+		return 0;
+	else if (evt_idx_code == SBI_PMU_HW_INSTRUCTIONS)
+		return 2;
+
+	for (i = 0; i < num_hw_events; i++) {
+		temp = &hw_event_map[i];
+		if ((temp->start_idx > event_idx && event_idx < temp->end_idx) ||
+		    (temp->start_idx < event_idx && event_idx > temp->end_idx))
+			continue;
+
+		/* For raw events, event data is used as the select value */
+		if ((event_idx == SBI_PMU_EVENT_RAW_IDX) && temp->select != data)
+			continue;
+
+		ctr_mask = temp->counters & (cmask << cbase);
+		for_each_set_bit_from(cbase, &ctr_mask, SBI_PMU_HW_CTR_MAX) {
+			if (!__test_bit(cbase, &mctr_en) &&
+			    __test_bit(cbase, &mctr_inhbt)) {
+				ctr_idx = cbase;
+				break;
+			}
+		}
+	}
+
+	if (ctr_idx == SBI_ENOTSUPP)
+		return SBI_EFAIL;
+
+	ret = pmu_update_hw_mhpmevent(temp, ctr_idx, event_idx, data);
+
+	if (!ret)
+		ret = ctr_idx;
+
+	return ret;
+}
+
+
+/**
+ * Any firmware counter can map to any firmware event.
+ * Thus, select the first available fw counter after sanity
+ * check.
+ */
+static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask, u32 hartid)
+{
+	int i = 0;
+	int fw_base;
+	unsigned long ctr_mask = cmask << cbase;
+
+	if (cbase <= num_hw_ctrs)
+		fw_base = num_hw_ctrs + 1;
+	else
+		fw_base = cbase;
+
+	for (i = fw_base; i < total_ctrs; i++)
+		if ((active_events[hartid][i] == SBI_PMU_EVENT_IDX_INVALID) &&
+		    ((1UL << i) & ctr_mask))
+			return i;
+
+	return SBI_ENOTSUPP;
+}
+
+int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
+			  unsigned long flags, unsigned long event_idx,
+			  uint64_t event_data)
+{
+	int ctr_idx = SBI_ENOTSUPP;
+	u32 hartid = current_hartid();
+	int event_type = get_cidx_type(event_idx);
+	struct sbi_pmu_fw_event *fevent;
+	uint32_t fw_evt_code;
+	unsigned long tmp = cidx_mask << cidx_base;
+
+	/* Do a basic sanity check of counter base & mask */
+	if (__fls(tmp) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
+		return SBI_EINVAL;
+
+	if (flags & SBI_PMU_CFG_FLAG_SKIP_MATCH) {
+		/* The caller wants to skip the match because it already knows the
+		 * counter idx for the given event. Verify that the counter idx
+		 * is still valid.
+		 */
+		if (active_events[hartid][cidx_base] == SBI_PMU_EVENT_IDX_INVALID)
+			return SBI_EINVAL;
+		ctr_idx = cidx_base;
+		goto skip_match;
+	}
+
+	if (event_type == SBI_PMU_EVENT_TYPE_FW) {
+		/* Any firmware counter can be used track any firmware event */
+		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, hartid);
+	} else {
+		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, event_idx, event_data);
+	}
+
+	if (ctr_idx < 0)
+		return SBI_ENOTSUPP;
+
+	active_events[hartid][ctr_idx] = event_idx;
+skip_match:
+	if (event_type == SBI_PMU_EVENT_TYPE_HW) {
+		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
+			pmu_ctr_write_hw(ctr_idx, 0);
+		if (flags & SBI_PMU_CFG_FLAG_AUTO_START)
+			pmu_ctr_start_hw(ctr_idx, 0, false);
+	} else if (event_type == SBI_PMU_EVENT_TYPE_FW) {
+		fw_evt_code = get_cidx_code(event_idx);
+		fevent = &fw_event_map[hartid][fw_evt_code];
+		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
+			fevent->curr_count = 0;
+		if (flags & SBI_PMU_CFG_FLAG_AUTO_START)
+			fevent->bStarted = TRUE;
+	}
+
+	return ctr_idx;
+}
+
+inline int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
+{
+	u32 hartid = current_hartid();
+	struct sbi_pmu_fw_event *fevent;
+
+	if (unlikely(fw_id >= SBI_PMU_FW_MAX))
+		return SBI_EINVAL;
+
+	fevent = &fw_event_map[hartid][fw_id];
+
+	/* PMU counters will be only enabled during performance debugging */
+	if (unlikely(fevent->bStarted))
+		fevent->curr_count++;
+
+	return 0;
+}
+
+unsigned long sbi_pmu_num_ctr(void)
+{
+	return (num_hw_ctrs + SBI_PMU_FW_CTR_MAX);
+}
+
+int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
+{
+	union sbi_pmu_ctr_info cinfo = {0};
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	/* Sanity check. Counter1 is not mapped at all */
+	if (cidx >= total_ctrs || cidx == 1)
+		return SBI_EINVAL;
+
+	/* We have 31 HW counters with 31 being the last index(MHPMCOUNTER31) */
+	if (cidx <= num_hw_ctrs) {
+		cinfo.type = SBI_PMU_CTR_TYPE_HW;
+		cinfo.csr = CSR_CYCLE + cidx;
+		/* mcycle & minstret are always 64 bit */
+		if (cidx == 0 || cidx == 2)
+			cinfo.width = 63;
+		else
+			cinfo.width = sbi_hart_mhpm_bits(scratch);
+	} else {
+		/* it's a firmware counter */
+		cinfo.type = SBI_PMU_CTR_TYPE_FW;
+		/* Firmware counters are XLEN bits wide */
+		cinfo.width = BITS_PER_LONG - 1;
+	}
+
+	*ctr_info = cinfo.value;
+
+	return 0;
+}
+
+static void pmu_reset_event_map(u32 hartid)
+{
+	int j;
+
+	/* Initialize the counter to event mapping table */
+	for (j = 3; j < total_ctrs; j++)
+		active_events[hartid][j] = SBI_PMU_EVENT_IDX_INVALID;
+	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
+		sbi_memset(&fw_event_map[hartid][j], 0,
+			   sizeof(struct sbi_pmu_fw_event));
+}
+
+void sbi_pmu_exit(struct sbi_scratch *scratch)
+{
+	u32 hartid = current_hartid();
+
+	csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
+	csr_write(CSR_MCOUNTEREN, 7);
+	pmu_reset_event_map(hartid);
+}
+
+int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
+{
+	const struct sbi_platform *plat;
+	u32 hartid = current_hartid();
+
+	/* SBI PMU is not supported if mcountinhibit is not available */
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		return 0;
+
+	if (cold_boot) {
+		plat = sbi_platform_ptr(scratch);
+		/* Initialize hw pmu events */
+		sbi_platform_pmu_init(plat);
+
+		/* mcycle & minstret is available always */
+		num_hw_ctrs = sbi_hart_mhpm_count(scratch) + 2;
+		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
+	}
+
+	pmu_reset_event_map(hartid);
+
+	/* First three counters are fixed by the priv spec and we enable it by default */
+	active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET |
+				   SBI_PMU_HW_CPU_CYCLES;
+	active_events[hartid][1] = SBI_PMU_EVENT_IDX_INVALID;
+	active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET |
+				   SBI_PMU_HW_INSTRUCTIONS;
+
+	return 0;
+}

From ae72ec091508196e29c07ae46bca106373d31e39 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:12 -0700
Subject: [PATCH 0814/1765] utils: fdt: Add fdt helper functions to parse PMU
 DT nodes

The PMU DT node bindings are defined in docs/pmu_support.md
Add few fdt helper functions to parse the DT node and update the
event-counter mapping tables.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_pmu.h |  46 +++++++++++++
 lib/utils/fdt/fdt_fixup.c       |   2 +
 lib/utils/fdt/fdt_pmu.c         | 111 ++++++++++++++++++++++++++++++++
 lib/utils/fdt/objects.mk        |   1 +
 4 files changed, 160 insertions(+)
 create mode 100644 include/sbi_utils/fdt/fdt_pmu.h
 create mode 100644 lib/utils/fdt/fdt_pmu.c

diff --git a/include/sbi_utils/fdt/fdt_pmu.h b/include/sbi_utils/fdt/fdt_pmu.h
new file mode 100644
index 00000000000..2fa01edc074
--- /dev/null
+++ b/include/sbi_utils/fdt/fdt_pmu.h
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_pmu.c - Flat Device Tree PMU helper routines
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#ifndef __FDT_PMU_H__
+#define __FDT_PMU_H__
+
+#include <sbi/sbi_types.h>
+
+/**
+ * Fix up the PMU node in the device tree
+ *
+ * This routine:
+ * 1. Disables opensbi specific properties from the DT
+ *
+ * It is recommended that platform support call this function in
+ * their final_init() platform operation.
+ *
+ * @param fdt device tree blob
+ */
+void fdt_pmu_fixup(void *fdt);
+
+/**
+ * Setup PMU data from device tree
+ *
+ * @param fdt device tree blob
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int fdt_pmu_setup(void *fdt);
+
+/**
+ * Get the mhpmevent select value read from DT for a given event
+ * @param event_idx Event ID of the given event
+ *
+ * @return The select value read from DT or 0 if given index was not found
+ */
+uint64_t fdt_pmu_get_select_value(uint32_t event_idx);
+
+#endif
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 14655000b81..ac01ba3dfac 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/fdt/fdt_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
 void fdt_cpu_fixup(void *fdt)
@@ -263,6 +264,7 @@ void fdt_fixups(void *fdt)
 	fdt_plic_fixup(fdt);
 
 	fdt_reserved_memory_fixup(fdt);
+	fdt_pmu_fixup(fdt);
 }
 
 
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
new file mode 100644
index 00000000000..9ebf1c22501
--- /dev/null
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * fdt_pmu.c - Flat Device Tree PMU helper routines
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *	Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+#define FDT_PMU_HW_EVENT_MAX (SBI_PMU_HW_EVENT_MAX * 2)
+
+struct fdt_pmu_hw_event_select {
+	uint32_t eidx;
+	uint64_t select;
+};
+
+static struct fdt_pmu_hw_event_select fdt_pmu_evt_select[FDT_PMU_HW_EVENT_MAX] = {0};
+static uint32_t hw_event_count;
+
+uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
+{
+	int i;
+	struct fdt_pmu_hw_event_select *event;
+
+	for (i = 0; i < SBI_PMU_HW_EVENT_MAX; i++) {
+		event = &fdt_pmu_evt_select[i];
+		if (event->eidx == event_idx)
+			return event->select;
+	}
+
+	return 0;
+}
+
+int fdt_pmu_fixup(void *fdt)
+{
+	int pmu_offset;
+
+	if (!fdt)
+		return SBI_EINVAL;
+
+	pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
+	if (pmu_offset < 0)
+		return SBI_EFAIL;
+
+	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmcounters");
+	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmevent");
+	fdt_delprop(fdt, pmu_offset, "pmu,raw-event-to-mhpmcounters");
+
+	return 0;
+}
+
+int fdt_pmu_setup(void *fdt)
+{
+	int i, pmu_offset, len, result;
+	const u32 *event_val;
+	const u32 *event_ctr_map;
+	struct fdt_pmu_hw_event_select *event;
+	uint64_t raw_selector;
+	u32 event_idx_start, event_idx_end, ctr_map;
+
+	if (!fdt)
+		return SBI_EINVAL;
+
+	pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
+	if (pmu_offset < 0)
+		return SBI_EFAIL;
+
+	event_ctr_map = fdt_getprop(fdt, pmu_offset, "pmu,event-to-mhpmcounters", &len);
+	if (!event_ctr_map || len < 8)
+		return SBI_EFAIL;
+	len = len / (sizeof(u32) * 3);
+	for (i = 0; i < len; i++) {
+		event_idx_start = fdt32_to_cpu(event_ctr_map[3 * i]);
+		event_idx_end = fdt32_to_cpu(event_ctr_map[3 * i + 1]);
+		ctr_map = fdt32_to_cpu(event_ctr_map[3 * i + 2]);
+		sbi_pmu_add_hw_event_counter_map(event_idx_start, event_idx_end, ctr_map);
+	}
+
+	event_val = fdt_getprop(fdt, pmu_offset, "pmu,event-to-mhpmevent", &len);
+	if (!event_val || len < 8)
+		return SBI_EFAIL;
+	len = len / (sizeof(u32) * 3);
+	for (i = 0; i < len; i++) {
+		event = &fdt_pmu_evt_select[hw_event_count];
+		event->eidx = fdt32_to_cpu(event_val[3 * i]);
+		event->select = fdt32_to_cpu(event_val[3 * i + 1]);
+		event->select = (event->select << 32) | fdt32_to_cpu(event_val[3 * i + 2]);
+		hw_event_count++;
+	}
+
+	event_val = fdt_getprop(fdt, pmu_offset, "pmu,raw-event-to-mhpmcounters", &len);
+	if (!event_val || len < 8)
+		return SBI_EFAIL;
+	len = len / (sizeof(u32) * 3);
+	for (i = 0; i < len; i++) {
+		raw_selector = fdt32_to_cpu(event_val[3 * i]);
+		raw_selector = (raw_selector << 32) | fdt32_to_cpu(event_val[3 * i + 1]);
+		ctr_map = fdt32_to_cpu(event_val[3 * i + 2]);
+		result = sbi_pmu_add_raw_event_counter_map(raw_selector, ctr_map);
+		if (!result)
+			hw_event_count++;
+	}
+
+	return 0;
+}
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
index d9f1eae1929..03800f96d74 100644
--- a/lib/utils/fdt/objects.mk
+++ b/lib/utils/fdt/objects.mk
@@ -5,5 +5,6 @@
 #
 
 libsbiutils-objs-y += fdt/fdt_domain.o
+libsbiutils-objs-y += fdt/fdt_pmu.o
 libsbiutils-objs-y += fdt/fdt_helper.o
 libsbiutils-objs-y += fdt/fdt_fixup.o

From 37f9b0f2f265b2f312d974fb8d100b85b3faf94f Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:13 -0700
Subject: [PATCH 0815/1765] lib: sbi: Implement SBI PMU extension

RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor
mode to start/stop/configure pmu related events. This patch implements
all of the functionality defined in the specification.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_ecall.h |  1 +
 lib/sbi/objects.mk      |  1 +
 lib/sbi/sbi_ecall.c     |  3 ++
 lib/sbi/sbi_ecall_pmu.c | 93 +++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_pmu.c       |  2 +-
 5 files changed, 99 insertions(+), 1 deletion(-)
 create mode 100644 lib/sbi/sbi_ecall_pmu.c

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 63ef866ba2d..9500d043042 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -39,6 +39,7 @@ extern struct sbi_ecall_extension ecall_ipi;
 extern struct sbi_ecall_extension ecall_vendor;
 extern struct sbi_ecall_extension ecall_hsm;
 extern struct sbi_ecall_extension ecall_srst;
+extern struct sbi_ecall_extension ecall_pmu;
 
 u16 sbi_ecall_version_major(void);
 
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index d9068b70785..7096f245ae0 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -20,6 +20,7 @@ libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_base.o
 libsbi-objs-y += sbi_ecall_hsm.o
 libsbi-objs-y += sbi_ecall_legacy.o
+libsbi-objs-y += sbi_ecall_pmu.o
 libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_ecall_vendor.o
 libsbi-objs-y += sbi_emulate_csr.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index e92a5393046..ce021eba7d9 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -162,6 +162,9 @@ int sbi_ecall_init(void)
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_srst);
+	if (ret)
+		return ret;
+	ret = sbi_ecall_register_extension(&ecall_pmu);
 	if (ret)
 		return ret;
 	ret = sbi_ecall_register_extension(&ecall_legacy);
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
new file mode 100644
index 00000000000..39d3857680c
--- /dev/null
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -0,0 +1,93 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_version.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/riscv_asm.h>
+
+static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
+				 const struct sbi_trap_regs *regs,
+				 unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	uint64_t temp;
+
+	switch (funcid) {
+	case SBI_EXT_PMU_NUM_COUNTERS:
+		ret = sbi_pmu_num_ctr();
+		if (ret >= 0) {
+			*out_val = ret;
+			ret = 0;
+		}
+		break;
+	case SBI_EXT_PMU_COUNTER_GET_INFO:
+		ret = sbi_pmu_ctr_get_info(regs->a0, out_val);
+		break;
+	case SBI_EXT_PMU_COUNTER_CFG_MATCH:
+#if __riscv_xlen == 32
+		temp = ((uint64_t)regs->a5 << 32) | regs->a4;
+#else
+		temp = regs->a4;
+#endif
+		ret = sbi_pmu_ctr_cfg_match(regs->a0, regs->a1, regs->a2,
+					    regs->a3, temp);
+		if (ret >= 0) {
+			*out_val = ret;
+			ret = 0;
+		}
+
+		break;
+	case SBI_EXT_PMU_COUNTER_FW_READ:
+		ret = sbi_pmu_ctr_read(regs->a0, out_val);
+		break;
+	case SBI_EXT_PMU_COUNTER_START:
+
+#if __riscv_xlen == 32
+		temp = ((uint64_t)regs->a4 << 32) | regs->a3;
+#else
+		temp = regs->a3;
+#endif
+		ret = sbi_pmu_ctr_start(regs->a0, regs->a1, regs->a2, temp);
+		break;
+	case SBI_EXT_PMU_COUNTER_STOP:
+		ret = sbi_pmu_ctr_stop(regs->a0, regs->a1, regs->a2);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+
+	return ret;
+}
+
+static int sbi_ecall_pmu_probe(unsigned long extid, unsigned long *out_val)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	/* SBI PMU extension is useless without mcount inhibit features */
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		*out_val = 1;
+	else
+		*out_val = 0;
+
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_pmu = {
+	.extid_start = SBI_EXT_PMU,
+	.extid_end = SBI_EXT_PMU,
+	.handle = sbi_ecall_pmu_handler,
+	.probe = sbi_ecall_pmu_probe,
+};
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index d01e248fb47..4092e6fa00c 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -375,7 +375,7 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
 		return SBI_EFAIL;
 
-	/* TODO: The upper 8 bits of mhpmevent is reserved by sscofpmf extension.
+	/* TODO: The upper 16 bits of mhpmevent is reserved by sscofpmf extension.
 	 * Update those bits based on the flags received from supervisor.
 	 * The OVF bit also should be cleared here in case it was not cleared
 	 * during event stop.

From 764a17d852a8cc80050016a6e2ccdcaddd43f68c Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:14 -0700
Subject: [PATCH 0816/1765] lib: sbi: Implement firmware counters

RISC-V SBI v0.3 specification defines a set of firmware events that can
provide additional information about the current firmware context. All
of the firmware event monitoring are enabled now. The firmware
events must be defined as raw perf event with MSB set as specified in the
specification.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_illegal_insn.c    |  2 ++
 lib/sbi/sbi_ipi.c             |  6 ++++++
 lib/sbi/sbi_misaligned_ldst.c |  5 +++++
 lib/sbi/sbi_timer.c           |  2 ++
 lib/sbi/sbi_tlb.c             | 38 +++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_trap.c            |  7 +++++++
 6 files changed, 60 insertions(+)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 9af3d24d797..bfe7d619589 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_illegal_insn.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
@@ -129,6 +130,7 @@ int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
 	 * instruction trap.
 	 */
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ILLEGAL_INSN);
 	if (unlikely((insn & 3) != 3)) {
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 75f86d8e76f..1014909bcfa 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -19,6 +19,9 @@
 #include <sbi/sbi_init.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_tlb.h>
 
 struct sbi_ipi_data {
 	unsigned long ipi_type;
@@ -64,6 +67,8 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	if (ipi_dev && ipi_dev->ipi_send)
 		ipi_dev->ipi_send(remote_hartid);
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
+
 	if (ipi_ops->sync)
 		ipi_ops->sync(scratch);
 
@@ -183,6 +188,7 @@ void sbi_ipi_process(void)
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	u32 hartid = current_hartid();
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
 	if (ipi_dev && ipi_dev->ipi_clear)
 		ipi_dev->ipi_clear(hartid);
 
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 5057cb5ecd5..c879ce72f61 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
@@ -29,6 +30,8 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 	struct sbi_trap_info uptrap;
 	int i, fp = 0, shift = 0, len = 0;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
+
 	if (tinst & 0x1) {
 		/*
 		 * Bit[0] == 1 implies trapped instruction value is
@@ -149,6 +152,8 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 	struct sbi_trap_info uptrap;
 	int i, len = 0;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
+
 	if (tinst & 0x1) {
 		/*
 		 * Bit[0] == 1 implies trapped instruction value is
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 77d6f95032a..275950125ba 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 
@@ -88,6 +89,7 @@ void sbi_timer_set_delta_upper(ulong delta_upper)
 
 void sbi_timer_event_start(u64 next_event)
 {
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SET_TIMER);
 	if (timer_dev && timer_dev->timer_event_start)
 		timer_dev->timer_event_start(next_event);
 	csr_clear(CSR_MIP, MIP_STIP);
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 8bbe92b0978..1a9cb1d2b5d 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -21,6 +21,7 @@
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
 
 static unsigned long tlb_sync_off;
 static unsigned long tlb_fifo_off;
@@ -39,6 +40,8 @@ void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo)
 	unsigned long vmid  = tinfo->vmid;
 	unsigned long i, hgatp;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_RCVD);
+
 	hgatp = csr_swap(CSR_HGATP,
 			 (vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
 
@@ -61,6 +64,8 @@ void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 	unsigned long size  = tinfo->size;
 	unsigned long i;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_RCVD);
+
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		__sbi_hfence_gvma_all();
 		return;
@@ -77,6 +82,8 @@ void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 	unsigned long size  = tinfo->size;
 	unsigned long i;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
+
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		sbi_tlb_flush_all();
 		return;
@@ -98,6 +105,8 @@ void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	unsigned long vmid  = tinfo->vmid;
 	unsigned long i, hgatp;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_RCVD);
+
 	hgatp = csr_swap(CSR_HGATP,
 			 (vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
 
@@ -126,6 +135,8 @@ void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	unsigned long vmid  = tinfo->vmid;
 	unsigned long i;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_RCVD);
+
 	if (start == 0 && size == 0) {
 		__sbi_hfence_gvma_all();
 		return;
@@ -148,6 +159,8 @@ void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 	unsigned long asid  = tinfo->asid;
 	unsigned long i;
 
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_RCVD);
+
 	if (start == 0 && size == 0) {
 		sbi_tlb_flush_all();
 		return;
@@ -172,9 +185,32 @@ void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 
 void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)
 {
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_RECVD);
+
 	__asm__ __volatile("fence.i");
 }
 
+static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
+{
+	if (unlikely(!data))
+		return;
+
+	if (data->local_fn == sbi_tlb_local_fence_i)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_SENT);
+	else if (data->local_fn == sbi_tlb_local_sfence_vma)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_SENT);
+	else if (data->local_fn == sbi_tlb_local_sfence_vma_asid)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_SENT);
+	else if (data->local_fn == sbi_tlb_local_hfence_gvma)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_SENT);
+	else if (data->local_fn == sbi_tlb_local_hfence_gvma_vmid)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_SENT);
+	else if (data->local_fn == sbi_tlb_local_hfence_vvma)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_SENT);
+	else if (data->local_fn == sbi_tlb_local_hfence_vvma_asid)
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_SENT);
+}
+
 static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
 	u32 rhartid;
@@ -369,6 +405,8 @@ int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 	if (!tinfo->local_fn)
 		return SBI_EINVAL;
 
+	tlb_pmu_incr_fw_ctr(tinfo);
+
 	return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);
 }
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 1ba649074b7..5781fea2a11 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
@@ -257,6 +258,12 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		rc  = sbi_ecall_handler(regs);
 		msg = "ecall handler failed";
 		break;
+	case CAUSE_LOAD_ACCESS:
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
+		break;
+	case CAUSE_STORE_ACCESS:
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
+		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		trap.epc = regs->mepc;

From ec1b8bb76336e3b2eda25a550808c1be56c02033 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:15 -0700
Subject: [PATCH 0817/1765] lib: sbi: Improve TLB function naming

Follow the standard conventon for static function names:

	All global functions should be start with sbi_<module name>_
	All static functions should be start with <module name>_

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_tlb.c | 41 ++++++++++++++++++++---------------------
 1 file changed, 20 insertions(+), 21 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 1a9cb1d2b5d..efa74a7542b 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -28,7 +28,7 @@ static unsigned long tlb_fifo_off;
 static unsigned long tlb_fifo_mem_off;
 static unsigned long tlb_range_flush_limit;
 
-static void sbi_tlb_flush_all(void)
+static void tlb_flush_all(void)
 {
 	__asm__ __volatile("sfence.vma");
 }
@@ -85,7 +85,7 @@ void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
 
 	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
-		sbi_tlb_flush_all();
+		tlb_flush_all();
 		return;
 	}
 
@@ -162,7 +162,7 @@ void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_RCVD);
 
 	if (start == 0 && size == 0) {
-		sbi_tlb_flush_all();
+		tlb_flush_all();
 		return;
 	}
 
@@ -211,7 +211,7 @@ static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_SENT);
 }
 
-static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
+static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
 	u32 rhartid;
 	struct sbi_scratch *rscratch = NULL;
@@ -229,8 +229,7 @@ static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void sbi_tlb_process_count(struct sbi_scratch *scratch,
-				  unsigned int count)
+static void tlb_process_count(struct sbi_scratch *scratch, int count)
 {
 	struct sbi_tlb_info tinfo;
 	unsigned int deq_count = 0;
@@ -238,7 +237,7 @@ static void sbi_tlb_process_count(struct sbi_scratch *scratch,
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 
 	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo)) {
-		sbi_tlb_entry_process(&tinfo);
+		tlb_entry_process(&tinfo);
 		deq_count++;
 		if (deq_count > count)
 			break;
@@ -246,17 +245,17 @@ static void sbi_tlb_process_count(struct sbi_scratch *scratch,
 	}
 }
 
-static void sbi_tlb_process(struct sbi_scratch *scratch)
+static void tlb_process(struct sbi_scratch *scratch)
 {
 	struct sbi_tlb_info tinfo;
 	struct sbi_fifo *tlb_fifo =
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 
 	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo))
-		sbi_tlb_entry_process(&tinfo);
+		tlb_entry_process(&tinfo);
 }
 
-static void sbi_tlb_sync(struct sbi_scratch *scratch)
+static void tlb_sync(struct sbi_scratch *scratch)
 {
 	unsigned long *tlb_sync =
 			sbi_scratch_offset_ptr(scratch, tlb_sync_off);
@@ -266,13 +265,13 @@ static void sbi_tlb_sync(struct sbi_scratch *scratch)
 		 * While we are waiting for remote hart to set the sync,
 		 * consume fifo requests to avoid deadlock.
 		 */
-		sbi_tlb_process_count(scratch, 1);
+		tlb_process_count(scratch, 1);
 	}
 
 	return;
 }
 
-static inline int __sbi_tlb_range_check(struct sbi_tlb_info *curr,
+static inline int tlb_range_check(struct sbi_tlb_info *curr,
 					struct sbi_tlb_info *next)
 {
 	unsigned long curr_end;
@@ -315,7 +314,7 @@ static inline int __sbi_tlb_range_check(struct sbi_tlb_info *curr,
  *	before continuing the while loop. This method is preferred over wfi/ipi because
  *	of MMIO cost involved in later method.
  */
-static int sbi_tlb_update_cb(void *in, void *data)
+static int tlb_update_cb(void *in, void *data)
 {
 	struct sbi_tlb_info *curr;
 	struct sbi_tlb_info *next;
@@ -330,16 +329,16 @@ static int sbi_tlb_update_cb(void *in, void *data)
 	if (next->local_fn == sbi_tlb_local_sfence_vma_asid &&
 	    curr->local_fn == sbi_tlb_local_sfence_vma_asid) {
 		if (next->asid == curr->asid)
-			ret = __sbi_tlb_range_check(curr, next);
+			ret = tlb_range_check(curr, next);
 	} else if (next->local_fn == sbi_tlb_local_sfence_vma &&
 		   curr->local_fn == sbi_tlb_local_sfence_vma) {
-		ret = __sbi_tlb_range_check(curr, next);
+		ret = tlb_range_check(curr, next);
 	}
 
 	return ret;
 }
 
-static int sbi_tlb_update(struct sbi_scratch *scratch,
+static int tlb_update(struct sbi_scratch *scratch,
 			  struct sbi_scratch *remote_scratch,
 			  u32 remote_hartid, void *data)
 {
@@ -369,7 +368,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 
 	tlb_fifo_r = sbi_scratch_offset_ptr(remote_scratch, tlb_fifo_off);
 
-	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, sbi_tlb_update_cb);
+	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, tlb_update_cb);
 	if (ret != SBI_FIFO_UNCHANGED) {
 		return 1;
 	}
@@ -383,7 +382,7 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 		 * TODO: Introduce a wait/wakeup event mechanism to handle
 		 * this properly.
 		 */
-		sbi_tlb_process_count(scratch, 1);
+		tlb_process_count(scratch, 1);
 		sbi_dprintf("hart%d: hart%d tlb fifo full\n",
 			    curr_hartid, remote_hartid);
 	}
@@ -393,9 +392,9 @@ static int sbi_tlb_update(struct sbi_scratch *scratch,
 
 static struct sbi_ipi_event_ops tlb_ops = {
 	.name = "IPI_TLB",
-	.update = sbi_tlb_update,
-	.sync = sbi_tlb_sync,
-	.process = sbi_tlb_process,
+	.update = tlb_update,
+	.sync = tlb_sync,
+	.process = tlb_process,
 };
 
 static u32 tlb_event = SBI_IPI_EVENT_MAX;

From 0e12aa8dee632f67dbb458aa5d3ee38f7db4e70c Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Sat, 10 Jul 2021 09:18:16 -0700
Subject: [PATCH 0818/1765] platform: generic: Add PMU support

Add PMU support for generic platform. Generic platform solely relies on
the device tree to parse all pmu related information. If any event is
not described in device tree, generic platform will not support it.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 platform/generic/platform.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 79d52300a0f..0787d10cdf6 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -16,6 +16,7 @@
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_pmu.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
@@ -184,6 +185,33 @@ static u64 generic_tlbr_flush_limit(void)
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
+static int generic_pmu_init(void)
+{
+	return fdt_pmu_setup(sbi_scratch_thishart_arg1_ptr());
+}
+
+static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
+					       uint64_t data)
+{
+	uint64_t evt_val = 0;
+
+	/* data is valid only for raw events and is equal to event selector */
+	if (event_idx == SBI_PMU_EVENT_RAW_IDX)
+		evt_val = data;
+	else {
+		/**
+		 * Generic platform follows the SBI specification recommendation
+		 * i.e. zero extended event_idx is used as mhpmevent value for
+		 * hardware general/cache events if platform does't define one.
+		 */
+		evt_val = fdt_pmu_get_select_value(event_idx);
+		if (!evt_val)
+			evt_val = (uint64_t)event_idx;
+	}
+
+	return evt_val;
+}
+
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= generic_early_init,
 	.final_init		= generic_final_init,
@@ -195,6 +223,8 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_exit		= fdt_irqchip_exit,
 	.ipi_init		= fdt_ipi_init,
 	.ipi_exit		= fdt_ipi_exit,
+	.pmu_init		= generic_pmu_init,
+	.pmu_xlate_to_mhpmevent = generic_pmu_xlate_to_mhpmevent,
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,

From 14c7f71c0da641ece1b91ef0bde190f66c980a3e Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 10 Jul 2021 22:00:31 +0800
Subject: [PATCH 0819/1765] firmware: Minor optimization in _scratch_init()

Before entering _scratch_init(), register t3 already holds a copy
of the firmware end address, hence there is no need to calculate
it again. This reduces 3 instructions in each _scratch_init() loop.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/fw_base.S | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index a5ce946aa3f..8e40562d16b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -278,6 +278,14 @@ _bss_zero:
 	/* hartid 0 is mandated by ISA */
 	li	t1, 0
 _scratch_init:
+	/*
+	 * The following registers hold values that are computed before
+	 * entering this block, and should remain unchanged.
+	 *
+	 * t3 -> the firmware end address
+	 * s7 -> HART count
+	 * s8 -> HART stack size
+	 */
 	add	tp, t3, zero
 	mul	a5, s8, t1
 	sub	tp, tp, a5
@@ -287,10 +295,7 @@ _scratch_init:
 	/* Initialize scratch space */
 	/* Store fw_start and fw_size in scratch space */
 	lla	a4, _fw_start
-	lla	a5, _fw_end
-	mul	t0, s7, s8
-	add	a5, a5, t0
-	sub	a5, a5, a4
+	sub	a5, t3, a4
 	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
 	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
 	/* Store next arg1 in scratch space */

From dafaa0f54b8a2781f97150ecff5e087f208e788c Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Jul 2021 19:07:28 +0800
Subject: [PATCH 0820/1765] docs: Correct a typo in platform_guide.md

It's riscv-pk, not riskv-pk.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform_guide.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index 7920fac2af3..df90c6b6160 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -17,7 +17,7 @@ the supported platforms. These firmwares are linked against *libplatsbi.a*.
 Firmware binaries are installed in
 *<install_directory>/platform/<platform_subdir>/bin*. These firmwares can be
 used as executable runtime firmwares on the supported platforms as a replacement
-for the legacy *riskv-pk* boot loader (BBL).
+for the legacy *riscv-pk* boot loader (BBL).
 
 A complete doxygen-style documentation of *struct sbi_platform* and related
 APIs is available in the file *include/sbi/sbi_platform.h*.

From abfce9b25c7ec12a214bf3e9f85b5a3c8fb91b67 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 8 Jul 2021 19:07:29 +0800
Subject: [PATCH 0821/1765] docs: Make <xyz> visible in the rendered platform
 guide

At present in the rendered platform guide, all instances of <xyz>
are missing. Use &lt; and &gt; to replace <> to make them visible.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform_guide.md | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index df90c6b6160..b6c2c2e0494 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -25,18 +25,18 @@ APIs is available in the file *include/sbi/sbi_platform.h*.
 Adding support for a new platform
 ---------------------------------
 
-Support for a new platform named *<xyz>* can be added as follows:
+Support for a new platform named *&lt;xyz&gt;* can be added as follows:
 
-1. Create a directory named *<xyz>* under the *platform/* directory.
+1. Create a directory named *&lt;xyz&gt;* under the *platform/* directory.
 2. Create a platform configuration file named *config.mk* under the
-   *platform/<xyz>/* directory. This configuration file will provide
+   *platform/&lt;xyz&gt;/* directory. This configuration file will provide
    compiler flags, and select firmware options.
-3. Create a *platform/<xyz>/objects.mk* file for listing the
+3. Create a *platform/&lt;xyz&gt;/objects.mk* file for listing the
    platform-specific object files to be compiled.
-4. Create a *platform/<xyz>/platform.c* file providing a *struct sbi_platform*
-   instance.
+4. Create a *platform/&lt;xyz&gt;/platform.c* file providing a
+   *struct sbi_platform* instance.
 
 A platform support code template is available under the *platform/template*
 directory. Copying this directory and its content as a new directory named
-*<xyz>* under the *platform/* directory will create all the files mentioned
-above.
+*&lt;xyz&gt;* under the *platform/* directory will create all the files
+mentioned above.

From dcb756b01ac3b9d9bf56c125b17f4c80ee31a35b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 7 Jul 2021 18:00:21 +0800
Subject: [PATCH 0822/1765] firmware: Remove the sanity checks in
 fw_save_info()

The sanity checks on the magic and version was already done in
fw_boot_hart(), which happens before fw_save_info() is called.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_dynamic.S | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 0705e63cf71..945fa044109 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -57,14 +57,6 @@ fw_save_info:
 	lla	a4, _dynamic_next_arg1
 	REG_S	a1, (a4)
 
-	/* Sanity checks */
-	li	a4, FW_DYNAMIC_INFO_MAGIC_VALUE
-	REG_L	a3, FW_DYNAMIC_INFO_MAGIC_OFFSET(a2)
-	bne	a3, a4, _bad_dynamic_info
-	li	a4, FW_DYNAMIC_INFO_VERSION_MAX
-	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
-	bgt	a3, a4, _bad_dynamic_info
-
 	/* Save version == 0x1 fields */
 	lla	a4, _dynamic_next_addr
 	REG_L	a3, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET(a2)

From b88b3661d43760fbc06bc83de2c5b204a2bb03dd Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 7 Jul 2021 16:22:41 +0800
Subject: [PATCH 0823/1765] firmware: Define a macro for version of struct
 fw_dynamic_info

Avoid using a magic number, instead use a macro for the version of
struct fw_dynamic_info.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_dynamic.S    | 4 ++--
 include/sbi/fw_dynamic.h | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 945fa044109..2b6019676c5 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -36,7 +36,7 @@ fw_boot_hart:
 	bgt	a0, a1, _bad_dynamic_info
 
 	/* Read boot HART id */
-	li	a1, 0x2
+	li	a1, FW_DYNAMIC_INFO_VERSION_2
 	blt	a0, a1, 2f
 	REG_L	a0, FW_DYNAMIC_INFO_BOOT_HART_OFFSET(a2)
 	ret
@@ -69,7 +69,7 @@ fw_save_info:
 	REG_S	a3, (a4)
 
 	/* Save version == 0x2 fields */
-	li	a4, 0x2
+	li	a4, FW_DYNAMIC_INFO_VERSION_2
 	REG_L	a3, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
 	blt	a3, a4, 2f
 	lla	a4, _dynamic_boot_hart
diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
index 25c0eb88aea..a07266ef5da 100644
--- a/include/sbi/fw_dynamic.h
+++ b/include/sbi/fw_dynamic.h
@@ -31,7 +31,8 @@
 #define FW_DYNAMIC_INFO_MAGIC_VALUE		0x4942534f
 
 /** Maximum supported info version */
-#define FW_DYNAMIC_INFO_VERSION_MAX		0x2
+#define FW_DYNAMIC_INFO_VERSION_2		0x2
+#define FW_DYNAMIC_INFO_VERSION_MAX		FW_DYNAMIC_INFO_VERSION_2
 
 /** Possible next mode values */
 #define FW_DYNAMIC_INFO_NEXT_MODE_U		0x0

From a76ac4449bf2b67b899ebdb5085834e94987b690 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sun, 11 Jul 2021 14:28:19 +0530
Subject: [PATCH 0824/1765] lib: sbi: Fix sbi_pmu_exit() for systems not having
 MCOUNTINHIBIT csr

The sbi_pmu_exit() crashes on systems not having MCOUNTINHIBIT csr
so to fix this we check SBI_HART_HAS_MCOUNTINHIBIT feature in
sbi_pmu_exit() and do nothing if it is not available.

Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_pmu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 4092e6fa00c..c276a46e287 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -583,6 +583,10 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
 	u32 hartid = current_hartid();
 
+	/* SBI PMU is not supported if mcountinhibit is not available */
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		return;
+
 	csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 	csr_write(CSR_MCOUNTEREN, 7);
 	pmu_reset_event_map(hartid);

From 7f1be8a624aca4805020588894d96c3617860c89 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:19 +0100
Subject: [PATCH 0825/1765] fw_base: Don't mark fw_platform_init as both global
 and weak

These are mutually exclusive. GNU as and LLVM both let later binding
directives override earlier ones so this works as intended, but LLVM 12
turned this into a warning as there's no good reason to do such a thing
and could be a potential bug. Thus, remove the redundant and incorrect
.globl directive for fw_platform_init.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 8e40562d16b..a1213e3b32b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -558,7 +558,6 @@ _start_hang:
 
 	.section .entry, "ax", %progbits
 	.align 3
-	.globl fw_platform_init
 	.weak fw_platform_init
 fw_platform_init:
 	add	a0, a1, zero

From 397afe5ba1e9abeb48b801c864a56bda415441ce Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:20 +0100
Subject: [PATCH 0826/1765] fw_base: Put data in .data rather than .text

The -N linker option is supposed to make .text writable, but GNU ld and
LLD differ in interpreting what that means. GNU ld will happily let you
have relocations in it, but LLD will see that the input section is
read-only (even though the output section is writable) and give an
error. It's unclear if either of them intend to have that behaviour in
this edge case, but regardless there's no reason not to just put the
data in a writable .data section.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index a1213e3b32b..928ca91b5a0 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -506,6 +506,7 @@ _skip_trap_exit_rv32_hyp:
 	/* We don't expect to reach here hence just hang */
 	j	_start_hang
 
+	.data
 	.align 3
 #ifdef FW_PIC
 _runtime_offset:

From a3d328ae33a3e64d219b50269b4c013d363e9b82 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:21 +0100
Subject: [PATCH 0827/1765] firmware: Explicitly pass -pie to the linker, not
 just the driver

When using Clang with a bare-metal triple, -pie does not get passed to
the linker as it's not normally a thing that makes sense, unlike GCC
which will unconditionally forward it on and potentially result in a
linker error. However, LLD does support it, and manually forwarding it
on works as desired, so do so to fully support FW_PIC with Clang and
LLD.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/objects.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/objects.mk b/firmware/objects.mk
index ce91c2f826c..83f98add983 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -21,7 +21,7 @@ ifeq ($(FW_PIC),y)
 firmware-genflags-y +=	-DFW_PIC
 firmware-asflags-y  +=	-fpic
 firmware-cflags-y   +=	-fPIE -pie
-firmware-ldflags-y  +=  -Wl,--no-dynamic-linker
+firmware-ldflags-y  +=	-Wl,--no-dynamic-linker -Wl,-pie
 endif
 
 ifdef FW_TEXT_START

From 09ad811ec4661b99a67b87f28c93177367ae911e Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:22 +0100
Subject: [PATCH 0828/1765] firmware: Only default FW_PIC to y if supported

Bare-metal GNU ld does not support PIE, so if using it this will result
in a failure to build. Instead, default to FW_PIC=n if not supported.
Note that an explicit FW_PIC=y is not overridden, to ensure the build
fails rather than silently producing a position-dependent binary.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile            | 3 +++
 firmware/objects.mk | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 6b64205532e..ba0631367fb 100644
--- a/Makefile
+++ b/Makefile
@@ -106,6 +106,9 @@ ifndef PLATFORM_RISCV_XLEN
   endif
 endif
 
+# Check whether the linker supports creating PIEs
+OPENSBI_LD_PIE := $(shell $(CC) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
+
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 83f98add983..a1704c48d81 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -14,7 +14,7 @@ firmware-asflags-y +=
 firmware-ldflags-y +=
 
 ifndef FW_PIC
-FW_PIC := y
+FW_PIC := $(OPENSBI_LD_PIE)
 endif
 
 ifeq ($(FW_PIC),y)

From 2942777425516f7b31181fbaecc5485263dfcb01 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:23 +0100
Subject: [PATCH 0829/1765] Makefile: Support building with Clang and LLVM
 binutils

This is intended to mirror the Linux kernel. Building with CC=clang will
use Clang as the compiler but default to using the existing binutils.
Building with LLVM=1 will default to using Clang and LLVM binutils.

Whilst GCC will accept the -N linker option and forward it on to the
linker, Clang will not, and so in order to support both compilers we
must use -Wl, to forward it to the linker as is required for most other
linker options.

Note that there is currently a bug when using Clang as the compiler and
riscv64-linux-gnu-ld as the linker for FW_PIC=y. At first glance this
appears to be a bug in GNU binutils, but this could also be Clang or
OpenSBI at fault in some subtle way. Thus, for now, advise that this
combination be avoided.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile  | 66 +++++++++++++++++++++++++++++++++++++++++++++++++------
 README.md | 48 ++++++++++++++++++++++++++++++++++++++--
 2 files changed, 105 insertions(+), 9 deletions(-)

diff --git a/Makefile b/Makefile
index ba0631367fb..5c188d544be 100644
--- a/Makefile
+++ b/Makefile
@@ -76,26 +76,54 @@ OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sb
 OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe 2> /dev/null; fi)
 
 # Setup compilation commands
+ifneq ($(LLVM),)
+CC		=	clang
+AR		=	llvm-ar
+LD		=	ld.lld
+OBJCOPY		=	llvm-objcopy
+else
 ifdef CROSS_COMPILE
 CC		=	$(CROSS_COMPILE)gcc
-CPP		=	$(CROSS_COMPILE)cpp
 AR		=	$(CROSS_COMPILE)ar
 LD		=	$(CROSS_COMPILE)ld
 OBJCOPY		=	$(CROSS_COMPILE)objcopy
 else
 CC		?=	gcc
-CPP		?=	cpp
 AR		?=	ar
 LD		?=	ld
 OBJCOPY		?=	objcopy
 endif
+endif
+CPP		=	$(CC) -E
 AS		=	$(CC)
 DTC		=	dtc
 
-# Guess the compillers xlen
-OPENSBI_CC_XLEN := $(shell TMP=`$(CC) -dumpmachine | sed 's/riscv\([0-9][0-9]\).*/\1/'`; echo $${TMP})
+ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),)
+CC_IS_CLANG	=	y
+else
+CC_IS_CLANG	=	n
+endif
+
+ifneq ($(shell $(LD) --version 2>&1 | head -n 1 | grep LLD),)
+LD_IS_LLD	=	y
+else
+LD_IS_LLD	=	n
+endif
+
+ifeq ($(CC_IS_CLANG),y)
+ifneq ($(CROSS_COMPILE),)
+CLANG_TARGET	=	--target=$(notdir $(CROSS_COMPILE:%-=%))
+endif
+endif
+
+# Guess the compiler's XLEN
+OPENSBI_CC_XLEN := $(shell TMP=`$(CC) $(CLANG_TARGET) -dumpmachine | sed 's/riscv\([0-9][0-9]\).*/\1/'`; echo $${TMP})
+
+# Guess the compiler's ABI and ISA
+ifneq ($(CC_IS_CLANG),y)
 OPENSBI_CC_ABI := $(shell TMP=`$(CC) -v 2>&1 | sed -n 's/.*\(with\-abi=\([a-zA-Z0-9]*\)\).*/\2/p'`; echo $${TMP})
 OPENSBI_CC_ISA := $(shell TMP=`$(CC) -v 2>&1 | sed -n 's/.*\(with\-arch=\([a-zA-Z0-9]*\)\).*/\2/p'`; echo $${TMP})
+endif
 
 # Setup platform XLEN
 ifndef PLATFORM_RISCV_XLEN
@@ -106,8 +134,21 @@ ifndef PLATFORM_RISCV_XLEN
   endif
 endif
 
+ifeq ($(CC_IS_CLANG),y)
+ifeq ($(CROSS_COMPILE),)
+CLANG_TARGET	=	--target=riscv$(PLATFORM_RISCV_XLEN)-unknown-elf
+endif
+endif
+
+ifeq ($(LD_IS_LLD),y)
+RELAX_FLAG	=	-mno-relax
+USE_LD_FLAG	=	-fuse-ld=lld
+else
+USE_LD_FLAG	=	-fuse-ld=bfd
+endif
+
 # Check whether the linker supports creating PIEs
-OPENSBI_LD_PIE := $(shell $(CC) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
+OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
 # Setup list of objects.mk files
 ifdef PLATFORM
@@ -197,7 +238,11 @@ else
 endif
 
 # Setup compilation commands flags
-GENFLAGS	=	-I$(platform_src_dir)/include
+ifeq ($(CC_IS_CLANG),y)
+GENFLAGS	+=	$(CLANG_TARGET)
+GENFLAGS	+=	-Wno-unused-command-line-argument
+endif
+GENFLAGS	+=	-I$(platform_src_dir)/include
 GENFLAGS	+=	-I$(include_dir)
 ifneq ($(OPENSBI_VERSION_GIT),)
 GENFLAGS	+=	-DOPENSBI_VERSION_GIT="\"$(OPENSBI_VERSION_GIT)\""
@@ -211,6 +256,7 @@ CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 CFLAGS		+=	-mno-save-restore -mstrict-align
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
+CFLAGS		+=	$(RELAX_FLAG)
 CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
 CFLAGS		+=	-fno-pie -no-pie
@@ -225,18 +271,24 @@ ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-mno-save-restore -mstrict-align
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
+ASFLAGS		+=	$(RELAX_FLAG)
 ASFLAGS		+=	$(GENFLAGS)
 ASFLAGS		+=	$(platform-asflags-y)
 ASFLAGS		+=	$(firmware-asflags-y)
 
 ARFLAGS		=	rcs
 
-ELFFLAGS	+=	-Wl,--build-id=none -N -static-libgcc -lgcc
+ELFFLAGS	+=	$(USE_LD_FLAG)
+ELFFLAGS	+=	-Wl,--build-id=none -Wl,-N -static-libgcc -lgcc
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)
 
 MERGEFLAGS	+=	-r
+ifeq ($(LD_IS_LLD),y)
+MERGEFLAGS	+=	-b elf
+else
 MERGEFLAGS	+=	-b elf$(PLATFORM_RISCV_XLEN)-littleriscv
+endif
 MERGEFLAGS	+=	-m elf$(PLATFORM_RISCV_XLEN)lriscv
 
 DTSCPPFLAGS	=	$(CPPFLAGS) -nostdinc -nostdlib -fno-builtin -D__DTS__ -x assembler-with-cpp
diff --git a/README.md b/README.md
index 03c02fb1c37..b296f0089ef 100644
--- a/README.md
+++ b/README.md
@@ -96,8 +96,13 @@ Required Toolchain
 ------------------
 
 OpenSBI can be compiled natively or cross-compiled on a x86 host. For
-cross-compilation, you can build your own toolchain or just download
-a prebuilt one from the [Bootlin toolchain repository].
+cross-compilation, you can build your own toolchain, download a prebuilt one
+from the [Bootlin toolchain repository] or install a distribution-provided
+toolchain; if you opt to use LLVM/Clang, most distribution toolchains will
+support cross-compiling for RISC-V using the same toolchain as your native
+LLVM/Clang toolchain due to LLVM's ability to support multiple backends in the
+same binary, so is often an easy way to obtain a working cross-compilation
+toolchain.
 
 Please note that only a 64-bit version of the toolchain is available in
 the Bootlin toolchain repository for now.
@@ -202,6 +207,45 @@ export PLATFORM_RISCV_XLEN=32
 
 will generate 32-bit OpenSBI images. And vice vesa.
 
+Building with Clang/LLVM
+------------------------
+
+OpenSBI can also be built with Clang/LLVM. To build with just Clang but keep
+the default binutils (which will still use the *CROSS_COMPILE* prefix if
+defined), override the *CC* make variable with:
+```
+make CC=clang
+```
+
+To build with a full LLVM-based toolchain, not just Clang, enable the *LLVM*
+option with:
+```
+make LLVM=1
+```
+
+When using Clang, *CROSS_COMPILE* often does not need to be defined unless
+using GNU binutils with prefixed binary names. *PLATFORM_RISCV_XLEN* will be
+used to infer a default triple to pass to Clang, so if *PLATFORM_RISCV_XLEN*
+itself defaults to an undesired value then prefer setting that rather than the
+full triple via *CROSS_COMPILE*. If *CROSS_COMPILE* is nonetheless defined,
+rather than being used as a prefix for the executable name, it will instead be
+passed via the `--target` option with the trailing `-` removed, so must be a
+valid triple.
+
+These can also be mixed; for example using a GCC cross-compiler but LLVM
+binutils would be:
+```
+make CC=riscv64-unknown-elf-gcc LLVM=1
+```
+
+These variables must be passed for all the make invocations described in this
+document.
+
+NOTE: Using Clang with a `riscv*-linux-gnu` GNU binutils linker has been seen
+to produce broken binaries with missing relocations; it is therefore currently
+recommended that this combination be avoided or *FW_PIC=n* be used to disable
+building OpenSBI as a position-independent binary.
+
 Contributing to OpenSBI
 -----------------------
 

From 17729d44daf879e015950b0e9636afceefea0a59 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 11 Jul 2021 03:28:24 +0100
Subject: [PATCH 0830/1765] lib: utils: Drop dependency on libgcc by importing
 part of FreeBSD's libquad

We only need libgcc for 64-bit division on RV32. Whilst GCC toolchains
bundle libgcc, Clang toolchains tend not to ship libclang_rt.builtins
given every compiler is a cross-compiler for every target and so you
would need a silly number of builds of it, with only the native library
available; only vendor-provided Clang toolchains specifically for bare
metal cross-compiling are likely to provide it.

Thus, import part of FreeBSD's implementation of the division support
functions needed and stop linking against libgcc.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile                              |   2 +-
 lib/utils/libquad/divdi3.c            |  64 ++++++
 lib/utils/libquad/include/limits.h    |  12 ++
 lib/utils/libquad/include/sys/cdefs.h |  12 ++
 lib/utils/libquad/include/sys/types.h |  25 +++
 lib/utils/libquad/moddi3.c            |  66 ++++++
 lib/utils/libquad/objects.mk          |  14 ++
 lib/utils/libquad/qdivrem.c           | 278 ++++++++++++++++++++++++++
 lib/utils/libquad/quad.h              | 105 ++++++++++
 lib/utils/libquad/udivdi3.c           |  52 +++++
 lib/utils/libquad/umoddi3.c           |  54 +++++
 11 files changed, 683 insertions(+), 1 deletion(-)
 create mode 100644 lib/utils/libquad/divdi3.c
 create mode 100644 lib/utils/libquad/include/limits.h
 create mode 100644 lib/utils/libquad/include/sys/cdefs.h
 create mode 100644 lib/utils/libquad/include/sys/types.h
 create mode 100644 lib/utils/libquad/moddi3.c
 create mode 100644 lib/utils/libquad/objects.mk
 create mode 100644 lib/utils/libquad/qdivrem.c
 create mode 100644 lib/utils/libquad/quad.h
 create mode 100644 lib/utils/libquad/udivdi3.c
 create mode 100644 lib/utils/libquad/umoddi3.c

diff --git a/Makefile b/Makefile
index 5c188d544be..129b8ed74a1 100644
--- a/Makefile
+++ b/Makefile
@@ -279,7 +279,7 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
-ELFFLAGS	+=	-Wl,--build-id=none -Wl,-N -static-libgcc -lgcc
+ELFFLAGS	+=	-Wl,--build-id=none -Wl,-N
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)
 
diff --git a/lib/utils/libquad/divdi3.c b/lib/utils/libquad/divdi3.c
new file mode 100644
index 00000000000..c5b4a376477
--- /dev/null
+++ b/lib/utils/libquad/divdi3.c
@@ -0,0 +1,64 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)divdi3.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "quad.h"
+
+/*
+ * Divide two signed quads.
+ * ??? if -1/2 should produce -1 on this machine, this code is wrong
+ */
+quad_t
+__divdi3(quad_t a, quad_t b)
+{
+	u_quad_t ua, ub, uq;
+	int neg;
+
+	if (a < 0)
+		ua = -(u_quad_t)a, neg = 1;
+	else
+		ua = a, neg = 0;
+	if (b < 0)
+		ub = -(u_quad_t)b, neg ^= 1;
+	else
+		ub = b;
+	uq = __qdivrem(ua, ub, (u_quad_t *)0);
+	return (neg ? -uq : uq);
+}
diff --git a/lib/utils/libquad/include/limits.h b/lib/utils/libquad/include/limits.h
new file mode 100644
index 00000000000..9c69d2712bc
--- /dev/null
+++ b/lib/utils/libquad/include/limits.h
@@ -0,0 +1,12 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Jessica Clarke <jrtc27@jrtc27.com>
+ */
+
+#ifndef __LIMITS_H__
+#define __LIMITS_H__
+
+#define CHAR_BIT 8
+
+#endif
diff --git a/lib/utils/libquad/include/sys/cdefs.h b/lib/utils/libquad/include/sys/cdefs.h
new file mode 100644
index 00000000000..e8d6faacf06
--- /dev/null
+++ b/lib/utils/libquad/include/sys/cdefs.h
@@ -0,0 +1,12 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Jessica Clarke <jrtc27@jrtc27.com>
+ */
+
+#ifndef __SYS_CDEFS_H__
+#define __SYS_CDEFS_H__
+
+#define __FBSDID(s) struct __hack
+
+#endif
diff --git a/lib/utils/libquad/include/sys/types.h b/lib/utils/libquad/include/sys/types.h
new file mode 100644
index 00000000000..e3724374167
--- /dev/null
+++ b/lib/utils/libquad/include/sys/types.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Jessica Clarke <jrtc27@jrtc27.com>
+ */
+
+#ifndef __SYS_TYPES_H__
+#define __SYS_TYPES_H__
+
+#include <sbi/sbi_types.h>
+
+typedef unsigned long u_long;
+
+typedef int64_t quad_t;
+typedef uint64_t u_quad_t;
+
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#define _QUAD_LOWWORD 1
+#define _QUAD_HIGHWORD 0
+#else
+#define _QUAD_LOWWORD 0
+#define _QUAD_HIGHWORD 1
+#endif
+
+#endif
diff --git a/lib/utils/libquad/moddi3.c b/lib/utils/libquad/moddi3.c
new file mode 100644
index 00000000000..fc13b4da406
--- /dev/null
+++ b/lib/utils/libquad/moddi3.c
@@ -0,0 +1,66 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)moddi3.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "quad.h"
+
+/*
+ * Return remainder after dividing two signed quads.
+ *
+ * XXX
+ * If -1/2 should produce -1 on this machine, this code is wrong.
+ */
+quad_t
+__moddi3(quad_t a, quad_t b)
+{
+	u_quad_t ua, ub, ur;
+	int neg;
+
+	if (a < 0)
+		ua = -(u_quad_t)a, neg = 1;
+	else
+		ua = a, neg = 0;
+	if (b < 0)
+		ub = -(u_quad_t)b;
+	else
+		ub = b;
+	(void)__qdivrem(ua, ub, &ur);
+	return (neg ? -ur : ur);
+}
diff --git a/lib/utils/libquad/objects.mk b/lib/utils/libquad/objects.mk
new file mode 100644
index 00000000000..5e53cd00d6e
--- /dev/null
+++ b/lib/utils/libquad/objects.mk
@@ -0,0 +1,14 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2021 Jessica Clarke <jrtc27@jrtc27.com>
+#
+
+ifeq ($(PLATFORM_RISCV_XLEN),32)
+libsbiutils-objs-y += libquad/divdi3.o
+libsbiutils-objs-y += libquad/moddi3.o
+libsbiutils-objs-y += libquad/qdivrem.o
+libsbiutils-objs-y += libquad/udivdi3.o
+libsbiutils-objs-y += libquad/umoddi3.o
+libsbiutils-genflags-y += -I$(libsbiutils_dir)/libquad/include
+endif
diff --git a/lib/utils/libquad/qdivrem.c b/lib/utils/libquad/qdivrem.c
new file mode 100644
index 00000000000..ea09e7f43f1
--- /dev/null
+++ b/lib/utils/libquad/qdivrem.c
@@ -0,0 +1,278 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)qdivrem.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Multiprecision divide.  This algorithm is from Knuth vol. 2 (2nd ed),
+ * section 4.3.1, pp. 257--259.
+ */
+
+#include "quad.h"
+
+#define	B	(1L << HALF_BITS)	/* digit base */
+
+/* Combine two `digits' to make a single two-digit number. */
+#define	COMBINE(a, b) (((u_long)(a) << HALF_BITS) | (b))
+
+/* select a type for digits in base B: use unsigned short if they fit */
+#if ULONG_MAX == 0xffffffff && USHRT_MAX >= 0xffff
+typedef unsigned short digit;
+#else
+typedef u_long digit;
+#endif
+
+/*
+ * Shift p[0]..p[len] left `sh' bits, ignoring any bits that
+ * `fall out' the left (there never will be any such anyway).
+ * We may assume len >= 0.  NOTE THAT THIS WRITES len+1 DIGITS.
+ */
+static void
+shl(digit *p, int len, int sh)
+{
+	int i;
+
+	for (i = 0; i < len; i++)
+		p[i] = LHALF(p[i] << sh) | (p[i + 1] >> (HALF_BITS - sh));
+	p[i] = LHALF(p[i] << sh);
+}
+
+/*
+ * __qdivrem(u, v, rem) returns u/v and, optionally, sets *rem to u%v.
+ *
+ * We do this in base 2-sup-HALF_BITS, so that all intermediate products
+ * fit within u_long.  As a consequence, the maximum length dividend and
+ * divisor are 4 `digits' in this base (they are shorter if they have
+ * leading zeros).
+ */
+u_quad_t
+__qdivrem(u_quad_t uq, u_quad_t vq, u_quad_t *arq)
+{
+	union uu tmp;
+	digit *u, *v, *q;
+	digit v1, v2;
+	u_long qhat, rhat, t;
+	int m, n, d, j, i;
+	digit uspace[5], vspace[5], qspace[5];
+
+	/*
+	 * Take care of special cases: divide by zero, and u < v.
+	 */
+	if (vq == 0) {
+		/* divide by zero. */
+		static volatile const unsigned int zero = 0;
+
+		tmp.ul[H] = tmp.ul[L] = 1 / zero;
+		if (arq)
+			*arq = uq;
+		return (tmp.q);
+	}
+	if (uq < vq) {
+		if (arq)
+			*arq = uq;
+		return (0);
+	}
+	u = &uspace[0];
+	v = &vspace[0];
+	q = &qspace[0];
+
+	/*
+	 * Break dividend and divisor into digits in base B, then
+	 * count leading zeros to determine m and n.  When done, we
+	 * will have:
+	 *	u = (u[1]u[2]...u[m+n]) sub B
+	 *	v = (v[1]v[2]...v[n]) sub B
+	 *	v[1] != 0
+	 *	1 < n <= 4 (if n = 1, we use a different division algorithm)
+	 *	m >= 0 (otherwise u < v, which we already checked)
+	 *	m + n = 4
+	 * and thus
+	 *	m = 4 - n <= 2
+	 */
+	tmp.uq = uq;
+	u[0] = 0;
+	u[1] = HHALF(tmp.ul[H]);
+	u[2] = LHALF(tmp.ul[H]);
+	u[3] = HHALF(tmp.ul[L]);
+	u[4] = LHALF(tmp.ul[L]);
+	tmp.uq = vq;
+	v[1] = HHALF(tmp.ul[H]);
+	v[2] = LHALF(tmp.ul[H]);
+	v[3] = HHALF(tmp.ul[L]);
+	v[4] = LHALF(tmp.ul[L]);
+	for (n = 4; v[1] == 0; v++) {
+		if (--n == 1) {
+			u_long rbj;	/* r*B+u[j] (not root boy jim) */
+			digit q1, q2, q3, q4;
+
+			/*
+			 * Change of plan, per exercise 16.
+			 *	r = 0;
+			 *	for j = 1..4:
+			 *		q[j] = floor((r*B + u[j]) / v),
+			 *		r = (r*B + u[j]) % v;
+			 * We unroll this completely here.
+			 */
+			t = v[2];	/* nonzero, by definition */
+			q1 = u[1] / t;
+			rbj = COMBINE(u[1] % t, u[2]);
+			q2 = rbj / t;
+			rbj = COMBINE(rbj % t, u[3]);
+			q3 = rbj / t;
+			rbj = COMBINE(rbj % t, u[4]);
+			q4 = rbj / t;
+			if (arq)
+				*arq = rbj % t;
+			tmp.ul[H] = COMBINE(q1, q2);
+			tmp.ul[L] = COMBINE(q3, q4);
+			return (tmp.q);
+		}
+	}
+
+	/*
+	 * By adjusting q once we determine m, we can guarantee that
+	 * there is a complete four-digit quotient at &qspace[1] when
+	 * we finally stop.
+	 */
+	for (m = 4 - n; u[1] == 0; u++)
+		m--;
+	for (i = 4 - m; --i >= 0;)
+		q[i] = 0;
+	q += 4 - m;
+
+	/*
+	 * Here we run Program D, translated from MIX to C and acquiring
+	 * a few minor changes.
+	 *
+	 * D1: choose multiplier 1 << d to ensure v[1] >= B/2.
+	 */
+	d = 0;
+	for (t = v[1]; t < B / 2; t <<= 1)
+		d++;
+	if (d > 0) {
+		shl(&u[0], m + n, d);		/* u <<= d */
+		shl(&v[1], n - 1, d);		/* v <<= d */
+	}
+	/*
+	 * D2: j = 0.
+	 */
+	j = 0;
+	v1 = v[1];	/* for D3 -- note that v[1..n] are constant */
+	v2 = v[2];	/* for D3 */
+	do {
+		digit uj0, uj1, uj2;
+
+		/*
+		 * D3: Calculate qhat (\^q, in TeX notation).
+		 * Let qhat = min((u[j]*B + u[j+1])/v[1], B-1), and
+		 * let rhat = (u[j]*B + u[j+1]) mod v[1].
+		 * While rhat < B and v[2]*qhat > rhat*B+u[j+2],
+		 * decrement qhat and increase rhat correspondingly.
+		 * Note that if rhat >= B, v[2]*qhat < rhat*B.
+		 */
+		uj0 = u[j + 0];	/* for D3 only -- note that u[j+...] change */
+		uj1 = u[j + 1];	/* for D3 only */
+		uj2 = u[j + 2];	/* for D3 only */
+		if (uj0 == v1) {
+			qhat = B;
+			rhat = uj1;
+			goto qhat_too_big;
+		} else {
+			u_long n = COMBINE(uj0, uj1);
+			qhat = n / v1;
+			rhat = n % v1;
+		}
+		while (v2 * qhat > COMBINE(rhat, uj2)) {
+	qhat_too_big:
+			qhat--;
+			if ((rhat += v1) >= B)
+				break;
+		}
+		/*
+		 * D4: Multiply and subtract.
+		 * The variable `t' holds any borrows across the loop.
+		 * We split this up so that we do not require v[0] = 0,
+		 * and to eliminate a final special case.
+		 */
+		for (t = 0, i = n; i > 0; i--) {
+			t = u[i + j] - v[i] * qhat - t;
+			u[i + j] = LHALF(t);
+			t = (B - HHALF(t)) & (B - 1);
+		}
+		t = u[j] - t;
+		u[j] = LHALF(t);
+		/*
+		 * D5: test remainder.
+		 * There is a borrow if and only if HHALF(t) is nonzero;
+		 * in that (rare) case, qhat was too large (by exactly 1).
+		 * Fix it by adding v[1..n] to u[j..j+n].
+		 */
+		if (HHALF(t)) {
+			qhat--;
+			for (t = 0, i = n; i > 0; i--) { /* D6: add back. */
+				t += u[i + j] + v[i];
+				u[i + j] = LHALF(t);
+				t = HHALF(t);
+			}
+			u[j] = LHALF(u[j] + t);
+		}
+		q[j] = qhat;
+	} while (++j <= m);		/* D7: loop on j. */
+
+	/*
+	 * If caller wants the remainder, we have to calculate it as
+	 * u[m..m+n] >> d (this is at most n digits and thus fits in
+	 * u[m+1..m+n], but we may need more source digits).
+	 */
+	if (arq) {
+		if (d) {
+			for (i = m + n; i > m; --i)
+				u[i] = (u[i] >> d) |
+				    LHALF(u[i - 1] << (HALF_BITS - d));
+			u[i] = 0;
+		}
+		tmp.ul[H] = COMBINE(uspace[1], uspace[2]);
+		tmp.ul[L] = COMBINE(uspace[3], uspace[4]);
+		*arq = tmp.q;
+	}
+
+	tmp.ul[H] = COMBINE(qspace[1], qspace[2]);
+	tmp.ul[L] = COMBINE(qspace[3], qspace[4]);
+	return (tmp.q);
+}
diff --git a/lib/utils/libquad/quad.h b/lib/utils/libquad/quad.h
new file mode 100644
index 00000000000..a9f84470876
--- /dev/null
+++ b/lib/utils/libquad/quad.h
@@ -0,0 +1,105 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)quad.h	8.1 (Berkeley) 6/4/93
+ * $FreeBSD$
+ */
+
+/*
+ * Quad arithmetic.
+ *
+ * This library makes the following assumptions:
+ *
+ *  - The type long long (aka quad_t) exists.
+ *
+ *  - A quad variable is exactly twice as long as `long'.
+ *
+ *  - The machine's arithmetic is two's complement.
+ *
+ * This library can provide 128-bit arithmetic on a machine with 128-bit
+ * quads and 64-bit longs, for instance, or 96-bit arithmetic on machines
+ * with 48-bit longs.
+ */
+
+#include <sys/types.h>
+#include <limits.h>
+
+/*
+ * Depending on the desired operation, we view a `long long' (aka quad_t) in
+ * one or more of the following formats.
+ */
+union uu {
+	quad_t	q;		/* as a (signed) quad */
+	quad_t	uq;		/* as an unsigned quad */
+	long	sl[2];		/* as two signed longs */
+	u_long	ul[2];		/* as two unsigned longs */
+};
+
+/*
+ * Define high and low longwords.
+ */
+#define	H		_QUAD_HIGHWORD
+#define	L		_QUAD_LOWWORD
+
+/*
+ * Total number of bits in a quad_t and in the pieces that make it up.
+ * These are used for shifting, and also below for halfword extraction
+ * and assembly.
+ */
+#define	QUAD_BITS	(sizeof(quad_t) * CHAR_BIT)
+#define	LONG_BITS	(sizeof(long) * CHAR_BIT)
+#define	HALF_BITS	(sizeof(long) * CHAR_BIT / 2)
+
+/*
+ * Extract high and low shortwords from longword, and move low shortword of
+ * longword to upper half of long, i.e., produce the upper longword of
+ * ((quad_t)(x) << (number_of_bits_in_long/2)).  (`x' must actually be u_long.)
+ *
+ * These are used in the multiply code, to split a longword into upper
+ * and lower halves, and to reassemble a product as a quad_t, shifted left
+ * (sizeof(long)*CHAR_BIT/2).
+ */
+#define	HHALF(x)	((x) >> HALF_BITS)
+#define	LHALF(x)	((x) & ((1L << HALF_BITS) - 1))
+#define	LHUP(x)		((x) << HALF_BITS)
+
+int		__cmpdi2(quad_t a, quad_t b);
+quad_t		__divdi3(quad_t a, quad_t b);
+quad_t		__moddi3(quad_t a, quad_t b);
+u_quad_t	__qdivrem(u_quad_t u, u_quad_t v, u_quad_t *rem);
+int		__ucmpdi2(u_quad_t a, u_quad_t b);
+u_quad_t	__udivdi3(u_quad_t a, u_quad_t b);
+u_quad_t	__umoddi3(u_quad_t a, u_quad_t b);
+
+typedef unsigned int	qshift_t;
diff --git a/lib/utils/libquad/udivdi3.c b/lib/utils/libquad/udivdi3.c
new file mode 100644
index 00000000000..0e6f27edeb6
--- /dev/null
+++ b/lib/utils/libquad/udivdi3.c
@@ -0,0 +1,52 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)udivdi3.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "quad.h"
+
+/*
+ * Divide two unsigned quads.
+ */
+u_quad_t
+__udivdi3(u_quad_t a, u_quad_t b)
+{
+
+	return (__qdivrem(a, b, (u_quad_t *)0));
+}
diff --git a/lib/utils/libquad/umoddi3.c b/lib/utils/libquad/umoddi3.c
new file mode 100644
index 00000000000..7f45134213a
--- /dev/null
+++ b/lib/utils/libquad/umoddi3.c
@@ -0,0 +1,54 @@
+/*-
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)umoddi3.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "quad.h"
+
+/*
+ * Return remainder after dividing two unsigned quads.
+ */
+u_quad_t
+__umoddi3(u_quad_t a, u_quad_t b)
+{
+	u_quad_t r;
+
+	(void)__qdivrem(a, b, &r);
+	return (r);
+}

From e931f387b27a2f575f5b713391e241d8963b48c5 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 13 Jul 2021 11:23:41 +0800
Subject: [PATCH 0831/1765] lib: utils/fdt: Add fdt_parse_phandle_with_args()
 API

The libfdt project does not have a generic API to parse phandle
with args from a DT node so we add fdt_parse_phandle_with_args()
for this purpose. This new API will be useful to FDT based drivers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 11 +++++++
 lib/utils/fdt/fdt_helper.c         | 47 ++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 871f9b90f7d..55b9382e187 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -17,6 +17,13 @@ struct fdt_match {
 	void *data;
 };
 
+#define FDT_MAX_PHANDLE_ARGS 16
+struct fdt_phandle_args {
+	int node_offset;
+	int args_count;
+	u32 args[FDT_MAX_PHANDLE_ARGS];
+};
+
 struct platform_uart_data {
 	unsigned long addr;
 	unsigned long freq;
@@ -32,6 +39,10 @@ int fdt_find_match(void *fdt, int startoff,
 		   const struct fdt_match *match_table,
 		   const struct fdt_match **out_match);
 
+int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
+				const char *prop, const char *cells_prop,
+				int index, struct fdt_phandle_args *out_args);
+
 int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
 			   unsigned long *size);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index de7719622fa..a970c0f5ca4 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -72,6 +72,53 @@ int fdt_find_match(void *fdt, int startoff,
 	return SBI_ENODEV;
 }
 
+int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
+				const char *prop, const char *cells_prop,
+				int index, struct fdt_phandle_args *out_args)
+{
+	u32 i, pcells;
+	int len, pnodeoff;
+	const fdt32_t *list, *list_end, *val;
+
+	if (!fdt || (nodeoff < 0) || !prop || !cells_prop || !out_args)
+		return SBI_EINVAL;
+
+	list = fdt_getprop(fdt, nodeoff, prop, &len);
+	if (!list)
+		return SBI_ENOENT;
+	list_end = list + (len / sizeof(*list));
+
+	while (list < list_end) {
+		pnodeoff = fdt_node_offset_by_phandle(fdt,
+						fdt32_to_cpu(*list));
+		if (pnodeoff < 0)
+			return pnodeoff;
+		list++;
+
+		val = fdt_getprop(fdt, pnodeoff, cells_prop, &len);
+		if (!val)
+			return SBI_ENOENT;
+		pcells = fdt32_to_cpu(*val);
+		if (FDT_MAX_PHANDLE_ARGS < pcells)
+			return SBI_EINVAL;
+		if (list + pcells > list_end)
+			return SBI_ENOENT;
+
+		if (index > 0) {
+			list += pcells;
+			index--;
+		} else {
+			out_args->node_offset = pnodeoff;
+			out_args->args_count = pcells;
+			for (i = 0; i < pcells; i++)
+				out_args->args[i] = fdt32_to_cpu(list[i]);
+			return 0;
+		}
+	}
+
+	return SBI_ENOENT;
+}
+
 static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
 				 unsigned long *addr)
 {

From 36b8effe4a07bbf476deca6c8769529c69078f08 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 13 Jul 2021 11:23:42 +0800
Subject: [PATCH 0832/1765] lib: utils/gpio: Add generic GPIO configuration
 library

We add generic GPIO configuration library which is independent of
hardware description format (FDT or ACPI). The OpenSBI platform
support or GPIO drivers can register GPIO chip instances which
can be discovered and used by different GPIO clients. Each GPIO
chip instance has a unique ID which can be used by GPIO clients
to lookup GPIO chip instance.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/gpio/gpio.h |  99 +++++++++++++++++++++++++++++
 lib/utils/gpio/gpio.c         | 116 ++++++++++++++++++++++++++++++++++
 lib/utils/gpio/objects.mk     |  10 +++
 3 files changed, 225 insertions(+)
 create mode 100644 include/sbi_utils/gpio/gpio.h
 create mode 100644 lib/utils/gpio/gpio.c
 create mode 100644 lib/utils/gpio/objects.mk

diff --git a/include/sbi_utils/gpio/gpio.h b/include/sbi_utils/gpio/gpio.h
new file mode 100644
index 00000000000..167d11a847e
--- /dev/null
+++ b/include/sbi_utils/gpio/gpio.h
@@ -0,0 +1,99 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#include <sbi/sbi_types.h>
+
+#define GPIO_LINE_DIRECTION_IN	1
+#define GPIO_LINE_DIRECTION_OUT	0
+
+/** Representation of a GPIO pin */
+struct gpio_pin {
+	/** Pointer to the GPIO chip */
+	struct gpio_chip *chip;
+	/** Identification of GPIO pin within GPIO chip */
+	unsigned int offset;
+	/**
+	 * Additional configuration flags of the GPIO pin desired
+	 * by GPIO clients.
+	 *
+	 * NOTE: GPIO chip can have custom configuration flags.
+	 */
+	unsigned int flags;
+#define GPIO_FLAG_ACTIVE_LOW	0x1
+#define GPIO_FLAG_SINGLE_ENDED	0x2
+#define GPIO_FLAG_OPEN_DRAIN	0x4
+#define GPIO_FLAG_TRANSITORY	0x8
+#define GPIO_FLAG_PULL_UP	0x10
+#define GPIO_FLAG_PULL_DOWN	0x20
+};
+
+/** Representation of a GPIO chip */
+struct gpio_chip {
+	/** Pointer to GPIO driver owning this GPIO chip */
+	void *driver;
+	/** Uniquie ID of the GPIO chip assigned by the driver */
+	unsigned int id;
+	/** Number of GPIOs supported by the GPIO chip */
+	unsigned int ngpio;
+	/**
+	 * Get current direction of GPIO pin
+	 *
+	 * @return 0=output, 1=input, or negative error
+	 */
+	int (*get_direction)(struct gpio_pin *gp);
+	/**
+	 * Set input direction of GPIO pin
+	 *
+	 * @return 0 on success and negative error code on failure
+	 */
+	int (*direction_input)(struct gpio_pin *gp);
+	/**
+	 * Set output direction of GPIO pin with given output value
+	 *
+	 * @return 0 on success and negative error code on failure
+	 */
+	int (*direction_output)(struct gpio_pin *gp, int value);
+	/**
+	 * Get current value of GPIO pin
+	 *
+	 * @return 0=low, 1=high, or negative error
+	 */
+	int (*get)(struct gpio_pin *gp);
+	/** Set output value for GPIO pin */
+	void (*set)(struct gpio_pin *gp, int value);
+};
+
+/** Find a registered GPIO chip */
+struct gpio_chip *gpio_chip_find(unsigned int id);
+
+/** Register GPIO chip */
+int gpio_chip_add(struct gpio_chip *gc);
+
+/** Un-register GPIO chip */
+void gpio_chip_remove(struct gpio_chip *gc);
+
+/** Get current direction of GPIO pin */
+int gpio_get_direction(struct gpio_pin *gp);
+
+/** Set input direction of GPIO pin */
+int gpio_direction_input(struct gpio_pin *gp);
+
+/** Set output direction of GPIO pin */
+int gpio_direction_output(struct gpio_pin *gp, int value);
+
+/** Get current value of GPIO pin */
+int gpio_get(struct gpio_pin *gp);
+
+/** Set output value of GPIO pin */
+int gpio_set(struct gpio_pin *gp, int value);
+
+#endif
diff --git a/lib/utils/gpio/gpio.c b/lib/utils/gpio/gpio.c
new file mode 100644
index 00000000000..fb30c0f7b16
--- /dev/null
+++ b/lib/utils/gpio/gpio.c
@@ -0,0 +1,116 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/gpio/gpio.h>
+
+#define GPIO_CHIP_MAX		16
+
+static struct gpio_chip *gc_array[GPIO_CHIP_MAX];
+
+struct gpio_chip *gpio_chip_find(unsigned int id)
+{
+	unsigned int i;
+	struct gpio_chip *ret = NULL;
+
+	for (i = 0; i < GPIO_CHIP_MAX; i++) {
+		if (gc_array[i] && gc_array[i]->id == id) {
+			ret = gc_array[i];
+			break;
+		}
+	}
+
+	return ret;
+}
+
+int gpio_chip_add(struct gpio_chip *gc)
+{
+	int i, ret = SBI_ENOSPC;
+
+	if (!gc)
+		return SBI_EINVAL;
+	if (gpio_chip_find(gc->id))
+		return SBI_EALREADY;
+
+	for (i = 0; i < GPIO_CHIP_MAX; i++) {
+		if (!gc_array[i]) {
+			gc_array[i] = gc;
+			ret = 0;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+void gpio_chip_remove(struct gpio_chip *gc)
+{
+	int i;
+
+	if (!gc)
+		return;
+
+	for (i = 0; i < GPIO_CHIP_MAX; i++) {
+		if (gc_array[i] == gc) {
+			gc_array[i] = NULL;
+			break;
+		}
+	}
+}
+
+int gpio_get_direction(struct gpio_pin *gp)
+{
+	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
+		return SBI_EINVAL;
+	if (!gp->chip->get_direction)
+		return SBI_ENOSYS;
+
+	return gp->chip->get_direction(gp);
+}
+
+int gpio_direction_input(struct gpio_pin *gp)
+{
+	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
+		return SBI_EINVAL;
+	if (!gp->chip->direction_input)
+		return SBI_ENOSYS;
+
+	return gp->chip->direction_input(gp);
+}
+
+int gpio_direction_output(struct gpio_pin *gp, int value)
+{
+	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
+		return SBI_EINVAL;
+	if (!gp->chip->direction_output)
+		return SBI_ENOSYS;
+
+	return gp->chip->direction_output(gp, value);
+}
+
+int gpio_get(struct gpio_pin *gp)
+{
+	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
+		return SBI_EINVAL;
+	if (!gp->chip->get)
+		return SBI_ENOSYS;
+
+	return gp->chip->get(gp);
+}
+
+int gpio_set(struct gpio_pin *gp, int value)
+{
+	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
+		return SBI_EINVAL;
+	if (!gp->chip->set)
+		return SBI_ENOSYS;
+
+	gp->chip->set(gp, value);
+	return 0;
+}
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
new file mode 100644
index 00000000000..e99a895cf1a
--- /dev/null
+++ b/lib/utils/gpio/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2021 Western Digital Corporation or its affiliates.
+#
+# Authors:
+#   Anup Patel <anup.patel@wdc.com>
+#
+
+libsbiutils-objs-y += gpio/gpio.o

From c14f1fe0dfd96d7be1ed2abba0a873110cdbcc9d Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 13 Jul 2021 11:23:43 +0800
Subject: [PATCH 0833/1765] lib: utils/gpio: Add simple FDT based GPIO
 framework

We add a simple FDT based GPIO framework which is built on top
of generic GPIO library. The phandle of FDT GPIO chip DT node
is treated as unique GPIO chip ID required by the generic GPIO
library. The FDT based GPIO chip drivers will be probed on-demand
from fdt_gpio_pin_get() called by the GPIO client drivers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/gpio/fdt_gpio.h |  34 ++++++++
 lib/utils/gpio/fdt_gpio.c         | 132 ++++++++++++++++++++++++++++++
 lib/utils/gpio/objects.mk         |   1 +
 3 files changed, 167 insertions(+)
 create mode 100644 include/sbi_utils/gpio/fdt_gpio.h
 create mode 100644 lib/utils/gpio/fdt_gpio.c

diff --git a/include/sbi_utils/gpio/fdt_gpio.h b/include/sbi_utils/gpio/fdt_gpio.h
new file mode 100644
index 00000000000..19e1b587406
--- /dev/null
+++ b/include/sbi_utils/gpio/fdt_gpio.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_GPIO_H__
+#define __FDT_GPIO_H__
+
+#include <sbi_utils/gpio/gpio.h>
+
+/** FDT based GPIO driver */
+struct fdt_gpio {
+	const struct fdt_match *match_table;
+	int (*xlate)(struct gpio_chip *chip,
+		     const struct fdt_phandle_args *pargs,
+		     struct gpio_pin *out_pin);
+	int (*init)(void *fdt, int nodeoff, u32 phandle,
+		    const struct fdt_match *match);
+};
+
+/** Get a GPIO pin using "gpios" DT property of client DT node */
+int fdt_gpio_pin_get(void *fdt, int nodeoff, int index,
+		     struct gpio_pin *out_pin);
+
+/** Simple xlate function to convert two GPIO FDT cells into GPIO pin */
+int fdt_gpio_simple_xlate(struct gpio_chip *chip,
+			  const struct fdt_phandle_args *pargs,
+			  struct gpio_pin *out_pin);
+
+#endif
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
new file mode 100644
index 00000000000..bff391fcff6
--- /dev/null
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -0,0 +1,132 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/gpio/fdt_gpio.h>
+
+static struct fdt_gpio *gpio_drivers[] = {
+};
+
+static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
+{
+	int pos;
+
+	if (!chip)
+		return NULL;
+
+	for (pos = 0; pos < array_size(gpio_drivers); pos++) {
+		if (chip->driver == gpio_drivers[pos])
+			return gpio_drivers[pos];
+	}
+
+	return NULL;
+}
+
+static int fdt_gpio_init(void *fdt, u32 phandle)
+{
+	int pos, nodeoff, rc;
+	struct fdt_gpio *drv;
+	const struct fdt_match *match;
+
+	/* Find node offset */
+	nodeoff = fdt_node_offset_by_phandle(fdt, phandle);
+	if (nodeoff < 0)
+		return nodeoff;
+
+	/* Check "gpio-controller" property */
+	if (!fdt_getprop(fdt, nodeoff, "gpio-controller", &rc))
+		return SBI_EINVAL;
+
+	/* Try all GPIO drivers one-by-one */
+	for (pos = 0; pos < array_size(gpio_drivers); pos++) {
+		drv = gpio_drivers[pos];
+
+		match = fdt_match_node(fdt, nodeoff, drv->match_table);
+		if (match && drv->init) {
+			rc = drv->init(fdt, nodeoff, phandle, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			if (rc)
+				return rc;
+			return 0;
+		}
+	}
+
+	return SBI_ENOSYS;
+}
+
+static int fdt_gpio_chip_find(void *fdt, u32 phandle,
+			      struct gpio_chip **out_chip)
+{
+	int rc;
+	struct gpio_chip *chip = gpio_chip_find(phandle);
+
+	if (!chip) {
+		/* GPIO chip not found so initialize matching driver */
+		rc = fdt_gpio_init(fdt, phandle);
+		if (rc)
+			return rc;
+
+		/* Try to find GPIO chip again */
+		chip = gpio_chip_find(phandle);
+		if (!chip)
+			return SBI_ENOSYS;
+	}
+
+	if (out_chip)
+		*out_chip = chip;
+
+	return 0;
+}
+
+int fdt_gpio_pin_get(void *fdt, int nodeoff, int index,
+		     struct gpio_pin *out_pin)
+{
+	int rc;
+	u32 phandle;
+	struct fdt_gpio *drv;
+	struct gpio_chip *chip = NULL;
+	struct fdt_phandle_args pargs;
+
+	if (!fdt || (nodeoff < 0) || (index < 0) || !out_pin)
+		return SBI_EINVAL;
+
+	pargs.node_offset = pargs.args_count = 0;
+	rc = fdt_parse_phandle_with_args(fdt, nodeoff,
+					 "gpios", "#gpio-cells",
+					 index, &pargs);
+	if (rc)
+		return rc;
+
+	phandle = fdt_get_phandle(fdt, pargs.node_offset);
+	rc = fdt_gpio_chip_find(fdt, phandle, &chip);
+	if (rc)
+		return rc;
+
+	drv = fdt_gpio_driver(chip);
+	if (!drv || !drv->xlate)
+		return SBI_ENOSYS;
+
+	return drv->xlate(chip, &pargs, out_pin);
+}
+
+int fdt_gpio_simple_xlate(struct gpio_chip *chip,
+			  const struct fdt_phandle_args *pargs,
+			  struct gpio_pin *out_pin)
+{
+	if ((pargs->args_count < 2) || (chip->ngpio <= pargs->args[0]))
+		return SBI_EINVAL;
+
+	out_pin->chip = chip;
+	out_pin->offset = pargs->args[0];
+	out_pin->flags = pargs->args[1];
+	return 0;
+}
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index e99a895cf1a..dade45e8599 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -7,4 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+libsbiutils-objs-y += gpio/fdt_gpio.o
 libsbiutils-objs-y += gpio/gpio.o

From 4c3df2ab96be2ae513b80ee96d1db7b97155d231 Mon Sep 17 00:00:00 2001
From: Green Wan <green.wan@sifive.com>
Date: Tue, 13 Jul 2021 11:23:44 +0800
Subject: [PATCH 0834/1765] lib: utils/gpio: Add minimal SiFive GPIO driver

We add a minimal SiFive GPIO driver so that we can do GPIO based
system power-off and reset.

Signed-off-by: Green Wan <green.wan@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/gpio/fdt_gpio.c        |   3 +
 lib/utils/gpio/fdt_gpio_sifive.c | 105 +++++++++++++++++++++++++++++++
 lib/utils/gpio/objects.mk        |   1 +
 3 files changed, 109 insertions(+)
 create mode 100644 lib/utils/gpio/fdt_gpio_sifive.c

diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index bff391fcff6..297b248b6d8 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -12,7 +12,10 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 
+extern struct fdt_gpio fdt_gpio_sifive;
+
 static struct fdt_gpio *gpio_drivers[] = {
+	&fdt_gpio_sifive
 };
 
 static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
new file mode 100644
index 00000000000..abc9d72be0d
--- /dev/null
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -0,0 +1,105 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 SiFive
+ *
+ * Authors:
+ *   Green Wan <green.wan@sifive.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/gpio/fdt_gpio.h>
+
+#define SIFIVE_GPIO_CHIP_MAX	2
+
+#define SIFIVE_GPIO_PINS_MIN	1
+#define SIFIVE_GPIO_PINS_MAX	32
+#define SIFIVE_GPIO_PINS_DEF	16
+
+#define SIFIVE_GPIO_OUTEN	0x8
+#define SIFIVE_GPIO_OUTVAL	0xc
+#define SIFIVE_GPIO_BIT(b)	(1U << (b))
+
+struct sifive_gpio_chip {
+	unsigned long addr;
+	struct gpio_chip chip;
+};
+
+static unsigned int sifive_gpio_chip_count;
+static struct sifive_gpio_chip sifive_gpio_chip_array[SIFIVE_GPIO_CHIP_MAX];
+
+static int sifive_gpio_direction_output(struct gpio_pin *gp, int value)
+{
+	unsigned int v;
+	struct sifive_gpio_chip *chip =
+		container_of(gp->chip, struct sifive_gpio_chip, chip);
+
+	v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTEN));
+	v |= SIFIVE_GPIO_BIT(gp->offset);
+	writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTEN));
+
+	v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
+	if (!value)
+		v &= ~SIFIVE_GPIO_BIT(gp->offset);
+	else
+		v |= SIFIVE_GPIO_BIT(gp->offset);
+	writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
+
+	return 0;
+}
+
+static void sifive_gpio_set(struct gpio_pin *gp, int value)
+{
+	unsigned int v;
+	struct sifive_gpio_chip *chip =
+		container_of(gp->chip, struct sifive_gpio_chip, chip);
+
+	v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
+	if (!value)
+		v &= ~SIFIVE_GPIO_BIT(gp->offset);
+	else
+		v |= SIFIVE_GPIO_BIT(gp->offset);
+	writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
+}
+
+extern struct fdt_gpio fdt_gpio_sifive;
+
+static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
+			    const struct fdt_match *match)
+{
+	int rc;
+	struct sifive_gpio_chip *chip;
+
+	if (SIFIVE_GPIO_CHIP_MAX <= sifive_gpio_chip_count)
+		return SBI_ENOSPC;
+	chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, &chip->addr, NULL);
+	if (rc)
+		return rc;
+
+	chip->chip.driver = &fdt_gpio_sifive;
+	chip->chip.id = phandle;
+	chip->chip.ngpio = SIFIVE_GPIO_PINS_DEF;
+	chip->chip.direction_output = sifive_gpio_direction_output;
+	chip->chip.set = sifive_gpio_set;
+	rc = gpio_chip_add(&chip->chip);
+	if (rc)
+		return rc;
+
+	sifive_gpio_chip_count++;
+	return 0;
+}
+
+static const struct fdt_match sifive_gpio_match[] = {
+	{ .compatible = "sifive,gpio0" },
+	{ },
+};
+
+struct fdt_gpio fdt_gpio_sifive = {
+	.match_table = sifive_gpio_match,
+	.xlate = fdt_gpio_simple_xlate,
+	.init = sifive_gpio_init,
+};
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index dade45e8599..8eb7736d478 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -8,4 +8,5 @@
 #
 
 libsbiutils-objs-y += gpio/fdt_gpio.o
+libsbiutils-objs-y += gpio/fdt_gpio_sifive.o
 libsbiutils-objs-y += gpio/gpio.o

From e3d6919d10d73ff97cfe583cc78fc01c7beaf4b5 Mon Sep 17 00:00:00 2001
From: Green Wan <green.wan@sifive.com>
Date: Tue, 13 Jul 2021 11:23:45 +0800
Subject: [PATCH 0835/1765] lib: utils/reset: Add generic GPIO reset driver

We add generic GPIO reset driver inspired from gpio-restart
and gpio-poweroff drivers of Linux kernel.

Signed-off-by: Green Wan <green.wan@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/reset/fdt_reset.c      |   2 +
 lib/utils/reset/fdt_reset_gpio.c | 141 +++++++++++++++++++++++++++++++
 lib/utils/reset/objects.mk       |   1 +
 3 files changed, 144 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_gpio.c

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 48a49fb5f04..aa5f59ff48a 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -12,11 +12,13 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
+extern struct fdt_reset fdt_reset_gpio;
 extern struct fdt_reset fdt_reset_sifive_test;
 extern struct fdt_reset fdt_reset_htif;
 extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
+	&fdt_reset_gpio,
 	&fdt_reset_sifive_test,
 	&fdt_reset_htif,
 	&fdt_reset_thead,
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
new file mode 100644
index 00000000000..7e0eb7420fa
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 SiFive
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Green Wan <green.wan@sifive.com>
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/gpio/fdt_gpio.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+struct gpio_reset {
+	struct gpio_pin pin;
+	u32 active_delay;
+	u32 inactive_delay;
+};
+
+static struct gpio_reset poweroff = {
+	.active_delay = 100,
+	.inactive_delay = 100
+};
+
+static struct gpio_reset restart = {
+	.active_delay = 100,
+	.inactive_delay = 100
+};
+
+/* Custom mdelay function until we have a generic mdelay() API */
+static void gpio_mdelay(unsigned long msecs)
+{
+	volatile int i;
+	while (msecs--)
+		for (i = 0; i < 100000; i++) ;
+}
+
+static int gpio_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return 1;
+	}
+
+	return 0;
+}
+
+static void gpio_system_reset(u32 type, u32 reason)
+{
+	struct gpio_reset *reset = NULL;
+
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		reset = &poweroff;
+		break;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		reset = &restart;
+		break;
+	}
+
+	if (reset) {
+		if (!reset->pin.chip) {
+			sbi_printf("%s: gpio pin not available\n", __func__);
+			goto skip_reset;
+		}
+
+		/* drive it active, also inactive->active edge */
+		gpio_direction_output(&reset->pin, 1);
+		gpio_mdelay(reset->active_delay);
+
+		/* drive inactive, also active->inactive edge */
+		gpio_set(&reset->pin, 0);
+		gpio_mdelay(reset->inactive_delay);
+
+		/* drive it active, also inactive->active edge */
+		gpio_set(&reset->pin, 1);
+
+skip_reset:
+		/* hang !!! */
+		sbi_hart_hang();
+	}
+}
+
+static struct sbi_system_reset_device gpio_reset = {
+	.name = "gpio-reset",
+	.system_reset_check = gpio_system_reset_check,
+	.system_reset = gpio_system_reset
+};
+
+static int gpio_reset_init(void *fdt, int nodeoff,
+			   const struct fdt_match *match)
+{
+	int rc, len;
+	const fdt32_t *val;
+	bool is_restart = (ulong)match->data;
+	const char *dir_prop = (is_restart) ? "open-source" : "input";
+	struct gpio_reset *reset = (is_restart) ? &restart : &poweroff;
+
+	rc = fdt_gpio_pin_get(fdt, nodeoff, 0, &reset->pin);
+	if (rc)
+		return rc;
+
+	if (fdt_getprop(fdt, nodeoff, dir_prop, &len)) {
+		rc = gpio_direction_input(&reset->pin);
+		if (rc)
+			return rc;
+	}
+
+	val = fdt_getprop(fdt, nodeoff, "active-delay-ms", &len);
+	if (len > 0)
+		reset->active_delay = fdt32_to_cpu(*val);
+
+	val = fdt_getprop(fdt, nodeoff, "inactive-delay-ms", &len);
+	if (len > 0)
+		reset->inactive_delay = fdt32_to_cpu(*val);
+
+	sbi_system_reset_set_device(&gpio_reset);
+
+	return 0;
+}
+
+static const struct fdt_match gpio_reset_match[] = {
+	{ .compatible = "gpio-poweroff", .data = (void *)FALSE },
+	{ .compatible = "gpio-restart", .data = (void *)TRUE },
+	{ },
+};
+
+struct fdt_reset fdt_reset_gpio = {
+	.match_table = gpio_reset_match,
+	.init = gpio_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 672aad9cf04..4215396406e 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -8,6 +8,7 @@
 #
 
 libsbiutils-objs-y += reset/fdt_reset.o
+libsbiutils-objs-y += reset/fdt_reset_gpio.o
 libsbiutils-objs-y += reset/fdt_reset_htif.o
 libsbiutils-objs-y += reset/fdt_reset_thead.o
 libsbiutils-objs-y += reset/fdt_reset_thead_asm.o

From 7210e907858be23a207479e26fde947e968b7f29 Mon Sep 17 00:00:00 2001
From: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Date: Mon, 12 Jul 2021 10:24:05 +0100
Subject: [PATCH 0836/1765] firmware: use __SIZEOF_LONG__ for field offsets in
 fw_dynamic.h

The fields are of type unsigned long and are not pointers. While this
happens to be the same for RV32/RV64, it is not correct when compiling
for a CHERI-RISC-V system where pointers are twice the size of long.

Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/fw_dynamic.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
index a07266ef5da..dea207bc8d1 100644
--- a/include/sbi/fw_dynamic.h
+++ b/include/sbi/fw_dynamic.h
@@ -15,17 +15,17 @@
 /* clang-format off */
 
 /** Offset of magic member in fw_dynamic_info */
-#define FW_DYNAMIC_INFO_MAGIC_OFFSET		(0 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_MAGIC_OFFSET		(0 * __SIZEOF_LONG__)
 /** Offset of version member in fw_dynamic_info */
-#define FW_DYNAMIC_INFO_VERSION_OFFSET		(1 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_VERSION_OFFSET		(1 * __SIZEOF_LONG__)
 /** Offset of next_addr member in fw_dynamic_info (version >= 1) */
-#define FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET	(2 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET	(2 * __SIZEOF_LONG__)
 /** Offset of next_mode member in fw_dynamic_info  (version >= 1) */
-#define FW_DYNAMIC_INFO_NEXT_MODE_OFFSET	(3 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_NEXT_MODE_OFFSET	(3 * __SIZEOF_LONG__)
 /** Offset of options member in fw_dynamic_info  (version >= 1) */
-#define FW_DYNAMIC_INFO_OPTIONS_OFFSET		(4 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_OPTIONS_OFFSET		(4 * __SIZEOF_LONG__)
 /** Offset of boot_hart member in fw_dynamic_info  (version >= 2) */
-#define FW_DYNAMIC_INFO_BOOT_HART_OFFSET	(5 * __SIZEOF_POINTER__)
+#define FW_DYNAMIC_INFO_BOOT_HART_OFFSET	(5 * __SIZEOF_LONG__)
 
 /** Expected value of info magic ('OSBI' ascii string in hex) */
 #define FW_DYNAMIC_INFO_MAGIC_VALUE		0x4942534f

From f3a8f603a702b10f13f0fad7c0c815b21fb2384a Mon Sep 17 00:00:00 2001
From: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Date: Mon, 12 Jul 2021 13:39:59 +0100
Subject: [PATCH 0837/1765] include: types: Use __builtin_offsetof when
 supported

Clang provides a __builtin_offsetof which can be detected using
__has_builtin().

Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_types.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 38e3565b486..7fb1af7baae 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -68,8 +68,14 @@ typedef unsigned long		physical_size_t;
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)
 
+#ifndef __has_builtin
+#define __has_builtin(...) 0
+#endif
+
 #undef offsetof
-#ifdef __compiler_offsetof
+#if __has_builtin(__builtin_offsetof)
+#define offsetof(TYPE, MEMBER) __builtin_offsetof(TYPE,MEMBER)
+#elif defined(__compiler_offsetof)
 #define offsetof(TYPE, MEMBER) __compiler_offsetof(TYPE,MEMBER)
 #else
 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)

From 8a1475b5a1325547af7f428d4aed063d7a4007c7 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 10 Jul 2021 22:28:20 +0800
Subject: [PATCH 0838/1765] firmware: Remove the unhelpful alignment codes
 before fdt relocation

If the device tree is at an address that is not __SIZEOF_POINTER__
aligned, the fdt relocation code tries to align both source and
destination address to __SIZEOF_POINTER__ before the memory copy.
But such alignment can lead to unexpected results if either source
or destination address is not aligned.

In fact libfdt requires that the device tree must be at an 8-byte
aligned address. Hence remove the unhelpful alignment codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 928ca91b5a0..6baf6ab8eb9 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -349,8 +349,7 @@ _scratch_init:
 	 * previous booting stage.
 	 */
 	beqz	a1, _fdt_reloc_done
-	/* Mask values in a3 and a4 */
-	li	a3, ~(__SIZEOF_POINTER__ - 1)
+	/* Mask values in a4 */
 	li	a4, 0xff
 	/* t1 = destination FDT start address */
 	MOV_3R	s0, a0, s1, a1, s2, a2
@@ -359,10 +358,8 @@ _scratch_init:
 	MOV_3R	a0, s0, a1, s1, a2, s2
 	beqz	t1, _fdt_reloc_done
 	beq	t1, a1, _fdt_reloc_done
-	and	t1, t1, a3
 	/* t0 = source FDT start address */
 	add	t0, a1, zero
-	and	t0, t0, a3
 	/* t2 = source FDT size in big-endian */
 #if __riscv_xlen == 64
 	lwu	t2, 4(t0)

From a4555e5698c1fbf5d89a849fbc8c01594401cf0a Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 10 Jul 2021 22:28:21 +0800
Subject: [PATCH 0839/1765] docs: Document parameters passed to firmware and
 alignment requirement

This updates documentation to describe parameters passed to firmware
from previous booting stage, and corresponding address alignment
requirement.

This also fixes a typo in fw_dynamic.md (it's => its).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/firmware/fw.md         | 7 +++++++
 docs/firmware/fw_dynamic.md | 5 +++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index cc0cc9e56ee..913f9392b27 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -9,6 +9,13 @@ OpenSBI generic library code. The supported firmwares type will differ in how
 the arguments passed by the platform early boot stage are handled, as well as
 how the boot stage following the firmware will be handled and executed.
 
+The previous booting stage will pass information via the following registers
+of RISC-V CPU:
+
+* hartid via *a0* register
+* device tree blob address in memory via *a1* register. The address must
+  be aligned to 8 bytes.
+
 OpenSBI currently supports three different types of firmwares.
 
 Firmware with Dynamic Information (*FW_DYNAMIC*)
diff --git a/docs/firmware/fw_dynamic.md b/docs/firmware/fw_dynamic.md
index 01f43f9f423..7b9b19250a1 100644
--- a/docs/firmware/fw_dynamic.md
+++ b/docs/firmware/fw_dynamic.md
@@ -6,8 +6,9 @@ information about next booting stage (e.g. a bootloader or an OS) and runtime
 OpenSBI library options from previous booting stage.
 
 The previous booting stage will pass information to *FW_DYNAMIC* by creating
-*struct fw_dynamic_info* in memory and passing it's address to *FW_DYNAMIC*
-via *a2* register of RISC-V CPU.
+*struct fw_dynamic_info* in memory and passing its address to *FW_DYNAMIC*
+via *a2* register of RISC-V CPU. The address must be aligned to 8 bytes on
+RV64 and 4 bytes on RV32.
 
 A *FW_DYNAMIC* firmware is particularly useful when the booting stage executed
 prior to OpenSBI firmware is capable of loading both the OpenSBI firmware and

From 2c74dc3c47f7e77b42735e383292de920273bf97 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 12 Jul 2021 08:48:02 +0800
Subject: [PATCH 0840/1765] docs: Document FW_PIC compile time option

FW_PIC=y is on by default, but the doc is missing when this was
introduced. Add some description for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/firmware/fw.md | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 913f9392b27..5a678487d02 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -69,6 +69,12 @@ parameters:
   argument by the prior booting stage.
 * **FW_FDT_PADDING** - Optional zero bytes padding to the embedded flattened
   device tree binary file specified by **FW_FDT_PATH** option.
+* **FW_PIC** - "FW_PIC=y" generates position independent executable firmware
+  images. OpenSBI can run at arbitrary address with appropriate alignment.
+  Therefore, the original relocation mechanism ("FW_PIC=n") will be skipped.
+  In other words, OpenSBI will directly run at the load address without any
+  code movement. This option requires a toolchain with PIE support, and it
+  is on by default.
 
 Additionally, each firmware type as a set of type specific configuration
 parameters. Detailed information for each firmware type can be found in the

From 81eb7088b6ae1b3b14ed57ef428b1b9f74d468cf Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 12 Jul 2021 09:20:16 +0800
Subject: [PATCH 0841/1765] README: Update toolchain information

Recent FW_PIC=y changes actually require toolchains with PIE support
and it is on by default. Existing doc uses a GNU bare-metal toolchain
as examples but it does not support PIE.

Replace references of bare-metal toolchain prefix with Linux toolchain
prefix everywhere in documentation.

Also indicate that "riscv64-unknown-freebsd-" as an alternative to
"riscv64-linux-" GNU toolchain.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 README.md | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index b296f0089ef..9fdf09792a3 100644
--- a/README.md
+++ b/README.md
@@ -104,6 +104,14 @@ LLVM/Clang toolchain due to LLVM's ability to support multiple backends in the
 same binary, so is often an easy way to obtain a working cross-compilation
 toolchain.
 
+Basically, we prefer toolchains with Position Independent Executable (PIE)
+support like *riscv64-linux-gnu-gcc*, *riscv64-unknown-freebsd-gcc*, or
+*Clang/LLVM* as they generate PIE firmware images that can run at arbitrary
+address with appropriate alignment. If a bare-metal GNU toolchain (e.g.
+*riscv64-unknown-elf-gcc*) is used, static linked firmware images are
+generated instead. *Clang/LLVM* can still generate PIE images if a bare-metal
+triple is used (e.g. *-target riscv64-unknown-elf*).
+
 Please note that only a 64-bit version of the toolchain is available in
 the Bootlin toolchain repository for now.
 
@@ -116,7 +124,7 @@ architecture than RISC-V.
 
 For cross-compiling, the environment variable *CROSS_COMPILE* must be defined
 to specify the name prefix of the RISC-V compiler toolchain executables, e.g.
-*riscv64-unknown-elf-* if the gcc executable used is *riscv64-unknown-elf-gcc*.
+*riscv64-linux-gnu-* if the gcc executable used is *riscv64-linux-gnu-gcc*.
 
 To build *libsbi.a* simply execute:
 ```
@@ -192,16 +200,16 @@ Building 32-bit / 64-bit OpenSBI Images
 ---------------------------------------
 By default, building OpenSBI generates 32-bit or 64-bit images based on the
 supplied RISC-V cross-compile toolchain. For example if *CROSS_COMPILE* is set
-to *riscv64-unknown-elf-*, 64-bit OpenSBI images will be generated. If building
+to *riscv64-linux-gnu-*, 64-bit OpenSBI images will be generated. If building
 32-bit OpenSBI images, *CROSS_COMPILE* should be set to a toolchain that is
-pre-configured to generate 32-bit RISC-V codes, like *riscv32-unknown-elf-*.
+pre-configured to generate 32-bit RISC-V codes, like *riscv32-linux-gnu-*.
 
 However it's possible to explicitly specify the image bits we want to build with
 a given RISC-V toolchain. This can be done by setting the environment variable
 *PLATFORM_RISCV_XLEN* to the desired width, for example:
 
 ```
-export CROSS_COMPILE=riscv64-unknown-elf-
+export CROSS_COMPILE=riscv64-linux-gnu-
 export PLATFORM_RISCV_XLEN=32
 ```
 
@@ -235,7 +243,7 @@ valid triple.
 These can also be mixed; for example using a GCC cross-compiler but LLVM
 binutils would be:
 ```
-make CC=riscv64-unknown-elf-gcc LLVM=1
+make CC=riscv64-linux-gnu-gcc LLVM=1
 ```
 
 These variables must be passed for all the make invocations described in this

From 989039117fc0181bb971acf2c934d3fba454c153 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 12 Jul 2021 10:12:53 +0800
Subject: [PATCH 0842/1765] Makefile: Manually forward RELAX_FLAG to the
 assembler when linking with LLD
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

When generating code with -mno-relax, GCC puts .option norelax in
the generated assembly, and so doesn’t bother passing on -mno-relax
to the assembler. This has the unfortunate effect that, when using
GCC to assemble hand-written assembly, -mno-relax does nothing,
and we have to pass -Wa,-mno-relax to manually forward it to the
assembler.

This is an old GCC bug that was fixed [1] recently. For the time
being, let's pass "-Wa,-mno-relax" to ASFLAGS for the GCC + LLD
combination to work, e.g.:

  $ make CC=riscv64-unknown-elf-gcc LLVM=1 PLATFORM=generic

[1] https://github.com/gcc-mirror/gcc/commit/3b0a7d624e64eeb81e4d5e8c62c46d86ef521857

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Makefile b/Makefile
index 129b8ed74a1..16d9dcaed64 100644
--- a/Makefile
+++ b/Makefile
@@ -272,6 +272,11 @@ ASFLAGS		+=	-mno-save-restore -mstrict-align
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 ASFLAGS		+=	$(RELAX_FLAG)
+ifneq ($(CC_IS_CLANG),y)
+ifneq ($(RELAX_FLAG),)
+ASFLAGS		+=	-Wa,$(RELAX_FLAG)
+endif
+endif
 ASFLAGS		+=	$(GENFLAGS)
 ASFLAGS		+=	$(platform-asflags-y)
 ASFLAGS		+=	$(firmware-asflags-y)

From 74db0acbe5de8c82cc3ae050d6bd119f33dce4cf Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 14 Jul 2021 15:14:39 +0800
Subject: [PATCH 0843/1765] firmware: use _fw_start for load address

The previous code uses _start as the load address, this default .entry is
the first segment, using _fw_start does not need to make this assumption.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 firmware/fw_base.S   | 6 +++---
 firmware/fw_base.ldS | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 6baf6ab8eb9..1569e60821d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -65,14 +65,14 @@ _try_lottery:
 
 	/* Save load address */
 	lla	t0, _load_start
-	lla	t1, _start
+	lla	t1, _fw_start
 	REG_S	t1, 0(t0)
 
 #ifdef FW_PIC
 	/* relocate the global table content */
 	lla	t0, _link_start
 	REG_L	t0, 0(t0)
-	/* t1 shall has the address of _start */
+	/* t1 shall has the address of _fw_start */
 	sub	t2, t1, t0
 	lla	t3, _runtime_offset
 	REG_S	t2, (t3)
@@ -172,7 +172,7 @@ _relocate_copy_to_upper_loop:
 	blt	t0, t1, _relocate_copy_to_upper_loop
 	jr	t4
 _wait_relocate_copy_done:
-	lla	t0, _start
+	lla	t0, _fw_start
 	lla	t1, _link_start
 	REG_L	t1, 0(t1)
 	beq	t0, t1, _wait_for_boot_hart
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 0d222da2d7f..220c043e9d3 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -8,7 +8,7 @@
  */
 
 	. = FW_TEXT_START;
-
+	/* Don't add any section between FW_TEXT_START and _fw_start */
 	PROVIDE(_fw_start = .);
 
 	. = ALIGN(0x1000); /* Need this to create proper sections */

From 217d5e488033c7337b80794563b2f13e29b9f88d Mon Sep 17 00:00:00 2001
From: David Abdurachmanov <david.abdurachmanov@sifive.com>
Date: Tue, 20 Jul 2021 19:02:39 +0200
Subject: [PATCH 0844/1765] generic: fu740: add workaround for CIP-1200 errata

Instruction TLB can fail to respect a non-global SFENCE thus we need to
flush the TLB using SFENCE.VMA x0, x0

See full description of CIP-1200 in Errata_FU740-C000_20210205 from
https://www.sifive.com/boards/hifive-unmatched

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
 platform/generic/objects.mk     |  1 +
 platform/generic/platform.c     |  2 ++
 platform/generic/sifive_fu740.c | 36 +++++++++++++++++++++++++++++++++
 3 files changed, 39 insertions(+)
 create mode 100644 platform/generic/sifive_fu740.c

diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index d6c8a42d6e0..cb15a1849b7 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -9,3 +9,4 @@
 
 platform-objs-y += platform.o
 platform-objs-y += sifive_fu540.o
+platform-objs-y += sifive_fu740.o
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 0787d10cdf6..0757d87f903 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -24,9 +24,11 @@
 #include <sbi_utils/reset/fdt_reset.h>
 
 extern const struct platform_override sifive_fu540;
+extern const struct platform_override sifive_fu740;
 
 static const struct platform_override *special_platforms[] = {
 	&sifive_fu540,
+	&sifive_fu740,
 };
 
 static const struct platform_override *generic_plat = NULL;
diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive_fu740.c
new file mode 100644
index 00000000000..c8325d3b070
--- /dev/null
+++ b/platform/generic/sifive_fu740.c
@@ -0,0 +1,36 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 SiFive
+ *
+ * Authors:
+ *   David Abdurachmanov <david.abdurachmanov@sifive.com>
+ */
+
+#include <platform_override.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+
+static u64 sifive_fu740_tlbr_flush_limit(const struct fdt_match *match)
+{
+	/*
+	 * Needed to address CIP-1200 errata on SiFive FU740
+	 * Title: Instruction TLB can fail to respect a non-global SFENCE
+	 * Workaround: Flush the TLB using SFENCE.VMA x0, x0
+	 * See Errata_FU740-C000_20210205 from
+	 * https://www.sifive.com/boards/hifive-unmatched
+	 */
+	return 0;
+}
+
+static const struct fdt_match sifive_fu740_match[] = {
+	{ .compatible = "sifive,fu740" },
+	{ .compatible = "sifive,fu740-c000" },
+	{ .compatible = "sifive,hifive-unmatched-a00" },
+	{ },
+};
+
+const struct platform_override sifive_fu740 = {
+	.match_table = sifive_fu740_match,
+	.tlbr_flush_limit = sifive_fu740_tlbr_flush_limit,
+};

From ce03c88ee142787cfe994d776491f43020de01de Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Thu, 22 Jul 2021 12:53:58 +0200
Subject: [PATCH 0845/1765] lib: utils: remove unused variable in
 fdt_reset_init

The value of variable current_driver is unused. Remove the variable.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/reset/fdt_reset.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index aa5f59ff48a..87f925c0a01 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -24,8 +24,6 @@ static struct fdt_reset *reset_drivers[] = {
 	&fdt_reset_thead,
 };
 
-static struct fdt_reset *current_driver = NULL;
-
 int fdt_reset_init(void)
 {
 	int pos, noff, rc;
@@ -47,7 +45,6 @@ int fdt_reset_init(void)
 			if (rc)
 				return rc;
 		}
-		current_driver = drv;
 		break;
 	}
 

From e928472e67f86d73c00537dfa6d5cef5d646426d Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date: Thu, 22 Jul 2021 12:53:59 +0200
Subject: [PATCH 0846/1765] lib: utils: support both of gpio-poweroff,
 gpio-reset

The generic GPIO reset driver has two entries in the match table:
"gpio-poweroff", "gpio-reset". Only the first entry is considered by
fdt_reset_init().

Define "gpio-poweroff" and "gpio-reset" as compatibility strings of two
separate reset drivers. They still can share code.

Fixes: e3d6919d10d7 ("lib: utils/reset: Add generic GPIO reset driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/reset/fdt_reset.c      |  3 ++-
 lib/utils/reset/fdt_reset_gpio.c | 11 ++++++++++-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 87f925c0a01..0d84dc22980 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -12,12 +12,14 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
+extern struct fdt_reset fdt_poweroff_gpio;
 extern struct fdt_reset fdt_reset_gpio;
 extern struct fdt_reset fdt_reset_sifive_test;
 extern struct fdt_reset fdt_reset_htif;
 extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
+	&fdt_poweroff_gpio,
 	&fdt_reset_gpio,
 	&fdt_reset_sifive_test,
 	&fdt_reset_htif,
@@ -45,7 +47,6 @@ int fdt_reset_init(void)
 			if (rc)
 				return rc;
 		}
-		break;
 	}
 
 	return 0;
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 7e0eb7420fa..77e308ae779 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -129,8 +129,17 @@ static int gpio_reset_init(void *fdt, int nodeoff,
 	return 0;
 }
 
-static const struct fdt_match gpio_reset_match[] = {
+static const struct fdt_match gpio_poweroff_match[] = {
 	{ .compatible = "gpio-poweroff", .data = (void *)FALSE },
+	{ },
+};
+
+struct fdt_reset fdt_poweroff_gpio = {
+	.match_table = gpio_poweroff_match,
+	.init = gpio_reset_init,
+};
+
+static const struct fdt_match gpio_reset_match[] = {
 	{ .compatible = "gpio-restart", .data = (void *)TRUE },
 	{ },
 };

From d244f3dbd6cfd241dc1db611c0325daedfcab9c6 Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Thu, 29 Jul 2021 00:15:35 +0800
Subject: [PATCH 0847/1765] lib: sbi: Fix bug in strncmp function when count is
 0

No need to compare characters when the count turns to 0.
Fix the issue in sbi_strncmp.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_string.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index 7805ba4adfc..c87bce9cfbd 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -33,6 +33,10 @@ int sbi_strncmp(const char *a, const char *b, size_t count)
 	for (; count > 0 && *a == *b && *a != '\0'; a++, b++, count--)
 		;
 
+	/* No difference till the end */
+	if (!count)
+		return 0;
+
 	return *a - *b;
 }
 

From 47a47654e8d3997b059d11bb8845ed0037e88c8e Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 5 Aug 2021 15:41:13 +0800
Subject: [PATCH 0848/1765] lib: utils/fdt: Change addr and size to uint64_t

The maximum address and size encoded in DT are 64-bit numbers, so we
should use uint64_t for 'addr' and 'size' in fdt_get_node_addr_size().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h      |  6 +++---
 lib/utils/fdt/fdt_helper.c              | 19 +++++++++----------
 lib/utils/gpio/fdt_gpio_sifive.c        |  4 +++-
 lib/utils/reset/fdt_reset_sifive_test.c |  2 +-
 platform/fpga/openpiton/platform.c      |  2 +-
 5 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 55b9382e187..32aebb43986 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -43,8 +43,8 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 				const char *prop, const char *cells_prop,
 				int index, struct fdt_phandle_args *out_args);
 
-int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
-			   unsigned long *size);
+int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr,
+			   uint64_t *size);
 
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
@@ -75,7 +75,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 			  unsigned long *out_addr, unsigned long *out_size,
 			  u32 *out_first_hartid, u32 *out_hart_count);
 
-int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible);
 
 #endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index a970c0f5ca4..a27f5ba926c 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -120,7 +120,7 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 }
 
 static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
-				 unsigned long *addr)
+				 uint64_t *addr)
 {
 	int i, rlen;
 	int cell_addr, cell_size;
@@ -157,8 +157,7 @@ static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
 	return 0;
 }
 
-int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
-			   unsigned long *size)
+int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr, uint64_t *size)
 {
 	int parent, len, i, rc;
 	int cell_addr, cell_size;
@@ -266,7 +265,7 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 {
 	int len, rc;
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
@@ -304,7 +303,7 @@ int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 {
 	int len, rc;
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
@@ -338,7 +337,7 @@ int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 {
 	int len, rc;
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
@@ -376,7 +375,7 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 {
 	int len, rc;
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
@@ -436,7 +435,7 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 {
 	int len, rc;
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 
 	if (nodeoffset < 0 || !plic || !fdt)
 		return SBI_ENODEV;
@@ -472,7 +471,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 			  u32 *out_first_hartid, u32 *out_hart_count)
 {
 	const fdt32_t *val;
-	unsigned long reg_addr, reg_size;
+	uint64_t reg_addr, reg_size;
 	int i, rc, count, cpu_offset, cpu_intc_offset;
 	u32 phandle, hwirq, hartid, first_hartid, last_hartid;
 	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
@@ -535,7 +534,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 	return 0;
 }
 
-int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible)
 {
 	int nodeoffset, rc;
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index abc9d72be0d..00d3e14036c 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -71,15 +71,17 @@ static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 {
 	int rc;
 	struct sifive_gpio_chip *chip;
+	uint64_t addr;
 
 	if (SIFIVE_GPIO_CHIP_MAX <= sifive_gpio_chip_count)
 		return SBI_ENOSPC;
 	chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
 
-	rc = fdt_get_node_addr_size(fdt, nodeoff, &chip->addr, NULL);
+	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
 	if (rc)
 		return rc;
 
+	chip->addr = addr;
 	chip->chip.driver = &fdt_gpio_sifive;
 	chip->chip.id = phandle;
 	chip->chip.ngpio = SIFIVE_GPIO_PINS_DEF;
diff --git a/lib/utils/reset/fdt_reset_sifive_test.c b/lib/utils/reset/fdt_reset_sifive_test.c
index f98f03d8f90..b0b59e7c361 100644
--- a/lib/utils/reset/fdt_reset_sifive_test.c
+++ b/lib/utils/reset/fdt_reset_sifive_test.c
@@ -16,7 +16,7 @@ static int sifive_test_reset_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	unsigned long addr;
+	uint64_t addr;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
 	if (rc)
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 57ec21b7918..6939b57d993 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -64,7 +64,7 @@ static int openpiton_early_init(bool cold_boot)
 	void *fdt;
 	struct platform_uart_data uart_data;
 	struct plic_data plic_data;
-	unsigned long clint_addr;
+	uint64_t clint_addr;
 	int rc;
 
 	if (!cold_boot)

From e0d1b9db8abd8288afbaa4f93a4ace6a9b6f0100 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 23 Jul 2021 14:09:43 +0530
Subject: [PATCH 0849/1765] lib: utils/timer: Allow separate base addresses for
 MTIME and MTIMECMP

We extend the ACLINT library to support separate base addresses
for MTIME and MTIMECMP registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/timer/aclint_mtimer.h | 16 +++--
 lib/utils/timer/aclint_mtimer.c         | 78 +++++++++++++++++++------
 lib/utils/timer/fdt_timer_mtimer.c      | 16 +++--
 platform/fpga/ariane/platform.c         |  8 ++-
 platform/fpga/openpiton/platform.c      | 13 ++++-
 platform/kendryte/k210/platform.c       |  8 ++-
 platform/nuclei/ux600/platform.c        |  8 ++-
 platform/template/platform.c            |  8 ++-
 8 files changed, 114 insertions(+), 41 deletions(-)

diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
index 62aa0865138..fdc46cd8da2 100644
--- a/include/sbi_utils/timer/aclint_mtimer.h
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -12,16 +12,22 @@
 
 #include <sbi/sbi_types.h>
 
-#define ACLINT_MTIMER_ALIGN		0x1000
-#define ACLINT_MTIMER_SIZE		0x8000
-#define ACLINT_MTIMER_MAX_HARTS	4095
+#define ACLINT_MTIMER_ALIGN		0x8
+#define ACLINT_MTIMER_MAX_HARTS		4095
+
+#define ACLINT_DEFAULT_MTIME_OFFSET	0x7ff8
+#define ACLINT_DEFAULT_MTIME_SIZE	0x8
+#define ACLINT_DEFAULT_MTIMECMP_OFFSET	0x0000
+#define ACLINT_DEFAULT_MTIMECMP_SIZE	0x7ff8
 
 #define CLINT_MTIMER_OFFSET		0x4000
 
 struct aclint_mtimer_data {
 	/* Public details */
-	unsigned long addr;
-	unsigned long size;
+	unsigned long mtime_addr;
+	unsigned long mtime_size;
+	unsigned long mtimecmp_addr;
+	unsigned long mtimecmp_size;
 	u32 first_hartid;
 	u32 hart_count;
 	bool has_64bit_mmio;
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 41b02900b27..0e4e84645ff 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -10,6 +10,7 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_io.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
@@ -17,9 +18,6 @@
 #include <sbi/sbi_timer.h>
 #include <sbi_utils/timer/aclint_mtimer.h>
 
-#define MTIMER_CMP_OFF		0x0000
-#define MTIMER_VAL_OFF		0x7ff8
-
 static struct aclint_mtimer_data *mtimer_hartid2data[SBI_HARTMASK_MAX_BITS];
 
 #if __riscv_xlen != 32
@@ -56,7 +54,7 @@ static void mtimer_time_wr32(bool timecmp, u64 value, volatile u64 *addr)
 static u64 mtimer_value(void)
 {
 	struct aclint_mtimer_data *mt = mtimer_hartid2data[current_hartid()];
-	u64 *time_val = ((void *)mt->addr) + MTIMER_VAL_OFF;
+	u64 *time_val = (void *)mt->mtime_addr;
 
 	/* Read MTIMER Time Value */
 	return mt->time_rd(time_val) + mt->time_delta;
@@ -66,7 +64,7 @@ static void mtimer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
 	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
-	u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+	u64 *time_cmp = (void *)mt->mtimecmp_addr;
 
 	/* Clear MTIMER Time Compare */
 	mt->time_wr(true, -1ULL, &time_cmp[target_hart - mt->first_hartid]);
@@ -76,7 +74,7 @@ static void mtimer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
 	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
-	u64 *time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+	u64 *time_cmp = (void *)mt->mtimecmp_addr;
 
 	/* Program MTIMER Time Compare */
 	mt->time_wr(true, next_event - mt->time_delta,
@@ -111,8 +109,8 @@ int aclint_mtimer_warm_init(void)
 	 */
 	if (mt->time_delta_reference) {
 		reference = mt->time_delta_reference;
-		mt_time_val = (void *)mt->addr + MTIMER_VAL_OFF;
-		ref_time_val = (void *)reference->addr + MTIMER_VAL_OFF;
+		mt_time_val = (void *)mt->mtime_addr;
+		ref_time_val = (void *)reference->mtime_addr;
 		if (!atomic_raw_xchg_ulong(&mt->time_delta_computed, 1)) {
 			v1 = mt->time_rd(mt_time_val);
 			mv = reference->time_rd(ref_time_val);
@@ -122,24 +120,54 @@ int aclint_mtimer_warm_init(void)
 	}
 
 	/* Clear Time Compare */
-	mt_time_cmp = (void *)mt->addr + MTIMER_CMP_OFF;
+	mt_time_cmp = (void *)mt->mtimecmp_addr;
 	mt->time_wr(true, -1ULL,
 		    &mt_time_cmp[target_hart - mt->first_hartid]);
 
 	return 0;
 }
 
+static int aclint_mtimer_add_regions(unsigned long addr, unsigned long size)
+{
+#define MTIMER_ADD_REGION_ALIGN		0x1000
+	int rc;
+	unsigned long pos, end, rsize;
+	struct sbi_domain_memregion reg;
+
+	pos = addr;
+	end = addr + size;
+	while (pos < end) {
+		rsize = pos & (MTIMER_ADD_REGION_ALIGN - 1);
+		if (rsize)
+			rsize = 1UL << __ffs(pos);
+		else
+			rsize = ((end - pos) < MTIMER_ADD_REGION_ALIGN) ?
+				(end - pos) : MTIMER_ADD_REGION_ALIGN;
+
+		sbi_domain_memregion_init(pos, rsize,
+					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+		pos += rsize;
+	}
+
+	return 0;
+}
+
 int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 			    struct aclint_mtimer_data *reference)
 {
 	u32 i;
 	int rc;
-	unsigned long pos, region_size;
-	struct sbi_domain_memregion reg;
 
 	/* Sanity checks */
-	if (!mt || (mt->addr & (ACLINT_MTIMER_ALIGN - 1)) ||
-	    (mt->size < ACLINT_MTIMER_SIZE) ||
+	if (!mt || !mt->mtime_size ||
+	    (mt->hart_count && !mt->mtimecmp_size) ||
+	    (mt->mtime_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
+	    (mt->mtime_size & (ACLINT_MTIMER_ALIGN - 1)) ||
+	    (mt->mtimecmp_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
+	    (mt->mtimecmp_size & (ACLINT_MTIMER_ALIGN - 1)) ||
 	    (mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
 	    (mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
 		return SBI_EINVAL;
@@ -164,12 +192,24 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 		mtimer_hartid2data[mt->first_hartid + i] = mt;
 
 	/* Add MTIMER regions to the root domain */
-	for (pos = 0; pos < mt->size; pos += ACLINT_MTIMER_ALIGN) {
-		region_size = ((mt->size - pos) < ACLINT_MTIMER_ALIGN) ?
-			      (mt->size - pos) : ACLINT_MTIMER_ALIGN;
-		sbi_domain_memregion_init(mt->addr + pos, region_size,
-					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
+	if (mt->mtime_addr == (mt->mtimecmp_addr + mt->mtimecmp_size)) {
+		rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
+					mt->mtime_size + mt->mtimecmp_size);
+		if (rc)
+			return rc;
+	} else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) {
+		rc = aclint_mtimer_add_regions(mt->mtime_addr,
+					mt->mtime_size + mt->mtimecmp_size);
+		if (rc)
+			return rc;
+	} else {
+		rc = aclint_mtimer_add_regions(mt->mtime_addr,
+						mt->mtime_size);
+		if (rc)
+			return rc;
+
+		rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
+						mt->mtimecmp_size);
 		if (rc)
 			return rc;
 	}
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 49074287900..3f830ad886d 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -22,7 +22,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	unsigned long offset;
+	unsigned long offset, addr, size;
 	struct aclint_mtimer_data *mt, *mtmaster = NULL;
 
 	if (MTIMER_MAX_NR <= mtimer_count)
@@ -31,19 +31,23 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	if (0 < mtimer_count)
 		mtmaster = &mtimer[0];
 
-	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &mt->addr, &mt->size,
+	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &addr, &size,
 				   &mt->first_hartid, &mt->hart_count);
 	if (rc)
 		return rc;
 	mt->has_64bit_mmio = true;
 
+	mt->mtimecmp_addr = addr + ACLINT_DEFAULT_MTIMECMP_OFFSET;
+	mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
+	mt->mtime_addr = addr + ACLINT_DEFAULT_MTIME_OFFSET;
+	mt->mtime_size = size - mt->mtimecmp_size;
+
 	if (match->data) {
 		/* Adjust MTIMER address and size for CLINT device */
 		offset = *((unsigned long *)match->data);
-		mt->addr += offset;
-		if ((mt->size - offset) < ACLINT_MTIMER_SIZE)
-			return SBI_EINVAL;
-		mt->size -= offset;
+		mt->mtime_addr += offset;
+		mt->mtimecmp_addr += offset;
+		mt->mtime_size -= offset;
 		/* Parse additional CLINT properties */
 		if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
 			mt->has_64bit_mmio = false;
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 0b47aa030b7..58a46c08490 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -44,8 +44,12 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
-	.addr = ARIANE_ACLINT_MTIMER_ADDR,
-	.size = ACLINT_MTIMER_SIZE,
+	.mtime_addr = ARIANE_ACLINT_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = ARIANE_ACLINT_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = ARIANE_HART_COUNT,
 	.has_64bit_mmio = TRUE,
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 6939b57d993..a9bfa999f3f 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -49,8 +49,12 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
-	.addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR,
-	.size = ACLINT_MTIMER_SIZE,
+	.mtime_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
 	.has_64bit_mmio = TRUE,
@@ -82,7 +86,10 @@ static int openpiton_early_init(bool cold_boot)
 	rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
 	if (!rc) {
 		mswi.addr = clint_addr;
-		mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET;
+		mtimer.mtime_addr = clint_addr + CLINT_MTIMER_OFFSET +
+				    ACLINT_DEFAULT_MTIME_OFFSET;
+		mtimer.mtimecmp_addr = clint_addr + CLINT_MTIMER_OFFSET +
+				    ACLINT_DEFAULT_MTIMECMP_OFFSET;
 	}
 
 	return 0;
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 55c4b1ee6ef..ee4c2239445 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -42,8 +42,12 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
-	.addr = K210_ACLINT_MTIMER_ADDR,
-	.size = ACLINT_MTIMER_SIZE,
+	.mtime_addr = K210_ACLINT_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = K210_ACLINT_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = K210_HART_COUNT,
 	.has_64bit_mmio = TRUE,
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 22ca4c9cf5e..ab0becc9b72 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -74,8 +74,12 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
-	.addr = UX600_ACLINT_MTIMER_ADDR,
-	.size = ACLINT_MTIMER_SIZE,
+	.mtime_addr = UX600_ACLINT_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = UX600_ACLINT_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = UX600_HART_COUNT,
 	.has_64bit_mmio = TRUE,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 3f09d9898eb..45288226d8e 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -43,8 +43,12 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
-	.addr = PLATFORM_ACLINT_MTIMER_ADDR,
-	.size = ACLINT_MTIMER_SIZE,
+	.mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = PLATFORM_ACLINT_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = PLATFORM_HART_COUNT,
 	.has_64bit_mmio = TRUE,

From 7a3a0cce4d5b145b5659d4204c1ed8c8efae31cc Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 21 Apr 2021 14:11:55 +0530
Subject: [PATCH 0850/1765] lib: utils: Extend fdt_get_node_addr_size() for
 multiple register sets

We add "index" parameter to fdt_get_node_addr_size() API so that
calling function can specify index of desired register set. This
will allow fdt_get_node_addr_size() to handle DT nodes with
multiple register sets.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h      |  4 ++--
 lib/utils/fdt/fdt_helper.c              | 31 ++++++++++++++++++-------
 lib/utils/gpio/fdt_gpio_sifive.c        |  2 +-
 lib/utils/reset/fdt_reset_sifive_test.c |  2 +-
 4 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 32aebb43986..1a93e1c8a7d 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -43,8 +43,8 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 				const char *prop, const char *cells_prop,
 				int index, struct fdt_phandle_args *out_args);
 
-int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr,
-			   uint64_t *size);
+int fdt_get_node_addr_size(void *fdt, int node, int index,
+			   uint64_t *addr, uint64_t *size);
 
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index a27f5ba926c..b68544f8539 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -157,13 +157,17 @@ static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
 	return 0;
 }
 
-int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr, uint64_t *size)
+int fdt_get_node_addr_size(void *fdt, int node, int index,
+			   uint64_t *addr, uint64_t *size)
 {
 	int parent, len, i, rc;
 	int cell_addr, cell_size;
 	const fdt32_t *prop_addr, *prop_size;
 	uint64_t temp = 0;
 
+	if (!fdt || node < 0 || index < 0)
+		return SBI_EINVAL;
+
 	parent = fdt_parent_offset(fdt, node);
 	if (parent < 0)
 		return parent;
@@ -178,6 +182,11 @@ int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr, uint64_t *size)
 	prop_addr = fdt_getprop(fdt, node, "reg", &len);
 	if (!prop_addr)
 		return SBI_ENODEV;
+
+	if ((len / sizeof(u32)) <= (index * (cell_addr + cell_size)))
+		return SBI_EINVAL;
+
+	prop_addr = prop_addr + (index * (cell_addr + cell_size));
 	prop_size = prop_addr + cell_addr;
 
 	if (addr) {
@@ -270,7 +279,8 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	uart->addr = reg_addr;
@@ -308,7 +318,8 @@ int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	uart->addr = reg_addr;
@@ -342,7 +353,8 @@ int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	uart->addr = reg_addr;
@@ -380,7 +392,8 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 	if (nodeoffset < 0 || !uart || !fdt)
 		return SBI_ENODEV;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	uart->addr = reg_addr;
@@ -440,7 +453,8 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 	if (nodeoffset < 0 || !plic || !fdt)
 		return SBI_ENODEV;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	plic->addr = reg_addr;
@@ -481,7 +495,8 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 	    !out_first_hartid || !out_hart_count)
 		return SBI_EINVAL;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, &reg_addr, &reg_size);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	*out_addr = reg_addr;
@@ -543,7 +558,7 @@ int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 	if (nodeoffset < 0)
 		return nodeoffset;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, addr, NULL);
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0, addr, NULL);
 	if (rc < 0 || !addr)
 		return SBI_ENODEV;
 
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index 00d3e14036c..677f0fa78b6 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -77,7 +77,7 @@ static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 		return SBI_ENOSPC;
 	chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
 
-	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/reset/fdt_reset_sifive_test.c b/lib/utils/reset/fdt_reset_sifive_test.c
index b0b59e7c361..7e0eba37ac2 100644
--- a/lib/utils/reset/fdt_reset_sifive_test.c
+++ b/lib/utils/reset/fdt_reset_sifive_test.c
@@ -18,7 +18,7 @@ static int sifive_test_reset_init(void *fdt, int nodeoff,
 	int rc;
 	uint64_t addr;
 
-	rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
 	if (rc)
 		return rc;
 

From f3a0eb8583828b0223f9e924672fc455359ea6c8 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 23 Jul 2021 15:37:51 +0530
Subject: [PATCH 0851/1765] lib: utils/fdt: Extend fdt_parse_aclint_node()
 function

The fdt_parse_aclint_node() is used to parse DT node for SiFive
CLINT, ACLINT MTIMER, and ACLINT MSWI devices.

The ACLINT MTIMER has undergone following changes:
1) MTIMER DT node now requires separate addresses in for MTIME
   register and MTIMECMPx registers in the reg DT property.
2) MTIMER DT node might have no interrupts-extended DT property
   when the MTIMER device has no associated HARTs (i.e. the
   MTIMER device has no MTIMECMPx registers)

This patch extends fdt_parse_aclint_node() to handle above
mentioned changes in ACLINT MTIMER DT bindings.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  3 +-
 lib/utils/fdt/fdt_helper.c         | 50 ++++++++++++++++++------------
 lib/utils/ipi/fdt_ipi_mswi.c       |  3 +-
 lib/utils/timer/fdt_timer_mtimer.c | 23 +++++++++-----
 4 files changed, 49 insertions(+), 30 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 1a93e1c8a7d..224625423a2 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -72,7 +72,8 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
 int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
-			  unsigned long *out_addr, unsigned long *out_size,
+			  unsigned long *out_addr1, unsigned long *out_size1,
+			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count);
 
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index b68544f8539..5628337c9ee 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -481,38 +481,50 @@ int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 }
 
 int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
-			  unsigned long *out_addr, unsigned long *out_size,
+			  unsigned long *out_addr1, unsigned long *out_size1,
+			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count)
 {
 	const fdt32_t *val;
 	uint64_t reg_addr, reg_size;
 	int i, rc, count, cpu_offset, cpu_intc_offset;
-	u32 phandle, hwirq, hartid, first_hartid, last_hartid;
+	u32 phandle, hwirq, hartid, first_hartid, last_hartid, hart_count;
 	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
 
 	if (nodeoffset < 0 || !fdt ||
-	    !out_addr || !out_size ||
+	    !out_addr1 || !out_size1 ||
 	    !out_first_hartid || !out_hart_count)
 		return SBI_EINVAL;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
 				    &reg_addr, &reg_size);
-	if (rc < 0 || !reg_addr || !reg_size)
+	if (rc < 0 || !reg_size)
 		return SBI_ENODEV;
-	*out_addr = reg_addr;
-	*out_size = reg_size;
+	*out_addr1 = reg_addr;
+	*out_size1 = reg_size;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 1,
+				    &reg_addr, &reg_size);
+	if (rc < 0 || !reg_size)
+		reg_addr = reg_size = 0;
+	if (out_addr2)
+		*out_addr2 = reg_addr;
+	if (out_size2)
+		*out_size2 = reg_size;
+
+	*out_first_hartid = 0;
+	*out_hart_count = 0;
 
 	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
 	if (!val || count < sizeof(fdt32_t))
-		return SBI_ENODEV;
+		return 0;
 	count = count / sizeof(fdt32_t);
 
 	first_hartid = -1U;
-	last_hartid = 0;
-	*out_hart_count = 0;
-	for (i = 0; i < count; i += 2) {
-		phandle = fdt32_to_cpu(val[i]);
-		hwirq = fdt32_to_cpu(val[i + 1]);
+	hart_count = last_hartid = 0;
+	for (i = 0; i < (count / 2); i++) {
+		phandle = fdt32_to_cpu(val[2 * i]);
+		hwirq = fdt32_to_cpu(val[(2 * i) + 1]);
 
 		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
 		if (cpu_intc_offset < 0)
@@ -534,17 +546,15 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 				first_hartid = hartid;
 			if (hartid > last_hartid)
 				last_hartid = hartid;
-			(*out_hart_count)++;
+			hart_count++;
 		}
 	}
 
-	if ((last_hartid < first_hartid) || first_hartid == -1U)
-		return SBI_ENODEV;
-
-	*out_first_hartid = first_hartid;
-	count = last_hartid - first_hartid + 1;
-	if (*out_hart_count < count)
-		*out_hart_count = count;
+	if ((last_hartid >= first_hartid) && first_hartid != -1U) {
+		*out_first_hartid = first_hartid;
+		count = last_hartid - first_hartid + 1;
+		*out_hart_count = (hart_count < count) ? hart_count : count;
+	}
 
 	return 0;
 }
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index f119f9ce03f..1f0fda71c08 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -28,7 +28,8 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 		return SBI_ENOSPC;
 	ms = &mswi[mswi_count];
 
-	rc = fdt_parse_aclint_node(fdt, nodeoff, false, &ms->addr, &ms->size,
+	rc = fdt_parse_aclint_node(fdt, nodeoff, false,
+				   &ms->addr, &ms->size, NULL, NULL,
 				   &ms->first_hartid, &ms->hart_count);
 	if (rc)
 		return rc;
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 3f830ad886d..b08ed38f8c2 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -22,7 +22,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
-	unsigned long offset, addr, size;
+	unsigned long offset, addr[2], size[2];
 	struct aclint_mtimer_data *mt, *mtmaster = NULL;
 
 	if (MTIMER_MAX_NR <= mtimer_count)
@@ -31,18 +31,19 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	if (0 < mtimer_count)
 		mtmaster = &mtimer[0];
 
-	rc = fdt_parse_aclint_node(fdt, nodeoff, true, &addr, &size,
+	rc = fdt_parse_aclint_node(fdt, nodeoff, true,
+				   &addr[0], &size[0], &addr[1], &size[1],
 				   &mt->first_hartid, &mt->hart_count);
 	if (rc)
 		return rc;
 	mt->has_64bit_mmio = true;
 
-	mt->mtimecmp_addr = addr + ACLINT_DEFAULT_MTIMECMP_OFFSET;
-	mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
-	mt->mtime_addr = addr + ACLINT_DEFAULT_MTIME_OFFSET;
-	mt->mtime_size = size - mt->mtimecmp_size;
-
-	if (match->data) {
+	if (match->data) { /* SiFive CLINT */
+		/* Set CLINT addresses */
+		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
+		mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
+		mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
+		mt->mtime_size = size[0] - mt->mtimecmp_size;
 		/* Adjust MTIMER address and size for CLINT device */
 		offset = *((unsigned long *)match->data);
 		mt->mtime_addr += offset;
@@ -51,6 +52,12 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		/* Parse additional CLINT properties */
 		if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
 			mt->has_64bit_mmio = false;
+	} else { /* RISC-V ACLINT MTIMER */
+		/* Set ACLINT MTIMER addresses */
+		mt->mtime_addr = addr[0];
+		mt->mtime_size = size[0];
+		mt->mtimecmp_addr = addr[1];
+		mt->mtimecmp_size = size[1];
 	}
 
 	rc = aclint_mtimer_cold_init(mt, mtmaster);

From b35f7826b019623d096b6b5c1803232818834e5b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 24 Jul 2021 10:29:56 +0530
Subject: [PATCH 0852/1765] lib: utils/timer: Allow ACLINT MTIMER supporting
 only 32-bit MMIO

We can have ACLINT MTIMER devices which only support 32-bit MMIO
accesses on RV64 system so this patch adds a boolean DT property
"mtimer,no-64bit-mmio" to detect this from MTIMER DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/utils/timer/fdt_timer_mtimer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index b08ed38f8c2..15a36ed64da 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -58,6 +58,9 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		mt->mtime_size = size[0];
 		mt->mtimecmp_addr = addr[1];
 		mt->mtimecmp_size = size[1];
+		/* Parse additional ACLINT MTIMER properties */
+		if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc))
+			mt->has_64bit_mmio = false;
 	}
 
 	rc = aclint_mtimer_cold_init(mt, mtmaster);

From 7aa6c9aa96049b741b754b7340ea96a37719de27 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Sat, 24 Jul 2021 10:35:01 +0530
Subject: [PATCH 0853/1765] lib: utils/timer: Simplify MTIMER synchronization

We simplify MTIMER synchronization as follows:

1) Detect MTIMER devices with unique (or non-shared) MTIME
   register at boot-time
2) Select first MTIMER device with no associated HART as our
   reference MTIMER device
3) Only synchronize MTIMER devices with unique (or non-shared)
   MTIME register using reference MTIMER device
4) Directly update the MTIME register at time of synchronization
   because MTIME is a read/write register.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi_utils/timer/aclint_mtimer.h |  7 ++-
 lib/utils/timer/aclint_mtimer.c         | 67 +++++++++++++++----------
 lib/utils/timer/fdt_timer_mtimer.c      | 42 ++++++++++++++--
 3 files changed, 83 insertions(+), 33 deletions(-)

diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
index fdc46cd8da2..a9fe445a059 100644
--- a/include/sbi_utils/timer/aclint_mtimer.h
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -31,14 +31,19 @@ struct aclint_mtimer_data {
 	u32 first_hartid;
 	u32 hart_count;
 	bool has_64bit_mmio;
+	bool has_shared_mtime;
 	/* Private details (initialized and used by ACLINT MTIMER library) */
 	struct aclint_mtimer_data *time_delta_reference;
 	unsigned long time_delta_computed;
-	u64 time_delta;
 	u64 (*time_rd)(volatile u64 *addr);
 	void (*time_wr)(bool timecmp, u64 value, volatile u64 *addr);
 };
 
+void aclint_mtimer_sync(struct aclint_mtimer_data *mt);
+
+void aclint_mtimer_set_reference(struct aclint_mtimer_data *mt,
+				 struct aclint_mtimer_data *ref);
+
 int aclint_mtimer_warm_init(void);
 
 int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 0e4e84645ff..d612b12f5b5 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -57,7 +57,7 @@ static u64 mtimer_value(void)
 	u64 *time_val = (void *)mt->mtime_addr;
 
 	/* Read MTIMER Time Value */
-	return mt->time_rd(time_val) + mt->time_delta;
+	return mt->time_rd(time_val);
 }
 
 static void mtimer_event_stop(void)
@@ -77,7 +77,7 @@ static void mtimer_event_start(u64 next_event)
 	u64 *time_cmp = (void *)mt->mtimecmp_addr;
 
 	/* Program MTIMER Time Compare */
-	mt->time_wr(true, next_event - mt->time_delta,
+	mt->time_wr(true, next_event,
 		    &time_cmp[target_hart - mt->first_hartid]);
 }
 
@@ -88,36 +88,51 @@ static struct sbi_timer_device mtimer = {
 	.timer_event_stop = mtimer_event_stop
 };
 
+void aclint_mtimer_sync(struct aclint_mtimer_data *mt)
+{
+	u64 v1, v2, mv, delta;
+	u64 *mt_time_val, *ref_time_val;
+	struct aclint_mtimer_data *reference;
+
+	/* Sync-up non-shared MTIME if reference is available */
+	if (mt->has_shared_mtime || !mt->time_delta_reference)
+		return;
+
+	reference = mt->time_delta_reference;
+	mt_time_val = (void *)mt->mtime_addr;
+	ref_time_val = (void *)reference->mtime_addr;
+	if (!atomic_raw_xchg_ulong(&mt->time_delta_computed, 1)) {
+		v1 = mt->time_rd(mt_time_val);
+		mv = reference->time_rd(ref_time_val);
+		v2 = mt->time_rd(mt_time_val);
+		delta = mv - ((v1 / 2) + (v2 / 2));
+		mt->time_wr(false, mt->time_rd(mt_time_val) + delta,
+			    mt_time_val);
+	}
+
+}
+
+void aclint_mtimer_set_reference(struct aclint_mtimer_data *mt,
+				 struct aclint_mtimer_data *ref)
+{
+	if (!mt || !ref || mt == ref)
+		return;
+
+	mt->time_delta_reference = ref;
+	mt->time_delta_computed = 0;
+}
+
 int aclint_mtimer_warm_init(void)
 {
-	u64 v1, v2, mv;
+	u64 *mt_time_cmp;
 	u32 target_hart = current_hartid();
-	struct aclint_mtimer_data *reference;
-	u64 *mt_time_val, *mt_time_cmp, *ref_time_val;
 	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
 
 	if (!mt)
 		return SBI_ENODEV;
 
-	/*
-	 * Compute delta if reference available
-	 *
-	 * We deliberately compute time_delta in warm init so that time_delta
-	 * is computed on a HART which is going to use given MTIMER. We use
-	 * atomic flag timer_delta_computed to ensure that only one HART does
-	 * time_delta computation.
-	 */
-	if (mt->time_delta_reference) {
-		reference = mt->time_delta_reference;
-		mt_time_val = (void *)mt->mtime_addr;
-		ref_time_val = (void *)reference->mtime_addr;
-		if (!atomic_raw_xchg_ulong(&mt->time_delta_computed, 1)) {
-			v1 = mt->time_rd(mt_time_val);
-			mv = reference->time_rd(ref_time_val);
-			v2 = mt->time_rd(mt_time_val);
-			mt->time_delta = mv - ((v1 / 2) + (v2 / 2));
-		}
-	}
+	/* Sync-up MTIME register */
+	aclint_mtimer_sync(mt);
 
 	/* Clear Time Compare */
 	mt_time_cmp = (void *)mt->mtimecmp_addr;
@@ -173,9 +188,7 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 		return SBI_EINVAL;
 
 	/* Initialize private data */
-	mt->time_delta_reference = reference;
-	mt->time_delta_computed = 0;
-	mt->time_delta = 0;
+	aclint_mtimer_set_reference(mt, reference);
 	mt->time_rd = mtimer_time_rd32;
 	mt->time_wr = mtimer_time_wr32;
 
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 15a36ed64da..4eafffaa57b 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -17,19 +17,18 @@
 
 static unsigned long mtimer_count = 0;
 static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
+static struct aclint_mtimer_data *mt_reference = NULL;
 
 static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
-	int rc;
+	int i, rc;
 	unsigned long offset, addr[2], size[2];
-	struct aclint_mtimer_data *mt, *mtmaster = NULL;
+	struct aclint_mtimer_data *mt;
 
 	if (MTIMER_MAX_NR <= mtimer_count)
 		return SBI_ENOSPC;
 	mt = &mtimer[mtimer_count];
-	if (0 < mtimer_count)
-		mtmaster = &mtimer[0];
 
 	rc = fdt_parse_aclint_node(fdt, nodeoff, true,
 				   &addr[0], &size[0], &addr[1], &size[1],
@@ -37,6 +36,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	if (rc)
 		return rc;
 	mt->has_64bit_mmio = true;
+	mt->has_shared_mtime = false;
 
 	if (match->data) { /* SiFive CLINT */
 		/* Set CLINT addresses */
@@ -63,10 +63,42 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 			mt->has_64bit_mmio = false;
 	}
 
-	rc = aclint_mtimer_cold_init(mt, mtmaster);
+	/* Check if MTIMER device has shared MTIME address */
+	mt->has_shared_mtime = false;
+	for (i = 0; i < mtimer_count; i++) {
+		if (mtimer[i].mtime_addr == mt->mtime_addr) {
+			mt->has_shared_mtime = true;
+			break;
+		}
+	}
+
+	/* Initialize the MTIMER device */
+	rc = aclint_mtimer_cold_init(mt, mt_reference);
 	if (rc)
 		return rc;
 
+	/*
+	 * Select first MTIMER device with no associated HARTs as our
+	 * reference MTIMER device. This is only a temporary strategy
+	 * of selecting reference MTIMER device. In future, we might
+	 * define an optional DT property or some other mechanism to
+	 * help us select the reference MTIMER device.
+	 */
+	if (!mt->hart_count && !mt_reference) {
+		mt_reference = mt;
+		/*
+		 * Set reference for already propbed MTIMER devices
+		 * with non-shared MTIME
+		 */
+		for (i = 0; i < mtimer_count; i++)
+			if (!mtimer[i].has_shared_mtime)
+				aclint_mtimer_set_reference(&mtimer[i], mt);
+	}
+
+	/* Explicitly sync-up MTIMER devices not associated with any HARTs */
+	if (!mt->hart_count)
+		aclint_mtimer_sync(mt);
+
 	mtimer_count++;
 	return 0;
 }

From 33eac764f22ba4d0a22980ff4f130eadb9502a2f Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Fri, 13 Aug 2021 20:33:00 +0800
Subject: [PATCH 0854/1765] lib: sbi: Fix bug in sbi_ecall_rfence that misses
 checking

In sbi_ecall_rfence_handler, it will compare the funcid with
REMOTE_HFENCE_GVMA and REMOTE_HFENCE_VVMA_ASID. Later it check
whether the misa includes H-extension. This checking is incomplete
which misses REMOTE_HFENCE_GVMA_VMID and REMOTE_HFENCE_VVMA.

Fix the issue by updating the checking range.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_ecall_replace.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index a7935d97300..5d24565a301 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -54,8 +54,8 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
 
-	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA &&
-	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID)
+	if (funcid >= SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID &&
+	    funcid <= SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA)
 		if (!misa_extension('H'))
 			return SBI_ENOTSUPP;
 

From ee274377b2a0f26400281a2ccb00b6e15c3f5716 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 14 Aug 2021 08:41:47 -0500
Subject: [PATCH 0855/1765] lib: sbi_trap: Restore redirect for access faults

commit 764a17d852a8 ("lib: sbi: Implement firmware counters") added
switch cases for CAUSE_LOAD_ACCESS and CAUSE_STORE_ACCESS. This caused
them to stop being redirected to U or S mode, as that is handled in the
default switch case. As a result, an error in userspace could cause the
system to hang. Fix this by allowing the acces fault case to fall
through to the default case.

Fixes: 764a17d852a8 ("lib: sbi: Implement firmware counters")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/sbi/sbi_trap.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 5781fea2a11..8d20e04a564 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -259,11 +259,10 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		msg = "ecall handler failed";
 		break;
 	case CAUSE_LOAD_ACCESS:
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
-		break;
 	case CAUSE_STORE_ACCESS:
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
-		break;
+		sbi_pmu_ctr_incr_fw(mcause == CAUSE_LOAD_ACCESS ?
+			SBI_PMU_FW_ACCESS_LOAD : SBI_PMU_FW_ACCESS_STORE);
+		/* fallthrough */
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		trap.epc = regs->mepc;

From b1d3e91e9a69595119e3da19ca175145d2a1b8d6 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 14 Aug 2021 08:52:10 -0500
Subject: [PATCH 0856/1765] payloads/test: Add support for SBI v0.2 ecalls

It can be useful to make SBI v0.2 or newer ecalls from this payload
for testing purposes. To support this, convert the macros to use the
extension/function parameter convention.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 firmware/payloads/test_main.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index 0d659302384..ae2ed4f5edf 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -9,24 +9,25 @@
 
 #include <sbi/sbi_ecall_interface.h>
 
-#define SBI_ECALL(__num, __a0, __a1, __a2)                                    \
+#define SBI_ECALL(__eid, __fid, __a0, __a1, __a2)                             \
 	({                                                                    \
 		register unsigned long a0 asm("a0") = (unsigned long)(__a0);  \
 		register unsigned long a1 asm("a1") = (unsigned long)(__a1);  \
 		register unsigned long a2 asm("a2") = (unsigned long)(__a2);  \
-		register unsigned long a7 asm("a7") = (unsigned long)(__num); \
+		register unsigned long a6 asm("a6") = (unsigned long)(__fid); \
+		register unsigned long a7 asm("a7") = (unsigned long)(__eid); \
 		asm volatile("ecall"                                          \
 			     : "+r"(a0)                                       \
-			     : "r"(a1), "r"(a2), "r"(a7)                      \
+			     : "r"(a1), "r"(a2), "r"(a6), "r"(a7)             \
 			     : "memory");                                     \
 		a0;                                                           \
 	})
 
-#define SBI_ECALL_0(__num) SBI_ECALL(__num, 0, 0, 0)
-#define SBI_ECALL_1(__num, __a0) SBI_ECALL(__num, __a0, 0, 0)
-#define SBI_ECALL_2(__num, __a0, __a1) SBI_ECALL(__num, __a0, __a1, 0)
+#define SBI_ECALL_0(__eid, __fid) SBI_ECALL(__eid, __fid, 0, 0, 0)
+#define SBI_ECALL_1(__eid, __fid, __a0) SBI_ECALL(__eid, __fid, __a0, 0, 0)
+#define SBI_ECALL_2(__eid, __fid, __a0, __a1) SBI_ECALL(__eid, __fid, __a0, __a1, 0)
 
-#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, (c))
+#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, (c))
 
 static inline void sbi_ecall_console_puts(const char *str)
 {

From bd316e2c9bf855b7b7918e71622a9cded6a176ad Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 26 Aug 2021 15:24:18 +0530
Subject: [PATCH 0857/1765] lib: sbi: Correct typo in faults delegation CSR
 name

Correcting the name of faults delegation CSR
%s/mfdeleg/medeleg

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index e8b94a3d009..99bd8f50255 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -20,7 +20,7 @@ static inline char *sbi_platform_feature_id2string(unsigned long feature)
 
 	switch (feature) {
 	case SBI_PLATFORM_HAS_MFAULTS_DELEGATION:
-		fstr = "mfdeleg";
+		fstr = "medeleg";
 		break;
 	default:
 		break;

From c2623065331a9ae93f7dbd9d1bc7b4d46d0415a6 Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Sat, 28 Aug 2021 14:45:02 +0800
Subject: [PATCH 0858/1765] lib: sbi: protect dprintf output with spinlock

Avoid getting messages from multiple harts (using dprintf and printf)
concurrently with a spinlock serializaing calls to sbi_dprintf(),
sbi_printf() and sbi_puts()

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_console.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index b54f7a252fe..29eede30209 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -387,8 +387,11 @@ int sbi_dprintf(const char *format, ...)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	va_start(args, format);
-	if (scratch->options & SBI_SCRATCH_DEBUG_PRINTS)
+	if (scratch->options & SBI_SCRATCH_DEBUG_PRINTS) {
+		spin_lock(&console_out_lock);
 		retval = print(NULL, NULL, format, args);
+		spin_unlock(&console_out_lock);
+	}
 	va_end(args);
 
 	return retval;

From 1718b1642ee8c31eb2c49d78b5834e06f3324394 Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Fri, 27 Aug 2021 22:46:28 +0800
Subject: [PATCH 0859/1765] lib: sbi: Checking fifo validness in
 sbi_fifo_is_empty and is_full

As other exported fifo functions, we should check whether the fifo is
valid in sbi_fifo_is_empty and sbi_fifo_is_full. To this end, this patch
changes the retval from bool to int, and the two functions will return
SBI_EINVAL in the case the fifo is invalid.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_fifo.h |  4 ++--
 lib/sbi/sbi_fifo.c     | 10 ++++++++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index bc8f8f600ae..1a85f07e2a6 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -33,8 +33,8 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
 int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 		   u16 entry_size);
-bool sbi_fifo_is_empty(struct sbi_fifo *fifo);
-bool sbi_fifo_is_full(struct sbi_fifo *fifo);
+int sbi_fifo_is_empty(struct sbi_fifo *fifo);
+int sbi_fifo_is_full(struct sbi_fifo *fifo);
 int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 			    int (*fptr)(void *in, void *data));
 u16 sbi_fifo_avail(struct sbi_fifo *fifo);
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index b2395f33fac..589cc18a304 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -43,10 +43,13 @@ u16 sbi_fifo_avail(struct sbi_fifo *fifo)
 	return ret;
 }
 
-bool sbi_fifo_is_full(struct sbi_fifo *fifo)
+int sbi_fifo_is_full(struct sbi_fifo *fifo)
 {
 	bool ret;
 
+	if (!fifo)
+		return SBI_EINVAL;
+
 	spin_lock(&fifo->qlock);
 	ret = __sbi_fifo_is_full(fifo);
 	spin_unlock(&fifo->qlock);
@@ -75,10 +78,13 @@ static inline bool __sbi_fifo_is_empty(struct sbi_fifo *fifo)
 	return (fifo->avail == 0) ? TRUE : FALSE;
 }
 
-bool sbi_fifo_is_empty(struct sbi_fifo *fifo)
+int sbi_fifo_is_empty(struct sbi_fifo *fifo)
 {
 	bool ret;
 
+	if (!fifo)
+		return SBI_EINVAL;
+
 	spin_lock(&fifo->qlock);
 	ret = __sbi_fifo_is_empty(fifo);
 	spin_unlock(&fifo->qlock);

From bd355213bfbb209c047e8cc0df56936f6705477f Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Wed, 1 Sep 2021 11:06:24 +0800
Subject: [PATCH 0860/1765] lib: sbi: Refine the way to construct platform
 features

sbi_platform_get_features_str() uses sbi_snprintf() to construct the
features_str. However, it passes the wrong length value (i.e., the nfstr),
which should be (nfstr-offset) as the starting point of str (i.e.,
features_str + offset) changes.

This commit also checks the return value of snprintf, and handles the
corner case that the string buffer is full.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_platform.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index 99bd8f50255..445a8c1631b 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -48,9 +48,18 @@ void sbi_platform_get_features_str(const struct sbi_platform *plat,
 		if (features & feat) {
 			temp = sbi_platform_feature_id2string(feat);
 			if (temp) {
-				sbi_snprintf(features_str + offset, nfstr,
-					     "%s,", temp);
-				offset = offset + sbi_strlen(temp) + 1;
+				int len = sbi_snprintf(features_str + offset,
+						       nfstr - offset,
+						       "%s,", temp);
+				if (len < 0)
+					break;
+
+				if (offset + len >= nfstr) {
+					/* No more space for features */
+					offset = nfstr;
+					break;
+				} else
+					offset = offset + len;
 			}
 		}
 		feat = feat << 1;

From 0274a9600452af33412dda18e739ba17b13592a2 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 8 Sep 2021 21:10:08 -0500
Subject: [PATCH 0861/1765] lib: utils/reset: Sort fdt_reset driver list

In preparation for adding a new fdt_reset driver, ensure the existing
lists are sorted alphabetically.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/reset/fdt_reset.c | 4 ++--
 lib/utils/reset/objects.mk  | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 0d84dc22980..7f4b02a44a0 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -14,15 +14,15 @@
 
 extern struct fdt_reset fdt_poweroff_gpio;
 extern struct fdt_reset fdt_reset_gpio;
-extern struct fdt_reset fdt_reset_sifive_test;
 extern struct fdt_reset fdt_reset_htif;
+extern struct fdt_reset fdt_reset_sifive_test;
 extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
 	&fdt_poweroff_gpio,
 	&fdt_reset_gpio,
-	&fdt_reset_sifive_test,
 	&fdt_reset_htif,
+	&fdt_reset_sifive_test,
 	&fdt_reset_thead,
 };
 
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 4215396406e..bb33179b754 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -10,6 +10,6 @@
 libsbiutils-objs-y += reset/fdt_reset.o
 libsbiutils-objs-y += reset/fdt_reset_gpio.o
 libsbiutils-objs-y += reset/fdt_reset_htif.o
+libsbiutils-objs-y += reset/fdt_reset_sifive_test.o
 libsbiutils-objs-y += reset/fdt_reset_thead.o
 libsbiutils-objs-y += reset/fdt_reset_thead_asm.o
-libsbiutils-objs-y += reset/fdt_reset_sifive_test.o

From 395ff7eedec5e2b5b067e3725303a17352a07651 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 8 Sep 2021 21:10:09 -0500
Subject: [PATCH 0862/1765] lib: utils/reset: Add a sunxi watchdog reset driver

One of the watchdogs in the D1 SoC provides a "soft reset" function,
which allows software to immediately reset the entire SoC. Add a driver
so it can implement the SBI system reset function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/reset/fdt_reset.c           |  2 +
 lib/utils/reset/fdt_reset_sunxi_wdt.c | 77 +++++++++++++++++++++++++++
 lib/utils/reset/objects.mk            |  1 +
 3 files changed, 80 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_sunxi_wdt.c

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 7f4b02a44a0..168bb0c1b2f 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -16,6 +16,7 @@ extern struct fdt_reset fdt_poweroff_gpio;
 extern struct fdt_reset fdt_reset_gpio;
 extern struct fdt_reset fdt_reset_htif;
 extern struct fdt_reset fdt_reset_sifive_test;
+extern struct fdt_reset fdt_reset_sunxi_wdt;
 extern struct fdt_reset fdt_reset_thead;
 
 static struct fdt_reset *reset_drivers[] = {
@@ -23,6 +24,7 @@ static struct fdt_reset *reset_drivers[] = {
 	&fdt_reset_gpio,
 	&fdt_reset_htif,
 	&fdt_reset_sifive_test,
+	&fdt_reset_sunxi_wdt,
 	&fdt_reset_thead,
 };
 
diff --git a/lib/utils/reset/fdt_reset_sunxi_wdt.c b/lib/utils/reset/fdt_reset_sunxi_wdt.c
new file mode 100644
index 00000000000..e4f16e3baa6
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_sunxi_wdt.c
@@ -0,0 +1,77 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Samuel Holland <samuel@sholland.org>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+#define WDT_KEY_VAL			0x16aa0000
+
+#define WDT_SOFT_RST_REG		0x08
+#define WDT_SOFT_RST_EN			BIT(0)
+
+#define WDT_MODE_REG			0x18
+
+static volatile void *sunxi_wdt_base;
+
+static int sunxi_wdt_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return 1;
+	}
+
+	return 0;
+}
+
+static void sunxi_wdt_system_reset(u32 type, u32 reason)
+{
+	/* Disable the watchdog. */
+	writel_relaxed(WDT_KEY_VAL,
+		       sunxi_wdt_base + WDT_MODE_REG);
+
+	/* Trigger soft reset. */
+	writel_relaxed(WDT_KEY_VAL | WDT_SOFT_RST_EN,
+		       sunxi_wdt_base + WDT_SOFT_RST_REG);
+}
+
+static struct sbi_system_reset_device sunxi_wdt_reset = {
+	.name = "sunxi-wdt-reset",
+	.system_reset_check = sunxi_wdt_system_reset_check,
+	.system_reset = sunxi_wdt_system_reset,
+};
+
+static int sunxi_wdt_reset_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	uint64_t reg_addr;
+	int rc;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, NULL);
+	if (rc < 0 || !reg_addr)
+		return SBI_ENODEV;
+
+	sunxi_wdt_base = (volatile void *)(unsigned long)reg_addr;
+
+	sbi_system_reset_set_device(&sunxi_wdt_reset);
+
+	return 0;
+}
+
+static const struct fdt_match sunxi_wdt_reset_match[] = {
+	{ .compatible = "allwinner,sun20i-d1-wdt-reset" },
+	{ },
+};
+
+struct fdt_reset fdt_reset_sunxi_wdt = {
+	.match_table = sunxi_wdt_reset_match,
+	.init = sunxi_wdt_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index bb33179b754..6c95db39715 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -11,5 +11,6 @@ libsbiutils-objs-y += reset/fdt_reset.o
 libsbiutils-objs-y += reset/fdt_reset_gpio.o
 libsbiutils-objs-y += reset/fdt_reset_htif.o
 libsbiutils-objs-y += reset/fdt_reset_sifive_test.o
+libsbiutils-objs-y += reset/fdt_reset_sunxi_wdt.o
 libsbiutils-objs-y += reset/fdt_reset_thead.o
 libsbiutils-objs-y += reset/fdt_reset_thead_asm.o

From 3477f08b08da6bfd904218fdb76b3db592dd7ebd Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 15 Sep 2021 14:50:52 +0800
Subject: [PATCH 0863/1765] lib: sbi: fix ctz bug

The original version of ctz will cause an endless loop, if the parameter
passed in is 0. This commit fixes this bug.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 4c24a513219..d7b9b2b2b60 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -213,6 +213,9 @@ static unsigned long ctz(unsigned long x)
 {
 	unsigned long ret = 0;
 
+	if (x == 0)
+		return 8 * sizeof(x);
+
 	while (!(x & 1UL)) {
 		ret++;
 		x = x >> 1;

From 12753d22563f7d2d01f2c6644c7b66b06eb5c90f Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 16 Sep 2021 12:32:49 +0800
Subject: [PATCH 0864/1765] lib: sbi: add some macros to detect BUG at runtime

Three macros are added. One is called BUG, which is used to put in an
unreachable branch. One is called BUG_ON, which is used to check bugs
and assert conditions are opposite. One is called SBI_ASSERT, used for
assertion checking.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_console.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index e24ba5f6b05..28b4a7996ae 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -11,6 +11,7 @@
 #define __SBI_CONSOLE_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_hart.h>
 
 struct sbi_console_device {
 	/** Name of the console device */
@@ -51,4 +52,23 @@ struct sbi_scratch;
 
 int sbi_console_init(struct sbi_scratch *scratch);
 
+#define BUG() do { \
+	sbi_printf("BUG: failure at %s:%d/%s()!\n", \
+		   __FILE__, __LINE__, __func__); \
+	sbi_hart_hang(); \
+} while (0)
+
+#define BUG_ON(cond) do { \
+	if (cond)	\
+		BUG();	\
+} while (0)
+
+#define SBI_ASSERT(cond) do { \
+	if (!(cond)) { \
+		sbi_printf("ASSERT: %s:%d/%s(): Assertion `%s` failed.\n", \
+			   __FILE__,__LINE__,__func__, #cond);\
+		sbi_hart_hang(); \
+	} \
+} while (0)
+
 #endif

From 51113fe2a5ac6b5a712f2e5393347bf24194c09b Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 16 Sep 2021 12:32:50 +0800
Subject: [PATCH 0865/1765] lib: sbi: Add BUG() macro for csr_read/write_num()
 and misa_string()

We use BUG() macro in csr_read_num(), csr_write_num(), and
misa_string() functions for unhandled cases.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index d7b9b2b2b60..f6b8c8ec310 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -11,6 +11,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_console.h>
 
 /* determine CPU extension, return non-zero support */
 int misa_extension_imp(char ext)
@@ -75,6 +76,7 @@ void misa_string(int xlen, char *out, unsigned int out_sz)
 			out[pos++] = '8';
 			break;
 		default:
+			BUG();
 			return;
 		}
 	}
@@ -134,6 +136,7 @@ unsigned long csr_read_num(int csr_num)
 #endif
 
 	default:
+		BUG();
 		break;
 	};
 
@@ -197,6 +200,7 @@ void csr_write_num(int csr_num, unsigned long val)
 	switchcase_csr_write_16(CSR_MHPMEVENT16, val)
 
 	default:
+		BUG();
 		break;
 	};
 

From 72154f4708de79816f0178b16223afa352b20e30 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 14 Sep 2021 21:05:42 +0530
Subject: [PATCH 0866/1765] lib: utils/fdt: Add fdt_parse_timebase_frequency()
 function

We add fdt_parse_timebase_frequency() function which can be used
by ACLINT mtimer driver and platform code to get timebase frequency.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/fdt/fdt_helper.h |  2 ++
 lib/utils/fdt/fdt_helper.c         | 21 +++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 224625423a2..5cb7340484c 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -50,6 +50,8 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
 int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
 
+int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
+
 int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 5628337c9ee..5bf40216680 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -269,6 +269,27 @@ int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
 	return 0;
 }
 
+int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
+{
+	const fdt32_t *val;
+	int len, cpus_offset;
+
+	if (!fdt || !freq)
+		return SBI_EINVAL;
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	val = fdt_getprop(fdt, cpus_offset, "timebase-frequency", &len);
+	if (len > 0 && val)
+		*freq = fdt32_to_cpu(*val);
+	else
+		return SBI_ENOENT;
+
+	return 0;
+}
+
 int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart)
 {

From 12e7af9ab7ef9adf61b9138e2c38e3aeef3c140b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 14 Sep 2021 21:51:48 +0530
Subject: [PATCH 0867/1765] lib: sbi: Add timer frequency to struct
 sbi_timer_device

Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.

This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_timer.h                 | 3 +++
 include/sbi_utils/timer/aclint_mtimer.h | 1 +
 lib/utils/timer/aclint_mtimer.c         | 3 +++
 lib/utils/timer/fdt_timer_mtimer.c      | 4 ++++
 platform/fpga/ariane/platform.c         | 2 ++
 platform/fpga/openpiton/platform.c      | 7 +++++++
 platform/kendryte/k210/platform.c       | 1 +
 platform/kendryte/k210/platform.h       | 2 +-
 platform/nuclei/ux600/platform.c        | 1 +
 platform/template/platform.c            | 2 ++
 10 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 1ba6da05e30..211e83d708d 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -17,6 +17,9 @@ struct sbi_timer_device {
 	/** Name of the timer operations */
 	char name[32];
 
+	/** Frequency of timer in HZ */
+	unsigned long timer_freq;
+
 	/** Get free-running timer value */
 	u64 (*timer_value)(void);
 
diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
index a9fe445a059..f02cc62de79 100644
--- a/include/sbi_utils/timer/aclint_mtimer.h
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -24,6 +24,7 @@
 
 struct aclint_mtimer_data {
 	/* Public details */
+	unsigned long mtime_freq;
 	unsigned long mtime_addr;
 	unsigned long mtime_size;
 	unsigned long mtimecmp_addr;
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index d612b12f5b5..62e87f7506f 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -186,6 +186,8 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	    (mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
 	    (mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
 		return SBI_EINVAL;
+	if (reference && mt->mtime_freq != reference->mtime_freq)
+		return SBI_EINVAL;
 
 	/* Initialize private data */
 	aclint_mtimer_set_reference(mt, reference);
@@ -227,6 +229,7 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 			return rc;
 	}
 
+	mtimer.timer_freq = mt->mtime_freq;
 	sbi_timer_set_device(&mtimer);
 
 	return 0;
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 4eafffaa57b..1ad8508f7a0 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -38,6 +38,10 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	mt->has_64bit_mmio = true;
 	mt->has_shared_mtime = false;
 
+	rc = fdt_parse_timebase_frequency(fdt, &mt->mtime_freq);
+	if (rc)
+		return rc;
+
 	if (match->data) { /* SiFive CLINT */
 		/* Set CLINT addresses */
 		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 58a46c08490..5acc446dc6c 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -26,6 +26,7 @@
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR			0x2000000
+#define ARIANE_ACLINT_MTIMER_FREQ		1000000
 #define ARIANE_ACLINT_MSWI_ADDR			(ARIANE_CLINT_ADDR + \
 						 CLINT_MSWI_OFFSET)
 #define ARIANE_ACLINT_MTIMER_ADDR		(ARIANE_CLINT_ADDR + \
@@ -44,6 +45,7 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = ARIANE_ACLINT_MTIMER_FREQ,
 	.mtime_addr = ARIANE_ACLINT_MTIMER_ADDR +
 		      ACLINT_DEFAULT_MTIME_OFFSET,
 	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index a9bfa999f3f..924053e7ee2 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -26,6 +26,7 @@
 #define OPENPITON_DEFAULT_PLIC_NUM_SOURCES	2
 #define OPENPITON_DEFAULT_HART_COUNT		3
 #define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
+#define OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ	1000000
 #define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR	\
 		(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
 #define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR	\
@@ -49,6 +50,7 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ,
 	.mtime_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
 		      ACLINT_DEFAULT_MTIME_OFFSET,
 	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
@@ -68,6 +70,7 @@ static int openpiton_early_init(bool cold_boot)
 	void *fdt;
 	struct platform_uart_data uart_data;
 	struct plic_data plic_data;
+	unsigned long aclint_freq;
 	uint64_t clint_addr;
 	int rc;
 
@@ -83,6 +86,10 @@ static int openpiton_early_init(bool cold_boot)
 	if (!rc)
 		plic = plic_data;
 
+	rc = fdt_parse_timebase_frequency(fdt, &aclint_freq);
+	if (!rc)
+		mtimer.mtime_freq = aclint_freq;
+
 	rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
 	if (!rc) {
 		mswi.addr = clint_addr;
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index ee4c2239445..35cec5ffecb 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -42,6 +42,7 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = K210_ACLINT_MTIMER_FREQ,
 	.mtime_addr = K210_ACLINT_MTIMER_ADDR +
 		      ACLINT_DEFAULT_MTIME_OFFSET,
 	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index 0a32530e7a9..be52aa30a53 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -14,7 +14,7 @@
 #define K210_HART_COUNT		2
 
 #define K210_UART_BAUDRATE	115200
-
+#define K210_ACLINT_MTIMER_FREQ	7800000
 #define K210_CLK0_FREQ		26000000UL
 #define K210_PLIC_NUM_SOURCES	65
 
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index ab0becc9b72..6bef4c44eb4 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -74,6 +74,7 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = UX600_TIMER_FREQ,
 	.mtime_addr = UX600_ACLINT_MTIMER_ADDR +
 		      ACLINT_DEFAULT_MTIME_OFFSET,
 	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 45288226d8e..d6806e6e544 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -22,6 +22,7 @@
 #define PLATFORM_PLIC_NUM_SOURCES	128
 #define PLATFORM_HART_COUNT		4
 #define PLATFORM_CLINT_ADDR		0x2000000
+#define PLATFORM_ACLINT_MTIMER_FREQ	10000000
 #define PLATFORM_ACLINT_MSWI_ADDR	(PLATFORM_CLINT_ADDR + \
 					 CLINT_MSWI_OFFSET)
 #define PLATFORM_ACLINT_MTIMER_ADDR	(PLATFORM_CLINT_ADDR + \
@@ -43,6 +44,7 @@ static struct aclint_mswi_data mswi = {
 };
 
 static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = PLATFORM_ACLINT_MTIMER_FREQ,
 	.mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
 		      ACLINT_DEFAULT_MTIME_OFFSET,
 	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,

From 6355155f51d4b636a228b75d82ebbdc706174ae7 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Sep 2021 08:51:42 +0530
Subject: [PATCH 0868/1765] lib: sbi: Print timer frequency at boot time

We now have frequency in timer device instance provided by platform
so let's print timer frequency as part of the boot prints.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_init.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 6ef8742a949..f0eb365d451 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -75,8 +75,9 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	sbi_printf("Platform IPI Device       : %s\n",
 		   (idev) ? idev->name : "---");
 	tdev = sbi_timer_get_device();
-	sbi_printf("Platform Timer Device     : %s\n",
-		   (tdev) ? tdev->name : "---");
+	sbi_printf("Platform Timer Device     : %s @ %luHz\n",
+		   (tdev) ? tdev->name : "---",
+		   (tdev) ? tdev->timer_freq : 0);
 	cdev = sbi_console_get_device();
 	sbi_printf("Platform Console Device   : %s\n",
 		   (cdev) ? cdev->name : "---");

From 9d0ab35ab4e2b9edf022237e2592d999dfe54704 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Sep 2021 10:11:24 +0530
Subject: [PATCH 0869/1765] lib: sbi: Add generic timer delay loop function

We now have frequency of the timer device provided by the platform
support so we can emulate desired delay using a loop where the number
loop iterations are based on timer frequency.

This patch provides sbi_timer_delay_loop() for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_timer.h | 16 ++++++++++++++++
 lib/sbi/sbi_timer.c     | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 211e83d708d..63ef1af6350 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -32,6 +32,22 @@ struct sbi_timer_device {
 
 struct sbi_scratch;
 
+/** Generic delay loop of desired granularity */
+void sbi_timer_delay_loop(ulong units, u64 unit_freq,
+			  void (*delay_fn)(void *), void *opaque);
+
+/** Provide delay in terms of milliseconds */
+static inline void sbi_timer_mdelay(ulong msecs)
+{
+	sbi_timer_delay_loop(msecs, 1000, NULL, NULL);
+}
+
+/** Provide delay in terms of microseconds */
+static inline void sbi_timer_udelay(ulong usecs)
+{
+	sbi_timer_delay_loop(usecs, 1000000, NULL, NULL);
+}
+
 /** Get timer value for current HART */
 u64 sbi_timer_value(void);
 
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 275950125ba..acdba922b1e 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -8,7 +8,9 @@
  */
 
 #include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
@@ -47,6 +49,38 @@ static u64 get_platform_ticks(void)
 	return timer_dev->timer_value();
 }
 
+static void nop_delay_fn(void *opaque)
+{
+	cpu_relax();
+}
+
+void sbi_timer_delay_loop(ulong units, u64 unit_freq,
+			  void (*delay_fn)(void *), void *opaque)
+{
+	u64 start_val, delta;
+
+	/* Do nothing if we don't have timer device */
+	if (!timer_dev || !get_time_val) {
+		sbi_printf("%s: called without timer device\n", __func__);
+		return;
+	}
+
+	/* Save starting timer value */
+	start_val = get_time_val();
+
+	/* Compute desired timer value delta */
+	delta = ((u64)timer_dev->timer_freq * (u64)units);
+	delta = delta / unit_freq;
+
+	/* Use NOP delay function if delay function not available */
+	if (!delay_fn)
+		delay_fn = nop_delay_fn;
+
+	/* Busy loop until desired timer value delta reached */
+	while ((get_time_val() - start_val) < delta)
+		delay_fn(opaque);
+}
+
 u64 sbi_timer_value(void)
 {
 	if (get_time_val)

From fa59dd317aaf9c05c6d89a40c27bd98316d8c2df Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 15 Sep 2021 13:50:40 +0530
Subject: [PATCH 0870/1765] lib: utils/reset: use sbi_timer_mdelay() in gpio
 reset driver

We should use sbi_timer_mdelay() instead of custom gpio_mdelay() in
the gpio reset driver.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/reset/fdt_reset_gpio.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 77e308ae779..30127f55ab6 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_system.h>
+#include <sbi/sbi_timer.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 #include <sbi_utils/reset/fdt_reset.h>
@@ -34,14 +35,6 @@ static struct gpio_reset restart = {
 	.inactive_delay = 100
 };
 
-/* Custom mdelay function until we have a generic mdelay() API */
-static void gpio_mdelay(unsigned long msecs)
-{
-	volatile int i;
-	while (msecs--)
-		for (i = 0; i < 100000; i++) ;
-}
-
 static int gpio_system_reset_check(u32 type, u32 reason)
 {
 	switch (type) {
@@ -76,11 +69,11 @@ static void gpio_system_reset(u32 type, u32 reason)
 
 		/* drive it active, also inactive->active edge */
 		gpio_direction_output(&reset->pin, 1);
-		gpio_mdelay(reset->active_delay);
+		sbi_timer_mdelay(reset->active_delay);
 
 		/* drive inactive, also active->inactive edge */
 		gpio_set(&reset->pin, 0);
-		gpio_mdelay(reset->inactive_delay);
+		sbi_timer_mdelay(reset->inactive_delay);
 
 		/* drive it active, also inactive->active edge */
 		gpio_set(&reset->pin, 1);

From 754d51192b6bf6a4afd9d46c5f736a9f6dd1b404 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Tue, 28 Sep 2021 13:42:46 +0200
Subject: [PATCH 0871/1765] lib: utils: identify supported GPIO reset methods

The GPIO reset driver supports reset and poweroff. But not all boards
support both. gpio_system_reset_check() must detect this situation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/utils/reset/fdt_reset_gpio.c | 44 +++++++++++++++-----------------
 1 file changed, 21 insertions(+), 23 deletions(-)

diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 30127f55ab6..77e4d0ed1d6 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -35,21 +35,9 @@ static struct gpio_reset restart = {
 	.inactive_delay = 100
 };
 
-static int gpio_system_reset_check(u32 type, u32 reason)
-{
-	switch (type) {
-	case SBI_SRST_RESET_TYPE_SHUTDOWN:
-	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
-	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
-		return 1;
-	}
-
-	return 0;
-}
-
-static void gpio_system_reset(u32 type, u32 reason)
+static struct gpio_reset *gpio_get_reset_settings(u32 type)
 {
-	struct gpio_reset *reset = NULL;
+	struct gpio_reset *reset;
 
 	switch (type) {
 	case SBI_SRST_RESET_TYPE_SHUTDOWN:
@@ -59,14 +47,26 @@ static void gpio_system_reset(u32 type, u32 reason)
 	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
 		reset = &restart;
 		break;
+	default:
+		reset = NULL;
 	}
 
-	if (reset) {
-		if (!reset->pin.chip) {
-			sbi_printf("%s: gpio pin not available\n", __func__);
-			goto skip_reset;
-		}
+	if (reset && !reset->pin.chip)
+		reset = NULL;
+
+	return reset;
+}
+
+static int gpio_system_reset_check(u32 type, u32 reason)
+{
+	return !!gpio_get_reset_settings(type);
+}
+
+static void gpio_system_reset(u32 type, u32 reason)
+{
+	struct gpio_reset *reset = gpio_get_reset_settings(type);
 
+	if (reset) {
 		/* drive it active, also inactive->active edge */
 		gpio_direction_output(&reset->pin, 1);
 		sbi_timer_mdelay(reset->active_delay);
@@ -77,11 +77,9 @@ static void gpio_system_reset(u32 type, u32 reason)
 
 		/* drive it active, also inactive->active edge */
 		gpio_set(&reset->pin, 1);
-
-skip_reset:
-		/* hang !!! */
-		sbi_hart_hang();
 	}
+	/* hang !!! */
+	sbi_hart_hang();
 }
 
 static struct sbi_system_reset_device gpio_reset = {

From 516161c46f0d3c73bf6a57e551d6e2489912fc03 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 1 Oct 2021 11:31:16 +0300
Subject: [PATCH 0872/1765] lib: sbi: convert reset to list

To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.

Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_system.h              | 15 +++++++++--
 lib/sbi/sbi_init.c                    |  7 +++--
 lib/sbi/sbi_system.c                  | 39 +++++++++++++++++----------
 lib/utils/reset/fdt_reset_gpio.c      |  2 +-
 lib/utils/reset/fdt_reset_sunxi_wdt.c |  2 +-
 lib/utils/reset/fdt_reset_thead.c     |  2 +-
 lib/utils/sys/htif.c                  |  2 +-
 lib/utils/sys/sifive_test.c           |  2 +-
 platform/kendryte/k210/platform.c     |  2 +-
 platform/nuclei/ux600/platform.c      |  2 +-
 10 files changed, 50 insertions(+), 25 deletions(-)

diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index a9fa5466bca..84c281383d8 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -11,6 +11,7 @@
 #define __SBI_SYSTEM_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
 
 /** System reset hardware device */
 struct sbi_system_reset_device {
@@ -22,11 +23,21 @@ struct sbi_system_reset_device {
 
 	/** Reset the system */
 	void (*system_reset)(u32 reset_type, u32 reset_reason);
+
+	/** List */
+	struct sbi_dlist node;
 };
 
-const struct sbi_system_reset_device *sbi_system_reset_get_device(void);
+static inline struct sbi_system_reset_device *to_system_reset_device(
+						struct sbi_dlist *node)
+{
+	return container_of(node, struct sbi_system_reset_device, node);
+}
+
+const struct sbi_system_reset_device *sbi_system_reset_get_device(
+					u32 reset_type, u32 reset_reason);
 
-void sbi_system_reset_set_device(const struct sbi_system_reset_device *dev);
+void sbi_system_reset_add_device(struct sbi_system_reset_device *dev);
 
 bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f0eb365d451..843659e5266 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -84,8 +84,11 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	hdev = sbi_hsm_get_device();
 	sbi_printf("Platform HSM Device       : %s\n",
 		   (hdev) ? hdev->name : "---");
-	srdev = sbi_system_reset_get_device();
-	sbi_printf("Platform SysReset Device  : %s\n",
+	srdev = sbi_system_reset_get_device(SBI_SRST_RESET_TYPE_COLD_REBOOT, 0);
+	sbi_printf("Platform Reboot Device    : %s\n",
+		   (srdev) ? srdev->name : "---");
+	srdev = sbi_system_reset_get_device(SBI_SRST_RESET_TYPE_SHUTDOWN, 0);
+	sbi_printf("Platform Shutdown Device  : %s\n",
 		   (srdev) ? srdev->name : "---");
 
 	/* Firmware details */
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 479060b9d28..a4e478124f7 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -18,28 +18,36 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 
-static const struct sbi_system_reset_device *reset_dev = NULL;
+static SBI_LIST_HEAD(reset_devices_list);
 
-const struct sbi_system_reset_device *sbi_system_reset_get_device(void)
+const struct sbi_system_reset_device *sbi_system_reset_get_device(
+					u32 reset_type, u32 reset_reason)
 {
-	return reset_dev;
+	struct sbi_system_reset_device *dev = 0;
+	struct sbi_dlist *pos;
+
+	/* Check each reset device registered for supported reset type */
+	sbi_list_for_each(pos, &(reset_devices_list)) {
+		dev = to_system_reset_device(pos);
+		if (dev->system_reset_check &&
+			dev->system_reset_check(reset_type, reset_reason))
+			break;
+	}
+
+	return dev;
 }
 
-void sbi_system_reset_set_device(const struct sbi_system_reset_device *dev)
+void sbi_system_reset_add_device(struct sbi_system_reset_device *dev)
 {
-	if (!dev || reset_dev)
+	if (!dev || !dev->system_reset_check)
 		return;
 
-	reset_dev = dev;
+	sbi_list_add(&(dev->node), &(reset_devices_list));
 }
 
 bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason)
 {
-	if (reset_dev && reset_dev->system_reset_check &&
-	    reset_dev->system_reset_check(reset_type, reset_reason))
-		return TRUE;
-
-	return FALSE;
+	return !!sbi_system_reset_get_device(reset_type, reset_reason);
 }
 
 void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
@@ -62,9 +70,12 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 	sbi_hsm_hart_stop(scratch, FALSE);
 
 	/* Platform specific reset if domain allowed system reset */
-	if (dom->system_reset_allowed &&
-	    reset_dev && reset_dev->system_reset)
-		reset_dev->system_reset(reset_type, reset_reason);
+	if (dom->system_reset_allowed) {
+		const struct sbi_system_reset_device *dev =
+			sbi_system_reset_get_device(reset_type, reset_reason);
+		if (dev)
+			dev->system_reset(reset_type, reset_reason);
+	}
 
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 77e4d0ed1d6..4da1450eca8 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -115,7 +115,7 @@ static int gpio_reset_init(void *fdt, int nodeoff,
 	if (len > 0)
 		reset->inactive_delay = fdt32_to_cpu(*val);
 
-	sbi_system_reset_set_device(&gpio_reset);
+	sbi_system_reset_add_device(&gpio_reset);
 
 	return 0;
 }
diff --git a/lib/utils/reset/fdt_reset_sunxi_wdt.c b/lib/utils/reset/fdt_reset_sunxi_wdt.c
index e4f16e3baa6..6d1b5b7de91 100644
--- a/lib/utils/reset/fdt_reset_sunxi_wdt.c
+++ b/lib/utils/reset/fdt_reset_sunxi_wdt.c
@@ -61,7 +61,7 @@ static int sunxi_wdt_reset_init(void *fdt, int nodeoff,
 
 	sunxi_wdt_base = (volatile void *)(unsigned long)reg_addr;
 
-	sbi_system_reset_set_device(&sunxi_wdt_reset);
+	sbi_system_reset_add_device(&sunxi_wdt_reset);
 
 	return 0;
 }
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
index 9f2fe032143..750b7aa5b60 100644
--- a/lib/utils/reset/fdt_reset_thead.c
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -126,7 +126,7 @@ static int thead_reset_init(void *fdt, int nodeoff,
 		}
 	}
 
-	sbi_system_reset_set_device(&thead_reset);
+	sbi_system_reset_add_device(&thead_reset);
 
 	return 0;
 }
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index 330a9a6997b..7c69c7f3898 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -176,7 +176,7 @@ static struct sbi_system_reset_device htif_reset = {
 
 int htif_system_reset_init(void)
 {
-	sbi_system_reset_set_device(&htif_reset);
+	sbi_system_reset_add_device(&htif_reset);
 
 	return 0;
 }
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
index 45339543305..a9ebb5c8076 100644
--- a/lib/utils/sys/sifive_test.c
+++ b/lib/utils/sys/sifive_test.c
@@ -59,7 +59,7 @@ static struct sbi_system_reset_device sifive_test_reset = {
 int sifive_test_init(unsigned long base)
 {
 	sifive_test_base = (void *)base;
-	sbi_system_reset_set_device(&sifive_test_reset);
+	sbi_system_reset_add_device(&sifive_test_reset);
 
 	return 0;
 }
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 35cec5ffecb..e7caec333b9 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -108,7 +108,7 @@ static struct sbi_system_reset_device k210_reset = {
 static int k210_early_init(bool cold_boot)
 {
 	if (cold_boot)
-		sbi_system_reset_set_device(&k210_reset);
+		sbi_system_reset_add_device(&k210_reset);
 
 	return 0;
 }
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 6bef4c44eb4..6f87cf817cc 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -148,7 +148,7 @@ static int ux600_early_init(bool cold_boot)
 	u32 regval;
 
 	if (cold_boot)
-		sbi_system_reset_set_device(&ux600_reset);
+		sbi_system_reset_add_device(&ux600_reset);
 
 	/* Measure CPU Frequency using Timer */
 	ux600_clk_freq = ux600_get_clk_freq();

From 9283d503bd260a972f7e7ac2d895f7cfb152ef77 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 1 Oct 2021 11:31:17 +0300
Subject: [PATCH 0873/1765] lib: sbi: add priority for reset handler

Let's make system_reset_check returning priority instead of only
true/false. In that case 0 - means not supported, and anything above
means priority that makes existing reset handlers being used in first
place, unless it is decided to lower their priority.

The handler with the most priority wins.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_system.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index a4e478124f7..9cea3c0c37a 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -23,18 +23,30 @@ static SBI_LIST_HEAD(reset_devices_list);
 const struct sbi_system_reset_device *sbi_system_reset_get_device(
 					u32 reset_type, u32 reset_reason)
 {
-	struct sbi_system_reset_device *dev = 0;
+	struct sbi_system_reset_device *reset_dev = NULL;
 	struct sbi_dlist *pos;
+	/** lowest priority - any non zero is our candidate */
+	int priority = 0;
 
 	/* Check each reset device registered for supported reset type */
 	sbi_list_for_each(pos, &(reset_devices_list)) {
-		dev = to_system_reset_device(pos);
-		if (dev->system_reset_check &&
-			dev->system_reset_check(reset_type, reset_reason))
-			break;
+		struct sbi_system_reset_device *dev =
+			to_system_reset_device(pos);
+		if (dev->system_reset_check) {
+			int status = dev->system_reset_check(reset_type,
+							     reset_reason);
+			/** reset_type not supported */
+			if (status == 0)
+				continue;
+
+			if (status > priority) {
+				reset_dev = dev;
+				priority = status;
+			}
+		}
 	}
 
-	return dev;
+	return reset_dev;
 }
 
 void sbi_system_reset_add_device(struct sbi_system_reset_device *dev)

From c38973e0879e719d2b3ce1304802ea6b995d0d7e Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Mon, 11 Oct 2021 11:01:09 +0530
Subject: [PATCH 0874/1765] lib: sbi: Save context for all non-retentive
 suspend types

Instead of saving context only for default non-retentive suspend,
we should save context for all non-retentive suspend types.

Fixes: 74756891cc35 ("lib: sbi: Implement SBI HSM suspend function")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_hsm.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 67890f3944c..ecd2e45f174 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -358,12 +358,6 @@ static int __sbi_hsm_suspend_non_ret_default(struct sbi_scratch *scratch,
 {
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 
-	/*
-	 * Save some of the M-mode CSRs which should be restored after
-	 * resuming from suspend state
-	 */
-	__sbi_hsm_suspend_non_ret_save(scratch);
-
 	/* Wait for interrupt */
 	wfi();
 
@@ -463,6 +457,13 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	/* Save the suspend type */
 	hdata->suspend_type = suspend_type;
 
+	/*
+	 * Save context which will be restored after resuming from
+	 * non-retentive suspend.
+	 */
+	if (suspend_type & SBI_HSM_SUSP_NON_RET_BIT)
+		__sbi_hsm_suspend_non_ret_save(scratch);
+
 	/* Try platform specific suspend */
 	ret = hsm_device_hart_suspend(suspend_type, scratch->warmboot_addr);
 	if (ret == SBI_ENOTSUPP) {

From 67cbbcb100d321ec61f6424392562834083e9c98 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 15 Oct 2021 15:42:21 +0200
Subject: [PATCH 0875/1765] lib: sbi: system reset with invalid parameters

The SBI specification requires that sbi_system_reset() returns
SBI_ERR_INVALID_PARAM if reset_type or reset_reason are not valid.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_ecall_replace.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 5d24565a301..93f44da4f58 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -151,7 +151,7 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
 			break;
 		default:
-			return SBI_ENOTSUPP;
+			return SBI_EINVAL;
 		}
 
 		switch (regs->a1) {
@@ -159,7 +159,7 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 		case SBI_SRST_RESET_REASON_SYSFAIL:
 			break;
 		default:
-			return SBI_ENOTSUPP;
+			return SBI_EINVAL;
 		}
 
 		if (sbi_system_reset_supported(regs->a0, regs->a1))

From 422eda499cd6b69c0ca9f4cb06b3aceef17a3b27 Mon Sep 17 00:00:00 2001
From: Wei Fu <wefu@redhat.com>
Date: Thu, 30 Sep 2021 18:11:20 +0800
Subject: [PATCH 0876/1765] Makefile: Add build time and compiler info string

When we are doing opensbi development, we want to know the build time
and compiler info for debug purpose.

To enable this message, please add "BUILD_INFO=y", like:

```
make BUILD_INFO=y
```

NOTE: Using `BUILD_INFO=y` without specifying SOURCE_DATE_EPOCH will
violate "reproducible builds". So it's ONLY for development and debug
purpose, and should NOT be used in a product which follows "reproducible
builds".

Signed-off-by: Wei Fu <wefu@redhat.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 Makefile           | 31 +++++++++++++++++++++++++++++++
 README.md          | 24 ++++++++++++++++++++++++
 lib/sbi/sbi_init.c |  8 ++++++++
 3 files changed, 63 insertions(+)

diff --git a/Makefile b/Makefile
index 16d9dcaed64..8623c1c5f91 100644
--- a/Makefile
+++ b/Makefile
@@ -150,6 +150,25 @@ endif
 # Check whether the linker supports creating PIEs
 OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
+# Build Info:
+# OPENSBI_BUILD_TIME_STAMP -- the compilation time stamp
+# OPENSBI_BUILD_COMPILER_VERSION -- the compiler version info
+BUILD_INFO ?= n
+ifeq ($(BUILD_INFO),y)
+OPENSBI_BUILD_DATE_FMT = +%Y-%m-%d %H:%M:%S %z
+ifdef SOURCE_DATE_EPOCH
+	OPENSBI_BUILD_TIME_STAMP ?= $(shell date -u -d "@$(SOURCE_DATE_EPOCH)" \
+		"$(OPENSBI_BUILD_DATE_FMT)" 2>/dev/null || \
+		date -u -r "$(SOURCE_DATE_EPOCH)" \
+		"$(OPENSBI_BUILD_DATE_FMT)" 2>/dev/null || \
+		date -u "$(OPENSBI_BUILD_DATE_FMT)")
+else
+	OPENSBI_BUILD_TIME_STAMP ?= $(shell date "$(OPENSBI_BUILD_DATE_FMT)")
+endif
+OPENSBI_BUILD_COMPILER_VERSION=$(shell $(CC) -v 2>&1 | grep ' version ' | \
+	sed 's/[[:space:]]*$$//')
+endif
+
 # Setup list of objects.mk files
 ifdef PLATFORM
 platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
@@ -247,6 +266,10 @@ GENFLAGS	+=	-I$(include_dir)
 ifneq ($(OPENSBI_VERSION_GIT),)
 GENFLAGS	+=	-DOPENSBI_VERSION_GIT="\"$(OPENSBI_VERSION_GIT)\""
 endif
+ifeq ($(BUILD_INFO),y)
+GENFLAGS	+=	-DOPENSBI_BUILD_TIME_STAMP="\"$(OPENSBI_BUILD_TIME_STAMP)\""
+GENFLAGS	+=	-DOPENSBI_BUILD_COMPILER_VERSION="\"$(OPENSBI_BUILD_COMPILER_VERSION)\""
+endif
 GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
@@ -398,6 +421,11 @@ $(build_dir)/%.dep: $(src_dir)/%.c
 $(build_dir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
+ifeq ($(BUILD_INFO),y)
+$(build_dir)/lib/sbi/sbi_init.o: $(libsbi_dir)/sbi_init.c FORCE
+	$(call compile_cc,$@,$<)
+endif
+
 $(build_dir)/%.dep: $(src_dir)/%.S
 	$(call compile_as_dep,$@,$<)
 
@@ -551,3 +579,6 @@ ifeq ($(install_root_dir),$(install_root_dir_default)/usr)
 	$(if $(V), @echo " RM        $(install_root_dir_default)")
 	$(CMD_PREFIX)rm -rf $(install_root_dir_default)
 endif
+
+.PHONY: FORCE
+FORCE:
diff --git a/README.md b/README.md
index 9fdf09792a3..54fabe4cea9 100644
--- a/README.md
+++ b/README.md
@@ -254,6 +254,29 @@ to produce broken binaries with missing relocations; it is therefore currently
 recommended that this combination be avoided or *FW_PIC=n* be used to disable
 building OpenSBI as a position-independent binary.
 
+Building with timestamp and compiler info
+-----------------------------------------
+
+When doing development, we may want to know the build time and compiler info
+for debug purpose. OpenSBI can also be built with timestamp and compiler info.
+To build with those info and print it out at boot time, we can just simply add
+`BUILD_INFO=y`, like:
+```
+make BUILD_INFO=y
+```
+
+But if you have used `BUILD_INFO=y`, and want to switch back to `BUILD_INFO=n`,
+you must do
+```
+make clean
+```
+before the next build.
+
+NOTE: Using `BUILD_INFO=y` without specifying SOURCE_DATE_EPOCH will violate
+[reproducible builds]. This definition is ONLY for development and debug
+purpose, and should NOT be used in a product which follows "reproducible
+builds".
+
 Contributing to OpenSBI
 -----------------------
 
@@ -336,3 +359,4 @@ make I=<install_directory> install_docs
 [Doxygen manual]: http://www.doxygen.nl/manual/index.html
 [Kendryte standalone SDK]: https://github.com/kendryte/kendryte-standalone-sdk
 [third party notices]: ThirdPartyNotices.md
+[reproducible builds]: https://reproducible-builds.org
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 843659e5266..b1c7cf0568f 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -48,6 +48,14 @@ static void sbi_boot_print_banner(struct sbi_scratch *scratch)
 		   OPENSBI_VERSION_MINOR);
 #endif
 
+#ifdef OPENSBI_BUILD_TIME_STAMP
+	sbi_printf("Build time: %s\n", OPENSBI_BUILD_TIME_STAMP);
+#endif
+
+#ifdef OPENSBI_BUILD_COMPILER_VERSION
+	sbi_printf("Build compiler: %s\n", OPENSBI_BUILD_COMPILER_VERSION);
+#endif
+
 	sbi_printf(BANNER);
 }
 

From 78c2b19218bd62653b9fb31623a42ced45f38ea6 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Mon, 18 Oct 2021 00:33:50 -0500
Subject: [PATCH 0877/1765] lib: utils/irqchip: Automatically delegate T-HEAD
 PLIC access

The T-HEAD PLIC implementation requires setting a delegation bit
to allow access from S-mode. Now that the T-HEAD PLIC has its own
compatible string, set this bit automatically from the PLIC driver,
instead of reaching into the PLIC's MMIO space from another driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/thead-c9xx.md          | 12 +++---------
 lib/utils/irqchip/fdt_irqchip_plic.c | 15 +++++++++++++++
 lib/utils/reset/fdt_reset_thead.c    |  8 --------
 3 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index c0daeb70266..3490ed50dc8 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -51,11 +51,6 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
 		compatible = "simple-bus";
 		ranges;
 
-		reset: reset-sample {
-			compatible = "thead,reset-sample";
-			plic-delegate = <0x0 0x101ffffc>;
-		};
-
 		clint0: clint@14000000 {
 			compatible = "riscv,clint0";
 			interrupts-extended = <
@@ -67,7 +62,8 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
 
 		intc: interrupt-controller@10000000 {
 			#interrupt-cells = <1>;
-			compatible = "riscv,plic0";
+			compatible = "allwinner,sun20i-d1-plic",
+				     "thead,c900-plic";
 			interrupt-controller;
 			interrupts-extended = <
 				&cpu0_intc  0xffffffff &cpu0_intc  9
@@ -150,7 +146,6 @@ DTS Example2: (Multi cores with soc reset-regs)
 
 		reset: reset-sample {
 			compatible = "thead,reset-sample";
-			plic-delegate = <0xff 0xd81ffffc>;
 			entry-reg = <0xff 0xff019050>;
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
@@ -173,7 +168,7 @@ DTS Example2: (Multi cores with soc reset-regs)
 
 		intc: interrupt-controller@ffd8000000 {
 			#interrupt-cells = <1>;
-			compatible = "riscv,plic0";
+			compatible = "thead,c900-plic";
 			interrupt-controller;
 			interrupts-extended = <
 				&cpu0_intc  0xffffffff &cpu0_intc  9
@@ -194,7 +189,6 @@ DTS Example2: (Multi cores with old reset csrs)
 ```
 	reset: reset-sample {
 		compatible = "thead,reset-sample";
-		plic-delegate = <0xff 0xd81ffffc>;
 		using-csr-reset;
 		csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
 			    0x3b0 0x3b1 0x3b2 0x3b3
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 18d2797c93c..8d375be3166 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -9,6 +9,7 @@
 
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -91,6 +92,11 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 	if (rc)
 		return rc;
 
+	if (match->data) {
+		void (*plic_plat_init)(struct plic_data *) = match->data;
+		plic_plat_init(pd);
+	}
+
 	rc = plic_cold_irqchip_init(pd);
 	if (rc)
 		return rc;
@@ -106,9 +112,18 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 	return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
 }
 
+#define THEAD_PLIC_CTRL_REG 0x1ffffc
+
+static void thead_plic_plat_init(struct plic_data *pd)
+{
+	writel_relaxed(BIT(0), (void *)pd->addr + THEAD_PLIC_CTRL_REG);
+}
+
 static const struct fdt_match irqchip_plic_match[] = {
 	{ .compatible = "riscv,plic0" },
 	{ .compatible = "sifive,plic-1.0.0" },
+	{ .compatible = "thead,c900-plic",
+	  .data = thead_plic_plat_init },
 	{ },
 };
 
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
index 750b7aa5b60..d49168727e7 100644
--- a/lib/utils/reset/fdt_reset_thead.c
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -82,14 +82,6 @@ static int thead_reset_init(void *fdt, int nodeoff,
 			clone_csrs(cnt);
 	}
 
-
-	/* Delegate plic enable regs for S-mode */
-	val = fdt_getprop(fdt, nodeoff, "plic-delegate", &len);
-	if (len > 0 && val) {
-		p = (void *)(ulong)fdt64_to_cpu(*val);
-		writel(BIT(0), p);
-	}
-
 	/* Old reset method for secondary harts */
 	if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
 		csr_write(0x7c7, (ulong)&__thead_pre_start_warm);

From 309e8bdf85ec7f7dd2f0907c4c9206a9ee639784 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 21 Oct 2021 11:11:34 +0530
Subject: [PATCH 0878/1765] lib: utils/reset: Register separate GPIO system
 reset devices

Now that sbi_system support multiple system reset devices, we should
register separate devices for GPIO restart and GPIO poweroff because
DT describes these as separate devices with different compatible
strings.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
---
 lib/utils/reset/fdt_reset_gpio.c | 60 ++++++++++++++++++++++----------
 1 file changed, 41 insertions(+), 19 deletions(-)

diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 4da1450eca8..302035b3e77 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -35,20 +35,20 @@ static struct gpio_reset restart = {
 	.inactive_delay = 100
 };
 
-static struct gpio_reset *gpio_get_reset_settings(u32 type)
+static struct gpio_reset *gpio_reset_get(bool is_restart, u32 type)
 {
-	struct gpio_reset *reset;
+	struct gpio_reset *reset = NULL;
 
 	switch (type) {
 	case SBI_SRST_RESET_TYPE_SHUTDOWN:
-		reset = &poweroff;
+		if (!is_restart)
+			reset = &poweroff;
 		break;
 	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
 	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
-		reset = &restart;
+		if (is_restart)
+			reset = &restart;
 		break;
-	default:
-		reset = NULL;
 	}
 
 	if (reset && !reset->pin.chip)
@@ -57,15 +57,8 @@ static struct gpio_reset *gpio_get_reset_settings(u32 type)
 	return reset;
 }
 
-static int gpio_system_reset_check(u32 type, u32 reason)
+static void gpio_reset_exec(struct gpio_reset *reset)
 {
-	return !!gpio_get_reset_settings(type);
-}
-
-static void gpio_system_reset(u32 type, u32 reason)
-{
-	struct gpio_reset *reset = gpio_get_reset_settings(type);
-
 	if (reset) {
 		/* drive it active, also inactive->active edge */
 		gpio_direction_output(&reset->pin, 1);
@@ -82,10 +75,36 @@ static void gpio_system_reset(u32 type, u32 reason)
 	sbi_hart_hang();
 }
 
-static struct sbi_system_reset_device gpio_reset = {
-	.name = "gpio-reset",
-	.system_reset_check = gpio_system_reset_check,
-	.system_reset = gpio_system_reset
+static int gpio_system_poweroff_check(u32 type, u32 reason)
+{
+	return !!gpio_reset_get(FALSE, type);
+}
+
+static void gpio_system_poweroff(u32 type, u32 reason)
+{
+	gpio_reset_exec(gpio_reset_get(FALSE, type));
+}
+
+static struct sbi_system_reset_device gpio_poweroff = {
+	.name = "gpio-poweroff",
+	.system_reset_check = gpio_system_poweroff_check,
+	.system_reset = gpio_system_poweroff
+};
+
+static int gpio_system_restart_check(u32 type, u32 reason)
+{
+	return !!gpio_reset_get(TRUE, type);
+}
+
+static void gpio_system_restart(u32 type, u32 reason)
+{
+	gpio_reset_exec(gpio_reset_get(TRUE, type));
+}
+
+static struct sbi_system_reset_device gpio_restart = {
+	.name = "gpio-restart",
+	.system_reset_check = gpio_system_restart_check,
+	.system_reset = gpio_system_restart
 };
 
 static int gpio_reset_init(void *fdt, int nodeoff,
@@ -115,7 +134,10 @@ static int gpio_reset_init(void *fdt, int nodeoff,
 	if (len > 0)
 		reset->inactive_delay = fdt32_to_cpu(*val);
 
-	sbi_system_reset_add_device(&gpio_reset);
+	if (is_restart)
+		sbi_system_reset_add_device(&gpio_restart);
+	else
+		sbi_system_reset_add_device(&gpio_poweroff);
 
 	return 0;
 }

From 723aa88ff4cc44230cf871bda319905113003279 Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Mon, 25 Oct 2021 16:06:15 +0800
Subject: [PATCH 0879/1765] lib: sbi: Refine addr format in sbi_printf

Although we have PRILX to help us print unsigned long without
considering the 32bit/64bit differences, there are still some
places using 08lx and 016lx manually --- leading to redundant code.

This commit fixes the issue by using PRILX all the time.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_domain.c | 18 +++---------------
 lib/sbi/sbi_hart.c   | 11 ++---------
 2 files changed, 5 insertions(+), 24 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 3096af0a12d..33d7ad560a8 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -328,11 +328,7 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 		rend = (reg->order < __riscv_xlen) ?
 			rstart + ((1UL << reg->order) - 1) : -1UL;
 
-#if __riscv_xlen == 32
-		sbi_printf("Domain%d Region%02d    %s: 0x%08lx-0x%08lx ",
-#else
-		sbi_printf("Domain%d Region%02d    %s: 0x%016lx-0x%016lx ",
-#endif
+		sbi_printf("Domain%d Region%02d    %s: 0x%" PRILX "-0x%" PRILX " ",
 			   dom->index, i, suffix, rstart, rend);
 
 		k = 0;
@@ -351,18 +347,10 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 		i++;
 	}
 
-#if __riscv_xlen == 32
-	sbi_printf("Domain%d Next Address%s: 0x%08lx\n",
-#else
-	sbi_printf("Domain%d Next Address%s: 0x%016lx\n",
-#endif
+	sbi_printf("Domain%d Next Address%s: 0x%" PRILX "\n",
 		   dom->index, suffix, dom->next_addr);
 
-#if __riscv_xlen == 32
-	sbi_printf("Domain%d Next Arg1   %s: 0x%08lx\n",
-#else
-	sbi_printf("Domain%d Next Arg1   %s: 0x%016lx\n",
-#endif
+	sbi_printf("Domain%d Next Arg1   %s: 0x%" PRILX "\n",
 		   dom->index, suffix, dom->next_arg1);
 
 	sbi_printf("Domain%d Next Mode   %s: ", dom->index, suffix);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6254452e11b..8eb0c3856b3 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -150,17 +150,10 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 		/* No delegation possible as mideleg does not exist*/
 		return;
 
-#if __riscv_xlen == 32
-	sbi_printf("%sMIDELEG%s: 0x%08lx\n",
+	sbi_printf("%sMIDELEG%s: 0x%" PRILX "\n",
 		   prefix, suffix, csr_read(CSR_MIDELEG));
-	sbi_printf("%sMEDELEG%s: 0x%08lx\n",
+	sbi_printf("%sMEDELEG%s: 0x%" PRILX "\n",
 		   prefix, suffix, csr_read(CSR_MEDELEG));
-#else
-	sbi_printf("%sMIDELEG%s: 0x%016lx\n",
-		   prefix, suffix, csr_read(CSR_MIDELEG));
-	sbi_printf("%sMEDELEG%s: 0x%016lx\n",
-		   prefix, suffix, csr_read(CSR_MEDELEG));
-#endif
 }
 
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)

From c891acca172dfc60719419e19338508a83d97931 Mon Sep 17 00:00:00 2001
From: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Date: Wed, 27 Oct 2021 09:43:36 +0200
Subject: [PATCH 0880/1765] include: sbi_utils: Introduce an helper to get fdt
 base address

This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.

Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/fdt/fdt_helper.h | 6 ++++++
 lib/utils/ipi/fdt_ipi.c            | 2 +-
 lib/utils/irqchip/fdt_irqchip.c    | 2 +-
 lib/utils/reset/fdt_reset.c        | 2 +-
 lib/utils/serial/fdt_serial.c      | 2 +-
 lib/utils/timer/fdt_timer.c        | 2 +-
 platform/andes/ae350/platform.c    | 3 ++-
 platform/fpga/ariane/platform.c    | 3 ++-
 platform/fpga/openpiton/platform.c | 4 ++--
 platform/generic/platform.c        | 6 +++---
 platform/kendryte/k210/platform.c  | 3 ++-
 platform/nuclei/ux600/platform.c   | 3 ++-
 12 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 5cb7340484c..24fee7a339c 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -11,6 +11,7 @@
 #define __FDT_HELPER_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_scratch.h>
 
 struct fdt_match {
 	const char *compatible;
@@ -81,4 +82,9 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible);
 
+static inline void *fdt_get_address(void)
+{
+	return sbi_scratch_thishart_arg1_ptr();
+}
+
 #endif /* __FDT_HELPER_H__ */
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index ed56e4920f4..91f116f0fb0 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -45,7 +45,7 @@ static int fdt_ipi_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_ipi *drv;
 	const struct fdt_match *match;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < array_size(ipi_drivers); pos++) {
 		drv = ipi_drivers[pos];
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 1306d50861b..8dda661ab1c 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -38,7 +38,7 @@ static int fdt_irqchip_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_irqchip *drv;
 	const struct fdt_match *match;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < array_size(irqchip_drivers); pos++) {
 		drv = irqchip_drivers[pos];
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 168bb0c1b2f..7d0aba68bb1 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -33,7 +33,7 @@ int fdt_reset_init(void)
 	int pos, noff, rc;
 	struct fdt_reset *drv;
 	const struct fdt_match *match;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < array_size(reset_drivers); pos++) {
 		drv = reset_drivers[pos];
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 1d1eba8866c..cedda04a6c5 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -40,7 +40,7 @@ int fdt_serial_init(void)
 	struct fdt_serial *drv;
 	const struct fdt_match *match;
 	int pos, noff = -1, len, coff, rc;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt = fdt_get_address();
 
 	/* Find offset of node pointed to by stdout-path */
 	coff = fdt_path_offset(fdt, "/chosen");
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 148c05edfb1..781bb633cd5 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -45,7 +45,7 @@ static int fdt_timer_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_timer *drv;
 	const struct fdt_match *match;
-	void *fdt = sbi_scratch_thishart_arg1_ptr();
+	void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < array_size(timer_drivers); pos++) {
 		drv = timer_drivers[pos];
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index ae4ef71718b..01232d0b70d 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_trap.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/uart8250.h>
@@ -55,7 +56,7 @@ static int ae350_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 	fdt_fixups(fdt);
 
 	return 0;
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 5acc446dc6c..c6f0ffd8c06 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
@@ -76,7 +77,7 @@ static int ariane_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 	fdt_fixups(fdt);
 
 	return 0;
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 924053e7ee2..59c670248da 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -76,7 +76,7 @@ static int openpiton_early_init(bool cold_boot)
 
 	if (!cold_boot)
 		return 0;
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 
 	rc = fdt_parse_uart8250(fdt, &uart_data, "ns16550");
 	if (!rc)
@@ -112,7 +112,7 @@ static int openpiton_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 	fdt_fixups(fdt);
 
 	return 0;
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 0757d87f903..276f64e8147 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -148,7 +148,7 @@ static int generic_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
@@ -177,7 +177,7 @@ static void generic_final_exit(void)
 
 static int generic_domains_init(void)
 {
-	return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
+	return fdt_domains_populate(fdt_get_address());
 }
 
 static u64 generic_tlbr_flush_limit(void)
@@ -189,7 +189,7 @@ static u64 generic_tlbr_flush_limit(void)
 
 static int generic_pmu_init(void)
 {
-	return fdt_pmu_setup(sbi_scratch_thishart_arg1_ptr());
+	return fdt_pmu_setup(fdt_get_address());
 }
 
 static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index e7caec333b9..ef848c7ce78 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
@@ -120,7 +121,7 @@ static int k210_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 6f87cf817cc..5498a1fbddb 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>
@@ -175,7 +176,7 @@ static int ux600_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = sbi_scratch_thishart_arg1_ptr();
+	fdt = fdt_get_address();
 	ux600_modify_dt(fdt);
 
 	return 0;

From 013ba4ef3d94de67d040376535131012134ed54f Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Tue, 26 Oct 2021 16:25:21 +0530
Subject: [PATCH 0881/1765] lib: sbi: Fix GPA passed to __sbi_hfence_gvma_xyz()
 functions

The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).

Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because all H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) we tried till now were conservatively
flushing everything upon any HFENCE.GVMA instruction.

This patch fixes GPA passed to __sbi_hfence_gvma_vmid_gpa()
and __sbi_hfence_gvma_gpa() functions.

Fixes: 331ff6a162c1 ("lib: Support stage1 and stage2 tlb flushing")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
---
 include/sbi/sbi_hfence.h | 5 +++--
 lib/sbi/sbi_hfence.S     | 4 ++--
 lib/sbi/sbi_tlb.c        | 4 ++--
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_hfence.h b/include/sbi/sbi_hfence.h
index 4420f279352..d3958f18777 100644
--- a/include/sbi/sbi_hfence.h
+++ b/include/sbi/sbi_hfence.h
@@ -12,13 +12,14 @@
 #define __SBI_FENCE_H__
 
 /** Invalidate Stage2 TLBs for given VMID and guest physical address */
-void __sbi_hfence_gvma_vmid_gpa(unsigned long gpa, unsigned long vmid);
+void __sbi_hfence_gvma_vmid_gpa(unsigned long gpa_divby_4,
+				unsigned long vmid);
 
 /** Invalidate Stage2 TLBs for given VMID */
 void __sbi_hfence_gvma_vmid(unsigned long vmid);
 
 /** Invalidate Stage2 TLBs for given guest physical address */
-void __sbi_hfence_gvma_gpa(unsigned long gpa);
+void __sbi_hfence_gvma_gpa(unsigned long gpa_divby_4);
 
 /** Invalidate all possible Stage2 TLBs */
 void __sbi_hfence_gvma_all(void);
diff --git a/lib/sbi/sbi_hfence.S b/lib/sbi/sbi_hfence.S
index d05becbf2f5..e11e6505383 100644
--- a/lib/sbi/sbi_hfence.S
+++ b/lib/sbi/sbi_hfence.S
@@ -27,7 +27,7 @@
 	.global __sbi_hfence_gvma_vmid_gpa
 __sbi_hfence_gvma_vmid_gpa:
 	/*
-	 * rs1 = a0 (GPA)
+	 * rs1 = a0 (GPA >> 2)
 	 * rs2 = a1 (VMID)
 	 * HFENCE.GVMA a0, a1
 	 * 0110001 01011 01010 000 00000 1110011
@@ -51,7 +51,7 @@ __sbi_hfence_gvma_vmid:
 	.global __sbi_hfence_gvma_gpa
 __sbi_hfence_gvma_gpa:
 	/*
-	 * rs1 = a0 (GPA)
+	 * rs1 = a0 (GPA >> 2)
 	 * rs2 = zero
 	 * HFENCE.GVMA a0
 	 * 0110001 00000 01010 000 00000 1110011
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index efa74a7542b..4c142ea3e66 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -72,7 +72,7 @@ void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__sbi_hfence_gvma_gpa(start+i);
+		__sbi_hfence_gvma_gpa((start + i) >> 2);
 	}
 }
 
@@ -148,7 +148,7 @@ void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	}
 
 	for (i = 0; i < size; i += PAGE_SIZE) {
-		__sbi_hfence_gvma_vmid_gpa(start + i, vmid);
+		__sbi_hfence_gvma_vmid_gpa((start + i) >> 2, vmid);
 	}
 }
 

From 0979ffda12b636fab58228c2b40bab1e2f6b327b Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Tue, 2 Nov 2021 17:39:11 +0300
Subject: [PATCH 0882/1765] lib: utils/gpio: use list for drivers

Convert static array to sbi_list.

This removes size limitation, makes add/remove more efficient and
saves space.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/gpio/gpio.h |  8 +++++++
 lib/utils/gpio/gpio.c         | 42 ++++++++++-------------------------
 2 files changed, 20 insertions(+), 30 deletions(-)

diff --git a/include/sbi_utils/gpio/gpio.h b/include/sbi_utils/gpio/gpio.h
index 167d11a847e..7a3d8bbe1b1 100644
--- a/include/sbi_utils/gpio/gpio.h
+++ b/include/sbi_utils/gpio/gpio.h
@@ -11,6 +11,7 @@
 #define __GPIO_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
 
 #define GPIO_LINE_DIRECTION_IN	1
 #define GPIO_LINE_DIRECTION_OUT	0
@@ -70,8 +71,15 @@ struct gpio_chip {
 	int (*get)(struct gpio_pin *gp);
 	/** Set output value for GPIO pin */
 	void (*set)(struct gpio_pin *gp, int value);
+	/** List */
+	struct sbi_dlist node;
 };
 
+static inline struct gpio_chip *to_gpio_chip(struct sbi_dlist *node)
+{
+	return container_of(node, struct gpio_chip, node);
+}
+
 /** Find a registered GPIO chip */
 struct gpio_chip *gpio_chip_find(unsigned int id);
 
diff --git a/lib/utils/gpio/gpio.c b/lib/utils/gpio/gpio.c
index fb30c0f7b16..3a3a6b24a7b 100644
--- a/lib/utils/gpio/gpio.c
+++ b/lib/utils/gpio/gpio.c
@@ -10,58 +10,40 @@
 #include <sbi/sbi_error.h>
 #include <sbi_utils/gpio/gpio.h>
 
-#define GPIO_CHIP_MAX		16
-
-static struct gpio_chip *gc_array[GPIO_CHIP_MAX];
+static SBI_LIST_HEAD(gpio_chip_list);
 
 struct gpio_chip *gpio_chip_find(unsigned int id)
 {
-	unsigned int i;
-	struct gpio_chip *ret = NULL;
-
-	for (i = 0; i < GPIO_CHIP_MAX; i++) {
-		if (gc_array[i] && gc_array[i]->id == id) {
-			ret = gc_array[i];
-			break;
-		}
+	struct sbi_dlist *pos;
+
+	sbi_list_for_each(pos, &(gpio_chip_list)) {
+		struct gpio_chip *chip = to_gpio_chip(pos);
+
+		if (chip->id == id)
+			return chip;
 	}
 
-	return ret;
+	return NULL;
 }
 
 int gpio_chip_add(struct gpio_chip *gc)
 {
-	int i, ret = SBI_ENOSPC;
-
 	if (!gc)
 		return SBI_EINVAL;
 	if (gpio_chip_find(gc->id))
 		return SBI_EALREADY;
 
-	for (i = 0; i < GPIO_CHIP_MAX; i++) {
-		if (!gc_array[i]) {
-			gc_array[i] = gc;
-			ret = 0;
-			break;
-		}
-	}
+	sbi_list_add(&(gc->node), &(gpio_chip_list));
 
-	return ret;
+	return 0;
 }
 
 void gpio_chip_remove(struct gpio_chip *gc)
 {
-	int i;
-
 	if (!gc)
 		return;
 
-	for (i = 0; i < GPIO_CHIP_MAX; i++) {
-		if (gc_array[i] == gc) {
-			gc_array[i] = NULL;
-			break;
-		}
-	}
+	sbi_list_del(&(gc->node));
 }
 
 int gpio_get_direction(struct gpio_pin *gp)

From 2fe2f55d5050aac546d35616f2944f889a9c8d6e Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sat, 6 Nov 2021 10:54:49 +0100
Subject: [PATCH 0883/1765] lib: sbi: move sbi_boot_print_general()

Moving the sbi_boot_print_general() call after the
sbi_platform_final_init() call allows to print devices initialized in the
latter.

To keep the overall print sequence the same also move
sbi_boot_print_domains().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_init.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index b1c7cf0568f..83043c53901 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -301,8 +301,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
-	sbi_boot_print_general(scratch);
-
 	/*
 	 * Note: Finalize domains after HSM initialization so that we
 	 * can startup non-root domains.
@@ -316,8 +314,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
-	sbi_boot_print_domains(scratch);
-
 	rc = sbi_hart_pmp_configure(scratch);
 	if (rc) {
 		sbi_printf("%s: PMP configure failed (error %d)\n",
@@ -336,6 +332,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
+	sbi_boot_print_general(scratch);
+
+	sbi_boot_print_domains(scratch);
+
 	sbi_boot_print_hart(scratch, hartid);
 
 	wake_coldboot_harts(scratch, hartid);

From 57f094e67e0642a16889e9bce64266a4e378683b Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sat, 6 Nov 2021 10:54:50 +0100
Subject: [PATCH 0884/1765] platform: generic: move fdt_reset_init to
 final_init

Move the fdt_reset_init() invocation from generic_early_init() to
generic_final_init(). This allows to print error messages.

Ignore the return value of fdt_reset_init() as we should not stop booting
due to failure to initialize reset drivers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 platform/generic/platform.c | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 276f64e8147..bc6e761e88f 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -120,18 +120,10 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 static int generic_early_init(bool cold_boot)
 {
-	int rc;
-
-	if (generic_plat && generic_plat->early_init) {
-		rc = generic_plat->early_init(cold_boot, generic_plat_match);
-		if (rc)
-			return rc;
-	}
-
-	if (!cold_boot)
+	if (!generic_plat || !generic_plat->early_init)
 		return 0;
 
-	return fdt_reset_init();
+	return generic_plat->early_init(cold_boot, generic_plat_match);
 }
 
 static int generic_final_init(bool cold_boot)
@@ -139,6 +131,9 @@ static int generic_final_init(bool cold_boot)
 	void *fdt;
 	int rc;
 
+	if (cold_boot)
+		fdt_reset_init();
+
 	if (generic_plat && generic_plat->final_init) {
 		rc = generic_plat->final_init(cold_boot, generic_plat_match);
 		if (rc)

From be245acfffa297b5ed4e0c7bb473a6bd55231bf8 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sat, 6 Nov 2021 10:54:51 +0100
Subject: [PATCH 0885/1765] lib: sbi: error handling in fdt_reset_init()

The initialization of a reset driver may fail for various reasons, like
a PMIC based reset driver not finding the required I2C driver. The return
code of the init routine may take other error values than -ENODEV.

If the initialization of a reset driver fails, this should not lead to the
board hanging. It is enough that the reset driver does not call
sbi_system_reset_add_device() to avoid invoking the driver for a device
that could not be initialized.

Change the return type of fdt_reset_init() to void.
Print a message if an error occurs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/reset/fdt_reset.h |  7 ++++++-
 lib/utils/reset/fdt_reset.c         | 13 ++++++-------
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index 6d586974487..46167b99396 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -17,6 +17,11 @@ struct fdt_reset {
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
-int fdt_reset_init(void);
+/**
+ * fdt_reset_init() - initialize reset drivers based on the device-tree
+ *
+ * This function shall be invoked in final init.
+ */
+void fdt_reset_init(void);
 
 #endif
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 7d0aba68bb1..f4befa2d115 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -7,6 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -28,7 +29,7 @@ static struct fdt_reset *reset_drivers[] = {
 	&fdt_reset_thead,
 };
 
-int fdt_reset_init(void)
+void fdt_reset_init(void)
 {
 	int pos, noff, rc;
 	struct fdt_reset *drv;
@@ -44,12 +45,10 @@ int fdt_reset_init(void)
 
 		if (drv->init) {
 			rc = drv->init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
+			if (rc && rc != SBI_ENODEV) {
+				sbi_printf("%s: %s init failed, %d\n",
+					   __func__, match->compatible, rc);
+			}
 		}
 	}
-
-	return 0;
 }

From a74daf2cb982269eb9cda5a71eef27c0f869ea08 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:52:56 -0800
Subject: [PATCH 0886/1765] riscv: Add new CSRs introduced by Sscofpmf[1]
 extension

[1] https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view

Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index e1d0b463c66..14caa95d66d 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -516,6 +516,40 @@
 #define CSR_MHPMEVENT30			0x33e
 #define CSR_MHPMEVENT31			0x33f
 
+/* For RV32 */
+#define CSR_MHPMEVENT3H			0x723
+#define CSR_MHPMEVENT4H			0x724
+#define CSR_MHPMEVENT5H			0x725
+#define CSR_MHPMEVENT6H			0x726
+#define CSR_MHPMEVENT7H			0x727
+#define CSR_MHPMEVENT8H			0x728
+#define CSR_MHPMEVENT9H			0x729
+#define CSR_MHPMEVENT10H		0x72a
+#define CSR_MHPMEVENT11H		0x72b
+#define CSR_MHPMEVENT12H		0x72c
+#define CSR_MHPMEVENT13H		0x72d
+#define CSR_MHPMEVENT14H		0x72e
+#define CSR_MHPMEVENT15H		0x72f
+#define CSR_MHPMEVENT16H		0x730
+#define CSR_MHPMEVENT17H		0x731
+#define CSR_MHPMEVENT18H		0x732
+#define CSR_MHPMEVENT19H		0x733
+#define CSR_MHPMEVENT20H		0x734
+#define CSR_MHPMEVENT21H		0x735
+#define CSR_MHPMEVENT22H		0x736
+#define CSR_MHPMEVENT23H		0x737
+#define CSR_MHPMEVENT24H		0x738
+#define CSR_MHPMEVENT25H		0x739
+#define CSR_MHPMEVENT26H		0x73a
+#define CSR_MHPMEVENT27H		0x73b
+#define CSR_MHPMEVENT28H		0x73c
+#define CSR_MHPMEVENT29H		0x73d
+#define CSR_MHPMEVENT30H		0x73e
+#define CSR_MHPMEVENT31H		0x73f
+
+/* Counter Overflow CSR */
+#define CSR_SCOUNTOVF			0xda0
+
 /* Debug/Trace Registers */
 #define CSR_TSELECT			0x7a0
 #define CSR_TDATA1			0x7a1

From 7084ad9f4281eecd7a7f66cecfd7d9cff8d452ad Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:52:57 -0800
Subject: [PATCH 0887/1765] lib: sbi: Update csr_read/write_num for PMU

The Sscofpmf extension introduces mhpmevent[h] csrs to handle filtering
/overflow bits in RV32. There is no way to read/write mcountinhibit
using mcountinhibit csr using a variable.

Updated the support to read/write mhpmevent[h] and mcountinhibit csr.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/riscv_asm.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index f6b8c8ec310..25b40cfa1a9 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -126,6 +126,11 @@ unsigned long csr_read_num(int csr_num)
 	switchcase_csr_read_4(CSR_MHPMCOUNTER4, ret)
 	switchcase_csr_read_8(CSR_MHPMCOUNTER8, ret)
 	switchcase_csr_read_16(CSR_MHPMCOUNTER16, ret)
+	switchcase_csr_read(CSR_MCOUNTINHIBIT, ret)
+	switchcase_csr_read(CSR_MHPMEVENT3, ret)
+	switchcase_csr_read_4(CSR_MHPMEVENT4, ret)
+	switchcase_csr_read_8(CSR_MHPMEVENT8, ret)
+	switchcase_csr_read_16(CSR_MHPMEVENT16, ret)
 #if __riscv_xlen == 32
 	switchcase_csr_read(CSR_MCYCLEH, ret)
 	switchcase_csr_read(CSR_MINSTRETH, ret)
@@ -133,6 +138,10 @@ unsigned long csr_read_num(int csr_num)
 	switchcase_csr_read_4(CSR_MHPMCOUNTER4H, ret)
 	switchcase_csr_read_8(CSR_MHPMCOUNTER8H, ret)
 	switchcase_csr_read_16(CSR_MHPMCOUNTER16H, ret)
+	switchcase_csr_read(CSR_MHPMEVENT3H, ret)
+	switchcase_csr_read_4(CSR_MHPMEVENT4H, ret)
+	switchcase_csr_read_8(CSR_MHPMEVENT8H, ret)
+	switchcase_csr_read_16(CSR_MHPMEVENT16H, ret)
 #endif
 
 	default:
@@ -192,6 +201,10 @@ void csr_write_num(int csr_num, unsigned long val)
 	switchcase_csr_write_4(CSR_MHPMCOUNTER4H, val)
 	switchcase_csr_write_8(CSR_MHPMCOUNTER8H, val)
 	switchcase_csr_write_16(CSR_MHPMCOUNTER16H, val)
+	switchcase_csr_write(CSR_MHPMEVENT3H, val)
+	switchcase_csr_write_4(CSR_MHPMEVENT4H, val)
+	switchcase_csr_write_8(CSR_MHPMEVENT8H, val)
+	switchcase_csr_write_16(CSR_MHPMEVENT16H, val)
 #endif
 	switchcase_csr_write(CSR_MCOUNTINHIBIT, val)
 	switchcase_csr_write(CSR_MHPMEVENT3, val)

From 867c65360df283f056afa963ad8333e9c1eb21bb Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:52:58 -0800
Subject: [PATCH 0888/1765] lib: sbi: Detect Sscofpmf extension at run time

Sscofpmf ISA extension introduces PMU counter overflow and filtering support.
It introduces a read only `scountovf` csr that can be used to detect if
a hart supports this extension at runtime. However, this feature is only
useful if the hart already supports mcounteren and mcountinhibit.

Add a dynamic detection mechanism and boot time print message if sscofpmf
is present.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_hart.h |  4 +++-
 lib/sbi/sbi_hart.c     | 12 ++++++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 0c18ef9325b..d2db9d6e1fa 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -20,8 +20,10 @@ enum sbi_hart_features {
 	SBI_HART_HAS_MCOUNTEREN = (1 << 1),
 	/** Hart has counter inhibit CSR */
 	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 2),
+	/** Hart has sscofpmf extension */
+	SBI_HART_HAS_SSCOFPMF = (1 << 3),
 	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 3),
+	SBI_HART_HAS_TIME = (1 << 4),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 8eb0c3856b3..7f31bb7d37c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -281,6 +281,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_MCOUNTINHIBIT:
 		fstr = "mcountinhibit";
 		break;
+	case SBI_HART_HAS_SSCOFPMF:
+		fstr = "sscofpmf";
+		break;
 	case SBI_HART_HAS_TIME:
 		fstr = "time";
 		break;
@@ -490,6 +493,15 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 			hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT;
 	}
 
+	/* Counter overflow/filtering is not useful without mcounter/inhibit */
+	if (hfeatures->features & SBI_HART_HAS_MCOUNTINHIBIT &&
+	    hfeatures->features & SBI_HART_HAS_MCOUNTEREN) {
+		/* Detect if hart supports sscofpmf */
+		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
+		if (!trap.cause)
+			hfeatures->features |= SBI_HART_HAS_SSCOFPMF;
+	}
+
 	/* Detect if hart supports time CSR */
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)

From 9134c3643e420b1917cf98940552ef16467f7a34 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:52:59 -0800
Subject: [PATCH 0889/1765] lib: sbi: Delegate PMU counter overflow interrupt
 to S mode

OpenSBI doesn't handle PMU counters for now.

Delegate the overflow counter to S-mode always.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 2 ++
 lib/sbi/sbi_hart.c           | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 14caa95d66d..ca6343537eb 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -86,6 +86,7 @@
 #define IRQ_VS_EXT			10
 #define IRQ_M_EXT			11
 #define IRQ_S_GEXT			12
+#define IRQ_PMU_OVF			13
 
 #define MIP_SSIP			(_UL(1) << IRQ_S_SOFT)
 #define MIP_VSSIP			(_UL(1) << IRQ_VS_SOFT)
@@ -97,6 +98,7 @@
 #define MIP_VSEIP			(_UL(1) << IRQ_VS_EXT)
 #define MIP_MEIP			(_UL(1) << IRQ_M_EXT)
 #define MIP_SGEIP			(_UL(1) << IRQ_S_GEXT)
+#define MIP_LCOFIP			(_UL(1) << IRQ_PMU_OVF)
 
 #define SIP_SSIP			MIP_SSIP
 #define SIP_STIP			MIP_STIP
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 7f31bb7d37c..8a98d4df823 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -115,6 +115,9 @@ static int delegate_traps(struct sbi_scratch *scratch)
 
 	/* Send M-mode interrupts and most exceptions to S-mode */
 	interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		interrupts |= MIP_LCOFIP;
+
 	exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_BREAKPOINT) |
 		     (1U << CAUSE_USER_ECALL);
 	if (sbi_platform_has_mfaults_delegation(plat))

From 730f01bb41a603cf03d2cfd9c27317389962ffee Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:00 -0800
Subject: [PATCH 0890/1765] lib: sbi: Support sscofpmf extension in OpenSBI

This patch adds sscofpmf extension in pmu module which includes
following things.

1. Enable overflow irq when starting a counter.
2. Setting the correct event filters passed from supervisor.
3. Delegating the overflow interrupt to the supervisor.
4. Add RV32 support for sscofpmf.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/riscv_encoding.h | 25 +++++++++++
 lib/sbi/sbi_pmu.c            | 85 ++++++++++++++++++++++++++++++------
 2 files changed, 97 insertions(+), 13 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index ca6343537eb..8a29f8e05c9 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -173,6 +173,31 @@
 #define HGATP_MODE_SHIFT		HGATP32_MODE_SHIFT
 #endif
 
+#if __riscv_xlen == 64
+#define MHPMEVENT_OF			(_UL(1) << 63)
+#define MHPMEVENT_MINH			(_UL(1) << 62)
+#define MHPMEVENT_SINH			(_UL(1) << 61)
+#define MHPMEVENT_UINH			(_UL(1) << 60)
+#define MHPMEVENT_VSINH			(_UL(1) << 59)
+#define MHPMEVENT_VUINH			(_UL(1) << 58)
+#else
+#define MHPMEVENTH_OF			(_UL(1) << 31)
+#define MHPMEVENTH_MINH			(_ULL(1) << 30)
+#define MHPMEVENTH_SINH			(_ULL(1) << 29)
+#define MHPMEVENTH_UINH			(_ULL(1) << 28)
+#define MHPMEVENTH_VSINH		(_ULL(1) << 27)
+#define MHPMEVENTH_VUINH		(_ULL(1) << 26)
+
+#define MHPMEVENT_MINH			(MHPMEVENTH_MINH << 32)
+#define MHPMEVENT_SINH			(MHPMEVENTH_SINH << 32)
+#define MHPMEVENT_UINH			(MHPMEVENTH_UINH << 32)
+#define MHPMEVENT_VSINH			(MHPMEVENTH_VSINH << 32)
+#define MHPMEVENT_VUINH			(MHPMEVENTH_VUINH << 32)
+
+#endif
+
+#define MHPMEVENT_SSCOF_MASK		_ULL(0xFFFF000000000000)
+
 /* ===== User-level CSRs ===== */
 
 /* User Trap Setup (N-extension) */
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index c276a46e287..eb0c2ff5d25 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -226,6 +226,42 @@ int sbi_pmu_add_raw_event_counter_map(uint64_t select, u32 cmap)
 				    SBI_PMU_EVENT_RAW_IDX, cmap, select);
 }
 
+static int pmu_ctr_enable_irq_hw(int ctr_idx)
+{
+	unsigned long mhpmevent_csr;
+	unsigned long mhpmevent_curr;
+	unsigned long mip_val;
+	unsigned long of_mask;
+
+	if (ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return SBI_EFAIL;
+
+#if __riscv_xlen == 32
+	mhpmevent_csr = CSR_MHPMEVENT3H  + ctr_idx - 3;
+	of_mask = ~MHPMEVENTH_OF;
+#else
+	mhpmevent_csr = CSR_MHPMEVENT3 + ctr_idx - 3;
+	of_mask = ~MHPMEVENT_OF;
+#endif
+
+	mhpmevent_curr = csr_read_num(mhpmevent_csr);
+	mip_val = csr_read(CSR_MIP);
+	/**
+	 * Clear out the OF bit so that next interrupt can be enabled.
+	 * This should be done only when the corresponding overflow interrupt
+	 * bit is cleared. That indicates that software has already handled the
+	 * previous interrupts or the hardware yet to set an overflow interrupt.
+	 * Otherwise, there will be race conditions where we may clear the bit
+	 * the software is yet to handle the interrupt.
+	 */
+	if (!(mip_val & MIP_LCOFIP)) {
+		mhpmevent_curr &= of_mask;
+		csr_write_num(mhpmevent_csr, mhpmevent_curr);
+	}
+
+	return 0;
+}
+
 static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
 {
 #if __riscv_xlen == 32
@@ -241,6 +277,7 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 {
 	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
 	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Make sure the counter index lies within the range and is not TM bit */
 	if (cidx > num_hw_ctrs || cidx == 1)
@@ -252,12 +289,14 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	__set_bit(cidx, &mctr_en);
 	__clear_bit(cidx, &mctr_inhbt);
 
-	if (ival_update)
-		pmu_ctr_write_hw(cidx, ival);
-
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		pmu_ctr_enable_irq_hw(cidx);
 	csr_write(CSR_MCOUNTEREN, mctr_en);
 	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
+	if (ival_update)
+		pmu_ctr_write_hw(cidx, ival);
+
 	return 0;
 }
 
@@ -362,8 +401,21 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 	return ret;
 }
 
+static void pmu_update_inhibit_flags(unsigned long flags, uint64_t *mhpmevent_val)
+{
+	if (flags & SBI_PMU_CFG_FLAG_SET_VUINH)
+		*mhpmevent_val |= MHPMEVENT_VUINH;
+	if (flags & SBI_PMU_CFG_FLAG_SET_VSINH)
+		*mhpmevent_val |= MHPMEVENT_VSINH;
+	if (flags & SBI_PMU_CFG_FLAG_SET_UINH)
+		*mhpmevent_val |= MHPMEVENT_UINH;
+	if (flags & SBI_PMU_CFG_FLAG_SET_SINH)
+		*mhpmevent_val |= MHPMEVENT_SINH;
+}
+
 static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
-				    unsigned long eindex, uint64_t data)
+				   unsigned long flags, unsigned long eindex,
+				   uint64_t data)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
@@ -375,17 +427,23 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
 		return SBI_EFAIL;
 
-	/* TODO: The upper 16 bits of mhpmevent is reserved by sscofpmf extension.
-	 * Update those bits based on the flags received from supervisor.
-	 * The OVF bit also should be cleared here in case it was not cleared
-	 * during event stop.
-	 */
-	csr_write_num(CSR_MCOUNTINHIBIT + ctr_idx, mhpmevent_val);
+	/* Always clear the OVF bit and inhibit countin of events in M-mode */
+	mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) | MHPMEVENT_MINH;
+
+	/* Update the inhibit flags based on inhibit flags received from supervisor */
+	pmu_update_inhibit_flags(flags, &mhpmevent_val);
+
+#if __riscv_xlen == 32
+	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val & 0xFFFFFFFF);
+	csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, mhpmevent_val >> BITS_PER_LONG);
+#else
+	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val);
+#endif
 
 	return 0;
 }
 
-static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask,
+static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned long flags,
 			   unsigned long event_idx, uint64_t data)
 {
 	unsigned long ctr_mask;
@@ -427,7 +485,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask,
 	if (ctr_idx == SBI_ENOTSUPP)
 		return SBI_EFAIL;
 
-	ret = pmu_update_hw_mhpmevent(temp, ctr_idx, event_idx, data);
+	ret = pmu_update_hw_mhpmevent(temp, ctr_idx, flags, event_idx, data);
 
 	if (!ret)
 		ret = ctr_idx;
@@ -490,7 +548,8 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		/* Any firmware counter can be used track any firmware event */
 		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, hartid);
 	} else {
-		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, event_idx, event_data);
+		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, flags, event_idx,
+					  event_data);
 	}
 
 	if (ctr_idx < 0)

From 2363f950bcc497d8bd42654d32d05522fd24b9d7 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:01 -0800
Subject: [PATCH 0891/1765] lib: sbi: Always enable access for all counters

OpenSBI doesn't use any counters for its own usage. Thus, all the counters
can be made accessible for lower privilege mode always. However, the
mcountinhibit must be set so that the counter doesn't increment.
As a result, we don't have to enable/disable mcounteren at every start/stop.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_hart.c | 21 +++++++--------------
 lib/sbi/sbi_pmu.c  | 16 ++++------------
 2 files changed, 11 insertions(+), 26 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 8a98d4df823..a4e9bf59e47 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -56,20 +56,13 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
 		csr_write(CSR_SCOUNTEREN, 7);
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
-			/**
-			 * Just enable the default counters (CY, TM, IR) because
-			 * some OS (e.g FreeBSD) expect them to be enabled.
-			 *
-			 * All other counters will be enabled at runtime after
-			 * S-mode request.
-			 */
-			csr_write(CSR_MCOUNTEREN, 7);
-		else
-			/* Supervisor mode usage are enabled by default */
-			csr_write(CSR_MCOUNTEREN, -1);
-	}
+	/**
+	 * OpenSBI doesn't use any PMU counters in M-mode.
+	 * Supervisor mode usage for all counters are enabled by default
+	 * But counters will not run until mcountinhibit is set.
+	 */
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
+		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* All programmable counters will start running at runtime after S-mode request */
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index eb0c2ff5d25..e2373ff6d9f 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -275,7 +275,6 @@ static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
 
 static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 {
-	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
 	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
@@ -283,15 +282,13 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	if (cidx > num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
-	if (__test_bit(cidx, &mctr_en) && !__test_bit(cidx, &mctr_inhbt))
+	if (!__test_bit(cidx, &mctr_inhbt))
 		return SBI_EALREADY_STARTED;
 
-	__set_bit(cidx, &mctr_en);
 	__clear_bit(cidx, &mctr_inhbt);
 
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
 		pmu_ctr_enable_irq_hw(cidx);
-	csr_write(CSR_MCOUNTEREN, mctr_en);
 	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
 	if (ival_update)
@@ -345,17 +342,14 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 
 static int pmu_ctr_stop_hw(uint32_t cidx)
 {
-	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
 	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 
 	/* Make sure the counter index lies within the range and is not TM bit */
 	if (cidx > num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
-	if (__test_bit(cidx, &mctr_en) && !__test_bit(cidx, &mctr_inhbt)) {
+	if (!__test_bit(cidx, &mctr_inhbt)) {
 		__set_bit(cidx, &mctr_inhbt);
-		__clear_bit(cidx, &mctr_en);
-		csr_write(CSR_MCOUNTEREN, mctr_en);
 		csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 		return 0;
 	} else
@@ -449,7 +443,6 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	unsigned long ctr_mask;
 	int i, ret = 0, ctr_idx = SBI_ENOTSUPP;
 	struct sbi_pmu_hw_event *temp;
-	unsigned long mctr_en = csr_read(CSR_MCOUNTEREN);
 	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	int evt_idx_code = get_cidx_code(event_idx);
 
@@ -474,8 +467,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 
 		ctr_mask = temp->counters & (cmask << cbase);
 		for_each_set_bit_from(cbase, &ctr_mask, SBI_PMU_HW_CTR_MAX) {
-			if (!__test_bit(cbase, &mctr_en) &&
-			    __test_bit(cbase, &mctr_inhbt)) {
+			if (__test_bit(cbase, &mctr_inhbt)) {
 				ctr_idx = cbase;
 				break;
 			}
@@ -647,7 +639,7 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 		return;
 
 	csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
-	csr_write(CSR_MCOUNTEREN, 7);
+	csr_write(CSR_MCOUNTEREN, -1);
 	pmu_reset_event_map(hartid);
 }
 

From 0c304b661965d81ba2194b54a0c71f4c2e5cab16 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:02 -0800
Subject: [PATCH 0892/1765] lib: sbi: Allow programmable counters to monitor
 cycle/instret events

A platform may use programmable counters for cycle/instret events.
The priv spec allows that provided that cycle/instret also report those
events in addition to the programmable counters. We should allow that
functionality in OpenSBI.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 include/sbi/sbi_pmu.h |  1 +
 lib/sbi/sbi_pmu.c     | 60 +++++++++++++++++++++++++++++++------------
 2 files changed, 45 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index b3010cc5c1c..f0185566cd6 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -26,6 +26,7 @@
 #define SBI_PMU_FW_CTR_MAX 16
 #define SBI_PMU_HW_CTR_MAX 32
 #define SBI_PMU_CTR_MAX	   (SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX)
+#define SBI_PMU_FIXED_CTR_MASK 0x07
 
 /** Initialize PMU */
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot);
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index e2373ff6d9f..818b87555e6 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -175,9 +175,7 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 	struct sbi_pmu_hw_event *event = &hw_event_map[num_hw_events];
 
 	/* The first two counters are reserved by priv spec */
-	if ((eidx_start == SBI_PMU_HW_CPU_CYCLES && cmap != 0x1) ||
-	    (eidx_start == SBI_PMU_HW_INSTRUCTIONS && cmap != 0x4) ||
-	    (eidx_start > SBI_PMU_HW_INSTRUCTIONS && (cmap & 0x07)))
+	if (eidx_start > SBI_PMU_HW_INSTRUCTIONS && (cmap & SBI_PMU_FIXED_CTR_MASK))
 		return SBI_EDENIED;
 
 	if (num_hw_events >= SBI_PMU_HW_EVENT_MAX - 1) {
@@ -188,8 +186,6 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 
 	event->start_idx = eidx_start;
 	event->end_idx = eidx_end;
-	event->counters = cmap;
-	event->select = select;
 
 	/* Sanity check */
 	for (i = 0; i < num_hw_events; i++) {
@@ -199,11 +195,19 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 		else
 			is_overlap = pmu_event_range_overlap(&hw_event_map[i], event);
 		if (is_overlap)
-			return SBI_EINVALID_ADDR;
+			goto reset_event;
 	}
+
+	event->counters = cmap;
+	event->select = select;
 	num_hw_events++;
 
 	return 0;
+
+reset_event:
+	event->start_idx = 0;
+	event->end_idx = 0;
+	return SBI_EINVAL;
 }
 
 /**
@@ -437,23 +441,37 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	return 0;
 }
 
+static int pmu_ctr_find_fixed_fw(unsigned long evt_idx_code)
+{
+	/* Non-programmables counters are enabled always. No need to do lookup */
+	if (evt_idx_code == SBI_PMU_HW_CPU_CYCLES)
+		return 0;
+	else if (evt_idx_code == SBI_PMU_HW_INSTRUCTIONS)
+		return 2;
+	else
+		return SBI_EINVAL;
+}
+
 static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned long flags,
 			   unsigned long event_idx, uint64_t data)
 {
 	unsigned long ctr_mask;
-	int i, ret = 0, ctr_idx = SBI_ENOTSUPP;
+	int i, ret = 0, fixed_ctr, ctr_idx = SBI_ENOTSUPP;
 	struct sbi_pmu_hw_event *temp;
 	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
-	int evt_idx_code = get_cidx_code(event_idx);
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (cbase > num_hw_ctrs)
 		return SBI_EINVAL;
 
-	/* Non-programmables counters are enabled always. No need to do lookup */
-	if (evt_idx_code == SBI_PMU_HW_CPU_CYCLES)
-		return 0;
-	else if (evt_idx_code == SBI_PMU_HW_INSTRUCTIONS)
-		return 2;
+	/**
+	 * If Sscof is present try to find the programmable counter for
+	 * cycle/instret as well.
+	 */
+	fixed_ctr = pmu_ctr_find_fixed_fw(event_idx);
+	if (fixed_ctr >= 0 &&
+	    !sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		return fixed_ctr;
 
 	for (i = 0; i < num_hw_events; i++) {
 		temp = &hw_event_map[i];
@@ -465,7 +483,9 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 		if ((event_idx == SBI_PMU_EVENT_RAW_IDX) && temp->select != data)
 			continue;
 
-		ctr_mask = temp->counters & (cmask << cbase);
+		/* Fixed counters should not be part of the search */
+		ctr_mask = temp->counters & (cmask << cbase) &
+			   (~SBI_PMU_FIXED_CTR_MASK);
 		for_each_set_bit_from(cbase, &ctr_mask, SBI_PMU_HW_CTR_MAX) {
 			if (__test_bit(cbase, &mctr_inhbt)) {
 				ctr_idx = cbase;
@@ -474,8 +494,16 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 		}
 	}
 
-	if (ctr_idx == SBI_ENOTSUPP)
-		return SBI_EFAIL;
+	if (ctr_idx == SBI_ENOTSUPP) {
+		/**
+		 * We can't find any programmable counters for cycle/instret.
+		 * Return the fixed counter as they are mandatory anyways.
+		 */
+		if (fixed_ctr >= 0)
+			return fixed_ctr;
+		else
+			return SBI_EFAIL;
+	}
 
 	ret = pmu_update_hw_mhpmevent(temp, ctr_idx, flags, event_idx, data);
 

From 1e147324f0f82a9982b65b1fa2e97e6b5d5e57fe Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:03 -0800
Subject: [PATCH 0893/1765] lib: sbi: Reset the mhpmevent value upon counter
 reset

The hardware solely relies on the event selector value in mhpmevent
to figure out what event to monitor using that counter. It should be
reset when counter reset happens.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_pmu.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 818b87555e6..1bb3e49412b 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -369,6 +369,20 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t fw_evt_code)
 	return 0;
 }
 
+static int pmu_reset_hw_mhpmevent(int ctr_idx)
+{
+	if (ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return SBI_EFAIL;
+#if __riscv_xlen == 32
+	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
+	csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, 0);
+#else
+	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
+#endif
+
+	return 0;
+}
+
 int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		     unsigned long flag)
 {
@@ -392,8 +406,10 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		else
 			ret = pmu_ctr_stop_hw(cbase);
 
-		if (!ret && (flag & SBI_PMU_STOP_FLAG_RESET))
+		if (flag & SBI_PMU_STOP_FLAG_RESET) {
 			active_events[hartid][cbase] = SBI_PMU_EVENT_IDX_INVALID;
+			pmu_reset_hw_mhpmevent(cbase);
+		}
 	}
 
 	return ret;

From b628cfd6a0c1e8bf858b33a62d6a6fa16f4db640 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:04 -0800
Subject: [PATCH 0894/1765] lib: sbi: Counter info width should be zero indexed

The mhpm bits represent the number of bits available in mhpmcounter
while counter width describes a zero indexed value. Fix the counter width
calculation.

Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 1bb3e49412b..da8a37b1d34 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -649,7 +649,7 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 		if (cidx == 0 || cidx == 2)
 			cinfo.width = 63;
 		else
-			cinfo.width = sbi_hart_mhpm_bits(scratch);
+			cinfo.width = sbi_hart_mhpm_bits(scratch) - 1;
 	} else {
 		/* it's a firmware counter */
 		cinfo.type = SBI_PMU_CTR_TYPE_FW;

From b28f07005cef03d5eea43a8a7954154b391871fe Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:05 -0800
Subject: [PATCH 0895/1765] lib: sbi: Enable PMU extension for platforms
 without mcountinhibit

Some platforms such as hifive unmatched doesn't implement mcountinhibit
csr. However, it has hardware events that can be monitored using 2
hpmcounter it has (i.e. mhpmcounter3 & mhpmcounter4).

Currently, PMU extension disabled if mcountinhibit is absent. That's not
really necessary as long as the supervisor OS keeps track of the delta
value of the counters. Without mcountinhibit, the delta value won't be
entirely accurate because the counters are freely running. However, that
should be fine to produce an approximate counter value which can help
performance analysis. Perf sampling won't work though as sscof extension
is not present in hifive unmatched.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 lib/sbi/sbi_ecall_pmu.c | 10 ++-------
 lib/sbi/sbi_pmu.c       | 50 ++++++++++++++++++++++++++++-------------
 lib/utils/fdt/fdt_pmu.c |  4 ++++
 3 files changed, 41 insertions(+), 23 deletions(-)

diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 39d3857680c..9ee9e81802e 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -74,14 +74,8 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 
 static int sbi_ecall_pmu_probe(unsigned long extid, unsigned long *out_val)
 {
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	/* SBI PMU extension is useless without mcount inhibit features */
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
-		*out_val = 1;
-	else
-		*out_val = 0;
-
+	/* PMU extension is always enabled */
+	*out_val = 1;
 	return 0;
 }
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index da8a37b1d34..e0303a7b19e 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -279,13 +279,21 @@ static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
 
 static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 {
-	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	unsigned long mctr_inhbt;
 
 	/* Make sure the counter index lies within the range and is not TM bit */
 	if (cidx > num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		goto skip_inhibit_update;
+
+	/*
+	 * Some of the hardware may not support mcountinhibit but perf stat
+	 * still can work if supervisor mode programs the initial value.
+	 */
+	mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	if (!__test_bit(cidx, &mctr_inhbt))
 		return SBI_EALREADY_STARTED;
 
@@ -295,6 +303,7 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 		pmu_ctr_enable_irq_hw(cidx);
 	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
+skip_inhibit_update:
 	if (ival_update)
 		pmu_ctr_write_hw(cidx, ival);
 
@@ -346,7 +355,13 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 
 static int pmu_ctr_stop_hw(uint32_t cidx)
 {
-	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	unsigned long mctr_inhbt;
+
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		return 0;
+
+	mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 
 	/* Make sure the counter index lies within the range and is not TM bit */
 	if (cidx > num_hw_ctrs || cidx == 1)
@@ -474,7 +489,8 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	unsigned long ctr_mask;
 	int i, ret = 0, fixed_ctr, ctr_idx = SBI_ENOTSUPP;
 	struct sbi_pmu_hw_event *temp;
-	unsigned long mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
+	unsigned long mctr_inhbt;
+	u32 hartid = current_hartid();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (cbase > num_hw_ctrs)
@@ -489,6 +505,8 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	    !sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
 		return fixed_ctr;
 
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	for (i = 0; i < num_hw_events; i++) {
 		temp = &hw_event_map[i];
 		if ((temp->start_idx > event_idx && event_idx < temp->end_idx) ||
@@ -503,10 +521,18 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 		ctr_mask = temp->counters & (cmask << cbase) &
 			   (~SBI_PMU_FIXED_CTR_MASK);
 		for_each_set_bit_from(cbase, &ctr_mask, SBI_PMU_HW_CTR_MAX) {
-			if (__test_bit(cbase, &mctr_inhbt)) {
-				ctr_idx = cbase;
-				break;
-			}
+			/**
+			 * Some of the platform may not support mcountinhibit.
+			 * Checking the active_events is enough for them
+			 */
+			if (active_events[hartid][cbase] != SBI_PMU_EVENT_IDX_INVALID)
+				continue;
+			/* If mcountinhibit is supported, the bit must be enabled */
+			if ((sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT)) &&
+			    !__test_bit(cbase, &mctr_inhbt))
+				continue;
+			/* We found a valid counter that is not started yet */
+			ctr_idx = cbase;
 		}
 	}
 
@@ -678,11 +704,9 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
 	u32 hartid = current_hartid();
 
-	/* SBI PMU is not supported if mcountinhibit is not available */
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
-		return;
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
-	csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 	csr_write(CSR_MCOUNTEREN, -1);
 	pmu_reset_event_map(hartid);
 }
@@ -692,10 +716,6 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 	const struct sbi_platform *plat;
 	u32 hartid = current_hartid();
 
-	/* SBI PMU is not supported if mcountinhibit is not available */
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
-		return 0;
-
 	if (cold_boot) {
 		plat = sbi_platform_ptr(scratch);
 		/* Initialize hw pmu events */
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 9ebf1c22501..09c83c816f2 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -9,6 +9,7 @@
  */
 
 #include <libfdt.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -40,6 +41,7 @@ uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
 int fdt_pmu_fixup(void *fdt)
 {
 	int pmu_offset;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (!fdt)
 		return SBI_EINVAL;
@@ -51,6 +53,8 @@ int fdt_pmu_fixup(void *fdt)
 	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmcounters");
 	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmevent");
 	fdt_delprop(fdt, pmu_offset, "pmu,raw-event-to-mhpmcounters");
+	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		fdt_delprop(fdt, pmu_offset, "interrupts-extended");
 
 	return 0;
 }

From 15906a3984f7c22b81802bcadaa4e517f4f685c8 Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:06 -0800
Subject: [PATCH 0896/1765] lib: utils: Rename the prefix in PMU DT properties

As per the DT schema rules, the prefix should be vendor. As the PMU
properties are generic for all vendors, change the prefix to riscv
instead of pmu.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 docs/pmu_support.md     | 12 ++++++------
 lib/utils/fdt/fdt_pmu.c | 12 ++++++------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 6533c99f899..a60b75cf9ef 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -31,7 +31,7 @@ bindings in details.
 * **compatible** (Mandatory) - The compatible string of SBI PMU device tree node.
 This DT property must have the value **riscv,pmu**.
 
-* **pmu,event-to-mhpmevent**(Optional) - It represents an ONE-to-ONE mapping
+* **riscv,event-to-mhpmevent**(Optional) - It represents an ONE-to-ONE mapping
 between a PMU event and the event selector value that platform expects to be
 written to the MHPMEVENTx CSR for that event. The mapping is encoded in a
 table format where each row represents an event. The first column represent the
@@ -39,7 +39,7 @@ event idx where the 2nd & 3rd column represent the event selector value that
 should be encoded in the expected value to be written in MHPMEVENTx.
 This property shouldn't encode any raw hardware event.
 
-* **pmu,event-to-mhpmcounters**(Optional) - It represents a MANY-to-MANY
+* **riscv,event-to-mhpmcounters**(Optional) - It represents a MANY-to-MANY
 mapping between a range of events and all the MHPMCOUNTERx in a bitmap format
 that can be used to monitor these range of events. The information is encoded in
 a table format where each row represent a certain range of events and
@@ -49,7 +49,7 @@ represent a bitmap of all the MHPMCOUNTERx. This property is mandatory if
 event-to-mhpmevent is present. Otherwise, it can be omitted. This property
 shouldn't encode any raw event.
 
-* **pmu,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY
+* **riscv,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY
 mapping between a raw event and all the MHPMCOUNTERx in a bitmap format that can
 be used to monitor that raw event. The information is encoded in a table format
 where each raw represent a specific raw event. The first column stores the
@@ -67,12 +67,12 @@ pmu {
 	compatible 			= "riscv,pmu";
 	interrupts 			= <0x100>;
 	interrupt-parent 			= <&plic>
-	pmu,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>,
-	pmu,event-to-mhpmcounters 	= <0x00001 0x00001 0x00000001>,
+	riscv,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>,
+	riscv,event-to-mhpmcounters 	= <0x00001 0x00001 0x00000001>,
 						  <0x00002 0x00002 0x00000004>,
 						  <0x00003 0x0000A 0x00000ff8>,
 						  <0x10000 0x10033 0x000ff000>,
-	pmu,raw-event-to-mhpmcounters 	= <0x0000 0x0002 0x00000f8>,
+	riscv,raw-event-to-mhpmcounters 	= <0x0000 0x0002 0x00000f8>,
 					  <0x0000 0x0003 0x00000ff0>,
 };
 
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 09c83c816f2..529ee420554 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -50,9 +50,9 @@ int fdt_pmu_fixup(void *fdt)
 	if (pmu_offset < 0)
 		return SBI_EFAIL;
 
-	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmcounters");
-	fdt_delprop(fdt, pmu_offset, "pmu,event-to-mhpmevent");
-	fdt_delprop(fdt, pmu_offset, "pmu,raw-event-to-mhpmcounters");
+	fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters");
+	fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmevent");
+	fdt_delprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters");
 	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
 		fdt_delprop(fdt, pmu_offset, "interrupts-extended");
 
@@ -75,7 +75,7 @@ int fdt_pmu_setup(void *fdt)
 	if (pmu_offset < 0)
 		return SBI_EFAIL;
 
-	event_ctr_map = fdt_getprop(fdt, pmu_offset, "pmu,event-to-mhpmcounters", &len);
+	event_ctr_map = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters", &len);
 	if (!event_ctr_map || len < 8)
 		return SBI_EFAIL;
 	len = len / (sizeof(u32) * 3);
@@ -86,7 +86,7 @@ int fdt_pmu_setup(void *fdt)
 		sbi_pmu_add_hw_event_counter_map(event_idx_start, event_idx_end, ctr_map);
 	}
 
-	event_val = fdt_getprop(fdt, pmu_offset, "pmu,event-to-mhpmevent", &len);
+	event_val = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmevent", &len);
 	if (!event_val || len < 8)
 		return SBI_EFAIL;
 	len = len / (sizeof(u32) * 3);
@@ -98,7 +98,7 @@ int fdt_pmu_setup(void *fdt)
 		hw_event_count++;
 	}
 
-	event_val = fdt_getprop(fdt, pmu_offset, "pmu,raw-event-to-mhpmcounters", &len);
+	event_val = fdt_getprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters", &len);
 	if (!event_val || len < 8)
 		return SBI_EFAIL;
 	len = len / (sizeof(u32) * 3);

From b8845e420453531f92414b91828c58d6d4f90fff Mon Sep 17 00:00:00 2001
From: Atish Patra <atish.patra@wdc.com>
Date: Mon, 8 Nov 2021 10:53:07 -0800
Subject: [PATCH 0897/1765] lib: sbi: Fix initial value mask while updating the
 counters

The first 32 bits of the initial value for the counter should be
preserved while updating the mhpmcounter for 32bit.

Fixes: 13d40f21d588e ("lib: sbi: Add PMU support")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index e0303a7b19e..a0eb3592967 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -270,7 +270,7 @@ static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
 {
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MCYCLE + cidx, 0);
-	csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFF);
+	csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFFFFFF);
 	csr_write_num(CSR_MCYCLEH + cidx, ival >> BITS_PER_LONG);
 #else
 	csr_write_num(CSR_MCYCLE + cidx, ival);

From 31fe5a7a3d80f0ceb25005740313cee1ef3fd4f6 Mon Sep 17 00:00:00 2001
From: Vasan VS <vasan.vs@gmail.com>
Date: Mon, 8 Nov 2021 10:24:56 +0530
Subject: [PATCH 0898/1765] lib: sbi: Fix PMP address bits detection

We should ensure that pmpcfg0.pmp0cfg is set to zero before using
pmpaddr0 CSR for detecting implemented PMP address bits.

Fixes: bf21632860b4 ("lib: sbi: Detect PMP granularity and number
of address bits")
Signed-off-by: Vasan VS <vasan.vs@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
---
 lib/sbi/sbi_hart.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a4e9bf59e47..76ed678f427 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -338,6 +338,10 @@ static unsigned long hart_pmp_get_allowed_addr(void)
 	unsigned long val = 0;
 	struct sbi_trap_info trap = {0};
 
+	csr_write_allowed(CSR_PMPCFG0, (ulong)&trap, 0);
+	if (trap.cause)
+		return 0;
+
 	csr_write_allowed(CSR_PMPADDR0, (ulong)&trap, PMP_ADDR_MASK);
 	if (!trap.cause) {
 		val = csr_read_allowed(CSR_PMPADDR0, (ulong)&trap);

From 94eba23376b5324f012e8e035a341d6d2d625b27 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:25 +0300
Subject: [PATCH 0899/1765] lib: utils/reset: add priority to gpio reset

Make gpio_system_reset_check return priority instead of just true/false.

Make default 128 priority for reset/shutdown.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 lib/utils/reset/fdt_reset_gpio.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 302035b3e77..d28b6f5ba95 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -77,7 +77,10 @@ static void gpio_reset_exec(struct gpio_reset *reset)
 
 static int gpio_system_poweroff_check(u32 type, u32 reason)
 {
-	return !!gpio_reset_get(FALSE, type);
+	if (gpio_reset_get(FALSE, type))
+		return 128;
+
+	return 0;
 }
 
 static void gpio_system_poweroff(u32 type, u32 reason)
@@ -93,7 +96,10 @@ static struct sbi_system_reset_device gpio_poweroff = {
 
 static int gpio_system_restart_check(u32 type, u32 reason)
 {
-	return !!gpio_reset_get(TRUE, type);
+	if (gpio_reset_get(TRUE, type))
+		return 128;
+
+	return 0;
 }
 
 static void gpio_system_restart(u32 type, u32 reason)

From 1d462e039782e49d2a96a776e50b7478d87b228d Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:26 +0300
Subject: [PATCH 0900/1765] lib: utils/reset: separate driver init func

Move driver init code to separate function, so it can be reused
elsewhere.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 include/sbi_utils/reset/fdt_reset.h |  5 ++++
 lib/utils/reset/fdt_reset.c         | 37 ++++++++++++++++-------------
 2 files changed, 26 insertions(+), 16 deletions(-)

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index 46167b99396..e7f73507e36 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -17,6 +17,11 @@ struct fdt_reset {
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
+/**
+ * fdt_reset_driver_init() - initialize reset driver based on the device-tree
+ */
+int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv);
+
 /**
  * fdt_reset_init() - initialize reset drivers based on the device-tree
  *
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index f4befa2d115..66281cbfc9e 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -29,26 +29,31 @@ static struct fdt_reset *reset_drivers[] = {
 	&fdt_reset_thead,
 };
 
-void fdt_reset_init(void)
+int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 {
-	int pos, noff, rc;
-	struct fdt_reset *drv;
+	int noff, rc = SBI_ENODEV;
 	const struct fdt_match *match;
-	void *fdt = fdt_get_address();
-
-	for (pos = 0; pos < array_size(reset_drivers); pos++) {
-		drv = reset_drivers[pos];
 
-		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-		if (noff < 0)
-			continue;
+	noff = fdt_find_match(fdt, -1, drv->match_table, &match);
+	if (noff < 0)
+		return SBI_ENODEV;
 
-		if (drv->init) {
-			rc = drv->init(fdt, noff, match);
-			if (rc && rc != SBI_ENODEV) {
-				sbi_printf("%s: %s init failed, %d\n",
-					   __func__, match->compatible, rc);
-			}
+	if (drv->init) {
+		rc = drv->init(fdt, noff, match);
+		if (rc && rc != SBI_ENODEV) {
+			sbi_printf("%s: %s init failed, %d\n",
+				   __func__, match->compatible, rc);
 		}
 	}
+
+	return rc;
+}
+
+void fdt_reset_init(void)
+{
+	int pos;
+	void *fdt = fdt_get_address();
+
+	for (pos = 0; pos < array_size(reset_drivers); pos++)
+		fdt_reset_driver_init(fdt, reset_drivers[pos]);
 }

From 2c964a2e159880c921a33f51f493a3a257d4bfce Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:27 +0300
Subject: [PATCH 0901/1765] lib: utils/i2c: Add generic I2C configuration
 library

Helper library to keep track of registered I2C adapters,
identified by dts offset, basic send/read functions and
adapter configuration (enable, set dividers, etc...).

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 include/sbi_utils/i2c/i2c.h | 85 +++++++++++++++++++++++++++++++++++++
 lib/utils/i2c/i2c.c         | 75 ++++++++++++++++++++++++++++++++
 lib/utils/i2c/objects.mk    | 10 +++++
 3 files changed, 170 insertions(+)
 create mode 100644 include/sbi_utils/i2c/i2c.h
 create mode 100644 lib/utils/i2c/i2c.c
 create mode 100644 lib/utils/i2c/objects.mk

diff --git a/include/sbi_utils/i2c/i2c.h b/include/sbi_utils/i2c/i2c.h
new file mode 100644
index 00000000000..5a70364144b
--- /dev/null
+++ b/include/sbi_utils/i2c/i2c.h
@@ -0,0 +1,85 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 YADRO
+ *
+ * Authors:
+ *   Nikita Shubin <n.shubin@yadro.com>
+ */
+
+#ifndef __I2C_H__
+#define __I2C_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
+
+/** Representation of a I2C adapter */
+struct i2c_adapter {
+	/** Pointer to I2C driver owning this I2C adapter */
+	void *driver;
+
+	/** Unique ID of the I2C adapter assigned by the driver */
+	int id;
+
+	/**
+	 * Send buffer to given address, register
+	 *
+	 * @return 0 on success and negative error code on failure
+	 */
+	int (*write)(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		    uint8_t *buffer, int len);
+
+	/**
+	 * Read buffer from given address, register
+	 *
+	 * @return 0 on success and negative error code on failure
+	 */
+	int (*read)(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		    uint8_t *buffer, int len);
+
+	/** List */
+	struct sbi_dlist node;
+};
+
+static inline struct i2c_adapter *to_i2c_adapter(struct sbi_dlist *node)
+{
+	return container_of(node, struct i2c_adapter, node);
+}
+
+/** Find a registered I2C adapter */
+struct i2c_adapter *i2c_adapter_find(int id);
+
+/** Register I2C adapter */
+int i2c_adapter_add(struct i2c_adapter *ia);
+
+/** Un-register I2C adapter */
+void i2c_adapter_remove(struct i2c_adapter *ia);
+
+/** Send to device on I2C adapter bus */
+int i2c_adapter_write(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		      uint8_t *buffer, int len);
+
+/** Read from device on I2C adapter bus */
+int i2c_adapter_read(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		     uint8_t *buffer, int len);
+
+static inline int i2c_adapter_reg_write(struct i2c_adapter *ia, uint8_t addr,
+				 uint8_t reg, uint8_t val)
+{
+	return i2c_adapter_write(ia, addr, reg, &val, 1);
+}
+
+static inline int i2c_adapter_reg_read(struct i2c_adapter *ia, uint8_t addr,
+				       uint8_t reg, uint8_t *val)
+{
+	uint8_t buf;
+	int ret = i2c_adapter_read(ia, addr, reg, &buf, 1);
+
+	if (ret)
+		return ret;
+
+	*val = buf;
+	return 0;
+}
+
+#endif
diff --git a/lib/utils/i2c/i2c.c b/lib/utils/i2c/i2c.c
new file mode 100644
index 00000000000..6be4e243b1f
--- /dev/null
+++ b/lib/utils/i2c/i2c.c
@@ -0,0 +1,75 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 YADRO
+ *
+ * Authors:
+ *   Nikita Shubin <n.shubin@yadro.com>
+ *
+ * derivate: lib/utils/gpio/gpio.c
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/i2c/i2c.h>
+
+static SBI_LIST_HEAD(i2c_adapters_list);
+
+struct i2c_adapter *i2c_adapter_find(int id)
+{
+	struct sbi_dlist *pos;
+
+	sbi_list_for_each(pos, &(i2c_adapters_list)) {
+		struct i2c_adapter *adap = to_i2c_adapter(pos);
+
+		if (adap->id == id)
+			return adap;
+	}
+
+	return NULL;
+}
+
+int i2c_adapter_add(struct i2c_adapter *ia)
+{
+	if (!ia)
+		return SBI_EINVAL;
+
+	if (i2c_adapter_find(ia->id))
+		return SBI_EALREADY;
+
+	sbi_list_add(&(ia->node), &(i2c_adapters_list));
+
+	return 0;
+}
+
+void i2c_adapter_remove(struct i2c_adapter *ia)
+{
+	if (!ia)
+		return;
+
+	sbi_list_del(&(ia->node));
+}
+
+int i2c_adapter_write(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		     uint8_t *buffer, int len)
+{
+	if (!ia)
+		return SBI_EINVAL;
+	if (!ia->write)
+		return SBI_ENOSYS;
+
+	return ia->write(ia, addr, reg, buffer, len);
+}
+
+
+int i2c_adapter_read(struct i2c_adapter *ia, uint8_t addr, uint8_t reg,
+		     uint8_t *buffer, int len)
+{
+	if (!ia)
+		return SBI_EINVAL;
+	if (!ia->read)
+		return SBI_ENOSYS;
+
+	return ia->read(ia, addr, reg, buffer, len);
+}
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
new file mode 100644
index 00000000000..894f618b5f7
--- /dev/null
+++ b/lib/utils/i2c/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2021 YADRO
+#
+# Authors:
+#   Nikita Shubin <n.shubin@yadro.com>
+#
+
+libsbiutils-objs-y += i2c/i2c.o

From 6ca6bcafb74d2dc43a5082c1b7caf6b2aa453c2d Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:28 +0300
Subject: [PATCH 0902/1765] lib: utils/i2c: Add simple FDT based I2C framework

FDT based I2C framework on the top of I2C library.

The drivers are probed on demand by fdt_i2c_adapter_get
function.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 include/sbi_utils/i2c/fdt_i2c.h | 26 ++++++++++
 lib/utils/i2c/fdt_i2c.c         | 87 +++++++++++++++++++++++++++++++++
 lib/utils/i2c/objects.mk        |  1 +
 3 files changed, 114 insertions(+)
 create mode 100644 include/sbi_utils/i2c/fdt_i2c.h
 create mode 100644 lib/utils/i2c/fdt_i2c.c

diff --git a/include/sbi_utils/i2c/fdt_i2c.h b/include/sbi_utils/i2c/fdt_i2c.h
new file mode 100644
index 00000000000..c6e3339906a
--- /dev/null
+++ b/include/sbi_utils/i2c/fdt_i2c.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 YADRO
+ *
+ * Authors:
+ *   Nikita Shubin <n.shubin@yadro.com>
+ */
+
+#ifndef __FDT_I2C_H__
+#define __FDT_I2C_H__
+
+#include <sbi_utils/i2c/i2c.h>
+
+/** FDT based I2C adapter driver */
+struct fdt_i2c_adapter {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff,
+		    const struct fdt_match *match);
+};
+
+/** Get I2C adapter identified by nodeoff */
+int fdt_i2c_adapter_get(void *fdt, int nodeoff,
+			struct i2c_adapter **out_adapter);
+
+#endif
diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
new file mode 100644
index 00000000000..4f916491ab7
--- /dev/null
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -0,0 +1,87 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 YADRO
+ *
+ * Authors:
+ *   Nikita Shubin <n.shubin@yadro.com>
+ *
+ * derivate: lib/utils/gpio/fdt_gpio.c
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
+
+#include <sbi/sbi_console.h>
+
+static struct fdt_i2c_adapter *i2c_adapter_drivers[] = {
+};
+
+static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
+{
+	int pos, rc;
+	struct fdt_i2c_adapter *drv;
+	const struct fdt_match *match;
+
+	/* Try all I2C drivers one-by-one */
+	for (pos = 0; pos < array_size(i2c_adapter_drivers); pos++) {
+		drv = i2c_adapter_drivers[pos];
+		match = fdt_match_node(fdt, nodeoff, drv->match_table);
+		if (match && drv->init) {
+			rc = drv->init(fdt, nodeoff, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			if (rc)
+				return rc;
+			return 0;
+		}
+	}
+
+	return SBI_ENOSYS;
+}
+
+static int fdt_i2c_adapter_find(void *fdt, int nodeoff,
+				struct i2c_adapter **out_adapter)
+{
+	int rc;
+	struct i2c_adapter *adapter = i2c_adapter_find(nodeoff);
+
+	if (!adapter) {
+		/* I2C adapter not found so initialize matching driver */
+		rc = fdt_i2c_adapter_init(fdt, nodeoff);
+		if (rc)
+			return rc;
+
+		/* Try to find I2C adapter again */
+		adapter = i2c_adapter_find(nodeoff);
+		if (!adapter)
+			return SBI_ENOSYS;
+	}
+
+	if (out_adapter)
+		*out_adapter = adapter;
+
+	return 0;
+}
+
+int fdt_i2c_adapter_get(void *fdt, int nodeoff,
+			struct i2c_adapter **out_adapter)
+{
+	int rc;
+	struct i2c_adapter *adapter;
+
+	if (!fdt || (nodeoff < 0) || !out_adapter)
+		return SBI_EINVAL;
+
+	rc = fdt_i2c_adapter_find(fdt, nodeoff, &adapter);
+	if (rc)
+		return rc;
+
+	*out_adapter = adapter;
+
+	return 0;
+}
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index 894f618b5f7..d4e1c1bf713 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -8,3 +8,4 @@
 #
 
 libsbiutils-objs-y += i2c/i2c.o
+libsbiutils-objs-y += i2c/fdt_i2c.o

From 13a1158d24f6462ecf17d63e0c2325994180deac Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:29 +0300
Subject: [PATCH 0903/1765] lib: utils/i2c: Add minimal SiFive I2C driver

Minimum SiFive I2C driver to read/send bytes over I2C bus.

This allows querying information and perform operation of onboard PMIC,
as well as power-off and reset.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 lib/utils/i2c/fdt_i2c.c        |   3 +
 lib/utils/i2c/fdt_i2c_sifive.c | 277 +++++++++++++++++++++++++++++++++
 lib/utils/i2c/objects.mk       |   1 +
 3 files changed, 281 insertions(+)
 create mode 100644 lib/utils/i2c/fdt_i2c_sifive.c

diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
index 4f916491ab7..be8e50664d6 100644
--- a/lib/utils/i2c/fdt_i2c.c
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -18,7 +18,10 @@
 
 #include <sbi/sbi_console.h>
 
+extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
+
 static struct fdt_i2c_adapter *i2c_adapter_drivers[] = {
+	&fdt_i2c_adapter_sifive
 };
 
 static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
new file mode 100644
index 00000000000..871241afa8d
--- /dev/null
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -0,0 +1,277 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 YADRO
+ *
+ * Authors:
+ *   Nikita Shubin <n.shubin@yadro.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_timer.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
+
+#define SIFIVE_I2C_ADAPTER_MAX	2
+
+#define SIFIVE_I2C_PRELO	0x00
+#define SIFIVE_I2C_PREHI	0x04
+#define SIFIVE_I2C_CTR		0x08
+#define SIFIVE_I2C_TXR		0x00c
+#define SIFIVE_I2C_RXR		SIFIVE_I2C_TXR
+#define SIFIVE_I2C_CR		0x010
+#define SIFIVE_I2C_SR		SIFIVE_I2C_CR
+
+#define SIFIVE_I2C_CTR_IEN	(1 << 6)
+#define SIFIVE_I2C_CTR_EN	(1 << 7)
+
+#define SIFIVE_I2C_CMD_IACK	(1 << 0)
+#define SIFIVE_I2C_CMD_ACK	(1 << 3)
+#define SIFIVE_I2C_CMD_WR	(1 << 4)
+#define SIFIVE_I2C_CMD_RD	(1 << 5)
+#define SIFIVE_I2C_CMD_STO	(1 << 6)
+#define SIFIVE_I2C_CMD_STA	(1 << 7)
+
+#define SIFIVE_I2C_STATUS_IF	(1 << 0)
+#define SIFIVE_I2C_STATUS_TIP	(1 << 1)
+#define SIFIVE_I2C_STATUS_AL	(1 << 5)
+#define SIFIVE_I2C_STATUS_BUSY	(1 << 6)
+#define SIFIVE_I2C_STATUS_RXACK	(1 << 7)
+
+#define SIFIVE_I2C_WRITE_BIT	(0 << 0)
+#define SIFIVE_I2C_READ_BIT	(1 << 0)
+
+struct sifive_i2c_adapter {
+	unsigned long addr;
+	struct i2c_adapter adapter;
+};
+
+static unsigned int sifive_i2c_adapter_count;
+static struct sifive_i2c_adapter
+	sifive_i2c_adapter_array[SIFIVE_I2C_ADAPTER_MAX];
+
+extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
+
+static inline void sifive_i2c_setreg(struct sifive_i2c_adapter *adap,
+				     uint8_t reg, uint8_t value)
+{
+	writel(value, (volatile void *)adap->addr + reg);
+}
+
+static inline uint8_t sifive_i2c_getreg(struct sifive_i2c_adapter *adap,
+					uint8_t reg)
+{
+	return readl((volatile void *)adap->addr + reg);
+}
+
+static int sifive_i2c_adapter_rxack(struct sifive_i2c_adapter *adap)
+{
+	uint8_t val = sifive_i2c_getreg(adap, SIFIVE_I2C_SR);
+
+	if (val & SIFIVE_I2C_STATUS_RXACK)
+		return SBI_EIO;
+
+	return 0;
+}
+
+static int sifive_i2c_adapter_poll(struct sifive_i2c_adapter *adap,
+				   uint32_t mask)
+{
+	unsigned int timeout = 1; // [msec]
+	int count = 0;
+	uint8_t val;
+
+	sbi_timer_udelay(80); // worst case if bus speed is 100 kHz
+
+	do {
+		val = sifive_i2c_getreg(adap, SIFIVE_I2C_SR);
+		if (!(val & mask))
+			return 0;
+
+		sbi_timer_udelay(1);
+		count += 1;
+		if (count == (timeout * 1000))
+			return SBI_ETIMEDOUT;
+	} while (1);
+}
+
+#define sifive_i2c_adapter_poll_tip(adap)	\
+	sifive_i2c_adapter_poll(adap, SIFIVE_I2C_STATUS_TIP)
+#define sifive_i2c_adapter_poll_busy(adap)	\
+sifive_i2c_adapter_poll(adap, SIFIVE_I2C_STATUS_BUSY)
+
+static int sifive_i2c_adapter_start(struct sifive_i2c_adapter *adap,
+				    uint8_t addr, uint8_t bit)
+{
+	uint8_t val = (addr << 1) | bit;
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, val);
+	val = SIFIVE_I2C_CMD_STA | SIFIVE_I2C_CMD_WR | SIFIVE_I2C_CMD_IACK;
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, val);
+
+	return sifive_i2c_adapter_poll_tip(adap);
+}
+
+static int sifive_i2c_adapter_write(struct i2c_adapter *ia, uint8_t addr,
+				    uint8_t reg, uint8_t *buffer, int len)
+{
+	struct sifive_i2c_adapter *adap =
+		container_of(ia, struct sifive_i2c_adapter, adapter);
+	int rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_WRITE_BIT);
+
+	if (rc)
+		return rc;
+
+	rc = sifive_i2c_adapter_rxack(adap);
+	if (rc)
+		return rc;
+
+	/* set register address */
+	sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, reg);
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
+				SIFIVE_I2C_CMD_IACK);
+	rc = sifive_i2c_adapter_poll_tip(adap);
+	if (rc)
+		return rc;
+
+	rc = sifive_i2c_adapter_rxack(adap);
+	if (rc)
+		return rc;
+
+	/* set value */
+	while (len) {
+		sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, *buffer);
+		sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
+						       SIFIVE_I2C_CMD_IACK);
+
+		rc = sifive_i2c_adapter_poll_tip(adap);
+		if (rc)
+			return rc;
+
+		rc = sifive_i2c_adapter_rxack(adap);
+		if (rc)
+			return rc;
+
+		buffer++;
+		len--;
+	}
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_STO |
+					       SIFIVE_I2C_CMD_IACK);
+
+	/* poll BUSY instead of ACK*/
+	rc = sifive_i2c_adapter_poll_busy(adap);
+	if (rc)
+		return rc;
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_IACK);
+
+	return 0;
+}
+
+static int sifive_i2c_adapter_read(struct i2c_adapter *ia, uint8_t addr,
+				   uint8_t reg, uint8_t *buffer, int len)
+{
+	struct sifive_i2c_adapter *adap =
+		container_of(ia, struct sifive_i2c_adapter, adapter);
+	int rc;
+
+	rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_WRITE_BIT);
+	if (rc)
+		return rc;
+
+	rc = sifive_i2c_adapter_rxack(adap);
+	if (rc)
+		return rc;
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_TXR, reg);
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_WR |
+					       SIFIVE_I2C_CMD_IACK);
+
+	rc = sifive_i2c_adapter_poll_tip(adap);
+	if (rc)
+		return rc;
+
+	rc = sifive_i2c_adapter_rxack(adap);
+	if (rc)
+		return rc;
+
+	/* setting addr with high 0 bit */
+	rc = sifive_i2c_adapter_start(adap, addr, SIFIVE_I2C_READ_BIT);
+	if (rc)
+		return rc;
+
+	rc = sifive_i2c_adapter_rxack(adap);
+	if (rc)
+		return rc;
+
+	while (len) {
+		if (len == 1)
+			sifive_i2c_setreg(adap, SIFIVE_I2C_CR,
+					  SIFIVE_I2C_CMD_ACK |
+					  SIFIVE_I2C_CMD_RD |
+					  SIFIVE_I2C_CMD_IACK);
+		else
+			sifive_i2c_setreg(adap, SIFIVE_I2C_CR,
+					  SIFIVE_I2C_CMD_RD |
+					  SIFIVE_I2C_CMD_IACK);
+
+		rc = sifive_i2c_adapter_poll_tip(adap);
+		if (rc)
+			return rc;
+
+		*buffer = sifive_i2c_getreg(adap, SIFIVE_I2C_RXR);
+		buffer++;
+		len--;
+	}
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_STO |
+					       SIFIVE_I2C_CMD_IACK);
+	rc = sifive_i2c_adapter_poll_busy(adap);
+	if (rc)
+		return rc;
+
+	sifive_i2c_setreg(adap, SIFIVE_I2C_CR, SIFIVE_I2C_CMD_IACK);
+
+	return 0;
+}
+
+static int sifive_i2c_init(void *fdt, int nodeoff,
+			    const struct fdt_match *match)
+{
+	int rc;
+	struct sifive_i2c_adapter *adapter;
+	uint64_t addr;
+
+	if (sifive_i2c_adapter_count >= SIFIVE_I2C_ADAPTER_MAX)
+		return SBI_ENOSPC;
+
+	adapter = &sifive_i2c_adapter_array[sifive_i2c_adapter_count];
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	adapter->addr = addr;
+	adapter->adapter.driver = &fdt_i2c_adapter_sifive;
+	adapter->adapter.id = nodeoff;
+	adapter->adapter.write = sifive_i2c_adapter_write;
+	adapter->adapter.read = sifive_i2c_adapter_read;
+	rc = i2c_adapter_add(&adapter->adapter);
+	if (rc)
+		return rc;
+
+	sifive_i2c_adapter_count++;
+	return 0;
+}
+
+static const struct fdt_match sifive_i2c_match[] = {
+	{ .compatible = "sifive,i2c0" },
+	{ },
+};
+
+struct fdt_i2c_adapter fdt_i2c_adapter_sifive = {
+	.match_table = sifive_i2c_match,
+	.init = sifive_i2c_init,
+};
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index d4e1c1bf713..a748c4807b6 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -9,3 +9,4 @@
 
 libsbiutils-objs-y += i2c/i2c.o
 libsbiutils-objs-y += i2c/fdt_i2c.o
+libsbiutils-objs-y += i2c/fdt_i2c_sifive.o

From f3744967c6b595c0caba164468b4b32b9c027dfd Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 10 Nov 2021 12:42:30 +0300
Subject: [PATCH 0904/1765] platform: sifive_fu740: add platform reset driver

da9063 PMIC can be used to reset/shutdown the
Sifive Unmatched board.

shutdown is done simply by writing SHUTDOWN bit to
DA9063_REG_CONTROL_F register.

reset via setting WAKEUP bit in DA9063_REG_CONTROL_F
register followed by masking POWER and POWER1 domains
and setting STANDBY bit in DA9063_REG_CONTROL_A,
originally discovered by Alexandre Ghiti on linux-riscv
maillists.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 platform/generic/sifive_fu740.c | 194 ++++++++++++++++++++++++++++++++
 1 file changed, 194 insertions(+)

diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive_fu740.c
index c8325d3b070..31521526cb6 100644
--- a/platform/generic/sifive_fu740.c
+++ b/platform/generic/sifive_fu740.c
@@ -2,14 +2,191 @@
  * SPDX-License-Identifier: BSD-2-Clause
  *
  * Copyright (c) 2021 SiFive
+ * Copyright (c) 2021 YADRO
  *
  * Authors:
  *   David Abdurachmanov <david.abdurachmanov@sifive.com>
+ *   Nikita Shubin <n.shubin@yadro.com>
  */
 
 #include <platform_override.h>
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_console.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
+
+#define DA9063_REG_PAGE_CON		0x00
+#define DA9063_REG_CONTROL_A		0x0e
+#define DA9063_REG_CONTROL_F		0x13
+#define DA9063_REG_DEVICE_ID		0x81
+
+#define DA9063_CONTROL_A_M_POWER1_EN	(1 << 6)
+#define DA9063_CONTROL_A_M_POWER_EN	(1 << 5)
+#define DA9063_CONTROL_A_STANDBY	(1 << 3)
+
+#define DA9063_CONTROL_F_WAKEUP	(1 << 2)
+#define DA9063_CONTROL_F_SHUTDOWN	(1 << 1)
+
+#define PMIC_CHIP_ID_DA9063		0x61
+
+static struct {
+	struct i2c_adapter *adapter;
+	uint32_t reg;
+} da9063;
+
+static int da9063_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		return 1;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return 255;
+	}
+
+	return 0;
+}
+
+static inline int da9063_sanity_check(struct i2c_adapter *adap, uint32_t reg)
+{
+	uint8_t val;
+	int rc = i2c_adapter_reg_write(adap, reg, DA9063_REG_PAGE_CON, 0x02);
+
+	if (rc)
+		return rc;
+
+	/* check set page*/
+	rc = i2c_adapter_reg_read(adap, reg, 0x0, &val);
+	if (rc)
+		return rc;
+
+	if (val != 0x02)
+		return SBI_ENODEV;
+
+	/* read and check device id */
+	rc = i2c_adapter_reg_read(adap, reg, DA9063_REG_DEVICE_ID, &val);
+	if (rc)
+		return rc;
+
+	if (val != PMIC_CHIP_ID_DA9063)
+		return SBI_ENODEV;
+
+	return 0;
+}
+
+static inline int da9063_shutdown(struct i2c_adapter *adap, uint32_t reg)
+{
+	int rc = i2c_adapter_reg_write(adap, da9063.reg,
+					DA9063_REG_PAGE_CON, 0x00);
+
+	if (rc)
+		return rc;
+
+	return i2c_adapter_reg_write(adap, da9063.reg,
+				     DA9063_REG_CONTROL_F,
+				     DA9063_CONTROL_F_SHUTDOWN);
+}
+
+static inline int da9063_reset(struct i2c_adapter *adap, uint32_t reg)
+{
+	int rc = i2c_adapter_reg_write(adap, da9063.reg,
+					DA9063_REG_PAGE_CON, 0x00);
+
+	if (rc)
+		return rc;
+
+	rc = i2c_adapter_reg_write(adap, da9063.reg,
+				   DA9063_REG_CONTROL_F,
+				   DA9063_CONTROL_F_WAKEUP);
+	if (rc)
+		return rc;
+
+	return i2c_adapter_reg_write(adap, da9063.reg,
+				DA9063_REG_CONTROL_A,
+				DA9063_CONTROL_A_M_POWER1_EN |
+				DA9063_CONTROL_A_M_POWER_EN |
+				DA9063_CONTROL_A_STANDBY);
+}
+
+static void da9063_system_reset(u32 type, u32 reason)
+{
+	struct i2c_adapter *adap = da9063.adapter;
+	uint32_t reg = da9063.reg;
+	int rc;
+
+	if (adap) {
+		/* sanity check */
+		rc = da9063_sanity_check(adap, reg);
+		if (rc) {
+			sbi_printf("%s: chip is not da9063 PMIC\n", __func__);
+			goto skip_reset;
+		}
+
+		switch (type) {
+		case SBI_SRST_RESET_TYPE_SHUTDOWN:
+			da9063_shutdown(adap, reg);
+			break;
+		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+			da9063_reset(adap, reg);
+			break;
+		}
+	}
+
+skip_reset:
+	sbi_hart_hang();
+}
+
+static struct sbi_system_reset_device da9063_reset_i2c = {
+	.name = "da9063-reset",
+	.system_reset_check = da9063_system_reset_check,
+	.system_reset = da9063_system_reset
+};
+
+static int da9063_reset_init(void *fdt, int nodeoff,
+			     const struct fdt_match *match)
+{
+	int rc, i2c_bus;
+	struct i2c_adapter *adapter;
+	uint64_t addr;
+
+	/* we are dlg,da9063 node */
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	da9063.reg = addr;
+
+	/* find i2c bus parent node */
+	i2c_bus = fdt_parent_offset(fdt, nodeoff);
+	if (i2c_bus < 0)
+		return i2c_bus;
+
+	/* i2c adapter get */
+	rc = fdt_i2c_adapter_get(fdt, i2c_bus, &adapter);
+	if (rc)
+		return rc;
+
+	da9063.adapter = adapter;
+
+	sbi_system_reset_add_device(&da9063_reset_i2c);
+
+	return 0;
+}
+
+static const struct fdt_match da9063_reset_match[] = {
+	{ .compatible = "dlg,da9063", .data = (void *)TRUE },
+	{ },
+};
+
+struct fdt_reset fdt_reset_da9063 = {
+	.match_table = da9063_reset_match,
+	.init = da9063_reset_init,
+};
 
 static u64 sifive_fu740_tlbr_flush_limit(const struct fdt_match *match)
 {
@@ -23,6 +200,22 @@ static u64 sifive_fu740_tlbr_flush_limit(const struct fdt_match *match)
 	return 0;
 }
 
+static int sifive_fu740_final_init(bool cold_boot,
+				   const struct fdt_match *match)
+{
+	int rc;
+	void *fdt = fdt_get_address();
+
+	if (cold_boot) {
+		rc = fdt_reset_driver_init(fdt, &fdt_reset_da9063);
+		if (rc)
+			sbi_printf("%s: failed to find da9063 for reset\n",
+				   __func__);
+	}
+
+	return 0;
+}
+
 static const struct fdt_match sifive_fu740_match[] = {
 	{ .compatible = "sifive,fu740" },
 	{ .compatible = "sifive,fu740-c000" },
@@ -33,4 +226,5 @@ static const struct fdt_match sifive_fu740_match[] = {
 const struct platform_override sifive_fu740 = {
 	.match_table = sifive_fu740_match,
 	.tlbr_flush_limit = sifive_fu740_tlbr_flush_limit,
+	.final_init = sifive_fu740_final_init,
 };

From d335a178d8cfdf2ed13af70fe385f7e38162e171 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 8 Nov 2021 17:43:03 +0800
Subject: [PATCH 0905/1765] lib: sbi: clear pmpcfg.A before setting in
 pmp_set()

We should clear A bits in prot variable before enabling A_NA4 or A_NAPOT.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 25b40cfa1a9..1642ac6e43e 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -268,6 +268,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 		return SBI_ENOTSUPP;
 
 	/* encode PMP config */
+	prot &= ~PMP_A;
 	prot |= (log2len == PMP_SHIFT) ? PMP_A_NA4 : PMP_A_NAPOT;
 	cfgmask = ~(0xffUL << pmpcfg_shift);
 	pmpcfg	= (csr_read_num(pmpcfg_csr) & cfgmask);

From 52af6e4b52d0ea1d687121bfba0954c2621d2629 Mon Sep 17 00:00:00 2001
From: Gabriel Somlo <gsomlo@gmail.com>
Date: Tue, 16 Nov 2021 14:17:04 -0500
Subject: [PATCH 0906/1765] lib: utils: Add LiteX UART support

Add support for the UART provided by the LiteX SoC
framework (https://github.com/enjoy-digital/litex),
based on its FDT info (described in the Linux tree at
Documentation/devicetree/bindings/serial/litex,liteuart.yaml).

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi_utils/serial/litex-uart.h | 17 ++++++++
 lib/utils/serial/fdt_serial.c         |  2 +
 lib/utils/serial/fdt_serial_litex.c   | 39 +++++++++++++++++
 lib/utils/serial/litex-uart.c         | 63 +++++++++++++++++++++++++++
 lib/utils/serial/objects.mk           |  2 +
 5 files changed, 123 insertions(+)
 create mode 100644 include/sbi_utils/serial/litex-uart.h
 create mode 100644 lib/utils/serial/fdt_serial_litex.c
 create mode 100644 lib/utils/serial/litex-uart.c

diff --git a/include/sbi_utils/serial/litex-uart.h b/include/sbi_utils/serial/litex-uart.h
new file mode 100644
index 00000000000..91ab6447275
--- /dev/null
+++ b/include/sbi_utils/serial/litex-uart.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Gabriel Somlo
+ *
+ * Authors:
+ *   Gabriel Somlo <gsomlo@gmail.com>
+ */
+
+#ifndef __SERIAL_LITEX_UART_H__
+#define __SERIAL_LITEX_UART_H__
+
+#include <sbi/sbi_types.h>
+
+int litex_uart_init(unsigned long base);
+
+#endif
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index cedda04a6c5..f73d26a16df 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -15,6 +15,7 @@
 
 extern struct fdt_serial fdt_serial_uart8250;
 extern struct fdt_serial fdt_serial_sifive;
+extern struct fdt_serial fdt_serial_litex;
 extern struct fdt_serial fdt_serial_htif;
 extern struct fdt_serial fdt_serial_shakti;
 extern struct fdt_serial fdt_serial_gaisler;
@@ -22,6 +23,7 @@ extern struct fdt_serial fdt_serial_gaisler;
 static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_uart8250,
 	&fdt_serial_sifive,
+	&fdt_serial_litex,
 	&fdt_serial_htif,
 	&fdt_serial_shakti,
 	&fdt_serial_gaisler
diff --git a/lib/utils/serial/fdt_serial_litex.c b/lib/utils/serial/fdt_serial_litex.c
new file mode 100644
index 00000000000..3b3b306bed9
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_litex.c
@@ -0,0 +1,39 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Gabriel Somlo
+ *
+ * Authors:
+ *   Gabriel Somlo <gsomlo@gmail.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/litex-uart.h>
+
+static int serial_litex_init(void *fdt, int nodeoff,
+			     const struct fdt_match *match)
+{
+	uint64_t reg_addr, reg_size;
+	int rc;
+
+	if (nodeoff < 0 || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+
+	return litex_uart_init(reg_addr);
+}
+
+static const struct fdt_match serial_litex_match[] = {
+	{ .compatible = "litex,liteuart" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_litex = {
+	.match_table = serial_litex_match,
+	.init = serial_litex_init
+};
diff --git a/lib/utils/serial/litex-uart.c b/lib/utils/serial/litex-uart.c
new file mode 100644
index 00000000000..f843bf3836d
--- /dev/null
+++ b/lib/utils/serial/litex-uart.c
@@ -0,0 +1,63 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Gabriel Somlo
+ *
+ * Authors:
+ *   Gabriel Somlo <gsomlo@gmail.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/litex-uart.h>
+
+/* clang-format off */
+
+#define UART_REG_RXTX		0
+#define UART_REG_TXFULL		1
+#define UART_REG_RXEMPTY	2
+#define UART_REG_EV_STATUS	3
+#define UART_REG_EV_PENDING	4
+#define UART_REG_EV_ENABLE	5
+
+/* clang-format on */
+
+static volatile u32 *uart_base;
+
+static u8 get_reg(u8 reg)
+{
+	return readb(uart_base + reg);
+}
+
+static void set_reg(u8 reg, u8 val)
+{
+	writeb(val, uart_base + reg);
+}
+
+static void litex_uart_putc(char ch)
+{
+	while (get_reg(UART_REG_TXFULL));
+	set_reg(UART_REG_RXTX, ch);
+}
+
+static int litex_uart_getc(void)
+{
+	if (get_reg(UART_REG_RXEMPTY))
+		return -1;
+	else
+		return get_reg(UART_REG_RXTX);
+}
+
+static struct sbi_console_device litex_console = {
+	.name = "litex_uart",
+	.console_putc = litex_uart_putc,
+	.console_getc = litex_uart_getc
+};
+
+int litex_uart_init(unsigned long base)
+{
+	uart_base = (volatile u32 *)base;
+	set_reg(UART_REG_EV_ENABLE, 0); /* UART in polling mode: disable IRQ */
+	sbi_console_set_device(&litex_console);
+	return 0;
+}
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 9fb09027438..4f751ba712d 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -12,8 +12,10 @@ libsbiutils-objs-y += serial/fdt_serial_gaisler.o
 libsbiutils-objs-y += serial/fdt_serial_htif.o
 libsbiutils-objs-y += serial/fdt_serial_shakti.o
 libsbiutils-objs-y += serial/fdt_serial_sifive.o
+libsbiutils-objs-y += serial/fdt_serial_litex.o
 libsbiutils-objs-y += serial/fdt_serial_uart8250.o
 libsbiutils-objs-y += serial/gaisler-uart.o
 libsbiutils-objs-y += serial/shakti-uart.o
 libsbiutils-objs-y += serial/sifive-uart.o
+libsbiutils-objs-y += serial/litex-uart.o
 libsbiutils-objs-y += serial/uart8250.o

From 22d556d26809775e2ac19251e5df9075434ee66e Mon Sep 17 00:00:00 2001
From: Vagrant Cascadian <vagrant@debian.org>
Date: Fri, 19 Nov 2021 11:37:21 -0800
Subject: [PATCH 0907/1765] lib: sbi: Fix spelling of "address" in sbi_domain.c

Fix a spelling typo in error print.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 33d7ad560a8..b60915c3b84 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -295,7 +295,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	/* Check next address and next mode*/
 	if (!sbi_domain_check_addr(dom, dom->next_addr, dom->next_mode,
 				   SBI_DOMAIN_EXECUTE)) {
-		sbi_printf("%s: %s next booting stage addres 0x%lx can't "
+		sbi_printf("%s: %s next booting stage address 0x%lx can't "
 			   "execute\n", __func__, dom->name, dom->next_addr);
 		return SBI_EINVAL;
 	}

From 7a22c780df587ca298b3566fe5d0fd396746decd Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Thu, 25 Nov 2021 13:00:16 +0300
Subject: [PATCH 0908/1765] lib: sbi: Fix missing space

Fix missing space in sbi_hart_pmp_configure
error printing.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang w <wxjstz@126.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 76ed678f427..d9a15d994a6 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -226,7 +226,7 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
 		else {
 			sbi_printf("Can not configure pmp for domain %s", dom->name);
-			sbi_printf("because memory region address %lx or size %lx is not in range\n",
+			sbi_printf(" because memory region address %lx or size %lx is not in range\n",
 				    reg->base, reg->order);
 		}
 	}

From 7e777069664465cb36bb14801c7e17c143911f9b Mon Sep 17 00:00:00 2001
From: Dong Du <Dd_nirvana@sjtu.edu.cn>
Date: Thu, 25 Nov 2021 18:38:17 +0800
Subject: [PATCH 0909/1765] lib: sbi: Resolve the uninitialized complaint in
 sbi_pmu

A recent commit (b28f0700) turns to read from CSR_MCOUNTINHIBIT after
checking the SBI_HART_HAS_MCOUNTINHIBIT HART feature, which leaves the
mctr_inhbt uninitialized in pmu_ctr_find_hw().
As a result, compiler will complain:
error: 'mctr_inhbt' may be used uninitialized in this function.

This commit resolves the issue by assigning an initial value to mctr_inhbt.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/sbi_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index a0eb3592967..5950a200163 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -489,7 +489,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	unsigned long ctr_mask;
 	int i, ret = 0, fixed_ctr, ctr_idx = SBI_ENOTSUPP;
 	struct sbi_pmu_hw_event *temp;
-	unsigned long mctr_inhbt;
+	unsigned long mctr_inhbt = 0;
 	u32 hartid = current_hartid();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 

From 14faee6916bc973b9fdb816c5f4a45096e3f645a Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Sun, 21 Nov 2021 17:30:22 +0000
Subject: [PATCH 0910/1765] lib: sbi: Improve fatal error handling

BUG and BUG_ON are not informative and are rather lazy interfaces, only
telling the user that something went wrong in a given function, but not
what, requiring the user to find the sources corresponding to their
firmware (which may not be available) and figure out how that BUG(_ON)
was hit. Even SBI_ASSERT in its current form, which does include the
condition that triggered it in the output, isn't necessarily very
informative. In some cases, the error may be fixable by the user, but
they need to know the problem in order to have any hope of fixing it.
It's also a nuisance for developers, whose development trees may have
changed significantly since the release in question being used, and so
line numbers can make it harder for them to understand which error case
a user has hit.

This patch introduces a new sbi_panic function which is printf-like,
allowing detailed error messages to be printed to the console. BUG and
BUG_ON are removed, since the former is just a worse form of sbi_panic
and the latter is a worse version of SBI_ASSERT. Finally, SBI_ASSERT is
augmented to take a set of arguments to pass to sbi_panic on failure,
used like so (sbi_boot_print_hart's current error case, which currently
manually calls sbi_printf and sbi_hart_hang):

  SBI_ASSERT(xlen >= 1, ("Error %d getting MISA XLEN\n", xlen));

The existing users of BUG are replaced with calls to sbi_panic along
with informative error messages. BUG_ON and SBI_ASSERT were unused (and,
in the case of SBI_ASSERT, remain unused).

Many existing users of sbi_hart_hang should be converted to use either
sbi_panic or SBI_ASSERT after this commit.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_console.h       | 23 +++++------------------
 lib/sbi/riscv_asm.c             |  7 ++++---
 lib/sbi/sbi_console.c           | 14 ++++++++++++++
 platform/generic/sifive_fu740.c |  1 +
 4 files changed, 24 insertions(+), 21 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 28b4a7996ae..e15b55dcb54 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -11,7 +11,6 @@
 #define __SBI_CONSOLE_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_hart.h>
 
 struct sbi_console_device {
 	/** Name of the console device */
@@ -44,6 +43,8 @@ int __printf(1, 2) sbi_printf(const char *format, ...);
 
 int __printf(1, 2) sbi_dprintf(const char *format, ...);
 
+void __printf(1, 2) __attribute__((noreturn)) sbi_panic(const char *format, ...);
+
 const struct sbi_console_device *sbi_console_get_device(void);
 
 void sbi_console_set_device(const struct sbi_console_device *dev);
@@ -52,23 +53,9 @@ struct sbi_scratch;
 
 int sbi_console_init(struct sbi_scratch *scratch);
 
-#define BUG() do { \
-	sbi_printf("BUG: failure at %s:%d/%s()!\n", \
-		   __FILE__, __LINE__, __func__); \
-	sbi_hart_hang(); \
-} while (0)
-
-#define BUG_ON(cond) do { \
-	if (cond)	\
-		BUG();	\
-} while (0)
-
-#define SBI_ASSERT(cond) do { \
-	if (!(cond)) { \
-		sbi_printf("ASSERT: %s:%d/%s(): Assertion `%s` failed.\n", \
-			   __FILE__,__LINE__,__func__, #cond);\
-		sbi_hart_hang(); \
-	} \
+#define SBI_ASSERT(cond, args) do { \
+	if (unlikely(!(cond))) \
+		sbi_panic args; \
 } while (0)
 
 #endif
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 1642ac6e43e..2e2e148f98f 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -76,7 +76,8 @@ void misa_string(int xlen, char *out, unsigned int out_sz)
 			out[pos++] = '8';
 			break;
 		default:
-			BUG();
+			sbi_panic("%s: Unknown misa.MXL encoding %d",
+				   __func__, xlen);
 			return;
 		}
 	}
@@ -145,7 +146,7 @@ unsigned long csr_read_num(int csr_num)
 #endif
 
 	default:
-		BUG();
+		sbi_panic("%s: Unknown CSR %#x", __func__, csr_num);
 		break;
 	};
 
@@ -213,7 +214,7 @@ void csr_write_num(int csr_num, unsigned long val)
 	switchcase_csr_write_16(CSR_MHPMEVENT16, val)
 
 	default:
-		BUG();
+		sbi_panic("%s: Unknown CSR %#x", __func__, csr_num);
 		break;
 	};
 
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 29eede30209..34c843d3f9e 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 
@@ -397,6 +398,19 @@ int sbi_dprintf(const char *format, ...)
 	return retval;
 }
 
+void sbi_panic(const char *format, ...)
+{
+	va_list args;
+
+	spin_lock(&console_out_lock);
+	va_start(args, format);
+	print(NULL, NULL, format, args);
+	va_end(args);
+	spin_unlock(&console_out_lock);
+
+	sbi_hart_hang();
+}
+
 const struct sbi_console_device *sbi_console_get_device(void)
 {
 	return console_dev;
diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive_fu740.c
index 31521526cb6..333b3fb79de 100644
--- a/platform/generic/sifive_fu740.c
+++ b/platform/generic/sifive_fu740.c
@@ -12,6 +12,7 @@
 #include <platform_override.h>
 #include <libfdt.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_console.h>
 #include <sbi_utils/fdt/fdt_helper.h>

From 2428987cc06310f0e54abd4ce2efe3ed60f52245 Mon Sep 17 00:00:00 2001
From: Vincent Chen <vincent.chen@sifive.com>
Date: Wed, 1 Dec 2021 17:45:42 -0800
Subject: [PATCH 0911/1765] lib: pmu: support the event ID encoded by a bitmap.

RISC-V privilege specification does not specify how to encode the event ID.
Therefore, each platform is allowed to customize its own encoding rule.
The common encoding methods are as follow, directly assigning a number to an
event, or every bit in the mphmevent CSR controls one specified event or
mixes the above two methods.

To enable OpenSBI to support the above three encoding methods simultaneously,
this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The
"riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw
events that could be counted by a set of counters. But, the column number
of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column
(64bit) is the ID of the raw events. The 2nd column (64bit) represents a
select_mask now to represent the bits used for event ID encoding.
If a platform directly encodes each raw PMU event as a unique ID,
the value of select_mask will be 0xffffffff_ffffffff.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Atish Patra<atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/pmu_support.md     | 24 ++++++++++++++++--------
 include/sbi/sbi_pmu.h   |  2 +-
 lib/sbi/sbi_pmu.c       | 35 ++++++++++++++++++++++++-----------
 lib/utils/fdt/fdt_pmu.c | 16 +++++++++-------
 4 files changed, 50 insertions(+), 27 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index a60b75cf9ef..7e3367cffe7 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -50,12 +50,20 @@ event-to-mhpmevent is present. Otherwise, it can be omitted. This property
 shouldn't encode any raw event.
 
 * **riscv,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY
-mapping between a raw event and all the MHPMCOUNTERx in a bitmap format that can
-be used to monitor that raw event. The information is encoded in a table format
-where each raw represent a specific raw event. The first column stores the
-expected event selector value that should be encoded in the expected value to be
-written in MHPMEVENTx. The second column stores a bitmap of all the MHPMCOUNTERx
-that can be used for monitoring the specified event.
+or MANY-to-MANY mapping between the raw event(s) and all the MHPMCOUNTERx in
+a bitmap format that can be used to monitor that raw event, which depends on
+how the platform encodes the monitor events. Currently, only the following three
+encoding methods are supported, encoding each event as a number, using a bitmap
+to encode monitor events, and mixing the previous two methods. The information
+is encoded in a table format where each row represent the specific raw event(s).
+The first column represents a 64-bit selector value which can indicate an
+monitor event ID (encoded by a number) or an event set (encoded by a bitmap).
+In case of the latter, the lower bits used to encode a set of events should be
+set to zero. The second column is a 64-bit selector mask where any bits used
+for event encoding will be cleared. If a platform directly encodes each raw PMU
+event as a unique ID, the value of select_mask will be 0xffffffff_ffffffff.
+The third column represent a bitmap of all the MHPMCOUNTERx that can be used for
+monitoring the specified event(s).
 
 *Note:* A platform may choose to provide the mapping between event & counters
 via platform hooks rather than the device tree.
@@ -72,8 +80,8 @@ pmu {
 						  <0x00002 0x00002 0x00000004>,
 						  <0x00003 0x0000A 0x00000ff8>,
 						  <0x10000 0x10033 0x000ff000>,
-	riscv,raw-event-to-mhpmcounters 	= <0x0000 0x0002 0x00000f8>,
-					  <0x0000 0x0003 0x00000ff0>,
+	riscv,raw-event-to-mhpmcounters = <0x0000     0x0002 0xffffffff 0xffffffff 0x00000f8>,
+					  <0xffffffff 0xfffffff0 0xffffffff 0xfffffff0 0x00000ff0>,
 };
 
 ```
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index f0185566cd6..6a1c62ccfbe 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -51,7 +51,7 @@ int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap);
  * @return 0 on success, error otherwise.
  */
 
-int sbi_pmu_add_raw_event_counter_map(uint64_t select, u32 cmap);
+int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32 cmap);
 
 int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval);
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 5950a200163..10668a358cb 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -21,8 +21,16 @@ struct sbi_pmu_hw_event {
 	uint32_t counters;
 	uint32_t start_idx;
 	uint32_t end_idx;
-	/* Event selector value used only for raw events */
+	/* Event selector value used only for raw events. The event select value
+	 * can be a even id or a selector value for set of events encoded in few
+	 * bits. In case latter, the bits used for encoding of the events should
+	 * be zeroed out in the select value.
+	 */
 	uint64_t select;
+	 /**
+	  * The select_mask indicates which bits are encoded for the event(s).
+	  */
+	uint64_t select_mask;
 };
 
 /** Representation of a firmware event */
@@ -91,9 +99,9 @@ static bool pmu_event_range_overlap(struct sbi_pmu_hw_event *evtA,
 }
 
 static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
-				     uint64_t select_val)
+				     uint64_t select_val, uint64_t select_mask)
 {
-	if (evt->select == select_val)
+	if ((evt->select == select_val) && (evt->select_mask == select_mask))
 		return TRUE;
 
 	return FALSE;
@@ -168,7 +176,7 @@ int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval)
 }
 
 static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
-				uint64_t select)
+				uint64_t select, uint64_t select_mask)
 {
 	int i = 0;
 	bool is_overlap;
@@ -191,13 +199,15 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 	for (i = 0; i < num_hw_events; i++) {
 		if (eidx_start == SBI_PMU_EVENT_RAW_IDX)
 		/* All raw events have same event idx. Just do sanity check on select */
-			is_overlap = pmu_event_select_overlap(&hw_event_map[i], select);
+			is_overlap = pmu_event_select_overlap(&hw_event_map[i],
+							      select, select_mask);
 		else
 			is_overlap = pmu_event_range_overlap(&hw_event_map[i], event);
 		if (is_overlap)
 			goto reset_event;
 	}
 
+	event->select_mask = select_mask;
 	event->counters = cmap;
 	event->select = select;
 	num_hw_events++;
@@ -221,13 +231,13 @@ int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap)
 	     eidx_end == SBI_PMU_EVENT_RAW_IDX)
 		return SBI_EINVAL;
 
-	return pmu_add_hw_event_map(eidx_start, eidx_end, cmap, 0);
+	return pmu_add_hw_event_map(eidx_start, eidx_end, cmap, 0, 0);
 }
 
-int sbi_pmu_add_raw_event_counter_map(uint64_t select, u32 cmap)
+int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32 cmap)
 {
 	return pmu_add_hw_event_map(SBI_PMU_EVENT_RAW_IDX,
-				    SBI_PMU_EVENT_RAW_IDX, cmap, select);
+				    SBI_PMU_EVENT_RAW_IDX, cmap, select, select_mask);
 }
 
 static int pmu_ctr_enable_irq_hw(int ctr_idx)
@@ -514,9 +524,13 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 			continue;
 
 		/* For raw events, event data is used as the select value */
-		if ((event_idx == SBI_PMU_EVENT_RAW_IDX) && temp->select != data)
-			continue;
+		if (event_idx == SBI_PMU_EVENT_RAW_IDX) {
+			uint64_t select_mask = temp->select_mask;
 
+			/* The non-event map bits of data should match the selector */
+			if (temp->select != (data & select_mask))
+				continue;
+		}
 		/* Fixed counters should not be part of the search */
 		ctr_mask = temp->counters & (cmask << cbase) &
 			   (~SBI_PMU_FIXED_CTR_MASK);
@@ -546,7 +560,6 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 		else
 			return SBI_EFAIL;
 	}
-
 	ret = pmu_update_hw_mhpmevent(temp, ctr_idx, flags, event_idx, data);
 
 	if (!ret)
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 529ee420554..a2b048f0ab2 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -65,7 +65,7 @@ int fdt_pmu_setup(void *fdt)
 	const u32 *event_val;
 	const u32 *event_ctr_map;
 	struct fdt_pmu_hw_event_select *event;
-	uint64_t raw_selector;
+	uint64_t raw_selector, select_mask;
 	u32 event_idx_start, event_idx_end, ctr_map;
 
 	if (!fdt)
@@ -99,14 +99,16 @@ int fdt_pmu_setup(void *fdt)
 	}
 
 	event_val = fdt_getprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters", &len);
-	if (!event_val || len < 8)
+	if (!event_val || len < 20)
 		return SBI_EFAIL;
-	len = len / (sizeof(u32) * 3);
+	len = len / (sizeof(u32) * 5);
 	for (i = 0; i < len; i++) {
-		raw_selector = fdt32_to_cpu(event_val[3 * i]);
-		raw_selector = (raw_selector << 32) | fdt32_to_cpu(event_val[3 * i + 1]);
-		ctr_map = fdt32_to_cpu(event_val[3 * i + 2]);
-		result = sbi_pmu_add_raw_event_counter_map(raw_selector, ctr_map);
+		raw_selector = fdt32_to_cpu(event_val[5 * i]);
+		raw_selector = (raw_selector << 32) | fdt32_to_cpu(event_val[5 * i + 1]);
+		select_mask = fdt32_to_cpu(event_val[5 * i + 2]);
+		select_mask = (select_mask  << 32) | fdt32_to_cpu(event_val[5 * i + 3]);
+		ctr_map = fdt32_to_cpu(event_val[5 * i + 4]);
+		result = sbi_pmu_add_raw_event_counter_map(raw_selector, select_mask, ctr_map);
 		if (!result)
 			hw_event_count++;
 	}

From 66fbcc03df0444bb6ce2286d3605cbc13b361cb1 Mon Sep 17 00:00:00 2001
From: Tsukasa OI <research_trasio@irq.a4lg.com>
Date: Fri, 3 Dec 2021 10:13:56 +0900
Subject: [PATCH 0912/1765] docs/platform: spike: Enhance Spike examples

This commit makes Spike usable as QEMU (in fact, those are based on
QEMU examples).

Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 docs/platform/spike.md | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/docs/platform/spike.md b/docs/platform/spike.md
index 79e2eb2b0d2..bde9e13ed52 100644
--- a/docs/platform/spike.md
+++ b/docs/platform/spike.md
@@ -43,7 +43,18 @@ make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Im
 
 Run:
 ```
-spike --initrd <path_to_cpio_ramdisk> build/platform/generic/firmware/fw_payload.elf
+spike -m256 \
+	--initrd <path_to_cpio_ramdisk> \
+	--bootargs 'root=/dev/ram rw console=hvc0 earlycon=sbi' \
+	build/platform/generic/firmware/fw_payload.elf
+```
+or
+```
+spike -m256 \
+	--kernel <linux_build_directory>/arch/riscv/boot/Image \
+	--initrd <path_to_cpio_ramdisk> \
+	--bootargs 'root=/dev/ram rw console=hvc0 earlycon=sbi' \
+	build/platform/generic/firmware/fw_jump.elf
 ```
 
 Execution on QEMU RISC-V 64-bit

From 460041c816f1b174899a3bf1147ce5d2e95731f4 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Wed, 8 Dec 2021 14:16:54 +0300
Subject: [PATCH 0913/1765] lib: pmu: check SSCOF before masking

We should check if SSCOF extension is present,
before applying inhibit mask and clearing overflow,
otherwise undesirable value can be written
in MHPMEVENT_N CSR.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_pmu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 10668a358cb..5b845f835e7 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -467,7 +467,8 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 		return SBI_EFAIL;
 
 	/* Always clear the OVF bit and inhibit countin of events in M-mode */
-	mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) | MHPMEVENT_MINH;
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) | MHPMEVENT_MINH;
 
 	/* Update the inhibit flags based on inhibit flags received from supervisor */
 	pmu_update_inhibit_flags(flags, &mhpmevent_val);

From 69d7e536138ae71a24028ca849d401a4d64d564b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 2 Dec 2021 10:30:28 +0530
Subject: [PATCH 0914/1765] Makefile: Fix -msave-restore compile warning with
 CLANG-10 (or lower)

The riscv target of CLANG-10 (or lower) does not support the
-m(no-)save-restore option so we get compile warnings. This patch
fixes compile warning by using -m(no-)save-restore option only
for GCC.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
---
 Makefile | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index 8623c1c5f91..d89a0c5f445 100644
--- a/Makefile
+++ b/Makefile
@@ -275,8 +275,11 @@ GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
 CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -O2
-CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
-CFLAGS		+=	-mno-save-restore -mstrict-align
+CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
+# CLANG-10 (or lower) does not support -m(no-)save-restore option
+ifneq ($(CC_IS_CLANG),y)
+CFLAGS		+=	-mno-save-restore
+endif
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(RELAX_FLAG)
@@ -290,8 +293,11 @@ CPPFLAGS	+=	$(platform-cppflags-y)
 CPPFLAGS	+=	$(firmware-cppflags-y)
 
 ASFLAGS		=	-g -Wall -nostdlib
-ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
-ASFLAGS		+=	-mno-save-restore -mstrict-align
+ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
+# CLANG-10 (or lower) does not support -m(no-)save-restore option
+ifneq ($(CC_IS_CLANG),y)
+ASFLAGS		+=	-mno-save-restore
+endif
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 ASFLAGS		+=	$(RELAX_FLAG)

From d249d6544c3cbf6a817e2fac40b4be0e006ba965 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Thu, 2 Dec 2021 16:52:16 +0530
Subject: [PATCH 0915/1765] lib: sbi: Fix compile errors using -Os option

When compiling with -Os option along with -ffreestanding, both GCC
and clang will add implicit calls to memcpy() and memset() for stack
variables initialized in declaration.

The C standard as per Clause 4, the compiler cannot necessarily
assume that anything beyond:

 * float.h
 * iso646.h
 * limits.h
 * stdalign.h
 * stdarg.h
 * stdbool.h
 * stddef.h
 * stdint.h
 * stdnoreturn.h
 * fenv.h
 * math.h
 * and the numeric conversion functions of stdlib.h.

This patch maps memcpy() and memset() as weak-alias of sbi_memcpy()
and sbi_memset() respectively so that implicit calls to memcpy()
and memset() will compile properly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_string.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index c87bce9cfbd..c67c02e5d51 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -122,6 +122,9 @@ void *sbi_memset(void *s, int c, size_t count)
 	return s;
 }
 
+void *memset(void *s, int c, size_t count) \
+__attribute__((weak, alias("sbi_memset")));
+
 void *sbi_memcpy(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = dest;
@@ -135,6 +138,9 @@ void *sbi_memcpy(void *dest, const void *src, size_t count)
 	return dest;
 }
 
+void *memcpy(void *dest, const void *src, size_t count) \
+__attribute__((weak, alias("sbi_memcpy")));
+
 void *sbi_memmove(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = (char *)dest;

From f27035981096e8d272d94dc17402b10567429869 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Sun, 12 Dec 2021 20:39:33 +0800
Subject: [PATCH 0916/1765] Makefile: Improve the method to disable
 -m(no-)save-restore option

The commit 69d7e53 disables the -m(no-)save-restore option for
clang, but clang11 supports this option. This patch uses the
output information of the compiler to check whether the compiler
supports this option.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 Makefile | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index d89a0c5f445..062883e9695 100644
--- a/Makefile
+++ b/Makefile
@@ -150,6 +150,9 @@ endif
 # Check whether the linker supports creating PIEs
 OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
+# Check whether the compiler supports -m(no-)save-restore
+CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep "\-save\-restore" >/dev/null && echo n || echo y)
+
 # Build Info:
 # OPENSBI_BUILD_TIME_STAMP -- the compilation time stamp
 # OPENSBI_BUILD_COMPILER_VERSION -- the compiler version info
@@ -276,8 +279,8 @@ GENFLAGS	+=	$(firmware-genflags-y)
 
 CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -O2
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
-# CLANG-10 (or lower) does not support -m(no-)save-restore option
-ifneq ($(CC_IS_CLANG),y)
+# enable -m(no-)save-restore option by CC_SUPPORT_SAVE_RESTORE
+ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 CFLAGS		+=	-mno-save-restore
 endif
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
@@ -294,8 +297,8 @@ CPPFLAGS	+=	$(firmware-cppflags-y)
 
 ASFLAGS		=	-g -Wall -nostdlib
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
-# CLANG-10 (or lower) does not support -m(no-)save-restore option
-ifneq ($(CC_IS_CLANG),y)
+# enable -m(no-)save-restore option by CC_SUPPORT_SAVE_RESTORE
+ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 ASFLAGS		+=	-mno-save-restore
 endif
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)

From 2082153fc90c54b98647b1fbaeb7511fd57b7d2b Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 17 Dec 2021 18:02:58 +0100
Subject: [PATCH 0917/1765] lib: sbi: simplify pmp_set(), pmp_get()

pmpcfg_csr and pmpcfg_shift are only negative for an unexpected value of
__riscv_xlen. We can immediately return in this case.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
---
 lib/sbi/riscv_asm.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 2e2e148f98f..847bdba951b 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -261,12 +261,9 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	pmpcfg_csr   = -1;
-	pmpcfg_shift = -1;
+	return SBI_ENOTSUPP;
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
-	if (pmpcfg_csr < 0 || pmpcfg_shift < 0)
-		return SBI_ENOTSUPP;
 
 	/* encode PMP config */
 	prot &= ~PMP_A;
@@ -315,12 +312,9 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	pmpcfg_csr   = -1;
-	pmpcfg_shift = -1;
+	return SBI_ENOTSUPP;
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
-	if (pmpcfg_csr < 0 || pmpcfg_shift < 0)
-		return SBI_ENOTSUPP;
 
 	/* decode PMP config */
 	cfgmask = (0xffUL << pmpcfg_shift);

From d30bde36d5b7a7ad74176ddf9ede4d7eb2bca86b Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Wed, 22 Dec 2021 18:01:23 +0530
Subject: [PATCH 0918/1765] firmware: Move memcpy/memset mapping to fw_base.S

Some of the external firmwares using OpenSBI as library are facing
issues with the weak memcpy() and memset() aliases in libsbi.a so
we move these to fw_base.S. This way mapping of implicit memcpy()
or memset() calls to sbi_memcpy() or sbi_memset() will only be done
for OpenSBI firmwares.
(Refer, https://github.com/riscv-software-src/opensbi/issues/234)

In addition, we also add memmove() and memcmp() mappings in fw_base.S
because as-per the GCC documentation the freestanding environment must
provide memcpy(), memmove(), memset(), and memcmp().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 firmware/fw_base.S   | 28 ++++++++++++++++++++++++++++
 lib/sbi/sbi_string.c |  6 ------
 2 files changed, 28 insertions(+), 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 1569e60821d..ab3e1b3911c 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -561,6 +561,34 @@ fw_platform_init:
 	add	a0, a1, zero
 	ret
 
+	/* Map implicit memcpy() added by compiler to sbi_memcpy() */
+	.section .text
+	.align 3
+	.globl memcpy
+memcpy:
+	tail	sbi_memcpy
+
+	/* Map implicit memset() added by compiler to sbi_memset() */
+	.section .text
+	.align 3
+	.globl memset
+memset:
+	tail	sbi_memset
+
+	/* Map implicit memmove() added by compiler to sbi_memmove() */
+	.section .text
+	.align 3
+	.globl memmove
+memmove:
+	tail	sbi_memmove
+
+	/* Map implicit memcmp() added by compiler to sbi_memcmp() */
+	.section .text
+	.align 3
+	.globl memcmp
+memcmp:
+	tail	sbi_memcmp
+
 .macro	TRAP_SAVE_AND_SETUP_SP_T0
 	/* Swap TP and MSCRATCH */
 	csrrw	tp, CSR_MSCRATCH, tp
diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index c67c02e5d51..c87bce9cfbd 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -122,9 +122,6 @@ void *sbi_memset(void *s, int c, size_t count)
 	return s;
 }
 
-void *memset(void *s, int c, size_t count) \
-__attribute__((weak, alias("sbi_memset")));
-
 void *sbi_memcpy(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = dest;
@@ -138,9 +135,6 @@ void *sbi_memcpy(void *dest, const void *src, size_t count)
 	return dest;
 }
 
-void *memcpy(void *dest, const void *src, size_t count) \
-__attribute__((weak, alias("sbi_memcpy")));
-
 void *sbi_memmove(void *dest, const void *src, size_t count)
 {
 	char *temp1	  = (char *)dest;

From 48f91ee9c960f048c4a7d1da4447d31e04931e38 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup.patel@wdc.com>
Date: Fri, 24 Dec 2021 17:27:44 +0530
Subject: [PATCH 0919/1765] include: Bump-up version to 1.0

This patch updates OpenSBI version to 1.0 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 include/sbi/sbi_version.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 3f734fe9dac..2f64429e7b4 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -10,8 +10,8 @@
 #ifndef __SBI_VERSION_H__
 #define __SBI_VERSION_H__
 
-#define OPENSBI_VERSION_MAJOR 0
-#define OPENSBI_VERSION_MINOR 9
+#define OPENSBI_VERSION_MAJOR 1
+#define OPENSBI_VERSION_MINOR 0
 
 /**
  * OpenSBI 32-bit version with:

From 5b9960379fae14b554c953b0d4139f4b1a57cd5e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 6 Jan 2022 09:02:45 +0530
Subject: [PATCH 0920/1765] lib: utils/ipi: Fix size check in
 aclint_mswi_cold_init()

Currently, the ACLINT MSWI size check is forcing size to be at least
0x4000. This is inappropriate check because most systems will never
utilize full 16KB for a single ACLINT MSWI device so instead we should
check that ACLINT MSWI size is enough for on the associated HARTs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 lib/utils/ipi/aclint_mswi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index a3de2f552aa..832e223f08d 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -74,7 +74,7 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 
 	/* Sanity checks */
 	if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
-	    (mswi->size < ACLINT_MSWI_SIZE) ||
+	    (mswi->size < (mswi->hart_count * sizeof(u32))) ||
 	    (mswi->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
 	    (mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
 		return SBI_EINVAL;

From 6dde43584f185f71a8dd713deb438d7c724a9ad5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 6 Jan 2022 09:16:55 +0530
Subject: [PATCH 0921/1765] lib: utils/sys: Extend HTIF library to allow custom
 base address

Some of RISC-V emulators provide HTIF at fixed base address so for
such emulators users have to hard-code HTIF base address in the
linker script.

To address this problem, we let users optionally provide fixed HTIF
base address via platform support (or device tree).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/sys/htif.h       |  8 ++-
 lib/utils/reset/fdt_reset_htif.c   | 12 ++++-
 lib/utils/serial/fdt_serial_htif.c | 12 ++++-
 lib/utils/sys/htif.c               | 85 ++++++++++++++++++++++++++----
 4 files changed, 103 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/sys/htif.h b/include/sbi_utils/sys/htif.h
index 9cc963452b5..78784cf2ce6 100644
--- a/include/sbi_utils/sys/htif.h
+++ b/include/sbi_utils/sys/htif.h
@@ -10,8 +10,12 @@
 
 #include <sbi/sbi_types.h>
 
-int htif_serial_init(void);
+int htif_serial_init(bool custom_addr,
+		     unsigned long custom_fromhost_addr,
+		     unsigned long custom_tohost_addr);
 
-int htif_system_reset_init(void);
+int htif_system_reset_init(bool custom_addr,
+			   unsigned long custom_fromhost_addr,
+			   unsigned long custom_tohost_addr);
 
 #endif
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
index dd086605f9d..2cc52dda538 100644
--- a/lib/utils/reset/fdt_reset_htif.c
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -14,7 +14,17 @@
 static int htif_reset_init(void *fdt, int nodeoff,
 			   const struct fdt_match *match)
 {
-	return htif_system_reset_init();
+	bool custom = false;
+	uint64_t fromhost_addr = 0, tohost_addr = 0;
+
+	if (!fdt_get_node_addr_size(fdt, nodeoff, 0, &fromhost_addr, NULL)) {
+		custom = true;
+		tohost_addr = fromhost_addr + sizeof(uint64_t);
+	}
+
+	fdt_get_node_addr_size(fdt, nodeoff, 1, &tohost_addr, NULL);
+
+	return htif_system_reset_init(custom, fromhost_addr, tohost_addr);
 }
 
 static const struct fdt_match htif_reset_match[] = {
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
index fae55b8add3..61f66d683e8 100644
--- a/lib/utils/serial/fdt_serial_htif.c
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -19,7 +19,17 @@ static const struct fdt_match serial_htif_match[] = {
 static int serial_htif_init(void *fdt, int nodeoff,
 			    const struct fdt_match *match)
 {
-	return htif_serial_init();
+	bool custom = false;
+	uint64_t fromhost_addr = 0, tohost_addr = 0;
+
+	if (!fdt_get_node_addr_size(fdt, nodeoff, 0, &fromhost_addr, NULL)) {
+		custom = true;
+		tohost_addr = fromhost_addr + sizeof(uint64_t);
+	}
+
+	fdt_get_node_addr_size(fdt, nodeoff, 1, &tohost_addr, NULL);
+
+	return htif_serial_init(custom, fromhost_addr, tohost_addr);
 }
 
 struct fdt_serial fdt_serial_htif = {
diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index 7c69c7f3898..d7cbeaf6217 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -7,6 +7,7 @@
 
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_system.h>
 #include <sbi_utils/sys/htif.h>
 
@@ -47,15 +48,46 @@
 
 volatile uint64_t tohost __attribute__((section(".htif")));
 volatile uint64_t fromhost __attribute__((section(".htif")));
+
+static uint64_t *htif_fromhost = NULL;
+static uint64_t *htif_tohost = NULL;
+static bool htif_custom = false;
+
 static int htif_console_buf;
 static spinlock_t htif_lock = SPIN_LOCK_INITIALIZER;
 
+static inline uint64_t __read_tohost(void)
+{
+	return (htif_custom) ? *htif_tohost : tohost;
+}
+
+static inline void __write_tohost(uint64_t val)
+{
+	if (htif_custom)
+		*htif_tohost = val;
+	else
+		tohost = val;
+}
+
+static inline uint64_t __read_fromhost(void)
+{
+	return (htif_custom) ? *htif_fromhost : fromhost;
+}
+
+static inline void __write_fromhost(uint64_t val)
+{
+	if (htif_custom)
+		*htif_fromhost = val;
+	else
+		fromhost = val;
+}
+
 static void __check_fromhost()
 {
-	uint64_t fh = fromhost;
+	uint64_t fh = __read_fromhost();
 	if (!fh)
 		return;
-	fromhost = 0;
+	__write_fromhost(0);
 
 	/* this should be from the console */
 	if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE)
@@ -73,9 +105,26 @@ static void __check_fromhost()
 
 static void __set_tohost(uint64_t dev, uint64_t cmd, uint64_t data)
 {
-	while (tohost)
+	while (__read_tohost())
 		__check_fromhost();
-	tohost = TOHOST_CMD(dev, cmd, data);
+	__write_tohost(TOHOST_CMD(dev, cmd, data));
+}
+
+static int set_custom_addr(bool custom_addr,
+			   unsigned long custom_fromhost_addr,
+			   unsigned long custom_tohost_addr)
+{
+	if (custom_addr) {
+		if (htif_custom &&
+		    ((custom_fromhost_addr != (unsigned long)htif_fromhost) ||
+		     (custom_tohost_addr != (unsigned long)htif_tohost)))
+			return SBI_EINVAL;
+		htif_fromhost = (uint64_t *)custom_fromhost_addr;
+		htif_tohost = (uint64_t *)custom_tohost_addr;
+		htif_custom = true;
+	}
+
+	return 0;
 }
 
 #if __riscv_xlen == 32
@@ -148,10 +197,18 @@ static struct sbi_console_device htif_console = {
 	.console_getc = htif_getc
 };
 
-int htif_serial_init(void)
+int htif_serial_init(bool custom_addr,
+		     unsigned long custom_fromhost_addr,
+		     unsigned long custom_tohost_addr)
 {
-	sbi_console_set_device(&htif_console);
+	int rc;
+
+	rc = set_custom_addr(custom_addr, custom_fromhost_addr,
+			     custom_tohost_addr);
+	if (rc)
+		return rc;
 
+	sbi_console_set_device(&htif_console);
 	return 0;
 }
 
@@ -163,8 +220,8 @@ static int htif_system_reset_check(u32 type, u32 reason)
 static void htif_system_reset(u32 type, u32 reason)
 {
 	while (1) {
-		fromhost = 0;
-		tohost = 1;
+		__write_fromhost(0);
+		__write_tohost(1);
 	}
 }
 
@@ -174,9 +231,17 @@ static struct sbi_system_reset_device htif_reset = {
 	.system_reset = htif_system_reset
 };
 
-int htif_system_reset_init(void)
+int htif_system_reset_init(bool custom_addr,
+			   unsigned long custom_fromhost_addr,
+			   unsigned long custom_tohost_addr)
 {
-	sbi_system_reset_add_device(&htif_reset);
+	int rc;
+
+	rc = set_custom_addr(custom_addr, custom_fromhost_addr,
+			     custom_tohost_addr);
+	if (rc)
+		return rc;
 
+	sbi_system_reset_add_device(&htif_reset);
 	return 0;
 }

From 8257262dbf4fc934c2f21a42dcd9c0f41a378d46 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Wed, 5 Jan 2022 08:20:38 +0100
Subject: [PATCH 0922/1765] platform: sifive_fu740: do not use a global in
 da9063_reset/shutdown

da9063_reset() and da9063_shutdown() take the chip address in argument
(like similar functions), but in practice use the da9063 global struct
instead. Fix that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 platform/generic/sifive_fu740.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive_fu740.c
index 333b3fb79de..866e9246d92 100644
--- a/platform/generic/sifive_fu740.c
+++ b/platform/generic/sifive_fu740.c
@@ -81,32 +81,32 @@ static inline int da9063_sanity_check(struct i2c_adapter *adap, uint32_t reg)
 
 static inline int da9063_shutdown(struct i2c_adapter *adap, uint32_t reg)
 {
-	int rc = i2c_adapter_reg_write(adap, da9063.reg,
+	int rc = i2c_adapter_reg_write(adap, reg,
 					DA9063_REG_PAGE_CON, 0x00);
 
 	if (rc)
 		return rc;
 
-	return i2c_adapter_reg_write(adap, da9063.reg,
+	return i2c_adapter_reg_write(adap, reg,
 				     DA9063_REG_CONTROL_F,
 				     DA9063_CONTROL_F_SHUTDOWN);
 }
 
 static inline int da9063_reset(struct i2c_adapter *adap, uint32_t reg)
 {
-	int rc = i2c_adapter_reg_write(adap, da9063.reg,
+	int rc = i2c_adapter_reg_write(adap, reg,
 					DA9063_REG_PAGE_CON, 0x00);
 
 	if (rc)
 		return rc;
 
-	rc = i2c_adapter_reg_write(adap, da9063.reg,
+	rc = i2c_adapter_reg_write(adap, reg,
 				   DA9063_REG_CONTROL_F,
 				   DA9063_CONTROL_F_WAKEUP);
 	if (rc)
 		return rc;
 
-	return i2c_adapter_reg_write(adap, da9063.reg,
+	return i2c_adapter_reg_write(adap, reg,
 				DA9063_REG_CONTROL_A,
 				DA9063_CONTROL_A_M_POWER1_EN |
 				DA9063_CONTROL_A_M_POWER_EN |

From fb688d9e9d4099d6945c9e460b9cd2c8c4d8a29b Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Wed, 5 Jan 2022 08:20:39 +0100
Subject: [PATCH 0923/1765] platform: sifive_fu740: fix reset when watchdog is
 running

When the watchdog is running the HiFive Unmatched board does not reboot
properly and shuts down itself a few seconds after reboot, in the early
stages of the u-boot loading. On a Linux kernel this happens when the
da9063_wdt module is loaded. This does not happen if the module is
unloaded before reboot or if the watchdog module is loaded with
"stop_on_reboot=1".

Fix that by stopping the watchdog before attempting to reset the board.
This is done by zeroing the TWDSCALE field of CONTROL_D register, unless
it was already set to 0.

Reported-by: Tianon Gravi <tianon@debian.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Nikita Shubin <n.shubin@yadro.com>
Tested-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/sifive_fu740.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive_fu740.c
index 866e9246d92..f595c0484b6 100644
--- a/platform/generic/sifive_fu740.c
+++ b/platform/generic/sifive_fu740.c
@@ -22,6 +22,7 @@
 
 #define DA9063_REG_PAGE_CON		0x00
 #define DA9063_REG_CONTROL_A		0x0e
+#define DA9063_REG_CONTROL_D		0x11
 #define DA9063_REG_CONTROL_F		0x13
 #define DA9063_REG_DEVICE_ID		0x81
 
@@ -29,6 +30,8 @@
 #define DA9063_CONTROL_A_M_POWER_EN	(1 << 5)
 #define DA9063_CONTROL_A_STANDBY	(1 << 3)
 
+#define DA9063_CONTROL_D_TWDSCALE_MASK	0x07
+
 #define DA9063_CONTROL_F_WAKEUP	(1 << 2)
 #define DA9063_CONTROL_F_SHUTDOWN	(1 << 1)
 
@@ -79,6 +82,27 @@ static inline int da9063_sanity_check(struct i2c_adapter *adap, uint32_t reg)
 	return 0;
 }
 
+static inline int da9063_stop_watchdog(struct i2c_adapter *adap, uint32_t reg)
+{
+	uint8_t val;
+	int rc = i2c_adapter_reg_write(adap, reg,
+					DA9063_REG_PAGE_CON, 0x00);
+
+	if (rc)
+		return rc;
+
+	rc = i2c_adapter_reg_read(adap, reg, DA9063_REG_CONTROL_D, &val);
+	if (rc)
+		return rc;
+
+	if ((val & DA9063_CONTROL_D_TWDSCALE_MASK) == 0)
+		return 0;
+
+	val &= ~DA9063_CONTROL_D_TWDSCALE_MASK;
+
+	return i2c_adapter_reg_write(adap, reg, DA9063_REG_CONTROL_D, val);
+}
+
 static inline int da9063_shutdown(struct i2c_adapter *adap, uint32_t reg)
 {
 	int rc = i2c_adapter_reg_write(adap, reg,
@@ -133,6 +157,7 @@ static void da9063_system_reset(u32 type, u32 reason)
 			break;
 		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
 		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+			da9063_stop_watchdog(adap, reg);
 			da9063_reset(adap, reg);
 			break;
 		}

From 5d025eb2353550eadbd2fa9b8083a92fe9b07bd9 Mon Sep 17 00:00:00 2001
From: Jukka Laitinen <jukka.laitinen@iki.fi>
Date: Wed, 19 Jan 2022 11:20:17 +0200
Subject: [PATCH 0924/1765] lib: fix pointer of type 'void *' used in
 arithmetic

Using "void *" in arithmetic causes errors with strict compiler settings:
"error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]"

Avoid these by calculating on "char *" where 1-byte data size is assumed.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_scratch.h             | 4 ++--
 lib/sbi/sbi_fifo.c                    | 6 +++---
 lib/sbi/sbi_string.c                  | 4 ++--
 lib/utils/i2c/fdt_i2c_sifive.c        | 4 ++--
 lib/utils/irqchip/fdt_irqchip_plic.c  | 2 +-
 lib/utils/irqchip/plic.c              | 8 ++++----
 lib/utils/reset/fdt_reset_sunxi_wdt.c | 4 ++--
 lib/utils/reset/fdt_reset_thead.c     | 4 ++--
 lib/utils/serial/gaisler-uart.c       | 4 ++--
 lib/utils/serial/shakti-uart.c        | 4 ++--
 lib/utils/serial/sifive-uart.c        | 4 ++--
 lib/utils/serial/uart8250.c           | 4 ++--
 lib/utils/timer/aclint_mtimer.c       | 2 +-
 13 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 186a40c885f..0c2730763d8 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -104,11 +104,11 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size);
 void sbi_scratch_free_offset(unsigned long offset);
 
 /** Get pointer from offset in sbi_scratch */
-#define sbi_scratch_offset_ptr(scratch, offset)	((void *)scratch + (offset))
+#define sbi_scratch_offset_ptr(scratch, offset)	(void *)((char *)(scratch) + (offset))
 
 /** Get pointer from offset in sbi_scratch for current HART */
 #define sbi_scratch_thishart_offset_ptr(offset)	\
-	((void *)sbi_scratch_thishart_ptr() + (offset))
+	(void *)((char *)sbi_scratch_thishart_ptr() + (offset))
 
 /** HART id to scratch table */
 extern struct sbi_scratch *hartid_to_scratch_table[];
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 589cc18a304..68d6039a2e7 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -66,7 +66,7 @@ static inline void  __sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 	if (head >= fifo->num_entries)
 		head = head - fifo->num_entries;
 
-	sbi_memcpy(fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
+	sbi_memcpy((char *)fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
 
 	fifo->avail++;
 }
@@ -142,7 +142,7 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 		index = fifo->tail + i;
 		if (index >= fifo->num_entries)
 			index -= fifo->num_entries;
-		entry = (void *)fifo->queue + (u32)index * fifo->entry_size;
+		entry = (char *)fifo->queue + (u32)index * fifo->entry_size;
 		ret = fptr(in, entry);
 
 		if (ret == SBI_FIFO_SKIP || ret == SBI_FIFO_UPDATED) {
@@ -184,7 +184,7 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOENT;
 	}
 
-	sbi_memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
+	sbi_memcpy(data, (char *)fifo->queue + (u32)fifo->tail * fifo->entry_size,
 	       fifo->entry_size);
 
 	fifo->avail--;
diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index c87bce9cfbd..c163f317650 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -149,8 +149,8 @@ void *sbi_memmove(void *dest, const void *src, size_t count)
 			count--;
 		}
 	} else {
-		temp1 = dest + count - 1;
-		temp2 = src + count - 1;
+		temp1 = (char *)dest + count - 1;
+		temp2 = (char *)src + count - 1;
 
 		while (count > 0) {
 			*temp1-- = *temp2--;
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
index 871241afa8d..195541cf2f0 100644
--- a/lib/utils/i2c/fdt_i2c_sifive.c
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -56,13 +56,13 @@ extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
 static inline void sifive_i2c_setreg(struct sifive_i2c_adapter *adap,
 				     uint8_t reg, uint8_t value)
 {
-	writel(value, (volatile void *)adap->addr + reg);
+	writel(value, (volatile char *)adap->addr + reg);
 }
 
 static inline uint8_t sifive_i2c_getreg(struct sifive_i2c_adapter *adap,
 					uint8_t reg)
 {
-	return readl((volatile void *)adap->addr + reg);
+	return readl((volatile char *)adap->addr + reg);
 }
 
 static int sifive_i2c_adapter_rxack(struct sifive_i2c_adapter *adap)
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 8d375be3166..b2d2a1b3bc5 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -116,7 +116,7 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 
 static void thead_plic_plat_init(struct plic_data *pd)
 {
-	writel_relaxed(BIT(0), (void *)pd->addr + THEAD_PLIC_CTRL_REG);
+	writel_relaxed(BIT(0), (char *)pd->addr + THEAD_PLIC_CTRL_REG);
 }
 
 static const struct fdt_match irqchip_plic_match[] = {
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 7665c62ee63..0f58f3e744f 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -23,7 +23,7 @@
 
 static void plic_set_priority(struct plic_data *plic, u32 source, u32 val)
 {
-	volatile void *plic_priority = (void *)plic->addr +
+	volatile void *plic_priority = (char *)plic->addr +
 			PLIC_PRIORITY_BASE + 4 * source;
 	writel(val, plic_priority);
 }
@@ -35,19 +35,19 @@ void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
 	if (!plic)
 		return;
 
-	plic_thresh = (void *)plic->addr +
+	plic_thresh = (char *)plic->addr +
 		      PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
 	writel(val, plic_thresh);
 }
 
 void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
 {
-	volatile void *plic_ie;
+	volatile char *plic_ie;
 
 	if (!plic)
 		return;
 
-	plic_ie = (void *)plic->addr +
+	plic_ie = (char *)plic->addr +
 		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
 	writel(val, plic_ie + word_index * 4);
 }
diff --git a/lib/utils/reset/fdt_reset_sunxi_wdt.c b/lib/utils/reset/fdt_reset_sunxi_wdt.c
index 6d1b5b7de91..446d32b43f9 100644
--- a/lib/utils/reset/fdt_reset_sunxi_wdt.c
+++ b/lib/utils/reset/fdt_reset_sunxi_wdt.c
@@ -19,7 +19,7 @@
 
 #define WDT_MODE_REG			0x18
 
-static volatile void *sunxi_wdt_base;
+static volatile char *sunxi_wdt_base;
 
 static int sunxi_wdt_system_reset_check(u32 type, u32 reason)
 {
@@ -59,7 +59,7 @@ static int sunxi_wdt_reset_init(void *fdt, int nodeoff,
 	if (rc < 0 || !reg_addr)
 		return SBI_ENODEV;
 
-	sunxi_wdt_base = (volatile void *)(unsigned long)reg_addr;
+	sunxi_wdt_base = (volatile char *)(unsigned long)reg_addr;
 
 	sbi_system_reset_add_device(&sunxi_wdt_reset);
 
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
index d49168727e7..e1d6885deba 100644
--- a/lib/utils/reset/fdt_reset_thead.c
+++ b/lib/utils/reset/fdt_reset_thead.c
@@ -59,7 +59,7 @@ extern void __thead_pre_start_warm(void);
 static int thead_reset_init(void *fdt, int nodeoff,
 				 const struct fdt_match *match)
 {
-	void *p;
+	char *p;
 	const fdt64_t *val;
 	const fdt32_t *val_w;
 	int len, i;
@@ -91,7 +91,7 @@ static int thead_reset_init(void *fdt, int nodeoff,
 	/* Custom reset method for secondary harts */
 	val = fdt_getprop(fdt, nodeoff, "entry-reg", &len);
 	if (len > 0 && val) {
-		p = (void *)(ulong)fdt64_to_cpu(*val);
+          p = (char *)(ulong)fdt64_to_cpu(*val);
 
 		val_w = fdt_getprop(fdt, nodeoff, "entry-cnt", &len);
 		if (len > 0 && val_w) {
diff --git a/lib/utils/serial/gaisler-uart.c b/lib/utils/serial/gaisler-uart.c
index 49298e9afe9..5f30ee43b71 100644
--- a/lib/utils/serial/gaisler-uart.c
+++ b/lib/utils/serial/gaisler-uart.c
@@ -29,7 +29,7 @@
 
 /* clang-format on */
 
-static volatile void *uart_base;
+static volatile char *uart_base;
 
 static u32 get_reg(u32 num)
 {
@@ -67,7 +67,7 @@ int gaisler_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
 	u32 ctrl;
 
-	uart_base = (volatile void *)base;
+	uart_base = (volatile char *)base;
 
 	/* Configure baudrate */
 	if (in_freq)
diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
index e77a9858678..5f2fe75c9f3 100644
--- a/lib/utils/serial/shakti-uart.c
+++ b/lib/utils/serial/shakti-uart.c
@@ -21,7 +21,7 @@
 #define UART_TX_FULL  0x2
 #define UART_RX_FULL  0x8
 
-static volatile void *uart_base;
+static volatile char *uart_base;
 
 static void shakti_uart_putc(char ch)
 {
@@ -46,7 +46,7 @@ static struct sbi_console_device shakti_console = {
 
 int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
-	uart_base = (volatile void *)base;
+	uart_base = (volatile char *)base;
 	u16 baud = (u16)(in_freq/(16 * baudrate));
 	writew(baud, uart_base + REG_BAUD);
 
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 57d80fa4cfb..9478a77f805 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -29,7 +29,7 @@
 
 /* clang-format on */
 
-static volatile void *uart_base;
+static volatile char *uart_base;
 static u32 uart_in_freq;
 static u32 uart_baudrate;
 
@@ -90,7 +90,7 @@ static struct sbi_console_device sifive_console = {
 
 int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
-	uart_base     = (volatile void *)base;
+	uart_base     = (volatile char *)base;
 	uart_in_freq  = in_freq;
 	uart_baudrate = baudrate;
 
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 1cf6624d83d..142f8dc0934 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -39,7 +39,7 @@
 
 /* clang-format on */
 
-static volatile void *uart8250_base;
+static volatile char *uart8250_base;
 static u32 uart8250_in_freq;
 static u32 uart8250_baudrate;
 static u32 uart8250_reg_width;
@@ -95,7 +95,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 {
 	u16 bdiv;
 
-	uart8250_base      = (volatile void *)base;
+	uart8250_base      = (volatile char *)base;
 	uart8250_reg_shift = reg_shift;
 	uart8250_reg_width = reg_width;
 	uart8250_in_freq   = in_freq;
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 62e87f7506f..2532b638e42 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -47,7 +47,7 @@ static u64 mtimer_time_rd32(volatile u64 *addr)
 static void mtimer_time_wr32(bool timecmp, u64 value, volatile u64 *addr)
 {
 	writel_relaxed((timecmp) ? -1U : 0U, (void *)(addr));
-	writel_relaxed((u32)(value >> 32), (void *)(addr) + 0x04);
+	writel_relaxed((u32)(value >> 32), (char *)(addr) + 0x04);
 	writel_relaxed((u32)value, (void *)(addr));
 }
 

From 632f59392bbaa05176376b7d7a9f77f611816614 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Fri, 7 Jan 2022 10:54:07 -0800
Subject: [PATCH 0925/1765] lib: sbi: Map only the counters enabled in hardware

The counter mapping in DT may be incorrect if all the counters specified
in the mapping are actually not physically present in the hardware.
OpenSBI should only keep a mapping of counters enabled in hardware and
defined in DT. This assume that all the programmable hpmcounters are
consecutive as it doesn't make sense to build a system with sparse
hpmcounters.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 5b845f835e7..376afec1349 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -181,6 +181,9 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 	int i = 0;
 	bool is_overlap;
 	struct sbi_pmu_hw_event *event = &hw_event_map[num_hw_events];
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	int hw_ctr_avail = sbi_hart_mhpm_count(scratch);
+	uint32_t ctr_avail_mask = ((uint32_t)(~0) >> (32 - (hw_ctr_avail + 3)));
 
 	/* The first two counters are reserved by priv spec */
 	if (eidx_start > SBI_PMU_HW_INSTRUCTIONS && (cmap & SBI_PMU_FIXED_CTR_MASK))
@@ -208,7 +211,8 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 	}
 
 	event->select_mask = select_mask;
-	event->counters = cmap;
+	/* Map the only the counters that are available in the hardware */
+	event->counters = cmap & ctr_avail_mask;
 	event->select = select;
 	num_hw_events++;
 

From 3b7c204dcaa58e415ad7451c2a690bb88773abbf Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Fri, 7 Jan 2022 10:54:08 -0800
Subject: [PATCH 0926/1765] lib: sbi: Disable interrupt during config matching

PMU overflow interrupt should be disabled durinig initial configuration of
counters. They should be enabled while starting counters.

Fixes: 730f01bb41a6 ("lib: sbi: Support sscofpmf extension in OpenSBI")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h |  3 ++-
 lib/sbi/sbi_pmu.c            | 10 +++++++---
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 8a29f8e05c9..ac8590d72e4 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -181,13 +181,14 @@
 #define MHPMEVENT_VSINH			(_UL(1) << 59)
 #define MHPMEVENT_VUINH			(_UL(1) << 58)
 #else
-#define MHPMEVENTH_OF			(_UL(1) << 31)
+#define MHPMEVENTH_OF			(_ULL(1) << 31)
 #define MHPMEVENTH_MINH			(_ULL(1) << 30)
 #define MHPMEVENTH_SINH			(_ULL(1) << 29)
 #define MHPMEVENTH_UINH			(_ULL(1) << 28)
 #define MHPMEVENTH_VSINH		(_ULL(1) << 27)
 #define MHPMEVENTH_VUINH		(_ULL(1) << 26)
 
+#define MHPMEVENT_OF			(MHPMEVENTH_OF << 32)
 #define MHPMEVENT_MINH			(MHPMEVENTH_MINH << 32)
 #define MHPMEVENT_SINH			(MHPMEVENTH_SINH << 32)
 #define MHPMEVENT_UINH			(MHPMEVENTH_UINH << 32)
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 376afec1349..a209c8e266d 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -256,7 +256,7 @@ static int pmu_ctr_enable_irq_hw(int ctr_idx)
 
 #if __riscv_xlen == 32
 	mhpmevent_csr = CSR_MHPMEVENT3H  + ctr_idx - 3;
-	of_mask = ~MHPMEVENTH_OF;
+	of_mask = (uint32_t)~MHPMEVENTH_OF;
 #else
 	mhpmevent_csr = CSR_MHPMEVENT3 + ctr_idx - 3;
 	of_mask = ~MHPMEVENT_OF;
@@ -470,9 +470,13 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
 		return SBI_EFAIL;
 
-	/* Always clear the OVF bit and inhibit countin of events in M-mode */
+	/**
+	 * Always set the OVF bit(disable interrupts) and inhibit counting of
+	 * events in M-mode. The OVF bit should be enabled during the start call.
+	 */
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
-		mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) | MHPMEVENT_MINH;
+		mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) |
+				 MHPMEVENT_MINH | MHPMEVENT_OF;
 
 	/* Update the inhibit flags based on inhibit flags received from supervisor */
 	pmu_update_inhibit_flags(flags, &mhpmevent_val);

From a26dc609df04ca4704873b683ac03855f20b056e Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Fri, 7 Jan 2022 10:54:09 -0800
Subject: [PATCH 0927/1765] lib: sbi: Disable interrupt and inhibit counting in
 M-mode during init

Currently, the mhpmevent CSRs are untouched during hart init during
cold/warm boot. Ideally, we should clear out all the bits except
overflow and MINH bit. That is required to disable overflow
interrupt and inhibit counting in M-mode to avoid any spurious
interrupts before perf start.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d9a15d994a6..0a651752cdd 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -40,6 +40,9 @@ static unsigned long hart_features_offset;
 static void mstatus_init(struct sbi_scratch *scratch)
 {
 	unsigned long mstatus_val = 0;
+	int cidx;
+	unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
+	uint64_t mhpmevent_init_val = 0;
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
@@ -68,6 +71,21 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
+	/**
+	 * The mhpmeventn[h] CSR should be initialized with interrupt disabled
+	 * and inhibited running in M-mode during init.
+	 * To keep it simple, only contiguous mhpmcounters are supported as a
+	 * platform with discontiguous mhpmcounters may not make much sense.
+	 */
+	mhpmevent_init_val |= (MHPMEVENT_OF | MHPMEVENT_MINH);
+	for (cidx = 0; cidx < num_mhpm; cidx++) {
+#if __riscv_xlen == 32
+		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val & 0xFFFFFFFF);
+		csr_write_num(CSR_MHPMEVENT3H + cidx, mhpmevent_init_val >> BITS_PER_LONG);
+#else
+		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val);
+#endif
+	}
 	/* Disable all interrupts */
 	csr_write(CSR_MIE, 0);
 

From 5d53b55aa77ffeefd4012445dfa6ad3535e1ff2c Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 28 Jan 2022 18:33:46 +0100
Subject: [PATCH 0928/1765] Makefile: fix build with binutils 2.38

From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei. As the kernel uses those instruction,
this causes the following build failure:

 CC        lib/sbi/sbi_tlb.o
<<BUILDDIR>>/lib/sbi/sbi_tlb.c: Assembler messages:
<<BUILDDIR>>/lib/sbi/sbi_tlb.c:190: Error: unrecognized opcode `fence.i'
make: *** [Makefile:431: <<BUILDDIR>>/build/lib/sbi/sbi_tlb.o] Error 1

The fix is to specify those extensions explicitly in -march. However as
older binutils version do not support this, we first need to detect
that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 062883e9695..fc1ea13e519 100644
--- a/Makefile
+++ b/Makefile
@@ -153,6 +153,9 @@ OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fP
 # Check whether the compiler supports -m(no-)save-restore
 CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep "\-save\-restore" >/dev/null && echo n || echo y)
 
+# Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
+CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
+
 # Build Info:
 # OPENSBI_BUILD_TIME_STAMP -- the compilation time stamp
 # OPENSBI_BUILD_COMPILER_VERSION -- the compiler version info
@@ -223,7 +226,11 @@ ifndef PLATFORM_RISCV_ABI
 endif
 ifndef PLATFORM_RISCV_ISA
   ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
-    PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+    ifeq ($(CC_SUPPORT_ZICSR_ZIFENCEI), y)
+      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc_zicsr_zifencei
+    else
+      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+    endif
   else
     PLATFORM_RISCV_ISA = $(OPENSBI_CC_ISA)
   endif

From 6ad8917b7e27e5e80fb9268492b9111b17ed2024 Mon Sep 17 00:00:00 2001
From: Petro Karashchenko <petro.karashchenko@gmail.com>
Date: Fri, 28 Jan 2022 09:13:23 +0200
Subject: [PATCH 0929/1765] lib: fix compilation when strings.h is included

In a systems that provide strings.h and it is included
together with sbi_bitops.h the compilation error appears.
The ffs() and fls() are provided by strings.h

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_bitops.h        | 82 +++------------------------------
 lib/sbi/sbi_bitops.c            | 10 ++--
 lib/sbi/sbi_hart.c              |  8 ++--
 lib/sbi/sbi_pmu.c               |  6 +--
 lib/utils/timer/aclint_mtimer.c |  2 +-
 5 files changed, 19 insertions(+), 89 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 879430d4b90..251e4d89d59 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -37,47 +37,12 @@
 	(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 
 /**
- * ffs - Find first bit set
- * @x: the word to search
- *
- * This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-static inline int ffs(int x)
-{
-	int r = 1;
-
-	if (!x)
-		return 0;
-	if (!(x & 0xffff)) {
-		x >>= 16;
-		r += 16;
-	}
-	if (!(x & 0xff)) {
-		x >>= 8;
-		r += 8;
-	}
-	if (!(x & 0xf)) {
-		x >>= 4;
-		r += 4;
-	}
-	if (!(x & 3)) {
-		x >>= 2;
-		r += 2;
-	}
-	if (!(x & 1))
-		r += 1;
-	return r;
-}
-
-/**
- * __ffs - find first bit in word.
+ * sbi_ffs - find first (less-significant) set bit in a long word.
  * @word: The word to search
  *
  * Undefined if no bit exists, so code should check against 0 first.
  */
-static inline int __ffs(unsigned long word)
+static inline int sbi_ffs(unsigned long word)
 {
 	int num = 0;
 
@@ -109,55 +74,20 @@ static inline int __ffs(unsigned long word)
 }
 
 /*
- * ffz - find first zero in word.
+ * sbi_ffz - find first zero in word.
  * @word: The word to search
  *
  * Undefined if no zero exists, so code should check against ~0UL first.
  */
-#define ffz(x) __ffs(~(x))
-
-/**
- * fls - find last (most-significant) bit set
- * @x: the word to search
- *
- * This is defined the same way as ffs.
- * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
- */
-
-static inline int fls(int x)
-{
-	int r = 32;
-
-	if (!x)
-		return 0;
-	if (!(x & 0xffff0000u)) {
-		x <<= 16;
-		r -= 16;
-	}
-	if (!(x & 0xff000000u)) {
-		x <<= 8;
-		r -= 8;
-	}
-	if (!(x & 0xf0000000u)) {
-		x <<= 4;
-		r -= 4;
-	}
-	if (!(x & 0xc0000000u)) {
-		x <<= 2;
-		r -= 2;
-	}
-	if (!(x & 0x80000000u))
-		r -= 1;
-	return r;
-}
+#define sbi_ffz(x) sbi_ffs(~(x))
 
 /**
- * __fls - find last (most-significant) set bit in a long word
+ * sbi_fls - find last (most-significant) set bit in a long word
  * @word: the word to search
  *
  * Undefined if no set bit exists, so code should check against 0 first.
  */
-static inline unsigned long __fls(unsigned long word)
+static inline unsigned long sbi_fls(unsigned long word)
 {
 	int num = BITS_PER_LONG - 1;
 
diff --git a/lib/sbi/sbi_bitops.c b/lib/sbi/sbi_bitops.c
index de9d0457b34..becea91a20c 100644
--- a/lib/sbi/sbi_bitops.c
+++ b/lib/sbi/sbi_bitops.c
@@ -39,7 +39,7 @@ unsigned long find_first_bit(const unsigned long *addr,
 	if (tmp == 0UL)		/* Are any bits set? */
 		return result + size;	/* Nope. */
 found:
-	return result + __ffs(tmp);
+	return result + sbi_ffs(tmp);
 }
 
 /**
@@ -69,7 +69,7 @@ unsigned long find_first_zero_bit(const unsigned long *addr,
 	if (tmp == ~0UL)	/* Are any bits zero? */
 		return result + size;	/* Nope. */
 found:
-	return result + ffz(tmp);
+	return result + sbi_ffz(tmp);
 }
 
 /**
@@ -100,7 +100,7 @@ unsigned long find_last_bit(const unsigned long *addr,
 		tmp = addr[--words];
 		if (tmp) {
 found:
-			return words * BITS_PER_LONG + __fls(tmp);
+			return words * BITS_PER_LONG + sbi_fls(tmp);
 		}
 	}
 
@@ -150,7 +150,7 @@ unsigned long find_next_bit(const unsigned long *addr,
 	if (tmp == 0UL)		/* Are any bits set? */
 		return result + size;	/* Nope. */
 found_middle:
-	return result + __ffs(tmp);
+	return result + sbi_ffs(tmp);
 }
 
 /**
@@ -196,5 +196,5 @@ unsigned long find_next_zero_bit(const unsigned long *addr,
 	if (tmp == ~0UL)	/* Are any bits zero? */
 		return result + size;	/* Nope. */
 found_middle:
-	return result + ffz(tmp);
+	return result + sbi_ffz(tmp);
 }
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 0a651752cdd..36908b17244 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -386,7 +386,7 @@ static int hart_pmu_get_allowed_bits(void)
 		if (trap.cause)
 			return 0;
 	}
-	num_bits = __fls(val) + 1;
+	num_bits = sbi_fls(val) + 1;
 #if __riscv_xlen == 32
 	csr_write_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap, val);
 	if (!trap.cause) {
@@ -394,7 +394,7 @@ static int hart_pmu_get_allowed_bits(void)
 		if (trap.cause)
 			return num_bits;
 	}
-	num_bits += __fls(val) + 1;
+	num_bits += sbi_fls(val) + 1;
 
 #endif
 
@@ -457,8 +457,8 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	 */
 	val = hart_pmp_get_allowed_addr();
 	if (val) {
-		hfeatures->pmp_gran =  1 << (__ffs(val) + 2);
-		hfeatures->pmp_addr_bits = __fls(val) + 1;
+		hfeatures->pmp_gran =  1 << (sbi_ffs(val) + 2);
+		hfeatures->pmp_addr_bits = sbi_fls(val) + 1;
 		/* Detect number of PMP regions. At least PMPADDR0 should be implemented*/
 		__check_csr_64(CSR_PMPADDR0, 0, val, pmp_count, __pmp_skip);
 	}
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index a209c8e266d..7ea0ca5e2fa 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -347,7 +347,7 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 	int ret = SBI_EINVAL;
 	bool bUpdate = FALSE;
 
-	if (__fls(ctr_mask) >= total_ctrs)
+	if (sbi_fls(ctr_mask) >= total_ctrs)
 		return ret;
 
 	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
@@ -421,7 +421,7 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 	uint32_t event_code;
 	unsigned long ctr_mask = cmask << cbase;
 
-	if (__fls(ctr_mask) >= total_ctrs)
+	if (sbi_fls(ctr_mask) >= total_ctrs)
 		return SBI_EINVAL;
 
 	for_each_set_bit_from(cbase, &ctr_mask, total_ctrs) {
@@ -614,7 +614,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	unsigned long tmp = cidx_mask << cidx_base;
 
 	/* Do a basic sanity check of counter base & mask */
-	if (__fls(tmp) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
+	if (sbi_fls(tmp) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
 		return SBI_EINVAL;
 
 	if (flags & SBI_PMU_CFG_FLAG_SKIP_MATCH) {
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 2532b638e42..a957b1caa32 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -154,7 +154,7 @@ static int aclint_mtimer_add_regions(unsigned long addr, unsigned long size)
 	while (pos < end) {
 		rsize = pos & (MTIMER_ADD_REGION_ALIGN - 1);
 		if (rsize)
-			rsize = 1UL << __ffs(pos);
+			rsize = 1UL << sbi_ffs(pos);
 		else
 			rsize = ((end - pos) < MTIMER_ADD_REGION_ALIGN) ?
 				(end - pos) : MTIMER_ADD_REGION_ALIGN;

From ce4c0188d96b2c20c2e08d24646a5e517fe15a4b Mon Sep 17 00:00:00 2001
From: Jakub Luzny <jakub.luzny@codasip.com>
Date: Fri, 21 Jan 2022 16:06:14 +0100
Subject: [PATCH 0930/1765] lib: utils/serial: Round UART8250 baud rate divisor
 to nearest integer

Previously, it was rounded down and that gives suboptimal results when
non-standard clock sources or baud rates are used.

Signed-off-by: Jakub Luzny <jakub.luzny@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/uart8250.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 142f8dc0934..141bd45c885 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -101,7 +101,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 	uart8250_in_freq   = in_freq;
 	uart8250_baudrate  = baudrate;
 
-	bdiv = uart8250_in_freq / (16 * uart8250_baudrate);
+	bdiv = (uart8250_in_freq + 8 * uart8250_baudrate) / (16 * uart8250_baudrate);
 
 	/* Disable all interrupts */
 	set_reg(UART_IER_OFFSET, 0x00);

From 01250d00447d3838e31c1fc67ce3acb1dd6b2682 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 5 Apr 2021 17:13:20 +0530
Subject: [PATCH 0931/1765] include: sbi: Add AIA related CSR defines

The RISC-V AIA specification improves handling of per-HART local
interrupts in a backward compatible manner. This patch adds defines
for the new RISC-V AIA CSRs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/riscv_encoding.h | 76 ++++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index ac8590d72e4..574d1c34902 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -173,6 +173,10 @@
 #define HGATP_MODE_SHIFT		HGATP32_MODE_SHIFT
 #endif
 
+#define TOPI_IID_SHIFT			16
+#define TOPI_IID_MASK			0xfff
+#define TOPI_IPRIO_MASK		0xff
+
 #if __riscv_xlen == 64
 #define MHPMEVENT_OF			(_UL(1) << 63)
 #define MHPMEVENT_MINH			(_UL(1) << 62)
@@ -304,6 +308,24 @@
 /* Supervisor Protection and Translation */
 #define CSR_SATP			0x180
 
+/* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
+#define CSR_SISELECT			0x150
+#define CSR_SIREG			0x151
+
+/* Supervisor-Level Interrupts (AIA) */
+#define CSR_STOPI			0xdb0
+
+/* Supervisor-Level IMSIC Interface (AIA) */
+#define CSR_SSETEIPNUM			0x158
+#define CSR_SCLREIPNUM			0x159
+#define CSR_SSETEIENUM			0x15a
+#define CSR_SCLREIENUM			0x15b
+#define CSR_STOPEI			0x15c
+
+/* Supervisor-Level High-Half CSRs (AIA) */
+#define CSR_SIEH			0x114
+#define CSR_SIPH			0x154
+
 /* ===== Hypervisor-level CSRs ===== */
 
 /* Hypervisor Trap Setup (H-extension) */
@@ -339,6 +361,35 @@
 #define CSR_VSIP			0x244
 #define CSR_VSATP			0x280
 
+/* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */
+#define CSR_HVIEN			0x608
+#define CSR_HVICTL			0x609
+#define CSR_HVIPRIO1			0x646
+#define CSR_HVIPRIO2			0x647
+
+/* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
+#define CSR_VSISELECT			0x250
+#define CSR_VSIREG			0x251
+
+/* VS-Level Interrupts (H-extension with AIA) */
+#define CSR_VSTOPI			0xeb0
+
+/* VS-Level IMSIC Interface (H-extension with AIA) */
+#define CSR_VSSETEIPNUM		0x258
+#define CSR_VSCLREIPNUM		0x259
+#define CSR_VSSETEIENUM		0x25a
+#define CSR_VSCLREIENUM		0x25b
+#define CSR_VSTOPEI			0x25c
+
+/* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
+#define CSR_HIDELEGH			0x613
+#define CSR_HVIENH			0x618
+#define CSR_HVIPH			0x655
+#define CSR_HVIPRIO1H			0x656
+#define CSR_HVIPRIO2H			0x657
+#define CSR_VSIEH			0x214
+#define CSR_VSIPH			0x254
+
 /* ===== Machine-level CSRs ===== */
 
 /* Machine Information Registers */
@@ -590,6 +641,31 @@
 #define CSR_DSCRATCH0			0x7b2
 #define CSR_DSCRATCH1			0x7b3
 
+/* Machine-Level Window to Indirectly Accessed Registers (AIA) */
+#define CSR_MISELECT			0x350
+#define CSR_MIREG			0x351
+
+/* Machine-Level Interrupts (AIA) */
+#define CSR_MTOPI			0xfb0
+
+/* Machine-Level IMSIC Interface (AIA) */
+#define CSR_MSETEIPNUM			0x358
+#define CSR_MCLREIPNUM			0x359
+#define CSR_MSETEIENUM			0x35a
+#define CSR_MCLREIENUM			0x35b
+#define CSR_MTOPEI			0x35c
+
+/* Virtual Interrupts for Supervisor Level (AIA) */
+#define CSR_MVIEN			0x308
+#define CSR_MVIP			0x309
+
+/* Machine-Level High-Half CSRs (AIA) */
+#define CSR_MIDELEGH			0x313
+#define CSR_MIEH			0x314
+#define CSR_MVIENH			0x318
+#define CSR_MVIPH			0x319
+#define CSR_MIPH			0x354
+
 /* ===== Trap/Exception Causes ===== */
 
 #define CAUSE_MISALIGNED_FETCH		0x0

From 8f9607006789512ceae703e82e62566873a83aaa Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Apr 2021 13:06:47 +0530
Subject: [PATCH 0932/1765] lib: sbi: Detect AIA CSRs at boot-time

We extend HART feature detection to discover AIA CSRs at boot-time.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h |  4 +++-
 lib/sbi/sbi_hart.c     | 11 +++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index d2db9d6e1fa..a83b45b985c 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -24,9 +24,11 @@ enum sbi_hart_features {
 	SBI_HART_HAS_SSCOFPMF = (1 << 3),
 	/** HART has timer csr implementation in hardware */
 	SBI_HART_HAS_TIME = (1 << 4),
+	/** HART has AIA local interrupt CSRs */
+	SBI_HART_HAS_AIA = (1 << 5),
 
 	/** Last index of Hart features*/
-	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
+	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_AIA,
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 36908b17244..e0285406256 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -301,6 +301,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_TIME:
 		fstr = "time";
 		break;
+	case SBI_HART_HAS_AIA:
+		fstr = "aia";
+		break;
 	default:
 		break;
 	}
@@ -524,6 +527,14 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
 		hfeatures->features |= SBI_HART_HAS_TIME;
+
+	/* Detect if hart has AIA local interrupt CSRs */
+	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
+	if (trap.cause)
+		goto __aia_skip;
+	hfeatures->features |= SBI_HART_HAS_AIA;
+__aia_skip:
+	return;
 }
 
 int sbi_hart_reinit(struct sbi_scratch *scratch)

From 65b4c7c01e7447c4d762af905a5051e13361b31e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Apr 2021 16:10:00 +0530
Subject: [PATCH 0933/1765] lib: sbi: Use AIA CSRs for local interrupts when
 available

We should use AIA CSRs to process local interrupts whenever AIA
is available.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_trap.c | 57 +++++++++++++++++++++++++++++++++++++---------
 1 file changed, 46 insertions(+), 11 deletions(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 8d20e04a564..bc8961fc6be 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -195,6 +195,44 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	return 0;
 }
 
+static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
+{
+	mcause &= ~(1UL << (__riscv_xlen - 1));
+	switch (mcause) {
+	case IRQ_M_TIMER:
+		sbi_timer_process();
+		break;
+	case IRQ_M_SOFT:
+		sbi_ipi_process();
+		break;
+	default:
+		return SBI_ENOENT;
+	};
+
+	return 0;
+}
+
+static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
+{
+	unsigned long mtopi;
+
+	while ((mtopi = csr_read(CSR_MTOPI))) {
+		mtopi = mtopi >> TOPI_IID_SHIFT;
+		switch (mtopi) {
+		case IRQ_M_TIMER:
+			sbi_timer_process();
+			break;
+		case IRQ_M_SOFT:
+			sbi_ipi_process();
+			break;
+		default:
+			return SBI_ENOENT;
+		}
+	}
+
+	return 0;
+}
+
 /**
  * Handle trap/interrupt
  *
@@ -225,18 +263,15 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 	}
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
-		mcause &= ~(1UL << (__riscv_xlen - 1));
-		switch (mcause) {
-		case IRQ_M_TIMER:
-			sbi_timer_process();
-			break;
-		case IRQ_M_SOFT:
-			sbi_ipi_process();
-			break;
-		default:
-			msg = "unhandled external interrupt";
+		if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(),
+					 SBI_HART_HAS_AIA))
+			rc = sbi_trap_aia_irq(regs, mcause);
+		else
+			rc = sbi_trap_nonaia_irq(regs, mcause);
+		if (rc) {
+			msg = "unhandled local interrupt";
 			goto trap_error;
-		};
+		}
 		return regs;
 	}
 

From 222132f48c8efd3b2c84b0883df18216b170bf3d Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Apr 2021 17:07:42 +0530
Subject: [PATCH 0934/1765] lib: sbi: Add sbi_trap_set_external_irqfn() API

This patch adds sbi_trap_set_external_irqfn() API which can be used by
OpenSBI platform code to set a callback function for external interrupts.
The RISC-V AIA IMSIC driver will use this API to implement inter-processor
interrupts on-top-of MSIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_trap.h |  2 ++
 lib/sbi/sbi_trap.c     | 29 +++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index d205056da1d..4f611fa4812 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -205,6 +205,8 @@ struct sbi_trap_info {
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_trap_info *trap);
 
+void sbi_trap_set_external_irqfn(int (*fn)(struct sbi_trap_regs *regs));
+
 struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
 
 void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs);
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index bc8961fc6be..faab90affb3 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -195,6 +195,27 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	return 0;
 }
 
+static int default_irqfn(struct sbi_trap_regs *regs)
+{
+	return SBI_ENODEV;
+}
+
+static int (*ext_irqfn)(struct sbi_trap_regs *regs) = default_irqfn;
+
+/**
+ * Set external irq handler function
+ *
+ * This function is called by OpenSBI platform code to set a handler for
+ * external interrupts
+ *
+ * @param fn function pointer for handling external irqs
+ */
+void sbi_trap_set_external_irqfn(int (*fn)(struct sbi_trap_regs *regs))
+{
+	if (fn)
+		ext_irqfn = fn;
+}
+
 static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 {
 	mcause &= ~(1UL << (__riscv_xlen - 1));
@@ -205,6 +226,8 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 	case IRQ_M_SOFT:
 		sbi_ipi_process();
 		break;
+	case IRQ_M_EXT:
+		return ext_irqfn(regs);
 	default:
 		return SBI_ENOENT;
 	};
@@ -214,6 +237,7 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 
 static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
 {
+	int rc;
 	unsigned long mtopi;
 
 	while ((mtopi = csr_read(CSR_MTOPI))) {
@@ -225,6 +249,11 @@ static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
 		case IRQ_M_SOFT:
 			sbi_ipi_process();
 			break;
+		case IRQ_M_EXT:
+			rc = ext_irqfn(regs);
+			if (rc)
+				return rc;
+			break;
 		default:
 			return SBI_ENOENT;
 		}

From 5f56314618d4733c83bb80c65f9181e952f051ed Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 20 Apr 2021 11:52:47 +0530
Subject: [PATCH 0935/1765] lib: utils/irqchip: Allow multiple FDT irqchip
 drivers

We can have multiple FDT irqchip drivers to be probed when a RISC-V
system has different types of interrupt controller in a hierarchy.

This will be certainly the case when a RISC-V system has both
RISC-V AIA IMSIC and RISC-V AIA APLIC implemented.

We extend simple FDT irqchip framework to allow multiple FDT
irqchip drivers to be used for same RISC-V platform.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/irqchip/fdt_irqchip.c | 37 ++++++++++++++++++++++++++-------
 1 file changed, 30 insertions(+), 7 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 8dda661ab1c..bf6969a1263 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -18,23 +18,40 @@ static struct fdt_irqchip *irqchip_drivers[] = {
 	&fdt_irqchip_plic
 };
 
-static struct fdt_irqchip *current_driver = NULL;
+#define FDT_IRQCHIP_MAX_DRIVERS	8
+
+static struct fdt_irqchip *current_drivers[FDT_IRQCHIP_MAX_DRIVERS] = {0};
+static int current_drivers_count;
 
 void fdt_irqchip_exit(void)
 {
-	if (current_driver && current_driver->exit)
-		current_driver->exit();
+	int i;
+
+	for (i = 0; i < current_drivers_count; i++) {
+		if (!current_drivers[i] || !current_drivers[i]->exit)
+			continue;
+		current_drivers[i]->exit();
+	}
 }
 
 static int fdt_irqchip_warm_init(void)
 {
-	if (current_driver && current_driver->warm_init)
-		return current_driver->warm_init();
+	int i, rc;
+
+	for (i = 0; i < current_drivers_count; i++) {
+		if (!current_drivers[i] || !current_drivers[i]->warm_init)
+			continue;
+		rc = current_drivers[i]->warm_init();
+		if (rc)
+			return rc;
+	}
+
 	return 0;
 }
 
 static int fdt_irqchip_cold_init(void)
 {
+	bool drv_added;
 	int pos, noff, rc;
 	struct fdt_irqchip *drv;
 	const struct fdt_match *match;
@@ -44,6 +61,7 @@ static int fdt_irqchip_cold_init(void)
 		drv = irqchip_drivers[pos];
 
 		noff = -1;
+		drv_added = false;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
 			if (drv->cold_init) {
@@ -53,10 +71,15 @@ static int fdt_irqchip_cold_init(void)
 				if (rc)
 					return rc;
 			}
-			current_driver = drv;
+
+			if (drv_added)
+				continue;
+
+			current_drivers[current_drivers_count++] = drv;
+			drv_added = true;
 		}
 
-		if (current_driver)
+		if (FDT_IRQCHIP_MAX_DRIVERS <= current_drivers_count)
 			break;
 	}
 

From 10509405b2722d25389280b7d914579a16e2eb7e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 29 Jun 2021 13:14:04 +0530
Subject: [PATCH 0936/1765] include: sbi: Introduce nascent_init() platform
 callback

We introduce nascent_init() platform callback which will allow
platforms to do very early initialization of platform specific
per-HART CSRs and per-HART devices.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_platform.h | 20 ++++++++++++++++++++
 lib/sbi/sbi_init.c         |  8 ++++++++
 2 files changed, 28 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 4d192f2a0ec..0b5ae4beeff 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -64,6 +64,9 @@ enum sbi_platform_features {
 
 /** Platform functions */
 struct sbi_platform_operations {
+	/* Platform nascent initialization */
+	int (*nascent_init)(void);
+
 	/** Platform early initialization */
 	int (*early_init)(bool cold_boot);
 	/** Platform final initialization */
@@ -299,6 +302,23 @@ static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
 	return FALSE;
 }
 
+/**
+ * Nascent (very early) initialization for current HART
+ *
+ * NOTE: This function can be used to do very early initialization of
+ * platform specific per-HART CSRs and devices.
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_nascent_init(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->nascent_init)
+		return sbi_platform_ops(plat)->nascent_init();
+	return 0;
+}
+
 /**
  * Early initialization for current HART
  *
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 83043c53901..27d03a7cdf9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -494,6 +494,14 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	if (next_mode_supported && atomic_xchg(&coldboot_lottery, 1) == 0)
 		coldboot = TRUE;
 
+	/*
+	 * Do platform specific nascent (very early) initialization so
+	 * that platform can initialize platform specific per-HART CSRs
+	 * or per-HART devices.
+	 */
+	if (sbi_platform_nascent_init(plat))
+		sbi_hart_hang();
+
 	if (coldboot)
 		init_coldboot(scratch, hartid);
 	else

From 55e79f823dfa65022a561d3078ac50d49262e246 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 29 Jun 2021 13:29:52 +0530
Subject: [PATCH 0937/1765] lib: sbi: Enable mie.MEIE bit for IPIs based on
 external interrupts.

We can have IPIs based on external interrupts provided by devices
such as AIA IMSIC so we should enable mie.MEIE bit at appropriate
places in generic library.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_hsm.c  | 4 ++--
 lib/sbi/sbi_init.c | 9 ++++++---
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index ecd2e45f174..c4d2c6d39ad 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -113,8 +113,8 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
 
-	/* Set MSIE bit to receive IPI */
-	csr_set(CSR_MIE, MIP_MSIP);
+	/* Set MSIE and MEIE bits to receive IPI */
+	csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
 
 	/* Wait for hart_add call*/
 	while (atomic_read(&hdata->state) != SBI_HSM_STATE_START_PENDING) {
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 27d03a7cdf9..6876eb2f0f2 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -165,8 +165,8 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
 
-	/* Set MSIE bit to receive IPI */
-	csr_set(CSR_MIE, MIP_MSIP);
+	/* Set MSIE and MEIE bits to receive IPI */
+	csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
 
 	/* Acquire coldboot lock */
 	spin_lock(&coldboot_lock);
@@ -182,7 +182,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		do {
 			wfi();
 			cmip = csr_read(CSR_MIP);
-		 } while (!(cmip & MIP_MSIP));
+		 } while (!(cmip & (MIP_MSIP | MIP_MEIP)));
 	};
 
 	/* Acquire coldboot lock */
@@ -276,6 +276,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 			   __func__, rc);
 		sbi_hart_hang();
 	}
+	csr_set(CSR_MIE, MIP_MEIP);
 
 	rc = sbi_ipi_init(scratch, TRUE);
 	if (rc) {
@@ -376,6 +377,7 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	rc = sbi_platform_irqchip_init(plat, FALSE);
 	if (rc)
 		sbi_hart_hang();
+	csr_set(CSR_MIE, MIP_MEIP);
 
 	rc = sbi_ipi_init(scratch, FALSE);
 	if (rc)
@@ -550,6 +552,7 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_ipi_exit(scratch);
 
+	csr_clear(CSR_MIE, MIP_MEIP);
 	sbi_platform_irqchip_exit(plat);
 
 	sbi_platform_final_exit(plat);

From 9f73669959dd8ec2f1261b639f9540799dc976a1 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 20 Apr 2021 16:33:40 +0530
Subject: [PATCH 0938/1765] lib: utils/irqchip: Add IMSIC library

We add simple IMSIC library which is independent of hardware description
format (FDT or ACPI). This IMSIC library can be used by custom OpenSBI
platform support to setup IMSIC for external interrupts.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/irqchip/imsic.h |  50 ++++++
 lib/utils/irqchip/imsic.c         | 287 ++++++++++++++++++++++++++++++
 lib/utils/irqchip/objects.mk      |   1 +
 3 files changed, 338 insertions(+)
 create mode 100644 include/sbi_utils/irqchip/imsic.h
 create mode 100644 lib/utils/irqchip/imsic.c

diff --git a/include/sbi_utils/irqchip/imsic.h b/include/sbi_utils/irqchip/imsic.h
new file mode 100644
index 00000000000..cffcb5ae298
--- /dev/null
+++ b/include/sbi_utils/irqchip/imsic.h
@@ -0,0 +1,50 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __IRQCHIP_IMSIC_H__
+#define __IRQCHIP_IMSIC_H__
+
+#include <sbi/sbi_types.h>
+
+#define IMSIC_MMIO_PAGE_SHIFT		12
+#define IMSIC_MMIO_PAGE_SZ		(1UL << IMSIC_MMIO_PAGE_SHIFT)
+
+#define IMSIC_MAX_REGS			16
+
+struct imsic_regs {
+	unsigned long addr;
+	unsigned long size;
+};
+
+struct imsic_data {
+	bool targets_mmode;
+	u32 guest_index_bits;
+	u32 hart_index_bits;
+	u32 group_index_bits;
+	u32 group_index_shift;
+	unsigned long num_ids;
+	struct imsic_regs regs[IMSIC_MAX_REGS];
+};
+
+int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file);
+
+struct imsic_data *imsic_get_data(u32 hartid);
+
+int imsic_get_target_file(u32 hartid);
+
+void imsic_local_irqchip_init(void);
+
+int imsic_warm_irqchip_init(void);
+
+int imsic_data_check(struct imsic_data *imsic);
+
+int imsic_cold_irqchip_init(struct imsic_data *imsic);
+
+#endif
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
new file mode 100644
index 00000000000..123d01f4b4c
--- /dev/null
+++ b/lib/utils/irqchip/imsic.c
@@ -0,0 +1,287 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
+#include <sbi_utils/irqchip/imsic.h>
+
+#define IMSIC_MMIO_PAGE_LE		0x00
+#define IMSIC_MMIO_PAGE_BE		0x04
+
+#define IMSIC_MIN_ID			63
+#define IMSIC_MAX_ID			2047
+
+#define IMSIC_EIDELIVERY		0x70
+
+#define IMSIC_EITHRESHOLD		0x72
+
+#define IMSIC_TOPEI			0x76
+#define IMSIC_TOPEI_ID_SHIFT		16
+#define IMSIC_TOPEI_ID_MASK		0x7ff
+#define IMSIC_TOPEI_PRIO_MASK		0x7ff
+
+#define IMSIC_EIP0			0x80
+
+#define IMSIC_EIP63			0xbf
+
+#define IMSIC_EIE0			0xc0
+
+#define IMSIC_EIE63			0xff
+
+#define IMSIC_DISABLE_EIDELIVERY	0
+#define IMSIC_ENABLE_EIDELIVERY		1
+#define IMSIC_DISABLE_EITHRESHOLD	1
+#define IMSIC_ENABLE_EITHRESHOLD	0
+
+#define IMSIC_IPI_ID			1
+
+#define imsic_csr_write(__c, __v)	\
+do { \
+	csr_write(CSR_MISELECT, __c); \
+	csr_write(CSR_MIREG, __v); \
+} while (0)
+
+#define imsic_csr_read(__c)	\
+({ \
+	unsigned long __v; \
+	csr_write(CSR_MISELECT, __c); \
+	__v = csr_read(CSR_MIREG); \
+	__v; \
+})
+
+static struct imsic_data *imsic_hartid2data[SBI_HARTMASK_MAX_BITS];
+static int imsic_hartid2file[SBI_HARTMASK_MAX_BITS];
+
+int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file)
+{
+	if (!imsic || !imsic->targets_mmode ||
+	    (SBI_HARTMASK_MAX_BITS <= hartid))
+		return SBI_EINVAL;
+
+	imsic_hartid2data[hartid] = imsic;
+	imsic_hartid2file[hartid] = file;
+	return 0;
+}
+
+struct imsic_data *imsic_get_data(u32 hartid)
+{
+	if (SBI_HARTMASK_MAX_BITS <= hartid)
+		return NULL;
+	return imsic_hartid2data[hartid];
+}
+
+int imsic_get_target_file(u32 hartid)
+{
+	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
+	    !imsic_hartid2data[hartid])
+		return SBI_ENOENT;
+	return imsic_hartid2file[hartid];
+}
+
+static int imsic_external_irqfn(struct sbi_trap_regs *regs)
+{
+	ulong mirq;
+
+	while ((mirq = csr_swap(CSR_MTOPEI, 0))) {
+		mirq = (mirq >> IMSIC_TOPEI_ID_SHIFT);
+
+		switch (mirq) {
+		case IMSIC_IPI_ID:
+			sbi_ipi_process();
+			break;
+		default:
+			sbi_printf("%s: unhandled IRQ%d\n",
+				   __func__, (u32)mirq);
+			break;
+		}
+	}
+
+	return 0;
+}
+
+static void imsic_ipi_send(u32 target_hart)
+{
+	unsigned long reloff;
+	struct imsic_regs *regs;
+	struct imsic_data *data = imsic_hartid2data[target_hart];
+	int file = imsic_hartid2file[target_hart];
+
+	if (!data || !data->targets_mmode)
+		return;
+
+	regs = &data->regs[0];
+	reloff = file * (1UL << data->guest_index_bits) * IMSIC_MMIO_PAGE_SZ;
+	while (regs->size && (regs->size <= reloff)) {
+		reloff -= regs->size;
+		regs++;
+	}
+
+	if (regs->size && (reloff < regs->size))
+		writel(IMSIC_IPI_ID,
+		       (void *)(regs->addr + reloff + IMSIC_MMIO_PAGE_LE));
+}
+
+static struct sbi_ipi_device imsic_ipi_device = {
+	.name		= "aia-imsic",
+	.ipi_send	= imsic_ipi_send
+};
+
+void imsic_local_irqchip_init(void)
+{
+	/*
+	 * This function is expected to be called from:
+	 * 1) nascent_init() platform callback which is called
+	 *    very early on each HART in boot-up path and and
+	 *    HSM resume path.
+	 * 2) irqchip_init() platform callback which is called
+	 *    in boot-up path.
+	 */
+
+	/* Setup threshold to allow all enabled interrupts */
+	imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
+
+	/* Enable interrupt delivery */
+	imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
+
+	/* Enable IPI */
+	csr_write(CSR_MSETEIENUM, IMSIC_IPI_ID);
+}
+
+int imsic_warm_irqchip_init(void)
+{
+	unsigned long i;
+	struct imsic_data *imsic = imsic_hartid2data[current_hartid()];
+
+	/* Sanity checks */
+	if (!imsic || !imsic->targets_mmode)
+		return SBI_EINVAL;
+
+	/* Disable all interrupts */
+	for (i = 1; i <= imsic->num_ids; i++)
+		csr_write(CSR_MCLREIENUM, i);
+
+	/* Clear IPI */
+	csr_write(CSR_MCLREIPNUM, IMSIC_IPI_ID);
+
+	/* Local IMSIC initialization */
+	imsic_local_irqchip_init();
+
+	return 0;
+}
+
+int imsic_data_check(struct imsic_data *imsic)
+{
+	u32 i, tmp;
+	unsigned long base_addr, addr, mask;
+
+	/* Sanity checks */
+	if (!imsic ||
+	    (imsic->num_ids < IMSIC_MIN_ID) ||
+	    (IMSIC_MAX_ID < imsic->num_ids))
+		return SBI_EINVAL;
+
+	tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT;
+	if (tmp < imsic->guest_index_bits)
+		return SBI_EINVAL;
+
+	tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+	      imsic->guest_index_bits;
+	if (tmp < imsic->hart_index_bits)
+		return SBI_EINVAL;
+
+	tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+	      imsic->guest_index_bits - imsic->hart_index_bits;
+	if (tmp < imsic->group_index_bits)
+		return SBI_EINVAL;
+
+	tmp = IMSIC_MMIO_PAGE_SHIFT + imsic->guest_index_bits +
+	      imsic->hart_index_bits;
+	if (imsic->group_index_shift < tmp)
+		return SBI_EINVAL;
+	tmp = imsic->group_index_bits + imsic->group_index_shift - 1;
+	if (tmp >= BITS_PER_LONG)
+		return SBI_EINVAL;
+
+	/*
+	 * Number of interrupt identities should be 1 less than
+	 * multiple of 63
+	 */
+	if ((imsic->num_ids & IMSIC_MIN_ID) != IMSIC_MIN_ID)
+		return SBI_EINVAL;
+
+	/* We should have at least one regset */
+	if (!imsic->regs[0].size)
+		return SBI_EINVAL;
+
+	/* Match patter of each regset */
+	base_addr = imsic->regs[0].addr;
+	base_addr &= ~((1UL << (imsic->guest_index_bits +
+				 imsic->hart_index_bits +
+				 IMSIC_MMIO_PAGE_SHIFT)) - 1);
+	base_addr &= ~(((1UL << imsic->group_index_bits) - 1) <<
+			imsic->group_index_shift);
+	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
+		mask = (1UL << imsic->guest_index_bits) * IMSIC_MMIO_PAGE_SZ;
+		mask -= 1UL;
+		if (imsic->regs[i].size & mask)
+			return SBI_EINVAL;
+
+		addr = imsic->regs[i].addr;
+		addr &= ~((1UL << (imsic->guest_index_bits +
+					 imsic->hart_index_bits +
+					 IMSIC_MMIO_PAGE_SHIFT)) - 1);
+		addr &= ~(((1UL << imsic->group_index_bits) - 1) <<
+				imsic->group_index_shift);
+		if (base_addr != addr)
+			return SBI_EINVAL;
+	}
+
+	return 0;
+}
+
+int imsic_cold_irqchip_init(struct imsic_data *imsic)
+{
+	int i, rc;
+	struct sbi_domain_memregion reg;
+
+	/* Sanity checks */
+	rc = imsic_data_check(imsic);
+	if (rc)
+		return rc;
+
+	/* We only initialize M-mode IMSIC */
+	if (!imsic->targets_mmode)
+		return SBI_EINVAL;
+
+	/* Setup external interrupt function for IMSIC */
+	sbi_trap_set_external_irqfn(imsic_external_irqfn);
+
+	/* Add IMSIC regions to the root domain */
+	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
+		sbi_domain_memregion_init(imsic->regs[i].addr,
+					  imsic->regs[i].size,
+					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+	}
+
+	/* Register IPI device */
+	sbi_ipi_set_device(&imsic_ipi_device);
+
+	return 0;
+}
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index 934f706b611..76a3c94149d 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -9,4 +9,5 @@
 
 libsbiutils-objs-y += irqchip/fdt_irqchip.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
+libsbiutils-objs-y += irqchip/imsic.o
 libsbiutils-objs-y += irqchip/plic.o

From 811da5c54180aafde6cb7740b1ccaf92d1017f24 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 21 Apr 2021 15:27:29 +0530
Subject: [PATCH 0939/1765] lib: utils/irqchip: Add FDT based driver for IMSIC

We add simple FDT irqchip driver for IMSIC so that generic platform
(and other FDT based platforms) can utilize common IMIC library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/fdt/fdt_helper.h    |   6 ++
 lib/utils/fdt/fdt_helper.c            | 103 +++++++++++++++++++++++++
 lib/utils/irqchip/fdt_irqchip.c       |   2 +
 lib/utils/irqchip/fdt_irqchip_imsic.c | 106 ++++++++++++++++++++++++++
 lib/utils/irqchip/objects.mk          |   1 +
 platform/generic/platform.c           |  12 +++
 6 files changed, 230 insertions(+)
 create mode 100644 lib/utils/irqchip/fdt_irqchip_imsic.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 24fee7a339c..4c8d29e7802 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -68,6 +68,12 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
+struct imsic_data;
+
+bool fdt_check_imsic_mlevel(void *fdt);
+
+int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic);
+
 struct plic_data;
 
 int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 5bf40216680..e179b79ecc6 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/imsic.h>
 #include <sbi_utils/irqchip/plic.h>
 
 #define DEFAULT_UART_FREQ		0
@@ -465,6 +466,108 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
 }
 
+bool fdt_check_imsic_mlevel(void *fdt)
+{
+	const fdt32_t *val;
+	int i, len, noff = 0;
+
+	if (!fdt)
+		return false;
+
+	while ((noff = fdt_node_offset_by_compatible(fdt, noff,
+						     "riscv,imsics")) >= 0) {
+		val = fdt_getprop(fdt, noff, "interrupts-extended", &len);
+		if (val && len > sizeof(fdt32_t)) {
+			len = len / sizeof(fdt32_t);
+			for (i = 0; i < len; i += 2) {
+				if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT)
+					return true;
+			}
+		}
+	}
+
+	return false;
+}
+
+int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic)
+{
+	const fdt32_t *val;
+	struct imsic_regs *regs;
+	uint64_t reg_addr, reg_size;
+	int i, rc, len, nr_parent_irqs;
+
+	if (nodeoff < 0 || !imsic || !fdt)
+		return SBI_ENODEV;
+
+	imsic->targets_mmode = false;
+	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &len);
+	if (val && len > sizeof(fdt32_t)) {
+		len = len / sizeof(fdt32_t);
+		nr_parent_irqs = len / 2;
+		for (i = 0; i < len; i += 2) {
+			if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT) {
+				imsic->targets_mmode = true;
+				break;
+			}
+		}
+	} else
+		return SBI_EINVAL;
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,guest-index-bits", &len);
+	if (val && len > 0)
+		imsic->guest_index_bits = fdt32_to_cpu(*val);
+	else
+		imsic->guest_index_bits = 0;
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,hart-index-bits", &len);
+	if (val && len > 0) {
+		imsic->hart_index_bits = fdt32_to_cpu(*val);
+	} else {
+		imsic->hart_index_bits = sbi_fls(nr_parent_irqs);
+		if ((1UL << imsic->hart_index_bits) < nr_parent_irqs)
+			imsic->hart_index_bits++;
+	}
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,group-index-bits", &len);
+	if (val && len > 0)
+		imsic->group_index_bits = fdt32_to_cpu(*val);
+	else
+		imsic->group_index_bits = 0;
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,group-index-shift", &len);
+	if (val && len > 0)
+		imsic->group_index_shift = fdt32_to_cpu(*val);
+	else
+		imsic->group_index_shift = 2 * IMSIC_MMIO_PAGE_SHIFT;
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,num-ids", &len);
+	if (val && len > 0)
+		imsic->num_ids = fdt32_to_cpu(*val);
+	else
+		return SBI_EINVAL;
+
+	for (i = 0; i < IMSIC_MAX_REGS; i++) {
+		regs = &imsic->regs[i];
+		regs->addr = 0;
+		regs->size = 0;
+	}
+
+	for (i = 0; i < (IMSIC_MAX_REGS - 1); i++) {
+		regs = &imsic->regs[i];
+
+		rc = fdt_get_node_addr_size(fdt, nodeoff, i,
+					    &reg_addr, &reg_size);
+		if (rc < 0 || !reg_addr || !reg_size)
+			break;
+		regs->addr = reg_addr;
+		regs->size = reg_size;
+	};
+	if (!imsic->regs[0].size)
+		return SBI_EINVAL;
+
+	return 0;
+}
+
 int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 {
 	int len, rc;
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index bf6969a1263..cf64a2e092c 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -12,9 +12,11 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 
+extern struct fdt_irqchip fdt_irqchip_imsic;
 extern struct fdt_irqchip fdt_irqchip_plic;
 
 static struct fdt_irqchip *irqchip_drivers[] = {
+	&fdt_irqchip_imsic,
 	&fdt_irqchip_plic
 };
 
diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
new file mode 100644
index 00000000000..b6962be7473
--- /dev/null
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -0,0 +1,106 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/irqchip/imsic.h>
+
+#define IMSIC_MAX_NR			16
+
+static unsigned long imsic_count = 0;
+static struct imsic_data imsic[IMSIC_MAX_NR];
+
+static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
+					     struct imsic_data *id)
+{
+	const fdt32_t *val;
+	u32 phandle, hwirq, hartid;
+	int i, err, count, cpu_offset, cpu_intc_offset;
+
+	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
+	if (!val || count < sizeof(fdt32_t))
+		return SBI_EINVAL;
+	count = count / sizeof(fdt32_t);
+
+	for (i = 0; i < count; i += 2) {
+		phandle = fdt32_to_cpu(val[i]);
+		hwirq = fdt32_to_cpu(val[i + 1]);
+
+		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			return SBI_EINVAL;
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			return SBI_EINVAL;
+
+		switch (hwirq) {
+		case IRQ_M_EXT:
+			err = imsic_map_hartid_to_data(hartid, id, i / 2);
+			if (err)
+				return err;
+			break;
+		default:
+			break;
+		}
+	}
+
+	return 0;
+}
+
+static int irqchip_imsic_cold_init(void *fdt, int nodeoff,
+				    const struct fdt_match *match)
+{
+	int rc;
+	struct imsic_data *id;
+
+	if (IMSIC_MAX_NR <= imsic_count)
+		return SBI_ENOSPC;
+	id = &imsic[imsic_count];
+
+	rc = fdt_parse_imsic_node(fdt, nodeoff, id);
+	if (rc)
+		return rc;
+	if (!id->targets_mmode)
+		return 0;
+
+	rc = irqchip_imsic_update_hartid_table(fdt, nodeoff, id);
+	if (rc)
+		return rc;
+
+	rc = imsic_cold_irqchip_init(id);
+	if (rc)
+		return rc;
+
+	imsic_count++;
+
+	return 0;
+}
+
+static const struct fdt_match irqchip_imsic_match[] = {
+	{ .compatible = "riscv,imsics" },
+	{ },
+};
+
+struct fdt_irqchip fdt_irqchip_imsic = {
+	.match_table = irqchip_imsic_match,
+	.cold_init = irqchip_imsic_cold_init,
+	.warm_init = imsic_warm_irqchip_init,
+};
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index 76a3c94149d..ae6f25575e2 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -8,6 +8,7 @@
 #
 
 libsbiutils-objs-y += irqchip/fdt_irqchip.o
+libsbiutils-objs-y += irqchip/fdt_irqchip_imsic.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
 libsbiutils-objs-y += irqchip/imsic.o
 libsbiutils-objs-y += irqchip/plic.o
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index bc6e761e88f..8a4fb702452 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -18,6 +18,7 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_pmu.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/irqchip/imsic.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
@@ -56,6 +57,7 @@ static void fw_platform_lookup_special(void *fdt, int root_offset)
 }
 
 extern struct sbi_platform platform;
+static bool platform_has_mlevel_imsic = false;
 static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
 
 /*
@@ -110,6 +112,8 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 	platform.hart_count = hart_count;
 
+	platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
+
 	/* Return original FDT pointer */
 	return arg1;
 
@@ -118,6 +122,13 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 		wfi();
 }
 
+static int generic_nascent_init(void)
+{
+	if (platform_has_mlevel_imsic)
+		imsic_local_irqchip_init();
+	return 0;
+}
+
 static int generic_early_init(bool cold_boot)
 {
 	if (!generic_plat || !generic_plat->early_init)
@@ -210,6 +221,7 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
 }
 
 const struct sbi_platform_operations platform_ops = {
+	.nascent_init		= generic_nascent_init,
 	.early_init		= generic_early_init,
 	.final_init		= generic_final_init,
 	.early_exit		= generic_early_exit,

From 7127aaaaf709c0a5a08b70e993a135b27eb50006 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 15 Jun 2021 11:19:40 +0530
Subject: [PATCH 0940/1765] lib: utils: Disable appropriate IMSIC DT nodes in
 fdt_fixups()

We should disable IMSIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/fdt/fdt_fixup.h | 17 ++++++++++++++--
 lib/utils/fdt/fdt_fixup.c         | 32 +++++++++++++++++++++++++++++--
 2 files changed, 45 insertions(+), 4 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index c38e5d91e95..77575bb8740 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -21,6 +21,18 @@
  */
 void fdt_cpu_fixup(void *fdt);
 
+/**
+ * Fix up the IMSIC nodes in the device tree
+ *
+ * This routine disables IMSIC nodes which are not accessible to the next
+ * booting stage based on currently assigned domain.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_imsic_fixup(void *fdt);
+
 /**
  * Fix up the PLIC node in the device tree
  *
@@ -64,8 +76,9 @@ int fdt_reserved_memory_nomap_fixup(void *fdt);
  * General device tree fix-up
  *
  * This routine do all required device tree fix-ups for a typical platform.
- * It fixes up the PLIC node and the reserved memory node in the device tree
- * by calling the corresponding helper routines to accomplish the task.
+ * It fixes up the PLIC node, IMSIC nodes, and the reserved memory node in
+ * the device tree by calling the corresponding helper routines to accomplish
+ * the task.
  *
  * It is recommended that platform codes call this helper in their final_init()
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index ac01ba3dfac..c2460b8d136 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -52,6 +52,34 @@ void fdt_cpu_fixup(void *fdt)
 	}
 }
 
+static void fdt_domain_based_fixup_one(void *fdt, int nodeoff)
+{
+	int rc;
+	uint64_t reg_addr, reg_size;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return;
+
+	if (!sbi_domain_check_addr(dom, reg_addr, dom->next_mode,
+				    SBI_DOMAIN_READ | SBI_DOMAIN_WRITE)) {
+		rc = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
+		if (rc < 0)
+			return;
+		fdt_setprop_string(fdt, nodeoff, "status", "disabled");
+	}
+}
+
+void fdt_imsic_fixup(void *fdt)
+{
+	int noff = 0;
+
+	while ((noff = fdt_node_offset_by_compatible(fdt, noff,
+						     "riscv,imsics")) >= 0)
+		fdt_domain_based_fixup_one(fdt, noff);
+}
+
 void fdt_plic_fixup(void *fdt)
 {
 	u32 *cells;
@@ -261,10 +289,10 @@ int fdt_reserved_memory_nomap_fixup(void *fdt)
 
 void fdt_fixups(void *fdt)
 {
+	fdt_imsic_fixup(fdt);
+
 	fdt_plic_fixup(fdt);
 
 	fdt_reserved_memory_fixup(fdt);
 	fdt_pmu_fixup(fdt);
 }
-
-

From 99792653de29172890ace48e848330d389311199 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 8 Apr 2021 11:28:02 +0530
Subject: [PATCH 0941/1765] lib: utils/irqchip: Add APLIC initialization
 library

We add simple APLIC initialization library which is independent of
hardware description format (FDT or ACPI). This APLIC initialization
library can be used by custom OpenSBI platform support to setup
APLIC domains.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/irqchip/aplic.h |  47 +++++
 lib/utils/irqchip/aplic.c         | 279 ++++++++++++++++++++++++++++++
 lib/utils/irqchip/objects.mk      |   1 +
 3 files changed, 327 insertions(+)
 create mode 100644 include/sbi_utils/irqchip/aplic.h
 create mode 100644 lib/utils/irqchip/aplic.c

diff --git a/include/sbi_utils/irqchip/aplic.h b/include/sbi_utils/irqchip/aplic.h
new file mode 100644
index 00000000000..82682e8a75a
--- /dev/null
+++ b/include/sbi_utils/irqchip/aplic.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __IRQCHIP_APLIC_H__
+#define __IRQCHIP_APLIC_H__
+
+#include <sbi/sbi_types.h>
+
+#define APLIC_MAX_DELEGATE	16
+
+struct aplic_msicfg_data {
+	unsigned long lhxs;
+	unsigned long lhxw;
+	unsigned long hhxs;
+	unsigned long hhxw;
+	unsigned long base_addr;
+};
+
+struct aplic_delegate_data {
+	u32 first_irq;
+	u32 last_irq;
+	u32 child_index;
+};
+
+struct aplic_data {
+	unsigned long addr;
+	unsigned long size;
+	unsigned long num_idc;
+	unsigned long num_source;
+	bool targets_mmode;
+	bool has_msicfg_mmode;
+	struct aplic_msicfg_data msicfg_mmode;
+	bool has_msicfg_smode;
+	struct aplic_msicfg_data msicfg_smode;
+	struct aplic_delegate_data delegate[APLIC_MAX_DELEGATE];
+};
+
+int aplic_cold_irqchip_init(struct aplic_data *aplic);
+
+#endif
diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
new file mode 100644
index 00000000000..0a8469b618b
--- /dev/null
+++ b/lib/utils/irqchip/aplic.c
@@ -0,0 +1,279 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/irqchip/aplic.h>
+
+#define APLIC_MAX_IDC			(1UL << 14)
+#define APLIC_MAX_SOURCE		1024
+
+#define APLIC_DOMAINCFG		0x0000
+#define APLIC_DOMAINCFG_IE		(1 << 8)
+#define APLIC_DOMAINCFG_DM		(1 << 2)
+#define APLIC_DOMAINCFG_BE		(1 << 0)
+
+#define APLIC_SOURCECFG_BASE		0x0004
+#define APLIC_SOURCECFG_D		(1 << 10)
+#define APLIC_SOURCECFG_CHILDIDX_MASK	0x000003ff
+#define APLIC_SOURCECFG_SM_MASK	0x00000007
+#define APLIC_SOURCECFG_SM_INACTIVE	0x0
+#define APLIC_SOURCECFG_SM_DETACH	0x1
+#define APLIC_SOURCECFG_SM_EDGE_RISE	0x4
+#define APLIC_SOURCECFG_SM_EDGE_FALL	0x5
+#define APLIC_SOURCECFG_SM_LEVEL_HIGH	0x6
+#define APLIC_SOURCECFG_SM_LEVEL_LOW	0x7
+
+#define APLIC_MMSICFGADDR		0x1bc0
+#define APLIC_MMSICFGADDRH		0x1bc4
+#define APLIC_SMSICFGADDR		0x1bc8
+#define APLIC_SMSICFGADDRH		0x1bcc
+
+#define APLIC_xMSICFGADDRH_L		(1UL << 31)
+#define APLIC_xMSICFGADDRH_HHXS_MASK	0x1f
+#define APLIC_xMSICFGADDRH_HHXS_SHIFT	24
+#define APLIC_xMSICFGADDRH_LHXS_MASK	0x7
+#define APLIC_xMSICFGADDRH_LHXS_SHIFT	20
+#define APLIC_xMSICFGADDRH_HHXW_MASK	0x7
+#define APLIC_xMSICFGADDRH_HHXW_SHIFT	16
+#define APLIC_xMSICFGADDRH_LHXW_MASK	0xf
+#define APLIC_xMSICFGADDRH_LHXW_SHIFT	12
+#define APLIC_xMSICFGADDRH_BAPPN_MASK	0xfff
+
+#define APLIC_xMSICFGADDR_PPN_SHIFT	12
+
+#define APLIC_xMSICFGADDR_PPN_HART(__lhxs) \
+	((1UL << (__lhxs)) - 1)
+
+#define APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) \
+	((1UL << (__lhxw)) - 1)
+#define APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs) \
+	((__lhxs))
+#define APLIC_xMSICFGADDR_PPN_LHX(__lhxw, __lhxs) \
+	(APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) << \
+	 APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs))
+
+#define APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) \
+	((1UL << (__hhxw)) - 1)
+#define APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs) \
+	((__hhxs) + APLIC_xMSICFGADDR_PPN_SHIFT)
+#define APLIC_xMSICFGADDR_PPN_HHX(__hhxw, __hhxs) \
+	(APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \
+	 APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))
+
+#define APLIC_SETIP_BASE		0x1c00
+#define APLIC_SETIPNUM			0x1cdc
+
+#define APLIC_CLRIP_BASE		0x1d00
+#define APLIC_CLRIPNUM			0x1ddc
+
+#define APLIC_SETIE_BASE		0x1e00
+#define APLIC_SETIENUM			0x1edc
+
+#define APLIC_CLRIE_BASE		0x1f00
+#define APLIC_CLRIENUM			0x1fdc
+
+#define APLIC_SETIPNUM_LE		0x2000
+#define APLIC_SETIPNUM_BE		0x2004
+
+#define APLIC_TARGET_BASE		0x3004
+#define APLIC_TARGET_HART_IDX_SHIFT	18
+#define APLIC_TARGET_HART_IDX_MASK	0x3fff
+#define APLIC_TARGET_GUEST_IDX_SHIFT	12
+#define APLIC_TARGET_GUEST_IDX_MASK	0x3f
+#define APLIC_TARGET_IPRIO_MASK	0xff
+#define APLIC_TARGET_EIID_MASK	0x7ff
+
+#define APLIC_IDC_BASE			0x4000
+#define APLIC_IDC_SIZE			32
+
+#define APLIC_IDC_IDELIVERY		0x00
+
+#define APLIC_IDC_IFORCE		0x04
+
+#define APLIC_IDC_ITHRESHOLD		0x08
+
+#define APLIC_IDC_TOPI			0x18
+#define APLIC_IDC_TOPI_ID_SHIFT	16
+#define APLIC_IDC_TOPI_ID_MASK	0x3ff
+#define APLIC_IDC_TOPI_PRIO_MASK	0xff
+
+#define APLIC_IDC_CLAIMI		0x1c
+
+#define APLIC_DEFAULT_PRIORITY		1
+#define APLIC_DISABLE_IDELIVERY		0
+#define APLIC_ENABLE_IDELIVERY		1
+#define APLIC_DISABLE_ITHRESHOLD	1
+#define APLIC_ENABLE_ITHRESHOLD		0
+
+static void aplic_writel_msicfg(struct aplic_msicfg_data *msicfg,
+				void *msicfgaddr, void *msicfgaddrH)
+{
+	u32 val;
+	unsigned long base_ppn;
+
+	/* Check if MSI config is already locked */
+	if (readl(msicfgaddrH) & APLIC_xMSICFGADDRH_L)
+		return;
+
+	/* Compute the MSI base PPN */
+	base_ppn = msicfg->base_addr >> APLIC_xMSICFGADDR_PPN_SHIFT;
+	base_ppn &= ~APLIC_xMSICFGADDR_PPN_HART(msicfg->lhxs);
+	base_ppn &= ~APLIC_xMSICFGADDR_PPN_LHX(msicfg->lhxw, msicfg->lhxs);
+	base_ppn &= ~APLIC_xMSICFGADDR_PPN_HHX(msicfg->hhxw, msicfg->hhxs);
+
+	/* Write the lower MSI config register */
+	writel((u32)base_ppn, msicfgaddr);
+
+	/* Write the upper MSI config register */
+	val = (((u64)base_ppn) >> 32) &
+		APLIC_xMSICFGADDRH_BAPPN_MASK;
+	val |= (msicfg->lhxw & APLIC_xMSICFGADDRH_LHXW_MASK)
+		<< APLIC_xMSICFGADDRH_LHXW_SHIFT;
+	val |= (msicfg->hhxw & APLIC_xMSICFGADDRH_HHXW_MASK)
+		<< APLIC_xMSICFGADDRH_HHXW_SHIFT;
+	val |= (msicfg->lhxs & APLIC_xMSICFGADDRH_LHXS_MASK)
+		<< APLIC_xMSICFGADDRH_LHXS_SHIFT;
+	val |= (msicfg->hhxs & APLIC_xMSICFGADDRH_HHXS_MASK)
+		<< APLIC_xMSICFGADDRH_HHXS_SHIFT;
+	writel(val, msicfgaddrH);
+}
+
+static int aplic_check_msicfg(struct aplic_msicfg_data *msicfg)
+{
+	if (APLIC_xMSICFGADDRH_LHXS_MASK < msicfg->lhxs)
+		return SBI_EINVAL;
+
+	if (APLIC_xMSICFGADDRH_LHXW_MASK < msicfg->lhxw)
+		return SBI_EINVAL;
+
+	if (APLIC_xMSICFGADDRH_HHXS_MASK < msicfg->hhxs)
+		return SBI_EINVAL;
+
+	if (APLIC_xMSICFGADDRH_HHXW_MASK < msicfg->hhxw)
+		return SBI_EINVAL;
+
+	return 0;
+}
+
+int aplic_cold_irqchip_init(struct aplic_data *aplic)
+{
+	int rc;
+	u32 i, j, tmp;
+	struct sbi_domain_memregion reg;
+	struct aplic_delegate_data *deleg;
+	u32 first_deleg_irq, last_deleg_irq;
+
+	/* Sanity checks */
+	if (!aplic ||
+	    !aplic->num_source || APLIC_MAX_SOURCE <= aplic->num_source ||
+	    APLIC_MAX_IDC <= aplic->num_idc)
+		return SBI_EINVAL;
+	if (aplic->targets_mmode && aplic->has_msicfg_mmode) {
+		rc = aplic_check_msicfg(&aplic->msicfg_mmode);
+		if (rc)
+			return rc;
+	}
+	if (aplic->targets_mmode && aplic->has_msicfg_smode) {
+		rc = aplic_check_msicfg(&aplic->msicfg_smode);
+		if (rc)
+			return rc;
+	}
+
+	/* Set domain configuration to 0 */
+	writel(0, (void *)(aplic->addr + APLIC_DOMAINCFG));
+
+	/* Disable all interrupts */
+	for (i = 0; i <= aplic->num_source; i++)
+		writel(-1U, (void *)(aplic->addr + APLIC_CLRIE_BASE +
+				     (i / 32) * sizeof(u32)));
+
+	/* Set interrupt type and priority for all interrupts */
+	for (i = 1; i <= aplic->num_source; i++) {
+		/* Set IRQ source configuration to 0 */
+		writel(0, (void *)(aplic->addr + APLIC_SOURCECFG_BASE +
+			  (i - 1) * sizeof(u32)));
+		/* Set IRQ target hart index and priority to 1 */
+		writel(APLIC_DEFAULT_PRIORITY, (void *)(aplic->addr +
+						APLIC_TARGET_BASE +
+						(i - 1) * sizeof(u32)));
+	}
+
+	/* Configure IRQ delegation */
+	first_deleg_irq = -1U;
+	last_deleg_irq = 0;
+	for (i = 0; i < APLIC_MAX_DELEGATE; i++) {
+		deleg = &aplic->delegate[i];
+		if (!deleg->first_irq || !deleg->last_irq)
+			continue;
+		if (aplic->num_source < deleg->first_irq ||
+		    aplic->num_source < deleg->last_irq)
+			continue;
+		if (APLIC_SOURCECFG_CHILDIDX_MASK < deleg->child_index)
+			continue;
+		if (deleg->first_irq > deleg->last_irq) {
+			tmp = deleg->first_irq;
+			deleg->first_irq = deleg->last_irq;
+			deleg->last_irq = tmp;
+		}
+		if (deleg->first_irq < first_deleg_irq)
+			first_deleg_irq = deleg->first_irq;
+		if (last_deleg_irq < deleg->last_irq)
+			last_deleg_irq = deleg->last_irq;
+		for (j = deleg->first_irq; j <= deleg->last_irq; j++)
+			writel(APLIC_SOURCECFG_D | deleg->child_index,
+				(void *)(aplic->addr + APLIC_SOURCECFG_BASE +
+				(j - 1) * sizeof(u32)));
+	}
+
+	/* Default initialization of IDC structures */
+	for (i = 0; i < aplic->num_idc; i++) {
+		writel(0, (void *)(aplic->addr + APLIC_IDC_BASE +
+			  i * APLIC_IDC_SIZE + APLIC_IDC_IDELIVERY));
+		writel(0, (void *)(aplic->addr + APLIC_IDC_BASE +
+			  i * APLIC_IDC_SIZE + APLIC_IDC_IFORCE));
+		writel(APLIC_DISABLE_ITHRESHOLD, (void *)(aplic->addr +
+						  APLIC_IDC_BASE +
+						  (i * APLIC_IDC_SIZE) +
+						  APLIC_IDC_ITHRESHOLD));
+	}
+
+	/* MSI configuration */
+	if (aplic->targets_mmode && aplic->has_msicfg_mmode) {
+		aplic_writel_msicfg(&aplic->msicfg_mmode,
+				(void *)(aplic->addr + APLIC_MMSICFGADDR),
+				(void *)(aplic->addr + APLIC_MMSICFGADDRH));
+	}
+	if (aplic->targets_mmode && aplic->has_msicfg_smode) {
+		aplic_writel_msicfg(&aplic->msicfg_smode,
+				(void *)(aplic->addr + APLIC_SMSICFGADDR),
+				(void *)(aplic->addr + APLIC_SMSICFGADDRH));
+	}
+
+	/*
+	 * Add APLIC region to the root domain if:
+	 * 1) It targets M-mode of any HART directly or via MSIs
+	 * 2) All interrupts are delegated to some child APLIC
+	 */
+	if (aplic->targets_mmode ||
+	    ((first_deleg_irq < last_deleg_irq) &&
+	    (last_deleg_irq == aplic->num_source) &&
+	    (first_deleg_irq == 1))) {
+		sbi_domain_memregion_init(aplic->addr, aplic->size,
+					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+	}
+
+	return 0;
+}
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index ae6f25575e2..b2b3f798ebb 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -10,5 +10,6 @@
 libsbiutils-objs-y += irqchip/fdt_irqchip.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_imsic.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
+libsbiutils-objs-y += irqchip/aplic.o
 libsbiutils-objs-y += irqchip/imsic.o
 libsbiutils-objs-y += irqchip/plic.o

From 34612193af92f29446a3d59bc4f983c9cfe4b989 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 8 Apr 2021 18:10:16 +0530
Subject: [PATCH 0942/1765] lib: utils/irqchip: Add FDT based driver for APLIC

We add simple FDT irqchip driver for APLIC so that generic platform (and
other FDT based platforms) can utilize common APLIC initialization library.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/fdt/fdt_helper.h    |   4 +
 lib/utils/fdt/fdt_helper.c            | 159 ++++++++++++++++++++++++++
 lib/utils/irqchip/fdt_irqchip.c       |   2 +
 lib/utils/irqchip/fdt_irqchip_aplic.c |  56 +++++++++
 lib/utils/irqchip/objects.mk          |   1 +
 5 files changed, 222 insertions(+)
 create mode 100644 lib/utils/irqchip/fdt_irqchip_aplic.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 4c8d29e7802..1232b26dfd5 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -68,6 +68,10 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
+struct aplic_data;
+
+int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic);
+
 struct imsic_data;
 
 bool fdt_check_imsic_mlevel(void *fdt);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index e179b79ecc6..3a306cbd5b9 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/aplic.h>
 #include <sbi_utils/irqchip/imsic.h>
 #include <sbi_utils/irqchip/plic.h>
 
@@ -466,6 +467,164 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
 }
 
+int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
+{
+	bool child_found;
+	const fdt32_t *val;
+	const fdt32_t *del;
+	struct imsic_data imsic;
+	int i, j, d, dcnt, len, noff, rc;
+	uint64_t reg_addr, reg_size;
+	struct aplic_delegate_data *deleg;
+
+	if (nodeoff < 0 || !aplic || !fdt)
+		return SBI_ENODEV;
+	memset(aplic, 0, sizeof(*aplic));
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	aplic->addr = reg_addr;
+	aplic->size = reg_size;
+
+	val = fdt_getprop(fdt, nodeoff, "riscv,num-sources", &len);
+	if (len > 0)
+		aplic->num_source = fdt32_to_cpu(*val);
+
+	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &len);
+	if (val && len > sizeof(fdt32_t)) {
+		len = len / sizeof(fdt32_t);
+		for (i = 0; i < len; i += 2) {
+			if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT) {
+				aplic->targets_mmode = true;
+				break;
+			}
+		}
+		aplic->num_idc = len / 2;
+		goto aplic_msi_parent_done;
+	}
+
+	val = fdt_getprop(fdt, nodeoff, "msi-parent", &len);
+	if (val && len >= sizeof(fdt32_t)) {
+		noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
+		if (noff < 0)
+			return noff;
+
+		rc = fdt_parse_imsic_node(fdt, noff, &imsic);
+		if (rc)
+			return rc;
+
+		rc = imsic_data_check(&imsic);
+		if (rc)
+			return rc;
+
+		aplic->targets_mmode = imsic.targets_mmode;
+
+		if (imsic.targets_mmode) {
+			aplic->has_msicfg_mmode = true;
+			aplic->msicfg_mmode.lhxs = imsic.guest_index_bits;
+			aplic->msicfg_mmode.lhxw = imsic.hart_index_bits;
+			aplic->msicfg_mmode.hhxw = imsic.group_index_bits;
+			aplic->msicfg_mmode.hhxs = imsic.group_index_shift;
+			if (aplic->msicfg_mmode.hhxs <
+					(2 * IMSIC_MMIO_PAGE_SHIFT))
+				return SBI_EINVAL;
+			aplic->msicfg_mmode.hhxs -= 24;
+			aplic->msicfg_mmode.base_addr = imsic.regs[0].addr;
+		} else {
+			goto aplic_msi_parent_done;
+		}
+
+		val = fdt_getprop(fdt, nodeoff, "riscv,children", &len);
+		if (!val || len < sizeof(fdt32_t))
+			goto aplic_msi_parent_done;
+
+		noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
+		if (noff < 0)
+			return noff;
+
+		val = fdt_getprop(fdt, noff, "msi-parent", &len);
+		if (!val || len < sizeof(fdt32_t))
+			goto aplic_msi_parent_done;
+
+		noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
+		if (noff < 0)
+			return noff;
+
+		rc = fdt_parse_imsic_node(fdt, noff, &imsic);
+		if (rc)
+			return rc;
+
+		rc = imsic_data_check(&imsic);
+		if (rc)
+			return rc;
+
+		if (!imsic.targets_mmode) {
+			aplic->has_msicfg_smode = true;
+			aplic->msicfg_smode.lhxs = imsic.guest_index_bits;
+			aplic->msicfg_smode.lhxw = imsic.hart_index_bits;
+			aplic->msicfg_smode.hhxw = imsic.group_index_bits;
+			aplic->msicfg_smode.hhxs = imsic.group_index_shift;
+			if (aplic->msicfg_smode.hhxs <
+					(2 * IMSIC_MMIO_PAGE_SHIFT))
+				return SBI_EINVAL;
+			aplic->msicfg_smode.hhxs -= 24;
+			aplic->msicfg_smode.base_addr = imsic.regs[0].addr;
+		}
+	}
+aplic_msi_parent_done:
+
+	for (d = 0; d < APLIC_MAX_DELEGATE; d++) {
+		deleg = &aplic->delegate[d];
+		deleg->first_irq = 0;
+		deleg->last_irq = 0;
+		deleg->child_index = 0;
+	}
+
+	del = fdt_getprop(fdt, nodeoff, "riscv,delegate", &len);
+	if (!del || len < (3 * sizeof(fdt32_t)))
+		goto skip_delegate_parse;
+	d = 0;
+	dcnt = len / sizeof(fdt32_t);
+	for (i = 0; i < dcnt; i += 3) {
+		if (d >= APLIC_MAX_DELEGATE)
+			break;
+		deleg = &aplic->delegate[d];
+
+		deleg->first_irq = fdt32_to_cpu(del[i + 1]);
+		deleg->last_irq = fdt32_to_cpu(del[i + 2]);
+		deleg->child_index = 0;
+
+		child_found = false;
+		val = fdt_getprop(fdt, nodeoff, "riscv,children", &len);
+		if (!val || len < sizeof(fdt32_t)) {
+			deleg->first_irq = 0;
+			deleg->last_irq = 0;
+			deleg->child_index = 0;
+			continue;
+		}
+		len = len / sizeof(fdt32_t);
+		for (j = 0; j < len; j++) {
+			if (del[i] != val[j])
+				continue;
+			deleg->child_index = j;
+			child_found = true;
+			break;
+		}
+
+		if (child_found) {
+			d++;
+		} else {
+			deleg->first_irq = 0;
+			deleg->last_irq = 0;
+			deleg->child_index = 0;
+		}
+	}
+skip_delegate_parse:
+
+	return 0;
+}
+
 bool fdt_check_imsic_mlevel(void *fdt)
 {
 	const fdt32_t *val;
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index cf64a2e092c..6007755b618 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -12,10 +12,12 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 
+extern struct fdt_irqchip fdt_irqchip_aplic;
 extern struct fdt_irqchip fdt_irqchip_imsic;
 extern struct fdt_irqchip fdt_irqchip_plic;
 
 static struct fdt_irqchip *irqchip_drivers[] = {
+	&fdt_irqchip_aplic,
 	&fdt_irqchip_imsic,
 	&fdt_irqchip_plic
 };
diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c
new file mode 100644
index 00000000000..965f02394c4
--- /dev/null
+++ b/lib/utils/irqchip/fdt_irqchip_aplic.c
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2021 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/irqchip/aplic.h>
+
+#define APLIC_MAX_NR			16
+
+static unsigned long aplic_count = 0;
+static struct aplic_data aplic[APLIC_MAX_NR];
+
+static int irqchip_aplic_warm_init(void)
+{
+	/* Nothing to do here. */
+	return 0;
+}
+
+static int irqchip_aplic_cold_init(void *fdt, int nodeoff,
+				  const struct fdt_match *match)
+{
+	int rc;
+	struct aplic_data *pd;
+
+	if (APLIC_MAX_NR <= aplic_count)
+		return SBI_ENOSPC;
+	pd = &aplic[aplic_count++];
+
+	rc = fdt_parse_aplic_node(fdt, nodeoff, pd);
+	if (rc)
+		return rc;
+
+	return aplic_cold_irqchip_init(pd);
+}
+
+static const struct fdt_match irqchip_aplic_match[] = {
+	{ .compatible = "riscv,aplic" },
+	{ },
+};
+
+struct fdt_irqchip fdt_irqchip_aplic = {
+	.match_table = irqchip_aplic_match,
+	.cold_init = irqchip_aplic_cold_init,
+	.warm_init = irqchip_aplic_warm_init,
+	.exit = NULL,
+};
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index b2b3f798ebb..fad4344f4b6 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -8,6 +8,7 @@
 #
 
 libsbiutils-objs-y += irqchip/fdt_irqchip.o
+libsbiutils-objs-y += irqchip/fdt_irqchip_aplic.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_imsic.o
 libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
 libsbiutils-objs-y += irqchip/aplic.o

From 8e2ef4f7af5affebc8464dd9c4b98501df14e23e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 15 Jun 2021 11:37:59 +0530
Subject: [PATCH 0943/1765] lib: utils: Disable appropriate APLIC DT nodes in
 fdt_fixups()

We should disable APLIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/fdt/fdt_fixup.h | 18 +++++++++++++++---
 lib/utils/fdt/fdt_fixup.c         | 11 +++++++++++
 2 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index 77575bb8740..fb076bad76c 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -21,6 +21,18 @@
  */
 void fdt_cpu_fixup(void *fdt);
 
+/**
+ * Fix up the APLIC nodes in the device tree
+ *
+ * This routine disables APLIC nodes which are not accessible to the next
+ * booting stage based on currently assigned domain.
+ *
+ * It is recommended that platform codes call this helper in their final_init()
+ *
+ * @param fdt: device tree blob
+ */
+void fdt_aplic_fixup(void *fdt);
+
 /**
  * Fix up the IMSIC nodes in the device tree
  *
@@ -76,9 +88,9 @@ int fdt_reserved_memory_nomap_fixup(void *fdt);
  * General device tree fix-up
  *
  * This routine do all required device tree fix-ups for a typical platform.
- * It fixes up the PLIC node, IMSIC nodes, and the reserved memory node in
- * the device tree by calling the corresponding helper routines to accomplish
- * the task.
+ * It fixes up the PLIC node, IMSIC nodes, APLIC nodes, and the reserved
+ * memory node in the device tree by calling the corresponding helper
+ * routines to accomplish the task.
  *
  * It is recommended that platform codes call this helper in their final_init()
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index c2460b8d136..a80bd82389c 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -71,6 +71,15 @@ static void fdt_domain_based_fixup_one(void *fdt, int nodeoff)
 	}
 }
 
+void fdt_aplic_fixup(void *fdt)
+{
+	int noff = 0;
+
+	while ((noff = fdt_node_offset_by_compatible(fdt, noff,
+						     "riscv,aplic")) >= 0)
+		fdt_domain_based_fixup_one(fdt, noff);
+}
+
 void fdt_imsic_fixup(void *fdt)
 {
 	int noff = 0;
@@ -289,6 +298,8 @@ int fdt_reserved_memory_nomap_fixup(void *fdt)
 
 void fdt_fixups(void *fdt)
 {
+	fdt_aplic_fixup(fdt);
+
 	fdt_imsic_fixup(fdt);
 
 	fdt_plic_fixup(fdt);

From 3a69cc1487dc318aadede61c7e580d6fb1109fe8 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 11 Feb 2022 14:11:53 +0300
Subject: [PATCH 0944/1765] lib: sbi: fix typo in is_region_subset

Fix typo in is_region_subset, regB_end should be calculated from regB.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index b60915c3b84..a1ac1bbc52b 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -159,7 +159,7 @@ static bool is_region_subset(const struct sbi_domain_memregion *regA,
 	ulong regA_start = regA->base;
 	ulong regA_end = regA->base + (BIT(regA->order) - 1);
 	ulong regB_start = regB->base;
-	ulong regB_end = regB->base + (BIT(regA->order) - 1);
+	ulong regB_end = regB->base + (BIT(regB->order) - 1);
 
 	if ((regB_start <= regA_start) &&
 	    (regA_start < regB_end) &&

From f2ccf2f783b43e8ca2b42cdeade7663599284a86 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 11 Feb 2022 14:11:54 +0300
Subject: [PATCH 0945/1765] lib: sbi: verbose sbi_domain_root_add_memregion

Be more verbose on region confict, print addresses in conflict.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 4 +++-
 lib/sbi/sbi_domain.c     | 8 ++++++--
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 15e3a5397df..b90f59c709c 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -174,7 +174,9 @@ int sbi_domain_register(struct sbi_domain *dom,
  * Add a memory region to the root domain
  * @param reg pointer to the memory region to be added
  *
- * @return 0 on success and negative error code on failure
+ * @return 0 on success
+ * @return SBI_EALREADY if memory region conflicts with existing
+ * @return SBI_EINVAL otherwise
  */
 int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
 
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index a1ac1bbc52b..4e4c1e1a401 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -471,8 +471,12 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 
 	/* Check for conflicts */
 	sbi_domain_for_each_memregion(&root, nreg) {
-		if (is_region_conflict(reg, nreg))
-			return SBI_EINVAL;
+		if (is_region_conflict(reg, nreg)) {
+			sbi_printf("%s: is_region_conflict check failed"
+			" 0x%lx conflicts existing 0x%lx\n", __func__,
+				   reg->base, nreg->base);
+			return SBI_EALREADY;
+		}
 	}
 
 	/* Append the memregion to root memregions */

From f3f4604c196dea70b0bb64aba747aa6d7a9e244f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 18 Feb 2022 23:18:41 +0530
Subject: [PATCH 0946/1765] lib: sbi: Add a simple external interrupt handling
 framework

Currently, the external interrupt handling is scattered between
sbi_init and sbi_trap. This patch moves all external interrupt
handling into a simple framework called sbi_irqchip.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_irqchip.h | 44 +++++++++++++++++++++++++++++++
 include/sbi/sbi_trap.h    |  2 --
 lib/sbi/objects.mk        |  1 +
 lib/sbi/sbi_init.c        | 12 ++++-----
 lib/sbi/sbi_irqchip.c     | 54 +++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_trap.c        | 26 +++----------------
 lib/utils/irqchip/imsic.c |  4 +--
 7 files changed, 109 insertions(+), 34 deletions(-)
 create mode 100644 include/sbi/sbi_irqchip.h
 create mode 100644 lib/sbi/sbi_irqchip.c

diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
new file mode 100644
index 00000000000..6acc6e3f5a5
--- /dev/null
+++ b/include/sbi/sbi_irqchip.h
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __SBI_IRQCHIP_H__
+#define __SBI_IRQCHIP_H__
+
+#include <sbi/sbi_types.h>
+
+struct sbi_scratch;
+struct sbi_trap_regs;
+
+/**
+ * Set external interrupt handling function
+ *
+ * This function is called by OpenSBI platform code to set a handler for
+ * external interrupts
+ *
+ * @param fn function pointer for handling external irqs
+ */
+void sbi_irqchip_set_irqfn(int (*fn)(struct sbi_trap_regs *regs));
+
+/**
+ * Process external interrupts
+ *
+ * This function is called by sbi_trap_handler() to handle external
+ * interrupts.
+ *
+ * @param regs pointer for trap registers
+ */
+int sbi_irqchip_process(struct sbi_trap_regs *regs);
+
+/** Initialize interrupt controllers */
+int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
+
+/** Exit interrupt controllers */
+void sbi_irqchip_exit(struct sbi_scratch *scratch);
+
+#endif
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 4f611fa4812..d205056da1d 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -205,8 +205,6 @@ struct sbi_trap_info {
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_trap_info *trap);
 
-void sbi_trap_set_external_irqfn(int (*fn)(struct sbi_trap_regs *regs));
-
 struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
 
 void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs);
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 7096f245ae0..1ed198346f6 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -32,6 +32,7 @@ libsbi-objs-y += sbi_hsm.o
 libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
+libsbi-objs-y += sbi_irqchip.o
 libsbi-objs-y += sbi_misaligned_ldst.o
 libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 6876eb2f0f2..2b9e5ae2f19 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -18,6 +18,7 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_system.h>
@@ -270,13 +271,12 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_boot_print_banner(scratch);
 
-	rc = sbi_platform_irqchip_init(plat, TRUE);
+	rc = sbi_irqchip_init(scratch, TRUE);
 	if (rc) {
-		sbi_printf("%s: platform irqchip init failed (error %d)\n",
+		sbi_printf("%s: irqchip init failed (error %d)\n",
 			   __func__, rc);
 		sbi_hart_hang();
 	}
-	csr_set(CSR_MIE, MIP_MEIP);
 
 	rc = sbi_ipi_init(scratch, TRUE);
 	if (rc) {
@@ -374,10 +374,9 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_irqchip_init(plat, FALSE);
+	rc = sbi_irqchip_init(scratch, FALSE);
 	if (rc)
 		sbi_hart_hang();
-	csr_set(CSR_MIE, MIP_MEIP);
 
 	rc = sbi_ipi_init(scratch, FALSE);
 	if (rc)
@@ -552,8 +551,7 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_ipi_exit(scratch);
 
-	csr_clear(CSR_MIE, MIP_MEIP);
-	sbi_platform_irqchip_exit(plat);
+	sbi_irqchip_exit(scratch);
 
 	sbi_platform_final_exit(plat);
 
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
new file mode 100644
index 00000000000..24128bece5a
--- /dev/null
+++ b/lib/sbi/sbi_irqchip.c
@@ -0,0 +1,54 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_irqchip.h>
+#include <sbi/sbi_platform.h>
+
+static int default_irqfn(struct sbi_trap_regs *regs)
+{
+	return SBI_ENODEV;
+}
+
+static int (*ext_irqfn)(struct sbi_trap_regs *regs) = default_irqfn;
+
+void sbi_irqchip_set_irqfn(int (*fn)(struct sbi_trap_regs *regs))
+{
+	if (fn)
+		ext_irqfn = fn;
+}
+
+int sbi_irqchip_process(struct sbi_trap_regs *regs)
+{
+	return ext_irqfn(regs);
+}
+
+int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
+{
+	int rc;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	rc = sbi_platform_irqchip_init(plat, cold_boot);
+	if (rc)
+		return rc;
+
+	if (ext_irqfn != default_irqfn)
+		csr_set(CSR_MIE, MIP_MEIP);
+
+	return 0;
+}
+
+void sbi_irqchip_exit(struct sbi_scratch *scratch)
+{
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+
+	if (ext_irqfn != default_irqfn)
+		csr_clear(CSR_MIE, MIP_MEIP);
+
+	sbi_platform_irqchip_exit(plat);
+}
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index faab90affb3..86bab6deb04 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_misaligned_ldst.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
@@ -195,27 +196,6 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	return 0;
 }
 
-static int default_irqfn(struct sbi_trap_regs *regs)
-{
-	return SBI_ENODEV;
-}
-
-static int (*ext_irqfn)(struct sbi_trap_regs *regs) = default_irqfn;
-
-/**
- * Set external irq handler function
- *
- * This function is called by OpenSBI platform code to set a handler for
- * external interrupts
- *
- * @param fn function pointer for handling external irqs
- */
-void sbi_trap_set_external_irqfn(int (*fn)(struct sbi_trap_regs *regs))
-{
-	if (fn)
-		ext_irqfn = fn;
-}
-
 static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 {
 	mcause &= ~(1UL << (__riscv_xlen - 1));
@@ -227,7 +207,7 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 		sbi_ipi_process();
 		break;
 	case IRQ_M_EXT:
-		return ext_irqfn(regs);
+		return sbi_irqchip_process(regs);
 	default:
 		return SBI_ENOENT;
 	};
@@ -250,7 +230,7 @@ static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
 			sbi_ipi_process();
 			break;
 		case IRQ_M_EXT:
-			rc = ext_irqfn(regs);
+			rc = sbi_irqchip_process(regs);
 			if (rc)
 				return rc;
 			break;
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 123d01f4b4c..b29a1e9f8dd 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -15,8 +15,8 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_trap.h>
 #include <sbi_utils/irqchip/imsic.h>
 
 #define IMSIC_MMIO_PAGE_LE		0x00
@@ -268,7 +268,7 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 		return SBI_EINVAL;
 
 	/* Setup external interrupt function for IMSIC */
-	sbi_trap_set_external_irqfn(imsic_external_irqfn);
+	sbi_irqchip_set_irqfn(imsic_external_irqfn);
 
 	/* Add IMSIC regions to the root domain */
 	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {

From 4998a712b2ab504eff306110879ee05af6050177 Mon Sep 17 00:00:00 2001
From: Alistair Francis <alistair.francis@wdc.com>
Date: Thu, 24 Feb 2022 15:01:46 +1000
Subject: [PATCH 0947/1765] lib: utils: serial: Initial commit of xlnx-uartlite

Initial commit of the xlnx-uartlite device and FDT support. This was
tested by running OpenSBI on a modified QEMU virt machine using the
xlnx-uartlite for serial.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h          |  3 +
 include/sbi_utils/serial/xlnx_uartlite.h    | 16 +++++
 lib/utils/fdt/fdt_helper.c                  | 18 ++++++
 lib/utils/serial/fdt_serial.c               |  4 +-
 lib/utils/serial/fdt_serial_xlnx_uartlite.c | 35 +++++++++++
 lib/utils/serial/objects.mk                 |  2 +
 lib/utils/serial/xlnx-uartlite.c            | 67 +++++++++++++++++++++
 7 files changed, 144 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi_utils/serial/xlnx_uartlite.h
 create mode 100644 lib/utils/serial/fdt_serial_xlnx_uartlite.c
 create mode 100644 lib/utils/serial/xlnx-uartlite.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 1232b26dfd5..41ee826f062 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -68,6 +68,9 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
+int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart);
+
 struct aplic_data;
 
 int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic);
diff --git a/include/sbi_utils/serial/xlnx_uartlite.h b/include/sbi_utils/serial/xlnx_uartlite.h
new file mode 100644
index 00000000000..45927b78b8f
--- /dev/null
+++ b/include/sbi_utils/serial/xlnx_uartlite.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Alistair Francis <alistair.francis@wdc.com>
+ */
+#ifndef __SERIAL_XLNX_UARTLITE_H__
+#define __SERIAL_XLNX_UARTLITE_H__
+
+#include <sbi/sbi_types.h>
+
+int xlnx_uartlite_init(unsigned long base);
+
+#endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 3a306cbd5b9..4dd060248dc 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -467,6 +467,24 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
 }
 
+int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
+			       struct platform_uart_data *uart)
+{
+	int rc;
+	uint64_t reg_addr, reg_size;
+
+	if (nodeoffset < 0 || !uart || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+	uart->addr = reg_addr;
+
+	return 0;
+}
+
 int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
 {
 	bool child_found;
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index f73d26a16df..45aea4ab001 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -19,6 +19,7 @@ extern struct fdt_serial fdt_serial_litex;
 extern struct fdt_serial fdt_serial_htif;
 extern struct fdt_serial fdt_serial_shakti;
 extern struct fdt_serial fdt_serial_gaisler;
+extern struct fdt_serial fdt_serial_xlnx_uartlite;
 
 static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_uart8250,
@@ -26,7 +27,8 @@ static struct fdt_serial *serial_drivers[] = {
 	&fdt_serial_litex,
 	&fdt_serial_htif,
 	&fdt_serial_shakti,
-	&fdt_serial_gaisler
+	&fdt_serial_gaisler,
+	&fdt_serial_xlnx_uartlite,
 };
 
 static struct fdt_serial dummy = {
diff --git a/lib/utils/serial/fdt_serial_xlnx_uartlite.c b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
new file mode 100644
index 00000000000..466e16e82d8
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Alistair Francis <alistair.francis@wdc.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/xlnx_uartlite.h>
+
+static int serial_xlnx_uartlite_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart;
+
+	rc = fdt_parse_xlnx_uartlite_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return xlnx_uartlite_init(uart.addr);
+}
+
+static const struct fdt_match serial_xlnx_uartlite_match[] = {
+	{ .compatible = "xlnx,xps-uartlite-1.00.a" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_xlnx_uartlite = {
+	.match_table = serial_xlnx_uartlite_match,
+	.init = serial_xlnx_uartlite_init,
+};
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 4f751ba712d..4fb9627b630 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -14,8 +14,10 @@ libsbiutils-objs-y += serial/fdt_serial_shakti.o
 libsbiutils-objs-y += serial/fdt_serial_sifive.o
 libsbiutils-objs-y += serial/fdt_serial_litex.o
 libsbiutils-objs-y += serial/fdt_serial_uart8250.o
+libsbiutils-objs-y += serial/fdt_serial_xlnx_uartlite.o
 libsbiutils-objs-y += serial/gaisler-uart.o
 libsbiutils-objs-y += serial/shakti-uart.o
 libsbiutils-objs-y += serial/sifive-uart.o
 libsbiutils-objs-y += serial/litex-uart.o
 libsbiutils-objs-y += serial/uart8250.o
+libsbiutils-objs-y += serial/xlnx-uartlite.o
diff --git a/lib/utils/serial/xlnx-uartlite.c b/lib/utils/serial/xlnx-uartlite.c
new file mode 100644
index 00000000000..1d8d44074df
--- /dev/null
+++ b/lib/utils/serial/xlnx-uartlite.c
@@ -0,0 +1,67 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Alistair Francis <alistair.francis@wdc.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/xlnx_uartlite.h>
+
+/* clang-format off */
+
+#define UART_RX_OFFSET		0x00
+#define UART_TX_OFFSET		0x04
+#define UART_STATUS_OFFSET	0x08
+# define UART_STATUS_RXVALID	0x01
+# define UART_STATUS_RXFULL	0x02
+# define UART_STATUS_TXEMPTY	0x04
+# define UART_STATUS_TXFULL	0x08
+# define UART_STATUS_IE	0x10
+# define UART_STATUS_OVERRUN	0x20
+# define UART_STATUS_FRAME	0x40
+# define UART_STATUS_PARITY	0x80
+#define UART_CTRL_OFFSET	0x0C
+# define UART_CTRL_RST_TX	0x01
+# define UART_CTRL_RST_RX	0x02
+# define UART_CTRL_IE		0x10
+
+/* clang-format on */
+
+static volatile char *xlnx_uartlite_base;
+
+static void xlnx_uartlite_putc(char ch)
+{
+	while((readb(xlnx_uartlite_base + UART_STATUS_OFFSET) & UART_STATUS_TXFULL))
+		;
+
+	writeb(ch, xlnx_uartlite_base + UART_TX_OFFSET);
+}
+
+static int xlnx_uartlite_getc(void)
+{
+	u16 status = readb(xlnx_uartlite_base + UART_STATUS_OFFSET);
+
+	if (status & UART_STATUS_RXVALID)
+		return readb(xlnx_uartlite_base + UART_RX_OFFSET);
+
+	return -1;
+}
+
+static struct sbi_console_device xlnx_uartlite_console = {
+	.name = "xlnx-uartlite",
+	.console_putc = xlnx_uartlite_putc,
+	.console_getc = xlnx_uartlite_getc
+};
+
+int xlnx_uartlite_init(unsigned long base)
+{
+	xlnx_uartlite_base = (volatile char *)base;
+
+	sbi_console_set_device(&xlnx_uartlite_console);
+
+	return 0;
+}

From 2dfbd3c0e226c21b978e0a5a1c58893ee6679d15 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 00:22:38 +0800
Subject: [PATCH 0948/1765] lib: pmp_set/pmp_get moved errors from runtime to
 compile time

pmp_set/pmp_get calculates the location of the CSR register separately
through conditional compilation. In the case of non-32-bit and 64-bit,
we can report an error directly through #error without putting it at
runtime

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/riscv_asm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 847bdba951b..5eab1ed5724 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -261,7 +261,7 @@ int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	return SBI_ENOTSUPP;
+# error "Unexpected __riscv_xlen"
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
 
@@ -312,7 +312,7 @@ int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
 	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
 	pmpcfg_shift = (n & 7) << 3;
 #else
-	return SBI_ENOTSUPP;
+# error "Unexpected __riscv_xlen"
 #endif
 	pmpaddr_csr = CSR_PMPADDR0 + n;
 

From b6b7220a47e19b422fb470cffb4675f0a70e94f3 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 00:22:39 +0800
Subject: [PATCH 0949/1765] firmware: Fix code for accessing hart_count and
 stack_size

lwu exists under the current rv64 and should also exist under the rv128
in the future, so I modified the conditions of conditional compilation
so that it can adapt to the future situation

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ab3e1b3911c..07be4c4b930 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -259,7 +259,7 @@ _bss_zero:
 	 * s8 -> HART Stack Size
 	 */
 	lla	a4, platform
-#if __riscv_xlen == 64
+#if __riscv_xlen > 32
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 #else

From d552fc8d369780150fd9837e1097b4b34a640d12 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 00:22:40 +0800
Subject: [PATCH 0950/1765] lib: Add error messages via conditional compilation
 for the future

On 128-bit machines, sbi_load_xx/sbi_store_xx needs to be improved.
Through this conditional compile, the corresponding implementation
can be prompted to be added.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_unpriv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 42461241f73..73b530ce948 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -83,7 +83,7 @@ DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lwu)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u64, ld)
 DEFINE_UNPRIVILEGED_STORE_FUNCTION(u64, sd)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, ld)
-#else
+#elif __riscv_xlen == 32
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(u32, lw)
 DEFINE_UNPRIVILEGED_LOAD_FUNCTION(ulong, lw)
 
@@ -112,6 +112,8 @@ void sbi_store_u64(u64 *addr, u64 val,
 	if (trap->cause)
 		return;
 }
+#else
+# error "Unexpected __riscv_xlen"
 #endif
 
 ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)

From 555bdb1cf3871dd327fc2e4d9b3cf8f89801bc1b Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 09:45:25 +0800
Subject: [PATCH 0951/1765] include: Use static asserts for
 SBI_PLATFORM_xxx_OFFSET defines

Add static detection to prevent the modification of struct sbi_platform
from forgetting the modification of SBI_PLATFORM_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h | 50 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 0b5ae4beeff..2c777ac2a13 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -175,6 +175,56 @@ struct sbi_platform {
 	const u32 *hart_index2id;
 };
 
+/**
+ * Prevent modification of struct sbi_platform from affecting
+ * SBI_PLATFORM_xxx_OFFSET
+ */
+_Static_assert(
+	offsetof(struct sbi_platform, opensbi_version)
+		== SBI_PLATFORM_OPENSBI_VERSION_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_OPENSBI_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, platform_version)
+		== SBI_PLATFORM_VERSION_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, name)
+		== SBI_PLATFORM_NAME_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_NAME_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, features)
+		== SBI_PLATFORM_FEATURES_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_FEATURES_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_count)
+		== SBI_PLATFORM_HART_COUNT_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_COUNT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_stack_size)
+		== SBI_PLATFORM_HART_STACK_SIZE_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_STACK_SIZE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, platform_ops_addr)
+		== SBI_PLATFORM_OPS_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_OPS_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, firmware_context)
+		== SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_index2id)
+		== SBI_PLATFORM_HART_INDEX2ID_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_INDEX2ID_OFFSET");
+
 /** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s) \
 	((const struct sbi_platform *)((__s)->platform_addr))

From 1b42d3ace3ed38bda35276838a880db24ba7db82 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 18:16:48 +0800
Subject: [PATCH 0952/1765] include: Use static asserts for
 SBI_SCRATCH_xxx_OFFSET defines

Add static detection to prevent the modification of struct sbi_scratch
from forgetting the modification of SBI_SCRATCH_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_scratch.h | 60 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 0c2730763d8..2f6f0a13ac8 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -73,6 +73,66 @@ struct sbi_scratch {
 	unsigned long options;
 };
 
+/**
+ * Prevent modification of struct sbi_scratch from affecting
+ * SBI_SCRATCH_xxx_OFFSET
+ */
+_Static_assert(
+	offsetof(struct sbi_scratch, fw_start)
+		== SBI_SCRATCH_FW_START_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_FW_START_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, fw_size)
+		== SBI_SCRATCH_FW_SIZE_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_FW_SIZE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_arg1)
+		== SBI_SCRATCH_NEXT_ARG1_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_ARG1_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_addr)
+		== SBI_SCRATCH_NEXT_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_mode)
+		== SBI_SCRATCH_NEXT_MODE_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_MODE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, warmboot_addr)
+		== SBI_SCRATCH_WARMBOOT_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_WARMBOOT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, platform_addr)
+		== SBI_SCRATCH_PLATFORM_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_PLATFORM_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, hartid_to_scratch)
+		== SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, trap_exit)
+		== SBI_SCRATCH_TRAP_EXIT_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_TRAP_EXIT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, tmp0)
+		== SBI_SCRATCH_TMP0_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_TMP0_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, options)
+		== SBI_SCRATCH_OPTIONS_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_OPTIONS_OFFSET");
+
 /** Possible options for OpenSBI library */
 enum sbi_scratch_options {
 	/** Disable prints during boot */

From 7924a0b220b703ccecd4be654a682e7ce5176e82 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 16 Mar 2022 18:19:18 +0800
Subject: [PATCH 0953/1765] include: Use static asserts for
 FW_DYNAMIC_INFO_xxx_OFFSET defines

Add static detection to prevent the modification of struct fw_dynamic_info
from forgetting the modification of FW_DYNAMIC_INFO_xxx_OFFSET

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/fw_dynamic.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/include/sbi/fw_dynamic.h b/include/sbi/fw_dynamic.h
index dea207bc8d1..45c4d5f6f26 100644
--- a/include/sbi/fw_dynamic.h
+++ b/include/sbi/fw_dynamic.h
@@ -75,6 +75,41 @@ struct fw_dynamic_info {
 	unsigned long boot_hart;
 } __packed;
 
+/**
+ * Prevent modification of struct fw_dynamic_info from affecting
+ * FW_DYNAMIC_INFO_xxx_OFFSET
+ */
+_Static_assert(
+	offsetof(struct fw_dynamic_info, magic)
+		== FW_DYNAMIC_INFO_MAGIC_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_MAGIC_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, version)
+		== FW_DYNAMIC_INFO_VERSION_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, next_addr)
+		== FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, next_mode)
+		== FW_DYNAMIC_INFO_NEXT_MODE_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_NEXT_MODE_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, options)
+		== FW_DYNAMIC_INFO_OPTIONS_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_OPTIONS_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, boot_hart)
+		== FW_DYNAMIC_INFO_BOOT_HART_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_BOOT_HART_OFFSET");
+
 #endif
 
 #endif

From 722f80d8e994c0fd9b72780259e7ed27893cc704 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 29 Mar 2022 19:00:37 +0530
Subject: [PATCH 0954/1765] include: Add defines for [m|h|s]envcfg CSRs

The latest RISC-V privileged specification introduces xenvcfg CSRs
to enable/disable certain features/extensions for lower privilege
modes. This patch adds defines for these new [m|h|s]envcfg CSRs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/riscv_encoding.h | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 574d1c34902..c02aa8f67e9 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -203,6 +203,22 @@
 
 #define MHPMEVENT_SSCOF_MASK		_ULL(0xFFFF000000000000)
 
+#if __riscv_xlen > 32
+#define ENVCFG_STCE			(_ULL(1) << 63)
+#define ENVCFG_PBMTE			(_ULL(1) << 62)
+#else
+#define ENVCFGH_STCE			(_UL(1) << 31)
+#define ENVCFGH_PBMTE			(_UL(1) << 30)
+#endif
+#define ENVCFG_CBZE			(_UL(1) << 7)
+#define ENVCFG_CBCFE			(_UL(1) << 6)
+#define ENVCFG_CBIE_SHIFT		4
+#define ENVCFG_CBIE			(_UL(0x3) << ENVCFG_CBIE_SHIFT)
+#define ENVCFG_CBIE_ILL			_UL(0x0)
+#define ENVCFG_CBIE_FLUSH		_UL(0x1)
+#define ENVCFG_CBIE_INV			_UL(0x3)
+#define ENVCFG_FIOM			_UL(0x1)
+
 /* ===== User-level CSRs ===== */
 
 /* User Trap Setup (N-extension) */
@@ -298,6 +314,9 @@
 #define CSR_STVEC			0x105
 #define CSR_SCOUNTEREN			0x106
 
+/* Supervisor Configuration */
+#define CSR_SENVCFG			0x10a
+
 /* Supervisor Trap Handling */
 #define CSR_SSCRATCH			0x140
 #define CSR_SEPC			0x141
@@ -336,6 +355,10 @@
 #define CSR_HCOUNTEREN			0x606
 #define CSR_HGEIE			0x607
 
+/* Hypervisor Configuration */
+#define CSR_HENVCFG			0x60a
+#define CSR_HENVCFGH			0x61a
+
 /* Hypervisor Trap Handling (H-extension) */
 #define CSR_HTVAL			0x643
 #define CSR_HIP				0x644
@@ -408,6 +431,10 @@
 #define CSR_MCOUNTEREN			0x306
 #define CSR_MSTATUSH			0x310
 
+/* Machine Configuration */
+#define CSR_MENVCFG			0x30a
+#define CSR_MENVCFGH			0x31a
+
 /* Machine Trap Handling */
 #define CSR_MSCRATCH			0x340
 #define CSR_MEPC			0x341

From 31fecad46d1461c3bc6a4ef6d6aa461a19c1d78e Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Tue, 29 Mar 2022 19:25:36 +0530
Subject: [PATCH 0955/1765] lib: sbi: Detect menvcfg CSR at boot time

We add the menvcfg CSR as a HART feature and detect it at boot time
using traping mechanism.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_hart.h | 4 +++-
 lib/sbi/sbi_hart.c     | 9 +++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index a83b45b985c..57f80bc0af2 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,9 +26,11 @@ enum sbi_hart_features {
 	SBI_HART_HAS_TIME = (1 << 4),
 	/** HART has AIA local interrupt CSRs */
 	SBI_HART_HAS_AIA = (1 << 5),
+	/** HART has menvcfg CSR */
+	SBI_HART_HAS_MENVCFG = (1 << 6),
 
 	/** Last index of Hart features*/
-	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_AIA,
+	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_MENVCFG,
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e0285406256..31c8f391d09 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -304,6 +304,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_AIA:
 		fstr = "aia";
 		break;
+	case SBI_HART_HAS_MENVCFG:
+		fstr = "menvcfg";
+		break;
 	default:
 		break;
 	}
@@ -534,6 +537,12 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 		goto __aia_skip;
 	hfeatures->features |= SBI_HART_HAS_AIA;
 __aia_skip:
+
+	/* Detect if hart has menvcfg CSR */
+	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
+	if (!trap.cause)
+		hfeatures->features |= SBI_HART_HAS_MENVCFG;
+
 	return;
 }
 

From 47d676570ddb0b50e741e4239d596de4d875e370 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 29 Mar 2022 19:42:22 +0530
Subject: [PATCH 0956/1765] lib: sbi: Enable Zicbo[m|z] extensions in the
 menvcfg CSR

The bits to configure/enable Zicbo[m|z] extensions in the menvcfg
CSR are WARL. We try to enable these bits irrespective whether
these extensions are available or not because writes to these
bits will be ignored if these extensions are not available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_hart.c | 33 ++++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 31c8f391d09..d2c7abaec07 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -39,7 +39,7 @@ static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch)
 {
-	unsigned long mstatus_val = 0;
+	unsigned long menvcfg_val, mstatus_val = 0;
 	int cidx;
 	unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
 	uint64_t mhpmevent_init_val = 0;
@@ -86,6 +86,37 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val);
 #endif
 	}
+
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG)) {
+		menvcfg_val = csr_read(CSR_MENVCFG);
+
+		/*
+		 * Set menvcfg.CBZE == 1
+		 *
+		 * If Zicboz extension is not available then writes to
+		 * menvcfg.CBZE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBZE;
+
+		/*
+		 * Set menvcfg.CBCFE == 1
+		 *
+		 * If Zicbom extension is not available then writes to
+		 * menvcfg.CBCFE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBCFE;
+
+		/*
+		 * Set menvcfg.CBIE == 3
+		 *
+		 * If Zicbom extension is not available then writes to
+		 * menvcfg.CBIE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
+
+		csr_write(CSR_MENVCFG, menvcfg_val);
+	}
+
 	/* Disable all interrupts */
 	csr_write(CSR_MIE, 0);
 

From 794986f87fb811ed0c5117fa7d3c84849e9b81d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 29 Mar 2022 19:55:23 +0530
Subject: [PATCH 0957/1765] lib: sbi: Enable Svpbmt extension in the menvcfg
 CSR

The menvcfg.PBMTE bit is read-only zero when Svpbmt extension is not
available so we try to enable menvcfg.PBMTE bit irrespective whether
Svpbmt is available or not.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_hart.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d2c7abaec07..6be928618bd 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -114,6 +114,16 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		 */
 		menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
 
+		/*
+		 * Set menvcfg.PBMTE == 1 for RV64 or RV128
+		 *
+		 * If Svpbmt extension is not available then menvcfg.PBMTE
+		 * will be read-only zero.
+		 */
+#if __riscv_xlen > 32
+		menvcfg_val |= ENVCFG_PBMTE;
+#endif
+
 		csr_write(CSR_MENVCFG, menvcfg_val);
 	}
 

From 499601a4fff98ff258076c010c980c5dbcc0c24d Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Mon, 11 Apr 2022 08:34:02 +0530
Subject: [PATCH 0958/1765] lib: sbi: Add Smstateen extension defines

Smstateen extension provides a mechanism to plug potential
covert channels which are opened by extensions that add to
processor state that may not get context-switched.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index c02aa8f67e9..04d562151e0 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -345,6 +345,12 @@
 #define CSR_SIEH			0x114
 #define CSR_SIPH			0x154
 
+/* Supervisor stateen CSRs */
+#define CSR_SSTATEEN0			0x10C
+#define CSR_SSTATEEN1			0x10D
+#define CSR_SSTATEEN2			0x10E
+#define CSR_SSTATEEN3			0x10F
+
 /* ===== Hypervisor-level CSRs ===== */
 
 /* Hypervisor Trap Setup (H-extension) */
@@ -413,6 +419,16 @@
 #define CSR_VSIEH			0x214
 #define CSR_VSIPH			0x254
 
+/* Hypervisor stateen CSRs */
+#define CSR_HSTATEEN0			0x60C
+#define CSR_HSTATEEN0H			0x61C
+#define CSR_HSTATEEN1			0x60D
+#define CSR_HSTATEEN1H			0x61D
+#define CSR_HSTATEEN2			0x60E
+#define CSR_HSTATEEN2H			0x61E
+#define CSR_HSTATEEN3			0x60F
+#define CSR_HSTATEEN3H			0x61F
+
 /* ===== Machine-level CSRs ===== */
 
 /* Machine Information Registers */
@@ -686,6 +702,17 @@
 #define CSR_MVIEN			0x308
 #define CSR_MVIP			0x309
 
+/* Smstateen extension registers */
+/* Machine stateen CSRs */
+#define CSR_MSTATEEN0			0x30C
+#define CSR_MSTATEEN0H			0x31C
+#define CSR_MSTATEEN1			0x30D
+#define CSR_MSTATEEN1H			0x31D
+#define CSR_MSTATEEN2			0x30E
+#define CSR_MSTATEEN2H			0x31E
+#define CSR_MSTATEEN3			0x30F
+#define CSR_MSTATEEN3H			0x31F
+
 /* Machine-Level High-Half CSRs (AIA) */
 #define CSR_MIDELEGH			0x313
 #define CSR_MIEH			0x314
@@ -715,6 +742,23 @@
 #define CAUSE_VIRTUAL_INST_FAULT	0x16
 #define CAUSE_STORE_GUEST_PAGE_FAULT	0x17
 
+/* Common defines for all smstateen */
+#define SMSTATEEN_MAX_COUNT		4
+#define SMSTATEEN0_CS_SHIFT		0
+#define SMSTATEEN0_CS			(_ULL(1) << SMSTATEEN0_CS_SHIFT)
+#define SMSTATEEN0_FCSR_SHIFT		1
+#define SMSTATEEN0_FCSR			(_ULL(1) << SMSTATEEN0_FCSR_SHIFT)
+#define SMSTATEEN0_IMSIC_SHIFT		58
+#define SMSTATEEN0_IMSIC		(_ULL(1) << SMSTATEEN0_IMSIC_SHIFT)
+#define SMSTATEEN0_AIA_SHIFT		59
+#define SMSTATEEN0_AIA			(_ULL(1) << SMSTATEEN0_AIA_SHIFT)
+#define SMSTATEEN0_SVSLCT_SHIFT		60
+#define SMSTATEEN0_SVSLCT		(_ULL(1) << SMSTATEEN0_SVSLCT_SHIFT)
+#define SMSTATEEN0_HSENVCFG_SHIFT	62
+#define SMSTATEEN0_HSENVCFG		(_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT)
+#define SMSTATEEN_STATEN_SHIFT		63
+#define SMSTATEEN_STATEN		(_ULL(1) << SMSTATEEN_STATEN_SHIFT)
+
 /* ===== Instruction Encodings ===== */
 
 #define INSN_MATCH_LB			0x3

From d44568a0f2e6301d3ad77a48370b0bfef4bfe5a0 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Mon, 11 Apr 2022 08:34:10 +0530
Subject: [PATCH 0959/1765] lib: sbi: Detect Smstateen CSRs at boot-time

Extend HART feature detection to discover Smstateen CSRs at boot-time
and configure mstateen envcfg bit depending on availability of
menvcfg CSR.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  4 +++-
 lib/sbi/sbi_hart.c     | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 57f80bc0af2..be3ad9fac0d 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -28,9 +28,11 @@ enum sbi_hart_features {
 	SBI_HART_HAS_AIA = (1 << 5),
 	/** HART has menvcfg CSR */
 	SBI_HART_HAS_MENVCFG = (1 << 6),
+	/** HART has mstateen CSR **/
+	SBI_HART_HAS_SMSTATEEN = (1 << 7),
 
 	/** Last index of Hart features*/
-	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_MENVCFG,
+	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SMSTATEEN,
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6be928618bd..b0edf382f15 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -43,6 +43,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	int cidx;
 	unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
 	uint64_t mhpmevent_init_val = 0;
+	uint64_t mstateen_val;
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
@@ -87,6 +88,22 @@ static void mstatus_init(struct sbi_scratch *scratch)
 #endif
 	}
 
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SMSTATEEN)) {
+		mstateen_val = csr_read(CSR_MSTATEEN0);
+#if __riscv_xlen == 32
+		mstateen_val |= ((uint64_t)csr_read(CSR_MSTATEEN0H)) << 32;
+#endif
+		mstateen_val |= SMSTATEEN_STATEN;
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG))
+			mstateen_val |= SMSTATEEN0_HSENVCFG;
+		else
+			mstateen_val &= ~SMSTATEEN0_HSENVCFG;
+		csr_write(CSR_MSTATEEN0, mstateen_val);
+#if __riscv_xlen == 32
+		csr_write(CSR_MSTATEEN0H, mstateen_val >> 32);
+#endif
+	}
+
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG)) {
 		menvcfg_val = csr_read(CSR_MENVCFG);
 
@@ -348,6 +365,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_MENVCFG:
 		fstr = "menvcfg";
 		break;
+	case SBI_HART_HAS_SMSTATEEN:
+		fstr = "smstateen";
+		break;
 	default:
 		break;
 	}
@@ -584,6 +604,11 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	if (!trap.cause)
 		hfeatures->features |= SBI_HART_HAS_MENVCFG;
 
+	/* Detect if hart supports mstateen CSRs */
+	val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
+	if (!trap.cause)
+		hfeatures->features |= SBI_HART_HAS_SMSTATEEN;
+
 	return;
 }
 

From 3383d6a4d1461bb029b21fa53417382e34ae4906 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Mon, 11 Apr 2022 08:34:17 +0530
Subject: [PATCH 0960/1765] lib: irqchip/imsic: configure mstateen

When mstateen registers are implemented, the AIA related
configurations need to be done in mstateen for the IMSIC
initialization to succeed.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b0edf382f15..7b602c30021 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -98,6 +98,12 @@ static void mstatus_init(struct sbi_scratch *scratch)
 			mstateen_val |= SMSTATEEN0_HSENVCFG;
 		else
 			mstateen_val &= ~SMSTATEEN0_HSENVCFG;
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_AIA))
+			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
+					SMSTATEEN0_IMSIC);
+		else
+			mstateen_val &= ~(SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
+					SMSTATEEN0_IMSIC);
 		csr_write(CSR_MSTATEEN0, mstateen_val);
 #if __riscv_xlen == 32
 		csr_write(CSR_MSTATEEN0H, mstateen_val >> 32);

From 5c5cbb53a4fd2f7d2a7038b584f8ee01266cef04 Mon Sep 17 00:00:00 2001
From: Zong Li <zong.li@sifive.com>
Date: Fri, 15 Apr 2022 02:24:20 +0000
Subject: [PATCH 0961/1765] lib: utils/serial: support 'reg-offset' property

reg-offset property is used for offset to apply to the mapbase
from the start of the registers in 8250 UART. In Linux kernel,
it has been handled in 8250 UART driver.

dt-bindings:
<linux>/Documentation/devicetree/bindings/serial/8250.yaml

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h     | 1 +
 include/sbi_utils/serial/uart8250.h    | 2 +-
 lib/utils/fdt/fdt_helper.c             | 7 +++++++
 lib/utils/serial/fdt_serial_uart8250.c | 3 ++-
 lib/utils/serial/uart8250.c            | 4 ++--
 platform/andes/ae350/platform.c        | 3 ++-
 platform/andes/ae350/platform.h        | 1 +
 platform/fpga/ariane/platform.c        | 4 +++-
 platform/fpga/openpiton/platform.c     | 4 +++-
 platform/template/platform.c           | 2 +-
 10 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 41ee826f062..2279f96f1f2 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -31,6 +31,7 @@ struct platform_uart_data {
 	unsigned long baud;
 	unsigned long reg_shift;
 	unsigned long reg_io_width;
+	unsigned long reg_offset;
 };
 
 const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
diff --git a/include/sbi_utils/serial/uart8250.h b/include/sbi_utils/serial/uart8250.h
index 6b9b48b0e75..d4a8c136a45 100644
--- a/include/sbi_utils/serial/uart8250.h
+++ b/include/sbi_utils/serial/uart8250.h
@@ -13,6 +13,6 @@
 #include <sbi/sbi_types.h>
 
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
-		  u32 reg_width);
+		  u32 reg_width, u32 reg_offset);
 
 #endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 4dd060248dc..9a35969a535 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -21,6 +21,7 @@
 #define DEFAULT_UART_BAUD		115200
 #define DEFAULT_UART_REG_SHIFT		0
 #define DEFAULT_UART_REG_IO_WIDTH	1
+#define DEFAULT_UART_REG_OFFSET		0
 
 #define DEFAULT_SIFIVE_UART_FREQ		0
 #define DEFAULT_SIFIVE_UART_BAUD		115200
@@ -449,6 +450,12 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 	else
 		uart->reg_io_width = DEFAULT_UART_REG_IO_WIDTH;
 
+	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-offset", &len);
+	if (len > 0 && val)
+		uart->reg_offset = fdt32_to_cpu(*val);
+	else
+		uart->reg_offset = DEFAULT_UART_REG_OFFSET;
+
 	return 0;
 }
 
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 36f364cfe39..544b7416de4 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -22,7 +22,8 @@ static int serial_uart8250_init(void *fdt, int nodeoff,
 		return rc;
 
 	return uart8250_init(uart.addr, uart.freq, uart.baud,
-			     uart.reg_shift, uart.reg_io_width);
+			     uart.reg_shift, uart.reg_io_width,
+			     uart.reg_offset);
 }
 
 static const struct fdt_match serial_uart8250_match[] = {
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 141bd45c885..38ea11af4d3 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -91,11 +91,11 @@ static struct sbi_console_device uart8250_console = {
 };
 
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
-		  u32 reg_width)
+		  u32 reg_width, u32 reg_offset)
 {
 	u16 bdiv;
 
-	uart8250_base      = (volatile char *)base;
+	uart8250_base      = (volatile char *)base + reg_offset;
 	uart8250_reg_shift = reg_shift;
 	uart8250_reg_width = reg_width;
 	uart8250_in_freq   = in_freq;
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 01232d0b70d..6bd0a69295c 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -69,7 +69,8 @@ static int ae350_console_init(void)
 			     AE350_UART_FREQUENCY,
 			     AE350_UART_BAUDRATE,
 			     AE350_UART_REG_SHIFT,
-			     AE350_UART_REG_WIDTH);
+			     AE350_UART_REG_WIDTH,
+			     AE350_UART_REG_OFFSET);
 }
 
 /* Initialize the platform interrupt controller for current HART. */
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index f34ca0fcc19..9b548166a34 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -28,6 +28,7 @@
 #define AE350_UART_BAUDRATE		38400
 #define AE350_UART_REG_SHIFT		2
 #define AE350_UART_REG_WIDTH		0
+#define AE350_UART_REG_OFFSET		0
 
 /*Memory and Miscellaneous Registers*/
 #define CSR_MILMB		0x7c0
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index c6f0ffd8c06..3fdc03bcb92 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -23,6 +23,7 @@
 #define ARIANE_UART_BAUDRATE			115200
 #define ARIANE_UART_REG_SHIFT			2
 #define ARIANE_UART_REG_WIDTH			4
+#define ARIANE_UART_REG_OFFSET			0
 #define ARIANE_PLIC_ADDR			0xc000000
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
@@ -92,7 +93,8 @@ static int ariane_console_init(void)
 			     ARIANE_UART_FREQ,
 			     ARIANE_UART_BAUDRATE,
 			     ARIANE_UART_REG_SHIFT,
-			     ARIANE_UART_REG_WIDTH);
+			     ARIANE_UART_REG_WIDTH,
+			     ARIANE_UART_REG_OFFSET);
 }
 
 static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 59c670248da..15e289abd61 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -22,6 +22,7 @@
 #define OPENPITON_DEFAULT_UART_BAUDRATE		115200
 #define OPENPITON_DEFAULT_UART_REG_SHIFT	0
 #define OPENPITON_DEFAULT_UART_REG_WIDTH	1
+#define OPENPITON_DEFAULT_UART_REG_OFFSET	0
 #define OPENPITON_DEFAULT_PLIC_ADDR		0xfff1100000
 #define OPENPITON_DEFAULT_PLIC_NUM_SOURCES	2
 #define OPENPITON_DEFAULT_HART_COUNT		3
@@ -127,7 +128,8 @@ static int openpiton_console_init(void)
 			     uart.freq,
 			     uart.baud,
 			     OPENPITON_DEFAULT_UART_REG_SHIFT,
-			     OPENPITON_DEFAULT_UART_REG_WIDTH);
+			     OPENPITON_DEFAULT_UART_REG_WIDTH,
+			     OPENPITON_DEFAULT_UART_REG_OFFSET);
 }
 
 static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index d6806e6e544..5524847cf58 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -79,7 +79,7 @@ static int platform_console_init(void)
 {
 	/* Example if the generic UART8250 driver is used */
 	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
-			     PLATFORM_UART_BAUDRATE, 0, 1);
+			     PLATFORM_UART_BAUDRATE, 0, 1, 0);
 }
 
 /*

From c1e47d0c3f9274553df27e2d69c96c30029912b2 Mon Sep 17 00:00:00 2001
From: Vincent Chen <vincent.chen@sifive.com>
Date: Tue, 12 Apr 2022 09:16:53 +0800
Subject: [PATCH 0962/1765] include: correct the definition of MSTATUS_VS

Accordind to the RISC-V privileged specification, the VS filed is
mstatus[10:9] instead of mstatus[24:23]. Modify the MSTATUS_VS
to the correct value.

Reported-by: I-Cheng Cheng <i-cheng.cheng@sifive.com>
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 04d562151e0..a9772a67599 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -25,7 +25,7 @@
 #define MSTATUS_MPP			(_UL(3) << MSTATUS_MPP_SHIFT)
 #define MSTATUS_FS			_UL(0x00006000)
 #define MSTATUS_XS			_UL(0x00018000)
-#define MSTATUS_VS			_UL(0x01800000)
+#define MSTATUS_VS			_UL(0x00000600)
 #define MSTATUS_MPRV			_UL(0x00020000)
 #define MSTATUS_SUM			_UL(0x00040000)
 #define MSTATUS_MXR			_UL(0x00080000)

From 9cd95e13bba9986396fe55b33aacd6b42313d1d9 Mon Sep 17 00:00:00 2001
From: Dmitry Dunaev <dunaich@mail.ru>
Date: Sun, 17 Apr 2022 14:43:08 +0530
Subject: [PATCH 0963/1765] lib: sbi/hart: preserve csr validation value

The OpenSBI hart init function hart_detect_features() try to read
important CSRs but reasign the last read value to the variable that
initially contains write probe value. So for series of CSRs (like
PMPADDRx) the second CSR probe value will became the initial value of
first probing CSR. To avoid of this issue the CSR read value should be
saved in different variable. In this configuration the count of PMP
will detect rightly if any PMPADDR is hardwired to zero.

Signed-off-by: Dmitry Dunaev <dunaich@mail.ru>
Signed-off-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 7b602c30021..891fa18342b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -478,7 +478,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
 	struct hart_features *hfeatures;
-	unsigned long val;
+	unsigned long val, oldval;
 
 	/* Reset hart features */
 	hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
@@ -487,14 +487,14 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->mhpm_count = 0;
 
 #define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
-	val = csr_read_allowed(__csr, (ulong)&trap);			\
+	oldval = csr_read_allowed(__csr, (ulong)&trap);			\
 	if (!trap.cause) {						\
 		if (__rdonly) {						\
 			(hfeatures->__field)++;				\
 		} else {						\
 			csr_write_allowed(__csr, (ulong)&trap, __wrval);\
 			if (!trap.cause) {				\
-				if (csr_swap(__csr, val) == __wrval)	\
+				if (csr_swap(__csr, oldval) == __wrval)	\
 					(hfeatures->__field)++;		\
 				else					\
 					goto __skip;			\

From 4035ae94be802a68f8e8408a84b77f531d59416b Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Wed, 20 Apr 2022 19:48:56 -0700
Subject: [PATCH 0964/1765] docs: pmu: Improve the PMU DT bindings

The current DT binding description is misleading and confusing. Clarify
the text and provide more examples.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 49 ++++++++++++++++++++++++++++-----------------
 1 file changed, 31 insertions(+), 18 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 7e3367cffe7..8751bb541be 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -51,37 +51,50 @@ shouldn't encode any raw event.
 
 * **riscv,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY
 or MANY-to-MANY mapping between the raw event(s) and all the MHPMCOUNTERx in
-a bitmap format that can be used to monitor that raw event, which depends on
-how the platform encodes the monitor events. Currently, only the following three
-encoding methods are supported, encoding each event as a number, using a bitmap
-to encode monitor events, and mixing the previous two methods. The information
-is encoded in a table format where each row represent the specific raw event(s).
-The first column represents a 64-bit selector value which can indicate an
-monitor event ID (encoded by a number) or an event set (encoded by a bitmap).
-In case of the latter, the lower bits used to encode a set of events should be
-set to zero. The second column is a 64-bit selector mask where any bits used
-for event encoding will be cleared. If a platform directly encodes each raw PMU
-event as a unique ID, the value of select_mask will be 0xffffffff_ffffffff.
-The third column represent a bitmap of all the MHPMCOUNTERx that can be used for
-monitoring the specified event(s).
+a bitmap format that can be used to monitor that raw event. The encoding of the
+raw events are platform specific. The information is encoded in a table format
+where each row represent the specific raw event(s). The first column is a 64bit
+match value where the invariant bits of range of events are set. The second
+column is a 64 bit mask that will have all the variant bits of the range of
+events cleared. Every other bits should be set in the mask.
+The third column is a 32bit value to represent bitmap of all MHPMCOUNTERx that
+can monitor these set of event(s).
+If a platform directly encodes each raw PMU event as a unique ID, the value of
+select_mask must be 0xffffffff_ffffffff.
 
 *Note:* A platform may choose to provide the mapping between event & counters
 via platform hooks rather than the device tree.
 
-### Example
+### Example 1
 
 ```
 pmu {
 	compatible 			= "riscv,pmu";
-	interrupts 			= <0x100>;
-	interrupt-parent 			= <&plic>
 	riscv,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>,
 	riscv,event-to-mhpmcounters 	= <0x00001 0x00001 0x00000001>,
 						  <0x00002 0x00002 0x00000004>,
 						  <0x00003 0x0000A 0x00000ff8>,
 						  <0x10000 0x10033 0x000ff000>,
-	riscv,raw-event-to-mhpmcounters = <0x0000     0x0002 0xffffffff 0xffffffff 0x00000f8>,
-					  <0xffffffff 0xfffffff0 0xffffffff 0xfffffff0 0x00000ff0>,
+					/* For event ID 0x0002 */
+	riscv,raw-event-to-mhpmcounters = <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
+					/* For event ID 0-4 */
+					<0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
+					/* For event ID 0xffffffff0000000f - 0xffffffff000000ff */
+					<0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0>,
 };
+```
+
+### Example 2
 
 ```
+/*
+ * For HiFive Unmatched board. The encodings can be found here
+ * https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16acba_fu740-c000-manual-v1p6.pdf
+ */
+pmu {
+	compatible 			= "riscv,pmu";
+	riscv,raw-event-to-mhpmcounters = <0x0 0x0 0xffffffff 0xfc0000ff 0xc>,
+					  <0x0 0x1 0xffffffff 0xfff800ff 0xc>,
+					  <0x0 0x2 0xffffffff 0xffffe0ff 0xc>;
+};
+```

From d62f6da062ad0fcc3bdc042a3f3b200d91d18afd Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Mon, 25 Apr 2022 23:29:22 -0700
Subject: [PATCH 0965/1765] lib: sbi: Implement Sstc extension

Recently, Sstc extension was ratified. It defines stimecmp which allows
the supervisor mode to directly update the timecmp value without the
need of the SBI call. The hardware also can inject the S-mode timer
interrupt direclty to the supervisor without going through the M-mode.
To maintain backward compatibility with the older software, SBI call
now uses stimecmp directly if the hardware supports.

Implement the Sstc extension.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h |  4 ++++
 include/sbi/sbi_hart.h       |  4 +++-
 lib/sbi/sbi_hart.c           | 28 ++++++++++++++++++++++++++++
 lib/sbi/sbi_timer.c          | 25 ++++++++++++++++++++++---
 4 files changed, 57 insertions(+), 4 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a9772a67599..7cfbaced55d 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -324,6 +324,10 @@
 #define CSR_STVAL			0x143
 #define CSR_SIP				0x144
 
+/* Sstc extension */
+#define CSR_STIMECMP			0x14D
+#define CSR_STIMECMPH			0x15D
+
 /* Supervisor Protection and Translation */
 #define CSR_SATP			0x180
 
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index be3ad9fac0d..1d093742a7e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -30,9 +30,11 @@ enum sbi_hart_features {
 	SBI_HART_HAS_MENVCFG = (1 << 6),
 	/** HART has mstateen CSR **/
 	SBI_HART_HAS_SMSTATEEN = (1 << 7),
+	/** HART has SSTC extension implemented in hardware */
+	SBI_HART_HAS_SSTC = (1 << 8),
 
 	/** Last index of Hart features*/
-	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SMSTATEEN,
+	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
 };
 
 struct sbi_scratch;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 891fa18342b..a50b6e4b345 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -147,6 +147,22 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		menvcfg_val |= ENVCFG_PBMTE;
 #endif
 
+		/*
+		 * The spec doesn't explicitly describe the reset value of menvcfg.
+		 * Enable access to stimecmp if sstc extension is present in the
+		 * hardware.
+		 */
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSTC)) {
+#if __riscv_xlen == 32
+			unsigned long menvcfgh_val;
+			menvcfgh_val = csr_read(CSR_MENVCFGH);
+			menvcfgh_val |= ENVCFGH_STCE;
+			csr_write(CSR_MENVCFGH, menvcfgh_val);
+#else
+			menvcfg_val |= ENVCFG_STCE;
+#endif
+		}
+
 		csr_write(CSR_MENVCFG, menvcfg_val);
 	}
 
@@ -367,6 +383,8 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		break;
 	case SBI_HART_HAS_AIA:
 		fstr = "aia";
+	case SBI_HART_HAS_SSTC:
+		fstr = "sstc";
 		break;
 	case SBI_HART_HAS_MENVCFG:
 		fstr = "menvcfg";
@@ -610,6 +628,16 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	if (!trap.cause)
 		hfeatures->features |= SBI_HART_HAS_MENVCFG;
 
+	/**
+	 * Detect if hart supports stimecmp CSR(Sstc extension) and menvcfg is
+	 * implemented.
+	 */
+	if (hfeatures->features & SBI_HART_HAS_MENVCFG) {
+		csr_read_allowed(CSR_STIMECMP, (unsigned long)&trap);
+		if (!trap.cause)
+			hfeatures->features |= SBI_HART_HAS_SSTC;
+	}
+
 	/* Detect if hart supports mstateen CSRs */
 	val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
 	if (!trap.cause)
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index acdba922b1e..bf0f375a106 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -124,16 +124,35 @@ void sbi_timer_set_delta_upper(ulong delta_upper)
 void sbi_timer_event_start(u64 next_event)
 {
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SET_TIMER);
-	if (timer_dev && timer_dev->timer_event_start)
+
+	/**
+	 * Update the stimecmp directly if available. This allows
+	 * the older software to leverage sstc extension on newer hardware.
+	 */
+	if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(), SBI_HART_HAS_SSTC)) {
+#if __riscv_xlen == 32
+		csr_write(CSR_STIMECMP, next_event & 0xFFFFFFFF);
+		csr_write(CSR_STIMECMPH, next_event >> 32);
+#else
+		csr_write(CSR_STIMECMP, next_event);
+#endif
+	} else if (timer_dev && timer_dev->timer_event_start) {
 		timer_dev->timer_event_start(next_event);
-	csr_clear(CSR_MIP, MIP_STIP);
+		csr_clear(CSR_MIP, MIP_STIP);
+	}
 	csr_set(CSR_MIE, MIP_MTIP);
 }
 
 void sbi_timer_process(void)
 {
 	csr_clear(CSR_MIE, MIP_MTIP);
-	csr_set(CSR_MIP, MIP_STIP);
+	/*
+	 * If sstc extension is available, supervisor can receive the timer
+	 * directly without M-mode come in between. This function should
+	 * only invoked if M-mode programs the timer for its own purpose.
+	 */
+	if (!sbi_hart_has_feature(sbi_scratch_thishart_ptr(), SBI_HART_HAS_SSTC))
+		csr_set(CSR_MIP, MIP_STIP);
 }
 
 const struct sbi_timer_device *sbi_timer_get_device(void)

From 474a9d45551ab8c7df511a6620de2427a732351f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 13:13:59 +0530
Subject: [PATCH 0966/1765] lib: sbi: Fix mstatus_init() for RV32 when Sscofpmf
 is not available

The mhpmevent3h to mhpmevent31h CSRs are available on RV32 only when
Sscofpmf extension is available so mstatus_init() should set this
CSRs only when Sscofpmf extension is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_hart.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a50b6e4b345..229c14a5b47 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -82,7 +82,9 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	for (cidx = 0; cidx < num_mhpm; cidx++) {
 #if __riscv_xlen == 32
 		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val & 0xFFFFFFFF);
-		csr_write_num(CSR_MHPMEVENT3H + cidx, mhpmevent_init_val >> BITS_PER_LONG);
+		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+			csr_write_num(CSR_MHPMEVENT3H + cidx,
+				      mhpmevent_init_val >> BITS_PER_LONG);
 #else
 		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val);
 #endif

From e576b3e620675b48a34cc2e9c6a589df3ceaf4cf Mon Sep 17 00:00:00 2001
From: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
Date: Thu, 28 Apr 2022 17:45:02 +0800
Subject: [PATCH 0967/1765] include: sbi: Define SBI_PMU_HW_EVENT_MAX to 256

Increase maximum number of PMU hardware events that can be mapped
by OpenSBI to 256

Signed-off-by: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
Signed-off-by: Wei Liang Lim <weiliang.lim@linux.starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 6a1c62ccfbe..f5e3dbdf66e 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -17,7 +17,7 @@
 
 /* Event related macros */
 /* Maximum number of hardware events that can mapped by OpenSBI */
-#define SBI_PMU_HW_EVENT_MAX 64
+#define SBI_PMU_HW_EVENT_MAX 256
 
 /* Maximum number of firmware events that can mapped by OpenSBI */
 #define SBI_PMU_FW_EVENT_MAX 32

From b0c9df514bdb29a0c90c9868f4209f2ac7a6d567 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 28 Apr 2022 11:48:29 -0700
Subject: [PATCH 0968/1765] lib: sbi: Fix mhpmeventh access for rv32 in absence
 of sscofpmf

MHPMEVENT3H-31H are defined in sscofpmf extension. Thus, they should be
accessed only if sscofpmf is present.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/riscv_asm.c | 4 ++++
 lib/sbi/sbi_pmu.c   | 8 ++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 5eab1ed5724..ddc4c139b95 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -139,6 +139,10 @@ unsigned long csr_read_num(int csr_num)
 	switchcase_csr_read_4(CSR_MHPMCOUNTER4H, ret)
 	switchcase_csr_read_8(CSR_MHPMCOUNTER8H, ret)
 	switchcase_csr_read_16(CSR_MHPMCOUNTER16H, ret)
+	/**
+	 * The CSR range MHPMEVENT[3-16]H are available only if sscofpmf
+	 * extension is present. The caller must ensure that.
+	 */
 	switchcase_csr_read(CSR_MHPMEVENT3H, ret)
 	switchcase_csr_read_4(CSR_MHPMEVENT4H, ret)
 	switchcase_csr_read_8(CSR_MHPMEVENT8H, ret)
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 7ea0ca5e2fa..f458c6d4a22 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -404,7 +404,9 @@ static int pmu_reset_hw_mhpmevent(int ctr_idx)
 		return SBI_EFAIL;
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
-	csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, 0);
+	if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(),
+                                 SBI_HART_HAS_SSCOFPMF))
+		csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, 0);
 #else
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
 #endif
@@ -483,7 +485,9 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val & 0xFFFFFFFF);
-	csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, mhpmevent_val >> BITS_PER_LONG);
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3,
+			      mhpmevent_val >> BITS_PER_LONG);
 #else
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val);
 #endif

From 1a754bb36522247e51fdb95323c5fa3e256db872 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 17:30:02 +0530
Subject: [PATCH 0969/1765] lib: sbi: Detect and print privileged spec version

It is possible to guess privileged spec versions based on the CSRs
that where introduced in different privileged spec versions. In
future, if we are not able guess privileged spec version then we
can have platform provide it.

We add privileged spec version as per-hart feature and try to guess
it based on presence of mcounteren, mcountinhibit, and menvcfg CSRs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h | 15 ++++++++++++
 lib/sbi/sbi_hart.c     | 52 +++++++++++++++++++++++++++++++++++++-----
 lib/sbi/sbi_init.c     |  2 ++
 3 files changed, 63 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 1d093742a7e..3c37933e572 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -12,6 +12,18 @@
 
 #include <sbi/sbi_types.h>
 
+/** Possible privileged specification versions of a hart */
+enum sbi_hart_priv_versions {
+	/** Unknown privileged specification */
+	SBI_HART_PRIV_VER_UNKNOWN = 0,
+	/** Privileged specification v1.10 */
+	SBI_HART_PRIV_VER_1_10 = 1,
+	/** Privileged specification v1.11 */
+	SBI_HART_PRIV_VER_1_11 = 2,
+	/** Privileged specification v1.12 */
+	SBI_HART_PRIV_VER_1_12 = 3,
+};
+
 /** Possible feature flags of a hart */
 enum sbi_hart_features {
 	/** Hart has S-mode counter enable */
@@ -56,6 +68,9 @@ unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
 unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
+int sbi_hart_priv_version(struct sbi_scratch *scratch);
+void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
+				   char *version_str, int nvstr);
 bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
 void sbi_hart_get_features_str(struct sbi_scratch *scratch,
 			       char *features_str, int nfstr);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 229c14a5b47..ed4e6318517 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -28,6 +28,7 @@ extern void __sbi_expected_trap_hext(void);
 void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 
 struct hart_features {
+	int priv_version;
 	unsigned long features;
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
@@ -334,6 +335,39 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 	return 0;
 }
 
+int sbi_hart_priv_version(struct sbi_scratch *scratch)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->priv_version;
+}
+
+void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
+				   char *version_str, int nvstr)
+{
+	char *temp;
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	switch (hfeatures->priv_version) {
+	case SBI_HART_PRIV_VER_1_10:
+		temp = "v1.10";
+		break;
+	case SBI_HART_PRIV_VER_1_11:
+		temp = "v1.11";
+		break;
+	case SBI_HART_PRIV_VER_1_12:
+		temp = "v1.12";
+		break;
+	default:
+		temp = "unknown";
+		break;
+	}
+
+	sbi_snprintf(version_str, nvstr, "%s", temp);
+}
+
 /**
  * Check whether a particular hart feature is available
  *
@@ -583,6 +617,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	/* Detect if hart supports SCOUNTEREN feature */
 	val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
+		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
 		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
 		if (!trap.cause)
 			hfeatures->features |= SBI_HART_HAS_SCOUNTEREN;
@@ -591,6 +626,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	/* Detect if hart supports MCOUNTEREN feature */
 	val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
 	if (!trap.cause) {
+		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
 		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
 		if (!trap.cause)
 			hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
@@ -600,8 +636,17 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
 	if (!trap.cause) {
 		csr_write_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap, val);
-		if (!trap.cause)
+		if (!trap.cause) {
+			hfeatures->priv_version = SBI_HART_PRIV_VER_1_11;
 			hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT;
+		}
+	}
+
+	/* Detect if hart has menvcfg CSR */
+	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
+	if (!trap.cause) {
+		hfeatures->priv_version = SBI_HART_PRIV_VER_1_12;
+		hfeatures->features |= SBI_HART_HAS_MENVCFG;
 	}
 
 	/* Counter overflow/filtering is not useful without mcounter/inhibit */
@@ -625,11 +670,6 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->features |= SBI_HART_HAS_AIA;
 __aia_skip:
 
-	/* Detect if hart has menvcfg CSR */
-	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
-	if (!trap.cause)
-		hfeatures->features |= SBI_HART_HAS_MENVCFG;
-
 	/**
 	 * Detect if hart supports stimecmp CSR(Sstc extension) and menvcfg is
 	 * implemented.
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 2b9e5ae2f19..660b11ff8d9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -139,6 +139,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	/* Boot HART details */
 	sbi_printf("Boot HART ID              : %u\n", hartid);
 	sbi_printf("Boot HART Domain          : %s\n", dom->name);
+	sbi_hart_get_priv_version_str(scratch, str, sizeof(str));
+	sbi_printf("Boot HART Priv Version    : %s\n", str);
 	misa_string(xlen, str, sizeof(str));
 	sbi_printf("Boot HART ISA             : %s\n", str);
 	sbi_hart_get_features_str(scratch, str, sizeof(str));

From 5a6be99cc53b80ff1691e127d6dfbdd7ec4e9e45 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 17:50:59 +0530
Subject: [PATCH 0970/1765] lib: sbi: Remove 's' and 'u' from misa_string()
 output

Both 's' and 'u' are not treated as ISA extensions since these are
privilege modes so let's remove it from misa_string() output.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/riscv_asm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index ddc4c139b95..a09cf78e9c1 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -53,7 +53,7 @@ int misa_xlen(void)
 void misa_string(int xlen, char *out, unsigned int out_sz)
 {
 	unsigned int i, pos = 0;
-	const char valid_isa_order[] = "iemafdqclbjtpvnsuhkorwxyzg";
+	const char valid_isa_order[] = "iemafdqclbjtpvnhkorwxyzg";
 
 	if (!out)
 		return;

From 5b8b377178df56ee6bca2cf31b7580ca07cb7d70 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 18:11:02 +0530
Subject: [PATCH 0971/1765] lib: sbi: Update the name of ISA string printed at
 boot time

The ISA string printed at boot time is not the complete ISA string
representing all single letter and multi-letter extensions rather
it is base ISA string derived from misa CSR so let us update the
boot print accordingly.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 660b11ff8d9..c4def583217 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -142,7 +142,7 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_get_priv_version_str(scratch, str, sizeof(str));
 	sbi_printf("Boot HART Priv Version    : %s\n", str);
 	misa_string(xlen, str, sizeof(str));
-	sbi_printf("Boot HART ISA             : %s\n", str);
+	sbi_printf("Boot HART Base ISA        : %s\n", str);
 	sbi_hart_get_features_str(scratch, str, sizeof(str));
 	sbi_printf("Boot HART Features        : %s\n", str);
 	sbi_printf("Boot HART PMP Count       : %d\n",

From d4b563c881d6bca15bd0c4123c245c875a80ffe6 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 18:31:57 +0530
Subject: [PATCH 0972/1765] lib: sbi: Remove MCOUNTEREN and SCOUNTEREN hart
 features

If a hart implements privileged spec v1.10 (or higher) then we can
safely assume that [m|s]counteren CSR are present and we don't need
MCOUNTEREN and SCOUNTEREN as hart features.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h    | 18 +++++++-----------
 lib/sbi/sbi_emulate_csr.c |  4 ++--
 lib/sbi/sbi_hart.c        | 29 +++++------------------------
 lib/sbi/sbi_pmu.c         |  3 ++-
 4 files changed, 16 insertions(+), 38 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 3c37933e572..4665a62df0e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,24 +26,20 @@ enum sbi_hart_priv_versions {
 
 /** Possible feature flags of a hart */
 enum sbi_hart_features {
-	/** Hart has S-mode counter enable */
-	SBI_HART_HAS_SCOUNTEREN = (1 << 0),
-	/** Hart has M-mode counter enable */
-	SBI_HART_HAS_MCOUNTEREN = (1 << 1),
 	/** Hart has counter inhibit CSR */
-	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 2),
+	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 0),
 	/** Hart has sscofpmf extension */
-	SBI_HART_HAS_SSCOFPMF = (1 << 3),
+	SBI_HART_HAS_SSCOFPMF = (1 << 1),
 	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 4),
+	SBI_HART_HAS_TIME = (1 << 2),
 	/** HART has AIA local interrupt CSRs */
-	SBI_HART_HAS_AIA = (1 << 5),
+	SBI_HART_HAS_AIA = (1 << 3),
 	/** HART has menvcfg CSR */
-	SBI_HART_HAS_MENVCFG = (1 << 6),
+	SBI_HART_HAS_MENVCFG = (1 << 4),
 	/** HART has mstateen CSR **/
-	SBI_HART_HAS_SMSTATEEN = (1 << 7),
+	SBI_HART_HAS_SMSTATEEN = (1 << 5),
 	/** HART has SSTC extension implemented in hardware */
-	SBI_HART_HAS_SSTC = (1 << 8),
+	SBI_HART_HAS_SSTC = (1 << 6),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index dbb17552fa5..aec9d3c778f 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -24,7 +24,7 @@ static bool hpm_allowed(int hpm_num, ulong prev_mode, bool virt)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (prev_mode <= PRV_S) {
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN)) {
+		if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10) {
 			cen &= csr_read(CSR_MCOUNTEREN);
 			if (virt)
 				cen &= csr_read(CSR_HCOUNTEREN);
@@ -33,7 +33,7 @@ static bool hpm_allowed(int hpm_num, ulong prev_mode, bool virt)
 		}
 	}
 	if (prev_mode == PRV_U) {
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
+		if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 			cen &= csr_read(CSR_SCOUNTEREN);
 		else
 			cen = 0;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index ed4e6318517..ed8a0610a6e 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -58,7 +58,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 
 	/* Disable user mode usage of all perf counters except default ones (CY, TM, IR) */
 	if (misa_extension('S') &&
-	    sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
+	    sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 		csr_write(CSR_SCOUNTEREN, 7);
 
 	/**
@@ -66,7 +66,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	 * Supervisor mode usage for all counters are enabled by default
 	 * But counters will not run until mcountinhibit is set.
 	 */
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* All programmable counters will start running at runtime after S-mode request */
@@ -402,12 +402,6 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		return NULL;
 
 	switch (feature) {
-	case SBI_HART_HAS_SCOUNTEREN:
-		fstr = "scounteren";
-		break;
-	case SBI_HART_HAS_MCOUNTEREN:
-		fstr = "mcounteren";
-		break;
 	case SBI_HART_HAS_MCOUNTINHIBIT:
 		fstr = "mcountinhibit";
 		break;
@@ -614,23 +608,10 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 #undef __check_csr_2
 #undef __check_csr
 
-	/* Detect if hart supports SCOUNTEREN feature */
-	val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
-	if (!trap.cause) {
-		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
-		csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
-		if (!trap.cause)
-			hfeatures->features |= SBI_HART_HAS_SCOUNTEREN;
-	}
-
-	/* Detect if hart supports MCOUNTEREN feature */
+	/* Detect if hart supports Priv v1.10 */
 	val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
-	if (!trap.cause) {
+	if (!trap.cause)
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
-		csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
-		if (!trap.cause)
-			hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
-	}
 
 	/* Detect if hart supports MCOUNTINHIBIT feature */
 	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
@@ -651,7 +632,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 
 	/* Counter overflow/filtering is not useful without mcounter/inhibit */
 	if (hfeatures->features & SBI_HART_HAS_MCOUNTINHIBIT &&
-	    hfeatures->features & SBI_HART_HAS_MCOUNTEREN) {
+	    hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		/* Detect if hart supports sscofpmf */
 		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
 		if (!trap.cause)
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index f458c6d4a22..1b8f1cf786a 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -733,7 +733,8 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
-	csr_write(CSR_MCOUNTEREN, -1);
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
+		csr_write(CSR_MCOUNTEREN, -1);
 	pmu_reset_event_map(hartid);
 }
 

From dbc3d8f0ef19563a89aea266e032acbab549f7fe Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 18:59:14 +0530
Subject: [PATCH 0973/1765] lib: sbi: Remove MCOUNTINHIBT hart feature

If a hart implements privileged spec v1.11 (or higher) then we can
safely assume that mcountinhibit CSR is present and we don't need
MCOUNTINHIBT as a hart feature.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h | 14 ++++++--------
 lib/sbi/sbi_hart.c     | 23 ++++++++---------------
 lib/sbi/sbi_pmu.c      | 10 +++++-----
 3 files changed, 19 insertions(+), 28 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 4665a62df0e..bc6b76633e5 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,20 +26,18 @@ enum sbi_hart_priv_versions {
 
 /** Possible feature flags of a hart */
 enum sbi_hart_features {
-	/** Hart has counter inhibit CSR */
-	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 0),
 	/** Hart has sscofpmf extension */
-	SBI_HART_HAS_SSCOFPMF = (1 << 1),
+	SBI_HART_HAS_SSCOFPMF = (1 << 0),
 	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 2),
+	SBI_HART_HAS_TIME = (1 << 1),
 	/** HART has AIA local interrupt CSRs */
-	SBI_HART_HAS_AIA = (1 << 3),
+	SBI_HART_HAS_AIA = (1 << 2),
 	/** HART has menvcfg CSR */
-	SBI_HART_HAS_MENVCFG = (1 << 4),
+	SBI_HART_HAS_MENVCFG = (1 << 3),
 	/** HART has mstateen CSR **/
-	SBI_HART_HAS_SMSTATEEN = (1 << 5),
+	SBI_HART_HAS_SMSTATEEN = (1 << 4),
 	/** HART has SSTC extension implemented in hardware */
-	SBI_HART_HAS_SSTC = (1 << 6),
+	SBI_HART_HAS_SSTC = (1 << 5),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index ed8a0610a6e..0fe88cb5ee7 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -70,7 +70,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		csr_write(CSR_MCOUNTEREN, -1);
 
 	/* All programmable counters will start running at runtime after S-mode request */
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
 	/**
@@ -402,9 +402,6 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		return NULL;
 
 	switch (feature) {
-	case SBI_HART_HAS_MCOUNTINHIBIT:
-		fstr = "mcountinhibit";
-		break;
 	case SBI_HART_HAS_SSCOFPMF:
 		fstr = "sscofpmf";
 		break;
@@ -613,26 +610,22 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	if (!trap.cause)
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
 
-	/* Detect if hart supports MCOUNTINHIBIT feature */
+	/* Detect if hart supports Priv v1.11 */
 	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
-	if (!trap.cause) {
-		csr_write_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap, val);
-		if (!trap.cause) {
-			hfeatures->priv_version = SBI_HART_PRIV_VER_1_11;
-			hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT;
-		}
-	}
+	if (!trap.cause &&
+	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_10))
+		hfeatures->priv_version = SBI_HART_PRIV_VER_1_11;
 
 	/* Detect if hart has menvcfg CSR */
 	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
-	if (!trap.cause) {
+	if (!trap.cause &&
+	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11)) {
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_12;
 		hfeatures->features |= SBI_HART_HAS_MENVCFG;
 	}
 
 	/* Counter overflow/filtering is not useful without mcounter/inhibit */
-	if (hfeatures->features & SBI_HART_HAS_MCOUNTINHIBIT &&
-	    hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
+	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		/* Detect if hart supports sscofpmf */
 		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
 		if (!trap.cause)
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 1b8f1cf786a..f0a88ca23cd 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -300,7 +300,7 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	if (cidx > num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
 		goto skip_inhibit_update;
 
 	/*
@@ -372,7 +372,7 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	unsigned long mctr_inhbt;
 
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
 		return 0;
 
 	mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
@@ -528,7 +528,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	    !sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
 		return fixed_ctr;
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 	for (i = 0; i < num_hw_events; i++) {
 		temp = &hw_event_map[i];
@@ -555,7 +555,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 			if (active_events[hartid][cbase] != SBI_PMU_EVENT_IDX_INVALID)
 				continue;
 			/* If mcountinhibit is supported, the bit must be enabled */
-			if ((sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT)) &&
+			if ((sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11) &&
 			    !__test_bit(cbase, &mctr_inhbt))
 				continue;
 			/* We found a valid counter that is not started yet */
@@ -730,7 +730,7 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
 	u32 hartid = current_hartid();
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)

From 97a17c2e5c38b0813bb4ab171cef893addf89cfe Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 19:18:17 +0530
Subject: [PATCH 0974/1765] lib: sbi: Remove MENVCFG hart feature

If a hart implements privileged spec v1.12 (or higher) then we can
safely assume that menvcfg CSR is present and we don't need MENVCFG
as a hart feature.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h |  6 ++----
 lib/sbi/sbi_hart.c     | 32 ++++++++++++--------------------
 2 files changed, 14 insertions(+), 24 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index bc6b76633e5..c9856747894 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -32,12 +32,10 @@ enum sbi_hart_features {
 	SBI_HART_HAS_TIME = (1 << 1),
 	/** HART has AIA local interrupt CSRs */
 	SBI_HART_HAS_AIA = (1 << 2),
-	/** HART has menvcfg CSR */
-	SBI_HART_HAS_MENVCFG = (1 << 3),
 	/** HART has mstateen CSR **/
-	SBI_HART_HAS_SMSTATEEN = (1 << 4),
+	SBI_HART_HAS_SMSTATEEN = (1 << 3),
 	/** HART has SSTC extension implemented in hardware */
-	SBI_HART_HAS_SSTC = (1 << 5),
+	SBI_HART_HAS_SSTC = (1 << 4),
 
 	/** Last index of Hart features*/
 	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 0fe88cb5ee7..5ee5dddaf00 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -97,10 +97,8 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		mstateen_val |= ((uint64_t)csr_read(CSR_MSTATEEN0H)) << 32;
 #endif
 		mstateen_val |= SMSTATEEN_STATEN;
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG))
-			mstateen_val |= SMSTATEEN0_HSENVCFG;
-		else
-			mstateen_val &= ~SMSTATEEN0_HSENVCFG;
+		mstateen_val |= SMSTATEEN0_HSENVCFG;
+
 		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_AIA))
 			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
 					SMSTATEEN0_IMSIC);
@@ -113,7 +111,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 #endif
 	}
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG)) {
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
 		menvcfg_val = csr_read(CSR_MENVCFG);
 
 		/*
@@ -413,9 +411,6 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 	case SBI_HART_HAS_SSTC:
 		fstr = "sstc";
 		break;
-	case SBI_HART_HAS_MENVCFG:
-		fstr = "menvcfg";
-		break;
 	case SBI_HART_HAS_SMSTATEEN:
 		fstr = "smstateen";
 		break;
@@ -616,13 +611,11 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_10))
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_11;
 
-	/* Detect if hart has menvcfg CSR */
+	/* Detect if hart supports Priv v1.12 */
 	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
 	if (!trap.cause &&
-	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11)) {
+	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11))
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_12;
-		hfeatures->features |= SBI_HART_HAS_MENVCFG;
-	}
 
 	/* Counter overflow/filtering is not useful without mcounter/inhibit */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
@@ -644,20 +637,19 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->features |= SBI_HART_HAS_AIA;
 __aia_skip:
 
-	/**
-	 * Detect if hart supports stimecmp CSR(Sstc extension) and menvcfg is
-	 * implemented.
-	 */
-	if (hfeatures->features & SBI_HART_HAS_MENVCFG) {
+	/* Detect if hart supports stimecmp CSR(Sstc extension) */
+	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		csr_read_allowed(CSR_STIMECMP, (unsigned long)&trap);
 		if (!trap.cause)
 			hfeatures->features |= SBI_HART_HAS_SSTC;
 	}
 
 	/* Detect if hart supports mstateen CSRs */
-	val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
-	if (!trap.cause)
-		hfeatures->features |= SBI_HART_HAS_SMSTATEEN;
+	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
+		val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
+		if (!trap.cause)
+			hfeatures->features |= SBI_HART_HAS_SMSTATEEN;
+	}
 
 	return;
 }

From a6ab94fdbf5f8bd7154ea86b8ee83f7ec394851a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 19:35:39 +0530
Subject: [PATCH 0975/1765] lib: sbi: Fix AIA feature detection

The AIA feature detection uses unnecessary goto which is not need
and AIA case in sbi_hart_feature_id2string() does not break. This
patch fixes both issues in AIA feature detection.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_hart.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 5ee5dddaf00..fdfb6d9792a 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -408,6 +408,7 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
 		break;
 	case SBI_HART_HAS_AIA:
 		fstr = "aia";
+		break;
 	case SBI_HART_HAS_SSTC:
 		fstr = "sstc";
 		break;
@@ -632,10 +633,8 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 
 	/* Detect if hart has AIA local interrupt CSRs */
 	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
-	if (trap.cause)
-		goto __aia_skip;
-	hfeatures->features |= SBI_HART_HAS_AIA;
-__aia_skip:
+	if (!trap.cause)
+		hfeatures->features |= SBI_HART_HAS_AIA;
 
 	/* Detect if hart supports stimecmp CSR(Sstc extension) */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {

From cad6c91045331009f38d13f63956a119b0b053c8 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 28 Apr 2022 21:29:22 +0530
Subject: [PATCH 0976/1765] lib: sbi: Convert hart features into hart
 extensions

Since past few years, we have been using "hart features" in OpenSBI
to represent all optionalities and multi-letter extensions defined
by the RISC-V specifications.

The RISC-V profiles specification has taken a different approach and
started assigning extension names for all optionalities which did not
have any extension name previously.
(Refer, https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc)

Inspired from the RISC-V profiles specification, we convert OpenSBI
hart features into hart extensions. Going forward, we align the
extension naming with RISC-V profiles specification. Currently, only
"time CSR" and "AIA CSR" have not been assigned extension name but
for everything else we have a name.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h  |  35 ++++++------
 lib/sbi/sbi_hart.c      | 116 +++++++++++++++++++---------------------
 lib/sbi/sbi_init.c      |   4 +-
 lib/sbi/sbi_pmu.c       |  12 ++---
 lib/sbi/sbi_timer.c     |   6 +--
 lib/sbi/sbi_trap.c      |   4 +-
 lib/utils/fdt/fdt_pmu.c |   2 +-
 7 files changed, 86 insertions(+), 93 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index c9856747894..8b21fd43ecc 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -24,21 +24,21 @@ enum sbi_hart_priv_versions {
 	SBI_HART_PRIV_VER_1_12 = 3,
 };
 
-/** Possible feature flags of a hart */
-enum sbi_hart_features {
-	/** Hart has sscofpmf extension */
-	SBI_HART_HAS_SSCOFPMF = (1 << 0),
-	/** HART has timer csr implementation in hardware */
-	SBI_HART_HAS_TIME = (1 << 1),
-	/** HART has AIA local interrupt CSRs */
-	SBI_HART_HAS_AIA = (1 << 2),
-	/** HART has mstateen CSR **/
-	SBI_HART_HAS_SMSTATEEN = (1 << 3),
-	/** HART has SSTC extension implemented in hardware */
-	SBI_HART_HAS_SSTC = (1 << 4),
+/** Possible ISA extensions of a hart */
+enum sbi_hart_extensions {
+	/** Hart has Sscofpmt extension */
+	SBI_HART_EXT_SSCOFPMF = 0,
+	/** HART has HW time CSR (extension name not available) */
+	SBI_HART_EXT_TIME,
+	/** HART has AIA CSRs (extension name not available) */
+	SBI_HART_EXT_AIA,
+	/** HART has Smstateen CSR **/
+	SBI_HART_EXT_SMSTATEEN,
+	/** HART has Sstc extension */
+	SBI_HART_EXT_SSTC,
 
-	/** Last index of Hart features*/
-	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_SSTC,
+	/** Maximum index of Hart extension */
+	SBI_HART_EXT_MAX,
 };
 
 struct sbi_scratch;
@@ -63,9 +63,10 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 int sbi_hart_priv_version(struct sbi_scratch *scratch);
 void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 				   char *version_str, int nvstr);
-bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
-void sbi_hart_get_features_str(struct sbi_scratch *scratch,
-			       char *features_str, int nfstr);
+bool sbi_hart_has_extension(struct sbi_scratch *scratch,
+			    enum sbi_hart_extensions ext);
+void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
+				 char *extension_str, int nestr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index fdfb6d9792a..cba73c191ba 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -29,7 +29,7 @@ void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 
 struct hart_features {
 	int priv_version;
-	unsigned long features;
+	unsigned long extensions;
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
 	unsigned long pmp_gran;
@@ -83,7 +83,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	for (cidx = 0; cidx < num_mhpm; cidx++) {
 #if __riscv_xlen == 32
 		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val & 0xFFFFFFFF);
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 			csr_write_num(CSR_MHPMEVENT3H + cidx,
 				      mhpmevent_init_val >> BITS_PER_LONG);
 #else
@@ -91,7 +91,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 #endif
 	}
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SMSTATEEN)) {
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMSTATEEN)) {
 		mstateen_val = csr_read(CSR_MSTATEEN0);
 #if __riscv_xlen == 32
 		mstateen_val |= ((uint64_t)csr_read(CSR_MSTATEEN0H)) << 32;
@@ -99,7 +99,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		mstateen_val |= SMSTATEEN_STATEN;
 		mstateen_val |= SMSTATEEN0_HSENVCFG;
 
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_AIA))
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_AIA))
 			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
 					SMSTATEEN0_IMSIC);
 		else
@@ -153,7 +153,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		 * Enable access to stimecmp if sstc extension is present in the
 		 * hardware.
 		 */
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSTC)) {
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSTC)) {
 #if __riscv_xlen == 32
 			unsigned long menvcfgh_val;
 			menvcfgh_val = csr_read(CSR_MENVCFGH);
@@ -207,7 +207,7 @@ static int delegate_traps(struct sbi_scratch *scratch)
 
 	/* Send M-mode interrupts and most exceptions to S-mode */
 	interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		interrupts |= MIP_LCOFIP;
 
 	exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_BREAKPOINT) |
@@ -367,102 +367,94 @@ void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 }
 
 /**
- * Check whether a particular hart feature is available
+ * Check whether a particular hart extension is available
  *
  * @param scratch pointer to the HART scratch space
- * @param feature the feature to check
- * @returns true (feature available) or false (feature not available)
+ * @param ext the extension number to check
+ * @returns true (available) or false (not available)
  */
-bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature)
+bool sbi_hart_has_extension(struct sbi_scratch *scratch,
+			    enum sbi_hart_extensions ext)
 {
 	struct hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	if (hfeatures->features & feature)
+	if (hfeatures->extensions & BIT(ext))
 		return true;
 	else
 		return false;
 }
 
-static unsigned long hart_get_features(struct sbi_scratch *scratch)
+static inline char *sbi_hart_extension_id2string(int ext)
 {
-	struct hart_features *hfeatures =
-			sbi_scratch_offset_ptr(scratch, hart_features_offset);
-
-	return hfeatures->features;
-}
-
-static inline char *sbi_hart_feature_id2string(unsigned long feature)
-{
-	char *fstr = NULL;
-
-	if (!feature)
-		return NULL;
+	char *estr = NULL;
 
-	switch (feature) {
-	case SBI_HART_HAS_SSCOFPMF:
-		fstr = "sscofpmf";
+	switch (ext) {
+	case SBI_HART_EXT_SSCOFPMF:
+		estr = "sscofpmf";
 		break;
-	case SBI_HART_HAS_TIME:
-		fstr = "time";
+	case SBI_HART_EXT_TIME:
+		estr = "time";
 		break;
-	case SBI_HART_HAS_AIA:
-		fstr = "aia";
+	case SBI_HART_EXT_AIA:
+		estr = "aia";
 		break;
-	case SBI_HART_HAS_SSTC:
-		fstr = "sstc";
+	case SBI_HART_EXT_SSTC:
+		estr = "sstc";
 		break;
-	case SBI_HART_HAS_SMSTATEEN:
-		fstr = "smstateen";
+	case SBI_HART_EXT_SMSTATEEN:
+		estr = "smstateen";
 		break;
 	default:
 		break;
 	}
 
-	return fstr;
+	return estr;
 }
 
 /**
- * Get the hart features in string format
+ * Get the hart extensions in string format
  *
  * @param scratch pointer to the HART scratch space
- * @param features_str pointer to a char array where the features string will be
- *		       updated
- * @param nfstr length of the features_str. The feature string will be truncated
- *		if nfstr is not long enough.
+ * @param extensions_str pointer to a char array where the extensions string
+ *			 will be updated
+ * @param nestr length of the features_str. The feature string will be
+ *		truncated if nestr is not long enough.
  */
-void sbi_hart_get_features_str(struct sbi_scratch *scratch,
-			       char *features_str, int nfstr)
+void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
+				 char *extensions_str, int nestr)
 {
-	unsigned long features, feat = 1UL;
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	int offset = 0, ext = 0;
 	char *temp;
-	int offset = 0;
 
-	if (!features_str || nfstr <= 0)
+	if (!extensions_str || nestr <= 0)
 		return;
-	sbi_memset(features_str, 0, nfstr);
+	sbi_memset(extensions_str, 0, nestr);
 
-	features = hart_get_features(scratch);
-	if (!features)
+	if (!hfeatures->extensions)
 		goto done;
 
 	do {
-		if (features & feat) {
-			temp = sbi_hart_feature_id2string(feat);
+		if (hfeatures->extensions & BIT(ext)) {
+			temp = sbi_hart_extension_id2string(ext);
 			if (temp) {
-				sbi_snprintf(features_str + offset, nfstr,
+				sbi_snprintf(extensions_str + offset,
+					     nestr - offset,
 					     "%s,", temp);
 				offset = offset + sbi_strlen(temp) + 1;
 			}
 		}
-		feat = feat << 1;
-	} while (feat <= SBI_HART_HAS_LAST_FEATURE);
+
+		ext++;
+	} while (ext < SBI_HART_EXT_MAX);
 
 done:
 	if (offset)
-		features_str[offset - 1] = '\0';
+		extensions_str[offset - 1] = '\0';
 	else
-		sbi_strncpy(features_str, "none", nfstr);
+		sbi_strncpy(extensions_str, "none", nestr);
 }
 
 static unsigned long hart_pmp_get_allowed_addr(void)
@@ -523,7 +515,7 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 
 	/* Reset hart features */
 	hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
-	hfeatures->features = 0;
+	hfeatures->extensions = 0;
 	hfeatures->pmp_count = 0;
 	hfeatures->mhpm_count = 0;
 
@@ -623,31 +615,31 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 		/* Detect if hart supports sscofpmf */
 		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->features |= SBI_HART_HAS_SSCOFPMF;
+			hfeatures->extensions |= BIT(SBI_HART_EXT_SSCOFPMF);
 	}
 
 	/* Detect if hart supports time CSR */
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
-		hfeatures->features |= SBI_HART_HAS_TIME;
+		hfeatures->extensions |= BIT(SBI_HART_EXT_TIME);
 
 	/* Detect if hart has AIA local interrupt CSRs */
 	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
 	if (!trap.cause)
-		hfeatures->features |= SBI_HART_HAS_AIA;
+		hfeatures->extensions |= BIT(SBI_HART_EXT_AIA);
 
 	/* Detect if hart supports stimecmp CSR(Sstc extension) */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		csr_read_allowed(CSR_STIMECMP, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->features |= SBI_HART_HAS_SSTC;
+			hfeatures->extensions |= BIT(SBI_HART_EXT_SSTC);
 	}
 
 	/* Detect if hart supports mstateen CSRs */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->features |= SBI_HART_HAS_SMSTATEEN;
+			hfeatures->extensions |= BIT(SBI_HART_EXT_SMSTATEEN);
 	}
 
 	return;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index c4def583217..d57efa7e22e 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -143,8 +143,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Boot HART Priv Version    : %s\n", str);
 	misa_string(xlen, str, sizeof(str));
 	sbi_printf("Boot HART Base ISA        : %s\n", str);
-	sbi_hart_get_features_str(scratch, str, sizeof(str));
-	sbi_printf("Boot HART Features        : %s\n", str);
+	sbi_hart_get_extensions_str(scratch, str, sizeof(str));
+	sbi_printf("Boot HART ISA Extensions  : %s\n", str);
 	sbi_printf("Boot HART PMP Count       : %d\n",
 		   sbi_hart_pmp_count(scratch));
 	sbi_printf("Boot HART PMP Granularity : %lu\n",
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index f0a88ca23cd..3ecf536002a 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -313,7 +313,7 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 
 	__clear_bit(cidx, &mctr_inhbt);
 
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		pmu_ctr_enable_irq_hw(cidx);
 	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
@@ -404,8 +404,8 @@ static int pmu_reset_hw_mhpmevent(int ctr_idx)
 		return SBI_EFAIL;
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
-	if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(),
-                                 SBI_HART_HAS_SSCOFPMF))
+	if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				   SBI_HART_EXT_SSCOFPMF))
 		csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3, 0);
 #else
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, 0);
@@ -476,7 +476,7 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	 * Always set the OVF bit(disable interrupts) and inhibit counting of
 	 * events in M-mode. The OVF bit should be enabled during the start call.
 	 */
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) |
 				 MHPMEVENT_MINH | MHPMEVENT_OF;
 
@@ -485,7 +485,7 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val & 0xFFFFFFFF);
-	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		csr_write_num(CSR_MHPMEVENT3H + ctr_idx - 3,
 			      mhpmevent_val >> BITS_PER_LONG);
 #else
@@ -525,7 +525,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	 */
 	fixed_ctr = pmu_ctr_find_fixed_fw(event_idx);
 	if (fixed_ctr >= 0 &&
-	    !sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	    !sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		return fixed_ctr;
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index bf0f375a106..353886f3a9e 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -129,7 +129,7 @@ void sbi_timer_event_start(u64 next_event)
 	 * Update the stimecmp directly if available. This allows
 	 * the older software to leverage sstc extension on newer hardware.
 	 */
-	if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(), SBI_HART_HAS_SSTC)) {
+	if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(), SBI_HART_EXT_SSTC)) {
 #if __riscv_xlen == 32
 		csr_write(CSR_STIMECMP, next_event & 0xFFFFFFFF);
 		csr_write(CSR_STIMECMPH, next_event >> 32);
@@ -151,7 +151,7 @@ void sbi_timer_process(void)
 	 * directly without M-mode come in between. This function should
 	 * only invoked if M-mode programs the timer for its own purpose.
 	 */
-	if (!sbi_hart_has_feature(sbi_scratch_thishart_ptr(), SBI_HART_HAS_SSTC))
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(), SBI_HART_EXT_SSTC))
 		csr_set(CSR_MIP, MIP_STIP);
 }
 
@@ -180,7 +180,7 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 		if (!time_delta_off)
 			return SBI_ENOMEM;
 
-		if (sbi_hart_has_feature(scratch, SBI_HART_HAS_TIME))
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_TIME))
 			get_time_val = get_ticks;
 	} else {
 		if (!time_delta_off)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 86bab6deb04..2c509e56ee5 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -272,8 +272,8 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 	}
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
-		if (sbi_hart_has_feature(sbi_scratch_thishart_ptr(),
-					 SBI_HART_HAS_AIA))
+		if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+					   SBI_HART_EXT_AIA))
 			rc = sbi_trap_aia_irq(regs, mcause);
 		else
 			rc = sbi_trap_nonaia_irq(regs, mcause);
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index a2b048f0ab2..8ba6b08fe74 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -53,7 +53,7 @@ int fdt_pmu_fixup(void *fdt)
 	fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters");
 	fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmevent");
 	fdt_delprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters");
-	if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		fdt_delprop(fdt, pmu_offset, "interrupts-extended");
 
 	return 0;

From be4903ae0019947853ebf331d5b752ea178fd697 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 29 Apr 2022 18:38:05 +0530
Subject: [PATCH 0977/1765] lib: sbi: Detect hart features only once for each
 hart

Currently, the hart_detect_features() is called everytime a hart
is stopped and started again which is unnecessary work.

We update hart_detect_features() to detect hart features only
once for each hart.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_hart.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index cba73c191ba..a5ba239d745 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -28,6 +28,7 @@ extern void __sbi_expected_trap_hext(void);
 void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 
 struct hart_features {
+	bool detected;
 	int priv_version;
 	unsigned long extensions;
 	unsigned int pmp_count;
@@ -510,11 +511,15 @@ static int hart_pmu_get_allowed_bits(void)
 static void hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
-	struct hart_features *hfeatures;
+	struct hart_features *hfeatures =
+		sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	unsigned long val, oldval;
 
-	/* Reset hart features */
-	hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
+	/* If hart features already detected then do nothing */
+	if (hfeatures->detected)
+		return;
+
+	/* Clear hart features */
 	hfeatures->extensions = 0;
 	hfeatures->pmp_count = 0;
 	hfeatures->mhpm_count = 0;
@@ -642,6 +647,9 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 			hfeatures->extensions |= BIT(SBI_HART_EXT_SMSTATEEN);
 	}
 
+	/* Mark hart feature detection done */
+	hfeatures->detected = true;
+
 	return;
 }
 

From 994ace30f7c83f0cf9bd1b27a8bf15e0c0d5f9b6 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 29 Apr 2022 20:47:04 +0530
Subject: [PATCH 0978/1765] lib: sbi: Add sbi_hart_update_extension() function

We add sbi_hart_update_extension() function which allow platforms
to enable/disable hart extensions.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h |  3 +++
 lib/sbi/sbi_hart.c     | 43 +++++++++++++++++++++++++++++++++++++-----
 2 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 8b21fd43ecc..46615067c88 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -63,6 +63,9 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
 int sbi_hart_priv_version(struct sbi_scratch *scratch);
 void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 				   char *version_str, int nvstr);
+void sbi_hart_update_extension(struct sbi_scratch *scratch,
+			       enum sbi_hart_extensions ext,
+			       bool enable);
 bool sbi_hart_has_extension(struct sbi_scratch *scratch,
 			    enum sbi_hart_extensions ext);
 void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a5ba239d745..de08f9e23d4 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -367,6 +367,34 @@ void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 	sbi_snprintf(version_str, nvstr, "%s", temp);
 }
 
+static inline void __sbi_hart_update_extension(
+					struct hart_features *hfeatures,
+					enum sbi_hart_extensions ext,
+					bool enable)
+{
+	if (enable)
+		hfeatures->extensions |= BIT(ext);
+	else
+		hfeatures->extensions &= ~BIT(ext);
+}
+
+/**
+ * Enable/Disable a particular hart extension
+ *
+ * @param scratch pointer to the HART scratch space
+ * @param ext the extension number to check
+ * @param enable new state of hart extension
+ */
+void sbi_hart_update_extension(struct sbi_scratch *scratch,
+			       enum sbi_hart_extensions ext,
+			       bool enable)
+{
+	struct hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	__sbi_hart_update_extension(hfeatures, ext, enable);
+}
+
 /**
  * Check whether a particular hart extension is available
  *
@@ -620,31 +648,36 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 		/* Detect if hart supports sscofpmf */
 		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->extensions |= BIT(SBI_HART_EXT_SSCOFPMF);
+			__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_SSCOFPMF, true);
 	}
 
 	/* Detect if hart supports time CSR */
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
-		hfeatures->extensions |= BIT(SBI_HART_EXT_TIME);
+		__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_TIME, true);
 
 	/* Detect if hart has AIA local interrupt CSRs */
 	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
 	if (!trap.cause)
-		hfeatures->extensions |= BIT(SBI_HART_EXT_AIA);
+		__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_AIA, true);
 
 	/* Detect if hart supports stimecmp CSR(Sstc extension) */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		csr_read_allowed(CSR_STIMECMP, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->extensions |= BIT(SBI_HART_EXT_SSTC);
+			__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_SSTC, true);
 	}
 
 	/* Detect if hart supports mstateen CSRs */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
 		val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
 		if (!trap.cause)
-			hfeatures->extensions |= BIT(SBI_HART_EXT_SMSTATEEN);
+			__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_SMSTATEEN, true);
 	}
 
 	/* Mark hart feature detection done */

From 023f0ad2d9c1039c0538620aa26c4680e3bfd9c9 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 29 Apr 2022 21:02:24 +0530
Subject: [PATCH 0979/1765] lib: sbi_platform: Add callback to populate HART
 extensions

We add platform specific extensions_init() callback which allows
platforms to populate HART extensions for each HART. For example,
the generic platform can populate HART extensions from HART ISA
string described in DeviceTree.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_platform.h | 18 ++++++++++++++++++
 lib/sbi/sbi_hart.c         | 18 ++++++++++++++----
 2 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 2c777ac2a13..87024dbd30b 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -89,6 +89,9 @@ struct sbi_platform_operations {
 	 */
 	int (*misa_get_xlen)(void);
 
+	/** Initialize (or populate) HART extensions for the platform */
+	int (*extensions_init)(void);
+
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
 
@@ -453,6 +456,21 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
 	return -1;
 }
 
+/**
+ * Initialize (or populate) HART extensions for the platform
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_extensions_init(
+					const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->extensions_init)
+		return sbi_platform_ops(plat)->extensions_init();
+	return 0;
+}
+
 /**
  * Initialize (or populate) domains for the platform
  *
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index de08f9e23d4..de86feee0d0 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -536,16 +536,17 @@ static int hart_pmu_get_allowed_bits(void)
 	return num_bits;
 }
 
-static void hart_detect_features(struct sbi_scratch *scratch)
+static int hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
 	struct hart_features *hfeatures =
 		sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	unsigned long val, oldval;
+	int rc;
 
 	/* If hart features already detected then do nothing */
 	if (hfeatures->detected)
-		return;
+		return 0;
 
 	/* Clear hart features */
 	hfeatures->extensions = 0;
@@ -680,10 +681,15 @@ static void hart_detect_features(struct sbi_scratch *scratch)
 					SBI_HART_EXT_SMSTATEEN, true);
 	}
 
+	/* Let platform populate extensions */
+	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr());
+	if (rc)
+		return rc;
+
 	/* Mark hart feature detection done */
 	hfeatures->detected = true;
 
-	return;
+	return 0;
 }
 
 int sbi_hart_reinit(struct sbi_scratch *scratch)
@@ -705,6 +711,8 @@ int sbi_hart_reinit(struct sbi_scratch *scratch)
 
 int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	int rc;
+
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
@@ -715,7 +723,9 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 			return SBI_ENOMEM;
 	}
 
-	hart_detect_features(scratch);
+	rc = hart_detect_features(scratch);
+	if (rc)
+		return rc;
 
 	return sbi_hart_reinit(scratch);
 }

From f726f2dc0186964feb17296471233086bcc3d1b2 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:25:50 +0530
Subject: [PATCH 0980/1765] Makefile: Allow generated C source to be anywhere
 in build directory

The generated C source could be anywhere within build directory so
let us update the make rule to comple generated C source accordingly.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index fc1ea13e519..30f7c461824 100644
--- a/Makefile
+++ b/Makefile
@@ -437,6 +437,9 @@ $(build_dir)/%.dep: $(src_dir)/%.c
 $(build_dir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
+$(build_dir)/%.o: $(build_dir)/%.c
+	$(call compile_cc,$@,$<)
+
 ifeq ($(BUILD_INFO),y)
 $(build_dir)/lib/sbi/sbi_init.o: $(libsbi_dir)/sbi_init.c FORCE
 	$(call compile_cc,$@,$<)
@@ -463,9 +466,6 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
-$(platform_build_dir)/%.o: $(platform_build_dir)/%.c
-	$(call compile_cc,$@,$<)
-
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
 	$(call compile_as_dep,$@,$<)
 

From 7fb474b9dde5d56e0d4d6a0c1627337694cdc2f2 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:00 +0530
Subject: [PATCH 0981/1765] Makefile: Add support for generating C array at
 compile time

Generating C array at compile time based on details provided by
objects.mk is a very useful feature which will help us compile
only a subset of drivers or modules.

We add a bash script (carray.sh) which takes array details and
object/variable list from command-line to generate a C source
containing array of object/variable pointers. We also extend
top-level makefile to use carray.sh whenever specified through
objects.mk.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 Makefile          | 11 +++++++
 scripts/carray.sh | 77 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100755 scripts/carray.sh

diff --git a/Makefile b/Makefile
index 30f7c461824..f619ef75939 100644
--- a/Makefile
+++ b/Makefile
@@ -404,6 +404,10 @@ compile_d2c = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(if $($(2)-varprefix-$(3)),$(eval D2C_NAME_PREFIX := $($(2)-varprefix-$(3))),$(eval D2C_NAME_PREFIX := $(5))) \
 	     $(if $($(2)-padding-$(3)),$(eval D2C_PADDING_BYTES := $($(2)-padding-$(3))),$(eval D2C_PADDING_BYTES := 0)) \
 	     $(src_dir)/scripts/d2c.sh -i $(6) -a $(D2C_ALIGN_BYTES) -p $(D2C_NAME_PREFIX) -t $(D2C_PADDING_BYTES) > $(1)
+compile_carray = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " CARRAY    $(subst $(build_dir)/,,$(1))"; \
+	     $(eval CARRAY_VAR_LIST := $(carray-$(subst .c,,$(shell basename $(1)))-y)) \
+	     $(src_dir)/scripts/carray.sh -i $(2) -l "$(CARRAY_VAR_LIST)" > $(1)
 compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " GEN-DEP   $(subst $(build_dir)/,,$(1))"; \
 	     echo "$(1:.dep=$(2)): $(3)" >> $(1)
@@ -451,6 +455,13 @@ $(build_dir)/%.dep: $(src_dir)/%.S
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
+$(build_dir)/%.dep: $(src_dir)/%.carray
+	$(call compile_gen_dep,$@,.c,$<)
+	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
+
+$(build_dir)/%.c: $(src_dir)/%.carray
+	$(call compile_carray,$@,$<)
+
 $(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
 	$(call compile_objcopy,$@,$<)
 
diff --git a/scripts/carray.sh b/scripts/carray.sh
new file mode 100755
index 00000000000..0c52bd6fa64
--- /dev/null
+++ b/scripts/carray.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+
+function usage()
+{
+	echo "Usage:"
+	echo " $0 [options]"
+	echo "Options:"
+	echo "     -h                   Display help or usage"
+	echo "     -i <input_config>    Input config file"
+	echo "     -l <variable_list>   List of variables in the array (Optional)"
+	exit 1;
+}
+
+# Command line options
+CONFIG_FILE=""
+VAR_LIST=""
+
+while getopts "hi:l:" o; do
+	case "${o}" in
+	h)
+		usage
+		;;
+	i)
+		CONFIG_FILE=${OPTARG}
+		;;
+	l)
+		VAR_LIST=${OPTARG}
+		;;
+	*)
+		usage
+		;;
+	esac
+done
+shift $((OPTIND-1))
+
+if [ -z "${CONFIG_FILE}" ]; then
+	echo "Must specify input config file"
+	usage
+fi
+
+if [ ! -f "${CONFIG_FILE}" ]; then
+	echo "The input config file should be a present"
+	usage
+fi
+
+TYPE_HEADER=`cat ${CONFIG_FILE} | awk '{ if ($1 == "HEADER:") { printf $2; exit 0; } }'`
+if [ -z "${TYPE_HEADER}" ]; then
+	echo "Must specify HEADER: in input config file"
+	usage
+fi
+
+TYPE_NAME=`cat ${CONFIG_FILE} | awk '{ if ($1 == "TYPE:") { printf $2; for (i=3; i<=NF; i++) printf " %s", $i; exit 0; } }'`
+if [ -z "${TYPE_NAME}" ]; then
+	echo "Must specify TYPE: in input config file"
+	usage
+fi
+
+ARRAY_NAME=`cat ${CONFIG_FILE} | awk '{ if ($1 == "NAME:") { printf $2; exit 0; } }'`
+if [ -z "${ARRAY_NAME}" ]; then
+	echo "Must specify NAME: in input config file"
+	usage
+fi
+
+printf "#include <%s>\n\n" "${TYPE_HEADER}"
+
+for VAR in ${VAR_LIST}; do
+	printf "extern %s %s;\n" "${TYPE_NAME}" "${VAR}"
+done
+printf "\n"
+
+printf "%s *%s[] = {\n" "${TYPE_NAME}" "${ARRAY_NAME}"
+for VAR in ${VAR_LIST}; do
+	printf "\t&%s,\n" "${VAR}"
+done
+printf "};\n\n"
+
+printf "unsigned long %s_size = sizeof(%s) / sizeof(%s *);\n" "${ARRAY_NAME}" "${ARRAY_NAME}" "${TYPE_NAME}"

From 73cf51191403be2ebdf9f9a1d17812d1550316ff Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:06 +0530
Subject: [PATCH 0982/1765] lib: utils/reset: Generate FDT reset driver list at
 compile-time

Instead of having FDT reset driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/reset/fdt_reset.c              | 22 +++++-----------------
 lib/utils/reset/fdt_reset_drivers.carray |  3 +++
 lib/utils/reset/objects.mk               | 12 ++++++++++++
 3 files changed, 20 insertions(+), 17 deletions(-)
 create mode 100644 lib/utils/reset/fdt_reset_drivers.carray

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 66281cbfc9e..4334586d39f 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -13,21 +13,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
-extern struct fdt_reset fdt_poweroff_gpio;
-extern struct fdt_reset fdt_reset_gpio;
-extern struct fdt_reset fdt_reset_htif;
-extern struct fdt_reset fdt_reset_sifive_test;
-extern struct fdt_reset fdt_reset_sunxi_wdt;
-extern struct fdt_reset fdt_reset_thead;
-
-static struct fdt_reset *reset_drivers[] = {
-	&fdt_poweroff_gpio,
-	&fdt_reset_gpio,
-	&fdt_reset_htif,
-	&fdt_reset_sifive_test,
-	&fdt_reset_sunxi_wdt,
-	&fdt_reset_thead,
-};
+/* List of FDT reset drivers generated at compile time */
+extern struct fdt_reset *fdt_reset_drivers[];
+extern unsigned long fdt_reset_drivers_size;
 
 int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 {
@@ -54,6 +42,6 @@ void fdt_reset_init(void)
 	int pos;
 	void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < array_size(reset_drivers); pos++)
-		fdt_reset_driver_init(fdt, reset_drivers[pos]);
+	for (pos = 0; pos < fdt_reset_drivers_size; pos++)
+		fdt_reset_driver_init(fdt, fdt_reset_drivers[pos]);
 }
diff --git a/lib/utils/reset/fdt_reset_drivers.carray b/lib/utils/reset/fdt_reset_drivers.carray
new file mode 100644
index 00000000000..6ff799cc4c3
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/reset/fdt_reset.h
+TYPE: struct fdt_reset
+NAME: fdt_reset_drivers
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 6c95db39715..8cddcdfb01d 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -8,9 +8,21 @@
 #
 
 libsbiutils-objs-y += reset/fdt_reset.o
+libsbiutils-objs-y += reset/fdt_reset_drivers.o
+
+carray-fdt_reset_drivers-y += fdt_poweroff_gpio
+carray-fdt_reset_drivers-y += fdt_reset_gpio
 libsbiutils-objs-y += reset/fdt_reset_gpio.o
+
+carray-fdt_reset_drivers-y += fdt_reset_htif
 libsbiutils-objs-y += reset/fdt_reset_htif.o
+
+carray-fdt_reset_drivers-y += fdt_reset_sifive_test
 libsbiutils-objs-y += reset/fdt_reset_sifive_test.o
+
+carray-fdt_reset_drivers-y += fdt_reset_sunxi_wdt
 libsbiutils-objs-y += reset/fdt_reset_sunxi_wdt.o
+
+carray-fdt_reset_drivers-y += fdt_reset_thead
 libsbiutils-objs-y += reset/fdt_reset_thead.o
 libsbiutils-objs-y += reset/fdt_reset_thead_asm.o

From 1e62705adc1268db768e4934a73242921e4550bb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:13 +0530
Subject: [PATCH 0983/1765] lib: utils/serial: Generate FDT serial driver list
 at compile-time

Instead of having FDT serial driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/serial/fdt_serial.c              | 28 ++++++----------------
 lib/utils/serial/fdt_serial_drivers.carray |  3 +++
 lib/utils/serial/objects.mk                | 16 +++++++++++++
 3 files changed, 26 insertions(+), 21 deletions(-)
 create mode 100644 lib/utils/serial/fdt_serial_drivers.carray

diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 45aea4ab001..1a4bf9e87b6 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -13,23 +13,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/serial/fdt_serial.h>
 
-extern struct fdt_serial fdt_serial_uart8250;
-extern struct fdt_serial fdt_serial_sifive;
-extern struct fdt_serial fdt_serial_litex;
-extern struct fdt_serial fdt_serial_htif;
-extern struct fdt_serial fdt_serial_shakti;
-extern struct fdt_serial fdt_serial_gaisler;
-extern struct fdt_serial fdt_serial_xlnx_uartlite;
-
-static struct fdt_serial *serial_drivers[] = {
-	&fdt_serial_uart8250,
-	&fdt_serial_sifive,
-	&fdt_serial_litex,
-	&fdt_serial_htif,
-	&fdt_serial_shakti,
-	&fdt_serial_gaisler,
-	&fdt_serial_xlnx_uartlite,
-};
+/* List of FDT serial drivers generated at compile time */
+extern struct fdt_serial *fdt_serial_drivers[];
+extern unsigned long fdt_serial_drivers_size;
 
 static struct fdt_serial dummy = {
 	.match_table = NULL,
@@ -64,8 +50,8 @@ int fdt_serial_init(void)
 	}
 
 	/* First check DT node pointed by stdout-path */
-	for (pos = 0; pos < array_size(serial_drivers) && -1 < noff; pos++) {
-		drv = serial_drivers[pos];
+	for (pos = 0; pos < fdt_serial_drivers_size && -1 < noff; pos++) {
+		drv = fdt_serial_drivers[pos];
 
 		match = fdt_match_node(fdt, noff, drv->match_table);
 		if (!match)
@@ -87,8 +73,8 @@ int fdt_serial_init(void)
 		goto done;
 
 	/* Lastly check all DT nodes */
-	for (pos = 0; pos < array_size(serial_drivers); pos++) {
-		drv = serial_drivers[pos];
+	for (pos = 0; pos < fdt_serial_drivers_size; pos++) {
+		drv = fdt_serial_drivers[pos];
 
 		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
 		if (noff < 0)
diff --git a/lib/utils/serial/fdt_serial_drivers.carray b/lib/utils/serial/fdt_serial_drivers.carray
new file mode 100644
index 00000000000..3517b2c8529
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/serial/fdt_serial.h
+TYPE: struct fdt_serial
+NAME: fdt_serial_drivers
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 4fb9627b630..d26a74eb89e 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -8,13 +8,29 @@
 #
 
 libsbiutils-objs-y += serial/fdt_serial.o
+libsbiutils-objs-y += serial/fdt_serial_drivers.o
+
+carray-fdt_serial_drivers-y += fdt_serial_gaisler
 libsbiutils-objs-y += serial/fdt_serial_gaisler.o
+
+carray-fdt_serial_drivers-y += fdt_serial_htif
 libsbiutils-objs-y += serial/fdt_serial_htif.o
+
+carray-fdt_serial_drivers-y += fdt_serial_shakti
 libsbiutils-objs-y += serial/fdt_serial_shakti.o
+
+carray-fdt_serial_drivers-y += fdt_serial_sifive
 libsbiutils-objs-y += serial/fdt_serial_sifive.o
+
+carray-fdt_serial_drivers-y += fdt_serial_litex
 libsbiutils-objs-y += serial/fdt_serial_litex.o
+
+carray-fdt_serial_drivers-y += fdt_serial_uart8250
 libsbiutils-objs-y += serial/fdt_serial_uart8250.o
+
+carray-fdt_serial_drivers-y += fdt_serial_xlnx_uartlite
 libsbiutils-objs-y += serial/fdt_serial_xlnx_uartlite.o
+
 libsbiutils-objs-y += serial/gaisler-uart.o
 libsbiutils-objs-y += serial/shakti-uart.o
 libsbiutils-objs-y += serial/sifive-uart.o

From bfeb305e0f8da3f8bdff97a21a6628c3156fbfff Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:20 +0530
Subject: [PATCH 0984/1765] lib: utils/timer: Generate FDT timer driver list at
 compile-time

Instead of having FDT timer driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/timer/fdt_timer.c              | 12 +++++-------
 lib/utils/timer/fdt_timer_drivers.carray |  3 +++
 lib/utils/timer/objects.mk               |  4 ++++
 3 files changed, 12 insertions(+), 7 deletions(-)
 create mode 100644 lib/utils/timer/fdt_timer_drivers.carray

diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 781bb633cd5..4695c0f02aa 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -12,11 +12,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
 
-extern struct fdt_timer fdt_timer_mtimer;
-
-static struct fdt_timer *timer_drivers[] = {
-	&fdt_timer_mtimer
-};
+/* List of FDT timer drivers generated at compile time */
+extern struct fdt_timer *fdt_timer_drivers[];
+extern unsigned long fdt_timer_drivers_size;
 
 static struct fdt_timer dummy = {
 	.match_table = NULL,
@@ -47,8 +45,8 @@ static int fdt_timer_cold_init(void)
 	const struct fdt_match *match;
 	void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < array_size(timer_drivers); pos++) {
-		drv = timer_drivers[pos];
+	for (pos = 0; pos < fdt_timer_drivers_size; pos++) {
+		drv = fdt_timer_drivers[pos];
 
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
diff --git a/lib/utils/timer/fdt_timer_drivers.carray b/lib/utils/timer/fdt_timer_drivers.carray
new file mode 100644
index 00000000000..c62ee733e13
--- /dev/null
+++ b/lib/utils/timer/fdt_timer_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/timer/fdt_timer.h
+TYPE: struct fdt_timer
+NAME: fdt_timer_drivers
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index 12cffcf099f..bc4073d5a26 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -8,5 +8,9 @@
 #
 
 libsbiutils-objs-y += timer/aclint_mtimer.o
+
 libsbiutils-objs-y += timer/fdt_timer.o
+libsbiutils-objs-y += timer/fdt_timer_drivers.o
+
+carray-fdt_timer_drivers-y += fdt_timer_mtimer
 libsbiutils-objs-y += timer/fdt_timer_mtimer.o

From 3a69d12fc3af4dbcfd4975086985bbe903e8580f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:27 +0530
Subject: [PATCH 0985/1765] lib: utils/irqchip: Generate FDT irqchip driver
 list at compile-time

Instead of having FDT irqchip driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/irqchip/fdt_irqchip.c              | 16 +++++-----------
 lib/utils/irqchip/fdt_irqchip_drivers.carray |  3 +++
 lib/utils/irqchip/objects.mk                 |  8 ++++++++
 3 files changed, 16 insertions(+), 11 deletions(-)
 create mode 100644 lib/utils/irqchip/fdt_irqchip_drivers.carray

diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 6007755b618..1b6b6748523 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -12,15 +12,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 
-extern struct fdt_irqchip fdt_irqchip_aplic;
-extern struct fdt_irqchip fdt_irqchip_imsic;
-extern struct fdt_irqchip fdt_irqchip_plic;
-
-static struct fdt_irqchip *irqchip_drivers[] = {
-	&fdt_irqchip_aplic,
-	&fdt_irqchip_imsic,
-	&fdt_irqchip_plic
-};
+/* List of FDT irqchip drivers generated at compile time */
+extern struct fdt_irqchip *fdt_irqchip_drivers[];
+extern unsigned long fdt_irqchip_drivers_size;
 
 #define FDT_IRQCHIP_MAX_DRIVERS	8
 
@@ -61,8 +55,8 @@ static int fdt_irqchip_cold_init(void)
 	const struct fdt_match *match;
 	void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < array_size(irqchip_drivers); pos++) {
-		drv = irqchip_drivers[pos];
+	for (pos = 0; pos < fdt_irqchip_drivers_size; pos++) {
+		drv = fdt_irqchip_drivers[pos];
 
 		noff = -1;
 		drv_added = false;
diff --git a/lib/utils/irqchip/fdt_irqchip_drivers.carray b/lib/utils/irqchip/fdt_irqchip_drivers.carray
new file mode 100644
index 00000000000..b373be56f61
--- /dev/null
+++ b/lib/utils/irqchip/fdt_irqchip_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/irqchip/fdt_irqchip.h
+TYPE: struct fdt_irqchip
+NAME: fdt_irqchip_drivers
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index fad4344f4b6..7775bc45787 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -8,9 +8,17 @@
 #
 
 libsbiutils-objs-y += irqchip/fdt_irqchip.o
+libsbiutils-objs-y += irqchip/fdt_irqchip_drivers.o
+
+carray-fdt_irqchip_drivers-y += fdt_irqchip_aplic
 libsbiutils-objs-y += irqchip/fdt_irqchip_aplic.o
+
+carray-fdt_irqchip_drivers-y += fdt_irqchip_imsic
 libsbiutils-objs-y += irqchip/fdt_irqchip_imsic.o
+
+carray-fdt_irqchip_drivers-y += fdt_irqchip_plic
 libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
+
 libsbiutils-objs-y += irqchip/aplic.o
 libsbiutils-objs-y += irqchip/imsic.o
 libsbiutils-objs-y += irqchip/plic.o

From 4ee0c579699ae2a083edd7033a27044763c10a81 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:35 +0530
Subject: [PATCH 0986/1765] lib: utils/ipi: Generate FDT ipi driver list at
 compile-time

Instead of having FDT ipi driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/ipi/fdt_ipi.c              | 12 +++++-------
 lib/utils/ipi/fdt_ipi_drivers.carray |  3 +++
 lib/utils/ipi/objects.mk             |  4 ++++
 3 files changed, 12 insertions(+), 7 deletions(-)
 create mode 100644 lib/utils/ipi/fdt_ipi_drivers.carray

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 91f116f0fb0..66dc51082ed 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -12,11 +12,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 
-extern struct fdt_ipi fdt_ipi_mswi;
-
-static struct fdt_ipi *ipi_drivers[] = {
-	&fdt_ipi_mswi
-};
+/* List of FDT ipi drivers generated at compile time */
+extern struct fdt_ipi *fdt_ipi_drivers[];
+extern unsigned long fdt_ipi_drivers_size;
 
 static struct fdt_ipi dummy = {
 	.match_table = NULL,
@@ -47,8 +45,8 @@ static int fdt_ipi_cold_init(void)
 	const struct fdt_match *match;
 	void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < array_size(ipi_drivers); pos++) {
-		drv = ipi_drivers[pos];
+	for (pos = 0; pos < fdt_ipi_drivers_size; pos++) {
+		drv = fdt_ipi_drivers[pos];
 
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
diff --git a/lib/utils/ipi/fdt_ipi_drivers.carray b/lib/utils/ipi/fdt_ipi_drivers.carray
new file mode 100644
index 00000000000..275fa9cfa1f
--- /dev/null
+++ b/lib/utils/ipi/fdt_ipi_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/ipi/fdt_ipi.h
+TYPE: struct fdt_ipi
+NAME: fdt_ipi_drivers
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 129eea85b1e..0b0bc2df430 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -8,5 +8,9 @@
 #
 
 libsbiutils-objs-y += ipi/aclint_mswi.o
+
 libsbiutils-objs-y += ipi/fdt_ipi.o
+libsbiutils-objs-y += ipi/fdt_ipi_drivers.o
+
+carray-fdt_ipi_drivers-y += fdt_ipi_mswi
 libsbiutils-objs-y += ipi/fdt_ipi_mswi.o

From 998ed43fde10c64b3e949a904746464b23796971 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:26:45 +0530
Subject: [PATCH 0987/1765] lib: utils/i2c: Generate FDT i2c adapter driver
 list at compile-time

Instead of having FDT i2c adapter driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/i2c/fdt_i2c.c                      | 14 +++++---------
 lib/utils/i2c/fdt_i2c_adapter_drivers.carray |  3 +++
 lib/utils/i2c/objects.mk                     |  4 ++++
 3 files changed, 12 insertions(+), 9 deletions(-)
 create mode 100644 lib/utils/i2c/fdt_i2c_adapter_drivers.carray

diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
index be8e50664d6..6fd35dd0255 100644
--- a/lib/utils/i2c/fdt_i2c.c
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -16,13 +16,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
-#include <sbi/sbi_console.h>
-
-extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
-
-static struct fdt_i2c_adapter *i2c_adapter_drivers[] = {
-	&fdt_i2c_adapter_sifive
-};
+/* List of FDT i2c adapter drivers generated at compile time */
+extern struct fdt_i2c_adapter *fdt_i2c_adapter_drivers[];
+extern unsigned long fdt_i2c_adapter_drivers_size;
 
 static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
 {
@@ -31,8 +27,8 @@ static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
 	const struct fdt_match *match;
 
 	/* Try all I2C drivers one-by-one */
-	for (pos = 0; pos < array_size(i2c_adapter_drivers); pos++) {
-		drv = i2c_adapter_drivers[pos];
+	for (pos = 0; pos < fdt_i2c_adapter_drivers_size; pos++) {
+		drv = fdt_i2c_adapter_drivers[pos];
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
 			rc = drv->init(fdt, nodeoff, match);
diff --git a/lib/utils/i2c/fdt_i2c_adapter_drivers.carray b/lib/utils/i2c/fdt_i2c_adapter_drivers.carray
new file mode 100644
index 00000000000..fd51ae1a89c
--- /dev/null
+++ b/lib/utils/i2c/fdt_i2c_adapter_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/i2c/fdt_i2c.h
+TYPE: struct fdt_i2c_adapter
+NAME: fdt_i2c_adapter_drivers
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index a748c4807b6..bb0d6d59b1f 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -8,5 +8,9 @@
 #
 
 libsbiutils-objs-y += i2c/i2c.o
+
 libsbiutils-objs-y += i2c/fdt_i2c.o
+libsbiutils-objs-y += i2c/fdt_i2c_adapter_drivers.o
+
+carray-fdt_i2c_adapter_drivers-y += fdt_i2c_adapter_sifive
 libsbiutils-objs-y += i2c/fdt_i2c_sifive.o

From 4eacd8229b63bcc220fbdaa4c294ea5ae8c978f0 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:27:12 +0530
Subject: [PATCH 0988/1765] lib: utils/gpio: Generate FDT gpio driver list at
 compile-time

Instead of having FDT gpio driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/gpio/fdt_gpio.h      |  2 ++
 lib/utils/gpio/fdt_gpio.c              | 18 ++++++++----------
 lib/utils/gpio/fdt_gpio_drivers.carray |  3 +++
 lib/utils/gpio/objects.mk              |  4 ++++
 4 files changed, 17 insertions(+), 10 deletions(-)
 create mode 100644 lib/utils/gpio/fdt_gpio_drivers.carray

diff --git a/include/sbi_utils/gpio/fdt_gpio.h b/include/sbi_utils/gpio/fdt_gpio.h
index 19e1b587406..ccbf2a11e42 100644
--- a/include/sbi_utils/gpio/fdt_gpio.h
+++ b/include/sbi_utils/gpio/fdt_gpio.h
@@ -12,6 +12,8 @@
 
 #include <sbi_utils/gpio/gpio.h>
 
+struct fdt_phandle_args;
+
 /** FDT based GPIO driver */
 struct fdt_gpio {
 	const struct fdt_match *match_table;
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index 297b248b6d8..7258128debd 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -12,11 +12,9 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 
-extern struct fdt_gpio fdt_gpio_sifive;
-
-static struct fdt_gpio *gpio_drivers[] = {
-	&fdt_gpio_sifive
-};
+/* List of FDT gpio drivers generated at compile time */
+extern struct fdt_gpio *fdt_gpio_drivers[];
+extern unsigned long fdt_gpio_drivers_size;
 
 static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
 {
@@ -25,9 +23,9 @@ static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
 	if (!chip)
 		return NULL;
 
-	for (pos = 0; pos < array_size(gpio_drivers); pos++) {
-		if (chip->driver == gpio_drivers[pos])
-			return gpio_drivers[pos];
+	for (pos = 0; pos < fdt_gpio_drivers_size; pos++) {
+		if (chip->driver == fdt_gpio_drivers[pos])
+			return fdt_gpio_drivers[pos];
 	}
 
 	return NULL;
@@ -49,8 +47,8 @@ static int fdt_gpio_init(void *fdt, u32 phandle)
 		return SBI_EINVAL;
 
 	/* Try all GPIO drivers one-by-one */
-	for (pos = 0; pos < array_size(gpio_drivers); pos++) {
-		drv = gpio_drivers[pos];
+	for (pos = 0; pos < fdt_gpio_drivers_size; pos++) {
+		drv = fdt_gpio_drivers[pos];
 
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
diff --git a/lib/utils/gpio/fdt_gpio_drivers.carray b/lib/utils/gpio/fdt_gpio_drivers.carray
new file mode 100644
index 00000000000..e863f1c59b1
--- /dev/null
+++ b/lib/utils/gpio/fdt_gpio_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/gpio/fdt_gpio.h
+TYPE: struct fdt_gpio
+NAME: fdt_gpio_drivers
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index 8eb7736d478..a5e131b41ed 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -8,5 +8,9 @@
 #
 
 libsbiutils-objs-y += gpio/fdt_gpio.o
+libsbiutils-objs-y += gpio/fdt_gpio_drivers.o
+
+carray-fdt_gpio_drivers-y += fdt_gpio_sifive
 libsbiutils-objs-y += gpio/fdt_gpio_sifive.o
+
 libsbiutils-objs-y += gpio/gpio.o

From a3a3c60b6615ca51dbab7a5d0893e98bc89a8411 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:27:18 +0530
Subject: [PATCH 0989/1765] platform: generic: Generate platform override
 module list at compile-time

Instead of having platform override module list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 platform/generic/objects.mk                       |  5 +++++
 platform/generic/platform.c                       | 14 +++++---------
 platform/generic/platform_override_modules.carray |  3 +++
 3 files changed, 13 insertions(+), 9 deletions(-)
 create mode 100644 platform/generic/platform_override_modules.carray

diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index cb15a1849b7..6f63e69e923 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -8,5 +8,10 @@
 #
 
 platform-objs-y += platform.o
+platform-objs-y += platform_override_modules.o
+
+carray-platform_override_modules-y += sifive_fu540
 platform-objs-y += sifive_fu540.o
+
+carray-platform_override_modules-y += sifive_fu740
 platform-objs-y += sifive_fu740.o
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 8a4fb702452..35c5ee4238f 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -24,13 +24,9 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
-extern const struct platform_override sifive_fu540;
-extern const struct platform_override sifive_fu740;
-
-static const struct platform_override *special_platforms[] = {
-	&sifive_fu540,
-	&sifive_fu740,
-};
+/* List of platform override modules generated at compile time */
+extern const struct platform_override *platform_override_modules[];
+extern unsigned long platform_override_modules_size;
 
 static const struct platform_override *generic_plat = NULL;
 static const struct fdt_match *generic_plat_match = NULL;
@@ -41,8 +37,8 @@ static void fw_platform_lookup_special(void *fdt, int root_offset)
 	const struct platform_override *plat;
 	const struct fdt_match *match;
 
-	for (pos = 0; pos < array_size(special_platforms); pos++) {
-		plat = special_platforms[pos];
+	for (pos = 0; pos < platform_override_modules_size; pos++) {
+		plat = platform_override_modules[pos];
 		if (!plat->match_table)
 			continue;
 
diff --git a/platform/generic/platform_override_modules.carray b/platform/generic/platform_override_modules.carray
new file mode 100644
index 00000000000..ab9d47f77b3
--- /dev/null
+++ b/platform/generic/platform_override_modules.carray
@@ -0,0 +1,3 @@
+HEADER: platform_override.h
+TYPE: const struct platform_override
+NAME: platform_override_modules

From 9a7a677d5f7e3fbc9707683b5d07b7cb2b1aa499 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 May 2022 09:27:23 +0530
Subject: [PATCH 0990/1765] platform: generic: Move Sifive platform overrides
 into own directory

Let us move SiFive platform overrides for FU540 and FU740 into a separate
directory so better maintainability. Other SoC vendors can also create
their own directory under platform/generic.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 platform/generic/objects.mk                         | 6 ------
 platform/generic/{sifive_fu540.c => sifive/fu540.c} | 0
 platform/generic/{sifive_fu740.c => sifive/fu740.c} | 0
 platform/generic/sifive/objects.mk                  | 9 +++++++++
 4 files changed, 9 insertions(+), 6 deletions(-)
 rename platform/generic/{sifive_fu540.c => sifive/fu540.c} (100%)
 rename platform/generic/{sifive_fu740.c => sifive/fu740.c} (100%)
 create mode 100644 platform/generic/sifive/objects.mk

diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index 6f63e69e923..49077546cbe 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -9,9 +9,3 @@
 
 platform-objs-y += platform.o
 platform-objs-y += platform_override_modules.o
-
-carray-platform_override_modules-y += sifive_fu540
-platform-objs-y += sifive_fu540.o
-
-carray-platform_override_modules-y += sifive_fu740
-platform-objs-y += sifive_fu740.o
diff --git a/platform/generic/sifive_fu540.c b/platform/generic/sifive/fu540.c
similarity index 100%
rename from platform/generic/sifive_fu540.c
rename to platform/generic/sifive/fu540.c
diff --git a/platform/generic/sifive_fu740.c b/platform/generic/sifive/fu740.c
similarity index 100%
rename from platform/generic/sifive_fu740.c
rename to platform/generic/sifive/fu740.c
diff --git a/platform/generic/sifive/objects.mk b/platform/generic/sifive/objects.mk
new file mode 100644
index 00000000000..c17e2df1d7a
--- /dev/null
+++ b/platform/generic/sifive/objects.mk
@@ -0,0 +1,9 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+carray-platform_override_modules-y += sifive_fu540
+platform-objs-y += sifive/fu540.o
+
+carray-platform_override_modules-y += sifive_fu740
+platform-objs-y += sifive/fu740.o

From 851c14d455207f304ab9fa6fe4d399b7f8a950fe Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Fri, 13 May 2022 09:58:54 +0530
Subject: [PATCH 0991/1765] lib: utils/irqchip: fix typo when checking for CPU
 node

Fix typo in irqchip_imsic_update_hartid_table() when checking for CPU
node.

Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 lib/utils/irqchip/fdt_irqchip_imsic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index b6962be7473..6020ac0b992 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -42,7 +42,7 @@ static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
 			continue;
 
 		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
-		if (cpu_intc_offset < 0)
+		if (cpu_offset < 0)
 			continue;
 
 		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);

From 90a9dd2b22bb5441df85a23e4e4690bec14fa1e5 Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Fri, 13 May 2022 12:58:40 +0200
Subject: [PATCH 0992/1765] lib: utils/fdt: introduce fdt_node_is_enabled()

If an FDT node contains a "status" property and this property is not
"ok" or "okay", this node should be ignored. Introduce a function that
checks this.

Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h |  2 ++
 lib/utils/fdt/fdt_helper.c         | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 2279f96f1f2..a9c0a8a1cf3 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -48,6 +48,8 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 int fdt_get_node_addr_size(void *fdt, int node, int index,
 			   uint64_t *addr, uint64_t *size);
 
+bool fdt_node_is_enabled(void *fdt, int nodeoff);
+
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
 int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 9a35969a535..3b45ae8c3e8 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -216,6 +216,24 @@ int fdt_get_node_addr_size(void *fdt, int node, int index,
 	return 0;
 }
 
+bool fdt_node_is_enabled(void *fdt, int nodeoff)
+{
+	int len;
+	const void *prop;
+
+	prop = fdt_getprop(fdt, nodeoff, "status", &len);
+	if (!prop)
+		return true;
+
+	if (!strncmp(prop, "okay", strlen("okay")))
+		return true;
+
+	if (!strncmp(prop, "ok", strlen("ok")))
+		return true;
+
+	return false;
+}
+
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
 {
 	int len;

From 616da52e186dfecb767ee7bd5913ef70028a422d Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Fri, 13 May 2022 12:58:41 +0200
Subject: [PATCH 0993/1765] lib: utils: check if CPU node is enabled

Ignore CPU nodes in FDT that are not enabled.

Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_domain.c | 14 +++++++++++++-
 lib/utils/fdt/fdt_fixup.c  |  3 +++
 lib/utils/fdt/fdt_helper.c |  3 +++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 676c7579082..bd0eec30375 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -165,6 +165,9 @@ void fdt_domain_fixup(void *fdt)
 		if (err)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, doffset))
+			continue;
+
 		fdt_nop_property(fdt, doffset, "opensbi-domain");
 	}
 
@@ -308,6 +311,9 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			if (err)
 				return err;
 
+			if (!fdt_node_is_enabled(fdt, cpu_offset))
+				continue;
+
 			sbi_hartmask_set_hart(val32, mask);
 		}
 	}
@@ -347,7 +353,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	if (val && len >= 4) {
 		cpu_offset = fdt_node_offset_by_phandle(fdt,
 							 fdt32_to_cpu(*val));
-		if (cpu_offset >= 0)
+		if (cpu_offset >= 0 && fdt_node_is_enabled(fdt, cpu_offset))
 			fdt_parse_hart_id(fdt, cpu_offset, &val32);
 	} else {
 		if (domain_offset == *cold_domain_offset)
@@ -414,6 +420,9 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 		if (SBI_HARTMASK_MAX_BITS <= val32)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
 		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
 		if (!val || len < 4)
 			return SBI_EINVAL;
@@ -460,6 +469,9 @@ int fdt_domains_populate(void *fdt)
 		if (hartid != cold_hartid)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
 		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
 		if (val && len >= 4)
 			cold_domain_offset = fdt_node_offset_by_phandle(fdt,
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index a80bd82389c..d1050bbc75b 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -38,6 +38,9 @@ void fdt_cpu_fixup(void *fdt)
 		if (err)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
 		/*
 		 * Disable a HART DT node if one of the following is true:
 		 * 1. The HART is not assigned to the current domain
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 3b45ae8c3e8..5db3fbe35ae 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -283,6 +283,9 @@ int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
 		if (err)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
 		if (hartid > *max_hartid)
 			*max_hartid = hartid;
 	}

From 575bb4e8caa02d8411934c5ca47bcf87e6764133 Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Fri, 13 May 2022 12:58:42 +0200
Subject: [PATCH 0994/1765] platform: generic: check if CPU node is enabled

Ignore CPU nodes in FDT which are not enabled.

Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/platform.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 35c5ee4238f..765127349bf 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -103,6 +103,9 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 		if (SBI_HARTMASK_MAX_BITS <= hartid)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
 		generic_hart_index2id[hart_count++] = hartid;
 	}
 

From 1bc67db80cb0a10d8ebbaaf550a79eee2a07158e Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Fri, 13 May 2022 12:58:43 +0200
Subject: [PATCH 0995/1765] lib: utils/fdt: rename fdt_parse_max_hart_id

The function returns the highest hart-id of the harts actually used in
the system (enabled). Change the name to reflect this fact.

Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h | 2 +-
 lib/utils/fdt/fdt_helper.c         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index a9c0a8a1cf3..74ea2340ab9 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -52,7 +52,7 @@ bool fdt_node_is_enabled(void *fdt, int nodeoff);
 
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
-int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid);
+int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid);
 
 int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 5db3fbe35ae..2bdb1ef23e5 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -262,7 +262,7 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
 	return 0;
 }
 
-int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
+int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid)
 {
 	u32 hartid;
 	int err, cpu_offset, cpus_offset;

From f067bb84cf2dd6493ff3fa49294d3ec80481ad75 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 26 May 2022 22:14:44 +0800
Subject: [PATCH 0996/1765] lib: sbi: fix system_opcode_insn

If the csr's operation comes from M mode, it should not be forwarded
to low-privilege processing, this patch fixes this problem.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_illegal_insn.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index bfe7d619589..388ad55d896 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
+#include <sbi/sbi_console.h>
 
 typedef int (*illegal_insn_func)(ulong insn, struct sbi_trap_regs *regs);
 
@@ -37,8 +38,15 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 	int do_write, rs1_num = (insn >> 15) & 0x1f;
 	ulong rs1_val = GET_RS1(insn, regs);
 	int csr_num   = (u32)insn >> 20;
+	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 	ulong csr_val, new_csr_val;
 
+	if (prev_mode == PRV_M) {
+		sbi_printf("%s: Failed to access CSR %#x from M-mode",
+			__func__, csr_num);
+		return SBI_EFAIL;
+	}
+
 	/* TODO: Ensure that we got CSR read/write instruction */
 
 	if (sbi_emulate_csr_read(csr_num, regs, &csr_val))

From fab0379bb60d6e177018b53f07718b69ba34948d Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 29 May 2022 13:32:11 -0500
Subject: [PATCH 0997/1765] lib: utils/fdt: Require match data to be const

Match data stores hardware attributes which do not change at runtime, so
it does not need to be mutable. Make it const.

Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/fdt/fdt_helper.h | 2 +-
 lib/utils/ipi/fdt_ipi_mswi.c       | 2 +-
 lib/utils/reset/fdt_reset_gpio.c   | 4 ++--
 lib/utils/timer/fdt_timer_mtimer.c | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 74ea2340ab9..c60af35ba9d 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -15,7 +15,7 @@
 
 struct fdt_match {
 	const char *compatible;
-	void *data;
+	const void *data;
 };
 
 #define FDT_MAX_PHANDLE_ARGS 16
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 1f0fda71c08..0176941a7d6 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -51,7 +51,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 	return 0;
 }
 
-static unsigned long clint_offset = CLINT_MSWI_OFFSET;
+static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
 
 static const struct fdt_match ipi_mswi_match[] = {
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index d28b6f5ba95..bd2c6227064 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -149,7 +149,7 @@ static int gpio_reset_init(void *fdt, int nodeoff,
 }
 
 static const struct fdt_match gpio_poweroff_match[] = {
-	{ .compatible = "gpio-poweroff", .data = (void *)FALSE },
+	{ .compatible = "gpio-poweroff", .data = (const void *)FALSE },
 	{ },
 };
 
@@ -159,7 +159,7 @@ struct fdt_reset fdt_poweroff_gpio = {
 };
 
 static const struct fdt_match gpio_reset_match[] = {
-	{ .compatible = "gpio-restart", .data = (void *)TRUE },
+	{ .compatible = "gpio-restart", .data = (const void *)TRUE },
 	{ },
 };
 
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 1ad8508f7a0..82239d5d66f 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -107,7 +107,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	return 0;
 }
 
-static unsigned long clint_offset = CLINT_MTIMER_OFFSET;
+static const unsigned long clint_offset = CLINT_MTIMER_OFFSET;
 
 static const struct fdt_match timer_mtimer_match[] = {
 	{ .compatible = "riscv,clint0", .data = &clint_offset },

From 295e5f3c6912bef798e31d6946ba0aacb91f95d0 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 29 May 2022 12:00:48 -0500
Subject: [PATCH 0998/1765] lib: sbi_timer: Drop unnecessary get_platform_ticks
 wrapper

The device's timer_value callback is already the right prototype to use
for the get_time_val function pointer.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_timer.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 353886f3a9e..b0a6e63f22c 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -44,11 +44,6 @@ static u64 get_ticks(void)
 }
 #endif
 
-static u64 get_platform_ticks(void)
-{
-	return timer_dev->timer_value();
-}
-
 static void nop_delay_fn(void *opaque)
 {
 	cpu_relax();
@@ -167,7 +162,7 @@ void sbi_timer_set_device(const struct sbi_timer_device *dev)
 
 	timer_dev = dev;
 	if (!get_time_val && timer_dev->timer_value)
-		get_time_val = get_platform_ticks;
+		get_time_val = timer_dev->timer_value;
 }
 
 int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)

From ff65bfec4e4fdef31de0871d03f58ca020d6ada2 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 29 May 2022 13:25:29 -0500
Subject: [PATCH 0999/1765] lib: sbi_illegal_insn: Constify illegal_insn_table

This table does not need to be modified at runtime.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_illegal_insn.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 388ad55d896..386b48a9cca 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -88,7 +88,7 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 	return 0;
 }
 
-static illegal_insn_func illegal_insn_table[32] = {
+static const illegal_insn_func illegal_insn_table[32] = {
 	truly_illegal_insn, /* 0 */
 	truly_illegal_insn, /* 1 */
 	truly_illegal_insn, /* 2 */

From cb8271c8e43e3c317436b7377c4fa0ac669f8fb5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 29 May 2022 13:25:30 -0500
Subject: [PATCH 1000/1765] lib: sbi_illegal_insn: Add emulation for fence.tso

While OpenC906 appears to properly decode `fence.tso` as a fence
instruction[1], the version of the C906 taped out in the Allwinner D1
does not, and raises illegal instruction.

Handle this errata by emulating `fence.tso` as `fence rw, rw`.

[1]: https://github.com/T-head-Semi/openc906/blob/30827e7f/C906_RTL_FACTORY/gen_rtl/idu/rtl/aq_idu_id_decd.v#L2097

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h |  3 +++
 lib/sbi/sbi_illegal_insn.c   | 14 +++++++++++++-
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 7cfbaced55d..a1647688aac 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -838,6 +838,9 @@
 #define INSN_MASK_WFI			0xffffff00
 #define INSN_MATCH_WFI			0x10500000
 
+#define INSN_MASK_FENCE_TSO		0xffffffff
+#define INSN_MATCH_FENCE_TSO		0x8330000f
+
 #define INSN_16BIT_MASK			0x3
 #define INSN_32BIT_MASK			0x1c
 
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 386b48a9cca..84c04f874fa 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -8,6 +8,7 @@
  */
 
 #include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_emulate_csr.h>
@@ -33,6 +34,17 @@ static int truly_illegal_insn(ulong insn, struct sbi_trap_regs *regs)
 	return sbi_trap_redirect(regs, &trap);
 }
 
+static int misc_mem_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
+{
+	/* Errata workaround: emulate `fence.tso` as `fence rw, rw`. */
+	if ((insn & INSN_MASK_FENCE_TSO) == INSN_MATCH_FENCE_TSO) {
+		smp_mb();
+		return 0;
+	}
+
+	return truly_illegal_insn(insn, regs);
+}
+
 static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 {
 	int do_write, rs1_num = (insn >> 15) & 0x1f;
@@ -92,7 +104,7 @@ static const illegal_insn_func illegal_insn_table[32] = {
 	truly_illegal_insn, /* 0 */
 	truly_illegal_insn, /* 1 */
 	truly_illegal_insn, /* 2 */
-	truly_illegal_insn, /* 3 */
+	misc_mem_opcode_insn, /* 3 */
 	truly_illegal_insn, /* 4 */
 	truly_illegal_insn, /* 5 */
 	truly_illegal_insn, /* 6 */

From adc3388d76af18487d8ba4a53a1d1e83655435f3 Mon Sep 17 00:00:00 2001
From: dramforever <dramforever@live.com>
Date: Sun, 12 Jun 2022 13:57:37 +0800
Subject: [PATCH 1001/1765] lib: sbi_trap: Redirect exception based on hedeleg

HS-mode software can choose what exceptions to delegate to VS-mode using
the hedeleg CSR. Synthetic VS/VU-mode exceptions should also honor
hedeleg. They should be redirected to VS-mode if and only if delegated
by HS-mode.

Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_trap.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 2c509e56ee5..ee3e4e9f3f0 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -99,17 +99,14 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_ENOTSUPP;
 
-	/* For certain exceptions from VS/VU-mode we redirect to VS-mode */
+	/* If exceptions came from VS/VU-mode, redirect to VS-mode if
+	 * delegated in hedeleg
+	 */
 	if (misa_extension('H') && prev_virt) {
-		switch (trap->cause) {
-		case CAUSE_FETCH_PAGE_FAULT:
-		case CAUSE_LOAD_PAGE_FAULT:
-		case CAUSE_STORE_PAGE_FAULT:
+		if ((trap->cause < __riscv_xlen) &&
+		    (csr_read(CSR_HEDELEG) & BIT(trap->cause))) {
 			next_virt = TRUE;
-			break;
-		default:
-			break;
-		};
+		}
 	}
 
 	/* Update MSTATUS MPV bits */

From ce1d6188a2169c7771af1189cc8332e7a394cd19 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Fri, 10 Jun 2022 10:19:20 +0530
Subject: [PATCH 1002/1765] platform: generic: add overrides for vendor
 extensions

Allow the vendor_ext_check and vendor_ext_provider APIs of the
generic platform to be overridden by other platforms

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/include/platform_override.h |  7 ++++++
 platform/generic/platform.c                  | 25 ++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 4af87544f6e..e55da2517e6 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -11,6 +11,7 @@
 #define __PLATFORM_OVERRIDE_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_trap.h>
 
 struct platform_override {
 	const struct fdt_match *match_table;
@@ -21,6 +22,12 @@ struct platform_override {
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+	int (*vendor_ext_check)(long extid, const struct fdt_match *match);
+	int (*vendor_ext_provider)(long extid, long funcid,
+				   const struct sbi_trap_regs *regs,
+				   unsigned long *out_value,
+				   struct sbi_trap_info *out_trap,
+				   const struct fdt_match *match);
 };
 
 #endif
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 765127349bf..bf93af6b1a5 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -168,6 +168,29 @@ static int generic_final_init(bool cold_boot)
 	return 0;
 }
 
+static int generic_vendor_ext_check(long extid)
+{
+	if (generic_plat && generic_plat->vendor_ext_check)
+		return generic_plat->vendor_ext_check(extid,
+						      generic_plat_match);
+
+	return 0;
+}
+
+static int generic_vendor_ext_provider(long extid, long funcid,
+				       const struct sbi_trap_regs *regs,
+				       unsigned long *out_value,
+				       struct sbi_trap_info *out_trap)
+{
+	if (generic_plat && generic_plat->vendor_ext_provider) {
+		return generic_plat->vendor_ext_provider(extid, funcid, regs,
+							 out_value, out_trap,
+							 generic_plat_match);
+	}
+
+	return SBI_ENOTSUPP;
+}
+
 static void generic_early_exit(void)
 {
 	if (generic_plat && generic_plat->early_exit)
@@ -236,6 +259,8 @@ const struct sbi_platform_operations platform_ops = {
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,
+	.vendor_ext_check	= generic_vendor_ext_check,
+	.vendor_ext_provider	= generic_vendor_ext_provider,
 };
 
 struct sbi_platform platform = {

From b20ed9febe0b78228055ce69d8e3fbb13f64f1cc Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:47 -0500
Subject: [PATCH 1003/1765] lib: sbi_hsm: Call a device hook during hart resume

Non-retentive suspend states may require platform-specific actions
during resume. For example, firmware may need to save and restore the
values of custom CSRs. Add a hook to support this.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi/sbi_hsm.h | 8 ++++++++
 lib/sbi/sbi_hsm.c     | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index c16e87180dc..6da8ceeaa38 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -37,6 +37,14 @@ struct sbi_hsm_device {
 	 * specified resume address
 	 */
 	int (*hart_suspend)(u32 suspend_type, ulong raddr);
+
+	/**
+	 * Perform platform-specific actions to resume from a suspended state.
+	 *
+	 * This includes restoring any platform state that was lost during
+	 * non-retentive suspend.
+	 */
+	void (*hart_resume)(void);
 };
 
 struct sbi_domain;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index c4d2c6d39ad..a7b6a809ce0 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -178,6 +178,12 @@ static int hsm_device_hart_suspend(u32 suspend_type, ulong raddr)
 	return SBI_ENOTSUPP;
 }
 
+static void hsm_device_hart_resume(void)
+{
+	if (hsm_dev && hsm_dev->hart_resume)
+		hsm_dev->hart_resume();
+}
+
 int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 {
 	u32 i;
@@ -384,6 +390,8 @@ void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)
 			   __func__, oldstate);
 		sbi_hart_hang();
 	}
+
+	hsm_device_hart_resume();
 }
 
 void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)

From 79e42eb2d646097198aed935042e289e53ff9876 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:48 -0500
Subject: [PATCH 1004/1765] lib: sbi_hsm: Assume a consistent resume address

The suspend code needs to know the resume address for two reasons:
  1) Programming some hardware register or management firmware. Here we
     assume the hardware/firmware maintains its state between suspends,
     so it only needs to be programmed once at startup.
  2) When a non-retentive suspend request ends up being retentive, due
     to lack of hardware support, pending interrupt, or for some other
     reason. However, the behavior here is not platform-dependent, and
     this can be handled in the generic hart suspend function.

Since neither situation requires the platform-level suspend function to
know the resume address, stop passing it to that function. Instead,
handle the non-retentive to retentive situation generically.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi/sbi_hsm.h |  4 ++--
 lib/sbi/sbi_hsm.c     | 46 +++++++++++++++++++------------------------
 2 files changed, 22 insertions(+), 28 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 6da8ceeaa38..d6cc468d052 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -34,9 +34,9 @@ struct sbi_hsm_device {
 	 * the hart resumes normal execution.
 	 *
 	 * For successful non-retentive suspend, the hart will resume from
-	 * specified resume address
+	 * the warm boot entry point.
 	 */
-	int (*hart_suspend)(u32 suspend_type, ulong raddr);
+	int (*hart_suspend)(u32 suspend_type);
 
 	/**
 	 * Perform platform-specific actions to resume from a suspended state.
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index a7b6a809ce0..1165acc084d 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -171,10 +171,10 @@ static int hsm_device_hart_stop(void)
 	return SBI_ENOTSUPP;
 }
 
-static int hsm_device_hart_suspend(u32 suspend_type, ulong raddr)
+static int hsm_device_hart_suspend(u32 suspend_type)
 {
 	if (hsm_dev && hsm_dev->hart_suspend)
-		return hsm_dev->hart_suspend(suspend_type, raddr);
+		return hsm_dev->hart_suspend(suspend_type);
 	return SBI_ENOTSUPP;
 }
 
@@ -319,7 +319,7 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	return 0;
 }
 
-static int __sbi_hsm_suspend_ret_default(struct sbi_scratch *scratch)
+static int __sbi_hsm_suspend_default(struct sbi_scratch *scratch)
 {
 	/* Wait for interrupt */
 	wfi();
@@ -359,23 +359,6 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 	csr_write(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));
 }
 
-static int __sbi_hsm_suspend_non_ret_default(struct sbi_scratch *scratch,
-					     ulong raddr)
-{
-	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
-
-	/* Wait for interrupt */
-	wfi();
-
-	/*
-	 * Directly jump to warm reboot to simulate resume from a
-	 * non-retentive suspend.
-	 */
-	jump_warmboot();
-
-	return 0;
-}
-
 void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)
 {
 	int oldstate;
@@ -473,17 +456,28 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 		__sbi_hsm_suspend_non_ret_save(scratch);
 
 	/* Try platform specific suspend */
-	ret = hsm_device_hart_suspend(suspend_type, scratch->warmboot_addr);
+	ret = hsm_device_hart_suspend(suspend_type);
 	if (ret == SBI_ENOTSUPP) {
 		/* Try generic implementation of default suspend types */
-		if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT) {
-			ret = __sbi_hsm_suspend_ret_default(scratch);
-		} else if (suspend_type == SBI_HSM_SUSPEND_NON_RET_DEFAULT) {
-			ret = __sbi_hsm_suspend_non_ret_default(scratch,
-						scratch->warmboot_addr);
+		if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT ||
+		    suspend_type == SBI_HSM_SUSPEND_NON_RET_DEFAULT) {
+			ret = __sbi_hsm_suspend_default(scratch);
 		}
 	}
 
+	/*
+	 * The platform may have coordinated a retentive suspend, or it may
+	 * have exited early from a non-retentive suspend. Either way, the
+	 * caller is not expecting a successful return, so jump to the warm
+	 * boot entry point to simulate resume from a non-retentive suspend.
+	 */
+	if (ret == 0 && (suspend_type & SBI_HSM_SUSP_NON_RET_BIT)) {
+		void (*jump_warmboot)(void) =
+			(void (*)(void))scratch->warmboot_addr;
+
+		jump_warmboot();
+	}
+
 fail_restore_state:
 	/*
 	 * We might have successfully resumed from retentive suspend

From 2ea7799d563ed9bbaf3b677728e928a6cd8f580c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:49 -0500
Subject: [PATCH 1005/1765] lib: irqchip/plic: Constify plic_data pointers

None of the functions modify the passed-in plic_data, so mark it const.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/irqchip/plic.h |  9 +++++----
 lib/utils/irqchip/plic.c         | 11 ++++++-----
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 0e56d801ef5..50be5df648d 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,13 +17,14 @@ struct plic_data {
 	unsigned long num_src;
 };
 
-int plic_warm_irqchip_init(struct plic_data *plic,
+int plic_warm_irqchip_init(const struct plic_data *plic,
 			   int m_cntx_id, int s_cntx_id);
 
-int plic_cold_irqchip_init(struct plic_data *plic);
+int plic_cold_irqchip_init(const struct plic_data *plic);
 
-void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val);
+void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val);
 
-void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val);
+void plic_set_ie(const struct plic_data *plic, u32 cntxid,
+		 u32 word_index, u32 val);
 
 #endif
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 0f58f3e744f..4c334ec8b53 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -21,14 +21,14 @@
 #define PLIC_CONTEXT_BASE 0x200000
 #define PLIC_CONTEXT_STRIDE 0x1000
 
-static void plic_set_priority(struct plic_data *plic, u32 source, u32 val)
+static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 {
 	volatile void *plic_priority = (char *)plic->addr +
 			PLIC_PRIORITY_BASE + 4 * source;
 	writel(val, plic_priority);
 }
 
-void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
+void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
 {
 	volatile void *plic_thresh;
 
@@ -40,7 +40,8 @@ void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
 	writel(val, plic_thresh);
 }
 
-void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
+void plic_set_ie(const struct plic_data *plic, u32 cntxid,
+		 u32 word_index, u32 val)
 {
 	volatile char *plic_ie;
 
@@ -52,7 +53,7 @@ void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
 	writel(val, plic_ie + word_index * 4);
 }
 
-int plic_warm_irqchip_init(struct plic_data *plic,
+int plic_warm_irqchip_init(const struct plic_data *plic,
 			   int m_cntx_id, int s_cntx_id)
 {
 	size_t i, ie_words;
@@ -85,7 +86,7 @@ int plic_warm_irqchip_init(struct plic_data *plic,
 	return 0;
 }
 
-int plic_cold_irqchip_init(struct plic_data *plic)
+int plic_cold_irqchip_init(const struct plic_data *plic)
 {
 	int i;
 

From 8c362e7d065eaf4d55da23a190a464ba870f89aa Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:50 -0500
Subject: [PATCH 1006/1765] lib: irqchip/plic: Factor out a context init
 function

This simplifies both the callers and the callees by removing duplicated
code and consolidating the error handling. It also fixes two bugs in the
process:
  1) ie_words was one too large when plic->num_src was a multiple of 32.
  2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA
     platforms previously only enabled one out of every 32 interrupts.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/irqchip/plic.h   |  8 ++---
 lib/utils/irqchip/plic.c           | 55 ++++++++++++++++--------------
 platform/fpga/ariane/platform.c    | 19 +++++------
 platform/fpga/openpiton/platform.c | 19 +++++------
 4 files changed, 48 insertions(+), 53 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 50be5df648d..8f21af6437d 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,14 +17,12 @@ struct plic_data {
 	unsigned long num_src;
 };
 
+int plic_context_init(const struct plic_data *plic, int context_id,
+		      bool enable, u32 threshold);
+
 int plic_warm_irqchip_init(const struct plic_data *plic,
 			   int m_cntx_id, int s_cntx_id);
 
 int plic_cold_irqchip_init(const struct plic_data *plic);
 
-void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val);
-
-void plic_set_ie(const struct plic_data *plic, u32 cntxid,
-		 u32 word_index, u32 val);
-
 #endif
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 4c334ec8b53..9bd3bf139d6 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -5,6 +5,7 @@
  *
  * Authors:
  *   Anup Patel <anup.patel@wdc.com>
+ *   Samuel Holland <samuel@sholland.org>
  */
 
 #include <sbi/riscv_io.h>
@@ -28,61 +29,63 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
-void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
+static void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
 {
 	volatile void *plic_thresh;
 
-	if (!plic)
-		return;
-
 	plic_thresh = (char *)plic->addr +
 		      PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
 	writel(val, plic_thresh);
 }
 
-void plic_set_ie(const struct plic_data *plic, u32 cntxid,
-		 u32 word_index, u32 val)
+static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
+			u32 word_index, u32 val)
 {
 	volatile char *plic_ie;
 
-	if (!plic)
-		return;
-
 	plic_ie = (char *)plic->addr +
 		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
 	writel(val, plic_ie + word_index * 4);
 }
 
-int plic_warm_irqchip_init(const struct plic_data *plic,
-			   int m_cntx_id, int s_cntx_id)
+int plic_context_init(const struct plic_data *plic, int context_id,
+		      bool enable, u32 threshold)
 {
-	size_t i, ie_words;
+	u32 ie_words, ie_value;
 
-	if (!plic)
+	if (!plic || context_id < 0)
 		return SBI_EINVAL;
 
-	ie_words = plic->num_src / 32 + 1;
+	ie_words = (plic->num_src + 31) / 32;
+	ie_value = enable ? 0xffffffffU : 0U;
+
+	for (u32 i = 0; i < ie_words; i++)
+		plic_set_ie(plic, context_id, i, ie_value);
+
+	plic_set_thresh(plic, context_id, threshold);
+
+	return 0;
+}
+
+int plic_warm_irqchip_init(const struct plic_data *plic,
+			   int m_cntx_id, int s_cntx_id)
+{
+	int ret;
 
 	/* By default, disable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(plic, m_cntx_id, i, 0);
+		ret = plic_context_init(plic, m_cntx_id, false, 0x7);
+		if (ret)
+			return ret;
 	}
 
 	/* By default, disable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(plic, s_cntx_id, i, 0);
+		ret = plic_context_init(plic, m_cntx_id, false, 0x7);
+		if (ret)
+			return ret;
 	}
 
-	/* By default, disable M-mode threshold */
-	if (m_cntx_id > -1)
-		plic_set_thresh(plic, m_cntx_id, 0x7);
-
-	/* By default, disable S-mode threshold */
-	if (s_cntx_id > -1)
-		plic_set_thresh(plic, s_cntx_id, 0x7);
-
 	return 0;
 }
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 3fdc03bcb92..56a666bb82c 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -99,24 +99,21 @@ static int ariane_console_init(void)
 
 static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
-	size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
+	int ret;
 
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(&plic, m_cntx_id, i, 1);
+		ret = plic_context_init(&plic, m_cntx_id, true, 0x1);
+		if (ret)
+			return ret;
 	}
+
 	/* Enable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(&plic, s_cntx_id, i, 1);
+		ret = plic_context_init(&plic, s_cntx_id, true, 0x0);
+		if (ret)
+			return ret;
 	}
-	/* By default, enable M-mode threshold */
-	if (m_cntx_id > -1)
-		plic_set_thresh(&plic, m_cntx_id, 1);
-	/* By default, disable S-mode threshold */
-	if (s_cntx_id > -1)
-		plic_set_thresh(&plic, s_cntx_id, 0);
 
 	return 0;
 }
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 15e289abd61..7ca21236bfe 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -134,24 +134,21 @@ static int openpiton_console_init(void)
 
 static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
-	size_t i, ie_words = plic.num_src / 32 + 1;
+	int ret;
 
 	/* By default, enable all IRQs for M-mode of target HART */
 	if (m_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(&plic, m_cntx_id, i, 1);
+		ret = plic_context_init(&plic, m_cntx_id, true, 0x1);
+		if (ret)
+			return ret;
 	}
+
 	/* Enable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
-		for (i = 0; i < ie_words; i++)
-			plic_set_ie(&plic, s_cntx_id, i, 1);
+		ret = plic_context_init(&plic, s_cntx_id, true, 0x0);
+		if (ret)
+			return ret;
 	}
-	/* By default, enable M-mode threshold */
-	if (m_cntx_id > -1)
-		plic_set_thresh(&plic, m_cntx_id, 1);
-	/* By default, disable S-mode threshold */
-	if (s_cntx_id > -1)
-		plic_set_thresh(&plic, s_cntx_id, 0);
 
 	return 0;
 }

From 415ecf28f7ade7ba5a48a0cc9be8d45a7539dd89 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:51 -0500
Subject: [PATCH 1007/1765] lib: irqchip/plic: Add context save/restore helpers

These can be used by platform code to save the PLIC context state, if
it would otherwise be lost during non-retentive suspend. The platform
is responsible for allocating all necessary storage.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/irqchip/plic.h |  6 ++++
 lib/utils/irqchip/plic.c         | 51 ++++++++++++++++++++++++++++++--
 2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 8f21af6437d..21b226618fa 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,6 +17,12 @@ struct plic_data {
 	unsigned long num_src;
 };
 
+void plic_context_save(const struct plic_data *plic, int context_id,
+		       u32 *enable, u32 *threshold);
+
+void plic_context_restore(const struct plic_data *plic, int context_id,
+			  const u32 *enable, u32 threshold);
+
 int plic_context_init(const struct plic_data *plic, int context_id,
 		      bool enable, u32 threshold);
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 9bd3bf139d6..0c640780690 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -29,6 +29,16 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
+static u32 plic_get_thresh(const struct plic_data *plic, u32 cntxid)
+{
+	volatile void *plic_thresh;
+
+	plic_thresh = (char *)plic->addr +
+		      PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
+
+	return readl(plic_thresh);
+}
+
 static void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
 {
 	volatile void *plic_thresh;
@@ -38,14 +48,49 @@ static void plic_set_thresh(const struct plic_data *plic, u32 cntxid, u32 val)
 	writel(val, plic_thresh);
 }
 
+static u32 plic_get_ie(const struct plic_data *plic, u32 cntxid,
+		       u32 word_index)
+{
+	volatile void *plic_ie;
+
+	plic_ie = (char *)plic->addr +
+		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid +
+		   4 * word_index;
+
+	return readl(plic_ie);
+}
+
 static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
 			u32 word_index, u32 val)
 {
-	volatile char *plic_ie;
+	volatile void *plic_ie;
 
 	plic_ie = (char *)plic->addr +
-		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
-	writel(val, plic_ie + word_index * 4);
+		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid +
+		   4 * word_index;
+	writel(val, plic_ie);
+}
+
+void plic_context_save(const struct plic_data *plic, int context_id,
+		       u32 *enable, u32 *threshold)
+{
+	u32 ie_words = (plic->num_src + 31) / 32;
+
+	for (u32 i = 0; i < ie_words; i++)
+		enable[i] = plic_get_ie(plic, context_id, i);
+
+	*threshold = plic_get_thresh(plic, context_id);
+}
+
+void plic_context_restore(const struct plic_data *plic, int context_id,
+			  const u32 *enable, u32 threshold)
+{
+	u32 ie_words = (plic->num_src + 31) / 32;
+
+	for (u32 i = 0; i < ie_words; i++)
+		plic_set_ie(plic, context_id, i, enable[i]);
+
+	plic_set_thresh(plic, context_id, threshold);
 }
 
 int plic_context_init(const struct plic_data *plic, int context_id,

From 2b79b694a80513696daf072db0fd980e7573b212 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:52 -0500
Subject: [PATCH 1008/1765] lib: irqchip/plic: Add priority save/restore
 helpers

These can be used by platform code to save the PLIC priority state, if
it would otherwise be lost during non-retentive suspend. The platform
is responsible for allocating all necessary storage.

As a space optimization, store the saved priority values as 8-bit
integers, since that is large enough to hold any priority value on the
relevant platforms.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/irqchip/plic.h |  5 +++++
 lib/utils/irqchip/plic.c         | 19 +++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 21b226618fa..48c24f0bf27 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,6 +17,11 @@ struct plic_data {
 	unsigned long num_src;
 };
 
+/* So far, priorities on all consumers of these functions fit in 8 bits. */
+void plic_priority_save(const struct plic_data *plic, u8 *priority);
+
+void plic_priority_restore(const struct plic_data *plic, const u8 *priority);
+
 void plic_context_save(const struct plic_data *plic, int context_id,
 		       u32 *enable, u32 *threshold);
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 0c640780690..8c25b9d7c3e 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -22,6 +22,13 @@
 #define PLIC_CONTEXT_BASE 0x200000
 #define PLIC_CONTEXT_STRIDE 0x1000
 
+static u32 plic_get_priority(const struct plic_data *plic, u32 source)
+{
+	volatile void *plic_priority = (char *)plic->addr +
+			PLIC_PRIORITY_BASE + 4 * source;
+	return readl(plic_priority);
+}
+
 static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 {
 	volatile void *plic_priority = (char *)plic->addr +
@@ -29,6 +36,18 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
+void plic_priority_save(const struct plic_data *plic, u8 *priority)
+{
+	for (u32 i = 0; i < plic->num_src; i++)
+		priority[i] = plic_get_priority(plic, i);
+}
+
+void plic_priority_restore(const struct plic_data *plic, const u8 *priority)
+{
+	for (u32 i = 0; i < plic->num_src; i++)
+		plic_set_priority(plic, i, priority[i]);
+}
+
 static u32 plic_get_thresh(const struct plic_data *plic, u32 cntxid)
 {
 	volatile void *plic_thresh;

From 69be3dff9df767c19a461fadf73ad7331b4bdb4c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:53 -0500
Subject: [PATCH 1009/1765] lib: utils/irqchip: Add FDT wrappers for PLIC
 save/restore functions

These functions save/restore the state of the PLIC associated with the
current hart. The context save/restore functions only manipulate a
single context, since most likely the M-mode context is unused and does
not need to be saved.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h | 20 ++++++++++++
 lib/utils/irqchip/fdt_irqchip_plic.c         | 32 ++++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 include/sbi_utils/irqchip/fdt_irqchip_plic.h

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
new file mode 100644
index 00000000000..f158b02f8be
--- /dev/null
+++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
@@ -0,0 +1,20 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Samuel Holland <samuel@sholland.org>
+ */
+
+#ifndef __IRQCHIP_FDT_IRQCHIP_PLIC_H__
+#define __IRQCHIP_FDT_IRQCHIP_PLIC_H__
+
+#include <sbi/sbi_types.h>
+
+void fdt_plic_priority_save(u8 *priority);
+
+void fdt_plic_priority_restore(const u8 *priority);
+
+void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold);
+
+void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold);
+
+#endif
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index b2d2a1b3bc5..89b12d40c05 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -24,6 +24,38 @@ static struct plic_data plic[PLIC_MAX_NR];
 static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
 static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
 
+void fdt_plic_priority_save(u8 *priority)
+{
+	struct plic_data *plic = plic_hartid2data[current_hartid()];
+
+	plic_priority_save(plic, priority);
+}
+
+void fdt_plic_priority_restore(const u8 *priority)
+{
+	struct plic_data *plic = plic_hartid2data[current_hartid()];
+
+	plic_priority_restore(plic, priority);
+}
+
+void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold)
+{
+	u32 hartid = current_hartid();
+
+	plic_context_save(plic_hartid2data[hartid],
+			  plic_hartid2context[hartid][smode],
+			  enable, threshold);
+}
+
+void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold)
+{
+	u32 hartid = current_hartid();
+
+	plic_context_restore(plic_hartid2data[hartid],
+			     plic_hartid2context[hartid][smode],
+			     enable, threshold);
+}
+
 static int irqchip_plic_warm_init(void)
 {
 	u32 hartid = current_hartid();

From 5e5675874ca042fe977ffb27afcfa06cadc84b8b Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:54 -0500
Subject: [PATCH 1010/1765] lib: utils/irqchip: Add wrapper for T-HEAD PLIC
 delegation

The delegation bit is lost along with the rest of the PLIC state when
the CPU power domain in the Allwinner D1 is powered down, so the PLIC
needs to be re-delegated to S-mode during the hart resume path.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h | 2 ++
 lib/utils/irqchip/fdt_irqchip_plic.c         | 7 +++++++
 2 files changed, 9 insertions(+)

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
index f158b02f8be..98d4de5767f 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip_plic.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
@@ -17,4 +17,6 @@ void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold);
 
 void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold);
 
+void thead_plic_restore(void);
+
 #endif
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 89b12d40c05..a6e185cfe12 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -151,6 +151,13 @@ static void thead_plic_plat_init(struct plic_data *pd)
 	writel_relaxed(BIT(0), (char *)pd->addr + THEAD_PLIC_CTRL_REG);
 }
 
+void thead_plic_restore(void)
+{
+	struct plic_data *plic = plic_hartid2data[current_hartid()];
+
+	thead_plic_plat_init(plic);
+}
+
 static const struct fdt_match irqchip_plic_match[] = {
 	{ .compatible = "riscv,plic0" },
 	{ .compatible = "sifive,plic-1.0.0" },

From 9dc5ec5c519b2ec1702e13a97b9e595ee5d94bf6 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 12 Jun 2022 20:03:55 -0500
Subject: [PATCH 1011/1765] platform: Add HSM implementation for Allwinner D1

Allwinner D1 contains a "PPU" power domain controller which can
automatically power down/up the CPU power domain. This power domain
includes the C906 core along with its CLINT and PLIC.

This HSM implementation supports non-retentive hart suspend by:
  1) Saving/restoring state that is lost during hart suspend,
  2) Performing cache maintenance before/after hart suspend,
  3) Configuring wakeup sources before hart suspend, and
  4) Asking the PPU to power down the hart when it enters WFI.

Since this HSM implementation is for a single-core SoC, it does not need
to worry about concurrency or saving multiple instances of state.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 platform/generic/allwinner/objects.mk  |   6 +
 platform/generic/allwinner/sun20i-d1.c | 210 +++++++++++++++++++++++++
 2 files changed, 216 insertions(+)
 create mode 100644 platform/generic/allwinner/objects.mk
 create mode 100644 platform/generic/allwinner/sun20i-d1.c

diff --git a/platform/generic/allwinner/objects.mk b/platform/generic/allwinner/objects.mk
new file mode 100644
index 00000000000..9e36ab6a189
--- /dev/null
+++ b/platform/generic/allwinner/objects.mk
@@ -0,0 +1,6 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+carray-platform_override_modules-y += sun20i_d1
+platform-objs-y += allwinner/sun20i-d1.o
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
new file mode 100644
index 00000000000..5b2656c7612
--- /dev/null
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -0,0 +1,210 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Samuel Holland <samuel@sholland.org>
+ */
+
+#include <platform_override.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip_plic.h>
+
+#define SUN20I_D1_CCU_BASE		((void *)0x02001000)
+#define SUN20I_D1_RISCV_CFG_BASE	((void *)0x06010000)
+#define SUN20I_D1_PPU_BASE		((void *)0x07001000)
+#define SUN20I_D1_PRCM_BASE		((void *)0x07010000)
+
+/*
+ * CCU
+ */
+
+#define CCU_BGR_ENABLE			(BIT(16) | BIT(0))
+
+#define RISCV_CFG_BGR_REG		0xd0c
+#define PPU_BGR_REG			0x1ac
+
+/*
+ * CSRs
+ */
+
+#define CSR_MXSTATUS			0x7c0
+#define CSR_MHCR			0x7c1
+#define CSR_MCOR			0x7c2
+#define CSR_MHINT			0x7c5
+
+static unsigned long csr_mxstatus;
+static unsigned long csr_mhcr;
+static unsigned long csr_mhint;
+
+static void sun20i_d1_csr_save(void)
+{
+	/* Save custom CSRs. */
+	csr_mxstatus	= csr_read(CSR_MXSTATUS);
+	csr_mhcr	= csr_read(CSR_MHCR);
+	csr_mhint	= csr_read(CSR_MHINT);
+
+	/* Flush and disable caches. */
+	csr_write(CSR_MCOR, 0x22);
+	csr_write(CSR_MHCR, 0x0);
+}
+
+static void sun20i_d1_csr_restore(void)
+{
+	/* Invalidate caches and the branch predictor. */
+	csr_write(CSR_MCOR, 0x70013);
+
+	/* Restore custom CSRs, including the cache state. */
+	csr_write(CSR_MXSTATUS,	csr_mxstatus);
+	csr_write(CSR_MHCR,	csr_mhcr);
+	csr_write(CSR_MHINT,	csr_mhint);
+}
+
+/*
+ * PLIC
+ */
+
+#define PLIC_SOURCES			176
+#define PLIC_IE_WORDS			((PLIC_SOURCES + 31) / 32)
+
+static u8 plic_priority[PLIC_SOURCES];
+static u32 plic_sie[PLIC_IE_WORDS];
+static u32 plic_threshold;
+
+static void sun20i_d1_plic_save(void)
+{
+	fdt_plic_context_save(true, plic_sie, &plic_threshold);
+	fdt_plic_priority_save(plic_priority);
+}
+
+static void sun20i_d1_plic_restore(void)
+{
+	thead_plic_restore();
+	fdt_plic_priority_restore(plic_priority);
+	fdt_plic_context_restore(true, plic_sie, plic_threshold);
+}
+
+/*
+ * PPU
+ */
+
+#define PPU_PD_ACTIVE_CTRL		0x2c
+
+static void sun20i_d1_ppu_save(void)
+{
+	/* Enable MMIO access. Do not assume S-mode leaves the clock enabled. */
+	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_PRCM_BASE + PPU_BGR_REG);
+
+	/* Activate automatic power-down during the next WFI. */
+	writel_relaxed(1, SUN20I_D1_PPU_BASE + PPU_PD_ACTIVE_CTRL);
+}
+
+static void sun20i_d1_ppu_restore(void)
+{
+	/* Disable automatic power-down. */
+	writel_relaxed(0, SUN20I_D1_PPU_BASE + PPU_PD_ACTIVE_CTRL);
+}
+
+/*
+ * RISCV_CFG
+ */
+
+#define RESET_ENTRY_LO_REG		0x0004
+#define RESET_ENTRY_HI_REG		0x0008
+#define WAKEUP_EN_REG			0x0020
+#define WAKEUP_MASK_REG(i)		(0x0024 + 4 * (i))
+
+static void sun20i_d1_riscv_cfg_save(void)
+{
+	/* Enable MMIO access. Do not assume S-mode leaves the clock enabled. */
+	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_CCU_BASE + RISCV_CFG_BGR_REG);
+
+	/*
+	 * Copy the SIE bits to the wakeup registers. D1 has 160 "real"
+	 * interrupt sources, numbered 16-175. These are the ones that map to
+	 * the wakeup mask registers (the offset is for GIC compatibility). So
+	 * copying SIE to the wakeup mask needs some bit manipulation.
+	 */
+	for (int i = 0; i < PLIC_IE_WORDS - 1; i++)
+		writel_relaxed(plic_sie[i] >> 16 | plic_sie[i + 1] << 16,
+			       SUN20I_D1_RISCV_CFG_BASE + WAKEUP_MASK_REG(i));
+
+	/* Enable PPU wakeup for interrupts. */
+	writel_relaxed(1, SUN20I_D1_RISCV_CFG_BASE + WAKEUP_EN_REG);
+}
+
+static void sun20i_d1_riscv_cfg_restore(void)
+{
+	/* Disable PPU wakeup for interrupts. */
+	writel_relaxed(0, SUN20I_D1_RISCV_CFG_BASE + WAKEUP_EN_REG);
+}
+
+static void sun20i_d1_riscv_cfg_init(void)
+{
+	unsigned long entry = sbi_hartid_to_scratch(0)->warmboot_addr;
+
+	/* Enable MMIO access. */
+	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_CCU_BASE + RISCV_CFG_BGR_REG);
+
+	/* Program the reset entry address. */
+	writel_relaxed((u32)entry, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_LO_REG);
+	writel_relaxed((u64)entry >> 32, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_HI_REG);
+}
+
+static int sun20i_d1_hart_suspend(u32 suspend_type)
+{
+	/* Use the generic code for retentive suspend. */
+	if (!(suspend_type & SBI_HSM_SUSP_NON_RET_BIT))
+		return SBI_ENOTSUPP;
+
+	sun20i_d1_plic_save();
+	sun20i_d1_ppu_save();
+	sun20i_d1_riscv_cfg_save();
+	sun20i_d1_csr_save();
+
+	/*
+	 * If no interrupt is pending, this will power down the CPU power
+	 * domain. Otherwise, this will fall through, and the generic HSM
+	 * code will jump to the resume address.
+	 */
+	wfi();
+
+	return 0;
+}
+
+static void sun20i_d1_hart_resume(void)
+{
+	sun20i_d1_csr_restore();
+	sun20i_d1_riscv_cfg_restore();
+	sun20i_d1_ppu_restore();
+	sun20i_d1_plic_restore();
+}
+
+static const struct sbi_hsm_device sun20i_d1_ppu = {
+	.name		= "sun20i-d1-ppu",
+	.hart_suspend	= sun20i_d1_hart_suspend,
+	.hart_resume	= sun20i_d1_hart_resume,
+};
+
+static int sun20i_d1_final_init(bool cold_boot, const struct fdt_match *match)
+{
+	if (cold_boot) {
+		sun20i_d1_riscv_cfg_init();
+		sbi_hsm_set_device(&sun20i_d1_ppu);
+	}
+
+	return 0;
+}
+
+static const struct fdt_match sun20i_d1_match[] = {
+	{ .compatible = "allwinner,sun20i-d1" },
+	{ },
+};
+
+const struct platform_override sun20i_d1 = {
+	.match_table	= sun20i_d1_match,
+	.final_init	= sun20i_d1_final_init,
+};

From 551c70c0405b98ae75698d1674c9e0e09fdc6e01 Mon Sep 17 00:00:00 2001
From: dramforever <dramforever@live.com>
Date: Thu, 9 Jun 2022 15:07:29 +0800
Subject: [PATCH 1012/1765] include: sbi: Add mtinst/htinst psuedoinstructions

Add psuedoinstruction encodings written to mtinst/htinst for faults
caused by implicit memory access for VS-stage address translation

Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a1647688aac..22928585607 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -841,6 +841,26 @@
 #define INSN_MASK_FENCE_TSO		0xffffffff
 #define INSN_MATCH_FENCE_TSO		0x8330000f
 
+#if __riscv_xlen == 64
+
+/* 64-bit read for VS-stage address translation (RV64) */
+#define INSN_PSEUDO_VS_LOAD		0x00003000
+
+/* 64-bit write for VS-stage address translation (RV64) */
+#define INSN_PSEUDO_VS_STORE	0x00003020
+
+#elif __riscv_xlen == 32
+
+/* 32-bit read for VS-stage address translation (RV32) */
+#define INSN_PSEUDO_VS_LOAD		0x00002000
+
+/* 32-bit write for VS-stage address translation (RV32) */
+#define INSN_PSEUDO_VS_STORE	0x00002020
+
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
 #define INSN_16BIT_MASK			0x3
 #define INSN_32BIT_MASK			0x1c
 

From 187127fb89b99790793d4b2663286371b59021ae Mon Sep 17 00:00:00 2001
From: dramforever <dramforever@live.com>
Date: Thu, 9 Jun 2022 15:07:30 +0800
Subject: [PATCH 1013/1765] lib: sbi: Fixup tinst for exceptions in
 sbi_misaligned_*()

If there is an exception while emulating a misaligned load/store, fixup
uptrap.tinst before redirecting. Otherwise, HS-mode software may receive
an htinst describing the lbu/sb instruction that faulted during
emulation[1].

[1]: https://github.com/riscv-software-src/opensbi/issues/258

Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_misaligned_ldst.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index c879ce72f61..fd11798ba7b 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -22,6 +22,18 @@ union reg_data {
 	u64 data_u64;
 };
 
+static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
+					ulong addr_offset)
+{
+	if (new_tinst == INSN_PSEUDO_VS_LOAD ||
+	    new_tinst == INSN_PSEUDO_VS_STORE)
+		return new_tinst;
+	else if (orig_tinst == 0)
+		return 0UL;
+	else
+		return orig_tinst | (addr_offset << SH_RS1);
+}
+
 int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 				struct sbi_trap_regs *regs)
 {
@@ -126,6 +138,8 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 						&uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
+			uptrap.tinst = sbi_misaligned_tinst_fixup(
+				tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
@@ -238,6 +252,8 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 			     &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc = regs->mepc;
+			uptrap.tinst = sbi_misaligned_tinst_fixup(
+				tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}

From a07402ac9cea19b3af70ed6469bb6d937132a18f Mon Sep 17 00:00:00 2001
From: dramforever <dramforever@live.com>
Date: Thu, 9 Jun 2022 15:07:31 +0800
Subject: [PATCH 1014/1765] lib: sbi: Fix tval and tinst for sbi_get_insn()

We should not change trap->tval to mepc because mtval already points to
the faulting portion of the emulated instruction fetch, which is also
what stval is expected to be.

In addition, htinst is only allowed to be zero for instruction access
faults or page faults, and is only allowed to be zero or a
psuedoinstruction for instruction guest-page faults. Fix trap->tinst for
these cases.

Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_unpriv.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 73b530ce948..9a34a717b00 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -149,15 +149,17 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
 	switch (trap->cause) {
 	case CAUSE_LOAD_ACCESS:
 		trap->cause = CAUSE_FETCH_ACCESS;
-		trap->tval = mepc;
+		trap->tinst = 0UL;
 		break;
 	case CAUSE_LOAD_PAGE_FAULT:
 		trap->cause = CAUSE_FETCH_PAGE_FAULT;
-		trap->tval = mepc;
+		trap->tinst = 0UL;
 		break;
 	case CAUSE_LOAD_GUEST_PAGE_FAULT:
 		trap->cause = CAUSE_FETCH_GUEST_PAGE_FAULT;
-		trap->tval = mepc;
+		if (trap->tinst != INSN_PSEUDO_VS_LOAD &&
+		    trap->tinst != INSN_PSEUDO_VS_STORE)
+			trap->tinst = 0UL;
 		break;
 	default:
 		break;

From c6530012d46ed9c9655c426450bfa3aabcc0eadd Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 16 Jun 2022 17:28:56 +0530
Subject: [PATCH 1015/1765] lib: utils: Remove CSRs that set/clear an IMSIC
 interrupt file bits

Based on architecture review committee feedback, the [m|s|vs]seteienum,
[m|s|vs]clreienum, [m|s|vs]seteipnum, and [m|s|vs]clreipnum CSRs are
removed in the latest AIA draft v0.3.0 specification.
(Refer, https://github.com/riscv/riscv-aia/releases/tag/0.3.0-draft.31)

These CSRs were mostly for software convenience and software can always
use [m|s|vs]iselect and [m|s|vs]ireg CSRs to update the IMSIC interrupt
file bits.

We update the IMSIC programming as-per above to match the latest AIA
draft specification.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/riscv_encoding.h | 24 +++--------------
 lib/utils/irqchip/imsic.c    | 51 +++++++++++++++++++++++++++++++-----
 2 files changed, 48 insertions(+), 27 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 22928585607..798afb7303a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -336,14 +336,8 @@
 #define CSR_SIREG			0x151
 
 /* Supervisor-Level Interrupts (AIA) */
-#define CSR_STOPI			0xdb0
-
-/* Supervisor-Level IMSIC Interface (AIA) */
-#define CSR_SSETEIPNUM			0x158
-#define CSR_SCLREIPNUM			0x159
-#define CSR_SSETEIENUM			0x15a
-#define CSR_SCLREIENUM			0x15b
 #define CSR_STOPEI			0x15c
+#define CSR_STOPI			0xdb0
 
 /* Supervisor-Level High-Half CSRs (AIA) */
 #define CSR_SIEH			0x114
@@ -405,14 +399,8 @@
 #define CSR_VSIREG			0x251
 
 /* VS-Level Interrupts (H-extension with AIA) */
-#define CSR_VSTOPI			0xeb0
-
-/* VS-Level IMSIC Interface (H-extension with AIA) */
-#define CSR_VSSETEIPNUM		0x258
-#define CSR_VSCLREIPNUM		0x259
-#define CSR_VSSETEIENUM		0x25a
-#define CSR_VSCLREIENUM		0x25b
 #define CSR_VSTOPEI			0x25c
+#define CSR_VSTOPI			0xeb0
 
 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */
 #define CSR_HIDELEGH			0x613
@@ -693,14 +681,8 @@
 #define CSR_MIREG			0x351
 
 /* Machine-Level Interrupts (AIA) */
-#define CSR_MTOPI			0xfb0
-
-/* Machine-Level IMSIC Interface (AIA) */
-#define CSR_MSETEIPNUM			0x358
-#define CSR_MCLREIPNUM			0x359
-#define CSR_MSETEIENUM			0x35a
-#define CSR_MCLREIENUM			0x35b
 #define CSR_MTOPEI			0x35c
+#define CSR_MTOPI			0xfb0
 
 /* Virtual Interrupts for Supervisor Level (AIA) */
 #define CSR_MVIEN			0x308
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index b29a1e9f8dd..98f2cb63eeb 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -38,10 +38,14 @@
 
 #define IMSIC_EIP63			0xbf
 
+#define IMSIC_EIPx_BITS			32
+
 #define IMSIC_EIE0			0xc0
 
 #define IMSIC_EIE63			0xff
 
+#define IMSIC_EIEx_BITS			32
+
 #define IMSIC_DISABLE_EIDELIVERY	0
 #define IMSIC_ENABLE_EIDELIVERY		1
 #define IMSIC_DISABLE_EITHRESHOLD	1
@@ -63,6 +67,18 @@ do { \
 	__v; \
 })
 
+#define imsic_csr_set(__c, __v)		\
+do { \
+	csr_write(CSR_MISELECT, __c); \
+	csr_set(CSR_MIREG, __v); \
+} while (0)
+
+#define imsic_csr_clear(__c, __v)	\
+do { \
+	csr_write(CSR_MISELECT, __c); \
+	csr_clear(CSR_MIREG, __v); \
+} while (0)
+
 static struct imsic_data *imsic_hartid2data[SBI_HARTMASK_MAX_BITS];
 static int imsic_hartid2file[SBI_HARTMASK_MAX_BITS];
 
@@ -140,6 +156,31 @@ static struct sbi_ipi_device imsic_ipi_device = {
 	.ipi_send	= imsic_ipi_send
 };
 
+static void imsic_local_eix_update(unsigned long base_id,
+				   unsigned long num_id, bool pend, bool val)
+{
+	unsigned long i, isel, ireg;
+	unsigned long id = base_id, last_id = base_id + num_id;
+
+	while (id < last_id) {
+		isel = id / __riscv_xlen;
+		isel *= __riscv_xlen / IMSIC_EIPx_BITS;
+		isel += (pend) ? IMSIC_EIP0 : IMSIC_EIE0;
+
+		ireg = 0;
+		for (i = id & (__riscv_xlen - 1);
+		     (id < last_id) && (i < __riscv_xlen); i++) {
+			ireg |= BIT(i);
+			id++;
+		}
+
+		if (val)
+			imsic_csr_set(isel, ireg);
+		else
+			imsic_csr_clear(isel, ireg);
+	}
+}
+
 void imsic_local_irqchip_init(void)
 {
 	/*
@@ -158,12 +199,11 @@ void imsic_local_irqchip_init(void)
 	imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
 
 	/* Enable IPI */
-	csr_write(CSR_MSETEIENUM, IMSIC_IPI_ID);
+	imsic_local_eix_update(IMSIC_IPI_ID, 1, false, true);
 }
 
 int imsic_warm_irqchip_init(void)
 {
-	unsigned long i;
 	struct imsic_data *imsic = imsic_hartid2data[current_hartid()];
 
 	/* Sanity checks */
@@ -171,11 +211,10 @@ int imsic_warm_irqchip_init(void)
 		return SBI_EINVAL;
 
 	/* Disable all interrupts */
-	for (i = 1; i <= imsic->num_ids; i++)
-		csr_write(CSR_MCLREIENUM, i);
+	imsic_local_eix_update(1, imsic->num_ids, false, false);
 
-	/* Clear IPI */
-	csr_write(CSR_MCLREIPNUM, IMSIC_IPI_ID);
+	/* Clear IPI pending */
+	imsic_local_eix_update(IMSIC_IPI_ID, 1, true, false);
 
 	/* Local IMSIC initialization */
 	imsic_local_irqchip_init();

From 7738345396fbbae543a5af14fbc965d9163c12a0 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Tue, 19 Oct 2021 20:58:38 -0500
Subject: [PATCH 1016/1765] lib: utils/timer: Add a separate compatible for the
 D1 CLINT

The CLINT in the Allwinner D1 SoC apparently does not support 64-bit
MMIO access. A property was added to support this quirk (and that
property was copied to the ACLINT MTIMER code). However, since this
difference in behavior makes the D1 CLINT incompatible with the SiFive
CLINT's programming interface, a better solution is to use a separate
compatible string.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/thead-c9xx.md        |  4 +--
 lib/utils/ipi/fdt_ipi_mswi.c       |  1 +
 lib/utils/timer/fdt_timer_mtimer.c | 39 +++++++++++++++++++-----------
 3 files changed, 27 insertions(+), 17 deletions(-)

diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index 3490ed50dc8..ced784d13f7 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -52,12 +52,11 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
 		ranges;
 
 		clint0: clint@14000000 {
-			compatible = "riscv,clint0";
+			compatible = "allwinner,sun20i-d1-clint";
 			interrupts-extended = <
 				&cpu0_intc  3 &cpu0_intc  7
 				>;
 			reg = <0x0 0x14000000 0x0 0x04000000>;
-			clint,has-no-64bit-mmio;
 		};
 
 		intc: interrupt-controller@10000000 {
@@ -163,7 +162,6 @@ DTS Example2: (Multi cores with soc reset-regs)
 				&cpu4_intc  3 &cpu4_intc  7
 				>;
 			reg = <0xff 0xdc000000 0x0 0x04000000>;
-			clint,has-no-64bit-mmio;
 		};
 
 		intc: interrupt-controller@ffd8000000 {
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 0176941a7d6..af69e161a8b 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -54,6 +54,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
 
 static const struct fdt_match ipi_mswi_match[] = {
+	{ .compatible = "allwinner,sun20i-d1-clint", .data = &clint_offset },
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
 	{ .compatible = "sifive,clint0", .data = &clint_offset },
 	{ .compatible = "riscv,aclint-mswi" },
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 82239d5d66f..e140567e9c7 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -15,6 +15,11 @@
 
 #define MTIMER_MAX_NR			16
 
+struct timer_mtimer_quirks {
+	unsigned int	mtime_offset;
+	bool		has_64bit_mmio;
+};
+
 static unsigned long mtimer_count = 0;
 static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
 static struct aclint_mtimer_data *mt_reference = NULL;
@@ -23,7 +28,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int i, rc;
-	unsigned long offset, addr[2], size[2];
+	unsigned long addr[2], size[2];
 	struct aclint_mtimer_data *mt;
 
 	if (MTIMER_MAX_NR <= mtimer_count)
@@ -43,28 +48,25 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		return rc;
 
 	if (match->data) { /* SiFive CLINT */
+		const struct timer_mtimer_quirks *quirks = match->data;
+
 		/* Set CLINT addresses */
 		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
 		mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
 		mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
 		mt->mtime_size = size[0] - mt->mtimecmp_size;
 		/* Adjust MTIMER address and size for CLINT device */
-		offset = *((unsigned long *)match->data);
-		mt->mtime_addr += offset;
-		mt->mtimecmp_addr += offset;
-		mt->mtime_size -= offset;
-		/* Parse additional CLINT properties */
-		if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc))
-			mt->has_64bit_mmio = false;
+		mt->mtime_addr += quirks->mtime_offset;
+		mt->mtimecmp_addr += quirks->mtime_offset;
+		mt->mtime_size -= quirks->mtime_offset;
+		/* Apply additional CLINT quirks */
+		mt->has_64bit_mmio = quirks->has_64bit_mmio;
 	} else { /* RISC-V ACLINT MTIMER */
 		/* Set ACLINT MTIMER addresses */
 		mt->mtime_addr = addr[0];
 		mt->mtime_size = size[0];
 		mt->mtimecmp_addr = addr[1];
 		mt->mtimecmp_size = size[1];
-		/* Parse additional ACLINT MTIMER properties */
-		if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc))
-			mt->has_64bit_mmio = false;
 	}
 
 	/* Check if MTIMER device has shared MTIME address */
@@ -107,11 +109,20 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	return 0;
 }
 
-static const unsigned long clint_offset = CLINT_MTIMER_OFFSET;
+static const struct timer_mtimer_quirks d1_clint_quirks = {
+	.mtime_offset	= CLINT_MTIMER_OFFSET,
+	.has_64bit_mmio	= false,
+};
+
+static const struct timer_mtimer_quirks sifive_clint_quirks = {
+	.mtime_offset	= CLINT_MTIMER_OFFSET,
+	.has_64bit_mmio	= true,
+};
 
 static const struct fdt_match timer_mtimer_match[] = {
-	{ .compatible = "riscv,clint0", .data = &clint_offset },
-	{ .compatible = "sifive,clint0", .data = &clint_offset },
+	{ .compatible = "allwinner,sun20i-d1-clint", .data = &d1_clint_quirks },
+	{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
+	{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "riscv,aclint-mtimer" },
 	{ },
 };

From d76a196bfc805e1ee51f9191162007d1e0657217 Mon Sep 17 00:00:00 2001
From: Jan Remes <jan.remes@codasip.com>
Date: Tue, 21 Jun 2022 14:07:39 +0200
Subject: [PATCH 1017/1765] lib: irqchip/plic: fix typo in
 plic_warm_irqchip_init

The second invocation of plic_context_init() incorrectly calls the
function with m_cntx_id instead of s_cntx_id. This breaks systems which
only have 1 external interrupt per hart.

Fixes: 8c362e7 ("lib: irqchip/plic: Factor out a context init function")
Signed-off-by: Jan Remes <jan.remes@codasip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
---
 lib/utils/irqchip/plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 8c25b9d7c3e..73d778894a4 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -145,7 +145,7 @@ int plic_warm_irqchip_init(const struct plic_data *plic,
 
 	/* By default, disable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
-		ret = plic_context_init(plic, m_cntx_id, false, 0x7);
+		ret = plic_context_init(plic, s_cntx_id, false, 0x7);
 		if (ret)
 			return ret;
 	}

From 6f1fe98c2f565a394f258178b0daa3843672395c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Tue, 21 Jun 2022 23:57:42 -0500
Subject: [PATCH 1018/1765] lib: utils/timer: Remove Allwinner D1 CLINT
 compatibles

The allwinner,sun20i-d1-clint compatible string is not documented in any
official binding, so it should not be used by drivers.

The MSWI in the D1 CLINT is compatible with the ACLINT specification, so
it can take advantage of generic driver support. However, that is only
possible if the MSWI and MTIMER are split into separate DT nodes. This
means the final binding for this device is likely to be incompatible
with what is implemented here.

Remove this compatible string from the driver to prevent it from
appearing in a stable version and causing future issues.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/fdt_ipi_mswi.c       | 1 -
 lib/utils/timer/fdt_timer_mtimer.c | 6 ------
 2 files changed, 7 deletions(-)

diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index af69e161a8b..0176941a7d6 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -54,7 +54,6 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
 
 static const struct fdt_match ipi_mswi_match[] = {
-	{ .compatible = "allwinner,sun20i-d1-clint", .data = &clint_offset },
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
 	{ .compatible = "sifive,clint0", .data = &clint_offset },
 	{ .compatible = "riscv,aclint-mswi" },
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index e140567e9c7..7b8546b090b 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -109,18 +109,12 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	return 0;
 }
 
-static const struct timer_mtimer_quirks d1_clint_quirks = {
-	.mtime_offset	= CLINT_MTIMER_OFFSET,
-	.has_64bit_mmio	= false,
-};
-
 static const struct timer_mtimer_quirks sifive_clint_quirks = {
 	.mtime_offset	= CLINT_MTIMER_OFFSET,
 	.has_64bit_mmio	= true,
 };
 
 static const struct fdt_match timer_mtimer_match[] = {
-	{ .compatible = "allwinner,sun20i-d1-clint", .data = &d1_clint_quirks },
 	{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "riscv,aclint-mtimer" },

From c6fdbcf83fc350d8b1f12ada228e677df931291c Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 23 Jun 2022 21:01:35 +0530
Subject: [PATCH 1019/1765] include: sbi: Change spec version to 1.0

Now that SBI v1.0 specification is ratified, we change spec verion
implemented by OpenSBI to v1.0.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_ecall.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 9500d043042..046a56a5993 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -13,8 +13,8 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_list.h>
 
-#define SBI_ECALL_VERSION_MAJOR		0
-#define SBI_ECALL_VERSION_MINOR		3
+#define SBI_ECALL_VERSION_MAJOR		1
+#define SBI_ECALL_VERSION_MINOR		0
 #define SBI_OPENSBI_IMPID		1
 
 struct sbi_trap_regs;

From 3f66465fb6bf0aea99f7dbe5801996dec9605d3c Mon Sep 17 00:00:00 2001
From: Sergey Matyukevich <geomatsi@gmail.com>
Date: Fri, 24 Jun 2022 14:03:30 +0300
Subject: [PATCH 1020/1765] lib: pmu: allow to use the highest available
 counter

OpenSBI explicitly assumes that there is no pmu hardware counter with
index 1: hardware uses that bit for TM control. So OpenSBI filters
out that index in sanity checks. However OpenSBI also excludes that
counter when reports total amount of hardware counters to Linux. As
a result, Linux uses incomplete counters mask excluding the highest
available counter.

Return accurate number of counters, update the firmware counter
starting index, fix range checks that include num_hw_ctrs.

The simple test is to make sure that there is no counter multiplexing
in the following command:

$ perf stat -e \
	r8000000000000000,r8000000000000001,r8000000000000002,r8000000000000003, \
	r8000000000000004,r8000000000000005,r8000000000000006,r8000000000000007, \
	r8000000000000008,r8000000000000009,r800000000000000a,r800000000000000b, \
	r800000000000000c,r800000000000000d,r800000000000000e,r800000000000000f  \
	ls

Note that 16 firmware events with 16 counters won't require multiplexing.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 3ecf536002a..3f5fd1031b2 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -297,7 +297,7 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	unsigned long mctr_inhbt;
 
 	/* Make sure the counter index lies within the range and is not TM bit */
-	if (cidx > num_hw_ctrs || cidx == 1)
+	if (cidx >= num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
 	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
@@ -378,7 +378,7 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 	mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
 
 	/* Make sure the counter index lies within the range and is not TM bit */
-	if (cidx > num_hw_ctrs || cidx == 1)
+	if (cidx >= num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
 	if (!__test_bit(cidx, &mctr_inhbt)) {
@@ -516,7 +516,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 	u32 hartid = current_hartid();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	if (cbase > num_hw_ctrs)
+	if (cbase >= num_hw_ctrs)
 		return SBI_EINVAL;
 
 	/**
@@ -593,8 +593,8 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask, u32 hartid)
 	int fw_base;
 	unsigned long ctr_mask = cmask << cbase;
 
-	if (cbase <= num_hw_ctrs)
-		fw_base = num_hw_ctrs + 1;
+	if (cbase < num_hw_ctrs)
+		fw_base = num_hw_ctrs;
 	else
 		fw_base = cbase;
 
@@ -694,7 +694,7 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 		return SBI_EINVAL;
 
 	/* We have 31 HW counters with 31 being the last index(MHPMCOUNTER31) */
-	if (cidx <= num_hw_ctrs) {
+	if (cidx < num_hw_ctrs) {
 		cinfo.type = SBI_PMU_CTR_TYPE_HW;
 		cinfo.csr = CSR_CYCLE + cidx;
 		/* mcycle & minstret are always 64 bit */
@@ -749,7 +749,7 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 		sbi_platform_pmu_init(plat);
 
 		/* mcycle & minstret is available always */
-		num_hw_ctrs = sbi_hart_mhpm_count(scratch) + 2;
+		num_hw_ctrs = sbi_hart_mhpm_count(scratch) + 3;
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 

From 4489876e933d8ba0d8bc6c64bae71e295d45faac Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sat, 25 Jun 2022 09:12:10 +0530
Subject: [PATCH 1021/1765] include: Bump-up version to 1.1

This patch updates OpenSBI version to 1.1 as part of
release preparation.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 2f64429e7b4..f687f30c696 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 0
+#define OPENSBI_VERSION_MINOR 1
 
 /**
  * OpenSBI 32-bit version with:

From 994c8cfb29d0b53bbcc774a728cad778aeece6ac Mon Sep 17 00:00:00 2001
From: Adnan Rahman Chowdhury <adnan.chowdhury@sifive.com>
Date: Thu, 30 Jun 2022 10:46:35 +0100
Subject: [PATCH 1022/1765] lib: sbi_timer: Added a conditional wait function
 which can timeout

Motivation: Suppose a peripheral needs to be configured to transmit
data. There is an SFR bit which indicates that the peripheral is ready
to transmit. The firmware should check the bit and will only transmit
data when the peripheral is ready. When the firmware starts polling the
SFR, the peripheral could be busy transmitting/receiving other data so
the firmware must wait till that completes. Assuming that there is no
other way, the firmware shouldn't wait indefinitely.

The function sbi_timer_waitms_until() will constantly check whether a
certain condition is satisfied, or timeout occurs. It can be used for
the cases when a timeout is required.

Signed-off-by: Adnan Rahman Chowdhury <adnan.chowdhury@sifive.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_timer.h | 18 ++++++++++++++++++
 lib/sbi/sbi_timer.c     | 13 +++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index 63ef1af6350..ac48e2b805f 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -48,6 +48,24 @@ static inline void sbi_timer_udelay(ulong usecs)
 	sbi_timer_delay_loop(usecs, 1000000, NULL, NULL);
 }
 
+/**
+ * A blocking function that will wait until @p predicate returns true or
+ * @p timeout_ms milliseconds elapsed. @p arg will be passed as argument to
+ * @p predicate function.
+ *
+ * @param predicate Pointer to a function that returns true if certain
+ * condition is met. It shouldn't block the code execution.
+ * @param arg Argument to pass to @p predicate.
+ * @param timeout_ms Timeout value in milliseconds. The function will return
+ * false if @p timeout_ms time period elapsed but still @p predicate doesn't
+ * return true.
+ *
+ * @return true if @p predicate returns true within @p timeout_ms, false
+ * otherwise.
+ */
+bool sbi_timer_waitms_until(bool (*predicate)(void *), void *arg,
+			    uint64_t timeout_ms);
+
 /** Get timer value for current HART */
 u64 sbi_timer_value(void);
 
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index b0a6e63f22c..4b24cbeb7c2 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -76,6 +76,19 @@ void sbi_timer_delay_loop(ulong units, u64 unit_freq,
 		delay_fn(opaque);
 }
 
+bool sbi_timer_waitms_until(bool (*predicate)(void *), void *arg,
+			    uint64_t timeout_ms)
+{
+	uint64_t start_time = sbi_timer_value();
+	uint64_t ticks =
+		(sbi_timer_get_device()->timer_freq / 1000) *
+		timeout_ms;
+	while(!predicate(arg))
+		if (sbi_timer_value() - start_time  >= ticks)
+			return false;
+	return true;
+}
+
 u64 sbi_timer_value(void)
 {
 	if (get_time_val)

From caa5eeacacbc935090968e601716f66a6195ceef Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@sifive.com>
Date: Mon, 11 Jul 2022 08:18:03 +0100
Subject: [PATCH 1023/1765] lib: sbi: add check for ipi device for hsm start

If the ecall SBI_EXT_HSM_HART_START is called it might try to wake the
secondary hart using sbi_ipi_raw_send() to send an IPI to the hart.
This can fail if there is no IPI device but no error is returned from
sbi_ipi_raw_send() so the ecall returns as if the action completed and
the caller continues without noticing (in the case of Linux it just hangs
waiting for the secondary hart to become active)

Fix this by changing sbi_ipi_raw_send() to return and error, and if an
error is returned, then return it via SBI_EXT_HSM_HART_START call.

Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ipi.h | 2 +-
 lib/sbi/sbi_hsm.c     | 4 +++-
 lib/sbi/sbi_ipi.c     | 9 ++++++---
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index fb7d658b666..f6ac8072f68 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -75,7 +75,7 @@ int sbi_ipi_send_halt(ulong hmask, ulong hbase);
 
 void sbi_ipi_process(void);
 
-void sbi_ipi_raw_send(u32 target_hart);
+int sbi_ipi_raw_send(u32 target_hart);
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void);
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 1165acc084d..836008fc92d 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -289,7 +289,9 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
 		return hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
-		sbi_ipi_raw_send(hartid);
+		int rc = sbi_ipi_raw_send(hartid);
+		if (rc)
+		    return rc;
 	}
 
 	return 0;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 1014909bcfa..7aafbbde50b 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -208,10 +208,13 @@ void sbi_ipi_process(void)
 	};
 }
 
-void sbi_ipi_raw_send(u32 target_hart)
+int sbi_ipi_raw_send(u32 target_hart)
 {
-	if (ipi_dev && ipi_dev->ipi_send)
-		ipi_dev->ipi_send(target_hart);
+	if (!ipi_dev || !ipi_dev->ipi_send)
+		return SBI_EINVAL;
+
+	ipi_dev->ipi_send(target_hart);
+	return 0;
 }
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void)

From 0374ccf3f13e11f98da8158d9a5fa2a8607fe50e Mon Sep 17 00:00:00 2001
From: gagachang <vivahavey@gmail.com>
Date: Fri, 15 Jul 2022 01:29:41 +0800
Subject: [PATCH 1024/1765] lib: sbi_hart: Shorten the code to set MPV bit

MPV bit is set when the value of next_virt boolean variable equals
true. Since the value of next_virt is either 0 or 1, we can set
MPV bit without if-else logic.

Signed-off-by: Che-Chia Chang <alvinga@andestech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index de86feee0d0..67b685a5b94 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -769,19 +769,12 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 #if __riscv_xlen == 32
 	if (misa_extension('H')) {
 		valH = csr_read(CSR_MSTATUSH);
-		if (next_virt)
-			valH = INSERT_FIELD(valH, MSTATUSH_MPV, 1);
-		else
-			valH = INSERT_FIELD(valH, MSTATUSH_MPV, 0);
+		valH = INSERT_FIELD(valH, MSTATUSH_MPV, next_virt);
 		csr_write(CSR_MSTATUSH, valH);
 	}
 #else
-	if (misa_extension('H')) {
-		if (next_virt)
-			val = INSERT_FIELD(val, MSTATUS_MPV, 1);
-		else
-			val = INSERT_FIELD(val, MSTATUS_MPV, 0);
-	}
+	if (misa_extension('H'))
+		val = INSERT_FIELD(val, MSTATUS_MPV, next_virt);
 #endif
 	csr_write(CSR_MSTATUS, val);
 	csr_write(CSR_MEPC, next_addr);

From 4e21ccacd1cccec697df0651a0bd212edef8be4f Mon Sep 17 00:00:00 2001
From: Prasanna T <ptprasanna@gmail.com>
Date: Fri, 8 Jul 2022 17:22:44 +0530
Subject: [PATCH 1025/1765] lib: utils/serial: Update Shakti UART based on
 latest implementation

The age old version of Shakti UART was upgraded long back, but we missed
updating the driver in OpenSBI. The old version of UART is not supported
anymore, hence removed the inline comment which is also outdated now.

Signed-off-by: Prasanna T <ptprasanna@gmail.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/serial/shakti-uart.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
index 5f2fe75c9f3..35569356078 100644
--- a/lib/utils/serial/shakti-uart.c
+++ b/lib/utils/serial/shakti-uart.c
@@ -19,21 +19,21 @@
 #define REG_RX_THRES	0x20
 
 #define UART_TX_FULL  0x2
+#define UART_RX_NOT_EMPTY 0x4
 #define UART_RX_FULL  0x8
 
 static volatile char *uart_base;
 
 static void shakti_uart_putc(char ch)
 {
-	while((readw(uart_base + REG_STATUS) & UART_TX_FULL))
+	while ((readb(uart_base + REG_STATUS) & UART_TX_FULL))
 		;
 	writeb(ch, uart_base + REG_TX);
 }
 
 static int shakti_uart_getc(void)
 {
-	u16 status = readw(uart_base + REG_STATUS);
-	if (status & UART_RX_FULL)
+	if (readb(uart_base + REG_STATUS) & UART_RX_NOT_EMPTY)
 		return readb(uart_base + REG_RX);
 	return -1;
 }

From 88b790f1291618274f94b6d5110ed09e20148bb2 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Wed, 27 Jul 2022 16:17:47 +0200
Subject: [PATCH 1026/1765] lib: sbi: Fix sbi_snprintf

printc would happily write to 'out' even when 'out_len' was zero,
potentially overflowing buffers. Rework printc to not do that and
also ensure the null byte is written at the last position when
necessary, as stated in the snprintf man page. Also, panic if
sprintf or snprintf are called with NULL output strings (except
the special case of snprintf having a NULL output string and
a zero output size, allowing it to be used to get the number of
characters that would have been written). Finally, rename a
goto label which clashed with 'out'.

Fixes: 9e8ff05cb61f ("Initial commit.")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 39 +++++++++++++++++++++++----------------
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 34c843d3f9e..7b9be4a4667 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -76,20 +76,22 @@ typedef __builtin_va_list va_list;
 
 static void printc(char **out, u32 *out_len, char ch)
 {
-	if (out) {
-		if (*out) {
-			if (out_len && (0 < *out_len)) {
-				**out = ch;
-				++(*out);
-				(*out_len)--;
-			} else {
-				**out = ch;
-				++(*out);
-			}
-		}
-	} else {
+	if (!out) {
 		sbi_putc(ch);
+		return;
 	}
+
+	/*
+	 * The *printf entry point functions have enforced that (*out) can
+	 * only be null when out_len is non-null and its value is zero.
+	 */
+	if (!out_len || *out_len > 1) {
+		*(*out)++ = ch;
+		**out = '\0';
+	}
+
+	if (out_len && *out_len > 0)
+		--(*out_len);
 }
 
 static int prints(char **out, u32 *out_len, const char *string, int width,
@@ -193,7 +195,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			if (*format == '\0')
 				break;
 			if (*format == '%')
-				goto out;
+				goto literal;
 			/* Get flags */
 			if (*format == '-') {
 				++format;
@@ -332,13 +334,11 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				continue;
 			}
 		} else {
-		out:
+literal:
 			printc(out, out_len, *format);
 			++pc;
 		}
 	}
-	if (out)
-		**out = '\0';
 
 	return pc;
 }
@@ -348,6 +348,9 @@ int sbi_sprintf(char *out, const char *format, ...)
 	va_list args;
 	int retval;
 
+	if (unlikely(!out))
+		sbi_panic("sbi_sprintf called with NULL output string\n");
+
 	va_start(args, format);
 	retval = print(&out, NULL, format, args);
 	va_end(args);
@@ -360,6 +363,10 @@ int sbi_snprintf(char *out, u32 out_sz, const char *format, ...)
 	va_list args;
 	int retval;
 
+	if (unlikely(!out && out_sz != 0))
+		sbi_panic("sbi_snprintf called with NULL output string and "
+			  "output size is not zero\n");
+
 	va_start(args, format);
 	retval = print(&out, &out_sz, format, args);
 	va_end(args);

From 1545afd342f2e22aaf91c4760dc5706965ec7fdf Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Wed, 20 Jul 2022 14:50:32 -0700
Subject: [PATCH 1027/1765] lib: sbi: Fix counter index sanity check

The current implementation computes the possible counter range
by doing a left shift of counter base. However, this may overflow depending
on the counter base value. In case of overflow, the highest counter id
may be computed incorrectly. As per the SBI specification, the respective
function should return an error if any of the counter is not valid.

Fix the counter index check by avoiding left shifting while doing the
sanity checks. Without the shift, the implementation just iterates
over the counter mask and computes the correct counter index by adding
the base to it.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 33 +++++++++++++++++----------------
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 3f5fd1031b2..31631a2fab8 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -343,25 +343,26 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 {
 	int event_idx_type;
 	uint32_t event_code;
-	unsigned long ctr_mask = cmask << cbase;
 	int ret = SBI_EINVAL;
 	bool bUpdate = FALSE;
+	int i, cidx;
 
-	if (sbi_fls(ctr_mask) >= total_ctrs)
+	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return ret;
 
 	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
 		bUpdate = TRUE;
 
-	for_each_set_bit_from(cbase, &ctr_mask, total_ctrs) {
-		event_idx_type = pmu_ctr_validate(cbase, &event_code);
+	for_each_set_bit(i, &cmask, total_ctrs) {
+		cidx = i + cbase;
+		event_idx_type = pmu_ctr_validate(cidx, &event_code);
 		if (event_idx_type < 0)
 			/* Continue the start operation for other counters */
 			continue;
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_start_fw(cbase, event_code, ival, bUpdate);
+			ret = pmu_ctr_start_fw(cidx, event_code, ival, bUpdate);
 		else
-			ret = pmu_ctr_start_hw(cbase, ival, bUpdate);
+			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
 	}
 
 	return ret;
@@ -421,25 +422,26 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 	int ret = SBI_EINVAL;
 	int event_idx_type;
 	uint32_t event_code;
-	unsigned long ctr_mask = cmask << cbase;
+	int i, cidx;
 
-	if (sbi_fls(ctr_mask) >= total_ctrs)
+	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return SBI_EINVAL;
 
-	for_each_set_bit_from(cbase, &ctr_mask, total_ctrs) {
-		event_idx_type = pmu_ctr_validate(cbase, &event_code);
+	for_each_set_bit(i, &cmask, total_ctrs) {
+		cidx = i + cbase;
+		event_idx_type = pmu_ctr_validate(cidx, &event_code);
 		if (event_idx_type < 0)
 			/* Continue the stop operation for other counters */
 			continue;
 
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_stop_fw(cbase, event_code);
+			ret = pmu_ctr_stop_fw(cidx, event_code);
 		else
-			ret = pmu_ctr_stop_hw(cbase);
+			ret = pmu_ctr_stop_hw(cidx);
 
 		if (flag & SBI_PMU_STOP_FLAG_RESET) {
-			active_events[hartid][cbase] = SBI_PMU_EVENT_IDX_INVALID;
-			pmu_reset_hw_mhpmevent(cbase);
+			active_events[hartid][cidx] = SBI_PMU_EVENT_IDX_INVALID;
+			pmu_reset_hw_mhpmevent(cidx);
 		}
 	}
 
@@ -615,10 +617,9 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	int event_type = get_cidx_type(event_idx);
 	struct sbi_pmu_fw_event *fevent;
 	uint32_t fw_evt_code;
-	unsigned long tmp = cidx_mask << cidx_base;
 
 	/* Do a basic sanity check of counter base & mask */
-	if (sbi_fls(tmp) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
+	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
 		return SBI_EINVAL;
 
 	if (flags & SBI_PMU_CFG_FLAG_SKIP_MATCH) {

From 83db3af5f93dbbffb599af41c58e26a24b1abc1c Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Wed, 20 Jul 2022 14:50:33 -0700
Subject: [PATCH 1028/1765] lib: sbi: Add the bound check for events during
 config match

Currently, there is no sanity check for firmware event code. We don't see
any issue as Linux kernel driver does a bound check on firmware events
already. However, OpenSBI can't assume sane supervisor mode software
always. Thus, an invalid event idx can cause a buffer overflow error.
For hardware events, the match will fail for invalid event code anyways.
However, a search is unecessary if event code is invalid.

Add a event ID validation function to solve the issue.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |  6 ++++
 lib/sbi/sbi_pmu.c                 | 51 +++++++++++++++++++++++++++++--
 2 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 70a3bf7abfa..a3f2bf4bdf6 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -208,6 +208,12 @@ enum sbi_pmu_ctr_type {
 
 #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF
 
+#define SBI_PMU_EVENT_HW_CACHE_OPS_RESULT	0x1
+#define SBI_PMU_EVENT_HW_CACHE_OPS_ID_MASK	0x6
+#define SBI_PMU_EVENT_HW_CACHE_OPS_ID_OFFSET	1
+#define SBI_PMU_EVENT_HW_CACHE_ID_MASK		0xfff8
+#define SBI_PMU_EVENT_HW_CACHE_ID_OFFSET	3
+
 /* Flags defined for config matching function */
 #define SBI_PMU_CFG_FLAG_SKIP_MATCH	(1 << 0)
 #define SBI_PMU_CFG_FLAG_CLEAR_VALUE	(1 << 1)
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 31631a2fab8..16f915b70a1 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -107,6 +107,49 @@ static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
 	return FALSE;
 }
 
+static int pmu_event_validate(unsigned long event_idx)
+{
+	uint32_t event_idx_type = get_cidx_type(event_idx);
+	uint32_t event_idx_code = get_cidx_code(event_idx);
+	uint32_t event_idx_code_max = -1;
+	uint32_t cache_ops_result, cache_ops_id, cache_id;
+
+	switch(event_idx_type) {
+	case SBI_PMU_EVENT_TYPE_HW:
+		event_idx_code_max = SBI_PMU_HW_GENERAL_MAX;
+		break;
+	case SBI_PMU_EVENT_TYPE_FW:
+		event_idx_code_max = SBI_PMU_FW_MAX;
+		break;
+	case SBI_PMU_EVENT_TYPE_HW_CACHE:
+		cache_ops_result = event_idx_code &
+					SBI_PMU_EVENT_HW_CACHE_OPS_RESULT;
+		cache_ops_id = (event_idx_code &
+				SBI_PMU_EVENT_HW_CACHE_OPS_ID_MASK) >>
+				SBI_PMU_EVENT_HW_CACHE_OPS_ID_OFFSET;
+		cache_id = (event_idx_code &
+			    SBI_PMU_EVENT_HW_CACHE_ID_MASK) >>
+			    SBI_PMU_EVENT_HW_CACHE_ID_OFFSET;
+		if ((cache_ops_result < SBI_PMU_HW_CACHE_RESULT_MAX) &&
+		    (cache_ops_id < SBI_PMU_HW_CACHE_OP_MAX) &&
+		    (cache_id < SBI_PMU_HW_CACHE_MAX))
+			return event_idx_type;
+		else
+			return SBI_EINVAL;
+		break;
+	case SBI_PMU_EVENT_TYPE_HW_RAW:
+		event_idx_code_max = 1; // event_idx.code should be zero
+		break;
+	default:
+		return SBI_EINVAL;
+	}
+
+	if (event_idx_code < event_idx_code_max)
+		return event_idx_type;
+
+	return SBI_EINVAL;
+}
+
 static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code)
 {
 	uint32_t event_idx_val;
@@ -614,12 +657,16 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 {
 	int ctr_idx = SBI_ENOTSUPP;
 	u32 hartid = current_hartid();
-	int event_type = get_cidx_type(event_idx);
+	int event_type;
 	struct sbi_pmu_fw_event *fevent;
 	uint32_t fw_evt_code;
 
 	/* Do a basic sanity check of counter base & mask */
-	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs || event_type >= SBI_PMU_EVENT_TYPE_MAX)
+	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs)
+		return SBI_EINVAL;
+
+	event_type = pmu_event_validate(event_idx);
+	if (event_type < 0)
 		return SBI_EINVAL;
 
 	if (flags & SBI_PMU_CFG_FLAG_SKIP_MATCH) {

From 860a376817f687db31b586ec7bcf9a1db1bce7b3 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Wed, 20 Jul 2022 14:50:34 -0700
Subject: [PATCH 1029/1765] lib: sbi: Fix possible buffer overrun in counter
 validation

The active_events array is accessed with counter ID passed from the supervisor
software before the counter ID bound check. This may cause a buffer overrun
if a supervisor passes an invalid counter ID.

Fix this by moving the access part after the bound check.

Reported-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 16f915b70a1..5d31f58d145 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -156,13 +156,13 @@ static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code)
 	uint32_t event_idx_type;
 	u32 hartid = current_hartid();
 
-	event_idx_val = active_events[hartid][cidx];
-
-	if (cidx >= total_ctrs || (event_idx_val == SBI_PMU_EVENT_IDX_INVALID))
+	if (cidx >= total_ctrs)
 		return SBI_EINVAL;
 
+	event_idx_val = active_events[hartid][cidx];
 	event_idx_type = get_cidx_type(event_idx_val);
-	if (event_idx_type >= SBI_PMU_EVENT_TYPE_MAX)
+	if (event_idx_val == SBI_PMU_EVENT_IDX_INVALID ||
+	    event_idx_type >= SBI_PMU_EVENT_TYPE_MAX)
 		return SBI_EINVAL;
 
 	*event_idx_code = get_cidx_code(event_idx_val);

From 11c0008862e6d8c3220b0ee46d531796eb267d8e Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Wed, 20 Jul 2022 14:50:35 -0700
Subject: [PATCH 1030/1765] lib: sbi: Fix fw_event_map initialization

fw_event_map represents array of firmware events. It should initialized
for maximum number of firmware events not counters.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 5d31f58d145..5a294a20d9a 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -769,7 +769,7 @@ static void pmu_reset_event_map(u32 hartid)
 	/* Initialize the counter to event mapping table */
 	for (j = 3; j < total_ctrs; j++)
 		active_events[hartid][j] = SBI_PMU_EVENT_IDX_INVALID;
-	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
+	for (j = 0; j < SBI_PMU_FW_EVENT_MAX; j++)
 		sbi_memset(&fw_event_map[hartid][j], 0,
 			   sizeof(struct sbi_pmu_fw_event));
 }

From 8e86b23db9cab91d395c53d461b012ff69e63f64 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 18 Jul 2022 19:20:25 +0200
Subject: [PATCH 1031/1765] lib: utils/fdt: Factor out common uart node code

Factor out the common code used by the fdt UART node parsers,
allowing us to drop duplicate code.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 131 +++++++++++--------------------------
 1 file changed, 39 insertions(+), 92 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 2bdb1ef23e5..c6abf804014 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -314,8 +314,10 @@ int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
 	return 0;
 }
 
-int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
-				struct platform_uart_data *uart)
+static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
+				      struct platform_uart_data *uart,
+				      unsigned long default_freq,
+				      unsigned long default_baud)
 {
 	int len, rc;
 	const fdt32_t *val;
@@ -338,13 +340,28 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 	if (len > 0 && val)
 		uart->freq = fdt32_to_cpu(*val);
 	else
-		uart->freq = DEFAULT_UART_FREQ;
+		uart->freq = default_freq;
 
 	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
 	if (len > 0 && val)
 		uart->baud = fdt32_to_cpu(*val);
 	else
-		uart->baud = DEFAULT_UART_BAUD;
+		uart->baud = default_baud;
+
+	return 0;
+}
+
+int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
+				struct platform_uart_data *uart)
+{
+	int rc;
+
+	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+					DEFAULT_UART_FREQ,
+					DEFAULT_UART_BAUD);
+
+	if (rc)
+		return rc;
 
 	/* For Gaisler APBUART, the reg-shift and reg-io-width are fixed .*/
 	uart->reg_shift	   = DEFAULT_UART_REG_SHIFT;
@@ -356,69 +373,26 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
-	int len, rc;
-	const fdt32_t *val;
-	uint64_t reg_addr, reg_size;
-
-	if (nodeoffset < 0 || !uart || !fdt)
-		return SBI_ENODEV;
-
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
-				    &reg_addr, &reg_size);
-	if (rc < 0 || !reg_addr || !reg_size)
-		return SBI_ENODEV;
-	uart->addr = reg_addr;
+	int rc;
 
-	/**
-	 * UART address is mandaotry. clock-frequency and current-speed
-	 * may not be present. Don't return error.
-	 */
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
-	if (len > 0 && val)
-		uart->freq = fdt32_to_cpu(*val);
-	else
-		uart->freq = DEFAULT_SHAKTI_UART_FREQ;
+	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+					DEFAULT_SHAKTI_UART_FREQ,
+					DEFAULT_SHAKTI_UART_BAUD);
 
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
-	if (len > 0 && val)
-		uart->baud = fdt32_to_cpu(*val);
-	else
-		uart->baud = DEFAULT_SHAKTI_UART_BAUD;
-
-	return 0;
+	return rc ? : 0;
 }
 
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
-	int len, rc;
-	const fdt32_t *val;
-	uint64_t reg_addr, reg_size;
-
-	if (nodeoffset < 0 || !uart || !fdt)
-		return SBI_ENODEV;
-
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
-				    &reg_addr, &reg_size);
-	if (rc < 0 || !reg_addr || !reg_size)
-		return SBI_ENODEV;
-	uart->addr = reg_addr;
+	int rc;
 
-	/**
-	 * UART address is mandaotry. clock-frequency and current-speed
-	 * may not be present. Don't return error.
-	 */
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
-	if (len > 0 && val)
-		uart->freq = fdt32_to_cpu(*val);
-	else
-		uart->freq = DEFAULT_SIFIVE_UART_FREQ;
+	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+					DEFAULT_SIFIVE_UART_FREQ,
+					DEFAULT_SIFIVE_UART_BAUD);
 
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
-	if (len > 0 && val)
-		uart->baud = fdt32_to_cpu(*val);
-	else
-		uart->baud = DEFAULT_SIFIVE_UART_BAUD;
+	if (rc)
+		return rc;
 
 	/* For SiFive UART, the reg-shift and reg-io-width are fixed .*/
 	uart->reg_shift = DEFAULT_SIFIVE_UART_REG_SHIFT;
@@ -432,32 +406,13 @@ int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
 {
 	int len, rc;
 	const fdt32_t *val;
-	uint64_t reg_addr, reg_size;
-
-	if (nodeoffset < 0 || !uart || !fdt)
-		return SBI_ENODEV;
-
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
-				    &reg_addr, &reg_size);
-	if (rc < 0 || !reg_addr || !reg_size)
-		return SBI_ENODEV;
-	uart->addr = reg_addr;
 
-	/**
-	 * UART address is mandaotry. clock-frequency and current-speed
-	 * may not be present. Don't return error.
-	 */
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
-	if (len > 0 && val)
-		uart->freq = fdt32_to_cpu(*val);
-	else
-		uart->freq = DEFAULT_UART_FREQ;
+	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+					DEFAULT_UART_FREQ,
+					DEFAULT_UART_BAUD);
 
-	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
-	if (len > 0 && val)
-		uart->baud = fdt32_to_cpu(*val);
-	else
-		uart->baud = DEFAULT_UART_BAUD;
+	if (rc)
+		return rc;
 
 	val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "reg-shift", &len);
 	if (len > 0 && val)
@@ -499,18 +454,10 @@ int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
 	int rc;
-	uint64_t reg_addr, reg_size;
 
-	if (nodeoffset < 0 || !uart || !fdt)
-		return SBI_ENODEV;
+	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart, 0, 0);
 
-	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
-				    &reg_addr, &reg_size);
-	if (rc < 0 || !reg_addr || !reg_size)
-		return SBI_ENODEV;
-	uart->addr = reg_addr;
-
-	return 0;
+	return rc ? : 0;
 }
 
 int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)

From 7d28d3be50c5f8b9e4780a305ab3c39062e486c1 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 18 Jul 2022 19:20:26 +0200
Subject: [PATCH 1032/1765] lib: utils/serial: Initialize platform_uart_data to
 zero

While it doesn't look like there are any current cases of using
uninitialized data, let's zero all the UART data members to be
safe. Zero may not actually be better than a random number in
some cases, so all structure members should still be validated
before use, but at least zero is usually easier to debug than
some random stack garbage...

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/fdt_serial_gaisler.c       | 2 +-
 lib/utils/serial/fdt_serial_shakti.c        | 2 +-
 lib/utils/serial/fdt_serial_sifive.c        | 2 +-
 lib/utils/serial/fdt_serial_uart8250.c      | 2 +-
 lib/utils/serial/fdt_serial_xlnx_uartlite.c | 2 +-
 platform/fpga/openpiton/platform.c          | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/utils/serial/fdt_serial_gaisler.c b/lib/utils/serial/fdt_serial_gaisler.c
index 9a9f9a8b796..74988e34bcd 100644
--- a/lib/utils/serial/fdt_serial_gaisler.c
+++ b/lib/utils/serial/fdt_serial_gaisler.c
@@ -15,7 +15,7 @@ static int serial_gaisler_init(void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
-	struct platform_uart_data uart;
+	struct platform_uart_data uart = { 0 };
 
 	rc = fdt_parse_gaisler_uart_node(fdt, nodeoff, &uart);
 	if (rc)
diff --git a/lib/utils/serial/fdt_serial_shakti.c b/lib/utils/serial/fdt_serial_shakti.c
index 4f91419ef53..0e056303dbb 100644
--- a/lib/utils/serial/fdt_serial_shakti.c
+++ b/lib/utils/serial/fdt_serial_shakti.c
@@ -13,7 +13,7 @@ static int serial_shakti_init(void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	int rc;
-	struct platform_uart_data uart;
+	struct platform_uart_data uart = { 0 };
 
 	rc = fdt_parse_shakti_uart_node(fdt, nodeoff, &uart);
 	if (rc)
diff --git a/lib/utils/serial/fdt_serial_sifive.c b/lib/utils/serial/fdt_serial_sifive.c
index f4c833c1573..3ca10913eee 100644
--- a/lib/utils/serial/fdt_serial_sifive.c
+++ b/lib/utils/serial/fdt_serial_sifive.c
@@ -15,7 +15,7 @@ static int serial_sifive_init(void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	int rc;
-	struct platform_uart_data uart;
+	struct platform_uart_data uart = { 0 };
 
 	rc = fdt_parse_sifive_uart_node(fdt, nodeoff, &uart);
 	if (rc)
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 544b7416de4..0b95f2d9e44 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -15,7 +15,7 @@ static int serial_uart8250_init(void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	int rc;
-	struct platform_uart_data uart;
+	struct platform_uart_data uart = { 0 };
 
 	rc = fdt_parse_uart8250_node(fdt, nodeoff, &uart);
 	if (rc)
diff --git a/lib/utils/serial/fdt_serial_xlnx_uartlite.c b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
index 466e16e82d8..9f04aea3673 100644
--- a/lib/utils/serial/fdt_serial_xlnx_uartlite.c
+++ b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
@@ -15,7 +15,7 @@ static int serial_xlnx_uartlite_init(void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	int rc;
-	struct platform_uart_data uart;
+	struct platform_uart_data uart = { 0 };
 
 	rc = fdt_parse_xlnx_uartlite_node(fdt, nodeoff, &uart);
 	if (rc)
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 7ca21236bfe..5ff7d200aba 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -69,7 +69,7 @@ static struct aclint_mtimer_data mtimer = {
 static int openpiton_early_init(bool cold_boot)
 {
 	void *fdt;
-	struct platform_uart_data uart_data;
+	struct platform_uart_data uart_data = { 0 };
 	struct plic_data plic_data;
 	unsigned long aclint_freq;
 	uint64_t clint_addr;

From 7198e1d06f486173e6565ff6c718f30bf8c2ff30 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 18 Jul 2022 19:20:27 +0200
Subject: [PATCH 1033/1765] lib: serial: Clean up coding style in sifive-uart.c

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/sifive-uart.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 9478a77f805..7078611a527 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -48,12 +48,12 @@ static inline unsigned int uart_min_clk_divisor(uint64_t in_freq,
 						uint64_t max_target_hz)
 {
 	uint64_t quotient = (in_freq + max_target_hz - 1) / (max_target_hz);
+
 	/* Avoid underflow */
-	if (quotient == 0) {
+	if (quotient == 0)
 		return 0;
-	} else {
+	else
 		return quotient - 1;
-	}
 }
 
 static u32 get_reg(u32 num)
@@ -77,8 +77,10 @@ static void sifive_uart_putc(char ch)
 static int sifive_uart_getc(void)
 {
 	u32 ret = get_reg(UART_REG_RXFIFO);
+
 	if (!(ret & UART_RXFIFO_EMPTY))
 		return ret & UART_RXFIFO_DATA;
+
 	return -1;
 }
 
@@ -97,10 +99,13 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 	/* Configure baudrate */
 	if (in_freq)
 		set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate));
+
 	/* Disable interrupts */
 	set_reg(UART_REG_IE, 0);
+
 	/* Enable TX */
 	set_reg(UART_REG_TXCTRL, UART_TXCTRL_TXEN);
+
 	/* Enable Rx */
 	set_reg(UART_REG_RXCTRL, UART_RXCTRL_RXEN);
 

From f27203525aa2fc20d0074feb892a6f8433f84e3a Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 18 Jul 2022 19:20:28 +0200
Subject: [PATCH 1034/1765] lib: utils/serial: Ensure baudrate is non-zero
 before using

RISC-V doesn't generate exceptions on divide-by-zero, but the result,
all bits set, is not likely what people expect either. In all cases
where we divide by baudrate there's a chance it's zero (when the DT
it came from is "bad"). To avoid difficult to debug situations, leave
baudrate dependent registers alone when baudrate is zero, as, also in
all cases, it appears we can skip initialization of those registers
and still [hopefully] have a functioning UART.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/gaisler-uart.c | 2 +-
 lib/utils/serial/shakti-uart.c  | 8 ++++++--
 lib/utils/serial/sifive-uart.c  | 2 +-
 lib/utils/serial/uart8250.c     | 7 +++++--
 4 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/lib/utils/serial/gaisler-uart.c b/lib/utils/serial/gaisler-uart.c
index 5f30ee43b71..eec75cca0c9 100644
--- a/lib/utils/serial/gaisler-uart.c
+++ b/lib/utils/serial/gaisler-uart.c
@@ -70,7 +70,7 @@ int gaisler_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 	uart_base = (volatile char *)base;
 
 	/* Configure baudrate */
-	if (in_freq)
+	if (in_freq && baudrate)
 		set_reg(UART_REG_SCALER, in_freq / (baudrate * 8 + 7));
 
 	ctrl = get_reg(UART_REG_CTRL);
diff --git a/lib/utils/serial/shakti-uart.c b/lib/utils/serial/shakti-uart.c
index 35569356078..8769cb26f94 100644
--- a/lib/utils/serial/shakti-uart.c
+++ b/lib/utils/serial/shakti-uart.c
@@ -47,8 +47,12 @@ static struct sbi_console_device shakti_console = {
 int shakti_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 {
 	uart_base = (volatile char *)base;
-	u16 baud = (u16)(in_freq/(16 * baudrate));
-	writew(baud, uart_base + REG_BAUD);
+	u16 baud;
+
+	if (baudrate) {
+		baud = (u16)(in_freq / (16 * baudrate));
+		writew(baud, uart_base + REG_BAUD);
+	}
 
 	sbi_console_set_device(&shakti_console);
 
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 7078611a527..3581d47a6d4 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -97,7 +97,7 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 	uart_baudrate = baudrate;
 
 	/* Configure baudrate */
-	if (in_freq)
+	if (in_freq && baudrate)
 		set_reg(UART_REG_DIV, uart_min_clk_divisor(in_freq, baudrate));
 
 	/* Disable interrupts */
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 38ea11af4d3..99bf1bf733f 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -93,7 +93,7 @@ static struct sbi_console_device uart8250_console = {
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 		  u32 reg_width, u32 reg_offset)
 {
-	u16 bdiv;
+	u16 bdiv = 0;
 
 	uart8250_base      = (volatile char *)base + reg_offset;
 	uart8250_reg_shift = reg_shift;
@@ -101,7 +101,10 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 	uart8250_in_freq   = in_freq;
 	uart8250_baudrate  = baudrate;
 
-	bdiv = (uart8250_in_freq + 8 * uart8250_baudrate) / (16 * uart8250_baudrate);
+	if (uart8250_baudrate) {
+		bdiv = (uart8250_in_freq + 8 * uart8250_baudrate) /
+		       (16 * uart8250_baudrate);
+	}
 
 	/* Disable all interrupts */
 	set_reg(UART_IER_OFFSET, 0x00);

From b9edf49b67a1b5e47b1c35dcd7c75efccaf22ea3 Mon Sep 17 00:00:00 2001
From: dramforever <dramforever@live.com>
Date: Thu, 28 Jul 2022 00:30:05 +0800
Subject: [PATCH 1035/1765] lib: sbi: Fix printf handling of long long

Read long long arguments directly using va_arg. Remove original hack for
RV32 that read a long long arg as two long args.

This un-breaks the case on RV64 where e.g. the long long is followed by
an odd number of ints:

    sbi_printf("%d %lld", (int) 1, (long long) 2LL);

Also remove the acnt variable, which is now unused.

Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 30 ++----------------------------
 1 file changed, 2 insertions(+), 28 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 7b9be4a4667..cfef2f8608d 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -183,7 +183,7 @@ static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 
 static int print(char **out, u32 *out_len, const char *format, va_list args)
 {
-	int width, flags, acnt = 0;
+	int width, flags;
 	int pc = 0;
 	char scr[2];
 	unsigned long long tmp;
@@ -216,7 +216,6 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			}
 			if (*format == 's') {
 				char *s = va_arg(args, char *);
-				acnt += sizeof(char *);
 				pc += prints(out, out_len, s ? s : "(null)",
 					     width, flags);
 				continue;
@@ -224,61 +223,40 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			if ((*format == 'd') || (*format == 'i')) {
 				pc += printi(out, out_len, va_arg(args, int),
 					     10, 1, width, flags, '0');
-				acnt += sizeof(int);
 				continue;
 			}
 			if (*format == 'x') {
 				pc += printi(out, out_len,
 					     va_arg(args, unsigned int), 16, 0,
 					     width, flags, 'a');
-				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'X') {
 				pc += printi(out, out_len,
 					     va_arg(args, unsigned int), 16, 0,
 					     width, flags, 'A');
-				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'u') {
 				pc += printi(out, out_len,
 					     va_arg(args, unsigned int), 10, 0,
 					     width, flags, 'a');
-				acnt += sizeof(unsigned int);
 				continue;
 			}
 			if (*format == 'p') {
 				pc += printi(out, out_len,
 					     va_arg(args, unsigned long), 16, 0,
 					     width, flags, 'a');
-				acnt += sizeof(unsigned long);
 				continue;
 			}
 			if (*format == 'P') {
 				pc += printi(out, out_len,
 					     va_arg(args, unsigned long), 16, 0,
 					     width, flags, 'A');
-				acnt += sizeof(unsigned long);
 				continue;
 			}
 			if (*format == 'l' && *(format + 1) == 'l') {
-				while (acnt &
-				       (sizeof(unsigned long long) - 1)) {
-					va_arg(args, int);
-					acnt += sizeof(int);
-				}
-				if (sizeof(unsigned long long) ==
-				    sizeof(unsigned long)) {
-					tmp = va_arg(args, unsigned long long);
-					acnt += sizeof(unsigned long long);
-				} else {
-					((unsigned long *)&tmp)[0] =
-						va_arg(args, unsigned long);
-					((unsigned long *)&tmp)[1] =
-						va_arg(args, unsigned long);
-					acnt += 2 * sizeof(unsigned long);
-				}
+				tmp = va_arg(args, unsigned long long);
 				if (*(format + 2) == 'u') {
 					format += 2;
 					pc += printi(out, out_len, tmp, 10, 0,
@@ -310,19 +288,16 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 						out, out_len,
 						va_arg(args, unsigned long), 16,
 						0, width, flags, 'a');
-					acnt += sizeof(unsigned long);
 				} else if (*(format + 1) == 'X') {
 					format += 1;
 					pc += printi(
 						out, out_len,
 						va_arg(args, unsigned long), 16,
 						0, width, flags, 'A');
-					acnt += sizeof(unsigned long);
 				} else {
 					pc += printi(out, out_len,
 						     va_arg(args, long), 10, 1,
 						     width, flags, '0');
-					acnt += sizeof(long);
 				}
 			}
 			if (*format == 'c') {
@@ -330,7 +305,6 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				scr[0] = va_arg(args, int);
 				scr[1] = '\0';
 				pc += prints(out, out_len, scr, width, flags);
-				acnt += sizeof(int);
 				continue;
 			}
 		} else {

From 422f0e0486dd30196c11e43763510410c8632bcb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:03 +0530
Subject: [PATCH 1036/1765] scripts: Add Kconfiglib v14.1.0 under scripts
 directory

We adopt Kconfiglib v14.1.0 sources under scripts directory so that
top-level OpenSBI makefile can directly use Kconfiglib scripts without
expecting users to install a particular version of Kconfiglib on their
build system.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 scripts/Kconfiglib/LICENSE.txt      |    5 +
 scripts/Kconfiglib/allnoconfig.py   |   45 +
 scripts/Kconfiglib/allyesconfig.py  |   56 +
 scripts/Kconfiglib/defconfig.py     |   43 +
 scripts/Kconfiglib/genconfig.py     |  154 +
 scripts/Kconfiglib/kconfiglib.py    | 7160 +++++++++++++++++++++++++++
 scripts/Kconfiglib/menuconfig.py    | 3278 ++++++++++++
 scripts/Kconfiglib/oldconfig.py     |  246 +
 scripts/Kconfiglib/olddefconfig.py  |   28 +
 scripts/Kconfiglib/savedefconfig.py |   49 +
 scripts/Kconfiglib/setconfig.py     |   92 +
 11 files changed, 11156 insertions(+)
 create mode 100644 scripts/Kconfiglib/LICENSE.txt
 create mode 100755 scripts/Kconfiglib/allnoconfig.py
 create mode 100755 scripts/Kconfiglib/allyesconfig.py
 create mode 100755 scripts/Kconfiglib/defconfig.py
 create mode 100755 scripts/Kconfiglib/genconfig.py
 create mode 100644 scripts/Kconfiglib/kconfiglib.py
 create mode 100755 scripts/Kconfiglib/menuconfig.py
 create mode 100755 scripts/Kconfiglib/oldconfig.py
 create mode 100755 scripts/Kconfiglib/olddefconfig.py
 create mode 100755 scripts/Kconfiglib/savedefconfig.py
 create mode 100755 scripts/Kconfiglib/setconfig.py

diff --git a/scripts/Kconfiglib/LICENSE.txt b/scripts/Kconfiglib/LICENSE.txt
new file mode 100644
index 00000000000..8b31efca291
--- /dev/null
+++ b/scripts/Kconfiglib/LICENSE.txt
@@ -0,0 +1,5 @@
+Copyright (c) 2011-2019, Ulf Magnusson <ulfalizer@gmail.com>
+
+Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
diff --git a/scripts/Kconfiglib/allnoconfig.py b/scripts/Kconfiglib/allnoconfig.py
new file mode 100755
index 00000000000..de90d8bf46c
--- /dev/null
+++ b/scripts/Kconfiglib/allnoconfig.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Writes a configuration file where as many symbols as possible are set to 'n'.
+
+The default output filename is '.config'. A different filename can be passed
+in the KCONFIG_CONFIG environment variable.
+
+Usage for the Linux kernel:
+
+  $ make [ARCH=<arch>] scriptconfig SCRIPT=Kconfiglib/allnoconfig.py
+"""
+
+# See examples/allnoconfig_walk.py for another way to implement this script
+
+import kconfiglib
+
+
+def main():
+    kconf = kconfiglib.standard_kconfig(__doc__)
+
+    # Avoid warnings that would otherwise get printed by Kconfiglib for the
+    # following:
+    #
+    # 1. Assigning a value to a symbol without a prompt, which never has any
+    #    effect
+    #
+    # 2. Assigning values invalid for the type (only bool/tristate symbols
+    #    accept 0/1/2, for n/m/y). The assignments will be ignored for other
+    #    symbol types, which is what we want.
+    kconf.warn = False
+    for sym in kconf.unique_defined_syms:
+        sym.set_value(2 if sym.is_allnoconfig_y else 0)
+    kconf.warn = True
+
+    kconf.load_allconfig("allno.config")
+
+    print(kconf.write_config())
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/allyesconfig.py b/scripts/Kconfiglib/allyesconfig.py
new file mode 100755
index 00000000000..90eb9b8d67f
--- /dev/null
+++ b/scripts/Kconfiglib/allyesconfig.py
@@ -0,0 +1,56 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Writes a configuration file where as many symbols as possible are set to 'y'.
+
+The default output filename is '.config'. A different filename can be passed
+in the KCONFIG_CONFIG environment variable.
+
+Usage for the Linux kernel:
+
+  $ make [ARCH=<arch>] scriptconfig SCRIPT=Kconfiglib/allyesconfig.py
+"""
+import kconfiglib
+
+
+def main():
+    kconf = kconfiglib.standard_kconfig(__doc__)
+
+    # See allnoconfig.py
+    kconf.warn = False
+
+    # Try to set all symbols to 'y'. Dependencies might truncate the value down
+    # later, but this will at least give the highest possible value.
+    #
+    # Assigning 0/1/2 to non-bool/tristate symbols has no effect (int/hex
+    # symbols still take a string, because they preserve formatting).
+    for sym in kconf.unique_defined_syms:
+        # Set choice symbols to 'm'. This value will be ignored for choices in
+        # 'y' mode (the "normal" mode), which will instead just get their
+        # default selection, but will set all symbols in m-mode choices to 'm',
+        # which is as high as they can go.
+        #
+        # Here's a convoluted example of how you might get an m-mode choice
+        # even during allyesconfig:
+        #
+        #   choice
+        #           tristate "weird choice"
+        #           depends on m
+        sym.set_value(1 if sym.choice else 2)
+
+    # Set all choices to the highest possible mode
+    for choice in kconf.unique_choices:
+        choice.set_value(2)
+
+    kconf.warn = True
+
+    kconf.load_allconfig("allyes.config")
+
+    print(kconf.write_config())
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/defconfig.py b/scripts/Kconfiglib/defconfig.py
new file mode 100755
index 00000000000..b1792731f59
--- /dev/null
+++ b/scripts/Kconfiglib/defconfig.py
@@ -0,0 +1,43 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Reads a specified configuration file, then writes a new configuration file.
+This can be used to initialize the configuration from e.g. an arch-specific
+configuration file. This input configuration file would usually be a minimal
+configuration file, as generated by e.g. savedefconfig.
+
+The default output filename is '.config'. A different filename can be passed in
+the KCONFIG_CONFIG environment variable.
+"""
+import argparse
+
+import kconfiglib
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description=__doc__)
+
+    parser.add_argument(
+        "--kconfig",
+        default="Kconfig",
+        help="Top-level Kconfig file (default: Kconfig)")
+
+    parser.add_argument(
+        "config",
+        metavar="CONFIGURATION",
+        help="Input configuration file")
+
+    args = parser.parse_args()
+
+    kconf = kconfiglib.Kconfig(args.kconfig, suppress_traceback=True)
+    print(kconf.load_config(args.config))
+    print(kconf.write_config())
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/genconfig.py b/scripts/Kconfiglib/genconfig.py
new file mode 100755
index 00000000000..62f065ba727
--- /dev/null
+++ b/scripts/Kconfiglib/genconfig.py
@@ -0,0 +1,154 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Generates a header file with #defines from the configuration, matching the
+format of include/generated/autoconf.h in the Linux kernel.
+
+Optionally, also writes the configuration output as a .config file. See
+--config-out.
+
+The --sync-deps, --file-list, and --env-list options generate information that
+can be used to avoid needless rebuilds/reconfigurations.
+
+Before writing a header or configuration file, Kconfiglib compares the old
+contents of the file against the new contents. If there's no change, the write
+is skipped. This avoids updating file metadata like the modification time, and
+might save work depending on your build setup.
+
+By default, the configuration is generated from '.config'. A different
+configuration file can be passed in the KCONFIG_CONFIG environment variable.
+
+A custom header string can be inserted at the beginning of generated
+configuration and header files by setting the KCONFIG_CONFIG_HEADER and
+KCONFIG_AUTOHEADER_HEADER environment variables, respectively (this also works
+for other scripts). The string is not automatically made a comment (this is by
+design, to allow anything to be added), and no trailing newline is added, so
+add '/* */', '#', and newlines as appropriate.
+
+See https://www.gnu.org/software/make/manual/make.html#Multi_002dLine for a
+handy way to define multi-line variables in makefiles, for use with custom
+headers. Remember to export the variable to the environment.
+"""
+import argparse
+import os
+import sys
+
+import kconfiglib
+
+
+DEFAULT_SYNC_DEPS_PATH = "deps/"
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description=__doc__)
+
+    parser.add_argument(
+        "--header-path",
+        metavar="HEADER_FILE",
+        help="""
+Path to write the generated header file to. If not specified, the path in the
+environment variable KCONFIG_AUTOHEADER is used if it is set, and 'config.h'
+otherwise.
+""")
+
+    parser.add_argument(
+        "--config-out",
+        metavar="CONFIG_FILE",
+        help="""
+Write the configuration to CONFIG_FILE. This is useful if you include .config
+files in Makefiles, as the generated configuration file will be a full .config
+file even if .config is outdated. The generated configuration matches what
+olddefconfig would produce. If you use sync-deps, you can include
+deps/auto.conf instead. --config-out is meant for cases where incremental build
+information isn't needed.
+""")
+
+    parser.add_argument(
+        "--sync-deps",
+        metavar="OUTPUT_DIR",
+        nargs="?",
+        const=DEFAULT_SYNC_DEPS_PATH,
+        help="""
+Enable generation of symbol dependency information for incremental builds,
+optionally specifying the output directory (default: {}). See the docstring of
+Kconfig.sync_deps() in Kconfiglib for more information.
+""".format(DEFAULT_SYNC_DEPS_PATH))
+
+    parser.add_argument(
+        "--file-list",
+        metavar="OUTPUT_FILE",
+        help="""
+Write a list of all Kconfig files to OUTPUT_FILE, with one file per line. The
+paths are relative to $srctree (or to the current directory if $srctree is
+unset). Files appear in the order they're 'source'd.
+""")
+
+    parser.add_argument(
+        "--env-list",
+        metavar="OUTPUT_FILE",
+        help="""
+Write a list of all environment variables referenced in Kconfig files to
+OUTPUT_FILE, with one variable per line. Each line has the format NAME=VALUE.
+Only environment variables referenced with the preprocessor $(VAR) syntax are
+included, and not variables referenced with the older $VAR syntax (which is
+only supported for backwards compatibility).
+""")
+
+    parser.add_argument(
+        "kconfig",
+        metavar="KCONFIG",
+        nargs="?",
+        default="Kconfig",
+        help="Top-level Kconfig file (default: Kconfig)")
+
+    args = parser.parse_args()
+
+
+    kconf = kconfiglib.Kconfig(args.kconfig, suppress_traceback=True)
+    kconf.load_config()
+
+    if args.header_path is None:
+        if "KCONFIG_AUTOHEADER" in os.environ:
+            kconf.write_autoconf()
+        else:
+            # Kconfiglib defaults to include/generated/autoconf.h to be
+            # compatible with the C tools. 'config.h' is used here instead for
+            # backwards compatibility. It's probably a saner default for tools
+            # as well.
+            kconf.write_autoconf("config.h")
+    else:
+        kconf.write_autoconf(args.header_path)
+
+    if args.config_out is not None:
+        kconf.write_config(args.config_out, save_old=False)
+
+    if args.sync_deps is not None:
+        kconf.sync_deps(args.sync_deps)
+
+    if args.file_list is not None:
+        with _open_write(args.file_list) as f:
+            for path in kconf.kconfig_filenames:
+                f.write(path + "\n")
+
+    if args.env_list is not None:
+        with _open_write(args.env_list) as f:
+            for env_var in kconf.env_vars:
+                f.write("{}={}\n".format(env_var, os.environ[env_var]))
+
+
+def _open_write(path):
+    # Python 2/3 compatibility. io.open() is available on both, but makes
+    # write() expect 'unicode' strings on Python 2.
+
+    if sys.version_info[0] < 3:
+        return open(path, "w")
+    return open(path, "w", encoding="utf-8")
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/kconfiglib.py b/scripts/Kconfiglib/kconfiglib.py
new file mode 100644
index 00000000000..c67895ced6b
--- /dev/null
+++ b/scripts/Kconfiglib/kconfiglib.py
@@ -0,0 +1,7160 @@
+# Copyright (c) 2011-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Overview
+========
+
+Kconfiglib is a Python 2/3 library for scripting and extracting information
+from Kconfig (https://www.kernel.org/doc/Documentation/kbuild/kconfig-language.txt)
+configuration systems.
+
+See the homepage at https://github.com/ulfalizer/Kconfiglib for a longer
+overview.
+
+Since Kconfiglib 12.0.0, the library version is available in
+kconfiglib.VERSION, which is a (<major>, <minor>, <patch>) tuple, e.g.
+(12, 0, 0).
+
+
+Using Kconfiglib on the Linux kernel with the Makefile targets
+==============================================================
+
+For the Linux kernel, a handy interface is provided by the
+scripts/kconfig/Makefile patch, which can be applied with either 'git am' or
+the 'patch' utility:
+
+  $ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | git am
+  $ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | patch -p1
+
+Warning: Not passing -p1 to patch will cause the wrong file to be patched.
+
+Please tell me if the patch does not apply. It should be trivial to apply
+manually, as it's just a block of text that needs to be inserted near the other
+*conf: targets in scripts/kconfig/Makefile.
+
+Look further down for a motivation for the Makefile patch and for instructions
+on how you can use Kconfiglib without it.
+
+If you do not wish to install Kconfiglib via pip, the Makefile patch is set up
+so that you can also just clone Kconfiglib into the kernel root:
+
+  $ git clone git://github.com/ulfalizer/Kconfiglib.git
+  $ git am Kconfiglib/makefile.patch  (or 'patch -p1 < Kconfiglib/makefile.patch')
+
+Warning: The directory name Kconfiglib/ is significant in this case, because
+it's added to PYTHONPATH by the new targets in makefile.patch.
+
+The targets added by the Makefile patch are described in the following
+sections.
+
+
+make kmenuconfig
+----------------
+
+This target runs the curses menuconfig interface with Python 3. As of
+Kconfiglib 12.2.0, both Python 2 and Python 3 are supported (previously, only
+Python 3 was supported, so this was a backport).
+
+
+make guiconfig
+--------------
+
+This target runs the Tkinter menuconfig interface. Both Python 2 and Python 3
+are supported. To change the Python interpreter used, pass
+PYTHONCMD=<executable> to 'make'. The default is 'python'.
+
+
+make [ARCH=<arch>] iscriptconfig
+--------------------------------
+
+This target gives an interactive Python prompt where a Kconfig instance has
+been preloaded and is available in 'kconf'. To change the Python interpreter
+used, pass PYTHONCMD=<executable> to 'make'. The default is 'python'.
+
+To get a feel for the API, try evaluating and printing the symbols in
+kconf.defined_syms, and explore the MenuNode menu tree starting at
+kconf.top_node by following 'next' and 'list' pointers.
+
+The item contained in a menu node is found in MenuNode.item (note that this can
+be one of the constants kconfiglib.MENU and kconfiglib.COMMENT), and all
+symbols and choices have a 'nodes' attribute containing their menu nodes
+(usually only one). Printing a menu node will print its item, in Kconfig
+format.
+
+If you want to look up a symbol by name, use the kconf.syms dictionary.
+
+
+make scriptconfig SCRIPT=<script> [SCRIPT_ARG=<arg>]
+----------------------------------------------------
+
+This target runs the Python script given by the SCRIPT parameter on the
+configuration. sys.argv[1] holds the name of the top-level Kconfig file
+(currently always "Kconfig" in practice), and sys.argv[2] holds the SCRIPT_ARG
+argument, if given.
+
+See the examples/ subdirectory for example scripts.
+
+
+make dumpvarsconfig
+-------------------
+
+This target prints a list of all environment variables referenced from the
+Kconfig files, together with their values. See the
+Kconfiglib/examples/dumpvars.py script.
+
+Only environment variables that are referenced via the Kconfig preprocessor
+$(FOO) syntax are included. The preprocessor was added in Linux 4.18.
+
+
+Using Kconfiglib without the Makefile targets
+=============================================
+
+The make targets are only needed to pick up environment variables exported from
+the Kbuild makefiles and referenced inside Kconfig files, via e.g.
+'source "arch/$(SRCARCH)/Kconfig" and commands run via '$(shell,...)'.
+
+These variables are referenced as of writing (Linux 4.18), together with sample
+values:
+
+  srctree          (.)
+  ARCH             (x86)
+  SRCARCH          (x86)
+  KERNELVERSION    (4.18.0)
+  CC               (gcc)
+  HOSTCC           (gcc)
+  HOSTCXX          (g++)
+  CC_VERSION_TEXT  (gcc (Ubuntu 7.3.0-16ubuntu3) 7.3.0)
+
+Older kernels only reference ARCH, SRCARCH, and KERNELVERSION.
+
+If your kernel is recent enough (4.18+), you can get a list of referenced
+environment variables via 'make dumpvarsconfig' (see above). Note that this
+command is added by the Makefile patch.
+
+To run Kconfiglib without the Makefile patch, set the environment variables
+manually:
+
+  $ srctree=. ARCH=x86 SRCARCH=x86 KERNELVERSION=`make kernelversion` ... python(3)
+  >>> import kconfiglib
+  >>> kconf = kconfiglib.Kconfig()  # filename defaults to "Kconfig"
+
+Search the top-level Makefile for "Additional ARCH settings" to see other
+possibilities for ARCH and SRCARCH.
+
+
+Intro to symbol values
+======================
+
+Kconfiglib has the same assignment semantics as the C implementation.
+
+Any symbol can be assigned a value by the user (via Kconfig.load_config() or
+Symbol.set_value()), but this user value is only respected if the symbol is
+visible, which corresponds to it (currently) being visible in the menuconfig
+interface.
+
+For symbols with prompts, the visibility of the symbol is determined by the
+condition on the prompt. Symbols without prompts are never visible, so setting
+a user value on them is pointless. A warning will be printed by default if
+Symbol.set_value() is called on a promptless symbol. Assignments to promptless
+symbols are normal within a .config file, so no similar warning will be printed
+by load_config().
+
+Dependencies from parents and 'if'/'depends on' are propagated to properties,
+including prompts, so these two configurations are logically equivalent:
+
+(1)
+
+  menu "menu"
+      depends on A
+
+  if B
+
+  config FOO
+      tristate "foo" if D
+      default y
+      depends on C
+
+  endif
+
+  endmenu
+
+(2)
+
+  menu "menu"
+      depends on A
+
+  config FOO
+      tristate "foo" if A && B && C && D
+      default y if A && B && C
+
+  endmenu
+
+In this example, A && B && C && D (the prompt condition) needs to be non-n for
+FOO to be visible (assignable). If its value is m, the symbol can only be
+assigned the value m: The visibility sets an upper bound on the value that can
+be assigned by the user, and any higher user value will be truncated down.
+
+'default' properties are independent of the visibility, though a 'default' will
+often get the same condition as the prompt due to dependency propagation.
+'default' properties are used if the symbol is not visible or has no user
+value.
+
+Symbols with no user value (or that have a user value but are not visible) and
+no (active) 'default' default to n for bool/tristate symbols, and to the empty
+string for other symbol types.
+
+'select' works similarly to symbol visibility, but sets a lower bound on the
+value of the symbol. The lower bound is determined by the value of the
+select*ing* symbol. 'select' does not respect visibility, so non-visible
+symbols can be forced to a particular (minimum) value by a select as well.
+
+For non-bool/tristate symbols, it only matters whether the visibility is n or
+non-n: m visibility acts the same as y visibility.
+
+Conditions on 'default' and 'select' work in mostly intuitive ways. If the
+condition is n, the 'default' or 'select' is disabled. If it is m, the
+'default' or 'select' value (the value of the selecting symbol) is truncated
+down to m.
+
+When writing a configuration with Kconfig.write_config(), only symbols that are
+visible, have an (active) default, or are selected will get written out (note
+that this includes all symbols that would accept user values). Kconfiglib
+matches the .config format produced by the C implementations down to the
+character. This eases testing.
+
+For a visible bool/tristate symbol FOO with value n, this line is written to
+.config:
+
+    # CONFIG_FOO is not set
+
+The point is to remember the user n selection (which might differ from the
+default value the symbol would get), while at the same sticking to the rule
+that undefined corresponds to n (.config uses Makefile format, making the line
+above a comment). When the .config file is read back in, this line will be
+treated the same as the following assignment:
+
+    CONFIG_FOO=n
+
+In Kconfiglib, the set of (currently) assignable values for a bool/tristate
+symbol appear in Symbol.assignable. For other symbol types, just check if
+sym.visibility is non-0 (non-n) to see whether the user value will have an
+effect.
+
+
+Intro to the menu tree
+======================
+
+The menu structure, as seen in e.g. menuconfig, is represented by a tree of
+MenuNode objects. The top node of the configuration corresponds to an implicit
+top-level menu, the title of which is shown at the top in the standard
+menuconfig interface. (The title is also available in Kconfig.mainmenu_text in
+Kconfiglib.)
+
+The top node is found in Kconfig.top_node. From there, you can visit child menu
+nodes by following the 'list' pointer, and any following menu nodes by
+following the 'next' pointer. Usually, a non-None 'list' pointer indicates a
+menu or Choice, but menu nodes for symbols can sometimes have a non-None 'list'
+pointer too due to submenus created implicitly from dependencies.
+
+MenuNode.item is either a Symbol or a Choice object, or one of the constants
+MENU and COMMENT. The prompt of the menu node can be found in MenuNode.prompt,
+which also holds the title for menus and comments. For Symbol and Choice,
+MenuNode.help holds the help text (if any, otherwise None).
+
+Most symbols will only have a single menu node. A symbol defined in multiple
+locations will have one menu node for each location. The list of menu nodes for
+a Symbol or Choice can be found in the Symbol/Choice.nodes attribute.
+
+Note that prompts and help texts for symbols and choices are stored in their
+menu node(s) rather than in the Symbol or Choice objects themselves. This makes
+it possible to define a symbol in multiple locations with a different prompt or
+help text in each location. To get the help text or prompt for a symbol with a
+single menu node, do sym.nodes[0].help and sym.nodes[0].prompt, respectively.
+The prompt is a (text, condition) tuple, where condition determines the
+visibility (see 'Intro to expressions' below).
+
+This organization mirrors the C implementation. MenuNode is called
+'struct menu' there, but I thought "menu" was a confusing name.
+
+It is possible to give a Choice a name and define it in multiple locations,
+hence why Choice.nodes is also a list.
+
+As a convenience, the properties added at a particular definition location are
+available on the MenuNode itself, in e.g. MenuNode.defaults. This is helpful
+when generating documentation, so that symbols/choices defined in multiple
+locations can be shown with the correct properties at each location.
+
+
+Intro to expressions
+====================
+
+Expressions can be evaluated with the expr_value() function and printed with
+the expr_str() function (these are used internally as well). Evaluating an
+expression always yields a tristate value, where n, m, and y are represented as
+0, 1, and 2, respectively.
+
+The following table should help you figure out how expressions are represented.
+A, B, C, ... are symbols (Symbol instances), NOT is the kconfiglib.NOT
+constant, etc.
+
+Expression            Representation
+----------            --------------
+A                     A
+"A"                   A (constant symbol)
+!A                    (NOT, A)
+A && B                (AND, A, B)
+A && B && C           (AND, A, (AND, B, C))
+A || B                (OR, A, B)
+A || (B && C && D)    (OR, A, (AND, B, (AND, C, D)))
+A = B                 (EQUAL, A, B)
+A != "foo"            (UNEQUAL, A, foo (constant symbol))
+A && B = C && D       (AND, A, (AND, (EQUAL, B, C), D))
+n                     Kconfig.n (constant symbol)
+m                     Kconfig.m (constant symbol)
+y                     Kconfig.y (constant symbol)
+"y"                   Kconfig.y (constant symbol)
+
+Strings like "foo" in 'default "foo"' or 'depends on SYM = "foo"' are
+represented as constant symbols, so the only values that appear in expressions
+are symbols***. This mirrors the C implementation.
+
+***For choice symbols, the parent Choice will appear in expressions as well,
+but it's usually invisible as the value interfaces of Symbol and Choice are
+identical. This mirrors the C implementation and makes different choice modes
+"just work".
+
+Manual evaluation examples:
+
+  - The value of A && B is min(A.tri_value, B.tri_value)
+
+  - The value of A || B is max(A.tri_value, B.tri_value)
+
+  - The value of !A is 2 - A.tri_value
+
+  - The value of A = B is 2 (y) if A.str_value == B.str_value, and 0 (n)
+    otherwise. Note that str_value is used here instead of tri_value.
+
+    For constant (as well as undefined) symbols, str_value matches the name of
+    the symbol. This mirrors the C implementation and explains why
+    'depends on SYM = "foo"' above works as expected.
+
+n/m/y are automatically converted to the corresponding constant symbols
+"n"/"m"/"y" (Kconfig.n/m/y) during parsing.
+
+Kconfig.const_syms is a dictionary like Kconfig.syms but for constant symbols.
+
+If a condition is missing (e.g., <cond> when the 'if <cond>' is removed from
+'default A if <cond>'), it is actually Kconfig.y. The standard __str__()
+functions just avoid printing 'if y' conditions to give cleaner output.
+
+
+Kconfig extensions
+==================
+
+Kconfiglib includes a couple of Kconfig extensions:
+
+'source' with relative path
+---------------------------
+
+The 'rsource' statement sources Kconfig files with a path relative to directory
+of the Kconfig file containing the 'rsource' statement, instead of relative to
+the project root.
+
+Consider following directory tree:
+
+  Project
+  +--Kconfig
+  |
+  +--src
+     +--Kconfig
+     |
+     +--SubSystem1
+        +--Kconfig
+        |
+        +--ModuleA
+           +--Kconfig
+
+In this example, assume that src/SubSystem1/Kconfig wants to source
+src/SubSystem1/ModuleA/Kconfig.
+
+With 'source', this statement would be used:
+
+  source "src/SubSystem1/ModuleA/Kconfig"
+
+With 'rsource', this turns into
+
+  rsource "ModuleA/Kconfig"
+
+If an absolute path is given to 'rsource', it acts the same as 'source'.
+
+'rsource' can be used to create "position-independent" Kconfig trees that can
+be moved around freely.
+
+
+Globbing 'source'
+-----------------
+
+'source' and 'rsource' accept glob patterns, sourcing all matching Kconfig
+files. They require at least one matching file, raising a KconfigError
+otherwise.
+
+For example, the following statement might source sub1/foofoofoo and
+sub2/foobarfoo:
+
+  source "sub[12]/foo*foo"
+
+The glob patterns accepted are the same as for the standard glob.glob()
+function.
+
+Two additional statements are provided for cases where it's acceptable for a
+pattern to match no files: 'osource' and 'orsource' (the o is for "optional").
+
+For example, the following statements will be no-ops if neither "foo" nor any
+files matching "bar*" exist:
+
+  osource "foo"
+  osource "bar*"
+
+'orsource' does a relative optional source.
+
+'source' and 'osource' are analogous to 'include' and '-include' in Make.
+
+
+Generalized def_* keywords
+--------------------------
+
+def_int, def_hex, and def_string are available in addition to def_bool and
+def_tristate, allowing int, hex, and string symbols to be given a type and a
+default at the same time.
+
+
+Extra optional warnings
+-----------------------
+
+Some optional warnings can be controlled via environment variables:
+
+  - KCONFIG_WARN_UNDEF: If set to 'y', warnings will be generated for all
+    references to undefined symbols within Kconfig files. The only gotcha is
+    that all hex literals must be prefixed with "0x" or "0X", to make it
+    possible to distinguish them from symbol references.
+
+    Some projects (e.g. the Linux kernel) use multiple Kconfig trees with many
+    shared Kconfig files, leading to some safe undefined symbol references.
+    KCONFIG_WARN_UNDEF is useful in projects that only have a single Kconfig
+    tree though.
+
+    KCONFIG_STRICT is an older alias for this environment variable, supported
+    for backwards compatibility.
+
+  - KCONFIG_WARN_UNDEF_ASSIGN: If set to 'y', warnings will be generated for
+    all assignments to undefined symbols within .config files. By default, no
+    such warnings are generated.
+
+    This warning can also be enabled/disabled via the Kconfig.warn_assign_undef
+    variable.
+
+
+Preprocessor user functions defined in Python
+---------------------------------------------
+
+Preprocessor functions can be defined in Python, which makes it simple to
+integrate information from existing Python tools into Kconfig (e.g. to have
+Kconfig symbols depend on hardware information stored in some other format).
+
+Putting a Python module named kconfigfunctions(.py) anywhere in sys.path will
+cause it to be imported by Kconfiglib (in Kconfig.__init__()). Note that
+sys.path can be customized via PYTHONPATH, and includes the directory of the
+module being run by default, as well as installation directories.
+
+If the KCONFIG_FUNCTIONS environment variable is set, it gives a different
+module name to use instead of 'kconfigfunctions'.
+
+The imported module is expected to define a global dictionary named 'functions'
+that maps function names to Python functions, as follows:
+
+  def my_fn(kconf, name, arg_1, arg_2, ...):
+      # kconf:
+      #   Kconfig instance
+      #
+      # name:
+      #   Name of the user-defined function ("my-fn"). Think argv[0].
+      #
+      # arg_1, arg_2, ...:
+      #   Arguments passed to the function from Kconfig (strings)
+      #
+      # Returns a string to be substituted as the result of calling the
+      # function
+      ...
+
+  def my_other_fn(kconf, name, arg_1, arg_2, ...):
+      ...
+
+  functions = {
+      "my-fn":       (my_fn,       <min.args>, <max.args>/None),
+      "my-other-fn": (my_other_fn, <min.args>, <max.args>/None),
+      ...
+  }
+
+  ...
+
+<min.args> and <max.args> are the minimum and maximum number of arguments
+expected by the function (excluding the implicit 'name' argument). If
+<max.args> is None, there is no upper limit to the number of arguments. Passing
+an invalid number of arguments will generate a KconfigError exception.
+
+Functions can access the current parsing location as kconf.filename/linenr.
+Accessing other fields of the Kconfig object is not safe. See the warning
+below.
+
+Keep in mind that for a variable defined like 'foo = $(fn)', 'fn' will be
+called only when 'foo' is expanded. If 'fn' uses the parsing location and the
+intent is to use the location of the assignment, you want 'foo := $(fn)'
+instead, which calls the function immediately.
+
+Once defined, user functions can be called from Kconfig in the same way as
+other preprocessor functions:
+
+    config FOO
+        ...
+        depends on $(my-fn,arg1,arg2)
+
+If my_fn() returns "n", this will result in
+
+    config FOO
+        ...
+        depends on n
+
+Warning
+*******
+
+User-defined preprocessor functions are called as they're encountered at parse
+time, before all Kconfig files have been processed, and before the menu tree
+has been finalized. There are no guarantees that accessing Kconfig symbols or
+the menu tree via the 'kconf' parameter will work, and it could potentially
+lead to a crash.
+
+Preferably, user-defined functions should be stateless.
+
+
+Feedback
+========
+
+Send bug reports, suggestions, and questions to ulfalizer a.t Google's email
+service, or open a ticket on the GitHub page.
+"""
+import errno
+import importlib
+import os
+import re
+import sys
+
+# Get rid of some attribute lookups. These are obvious in context.
+from glob import iglob
+from os.path import dirname, exists, expandvars, islink, join, realpath
+
+
+VERSION = (14, 1, 0)
+
+
+# File layout:
+#
+# Public classes
+# Public functions
+# Internal functions
+# Global constants
+
+# Line length: 79 columns
+
+
+#
+# Public classes
+#
+
+
+class Kconfig(object):
+    """
+    Represents a Kconfig configuration, e.g. for x86 or ARM. This is the set of
+    symbols, choices, and menu nodes appearing in the configuration. Creating
+    any number of Kconfig objects (including for different architectures) is
+    safe. Kconfiglib doesn't keep any global state.
+
+    The following attributes are available. They should be treated as
+    read-only, and some are implemented through @property magic.
+
+    syms:
+      A dictionary with all symbols in the configuration, indexed by name. Also
+      includes all symbols that are referenced in expressions but never
+      defined, except for constant (quoted) symbols.
+
+      Undefined symbols can be recognized by Symbol.nodes being empty -- see
+      the 'Intro to the menu tree' section in the module docstring.
+
+    const_syms:
+      A dictionary like 'syms' for constant (quoted) symbols
+
+    named_choices:
+      A dictionary like 'syms' for named choices (choice FOO)
+
+    defined_syms:
+      A list with all defined symbols, in the same order as they appear in the
+      Kconfig files. Symbols defined in multiple locations appear multiple
+      times.
+
+      Note: You probably want to use 'unique_defined_syms' instead. This
+      attribute is mostly maintained for backwards compatibility.
+
+    unique_defined_syms:
+      A list like 'defined_syms', but with duplicates removed. Just the first
+      instance is kept for symbols defined in multiple locations. Kconfig order
+      is preserved otherwise.
+
+      Using this attribute instead of 'defined_syms' can save work, and
+      automatically gives reasonable behavior when writing configuration output
+      (symbols defined in multiple locations only generate output once, while
+      still preserving Kconfig order for readability).
+
+    choices:
+      A list with all choices, in the same order as they appear in the Kconfig
+      files.
+
+      Note: You probably want to use 'unique_choices' instead. This attribute
+      is mostly maintained for backwards compatibility.
+
+    unique_choices:
+      Analogous to 'unique_defined_syms', for choices. Named choices can have
+      multiple definition locations.
+
+    menus:
+      A list with all menus, in the same order as they appear in the Kconfig
+      files
+
+    comments:
+      A list with all comments, in the same order as they appear in the Kconfig
+      files
+
+    kconfig_filenames:
+      A list with the filenames of all Kconfig files included in the
+      configuration, relative to $srctree (or relative to the current directory
+      if $srctree isn't set), except absolute paths (e.g.
+      'source "/foo/Kconfig"') are kept as-is.
+
+      The files are listed in the order they are source'd, starting with the
+      top-level Kconfig file. If a file is source'd multiple times, it will
+      appear multiple times. Use set() to get unique filenames.
+
+      Note that Kconfig.sync_deps() already indirectly catches any file
+      modifications that change configuration output.
+
+    env_vars:
+      A set() with the names of all environment variables referenced in the
+      Kconfig files.
+
+      Only environment variables referenced with the preprocessor $(FOO) syntax
+      will be registered. The older $FOO syntax is only supported for backwards
+      compatibility.
+
+      Also note that $(FOO) won't be registered unless the environment variable
+      $FOO is actually set. If it isn't, $(FOO) is an expansion of an unset
+      preprocessor variable (which gives the empty string).
+
+      Another gotcha is that environment variables referenced in the values of
+      recursively expanded preprocessor variables (those defined with =) will
+      only be registered if the variable is actually used (expanded) somewhere.
+
+      The note from the 'kconfig_filenames' documentation applies here too.
+
+    n/m/y:
+      The predefined constant symbols n/m/y. Also available in const_syms.
+
+    modules:
+      The Symbol instance for the modules symbol. Currently hardcoded to
+      MODULES, which is backwards compatible. Kconfiglib will warn if
+      'option modules' is set on some other symbol. Tell me if you need proper
+      'option modules' support.
+
+      'modules' is never None. If the MODULES symbol is not explicitly defined,
+      its tri_value will be 0 (n), as expected.
+
+      A simple way to enable modules is to do 'kconf.modules.set_value(2)'
+      (provided the MODULES symbol is defined and visible). Modules are
+      disabled by default in the kernel Kconfig files as of writing, though
+      nearly all defconfig files enable them (with 'CONFIG_MODULES=y').
+
+    defconfig_list:
+      The Symbol instance for the 'option defconfig_list' symbol, or None if no
+      defconfig_list symbol exists. The defconfig filename derived from this
+      symbol can be found in Kconfig.defconfig_filename.
+
+    defconfig_filename:
+      The filename given by the defconfig_list symbol. This is taken from the
+      first 'default' with a satisfied condition where the specified file
+      exists (can be opened for reading). If a defconfig file foo/defconfig is
+      not found and $srctree was set when the Kconfig was created,
+      $srctree/foo/defconfig is looked up as well.
+
+      'defconfig_filename' is None if either no defconfig_list symbol exists,
+      or if the defconfig_list symbol has no 'default' with a satisfied
+      condition that specifies a file that exists.
+
+      Gotcha: scripts/kconfig/Makefile might pass --defconfig=<defconfig> to
+      scripts/kconfig/conf when running e.g. 'make defconfig'. This option
+      overrides the defconfig_list symbol, meaning defconfig_filename might not
+      always match what 'make defconfig' would use.
+
+    top_node:
+      The menu node (see the MenuNode class) of the implicit top-level menu.
+      Acts as the root of the menu tree.
+
+    mainmenu_text:
+      The prompt (title) of the top menu (top_node). Defaults to "Main menu".
+      Can be changed with the 'mainmenu' statement (see kconfig-language.txt).
+
+    variables:
+      A dictionary with all preprocessor variables, indexed by name. See the
+      Variable class.
+
+    warn:
+      Set this variable to True/False to enable/disable warnings. See
+      Kconfig.__init__().
+
+      When 'warn' is False, the values of the other warning-related variables
+      are ignored.
+
+      This variable as well as the other warn* variables can be read to check
+      the current warning settings.
+
+    warn_to_stderr:
+      Set this variable to True/False to enable/disable warnings on stderr. See
+      Kconfig.__init__().
+
+    warn_assign_undef:
+      Set this variable to True to generate warnings for assignments to
+      undefined symbols in configuration files.
+
+      This variable is False by default unless the KCONFIG_WARN_UNDEF_ASSIGN
+      environment variable was set to 'y' when the Kconfig instance was
+      created.
+
+    warn_assign_override:
+      Set this variable to True to generate warnings for multiple assignments
+      to the same symbol in configuration files, where the assignments set
+      different values (e.g. CONFIG_FOO=m followed by CONFIG_FOO=y, where the
+      last value would get used).
+
+      This variable is True by default. Disabling it might be useful when
+      merging configurations.
+
+    warn_assign_redun:
+      Like warn_assign_override, but for multiple assignments setting a symbol
+      to the same value.
+
+      This variable is True by default. Disabling it might be useful when
+      merging configurations.
+
+    warnings:
+      A list of strings containing all warnings that have been generated, for
+      cases where more flexibility is needed.
+
+      See the 'warn_to_stderr' parameter to Kconfig.__init__() and the
+      Kconfig.warn_to_stderr variable as well. Note that warnings still get
+      added to Kconfig.warnings when 'warn_to_stderr' is True.
+
+      Just as for warnings printed to stderr, only warnings that are enabled
+      will get added to Kconfig.warnings. See the various Kconfig.warn*
+      variables.
+
+    missing_syms:
+      A list with (name, value) tuples for all assignments to undefined symbols
+      within the most recently loaded .config file(s). 'name' is the symbol
+      name without the 'CONFIG_' prefix. 'value' is a string that gives the
+      right-hand side of the assignment verbatim.
+
+      See Kconfig.load_config() as well.
+
+    srctree:
+      The value the $srctree environment variable had when the Kconfig instance
+      was created, or the empty string if $srctree wasn't set. This gives nice
+      behavior with os.path.join(), which treats "" as the current directory,
+      without adding "./".
+
+      Kconfig files are looked up relative to $srctree (unless absolute paths
+      are used), and .config files are looked up relative to $srctree if they
+      are not found in the current directory. This is used to support
+      out-of-tree builds. The C tools use this environment variable in the same
+      way.
+
+      Changing $srctree after creating the Kconfig instance has no effect. Only
+      the value when the configuration is loaded matters. This avoids surprises
+      if multiple configurations are loaded with different values for $srctree.
+
+    config_prefix:
+      The value the CONFIG_ environment variable had when the Kconfig instance
+      was created, or "CONFIG_" if CONFIG_ wasn't set. This is the prefix used
+      (and expected) on symbol names in .config files and C headers. Used in
+      the same way in the C tools.
+
+    config_header:
+      The value the KCONFIG_CONFIG_HEADER environment variable had when the
+      Kconfig instance was created, or the empty string if
+      KCONFIG_CONFIG_HEADER wasn't set. This string is inserted verbatim at the
+      beginning of configuration files. See write_config().
+
+    header_header:
+      The value the KCONFIG_AUTOHEADER_HEADER environment variable had when the
+      Kconfig instance was created, or the empty string if
+      KCONFIG_AUTOHEADER_HEADER wasn't set. This string is inserted verbatim at
+      the beginning of header files. See write_autoconf().
+
+    filename/linenr:
+      The current parsing location, for use in Python preprocessor functions.
+      See the module docstring.
+    """
+    __slots__ = (
+        "_encoding",
+        "_functions",
+        "_set_match",
+        "_srctree_prefix",
+        "_unset_match",
+        "_warn_assign_no_prompt",
+        "choices",
+        "comments",
+        "config_header",
+        "config_prefix",
+        "const_syms",
+        "defconfig_list",
+        "defined_syms",
+        "env_vars",
+        "header_header",
+        "kconfig_filenames",
+        "m",
+        "menus",
+        "missing_syms",
+        "modules",
+        "n",
+        "named_choices",
+        "srctree",
+        "syms",
+        "top_node",
+        "unique_choices",
+        "unique_defined_syms",
+        "variables",
+        "warn",
+        "warn_assign_override",
+        "warn_assign_redun",
+        "warn_assign_undef",
+        "warn_to_stderr",
+        "warnings",
+        "y",
+
+        # Parsing-related
+        "_parsing_kconfigs",
+        "_readline",
+        "filename",
+        "linenr",
+        "_include_path",
+        "_filestack",
+        "_line",
+        "_tokens",
+        "_tokens_i",
+        "_reuse_tokens",
+    )
+
+    #
+    # Public interface
+    #
+
+    def __init__(self, filename="Kconfig", warn=True, warn_to_stderr=True,
+                 encoding="utf-8", suppress_traceback=False):
+        """
+        Creates a new Kconfig object by parsing Kconfig files.
+        Note that Kconfig files are not the same as .config files (which store
+        configuration symbol values).
+
+        See the module docstring for some environment variables that influence
+        default warning settings (KCONFIG_WARN_UNDEF and
+        KCONFIG_WARN_UNDEF_ASSIGN).
+
+        Raises KconfigError on syntax/semantic errors, and OSError or (possibly
+        a subclass of) IOError on IO errors ('errno', 'strerror', and
+        'filename' are available). Note that IOError is an alias for OSError on
+        Python 3, so it's enough to catch OSError there. If you need Python 2/3
+        compatibility, it's easiest to catch EnvironmentError, which is a
+        common base class of OSError/IOError on Python 2 and an alias for
+        OSError on Python 3.
+
+        filename (default: "Kconfig"):
+          The Kconfig file to load. For the Linux kernel, you'll want "Kconfig"
+          from the top-level directory, as environment variables will make sure
+          the right Kconfig is included from there (arch/$SRCARCH/Kconfig as of
+          writing).
+
+          If $srctree is set, 'filename' will be looked up relative to it.
+          $srctree is also used to look up source'd files within Kconfig files.
+          See the class documentation.
+
+          If you are using Kconfiglib via 'make scriptconfig', the filename of
+          the base base Kconfig file will be in sys.argv[1]. It's currently
+          always "Kconfig" in practice.
+
+        warn (default: True):
+          True if warnings related to this configuration should be generated.
+          This can be changed later by setting Kconfig.warn to True/False. It
+          is provided as a constructor argument since warnings might be
+          generated during parsing.
+
+          See the other Kconfig.warn_* variables as well, which enable or
+          suppress certain warnings when warnings are enabled.
+
+          All generated warnings are added to the Kconfig.warnings list. See
+          the class documentation.
+
+        warn_to_stderr (default: True):
+          True if warnings should be printed to stderr in addition to being
+          added to Kconfig.warnings.
+
+          This can be changed later by setting Kconfig.warn_to_stderr to
+          True/False.
+
+        encoding (default: "utf-8"):
+          The encoding to use when reading and writing files, and when decoding
+          output from commands run via $(shell). If None, the encoding
+          specified in the current locale will be used.
+
+          The "utf-8" default avoids exceptions on systems that are configured
+          to use the C locale, which implies an ASCII encoding.
+
+          This parameter has no effect on Python 2, due to implementation
+          issues (regular strings turning into Unicode strings, which are
+          distinct in Python 2). Python 2 doesn't decode regular strings
+          anyway.
+
+          Related PEP: https://www.python.org/dev/peps/pep-0538/
+
+        suppress_traceback (default: False):
+          Helper for tools. When True, any EnvironmentError or KconfigError
+          generated during parsing is caught, the exception message is printed
+          to stderr together with the command name, and sys.exit(1) is called
+          (which generates SystemExit).
+
+          This hides the Python traceback for "expected" errors like syntax
+          errors in Kconfig files.
+
+          Other exceptions besides EnvironmentError and KconfigError are still
+          propagated when suppress_traceback is True.
+        """
+        try:
+            self._init(filename, warn, warn_to_stderr, encoding)
+        except (EnvironmentError, KconfigError) as e:
+            if suppress_traceback:
+                cmd = sys.argv[0]  # Empty string if missing
+                if cmd:
+                    cmd += ": "
+                # Some long exception messages have extra newlines for better
+                # formatting when reported as an unhandled exception. Strip
+                # them here.
+                sys.exit(cmd + str(e).strip())
+            raise
+
+    def _init(self, filename, warn, warn_to_stderr, encoding):
+        # See __init__()
+
+        self._encoding = encoding
+
+        self.srctree = os.getenv("srctree", "")
+        # A prefix we can reliably strip from glob() results to get a filename
+        # relative to $srctree. relpath() can cause issues for symlinks,
+        # because it assumes symlink/../foo is the same as foo/.
+        self._srctree_prefix = realpath(self.srctree) + os.sep
+
+        self.warn = warn
+        self.warn_to_stderr = warn_to_stderr
+        self.warn_assign_undef = os.getenv("KCONFIG_WARN_UNDEF_ASSIGN") == "y"
+        self.warn_assign_override = True
+        self.warn_assign_redun = True
+        self._warn_assign_no_prompt = True
+
+        self.warnings = []
+
+        self.config_prefix = os.getenv("CONFIG_", "CONFIG_")
+        # Regular expressions for parsing .config files
+        self._set_match = _re_match(self.config_prefix + r"([^=]+)=(.*)")
+        self._unset_match = _re_match(r"# {}([^ ]+) is not set".format(
+            self.config_prefix))
+
+        self.config_header = os.getenv("KCONFIG_CONFIG_HEADER", "")
+        self.header_header = os.getenv("KCONFIG_AUTOHEADER_HEADER", "")
+
+        self.syms = {}
+        self.const_syms = {}
+        self.defined_syms = []
+        self.missing_syms = []
+        self.named_choices = {}
+        self.choices = []
+        self.menus = []
+        self.comments = []
+
+        for nmy in "n", "m", "y":
+            sym = Symbol()
+            sym.kconfig = self
+            sym.name = nmy
+            sym.is_constant = True
+            sym.orig_type = TRISTATE
+            sym._cached_tri_val = STR_TO_TRI[nmy]
+
+            self.const_syms[nmy] = sym
+
+        self.n = self.const_syms["n"]
+        self.m = self.const_syms["m"]
+        self.y = self.const_syms["y"]
+
+        # Make n/m/y well-formed symbols
+        for nmy in "n", "m", "y":
+            sym = self.const_syms[nmy]
+            sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n
+
+        # Maps preprocessor variables names to Variable instances
+        self.variables = {}
+
+        # Predefined preprocessor functions, with min/max number of arguments
+        self._functions = {
+            "info":       (_info_fn,       1, 1),
+            "error-if":   (_error_if_fn,   2, 2),
+            "filename":   (_filename_fn,   0, 0),
+            "lineno":     (_lineno_fn,     0, 0),
+            "shell":      (_shell_fn,      1, 1),
+            "warning-if": (_warning_if_fn, 2, 2),
+        }
+
+        # Add any user-defined preprocessor functions
+        try:
+            self._functions.update(
+                importlib.import_module(
+                    os.getenv("KCONFIG_FUNCTIONS", "kconfigfunctions")
+                ).functions)
+        except ImportError:
+            pass
+
+        # This determines whether previously unseen symbols are registered.
+        # They shouldn't be if we parse expressions after parsing, as part of
+        # Kconfig.eval_string().
+        self._parsing_kconfigs = True
+
+        self.modules = self._lookup_sym("MODULES")
+        self.defconfig_list = None
+
+        self.top_node = MenuNode()
+        self.top_node.kconfig = self
+        self.top_node.item = MENU
+        self.top_node.is_menuconfig = True
+        self.top_node.visibility = self.y
+        self.top_node.prompt = ("Main menu", self.y)
+        self.top_node.parent = None
+        self.top_node.dep = self.y
+        self.top_node.filename = filename
+        self.top_node.linenr = 1
+        self.top_node.include_path = ()
+
+        # Parse the Kconfig files
+
+        # Not used internally. Provided as a convenience.
+        self.kconfig_filenames = [filename]
+        self.env_vars = set()
+
+        # Keeps track of the location in the parent Kconfig files. Kconfig
+        # files usually source other Kconfig files. See _enter_file().
+        self._filestack = []
+        self._include_path = ()
+
+        # The current parsing location
+        self.filename = filename
+        self.linenr = 0
+
+        # Used to avoid retokenizing lines when we discover that they're not
+        # part of the construct currently being parsed. This is kinda like an
+        # unget operation.
+        self._reuse_tokens = False
+
+        # Open the top-level Kconfig file. Store the readline() method directly
+        # as a small optimization.
+        self._readline = self._open(join(self.srctree, filename), "r").readline
+
+        try:
+            # Parse the Kconfig files. Returns the last node, which we
+            # terminate with '.next = None'.
+            self._parse_block(None, self.top_node, self.top_node).next = None
+            self.top_node.list = self.top_node.next
+            self.top_node.next = None
+        except UnicodeDecodeError as e:
+            _decoding_error(e, self.filename)
+
+        # Close the top-level Kconfig file. __self__ fetches the 'file' object
+        # for the method.
+        self._readline.__self__.close()
+
+        self._parsing_kconfigs = False
+
+        # Do various menu tree post-processing
+        self._finalize_node(self.top_node, self.y)
+
+        self.unique_defined_syms = _ordered_unique(self.defined_syms)
+        self.unique_choices = _ordered_unique(self.choices)
+
+        # Do sanity checks. Some of these depend on everything being finalized.
+        self._check_sym_sanity()
+        self._check_choice_sanity()
+
+        # KCONFIG_STRICT is an older alias for KCONFIG_WARN_UNDEF, supported
+        # for backwards compatibility
+        if os.getenv("KCONFIG_WARN_UNDEF") == "y" or \
+           os.getenv("KCONFIG_STRICT") == "y":
+
+            self._check_undef_syms()
+
+        # Build Symbol._dependents for all symbols and choices
+        self._build_dep()
+
+        # Check for dependency loops
+        check_dep_loop_sym = _check_dep_loop_sym  # Micro-optimization
+        for sym in self.unique_defined_syms:
+            check_dep_loop_sym(sym, False)
+
+        # Add extra dependencies from choices to choice symbols that get
+        # awkward during dependency loop detection
+        self._add_choice_deps()
+
+    @property
+    def mainmenu_text(self):
+        """
+        See the class documentation.
+        """
+        return self.top_node.prompt[0]
+
+    @property
+    def defconfig_filename(self):
+        """
+        See the class documentation.
+        """
+        if self.defconfig_list:
+            for filename, cond in self.defconfig_list.defaults:
+                if expr_value(cond):
+                    try:
+                        with self._open_config(filename.str_value) as f:
+                            return f.name
+                    except EnvironmentError:
+                        continue
+
+        return None
+
+    def load_config(self, filename=None, replace=True, verbose=None):
+        """
+        Loads symbol values from a file in the .config format. Equivalent to
+        calling Symbol.set_value() to set each of the values.
+
+        "# CONFIG_FOO is not set" within a .config file sets the user value of
+        FOO to n. The C tools work the same way.
+
+        For each symbol, the Symbol.user_value attribute holds the value the
+        symbol was assigned in the .config file (if any). The user value might
+        differ from Symbol.str/tri_value if there are unsatisfied dependencies.
+
+        Calling this function also updates the Kconfig.missing_syms attribute
+        with a list of all assignments to undefined symbols within the
+        configuration file. Kconfig.missing_syms is cleared if 'replace' is
+        True, and appended to otherwise. See the documentation for
+        Kconfig.missing_syms as well.
+
+        See the Kconfig.__init__() docstring for raised exceptions
+        (OSError/IOError). KconfigError is never raised here.
+
+        filename (default: None):
+          Path to load configuration from (a string). Respects $srctree if set
+          (see the class documentation).
+
+          If 'filename' is None (the default), the configuration file to load
+          (if any) is calculated automatically, giving the behavior you'd
+          usually want:
+
+            1. If the KCONFIG_CONFIG environment variable is set, it gives the
+               path to the configuration file to load. Otherwise, ".config" is
+               used. See standard_config_filename().
+
+            2. If the path from (1.) doesn't exist, the configuration file
+               given by kconf.defconfig_filename is loaded instead, which is
+               derived from the 'option defconfig_list' symbol.
+
+            3. If (1.) and (2.) fail to find a configuration file to load, no
+               configuration file is loaded, and symbols retain their current
+               values (e.g., their default values). This is not an error.
+
+           See the return value as well.
+
+        replace (default: True):
+          If True, all existing user values will be cleared before loading the
+          .config. Pass False to merge configurations.
+
+        verbose (default: None):
+          Limited backwards compatibility to prevent crashes. A warning is
+          printed if anything but None is passed.
+
+          Prior to Kconfiglib 12.0.0, this option enabled printing of messages
+          to stdout when 'filename' was None. A message is (always) returned
+          now instead, which is more flexible.
+
+          Will probably be removed in some future version.
+
+        Returns a string with a message saying which file got loaded (or
+        possibly that no file got loaded, when 'filename' is None). This is
+        meant to reduce boilerplate in tools, which can do e.g.
+        print(kconf.load_config()). The returned message distinguishes between
+        loading (replace == True) and merging (replace == False).
+        """
+        if verbose is not None:
+            _warn_verbose_deprecated("load_config")
+
+        msg = None
+        if filename is None:
+            filename = standard_config_filename()
+            if not exists(filename) and \
+               not exists(join(self.srctree, filename)):
+                defconfig = self.defconfig_filename
+                if defconfig is None:
+                    return "Using default symbol values (no '{}')" \
+                           .format(filename)
+
+                msg = " default configuration '{}' (no '{}')" \
+                      .format(defconfig, filename)
+                filename = defconfig
+
+        if not msg:
+            msg = " configuration '{}'".format(filename)
+
+        # Disable the warning about assigning to symbols without prompts. This
+        # is normal and expected within a .config file.
+        self._warn_assign_no_prompt = False
+
+        # This stub only exists to make sure _warn_assign_no_prompt gets
+        # reenabled
+        try:
+            self._load_config(filename, replace)
+        except UnicodeDecodeError as e:
+            _decoding_error(e, filename)
+        finally:
+            self._warn_assign_no_prompt = True
+
+        return ("Loaded" if replace else "Merged") + msg
+
+    def _load_config(self, filename, replace):
+        with self._open_config(filename) as f:
+            if replace:
+                self.missing_syms = []
+
+                # If we're replacing the configuration, keep track of which
+                # symbols and choices got set so that we can unset the rest
+                # later. This avoids invalidating everything and is faster.
+                # Another benefit is that invalidation must be rock solid for
+                # it to work, making it a good test.
+
+                for sym in self.unique_defined_syms:
+                    sym._was_set = False
+
+                for choice in self.unique_choices:
+                    choice._was_set = False
+
+            # Small optimizations
+            set_match = self._set_match
+            unset_match = self._unset_match
+            get_sym = self.syms.get
+
+            for linenr, line in enumerate(f, 1):
+                # The C tools ignore trailing whitespace
+                line = line.rstrip()
+
+                match = set_match(line)
+                if match:
+                    name, val = match.groups()
+                    sym = get_sym(name)
+                    if not sym or not sym.nodes:
+                        self._undef_assign(name, val, filename, linenr)
+                        continue
+
+                    if sym.orig_type in _BOOL_TRISTATE:
+                        # The C implementation only checks the first character
+                        # to the right of '=', for whatever reason
+                        if not (sym.orig_type is BOOL
+                                and val.startswith(("y", "n")) or
+                                sym.orig_type is TRISTATE
+                                and val.startswith(("y", "m", "n"))):
+                            self._warn("'{}' is not a valid value for the {} "
+                                       "symbol {}. Assignment ignored."
+                                       .format(val, TYPE_TO_STR[sym.orig_type],
+                                               sym.name_and_loc),
+                                       filename, linenr)
+                            continue
+
+                        val = val[0]
+
+                        if sym.choice and val != "n":
+                            # During .config loading, we infer the mode of the
+                            # choice from the kind of values that are assigned
+                            # to the choice symbols
+
+                            prev_mode = sym.choice.user_value
+                            if prev_mode is not None and \
+                               TRI_TO_STR[prev_mode] != val:
+
+                                self._warn("both m and y assigned to symbols "
+                                           "within the same choice",
+                                           filename, linenr)
+
+                            # Set the choice's mode
+                            sym.choice.set_value(val)
+
+                    elif sym.orig_type is STRING:
+                        match = _conf_string_match(val)
+                        if not match:
+                            self._warn("malformed string literal in "
+                                       "assignment to {}. Assignment ignored."
+                                       .format(sym.name_and_loc),
+                                       filename, linenr)
+                            continue
+
+                        val = unescape(match.group(1))
+
+                else:
+                    match = unset_match(line)
+                    if not match:
+                        # Print a warning for lines that match neither
+                        # set_match() nor unset_match() and that are not blank
+                        # lines or comments. 'line' has already been
+                        # rstrip()'d, so blank lines show up as "" here.
+                        if line and not line.lstrip().startswith("#"):
+                            self._warn("ignoring malformed line '{}'"
+                                       .format(line),
+                                       filename, linenr)
+
+                        continue
+
+                    name = match.group(1)
+                    sym = get_sym(name)
+                    if not sym or not sym.nodes:
+                        self._undef_assign(name, "n", filename, linenr)
+                        continue
+
+                    if sym.orig_type not in _BOOL_TRISTATE:
+                        continue
+
+                    val = "n"
+
+                # Done parsing the assignment. Set the value.
+
+                if sym._was_set:
+                    self._assigned_twice(sym, val, filename, linenr)
+
+                sym.set_value(val)
+
+        if replace:
+            # If we're replacing the configuration, unset the symbols that
+            # didn't get set
+
+            for sym in self.unique_defined_syms:
+                if not sym._was_set:
+                    sym.unset_value()
+
+            for choice in self.unique_choices:
+                if not choice._was_set:
+                    choice.unset_value()
+
+    def _undef_assign(self, name, val, filename, linenr):
+        # Called for assignments to undefined symbols during .config loading
+
+        self.missing_syms.append((name, val))
+        if self.warn_assign_undef:
+            self._warn(
+                "attempt to assign the value '{}' to the undefined symbol {}"
+                .format(val, name), filename, linenr)
+
+    def _assigned_twice(self, sym, new_val, filename, linenr):
+        # Called when a symbol is assigned more than once in a .config file
+
+        # Use strings for bool/tristate user values in the warning
+        if sym.orig_type in _BOOL_TRISTATE:
+            user_val = TRI_TO_STR[sym.user_value]
+        else:
+            user_val = sym.user_value
+
+        msg = '{} set more than once. Old value "{}", new value "{}".'.format(
+            sym.name_and_loc, user_val, new_val)
+
+        if user_val == new_val:
+            if self.warn_assign_redun:
+                self._warn(msg, filename, linenr)
+        elif self.warn_assign_override:
+            self._warn(msg, filename, linenr)
+
+    def load_allconfig(self, filename):
+        """
+        Helper for all*config. Loads (merges) the configuration file specified
+        by KCONFIG_ALLCONFIG, if any. See Documentation/kbuild/kconfig.txt in
+        the Linux kernel.
+
+        Disables warnings for duplicated assignments within configuration files
+        for the duration of the call
+        (kconf.warn_assign_override/warn_assign_redun = False), and restores
+        the previous warning settings at the end. The KCONFIG_ALLCONFIG
+        configuration file is expected to override symbols.
+
+        Exits with sys.exit() (which raises a SystemExit exception) and prints
+        an error to stderr if KCONFIG_ALLCONFIG is set but the configuration
+        file can't be opened.
+
+        filename:
+          Command-specific configuration filename - "allyes.config",
+          "allno.config", etc.
+        """
+        load_allconfig(self, filename)
+
+    def write_autoconf(self, filename=None, header=None):
+        r"""
+        Writes out symbol values as a C header file, matching the format used
+        by include/generated/autoconf.h in the kernel.
+
+        The ordering of the #defines matches the one generated by
+        write_config(). The order in the C implementation depends on the hash
+        table implementation as of writing, and so won't match.
+
+        If 'filename' exists and its contents is identical to what would get
+        written out, it is left untouched. This avoids updating file metadata
+        like the modification time and possibly triggering redundant work in
+        build tools.
+
+        filename (default: None):
+          Path to write header to.
+
+          If None (the default), the path in the environment variable
+          KCONFIG_AUTOHEADER is used if set, and "include/generated/autoconf.h"
+          otherwise. This is compatible with the C tools.
+
+        header (default: None):
+          Text inserted verbatim at the beginning of the file. You would
+          usually want it enclosed in '/* */' to make it a C comment, and
+          include a trailing newline.
+
+          If None (the default), the value of the environment variable
+          KCONFIG_AUTOHEADER_HEADER had when the Kconfig instance was created
+          will be used if it was set, and no header otherwise. See the
+          Kconfig.header_header attribute.
+
+        Returns a string with a message saying that the header got saved, or
+        that there were no changes to it. This is meant to reduce boilerplate
+        in tools, which can do e.g. print(kconf.write_autoconf()).
+        """
+        if filename is None:
+            filename = os.getenv("KCONFIG_AUTOHEADER",
+                                 "include/generated/autoconf.h")
+
+        if self._write_if_changed(filename, self._autoconf_contents(header)):
+            return "Kconfig header saved to '{}'".format(filename)
+        return "No change to Kconfig header in '{}'".format(filename)
+
+    def _autoconf_contents(self, header):
+        # write_autoconf() helper. Returns the contents to write as a string,
+        # with 'header' or KCONFIG_AUTOHEADER_HEADER at the beginning.
+
+        if header is None:
+            header = self.header_header
+
+        chunks = [header]  # "".join()ed later
+        add = chunks.append
+
+        for sym in self.unique_defined_syms:
+            # _write_to_conf is determined when the value is calculated. This
+            # is a hidden function call due to property magic.
+            #
+            # Note: In client code, you can check if sym.config_string is empty
+            # instead, to avoid accessing the internal _write_to_conf variable
+            # (though it's likely to keep working).
+            val = sym.str_value
+            if not sym._write_to_conf:
+                continue
+
+            if sym.orig_type in _BOOL_TRISTATE:
+                if val == "y":
+                    add("#define {}{} 1\n"
+                        .format(self.config_prefix, sym.name))
+                elif val == "m":
+                    add("#define {}{}_MODULE 1\n"
+                        .format(self.config_prefix, sym.name))
+
+            elif sym.orig_type is STRING:
+                add('#define {}{} "{}"\n'
+                    .format(self.config_prefix, sym.name, escape(val)))
+
+            else:  # sym.orig_type in _INT_HEX:
+                if sym.orig_type is HEX and \
+                   not val.startswith(("0x", "0X")):
+                    val = "0x" + val
+
+                add("#define {}{} {}\n"
+                    .format(self.config_prefix, sym.name, val))
+
+        return "".join(chunks)
+
+    def write_config(self, filename=None, header=None, save_old=True,
+                     verbose=None):
+        r"""
+        Writes out symbol values in the .config format. The format matches the
+        C implementation, including ordering.
+
+        Symbols appear in the same order in generated .config files as they do
+        in the Kconfig files. For symbols defined in multiple locations, a
+        single assignment is written out corresponding to the first location
+        where the symbol is defined.
+
+        See the 'Intro to symbol values' section in the module docstring to
+        understand which symbols get written out.
+
+        If 'filename' exists and its contents is identical to what would get
+        written out, it is left untouched. This avoids updating file metadata
+        like the modification time and possibly triggering redundant work in
+        build tools.
+
+        See the Kconfig.__init__() docstring for raised exceptions
+        (OSError/IOError). KconfigError is never raised here.
+
+        filename (default: None):
+          Path to write configuration to (a string).
+
+          If None (the default), the path in the environment variable
+          KCONFIG_CONFIG is used if set, and ".config" otherwise. See
+          standard_config_filename().
+
+        header (default: None):
+          Text inserted verbatim at the beginning of the file. You would
+          usually want each line to start with '#' to make it a comment, and
+          include a trailing newline.
+
+          if None (the default), the value of the environment variable
+          KCONFIG_CONFIG_HEADER had when the Kconfig instance was created will
+          be used if it was set, and no header otherwise. See the
+          Kconfig.config_header attribute.
+
+        save_old (default: True):
+          If True and <filename> already exists, a copy of it will be saved to
+          <filename>.old in the same directory before the new configuration is
+          written.
+
+          Errors are silently ignored if <filename>.old cannot be written (e.g.
+          due to being a directory, or <filename> being something like
+          /dev/null).
+
+        verbose (default: None):
+          Limited backwards compatibility to prevent crashes. A warning is
+          printed if anything but None is passed.
+
+          Prior to Kconfiglib 12.0.0, this option enabled printing of messages
+          to stdout when 'filename' was None. A message is (always) returned
+          now instead, which is more flexible.
+
+          Will probably be removed in some future version.
+
+        Returns a string with a message saying which file got saved. This is
+        meant to reduce boilerplate in tools, which can do e.g.
+        print(kconf.write_config()).
+        """
+        if verbose is not None:
+            _warn_verbose_deprecated("write_config")
+
+        if filename is None:
+            filename = standard_config_filename()
+
+        contents = self._config_contents(header)
+        if self._contents_eq(filename, contents):
+            return "No change to configuration in '{}'".format(filename)
+
+        if save_old:
+            _save_old(filename)
+
+        with self._open(filename, "w") as f:
+            f.write(contents)
+
+        return "Configuration saved to '{}'".format(filename)
+
+    def _config_contents(self, header):
+        # write_config() helper. Returns the contents to write as a string,
+        # with 'header' or KCONFIG_CONFIG_HEADER at the beginning.
+        #
+        # More memory friendly would be to 'yield' the strings and
+        # "".join(_config_contents()), but it was a bit slower on my system.
+
+        # node_iter() was used here before commit 3aea9f7 ("Add '# end of
+        # <menu>' after menus in .config"). Those comments get tricky to
+        # implement with it.
+
+        for sym in self.unique_defined_syms:
+            sym._visited = False
+
+        if header is None:
+            header = self.config_header
+
+        chunks = [header]  # "".join()ed later
+        add = chunks.append
+
+        # Did we just print an '# end of ...' comment?
+        after_end_comment = False
+
+        node = self.top_node
+        while 1:
+            # Jump to the next node with an iterative tree walk
+            if node.list:
+                node = node.list
+            elif node.next:
+                node = node.next
+            else:
+                while node.parent:
+                    node = node.parent
+
+                    # Add a comment when leaving visible menus
+                    if node.item is MENU and expr_value(node.dep) and \
+                       expr_value(node.visibility) and \
+                       node is not self.top_node:
+                        add("# end of {}\n".format(node.prompt[0]))
+                        after_end_comment = True
+
+                    if node.next:
+                        node = node.next
+                        break
+                else:
+                    # No more nodes
+                    return "".join(chunks)
+
+            # Generate configuration output for the node
+
+            item = node.item
+
+            if item.__class__ is Symbol:
+                if item._visited:
+                    continue
+                item._visited = True
+
+                conf_string = item.config_string
+                if not conf_string:
+                    continue
+
+                if after_end_comment:
+                    # Add a blank line before the first symbol printed after an
+                    # '# end of ...' comment
+                    after_end_comment = False
+                    add("\n")
+                add(conf_string)
+
+            elif expr_value(node.dep) and \
+                 ((item is MENU and expr_value(node.visibility)) or
+                  item is COMMENT):
+
+                add("\n#\n# {}\n#\n".format(node.prompt[0]))
+                after_end_comment = False
+
+    def write_min_config(self, filename, header=None):
+        """
+        Writes out a "minimal" configuration file, omitting symbols whose value
+        matches their default value. The format matches the one produced by
+        'make savedefconfig'.
+
+        The resulting configuration file is incomplete, but a complete
+        configuration can be derived from it by loading it. Minimal
+        configuration files can serve as a more manageable configuration format
+        compared to a "full" .config file, especially when configurations files
+        are merged or edited by hand.
+
+        See the Kconfig.__init__() docstring for raised exceptions
+        (OSError/IOError). KconfigError is never raised here.
+
+        filename:
+          Path to write minimal configuration to.
+
+        header (default: None):
+          Text inserted verbatim at the beginning of the file. You would
+          usually want each line to start with '#' to make it a comment, and
+          include a final terminating newline.
+
+          if None (the default), the value of the environment variable
+          KCONFIG_CONFIG_HEADER had when the Kconfig instance was created will
+          be used if it was set, and no header otherwise. See the
+          Kconfig.config_header attribute.
+
+        Returns a string with a message saying the minimal configuration got
+        saved, or that there were no changes to it. This is meant to reduce
+        boilerplate in tools, which can do e.g.
+        print(kconf.write_min_config()).
+        """
+        if self._write_if_changed(filename, self._min_config_contents(header)):
+            return "Minimal configuration saved to '{}'".format(filename)
+        return "No change to minimal configuration in '{}'".format(filename)
+
+    def _min_config_contents(self, header):
+        # write_min_config() helper. Returns the contents to write as a string,
+        # with 'header' or KCONFIG_CONFIG_HEADER at the beginning.
+
+        if header is None:
+            header = self.config_header
+
+        chunks = [header]  # "".join()ed later
+        add = chunks.append
+
+        for sym in self.unique_defined_syms:
+            # Skip symbols that cannot be changed. Only check
+            # non-choice symbols, as selects don't affect choice
+            # symbols.
+            if not sym.choice and \
+               sym.visibility <= expr_value(sym.rev_dep):
+                continue
+
+            # Skip symbols whose value matches their default
+            if sym.str_value == sym._str_default():
+                continue
+
+            # Skip symbols that would be selected by default in a
+            # choice, unless the choice is optional or the symbol type
+            # isn't bool (it might be possible to set the choice mode
+            # to n or the symbol to m in those cases).
+            if sym.choice and \
+               not sym.choice.is_optional and \
+               sym.choice._selection_from_defaults() is sym and \
+               sym.orig_type is BOOL and \
+               sym.tri_value == 2:
+                continue
+
+            add(sym.config_string)
+
+        return "".join(chunks)
+
+    def sync_deps(self, path):
+        """
+        Creates or updates a directory structure that can be used to avoid
+        doing a full rebuild whenever the configuration is changed, mirroring
+        include/config/ in the kernel.
+
+        This function is intended to be called during each build, before
+        compiling source files that depend on configuration symbols.
+
+        See the Kconfig.__init__() docstring for raised exceptions
+        (OSError/IOError). KconfigError is never raised here.
+
+        path:
+          Path to directory
+
+        sync_deps(path) does the following:
+
+          1. If the directory <path> does not exist, it is created.
+
+          2. If <path>/auto.conf exists, old symbol values are loaded from it,
+             which are then compared against the current symbol values. If a
+             symbol has changed value (would generate different output in
+             autoconf.h compared to before), the change is signaled by
+             touch'ing a file corresponding to the symbol.
+
+             The first time sync_deps() is run on a directory, <path>/auto.conf
+             won't exist, and no old symbol values will be available. This
+             logically has the same effect as updating the entire
+             configuration.
+
+             The path to a symbol's file is calculated from the symbol's name
+             by replacing all '_' with '/' and appending '.h'. For example, the
+             symbol FOO_BAR_BAZ gets the file <path>/foo/bar/baz.h, and FOO
+             gets the file <path>/foo.h.
+
+             This scheme matches the C tools. The point is to avoid having a
+             single directory with a huge number of files, which the underlying
+             filesystem might not handle well.
+
+          3. A new auto.conf with the current symbol values is written, to keep
+             track of them for the next build.
+
+             If auto.conf exists and its contents is identical to what would
+             get written out, it is left untouched. This avoids updating file
+             metadata like the modification time and possibly triggering
+             redundant work in build tools.
+
+
+        The last piece of the puzzle is knowing what symbols each source file
+        depends on. Knowing that, dependencies can be added from source files
+        to the files corresponding to the symbols they depends on. The source
+        file will then get recompiled (only) when the symbol value changes
+        (provided sync_deps() is run first during each build).
+
+        The tool in the kernel that extracts symbol dependencies from source
+        files is scripts/basic/fixdep.c. Missing symbol files also correspond
+        to "not changed", which fixdep deals with by using the $(wildcard) Make
+        function when adding symbol prerequisites to source files.
+
+        In case you need a different scheme for your project, the sync_deps()
+        implementation can be used as a template.
+        """
+        if not exists(path):
+            os.mkdir(path, 0o755)
+
+        # Load old values from auto.conf, if any
+        self._load_old_vals(path)
+
+        for sym in self.unique_defined_syms:
+            # _write_to_conf is determined when the value is calculated. This
+            # is a hidden function call due to property magic.
+            #
+            # Note: In client code, you can check if sym.config_string is empty
+            # instead, to avoid accessing the internal _write_to_conf variable
+            # (though it's likely to keep working).
+            val = sym.str_value
+
+            # n tristate values do not get written to auto.conf and autoconf.h,
+            # making a missing symbol logically equivalent to n
+
+            if sym._write_to_conf:
+                if sym._old_val is None and \
+                   sym.orig_type in _BOOL_TRISTATE and \
+                   val == "n":
+                    # No old value (the symbol was missing or n), new value n.
+                    # No change.
+                    continue
+
+                if val == sym._old_val:
+                    # New value matches old. No change.
+                    continue
+
+            elif sym._old_val is None:
+                # The symbol wouldn't appear in autoconf.h (because
+                # _write_to_conf is false), and it wouldn't have appeared in
+                # autoconf.h previously either (because it didn't appear in
+                # auto.conf). No change.
+                continue
+
+            # 'sym' has a new value. Flag it.
+            _touch_dep_file(path, sym.name)
+
+        # Remember the current values as the "new old" values.
+        #
+        # This call could go anywhere after the call to _load_old_vals(), but
+        # putting it last means _sync_deps() can be safely rerun if it fails
+        # before this point.
+        self._write_old_vals(path)
+
+    def _load_old_vals(self, path):
+        # Loads old symbol values from auto.conf into a dedicated
+        # Symbol._old_val field. Mirrors load_config().
+        #
+        # The extra field could be avoided with some trickery involving dumping
+        # symbol values and restoring them later, but this is simpler and
+        # faster. The C tools also use a dedicated field for this purpose.
+
+        for sym in self.unique_defined_syms:
+            sym._old_val = None
+
+        try:
+            auto_conf = self._open(join(path, "auto.conf"), "r")
+        except EnvironmentError as e:
+            if e.errno == errno.ENOENT:
+                # No old values
+                return
+            raise
+
+        with auto_conf as f:
+            for line in f:
+                match = self._set_match(line)
+                if not match:
+                    # We only expect CONFIG_FOO=... (and possibly a header
+                    # comment) in auto.conf
+                    continue
+
+                name, val = match.groups()
+                if name in self.syms:
+                    sym = self.syms[name]
+
+                    if sym.orig_type is STRING:
+                        match = _conf_string_match(val)
+                        if not match:
+                            continue
+                        val = unescape(match.group(1))
+
+                    self.syms[name]._old_val = val
+                else:
+                    # Flag that the symbol no longer exists, in
+                    # case something still depends on it
+                    _touch_dep_file(path, name)
+
+    def _write_old_vals(self, path):
+        # Helper for writing auto.conf. Basically just a simplified
+        # write_config() that doesn't write any comments (including
+        # '# CONFIG_FOO is not set' comments). The format matches the C
+        # implementation, though the ordering is arbitrary there (depends on
+        # the hash table implementation).
+        #
+        # A separate helper function is neater than complicating write_config()
+        # by passing a flag to it, plus we only need to look at symbols here.
+
+        self._write_if_changed(
+            os.path.join(path, "auto.conf"),
+            self._old_vals_contents())
+
+    def _old_vals_contents(self):
+        # _write_old_vals() helper. Returns the contents to write as a string.
+
+        # Temporary list instead of generator makes this a bit faster
+        return "".join([
+            sym.config_string for sym in self.unique_defined_syms
+                if not (sym.orig_type in _BOOL_TRISTATE and not sym.tri_value)
+        ])
+
+    def node_iter(self, unique_syms=False):
+        """
+        Returns a generator for iterating through all MenuNode's in the Kconfig
+        tree. The iteration is done in Kconfig definition order (each node is
+        visited before its children, and the children of a node are visited
+        before the next node).
+
+        The Kconfig.top_node menu node is skipped. It contains an implicit menu
+        that holds the top-level items.
+
+        As an example, the following code will produce a list equal to
+        Kconfig.defined_syms:
+
+          defined_syms = [node.item for node in kconf.node_iter()
+                          if isinstance(node.item, Symbol)]
+
+        unique_syms (default: False):
+          If True, only the first MenuNode will be included for symbols defined
+          in multiple locations.
+
+          Using kconf.node_iter(True) in the example above would give a list
+          equal to unique_defined_syms.
+        """
+        if unique_syms:
+            for sym in self.unique_defined_syms:
+                sym._visited = False
+
+        node = self.top_node
+        while 1:
+            # Jump to the next node with an iterative tree walk
+            if node.list:
+                node = node.list
+            elif node.next:
+                node = node.next
+            else:
+                while node.parent:
+                    node = node.parent
+                    if node.next:
+                        node = node.next
+                        break
+                else:
+                    # No more nodes
+                    return
+
+            if unique_syms and node.item.__class__ is Symbol:
+                if node.item._visited:
+                    continue
+                node.item._visited = True
+
+            yield node
+
+    def eval_string(self, s):
+        """
+        Returns the tristate value of the expression 's', represented as 0, 1,
+        and 2 for n, m, and y, respectively. Raises KconfigError on syntax
+        errors. Warns if undefined symbols are referenced.
+
+        As an example, if FOO and BAR are tristate symbols at least one of
+        which has the value y, then eval_string("y && (FOO || BAR)") returns
+        2 (y).
+
+        To get the string value of non-bool/tristate symbols, use
+        Symbol.str_value. eval_string() always returns a tristate value, and
+        all non-bool/tristate symbols have the tristate value 0 (n).
+
+        The expression parsing is consistent with how parsing works for
+        conditional ('if ...') expressions in the configuration, and matches
+        the C implementation. m is rewritten to 'm && MODULES', so
+        eval_string("m") will return 0 (n) unless modules are enabled.
+        """
+        # The parser is optimized to be fast when parsing Kconfig files (where
+        # an expression can never appear at the beginning of a line). We have
+        # to monkey-patch things a bit here to reuse it.
+
+        self.filename = None
+
+        self._tokens = self._tokenize("if " + s)
+        # Strip "if " to avoid giving confusing error messages
+        self._line = s
+        self._tokens_i = 1  # Skip the 'if' token
+
+        return expr_value(self._expect_expr_and_eol())
+
+    def unset_values(self):
+        """
+        Removes any user values from all symbols, as if Kconfig.load_config()
+        or Symbol.set_value() had never been called.
+        """
+        self._warn_assign_no_prompt = False
+        try:
+            # set_value() already rejects undefined symbols, and they don't
+            # need to be invalidated (because their value never changes), so we
+            # can just iterate over defined symbols
+            for sym in self.unique_defined_syms:
+                sym.unset_value()
+
+            for choice in self.unique_choices:
+                choice.unset_value()
+        finally:
+            self._warn_assign_no_prompt = True
+
+    def enable_warnings(self):
+        """
+        Do 'Kconfig.warn = True' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn = True
+
+    def disable_warnings(self):
+        """
+        Do 'Kconfig.warn = False' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn = False
+
+    def enable_stderr_warnings(self):
+        """
+        Do 'Kconfig.warn_to_stderr = True' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn_to_stderr = True
+
+    def disable_stderr_warnings(self):
+        """
+        Do 'Kconfig.warn_to_stderr = False' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn_to_stderr = False
+
+    def enable_undef_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_undef = True' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn_assign_undef = True
+
+    def disable_undef_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_undef = False' instead. Maintained for
+        backwards compatibility.
+        """
+        self.warn_assign_undef = False
+
+    def enable_override_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_override = True' instead. Maintained for
+        backwards compatibility.
+        """
+        self.warn_assign_override = True
+
+    def disable_override_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_override = False' instead. Maintained for
+        backwards compatibility.
+        """
+        self.warn_assign_override = False
+
+    def enable_redun_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_redun = True' instead. Maintained for backwards
+        compatibility.
+        """
+        self.warn_assign_redun = True
+
+    def disable_redun_warnings(self):
+        """
+        Do 'Kconfig.warn_assign_redun = False' instead. Maintained for
+        backwards compatibility.
+        """
+        self.warn_assign_redun = False
+
+    def __repr__(self):
+        """
+        Returns a string with information about the Kconfig object when it is
+        evaluated on e.g. the interactive Python prompt.
+        """
+        def status(flag):
+            return "enabled" if flag else "disabled"
+
+        return "<{}>".format(", ".join((
+            "configuration with {} symbols".format(len(self.syms)),
+            'main menu prompt "{}"'.format(self.mainmenu_text),
+            "srctree is current directory" if not self.srctree else
+                'srctree "{}"'.format(self.srctree),
+            'config symbol prefix "{}"'.format(self.config_prefix),
+            "warnings " + status(self.warn),
+            "printing of warnings to stderr " + status(self.warn_to_stderr),
+            "undef. symbol assignment warnings " +
+                status(self.warn_assign_undef),
+            "overriding symbol assignment warnings " +
+                status(self.warn_assign_override),
+            "redundant symbol assignment warnings " +
+                status(self.warn_assign_redun)
+        )))
+
+    #
+    # Private methods
+    #
+
+
+    #
+    # File reading
+    #
+
+    def _open_config(self, filename):
+        # Opens a .config file. First tries to open 'filename', then
+        # '$srctree/filename' if $srctree was set when the configuration was
+        # loaded.
+
+        try:
+            return self._open(filename, "r")
+        except EnvironmentError as e:
+            # This will try opening the same file twice if $srctree is unset,
+            # but it's not a big deal
+            try:
+                return self._open(join(self.srctree, filename), "r")
+            except EnvironmentError as e2:
+                # This is needed for Python 3, because e2 is deleted after
+                # the try block:
+                #
+                # https://docs.python.org/3/reference/compound_stmts.html#the-try-statement
+                e = e2
+
+            raise _KconfigIOError(
+                e, "Could not open '{}' ({}: {}). Check that the $srctree "
+                   "environment variable ({}) is set correctly."
+                   .format(filename, errno.errorcode[e.errno], e.strerror,
+                           "set to '{}'".format(self.srctree) if self.srctree
+                               else "unset or blank"))
+
+    def _enter_file(self, filename):
+        # Jumps to the beginning of a sourced Kconfig file, saving the previous
+        # position and file object.
+        #
+        # filename:
+        #   Absolute path to file
+
+        # Path relative to $srctree, stored in e.g. self.filename (which makes
+        # it indirectly show up in MenuNode.filename). Equals 'filename' for
+        # absolute paths passed to 'source'.
+        if filename.startswith(self._srctree_prefix):
+            # Relative path (or a redundant absolute path to within $srctree,
+            # but it's probably fine to reduce those too)
+            rel_filename = filename[len(self._srctree_prefix):]
+        else:
+            # Absolute path
+            rel_filename = filename
+
+        self.kconfig_filenames.append(rel_filename)
+
+        # The parent Kconfig files are represented as a list of
+        # (<include path>, <Python 'file' object for Kconfig file>) tuples.
+        #
+        # <include path> is immutable and holds a *tuple* of
+        # (<filename>, <linenr>) tuples, giving the locations of the 'source'
+        # statements in the parent Kconfig files. The current include path is
+        # also available in Kconfig._include_path.
+        #
+        # The point of this redundant setup is to allow Kconfig._include_path
+        # to be assigned directly to MenuNode.include_path without having to
+        # copy it, sharing it wherever possible.
+
+        # Save include path and 'file' object (via its 'readline' function)
+        # before entering the file
+        self._filestack.append((self._include_path, self._readline))
+
+        # _include_path is a tuple, so this rebinds the variable instead of
+        # doing in-place modification
+        self._include_path += ((self.filename, self.linenr),)
+
+        # Check for recursive 'source'
+        for name, _ in self._include_path:
+            if name == rel_filename:
+                raise KconfigError(
+                    "\n{}:{}: recursive 'source' of '{}' detected. Check that "
+                    "environment variables are set correctly.\n"
+                    "Include path:\n{}"
+                    .format(self.filename, self.linenr, rel_filename,
+                            "\n".join("{}:{}".format(name, linenr)
+                                      for name, linenr in self._include_path)))
+
+        try:
+            self._readline = self._open(filename, "r").readline
+        except EnvironmentError as e:
+            # We already know that the file exists
+            raise _KconfigIOError(
+                e, "{}:{}: Could not open '{}' (in '{}') ({}: {})"
+                   .format(self.filename, self.linenr, filename,
+                           self._line.strip(),
+                           errno.errorcode[e.errno], e.strerror))
+
+        self.filename = rel_filename
+        self.linenr = 0
+
+    def _leave_file(self):
+        # Returns from a Kconfig file to the file that sourced it. See
+        # _enter_file().
+
+        # Restore location from parent Kconfig file
+        self.filename, self.linenr = self._include_path[-1]
+        # Restore include path and 'file' object
+        self._readline.__self__.close()  # __self__ fetches the 'file' object
+        self._include_path, self._readline = self._filestack.pop()
+
+    def _next_line(self):
+        # Fetches and tokenizes the next line from the current Kconfig file.
+        # Returns False at EOF and True otherwise.
+
+        # We might already have tokens from parsing a line and discovering that
+        # it's part of a different construct
+        if self._reuse_tokens:
+            self._reuse_tokens = False
+            # self._tokens_i is known to be 1 here, because _parse_props()
+            # leaves it like that when it can't recognize a line (or parses a
+            # help text)
+            return True
+
+        # readline() returns '' over and over at EOF, which we rely on for help
+        # texts at the end of files (see _line_after_help())
+        line = self._readline()
+        if not line:
+            return False
+        self.linenr += 1
+
+        # Handle line joining
+        while line.endswith("\\\n"):
+            line = line[:-2] + self._readline()
+            self.linenr += 1
+
+        self._tokens = self._tokenize(line)
+        # Initialize to 1 instead of 0 to factor out code from _parse_block()
+        # and _parse_props(). They immediately fetch self._tokens[0].
+        self._tokens_i = 1
+
+        return True
+
+    def _line_after_help(self, line):
+        # Tokenizes a line after a help text. This case is special in that the
+        # line has already been fetched (to discover that it isn't part of the
+        # help text).
+        #
+        # An earlier version used a _saved_line variable instead that was
+        # checked in _next_line(). This special-casing gets rid of it and makes
+        # _reuse_tokens alone sufficient to handle unget.
+
+        # Handle line joining
+        while line.endswith("\\\n"):
+            line = line[:-2] + self._readline()
+            self.linenr += 1
+
+        self._tokens = self._tokenize(line)
+        self._reuse_tokens = True
+
+    def _write_if_changed(self, filename, contents):
+        # Writes 'contents' into 'filename', but only if it differs from the
+        # current contents of the file.
+        #
+        # Another variant would be write a temporary file on the same
+        # filesystem, compare the files, and rename() the temporary file if it
+        # differs, but it breaks stuff like write_config("/dev/null"), which is
+        # used out there to force evaluation-related warnings to be generated.
+        # This simple version is pretty failsafe and portable.
+        #
+        # Returns True if the file has changed and is updated, and False
+        # otherwise.
+
+        if self._contents_eq(filename, contents):
+            return False
+        with self._open(filename, "w") as f:
+            f.write(contents)
+        return True
+
+    def _contents_eq(self, filename, contents):
+        # Returns True if the contents of 'filename' is 'contents' (a string),
+        # and False otherwise (including if 'filename' can't be opened/read)
+
+        try:
+            with self._open(filename, "r") as f:
+                # Robust re. things like encoding and line endings (mmap()
+                # trickery isn't)
+                return f.read(len(contents) + 1) == contents
+        except EnvironmentError:
+            # If the error here would prevent writing the file as well, we'll
+            # notice it later
+            return False
+
+    #
+    # Tokenization
+    #
+
+    def _lookup_sym(self, name):
+        # Fetches the symbol 'name' from the symbol table, creating and
+        # registering it if it does not exist. If '_parsing_kconfigs' is False,
+        # it means we're in eval_string(), and new symbols won't be registered.
+
+        if name in self.syms:
+            return self.syms[name]
+
+        sym = Symbol()
+        sym.kconfig = self
+        sym.name = name
+        sym.is_constant = False
+        sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n
+
+        if self._parsing_kconfigs:
+            self.syms[name] = sym
+        else:
+            self._warn("no symbol {} in configuration".format(name))
+
+        return sym
+
+    def _lookup_const_sym(self, name):
+        # Like _lookup_sym(), for constant (quoted) symbols
+
+        if name in self.const_syms:
+            return self.const_syms[name]
+
+        sym = Symbol()
+        sym.kconfig = self
+        sym.name = name
+        sym.is_constant = True
+        sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n
+
+        if self._parsing_kconfigs:
+            self.const_syms[name] = sym
+
+        return sym
+
+    def _tokenize(self, s):
+        # Parses 's', returning a None-terminated list of tokens. Registers any
+        # new symbols encountered with _lookup(_const)_sym().
+        #
+        # Tries to be reasonably speedy by processing chunks of text via
+        # regexes and string operations where possible. This is the biggest
+        # hotspot during parsing.
+        #
+        # It might be possible to rewrite this to 'yield' tokens instead,
+        # working across multiple lines. Lookback and compatibility with old
+        # janky versions of the C tools complicate things though.
+
+        self._line = s  # Used for error reporting
+
+        # Initial token on the line
+        match = _command_match(s)
+        if not match:
+            if s.isspace() or s.lstrip().startswith("#"):
+                return (None,)
+            self._parse_error("unknown token at start of line")
+
+        # Tricky implementation detail: While parsing a token, 'token' refers
+        # to the previous token. See _STRING_LEX for why this is needed.
+        token = _get_keyword(match.group(1))
+        if not token:
+            # Backwards compatibility with old versions of the C tools, which
+            # (accidentally) accepted stuff like "--help--" and "-help---".
+            # This was fixed in the C tools by commit c2264564 ("kconfig: warn
+            # of unhandled characters in Kconfig commands"), committed in July
+            # 2015, but it seems people still run Kconfiglib on older kernels.
+            if s.strip(" \t\n-") == "help":
+                return (_T_HELP, None)
+
+            # If the first token is not a keyword (and not a weird help token),
+            # we have a preprocessor variable assignment (or a bare macro on a
+            # line)
+            self._parse_assignment(s)
+            return (None,)
+
+        tokens = [token]
+        # The current index in the string being tokenized
+        i = match.end()
+
+        # Main tokenization loop (for tokens past the first one)
+        while i < len(s):
+            # Test for an identifier/keyword first. This is the most common
+            # case.
+            match = _id_keyword_match(s, i)
+            if match:
+                # We have an identifier or keyword
+
+                # Check what it is. lookup_sym() will take care of allocating
+                # new symbols for us the first time we see them. Note that
+                # 'token' still refers to the previous token.
+
+                name = match.group(1)
+                keyword = _get_keyword(name)
+                if keyword:
+                    # It's a keyword
+                    token = keyword
+                    # Jump past it
+                    i = match.end()
+
+                elif token not in _STRING_LEX:
+                    # It's a non-const symbol, except we translate n, m, and y
+                    # into the corresponding constant symbols, like the C
+                    # implementation
+
+                    if "$" in name:
+                        # Macro expansion within symbol name
+                        name, s, i = self._expand_name(s, i)
+                    else:
+                        i = match.end()
+
+                    token = self.const_syms[name] if name in STR_TO_TRI else \
+                        self._lookup_sym(name)
+
+                else:
+                    # It's a case of missing quotes. For example, the
+                    # following is accepted:
+                    #
+                    #   menu unquoted_title
+                    #
+                    #   config A
+                    #       tristate unquoted_prompt
+                    #
+                    #   endmenu
+                    #
+                    # Named choices ('choice FOO') also end up here.
+
+                    if token is not _T_CHOICE:
+                        self._warn("style: quotes recommended around '{}' in '{}'"
+                                   .format(name, self._line.strip()),
+                                   self.filename, self.linenr)
+
+                    token = name
+                    i = match.end()
+
+            else:
+                # Neither a keyword nor a non-const symbol
+
+                # We always strip whitespace after tokens, so it is safe to
+                # assume that s[i] is the start of a token here.
+                c = s[i]
+
+                if c in "\"'":
+                    if "$" not in s and "\\" not in s:
+                        # Fast path for lines without $ and \. Find the
+                        # matching quote.
+                        end_i = s.find(c, i + 1) + 1
+                        if not end_i:
+                            self._parse_error("unterminated string")
+                        val = s[i + 1:end_i - 1]
+                        i = end_i
+                    else:
+                        # Slow path
+                        s, end_i = self._expand_str(s, i)
+
+                        # os.path.expandvars() and the $UNAME_RELEASE replace()
+                        # is a backwards compatibility hack, which should be
+                        # reasonably safe as expandvars() leaves references to
+                        # undefined env. vars. as is.
+                        #
+                        # The preprocessor functionality changed how
+                        # environment variables are referenced, to $(FOO).
+                        val = expandvars(s[i + 1:end_i - 1]
+                                         .replace("$UNAME_RELEASE",
+                                                  _UNAME_RELEASE))
+
+                        i = end_i
+
+                    # This is the only place where we don't survive with a
+                    # single token of lookback: 'option env="FOO"' does not
+                    # refer to a constant symbol named "FOO".
+                    token = \
+                        val if token in _STRING_LEX or tokens[0] is _T_OPTION \
+                        else self._lookup_const_sym(val)
+
+                elif s.startswith("&&", i):
+                    token = _T_AND
+                    i += 2
+
+                elif s.startswith("||", i):
+                    token = _T_OR
+                    i += 2
+
+                elif c == "=":
+                    token = _T_EQUAL
+                    i += 1
+
+                elif s.startswith("!=", i):
+                    token = _T_UNEQUAL
+                    i += 2
+
+                elif c == "!":
+                    token = _T_NOT
+                    i += 1
+
+                elif c == "(":
+                    token = _T_OPEN_PAREN
+                    i += 1
+
+                elif c == ")":
+                    token = _T_CLOSE_PAREN
+                    i += 1
+
+                elif c == "#":
+                    break
+
+
+                # Very rare
+
+                elif s.startswith("<=", i):
+                    token = _T_LESS_EQUAL
+                    i += 2
+
+                elif c == "<":
+                    token = _T_LESS
+                    i += 1
+
+                elif s.startswith(">=", i):
+                    token = _T_GREATER_EQUAL
+                    i += 2
+
+                elif c == ">":
+                    token = _T_GREATER
+                    i += 1
+
+
+                else:
+                    self._parse_error("unknown tokens in line")
+
+
+                # Skip trailing whitespace
+                while i < len(s) and s[i].isspace():
+                    i += 1
+
+
+            # Add the token
+            tokens.append(token)
+
+        # None-terminating the token list makes token fetching simpler/faster
+        tokens.append(None)
+
+        return tokens
+
+    # Helpers for syntax checking and token fetching. See the
+    # 'Intro to expressions' section for what a constant symbol is.
+    #
+    # More of these could be added, but the single-use cases are inlined as an
+    # optimization.
+
+    def _expect_sym(self):
+        token = self._tokens[self._tokens_i]
+        self._tokens_i += 1
+
+        if token.__class__ is not Symbol:
+            self._parse_error("expected symbol")
+
+        return token
+
+    def _expect_nonconst_sym(self):
+        # Used for 'select' and 'imply' only. We know the token indices.
+
+        token = self._tokens[1]
+        self._tokens_i = 2
+
+        if token.__class__ is not Symbol or token.is_constant:
+            self._parse_error("expected nonconstant symbol")
+
+        return token
+
+    def _expect_str_and_eol(self):
+        token = self._tokens[self._tokens_i]
+        self._tokens_i += 1
+
+        if token.__class__ is not str:
+            self._parse_error("expected string")
+
+        if self._tokens[self._tokens_i] is not None:
+            self._trailing_tokens_error()
+
+        return token
+
+    def _expect_expr_and_eol(self):
+        expr = self._parse_expr(True)
+
+        if self._tokens[self._tokens_i] is not None:
+            self._trailing_tokens_error()
+
+        return expr
+
+    def _check_token(self, token):
+        # If the next token is 'token', removes it and returns True
+
+        if self._tokens[self._tokens_i] is token:
+            self._tokens_i += 1
+            return True
+        return False
+
+    #
+    # Preprocessor logic
+    #
+
+    def _parse_assignment(self, s):
+        # Parses a preprocessor variable assignment, registering the variable
+        # if it doesn't already exist. Also takes care of bare macros on lines
+        # (which are allowed, and can be useful for their side effects).
+
+        # Expand any macros in the left-hand side of the assignment (the
+        # variable name)
+        s = s.lstrip()
+        i = 0
+        while 1:
+            i = _assignment_lhs_fragment_match(s, i).end()
+            if s.startswith("$(", i):
+                s, i = self._expand_macro(s, i, ())
+            else:
+                break
+
+        if s.isspace():
+            # We also accept a bare macro on a line (e.g.
+            # $(warning-if,$(foo),ops)), provided it expands to a blank string
+            return
+
+        # Assigned variable
+        name = s[:i]
+
+
+        # Extract assignment operator (=, :=, or +=) and value
+        rhs_match = _assignment_rhs_match(s, i)
+        if not rhs_match:
+            self._parse_error("syntax error")
+
+        op, val = rhs_match.groups()
+
+
+        if name in self.variables:
+            # Already seen variable
+            var = self.variables[name]
+        else:
+            # New variable
+            var = Variable()
+            var.kconfig = self
+            var.name = name
+            var._n_expansions = 0
+            self.variables[name] = var
+
+            # += acts like = on undefined variables (defines a recursive
+            # variable)
+            if op == "+=":
+                op = "="
+
+        if op == "=":
+            var.is_recursive = True
+            var.value = val
+        elif op == ":=":
+            var.is_recursive = False
+            var.value = self._expand_whole(val, ())
+        else:  # op == "+="
+            # += does immediate expansion if the variable was last set
+            # with :=
+            var.value += " " + (val if var.is_recursive else
+                                self._expand_whole(val, ()))
+
+    def _expand_whole(self, s, args):
+        # Expands preprocessor macros in all of 's'. Used whenever we don't
+        # have to worry about delimiters. See _expand_macro() re. the 'args'
+        # parameter.
+        #
+        # Returns the expanded string.
+
+        i = 0
+        while 1:
+            i = s.find("$(", i)
+            if i == -1:
+                break
+            s, i = self._expand_macro(s, i, args)
+        return s
+
+    def _expand_name(self, s, i):
+        # Expands a symbol name starting at index 'i' in 's'.
+        #
+        # Returns the expanded name, the expanded 's' (including the part
+        # before the name), and the index of the first character in the next
+        # token after the name.
+
+        s, end_i = self._expand_name_iter(s, i)
+        name = s[i:end_i]
+        # isspace() is False for empty strings
+        if not name.strip():
+            # Avoid creating a Kconfig symbol with a blank name. It's almost
+            # guaranteed to be an error.
+            self._parse_error("macro expanded to blank string")
+
+        # Skip trailing whitespace
+        while end_i < len(s) and s[end_i].isspace():
+            end_i += 1
+
+        return name, s, end_i
+
+    def _expand_name_iter(self, s, i):
+        # Expands a symbol name starting at index 'i' in 's'.
+        #
+        # Returns the expanded 's' (including the part before the name) and the
+        # index of the first character after the expanded name in 's'.
+
+        while 1:
+            match = _name_special_search(s, i)
+
+            if match.group() != "$(":
+                return (s, match.start())
+            s, i = self._expand_macro(s, match.start(), ())
+
+    def _expand_str(self, s, i):
+        # Expands a quoted string starting at index 'i' in 's'. Handles both
+        # backslash escapes and macro expansion.
+        #
+        # Returns the expanded 's' (including the part before the string) and
+        # the index of the first character after the expanded string in 's'.
+
+        quote = s[i]
+        i += 1  # Skip over initial "/'
+        while 1:
+            match = _string_special_search(s, i)
+            if not match:
+                self._parse_error("unterminated string")
+
+
+            if match.group() == quote:
+                # Found the end of the string
+                return (s, match.end())
+
+            elif match.group() == "\\":
+                # Replace '\x' with 'x'. 'i' ends up pointing to the character
+                # after 'x', which allows macros to be canceled with '\$(foo)'.
+                i = match.end()
+                s = s[:match.start()] + s[i:]
+
+            elif match.group() == "$(":
+                # A macro call within the string
+                s, i = self._expand_macro(s, match.start(), ())
+
+            else:
+                # A ' quote within " quotes or vice versa
+                i += 1
+
+    def _expand_macro(self, s, i, args):
+        # Expands a macro starting at index 'i' in 's'. If this macro resulted
+        # from the expansion of another macro, 'args' holds the arguments
+        # passed to that macro.
+        #
+        # Returns the expanded 's' (including the part before the macro) and
+        # the index of the first character after the expanded macro in 's'.
+
+        res = s[:i]
+        i += 2  # Skip over "$("
+
+        arg_start = i  # Start of current macro argument
+        new_args = []  # Arguments of this macro call
+        nesting = 0  # Current parentheses nesting level
+
+        while 1:
+            match = _macro_special_search(s, i)
+            if not match:
+                self._parse_error("missing end parenthesis in macro expansion")
+
+
+            if match.group() == "(":
+                nesting += 1
+                i = match.end()
+
+            elif match.group() == ")":
+                if nesting:
+                    nesting -= 1
+                    i = match.end()
+                    continue
+
+                # Found the end of the macro
+
+                new_args.append(s[arg_start:match.start()])
+
+                # $(1) is replaced by the first argument to the function, etc.,
+                # provided at least that many arguments were passed
+
+                try:
+                    # Does the macro look like an integer, with a corresponding
+                    # argument? If so, expand it to the value of the argument.
+                    res += args[int(new_args[0])]
+                except (ValueError, IndexError):
+                    # Regular variables are just functions without arguments,
+                    # and also go through the function value path
+                    res += self._fn_val(new_args)
+
+                return (res + s[match.end():], len(res))
+
+            elif match.group() == ",":
+                i = match.end()
+                if nesting:
+                    continue
+
+                # Found the end of a macro argument
+                new_args.append(s[arg_start:match.start()])
+                arg_start = i
+
+            else:  # match.group() == "$("
+                # A nested macro call within the macro
+                s, i = self._expand_macro(s, match.start(), args)
+
+    def _fn_val(self, args):
+        # Returns the result of calling the function args[0] with the arguments
+        # args[1..len(args)-1]. Plain variables are treated as functions
+        # without arguments.
+
+        fn = args[0]
+
+        if fn in self.variables:
+            var = self.variables[fn]
+
+            if len(args) == 1:
+                # Plain variable
+                if var._n_expansions:
+                    self._parse_error("Preprocessor variable {} recursively "
+                                      "references itself".format(var.name))
+            elif var._n_expansions > 100:
+                # Allow functions to call themselves, but guess that functions
+                # that are overly recursive are stuck
+                self._parse_error("Preprocessor function {} seems stuck "
+                                  "in infinite recursion".format(var.name))
+
+            var._n_expansions += 1
+            res = self._expand_whole(self.variables[fn].value, args)
+            var._n_expansions -= 1
+            return res
+
+        if fn in self._functions:
+            # Built-in or user-defined function
+
+            py_fn, min_arg, max_arg = self._functions[fn]
+
+            if len(args) - 1 < min_arg or \
+               (max_arg is not None and len(args) - 1 > max_arg):
+
+                if min_arg == max_arg:
+                    expected_args = min_arg
+                elif max_arg is None:
+                    expected_args = "{} or more".format(min_arg)
+                else:
+                    expected_args = "{}-{}".format(min_arg, max_arg)
+
+                raise KconfigError("{}:{}: bad number of arguments in call "
+                                   "to {}, expected {}, got {}"
+                                   .format(self.filename, self.linenr, fn,
+                                           expected_args, len(args) - 1))
+
+            return py_fn(self, *args)
+
+        # Environment variables are tried last
+        if fn in os.environ:
+            self.env_vars.add(fn)
+            return os.environ[fn]
+
+        return ""
+
+    #
+    # Parsing
+    #
+
+    def _make_and(self, e1, e2):
+        # Constructs an AND (&&) expression. Performs trivial simplification.
+
+        if e1 is self.y:
+            return e2
+
+        if e2 is self.y:
+            return e1
+
+        if e1 is self.n or e2 is self.n:
+            return self.n
+
+        return (AND, e1, e2)
+
+    def _make_or(self, e1, e2):
+        # Constructs an OR (||) expression. Performs trivial simplification.
+
+        if e1 is self.n:
+            return e2
+
+        if e2 is self.n:
+            return e1
+
+        if e1 is self.y or e2 is self.y:
+            return self.y
+
+        return (OR, e1, e2)
+
+    def _parse_block(self, end_token, parent, prev):
+        # Parses a block, which is the contents of either a file or an if,
+        # menu, or choice statement.
+        #
+        # end_token:
+        #   The token that ends the block, e.g. _T_ENDIF ("endif") for ifs.
+        #   None for files.
+        #
+        # parent:
+        #   The parent menu node, corresponding to a menu, Choice, or 'if'.
+        #   'if's are flattened after parsing.
+        #
+        # prev:
+        #   The previous menu node. New nodes will be added after this one (by
+        #   modifying 'next' pointers).
+        #
+        #   'prev' is reused to parse a list of child menu nodes (for a menu or
+        #   Choice): After parsing the children, the 'next' pointer is assigned
+        #   to the 'list' pointer to "tilt up" the children above the node.
+        #
+        # Returns the final menu node in the block (or 'prev' if the block is
+        # empty). This allows chaining.
+
+        while self._next_line():
+            t0 = self._tokens[0]
+
+            if t0 is _T_CONFIG or t0 is _T_MENUCONFIG:
+                # The tokenizer allocates Symbol objects for us
+                sym = self._tokens[1]
+
+                if sym.__class__ is not Symbol or sym.is_constant:
+                    self._parse_error("missing or bad symbol name")
+
+                if self._tokens[2] is not None:
+                    self._trailing_tokens_error()
+
+                self.defined_syms.append(sym)
+
+                node = MenuNode()
+                node.kconfig = self
+                node.item = sym
+                node.is_menuconfig = (t0 is _T_MENUCONFIG)
+                node.prompt = node.help = node.list = None
+                node.parent = parent
+                node.filename = self.filename
+                node.linenr = self.linenr
+                node.include_path = self._include_path
+
+                sym.nodes.append(node)
+
+                self._parse_props(node)
+
+                if node.is_menuconfig and not node.prompt:
+                    self._warn("the menuconfig symbol {} has no prompt"
+                               .format(sym.name_and_loc))
+
+                # Equivalent to
+                #
+                #   prev.next = node
+                #   prev = node
+                #
+                # due to tricky Python semantics. The order matters.
+                prev.next = prev = node
+
+            elif t0 is None:
+                # Blank line
+                continue
+
+            elif t0 in _SOURCE_TOKENS:
+                pattern = self._expect_str_and_eol()
+
+                if t0 in _REL_SOURCE_TOKENS:
+                    # Relative source
+                    pattern = join(dirname(self.filename), pattern)
+
+                # - glob() doesn't support globbing relative to a directory, so
+                #   we need to prepend $srctree to 'pattern'. Use join()
+                #   instead of '+' so that an absolute path in 'pattern' is
+                #   preserved.
+                #
+                # - Sort the glob results to ensure a consistent ordering of
+                #   Kconfig symbols, which indirectly ensures a consistent
+                #   ordering in e.g. .config files
+                filenames = sorted(iglob(join(self._srctree_prefix, pattern)))
+
+                if not filenames and t0 in _OBL_SOURCE_TOKENS:
+                    raise KconfigError(
+                        "{}:{}: '{}' not found (in '{}'). Check that "
+                        "environment variables are set correctly (e.g. "
+                        "$srctree, which is {}). Also note that unset "
+                        "environment variables expand to the empty string."
+                        .format(self.filename, self.linenr, pattern,
+                                self._line.strip(),
+                                "set to '{}'".format(self.srctree)
+                                    if self.srctree else "unset or blank"))
+
+                for filename in filenames:
+                    self._enter_file(filename)
+                    prev = self._parse_block(None, parent, prev)
+                    self._leave_file()
+
+            elif t0 is end_token:
+                # Reached the end of the block. Terminate the final node and
+                # return it.
+
+                if self._tokens[1] is not None:
+                    self._trailing_tokens_error()
+
+                prev.next = None
+                return prev
+
+            elif t0 is _T_IF:
+                node = MenuNode()
+                node.item = node.prompt = None
+                node.parent = parent
+                node.dep = self._expect_expr_and_eol()
+
+                self._parse_block(_T_ENDIF, node, node)
+                node.list = node.next
+
+                prev.next = prev = node
+
+            elif t0 is _T_MENU:
+                node = MenuNode()
+                node.kconfig = self
+                node.item = t0  # _T_MENU == MENU
+                node.is_menuconfig = True
+                node.prompt = (self._expect_str_and_eol(), self.y)
+                node.visibility = self.y
+                node.parent = parent
+                node.filename = self.filename
+                node.linenr = self.linenr
+                node.include_path = self._include_path
+
+                self.menus.append(node)
+
+                self._parse_props(node)
+                self._parse_block(_T_ENDMENU, node, node)
+                node.list = node.next
+
+                prev.next = prev = node
+
+            elif t0 is _T_COMMENT:
+                node = MenuNode()
+                node.kconfig = self
+                node.item = t0  # _T_COMMENT == COMMENT
+                node.is_menuconfig = False
+                node.prompt = (self._expect_str_and_eol(), self.y)
+                node.list = None
+                node.parent = parent
+                node.filename = self.filename
+                node.linenr = self.linenr
+                node.include_path = self._include_path
+
+                self.comments.append(node)
+
+                self._parse_props(node)
+
+                prev.next = prev = node
+
+            elif t0 is _T_CHOICE:
+                if self._tokens[1] is None:
+                    choice = Choice()
+                    choice.direct_dep = self.n
+                else:
+                    # Named choice
+                    name = self._expect_str_and_eol()
+                    choice = self.named_choices.get(name)
+                    if not choice:
+                        choice = Choice()
+                        choice.name = name
+                        choice.direct_dep = self.n
+                        self.named_choices[name] = choice
+
+                self.choices.append(choice)
+
+                node = MenuNode()
+                node.kconfig = choice.kconfig = self
+                node.item = choice
+                node.is_menuconfig = True
+                node.prompt = node.help = None
+                node.parent = parent
+                node.filename = self.filename
+                node.linenr = self.linenr
+                node.include_path = self._include_path
+
+                choice.nodes.append(node)
+
+                self._parse_props(node)
+                self._parse_block(_T_ENDCHOICE, node, node)
+                node.list = node.next
+
+                prev.next = prev = node
+
+            elif t0 is _T_MAINMENU:
+                self.top_node.prompt = (self._expect_str_and_eol(), self.y)
+
+            else:
+                # A valid endchoice/endif/endmenu is caught by the 'end_token'
+                # check above
+                self._parse_error(
+                    "no corresponding 'choice'" if t0 is _T_ENDCHOICE else
+                    "no corresponding 'if'"     if t0 is _T_ENDIF else
+                    "no corresponding 'menu'"   if t0 is _T_ENDMENU else
+                    "unrecognized construct")
+
+        # End of file reached. Return the last node.
+
+        if end_token:
+            raise KconfigError(
+                "error: expected '{}' at end of '{}'"
+                .format("endchoice" if end_token is _T_ENDCHOICE else
+                        "endif"     if end_token is _T_ENDIF else
+                        "endmenu",
+                        self.filename))
+
+        return prev
+
+    def _parse_cond(self):
+        # Parses an optional 'if <expr>' construct and returns the parsed
+        # <expr>, or self.y if the next token is not _T_IF
+
+        expr = self._parse_expr(True) if self._check_token(_T_IF) else self.y
+
+        if self._tokens[self._tokens_i] is not None:
+            self._trailing_tokens_error()
+
+        return expr
+
+    def _parse_props(self, node):
+        # Parses and adds properties to the MenuNode 'node' (type, 'prompt',
+        # 'default's, etc.) Properties are later copied up to symbols and
+        # choices in a separate pass after parsing, in e.g.
+        # _add_props_to_sym().
+        #
+        # An older version of this code added properties directly to symbols
+        # and choices instead of to their menu nodes (and handled dependency
+        # propagation simultaneously), but that loses information on where a
+        # property is added when a symbol or choice is defined in multiple
+        # locations. Some Kconfig configuration systems rely heavily on such
+        # symbols, and better docs can be generated by keeping track of where
+        # properties are added.
+        #
+        # node:
+        #   The menu node we're parsing properties on
+
+        # Dependencies from 'depends on'. Will get propagated to the properties
+        # below.
+        node.dep = self.y
+
+        while self._next_line():
+            t0 = self._tokens[0]
+
+            if t0 in _TYPE_TOKENS:
+                # Relies on '_T_BOOL is BOOL', etc., to save a conversion
+                self._set_type(node.item, t0)
+                if self._tokens[1] is not None:
+                    self._parse_prompt(node)
+
+            elif t0 is _T_DEPENDS:
+                if not self._check_token(_T_ON):
+                    self._parse_error("expected 'on' after 'depends'")
+
+                node.dep = self._make_and(node.dep,
+                                          self._expect_expr_and_eol())
+
+            elif t0 is _T_HELP:
+                self._parse_help(node)
+
+            elif t0 is _T_SELECT:
+                if node.item.__class__ is not Symbol:
+                    self._parse_error("only symbols can select")
+
+                node.selects.append((self._expect_nonconst_sym(),
+                                     self._parse_cond()))
+
+            elif t0 is None:
+                # Blank line
+                continue
+
+            elif t0 is _T_DEFAULT:
+                node.defaults.append((self._parse_expr(False),
+                                      self._parse_cond()))
+
+            elif t0 in _DEF_TOKEN_TO_TYPE:
+                self._set_type(node.item, _DEF_TOKEN_TO_TYPE[t0])
+                node.defaults.append((self._parse_expr(False),
+                                      self._parse_cond()))
+
+            elif t0 is _T_PROMPT:
+                self._parse_prompt(node)
+
+            elif t0 is _T_RANGE:
+                node.ranges.append((self._expect_sym(), self._expect_sym(),
+                                    self._parse_cond()))
+
+            elif t0 is _T_IMPLY:
+                if node.item.__class__ is not Symbol:
+                    self._parse_error("only symbols can imply")
+
+                node.implies.append((self._expect_nonconst_sym(),
+                                     self._parse_cond()))
+
+            elif t0 is _T_VISIBLE:
+                if not self._check_token(_T_IF):
+                    self._parse_error("expected 'if' after 'visible'")
+
+                node.visibility = self._make_and(node.visibility,
+                                                 self._expect_expr_and_eol())
+
+            elif t0 is _T_OPTION:
+                if self._check_token(_T_ENV):
+                    if not self._check_token(_T_EQUAL):
+                        self._parse_error("expected '=' after 'env'")
+
+                    env_var = self._expect_str_and_eol()
+                    node.item.env_var = env_var
+
+                    if env_var in os.environ:
+                        node.defaults.append(
+                            (self._lookup_const_sym(os.environ[env_var]),
+                             self.y))
+                    else:
+                        self._warn("{1} has 'option env=\"{0}\"', "
+                                   "but the environment variable {0} is not "
+                                   "set".format(node.item.name, env_var),
+                                   self.filename, self.linenr)
+
+                    if env_var != node.item.name:
+                        self._warn("Kconfiglib expands environment variables "
+                                   "in strings directly, meaning you do not "
+                                   "need 'option env=...' \"bounce\" symbols. "
+                                   "For compatibility with the C tools, "
+                                   "rename {} to {} (so that the symbol name "
+                                   "matches the environment variable name)."
+                                   .format(node.item.name, env_var),
+                                   self.filename, self.linenr)
+
+                elif self._check_token(_T_DEFCONFIG_LIST):
+                    if not self.defconfig_list:
+                        self.defconfig_list = node.item
+                    else:
+                        self._warn("'option defconfig_list' set on multiple "
+                                   "symbols ({0} and {1}). Only {0} will be "
+                                   "used.".format(self.defconfig_list.name,
+                                                  node.item.name),
+                                   self.filename, self.linenr)
+
+                elif self._check_token(_T_MODULES):
+                    # To reduce warning spam, only warn if 'option modules' is
+                    # set on some symbol that isn't MODULES, which should be
+                    # safe. I haven't run into any projects that make use
+                    # modules besides the kernel yet, and there it's likely to
+                    # keep being called "MODULES".
+                    if node.item is not self.modules:
+                        self._warn("the 'modules' option is not supported. "
+                                   "Let me know if this is a problem for you, "
+                                   "as it wouldn't be that hard to implement. "
+                                   "Note that modules are supported -- "
+                                   "Kconfiglib just assumes the symbol name "
+                                   "MODULES, like older versions of the C "
+                                   "implementation did when 'option modules' "
+                                   "wasn't used.",
+                                   self.filename, self.linenr)
+
+                elif self._check_token(_T_ALLNOCONFIG_Y):
+                    if node.item.__class__ is not Symbol:
+                        self._parse_error("the 'allnoconfig_y' option is only "
+                                          "valid for symbols")
+
+                    node.item.is_allnoconfig_y = True
+
+                else:
+                    self._parse_error("unrecognized option")
+
+            elif t0 is _T_OPTIONAL:
+                if node.item.__class__ is not Choice:
+                    self._parse_error('"optional" is only valid for choices')
+
+                node.item.is_optional = True
+
+            else:
+                # Reuse the tokens for the non-property line later
+                self._reuse_tokens = True
+                return
+
+    def _set_type(self, sc, new_type):
+        # Sets the type of 'sc' (symbol or choice) to 'new_type'
+
+        # UNKNOWN is falsy
+        if sc.orig_type and sc.orig_type is not new_type:
+            self._warn("{} defined with multiple types, {} will be used"
+                       .format(sc.name_and_loc, TYPE_TO_STR[new_type]))
+
+        sc.orig_type = new_type
+
+    def _parse_prompt(self, node):
+        # 'prompt' properties override each other within a single definition of
+        # a symbol, but additional prompts can be added by defining the symbol
+        # multiple times
+
+        if node.prompt:
+            self._warn(node.item.name_and_loc +
+                       " defined with multiple prompts in single location")
+
+        prompt = self._tokens[1]
+        self._tokens_i = 2
+
+        if prompt.__class__ is not str:
+            self._parse_error("expected prompt string")
+
+        if prompt != prompt.strip():
+            self._warn(node.item.name_and_loc +
+                       " has leading or trailing whitespace in its prompt")
+
+            # This avoid issues for e.g. reStructuredText documentation, where
+            # '*prompt *' is invalid
+            prompt = prompt.strip()
+
+        node.prompt = (prompt, self._parse_cond())
+
+    def _parse_help(self, node):
+        if node.help is not None:
+            self._warn(node.item.name_and_loc + " defined with more than "
+                       "one help text -- only the last one will be used")
+
+        # Micro-optimization. This code is pretty hot.
+        readline = self._readline
+
+        # Find first non-blank (not all-space) line and get its
+        # indentation
+
+        while 1:
+            line = readline()
+            self.linenr += 1
+            if not line:
+                self._empty_help(node, line)
+                return
+            if not line.isspace():
+                break
+
+        len_ = len  # Micro-optimization
+
+        # Use a separate 'expline' variable here and below to avoid stomping on
+        # any tabs people might've put deliberately into the first line after
+        # the help text
+        expline = line.expandtabs()
+        indent = len_(expline) - len_(expline.lstrip())
+        if not indent:
+            self._empty_help(node, line)
+            return
+
+        # The help text goes on till the first non-blank line with less indent
+        # than the first line
+
+        # Add the first line
+        lines = [expline[indent:]]
+        add_line = lines.append  # Micro-optimization
+
+        while 1:
+            line = readline()
+            if line.isspace():
+                # No need to preserve the exact whitespace in these
+                add_line("\n")
+            elif not line:
+                # End of file
+                break
+            else:
+                expline = line.expandtabs()
+                if len_(expline) - len_(expline.lstrip()) < indent:
+                    break
+                add_line(expline[indent:])
+
+        self.linenr += len_(lines)
+        node.help = "".join(lines).rstrip()
+        if line:
+            self._line_after_help(line)
+
+    def _empty_help(self, node, line):
+        self._warn(node.item.name_and_loc +
+                   " has 'help' but empty help text")
+        node.help = ""
+        if line:
+            self._line_after_help(line)
+
+    def _parse_expr(self, transform_m):
+        # Parses an expression from the tokens in Kconfig._tokens using a
+        # simple top-down approach. See the module docstring for the expression
+        # format.
+        #
+        # transform_m:
+        #   True if m should be rewritten to m && MODULES. See the
+        #   Kconfig.eval_string() documentation.
+
+        # Grammar:
+        #
+        #   expr:     and_expr ['||' expr]
+        #   and_expr: factor ['&&' and_expr]
+        #   factor:   <symbol> ['='/'!='/'<'/... <symbol>]
+        #             '!' factor
+        #             '(' expr ')'
+        #
+        # It helps to think of the 'expr: and_expr' case as a single-operand OR
+        # (no ||), and of the 'and_expr: factor' case as a single-operand AND
+        # (no &&). Parsing code is always a bit tricky.
+
+        # Mind dump: parse_factor() and two nested loops for OR and AND would
+        # work as well. The straightforward implementation there gives a
+        # (op, (op, (op, A, B), C), D) parse for A op B op C op D. Representing
+        # expressions as (op, [list of operands]) instead goes nicely with that
+        # version, but is wasteful for short expressions and complicates
+        # expression evaluation and other code that works on expressions (more
+        # complicated code likely offsets any performance gain from less
+        # recursion too). If we also try to optimize the list representation by
+        # merging lists when possible (e.g. when ANDing two AND expressions),
+        # we end up allocating a ton of lists instead of reusing expressions,
+        # which is bad.
+
+        and_expr = self._parse_and_expr(transform_m)
+
+        # Return 'and_expr' directly if we have a "single-operand" OR.
+        # Otherwise, parse the expression on the right and make an OR node.
+        # This turns A || B || C || D into (OR, A, (OR, B, (OR, C, D))).
+        return and_expr if not self._check_token(_T_OR) else \
+            (OR, and_expr, self._parse_expr(transform_m))
+
+    def _parse_and_expr(self, transform_m):
+        factor = self._parse_factor(transform_m)
+
+        # Return 'factor' directly if we have a "single-operand" AND.
+        # Otherwise, parse the right operand and make an AND node. This turns
+        # A && B && C && D into (AND, A, (AND, B, (AND, C, D))).
+        return factor if not self._check_token(_T_AND) else \
+            (AND, factor, self._parse_and_expr(transform_m))
+
+    def _parse_factor(self, transform_m):
+        token = self._tokens[self._tokens_i]
+        self._tokens_i += 1
+
+        if token.__class__ is Symbol:
+            # Plain symbol or relation
+
+            if self._tokens[self._tokens_i] not in _RELATIONS:
+                # Plain symbol
+
+                # For conditional expressions ('depends on <expr>',
+                # '... if <expr>', etc.), m is rewritten to m && MODULES.
+                if transform_m and token is self.m:
+                    return (AND, self.m, self.modules)
+
+                return token
+
+            # Relation
+            #
+            # _T_EQUAL, _T_UNEQUAL, etc., deliberately have the same values as
+            # EQUAL, UNEQUAL, etc., so we can just use the token directly
+            self._tokens_i += 1
+            return (self._tokens[self._tokens_i - 1], token,
+                    self._expect_sym())
+
+        if token is _T_NOT:
+            # token == _T_NOT == NOT
+            return (token, self._parse_factor(transform_m))
+
+        if token is _T_OPEN_PAREN:
+            expr_parse = self._parse_expr(transform_m)
+            if self._check_token(_T_CLOSE_PAREN):
+                return expr_parse
+
+        self._parse_error("malformed expression")
+
+    #
+    # Caching and invalidation
+    #
+
+    def _build_dep(self):
+        # Populates the Symbol/Choice._dependents sets, which contain all other
+        # items (symbols and choices) that immediately depend on the item in
+        # the sense that changing the value of the item might affect the value
+        # of the dependent items. This is used for caching/invalidation.
+        #
+        # The calculated sets might be larger than necessary as we don't do any
+        # complex analysis of the expressions.
+
+        depend_on = _depend_on  # Micro-optimization
+
+        # Only calculate _dependents for defined symbols. Constant and
+        # undefined symbols could theoretically be selected/implied, but it
+        # wouldn't change their value, so it's not a true dependency.
+        for sym in self.unique_defined_syms:
+            # Symbols depend on the following:
+
+            # The prompt conditions
+            for node in sym.nodes:
+                if node.prompt:
+                    depend_on(sym, node.prompt[1])
+
+            # The default values and their conditions
+            for value, cond in sym.defaults:
+                depend_on(sym, value)
+                depend_on(sym, cond)
+
+            # The reverse and weak reverse dependencies
+            depend_on(sym, sym.rev_dep)
+            depend_on(sym, sym.weak_rev_dep)
+
+            # The ranges along with their conditions
+            for low, high, cond in sym.ranges:
+                depend_on(sym, low)
+                depend_on(sym, high)
+                depend_on(sym, cond)
+
+            # The direct dependencies. This is usually redundant, as the direct
+            # dependencies get propagated to properties, but it's needed to get
+            # invalidation solid for 'imply', which only checks the direct
+            # dependencies (even if there are no properties to propagate it
+            # to).
+            depend_on(sym, sym.direct_dep)
+
+            # In addition to the above, choice symbols depend on the choice
+            # they're in, but that's handled automatically since the Choice is
+            # propagated to the conditions of the properties before
+            # _build_dep() runs.
+
+        for choice in self.unique_choices:
+            # Choices depend on the following:
+
+            # The prompt conditions
+            for node in choice.nodes:
+                if node.prompt:
+                    depend_on(choice, node.prompt[1])
+
+            # The default symbol conditions
+            for _, cond in choice.defaults:
+                depend_on(choice, cond)
+
+    def _add_choice_deps(self):
+        # Choices also depend on the choice symbols themselves, because the
+        # y-mode selection of the choice might change if a choice symbol's
+        # visibility changes.
+        #
+        # We add these dependencies separately after dependency loop detection.
+        # The invalidation algorithm can handle the resulting
+        # <choice symbol> <-> <choice> dependency loops, but they make loop
+        # detection awkward.
+
+        for choice in self.unique_choices:
+            for sym in choice.syms:
+                sym._dependents.add(choice)
+
+    def _invalidate_all(self):
+        # Undefined symbols never change value and don't need to be
+        # invalidated, so we can just iterate over defined symbols.
+        # Invalidating constant symbols would break things horribly.
+        for sym in self.unique_defined_syms:
+            sym._invalidate()
+
+        for choice in self.unique_choices:
+            choice._invalidate()
+
+    #
+    # Post-parsing menu tree processing, including dependency propagation and
+    # implicit submenu creation
+    #
+
+    def _finalize_node(self, node, visible_if):
+        # Finalizes a menu node and its children:
+        #
+        #  - Copies properties from menu nodes up to their contained
+        #    symbols/choices
+        #
+        #  - Propagates dependencies from parent to child nodes
+        #
+        #  - Creates implicit menus (see kconfig-language.txt)
+        #
+        #  - Removes 'if' nodes
+        #
+        #  - Sets 'choice' types and registers choice symbols
+        #
+        # menu_finalize() in the C implementation is similar.
+        #
+        # node:
+        #   The menu node to finalize. This node and its children will have
+        #   been finalized when the function returns, and any implicit menus
+        #   will have been created.
+        #
+        # visible_if:
+        #   Dependencies from 'visible if' on parent menus. These are added to
+        #   the prompts of symbols and choices.
+
+        if node.item.__class__ is Symbol:
+            # Copy defaults, ranges, selects, and implies to the Symbol
+            self._add_props_to_sym(node)
+
+            # Find any items that should go in an implicit menu rooted at the
+            # symbol
+            cur = node
+            while cur.next and _auto_menu_dep(node, cur.next):
+                # This makes implicit submenu creation work recursively, with
+                # implicit menus inside implicit menus
+                self._finalize_node(cur.next, visible_if)
+                cur = cur.next
+                cur.parent = node
+
+            if cur is not node:
+                # Found symbols that should go in an implicit submenu. Tilt
+                # them up above us.
+                node.list = node.next
+                node.next = cur.next
+                cur.next = None
+
+        elif node.list:
+            # The menu node is a choice, menu, or if. Finalize each child node.
+
+            if node.item is MENU:
+                visible_if = self._make_and(visible_if, node.visibility)
+
+            # Propagate the menu node's dependencies to each child menu node.
+            #
+            # This needs to go before the recursive _finalize_node() call so
+            # that implicit submenu creation can look ahead at dependencies.
+            self._propagate_deps(node, visible_if)
+
+            # Finalize the children
+            cur = node.list
+            while cur:
+                self._finalize_node(cur, visible_if)
+                cur = cur.next
+
+        if node.list:
+            # node's children have been individually finalized. Do final steps
+            # to finalize this "level" in the menu tree.
+            _flatten(node.list)
+            _remove_ifs(node)
+
+        # Empty choices (node.list None) are possible, so this needs to go
+        # outside
+        if node.item.__class__ is Choice:
+            # Add the node's non-node-specific properties to the choice, like
+            # _add_props_to_sym() does
+            choice = node.item
+            choice.direct_dep = self._make_or(choice.direct_dep, node.dep)
+            choice.defaults += node.defaults
+
+            _finalize_choice(node)
+
+    def _propagate_deps(self, node, visible_if):
+        # Propagates 'node's dependencies to its child menu nodes
+
+        # If the parent node holds a Choice, we use the Choice itself as the
+        # parent dependency. This makes sense as the value (mode) of the choice
+        # limits the visibility of the contained choice symbols. The C
+        # implementation works the same way.
+        #
+        # Due to the similar interface, Choice works as a drop-in replacement
+        # for Symbol here.
+        basedep = node.item if node.item.__class__ is Choice else node.dep
+
+        cur = node.list
+        while cur:
+            dep = cur.dep = self._make_and(cur.dep, basedep)
+
+            if cur.item.__class__ in _SYMBOL_CHOICE:
+                # Propagate 'visible if' and dependencies to the prompt
+                if cur.prompt:
+                    cur.prompt = (cur.prompt[0],
+                                  self._make_and(
+                                      cur.prompt[1],
+                                      self._make_and(visible_if, dep)))
+
+                # Propagate dependencies to defaults
+                if cur.defaults:
+                    cur.defaults = [(default, self._make_and(cond, dep))
+                                    for default, cond in cur.defaults]
+
+                # Propagate dependencies to ranges
+                if cur.ranges:
+                    cur.ranges = [(low, high, self._make_and(cond, dep))
+                                  for low, high, cond in cur.ranges]
+
+                # Propagate dependencies to selects
+                if cur.selects:
+                    cur.selects = [(target, self._make_and(cond, dep))
+                                   for target, cond in cur.selects]
+
+                # Propagate dependencies to implies
+                if cur.implies:
+                    cur.implies = [(target, self._make_and(cond, dep))
+                                   for target, cond in cur.implies]
+
+            elif cur.prompt:  # Not a symbol/choice
+                # Propagate dependencies to the prompt. 'visible if' is only
+                # propagated to symbols/choices.
+                cur.prompt = (cur.prompt[0],
+                              self._make_and(cur.prompt[1], dep))
+
+            cur = cur.next
+
+    def _add_props_to_sym(self, node):
+        # Copies properties from the menu node 'node' up to its contained
+        # symbol, and adds (weak) reverse dependencies to selected/implied
+        # symbols.
+        #
+        # This can't be rolled into _propagate_deps(), because that function
+        # traverses the menu tree roughly breadth-first, meaning properties on
+        # symbols defined in multiple locations could end up in the wrong
+        # order.
+
+        sym = node.item
+
+        # See the Symbol class docstring
+        sym.direct_dep = self._make_or(sym.direct_dep, node.dep)
+
+        sym.defaults += node.defaults
+        sym.ranges += node.ranges
+        sym.selects += node.selects
+        sym.implies += node.implies
+
+        # Modify the reverse dependencies of the selected symbol
+        for target, cond in node.selects:
+            target.rev_dep = self._make_or(
+                target.rev_dep,
+                self._make_and(sym, cond))
+
+        # Modify the weak reverse dependencies of the implied
+        # symbol
+        for target, cond in node.implies:
+            target.weak_rev_dep = self._make_or(
+                target.weak_rev_dep,
+                self._make_and(sym, cond))
+
+    #
+    # Misc.
+    #
+
+    def _check_sym_sanity(self):
+        # Checks various symbol properties that are handiest to check after
+        # parsing. Only generates errors and warnings.
+
+        def num_ok(sym, type_):
+            # Returns True if the (possibly constant) symbol 'sym' is valid as a value
+            # for a symbol of type type_ (INT or HEX)
+
+            # 'not sym.nodes' implies a constant or undefined symbol, e.g. a plain
+            # "123"
+            if not sym.nodes:
+                return _is_base_n(sym.name, _TYPE_TO_BASE[type_])
+
+            return sym.orig_type is type_
+
+        for sym in self.unique_defined_syms:
+            if sym.orig_type in _BOOL_TRISTATE:
+                # A helper function could be factored out here, but keep it
+                # speedy/straightforward
+
+                for target_sym, _ in sym.selects:
+                    if target_sym.orig_type not in _BOOL_TRISTATE_UNKNOWN:
+                        self._warn("{} selects the {} symbol {}, which is not "
+                                   "bool or tristate"
+                                   .format(sym.name_and_loc,
+                                           TYPE_TO_STR[target_sym.orig_type],
+                                           target_sym.name_and_loc))
+
+                for target_sym, _ in sym.implies:
+                    if target_sym.orig_type not in _BOOL_TRISTATE_UNKNOWN:
+                        self._warn("{} implies the {} symbol {}, which is not "
+                                   "bool or tristate"
+                                   .format(sym.name_and_loc,
+                                           TYPE_TO_STR[target_sym.orig_type],
+                                           target_sym.name_and_loc))
+
+            elif sym.orig_type:  # STRING/INT/HEX
+                for default, _ in sym.defaults:
+                    if default.__class__ is not Symbol:
+                        raise KconfigError(
+                            "the {} symbol {} has a malformed default {} -- "
+                            "expected a single symbol"
+                            .format(TYPE_TO_STR[sym.orig_type],
+                                    sym.name_and_loc, expr_str(default)))
+
+                    if sym.orig_type is STRING:
+                        if not default.is_constant and not default.nodes and \
+                           not default.name.isupper():
+                            # 'default foo' on a string symbol could be either a symbol
+                            # reference or someone leaving out the quotes. Guess that
+                            # the quotes were left out if 'foo' isn't all-uppercase
+                            # (and no symbol named 'foo' exists).
+                            self._warn("style: quotes recommended around "
+                                       "default value for string symbol "
+                                       + sym.name_and_loc)
+
+                    elif not num_ok(default, sym.orig_type):  # INT/HEX
+                        self._warn("the {0} symbol {1} has a non-{0} default {2}"
+                                   .format(TYPE_TO_STR[sym.orig_type],
+                                           sym.name_and_loc,
+                                           default.name_and_loc))
+
+                if sym.selects or sym.implies:
+                    self._warn("the {} symbol {} has selects or implies"
+                               .format(TYPE_TO_STR[sym.orig_type],
+                                       sym.name_and_loc))
+
+            else:  # UNKNOWN
+                self._warn("{} defined without a type"
+                           .format(sym.name_and_loc))
+
+
+            if sym.ranges:
+                if sym.orig_type not in _INT_HEX:
+                    self._warn(
+                        "the {} symbol {} has ranges, but is not int or hex"
+                        .format(TYPE_TO_STR[sym.orig_type],
+                                sym.name_and_loc))
+                else:
+                    for low, high, _ in sym.ranges:
+                        if not num_ok(low, sym.orig_type) or \
+                           not num_ok(high, sym.orig_type):
+
+                            self._warn("the {0} symbol {1} has a non-{0} "
+                                       "range [{2}, {3}]"
+                                       .format(TYPE_TO_STR[sym.orig_type],
+                                               sym.name_and_loc,
+                                               low.name_and_loc,
+                                               high.name_and_loc))
+
+    def _check_choice_sanity(self):
+        # Checks various choice properties that are handiest to check after
+        # parsing. Only generates errors and warnings.
+
+        def warn_select_imply(sym, expr, expr_type):
+            msg = "the choice symbol {} is {} by the following symbols, but " \
+                  "select/imply has no effect on choice symbols" \
+                  .format(sym.name_and_loc, expr_type)
+
+            # si = select/imply
+            for si in split_expr(expr, OR):
+                msg += "\n - " + split_expr(si, AND)[0].name_and_loc
+
+            self._warn(msg)
+
+        for choice in self.unique_choices:
+            if choice.orig_type not in _BOOL_TRISTATE:
+                self._warn("{} defined with type {}"
+                           .format(choice.name_and_loc,
+                                   TYPE_TO_STR[choice.orig_type]))
+
+            for node in choice.nodes:
+                if node.prompt:
+                    break
+            else:
+                self._warn(choice.name_and_loc + " defined without a prompt")
+
+            for default, _ in choice.defaults:
+                if default.__class__ is not Symbol:
+                    raise KconfigError(
+                        "{} has a malformed default {}"
+                        .format(choice.name_and_loc, expr_str(default)))
+
+                if default.choice is not choice:
+                    self._warn("the default selection {} of {} is not "
+                               "contained in the choice"
+                               .format(default.name_and_loc,
+                                       choice.name_and_loc))
+
+            for sym in choice.syms:
+                if sym.defaults:
+                    self._warn("default on the choice symbol {} will have "
+                               "no effect, as defaults do not affect choice "
+                               "symbols".format(sym.name_and_loc))
+
+                if sym.rev_dep is not sym.kconfig.n:
+                    warn_select_imply(sym, sym.rev_dep, "selected")
+
+                if sym.weak_rev_dep is not sym.kconfig.n:
+                    warn_select_imply(sym, sym.weak_rev_dep, "implied")
+
+                for node in sym.nodes:
+                    if node.parent.item is choice:
+                        if not node.prompt:
+                            self._warn("the choice symbol {} has no prompt"
+                                       .format(sym.name_and_loc))
+
+                    elif node.prompt:
+                        self._warn("the choice symbol {} is defined with a "
+                                   "prompt outside the choice"
+                                   .format(sym.name_and_loc))
+
+    def _parse_error(self, msg):
+        raise KconfigError("{}error: couldn't parse '{}': {}".format(
+            "" if self.filename is None else
+                "{}:{}: ".format(self.filename, self.linenr),
+            self._line.strip(), msg))
+
+    def _trailing_tokens_error(self):
+        self._parse_error("extra tokens at end of line")
+
+    def _open(self, filename, mode):
+        # open() wrapper:
+        #
+        # - Enable universal newlines mode on Python 2 to ease
+        #   interoperability between Linux and Windows. It's already the
+        #   default on Python 3.
+        #
+        #   The "U" flag would currently work for both Python 2 and 3, but it's
+        #   deprecated on Python 3, so play it future-safe.
+        #
+        #   io.open() defaults to universal newlines on Python 2 (and is an
+        #   alias for open() on Python 3), but it returns 'unicode' strings and
+        #   slows things down:
+        #
+        #     Parsing x86 Kconfigs on Python 2
+        #
+        #     with open(..., "rU"):
+        #
+        #       real  0m0.930s
+        #       user  0m0.905s
+        #       sys   0m0.025s
+        #
+        #     with io.open():
+        #
+        #       real  0m1.069s
+        #       user  0m1.040s
+        #       sys   0m0.029s
+        #
+        #   There's no appreciable performance difference between "r" and
+        #   "rU" for parsing performance on Python 2.
+        #
+        # - For Python 3, force the encoding. Forcing the encoding on Python 2
+        #   turns strings into Unicode strings, which gets messy. Python 2
+        #   doesn't decode regular strings anyway.
+        return open(filename, "rU" if mode == "r" else mode) if _IS_PY2 else \
+               open(filename, mode, encoding=self._encoding)
+
+    def _check_undef_syms(self):
+        # Prints warnings for all references to undefined symbols within the
+        # Kconfig files
+
+        def is_num(s):
+            # Returns True if the string 's' looks like a number.
+            #
+            # Internally, all operands in Kconfig are symbols, only undefined symbols
+            # (which numbers usually are) get their name as their value.
+            #
+            # Only hex numbers that start with 0x/0X are classified as numbers.
+            # Otherwise, symbols whose names happen to contain only the letters A-F
+            # would trigger false positives.
+
+            try:
+                int(s)
+            except ValueError:
+                if not s.startswith(("0x", "0X")):
+                    return False
+
+                try:
+                    int(s, 16)
+                except ValueError:
+                    return False
+
+            return True
+
+        for sym in (self.syms.viewvalues if _IS_PY2 else self.syms.values)():
+            # - sym.nodes empty means the symbol is undefined (has no
+            #   definition locations)
+            #
+            # - Due to Kconfig internals, numbers show up as undefined Kconfig
+            #   symbols, but shouldn't be flagged
+            #
+            # - The MODULES symbol always exists
+            if not sym.nodes and not is_num(sym.name) and \
+               sym.name != "MODULES":
+
+                msg = "undefined symbol {}:".format(sym.name)
+                for node in self.node_iter():
+                    if sym in node.referenced:
+                        msg += "\n\n- Referenced at {}:{}:\n\n{}" \
+                               .format(node.filename, node.linenr, node)
+                self._warn(msg)
+
+    def _warn(self, msg, filename=None, linenr=None):
+        # For printing general warnings
+
+        if not self.warn:
+            return
+
+        msg = "warning: " + msg
+        if filename is not None:
+            msg = "{}:{}: {}".format(filename, linenr, msg)
+
+        self.warnings.append(msg)
+        if self.warn_to_stderr:
+            sys.stderr.write(msg + "\n")
+
+
+class Symbol(object):
+    """
+    Represents a configuration symbol:
+
+      (menu)config FOO
+          ...
+
+    The following attributes are available. They should be viewed as read-only,
+    and some are implemented through @property magic (but are still efficient
+    to access due to internal caching).
+
+    Note: Prompts, help texts, and locations are stored in the Symbol's
+    MenuNode(s) rather than in the Symbol itself. Check the MenuNode class and
+    the Symbol.nodes attribute. This organization matches the C tools.
+
+    name:
+      The name of the symbol, e.g. "FOO" for 'config FOO'.
+
+    type:
+      The type of the symbol. One of BOOL, TRISTATE, STRING, INT, HEX, UNKNOWN.
+      UNKNOWN is for undefined symbols, (non-special) constant symbols, and
+      symbols defined without a type.
+
+      When running without modules (MODULES having the value n), TRISTATE
+      symbols magically change type to BOOL. This also happens for symbols
+      within choices in "y" mode. This matches the C tools, and makes sense for
+      menuconfig-like functionality.
+
+    orig_type:
+      The type as given in the Kconfig file, without any magic applied. Used
+      when printing the symbol.
+
+    tri_value:
+      The tristate value of the symbol as an integer. One of 0, 1, 2,
+      representing n, m, y. Always 0 (n) for non-bool/tristate symbols.
+
+      This is the symbol value that's used outside of relation expressions
+      (A, !A, A && B, A || B).
+
+    str_value:
+      The value of the symbol as a string. Gives the value for string/int/hex
+      symbols. For bool/tristate symbols, gives "n", "m", or "y".
+
+      This is the symbol value that's used in relational expressions
+      (A = B, A != B, etc.)
+
+      Gotcha: For int/hex symbols, the exact format of the value is often
+      preserved (e.g. when writing a .config file), hence why you can't get it
+      directly as an int. Do int(int_sym.str_value) or
+      int(hex_sym.str_value, 16) to get the integer value.
+
+    user_value:
+      The user value of the symbol. None if no user value has been assigned
+      (via Kconfig.load_config() or Symbol.set_value()).
+
+      Holds 0, 1, or 2 for bool/tristate symbols, and a string for the other
+      symbol types.
+
+      WARNING: Do not assign directly to this. It will break things. Use
+      Symbol.set_value().
+
+    assignable:
+      A tuple containing the tristate user values that can currently be
+      assigned to the symbol (that would be respected), ordered from lowest (0,
+      representing n) to highest (2, representing y). This corresponds to the
+      selections available in the menuconfig interface. The set of assignable
+      values is calculated from the symbol's visibility and selects/implies.
+
+      Returns the empty set for non-bool/tristate symbols and for symbols with
+      visibility n. The other possible values are (0, 2), (0, 1, 2), (1, 2),
+      (1,), and (2,). A (1,) or (2,) result means the symbol is visible but
+      "locked" to m or y through a select, perhaps in combination with the
+      visibility. menuconfig represents this as -M- and -*-, respectively.
+
+      For string/hex/int symbols, check if Symbol.visibility is non-0 (non-n)
+      instead to determine if the value can be changed.
+
+      Some handy 'assignable' idioms:
+
+        # Is 'sym' an assignable (visible) bool/tristate symbol?
+        if sym.assignable:
+            # What's the highest value it can be assigned? [-1] in Python
+            # gives the last element.
+            sym_high = sym.assignable[-1]
+
+            # The lowest?
+            sym_low = sym.assignable[0]
+
+            # Can the symbol be set to at least m?
+            if sym.assignable[-1] >= 1:
+                ...
+
+        # Can the symbol be set to m?
+        if 1 in sym.assignable:
+            ...
+
+    visibility:
+      The visibility of the symbol. One of 0, 1, 2, representing n, m, y. See
+      the module documentation for an overview of symbol values and visibility.
+
+    config_string:
+      The .config assignment string that would get written out for the symbol
+      by Kconfig.write_config(). Returns the empty string if no .config
+      assignment would get written out.
+
+      In general, visible symbols, symbols with (active) defaults, and selected
+      symbols get written out. This includes all non-n-valued bool/tristate
+      symbols, and all visible string/int/hex symbols.
+
+      Symbols with the (no longer needed) 'option env=...' option generate no
+      configuration output, and neither does the special
+      'option defconfig_list' symbol.
+
+      Tip: This field is useful when generating custom configuration output,
+      even for non-.config-like formats. To write just the symbols that would
+      get written out to .config files, do this:
+
+        if sym.config_string:
+            *Write symbol, e.g. by looking sym.str_value*
+
+      This is a superset of the symbols written out by write_autoconf().
+      That function skips all n-valued symbols.
+
+      There usually won't be any great harm in just writing all symbols either,
+      though you might get some special symbols and possibly some "redundant"
+      n-valued symbol entries in there.
+
+    name_and_loc:
+      Holds a string like
+
+        "MY_SYMBOL (defined at foo/Kconfig:12, bar/Kconfig:14)"
+
+      , giving the name of the symbol and its definition location(s).
+
+      If the symbol is undefined, the location is given as "(undefined)".
+
+    nodes:
+      A list of MenuNodes for this symbol. Will contain a single MenuNode for
+      most symbols. Undefined and constant symbols have an empty nodes list.
+      Symbols defined in multiple locations get one node for each location.
+
+    choice:
+      Holds the parent Choice for choice symbols, and None for non-choice
+      symbols. Doubles as a flag for whether a symbol is a choice symbol.
+
+    defaults:
+      List of (default, cond) tuples for the symbol's 'default' properties. For
+      example, 'default A && B if C || D' is represented as
+      ((AND, A, B), (OR, C, D)). If no condition was given, 'cond' is
+      self.kconfig.y.
+
+      Note that 'depends on' and parent dependencies are propagated to
+      'default' conditions.
+
+    selects:
+      List of (symbol, cond) tuples for the symbol's 'select' properties. For
+      example, 'select A if B && C' is represented as (A, (AND, B, C)). If no
+      condition was given, 'cond' is self.kconfig.y.
+
+      Note that 'depends on' and parent dependencies are propagated to 'select'
+      conditions.
+
+    implies:
+      Like 'selects', for imply.
+
+    ranges:
+      List of (low, high, cond) tuples for the symbol's 'range' properties. For
+      example, 'range 1 2 if A' is represented as (1, 2, A). If there is no
+      condition, 'cond' is self.kconfig.y.
+
+      Note that 'depends on' and parent dependencies are propagated to 'range'
+      conditions.
+
+      Gotcha: 1 and 2 above will be represented as (undefined) Symbols rather
+      than plain integers. Undefined symbols get their name as their string
+      value, so this works out. The C tools work the same way.
+
+    orig_defaults:
+    orig_selects:
+    orig_implies:
+    orig_ranges:
+      See the corresponding attributes on the MenuNode class.
+
+    rev_dep:
+      Reverse dependency expression from other symbols selecting this symbol.
+      Multiple selections get ORed together. A condition on a select is ANDed
+      with the selecting symbol.
+
+      For example, if A has 'select FOO' and B has 'select FOO if C', then
+      FOO's rev_dep will be (OR, A, (AND, B, C)).
+
+    weak_rev_dep:
+      Like rev_dep, for imply.
+
+    direct_dep:
+      The direct ('depends on') dependencies for the symbol, or self.kconfig.y
+      if there are no direct dependencies.
+
+      This attribute includes any dependencies from surrounding menus and ifs.
+      Those get propagated to the direct dependencies, and the resulting direct
+      dependencies in turn get propagated to the conditions of all properties.
+
+      If the symbol is defined in multiple locations, the dependencies from the
+      different locations get ORed together.
+
+    referenced:
+      A set() with all symbols and choices referenced in the properties and
+      property conditions of the symbol.
+
+      Also includes dependencies from surrounding menus and ifs, because those
+      get propagated to the symbol (see the 'Intro to symbol values' section in
+      the module docstring).
+
+      Choices appear in the dependencies of choice symbols.
+
+      For the following definitions, only B and not C appears in A's
+      'referenced'. To get transitive references, you'll have to recursively
+      expand 'references' until no new items appear.
+
+        config A
+                bool
+                depends on B
+
+        config B
+                bool
+                depends on C
+
+        config C
+                bool
+
+      See the Symbol.direct_dep attribute if you're only interested in the
+      direct dependencies of the symbol (its 'depends on'). You can extract the
+      symbols in it with the global expr_items() function.
+
+    env_var:
+      If the Symbol has an 'option env="FOO"' option, this contains the name
+      ("FOO") of the environment variable. None for symbols without no
+      'option env'.
+
+      'option env="FOO"' acts like a 'default' property whose value is the
+      value of $FOO.
+
+      Symbols with 'option env' are never written out to .config files, even if
+      they are visible. env_var corresponds to a flag called SYMBOL_AUTO in the
+      C implementation.
+
+    is_allnoconfig_y:
+      True if the symbol has 'option allnoconfig_y' set on it. This has no
+      effect internally (except when printing symbols), but can be checked by
+      scripts.
+
+    is_constant:
+      True if the symbol is a constant (quoted) symbol.
+
+    kconfig:
+      The Kconfig instance this symbol is from.
+    """
+    __slots__ = (
+        "_cached_assignable",
+        "_cached_str_val",
+        "_cached_tri_val",
+        "_cached_vis",
+        "_dependents",
+        "_old_val",
+        "_visited",
+        "_was_set",
+        "_write_to_conf",
+        "choice",
+        "defaults",
+        "direct_dep",
+        "env_var",
+        "implies",
+        "is_allnoconfig_y",
+        "is_constant",
+        "kconfig",
+        "name",
+        "nodes",
+        "orig_type",
+        "ranges",
+        "rev_dep",
+        "selects",
+        "user_value",
+        "weak_rev_dep",
+    )
+
+    #
+    # Public interface
+    #
+
+    @property
+    def type(self):
+        """
+        See the class documentation.
+        """
+        if self.orig_type is TRISTATE and \
+           (self.choice and self.choice.tri_value == 2 or
+            not self.kconfig.modules.tri_value):
+
+            return BOOL
+
+        return self.orig_type
+
+    @property
+    def str_value(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_str_val is not None:
+            return self._cached_str_val
+
+        if self.orig_type in _BOOL_TRISTATE:
+            # Also calculates the visibility, so invalidation safe
+            self._cached_str_val = TRI_TO_STR[self.tri_value]
+            return self._cached_str_val
+
+        # As a quirk of Kconfig, undefined symbols get their name as their
+        # string value. This is why things like "FOO = bar" work for seeing if
+        # FOO has the value "bar".
+        if not self.orig_type:  # UNKNOWN
+            self._cached_str_val = self.name
+            return self.name
+
+        val = ""
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        vis = self.visibility
+
+        self._write_to_conf = (vis != 0)
+
+        if self.orig_type in _INT_HEX:
+            # The C implementation checks the user value against the range in a
+            # separate code path (post-processing after loading a .config).
+            # Checking all values here instead makes more sense for us. It
+            # requires that we check for a range first.
+
+            base = _TYPE_TO_BASE[self.orig_type]
+
+            # Check if a range is in effect
+            for low_expr, high_expr, cond in self.ranges:
+                if expr_value(cond):
+                    has_active_range = True
+
+                    # The zeros are from the C implementation running strtoll()
+                    # on empty strings
+                    low = int(low_expr.str_value, base) if \
+                      _is_base_n(low_expr.str_value, base) else 0
+                    high = int(high_expr.str_value, base) if \
+                      _is_base_n(high_expr.str_value, base) else 0
+
+                    break
+            else:
+                has_active_range = False
+
+            # Defaults are used if the symbol is invisible, lacks a user value,
+            # or has an out-of-range user value
+            use_defaults = True
+
+            if vis and self.user_value:
+                user_val = int(self.user_value, base)
+                if has_active_range and not low <= user_val <= high:
+                    num2str = str if base == 10 else hex
+                    self.kconfig._warn(
+                        "user value {} on the {} symbol {} ignored due to "
+                        "being outside the active range ([{}, {}]) -- falling "
+                        "back on defaults"
+                        .format(num2str(user_val), TYPE_TO_STR[self.orig_type],
+                                self.name_and_loc,
+                                num2str(low), num2str(high)))
+                else:
+                    # If the user value is well-formed and satisfies range
+                    # contraints, it is stored in exactly the same form as
+                    # specified in the assignment (with or without "0x", etc.)
+                    val = self.user_value
+                    use_defaults = False
+
+            if use_defaults:
+                # No user value or invalid user value. Look at defaults.
+
+                # Used to implement the warning below
+                has_default = False
+
+                for sym, cond in self.defaults:
+                    if expr_value(cond):
+                        has_default = self._write_to_conf = True
+
+                        val = sym.str_value
+
+                        if _is_base_n(val, base):
+                            val_num = int(val, base)
+                        else:
+                            val_num = 0  # strtoll() on empty string
+
+                        break
+                else:
+                    val_num = 0  # strtoll() on empty string
+
+                # This clamping procedure runs even if there's no default
+                if has_active_range:
+                    clamp = None
+                    if val_num < low:
+                        clamp = low
+                    elif val_num > high:
+                        clamp = high
+
+                    if clamp is not None:
+                        # The value is rewritten to a standard form if it is
+                        # clamped
+                        val = str(clamp) \
+                              if self.orig_type is INT else \
+                              hex(clamp)
+
+                        if has_default:
+                            num2str = str if base == 10 else hex
+                            self.kconfig._warn(
+                                "default value {} on {} clamped to {} due to "
+                                "being outside the active range ([{}, {}])"
+                                .format(val_num, self.name_and_loc,
+                                        num2str(clamp), num2str(low),
+                                        num2str(high)))
+
+        elif self.orig_type is STRING:
+            if vis and self.user_value is not None:
+                # If the symbol is visible and has a user value, use that
+                val = self.user_value
+            else:
+                # Otherwise, look at defaults
+                for sym, cond in self.defaults:
+                    if expr_value(cond):
+                        val = sym.str_value
+                        self._write_to_conf = True
+                        break
+
+        # env_var corresponds to SYMBOL_AUTO in the C implementation, and is
+        # also set on the defconfig_list symbol there. Test for the
+        # defconfig_list symbol explicitly instead here, to avoid a nonsensical
+        # env_var setting and the defconfig_list symbol being printed
+        # incorrectly. This code is pretty cold anyway.
+        if self.env_var is not None or self is self.kconfig.defconfig_list:
+            self._write_to_conf = False
+
+        self._cached_str_val = val
+        return val
+
+    @property
+    def tri_value(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_tri_val is not None:
+            return self._cached_tri_val
+
+        if self.orig_type not in _BOOL_TRISTATE:
+            if self.orig_type:  # != UNKNOWN
+                # Would take some work to give the location here
+                self.kconfig._warn(
+                    "The {} symbol {} is being evaluated in a logical context "
+                    "somewhere. It will always evaluate to n."
+                    .format(TYPE_TO_STR[self.orig_type], self.name_and_loc))
+
+            self._cached_tri_val = 0
+            return 0
+
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        vis = self.visibility
+        self._write_to_conf = (vis != 0)
+
+        val = 0
+
+        if not self.choice:
+            # Non-choice symbol
+
+            if vis and self.user_value is not None:
+                # If the symbol is visible and has a user value, use that
+                val = min(self.user_value, vis)
+
+            else:
+                # Otherwise, look at defaults and weak reverse dependencies
+                # (implies)
+
+                for default, cond in self.defaults:
+                    dep_val = expr_value(cond)
+                    if dep_val:
+                        val = min(expr_value(default), dep_val)
+                        if val:
+                            self._write_to_conf = True
+                        break
+
+                # Weak reverse dependencies are only considered if our
+                # direct dependencies are met
+                dep_val = expr_value(self.weak_rev_dep)
+                if dep_val and expr_value(self.direct_dep):
+                    val = max(dep_val, val)
+                    self._write_to_conf = True
+
+            # Reverse (select-related) dependencies take precedence
+            dep_val = expr_value(self.rev_dep)
+            if dep_val:
+                if expr_value(self.direct_dep) < dep_val:
+                    self._warn_select_unsatisfied_deps()
+
+                val = max(dep_val, val)
+                self._write_to_conf = True
+
+            # m is promoted to y for (1) bool symbols and (2) symbols with a
+            # weak_rev_dep (from imply) of y
+            if val == 1 and \
+               (self.type is BOOL or expr_value(self.weak_rev_dep) == 2):
+                val = 2
+
+        elif vis == 2:
+            # Visible choice symbol in y-mode choice. The choice mode limits
+            # the visibility of choice symbols, so it's sufficient to just
+            # check the visibility of the choice symbols themselves.
+            val = 2 if self.choice.selection is self else 0
+
+        elif vis and self.user_value:
+            # Visible choice symbol in m-mode choice, with set non-0 user value
+            val = 1
+
+        self._cached_tri_val = val
+        return val
+
+    @property
+    def assignable(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_assignable is None:
+            self._cached_assignable = self._assignable()
+        return self._cached_assignable
+
+    @property
+    def visibility(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_vis is None:
+            self._cached_vis = _visibility(self)
+        return self._cached_vis
+
+    @property
+    def config_string(self):
+        """
+        See the class documentation.
+        """
+        # _write_to_conf is determined when the value is calculated. This is a
+        # hidden function call due to property magic.
+        val = self.str_value
+        if not self._write_to_conf:
+            return ""
+
+        if self.orig_type in _BOOL_TRISTATE:
+            return "{}{}={}\n" \
+                   .format(self.kconfig.config_prefix, self.name, val) \
+                   if val != "n" else \
+                   "# {}{} is not set\n" \
+                   .format(self.kconfig.config_prefix, self.name)
+
+        if self.orig_type in _INT_HEX:
+            return "{}{}={}\n" \
+                   .format(self.kconfig.config_prefix, self.name, val)
+
+        # sym.orig_type is STRING
+        return '{}{}="{}"\n' \
+               .format(self.kconfig.config_prefix, self.name, escape(val))
+
+    @property
+    def name_and_loc(self):
+        """
+        See the class documentation.
+        """
+        return self.name + " " + _locs(self)
+
+    def set_value(self, value):
+        """
+        Sets the user value of the symbol.
+
+        Equal in effect to assigning the value to the symbol within a .config
+        file. For bool and tristate symbols, use the 'assignable' attribute to
+        check which values can currently be assigned. Setting values outside
+        'assignable' will cause Symbol.user_value to differ from
+        Symbol.str/tri_value (be truncated down or up).
+
+        Setting a choice symbol to 2 (y) sets Choice.user_selection to the
+        choice symbol in addition to setting Symbol.user_value.
+        Choice.user_selection is considered when the choice is in y mode (the
+        "normal" mode).
+
+        Other symbols that depend (possibly indirectly) on this symbol are
+        automatically recalculated to reflect the assigned value.
+
+        value:
+          The user value to give to the symbol. For bool and tristate symbols,
+          n/m/y can be specified either as 0/1/2 (the usual format for tristate
+          values in Kconfiglib) or as one of the strings "n", "m", or "y". For
+          other symbol types, pass a string.
+
+          Note that the value for an int/hex symbol is passed as a string, e.g.
+          "123" or "0x0123". The format of this string is preserved in the
+          output.
+
+          Values that are invalid for the type (such as "foo" or 1 (m) for a
+          BOOL or "0x123" for an INT) are ignored and won't be stored in
+          Symbol.user_value. Kconfiglib will print a warning by default for
+          invalid assignments, and set_value() will return False.
+
+        Returns True if the value is valid for the type of the symbol, and
+        False otherwise. This only looks at the form of the value. For BOOL and
+        TRISTATE symbols, check the Symbol.assignable attribute to see what
+        values are currently in range and would actually be reflected in the
+        value of the symbol. For other symbol types, check whether the
+        visibility is non-n.
+        """
+        if self.orig_type in _BOOL_TRISTATE and value in STR_TO_TRI:
+            value = STR_TO_TRI[value]
+
+        # If the new user value matches the old, nothing changes, and we can
+        # avoid invalidating cached values.
+        #
+        # This optimization is skipped for choice symbols: Setting a choice
+        # symbol's user value to y might change the state of the choice, so it
+        # wouldn't be safe (symbol user values always match the values set in a
+        # .config file or via set_value(), and are never implicitly updated).
+        if value == self.user_value and not self.choice:
+            self._was_set = True
+            return True
+
+        # Check if the value is valid for our type
+        if not (self.orig_type is BOOL     and value in (2, 0)     or
+                self.orig_type is TRISTATE and value in TRI_TO_STR or
+                value.__class__ is str and
+                (self.orig_type is STRING                        or
+                 self.orig_type is INT and _is_base_n(value, 10) or
+                 self.orig_type is HEX and _is_base_n(value, 16)
+                                       and int(value, 16) >= 0)):
+
+            # Display tristate values as n, m, y in the warning
+            self.kconfig._warn(
+                "the value {} is invalid for {}, which has type {} -- "
+                "assignment ignored"
+                .format(TRI_TO_STR[value] if value in TRI_TO_STR else
+                            "'{}'".format(value),
+                        self.name_and_loc, TYPE_TO_STR[self.orig_type]))
+
+            return False
+
+        self.user_value = value
+        self._was_set = True
+
+        if self.choice and value == 2:
+            # Setting a choice symbol to y makes it the user selection of the
+            # choice. Like for symbol user values, the user selection is not
+            # guaranteed to match the actual selection of the choice, as
+            # dependencies come into play.
+            self.choice.user_selection = self
+            self.choice._was_set = True
+            self.choice._rec_invalidate()
+        else:
+            self._rec_invalidate_if_has_prompt()
+
+        return True
+
+    def unset_value(self):
+        """
+        Removes any user value from the symbol, as if the symbol had never
+        gotten a user value via Kconfig.load_config() or Symbol.set_value().
+        """
+        if self.user_value is not None:
+            self.user_value = None
+            self._rec_invalidate_if_has_prompt()
+
+    @property
+    def referenced(self):
+        """
+        See the class documentation.
+        """
+        return {item for node in self.nodes for item in node.referenced}
+
+    @property
+    def orig_defaults(self):
+        """
+        See the class documentation.
+        """
+        return [d for node in self.nodes for d in node.orig_defaults]
+
+    @property
+    def orig_selects(self):
+        """
+        See the class documentation.
+        """
+        return [s for node in self.nodes for s in node.orig_selects]
+
+    @property
+    def orig_implies(self):
+        """
+        See the class documentation.
+        """
+        return [i for node in self.nodes for i in node.orig_implies]
+
+    @property
+    def orig_ranges(self):
+        """
+        See the class documentation.
+        """
+        return [r for node in self.nodes for r in node.orig_ranges]
+
+    def __repr__(self):
+        """
+        Returns a string with information about the symbol (including its name,
+        value, visibility, and location(s)) when it is evaluated on e.g. the
+        interactive Python prompt.
+        """
+        fields = ["symbol " + self.name, TYPE_TO_STR[self.type]]
+        add = fields.append
+
+        for node in self.nodes:
+            if node.prompt:
+                add('"{}"'.format(node.prompt[0]))
+
+        # Only add quotes for non-bool/tristate symbols
+        add("value " + (self.str_value if self.orig_type in _BOOL_TRISTATE
+                        else '"{}"'.format(self.str_value)))
+
+        if not self.is_constant:
+            # These aren't helpful to show for constant symbols
+
+            if self.user_value is not None:
+                # Only add quotes for non-bool/tristate symbols
+                add("user value " + (TRI_TO_STR[self.user_value]
+                                     if self.orig_type in _BOOL_TRISTATE
+                                     else '"{}"'.format(self.user_value)))
+
+            add("visibility " + TRI_TO_STR[self.visibility])
+
+            if self.choice:
+                add("choice symbol")
+
+            if self.is_allnoconfig_y:
+                add("allnoconfig_y")
+
+            if self is self.kconfig.defconfig_list:
+                add("is the defconfig_list symbol")
+
+            if self.env_var is not None:
+                add("from environment variable " + self.env_var)
+
+            if self is self.kconfig.modules:
+                add("is the modules symbol")
+
+            add("direct deps " + TRI_TO_STR[expr_value(self.direct_dep)])
+
+        if self.nodes:
+            for node in self.nodes:
+                add("{}:{}".format(node.filename, node.linenr))
+        else:
+            add("constant" if self.is_constant else "undefined")
+
+        return "<{}>".format(", ".join(fields))
+
+    def __str__(self):
+        """
+        Returns a string representation of the symbol when it is printed.
+        Matches the Kconfig format, with any parent dependencies propagated to
+        the 'depends on' condition.
+
+        The string is constructed by joining the strings returned by
+        MenuNode.__str__() for each of the symbol's menu nodes, so symbols
+        defined in multiple locations will return a string with all
+        definitions.
+
+        The returned string does not end in a newline. An empty string is
+        returned for undefined and constant symbols.
+        """
+        return self.custom_str(standard_sc_expr_str)
+
+    def custom_str(self, sc_expr_str_fn):
+        """
+        Works like Symbol.__str__(), but allows a custom format to be used for
+        all symbol/choice references. See expr_str().
+        """
+        return "\n\n".join(node.custom_str(sc_expr_str_fn)
+                           for node in self.nodes)
+
+    #
+    # Private methods
+    #
+
+    def __init__(self):
+        """
+        Symbol constructor -- not intended to be called directly by Kconfiglib
+        clients.
+        """
+        # These attributes are always set on the instance from outside and
+        # don't need defaults:
+        #   kconfig
+        #   direct_dep
+        #   is_constant
+        #   name
+        #   rev_dep
+        #   weak_rev_dep
+
+        # - UNKNOWN == 0
+        # - _visited is used during tree iteration and dep. loop detection
+        self.orig_type = self._visited = 0
+
+        self.nodes = []
+
+        self.defaults = []
+        self.selects = []
+        self.implies = []
+        self.ranges = []
+
+        self.user_value = \
+        self.choice = \
+        self.env_var = \
+        self._cached_str_val = self._cached_tri_val = self._cached_vis = \
+        self._cached_assignable = None
+
+        # _write_to_conf is calculated along with the value. If True, the
+        # Symbol gets a .config entry.
+
+        self.is_allnoconfig_y = \
+        self._was_set = \
+        self._write_to_conf = False
+
+        # See Kconfig._build_dep()
+        self._dependents = set()
+
+    def _assignable(self):
+        # Worker function for the 'assignable' attribute
+
+        if self.orig_type not in _BOOL_TRISTATE:
+            return ()
+
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        vis = self.visibility
+        if not vis:
+            return ()
+
+        rev_dep_val = expr_value(self.rev_dep)
+
+        if vis == 2:
+            if self.choice:
+                return (2,)
+
+            if not rev_dep_val:
+                if self.type is BOOL or expr_value(self.weak_rev_dep) == 2:
+                    return (0, 2)
+                return (0, 1, 2)
+
+            if rev_dep_val == 2:
+                return (2,)
+
+            # rev_dep_val == 1
+
+            if self.type is BOOL or expr_value(self.weak_rev_dep) == 2:
+                return (2,)
+            return (1, 2)
+
+        # vis == 1
+
+        # Must be a tristate here, because bool m visibility gets promoted to y
+
+        if not rev_dep_val:
+            return (0, 1) if expr_value(self.weak_rev_dep) != 2 else (0, 2)
+
+        if rev_dep_val == 2:
+            return (2,)
+
+        # vis == rev_dep_val == 1
+
+        return (1,)
+
+    def _invalidate(self):
+        # Marks the symbol as needing to be recalculated
+
+        self._cached_str_val = self._cached_tri_val = self._cached_vis = \
+        self._cached_assignable = None
+
+    def _rec_invalidate(self):
+        # Invalidates the symbol and all items that (possibly) depend on it
+
+        if self is self.kconfig.modules:
+            # Invalidating MODULES has wide-ranging effects
+            self.kconfig._invalidate_all()
+        else:
+            self._invalidate()
+
+            for item in self._dependents:
+                # _cached_vis doubles as a flag that tells us whether 'item'
+                # has cached values, because it's calculated as a side effect
+                # of calculating all other (non-constant) cached values.
+                #
+                # If item._cached_vis is None, it means there can't be cached
+                # values on other items that depend on 'item', because if there
+                # were, some value on 'item' would have been calculated and
+                # item._cached_vis set as a side effect. It's therefore safe to
+                # stop the invalidation at symbols with _cached_vis None.
+                #
+                # This approach massively speeds up scripts that set a lot of
+                # values, vs simply invalidating all possibly dependent symbols
+                # (even when you already have a list of all the dependent
+                # symbols, because some symbols get huge dependency trees).
+                #
+                # This gracefully handles dependency loops too, which is nice
+                # for choices, where the choice depends on the choice symbols
+                # and vice versa.
+                if item._cached_vis is not None:
+                    item._rec_invalidate()
+
+    def _rec_invalidate_if_has_prompt(self):
+        # Invalidates the symbol and its dependent symbols, but only if the
+        # symbol has a prompt. User values never have an effect on promptless
+        # symbols, so we skip invalidation for them as an optimization.
+        #
+        # This also prevents constant (quoted) symbols from being invalidated
+        # if set_value() is called on them, which would make them lose their
+        # value and break things.
+        #
+        # Prints a warning if the symbol has no prompt. In some contexts (e.g.
+        # when loading a .config files) assignments to promptless symbols are
+        # normal and expected, so the warning can be disabled.
+
+        for node in self.nodes:
+            if node.prompt:
+                self._rec_invalidate()
+                return
+
+        if self.kconfig._warn_assign_no_prompt:
+            self.kconfig._warn(self.name_and_loc + " has no prompt, meaning "
+                               "user values have no effect on it")
+
+    def _str_default(self):
+        # write_min_config() helper function. Returns the value the symbol
+        # would get from defaults if it didn't have a user value. Uses exactly
+        # the same algorithm as the C implementation (though a bit cleaned up),
+        # for compatibility.
+
+        if self.orig_type in _BOOL_TRISTATE:
+            val = 0
+
+            # Defaults, selects, and implies do not affect choice symbols
+            if not self.choice:
+                for default, cond in self.defaults:
+                    cond_val = expr_value(cond)
+                    if cond_val:
+                        val = min(expr_value(default), cond_val)
+                        break
+
+                val = max(expr_value(self.rev_dep),
+                          expr_value(self.weak_rev_dep),
+                          val)
+
+                # Transpose mod to yes if type is bool (possibly due to modules
+                # being disabled)
+                if val == 1 and self.type is BOOL:
+                    val = 2
+
+            return TRI_TO_STR[val]
+
+        if self.orig_type:  # STRING/INT/HEX
+            for default, cond in self.defaults:
+                if expr_value(cond):
+                    return default.str_value
+
+        return ""
+
+    def _warn_select_unsatisfied_deps(self):
+        # Helper for printing an informative warning when a symbol with
+        # unsatisfied direct dependencies (dependencies from 'depends on', ifs,
+        # and menus) is selected by some other symbol. Also warn if a symbol
+        # whose direct dependencies evaluate to m is selected to y.
+
+        msg = "{} has direct dependencies {} with value {}, but is " \
+              "currently being {}-selected by the following symbols:" \
+              .format(self.name_and_loc, expr_str(self.direct_dep),
+                      TRI_TO_STR[expr_value(self.direct_dep)],
+                      TRI_TO_STR[expr_value(self.rev_dep)])
+
+        # The reverse dependencies from each select are ORed together
+        for select in split_expr(self.rev_dep, OR):
+            if expr_value(select) <= expr_value(self.direct_dep):
+                # Only include selects that exceed the direct dependencies
+                continue
+
+            # - 'select A if B' turns into A && B
+            # - 'select A' just turns into A
+            #
+            # In both cases, we can split on AND and pick the first operand
+            selecting_sym = split_expr(select, AND)[0]
+
+            msg += "\n - {}, with value {}, direct dependencies {} " \
+                   "(value: {})" \
+                   .format(selecting_sym.name_and_loc,
+                           selecting_sym.str_value,
+                           expr_str(selecting_sym.direct_dep),
+                           TRI_TO_STR[expr_value(selecting_sym.direct_dep)])
+
+            if select.__class__ is tuple:
+                msg += ", and select condition {} (value: {})" \
+                       .format(expr_str(select[2]),
+                               TRI_TO_STR[expr_value(select[2])])
+
+        self.kconfig._warn(msg)
+
+
+class Choice(object):
+    """
+    Represents a choice statement:
+
+      choice
+          ...
+      endchoice
+
+    The following attributes are available on Choice instances. They should be
+    treated as read-only, and some are implemented through @property magic (but
+    are still efficient to access due to internal caching).
+
+    Note: Prompts, help texts, and locations are stored in the Choice's
+    MenuNode(s) rather than in the Choice itself. Check the MenuNode class and
+    the Choice.nodes attribute. This organization matches the C tools.
+
+    name:
+      The name of the choice, e.g. "FOO" for 'choice FOO', or None if the
+      Choice has no name.
+
+    type:
+      The type of the choice. One of BOOL, TRISTATE, UNKNOWN. UNKNOWN is for
+      choices defined without a type where none of the contained symbols have a
+      type either (otherwise the choice inherits the type of the first symbol
+      defined with a type).
+
+      When running without modules (CONFIG_MODULES=n), TRISTATE choices
+      magically change type to BOOL. This matches the C tools, and makes sense
+      for menuconfig-like functionality.
+
+    orig_type:
+      The type as given in the Kconfig file, without any magic applied. Used
+      when printing the choice.
+
+    tri_value:
+      The tristate value (mode) of the choice. A choice can be in one of three
+      modes:
+
+        0 (n) - The choice is disabled and no symbols can be selected. For
+                visible choices, this mode is only possible for choices with
+                the 'optional' flag set (see kconfig-language.txt).
+
+        1 (m) - Any number of choice symbols can be set to m, the rest will
+                be n.
+
+        2 (y) - One symbol will be y, the rest n.
+
+      Only tristate choices can be in m mode. The visibility of the choice is
+      an upper bound on the mode, and the mode in turn is an upper bound on the
+      visibility of the choice symbols.
+
+      To change the mode, use Choice.set_value().
+
+      Implementation note:
+        The C tools internally represent choices as a type of symbol, with
+        special-casing in many code paths. This is why there is a lot of
+        similarity to Symbol. The value (mode) of a choice is really just a
+        normal symbol value, and an implicit reverse dependency forces its
+        lower bound to m for visible non-optional choices (the reverse
+        dependency is 'm && <visibility>').
+
+        Symbols within choices get the choice propagated as a dependency to
+        their properties. This turns the mode of the choice into an upper bound
+        on e.g. the visibility of choice symbols, and explains the gotcha
+        related to printing choice symbols mentioned in the module docstring.
+
+        Kconfiglib uses a separate Choice class only because it makes the code
+        and interface less confusing (especially in a user-facing interface).
+        Corresponding attributes have the same name in the Symbol and Choice
+        classes, for consistency and compatibility.
+
+    str_value:
+      Like choice.tri_value, but gives the value as one of the strings
+      "n", "m", or "y"
+
+    user_value:
+      The value (mode) selected by the user through Choice.set_value(). Either
+      0, 1, or 2, or None if the user hasn't selected a mode. See
+      Symbol.user_value.
+
+      WARNING: Do not assign directly to this. It will break things. Use
+      Choice.set_value() instead.
+
+    assignable:
+      See the symbol class documentation. Gives the assignable values (modes).
+
+    selection:
+      The Symbol instance of the currently selected symbol. None if the Choice
+      is not in y mode or has no selected symbol (due to unsatisfied
+      dependencies on choice symbols).
+
+      WARNING: Do not assign directly to this. It will break things. Call
+      sym.set_value(2) on the choice symbol you want to select instead.
+
+    user_selection:
+      The symbol selected by the user (by setting it to y). Ignored if the
+      choice is not in y mode, but still remembered so that the choice "snaps
+      back" to the user selection if the mode is changed back to y. This might
+      differ from 'selection' due to unsatisfied dependencies.
+
+      WARNING: Do not assign directly to this. It will break things. Call
+      sym.set_value(2) on the choice symbol to be selected instead.
+
+    visibility:
+      See the Symbol class documentation. Acts on the value (mode).
+
+    name_and_loc:
+      Holds a string like
+
+        "<choice MY_CHOICE> (defined at foo/Kconfig:12)"
+
+      , giving the name of the choice and its definition location(s). If the
+      choice has no name (isn't defined with 'choice MY_CHOICE'), then it will
+      be shown as "<choice>" before the list of locations (always a single one
+      in that case).
+
+    syms:
+      List of symbols contained in the choice.
+
+      Obscure gotcha: If a symbol depends on the previous symbol within a
+      choice so that an implicit menu is created, it won't be a choice symbol,
+      and won't be included in 'syms'.
+
+    nodes:
+      A list of MenuNodes for this choice. In practice, the list will probably
+      always contain a single MenuNode, but it is possible to give a choice a
+      name and define it in multiple locations.
+
+    defaults:
+      List of (symbol, cond) tuples for the choice's 'defaults' properties. For
+      example, 'default A if B && C' is represented as (A, (AND, B, C)). If
+      there is no condition, 'cond' is self.kconfig.y.
+
+      Note that 'depends on' and parent dependencies are propagated to
+      'default' conditions.
+
+    orig_defaults:
+      See the corresponding attribute on the MenuNode class.
+
+    direct_dep:
+      See Symbol.direct_dep.
+
+    referenced:
+      A set() with all symbols referenced in the properties and property
+      conditions of the choice.
+
+      Also includes dependencies from surrounding menus and ifs, because those
+      get propagated to the choice (see the 'Intro to symbol values' section in
+      the module docstring).
+
+    is_optional:
+      True if the choice has the 'optional' flag set on it and can be in
+      n mode.
+
+    kconfig:
+      The Kconfig instance this choice is from.
+    """
+    __slots__ = (
+        "_cached_assignable",
+        "_cached_selection",
+        "_cached_vis",
+        "_dependents",
+        "_visited",
+        "_was_set",
+        "defaults",
+        "direct_dep",
+        "is_constant",
+        "is_optional",
+        "kconfig",
+        "name",
+        "nodes",
+        "orig_type",
+        "syms",
+        "user_selection",
+        "user_value",
+    )
+
+    #
+    # Public interface
+    #
+
+    @property
+    def type(self):
+        """
+        Returns the type of the choice. See Symbol.type.
+        """
+        if self.orig_type is TRISTATE and not self.kconfig.modules.tri_value:
+            return BOOL
+        return self.orig_type
+
+    @property
+    def str_value(self):
+        """
+        See the class documentation.
+        """
+        return TRI_TO_STR[self.tri_value]
+
+    @property
+    def tri_value(self):
+        """
+        See the class documentation.
+        """
+        # This emulates a reverse dependency of 'm && visibility' for
+        # non-optional choices, which is how the C implementation does it
+
+        val = 0 if self.is_optional else 1
+
+        if self.user_value is not None:
+            val = max(val, self.user_value)
+
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        val = min(val, self.visibility)
+
+        # Promote m to y for boolean choices
+        return 2 if val == 1 and self.type is BOOL else val
+
+    @property
+    def assignable(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_assignable is None:
+            self._cached_assignable = self._assignable()
+        return self._cached_assignable
+
+    @property
+    def visibility(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_vis is None:
+            self._cached_vis = _visibility(self)
+        return self._cached_vis
+
+    @property
+    def name_and_loc(self):
+        """
+        See the class documentation.
+        """
+        # Reuse the expression format, which is '<choice (name, if any)>'.
+        return standard_sc_expr_str(self) + " " + _locs(self)
+
+    @property
+    def selection(self):
+        """
+        See the class documentation.
+        """
+        if self._cached_selection is _NO_CACHED_SELECTION:
+            self._cached_selection = self._selection()
+        return self._cached_selection
+
+    def set_value(self, value):
+        """
+        Sets the user value (mode) of the choice. Like for Symbol.set_value(),
+        the visibility might truncate the value. Choices without the 'optional'
+        attribute (is_optional) can never be in n mode, but 0/"n" is still
+        accepted since it's not a malformed value (though it will have no
+        effect).
+
+        Returns True if the value is valid for the type of the choice, and
+        False otherwise. This only looks at the form of the value. Check the
+        Choice.assignable attribute to see what values are currently in range
+        and would actually be reflected in the mode of the choice.
+        """
+        if value in STR_TO_TRI:
+            value = STR_TO_TRI[value]
+
+        if value == self.user_value:
+            # We know the value must be valid if it was successfully set
+            # previously
+            self._was_set = True
+            return True
+
+        if not (self.orig_type is BOOL     and value in (2, 0) or
+                self.orig_type is TRISTATE and value in TRI_TO_STR):
+
+            # Display tristate values as n, m, y in the warning
+            self.kconfig._warn(
+                "the value {} is invalid for {}, which has type {} -- "
+                "assignment ignored"
+                .format(TRI_TO_STR[value] if value in TRI_TO_STR else
+                            "'{}'".format(value),
+                        self.name_and_loc, TYPE_TO_STR[self.orig_type]))
+
+            return False
+
+        self.user_value = value
+        self._was_set = True
+        self._rec_invalidate()
+
+        return True
+
+    def unset_value(self):
+        """
+        Resets the user value (mode) and user selection of the Choice, as if
+        the user had never touched the mode or any of the choice symbols.
+        """
+        if self.user_value is not None or self.user_selection:
+            self.user_value = self.user_selection = None
+            self._rec_invalidate()
+
+    @property
+    def referenced(self):
+        """
+        See the class documentation.
+        """
+        return {item for node in self.nodes for item in node.referenced}
+
+    @property
+    def orig_defaults(self):
+        """
+        See the class documentation.
+        """
+        return [d for node in self.nodes for d in node.orig_defaults]
+
+    def __repr__(self):
+        """
+        Returns a string with information about the choice when it is evaluated
+        on e.g. the interactive Python prompt.
+        """
+        fields = ["choice " + self.name if self.name else "choice",
+                  TYPE_TO_STR[self.type]]
+        add = fields.append
+
+        for node in self.nodes:
+            if node.prompt:
+                add('"{}"'.format(node.prompt[0]))
+
+        add("mode " + self.str_value)
+
+        if self.user_value is not None:
+            add('user mode {}'.format(TRI_TO_STR[self.user_value]))
+
+        if self.selection:
+            add("{} selected".format(self.selection.name))
+
+        if self.user_selection:
+            user_sel_str = "{} selected by user" \
+                           .format(self.user_selection.name)
+
+            if self.selection is not self.user_selection:
+                user_sel_str += " (overridden)"
+
+            add(user_sel_str)
+
+        add("visibility " + TRI_TO_STR[self.visibility])
+
+        if self.is_optional:
+            add("optional")
+
+        for node in self.nodes:
+            add("{}:{}".format(node.filename, node.linenr))
+
+        return "<{}>".format(", ".join(fields))
+
+    def __str__(self):
+        """
+        Returns a string representation of the choice when it is printed.
+        Matches the Kconfig format (though without the contained choice
+        symbols), with any parent dependencies propagated to the 'depends on'
+        condition.
+
+        The returned string does not end in a newline.
+
+        See Symbol.__str__() as well.
+        """
+        return self.custom_str(standard_sc_expr_str)
+
+    def custom_str(self, sc_expr_str_fn):
+        """
+        Works like Choice.__str__(), but allows a custom format to be used for
+        all symbol/choice references. See expr_str().
+        """
+        return "\n\n".join(node.custom_str(sc_expr_str_fn)
+                           for node in self.nodes)
+
+    #
+    # Private methods
+    #
+
+    def __init__(self):
+        """
+        Choice constructor -- not intended to be called directly by Kconfiglib
+        clients.
+        """
+        # These attributes are always set on the instance from outside and
+        # don't need defaults:
+        #   direct_dep
+        #   kconfig
+
+        # - UNKNOWN == 0
+        # - _visited is used during dep. loop detection
+        self.orig_type = self._visited = 0
+
+        self.nodes = []
+
+        self.syms = []
+        self.defaults = []
+
+        self.name = \
+        self.user_value = self.user_selection = \
+        self._cached_vis = self._cached_assignable = None
+
+        self._cached_selection = _NO_CACHED_SELECTION
+
+        # is_constant is checked by _depend_on(). Just set it to avoid having
+        # to special-case choices.
+        self.is_constant = self.is_optional = False
+
+        # See Kconfig._build_dep()
+        self._dependents = set()
+
+    def _assignable(self):
+        # Worker function for the 'assignable' attribute
+
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        vis = self.visibility
+
+        if not vis:
+            return ()
+
+        if vis == 2:
+            if not self.is_optional:
+                return (2,) if self.type is BOOL else (1, 2)
+            return (0, 2) if self.type is BOOL else (0, 1, 2)
+
+        # vis == 1
+
+        return (0, 1) if self.is_optional else (1,)
+
+    def _selection(self):
+        # Worker function for the 'selection' attribute
+
+        # Warning: See Symbol._rec_invalidate(), and note that this is a hidden
+        # function call (property magic)
+        if self.tri_value != 2:
+            # Not in y mode, so no selection
+            return None
+
+        # Use the user selection if it's visible
+        if self.user_selection and self.user_selection.visibility:
+            return self.user_selection
+
+        # Otherwise, check if we have a default
+        return self._selection_from_defaults()
+
+    def _selection_from_defaults(self):
+        # Check if we have a default
+        for sym, cond in self.defaults:
+            # The default symbol must be visible too
+            if expr_value(cond) and sym.visibility:
+                return sym
+
+        # Otherwise, pick the first visible symbol, if any
+        for sym in self.syms:
+            if sym.visibility:
+                return sym
+
+        # Couldn't find a selection
+        return None
+
+    def _invalidate(self):
+        self._cached_vis = self._cached_assignable = None
+        self._cached_selection = _NO_CACHED_SELECTION
+
+    def _rec_invalidate(self):
+        # See Symbol._rec_invalidate()
+
+        self._invalidate()
+
+        for item in self._dependents:
+            if item._cached_vis is not None:
+                item._rec_invalidate()
+
+
+class MenuNode(object):
+    """
+    Represents a menu node in the configuration. This corresponds to an entry
+    in e.g. the 'make menuconfig' interface, though non-visible choices, menus,
+    and comments also get menu nodes. If a symbol or choice is defined in
+    multiple locations, it gets one menu node for each location.
+
+    The top-level menu node, corresponding to the implicit top-level menu, is
+    available in Kconfig.top_node.
+
+    The menu nodes for a Symbol or Choice can be found in the
+    Symbol/Choice.nodes attribute. Menus and comments are represented as plain
+    menu nodes, with their text stored in the prompt attribute (prompt[0]).
+    This mirrors the C implementation.
+
+    The following attributes are available on MenuNode instances. They should
+    be viewed as read-only.
+
+    item:
+      Either a Symbol, a Choice, or one of the constants MENU and COMMENT.
+      Menus and comments are represented as plain menu nodes. Ifs are collapsed
+      (matching the C implementation) and do not appear in the final menu tree.
+
+    next:
+      The following menu node. None if there is no following node.
+
+    list:
+      The first child menu node. None if there are no children.
+
+      Choices and menus naturally have children, but Symbols can also have
+      children because of menus created automatically from dependencies (see
+      kconfig-language.txt).
+
+    parent:
+      The parent menu node. None if there is no parent.
+
+    prompt:
+      A (string, cond) tuple with the prompt for the menu node and its
+      conditional expression (which is self.kconfig.y if there is no
+      condition). None if there is no prompt.
+
+      For symbols and choices, the prompt is stored in the MenuNode rather than
+      the Symbol or Choice instance. For menus and comments, the prompt holds
+      the text.
+
+    defaults:
+      The 'default' properties for this particular menu node. See
+      symbol.defaults.
+
+      When evaluating defaults, you should use Symbol/Choice.defaults instead,
+      as it include properties from all menu nodes (a symbol/choice can have
+      multiple definition locations/menu nodes). MenuNode.defaults is meant for
+      documentation generation.
+
+    selects:
+      Like MenuNode.defaults, for selects.
+
+    implies:
+      Like MenuNode.defaults, for implies.
+
+    ranges:
+      Like MenuNode.defaults, for ranges.
+
+    orig_prompt:
+    orig_defaults:
+    orig_selects:
+    orig_implies:
+    orig_ranges:
+      These work the like the corresponding attributes without orig_*, but omit
+      any dependencies propagated from 'depends on' and surrounding 'if's (the
+      direct dependencies, stored in MenuNode.dep).
+
+      One use for this is generating less cluttered documentation, by only
+      showing the direct dependencies in one place.
+
+    help:
+      The help text for the menu node for Symbols and Choices. None if there is
+      no help text. Always stored in the node rather than the Symbol or Choice.
+      It is possible to have a separate help text at each location if a symbol
+      is defined in multiple locations.
+
+      Trailing whitespace (including a final newline) is stripped from the help
+      text. This was not the case before Kconfiglib 10.21.0, where the format
+      was undocumented.
+
+    dep:
+      The direct ('depends on') dependencies for the menu node, or
+      self.kconfig.y if there are no direct dependencies.
+
+      This attribute includes any dependencies from surrounding menus and ifs.
+      Those get propagated to the direct dependencies, and the resulting direct
+      dependencies in turn get propagated to the conditions of all properties.
+
+      If a symbol or choice is defined in multiple locations, only the
+      properties defined at a particular location get the corresponding
+      MenuNode.dep dependencies propagated to them.
+
+    visibility:
+      The 'visible if' dependencies for the menu node (which must represent a
+      menu), or self.kconfig.y if there are no 'visible if' dependencies.
+      'visible if' dependencies are recursively propagated to the prompts of
+      symbols and choices within the menu.
+
+    referenced:
+      A set() with all symbols and choices referenced in the properties and
+      property conditions of the menu node.
+
+      Also includes dependencies inherited from surrounding menus and ifs.
+      Choices appear in the dependencies of choice symbols.
+
+    is_menuconfig:
+      Set to True if the children of the menu node should be displayed in a
+      separate menu. This is the case for the following items:
+
+        - Menus (node.item == MENU)
+
+        - Choices
+
+        - Symbols defined with the 'menuconfig' keyword. The children come from
+          implicitly created submenus, and should be displayed in a separate
+          menu rather than being indented.
+
+      'is_menuconfig' is just a hint on how to display the menu node. It's
+      ignored internally by Kconfiglib, except when printing symbols.
+
+    filename/linenr:
+      The location where the menu node appears. The filename is relative to
+      $srctree (or to the current directory if $srctree isn't set), except
+      absolute paths are used for paths outside $srctree.
+
+    include_path:
+      A tuple of (filename, linenr) tuples, giving the locations of the
+      'source' statements via which the Kconfig file containing this menu node
+      was included. The first element is the location of the 'source' statement
+      in the top-level Kconfig file passed to Kconfig.__init__(), etc.
+
+      Note that the Kconfig file of the menu node itself isn't included. Check
+      'filename' and 'linenr' for that.
+
+    kconfig:
+      The Kconfig instance the menu node is from.
+    """
+    __slots__ = (
+        "dep",
+        "filename",
+        "help",
+        "include_path",
+        "is_menuconfig",
+        "item",
+        "kconfig",
+        "linenr",
+        "list",
+        "next",
+        "parent",
+        "prompt",
+        "visibility",
+
+        # Properties
+        "defaults",
+        "selects",
+        "implies",
+        "ranges",
+    )
+
+    def __init__(self):
+        # Properties defined on this particular menu node. A local 'depends on'
+        # only applies to these, in case a symbol is defined in multiple
+        # locations.
+        self.defaults = []
+        self.selects = []
+        self.implies = []
+        self.ranges = []
+
+    @property
+    def orig_prompt(self):
+        """
+        See the class documentation.
+        """
+        if not self.prompt:
+            return None
+        return (self.prompt[0], self._strip_dep(self.prompt[1]))
+
+    @property
+    def orig_defaults(self):
+        """
+        See the class documentation.
+        """
+        return [(default, self._strip_dep(cond))
+                for default, cond in self.defaults]
+
+    @property
+    def orig_selects(self):
+        """
+        See the class documentation.
+        """
+        return [(select, self._strip_dep(cond))
+                for select, cond in self.selects]
+
+    @property
+    def orig_implies(self):
+        """
+        See the class documentation.
+        """
+        return [(imply, self._strip_dep(cond))
+                for imply, cond in self.implies]
+
+    @property
+    def orig_ranges(self):
+        """
+        See the class documentation.
+        """
+        return [(low, high, self._strip_dep(cond))
+                for low, high, cond in self.ranges]
+
+    @property
+    def referenced(self):
+        """
+        See the class documentation.
+        """
+        # self.dep is included to catch dependencies from a lone 'depends on'
+        # when there are no properties to propagate it to
+        res = expr_items(self.dep)
+
+        if self.prompt:
+            res |= expr_items(self.prompt[1])
+
+        if self.item is MENU:
+            res |= expr_items(self.visibility)
+
+        for value, cond in self.defaults:
+            res |= expr_items(value)
+            res |= expr_items(cond)
+
+        for value, cond in self.selects:
+            res.add(value)
+            res |= expr_items(cond)
+
+        for value, cond in self.implies:
+            res.add(value)
+            res |= expr_items(cond)
+
+        for low, high, cond in self.ranges:
+            res.add(low)
+            res.add(high)
+            res |= expr_items(cond)
+
+        return res
+
+    def __repr__(self):
+        """
+        Returns a string with information about the menu node when it is
+        evaluated on e.g. the interactive Python prompt.
+        """
+        fields = []
+        add = fields.append
+
+        if self.item.__class__ is Symbol:
+            add("menu node for symbol " + self.item.name)
+
+        elif self.item.__class__ is Choice:
+            s = "menu node for choice"
+            if self.item.name is not None:
+                s += " " + self.item.name
+            add(s)
+
+        elif self.item is MENU:
+            add("menu node for menu")
+
+        else:  # self.item is COMMENT
+            add("menu node for comment")
+
+        if self.prompt:
+            add('prompt "{}" (visibility {})'.format(
+                self.prompt[0], TRI_TO_STR[expr_value(self.prompt[1])]))
+
+        if self.item.__class__ is Symbol and self.is_menuconfig:
+            add("is menuconfig")
+
+        add("deps " + TRI_TO_STR[expr_value(self.dep)])
+
+        if self.item is MENU:
+            add("'visible if' deps " + TRI_TO_STR[expr_value(self.visibility)])
+
+        if self.item.__class__ in _SYMBOL_CHOICE and self.help is not None:
+            add("has help")
+
+        if self.list:
+            add("has child")
+
+        if self.next:
+            add("has next")
+
+        add("{}:{}".format(self.filename, self.linenr))
+
+        return "<{}>".format(", ".join(fields))
+
+    def __str__(self):
+        """
+        Returns a string representation of the menu node. Matches the Kconfig
+        format, with any parent dependencies propagated to the 'depends on'
+        condition.
+
+        The output could (almost) be fed back into a Kconfig parser to redefine
+        the object associated with the menu node. See the module documentation
+        for a gotcha related to choice symbols.
+
+        For symbols and choices with multiple menu nodes (multiple definition
+        locations), properties that aren't associated with a particular menu
+        node are shown on all menu nodes ('option env=...', 'optional' for
+        choices, etc.).
+
+        The returned string does not end in a newline.
+        """
+        return self.custom_str(standard_sc_expr_str)
+
+    def custom_str(self, sc_expr_str_fn):
+        """
+        Works like MenuNode.__str__(), but allows a custom format to be used
+        for all symbol/choice references. See expr_str().
+        """
+        return self._menu_comment_node_str(sc_expr_str_fn) \
+               if self.item in _MENU_COMMENT else \
+               self._sym_choice_node_str(sc_expr_str_fn)
+
+    def _menu_comment_node_str(self, sc_expr_str_fn):
+        s = '{} "{}"'.format("menu" if self.item is MENU else "comment",
+                             self.prompt[0])
+
+        if self.dep is not self.kconfig.y:
+            s += "\n\tdepends on {}".format(expr_str(self.dep, sc_expr_str_fn))
+
+        if self.item is MENU and self.visibility is not self.kconfig.y:
+            s += "\n\tvisible if {}".format(expr_str(self.visibility,
+                                                     sc_expr_str_fn))
+
+        return s
+
+    def _sym_choice_node_str(self, sc_expr_str_fn):
+        def indent_add(s):
+            lines.append("\t" + s)
+
+        def indent_add_cond(s, cond):
+            if cond is not self.kconfig.y:
+                s += " if " + expr_str(cond, sc_expr_str_fn)
+            indent_add(s)
+
+        sc = self.item
+
+        if sc.__class__ is Symbol:
+            lines = [("menuconfig " if self.is_menuconfig else "config ")
+                     + sc.name]
+        else:
+            lines = ["choice " + sc.name if sc.name else "choice"]
+
+        if sc.orig_type and not self.prompt:  # sc.orig_type != UNKNOWN
+            # If there's a prompt, we'll use the '<type> "prompt"' shorthand
+            # instead
+            indent_add(TYPE_TO_STR[sc.orig_type])
+
+        if self.prompt:
+            if sc.orig_type:
+                prefix = TYPE_TO_STR[sc.orig_type]
+            else:
+                # Symbol defined without a type (which generates a warning)
+                prefix = "prompt"
+
+            indent_add_cond(prefix + ' "{}"'.format(escape(self.prompt[0])),
+                            self.orig_prompt[1])
+
+        if sc.__class__ is Symbol:
+            if sc.is_allnoconfig_y:
+                indent_add("option allnoconfig_y")
+
+            if sc is sc.kconfig.defconfig_list:
+                indent_add("option defconfig_list")
+
+            if sc.env_var is not None:
+                indent_add('option env="{}"'.format(sc.env_var))
+
+            if sc is sc.kconfig.modules:
+                indent_add("option modules")
+
+            for low, high, cond in self.orig_ranges:
+                indent_add_cond(
+                    "range {} {}".format(sc_expr_str_fn(low),
+                                         sc_expr_str_fn(high)),
+                    cond)
+
+        for default, cond in self.orig_defaults:
+            indent_add_cond("default " + expr_str(default, sc_expr_str_fn),
+                            cond)
+
+        if sc.__class__ is Choice and sc.is_optional:
+            indent_add("optional")
+
+        if sc.__class__ is Symbol:
+            for select, cond in self.orig_selects:
+                indent_add_cond("select " + sc_expr_str_fn(select), cond)
+
+            for imply, cond in self.orig_implies:
+                indent_add_cond("imply " + sc_expr_str_fn(imply), cond)
+
+        if self.dep is not sc.kconfig.y:
+            indent_add("depends on " + expr_str(self.dep, sc_expr_str_fn))
+
+        if self.help is not None:
+            indent_add("help")
+            for line in self.help.splitlines():
+                indent_add("  " + line)
+
+        return "\n".join(lines)
+
+    def _strip_dep(self, expr):
+        # Helper function for removing MenuNode.dep from 'expr'. Uses two
+        # pieces of internal knowledge: (1) Expressions are reused rather than
+        # copied, and (2) the direct dependencies always appear at the end.
+
+        # ... if dep -> ... if y
+        if self.dep is expr:
+            return self.kconfig.y
+
+        # (AND, X, dep) -> X
+        if expr.__class__ is tuple and expr[0] is AND and expr[2] is self.dep:
+            return expr[1]
+
+        return expr
+
+
+class Variable(object):
+    """
+    Represents a preprocessor variable/function.
+
+    The following attributes are available:
+
+    name:
+      The name of the variable.
+
+    value:
+      The unexpanded value of the variable.
+
+    expanded_value:
+      The expanded value of the variable. For simple variables (those defined
+      with :=), this will equal 'value'. Accessing this property will raise a
+      KconfigError if the expansion seems to be stuck in a loop.
+
+      Accessing this field is the same as calling expanded_value_w_args() with
+      no arguments. I hadn't considered function arguments when adding it. It
+      is retained for backwards compatibility though.
+
+    is_recursive:
+      True if the variable is recursive (defined with =).
+    """
+    __slots__ = (
+        "_n_expansions",
+        "is_recursive",
+        "kconfig",
+        "name",
+        "value",
+    )
+
+    @property
+    def expanded_value(self):
+        """
+        See the class documentation.
+        """
+        return self.expanded_value_w_args()
+
+    def expanded_value_w_args(self, *args):
+        """
+        Returns the expanded value of the variable/function. Any arguments
+        passed will be substituted for $(1), $(2), etc.
+
+        Raises a KconfigError if the expansion seems to be stuck in a loop.
+        """
+        return self.kconfig._fn_val((self.name,) + args)
+
+    def __repr__(self):
+        return "<variable {}, {}, value '{}'>" \
+               .format(self.name,
+                       "recursive" if self.is_recursive else "immediate",
+                       self.value)
+
+
+class KconfigError(Exception):
+    """
+    Exception raised for Kconfig-related errors.
+
+    KconfigError and KconfigSyntaxError are the same class. The
+    KconfigSyntaxError alias is only maintained for backwards compatibility.
+    """
+
+KconfigSyntaxError = KconfigError  # Backwards compatibility
+
+
+class InternalError(Exception):
+    "Never raised. Kept around for backwards compatibility."
+
+
+# Workaround:
+#
+# If 'errno' and 'strerror' are set on IOError, then __str__() always returns
+# "[Errno <errno>] <strerror>", ignoring any custom message passed to the
+# constructor. By defining our own subclass, we can use a custom message while
+# also providing 'errno', 'strerror', and 'filename' to scripts.
+class _KconfigIOError(IOError):
+    def __init__(self, ioerror, msg):
+        self.msg = msg
+        super(_KconfigIOError, self).__init__(
+            ioerror.errno, ioerror.strerror, ioerror.filename)
+
+    def __str__(self):
+        return self.msg
+
+
+#
+# Public functions
+#
+
+
+def expr_value(expr):
+    """
+    Evaluates the expression 'expr' to a tristate value. Returns 0 (n), 1 (m),
+    or 2 (y).
+
+    'expr' must be an already-parsed expression from a Symbol, Choice, or
+    MenuNode property. To evaluate an expression represented as a string, use
+    Kconfig.eval_string().
+
+    Passing subexpressions of expressions to this function works as expected.
+    """
+    if expr.__class__ is not tuple:
+        return expr.tri_value
+
+    if expr[0] is AND:
+        v1 = expr_value(expr[1])
+        # Short-circuit the n case as an optimization (~5% faster
+        # allnoconfig.py and allyesconfig.py, as of writing)
+        return 0 if not v1 else min(v1, expr_value(expr[2]))
+
+    if expr[0] is OR:
+        v1 = expr_value(expr[1])
+        # Short-circuit the y case as an optimization
+        return 2 if v1 == 2 else max(v1, expr_value(expr[2]))
+
+    if expr[0] is NOT:
+        return 2 - expr_value(expr[1])
+
+    # Relation
+    #
+    # Implements <, <=, >, >= comparisons as well. These were added to
+    # kconfig in 31847b67 (kconfig: allow use of relations other than
+    # (in)equality).
+
+    rel, v1, v2 = expr
+
+    # If both operands are strings...
+    if v1.orig_type is STRING and v2.orig_type is STRING:
+        # ...then compare them lexicographically
+        comp = _strcmp(v1.str_value, v2.str_value)
+    else:
+        # Otherwise, try to compare them as numbers
+        try:
+            comp = _sym_to_num(v1) - _sym_to_num(v2)
+        except ValueError:
+            # Fall back on a lexicographic comparison if the operands don't
+            # parse as numbers
+            comp = _strcmp(v1.str_value, v2.str_value)
+
+    return 2*(comp == 0 if rel is EQUAL else
+              comp != 0 if rel is UNEQUAL else
+              comp <  0 if rel is LESS else
+              comp <= 0 if rel is LESS_EQUAL else
+              comp >  0 if rel is GREATER else
+              comp >= 0)
+
+
+def standard_sc_expr_str(sc):
+    """
+    Standard symbol/choice printing function. Uses plain Kconfig syntax, and
+    displays choices as <choice> (or <choice NAME>, for named choices).
+
+    See expr_str().
+    """
+    if sc.__class__ is Symbol:
+        if sc.is_constant and sc.name not in STR_TO_TRI:
+            return '"{}"'.format(escape(sc.name))
+        return sc.name
+
+    return "<choice {}>".format(sc.name) if sc.name else "<choice>"
+
+
+def expr_str(expr, sc_expr_str_fn=standard_sc_expr_str):
+    """
+    Returns the string representation of the expression 'expr', as in a Kconfig
+    file.
+
+    Passing subexpressions of expressions to this function works as expected.
+
+    sc_expr_str_fn (default: standard_sc_expr_str):
+      This function is called for every symbol/choice (hence "sc") appearing in
+      the expression, with the symbol/choice as the argument. It is expected to
+      return a string to be used for the symbol/choice.
+
+      This can be used e.g. to turn symbols/choices into links when generating
+      documentation, or for printing the value of each symbol/choice after it.
+
+      Note that quoted values are represented as constants symbols
+      (Symbol.is_constant == True).
+    """
+    if expr.__class__ is not tuple:
+        return sc_expr_str_fn(expr)
+
+    if expr[0] is AND:
+        return "{} && {}".format(_parenthesize(expr[1], OR, sc_expr_str_fn),
+                                 _parenthesize(expr[2], OR, sc_expr_str_fn))
+
+    if expr[0] is OR:
+        # This turns A && B || C && D into "(A && B) || (C && D)", which is
+        # redundant, but more readable
+        return "{} || {}".format(_parenthesize(expr[1], AND, sc_expr_str_fn),
+                                 _parenthesize(expr[2], AND, sc_expr_str_fn))
+
+    if expr[0] is NOT:
+        if expr[1].__class__ is tuple:
+            return "!({})".format(expr_str(expr[1], sc_expr_str_fn))
+        return "!" + sc_expr_str_fn(expr[1])  # Symbol
+
+    # Relation
+    #
+    # Relation operands are always symbols (quoted strings are constant
+    # symbols)
+    return "{} {} {}".format(sc_expr_str_fn(expr[1]), REL_TO_STR[expr[0]],
+                             sc_expr_str_fn(expr[2]))
+
+
+def expr_items(expr):
+    """
+    Returns a set() of all items (symbols and choices) that appear in the
+    expression 'expr'.
+
+    Passing subexpressions of expressions to this function works as expected.
+    """
+    res = set()
+
+    def rec(subexpr):
+        if subexpr.__class__ is tuple:
+            # AND, OR, NOT, or relation
+
+            rec(subexpr[1])
+
+            # NOTs only have a single operand
+            if subexpr[0] is not NOT:
+                rec(subexpr[2])
+
+        else:
+            # Symbol or choice
+            res.add(subexpr)
+
+    rec(expr)
+    return res
+
+
+def split_expr(expr, op):
+    """
+    Returns a list containing the top-level AND or OR operands in the
+    expression 'expr', in the same (left-to-right) order as they appear in
+    the expression.
+
+    This can be handy e.g. for splitting (weak) reverse dependencies
+    from 'select' and 'imply' into individual selects/implies.
+
+    op:
+      Either AND to get AND operands, or OR to get OR operands.
+
+      (Having this as an operand might be more future-safe than having two
+      hardcoded functions.)
+
+
+    Pseudo-code examples:
+
+      split_expr( A                    , OR  )  ->  [A]
+      split_expr( A && B               , OR  )  ->  [A && B]
+      split_expr( A || B               , OR  )  ->  [A, B]
+      split_expr( A || B               , AND )  ->  [A || B]
+      split_expr( A || B || (C && D)   , OR  )  ->  [A, B, C && D]
+
+      # Second || is not at the top level
+      split_expr( A || (B && (C || D)) , OR )  ->  [A, B && (C || D)]
+
+      # Parentheses don't matter as long as we stay at the top level (don't
+      # encounter any non-'op' nodes)
+      split_expr( (A || B) || C        , OR )  ->  [A, B, C]
+      split_expr( A || (B || C)        , OR )  ->  [A, B, C]
+    """
+    res = []
+
+    def rec(subexpr):
+        if subexpr.__class__ is tuple and subexpr[0] is op:
+            rec(subexpr[1])
+            rec(subexpr[2])
+        else:
+            res.append(subexpr)
+
+    rec(expr)
+    return res
+
+
+def escape(s):
+    r"""
+    Escapes the string 's' in the same fashion as is done for display in
+    Kconfig format and when writing strings to a .config file. " and \ are
+    replaced by \" and \\, respectively.
+    """
+    # \ must be escaped before " to avoid double escaping
+    return s.replace("\\", r"\\").replace('"', r'\"')
+
+
+def unescape(s):
+    r"""
+    Unescapes the string 's'. \ followed by any character is replaced with just
+    that character. Used internally when reading .config files.
+    """
+    return _unescape_sub(r"\1", s)
+
+# unescape() helper
+_unescape_sub = re.compile(r"\\(.)").sub
+
+
+def standard_kconfig(description=None):
+    """
+    Argument parsing helper for tools that take a single optional Kconfig file
+    argument (default: Kconfig). Returns the Kconfig instance for the parsed
+    configuration. Uses argparse internally.
+
+    Exits with sys.exit() (which raises SystemExit) on errors.
+
+    description (default: None):
+      The 'description' passed to argparse.ArgumentParser().
+      argparse.RawDescriptionHelpFormatter is used, so formatting is preserved.
+    """
+    import argparse
+
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description=description)
+
+    parser.add_argument(
+        "kconfig",
+        metavar="KCONFIG",
+        default="Kconfig",
+        nargs="?",
+        help="Top-level Kconfig file (default: Kconfig)")
+
+    return Kconfig(parser.parse_args().kconfig, suppress_traceback=True)
+
+
+def standard_config_filename():
+    """
+    Helper for tools. Returns the value of KCONFIG_CONFIG (which specifies the
+    .config file to load/save) if it is set, and ".config" otherwise.
+
+    Calling load_config() with filename=None might give the behavior you want,
+    without having to use this function.
+    """
+    return os.getenv("KCONFIG_CONFIG", ".config")
+
+
+def load_allconfig(kconf, filename):
+    """
+    Use Kconfig.load_allconfig() instead, which was added in Kconfiglib 13.4.0.
+    Supported for backwards compatibility. Might be removed at some point after
+    a long period of deprecation warnings.
+    """
+    allconfig = os.getenv("KCONFIG_ALLCONFIG")
+    if allconfig is None:
+        return
+
+    def std_msg(e):
+        # "Upcasts" a _KconfigIOError to an IOError, removing the custom
+        # __str__() message. The standard message is better here.
+        #
+        # This might also convert an OSError to an IOError in obscure cases,
+        # but it's probably not a big deal. The distinction is shaky (see
+        # PEP-3151).
+        return IOError(e.errno, e.strerror, e.filename)
+
+    old_warn_assign_override = kconf.warn_assign_override
+    old_warn_assign_redun = kconf.warn_assign_redun
+    kconf.warn_assign_override = kconf.warn_assign_redun = False
+
+    if allconfig in ("", "1"):
+        try:
+            print(kconf.load_config(filename, False))
+        except EnvironmentError as e1:
+            try:
+                print(kconf.load_config("all.config", False))
+            except EnvironmentError as e2:
+                sys.exit("error: KCONFIG_ALLCONFIG is set, but neither {} "
+                         "nor all.config could be opened: {}, {}"
+                         .format(filename, std_msg(e1), std_msg(e2)))
+    else:
+        try:
+            print(kconf.load_config(allconfig, False))
+        except EnvironmentError as e:
+            sys.exit("error: KCONFIG_ALLCONFIG is set to '{}', which "
+                     "could not be opened: {}"
+                     .format(allconfig, std_msg(e)))
+
+    kconf.warn_assign_override = old_warn_assign_override
+    kconf.warn_assign_redun = old_warn_assign_redun
+
+
+#
+# Internal functions
+#
+
+
+def _visibility(sc):
+    # Symbols and Choices have a "visibility" that acts as an upper bound on
+    # the values a user can set for them, corresponding to the visibility in
+    # e.g. 'make menuconfig'. This function calculates the visibility for the
+    # Symbol or Choice 'sc' -- the logic is nearly identical.
+
+    vis = 0
+
+    for node in sc.nodes:
+        if node.prompt:
+            vis = max(vis, expr_value(node.prompt[1]))
+
+    if sc.__class__ is Symbol and sc.choice:
+        if sc.choice.orig_type is TRISTATE and \
+           sc.orig_type is not TRISTATE and sc.choice.tri_value != 2:
+            # Non-tristate choice symbols are only visible in y mode
+            return 0
+
+        if sc.orig_type is TRISTATE and vis == 1 and sc.choice.tri_value == 2:
+            # Choice symbols with m visibility are not visible in y mode
+            return 0
+
+    # Promote m to y if we're dealing with a non-tristate (possibly due to
+    # modules being disabled)
+    if vis == 1 and sc.type is not TRISTATE:
+        return 2
+
+    return vis
+
+
+def _depend_on(sc, expr):
+    # Adds 'sc' (symbol or choice) as a "dependee" to all symbols in 'expr'.
+    # Constant symbols in 'expr' are skipped as they can never change value
+    # anyway.
+
+    if expr.__class__ is tuple:
+        # AND, OR, NOT, or relation
+
+        _depend_on(sc, expr[1])
+
+        # NOTs only have a single operand
+        if expr[0] is not NOT:
+            _depend_on(sc, expr[2])
+
+    elif not expr.is_constant:
+        # Non-constant symbol, or choice
+        expr._dependents.add(sc)
+
+
+def _parenthesize(expr, type_, sc_expr_str_fn):
+    # expr_str() helper. Adds parentheses around expressions of type 'type_'.
+
+    if expr.__class__ is tuple and expr[0] is type_:
+        return "({})".format(expr_str(expr, sc_expr_str_fn))
+    return expr_str(expr, sc_expr_str_fn)
+
+
+def _ordered_unique(lst):
+    # Returns 'lst' with any duplicates removed, preserving order. This hacky
+    # version seems to be a common idiom. It relies on short-circuit evaluation
+    # and set.add() returning None, which is falsy.
+
+    seen = set()
+    seen_add = seen.add
+    return [x for x in lst if x not in seen and not seen_add(x)]
+
+
+def _is_base_n(s, n):
+    try:
+        int(s, n)
+        return True
+    except ValueError:
+        return False
+
+
+def _strcmp(s1, s2):
+    # strcmp()-alike that returns -1, 0, or 1
+
+    return (s1 > s2) - (s1 < s2)
+
+
+def _sym_to_num(sym):
+    # expr_value() helper for converting a symbol to a number. Raises
+    # ValueError for symbols that can't be converted.
+
+    # For BOOL and TRISTATE, n/m/y count as 0/1/2. This mirrors 9059a3493ef
+    # ("kconfig: fix relational operators for bool and tristate symbols") in
+    # the C implementation.
+    return sym.tri_value if sym.orig_type in _BOOL_TRISTATE else \
+           int(sym.str_value, _TYPE_TO_BASE[sym.orig_type])
+
+
+def _touch_dep_file(path, sym_name):
+    # If sym_name is MY_SYM_NAME, touches my/sym/name.h. See the sync_deps()
+    # docstring.
+
+    sym_path = path + os.sep + sym_name.lower().replace("_", os.sep) + ".h"
+    sym_path_dir = dirname(sym_path)
+    if not exists(sym_path_dir):
+        os.makedirs(sym_path_dir, 0o755)
+
+    # A kind of truncating touch, mirroring the C tools
+    os.close(os.open(
+        sym_path, os.O_WRONLY | os.O_CREAT | os.O_TRUNC, 0o644))
+
+
+def _save_old(path):
+    # See write_config()
+
+    def copy(src, dst):
+        # Import as needed, to save some startup time
+        import shutil
+        shutil.copyfile(src, dst)
+
+    if islink(path):
+        # Preserve symlinks
+        copy_fn = copy
+    elif hasattr(os, "replace"):
+        # Python 3 (3.3+) only. Best choice when available, because it
+        # removes <filename>.old on both *nix and Windows.
+        copy_fn = os.replace
+    elif os.name == "posix":
+        # Removes <filename>.old on POSIX systems
+        copy_fn = os.rename
+    else:
+        # Fall back on copying
+        copy_fn = copy
+
+    try:
+        copy_fn(path, path + ".old")
+    except Exception:
+        # Ignore errors from 'path' missing as well as other errors.
+        # <filename>.old file is usually more of a nice-to-have, and not worth
+        # erroring out over e.g. if <filename>.old happens to be a directory or
+        # <filename> is something like /dev/null.
+        pass
+
+
+def _locs(sc):
+    # Symbol/Choice.name_and_loc helper. Returns the "(defined at ...)" part of
+    # the string. 'sc' is a Symbol or Choice.
+
+    if sc.nodes:
+        return "(defined at {})".format(
+            ", ".join("{0.filename}:{0.linenr}".format(node)
+                      for node in sc.nodes))
+
+    return "(undefined)"
+
+
+# Menu manipulation
+
+
+def _expr_depends_on(expr, sym):
+    # Reimplementation of expr_depends_symbol() from mconf.c. Used to determine
+    # if a submenu should be implicitly created. This also influences which
+    # items inside choice statements are considered choice items.
+
+    if expr.__class__ is not tuple:
+        return expr is sym
+
+    if expr[0] in _EQUAL_UNEQUAL:
+        # Check for one of the following:
+        # sym = m/y, m/y = sym, sym != n, n != sym
+
+        left, right = expr[1:]
+
+        if right is sym:
+            left, right = right, left
+        elif left is not sym:
+            return False
+
+        return (expr[0] is EQUAL and right is sym.kconfig.m or
+                                     right is sym.kconfig.y) or \
+               (expr[0] is UNEQUAL and right is sym.kconfig.n)
+
+    return expr[0] is AND and \
+           (_expr_depends_on(expr[1], sym) or
+            _expr_depends_on(expr[2], sym))
+
+
+def _auto_menu_dep(node1, node2):
+    # Returns True if node2 has an "automatic menu dependency" on node1. If
+    # node2 has a prompt, we check its condition. Otherwise, we look directly
+    # at node2.dep.
+
+    return _expr_depends_on(node2.prompt[1] if node2.prompt else node2.dep,
+                            node1.item)
+
+
+def _flatten(node):
+    # "Flattens" menu nodes without prompts (e.g. 'if' nodes and non-visible
+    # symbols with children from automatic menu creation) so that their
+    # children appear after them instead. This gives a clean menu structure
+    # with no unexpected "jumps" in the indentation.
+    #
+    # Do not flatten promptless choices (which can appear "legitimately" if a
+    # named choice is defined in multiple locations to add on symbols). It
+    # looks confusing, and the menuconfig already shows all choice symbols if
+    # you enter the choice at some location with a prompt.
+
+    while node:
+        if node.list and not node.prompt and \
+           node.item.__class__ is not Choice:
+
+            last_node = node.list
+            while 1:
+                last_node.parent = node.parent
+                if not last_node.next:
+                    break
+                last_node = last_node.next
+
+            last_node.next = node.next
+            node.next = node.list
+            node.list = None
+
+        node = node.next
+
+
+def _remove_ifs(node):
+    # Removes 'if' nodes (which can be recognized by MenuNode.item being None),
+    # which are assumed to already have been flattened. The C implementation
+    # doesn't bother to do this, but we expose the menu tree directly, and it
+    # makes it nicer to work with.
+
+    cur = node.list
+    while cur and not cur.item:
+        cur = cur.next
+
+    node.list = cur
+
+    while cur:
+        next = cur.next
+        while next and not next.item:
+            next = next.next
+
+        # Equivalent to
+        #
+        #   cur.next = next
+        #   cur = next
+        #
+        # due to tricky Python semantics. The order matters.
+        cur.next = cur = next
+
+
+def _finalize_choice(node):
+    # Finalizes a choice, marking each symbol whose menu node has the choice as
+    # the parent as a choice symbol, and automatically determining types if not
+    # specified.
+
+    choice = node.item
+
+    cur = node.list
+    while cur:
+        if cur.item.__class__ is Symbol:
+            cur.item.choice = choice
+            choice.syms.append(cur.item)
+        cur = cur.next
+
+    # If no type is specified for the choice, its type is that of
+    # the first choice item with a specified type
+    if not choice.orig_type:
+        for item in choice.syms:
+            if item.orig_type:
+                choice.orig_type = item.orig_type
+                break
+
+    # Each choice item of UNKNOWN type gets the type of the choice
+    for sym in choice.syms:
+        if not sym.orig_type:
+            sym.orig_type = choice.orig_type
+
+
+def _check_dep_loop_sym(sym, ignore_choice):
+    # Detects dependency loops using depth-first search on the dependency graph
+    # (which is calculated earlier in Kconfig._build_dep()).
+    #
+    # Algorithm:
+    #
+    #  1. Symbols/choices start out with _visited = 0, meaning unvisited.
+    #
+    #  2. When a symbol/choice is first visited, _visited is set to 1, meaning
+    #     "visited, potentially part of a dependency loop". The recursive
+    #     search then continues from the symbol/choice.
+    #
+    #  3. If we run into a symbol/choice X with _visited already set to 1,
+    #     there's a dependency loop. The loop is found on the call stack by
+    #     recording symbols while returning ("on the way back") until X is seen
+    #     again.
+    #
+    #  4. Once a symbol/choice and all its dependencies (or dependents in this
+    #     case) have been checked recursively without detecting any loops, its
+    #     _visited is set to 2, meaning "visited, not part of a dependency
+    #     loop".
+    #
+    #     This saves work if we run into the symbol/choice again in later calls
+    #     to _check_dep_loop_sym(). We just return immediately.
+    #
+    # Choices complicate things, as every choice symbol depends on every other
+    # choice symbol in a sense. When a choice is "entered" via a choice symbol
+    # X, we visit all choice symbols from the choice except X, and prevent
+    # immediately revisiting the choice with a flag (ignore_choice).
+    #
+    # Maybe there's a better way to handle this (different flags or the
+    # like...)
+
+    if not sym._visited:
+        # sym._visited == 0, unvisited
+
+        sym._visited = 1
+
+        for dep in sym._dependents:
+            # Choices show up in Symbol._dependents when the choice has the
+            # symbol in a 'prompt' or 'default' condition (e.g.
+            # 'default ... if SYM').
+            #
+            # Since we aren't entering the choice via a choice symbol, all
+            # choice symbols need to be checked, hence the None.
+            loop = _check_dep_loop_choice(dep, None) \
+                   if dep.__class__ is Choice \
+                   else _check_dep_loop_sym(dep, False)
+
+            if loop:
+                # Dependency loop found
+                return _found_dep_loop(loop, sym)
+
+        if sym.choice and not ignore_choice:
+            loop = _check_dep_loop_choice(sym.choice, sym)
+            if loop:
+                # Dependency loop found
+                return _found_dep_loop(loop, sym)
+
+        # The symbol is not part of a dependency loop
+        sym._visited = 2
+
+        # No dependency loop found
+        return None
+
+    if sym._visited == 2:
+        # The symbol was checked earlier and is already known to not be part of
+        # a dependency loop
+        return None
+
+    # sym._visited == 1, found a dependency loop. Return the symbol as the
+    # first element in it.
+    return (sym,)
+
+
+def _check_dep_loop_choice(choice, skip):
+    if not choice._visited:
+        # choice._visited == 0, unvisited
+
+        choice._visited = 1
+
+        # Check for loops involving choice symbols. If we came here via a
+        # choice symbol, skip that one, as we'd get a false positive
+        # '<sym FOO> -> <choice> -> <sym FOO>' loop otherwise.
+        for sym in choice.syms:
+            if sym is not skip:
+                # Prevent the choice from being immediately re-entered via the
+                # "is a choice symbol" path by passing True
+                loop = _check_dep_loop_sym(sym, True)
+                if loop:
+                    # Dependency loop found
+                    return _found_dep_loop(loop, choice)
+
+        # The choice is not part of a dependency loop
+        choice._visited = 2
+
+        # No dependency loop found
+        return None
+
+    if choice._visited == 2:
+        # The choice was checked earlier and is already known to not be part of
+        # a dependency loop
+        return None
+
+    # choice._visited == 1, found a dependency loop. Return the choice as the
+    # first element in it.
+    return (choice,)
+
+
+def _found_dep_loop(loop, cur):
+    # Called "on the way back" when we know we have a loop
+
+    # Is the symbol/choice 'cur' where the loop started?
+    if cur is not loop[0]:
+        # Nope, it's just a part of the loop
+        return loop + (cur,)
+
+    # Yep, we have the entire loop. Throw an exception that shows it.
+
+    msg = "\nDependency loop\n" \
+            "===============\n\n"
+
+    for item in loop:
+        if item is not loop[0]:
+            msg += "...depends on "
+            if item.__class__ is Symbol and item.choice:
+                msg += "the choice symbol "
+
+        msg += "{}, with definition...\n\n{}\n\n" \
+               .format(item.name_and_loc, item)
+
+        # Small wart: Since we reuse the already calculated
+        # Symbol/Choice._dependents sets for recursive dependency detection, we
+        # lose information on whether a dependency came from a 'select'/'imply'
+        # condition or e.g. a 'depends on'.
+        #
+        # This might cause selecting symbols to "disappear". For example,
+        # a symbol B having 'select A if C' gives a direct dependency from A to
+        # C, since it corresponds to a reverse dependency of B && C.
+        #
+        # Always print reverse dependencies for symbols that have them to make
+        # sure information isn't lost. I wonder if there's some neat way to
+        # improve this.
+
+        if item.__class__ is Symbol:
+            if item.rev_dep is not item.kconfig.n:
+                msg += "(select-related dependencies: {})\n\n" \
+                       .format(expr_str(item.rev_dep))
+
+            if item.weak_rev_dep is not item.kconfig.n:
+                msg += "(imply-related dependencies: {})\n\n" \
+                       .format(expr_str(item.rev_dep))
+
+    msg += "...depends again on " + loop[0].name_and_loc
+
+    raise KconfigError(msg)
+
+
+def _decoding_error(e, filename, macro_linenr=None):
+    # Gives the filename and context for UnicodeDecodeError's, which are a pain
+    # to debug otherwise. 'e' is the UnicodeDecodeError object.
+    #
+    # If the decoding error is for the output of a $(shell,...) command,
+    # macro_linenr holds the line number where it was run (the exact line
+    # number isn't available for decoding errors in files).
+
+    raise KconfigError(
+        "\n"
+        "Malformed {} in {}\n"
+        "Context: {}\n"
+        "Problematic data: {}\n"
+        "Reason: {}".format(
+            e.encoding,
+            "'{}'".format(filename) if macro_linenr is None else
+                "output from macro at {}:{}".format(filename, macro_linenr),
+            e.object[max(e.start - 40, 0):e.end + 40],
+            e.object[e.start:e.end],
+            e.reason))
+
+
+def _warn_verbose_deprecated(fn_name):
+    sys.stderr.write(
+        "Deprecation warning: {0}()'s 'verbose' argument has no effect. Since "
+        "Kconfiglib 12.0.0, the message is returned from {0}() instead, "
+        "and is always generated. Do e.g. print(kconf.{0}()) if you want to "
+        "want to show a message like \"Loaded configuration '.config'\" on "
+        "stdout. The old API required ugly hacks to reuse messages in "
+        "configuration interfaces.\n".format(fn_name))
+
+
+# Predefined preprocessor functions
+
+
+def _filename_fn(kconf, _):
+    return kconf.filename
+
+
+def _lineno_fn(kconf, _):
+    return str(kconf.linenr)
+
+
+def _info_fn(kconf, _, msg):
+    print("{}:{}: {}".format(kconf.filename, kconf.linenr, msg))
+
+    return ""
+
+
+def _warning_if_fn(kconf, _, cond, msg):
+    if cond == "y":
+        kconf._warn(msg, kconf.filename, kconf.linenr)
+
+    return ""
+
+
+def _error_if_fn(kconf, _, cond, msg):
+    if cond == "y":
+        raise KconfigError("{}:{}: {}".format(
+            kconf.filename, kconf.linenr, msg))
+
+    return ""
+
+
+def _shell_fn(kconf, _, command):
+    import subprocess  # Only import as needed, to save some startup time
+
+    stdout, stderr = subprocess.Popen(
+        command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE
+    ).communicate()
+
+    if not _IS_PY2:
+        try:
+            stdout = stdout.decode(kconf._encoding)
+            stderr = stderr.decode(kconf._encoding)
+        except UnicodeDecodeError as e:
+            _decoding_error(e, kconf.filename, kconf.linenr)
+
+    if stderr:
+        kconf._warn("'{}' wrote to stderr: {}".format(
+                        command, "\n".join(stderr.splitlines())),
+                    kconf.filename, kconf.linenr)
+
+    # Universal newlines with splitlines() (to prevent e.g. stray \r's in
+    # command output on Windows), trailing newline removal, and
+    # newline-to-space conversion.
+    #
+    # On Python 3 versions before 3.6, it's not possible to specify the
+    # encoding when passing universal_newlines=True to Popen() (the 'encoding'
+    # parameter was added in 3.6), so we do this manual version instead.
+    return "\n".join(stdout.splitlines()).rstrip("\n").replace("\n", " ")
+
+#
+# Global constants
+#
+
+TRI_TO_STR = {
+    0: "n",
+    1: "m",
+    2: "y",
+}
+
+STR_TO_TRI = {
+    "n": 0,
+    "m": 1,
+    "y": 2,
+}
+
+# Constant representing that there's no cached choice selection. This is
+# distinct from a cached None (no selection). Any object that's not None or a
+# Symbol will do. We test this with 'is'.
+_NO_CACHED_SELECTION = 0
+
+# Are we running on Python 2?
+_IS_PY2 = sys.version_info[0] < 3
+
+try:
+    _UNAME_RELEASE = os.uname()[2]
+except AttributeError:
+    # Only import as needed, to save some startup time
+    import platform
+    _UNAME_RELEASE = platform.uname()[2]
+
+# The token and type constants below are safe to test with 'is', which is a bit
+# faster (~30% faster on my machine, and a few % faster for total parsing
+# time), even without assuming Python's small integer optimization (which
+# caches small integer objects). The constants end up pointing to unique
+# integer objects, and since we consistently refer to them via the names below,
+# we always get the same object.
+#
+# Client code should use == though.
+
+# Tokens, with values 1, 2, ... . Avoiding 0 simplifies some checks by making
+# all tokens except empty strings truthy.
+(
+    _T_ALLNOCONFIG_Y,
+    _T_AND,
+    _T_BOOL,
+    _T_CHOICE,
+    _T_CLOSE_PAREN,
+    _T_COMMENT,
+    _T_CONFIG,
+    _T_DEFAULT,
+    _T_DEFCONFIG_LIST,
+    _T_DEF_BOOL,
+    _T_DEF_HEX,
+    _T_DEF_INT,
+    _T_DEF_STRING,
+    _T_DEF_TRISTATE,
+    _T_DEPENDS,
+    _T_ENDCHOICE,
+    _T_ENDIF,
+    _T_ENDMENU,
+    _T_ENV,
+    _T_EQUAL,
+    _T_GREATER,
+    _T_GREATER_EQUAL,
+    _T_HELP,
+    _T_HEX,
+    _T_IF,
+    _T_IMPLY,
+    _T_INT,
+    _T_LESS,
+    _T_LESS_EQUAL,
+    _T_MAINMENU,
+    _T_MENU,
+    _T_MENUCONFIG,
+    _T_MODULES,
+    _T_NOT,
+    _T_ON,
+    _T_OPEN_PAREN,
+    _T_OPTION,
+    _T_OPTIONAL,
+    _T_OR,
+    _T_ORSOURCE,
+    _T_OSOURCE,
+    _T_PROMPT,
+    _T_RANGE,
+    _T_RSOURCE,
+    _T_SELECT,
+    _T_SOURCE,
+    _T_STRING,
+    _T_TRISTATE,
+    _T_UNEQUAL,
+    _T_VISIBLE,
+) = range(1, 51)
+
+# Keyword to token map, with the get() method assigned directly as a small
+# optimization
+_get_keyword = {
+    "---help---":     _T_HELP,
+    "allnoconfig_y":  _T_ALLNOCONFIG_Y,
+    "bool":           _T_BOOL,
+    "boolean":        _T_BOOL,
+    "choice":         _T_CHOICE,
+    "comment":        _T_COMMENT,
+    "config":         _T_CONFIG,
+    "def_bool":       _T_DEF_BOOL,
+    "def_hex":        _T_DEF_HEX,
+    "def_int":        _T_DEF_INT,
+    "def_string":     _T_DEF_STRING,
+    "def_tristate":   _T_DEF_TRISTATE,
+    "default":        _T_DEFAULT,
+    "defconfig_list": _T_DEFCONFIG_LIST,
+    "depends":        _T_DEPENDS,
+    "endchoice":      _T_ENDCHOICE,
+    "endif":          _T_ENDIF,
+    "endmenu":        _T_ENDMENU,
+    "env":            _T_ENV,
+    "grsource":       _T_ORSOURCE,  # Backwards compatibility
+    "gsource":        _T_OSOURCE,   # Backwards compatibility
+    "help":           _T_HELP,
+    "hex":            _T_HEX,
+    "if":             _T_IF,
+    "imply":          _T_IMPLY,
+    "int":            _T_INT,
+    "mainmenu":       _T_MAINMENU,
+    "menu":           _T_MENU,
+    "menuconfig":     _T_MENUCONFIG,
+    "modules":        _T_MODULES,
+    "on":             _T_ON,
+    "option":         _T_OPTION,
+    "optional":       _T_OPTIONAL,
+    "orsource":       _T_ORSOURCE,
+    "osource":        _T_OSOURCE,
+    "prompt":         _T_PROMPT,
+    "range":          _T_RANGE,
+    "rsource":        _T_RSOURCE,
+    "select":         _T_SELECT,
+    "source":         _T_SOURCE,
+    "string":         _T_STRING,
+    "tristate":       _T_TRISTATE,
+    "visible":        _T_VISIBLE,
+}.get
+
+# The constants below match the value of the corresponding tokens to remove the
+# need for conversion
+
+# Node types
+MENU    = _T_MENU
+COMMENT = _T_COMMENT
+
+# Expression types
+AND           = _T_AND
+OR            = _T_OR
+NOT           = _T_NOT
+EQUAL         = _T_EQUAL
+UNEQUAL       = _T_UNEQUAL
+LESS          = _T_LESS
+LESS_EQUAL    = _T_LESS_EQUAL
+GREATER       = _T_GREATER
+GREATER_EQUAL = _T_GREATER_EQUAL
+
+REL_TO_STR = {
+    EQUAL:         "=",
+    UNEQUAL:       "!=",
+    LESS:          "<",
+    LESS_EQUAL:    "<=",
+    GREATER:       ">",
+    GREATER_EQUAL: ">=",
+}
+
+# Symbol/choice types. UNKNOWN is 0 (falsy) to simplify some checks.
+# Client code shouldn't rely on it though, as it was non-zero in
+# older versions.
+UNKNOWN  = 0
+BOOL     = _T_BOOL
+TRISTATE = _T_TRISTATE
+STRING   = _T_STRING
+INT      = _T_INT
+HEX      = _T_HEX
+
+TYPE_TO_STR = {
+    UNKNOWN:  "unknown",
+    BOOL:     "bool",
+    TRISTATE: "tristate",
+    STRING:   "string",
+    INT:      "int",
+    HEX:      "hex",
+}
+
+# Used in comparisons. 0 means the base is inferred from the format of the
+# string.
+_TYPE_TO_BASE = {
+    HEX:      16,
+    INT:      10,
+    STRING:   0,
+    UNKNOWN:  0,
+}
+
+# def_bool -> BOOL, etc.
+_DEF_TOKEN_TO_TYPE = {
+    _T_DEF_BOOL:     BOOL,
+    _T_DEF_HEX:      HEX,
+    _T_DEF_INT:      INT,
+    _T_DEF_STRING:   STRING,
+    _T_DEF_TRISTATE: TRISTATE,
+}
+
+# Tokens after which strings are expected. This is used to tell strings from
+# constant symbol references during tokenization, both of which are enclosed in
+# quotes.
+#
+# Identifier-like lexemes ("missing quotes") are also treated as strings after
+# these tokens. _T_CHOICE is included to avoid symbols being registered for
+# named choices.
+_STRING_LEX = frozenset({
+    _T_BOOL,
+    _T_CHOICE,
+    _T_COMMENT,
+    _T_HEX,
+    _T_INT,
+    _T_MAINMENU,
+    _T_MENU,
+    _T_ORSOURCE,
+    _T_OSOURCE,
+    _T_PROMPT,
+    _T_RSOURCE,
+    _T_SOURCE,
+    _T_STRING,
+    _T_TRISTATE,
+})
+
+# Various sets for quick membership tests. Gives a single global lookup and
+# avoids creating temporary dicts/tuples.
+
+_TYPE_TOKENS = frozenset({
+    _T_BOOL,
+    _T_TRISTATE,
+    _T_INT,
+    _T_HEX,
+    _T_STRING,
+})
+
+_SOURCE_TOKENS = frozenset({
+    _T_SOURCE,
+    _T_RSOURCE,
+    _T_OSOURCE,
+    _T_ORSOURCE,
+})
+
+_REL_SOURCE_TOKENS = frozenset({
+    _T_RSOURCE,
+    _T_ORSOURCE,
+})
+
+# Obligatory (non-optional) sources
+_OBL_SOURCE_TOKENS = frozenset({
+    _T_SOURCE,
+    _T_RSOURCE,
+})
+
+_BOOL_TRISTATE = frozenset({
+    BOOL,
+    TRISTATE,
+})
+
+_BOOL_TRISTATE_UNKNOWN = frozenset({
+    BOOL,
+    TRISTATE,
+    UNKNOWN,
+})
+
+_INT_HEX = frozenset({
+    INT,
+    HEX,
+})
+
+_SYMBOL_CHOICE = frozenset({
+    Symbol,
+    Choice,
+})
+
+_MENU_COMMENT = frozenset({
+    MENU,
+    COMMENT,
+})
+
+_EQUAL_UNEQUAL = frozenset({
+    EQUAL,
+    UNEQUAL,
+})
+
+_RELATIONS = frozenset({
+    EQUAL,
+    UNEQUAL,
+    LESS,
+    LESS_EQUAL,
+    GREATER,
+    GREATER_EQUAL,
+})
+
+# Helper functions for getting compiled regular expressions, with the needed
+# matching function returned directly as a small optimization.
+#
+# Use ASCII regex matching on Python 3. It's already the default on Python 2.
+
+
+def _re_match(regex):
+    return re.compile(regex, 0 if _IS_PY2 else re.ASCII).match
+
+
+def _re_search(regex):
+    return re.compile(regex, 0 if _IS_PY2 else re.ASCII).search
+
+
+# Various regular expressions used during parsing
+
+# The initial token on a line. Also eats leading and trailing whitespace, so
+# that we can jump straight to the next token (or to the end of the line if
+# there is only one token).
+#
+# This regex will also fail to match for empty lines and comment lines.
+#
+# '$' is included to detect preprocessor variable assignments with macro
+# expansions in the left-hand side.
+_command_match = _re_match(r"\s*([A-Za-z0-9_$-]+)\s*")
+
+# An identifier/keyword after the first token. Also eats trailing whitespace.
+# '$' is included to detect identifiers containing macro expansions.
+_id_keyword_match = _re_match(r"([A-Za-z0-9_$/.-]+)\s*")
+
+# A fragment in the left-hand side of a preprocessor variable assignment. These
+# are the portions between macro expansions ($(foo)). Macros are supported in
+# the LHS (variable name).
+_assignment_lhs_fragment_match = _re_match("[A-Za-z0-9_-]*")
+
+# The assignment operator and value (right-hand side) in a preprocessor
+# variable assignment
+_assignment_rhs_match = _re_match(r"\s*(=|:=|\+=)\s*(.*)")
+
+# Special characters/strings while expanding a macro ('(', ')', ',', and '$(')
+_macro_special_search = _re_search(r"\(|\)|,|\$\(")
+
+# Special characters/strings while expanding a string (quotes, '\', and '$(')
+_string_special_search = _re_search(r'"|\'|\\|\$\(')
+
+# Special characters/strings while expanding a symbol name. Also includes
+# end-of-line, in case the macro is the last thing on the line.
+_name_special_search = _re_search(r'[^A-Za-z0-9_$/.-]|\$\(|$')
+
+# A valid right-hand side for an assignment to a string symbol in a .config
+# file, including escaped characters. Extracts the contents.
+_conf_string_match = _re_match(r'"((?:[^\\"]|\\.)*)"')
diff --git a/scripts/Kconfiglib/menuconfig.py b/scripts/Kconfiglib/menuconfig.py
new file mode 100755
index 00000000000..7e765d36f98
--- /dev/null
+++ b/scripts/Kconfiglib/menuconfig.py
@@ -0,0 +1,3278 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Nordic Semiconductor ASA and Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Overview
+========
+
+A curses-based Python 2/3 menuconfig implementation. The interface should feel
+familiar to people used to mconf ('make menuconfig').
+
+Supports the same keys as mconf, and also supports a set of keybindings
+inspired by Vi:
+
+  J/K     : Down/Up
+  L       : Enter menu/Toggle item
+  H       : Leave menu
+  Ctrl-D/U: Page Down/Page Up
+  G/End   : Jump to end of list
+  g/Home  : Jump to beginning of list
+
+[Space] toggles values if possible, and enters menus otherwise. [Enter] works
+the other way around.
+
+The mconf feature where pressing a key jumps to a menu entry with that
+character in it in the current menu isn't supported. A jump-to feature for
+jumping directly to any symbol (including invisible symbols), choice, menu or
+comment (as in a Kconfig 'comment "Foo"') is available instead.
+
+A few different modes are available:
+
+  F: Toggle show-help mode, which shows the help text of the currently selected
+  item in the window at the bottom of the menu display. This is handy when
+  browsing through options.
+
+  C: Toggle show-name mode, which shows the symbol name before each symbol menu
+  entry
+
+  A: Toggle show-all mode, which shows all items, including currently invisible
+  items and items that lack a prompt. Invisible items are drawn in a different
+  style to make them stand out.
+
+
+Running
+=======
+
+menuconfig.py can be run either as a standalone executable or by calling the
+menuconfig() function with an existing Kconfig instance. The second option is a
+bit inflexible in that it will still load and save .config, etc.
+
+When run in standalone mode, the top-level Kconfig file to load can be passed
+as a command-line argument. With no argument, it defaults to "Kconfig".
+
+The KCONFIG_CONFIG environment variable specifies the .config file to load (if
+it exists) and save. If KCONFIG_CONFIG is unset, ".config" is used.
+
+When overwriting a configuration file, the old version is saved to
+<filename>.old (e.g. .config.old).
+
+$srctree is supported through Kconfiglib.
+
+
+Color schemes
+=============
+
+It is possible to customize the color scheme by setting the MENUCONFIG_STYLE
+environment variable. For example, setting it to 'aquatic' will enable an
+alternative, less yellow, more 'make menuconfig'-like color scheme, contributed
+by Mitja Horvat (pinkfluid).
+
+This is the current list of built-in styles:
+    - default       classic Kconfiglib theme with a yellow accent
+    - monochrome    colorless theme (uses only bold and standout) attributes,
+                    this style is used if the terminal doesn't support colors
+    - aquatic       blue-tinted style loosely resembling the lxdialog theme
+
+It is possible to customize the current style by changing colors of UI
+elements on the screen. This is the list of elements that can be stylized:
+
+    - path          Top row in the main display, with the menu path
+    - separator     Separator lines between windows. Also used for the top line
+                    in the symbol information display.
+    - list          List of items, e.g. the main display
+    - selection     Style for the selected item
+    - inv-list      Like list, but for invisible items. Used in show-all mode.
+    - inv-selection Like selection, but for invisible items. Used in show-all
+                    mode.
+    - help          Help text windows at the bottom of various fullscreen
+                    dialogs
+    - show-help     Window showing the help text in show-help mode
+    - frame         Frame around dialog boxes
+    - body          Body of dialog boxes
+    - edit          Edit box in pop-up dialogs
+    - jump-edit     Edit box in jump-to dialog
+    - text          Symbol information text
+
+The color definition is a comma separated list of attributes:
+
+    - fg:COLOR      Set the foreground/background colors. COLOR can be one of
+      * or *        the basic 16 colors (black, red, green, yellow, blue,
+    - bg:COLOR      magenta, cyan, white and brighter versions, for example,
+                    brightred). On terminals that support more than 8 colors,
+                    you can also directly put in a color number, e.g. fg:123
+                    (hexadecimal and octal constants are accepted as well).
+                    Colors outside the range -1..curses.COLORS-1 (which is
+                    terminal-dependent) are ignored (with a warning). The COLOR
+                    can be also specified using a RGB value in the HTML
+                    notation, for example #RRGGBB. If the terminal supports
+                    color changing, the color is rendered accurately.
+                    Otherwise, the visually nearest color is used.
+
+                    If the background or foreground color of an element is not
+                    specified, it defaults to -1, representing the default
+                    terminal foreground or background color.
+
+                    Note: On some terminals a bright version of the color
+                    implies bold.
+    - bold          Use bold text
+    - underline     Use underline text
+    - standout      Standout text attribute (reverse color)
+
+More often than not, some UI elements share the same color definition. In such
+cases the right value may specify an UI element from which the color definition
+will be copied. For example, "separator=help" will apply the current color
+definition for "help" to "separator".
+
+A keyword without the '=' is assumed to be a style template. The template name
+is looked up in the built-in styles list and the style definition is expanded
+in-place. With this, built-in styles can be used as basis for new styles.
+
+For example, take the aquatic theme and give it a red selection bar:
+
+MENUCONFIG_STYLE="aquatic selection=fg:white,bg:red"
+
+If there's an error in the style definition or if a missing style is assigned
+to, the assignment will be ignored, along with a warning being printed on
+stderr.
+
+The 'default' theme is always implicitly parsed first, so the following two
+settings have the same effect:
+
+    MENUCONFIG_STYLE="selection=fg:white,bg:red"
+    MENUCONFIG_STYLE="default selection=fg:white,bg:red"
+
+If the terminal doesn't support colors, the 'monochrome' theme is used, and
+MENUCONFIG_STYLE is ignored. The assumption is that the environment is broken
+somehow, and that the important thing is to get something usable.
+
+
+Other features
+==============
+
+  - Seamless terminal resizing
+
+  - No dependencies on *nix, as the 'curses' module is in the Python standard
+    library
+
+  - Unicode text entry
+
+  - Improved information screen compared to mconf:
+
+      * Expressions are split up by their top-level &&/|| operands to improve
+        readability
+
+      * Undefined symbols in expressions are pointed out
+
+      * Menus and comments have information displays
+
+      * Kconfig definitions are printed
+
+      * The include path is shown, listing the locations of the 'source'
+        statements that included the Kconfig file of the symbol (or other
+        item)
+
+
+Limitations
+===========
+
+Doesn't work out of the box on Windows, but can be made to work with
+
+    pip install windows-curses
+
+See the https://github.com/zephyrproject-rtos/windows-curses repository.
+"""
+from __future__ import print_function
+
+import os
+import sys
+
+_IS_WINDOWS = os.name == "nt"  # Are we running on Windows?
+
+try:
+    import curses
+except ImportError as e:
+    if not _IS_WINDOWS:
+        raise
+    sys.exit("""\
+menuconfig failed to import the standard Python 'curses' library. Try
+installing a package like windows-curses
+(https://github.com/zephyrproject-rtos/windows-curses) by running this command
+in cmd.exe:
+
+    pip install windows-curses
+
+Starting with Kconfiglib 13.0.0, windows-curses is no longer automatically
+installed when installing Kconfiglib via pip on Windows (because it breaks
+installation on MSYS2).
+
+Exception:
+{}: {}""".format(type(e).__name__, e))
+
+import errno
+import locale
+import re
+import textwrap
+
+from kconfiglib import Symbol, Choice, MENU, COMMENT, MenuNode, \
+                       BOOL, TRISTATE, STRING, INT, HEX, \
+                       AND, OR, \
+                       expr_str, expr_value, split_expr, \
+                       standard_sc_expr_str, \
+                       TRI_TO_STR, TYPE_TO_STR, \
+                       standard_kconfig, standard_config_filename
+
+
+#
+# Configuration variables
+#
+
+# If True, try to change LC_CTYPE to a UTF-8 locale if it is set to the C
+# locale (which implies ASCII). This fixes curses Unicode I/O issues on systems
+# with bad defaults. ncurses configures itself from the locale settings.
+#
+# Related PEP: https://www.python.org/dev/peps/pep-0538/
+_CHANGE_C_LC_CTYPE_TO_UTF8 = True
+
+# How many steps an implicit submenu will be indented. Implicit submenus are
+# created when an item depends on the symbol before it. Note that symbols
+# defined with 'menuconfig' create a separate menu instead of indenting.
+_SUBMENU_INDENT = 4
+
+# Number of steps for Page Up/Down to jump
+_PG_JUMP = 6
+
+# Height of the help window in show-help mode
+_SHOW_HELP_HEIGHT = 8
+
+# How far the cursor needs to be from the edge of the window before it starts
+# to scroll. Used for the main menu display, the information display, the
+# search display, and for text boxes.
+_SCROLL_OFFSET = 5
+
+# Minimum width of dialogs that ask for text input
+_INPUT_DIALOG_MIN_WIDTH = 30
+
+# Number of arrows pointing up/down to draw when a window is scrolled
+_N_SCROLL_ARROWS = 14
+
+# Lines of help text shown at the bottom of the "main" display
+_MAIN_HELP_LINES = """
+[Space/Enter] Toggle/enter  [ESC] Leave menu           [S] Save
+[O] Load                    [?] Symbol info            [/] Jump to symbol
+[F] Toggle show-help mode   [C] Toggle show-name mode  [A] Toggle show-all mode
+[Q] Quit (prompts for save) [D] Save minimal config (advanced)
+"""[1:-1].split("\n")
+
+# Lines of help text shown at the bottom of the information dialog
+_INFO_HELP_LINES = """
+[ESC/q] Return to menu      [/] Jump to symbol
+"""[1:-1].split("\n")
+
+# Lines of help text shown at the bottom of the search dialog
+_JUMP_TO_HELP_LINES = """
+Type text to narrow the search. Regexes are supported (via Python's 're'
+module). The up/down cursor keys step in the list. [Enter] jumps to the
+selected symbol. [ESC] aborts the search. Type multiple space-separated
+strings/regexes to find entries that match all of them. Type Ctrl-F to
+view the help of the selected item without leaving the dialog.
+"""[1:-1].split("\n")
+
+#
+# Styling
+#
+
+_STYLES = {
+    "default": """
+    path=fg:black,bg:white,bold
+    separator=fg:black,bg:yellow,bold
+    list=fg:black,bg:white
+    selection=fg:white,bg:blue,bold
+    inv-list=fg:red,bg:white
+    inv-selection=fg:red,bg:blue
+    help=path
+    show-help=list
+    frame=fg:black,bg:yellow,bold
+    body=fg:white,bg:black
+    edit=fg:white,bg:blue
+    jump-edit=edit
+    text=list
+    """,
+
+    # This style is forced on terminals that do no support colors
+    "monochrome": """
+    path=bold
+    separator=bold,standout
+    list=
+    selection=bold,standout
+    inv-list=bold
+    inv-selection=bold,standout
+    help=bold
+    show-help=
+    frame=bold,standout
+    body=
+    edit=standout
+    jump-edit=
+    text=
+    """,
+
+    # Blue-tinted style loosely resembling lxdialog
+    "aquatic": """
+    path=fg:white,bg:blue
+    separator=fg:white,bg:cyan
+    help=path
+    frame=fg:white,bg:cyan
+    body=fg:white,bg:blue
+    edit=fg:black,bg:white
+    """
+}
+
+_NAMED_COLORS = {
+    # Basic colors
+    "black":         curses.COLOR_BLACK,
+    "red":           curses.COLOR_RED,
+    "green":         curses.COLOR_GREEN,
+    "yellow":        curses.COLOR_YELLOW,
+    "blue":          curses.COLOR_BLUE,
+    "magenta":       curses.COLOR_MAGENTA,
+    "cyan":          curses.COLOR_CYAN,
+    "white":         curses.COLOR_WHITE,
+
+    # Bright versions
+    "brightblack":   curses.COLOR_BLACK + 8,
+    "brightred":     curses.COLOR_RED + 8,
+    "brightgreen":   curses.COLOR_GREEN + 8,
+    "brightyellow":  curses.COLOR_YELLOW + 8,
+    "brightblue":    curses.COLOR_BLUE + 8,
+    "brightmagenta": curses.COLOR_MAGENTA + 8,
+    "brightcyan":    curses.COLOR_CYAN + 8,
+    "brightwhite":   curses.COLOR_WHITE + 8,
+
+    # Aliases
+    "purple":        curses.COLOR_MAGENTA,
+    "brightpurple":  curses.COLOR_MAGENTA + 8,
+}
+
+
+def _rgb_to_6cube(rgb):
+    # Converts an 888 RGB color to a 3-tuple (nice in that it's hashable)
+    # representing the closest xterm 256-color 6x6x6 color cube color.
+    #
+    # The xterm 256-color extension uses a RGB color palette with components in
+    # the range 0-5 (a 6x6x6 cube). The catch is that the mapping is nonlinear.
+    # Index 0 in the 6x6x6 cube is mapped to 0, index 1 to 95, then 135, 175,
+    # etc., in increments of 40. See the links below:
+    #
+    #   https://commons.wikimedia.org/wiki/File:Xterm_256color_chart.svg
+    #   https://github.com/tmux/tmux/blob/master/colour.c
+
+    # 48 is the middle ground between 0 and 95.
+    return tuple(0 if x < 48 else int(round(max(1, (x - 55)/40))) for x in rgb)
+
+
+def _6cube_to_rgb(r6g6b6):
+    # Returns the 888 RGB color for a 666 xterm color cube index
+
+    return tuple(0 if x == 0 else 40*x + 55 for x in r6g6b6)
+
+
+def _rgb_to_gray(rgb):
+    # Converts an 888 RGB color to the index of an xterm 256-color grayscale
+    # color with approx. the same perceived brightness
+
+    # Calculate the luminance (gray intensity) of the color. See
+    #   https://stackoverflow.com/questions/596216/formula-to-determine-brightness-of-rgb-color
+    # and
+    #   https://www.w3.org/TR/AERT/#color-contrast
+    luma = 0.299*rgb[0] + 0.587*rgb[1] + 0.114*rgb[2]
+
+    # Closest index in the grayscale palette, which starts at RGB 0x080808,
+    # with stepping 0x0A0A0A
+    index = int(round((luma - 8)/10))
+
+    # Clamp the index to 0-23, corresponding to 232-255
+    return max(0, min(index, 23))
+
+
+def _gray_to_rgb(index):
+    # Convert a grayscale index to its closet single RGB component
+
+    return 3*(10*index + 8,)  # Returns a 3-tuple
+
+
+# Obscure Python: We never pass a value for rgb2index, and it keeps pointing to
+# the same dict. This avoids a global.
+def _alloc_rgb(rgb, rgb2index={}):
+    # Initialize a new entry in the xterm palette to the given RGB color,
+    # returning its index. If the color has already been initialized, the index
+    # of the existing entry is returned.
+    #
+    # ncurses is palette-based, so we need to overwrite palette entries to make
+    # new colors.
+    #
+    # The colors from 0 to 15 are user-defined, and there's no way to query
+    # their RGB values, so we better leave them untouched. Also leave any
+    # hypothetical colors above 255 untouched (though we're unlikely to
+    # allocate that many colors anyway).
+
+    if rgb in rgb2index:
+        return rgb2index[rgb]
+
+    # Many terminals allow the user to customize the first 16 colors. Avoid
+    # changing their values.
+    color_index = 16 + len(rgb2index)
+    if color_index >= 256:
+        _warn("Unable to allocate new RGB color ", rgb, ". Too many colors "
+              "allocated.")
+        return 0
+
+    # Map each RGB component from the range 0-255 to the range 0-1000, which is
+    # what curses uses
+    curses.init_color(color_index, *(int(round(1000*x/255)) for x in rgb))
+    rgb2index[rgb] = color_index
+
+    return color_index
+
+
+def _color_from_num(num):
+    # Returns the index of a color that looks like color 'num' in the xterm
+    # 256-color palette (but that might not be 'num', if we're redefining
+    # colors)
+
+    # - _alloc_rgb() won't touch the first 16 colors or any (hypothetical)
+    #   colors above 255, so we can always return them as-is
+    #
+    # - If the terminal doesn't support changing color definitions, or if
+    #   curses.COLORS < 256, _alloc_rgb() won't touch any color, and all colors
+    #   can be returned as-is
+    if num < 16 or num > 255 or not curses.can_change_color() or \
+       curses.COLORS < 256:
+        return num
+
+    # _alloc_rgb() might redefine colors, so emulate the xterm 256-color
+    # palette by allocating new colors instead of returning color numbers
+    # directly
+
+    if num < 232:
+        num -= 16
+        return _alloc_rgb(_6cube_to_rgb(((num//36)%6, (num//6)%6, num%6)))
+
+    return _alloc_rgb(_gray_to_rgb(num - 232))
+
+
+def _color_from_rgb(rgb):
+    # Returns the index of a color matching the 888 RGB color 'rgb'. The
+    # returned color might be an ~exact match or an approximation, depending on
+    # terminal capabilities.
+
+    # Calculates the Euclidean distance between two RGB colors
+    def dist(r1, r2): return sum((x - y)**2 for x, y in zip(r1, r2))
+
+    if curses.COLORS >= 256:
+        # Assume we're dealing with xterm's 256-color extension
+
+        if curses.can_change_color():
+            # Best case -- the terminal supports changing palette entries via
+            # curses.init_color(). Initialize an unused palette entry and
+            # return it.
+            return _alloc_rgb(rgb)
+
+        # Second best case -- pick between the xterm 256-color extension colors
+
+        # Closest 6-cube "color" color
+        c6 = _rgb_to_6cube(rgb)
+        # Closest gray color
+        gray = _rgb_to_gray(rgb)
+
+        if dist(rgb, _6cube_to_rgb(c6)) < dist(rgb, _gray_to_rgb(gray)):
+            # Use the "color" color from the 6x6x6 color palette. Calculate the
+            # color number from the 6-cube index triplet.
+            return 16 + 36*c6[0] + 6*c6[1] + c6[2]
+
+        # Use the color from the gray palette
+        return 232 + gray
+
+    # Terminal not in xterm 256-color mode. This is probably the best we can
+    # do, or is it? Submit patches. :)
+    min_dist = float('inf')
+    best = -1
+    for color in range(curses.COLORS):
+        # ncurses uses the range 0..1000. Scale that down to 0..255.
+        d = dist(rgb, tuple(int(round(255*c/1000))
+                            for c in curses.color_content(color)))
+        if d < min_dist:
+            min_dist = d
+            best = color
+
+    return best
+
+
+def _parse_style(style_str, parsing_default):
+    # Parses a string with '<element>=<style>' assignments. Anything not
+    # containing '=' is assumed to be a reference to a built-in style, which is
+    # treated as if all the assignments from the style were inserted at that
+    # point in the string.
+    #
+    # The parsing_default flag is set to True when we're implicitly parsing the
+    # 'default'/'monochrome' style, to prevent warnings.
+
+    for sline in style_str.split():
+        # Words without a "=" character represents a style template
+        if "=" in sline:
+            key, data = sline.split("=", 1)
+
+            # The 'default' style template is assumed to define all keys. We
+            # run _style_to_curses() for non-existing keys as well, so that we
+            # print warnings for errors to the right of '=' for those too.
+            if key not in _style and not parsing_default:
+                _warn("Ignoring non-existent style", key)
+
+            # If data is a reference to another key, copy its style
+            if data in _style:
+                _style[key] = _style[data]
+            else:
+                _style[key] = _style_to_curses(data)
+
+        elif sline in _STYLES:
+            # Recursively parse style template. Ignore styles that don't exist,
+            # for backwards/forwards compatibility.
+            _parse_style(_STYLES[sline], parsing_default)
+
+        else:
+            _warn("Ignoring non-existent style template", sline)
+
+# Dictionary mapping element types to the curses attributes used to display
+# them
+_style = {}
+
+
+def _style_to_curses(style_def):
+    # Parses a style definition string (<element>=<style>), returning
+    # a (fg_color, bg_color, attributes) tuple.
+
+    def parse_color(color_def):
+        color_def = color_def.split(":", 1)[1]
+
+        # HTML format, #RRGGBB
+        if re.match("#[A-Fa-f0-9]{6}", color_def):
+            return _color_from_rgb((
+                int(color_def[1:3], 16),
+                int(color_def[3:5], 16),
+                int(color_def[5:7], 16)))
+
+        if color_def in _NAMED_COLORS:
+            color_num = _color_from_num(_NAMED_COLORS[color_def])
+        else:
+            try:
+                color_num = _color_from_num(int(color_def, 0))
+            except ValueError:
+                _warn("Ignoring color", color_def, "that's neither "
+                      "predefined nor a number")
+                return -1
+
+        if not -1 <= color_num < curses.COLORS:
+            _warn("Ignoring color {}, which is outside the range "
+                  "-1..curses.COLORS-1 (-1..{})"
+                  .format(color_def, curses.COLORS - 1))
+            return -1
+
+        return color_num
+
+    fg_color = -1
+    bg_color = -1
+    attrs = 0
+
+    if style_def:
+        for field in style_def.split(","):
+            if field.startswith("fg:"):
+                fg_color = parse_color(field)
+            elif field.startswith("bg:"):
+                bg_color = parse_color(field)
+            elif field == "bold":
+                # A_BOLD tends to produce faint and hard-to-read text on the
+                # Windows console, especially with the old color scheme, before
+                # the introduction of
+                # https://blogs.msdn.microsoft.com/commandline/2017/08/02/updating-the-windows-console-colors/
+                attrs |= curses.A_NORMAL if _IS_WINDOWS else curses.A_BOLD
+            elif field == "standout":
+                attrs |= curses.A_STANDOUT
+            elif field == "underline":
+                attrs |= curses.A_UNDERLINE
+            else:
+                _warn("Ignoring unknown style attribute", field)
+
+    return _style_attr(fg_color, bg_color, attrs)
+
+
+def _init_styles():
+    if curses.has_colors():
+        try:
+            curses.use_default_colors()
+        except curses.error:
+            # Ignore errors on funky terminals that support colors but not
+            # using default colors. Worst it can do is break transparency and
+            # the like. Ran across this with the MSYS2/winpty setup in
+            # https://github.com/msys2/MINGW-packages/issues/5823, though there
+            # seems to be a lot of general brokenness there.
+            pass
+
+        # Use the 'default' theme as the base, and add any user-defined style
+        # settings from the environment
+        _parse_style("default", True)
+        if "MENUCONFIG_STYLE" in os.environ:
+            _parse_style(os.environ["MENUCONFIG_STYLE"], False)
+    else:
+        # Force the 'monochrome' theme if the terminal doesn't support colors.
+        # MENUCONFIG_STYLE is likely to mess things up here (though any colors
+        # would be ignored), so ignore it.
+        _parse_style("monochrome", True)
+
+
+# color_attribs holds the color pairs we've already created, indexed by a
+# (<foreground color>, <background color>) tuple.
+#
+# Obscure Python: We never pass a value for color_attribs, and it keeps
+# pointing to the same dict. This avoids a global.
+def _style_attr(fg_color, bg_color, attribs, color_attribs={}):
+    # Returns an attribute with the specified foreground and background color
+    # and the attributes in 'attribs'. Reuses color pairs already created if
+    # possible, and creates a new color pair otherwise.
+    #
+    # Returns 'attribs' if colors aren't supported.
+
+    if not curses.has_colors():
+        return attribs
+
+    if (fg_color, bg_color) not in color_attribs:
+        # Create new color pair. Color pair number 0 is hardcoded and cannot be
+        # changed, hence the +1s.
+        curses.init_pair(len(color_attribs) + 1, fg_color, bg_color)
+        color_attribs[(fg_color, bg_color)] = \
+            curses.color_pair(len(color_attribs) + 1)
+
+    return color_attribs[(fg_color, bg_color)] | attribs
+
+
+#
+# Main application
+#
+
+
+def _main():
+    menuconfig(standard_kconfig(__doc__))
+
+
+def menuconfig(kconf):
+    """
+    Launches the configuration interface, returning after the user exits.
+
+    kconf:
+      Kconfig instance to be configured
+    """
+    global _kconf
+    global _conf_filename
+    global _conf_changed
+    global _minconf_filename
+    global _show_all
+
+    _kconf = kconf
+
+    # Filename to save configuration to
+    _conf_filename = standard_config_filename()
+
+    # Load existing configuration and set _conf_changed True if it is outdated
+    _conf_changed = _load_config()
+
+    # Filename to save minimal configuration to
+    _minconf_filename = "defconfig"
+
+    # Any visible items in the top menu?
+    _show_all = False
+    if not _shown_nodes(kconf.top_node):
+        # Nothing visible. Start in show-all mode and try again.
+        _show_all = True
+        if not _shown_nodes(kconf.top_node):
+            # Give up. The implementation relies on always having a selected
+            # node.
+            print("Empty configuration -- nothing to configure.\n"
+                  "Check that environment variables are set properly.")
+            return
+
+    # Disable warnings. They get mangled in curses mode, and we deal with
+    # errors ourselves.
+    kconf.warn = False
+
+    # Make curses use the locale settings specified in the environment
+    locale.setlocale(locale.LC_ALL, "")
+
+    # Try to fix Unicode issues on systems with bad defaults
+    if _CHANGE_C_LC_CTYPE_TO_UTF8:
+        _change_c_lc_ctype_to_utf8()
+
+    # Get rid of the delay between pressing ESC and jumping to the parent menu,
+    # unless the user has set ESCDELAY (see ncurses(3)). This makes the UI much
+    # smoother to work with.
+    #
+    # Note: This is strictly pretty iffy, since escape codes for e.g. cursor
+    # keys start with ESC, but I've never seen it cause problems in practice
+    # (probably because it's unlikely that the escape code for a key would get
+    # split up across read()s, at least with a terminal emulator). Please
+    # report if you run into issues. Some suitable small default value could be
+    # used here instead in that case. Maybe it's silly to not put in the
+    # smallest imperceptible delay here already, though I don't like guessing.
+    #
+    # (From a quick glance at the ncurses source code, ESCDELAY might only be
+    # relevant for mouse events there, so maybe escapes are assumed to arrive
+    # in one piece already...)
+    os.environ.setdefault("ESCDELAY", "0")
+
+    # Enter curses mode. _menuconfig() returns a string to print on exit, after
+    # curses has been de-initialized.
+    print(curses.wrapper(_menuconfig))
+
+
+def _load_config():
+    # Loads any existing .config file. See the Kconfig.load_config() docstring.
+    #
+    # Returns True if .config is missing or outdated. We always prompt for
+    # saving the configuration in that case.
+
+    print(_kconf.load_config())
+    if not os.path.exists(_conf_filename):
+        # No .config
+        return True
+
+    return _needs_save()
+
+
+def _needs_save():
+    # Returns True if a just-loaded .config file is outdated (would get
+    # modified when saving)
+
+    if _kconf.missing_syms:
+        # Assignments to undefined symbols in the .config
+        return True
+
+    for sym in _kconf.unique_defined_syms:
+        if sym.user_value is None:
+            if sym.config_string:
+                # Unwritten symbol
+                return True
+        elif sym.orig_type in (BOOL, TRISTATE):
+            if sym.tri_value != sym.user_value:
+                # Written bool/tristate symbol, new value
+                return True
+        elif sym.str_value != sym.user_value:
+            # Written string/int/hex symbol, new value
+            return True
+
+    # No need to prompt for save
+    return False
+
+
+# Global variables used below:
+#
+#   _stdscr:
+#     stdscr from curses
+#
+#   _cur_menu:
+#     Menu node of the menu (or menuconfig symbol, or choice) currently being
+#     shown
+#
+#   _shown:
+#     List of items in _cur_menu that are shown (ignoring scrolling). In
+#     show-all mode, this list contains all items in _cur_menu. Otherwise, it
+#     contains just the visible items.
+#
+#   _sel_node_i:
+#     Index in _shown of the currently selected node
+#
+#   _menu_scroll:
+#     Index in _shown of the top row of the main display
+#
+#   _parent_screen_rows:
+#     List/stack of the row numbers that the selections in the parent menus
+#     appeared on. This is used to prevent the scrolling from jumping around
+#     when going in and out of menus.
+#
+#   _show_help/_show_name/_show_all:
+#     If True, the corresponding mode is on. See the module docstring.
+#
+#   _conf_filename:
+#     File to save the configuration to
+#
+#   _minconf_filename:
+#     File to save minimal configurations to
+#
+#   _conf_changed:
+#     True if the configuration has been changed. If False, we don't bother
+#     showing the save-and-quit dialog.
+#
+#     We reset this to False whenever the configuration is saved explicitly
+#     from the save dialog.
+
+
+def _menuconfig(stdscr):
+    # Logic for the main display, with the list of symbols, etc.
+
+    global _stdscr
+    global _conf_filename
+    global _conf_changed
+    global _minconf_filename
+    global _show_help
+    global _show_name
+
+    _stdscr = stdscr
+
+    _init()
+
+    while True:
+        _draw_main()
+        curses.doupdate()
+
+
+        c = _getch_compat(_menu_win)
+
+        if c == curses.KEY_RESIZE:
+            _resize_main()
+
+        elif c in (curses.KEY_DOWN, "j", "J"):
+            _select_next_menu_entry()
+
+        elif c in (curses.KEY_UP, "k", "K"):
+            _select_prev_menu_entry()
+
+        elif c in (curses.KEY_NPAGE, "\x04"):  # Page Down/Ctrl-D
+            # Keep it simple. This way we get sane behavior for small windows,
+            # etc., for free.
+            for _ in range(_PG_JUMP):
+                _select_next_menu_entry()
+
+        elif c in (curses.KEY_PPAGE, "\x15"):  # Page Up/Ctrl-U
+            for _ in range(_PG_JUMP):
+                _select_prev_menu_entry()
+
+        elif c in (curses.KEY_END, "G"):
+            _select_last_menu_entry()
+
+        elif c in (curses.KEY_HOME, "g"):
+            _select_first_menu_entry()
+
+        elif c == " ":
+            # Toggle the node if possible
+            sel_node = _shown[_sel_node_i]
+            if not _change_node(sel_node):
+                _enter_menu(sel_node)
+
+        elif c in (curses.KEY_RIGHT, "\n", "l", "L"):
+            # Enter the node if possible
+            sel_node = _shown[_sel_node_i]
+            if not _enter_menu(sel_node):
+                _change_node(sel_node)
+
+        elif c in ("n", "N"):
+            _set_sel_node_tri_val(0)
+
+        elif c in ("m", "M"):
+            _set_sel_node_tri_val(1)
+
+        elif c in ("y", "Y"):
+            _set_sel_node_tri_val(2)
+
+        elif c in (curses.KEY_LEFT, curses.KEY_BACKSPACE, _ERASE_CHAR,
+                   "\x1B", "h", "H"):  # \x1B = ESC
+
+            if c == "\x1B" and _cur_menu is _kconf.top_node:
+                res = _quit_dialog()
+                if res:
+                    return res
+            else:
+                _leave_menu()
+
+        elif c in ("o", "O"):
+            _load_dialog()
+
+        elif c in ("s", "S"):
+            filename = _save_dialog(_kconf.write_config, _conf_filename,
+                                    "configuration")
+            if filename:
+                _conf_filename = filename
+                _conf_changed = False
+
+        elif c in ("d", "D"):
+            filename = _save_dialog(_kconf.write_min_config, _minconf_filename,
+                                    "minimal configuration")
+            if filename:
+                _minconf_filename = filename
+
+        elif c == "/":
+            _jump_to_dialog()
+            # The terminal might have been resized while the fullscreen jump-to
+            # dialog was open
+            _resize_main()
+
+        elif c == "?":
+            _info_dialog(_shown[_sel_node_i], False)
+            # The terminal might have been resized while the fullscreen info
+            # dialog was open
+            _resize_main()
+
+        elif c in ("f", "F"):
+            _show_help = not _show_help
+            _set_style(_help_win, "show-help" if _show_help else "help")
+            _resize_main()
+
+        elif c in ("c", "C"):
+            _show_name = not _show_name
+
+        elif c in ("a", "A"):
+            _toggle_show_all()
+
+        elif c in ("q", "Q"):
+            res = _quit_dialog()
+            if res:
+                return res
+
+
+def _quit_dialog():
+    if not _conf_changed:
+        return "No changes to save (for '{}')".format(_conf_filename)
+
+    while True:
+        c = _key_dialog(
+            "Quit",
+            " Save configuration?\n"
+            "\n"
+            "(Y)es  (N)o  (C)ancel",
+            "ync")
+
+        if c is None or c == "c":
+            return None
+
+        if c == "y":
+            # Returns a message to print
+            msg = _try_save(_kconf.write_config, _conf_filename, "configuration")
+            if msg:
+                return msg
+
+        elif c == "n":
+            return "Configuration ({}) was not saved".format(_conf_filename)
+
+
+def _init():
+    # Initializes the main display with the list of symbols, etc. Also does
+    # misc. global initialization that needs to happen after initializing
+    # curses.
+
+    global _ERASE_CHAR
+
+    global _path_win
+    global _top_sep_win
+    global _menu_win
+    global _bot_sep_win
+    global _help_win
+
+    global _parent_screen_rows
+    global _cur_menu
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+
+    global _show_help
+    global _show_name
+
+    # Looking for this in addition to KEY_BACKSPACE (which is unreliable) makes
+    # backspace work with TERM=vt100. That makes it likely to work in sane
+    # environments.
+    _ERASE_CHAR = curses.erasechar()
+    if sys.version_info[0] >= 3:
+        # erasechar() returns a one-byte bytes object on Python 3. This sets
+        # _ERASE_CHAR to a blank string if it can't be decoded, which should be
+        # harmless.
+        _ERASE_CHAR = _ERASE_CHAR.decode("utf-8", "ignore")
+
+    _init_styles()
+
+    # Hide the cursor
+    _safe_curs_set(0)
+
+    # Initialize windows
+
+    # Top row, with menu path
+    _path_win = _styled_win("path")
+
+    # Separator below menu path, with title and arrows pointing up
+    _top_sep_win = _styled_win("separator")
+
+    # List of menu entries with symbols, etc.
+    _menu_win = _styled_win("list")
+    _menu_win.keypad(True)
+
+    # Row below menu list, with arrows pointing down
+    _bot_sep_win = _styled_win("separator")
+
+    # Help window with keys at the bottom. Shows help texts in show-help mode.
+    _help_win = _styled_win("help")
+
+    # The rows we'd like the nodes in the parent menus to appear on. This
+    # prevents the scroll from jumping around when going in and out of menus.
+    _parent_screen_rows = []
+
+    # Initial state
+
+    _cur_menu = _kconf.top_node
+    _shown = _shown_nodes(_cur_menu)
+    _sel_node_i = _menu_scroll = 0
+
+    _show_help = _show_name = False
+
+    # Give windows their initial size
+    _resize_main()
+
+
+def _resize_main():
+    # Resizes the main display, with the list of symbols, etc., to fill the
+    # terminal
+
+    global _menu_scroll
+
+    screen_height, screen_width = _stdscr.getmaxyx()
+
+    _path_win.resize(1, screen_width)
+    _top_sep_win.resize(1, screen_width)
+    _bot_sep_win.resize(1, screen_width)
+
+    help_win_height = _SHOW_HELP_HEIGHT if _show_help else \
+        len(_MAIN_HELP_LINES)
+
+    menu_win_height = screen_height - help_win_height - 3
+
+    if menu_win_height >= 1:
+        _menu_win.resize(menu_win_height, screen_width)
+        _help_win.resize(help_win_height, screen_width)
+
+        _top_sep_win.mvwin(1, 0)
+        _menu_win.mvwin(2, 0)
+        _bot_sep_win.mvwin(2 + menu_win_height, 0)
+        _help_win.mvwin(2 + menu_win_height + 1, 0)
+    else:
+        # Degenerate case. Give up on nice rendering and just prevent errors.
+
+        menu_win_height = 1
+
+        _menu_win.resize(1, screen_width)
+        _help_win.resize(1, screen_width)
+
+        for win in _top_sep_win, _menu_win, _bot_sep_win, _help_win:
+            win.mvwin(0, 0)
+
+    # Adjust the scroll so that the selected node is still within the window,
+    # if needed
+    if _sel_node_i - _menu_scroll >= menu_win_height:
+        _menu_scroll = _sel_node_i - menu_win_height + 1
+
+
+def _height(win):
+    # Returns the height of 'win'
+
+    return win.getmaxyx()[0]
+
+
+def _width(win):
+    # Returns the width of 'win'
+
+    return win.getmaxyx()[1]
+
+
+def _enter_menu(menu):
+    # Makes 'menu' the currently displayed menu. In addition to actual 'menu's,
+    # "menu" here includes choices and symbols defined with the 'menuconfig'
+    # keyword.
+    #
+    # Returns False if 'menu' can't be entered.
+
+    global _cur_menu
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+
+    if not menu.is_menuconfig:
+        return False  # Not a menu
+
+    shown_sub = _shown_nodes(menu)
+    # Never enter empty menus. We depend on having a current node.
+    if not shown_sub:
+        return False
+
+    # Remember where the current node appears on the screen, so we can try
+    # to get it to appear in the same place when we leave the menu
+    _parent_screen_rows.append(_sel_node_i - _menu_scroll)
+
+    # Jump into menu
+    _cur_menu = menu
+    _shown = shown_sub
+    _sel_node_i = _menu_scroll = 0
+
+    if isinstance(menu.item, Choice):
+        _select_selected_choice_sym()
+
+    return True
+
+
+def _select_selected_choice_sym():
+    # Puts the cursor on the currently selected (y-valued) choice symbol, if
+    # any. Does nothing if if the choice has no selection (is not visible/in y
+    # mode).
+
+    global _sel_node_i
+
+    choice = _cur_menu.item
+    if choice.selection:
+        # Search through all menu nodes to handle choice symbols being defined
+        # in multiple locations
+        for node in choice.selection.nodes:
+            if node in _shown:
+                _sel_node_i = _shown.index(node)
+                _center_vertically()
+                return
+
+
+def _jump_to(node):
+    # Jumps directly to the menu node 'node'
+
+    global _cur_menu
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+    global _show_all
+    global _parent_screen_rows
+
+    # Clear remembered menu locations. We might not even have been in the
+    # parent menus before.
+    _parent_screen_rows = []
+
+    old_show_all = _show_all
+    jump_into = (isinstance(node.item, Choice) or node.item == MENU) and \
+                node.list
+
+    # If we're jumping to a non-empty choice or menu, jump to the first entry
+    # in it instead of jumping to its menu node
+    if jump_into:
+        _cur_menu = node
+        node = node.list
+    else:
+        _cur_menu = _parent_menu(node)
+
+    _shown = _shown_nodes(_cur_menu)
+    if node not in _shown:
+        # The node wouldn't be shown. Turn on show-all to show it.
+        _show_all = True
+        _shown = _shown_nodes(_cur_menu)
+
+    _sel_node_i = _shown.index(node)
+
+    if jump_into and not old_show_all and _show_all:
+        # If we're jumping into a choice or menu and were forced to turn on
+        # show-all because the first entry wasn't visible, try turning it off.
+        # That will land us at the first visible node if there are visible
+        # nodes, and is a no-op otherwise.
+        _toggle_show_all()
+
+    _center_vertically()
+
+    # If we're jumping to a non-empty choice, jump to the selected symbol, if
+    # any
+    if jump_into and isinstance(_cur_menu.item, Choice):
+        _select_selected_choice_sym()
+
+
+def _leave_menu():
+    # Jumps to the parent menu of the current menu. Does nothing if we're in
+    # the top menu.
+
+    global _cur_menu
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+
+    if _cur_menu is _kconf.top_node:
+        return
+
+    # Jump to parent menu
+    parent = _parent_menu(_cur_menu)
+    _shown = _shown_nodes(parent)
+    _sel_node_i = _shown.index(_cur_menu)
+    _cur_menu = parent
+
+    # Try to make the menu entry appear on the same row on the screen as it did
+    # before we entered the menu.
+
+    if _parent_screen_rows:
+        # The terminal might have shrunk since we were last in the parent menu
+        screen_row = min(_parent_screen_rows.pop(), _height(_menu_win) - 1)
+        _menu_scroll = max(_sel_node_i - screen_row, 0)
+    else:
+        # No saved parent menu locations, meaning we jumped directly to some
+        # node earlier
+        _center_vertically()
+
+
+def _select_next_menu_entry():
+    # Selects the menu entry after the current one, adjusting the scroll if
+    # necessary. Does nothing if we're already at the last menu entry.
+
+    global _sel_node_i
+    global _menu_scroll
+
+    if _sel_node_i < len(_shown) - 1:
+        # Jump to the next node
+        _sel_node_i += 1
+
+        # If the new node is sufficiently close to the edge of the menu window
+        # (as determined by _SCROLL_OFFSET), increase the scroll by one. This
+        # gives nice and non-jumpy behavior even when
+        # _SCROLL_OFFSET >= _height(_menu_win).
+        if _sel_node_i >= _menu_scroll + _height(_menu_win) - _SCROLL_OFFSET \
+           and _menu_scroll < _max_scroll(_shown, _menu_win):
+
+            _menu_scroll += 1
+
+
+def _select_prev_menu_entry():
+    # Selects the menu entry before the current one, adjusting the scroll if
+    # necessary. Does nothing if we're already at the first menu entry.
+
+    global _sel_node_i
+    global _menu_scroll
+
+    if _sel_node_i > 0:
+        # Jump to the previous node
+        _sel_node_i -= 1
+
+        # See _select_next_menu_entry()
+        if _sel_node_i < _menu_scroll + _SCROLL_OFFSET:
+            _menu_scroll = max(_menu_scroll - 1, 0)
+
+
+def _select_last_menu_entry():
+    # Selects the last menu entry in the current menu
+
+    global _sel_node_i
+    global _menu_scroll
+
+    _sel_node_i = len(_shown) - 1
+    _menu_scroll = _max_scroll(_shown, _menu_win)
+
+
+def _select_first_menu_entry():
+    # Selects the first menu entry in the current menu
+
+    global _sel_node_i
+    global _menu_scroll
+
+    _sel_node_i = _menu_scroll = 0
+
+
+def _toggle_show_all():
+    # Toggles show-all mode on/off. If turning it off would give no visible
+    # items in the current menu, it is left on.
+
+    global _show_all
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+
+    # Row on the screen the cursor is on. Preferably we want the same row to
+    # stay highlighted.
+    old_row = _sel_node_i - _menu_scroll
+
+    _show_all = not _show_all
+    # List of new nodes to be shown after toggling _show_all
+    new_shown = _shown_nodes(_cur_menu)
+
+    # Find a good node to select. The selected node might disappear if show-all
+    # mode is turned off.
+
+    # Select the previously selected node itself if it is still visible. If
+    # there are visible nodes before it, select the closest one.
+    for node in _shown[_sel_node_i::-1]:
+        if node in new_shown:
+            _sel_node_i = new_shown.index(node)
+            break
+    else:
+        # No visible nodes before the previously selected node. Select the
+        # closest visible node after it instead.
+        for node in _shown[_sel_node_i + 1:]:
+            if node in new_shown:
+                _sel_node_i = new_shown.index(node)
+                break
+        else:
+            # No visible nodes at all, meaning show-all was turned off inside
+            # an invisible menu. Don't allow that, as the implementation relies
+            # on always having a selected node.
+            _show_all = True
+            return
+
+    _shown = new_shown
+
+    # Try to make the cursor stay on the same row in the menu window. This
+    # might be impossible if too many nodes have disappeared above the node.
+    _menu_scroll = max(_sel_node_i - old_row, 0)
+
+
+def _center_vertically():
+    # Centers the selected node vertically, if possible
+
+    global _menu_scroll
+
+    _menu_scroll = min(max(_sel_node_i - _height(_menu_win)//2, 0),
+                       _max_scroll(_shown, _menu_win))
+
+
+def _draw_main():
+    # Draws the "main" display, with the list of symbols, the header, and the
+    # footer.
+    #
+    # This could be optimized to only update the windows that have actually
+    # changed, but keep it simple for now and let curses sort it out.
+
+    term_width = _width(_stdscr)
+
+    #
+    # Update the separator row below the menu path
+    #
+
+    _top_sep_win.erase()
+
+    # Draw arrows pointing up if the symbol window is scrolled down. Draw them
+    # before drawing the title, so the title ends up on top for small windows.
+    if _menu_scroll > 0:
+        _safe_hline(_top_sep_win, 0, 4, curses.ACS_UARROW, _N_SCROLL_ARROWS)
+
+    # Add the 'mainmenu' text as the title, centered at the top
+    _safe_addstr(_top_sep_win,
+                 0, max((term_width - len(_kconf.mainmenu_text))//2, 0),
+                 _kconf.mainmenu_text)
+
+    _top_sep_win.noutrefresh()
+
+    # Note: The menu path at the top is deliberately updated last. See below.
+
+    #
+    # Update the symbol window
+    #
+
+    _menu_win.erase()
+
+    # Draw the _shown nodes starting from index _menu_scroll up to either as
+    # many as fit in the window, or to the end of _shown
+    for i in range(_menu_scroll,
+                   min(_menu_scroll + _height(_menu_win), len(_shown))):
+
+        node = _shown[i]
+
+        # The 'not _show_all' test avoids showing invisible items in red
+        # outside show-all mode, which could look confusing/broken. Invisible
+        # symbols show up outside show-all mode if an invisible symbol has
+        # visible children in an implicit (indented) menu.
+        if _visible(node) or not _show_all:
+            style = _style["selection" if i == _sel_node_i else "list"]
+        else:
+            style = _style["inv-selection" if i == _sel_node_i else "inv-list"]
+
+        _safe_addstr(_menu_win, i - _menu_scroll, 0, _node_str(node), style)
+
+    _menu_win.noutrefresh()
+
+    #
+    # Update the bottom separator window
+    #
+
+    _bot_sep_win.erase()
+
+    # Draw arrows pointing down if the symbol window is scrolled up
+    if _menu_scroll < _max_scroll(_shown, _menu_win):
+        _safe_hline(_bot_sep_win, 0, 4, curses.ACS_DARROW, _N_SCROLL_ARROWS)
+
+    # Indicate when show-name/show-help/show-all mode is enabled
+    enabled_modes = []
+    if _show_help:
+        enabled_modes.append("show-help (toggle with [F])")
+    if _show_name:
+        enabled_modes.append("show-name")
+    if _show_all:
+        enabled_modes.append("show-all")
+    if enabled_modes:
+        s = " and ".join(enabled_modes) + " mode enabled"
+        _safe_addstr(_bot_sep_win, 0, max(term_width - len(s) - 2, 0), s)
+
+    _bot_sep_win.noutrefresh()
+
+    #
+    # Update the help window, which shows either key bindings or help texts
+    #
+
+    _help_win.erase()
+
+    if _show_help:
+        node = _shown[_sel_node_i]
+        if isinstance(node.item, (Symbol, Choice)) and node.help:
+            help_lines = textwrap.wrap(node.help, _width(_help_win))
+            for i in range(min(_height(_help_win), len(help_lines))):
+                _safe_addstr(_help_win, i, 0, help_lines[i])
+        else:
+            _safe_addstr(_help_win, 0, 0, "(no help)")
+    else:
+        for i, line in enumerate(_MAIN_HELP_LINES):
+            _safe_addstr(_help_win, i, 0, line)
+
+    _help_win.noutrefresh()
+
+    #
+    # Update the top row with the menu path.
+    #
+    # Doing this last leaves the cursor on the top row, which avoids some minor
+    # annoying jumpiness in gnome-terminal when reducing the height of the
+    # terminal. It seems to happen whenever the row with the cursor on it
+    # disappears.
+    #
+
+    _path_win.erase()
+
+    # Draw the menu path ("(Top) -> Menu -> Submenu -> ...")
+
+    menu_prompts = []
+
+    menu = _cur_menu
+    while menu is not _kconf.top_node:
+        # Promptless choices can be entered in show-all mode. Use
+        # standard_sc_expr_str() for them, so they show up as
+        # '<choice (name if any)>'.
+        menu_prompts.append(menu.prompt[0] if menu.prompt else
+                            standard_sc_expr_str(menu.item))
+        menu = menu.parent
+    menu_prompts.append("(Top)")
+    menu_prompts.reverse()
+
+    # Hack: We can't put ACS_RARROW directly in the string. Temporarily
+    # represent it with NULL.
+    menu_path_str = " \0 ".join(menu_prompts)
+
+    # Scroll the menu path to the right if needed to make the current menu's
+    # title visible
+    if len(menu_path_str) > term_width:
+        menu_path_str = menu_path_str[len(menu_path_str) - term_width:]
+
+    # Print the path with the arrows reinserted
+    split_path = menu_path_str.split("\0")
+    _safe_addstr(_path_win, split_path[0])
+    for s in split_path[1:]:
+        _safe_addch(_path_win, curses.ACS_RARROW)
+        _safe_addstr(_path_win, s)
+
+    _path_win.noutrefresh()
+
+
+def _parent_menu(node):
+    # Returns the menu node of the menu that contains 'node'. In addition to
+    # proper 'menu's, this might also be a 'menuconfig' symbol or a 'choice'.
+    # "Menu" here means a menu in the interface.
+
+    menu = node.parent
+    while not menu.is_menuconfig:
+        menu = menu.parent
+    return menu
+
+
+def _shown_nodes(menu):
+    # Returns the list of menu nodes from 'menu' (see _parent_menu()) that
+    # would be shown when entering it
+
+    def rec(node):
+        res = []
+
+        while node:
+            if _visible(node) or _show_all:
+                res.append(node)
+                if node.list and not node.is_menuconfig:
+                    # Nodes from implicit menu created from dependencies. Will
+                    # be shown indented. Note that is_menuconfig is True for
+                    # menus and choices as well as 'menuconfig' symbols.
+                    res += rec(node.list)
+
+            elif node.list and isinstance(node.item, Symbol):
+                # Show invisible symbols if they have visible children. This
+                # can happen for an m/y-valued symbol with an optional prompt
+                # ('prompt "foo" is COND') that is currently disabled. Note
+                # that it applies to both 'config' and 'menuconfig' symbols.
+                shown_children = rec(node.list)
+                if shown_children:
+                    res.append(node)
+                    if not node.is_menuconfig:
+                        res += shown_children
+
+            node = node.next
+
+        return res
+
+    if isinstance(menu.item, Choice):
+        # For named choices defined in multiple locations, entering the choice
+        # at a particular menu node would normally only show the choice symbols
+        # defined there (because that's what the MenuNode tree looks like).
+        #
+        # That might look confusing, and makes extending choices by defining
+        # them in multiple locations less useful. Instead, gather all the child
+        # menu nodes for all the choices whenever a choice is entered. That
+        # makes all choice symbols visible at all locations.
+        #
+        # Choices can contain non-symbol items (people do all sorts of weird
+        # stuff with them), hence the generality here. We really need to
+        # preserve the menu tree at each choice location.
+        #
+        # Note: Named choices are pretty broken in the C tools, and this is
+        # super obscure, so you probably won't find much that relies on this.
+        # This whole 'if' could be deleted if you don't care about defining
+        # choices in multiple locations to add symbols (which will still work,
+        # just with things being displayed in a way that might be unexpected).
+
+        # Do some additional work to avoid listing choice symbols twice if all
+        # or part of the choice is copied in multiple locations (e.g. by
+        # including some Kconfig file multiple times). We give the prompts at
+        # the current location precedence.
+        seen_syms = {node.item for node in rec(menu.list)
+                     if isinstance(node.item, Symbol)}
+        res = []
+        for choice_node in menu.item.nodes:
+            for node in rec(choice_node.list):
+                # 'choice_node is menu' checks if we're dealing with the
+                # current location
+                if node.item not in seen_syms or choice_node is menu:
+                    res.append(node)
+                    if isinstance(node.item, Symbol):
+                        seen_syms.add(node.item)
+        return res
+
+    return rec(menu.list)
+
+
+def _visible(node):
+    # Returns True if the node should appear in the menu (outside show-all
+    # mode)
+
+    return node.prompt and expr_value(node.prompt[1]) and not \
+        (node.item == MENU and not expr_value(node.visibility))
+
+
+def _change_node(node):
+    # Changes the value of the menu node 'node' if it is a symbol. Bools and
+    # tristates are toggled, while other symbol types pop up a text entry
+    # dialog.
+    #
+    # Returns False if the value of 'node' can't be changed.
+
+    if not _changeable(node):
+        return False
+
+    # sc = symbol/choice
+    sc = node.item
+
+    if sc.orig_type in (INT, HEX, STRING):
+        s = sc.str_value
+
+        while True:
+            s = _input_dialog(
+                "{} ({})".format(node.prompt[0], TYPE_TO_STR[sc.orig_type]),
+                s, _range_info(sc))
+
+            if s is None:
+                break
+
+            if sc.orig_type in (INT, HEX):
+                s = s.strip()
+
+                # 'make menuconfig' does this too. Hex values not starting with
+                # '0x' are accepted when loading .config files though.
+                if sc.orig_type == HEX and not s.startswith(("0x", "0X")):
+                    s = "0x" + s
+
+            if _check_valid(sc, s):
+                _set_val(sc, s)
+                break
+
+    elif len(sc.assignable) == 1:
+        # Handles choice symbols for choices in y mode, which are a special
+        # case: .assignable can be (2,) while .tri_value is 0.
+        _set_val(sc, sc.assignable[0])
+
+    else:
+        # Set the symbol to the value after the current value in
+        # sc.assignable, with wrapping
+        val_index = sc.assignable.index(sc.tri_value)
+        _set_val(sc, sc.assignable[(val_index + 1) % len(sc.assignable)])
+
+
+    if _is_y_mode_choice_sym(sc) and not node.list:
+        # Immediately jump to the parent menu after making a choice selection,
+        # like 'make menuconfig' does, except if the menu node has children
+        # (which can happen if a symbol 'depends on' a choice symbol that
+        # immediately precedes it).
+        _leave_menu()
+
+
+    return True
+
+
+def _changeable(node):
+    # Returns True if the value if 'node' can be changed
+
+    sc = node.item
+
+    if not isinstance(sc, (Symbol, Choice)):
+        return False
+
+    # This will hit for invisible symbols, which appear in show-all mode and
+    # when an invisible symbol has visible children (which can happen e.g. for
+    # symbols with optional prompts)
+    if not (node.prompt and expr_value(node.prompt[1])):
+        return False
+
+    return sc.orig_type in (STRING, INT, HEX) or len(sc.assignable) > 1 \
+        or _is_y_mode_choice_sym(sc)
+
+
+def _set_sel_node_tri_val(tri_val):
+    # Sets the value of the currently selected menu entry to 'tri_val', if that
+    # value can be assigned
+
+    sc = _shown[_sel_node_i].item
+    if isinstance(sc, (Symbol, Choice)) and tri_val in sc.assignable:
+        _set_val(sc, tri_val)
+
+
+def _set_val(sc, val):
+    # Wrapper around Symbol/Choice.set_value() for updating the menu state and
+    # _conf_changed
+
+    global _conf_changed
+
+    # Use the string representation of tristate values. This makes the format
+    # consistent for all symbol types.
+    if val in TRI_TO_STR:
+        val = TRI_TO_STR[val]
+
+    if val != sc.str_value:
+        sc.set_value(val)
+        _conf_changed = True
+
+        # Changing the value of the symbol might have changed what items in the
+        # current menu are visible. Recalculate the state.
+        _update_menu()
+
+
+def _update_menu():
+    # Updates the current menu after the value of a symbol or choice has been
+    # changed. Changing a value might change which items in the menu are
+    # visible.
+    #
+    # If possible, preserves the location of the cursor on the screen when
+    # items are added/removed above the selected item.
+
+    global _shown
+    global _sel_node_i
+    global _menu_scroll
+
+    # Row on the screen the cursor was on
+    old_row = _sel_node_i - _menu_scroll
+
+    sel_node = _shown[_sel_node_i]
+
+    # New visible nodes
+    _shown = _shown_nodes(_cur_menu)
+
+    # New index of selected node
+    _sel_node_i = _shown.index(sel_node)
+
+    # Try to make the cursor stay on the same row in the menu window. This
+    # might be impossible if too many nodes have disappeared above the node.
+    _menu_scroll = max(_sel_node_i - old_row, 0)
+
+
+def _input_dialog(title, initial_text, info_text=None):
+    # Pops up a dialog that prompts the user for a string
+    #
+    # title:
+    #   Title to display at the top of the dialog window's border
+    #
+    # initial_text:
+    #   Initial text to prefill the input field with
+    #
+    # info_text:
+    #   String to show next to the input field. If None, just the input field
+    #   is shown.
+
+    win = _styled_win("body")
+    win.keypad(True)
+
+    info_lines = info_text.split("\n") if info_text else []
+
+    # Give the input dialog its initial size
+    _resize_input_dialog(win, title, info_lines)
+
+    _safe_curs_set(2)
+
+    # Input field text
+    s = initial_text
+
+    # Cursor position
+    i = len(initial_text)
+
+    def edit_width():
+        return _width(win) - 4
+
+    # Horizontal scroll offset
+    hscroll = max(i - edit_width() + 1, 0)
+
+    while True:
+        # Draw the "main" display with the menu, etc., so that resizing still
+        # works properly. This is like a stack of windows, only hardcoded for
+        # now.
+        _draw_main()
+        _draw_input_dialog(win, title, info_lines, s, i, hscroll)
+        curses.doupdate()
+
+
+        c = _getch_compat(win)
+
+        if c == curses.KEY_RESIZE:
+            # Resize the main display too. The dialog floats above it.
+            _resize_main()
+            _resize_input_dialog(win, title, info_lines)
+
+        elif c == "\n":
+            _safe_curs_set(0)
+            return s
+
+        elif c == "\x1B":  # \x1B = ESC
+            _safe_curs_set(0)
+            return None
+
+        else:
+            s, i, hscroll = _edit_text(c, s, i, hscroll, edit_width())
+
+
+def _resize_input_dialog(win, title, info_lines):
+    # Resizes the input dialog to a size appropriate for the terminal size
+
+    screen_height, screen_width = _stdscr.getmaxyx()
+
+    win_height = 5
+    if info_lines:
+        win_height += len(info_lines) + 1
+    win_height = min(win_height, screen_height)
+
+    win_width = max(_INPUT_DIALOG_MIN_WIDTH,
+                    len(title) + 4,
+                    *(len(line) + 4 for line in info_lines))
+    win_width = min(win_width, screen_width)
+
+    win.resize(win_height, win_width)
+    win.mvwin((screen_height - win_height)//2,
+              (screen_width - win_width)//2)
+
+
+def _draw_input_dialog(win, title, info_lines, s, i, hscroll):
+    edit_width = _width(win) - 4
+
+    win.erase()
+
+    # Note: Perhaps having a separate window for the input field would be nicer
+    visible_s = s[hscroll:hscroll + edit_width]
+    _safe_addstr(win, 2, 2, visible_s + " "*(edit_width - len(visible_s)),
+                 _style["edit"])
+
+    for linenr, line in enumerate(info_lines):
+        _safe_addstr(win, 4 + linenr, 2, line)
+
+    # Draw the frame last so that it overwrites the body text for small windows
+    _draw_frame(win, title)
+
+    _safe_move(win, 2, 2 + i - hscroll)
+
+    win.noutrefresh()
+
+
+def _load_dialog():
+    # Dialog for loading a new configuration
+
+    global _conf_changed
+    global _conf_filename
+    global _show_all
+
+    if _conf_changed:
+        c = _key_dialog(
+            "Load",
+            "You have unsaved changes. Load new\n"
+            "configuration anyway?\n"
+            "\n"
+            "         (O)K  (C)ancel",
+            "oc")
+
+        if c is None or c == "c":
+            return
+
+    filename = _conf_filename
+    while True:
+        filename = _input_dialog("File to load", filename, _load_save_info())
+        if filename is None:
+            return
+
+        filename = os.path.expanduser(filename)
+
+        if _try_load(filename):
+            _conf_filename = filename
+            _conf_changed = _needs_save()
+
+            # Turn on show-all mode if the selected node is not visible after
+            # loading the new configuration. _shown still holds the old state.
+            if _shown[_sel_node_i] not in _shown_nodes(_cur_menu):
+                _show_all = True
+
+            _update_menu()
+
+            # The message dialog indirectly updates the menu display, so _msg()
+            # must be called after the new state has been initialized
+            _msg("Success", "Loaded " + filename)
+            return
+
+
+def _try_load(filename):
+    # Tries to load a configuration file. Pops up an error and returns False on
+    # failure.
+    #
+    # filename:
+    #   Configuration file to load
+
+    try:
+        _kconf.load_config(filename)
+        return True
+    except EnvironmentError as e:
+        _error("Error loading '{}'\n\n{} (errno: {})"
+               .format(filename, e.strerror, errno.errorcode[e.errno]))
+        return False
+
+
+def _save_dialog(save_fn, default_filename, description):
+    # Dialog for saving the current configuration
+    #
+    # save_fn:
+    #   Function to call with 'filename' to save the file
+    #
+    # default_filename:
+    #   Prefilled filename in the input field
+    #
+    # description:
+    #   String describing the thing being saved
+    #
+    # Return value:
+    #   The path to the saved file, or None if no file was saved
+
+    filename = default_filename
+    while True:
+        filename = _input_dialog("Filename to save {} to".format(description),
+                                 filename, _load_save_info())
+        if filename is None:
+            return None
+
+        filename = os.path.expanduser(filename)
+
+        msg = _try_save(save_fn, filename, description)
+        if msg:
+            _msg("Success", msg)
+            return filename
+
+
+def _try_save(save_fn, filename, description):
+    # Tries to save a configuration file. Returns a message to print on
+    # success.
+    #
+    # save_fn:
+    #   Function to call with 'filename' to save the file
+    #
+    # description:
+    #   String describing the thing being saved
+    #
+    # Return value:
+    #   A message to print on success, and None on failure
+
+    try:
+        # save_fn() returns a message to print
+        return save_fn(filename)
+    except EnvironmentError as e:
+        _error("Error saving {} to '{}'\n\n{} (errno: {})"
+               .format(description, e.filename, e.strerror,
+                       errno.errorcode[e.errno]))
+        return None
+
+
+def _key_dialog(title, text, keys):
+    # Pops up a dialog that can be closed by pressing a key
+    #
+    # title:
+    #   Title to display at the top of the dialog window's border
+    #
+    # text:
+    #   Text to show in the dialog
+    #
+    # keys:
+    #   List of keys that will close the dialog. Other keys (besides ESC) are
+    #   ignored. The caller is responsible for providing a hint about which
+    #   keys can be pressed in 'text'.
+    #
+    # Return value:
+    #   The key that was pressed to close the dialog. Uppercase characters are
+    #   converted to lowercase. ESC will always close the dialog, and returns
+    #   None.
+
+    win = _styled_win("body")
+    win.keypad(True)
+
+    _resize_key_dialog(win, text)
+
+    while True:
+        # See _input_dialog()
+        _draw_main()
+        _draw_key_dialog(win, title, text)
+        curses.doupdate()
+
+
+        c = _getch_compat(win)
+
+        if c == curses.KEY_RESIZE:
+            # Resize the main display too. The dialog floats above it.
+            _resize_main()
+            _resize_key_dialog(win, text)
+
+        elif c == "\x1B":  # \x1B = ESC
+            return None
+
+        elif isinstance(c, str):
+            c = c.lower()
+            if c in keys:
+                return c
+
+
+def _resize_key_dialog(win, text):
+    # Resizes the key dialog to a size appropriate for the terminal size
+
+    screen_height, screen_width = _stdscr.getmaxyx()
+
+    lines = text.split("\n")
+
+    win_height = min(len(lines) + 4, screen_height)
+    win_width = min(max(len(line) for line in lines) + 4, screen_width)
+
+    win.resize(win_height, win_width)
+    win.mvwin((screen_height - win_height)//2,
+              (screen_width - win_width)//2)
+
+
+def _draw_key_dialog(win, title, text):
+    win.erase()
+
+    for i, line in enumerate(text.split("\n")):
+        _safe_addstr(win, 2 + i, 2, line)
+
+    # Draw the frame last so that it overwrites the body text for small windows
+    _draw_frame(win, title)
+
+    win.noutrefresh()
+
+
+def _draw_frame(win, title):
+    # Draw a frame around the inner edges of 'win', with 'title' at the top
+
+    win_height, win_width = win.getmaxyx()
+
+    win.attron(_style["frame"])
+
+    # Draw top/bottom edge
+    _safe_hline(win,              0, 0, " ", win_width)
+    _safe_hline(win, win_height - 1, 0, " ", win_width)
+
+    # Draw left/right edge
+    _safe_vline(win, 0,             0, " ", win_height)
+    _safe_vline(win, 0, win_width - 1, " ", win_height)
+
+    # Draw title
+    _safe_addstr(win, 0, max((win_width - len(title))//2, 0), title)
+
+    win.attroff(_style["frame"])
+
+
+def _jump_to_dialog():
+    # Implements the jump-to dialog, where symbols can be looked up via
+    # incremental search and jumped to.
+    #
+    # Returns True if the user jumped to a symbol, and False if the dialog was
+    # canceled.
+
+    s = ""  # Search text
+    prev_s = None  # Previous search text
+    s_i = 0  # Search text cursor position
+    hscroll = 0  # Horizontal scroll offset
+
+    sel_node_i = 0  # Index of selected row
+    scroll = 0  # Index in 'matches' of the top row of the list
+
+    # Edit box at the top
+    edit_box = _styled_win("jump-edit")
+    edit_box.keypad(True)
+
+    # List of matches
+    matches_win = _styled_win("list")
+
+    # Bottom separator, with arrows pointing down
+    bot_sep_win = _styled_win("separator")
+
+    # Help window with instructions at the bottom
+    help_win = _styled_win("help")
+
+    # Give windows their initial size
+    _resize_jump_to_dialog(edit_box, matches_win, bot_sep_win, help_win,
+                           sel_node_i, scroll)
+
+    _safe_curs_set(2)
+
+    # Logic duplication with _select_{next,prev}_menu_entry(), except we do a
+    # functional variant that returns the new (sel_node_i, scroll) values to
+    # avoid 'nonlocal'. TODO: Can this be factored out in some nice way?
+
+    def select_next_match():
+        if sel_node_i == len(matches) - 1:
+            return sel_node_i, scroll
+
+        if sel_node_i + 1 >= scroll + _height(matches_win) - _SCROLL_OFFSET \
+           and scroll < _max_scroll(matches, matches_win):
+
+            return sel_node_i + 1, scroll + 1
+
+        return sel_node_i + 1, scroll
+
+    def select_prev_match():
+        if sel_node_i == 0:
+            return sel_node_i, scroll
+
+        if sel_node_i - 1 < scroll + _SCROLL_OFFSET:
+            return sel_node_i - 1, max(scroll - 1, 0)
+
+        return sel_node_i - 1, scroll
+
+    while True:
+        if s != prev_s:
+            # The search text changed. Find new matching nodes.
+
+            prev_s = s
+
+            try:
+                # We could use re.IGNORECASE here instead of lower(), but this
+                # is noticeably less jerky while inputting regexes like
+                # '.*debug$' (though the '.*' is redundant there). Those
+                # probably have bad interactions with re.search(), which
+                # matches anywhere in the string.
+                #
+                # It's not horrible either way. Just a bit smoother.
+                regex_searches = [re.compile(regex).search
+                                  for regex in s.lower().split()]
+
+                # No exception thrown, so the regexes are okay
+                bad_re = None
+
+                # List of matching nodes
+                matches = []
+                add_match = matches.append
+
+                # Search symbols and choices
+
+                for node in _sorted_sc_nodes():
+                    # Symbol/choice
+                    sc = node.item
+
+                    for search in regex_searches:
+                        # Both the name and the prompt might be missing, since
+                        # we're searching both symbols and choices
+
+                        # Does the regex match either the symbol name or the
+                        # prompt (if any)?
+                        if not (sc.name and search(sc.name.lower()) or
+                                node.prompt and search(node.prompt[0].lower())):
+
+                            # Give up on the first regex that doesn't match, to
+                            # speed things up a bit when multiple regexes are
+                            # entered
+                            break
+
+                    else:
+                        add_match(node)
+
+                # Search menus and comments
+
+                for node in _sorted_menu_comment_nodes():
+                    for search in regex_searches:
+                        if not search(node.prompt[0].lower()):
+                            break
+                    else:
+                        add_match(node)
+
+            except re.error as e:
+                # Bad regex. Remember the error message so we can show it.
+                bad_re = "Bad regular expression"
+                # re.error.msg was added in Python 3.5
+                if hasattr(e, "msg"):
+                    bad_re += ": " + e.msg
+
+                matches = []
+
+            # Reset scroll and jump to the top of the list of matches
+            sel_node_i = scroll = 0
+
+        _draw_jump_to_dialog(edit_box, matches_win, bot_sep_win, help_win,
+                             s, s_i, hscroll,
+                             bad_re, matches, sel_node_i, scroll)
+        curses.doupdate()
+
+
+        c = _getch_compat(edit_box)
+
+        if c == "\n":
+            if matches:
+                _jump_to(matches[sel_node_i])
+                _safe_curs_set(0)
+                return True
+
+        elif c == "\x1B":  # \x1B = ESC
+            _safe_curs_set(0)
+            return False
+
+        elif c == curses.KEY_RESIZE:
+            # We adjust the scroll so that the selected node stays visible in
+            # the list when the terminal is resized, hence the 'scroll'
+            # assignment
+            scroll = _resize_jump_to_dialog(
+                edit_box, matches_win, bot_sep_win, help_win,
+                sel_node_i, scroll)
+
+        elif c == "\x06":  # \x06 = Ctrl-F
+            if matches:
+                _safe_curs_set(0)
+                _info_dialog(matches[sel_node_i], True)
+                _safe_curs_set(2)
+
+                scroll = _resize_jump_to_dialog(
+                    edit_box, matches_win, bot_sep_win, help_win,
+                    sel_node_i, scroll)
+
+        elif c == curses.KEY_DOWN:
+            sel_node_i, scroll = select_next_match()
+
+        elif c == curses.KEY_UP:
+            sel_node_i, scroll = select_prev_match()
+
+        elif c in (curses.KEY_NPAGE, "\x04"):  # Page Down/Ctrl-D
+            # Keep it simple. This way we get sane behavior for small windows,
+            # etc., for free.
+            for _ in range(_PG_JUMP):
+                sel_node_i, scroll = select_next_match()
+
+        # Page Up (no Ctrl-U, as it's already used by the edit box)
+        elif c == curses.KEY_PPAGE:
+            for _ in range(_PG_JUMP):
+                sel_node_i, scroll = select_prev_match()
+
+        elif c == curses.KEY_END:
+            sel_node_i = len(matches) - 1
+            scroll = _max_scroll(matches, matches_win)
+
+        elif c == curses.KEY_HOME:
+            sel_node_i = scroll = 0
+
+        else:
+            s, s_i, hscroll = _edit_text(c, s, s_i, hscroll,
+                                         _width(edit_box) - 2)
+
+
+# Obscure Python: We never pass a value for cached_nodes, and it keeps pointing
+# to the same list. This avoids a global.
+def _sorted_sc_nodes(cached_nodes=[]):
+    # Returns a sorted list of symbol and choice nodes to search. The symbol
+    # nodes appear first, sorted by name, and then the choice nodes, sorted by
+    # prompt and (secondarily) name.
+
+    if not cached_nodes:
+        # Add symbol nodes
+        for sym in sorted(_kconf.unique_defined_syms,
+                          key=lambda sym: sym.name):
+            # += is in-place for lists
+            cached_nodes += sym.nodes
+
+        # Add choice nodes
+
+        choices = sorted(_kconf.unique_choices,
+                         key=lambda choice: choice.name or "")
+
+        cached_nodes += sorted(
+            [node for choice in choices for node in choice.nodes],
+            key=lambda node: node.prompt[0] if node.prompt else "")
+
+    return cached_nodes
+
+
+def _sorted_menu_comment_nodes(cached_nodes=[]):
+    # Returns a list of menu and comment nodes to search, sorted by prompt,
+    # with the menus first
+
+    if not cached_nodes:
+        def prompt_text(mc):
+            return mc.prompt[0]
+
+        cached_nodes += sorted(_kconf.menus, key=prompt_text)
+        cached_nodes += sorted(_kconf.comments, key=prompt_text)
+
+    return cached_nodes
+
+
+def _resize_jump_to_dialog(edit_box, matches_win, bot_sep_win, help_win,
+                           sel_node_i, scroll):
+    # Resizes the jump-to dialog to fill the terminal.
+    #
+    # Returns the new scroll index. We adjust the scroll if needed so that the
+    # selected node stays visible.
+
+    screen_height, screen_width = _stdscr.getmaxyx()
+
+    bot_sep_win.resize(1, screen_width)
+
+    help_win_height = len(_JUMP_TO_HELP_LINES)
+    matches_win_height = screen_height - help_win_height - 4
+
+    if matches_win_height >= 1:
+        edit_box.resize(3, screen_width)
+        matches_win.resize(matches_win_height, screen_width)
+        help_win.resize(help_win_height, screen_width)
+
+        matches_win.mvwin(3, 0)
+        bot_sep_win.mvwin(3 + matches_win_height, 0)
+        help_win.mvwin(3 + matches_win_height + 1, 0)
+    else:
+        # Degenerate case. Give up on nice rendering and just prevent errors.
+
+        matches_win_height = 1
+
+        edit_box.resize(screen_height, screen_width)
+        matches_win.resize(1, screen_width)
+        help_win.resize(1, screen_width)
+
+        for win in matches_win, bot_sep_win, help_win:
+            win.mvwin(0, 0)
+
+    # Adjust the scroll so that the selected row is still within the window, if
+    # needed
+    if sel_node_i - scroll >= matches_win_height:
+        return sel_node_i - matches_win_height + 1
+    return scroll
+
+
+def _draw_jump_to_dialog(edit_box, matches_win, bot_sep_win, help_win,
+                         s, s_i, hscroll,
+                         bad_re, matches, sel_node_i, scroll):
+
+    edit_width = _width(edit_box) - 2
+
+    #
+    # Update list of matches
+    #
+
+    matches_win.erase()
+
+    if matches:
+        for i in range(scroll,
+                       min(scroll + _height(matches_win), len(matches))):
+
+            node = matches[i]
+
+            if isinstance(node.item, (Symbol, Choice)):
+                node_str = _name_and_val_str(node.item)
+                if node.prompt:
+                    node_str += ' "{}"'.format(node.prompt[0])
+            elif node.item == MENU:
+                node_str = 'menu "{}"'.format(node.prompt[0])
+            else:  # node.item == COMMENT
+                node_str = 'comment "{}"'.format(node.prompt[0])
+
+            _safe_addstr(matches_win, i - scroll, 0, node_str,
+                         _style["selection" if i == sel_node_i else "list"])
+
+    else:
+        # bad_re holds the error message from the re.error exception on errors
+        _safe_addstr(matches_win, 0, 0, bad_re or "No matches")
+
+    matches_win.noutrefresh()
+
+    #
+    # Update bottom separator line
+    #
+
+    bot_sep_win.erase()
+
+    # Draw arrows pointing down if the symbol list is scrolled up
+    if scroll < _max_scroll(matches, matches_win):
+        _safe_hline(bot_sep_win, 0, 4, curses.ACS_DARROW, _N_SCROLL_ARROWS)
+
+    bot_sep_win.noutrefresh()
+
+    #
+    # Update help window at bottom
+    #
+
+    help_win.erase()
+
+    for i, line in enumerate(_JUMP_TO_HELP_LINES):
+        _safe_addstr(help_win, i, 0, line)
+
+    help_win.noutrefresh()
+
+    #
+    # Update edit box. We do this last since it makes it handy to position the
+    # cursor.
+    #
+
+    edit_box.erase()
+
+    _draw_frame(edit_box, "Jump to symbol/choice/menu/comment")
+
+    # Draw arrows pointing up if the symbol list is scrolled down
+    if scroll > 0:
+        # TODO: Bit ugly that _style["frame"] is repeated here
+        _safe_hline(edit_box, 2, 4, curses.ACS_UARROW, _N_SCROLL_ARROWS,
+                    _style["frame"])
+
+    visible_s = s[hscroll:hscroll + edit_width]
+    _safe_addstr(edit_box, 1, 1, visible_s)
+
+    _safe_move(edit_box, 1, 1 + s_i - hscroll)
+
+    edit_box.noutrefresh()
+
+
+def _info_dialog(node, from_jump_to_dialog):
+    # Shows a fullscreen window with information about 'node'.
+    #
+    # If 'from_jump_to_dialog' is True, the information dialog was opened from
+    # within the jump-to-dialog. In this case, we make '/' from within the
+    # information dialog just return, to avoid a confusing recursive invocation
+    # of the jump-to-dialog.
+
+    # Top row, with title and arrows point up
+    top_line_win = _styled_win("separator")
+
+    # Text display
+    text_win = _styled_win("text")
+    text_win.keypad(True)
+
+    # Bottom separator, with arrows pointing down
+    bot_sep_win = _styled_win("separator")
+
+    # Help window with keys at the bottom
+    help_win = _styled_win("help")
+
+    # Give windows their initial size
+    _resize_info_dialog(top_line_win, text_win, bot_sep_win, help_win)
+
+
+    # Get lines of help text
+    lines = _info_str(node).split("\n")
+
+    # Index of first row in 'lines' to show
+    scroll = 0
+
+    while True:
+        _draw_info_dialog(node, lines, scroll, top_line_win, text_win,
+                          bot_sep_win, help_win)
+        curses.doupdate()
+
+
+        c = _getch_compat(text_win)
+
+        if c == curses.KEY_RESIZE:
+            _resize_info_dialog(top_line_win, text_win, bot_sep_win, help_win)
+
+        elif c in (curses.KEY_DOWN, "j", "J"):
+            if scroll < _max_scroll(lines, text_win):
+                scroll += 1
+
+        elif c in (curses.KEY_NPAGE, "\x04"):  # Page Down/Ctrl-D
+            scroll = min(scroll + _PG_JUMP, _max_scroll(lines, text_win))
+
+        elif c in (curses.KEY_PPAGE, "\x15"):  # Page Up/Ctrl-U
+            scroll = max(scroll - _PG_JUMP, 0)
+
+        elif c in (curses.KEY_END, "G"):
+            scroll = _max_scroll(lines, text_win)
+
+        elif c in (curses.KEY_HOME, "g"):
+            scroll = 0
+
+        elif c in (curses.KEY_UP, "k", "K"):
+            if scroll > 0:
+                scroll -= 1
+
+        elif c == "/":
+            # Support starting a search from within the information dialog
+
+            if from_jump_to_dialog:
+                return  # Avoid recursion
+
+            if _jump_to_dialog():
+                return  # Jumped to a symbol. Cancel the information dialog.
+
+            # Stay in the information dialog if the jump-to dialog was
+            # canceled. Resize it in case the terminal was resized while the
+            # fullscreen jump-to dialog was open.
+            _resize_info_dialog(top_line_win, text_win, bot_sep_win, help_win)
+
+        elif c in (curses.KEY_LEFT, curses.KEY_BACKSPACE, _ERASE_CHAR,
+                   "\x1B",  # \x1B = ESC
+                   "q", "Q", "h", "H"):
+
+            return
+
+
+def _resize_info_dialog(top_line_win, text_win, bot_sep_win, help_win):
+    # Resizes the info dialog to fill the terminal
+
+    screen_height, screen_width = _stdscr.getmaxyx()
+
+    top_line_win.resize(1, screen_width)
+    bot_sep_win.resize(1, screen_width)
+
+    help_win_height = len(_INFO_HELP_LINES)
+    text_win_height = screen_height - help_win_height - 2
+
+    if text_win_height >= 1:
+        text_win.resize(text_win_height, screen_width)
+        help_win.resize(help_win_height, screen_width)
+
+        text_win.mvwin(1, 0)
+        bot_sep_win.mvwin(1 + text_win_height, 0)
+        help_win.mvwin(1 + text_win_height + 1, 0)
+    else:
+        # Degenerate case. Give up on nice rendering and just prevent errors.
+
+        text_win.resize(1, screen_width)
+        help_win.resize(1, screen_width)
+
+        for win in text_win, bot_sep_win, help_win:
+            win.mvwin(0, 0)
+
+
+def _draw_info_dialog(node, lines, scroll, top_line_win, text_win,
+                      bot_sep_win, help_win):
+
+    text_win_height, text_win_width = text_win.getmaxyx()
+
+    # Note: The top row is deliberately updated last. See _draw_main().
+
+    #
+    # Update text display
+    #
+
+    text_win.erase()
+
+    for i, line in enumerate(lines[scroll:scroll + text_win_height]):
+        _safe_addstr(text_win, i, 0, line)
+
+    text_win.noutrefresh()
+
+    #
+    # Update bottom separator line
+    #
+
+    bot_sep_win.erase()
+
+    # Draw arrows pointing down if the symbol window is scrolled up
+    if scroll < _max_scroll(lines, text_win):
+        _safe_hline(bot_sep_win, 0, 4, curses.ACS_DARROW, _N_SCROLL_ARROWS)
+
+    bot_sep_win.noutrefresh()
+
+    #
+    # Update help window at bottom
+    #
+
+    help_win.erase()
+
+    for i, line in enumerate(_INFO_HELP_LINES):
+        _safe_addstr(help_win, i, 0, line)
+
+    help_win.noutrefresh()
+
+    #
+    # Update top row
+    #
+
+    top_line_win.erase()
+
+    # Draw arrows pointing up if the information window is scrolled down. Draw
+    # them before drawing the title, so the title ends up on top for small
+    # windows.
+    if scroll > 0:
+        _safe_hline(top_line_win, 0, 4, curses.ACS_UARROW, _N_SCROLL_ARROWS)
+
+    title = ("Symbol" if isinstance(node.item, Symbol) else
+             "Choice" if isinstance(node.item, Choice) else
+             "Menu"   if node.item == MENU else
+             "Comment") + " information"
+    _safe_addstr(top_line_win, 0, max((text_win_width - len(title))//2, 0),
+                 title)
+
+    top_line_win.noutrefresh()
+
+
+def _info_str(node):
+    # Returns information about the menu node 'node' as a string.
+    #
+    # The helper functions are responsible for adding newlines. This allows
+    # them to return "" if they don't want to add any output.
+
+    if isinstance(node.item, Symbol):
+        sym = node.item
+
+        return (
+            _name_info(sym) +
+            _prompt_info(sym) +
+            "Type: {}\n".format(TYPE_TO_STR[sym.type]) +
+            _value_info(sym) +
+            _help_info(sym) +
+            _direct_dep_info(sym) +
+            _defaults_info(sym) +
+            _select_imply_info(sym) +
+            _kconfig_def_info(sym)
+        )
+
+    if isinstance(node.item, Choice):
+        choice = node.item
+
+        return (
+            _name_info(choice) +
+            _prompt_info(choice) +
+            "Type: {}\n".format(TYPE_TO_STR[choice.type]) +
+            'Mode: {}\n'.format(choice.str_value) +
+            _help_info(choice) +
+            _choice_syms_info(choice) +
+            _direct_dep_info(choice) +
+            _defaults_info(choice) +
+            _kconfig_def_info(choice)
+        )
+
+    return _kconfig_def_info(node)  # node.item in (MENU, COMMENT)
+
+
+def _name_info(sc):
+    # Returns a string with the name of the symbol/choice. Names are optional
+    # for choices.
+
+    return "Name: {}\n".format(sc.name) if sc.name else ""
+
+
+def _prompt_info(sc):
+    # Returns a string listing the prompts of 'sc' (Symbol or Choice)
+
+    s = ""
+
+    for node in sc.nodes:
+        if node.prompt:
+            s += "Prompt: {}\n".format(node.prompt[0])
+
+    return s
+
+
+def _value_info(sym):
+    # Returns a string showing 'sym's value
+
+    # Only put quotes around the value for string symbols
+    return "Value: {}\n".format(
+        '"{}"'.format(sym.str_value)
+        if sym.orig_type == STRING
+        else sym.str_value)
+
+
+def _choice_syms_info(choice):
+    # Returns a string listing the choice symbols in 'choice'. Adds
+    # "(selected)" next to the selected one.
+
+    s = "Choice symbols:\n"
+
+    for sym in choice.syms:
+        s += "  - " + sym.name
+        if sym is choice.selection:
+            s += " (selected)"
+        s += "\n"
+
+    return s + "\n"
+
+
+def _help_info(sc):
+    # Returns a string with the help text(s) of 'sc' (Symbol or Choice).
+    # Symbols and choices defined in multiple locations can have multiple help
+    # texts.
+
+    s = "\n"
+
+    for node in sc.nodes:
+        if node.help is not None:
+            s += "Help:\n\n{}\n\n".format(_indent(node.help, 2))
+
+    return s
+
+
+def _direct_dep_info(sc):
+    # Returns a string describing the direct dependencies of 'sc' (Symbol or
+    # Choice). The direct dependencies are the OR of the dependencies from each
+    # definition location. The dependencies at each definition location come
+    # from 'depends on' and dependencies inherited from parent items.
+
+    return "" if sc.direct_dep is _kconf.y else \
+        'Direct dependencies (={}):\n{}\n' \
+        .format(TRI_TO_STR[expr_value(sc.direct_dep)],
+                _split_expr_info(sc.direct_dep, 2))
+
+
+def _defaults_info(sc):
+    # Returns a string describing the defaults of 'sc' (Symbol or Choice)
+
+    if not sc.defaults:
+        return ""
+
+    s = "Default"
+    if len(sc.defaults) > 1:
+        s += "s"
+    s += ":\n"
+
+    for val, cond in sc.orig_defaults:
+        s += "  - "
+        if isinstance(sc, Symbol):
+            s += _expr_str(val)
+
+            # Skip the tristate value hint if the expression is just a single
+            # symbol. _expr_str() already shows its value as a string.
+            #
+            # This also avoids showing the tristate value for string/int/hex
+            # defaults, which wouldn't make any sense.
+            if isinstance(val, tuple):
+                s += '  (={})'.format(TRI_TO_STR[expr_value(val)])
+        else:
+            # Don't print the value next to the symbol name for choice
+            # defaults, as it looks a bit confusing
+            s += val.name
+        s += "\n"
+
+        if cond is not _kconf.y:
+            s += "    Condition (={}):\n{}" \
+                 .format(TRI_TO_STR[expr_value(cond)],
+                         _split_expr_info(cond, 4))
+
+    return s + "\n"
+
+
+def _split_expr_info(expr, indent):
+    # Returns a string with 'expr' split into its top-level && or || operands,
+    # with one operand per line, together with the operand's value. This is
+    # usually enough to get something readable for long expressions. A fancier
+    # recursive thingy would be possible too.
+    #
+    # indent:
+    #   Number of leading spaces to add before the split expression.
+
+    if len(split_expr(expr, AND)) > 1:
+        split_op = AND
+        op_str = "&&"
+    else:
+        split_op = OR
+        op_str = "||"
+
+    s = ""
+    for i, term in enumerate(split_expr(expr, split_op)):
+        s += "{}{} {}".format(indent*" ",
+                              "  " if i == 0 else op_str,
+                              _expr_str(term))
+
+        # Don't bother showing the value hint if the expression is just a
+        # single symbol. _expr_str() already shows its value.
+        if isinstance(term, tuple):
+            s += "  (={})".format(TRI_TO_STR[expr_value(term)])
+
+        s += "\n"
+
+    return s
+
+
+def _select_imply_info(sym):
+    # Returns a string with information about which symbols 'select' or 'imply'
+    # 'sym'. The selecting/implying symbols are grouped according to which
+    # value they select/imply 'sym' to (n/m/y).
+
+    def sis(expr, val, title):
+        # sis = selects/implies
+        sis = [si for si in split_expr(expr, OR) if expr_value(si) == val]
+        if not sis:
+            return ""
+
+        res = title
+        for si in sis:
+            res += "  - {}\n".format(split_expr(si, AND)[0].name)
+        return res + "\n"
+
+    s = ""
+
+    if sym.rev_dep is not _kconf.n:
+        s += sis(sym.rev_dep, 2,
+                 "Symbols currently y-selecting this symbol:\n")
+        s += sis(sym.rev_dep, 1,
+                 "Symbols currently m-selecting this symbol:\n")
+        s += sis(sym.rev_dep, 0,
+                 "Symbols currently n-selecting this symbol (no effect):\n")
+
+    if sym.weak_rev_dep is not _kconf.n:
+        s += sis(sym.weak_rev_dep, 2,
+                 "Symbols currently y-implying this symbol:\n")
+        s += sis(sym.weak_rev_dep, 1,
+                 "Symbols currently m-implying this symbol:\n")
+        s += sis(sym.weak_rev_dep, 0,
+                 "Symbols currently n-implying this symbol (no effect):\n")
+
+    return s
+
+
+def _kconfig_def_info(item):
+    # Returns a string with the definition of 'item' in Kconfig syntax,
+    # together with the definition location(s) and their include and menu paths
+
+    nodes = [item] if isinstance(item, MenuNode) else item.nodes
+
+    s = "Kconfig definition{}, with parent deps. propagated to 'depends on'\n" \
+        .format("s" if len(nodes) > 1 else "")
+    s += (len(s) - 1)*"="
+
+    for node in nodes:
+        s += "\n\n" \
+             "At {}:{}\n" \
+             "{}" \
+             "Menu path: {}\n\n" \
+             "{}" \
+             .format(node.filename, node.linenr,
+                     _include_path_info(node),
+                     _menu_path_info(node),
+                     _indent(node.custom_str(_name_and_val_str), 2))
+
+    return s
+
+
+def _include_path_info(node):
+    if not node.include_path:
+        # In the top-level Kconfig file
+        return ""
+
+    return "Included via {}\n".format(
+        " -> ".join("{}:{}".format(filename, linenr)
+                    for filename, linenr in node.include_path))
+
+
+def _menu_path_info(node):
+    # Returns a string describing the menu path leading up to 'node'
+
+    path = ""
+
+    while node.parent is not _kconf.top_node:
+        node = node.parent
+
+        # Promptless choices might appear among the parents. Use
+        # standard_sc_expr_str() for them, so that they show up as
+        # '<choice (name if any)>'.
+        path = " -> " + (node.prompt[0] if node.prompt else
+                         standard_sc_expr_str(node.item)) + path
+
+    return "(Top)" + path
+
+
+def _indent(s, n):
+    # Returns 's' with each line indented 'n' spaces. textwrap.indent() is not
+    # available in Python 2 (it's 3.3+).
+
+    return "\n".join(n*" " + line for line in s.split("\n"))
+
+
+def _name_and_val_str(sc):
+    # Custom symbol/choice printer that shows symbol values after symbols
+
+    # Show the values of non-constant (non-quoted) symbols that don't look like
+    # numbers. Things like 123 are actually symbol references, and only work as
+    # expected due to undefined symbols getting their name as their value.
+    # Showing the symbol value for those isn't helpful though.
+    if isinstance(sc, Symbol) and not sc.is_constant and not _is_num(sc.name):
+        if not sc.nodes:
+            # Undefined symbol reference
+            return "{}(undefined/n)".format(sc.name)
+
+        return '{}(={})'.format(sc.name, sc.str_value)
+
+    # For other items, use the standard format
+    return standard_sc_expr_str(sc)
+
+
+def _expr_str(expr):
+    # Custom expression printer that shows symbol values
+    return expr_str(expr, _name_and_val_str)
+
+
+def _styled_win(style):
+    # Returns a new curses window with style 'style' and space as the fill
+    # character. The initial dimensions are (1, 1), so the window needs to be
+    # sized and positioned separately.
+
+    win = curses.newwin(1, 1)
+    _set_style(win, style)
+    return win
+
+
+def _set_style(win, style):
+    # Changes the style of an existing window
+
+    win.bkgdset(" ", _style[style])
+
+
+def _max_scroll(lst, win):
+    # Assuming 'lst' is a list of items to be displayed in 'win',
+    # returns the maximum number of steps 'win' can be scrolled down.
+    # We stop scrolling when the bottom item is visible.
+
+    return max(0, len(lst) - _height(win))
+
+
+def _edit_text(c, s, i, hscroll, width):
+    # Implements text editing commands for edit boxes. Takes a character (which
+    # could also be e.g. curses.KEY_LEFT) and the edit box state, and returns
+    # the new state after the character has been processed.
+    #
+    # c:
+    #   Character from user
+    #
+    # s:
+    #   Current contents of string
+    #
+    # i:
+    #   Current cursor index in string
+    #
+    # hscroll:
+    #   Index in s of the leftmost character in the edit box, for horizontal
+    #   scrolling
+    #
+    # width:
+    #   Width in characters of the edit box
+    #
+    # Return value:
+    #   An (s, i, hscroll) tuple for the new state
+
+    if c == curses.KEY_LEFT:
+        if i > 0:
+            i -= 1
+
+    elif c == curses.KEY_RIGHT:
+        if i < len(s):
+            i += 1
+
+    elif c in (curses.KEY_HOME, "\x01"):  # \x01 = CTRL-A
+        i = 0
+
+    elif c in (curses.KEY_END, "\x05"):  # \x05 = CTRL-E
+        i = len(s)
+
+    elif c in (curses.KEY_BACKSPACE, _ERASE_CHAR):
+        if i > 0:
+            s = s[:i-1] + s[i:]
+            i -= 1
+
+    elif c == curses.KEY_DC:
+        s = s[:i] + s[i+1:]
+
+    elif c == "\x17":  # \x17 = CTRL-W
+        # The \W removes characters like ',' one at a time
+        new_i = re.search(r"(?:\w*|\W)\s*$", s[:i]).start()
+        s = s[:new_i] + s[i:]
+        i = new_i
+
+    elif c == "\x0B":  # \x0B = CTRL-K
+        s = s[:i]
+
+    elif c == "\x15":  # \x15 = CTRL-U
+        s = s[i:]
+        i = 0
+
+    elif isinstance(c, str):
+        # Insert character
+        s = s[:i] + c + s[i:]
+        i += 1
+
+    # Adjust the horizontal scroll so that the cursor never touches the left or
+    # right edges of the edit box, except when it's at the beginning or the end
+    # of the string
+    if i < hscroll + _SCROLL_OFFSET:
+        hscroll = max(i - _SCROLL_OFFSET, 0)
+    elif i >= hscroll + width - _SCROLL_OFFSET:
+        max_scroll = max(len(s) - width + 1, 0)
+        hscroll = min(i - width + _SCROLL_OFFSET + 1, max_scroll)
+
+    return s, i, hscroll
+
+
+def _load_save_info():
+    # Returns an information string for load/save dialog boxes
+
+    return "(Relative to {})\n\nRefer to your home directory with ~" \
+           .format(os.path.join(os.getcwd(), ""))
+
+
+def _msg(title, text):
+    # Pops up a message dialog that can be dismissed with Space/Enter/ESC
+
+    _key_dialog(title, text, " \n")
+
+
+def _error(text):
+    # Pops up an error dialog that can be dismissed with Space/Enter/ESC
+
+    _msg("Error", text)
+
+
+def _node_str(node):
+    # Returns the complete menu entry text for a menu node.
+    #
+    # Example return value: "[*] Support for X"
+
+    # Calculate the indent to print the item with by checking how many levels
+    # above it the closest 'menuconfig' item is (this includes menus and
+    # choices as well as menuconfig symbols)
+    indent = 0
+    parent = node.parent
+    while not parent.is_menuconfig:
+        indent += _SUBMENU_INDENT
+        parent = parent.parent
+
+    # This approach gives nice alignment for empty string symbols ("()  Foo")
+    s = "{:{}}".format(_value_str(node), 3 + indent)
+
+    if _should_show_name(node):
+        if isinstance(node.item, Symbol):
+            s += " <{}>".format(node.item.name)
+        else:
+            # For choices, use standard_sc_expr_str(). That way they show up as
+            # '<choice (name if any)>'.
+            s += " " + standard_sc_expr_str(node.item)
+
+    if node.prompt:
+        if node.item == COMMENT:
+            s += " *** {} ***".format(node.prompt[0])
+        else:
+            s += " " + node.prompt[0]
+
+        if isinstance(node.item, Symbol):
+            sym = node.item
+
+            # Print "(NEW)" next to symbols without a user value (from e.g. a
+            # .config), but skip it for choice symbols in choices in y mode,
+            # and for symbols of UNKNOWN type (which generate a warning though)
+            if sym.user_value is None and sym.orig_type and \
+               not (sym.choice and sym.choice.tri_value == 2):
+
+                s += " (NEW)"
+
+    if isinstance(node.item, Choice) and node.item.tri_value == 2:
+        # Print the prompt of the selected symbol after the choice for
+        # choices in y mode
+        sym = node.item.selection
+        if sym:
+            for sym_node in sym.nodes:
+                # Use the prompt used at this choice location, in case the
+                # choice symbol is defined in multiple locations
+                if sym_node.parent is node and sym_node.prompt:
+                    s += " ({})".format(sym_node.prompt[0])
+                    break
+            else:
+                # If the symbol isn't defined at this choice location, then
+                # just use whatever prompt we can find for it
+                for sym_node in sym.nodes:
+                    if sym_node.prompt:
+                        s += " ({})".format(sym_node.prompt[0])
+                        break
+
+    # Print "--->" next to nodes that have menus that can potentially be
+    # entered. Print "----" if the menu is empty. We don't allow those to be
+    # entered.
+    if node.is_menuconfig:
+        s += "  --->" if _shown_nodes(node) else "  ----"
+
+    return s
+
+
+def _should_show_name(node):
+    # Returns True if 'node' is a symbol or choice whose name should shown (if
+    # any, as names are optional for choices)
+
+    # The 'not node.prompt' case only hits in show-all mode, for promptless
+    # symbols and choices
+    return not node.prompt or \
+           (_show_name and isinstance(node.item, (Symbol, Choice)))
+
+
+def _value_str(node):
+    # Returns the value part ("[*]", "<M>", "(foo)" etc.) of a menu node
+
+    item = node.item
+
+    if item in (MENU, COMMENT):
+        return ""
+
+    # Wouldn't normally happen, and generates a warning
+    if not item.orig_type:
+        return ""
+
+    if item.orig_type in (STRING, INT, HEX):
+        return "({})".format(item.str_value)
+
+    # BOOL or TRISTATE
+
+    if _is_y_mode_choice_sym(item):
+        return "(X)" if item.choice.selection is item else "( )"
+
+    tri_val_str = (" ", "M", "*")[item.tri_value]
+
+    if len(item.assignable) <= 1:
+        # Pinned to a single value
+        return "" if isinstance(item, Choice) else "-{}-".format(tri_val_str)
+
+    if item.type == BOOL:
+        return "[{}]".format(tri_val_str)
+
+    # item.type == TRISTATE
+    if item.assignable == (1, 2):
+        return "{{{}}}".format(tri_val_str)  # {M}/{*}
+    return "<{}>".format(tri_val_str)
+
+
+def _is_y_mode_choice_sym(item):
+    # The choice mode is an upper bound on the visibility of choice symbols, so
+    # we can check the choice symbols' own visibility to see if the choice is
+    # in y mode
+    return isinstance(item, Symbol) and item.choice and item.visibility == 2
+
+
+def _check_valid(sym, s):
+    # Returns True if the string 's' is a well-formed value for 'sym'.
+    # Otherwise, displays an error and returns False.
+
+    if sym.orig_type not in (INT, HEX):
+        return True  # Anything goes for non-int/hex symbols
+
+    base = 10 if sym.orig_type == INT else 16
+    try:
+        int(s, base)
+    except ValueError:
+        _error("'{}' is a malformed {} value"
+               .format(s, TYPE_TO_STR[sym.orig_type]))
+        return False
+
+    for low_sym, high_sym, cond in sym.ranges:
+        if expr_value(cond):
+            low_s = low_sym.str_value
+            high_s = high_sym.str_value
+
+            if not int(low_s, base) <= int(s, base) <= int(high_s, base):
+                _error("{} is outside the range {}-{}"
+                       .format(s, low_s, high_s))
+                return False
+
+            break
+
+    return True
+
+
+def _range_info(sym):
+    # Returns a string with information about the valid range for the symbol
+    # 'sym', or None if 'sym' doesn't have a range
+
+    if sym.orig_type in (INT, HEX):
+        for low, high, cond in sym.ranges:
+            if expr_value(cond):
+                return "Range: {}-{}".format(low.str_value, high.str_value)
+
+    return None
+
+
+def _is_num(name):
+    # Heuristic to see if a symbol name looks like a number, for nicer output
+    # when printing expressions. Things like 16 are actually symbol names, only
+    # they get their name as their value when the symbol is undefined.
+
+    try:
+        int(name)
+    except ValueError:
+        if not name.startswith(("0x", "0X")):
+            return False
+
+        try:
+            int(name, 16)
+        except ValueError:
+            return False
+
+    return True
+
+
+def _getch_compat(win):
+    # Uses get_wch() if available (Python 3.3+) and getch() otherwise.
+    #
+    # Also falls back on getch() if get_wch() raises curses.error, to work
+    # around an issue when resizing the terminal on at least macOS Catalina.
+    # See https://github.com/ulfalizer/Kconfiglib/issues/84.
+    #
+    # Also handles a PDCurses resizing quirk.
+
+    try:
+        c = win.get_wch()
+    except (AttributeError, curses.error):
+        c = win.getch()
+        if 0 <= c <= 255:
+            c = chr(c)
+
+    # Decent resizing behavior on PDCurses requires calling resize_term(0, 0)
+    # after receiving KEY_RESIZE, while ncurses (usually) handles terminal
+    # resizing automatically in get(_w)ch() (see the end of the
+    # resizeterm(3NCURSES) man page).
+    #
+    # resize_term(0, 0) reliably fails and does nothing on ncurses, so this
+    # hack gives ncurses/PDCurses compatibility for resizing. I don't know
+    # whether it would cause trouble for other implementations.
+    if c == curses.KEY_RESIZE:
+        try:
+            curses.resize_term(0, 0)
+        except curses.error:
+            pass
+
+    return c
+
+
+def _warn(*args):
+    # Temporarily returns from curses to shell mode and prints a warning to
+    # stderr. The warning would get lost in curses mode.
+    curses.endwin()
+    print("menuconfig warning: ", end="", file=sys.stderr)
+    print(*args, file=sys.stderr)
+    curses.doupdate()
+
+
+# Ignore exceptions from some functions that might fail, e.g. for small
+# windows. They usually do reasonable things anyway.
+
+
+def _safe_curs_set(visibility):
+    try:
+        curses.curs_set(visibility)
+    except curses.error:
+        pass
+
+
+def _safe_addstr(win, *args):
+    # Clip the line to avoid wrapping to the next line, which looks glitchy.
+    # addchstr() would do it for us, but it's not available in the 'curses'
+    # module.
+
+    attr = None
+    if isinstance(args[0], str):
+        y, x = win.getyx()
+        s = args[0]
+        if len(args) == 2:
+            attr = args[1]
+    else:
+        y, x, s = args[:3]
+        if len(args) == 4:
+            attr = args[3]
+
+    maxlen = _width(win) - x
+    s = s.expandtabs()
+
+    try:
+        # The 'curses' module uses wattr_set() internally if you pass 'attr',
+        # overwriting the background style, so setting 'attr' to 0 in the first
+        # case won't do the right thing
+        if attr is None:
+            win.addnstr(y, x, s, maxlen)
+        else:
+            win.addnstr(y, x, s, maxlen, attr)
+    except curses.error:
+        pass
+
+
+def _safe_addch(win, *args):
+    try:
+        win.addch(*args)
+    except curses.error:
+        pass
+
+
+def _safe_hline(win, *args):
+    try:
+        win.hline(*args)
+    except curses.error:
+        pass
+
+
+def _safe_vline(win, *args):
+    try:
+        win.vline(*args)
+    except curses.error:
+        pass
+
+
+def _safe_move(win, *args):
+    try:
+        win.move(*args)
+    except curses.error:
+        pass
+
+
+def _change_c_lc_ctype_to_utf8():
+    # See _CHANGE_C_LC_CTYPE_TO_UTF8
+
+    if _IS_WINDOWS:
+        # Windows rarely has issues here, and the PEP 538 implementation avoids
+        # changing the locale on it. None of the UTF-8 locales below were
+        # supported from some quick testing either. Play it safe.
+        return
+
+    def try_set_locale(loc):
+        try:
+            locale.setlocale(locale.LC_CTYPE, loc)
+            return True
+        except locale.Error:
+            return False
+
+    # Is LC_CTYPE set to the C locale?
+    if locale.setlocale(locale.LC_CTYPE) == "C":
+        # This list was taken from the PEP 538 implementation in the CPython
+        # code, in Python/pylifecycle.c
+        for loc in "C.UTF-8", "C.utf8", "UTF-8":
+            if try_set_locale(loc):
+                # LC_CTYPE successfully changed
+                return
+
+
+if __name__ == "__main__":
+    _main()
diff --git a/scripts/Kconfiglib/oldconfig.py b/scripts/Kconfiglib/oldconfig.py
new file mode 100755
index 00000000000..53434b252ff
--- /dev/null
+++ b/scripts/Kconfiglib/oldconfig.py
@@ -0,0 +1,246 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Implements oldconfig functionality.
+
+  1. Loads existing .config
+  2. Prompts for the value of all modifiable symbols/choices that
+     aren't already set in the .config
+  3. Writes an updated .config
+
+The default input/output filename is '.config'. A different filename can be
+passed in the KCONFIG_CONFIG environment variable.
+
+When overwriting a configuration file, the old version is saved to
+<filename>.old (e.g. .config.old).
+
+Entering '?' displays the help text of the symbol/choice, if any.
+
+Unlike 'make oldconfig', this script doesn't print menu titles and comments,
+but gives Kconfig definition locations. Printing menus and comments would be
+pretty easy to add: Look at the parents of each item, and print all menu
+prompts and comments unless they have already been printed (assuming you want
+to skip "irrelevant" menus).
+"""
+from __future__ import print_function
+
+import sys
+
+from kconfiglib import Symbol, Choice, BOOL, TRISTATE, HEX, standard_kconfig
+
+
+# Python 2/3 compatibility hack
+if sys.version_info[0] < 3:
+    input = raw_input
+
+
+def _main():
+    # Earlier symbols in Kconfig files might depend on later symbols and become
+    # visible if their values change. This flag is set to True if the value of
+    # any symbol changes, in which case we rerun the oldconfig to check for new
+    # visible symbols.
+    global conf_changed
+
+    kconf = standard_kconfig(__doc__)
+    print(kconf.load_config())
+
+    while True:
+        conf_changed = False
+
+        for node in kconf.node_iter():
+            oldconfig(node)
+
+        if not conf_changed:
+            break
+
+    print(kconf.write_config())
+
+
+def oldconfig(node):
+    """
+    Prompts the user for a value if node.item is a visible symbol/choice with
+    no user value.
+    """
+    # See main()
+    global conf_changed
+
+    # Only symbols and choices can be configured
+    if not isinstance(node.item, (Symbol, Choice)):
+        return
+
+    # Skip symbols and choices that aren't visible
+    if not node.item.visibility:
+        return
+
+    # Skip symbols and choices that don't have a prompt (at this location)
+    if not node.prompt:
+        return
+
+    if isinstance(node.item, Symbol):
+        sym = node.item
+
+        # Skip symbols that already have a user value
+        if sym.user_value is not None:
+            return
+
+        # Skip symbols that can only have a single value, due to selects
+        if len(sym.assignable) == 1:
+            return
+
+        # Skip symbols in choices in y mode. We ask once for the entire choice
+        # instead.
+        if sym.choice and sym.choice.tri_value == 2:
+            return
+
+        # Loop until the user enters a valid value or enters a blank string
+        # (for the default value)
+        while True:
+            val = input("{} ({}) [{}] ".format(
+                node.prompt[0], _name_and_loc_str(sym),
+                _default_value_str(sym)))
+
+            if val == "?":
+                _print_help(node)
+                continue
+
+            # Substitute a blank string with the default value the symbol
+            # would get
+            if not val:
+                val = sym.str_value
+
+            # Automatically add a "0x" prefix for hex symbols, like the
+            # menuconfig interface does. This isn't done when loading .config
+            # files, hence why set_value() doesn't do it automatically.
+            if sym.type == HEX and not val.startswith(("0x", "0X")):
+                val = "0x" + val
+
+            old_str_val = sym.str_value
+
+            # Kconfiglib itself will print a warning here if the value
+            # is invalid, so we don't need to bother
+            if sym.set_value(val):
+                # Valid value input. We're done with this node.
+
+                if sym.str_value != old_str_val:
+                    conf_changed = True
+
+                return
+
+    else:
+        choice = node.item
+
+        # Skip choices that already have a visible user selection...
+        if choice.user_selection and choice.user_selection.visibility == 2:
+            # ...unless there are new visible symbols in the choice. (We know
+            # they have y (2) visibility in that case, because m-visible
+            # symbols get demoted to n-visibility in y-mode choices, and the
+            # user-selected symbol had visibility y.)
+            for sym in choice.syms:
+                if sym is not choice.user_selection and sym.visibility and \
+                   sym.user_value is None:
+                    # New visible symbols in the choice
+                    break
+            else:
+                # No new visible symbols in the choice
+                return
+
+        # Get a list of available selections. The mode of the choice limits
+        # the visibility of the choice value symbols, so this will indirectly
+        # skip choices in n and m mode.
+        options = [sym for sym in choice.syms if sym.visibility == 2]
+
+        if not options:
+            # No y-visible choice value symbols
+            return
+
+        # Loop until the user enters a valid selection or a blank string (for
+        # the default selection)
+        while True:
+            print("{} ({})".format(node.prompt[0], _name_and_loc_str(choice)))
+
+            for i, sym in enumerate(options, 1):
+                print("{} {}. {} ({})".format(
+                    ">" if sym is choice.selection else " ",
+                    i,
+                    # Assume people don't define choice symbols with multiple
+                    # prompts. That generates a warning anyway.
+                    sym.nodes[0].prompt[0],
+                    sym.name))
+
+            sel_index = input("choice[1-{}]: ".format(len(options)))
+
+            if sel_index == "?":
+                _print_help(node)
+                continue
+
+            # Pick the default selection if the string is blank
+            if not sel_index:
+                choice.selection.set_value(2)
+                break
+
+            try:
+                sel_index = int(sel_index)
+            except ValueError:
+                print("Bad index", file=sys.stderr)
+                continue
+
+            if not 1 <= sel_index <= len(options):
+                print("Bad index", file=sys.stderr)
+                continue
+
+            # Valid selection
+
+            if options[sel_index - 1].tri_value != 2:
+                conf_changed = True
+
+            options[sel_index - 1].set_value(2)
+            break
+
+        # Give all of the non-selected visible choice symbols the user value n.
+        # This makes it so that the choice is no longer considered new once we
+        # do additional passes, if the reason that it was considered new was
+        # that it had new visible choice symbols.
+        #
+        # Only giving visible choice symbols the user value n means we will
+        # prompt for the choice again if later user selections make more new
+        # choice symbols visible, which is correct.
+        for sym in choice.syms:
+            if sym is not choice.user_selection and sym.visibility:
+                sym.set_value(0)
+
+
+def _name_and_loc_str(sc):
+    # Helper for printing the name of the symbol/choice 'sc' along with the
+    # location(s) in the Kconfig files where it is defined. Unnamed choices
+    # return "choice" instead of the name.
+
+    return "{}, defined at {}".format(
+        sc.name or "choice",
+        ", ".join("{}:{}".format(node.filename, node.linenr)
+                  for node in sc.nodes))
+
+
+def _print_help(node):
+    print("\n" + (node.help or "No help text\n"))
+
+
+def _default_value_str(sym):
+    # Returns the "m/M/y" string in e.g.
+    #
+    #   TRISTATE_SYM prompt (TRISTATE_SYM, defined at Kconfig:9) [n/M/y]:
+    #
+    # For string/int/hex, returns the default value as-is.
+
+    if sym.type in (BOOL, TRISTATE):
+        return "/".join(("NMY" if sym.tri_value == tri else "nmy")[tri]
+                        for tri in sym.assignable)
+
+    # string/int/hex
+    return sym.str_value
+
+
+if __name__ == "__main__":
+    _main()
diff --git a/scripts/Kconfiglib/olddefconfig.py b/scripts/Kconfiglib/olddefconfig.py
new file mode 100755
index 00000000000..2dadfb415e8
--- /dev/null
+++ b/scripts/Kconfiglib/olddefconfig.py
@@ -0,0 +1,28 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2018-2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Updates an old .config file or creates a new one, by filling in default values
+for all new symbols. This is the same as picking the default selection for all
+symbols in oldconfig, or entering the menuconfig interface and immediately
+saving.
+
+The default input/output filename is '.config'. A different filename can be
+passed in the KCONFIG_CONFIG environment variable.
+
+When overwriting a configuration file, the old version is saved to
+<filename>.old (e.g. .config.old).
+"""
+import kconfiglib
+
+
+def main():
+    kconf = kconfiglib.standard_kconfig(__doc__)
+    print(kconf.load_config())
+    print(kconf.write_config())
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/savedefconfig.py b/scripts/Kconfiglib/savedefconfig.py
new file mode 100755
index 00000000000..0f36bde497d
--- /dev/null
+++ b/scripts/Kconfiglib/savedefconfig.py
@@ -0,0 +1,49 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Saves a minimal configuration file that only lists symbols that differ in value
+from their defaults. Loading such a configuration file is equivalent to loading
+the "full" configuration file.
+
+Minimal configuration files are handy to start from when editing configuration
+files by hand.
+
+The default input configuration file is '.config'. A different input filename
+can be passed in the KCONFIG_CONFIG environment variable.
+
+Note: Minimal configurations can also be generated from within the menuconfig
+interface.
+"""
+import argparse
+
+import kconfiglib
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description=__doc__)
+
+    parser.add_argument(
+        "--kconfig",
+        default="Kconfig",
+        help="Top-level Kconfig file (default: Kconfig)")
+
+    parser.add_argument(
+        "--out",
+        metavar="MINIMAL_CONFIGURATION",
+        default="defconfig",
+        help="Output filename for minimal configuration (default: defconfig)")
+
+    args = parser.parse_args()
+
+    kconf = kconfiglib.Kconfig(args.kconfig, suppress_traceback=True)
+    print(kconf.load_config())
+    print(kconf.write_min_config(args.out))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/scripts/Kconfiglib/setconfig.py b/scripts/Kconfiglib/setconfig.py
new file mode 100755
index 00000000000..f9cf5cd314d
--- /dev/null
+++ b/scripts/Kconfiglib/setconfig.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+
+# Copyright (c) 2019, Ulf Magnusson
+# SPDX-License-Identifier: ISC
+
+"""
+Simple utility for setting configuration values from the command line.
+
+Sample usage:
+
+  $ setconfig FOO_SUPPORT=y BAR_BITS=8
+
+Note: Symbol names should not be prefixed with 'CONFIG_'.
+
+The exit status on errors is 1.
+
+The default input/output configuration file is '.config'. A different filename
+can be passed in the KCONFIG_CONFIG environment variable.
+
+When overwriting a configuration file, the old version is saved to
+<filename>.old (e.g. .config.old).
+"""
+import argparse
+import sys
+
+import kconfiglib
+
+
+def main():
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description=__doc__)
+
+    parser.add_argument(
+        "--kconfig",
+        default="Kconfig",
+        help="Top-level Kconfig file (default: Kconfig)")
+
+    parser.add_argument(
+        "--no-check-exists",
+        dest="check_exists",
+        action="store_false",
+        help="Ignore assignments to non-existent symbols instead of erroring "
+             "out")
+
+    parser.add_argument(
+        "--no-check-value",
+        dest="check_value",
+        action="store_false",
+        help="Ignore assignments that didn't \"take\" (where the symbol got a "
+             "different value, e.g. due to unsatisfied dependencies) instead "
+             "of erroring out")
+
+    parser.add_argument(
+        "assignments",
+        metavar="ASSIGNMENT",
+        nargs="*",
+        help="A 'NAME=value' assignment")
+
+    args = parser.parse_args()
+
+    kconf = kconfiglib.Kconfig(args.kconfig, suppress_traceback=True)
+    print(kconf.load_config())
+
+    for arg in args.assignments:
+        if "=" not in arg:
+            sys.exit("error: no '=' in assignment: '{}'".format(arg))
+        name, value = arg.split("=", 1)
+
+        if name not in kconf.syms:
+            if not args.check_exists:
+                continue
+            sys.exit("error: no symbol '{}' in configuration".format(name))
+
+        sym = kconf.syms[name]
+
+        if not sym.set_value(value):
+            sys.exit("error: '{}' is an invalid value for the {} symbol {}"
+                     .format(value, kconfiglib.TYPE_TO_STR[sym.orig_type],
+                             name))
+
+        if args.check_value and sym.str_value != value:
+            sys.exit("error: {} was assigned the value '{}', but got the "
+                     "value '{}'. Check the symbol's dependencies, and make "
+                     "sure that it has a prompt."
+                     .format(name, value, sym.str_value))
+
+    print(kconf.write_config())
+
+
+if __name__ == "__main__":
+    main()

From 662e631ccef2b20d7aba5d077ae0891f6b55ad2d Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:09 +0530
Subject: [PATCH 1037/1765] Makefile: Add initial kconfig support for each
 platform

We extend the top-level makefile to allow kconfig based configuration
for each platform where each platform has it's own set of configs with
"defconfig" being the default config.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 Kconfig                                   | 23 ++++++++
 Makefile                                  | 72 +++++++++++++++++++----
 firmware/Kconfig                          |  1 +
 lib/utils/Kconfig                         |  1 +
 platform/andes/ae350/Kconfig              |  5 ++
 platform/andes/ae350/configs/defconfig    |  0
 platform/fpga/ariane/Kconfig              |  5 ++
 platform/fpga/ariane/configs/defconfig    |  0
 platform/fpga/openpiton/Kconfig           |  5 ++
 platform/fpga/openpiton/configs/defconfig |  0
 platform/generic/Kconfig                  |  5 ++
 platform/generic/configs/defconfig        |  0
 platform/kendryte/k210/Kconfig            |  5 ++
 platform/kendryte/k210/configs/defconfig  |  0
 platform/nuclei/ux600/Kconfig             |  5 ++
 platform/nuclei/ux600/configs/defconfig   |  0
 platform/template/Kconfig                 | 12 ++++
 platform/template/configs/defconfig       |  0
 18 files changed, 127 insertions(+), 12 deletions(-)
 create mode 100644 Kconfig
 create mode 100644 firmware/Kconfig
 create mode 100644 lib/utils/Kconfig
 create mode 100644 platform/andes/ae350/Kconfig
 create mode 100644 platform/andes/ae350/configs/defconfig
 create mode 100644 platform/fpga/ariane/Kconfig
 create mode 100644 platform/fpga/ariane/configs/defconfig
 create mode 100644 platform/fpga/openpiton/Kconfig
 create mode 100644 platform/fpga/openpiton/configs/defconfig
 create mode 100644 platform/generic/Kconfig
 create mode 100644 platform/generic/configs/defconfig
 create mode 100644 platform/kendryte/k210/Kconfig
 create mode 100644 platform/kendryte/k210/configs/defconfig
 create mode 100644 platform/nuclei/ux600/Kconfig
 create mode 100644 platform/nuclei/ux600/configs/defconfig
 create mode 100644 platform/template/Kconfig
 create mode 100644 platform/template/configs/defconfig

diff --git a/Kconfig b/Kconfig
new file mode 100644
index 00000000000..b3213a993bc
--- /dev/null
+++ b/Kconfig
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+mainmenu "OpenSBI $(OPENSBI_PLATFORM) Configuration"
+
+config OPENSBI_SRC_DIR
+	string
+	option env="OPENSBI_SRC_DIR"
+
+config OPENSBI_PLATFORM
+	string
+	option env="OPENSBI_PLATFORM"
+
+config OPENSBI_PLATFORM_SRC_DIR
+	string
+	option env="OPENSBI_PLATFORM_SRC_DIR"
+
+menu "Platform Options"
+source "$(OPENSBI_PLATFORM_SRC_DIR)/Kconfig"
+endmenu
+
+source "$(OPENSBI_SRC_DIR)/lib/utils/Kconfig"
+
+source "$(OPENSBI_SRC_DIR)/firmware/Kconfig"
diff --git a/Makefile b/Makefile
index f619ef75939..c5a34670f61 100644
--- a/Makefile
+++ b/Makefile
@@ -52,6 +52,9 @@ ifdef PLATFORM_DIR
 else
  platform_parent_dir=$(src_dir)/platform
 endif
+ifndef PLATFORM_DEFCONFIG
+PLATFORM_DEFCONFIG=defconfig
+endif
 
 # Check if verbosity is ON for build process
 CMD_PREFIX_DEFAULT := @
@@ -70,6 +73,20 @@ export libsbi_dir=$(CURDIR)/lib/sbi
 export libsbiutils_dir=$(CURDIR)/lib/utils
 export firmware_dir=$(CURDIR)/firmware
 
+# Setup variables for kconfig
+ifdef PLATFORM
+export PYTHONDONTWRITEBYTECODE=1
+export KCONFIG_DIR=$(platform_build_dir)/kconfig
+export KCONFIG_AUTOLIST=$(KCONFIG_DIR)/auto.list
+export KCONFIG_AUTOHEADER=$(KCONFIG_DIR)/autoconf.h
+export KCONFIG_AUTOCMD=$(KCONFIG_DIR)/auto.conf.cmd
+export KCONFIG_CONFIG=$(KCONFIG_DIR)/.config
+# Additional exports for include paths in Kconfig files
+export OPENSBI_SRC_DIR=$(src_dir)
+export OPENSBI_PLATFORM=$(PLATFORM)
+export OPENSBI_PLATFORM_SRC_DIR=$(platform_src_dir)
+endif
+
 # Find library version
 OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
 OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
@@ -183,8 +200,36 @@ libsbi-object-mks=$(shell if [ -d $(libsbi_dir) ]; then find $(libsbi_dir) -inam
 libsbiutils-object-mks=$(shell if [ -d $(libsbiutils_dir) ]; then find $(libsbiutils_dir) -iname "objects.mk" | sort -r; fi)
 firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir) -iname "objects.mk" | sort -r; fi)
 
-# Include platform specifig config.mk
+# The "make all" rule should always be first rule
+.PHONY: all
+all:
+
+# Include platform specific .config and config.mk
 ifdef PLATFORM
+.PHONY: menuconfig
+menuconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
+	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
+	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/menuconfig.py $(src_dir)/Kconfig
+	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/genconfig.py --header-path $(KCONFIG_AUTOHEADER) --sync-deps $(KCONFIG_DIR) --file-list $(KCONFIG_AUTOLIST) $(src_dir)/Kconfig
+
+.PHONY: savedefconfig
+savedefconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
+	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
+	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/savedefconfig.py --kconfig $(src_dir)/Kconfig --out $(KCONFIG_DIR)/defconfig
+
+$(KCONFIG_CONFIG): $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG) $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
+	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
+	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/defconfig.py --kconfig $(src_dir)/Kconfig $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG)
+	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/genconfig.py --header-path $(KCONFIG_AUTOHEADER) --sync-deps $(KCONFIG_DIR) --file-list $(KCONFIG_AUTOLIST) $(src_dir)/Kconfig
+
+$(KCONFIG_AUTOCMD): $(KCONFIG_CONFIG)
+	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
+	$(CMD_PREFIX)echo -n "$(KCONFIG_CONFIG): " > $(KCONFIG_AUTOCMD)
+	$(CMD_PREFIX)cat $(KCONFIG_AUTOLIST) | tr '\n' ' ' >> $(KCONFIG_AUTOCMD)
+
+include $(KCONFIG_CONFIG)
+include $(KCONFIG_AUTOCMD)
+
 include $(platform_src_dir)/config.mk
 endif
 
@@ -280,6 +325,9 @@ ifeq ($(BUILD_INFO),y)
 GENFLAGS	+=	-DOPENSBI_BUILD_TIME_STAMP="\"$(OPENSBI_BUILD_TIME_STAMP)\""
 GENFLAGS	+=	-DOPENSBI_BUILD_COMPILER_VERSION="\"$(OPENSBI_BUILD_COMPILER_VERSION)\""
 endif
+ifdef PLATFORM
+GENFLAGS	+=	-include $(KCONFIG_AUTOHEADER)
+endif
 GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
@@ -419,7 +467,7 @@ targets-y += $(platform_build_dir)/lib/libplatsbi.a
 endif
 targets-y += $(firmware-bins-path-y)
 
-# Default rule "make" should always be first rule
+# The default "make all" rule
 .PHONY: all
 all: $(targets-y)
 
@@ -435,7 +483,7 @@ $(build_dir)/lib/libsbiutils.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y)
 $(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(build_dir)/%.dep: $(src_dir)/%.c
+$(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 
 $(build_dir)/%.o: $(src_dir)/%.c
@@ -449,14 +497,14 @@ $(build_dir)/lib/sbi/sbi_init.o: $(libsbi_dir)/sbi_init.c FORCE
 	$(call compile_cc,$@,$<)
 endif
 
-$(build_dir)/%.dep: $(src_dir)/%.S
+$(build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_CONFIG)
 	$(call compile_as_dep,$@,$<)
 
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(build_dir)/%.dep: $(src_dir)/%.carray
-	$(call compile_gen_dep,$@,.c,$<)
+$(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
 $(build_dir)/%.c: $(src_dir)/%.carray
@@ -471,10 +519,10 @@ $(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.e
 $(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 
-$(platform_build_dir)/%.dep: $(platform_src_dir)/%.c
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 
-$(platform_build_dir)/%.o: $(platform_src_dir)/%.c
+$(platform_build_dir)/%.o: $(platform_src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc,$@,$<)
 
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
@@ -483,8 +531,8 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts
-	$(call compile_gen_dep,$@,.dtb,$<)
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts $(KCONFIG_CONFIG)
+	$(call compile_gen_dep,$@,.dtb,$< $(KCONFIG_CONFIG))
 	$(call compile_gen_dep,$@,.c,$(@:.dep=.dtb))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
@@ -494,13 +542,13 @@ $(platform_build_dir)/%.c: $(platform_build_dir)/%.dtb
 $(platform_build_dir)/%.dtb: $(platform_src_dir)/%.dts
 	$(call compile_dts,$@,$<)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.c
+$(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 
 $(platform_build_dir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.S
+$(platform_build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_CONFIG)
 	$(call compile_as_dep,$@,$<)
 
 $(platform_build_dir)/%.o: $(src_dir)/%.S
diff --git a/firmware/Kconfig b/firmware/Kconfig
new file mode 100644
index 00000000000..d6e0506a873
--- /dev/null
+++ b/firmware/Kconfig
@@ -0,0 +1 @@
+# SPDX-License-Identifier: BSD-2-Clause
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
new file mode 100644
index 00000000000..d6e0506a873
--- /dev/null
+++ b/lib/utils/Kconfig
@@ -0,0 +1 @@
+# SPDX-License-Identifier: BSD-2-Clause
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
new file mode 100644
index 00000000000..4b73c76887b
--- /dev/null
+++ b/platform/andes/ae350/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_ANDES_AE350
+	bool
+	default y
diff --git a/platform/andes/ae350/configs/defconfig b/platform/andes/ae350/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
new file mode 100644
index 00000000000..70d20047940
--- /dev/null
+++ b/platform/fpga/ariane/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_ARIANE_FPGA
+	bool
+	default y
diff --git a/platform/fpga/ariane/configs/defconfig b/platform/fpga/ariane/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
new file mode 100644
index 00000000000..81e4b764acb
--- /dev/null
+++ b/platform/fpga/openpiton/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_OPENPITON_FPGA
+	bool
+	default y
diff --git a/platform/fpga/openpiton/configs/defconfig b/platform/fpga/openpiton/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
new file mode 100644
index 00000000000..3eab2826ab5
--- /dev/null
+++ b/platform/generic/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_GENERIC
+	bool
+	default y
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
new file mode 100644
index 00000000000..889f16bf823
--- /dev/null
+++ b/platform/kendryte/k210/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_KENDRYTE_K210
+	bool
+	default y
diff --git a/platform/kendryte/k210/configs/defconfig b/platform/kendryte/k210/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
new file mode 100644
index 00000000000..c368ef425e2
--- /dev/null
+++ b/platform/nuclei/ux600/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_NUCLEI_UX600
+	bool
+	default y
diff --git a/platform/nuclei/ux600/configs/defconfig b/platform/nuclei/ux600/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/template/Kconfig b/platform/template/Kconfig
new file mode 100644
index 00000000000..6fbb5670d2e
--- /dev/null
+++ b/platform/template/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+#
+# All mandatory drivers or libraries for this platform should
+# be directly selected by the PLATFORM_xyz kconfig symbol.
+#
+# All optional drivers or libraries for this platform should
+# be enabled via configs/defconfig of this platform.
+#
+config PLATFORM_TEMPLATE
+	bool
+	default y
diff --git a/platform/template/configs/defconfig b/platform/template/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d

From de80e9337d812c47087ef568be2b3af2e1bbaf04 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:14 +0530
Subject: [PATCH 1038/1765] Makefile: Compile lib/utils sources separately for
 each platform

Currently, if same build directory is used to compile two different
platforms then lib/utils objects are shared for these platforms.

We will be having platform specific configs to enable/disable drivers
in lib/utils and select compile time options for lib/utils sources.
This means lib/utils sources will now be compiled in a platform
specific way.

To tackle above, we update top-level Makefile as follows:
1) Don't create libsbiutils.a anymore because this can't be shared
   between platforms.
2) Compile lib/utils sources separately for each platform.
3) Add comments showing which make rules are for lib/sbi, lib/utils,
   firmware, and platform sources.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 Makefile                         | 48 ++++++++++++++++----------------
 docs/library_usage.md            |  6 +---
 scripts/create-binary-archive.sh |  2 +-
 3 files changed, 26 insertions(+), 30 deletions(-)

diff --git a/Makefile b/Makefile
index c5a34670f61..011c7a4f22e 100644
--- a/Makefile
+++ b/Makefile
@@ -243,8 +243,8 @@ include $(firmware-object-mks)
 
 # Setup list of objects
 libsbi-objs-path-y=$(foreach obj,$(libsbi-objs-y),$(build_dir)/lib/sbi/$(obj))
-libsbiutils-objs-path-y=$(foreach obj,$(libsbiutils-objs-y),$(build_dir)/lib/utils/$(obj))
 ifdef PLATFORM
+libsbiutils-objs-path-y=$(foreach obj,$(libsbiutils-objs-y),$(platform_build_dir)/lib/utils/$(obj))
 platform-objs-path-y=$(foreach obj,$(platform-objs-y),$(platform_build_dir)/$(obj))
 firmware-bins-path-y=$(foreach bin,$(firmware-bins-y),$(platform_build_dir)/firmware/$(bin))
 endif
@@ -461,7 +461,6 @@ compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo "$(1:.dep=$(2)): $(3)" >> $(1)
 
 targets-y  = $(build_dir)/lib/libsbi.a
-targets-y  += $(build_dir)/lib/libsbiutils.a
 ifdef PLATFORM
 targets-y += $(platform_build_dir)/lib/libplatsbi.a
 endif
@@ -474,12 +473,10 @@ all: $(targets-y)
 # Preserve all intermediate files
 .SECONDARY:
 
+# Rules for lib/sbi sources
 $(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(build_dir)/lib/libsbiutils.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y)
-	$(call compile_ar,$@,$^)
-
 $(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
@@ -503,22 +500,14 @@ $(build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_CONFIG)
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
+# Rules for platform sources
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_CONFIG)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(build_dir)/%.c: $(src_dir)/%.carray
+$(platform_build_dir)/%.c: $(platform_src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
-$(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
-	$(call compile_objcopy,$@,$<)
-
-$(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
-	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
-
-$(platform_build_dir)/%.ld: $(src_dir)/%.ldS
-	$(call compile_cpp,$@,$<)
-
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 
@@ -542,6 +531,23 @@ $(platform_build_dir)/%.c: $(platform_build_dir)/%.dtb
 $(platform_build_dir)/%.dtb: $(platform_src_dir)/%.dts
 	$(call compile_dts,$@,$<)
 
+# Rules for lib/utils and firmware sources
+$(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
+	$(call compile_objcopy,$@,$<)
+
+$(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
+	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
+
+$(platform_build_dir)/%.ld: $(src_dir)/%.ldS
+	$(call compile_cpp,$@,$<)
+
+$(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
+	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
+
+$(platform_build_dir)/%.c: $(src_dir)/%.carray
+	$(call compile_carray,$@,$<)
+
 $(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 
@@ -592,7 +598,6 @@ endif
 endif
 
 install_targets-y  = install_libsbi
-install_targets-y  += install_libsbiutils
 ifdef PLATFORM
 install_targets-y += install_libplatsbi
 install_targets-y += install_firmwares
@@ -607,17 +612,12 @@ install_libsbi: $(build_dir)/lib/libsbi.a
 	$(call inst_header_dir,$(install_root_dir)/$(install_include_path),$(include_dir)/sbi)
 	$(call inst_file,$(install_root_dir)/$(install_lib_path)/libsbi.a,$(build_dir)/lib/libsbi.a)
 
-.PHONY: install_libsbiutils
-install_libsbiutils: $(build_dir)/lib/libsbiutils.a
-	$(call inst_header_dir,$(install_root_dir)/$(install_include_path),$(include_dir)/sbi_utils)
-	$(call inst_file,$(install_root_dir)/$(install_lib_path)/libsbiutils.a,$(build_dir)/lib/libsbiutils.a)
-
 .PHONY: install_libplatsbi
-install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a
+install_libplatsbi: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a
 	$(call inst_file,$(install_root_dir)/$(install_lib_path)/opensbi/$(platform_subdir)/lib/libplatsbi.a,$(platform_build_dir)/lib/libplatsbi.a)
 
 .PHONY: install_firmwares
-install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(build_dir)/lib/libsbiutils.a $(firmware-bins-path-y)
+install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsbi.a $(firmware-bins-path-y)
 	$(call inst_file_list,$(install_root_dir),$(build_dir),$(install_firmware_path)/$(platform_subdir)/firmware,$(firmware-elfs-path-y))
 	$(call inst_file_list,$(install_root_dir),$(build_dir),$(install_firmware_path)/$(platform_subdir)/firmware,$(firmware-bins-path-y))
 
diff --git a/docs/library_usage.md b/docs/library_usage.md
index ff99801fcf4..d5d2ba92515 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -8,11 +8,7 @@ OpenSBI provides two types of static libraries:
    hooks for the execution of this interface must be provided by the firmware or
    bootloader linking with this library. This library is installed as
    *<install_directory>/lib/libsbi.a*
-2. *libsbiutils.a* - A static library that will contain all common code required
-   by any platform supported in OpenSBI. It will be built by default and included
-   in libplatsbi.a. This library is installed as
-   *<install_directory>/lib/libsbiutils.a*.
-3. *libplatsbi.a* - An example platform-specific static library integrating
+2. *libplatsbi.a* - An example platform-specific static library integrating
    *libsbi.a* with platform-specific hooks. This library is available only for
    the platforms supported by OpenSBI. This library is installed as
    *<install_directory>/platform/<platform_subdir>/lib/libplatsbi.a*
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 43c54523305..261a45ad6bd 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -118,7 +118,7 @@ build_opensbi() {
 	# Build and install generic library
 	echo "Build and install generic library XLEN=${BUILD_RISCV_XLEN}"
 	echo ""
-	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}/${BUILD_NAME}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi install_libsbiutils -j "${BUILD_NUM_THREADS}"
+	make -C "${BUILD_OPENSBI_SOURCE_PATH}" O="${BUILD_OUTPUT_PATH}/${BUILD_NAME}" I="${BUILD_OUTPUT_PATH}/${BUILD_ARCHIVE_NAME}" PLATFORM_RISCV_XLEN="${BUILD_RISCV_XLEN}" install_libsbi -j "${BUILD_NUM_THREADS}"
 	echo ""
 
 	# Build and install relevant platforms

From 26bbff5f76e0ecd7a8e3f322961c481b73097a65 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:21 +0530
Subject: [PATCH 1039/1765] lib: utils/serial: Use kconfig for
 enabling/disabling drivers

We update serial drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate serial
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/serial/fdt_serial.h |  8 +++
 lib/utils/Kconfig                     |  6 +++
 lib/utils/serial/Kconfig              | 71 +++++++++++++++++++++++++++
 lib/utils/serial/objects.mk           | 44 ++++++++---------
 platform/andes/ae350/Kconfig          |  1 +
 platform/fpga/ariane/Kconfig          |  1 +
 platform/fpga/openpiton/Kconfig       |  1 +
 platform/generic/configs/defconfig    |  8 +++
 platform/kendryte/k210/Kconfig        |  1 +
 platform/nuclei/ux600/Kconfig         |  1 +
 platform/template/Kconfig             |  1 +
 11 files changed, 121 insertions(+), 22 deletions(-)
 create mode 100644 lib/utils/serial/Kconfig

diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
index 6451c23ec2d..daa2e4f539c 100644
--- a/include/sbi_utils/serial/fdt_serial.h
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -12,6 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_SERIAL
+
 struct fdt_serial {
 	const struct fdt_match *match_table;
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
@@ -19,4 +21,10 @@ struct fdt_serial {
 
 int fdt_serial_init(void);
 
+#else
+
+static inline int fdt_serial_init(void) { return 0; }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index d6e0506a873..4524a3fd0e3 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -1 +1,7 @@
 # SPDX-License-Identifier: BSD-2-Clause
+
+menu "Utils and Drivers Support"
+
+source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
+
+endmenu
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
new file mode 100644
index 00000000000..e114f26e7b1
--- /dev/null
+++ b/lib/utils/serial/Kconfig
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "Serial Device Support"
+
+config FDT_SERIAL
+	bool "FDT based serial drivers"
+	default n
+
+if FDT_SERIAL
+
+config FDT_SERIAL_GAISLER
+	bool "Gaisler UART FDT driver"
+	select SERIAL_GAISLER
+	default n
+
+config FDT_SERIAL_HTIF
+	bool "Host transfer interface (HTIF) UART FDT driver"
+	default n
+
+config FDT_SERIAL_SHAKTI
+	bool "Shakti UART FDT driver"
+	select SERIAL_SHAKTI
+	default n
+
+config FDT_SERIAL_SIFIVE
+	bool "SiFive UART FDT driver"
+	select SERIAL_SIFIVE
+	default n
+
+config FDT_SERIAL_LITEX
+	bool "LiteX UART FDT driver"
+	select SERIAL_LITEX
+	default n
+
+config FDT_SERIAL_UART8250
+	bool "8250 UART FDT driver"
+	select SERIAL_UART8250
+	default n
+
+config FDT_SERIAL_XILINX_UARTLITE
+	bool "Xilinx UART Lite FDT driver"
+	select SERIAL_XILINX_UARTLITE
+	default n
+
+endif
+
+config SERIAL_GAISLER
+	bool "Gaisler UART support"
+	default n
+
+config SERIAL_SHAKTI
+	bool "Shakti UART support"
+	default n
+
+config SERIAL_SIFIVE
+	bool "SiFive UART support"
+	default n
+
+config SERIAL_LITEX
+	bool "LiteX UART support"
+	default n
+
+config SERIAL_UART8250
+	bool "8250 UART support"
+	default n
+
+config SERIAL_XILINX_UARTLITE
+	bool "Xilinx UART Lite support"
+	default n
+
+endmenu
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index d26a74eb89e..fa9f5a3081c 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -7,33 +7,33 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += serial/fdt_serial.o
-libsbiutils-objs-y += serial/fdt_serial_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial.o
+libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial_drivers.o
 
-carray-fdt_serial_drivers-y += fdt_serial_gaisler
-libsbiutils-objs-y += serial/fdt_serial_gaisler.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_GAISLER) += fdt_serial_gaisler
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_GAISLER) += serial/fdt_serial_gaisler.o
 
-carray-fdt_serial_drivers-y += fdt_serial_htif
-libsbiutils-objs-y += serial/fdt_serial_htif.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_HTIF) += fdt_serial_htif
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_HTIF) += serial/fdt_serial_htif.o
 
-carray-fdt_serial_drivers-y += fdt_serial_shakti
-libsbiutils-objs-y += serial/fdt_serial_shakti.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_SHAKTI) += fdt_serial_shakti
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_SHAKTI) += serial/fdt_serial_shakti.o
 
-carray-fdt_serial_drivers-y += fdt_serial_sifive
-libsbiutils-objs-y += serial/fdt_serial_sifive.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_SIFIVE) += fdt_serial_sifive
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_SIFIVE) += serial/fdt_serial_sifive.o
 
-carray-fdt_serial_drivers-y += fdt_serial_litex
-libsbiutils-objs-y += serial/fdt_serial_litex.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_LITEX) += fdt_serial_litex
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_LITEX) += serial/fdt_serial_litex.o
 
-carray-fdt_serial_drivers-y += fdt_serial_uart8250
-libsbiutils-objs-y += serial/fdt_serial_uart8250.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_UART8250) += fdt_serial_uart8250
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_UART8250) += serial/fdt_serial_uart8250.o
 
-carray-fdt_serial_drivers-y += fdt_serial_xlnx_uartlite
-libsbiutils-objs-y += serial/fdt_serial_xlnx_uartlite.o
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += fdt_serial_xlnx_uartlite
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += serial/fdt_serial_xlnx_uartlite.o
 
-libsbiutils-objs-y += serial/gaisler-uart.o
-libsbiutils-objs-y += serial/shakti-uart.o
-libsbiutils-objs-y += serial/sifive-uart.o
-libsbiutils-objs-y += serial/litex-uart.o
-libsbiutils-objs-y += serial/uart8250.o
-libsbiutils-objs-y += serial/xlnx-uartlite.o
+libsbiutils-objs-$(CONFIG_SERIAL_GAISLER) += serial/gaisler-uart.o
+libsbiutils-objs-$(CONFIG_SERIAL_SHAKTI) += serial/shakti-uart.o
+libsbiutils-objs-$(CONFIG_SERIAL_SIFIVE) += serial/sifive-uart.o
+libsbiutils-objs-$(CONFIG_SERIAL_LITEX) += serial/litex-uart.o
+libsbiutils-objs-$(CONFIG_SERIAL_UART8250) += serial/uart8250.o
+libsbiutils-objs-$(CONFIG_SERIAL_XILINX_UARTLITE) += serial/xlnx-uartlite.o
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 4b73c76887b..162d19c7b27 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -2,4 +2,5 @@
 
 config PLATFORM_ANDES_AE350
 	bool
+	select SERIAL_UART8250
 	default y
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
index 70d20047940..3ce0ec12660 100644
--- a/platform/fpga/ariane/Kconfig
+++ b/platform/fpga/ariane/Kconfig
@@ -2,4 +2,5 @@
 
 config PLATFORM_ARIANE_FPGA
 	bool
+	select SERIAL_UART8250
 	default y
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
index 81e4b764acb..4dd752dd594 100644
--- a/platform/fpga/openpiton/Kconfig
+++ b/platform/fpga/openpiton/Kconfig
@@ -2,4 +2,5 @@
 
 config PLATFORM_OPENPITON_FPGA
 	bool
+	select SERIAL_UART8250
 	default y
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index e69de29bb2d..ce70c597c56 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -0,0 +1,8 @@
+CONFIG_FDT_SERIAL=y
+CONFIG_FDT_SERIAL_GAISLER=y
+CONFIG_FDT_SERIAL_HTIF=y
+CONFIG_FDT_SERIAL_SHAKTI=y
+CONFIG_FDT_SERIAL_SIFIVE=y
+CONFIG_FDT_SERIAL_LITEX=y
+CONFIG_FDT_SERIAL_UART8250=y
+CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
index 889f16bf823..adc76133049 100644
--- a/platform/kendryte/k210/Kconfig
+++ b/platform/kendryte/k210/Kconfig
@@ -2,4 +2,5 @@
 
 config PLATFORM_KENDRYTE_K210
 	bool
+	select SERIAL_SIFIVE
 	default y
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
index c368ef425e2..69fe8f84ed7 100644
--- a/platform/nuclei/ux600/Kconfig
+++ b/platform/nuclei/ux600/Kconfig
@@ -2,4 +2,5 @@
 
 config PLATFORM_NUCLEI_UX600
 	bool
+	select SERIAL_SIFIVE
 	default y
diff --git a/platform/template/Kconfig b/platform/template/Kconfig
index 6fbb5670d2e..f0807295981 100644
--- a/platform/template/Kconfig
+++ b/platform/template/Kconfig
@@ -9,4 +9,5 @@
 #
 config PLATFORM_TEMPLATE
 	bool
+	select SERIAL_UART8250
 	default y

From 2adc94b466ed8154fb72d276bbfaf35e22d97033 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:26 +0530
Subject: [PATCH 1040/1765] lib: utils/reset: Use kconfig for
 enabling/disabling drivers

We update reset drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate reset
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/reset/fdt_reset.h | 12 +++++++++++
 lib/utils/Kconfig                   |  2 ++
 lib/utils/reset/Kconfig             | 33 +++++++++++++++++++++++++++++
 lib/utils/reset/objects.mk          | 28 ++++++++++++------------
 platform/generic/configs/defconfig  |  6 ++++++
 5 files changed, 67 insertions(+), 14 deletions(-)
 create mode 100644 lib/utils/reset/Kconfig

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index e7f73507e36..ea8063b8a90 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -17,6 +17,8 @@ struct fdt_reset {
 	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
+#ifdef CONFIG_FDT_RESET
+
 /**
  * fdt_reset_driver_init() - initialize reset driver based on the device-tree
  */
@@ -29,4 +31,14 @@ int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv);
  */
 void fdt_reset_init(void);
 
+#else
+
+static inline int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
+{
+	return 0;
+}
+static inline void fdt_reset_init(void) { }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 4524a3fd0e3..f061b7a3655 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
 
 endmenu
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
new file mode 100644
index 00000000000..845a1aea477
--- /dev/null
+++ b/lib/utils/reset/Kconfig
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "System Reset Support"
+
+config FDT_RESET
+	bool "FDT based reset drivers"
+	default n
+
+if FDT_RESET
+
+config FDT_RESET_GPIO
+	bool "GPIO FDT reset driver"
+	default n
+
+config FDT_RESET_HTIF
+	bool "Host transfer interface (HTIF) FDT reset driver"
+	default n
+
+config FDT_RESET_SIFIVE_TEST
+	bool "SiFive Test FDT reset driver"
+	default n
+
+config FDT_RESET_SUNXI_WDT
+	bool "Sunxi WDT FDT reset driver"
+	default n
+
+config FDT_RESET_THEAD
+	bool "T-HEAD FDT reset driver"
+	default n
+
+endif
+
+endmenu
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 8cddcdfb01d..8a50dd0403b 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -7,22 +7,22 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += reset/fdt_reset.o
-libsbiutils-objs-y += reset/fdt_reset_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset.o
+libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset_drivers.o
 
-carray-fdt_reset_drivers-y += fdt_poweroff_gpio
-carray-fdt_reset_drivers-y += fdt_reset_gpio
-libsbiutils-objs-y += reset/fdt_reset_gpio.o
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_GPIO) += fdt_poweroff_gpio
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_GPIO) += fdt_reset_gpio
+libsbiutils-objs-$(CONFIG_FDT_RESET_GPIO) += reset/fdt_reset_gpio.o
 
-carray-fdt_reset_drivers-y += fdt_reset_htif
-libsbiutils-objs-y += reset/fdt_reset_htif.o
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_HTIF) += fdt_reset_htif
+libsbiutils-objs-$(CONFIG_FDT_RESET_HTIF) += reset/fdt_reset_htif.o
 
-carray-fdt_reset_drivers-y += fdt_reset_sifive_test
-libsbiutils-objs-y += reset/fdt_reset_sifive_test.o
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SIFIVE_TEST) += fdt_reset_sifive_test
+libsbiutils-objs-$(CONFIG_FDT_RESET_SIFIVE_TEST) += reset/fdt_reset_sifive_test.o
 
-carray-fdt_reset_drivers-y += fdt_reset_sunxi_wdt
-libsbiutils-objs-y += reset/fdt_reset_sunxi_wdt.o
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SUNXI_WDT) += fdt_reset_sunxi_wdt
+libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 
-carray-fdt_reset_drivers-y += fdt_reset_thead
-libsbiutils-objs-y += reset/fdt_reset_thead.o
-libsbiutils-objs-y += reset/fdt_reset_thead_asm.o
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_THEAD) += fdt_reset_thead
+libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead.o
+libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead_asm.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index ce70c597c56..97786654022 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,3 +1,9 @@
+CONFIG_FDT_RESET=y
+CONFIG_FDT_RESET_GPIO=y
+CONFIG_FDT_RESET_HTIF=y
+CONFIG_FDT_RESET_SIFIVE_TEST=y
+CONFIG_FDT_RESET_SUNXI_WDT=y
+CONFIG_FDT_RESET_THEAD=y
 CONFIG_FDT_SERIAL=y
 CONFIG_FDT_SERIAL_GAISLER=y
 CONFIG_FDT_SERIAL_HTIF=y

From 3e76a607b5df33b2bc200c942fa76e6d06689cf6 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:31 +0530
Subject: [PATCH 1041/1765] lib: utils/sys: Use kconfig for enabling/disabling
 drivers

We update system drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate system
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/Kconfig        |  2 ++
 lib/utils/reset/Kconfig  |  2 ++
 lib/utils/serial/Kconfig |  1 +
 lib/utils/sys/Kconfig    | 13 +++++++++++++
 lib/utils/sys/objects.mk |  4 ++--
 5 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 lib/utils/sys/Kconfig

diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index f061b7a3655..492f4e9b2c5 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -6,4 +6,6 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/sys/Kconfig"
+
 endmenu
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 845a1aea477..e7a71e31c5d 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -14,10 +14,12 @@ config FDT_RESET_GPIO
 
 config FDT_RESET_HTIF
 	bool "Host transfer interface (HTIF) FDT reset driver"
+	select SYS_HTIF
 	default n
 
 config FDT_RESET_SIFIVE_TEST
 	bool "SiFive Test FDT reset driver"
+	select SYS_SIFIVE_TEST
 	default n
 
 config FDT_RESET_SUNXI_WDT
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index e114f26e7b1..bf37e348a0b 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -15,6 +15,7 @@ config FDT_SERIAL_GAISLER
 
 config FDT_SERIAL_HTIF
 	bool "Host transfer interface (HTIF) UART FDT driver"
+	select SYS_HTIF
 	default n
 
 config FDT_SERIAL_SHAKTI
diff --git a/lib/utils/sys/Kconfig b/lib/utils/sys/Kconfig
new file mode 100644
index 00000000000..ee85b1a3106
--- /dev/null
+++ b/lib/utils/sys/Kconfig
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "System Device Support"
+
+config SYS_HTIF
+	bool "Host transfere interface (HTIF) support"
+	default n
+
+config SYS_SIFIVE_TEST
+	bool "SiFive test support"
+	default n
+
+endmenu
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index 06be322392b..9f67aee2777 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -7,5 +7,5 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += sys/htif.o
-libsbiutils-objs-y += sys/sifive_test.o
+libsbiutils-objs-$(CONFIG_SYS_HTIF) += sys/htif.o
+libsbiutils-objs-$(CONFIG_SYS_SIFIVE_TEST) += sys/sifive_test.o

From 013dbb3a60db0f7d9c92990b266c3df9d3552c0c Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:37 +0530
Subject: [PATCH 1042/1765] lib: utils/timer: Use kconfig for
 enabling/disabling drivers

We update timer drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate timer
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/timer/fdt_timer.h |  9 +++++++++
 lib/utils/Kconfig                   |  2 ++
 lib/utils/timer/Kconfig             | 22 ++++++++++++++++++++++
 lib/utils/timer/objects.mk          | 10 +++++-----
 platform/fpga/ariane/Kconfig        |  1 +
 platform/fpga/openpiton/Kconfig     |  1 +
 platform/generic/configs/defconfig  |  2 ++
 platform/kendryte/k210/Kconfig      |  1 +
 platform/nuclei/ux600/Kconfig       |  1 +
 platform/template/Kconfig           |  1 +
 10 files changed, 45 insertions(+), 5 deletions(-)
 create mode 100644 lib/utils/timer/Kconfig

diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
index 36202a41528..cf105fed84c 100644
--- a/include/sbi_utils/timer/fdt_timer.h
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -12,6 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_TIMER
+
 struct fdt_timer {
 	const struct fdt_match *match_table;
 	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
@@ -23,4 +25,11 @@ void fdt_timer_exit(void);
 
 int fdt_timer_init(bool cold_boot);
 
+#else
+
+static inline void fdt_timer_exit(void) { }
+static inline int fdt_timer_init(bool cold_boot) { return 0; }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 492f4e9b2c5..6561d0b14c3 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -8,4 +8,6 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/sys/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/timer/Kconfig"
+
 endmenu
diff --git a/lib/utils/timer/Kconfig b/lib/utils/timer/Kconfig
new file mode 100644
index 00000000000..0a1c72718a3
--- /dev/null
+++ b/lib/utils/timer/Kconfig
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "Timer Device Support"
+
+config FDT_TIMER
+	bool "FDT based timer drivers"
+	default n
+
+if FDT_TIMER
+
+config FDT_TIMER_MTIMER
+	bool "ACLINT MTIMER FDT driver"
+	select TIMER_MTIMER
+	default n
+
+endif
+
+config TIMER_MTIMER
+	bool "ACLINT MTIMER support"
+	default n
+
+endmenu
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index bc4073d5a26..7f5f3cee870 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -7,10 +7,10 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += timer/aclint_mtimer.o
+libsbiutils-objs-$(CONFIG_TIMER_MTIMER) += timer/aclint_mtimer.o
 
-libsbiutils-objs-y += timer/fdt_timer.o
-libsbiutils-objs-y += timer/fdt_timer_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer.o
+libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer_drivers.o
 
-carray-fdt_timer_drivers-y += fdt_timer_mtimer
-libsbiutils-objs-y += timer/fdt_timer_mtimer.o
+carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_MTIMER) += fdt_timer_mtimer
+libsbiutils-objs-$(CONFIG_FDT_TIMER_MTIMER) += timer/fdt_timer_mtimer.o
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
index 3ce0ec12660..a7fd75859c9 100644
--- a/platform/fpga/ariane/Kconfig
+++ b/platform/fpga/ariane/Kconfig
@@ -3,4 +3,5 @@
 config PLATFORM_ARIANE_FPGA
 	bool
 	select SERIAL_UART8250
+	select TIMER_MTIMER
 	default y
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
index 4dd752dd594..a7f09e4425e 100644
--- a/platform/fpga/openpiton/Kconfig
+++ b/platform/fpga/openpiton/Kconfig
@@ -3,4 +3,5 @@
 config PLATFORM_OPENPITON_FPGA
 	bool
 	select SERIAL_UART8250
+	select TIMER_MTIMER
 	default y
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 97786654022..9b96a4f1baf 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -12,3 +12,5 @@ CONFIG_FDT_SERIAL_SIFIVE=y
 CONFIG_FDT_SERIAL_LITEX=y
 CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
+CONFIG_FDT_TIMER=y
+CONFIG_FDT_TIMER_MTIMER=y
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
index adc76133049..90db649d7ce 100644
--- a/platform/kendryte/k210/Kconfig
+++ b/platform/kendryte/k210/Kconfig
@@ -3,4 +3,5 @@
 config PLATFORM_KENDRYTE_K210
 	bool
 	select SERIAL_SIFIVE
+	select TIMER_MTIMER
 	default y
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
index 69fe8f84ed7..dec26542f76 100644
--- a/platform/nuclei/ux600/Kconfig
+++ b/platform/nuclei/ux600/Kconfig
@@ -3,4 +3,5 @@
 config PLATFORM_NUCLEI_UX600
 	bool
 	select SERIAL_SIFIVE
+	select TIMER_MTIMER
 	default y
diff --git a/platform/template/Kconfig b/platform/template/Kconfig
index f0807295981..96d4b9a625a 100644
--- a/platform/template/Kconfig
+++ b/platform/template/Kconfig
@@ -10,4 +10,5 @@
 config PLATFORM_TEMPLATE
 	bool
 	select SERIAL_UART8250
+	select TIMER_MTIMER
 	default y

From 76af9d40da21c4c67efb7730de263f914452fca0 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:45 +0530
Subject: [PATCH 1043/1765] lib: utils/ipi: Use kconfig for enabling/disabling
 drivers

We update ipi drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate ipi
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/ipi/fdt_ipi.h    |  9 +++++++++
 lib/utils/Kconfig                  |  2 ++
 lib/utils/ipi/Kconfig              | 22 ++++++++++++++++++++++
 lib/utils/ipi/objects.mk           | 10 +++++-----
 platform/fpga/ariane/Kconfig       |  1 +
 platform/fpga/openpiton/Kconfig    |  1 +
 platform/generic/configs/defconfig |  2 ++
 platform/kendryte/k210/Kconfig     |  1 +
 platform/nuclei/ux600/Kconfig      |  1 +
 platform/template/Kconfig          |  1 +
 10 files changed, 45 insertions(+), 5 deletions(-)
 create mode 100644 lib/utils/ipi/Kconfig

diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
index 93373532870..1dd9062d750 100644
--- a/include/sbi_utils/ipi/fdt_ipi.h
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -12,6 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_IPI
+
 struct fdt_ipi {
 	const struct fdt_match *match_table;
 	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
@@ -23,4 +25,11 @@ void fdt_ipi_exit(void);
 
 int fdt_ipi_init(bool cold_boot);
 
+#else
+
+static inline void fdt_ipi_exit(void) { }
+static inline int fdt_ipi_init(bool cold_boot) { return 0; }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 6561d0b14c3..50d97704ac4 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
diff --git a/lib/utils/ipi/Kconfig b/lib/utils/ipi/Kconfig
new file mode 100644
index 00000000000..c0634d3ae90
--- /dev/null
+++ b/lib/utils/ipi/Kconfig
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "IPI Device Support"
+
+config FDT_IPI
+	bool "FDT based ipi drivers"
+	default n
+
+if FDT_IPI
+
+config FDT_IPI_MSWI
+	bool "ACLINT MSWI FDT driver"
+	select IPI_MSWI
+	default n
+
+endif
+
+config IPI_MSWI
+	bool "ACLINT MSWI support"
+	default n
+
+endmenu
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 0b0bc2df430..0600cac414c 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -7,10 +7,10 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += ipi/aclint_mswi.o
+libsbiutils-objs-$(CONFIG_IPI_MSWI) += ipi/aclint_mswi.o
 
-libsbiutils-objs-y += ipi/fdt_ipi.o
-libsbiutils-objs-y += ipi/fdt_ipi_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi.o
+libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi_drivers.o
 
-carray-fdt_ipi_drivers-y += fdt_ipi_mswi
-libsbiutils-objs-y += ipi/fdt_ipi_mswi.o
+carray-fdt_ipi_drivers-$(CONFIG_FDT_IPI_MSWI) += fdt_ipi_mswi
+libsbiutils-objs-$(CONFIG_FDT_IPI_MSWI) += ipi/fdt_ipi_mswi.o
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
index a7fd75859c9..0bc15976b69 100644
--- a/platform/fpga/ariane/Kconfig
+++ b/platform/fpga/ariane/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_ARIANE_FPGA
 	bool
+	select IPI_MSWI
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
index a7f09e4425e..0e4e3ba6b7e 100644
--- a/platform/fpga/openpiton/Kconfig
+++ b/platform/fpga/openpiton/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_OPENPITON_FPGA
 	bool
+	select IPI_MSWI
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 9b96a4f1baf..e218c3259c1 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,3 +1,5 @@
+CONFIG_FDT_IPI=y
+CONFIG_FDT_IPI_MSWI=y
 CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
index 90db649d7ce..685a5cdd18d 100644
--- a/platform/kendryte/k210/Kconfig
+++ b/platform/kendryte/k210/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_KENDRYTE_K210
 	bool
+	select IPI_MSWI
 	select SERIAL_SIFIVE
 	select TIMER_MTIMER
 	default y
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
index dec26542f76..cd995a30931 100644
--- a/platform/nuclei/ux600/Kconfig
+++ b/platform/nuclei/ux600/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_NUCLEI_UX600
 	bool
+	select IPI_MSWI
 	select SERIAL_SIFIVE
 	select TIMER_MTIMER
 	default y
diff --git a/platform/template/Kconfig b/platform/template/Kconfig
index 96d4b9a625a..4d9646d4814 100644
--- a/platform/template/Kconfig
+++ b/platform/template/Kconfig
@@ -9,6 +9,7 @@
 #
 config PLATFORM_TEMPLATE
 	bool
+	select IPI_MSWI
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y

From 0b1cf2f64519887188c83d17d21302580a6c970e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:52 +0530
Subject: [PATCH 1044/1765] lib: utils/irqchip: Use kconfig for
 enabling/disabling drivers

We update irqchip drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate irqchip
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/irqchip/fdt_irqchip.h | 10 +++++++
 include/sbi_utils/irqchip/imsic.h       | 10 +++++++
 lib/utils/Kconfig                       |  2 ++
 lib/utils/irqchip/Kconfig               | 40 +++++++++++++++++++++++++
 lib/utils/irqchip/objects.mk            | 22 +++++++-------
 platform/andes/ae350/Kconfig            |  1 +
 platform/fpga/ariane/Kconfig            |  1 +
 platform/fpga/openpiton/Kconfig         |  1 +
 platform/generic/configs/defconfig      |  4 +++
 platform/kendryte/k210/Kconfig          |  1 +
 platform/nuclei/ux600/Kconfig           |  1 +
 platform/template/Kconfig               |  1 +
 12 files changed, 83 insertions(+), 11 deletions(-)
 create mode 100644 lib/utils/irqchip/Kconfig

diff --git a/include/sbi_utils/irqchip/fdt_irqchip.h b/include/sbi_utils/irqchip/fdt_irqchip.h
index 13ef6f71159..63e9fd9ee77 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip.h
@@ -12,6 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_IRQCHIP
+
 struct fdt_irqchip {
 	const struct fdt_match *match_table;
 	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
@@ -23,4 +25,12 @@ void fdt_irqchip_exit(void);
 
 int fdt_irqchip_init(bool cold_boot);
 
+#else
+
+static inline void fdt_irqchip_exit(void) { }
+
+static inline int fdt_irqchip_init(bool cold_boot) { return 0; }
+
+#endif
+
 #endif
diff --git a/include/sbi_utils/irqchip/imsic.h b/include/sbi_utils/irqchip/imsic.h
index cffcb5ae298..e295771e49f 100644
--- a/include/sbi_utils/irqchip/imsic.h
+++ b/include/sbi_utils/irqchip/imsic.h
@@ -33,6 +33,8 @@ struct imsic_data {
 	struct imsic_regs regs[IMSIC_MAX_REGS];
 };
 
+#ifdef CONFIG_IRQCHIP_IMSIC
+
 int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file);
 
 struct imsic_data *imsic_get_data(u32 hartid);
@@ -47,4 +49,12 @@ int imsic_data_check(struct imsic_data *imsic);
 
 int imsic_cold_irqchip_init(struct imsic_data *imsic);
 
+#else
+
+static inline void imsic_local_irqchip_init(void) { }
+
+static inline int imsic_data_check(struct imsic_data *imsic) { return 0; }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 50d97704ac4..3f315fd9aa6 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -4,6 +4,8 @@ menu "Utils and Drivers Support"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/irqchip/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
diff --git a/lib/utils/irqchip/Kconfig b/lib/utils/irqchip/Kconfig
new file mode 100644
index 00000000000..6a7e297b2c0
--- /dev/null
+++ b/lib/utils/irqchip/Kconfig
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "Interrupt Controller Support"
+
+config FDT_IRQCHIP
+	bool "FDT based interrupt controller drivers"
+	default n
+
+if FDT_IRQCHIP
+
+config FDT_IRQCHIP_APLIC
+	bool "Advanced Platform Level Interrupt Controller (APLIC) FDT driver"
+	select IRQCHIP_APLIC
+	default n
+
+config FDT_IRQCHIP_IMSIC
+	bool "Incoming Message Signalled Interrupt Controller (IMSIC) FDT driver"
+	select IRQCHIP_IMSIC
+	default n
+
+config FDT_IRQCHIP_PLIC
+	bool "Platform Level Interrupt Controller (PLIC) FDT driver"
+	select IRQCHIP_PLIC
+	default n
+
+endif
+
+config IRQCHIP_APLIC
+	bool "Advanced Platform Level Interrupt Controller (APLIC) support"
+	default n
+
+config IRQCHIP_IMSIC
+	bool "Incoming Message Signalled Interrupt Controller (IMSIC) support"
+	default n
+
+config IRQCHIP_PLIC
+	bool "Platform Level Interrupt Controller (PLIC) support"
+	default n
+
+endmenu
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index 7775bc45787..e45889177f0 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -7,18 +7,18 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += irqchip/fdt_irqchip.o
-libsbiutils-objs-y += irqchip/fdt_irqchip_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP) += irqchip/fdt_irqchip.o
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP) += irqchip/fdt_irqchip_drivers.o
 
-carray-fdt_irqchip_drivers-y += fdt_irqchip_aplic
-libsbiutils-objs-y += irqchip/fdt_irqchip_aplic.o
+carray-fdt_irqchip_drivers-$(CONFIG_FDT_IRQCHIP_APLIC) += fdt_irqchip_aplic
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP_APLIC) += irqchip/fdt_irqchip_aplic.o
 
-carray-fdt_irqchip_drivers-y += fdt_irqchip_imsic
-libsbiutils-objs-y += irqchip/fdt_irqchip_imsic.o
+carray-fdt_irqchip_drivers-$(CONFIG_FDT_IRQCHIP_IMSIC) += fdt_irqchip_imsic
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP_IMSIC) += irqchip/fdt_irqchip_imsic.o
 
-carray-fdt_irqchip_drivers-y += fdt_irqchip_plic
-libsbiutils-objs-y += irqchip/fdt_irqchip_plic.o
+carray-fdt_irqchip_drivers-$(CONFIG_FDT_IRQCHIP_PLIC) += fdt_irqchip_plic
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP_PLIC) += irqchip/fdt_irqchip_plic.o
 
-libsbiutils-objs-y += irqchip/aplic.o
-libsbiutils-objs-y += irqchip/imsic.o
-libsbiutils-objs-y += irqchip/plic.o
+libsbiutils-objs-$(CONFIG_IRQCHIP_APLIC) += irqchip/aplic.o
+libsbiutils-objs-$(CONFIG_IRQCHIP_IMSIC) += irqchip/imsic.o
+libsbiutils-objs-$(CONFIG_IRQCHIP_PLIC) += irqchip/plic.o
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 162d19c7b27..87deab05f63 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -2,5 +2,6 @@
 
 config PLATFORM_ANDES_AE350
 	bool
+	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	default y
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
index 0bc15976b69..5a720d91473 100644
--- a/platform/fpga/ariane/Kconfig
+++ b/platform/fpga/ariane/Kconfig
@@ -3,6 +3,7 @@
 config PLATFORM_ARIANE_FPGA
 	bool
 	select IPI_MSWI
+	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
index 0e4e3ba6b7e..973906ebd49 100644
--- a/platform/fpga/openpiton/Kconfig
+++ b/platform/fpga/openpiton/Kconfig
@@ -3,6 +3,7 @@
 config PLATFORM_OPENPITON_FPGA
 	bool
 	select IPI_MSWI
+	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index e218c3259c1..ad66a63843f 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,5 +1,9 @@
 CONFIG_FDT_IPI=y
 CONFIG_FDT_IPI_MSWI=y
+CONFIG_FDT_IRQCHIP=y
+CONFIG_FDT_IRQCHIP_APLIC=y
+CONFIG_FDT_IRQCHIP_IMSIC=y
+CONFIG_FDT_IRQCHIP_PLIC=y
 CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
index 685a5cdd18d..2a1daaacc02 100644
--- a/platform/kendryte/k210/Kconfig
+++ b/platform/kendryte/k210/Kconfig
@@ -3,6 +3,7 @@
 config PLATFORM_KENDRYTE_K210
 	bool
 	select IPI_MSWI
+	select IRQCHIP_PLIC
 	select SERIAL_SIFIVE
 	select TIMER_MTIMER
 	default y
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
index cd995a30931..464802ea8f7 100644
--- a/platform/nuclei/ux600/Kconfig
+++ b/platform/nuclei/ux600/Kconfig
@@ -3,6 +3,7 @@
 config PLATFORM_NUCLEI_UX600
 	bool
 	select IPI_MSWI
+	select IRQCHIP_PLIC
 	select SERIAL_SIFIVE
 	select TIMER_MTIMER
 	default y
diff --git a/platform/template/Kconfig b/platform/template/Kconfig
index 4d9646d4814..d73825da99f 100644
--- a/platform/template/Kconfig
+++ b/platform/template/Kconfig
@@ -10,6 +10,7 @@
 config PLATFORM_TEMPLATE
 	bool
 	select IPI_MSWI
+	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	select TIMER_MTIMER
 	default y

From b126ce4a8f5e5f8a45a62ec308e4f74ee590d467 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:33:57 +0530
Subject: [PATCH 1045/1765] lib: utils/i2c: Use kconfig for enabling/disabling
 drivers

We update i2c drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate i2c
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/Kconfig                  |  2 ++
 lib/utils/i2c/Kconfig              | 22 ++++++++++++++++++++++
 lib/utils/i2c/objects.mk           | 10 +++++-----
 platform/generic/configs/defconfig |  2 ++
 4 files changed, 31 insertions(+), 5 deletions(-)
 create mode 100644 lib/utils/i2c/Kconfig

diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 3f315fd9aa6..39452d5926f 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/i2c/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/irqchip/Kconfig"
diff --git a/lib/utils/i2c/Kconfig b/lib/utils/i2c/Kconfig
new file mode 100644
index 00000000000..16c44531806
--- /dev/null
+++ b/lib/utils/i2c/Kconfig
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "I2C Support"
+
+config FDT_I2C
+	bool "FDT based I2C drivers"
+	select I2C
+	default n
+
+if FDT_I2C
+
+config FDT_I2C_SIFIVE
+	bool "SiFive I2C FDT driver"
+	default n
+
+endif
+
+config I2C
+	bool "I2C support"
+	default n
+
+endmenu
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index bb0d6d59b1f..a0fbbb5de32 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -7,10 +7,10 @@
 #   Nikita Shubin <n.shubin@yadro.com>
 #
 
-libsbiutils-objs-y += i2c/i2c.o
+libsbiutils-objs-$(CONFIG_I2C) += i2c/i2c.o
 
-libsbiutils-objs-y += i2c/fdt_i2c.o
-libsbiutils-objs-y += i2c/fdt_i2c_adapter_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c.o
+libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c_adapter_drivers.o
 
-carray-fdt_i2c_adapter_drivers-y += fdt_i2c_adapter_sifive
-libsbiutils-objs-y += i2c/fdt_i2c_sifive.o
+carray-fdt_i2c_adapter_drivers-$(CONFIG_FDT_I2C_SIFIVE) += fdt_i2c_adapter_sifive
+libsbiutils-objs-$(CONFIG_FDT_I2C_SIFIVE) += i2c/fdt_i2c_sifive.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index ad66a63843f..c9c221e8c9a 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,3 +1,5 @@
+CONFIG_FDT_I2C=y
+CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_IPI=y
 CONFIG_FDT_IPI_MSWI=y
 CONFIG_FDT_IRQCHIP=y

From 5616aa4f4a6d88b1099b90a7e4b1fcf996cf5dab Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:02 +0530
Subject: [PATCH 1046/1765] lib: utils/gpio: Use kconfig for enabling/disabling
 drivers

We update gpio drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate gpio
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/Kconfig                  |  2 ++
 lib/utils/gpio/Kconfig             | 22 ++++++++++++++++++++++
 lib/utils/gpio/objects.mk          | 10 +++++-----
 lib/utils/reset/Kconfig            |  1 +
 platform/generic/configs/defconfig |  2 ++
 5 files changed, 32 insertions(+), 5 deletions(-)
 create mode 100644 lib/utils/gpio/Kconfig

diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 39452d5926f..673b02bd15f 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/gpio/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/i2c/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
diff --git a/lib/utils/gpio/Kconfig b/lib/utils/gpio/Kconfig
new file mode 100644
index 00000000000..daf7f91e8a0
--- /dev/null
+++ b/lib/utils/gpio/Kconfig
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "GPIO Support"
+
+config FDT_GPIO
+	bool "FDT based GPIO drivers"
+	select GPIO
+	default n
+
+if FDT_GPIO
+
+config FDT_GPIO_SIFIVE
+	bool "SiFive GPIO FDT driver"
+	default n
+
+endif
+
+config GPIO
+	bool "GPIO support"
+	default n
+
+endmenu
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index a5e131b41ed..eedd699d85f 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -7,10 +7,10 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
-libsbiutils-objs-y += gpio/fdt_gpio.o
-libsbiutils-objs-y += gpio/fdt_gpio_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio.o
+libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio_drivers.o
 
-carray-fdt_gpio_drivers-y += fdt_gpio_sifive
-libsbiutils-objs-y += gpio/fdt_gpio_sifive.o
+carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_SIFIVE) += fdt_gpio_sifive
+libsbiutils-objs-$(CONFIG_FDT_GPIO_SIFIVE) += gpio/fdt_gpio_sifive.o
 
-libsbiutils-objs-y += gpio/gpio.o
+libsbiutils-objs-$(CONFIG_GPIO) += gpio/gpio.o
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index e7a71e31c5d..71996cb714a 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -10,6 +10,7 @@ if FDT_RESET
 
 config FDT_RESET_GPIO
 	bool "GPIO FDT reset driver"
+	depends on FDT_GPIO
 	default n
 
 config FDT_RESET_HTIF
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index c9c221e8c9a..d56cef20689 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,3 +1,5 @@
+CONFIG_FDT_GPIO=y
+CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_IPI=y

From 68d7b85ec75119787d7c672062de5d29156c44be Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:08 +0530
Subject: [PATCH 1047/1765] lib: utils/fdt: Use kconfig for enabling/disabling

We update FDT support makefile to use kconfig for enabling/disabling.
To avoid compilation errors, we also enable FDT for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi_utils/fdt/fdt_domain.h |  9 +++++++++
 include/sbi_utils/fdt/fdt_pmu.h    | 10 ++++++++++
 lib/utils/Kconfig                  |  4 ++++
 lib/utils/fdt/Kconfig              | 18 ++++++++++++++++++
 lib/utils/fdt/objects.mk           |  8 ++++----
 lib/utils/gpio/Kconfig             |  1 +
 lib/utils/i2c/Kconfig              |  1 +
 lib/utils/ipi/Kconfig              |  1 +
 lib/utils/irqchip/Kconfig          |  1 +
 lib/utils/libfdt/Kconfig           |  5 +++++
 lib/utils/libfdt/objects.mk        |  2 +-
 lib/utils/reset/Kconfig            |  1 +
 lib/utils/serial/Kconfig           |  1 +
 lib/utils/timer/Kconfig            |  1 +
 platform/andes/ae350/Kconfig       |  1 +
 platform/fpga/ariane/Kconfig       |  1 +
 platform/fpga/openpiton/Kconfig    |  1 +
 platform/generic/Kconfig           |  3 +++
 platform/kendryte/k210/Kconfig     |  1 +
 platform/nuclei/ux600/Kconfig      |  1 +
 platform/nuclei/ux600/platform.c   |  1 -
 21 files changed, 66 insertions(+), 6 deletions(-)
 create mode 100644 lib/utils/fdt/Kconfig
 create mode 100644 lib/utils/libfdt/Kconfig

diff --git a/include/sbi_utils/fdt/fdt_domain.h b/include/sbi_utils/fdt/fdt_domain.h
index 5448eb4d957..ee09d1bfa52 100644
--- a/include/sbi_utils/fdt/fdt_domain.h
+++ b/include/sbi_utils/fdt/fdt_domain.h
@@ -13,6 +13,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_DOMAIN
+
 struct sbi_domain;
 
 /**
@@ -70,4 +72,11 @@ void fdt_domain_fixup(void *fdt);
  */
 int fdt_domains_populate(void *fdt);
 
+#else
+
+static inline void fdt_domain_fixup(void *fdt) { }
+static inline int fdt_domains_populate(void *fdt) { return 0; }
+
+#endif
+
 #endif /* __FDT_DOMAIN_H__ */
diff --git a/include/sbi_utils/fdt/fdt_pmu.h b/include/sbi_utils/fdt/fdt_pmu.h
index 2fa01edc074..c65cad78d78 100644
--- a/include/sbi_utils/fdt/fdt_pmu.h
+++ b/include/sbi_utils/fdt/fdt_pmu.h
@@ -13,6 +13,8 @@
 
 #include <sbi/sbi_types.h>
 
+#ifdef CONFIG_FDT_PMU
+
 /**
  * Fix up the PMU node in the device tree
  *
@@ -43,4 +45,12 @@ int fdt_pmu_setup(void *fdt);
  */
 uint64_t fdt_pmu_get_select_value(uint32_t event_idx);
 
+#else
+
+static inline void fdt_pmu_fixup(void *fdt) { }
+static inline int fdt_pmu_setup(void *fdt) { return 0; }
+static inline uint64_t fdt_pmu_get_select_value(uint32_t event_idx) { return 0; }
+
+#endif
+
 #endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 673b02bd15f..5a71e7509ca 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/fdt/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/gpio/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/i2c/Kconfig"
@@ -10,6 +12,8 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/irqchip/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/libfdt/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
diff --git a/lib/utils/fdt/Kconfig b/lib/utils/fdt/Kconfig
new file mode 100644
index 00000000000..23b003bfb46
--- /dev/null
+++ b/lib/utils/fdt/Kconfig
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menuconfig FDT
+	bool "Flattened Device Tree (FDT) support"
+	select LIBFDT
+	default n
+
+if FDT
+
+config FDT_DOMAIN
+	bool "FDT domain support"
+	default n
+
+config FDT_PMU
+	bool "FDT performance monitoring unit (PMU) support"
+	default n
+
+endif
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
index 03800f96d74..5cede81197c 100644
--- a/lib/utils/fdt/objects.mk
+++ b/lib/utils/fdt/objects.mk
@@ -4,7 +4,7 @@
 # Copyright (C) 2020 Bin Meng <bmeng.cn@gmail.com>
 #
 
-libsbiutils-objs-y += fdt/fdt_domain.o
-libsbiutils-objs-y += fdt/fdt_pmu.o
-libsbiutils-objs-y += fdt/fdt_helper.o
-libsbiutils-objs-y += fdt/fdt_fixup.o
+libsbiutils-objs-$(CONFIG_FDT_DOMAIN) += fdt/fdt_domain.o
+libsbiutils-objs-$(CONFIG_FDT_PMU) += fdt/fdt_pmu.o
+libsbiutils-objs-$(CONFIG_FDT) += fdt/fdt_helper.o
+libsbiutils-objs-$(CONFIG_FDT) += fdt/fdt_fixup.o
diff --git a/lib/utils/gpio/Kconfig b/lib/utils/gpio/Kconfig
index daf7f91e8a0..38a9d75c829 100644
--- a/lib/utils/gpio/Kconfig
+++ b/lib/utils/gpio/Kconfig
@@ -4,6 +4,7 @@ menu "GPIO Support"
 
 config FDT_GPIO
 	bool "FDT based GPIO drivers"
+	depends on FDT
 	select GPIO
 	default n
 
diff --git a/lib/utils/i2c/Kconfig b/lib/utils/i2c/Kconfig
index 16c44531806..46a3454c034 100644
--- a/lib/utils/i2c/Kconfig
+++ b/lib/utils/i2c/Kconfig
@@ -4,6 +4,7 @@ menu "I2C Support"
 
 config FDT_I2C
 	bool "FDT based I2C drivers"
+	depends on FDT
 	select I2C
 	default n
 
diff --git a/lib/utils/ipi/Kconfig b/lib/utils/ipi/Kconfig
index c0634d3ae90..efc89601560 100644
--- a/lib/utils/ipi/Kconfig
+++ b/lib/utils/ipi/Kconfig
@@ -4,6 +4,7 @@ menu "IPI Device Support"
 
 config FDT_IPI
 	bool "FDT based ipi drivers"
+	depends on FDT
 	default n
 
 if FDT_IPI
diff --git a/lib/utils/irqchip/Kconfig b/lib/utils/irqchip/Kconfig
index 6a7e297b2c0..7a71388c156 100644
--- a/lib/utils/irqchip/Kconfig
+++ b/lib/utils/irqchip/Kconfig
@@ -4,6 +4,7 @@ menu "Interrupt Controller Support"
 
 config FDT_IRQCHIP
 	bool "FDT based interrupt controller drivers"
+	depends on FDT
 	default n
 
 if FDT_IRQCHIP
diff --git a/lib/utils/libfdt/Kconfig b/lib/utils/libfdt/Kconfig
new file mode 100644
index 00000000000..d1cecf88943
--- /dev/null
+++ b/lib/utils/libfdt/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config LIBFDT
+	bool
+	default n
diff --git a/lib/utils/libfdt/objects.mk b/lib/utils/libfdt/objects.mk
index 8c060df9de4..0e01b5428e3 100644
--- a/lib/utils/libfdt/objects.mk
+++ b/lib/utils/libfdt/objects.mk
@@ -12,5 +12,5 @@ libfdt_files = fdt.o fdt_addresses.o fdt_check.o fdt_empty_tree.o fdt_ro.o fdt_r
 $(foreach file, $(libfdt_files), \
         $(eval CFLAGS_$(file) = -I$(src)/../../utils/libfdt))
 
-libsbiutils-objs-y += $(addprefix libfdt/,$(libfdt_files))
+libsbiutils-objs-$(CONFIG_LIBFDT) += $(addprefix libfdt/,$(libfdt_files))
 libsbiutils-genflags-y  += -I$(libsbiutils_dir)/libfdt/
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 71996cb714a..2e83ff638ae 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -4,6 +4,7 @@ menu "System Reset Support"
 
 config FDT_RESET
 	bool "FDT based reset drivers"
+	depends on FDT
 	default n
 
 if FDT_RESET
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index bf37e348a0b..152060de73b 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -4,6 +4,7 @@ menu "Serial Device Support"
 
 config FDT_SERIAL
 	bool "FDT based serial drivers"
+	depends on FDT
 	default n
 
 if FDT_SERIAL
diff --git a/lib/utils/timer/Kconfig b/lib/utils/timer/Kconfig
index 0a1c72718a3..23c48c5f2d5 100644
--- a/lib/utils/timer/Kconfig
+++ b/lib/utils/timer/Kconfig
@@ -4,6 +4,7 @@ menu "Timer Device Support"
 
 config FDT_TIMER
 	bool "FDT based timer drivers"
+	depends on FDT
 	default n
 
 if FDT_TIMER
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 87deab05f63..d57f19fcec9 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_ANDES_AE350
 	bool
+	select FDT
 	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	default y
diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig
index 5a720d91473..e1f118b69a5 100644
--- a/platform/fpga/ariane/Kconfig
+++ b/platform/fpga/ariane/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_ARIANE_FPGA
 	bool
+	select FDT
 	select IPI_MSWI
 	select IRQCHIP_PLIC
 	select SERIAL_UART8250
diff --git a/platform/fpga/openpiton/Kconfig b/platform/fpga/openpiton/Kconfig
index 973906ebd49..bc9c86eef06 100644
--- a/platform/fpga/openpiton/Kconfig
+++ b/platform/fpga/openpiton/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_OPENPITON_FPGA
 	bool
+	select FDT
 	select IPI_MSWI
 	select IRQCHIP_PLIC
 	select SERIAL_UART8250
diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 3eab2826ab5..c1a77b381b4 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -2,4 +2,7 @@
 
 config PLATFORM_GENERIC
 	bool
+	select FDT
+	select FDT_DOMAIN
+	select FDT_PMU
 	default y
diff --git a/platform/kendryte/k210/Kconfig b/platform/kendryte/k210/Kconfig
index 2a1daaacc02..5bf597315eb 100644
--- a/platform/kendryte/k210/Kconfig
+++ b/platform/kendryte/k210/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_KENDRYTE_K210
 	bool
+	select FDT
 	select IPI_MSWI
 	select IRQCHIP_PLIC
 	select SERIAL_SIFIVE
diff --git a/platform/nuclei/ux600/Kconfig b/platform/nuclei/ux600/Kconfig
index 464802ea8f7..84d74e8bf5f 100644
--- a/platform/nuclei/ux600/Kconfig
+++ b/platform/nuclei/ux600/Kconfig
@@ -2,6 +2,7 @@
 
 config PLATFORM_NUCLEI_UX600
 	bool
+	select FDT
 	select IPI_MSWI
 	select IRQCHIP_PLIC
 	select SERIAL_SIFIVE
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 5498a1fbddb..2b0273475f8 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -8,7 +8,6 @@
  *   hqfang <578567190@qq.com>
  */
 
-#include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>

From d514a8f0dcc3a0a310bbbe33a6ab62d9e10adea8 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:14 +0530
Subject: [PATCH 1048/1765] platform: generic: Use kconfig for
 enabling/disabling overrides

We update generic platform to use kconfig for enabling/disabling
platform overrides. We also enable all platform overrides in generic
platform defconfig.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 platform/generic/Kconfig              | 18 ++++++++++++++++++
 platform/generic/allwinner/objects.mk |  4 ++--
 platform/generic/configs/defconfig    |  3 +++
 platform/generic/sifive/objects.mk    |  8 ++++----
 4 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index c1a77b381b4..c76bd1258f3 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -6,3 +6,21 @@ config PLATFORM_GENERIC
 	select FDT_DOMAIN
 	select FDT_PMU
 	default y
+
+if PLATFORM_GENERIC
+
+config PLATFORM_ALLWINNER_D1
+	bool "Allwinner D1 support"
+	depends on FDT_IRQCHIP_PLIC
+	default n
+
+config PLATFORM_SIFIVE_FU540
+	bool "SiFive FU540 support"
+	default n
+
+config PLATFORM_SIFIVE_FU740
+	bool "SiFive FU740 support"
+	depends on FDT_RESET && FDT_I2C
+	default n
+
+endif
diff --git a/platform/generic/allwinner/objects.mk b/platform/generic/allwinner/objects.mk
index 9e36ab6a189..447cdf144bb 100644
--- a/platform/generic/allwinner/objects.mk
+++ b/platform/generic/allwinner/objects.mk
@@ -2,5 +2,5 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-carray-platform_override_modules-y += sun20i_d1
-platform-objs-y += allwinner/sun20i-d1.o
+carray-platform_override_modules-$(CONFIG_PLATFORM_ALLWINNER_D1) += sun20i_d1
+platform-objs-$(CONFIG_PLATFORM_ALLWINNER_D1) += allwinner/sun20i-d1.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index d56cef20689..2a753940e3d 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,3 +1,6 @@
+CONFIG_PLATFORM_ALLWINNER_D1=y
+CONFIG_PLATFORM_SIFIVE_FU540=y
+CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_I2C=y
diff --git a/platform/generic/sifive/objects.mk b/platform/generic/sifive/objects.mk
index c17e2df1d7a..d75e444abf5 100644
--- a/platform/generic/sifive/objects.mk
+++ b/platform/generic/sifive/objects.mk
@@ -2,8 +2,8 @@
 # SPDX-License-Identifier: BSD-2-Clause
 #
 
-carray-platform_override_modules-y += sifive_fu540
-platform-objs-y += sifive/fu540.o
+carray-platform_override_modules-$(CONFIG_PLATFORM_SIFIVE_FU540) += sifive_fu540
+platform-objs-$(CONFIG_PLATFORM_SIFIVE_FU540) += sifive/fu540.o
 
-carray-platform_override_modules-y += sifive_fu740
-platform-objs-y += sifive/fu740.o
+carray-platform_override_modules-$(CONFIG_PLATFORM_SIFIVE_FU740) += sifive_fu740
+platform-objs-$(CONFIG_PLATFORM_SIFIVE_FU740) += sifive/fu740.o

From bc317a378f17ad462fdc2ee672e9bb05098506b4 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:20 +0530
Subject: [PATCH 1049/1765] platform: generic: Use kconfig to set platform
 version and default name

The generic platform version and default name should be set based
on kconfig options so that users can override it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 platform/generic/Kconfig    | 14 ++++++++++++++
 platform/generic/platform.c |  6 ++++--
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index c76bd1258f3..63d1be4054d 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -9,6 +9,20 @@ config PLATFORM_GENERIC
 
 if PLATFORM_GENERIC
 
+config PLATFORM_GENERIC_NAME
+	string "Platform default name"
+	default "Generic"
+
+config PLATFORM_GENERIC_MAJOR_VER
+	int "Platform major version"
+	range 0 65535
+	default 0
+
+config PLATFORM_GENERIC_MINOR_VER
+	int "Platform minor version"
+	range 0 65535
+	default 1
+
 config PLATFORM_ALLWINNER_D1
 	bool "Allwinner D1 support"
 	depends on FDT_IRQCHIP_PLIC
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index bf93af6b1a5..cc3620f1d24 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -265,8 +265,10 @@ const struct sbi_platform_operations platform_ops = {
 
 struct sbi_platform platform = {
 	.opensbi_version	= OPENSBI_VERSION,
-	.platform_version	= SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name			= "Generic",
+	.platform_version	=
+		SBI_PLATFORM_VERSION(CONFIG_PLATFORM_GENERIC_MAJOR_VER,
+				     CONFIG_PLATFORM_GENERIC_MINOR_VER),
+	.name			= CONFIG_PLATFORM_GENERIC_NAME,
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= SBI_HARTMASK_MAX_BITS,
 	.hart_index2id		= generic_hart_index2id,

From eccb9df5cf402dd910efc5f3b926db5161a318bf Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:25 +0530
Subject: [PATCH 1050/1765] platform: Remove redundant config.mk from all
 platforms

The options defined in config.mk can be specified in objects.mk of each
platform so let us remove config.mk from all platforms.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 Makefile                           |  4 +-
 platform/andes/ae350/config.mk     | 36 --------------
 platform/andes/ae350/objects.mk    | 29 +++++++++++
 platform/fpga/ariane/config.mk     | 36 --------------
 platform/fpga/ariane/objects.mk    | 35 ++++++++++++++
 platform/fpga/openpiton/config.mk  | 35 --------------
 platform/fpga/openpiton/objects.mk | 35 ++++++++++++++
 platform/generic/config.mk         | 40 ----------------
 platform/generic/objects.mk        | 33 +++++++++++++
 platform/kendryte/k210/config.mk   | 19 --------
 platform/kendryte/k210/objects.mk  | 12 +++++
 platform/nuclei/ux600/config.mk    | 30 ------------
 platform/nuclei/ux600/objects.mk   | 22 +++++++++
 platform/template/config.mk        | 77 ------------------------------
 platform/template/objects.mk       | 72 ++++++++++++++++++++++++++++
 platform/template/platform.c       |  2 +-
 16 files changed, 240 insertions(+), 277 deletions(-)
 delete mode 100644 platform/andes/ae350/config.mk
 delete mode 100644 platform/fpga/ariane/config.mk
 delete mode 100644 platform/fpga/openpiton/config.mk
 delete mode 100644 platform/generic/config.mk
 delete mode 100644 platform/kendryte/k210/config.mk
 delete mode 100644 platform/nuclei/ux600/config.mk
 delete mode 100644 platform/template/config.mk

diff --git a/Makefile b/Makefile
index 011c7a4f22e..e716e8cf372 100644
--- a/Makefile
+++ b/Makefile
@@ -204,7 +204,7 @@ firmware-object-mks=$(shell if [ -d $(firmware_dir) ]; then find $(firmware_dir)
 .PHONY: all
 all:
 
-# Include platform specific .config and config.mk
+# Include platform specific .config
 ifdef PLATFORM
 .PHONY: menuconfig
 menuconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
@@ -229,8 +229,6 @@ $(KCONFIG_AUTOCMD): $(KCONFIG_CONFIG)
 
 include $(KCONFIG_CONFIG)
 include $(KCONFIG_AUTOCMD)
-
-include $(platform_src_dir)/config.mk
 endif
 
 # Include all object.mk files
diff --git a/platform/andes/ae350/config.mk b/platform/andes/ae350/config.mk
deleted file mode 100644
index f555ef5be78..00000000000
--- a/platform/andes/ae350/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Andes Technology Corporation
-#
-# Authors:
-#   Zong Li <zong@andestech.com>
-#   Nylon Chen <nylon7@andestech.com>
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Blobs to build
-FW_TEXT_START=0x00000000
-
-FW_DYNAMIC=y
-
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  FW_JUMP_ADDR=0x400000
-else
-  FW_JUMP_ADDR=0x200000
-endif
-FW_JUMP_FDT_ADDR=0x2000000
-
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-
-FW_PAYLOAD_FDT_ADDR=0x2000000
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
index 5369677c3b1..80f07376bc2 100644
--- a/platform/andes/ae350/objects.mk
+++ b/platform/andes/ae350/objects.mk
@@ -8,4 +8,33 @@
 #   Nylon Chen <nylon7@andestech.com>
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Objects to build
 platform-objs-y += cache.o platform.o plicsw.o plmt.o
+
+# Blobs to build
+FW_TEXT_START=0x00000000
+
+FW_DYNAMIC=y
+
+FW_JUMP=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  FW_JUMP_ADDR=0x400000
+else
+  FW_JUMP_ADDR=0x200000
+endif
+FW_JUMP_FDT_ADDR=0x2000000
+
+FW_PAYLOAD=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+
+FW_PAYLOAD_FDT_ADDR=0x2000000
diff --git a/platform/fpga/ariane/config.mk b/platform/fpga/ariane/config.mk
deleted file mode 100644
index 3556461a12f..00000000000
--- a/platform/fpga/ariane/config.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (C) 2019 FORTH-ICS/CARV
-#		Panagiotis Peristerakis <perister@ics.forth.gr>
-#
-
-#for more infos, check out /platform/template/config.mk
-
-PLATFORM_RISCV_XLEN = 64
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_JUMP=n
-
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
- # This needs to be 4MB aligned for 32-bit support
- FW_JUMP_ADDR=0x80400000
- else
- # This needs to be 2MB aligned for 64-bit support
- FW_JUMP_ADDR=0x80200000
- endif
-FW_JUMP_FDT_ADDR=0x82200000
-
-# Firmware with payload configuration.
-FW_PAYLOAD=y
-
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-# This needs to be 4MB aligned for 32-bit support
-  FW_PAYLOAD_OFFSET=0x400000
-else
-# This needs to be 2MB aligned for 64-bit support
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x82200000
-FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/fpga/ariane/objects.mk b/platform/fpga/ariane/objects.mk
index 814e6da6347..83581ac9d8c 100644
--- a/platform/fpga/ariane/objects.mk
+++ b/platform/fpga/ariane/objects.mk
@@ -5,4 +5,39 @@
 #		Panagiotis Peristerakis <perister@ics.forth.gr>
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Object to build
 platform-objs-y += platform.o
+
+PLATFORM_RISCV_XLEN = 64
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_JUMP=n
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+ # This needs to be 4MB aligned for 32-bit support
+ FW_JUMP_ADDR=0x80400000
+ else
+ # This needs to be 2MB aligned for 64-bit support
+ FW_JUMP_ADDR=0x80200000
+ endif
+FW_JUMP_FDT_ADDR=0x82200000
+
+# Firmware with payload configuration.
+FW_PAYLOAD=y
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# This needs to be 4MB aligned for 32-bit support
+  FW_PAYLOAD_OFFSET=0x400000
+else
+# This needs to be 2MB aligned for 64-bit support
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=0x82200000
+FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/fpga/openpiton/config.mk b/platform/fpga/openpiton/config.mk
deleted file mode 100644
index a969b250a24..00000000000
--- a/platform/fpga/openpiton/config.mk
+++ /dev/null
@@ -1,35 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2020 Western Digital Corporation or its affiliates.
-#
-
-#for more infos, check out /platform/template/config.mk
-
-PLATFORM_RISCV_XLEN = 64
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_JUMP=n
-
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
- # This needs to be 4MB aligned for 32-bit support
- FW_JUMP_ADDR=0x80400000
- else
- # This needs to be 2MB aligned for 64-bit support
- FW_JUMP_ADDR=0x80200000
- endif
-FW_JUMP_FDT_ADDR=0x82200000
-
-# Firmware with payload configuration.
-FW_PAYLOAD=y
-
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-# This needs to be 4MB aligned for 32-bit support
-  FW_PAYLOAD_OFFSET=0x400000
-else
-# This needs to be 2MB aligned for 64-bit support
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=0x82200000
-FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/fpga/openpiton/objects.mk b/platform/fpga/openpiton/objects.mk
index 30a3c4fb838..c8c345abfd6 100644
--- a/platform/fpga/openpiton/objects.mk
+++ b/platform/fpga/openpiton/objects.mk
@@ -4,4 +4,39 @@
 # Copyright (c) 2020 Western Digital Corporation or its affiliates.
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Objects to build
 platform-objs-y += platform.o
+
+PLATFORM_RISCV_XLEN = 64
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_JUMP=n
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+ # This needs to be 4MB aligned for 32-bit support
+ FW_JUMP_ADDR=0x80400000
+ else
+ # This needs to be 2MB aligned for 64-bit support
+ FW_JUMP_ADDR=0x80200000
+ endif
+FW_JUMP_FDT_ADDR=0x82200000
+
+# Firmware with payload configuration.
+FW_PAYLOAD=y
+
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# This needs to be 4MB aligned for 32-bit support
+  FW_PAYLOAD_OFFSET=0x400000
+else
+# This needs to be 2MB aligned for 64-bit support
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=0x82200000
+FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/generic/config.mk b/platform/generic/config.mk
deleted file mode 100644
index 8151974f2f8..00000000000
--- a/platform/generic/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2020 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Anup Patel <anup.patel@wdc.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
-  -nographic -bios $(build_dir)/platform/generic/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_DYNAMIC=y
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x400000)))
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x200000)))
-endif
-FW_JUMP_FDT_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x2200000)))
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  # This needs to be 4MB aligned for 32-bit system
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  # This needs to be 2MB aligned for 64-bit system
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-FW_PAYLOAD_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index 49077546cbe..136853eeb1d 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -7,5 +7,38 @@
 #   Anup Patel <anup.patel@wdc.com>
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Command for platform specific "make run"
+platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
+  -nographic -bios $(build_dir)/platform/generic/firmware/fw_payload.elf
+
+# Objects to build
 platform-objs-y += platform.o
 platform-objs-y += platform_override_modules.o
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_DYNAMIC=y
+FW_JUMP=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x400000)))
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x200000)))
+endif
+FW_JUMP_FDT_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x2200000)))
+FW_PAYLOAD=y
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+  # This needs to be 4MB aligned for 32-bit system
+  FW_PAYLOAD_OFFSET=0x400000
+else
+  # This needs to be 2MB aligned for 64-bit system
+  FW_PAYLOAD_OFFSET=0x200000
+endif
+FW_PAYLOAD_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
diff --git a/platform/kendryte/k210/config.mk b/platform/kendryte/k210/config.mk
deleted file mode 100644
index 8a9b81418a2..00000000000
--- a/platform/kendryte/k210/config.mk
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-# Authors:
-#   Damien Le Moal <damien.lemoal@wdc.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Blobs to build
-FW_TEXT_START=0x80000000
-FW_PAYLOAD=y
-FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index b74da7407bc..1bfb89861ec 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -7,8 +7,20 @@
 #   Damien Le Moal <damien.lemoal@wdc.com>
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Objects to build
 platform-objs-y += platform.o
 
 platform-objs-y += k210.o
 platform-varprefix-k210.o = dt_k210
 platform-padding-k210.o = 2048
+
+# Blobs to build
+FW_TEXT_START=0x80000000
+FW_PAYLOAD=y
+FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/nuclei/ux600/config.mk b/platform/nuclei/ux600/config.mk
deleted file mode 100644
index dddcc4ea567..00000000000
--- a/platform/nuclei/ux600/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2020 Nuclei Corporation or its affiliates.
-#
-# Authors:
-#   lujun <lujun@nucleisys.com>
-#   hqfang <578567190@qq.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Command for platform specific "make run"
-platform-runcmd = xl_spike \
-  $(build_dir)/platform/nuclei/ux600/firmware/fw_payload.elf
-
-# Blobs to build
-FW_TEXT_START=0xA0000000
-FW_DYNAMIC=y
-FW_JUMP=y
-
-FW_JUMP_ADDR=0xA0200000
-FW_JUMP_FDT_ADDR=0xA8000000
-FW_PAYLOAD=y
-FW_PAYLOAD_OFFSET=0x200000
-FW_PAYLOAD_FDT_ADDR=0xA8000000
diff --git a/platform/nuclei/ux600/objects.mk b/platform/nuclei/ux600/objects.mk
index 8c36c90a71d..7c429e0be8f 100644
--- a/platform/nuclei/ux600/objects.mk
+++ b/platform/nuclei/ux600/objects.mk
@@ -8,4 +8,26 @@
 #   hqfang <578567190@qq.com>
 #
 
+# Compiler flags
+platform-cppflags-y =
+platform-cflags-y =
+platform-asflags-y =
+platform-ldflags-y =
+
+# Command for platform specific "make run"
+platform-runcmd = xl_spike \
+  $(build_dir)/platform/nuclei/ux600/firmware/fw_payload.elf
+
+# Objects to build
 platform-objs-y += platform.o
+
+# Blobs to build
+FW_TEXT_START=0xA0000000
+FW_DYNAMIC=y
+FW_JUMP=y
+
+FW_JUMP_ADDR=0xA0200000
+FW_JUMP_FDT_ADDR=0xA8000000
+FW_PAYLOAD=y
+FW_PAYLOAD_OFFSET=0x200000
+FW_PAYLOAD_FDT_ADDR=0xA8000000
diff --git a/platform/template/config.mk b/platform/template/config.mk
deleted file mode 100644
index f817342c29b..00000000000
--- a/platform/template/config.mk
+++ /dev/null
@@ -1,77 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-#
-
-# Compiler pre-processor flags
-platform-cppflags-y =
-
-# C Compiler and assembler flags.
-platform-cflags-y =
-platform-asflags-y =
-
-# Linker flags: additional libraries and object files that the platform
-# code needs can be added here
-platform-ldflags-y =
-
-#
-# Command for platform specific "make run"
-# Useful for development and debugging on plaftform simulator (such as QEMU)
-#
-# platform-runcmd = your_platform_run.sh
-
-#
-# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
-# These are optional parameters but platforms can optionaly provide it.
-# Some of these are guessed based on GCC compiler capabilities
-#
-# PLATFORM_RISCV_XLEN = 64
-# PLATFORM_RISCV_ABI = lp64
-# PLATFORM_RISCV_ISA = rv64imafdc
-# PLATFORM_RISCV_CODE_MODEL = medany
-
-# Firmware load address configuration. This is mandatory.
-FW_TEXT_START=0x80000000
-
-# Optional parameter for path to external FDT
-# FW_FDT_PATH="path to platform flattened device tree file"
-
-#
-# Dynamic firmware configuration.
-# Optional parameters are commented out. Uncomment and define these parameters
-# as needed.
-#
-FW_DYNAMIC=<y|n>
-
-#
-# Jump firmware configuration.
-# Optional parameters are commented out. Uncomment and define these parameters
-# as needed.
-#
-FW_JUMP=<y|n>
-# This needs to be 4MB aligned for 32-bit support
-# This needs to be 2MB aligned for 64-bit support
-# ifeq ($(PLATFORM_RISCV_XLEN), 32)
-# FW_JUMP_ADDR=0x80400000
-# else
-# FW_JUMP_ADDR=0x80200000
-# endif
-# FW_JUMP_FDT_ADDR=0x82200000
-
-#
-# Firmware with payload configuration.
-# Optional parameters are commented out. Uncomment and define these parameters
-# as needed.
-#
-FW_PAYLOAD=<y|n>
-# This needs to be 4MB aligned for 32-bit support
-# This needs to be 2MB aligned for 64-bit support
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-FW_PAYLOAD_OFFSET=0x400000
-else
-FW_PAYLOAD_OFFSET=0x200000
-endif
-# FW_PAYLOAD_ALIGN=0x1000
-# FW_PAYLOAD_PATH="path to next boot stage binary image file"
-# FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/template/objects.mk b/platform/template/objects.mk
index caaec2bee9e..0025928f35c 100644
--- a/platform/template/objects.mk
+++ b/platform/template/objects.mk
@@ -4,6 +4,33 @@
 # Copyright (c) 2019 Western Digital Corporation or its affiliates.
 #
 
+# Compiler pre-processor flags
+platform-cppflags-y =
+
+# C Compiler and assembler flags.
+platform-cflags-y =
+platform-asflags-y =
+
+# Linker flags: additional libraries and object files that the platform
+# code needs can be added here
+platform-ldflags-y =
+
+#
+# Command for platform specific "make run"
+# Useful for development and debugging on plaftform simulator (such as QEMU)
+#
+# platform-runcmd = your_platform_run.sh
+
+#
+# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
+# These are optional parameters but platforms can optionaly provide it.
+# Some of these are guessed based on GCC compiler capabilities
+#
+# PLATFORM_RISCV_XLEN = 64
+# PLATFORM_RISCV_ABI = lp64
+# PLATFORM_RISCV_ISA = rv64imafdc
+# PLATFORM_RISCV_CODE_MODEL = medany
+
 # Space separated list of object file names to be compiled for the platform
 platform-objs-y += platform.o
 
@@ -13,3 +40,48 @@ platform-objs-y += platform.o
 # source file be in the form <dt file name>.dts
 #
 # platform-objs-y += <dt file name>.o
+
+# Firmware load address configuration. This is mandatory.
+FW_TEXT_START=0x80000000
+
+# Optional parameter for path to external FDT
+# FW_FDT_PATH="path to platform flattened device tree file"
+
+#
+# Dynamic firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_DYNAMIC=<y|n>
+
+#
+# Jump firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_JUMP=<y|n>
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+# ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# FW_JUMP_ADDR=0x80400000
+# else
+# FW_JUMP_ADDR=0x80200000
+# endif
+# FW_JUMP_FDT_ADDR=0x82200000
+
+#
+# Firmware with payload configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_PAYLOAD=<y|n>
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+FW_PAYLOAD_OFFSET=0x400000
+else
+FW_PAYLOAD_OFFSET=0x200000
+endif
+# FW_PAYLOAD_ALIGN=0x1000
+# FW_PAYLOAD_PATH="path to next boot stage binary image file"
+# FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 5524847cf58..f3802dad663 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -11,7 +11,7 @@
 
 /*
  * Include these files as needed.
- * See config.mk PLATFORM_xxx configuration parameters.
+ * See objects.mk PLATFORM_xxx configuration parameters.
  */
 #include <sbi_utils/ipi/aclint_mswi.h>
 #include <sbi_utils/irqchip/plic.h>

From 0723bab8fe073ccbbb45e85e0d50ec1d2055d34a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:31 +0530
Subject: [PATCH 1051/1765] docs: Update documentation for kconfig support

We update all documentation files to:
1) Remove references to platform specific config.mk file since it is
   has been removed.
2) Add details about platform specific configs/defconfig and Kconfig
   files mandatory for each platform.
3) Add required packages in top-level README.md
4) Fix typo releated to object.mk in docs/platform/platform.md

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 README.md                   | 25 +++++++++++++++++++++++--
 docs/firmware/fw_dynamic.md |  2 +-
 docs/firmware/fw_jump.md    |  4 ++--
 docs/firmware/fw_payload.md |  4 ++--
 docs/platform/platform.md   |  6 +++---
 docs/platform_guide.md      |  9 +++++----
 6 files changed, 36 insertions(+), 14 deletions(-)

diff --git a/README.md b/README.md
index 54fabe4cea9..895bbf27a37 100644
--- a/README.md
+++ b/README.md
@@ -92,8 +92,8 @@ N.B. Any S-mode boot loader (i.e. U-Boot) doesn't need to support HSM extension,
 as it doesn't need to boot all the harts. The operating system should be
 capable enough to bring up all other non-booting harts using HSM extension.
 
-Required Toolchain
-------------------
+Required Toolchain and Packages
+-------------------------------
 
 OpenSBI can be compiled natively or cross-compiled on a x86 host. For
 cross-compilation, you can build your own toolchain, download a prebuilt one
@@ -115,6 +115,14 @@ triple is used (e.g. *-target riscv64-unknown-elf*).
 Please note that only a 64-bit version of the toolchain is available in
 the Bootlin toolchain repository for now.
 
+In addition to a toolchain, OpenSBI also requires the following packages on
+the host:
+
+1. device-tree-compiler: The device tree compiler for compiling device
+   tree sources (DTS files).
+2. python3: The python 3.0 (or compatible) language support for various
+   scripts.
+
 Building and Installing the OpenSBI Platform-Independent Library
 ----------------------------------------------------------------
 
@@ -196,6 +204,19 @@ top-level make command line. These options, such as *PLATFORM_<xyz>* or
 *docs/platform/<platform_name>.md* files and
 *docs/firmware/<firmware_name>.md* files.
 
+All OpenSBI platforms support Kconfig style build-time configuration. Users
+can change the build-time configuration of a platform using a graphical
+interface as follows:
+```
+make PLATFORM=<platform_subdir> menuconfig
+```
+
+Alternately, an OpenSBI platform can have multiple default configurations
+and users can select a custom default configuration as follows:
+```
+make PLATFORM=<platform_subdir> PLATFORM_DEFCONFIG=<platform_custom_defconfig>
+```
+
 Building 32-bit / 64-bit OpenSBI Images
 ---------------------------------------
 By default, building OpenSBI generates 32-bit or 64-bit images based on the
diff --git a/docs/firmware/fw_dynamic.md b/docs/firmware/fw_dynamic.md
index 7b9b19250a1..e251488074a 100644
--- a/docs/firmware/fw_dynamic.md
+++ b/docs/firmware/fw_dynamic.md
@@ -20,7 +20,7 @@ the booting stage binary to follow OpenSBI firmware.
 A platform can enable *FW_DYNAMIC* firmware using any of the following methods.
 
 1. Specifying `FW_DYNAMIC=y` on the top level `make` command line.
-2. Specifying `FW_DYNAMIC=y` in the target platform *config.mk* configuration
+2. Specifying `FW_DYNAMIC=y` in the target platform *objects.mk* configuration
 file.
 
 The compiled *FW_DYNAMIC* firmware ELF file is named *fw_dynamic.elf*. It's
diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index eea30138781..35a4301e3ab 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -15,7 +15,7 @@ and the booting stage binary to follow the OpenSBI firmware.
 A platform *FW_JUMP* firmware can be enabled by any of the following methods:
 
 1. Specifying `FW_JUMP=y` on the top level `make` command line.
-2. Specifying `FW_JUMP=y` in the target platform *config.mk* configuration file.
+2. Specifying `FW_JUMP=y` in the target platform *objects.mk* configuration file.
 
 The compiled *FW_JUMP* firmware ELF file is named *fw_jump.elf*. Its expanded
 image file is *fw_jump.bin*. Both files are created in the platform-specific
@@ -26,7 +26,7 @@ build directory under the *build/platform/<platform_subdir>/firmware* directory.
 
 To operate correctly, a *FW_JUMP* firmware requires some configuration
 parameters to be defined using either the top level `make` command line or the
-target platform *config.mk* configuration file. The possible parameters are as
+target platform *objects.mk* configuration file. The possible parameters are as
 follows:
 
 * **FW_JUMP_ADDR** - Address of the entry point of the booting stage to be
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 09474480695..3bb918f5512 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -20,7 +20,7 @@ Enabling *FW_PAYLOAD* compilation
 The *FW_PAYLOAD* firmware can be enabled by any of the following methods:
 
 1. Specifying `FW_PAYLOAD=y` on the top level `make` command line.
-2. Specifying `FW_PAYLOAD=y` in the target platform *config.mk* configuration
+2. Specifying `FW_PAYLOAD=y` in the target platform *objects.mk* configuration
    file.
 
 The compiled *FW_PAYLOAD* firmware ELF file is named *fw_jump.elf*. Its
@@ -33,7 +33,7 @@ Configuration Options
 
 A *FW_PAYLOAD* firmware is built according to configuration parameters and
 options. These configuration parameters can be defined using either the top
-level `make` command line or the target platform *config.mk* configuration
+level `make` command line or the target platform *objects.mk* configuration
 file. The parameters currently defined are as follows:
 
 * **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload binary
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index cb4bec60f6f..f291931600d 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -41,9 +41,9 @@ OpenSBI currently supports the following virtual and hardware platforms:
 
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
-template files for implementing support for a new platform. The *object.mk*,
-*config.mk* and *platform.c* template files provides enough comments to
-facilitate the implementation.
+template files for implementing support for a new platform. The *objects.mk*,
+*Kconfig*, *configs/defconfig* and *platform.c* template files provides enough
+comments to facilitate the implementation.
 
 [generic.md]: generic.md
 [qemu_virt.md]: qemu_virt.md
diff --git a/docs/platform_guide.md b/docs/platform_guide.md
index b6c2c2e0494..38fd5161361 100644
--- a/docs/platform_guide.md
+++ b/docs/platform_guide.md
@@ -28,11 +28,12 @@ Adding support for a new platform
 Support for a new platform named *&lt;xyz&gt;* can be added as follows:
 
 1. Create a directory named *&lt;xyz&gt;* under the *platform/* directory.
-2. Create a platform configuration file named *config.mk* under the
-   *platform/&lt;xyz&gt;/* directory. This configuration file will provide
+2. Create platform configuration files named *Kconfig* and *configs/defconfig*
+   under the *platform/&lt;xyz&gt;/* directory. These configuration files will
+   provide the build time configuration for the sources to be compiled.
+3. Create a *platform/&lt;xyz&gt;/objects.mk* file for listing the platform
+   object files to be compiled. This file also provides platform-specific
    compiler flags, and select firmware options.
-3. Create a *platform/&lt;xyz&gt;/objects.mk* file for listing the
-   platform-specific object files to be compiled.
 4. Create a *platform/&lt;xyz&gt;/platform.c* file providing a
    *struct sbi_platform* instance.
 

From a6a85579b6f4ad74b638b6d770143a7029cf8f57 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 8 Aug 2022 09:34:43 +0530
Subject: [PATCH 1052/1765] Makefile: Fix typo related to object.mk

The "object.mk" name referred in top-level makefile should be
"objects.mk".

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index e716e8cf372..0ab9f223762 100644
--- a/Makefile
+++ b/Makefile
@@ -231,7 +231,7 @@ include $(KCONFIG_CONFIG)
 include $(KCONFIG_AUTOCMD)
 endif
 
-# Include all object.mk files
+# Include all objects.mk files
 ifdef PLATFORM
 include $(platform-object-mks)
 endif

From 9529e360dfca40feeb2471bdde990207d44d68e1 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Thu, 4 Aug 2022 22:32:27 +0800
Subject: [PATCH 1053/1765] include: Add mstatus[h].GVA encodings

The machine mode GVA field is in mstatus for RV64 and mstatush for RV32,
and is available if the hypervisor extension is available. If an
exception occurs, we may need to redirect the trap to HS-mode, in which
case, hstatus.GVA should be set to same as the machine mode GVA bit.

Add MSTATUS_GVA for RV64, MSTATUSH_GVA for RV32, and their SHIFT
encodings. The SHIFT index is helpful in assembly code, since field
extraction can be implemented in only one register. In pseudocode:

- For RV32: gva = (mstatus >> MSTATUS_GVA_SHIFT) & 1;
- For RV64: gva = (mstatush >> MSTATUSH_GVA_SHIFT) & 1;

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 798afb7303a..8884301483c 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -38,10 +38,14 @@
 #define MSTATUS_SXL			_ULL(0x0000000C00000000)
 #define MSTATUS_SBE			_ULL(0x0000001000000000)
 #define MSTATUS_MBE			_ULL(0x0000002000000000)
+#define MSTATUS_GVA			_ULL(0x0000004000000000)
+#define MSTATUS_GVA_SHIFT		38
 #define MSTATUS_MPV			_ULL(0x0000008000000000)
 #else
 #define MSTATUSH_SBE			_UL(0x00000010)
 #define MSTATUSH_MBE			_UL(0x00000020)
+#define MSTATUSH_GVA			_UL(0x00000040)
+#define MSTATUSH_GVA_SHIFT		6
 #define MSTATUSH_MPV			_UL(0x00000080)
 #endif
 #define MSTATUS32_SD			_UL(0x80000000)

From 1fbe7778c9843930ce3dadb35804d56e1f782479 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Thu, 4 Aug 2022 22:32:28 +0800
Subject: [PATCH 1054/1765] lib: sbi_trap: Save mstatus[h].GVA in trap->gva

The machine mode GVA field is available if the hypervisor extension is
implemented, and indicates if mtval is a guest virtual address. Add a
gva field to sbi_trap_info for this, and in __sbi_expected_trap_hext,
save mstatus[h].GVA to it, so that gva indicates if tval is a guest
virtual address. If the hypervisor extension is not implemented, always
set gva to 0.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap.h      |  6 +++++-
 lib/sbi/sbi_expected_trap.S | 17 +++++++++++++++--
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index d205056da1d..fe3640af017 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -95,8 +95,10 @@
 #define SBI_TRAP_INFO_tval2			3
 /** Index of tinst member in sbi_trap_info */
 #define SBI_TRAP_INFO_tinst			4
+/** Index of gva member in sbi_trap_info */
+#define SBI_TRAP_INFO_gva			5
 /** Last member index in sbi_trap_info */
-#define SBI_TRAP_INFO_last			5
+#define SBI_TRAP_INFO_last			6
 
 /* clang-format on */
 
@@ -200,6 +202,8 @@ struct sbi_trap_info {
 	unsigned long tval2;
 	/** tinst Trap instruction */
 	unsigned long tinst;
+	/** gva Guest virtual address in tval flag */
+	unsigned long gva;
 };
 
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
diff --git a/lib/sbi/sbi_expected_trap.S b/lib/sbi/sbi_expected_trap.S
index 24891c74cd7..a5ef26a3f8a 100644
--- a/lib/sbi/sbi_expected_trap.S
+++ b/lib/sbi/sbi_expected_trap.S
@@ -22,7 +22,7 @@
 	.align 3
 	.global __sbi_expected_trap
 __sbi_expected_trap:
-	/* Without H-extension so, MTVAL2 and MTINST CSRs not available */
+	/* Without H-extension so, MTVAL2 and MTINST CSRs and GVA not available */
 	csrr	a4, CSR_MEPC
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
 	csrr	a4, CSR_MCAUSE
@@ -31,6 +31,7 @@ __sbi_expected_trap:
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(tval)(a3)
 	REG_S	zero, SBI_TRAP_INFO_OFFSET(tval2)(a3)
 	REG_S	zero, SBI_TRAP_INFO_OFFSET(tinst)(a3)
+	REG_S	zero, SBI_TRAP_INFO_OFFSET(gva)(a3)
 	csrr	a4, CSR_MEPC
 	addi	a4, a4, 4
 	csrw	CSR_MEPC, a4
@@ -39,7 +40,7 @@ __sbi_expected_trap:
 	.align 3
 	.global __sbi_expected_trap_hext
 __sbi_expected_trap_hext:
-	/* With H-extension so, MTVAL2 and MTINST CSRs available */
+	/* With H-extension so, MTVAL2 and MTINST CSRs and GVA available */
 	csrr	a4, CSR_MEPC
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
 	csrr	a4, CSR_MCAUSE
@@ -50,6 +51,18 @@ __sbi_expected_trap_hext:
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(tval2)(a3)
 	csrr	a4, CSR_MTINST
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(tinst)(a3)
+
+	/* Extract GVA bit from MSTATUS or MSTATUSH */
+#if __riscv_xlen == 32
+	csrr	a4, CSR_MSTATUSH
+	srli	a4, a4, MSTATUSH_GVA_SHIFT
+#else
+	csrr	a4, CSR_MSTATUS
+	srli	a4, a4, MSTATUS_GVA_SHIFT
+#endif
+	andi	a4, a4, 1
+	REG_S	a4, SBI_TRAP_INFO_OFFSET(gva)(a3)
+
 	csrr	a4, CSR_MEPC
 	addi	a4, a4, 4
 	csrw	CSR_MEPC, a4

From 1c4ce74f5128b7e1094ad253c9bc5fd732e3d82b Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Thu, 4 Aug 2022 22:32:29 +0800
Subject: [PATCH 1055/1765] lib: sbi: Set gva when creating sbi_trap_info

In some cases the sbi_trap_info argument passed to sbi_trap_redirect is
created from scratch by filling its fields. Since we previously added a
gva field to struct sbi_trap_info, initialize gva in these cases also.

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_illegal_insn.c    |  1 +
 lib/sbi/sbi_misaligned_ldst.c |  2 ++
 lib/sbi/sbi_trap.c            | 14 ++++++++++++++
 3 files changed, 17 insertions(+)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 84c04f874fa..ecd35084b08 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -30,6 +30,7 @@ static int truly_illegal_insn(ulong insn, struct sbi_trap_regs *regs)
 	trap.tval = insn;
 	trap.tval2 = 0;
 	trap.tinst = 0;
+	trap.gva   = 0;
 
 	return sbi_trap_redirect(regs, &trap);
 }
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index fd11798ba7b..92a23939913 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -129,6 +129,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
+		uptrap.gva   = 0;
 		return sbi_trap_redirect(regs, &uptrap);
 	}
 
@@ -244,6 +245,7 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
+		uptrap.gva   = 0;
 		return sbi_trap_redirect(regs, &uptrap);
 	}
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index ee3e4e9f3f0..db70c26d130 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -311,6 +311,20 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		trap.tval = mtval;
 		trap.tval2 = mtval2;
 		trap.tinst = mtinst;
+
+		/*
+		 * If the hypervisor extension is not implemented,
+		 * mstatus[h].GVA is a WPRI field, which is guaranteed to read
+		 * as zero. In addition, in this case we don't read mstatush and
+		 * instead pretend it is zero, which handles privileged spec
+		 * version < 1.12.
+		 */
+#if __riscv_xlen == 32
+		trap.gva = (regs->mstatusH & MSTATUSH_GVA) ? 1 : 0;
+#else
+		trap.gva = (regs->mstatus & MSTATUS_GVA) ? 1 : 0;
+#endif
+
 		rc = sbi_trap_redirect(regs, &trap);
 		break;
 	};

From 5a0ca098f176fd5b84d311e82543a05aaab8cafb Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Thu, 4 Aug 2022 22:32:30 +0800
Subject: [PATCH 1056/1765] lib: sbi_trap: Set hypervisor CSRs for HS-mode

The hypervisor CSRs hstatus, htval, htinst should always be set if the
trap is to be taken in HS-mode, regardless of which mode it came from.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_trap.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index db70c26d130..1cf2e6fc4e7 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -118,12 +118,14 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	regs->mstatus |= (next_virt) ? MSTATUS_MPV : 0UL;
 #endif
 
-	/* Update HSTATUS for VS/VU-mode to HS-mode transition */
-	if (misa_extension('H') && prev_virt && !next_virt) {
-		/* Update HSTATUS SPVP and SPV bits */
+	/* Update hypervisor CSRs if going to HS-mode */
+	if (misa_extension('H') && !next_virt) {
 		hstatus = csr_read(CSR_HSTATUS);
-		hstatus &= ~HSTATUS_SPVP;
-		hstatus |= (prev_mode == PRV_S) ? HSTATUS_SPVP : 0;
+		if (prev_virt) {
+			/* hstatus.SPVP is only updated if coming from VS/VU-mode */
+			hstatus &= ~HSTATUS_SPVP;
+			hstatus |= (prev_mode == PRV_S) ? HSTATUS_SPVP : 0;
+		}
 		hstatus &= ~HSTATUS_SPV;
 		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
 		csr_write(CSR_HSTATUS, hstatus);

From a69eb6cc65a16f26455bfb5b7cab768ac891bc1d Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Thu, 4 Aug 2022 22:32:31 +0800
Subject: [PATCH 1057/1765] lib: sbi_trap: Set hstatus.GVA when going to
 HS-mode

The privileged spec specifies that on a trap to HS-mode, hstatus.GVA
should be set to 1 if stval is written with a guest virtual address, and
to 0 otherwise. Implement this by setting hstatus.GVA to trap->gva when
redirecting traps to HS-mode.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_trap.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 1cf2e6fc4e7..925840f110b 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -128,6 +128,8 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		}
 		hstatus &= ~HSTATUS_SPV;
 		hstatus |= (prev_virt) ? HSTATUS_SPV : 0;
+		hstatus &= ~HSTATUS_GVA;
+		hstatus |= (trap->gva) ? HSTATUS_GVA : 0;
 		csr_write(CSR_HSTATUS, hstatus);
 		csr_write(CSR_HTVAL, trap->tval2);
 		csr_write(CSR_HTINST, trap->tinst);

From 111afc12306e4368fa112f97d31ea802c4561294 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Fri, 12 Aug 2022 19:24:42 +0530
Subject: [PATCH 1058/1765] lib: sbi_illegal_insn: Fix FENCE.TSO emulation
 infinite trap loop

In case of missing "FENCE.TSO" instruction implementation,
opensbi can emulate the "FENCE.TSO" with "FENCE RW,RW", but
mepc was not incremented to continue from the next instruction
causing infinite trap.

Fixes: cb8271c8 ("lib: sbi_illegal_insn: Add emulation for fence.tso")
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
---
 lib/sbi/sbi_illegal_insn.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index ecd35084b08..9691bce930f 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -40,6 +40,7 @@ static int misc_mem_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 	/* Errata workaround: emulate `fence.tso` as `fence rw, rw`. */
 	if ((insn & INSN_MASK_FENCE_TSO) == INSN_MATCH_FENCE_TSO) {
 		smp_mb();
+		regs->mepc += 4;
 		return 0;
 	}
 

From adf44b51bae1b91dbb90c51fcecfbc23bb3062a5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 18 Aug 2022 20:37:03 +0530
Subject: [PATCH 1059/1765] lib: sbi: Use the official extension name for AIA
 M-mode CSRs

The arch review of AIA spec is completed and we now have official
extension names for AIA: Smaia (M-mode AIA CSRs) and Ssaia (S-mode
AIA CSRs).

Refer, section 1.6 of the latest AIA v0.3.1 stable specification at
https://github.com/riscv/riscv-aia/releases/download/0.3.1-draft.32/riscv-interrupts-032.pdf)

Based on above, we update generic library to use "Smaia" extension
name for AIA M-mode CSRs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_hart.h | 4 ++--
 lib/sbi/sbi_hart.c     | 8 ++++----
 lib/sbi/sbi_trap.c     | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 46615067c88..0032364017e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -30,8 +30,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SSCOFPMF = 0,
 	/** HART has HW time CSR (extension name not available) */
 	SBI_HART_EXT_TIME,
-	/** HART has AIA CSRs (extension name not available) */
-	SBI_HART_EXT_AIA,
+	/** HART has AIA M-mode CSRs */
+	SBI_HART_EXT_SMAIA,
 	/** HART has Smstateen CSR **/
 	SBI_HART_EXT_SMSTATEEN,
 	/** HART has Sstc extension */
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 67b685a5b94..129486847a8 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -100,7 +100,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		mstateen_val |= SMSTATEEN_STATEN;
 		mstateen_val |= SMSTATEEN0_HSENVCFG;
 
-		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_AIA))
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA))
 			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
 					SMSTATEEN0_IMSIC);
 		else
@@ -425,8 +425,8 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_TIME:
 		estr = "time";
 		break;
-	case SBI_HART_EXT_AIA:
-		estr = "aia";
+	case SBI_HART_EXT_SMAIA:
+		estr = "smaia";
 		break;
 	case SBI_HART_EXT_SSTC:
 		estr = "sstc";
@@ -663,7 +663,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
 	if (!trap.cause)
 		__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_AIA, true);
+					SBI_HART_EXT_SMAIA, true);
 
 	/* Detect if hart supports stimecmp CSR(Sstc extension) */
 	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 925840f110b..0e3094699f8 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -274,7 +274,7 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
-					   SBI_HART_EXT_AIA))
+					   SBI_HART_EXT_SMAIA))
 			rc = sbi_trap_aia_irq(regs, mcause);
 		else
 			rc = sbi_trap_nonaia_irq(regs, mcause);

From cbaa9b0333517b3c25bea8d1c71ac8005ff1f727 Mon Sep 17 00:00:00 2001
From: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
Date: Wed, 17 Aug 2022 23:40:56 +0800
Subject: [PATCH 1060/1765] lib: utils: serial: Add Cadence UART driver

Add Cadence UART driver

Signed-off-by: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
Signed-off-by: Wei Liang Lim <weiliang.lim@linux.starfivetech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h      |   4 +-
 include/sbi_utils/serial/cadence-uart.h |  16 +++
 lib/utils/fdt/fdt_helper.c              |   6 +-
 lib/utils/serial/Kconfig                |   9 ++
 lib/utils/serial/cadence-uart.c         | 128 ++++++++++++++++++++++++
 lib/utils/serial/fdt_serial_cadence.c   |  35 +++++++
 lib/utils/serial/fdt_serial_uart8250.c  |   2 +-
 lib/utils/serial/objects.mk             |   4 +
 platform/generic/configs/defconfig      |   1 +
 9 files changed, 199 insertions(+), 6 deletions(-)
 create mode 100644 include/sbi_utils/serial/cadence-uart.h
 create mode 100644 lib/utils/serial/cadence-uart.c
 create mode 100644 lib/utils/serial/fdt_serial_cadence.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index c60af35ba9d..bcd49961b10 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -65,8 +65,8 @@ int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
-int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
-			    struct platform_uart_data *uart);
+int fdt_parse_uart_node(void *fdt, int nodeoffset,
+			struct platform_uart_data *uart);
 
 int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
diff --git a/include/sbi_utils/serial/cadence-uart.h b/include/sbi_utils/serial/cadence-uart.h
new file mode 100644
index 00000000000..e75fb9512de
--- /dev/null
+++ b/include/sbi_utils/serial/cadence-uart.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 StarFive Technology Co., Ltd.
+ *
+ * Author: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
+ */
+
+#ifndef __SERIAL_CADENCE_UART_H__
+#define __SERIAL_CADENCE_UART_H__
+
+#include <sbi/sbi_types.h>
+
+int cadence_uart_init(unsigned long base, u32 in_freq, u32 baudrate);
+
+#endif
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index c6abf804014..6a75d6fcd48 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -401,8 +401,8 @@ int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_uart8250_node(void *fdt, int nodeoffset,
-			    struct platform_uart_data *uart)
+int fdt_parse_uart_node(void *fdt, int nodeoffset,
+			struct platform_uart_data *uart)
 {
 	int len, rc;
 	const fdt32_t *val;
@@ -447,7 +447,7 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	if (nodeoffset < 0)
 		return nodeoffset;
 
-	return fdt_parse_uart8250_node(fdt, nodeoffset, uart);
+	return fdt_parse_uart_node(fdt, nodeoffset, uart);
 }
 
 int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index 152060de73b..6e425f21a1d 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -9,6 +9,11 @@ config FDT_SERIAL
 
 if FDT_SERIAL
 
+config FDT_SERIAL_CADENCE
+	bool "Cadence UART FDT driver"
+	select SERIAL_CADENCE
+	default n
+
 config FDT_SERIAL_GAISLER
 	bool "Gaisler UART FDT driver"
 	select SERIAL_GAISLER
@@ -46,6 +51,10 @@ config FDT_SERIAL_XILINX_UARTLITE
 
 endif
 
+config SERIAL_CADENCE
+	bool "Cadence UART support"
+	default n
+
 config SERIAL_GAISLER
 	bool "Gaisler UART support"
 	default n
diff --git a/lib/utils/serial/cadence-uart.c b/lib/utils/serial/cadence-uart.c
new file mode 100644
index 00000000000..8a2b6ba7a72
--- /dev/null
+++ b/lib/utils/serial/cadence-uart.c
@@ -0,0 +1,128 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 StarFive Technology Co., Ltd.
+ *
+ * Author: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/cadence-uart.h>
+
+/* clang-format off */
+
+#define UART_REG_CTRL		0x00
+#define UART_REG_MODE		0x04
+#define UART_REG_IDR		0x0C
+#define UART_REG_BRGR		0x18
+#define UART_REG_CSR		0x2C
+#define UART_REG_RFIFO_TFIFO	0x30
+#define UART_REG_BDIVR		0x34
+
+#define UART_CTRL_RXRES		0x00000001
+#define UART_CTRL_TXRES		0x00000002
+#define UART_CTRL_RXEN		0x00000004
+#define UART_CTRL_RXDIS		0x00000008
+#define UART_CTRL_TXEN		0x00000010
+#define UART_CTRL_TXDIS		0x00000020
+
+#define UART_MODE_PAR_NONE	0x00000020	/* No parity set */
+
+#define UART_BRGR_CD_CLKDIVISOR	0x00000001	/* baud_sample = sel_clk */
+
+#define	UART_CSR_REMPTY		0x00000002
+#define	UART_CSR_TFUL		0x00000010
+
+/* clang-format on */
+
+static volatile void *uart_base;
+static u32 uart_in_freq;
+static u32 uart_baudrate;
+
+/*
+ * Find minimum divisor divides in_freq to max_target_hz;
+ * Based on SiFive UART driver (sifive-uart.c)
+ */
+static inline unsigned int uart_min_clk_divisor(uint64_t in_freq,
+						uint64_t max_target_hz)
+{
+	uint64_t quotient = (in_freq + max_target_hz - 1) / (max_target_hz);
+
+	/* Avoid underflow */
+	if (quotient == 0)
+		return 0;
+	else
+		return quotient - 1;
+}
+
+static u32 get_reg(u32 offset)
+{
+	return readl(uart_base + offset);
+}
+
+static void set_reg(u32 offset, u32 val)
+{
+	writel(val, uart_base + offset);
+}
+
+static void cadence_uart_putc(char ch)
+{
+	while (get_reg(UART_REG_CSR) & UART_CSR_TFUL)
+		;
+
+	set_reg(UART_REG_RFIFO_TFIFO, ch);
+}
+
+static int cadence_uart_getc(void)
+{
+	u32 ret = get_reg(UART_REG_CSR);
+
+	if (!(ret & UART_CSR_REMPTY))
+		return get_reg(UART_REG_RFIFO_TFIFO);
+
+	return -1;
+}
+
+static struct sbi_console_device cadence_console = {
+	.name = "cadence_uart",
+	.console_putc = cadence_uart_putc,
+	.console_getc = cadence_uart_getc
+};
+
+int cadence_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
+{
+	uart_base     = (volatile void *)base;
+	uart_in_freq  = in_freq;
+	uart_baudrate = baudrate;
+
+	/* Disable interrupts */
+	set_reg(UART_REG_IDR, 0xFFFFFFFF);
+
+	/* Disable TX RX */
+	set_reg(UART_REG_CTRL, UART_CTRL_TXDIS | UART_CTRL_RXDIS);
+
+	/* Configure baudrate */
+	if (in_freq && baudrate) {
+		set_reg(UART_REG_BRGR, UART_BRGR_CD_CLKDIVISOR);
+		set_reg(UART_REG_BDIVR,
+			uart_min_clk_divisor(in_freq, baudrate));
+	}
+
+	/* Software reset TX RX data path and enable TX RX */
+	set_reg(UART_REG_CTRL, UART_CTRL_TXRES | UART_CTRL_RXRES
+		| UART_CTRL_TXEN | UART_CTRL_RXEN);
+
+	/*
+	 * Set:
+	 * 1 stop bit, bits[07:06] = 0x00,
+	 * no parity set, bits[05:03] = 0x100,
+	 * 8 bits character length, bits[02:01] = 0x00,
+	 * sel_clk = uart_clk, bit[0] = 0x0
+	 */
+	set_reg(UART_REG_MODE, UART_MODE_PAR_NONE);
+
+	sbi_console_set_device(&cadence_console);
+
+	return 0;
+}
diff --git a/lib/utils/serial/fdt_serial_cadence.c b/lib/utils/serial/fdt_serial_cadence.c
new file mode 100644
index 00000000000..946e5336547
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_cadence.c
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 StarFive Technology Co., Ltd.
+ *
+ * Author: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/cadence-uart.h>
+
+static int serial_cadence_init(void *fdt, int nodeoff,
+			       const struct fdt_match *match)
+{
+	int rc;
+	struct platform_uart_data uart = { 0 };
+
+	rc = fdt_parse_uart_node(fdt, nodeoff, &uart);
+	if (rc)
+		return rc;
+
+	return cadence_uart_init(uart.addr, uart.freq, uart.baud);
+}
+
+static const struct fdt_match serial_cadence_match[] = {
+	{ .compatible = "cdns,uart-r1p12" },
+	{ .compatible = "starfive,jh8100-uart" },
+	{ },
+};
+
+struct fdt_serial fdt_serial_cadence = {
+	.match_table = serial_cadence_match,
+	.init = serial_cadence_init
+};
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 0b95f2d9e44..7b5d6a4c2f1 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -17,7 +17,7 @@ static int serial_uart8250_init(void *fdt, int nodeoff,
 	int rc;
 	struct platform_uart_data uart = { 0 };
 
-	rc = fdt_parse_uart8250_node(fdt, nodeoff, &uart);
+	rc = fdt_parse_uart_node(fdt, nodeoff, &uart);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index fa9f5a3081c..efb1d9e5805 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -10,6 +10,9 @@
 libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial.o
 libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial_drivers.o
 
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_CADENCE) += fdt_serial_cadence
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_CADENCE) += serial/fdt_serial_cadence.o
+
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_GAISLER) += fdt_serial_gaisler
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_GAISLER) += serial/fdt_serial_gaisler.o
 
@@ -31,6 +34,7 @@ libsbiutils-objs-$(CONFIG_FDT_SERIAL_UART8250) += serial/fdt_serial_uart8250.o
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += fdt_serial_xlnx_uartlite
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += serial/fdt_serial_xlnx_uartlite.o
 
+libsbiutils-objs-$(CONFIG_SERIAL_CADENCE) += serial/cadence-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_GAISLER) += serial/gaisler-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_SHAKTI) += serial/shakti-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_SIFIVE) += serial/sifive-uart.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 2a753940e3d..e3241733e17 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -18,6 +18,7 @@ CONFIG_FDT_RESET_SIFIVE_TEST=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
 CONFIG_FDT_RESET_THEAD=y
 CONFIG_FDT_SERIAL=y
+CONFIG_FDT_SERIAL_CADENCE=y
 CONFIG_FDT_SERIAL_GAISLER=y
 CONFIG_FDT_SERIAL_HTIF=y
 CONFIG_FDT_SERIAL_SHAKTI=y

From 622cc5f014eb983348aa0dc7fb5fbde43d074782 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Wed, 24 Aug 2022 20:24:37 +0530
Subject: [PATCH 1061/1765] include: Remove sideleg and sedeleg

sideleg and sedeleg csrs are not part of riscv isa spec
anymore, these csrs were part of N extension which
is removed from the riscv isa specification.

These commits removed all traces of these csrs from
riscv spec (https://github.com/riscv/riscv-isa-manual) -

commit f8d27f805b65 ("Remove or downgrade more references to N extension (#674)")
commit b6cade07034d ("Remove N extension chapter for now")

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 8884301483c..b0f08c87676 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -312,8 +312,6 @@
 
 /* Supervisor Trap Setup */
 #define CSR_SSTATUS			0x100
-#define CSR_SEDELEG			0x102
-#define CSR_SIDELEG			0x103
 #define CSR_SIE				0x104
 #define CSR_STVEC			0x105
 #define CSR_SCOUNTEREN			0x106

From a90cf6b186bff1306a12abd290bd36f7a3702a24 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 11:20:15 +0530
Subject: [PATCH 1062/1765] lib: sbi_pmu: Remove "event_idx" member from struct
 sbi_pmu_fw_event

The "event_idx" member of struct sbi_pmu_fw_event is not used
anywhere so let us remove it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 5a294a20d9a..535e5cc1bf9 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -35,9 +35,6 @@ struct sbi_pmu_hw_event {
 
 /** Representation of a firmware event */
 struct sbi_pmu_fw_event {
-	/* Event associated with the particular counter */
-	uint32_t event_idx;
-
 	/* Current value of the counter */
 	unsigned long curr_count;
 

From 1664d0efce0b7945394148870acafe19c2b3e900 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 11:39:02 +0530
Subject: [PATCH 1063/1765] lib: sbi_pmu: Replace sbi_pmu_ctr_read() with
 sbi_pmu_ctr_fw_read()

The "read a firmware counter" SBI call should only work for firmware
counters so let us replace sbi_pmu_ctr_read() with sbi_pmu_ctr_fw_read()
which works only on firmware counters.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_pmu.h   |  2 +-
 lib/sbi/sbi_ecall_pmu.c |  3 ++-
 lib/sbi/sbi_pmu.c       | 45 +++++++----------------------------------
 3 files changed, 10 insertions(+), 40 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index f5e3dbdf66e..34336f732e9 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -53,7 +53,7 @@ int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap);
 
 int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32 cmap);
 
-int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval);
+int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval);
 
 int sbi_pmu_ctr_stop(unsigned long cidx_base, unsigned long cidx_mask,
 		     unsigned long flag);
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 9ee9e81802e..826c8a89bf0 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -51,7 +51,8 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 
 		break;
 	case SBI_EXT_PMU_COUNTER_FW_READ:
-		ret = sbi_pmu_ctr_read(regs->a0, out_val);
+		ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
+		*out_val = temp;
 		break;
 	case SBI_EXT_PMU_COUNTER_START:
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 535e5cc1bf9..250808ec352 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -167,50 +167,19 @@ static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code)
 	return event_idx_type;
 }
 
-static int pmu_ctr_read_fw(uint32_t cidx, unsigned long *cval,
-			       uint32_t fw_evt_code)
-{
-	u32 hartid = current_hartid();
-	struct sbi_pmu_fw_event fevent;
-
-	fevent = fw_event_map[hartid][fw_evt_code];
-	*cval = fevent.curr_count;
-
-	return 0;
-}
-
-/* Add a hardware counter read for completeness for future purpose */
-static int pmu_ctr_read_hw(uint32_t cidx, uint64_t *cval)
-{
-	/* Check for invalid hw counter read requests */
-	if (unlikely(cidx == 1))
-		return SBI_EINVAL;
-#if __riscv_xlen == 32
-	uint32_t temp, temph = 0;
-
-	temp = csr_read_num(CSR_MCYCLE + cidx);
-	temph = csr_read_num(CSR_MCYCLEH + cidx);
-	*cval = ((uint64_t)temph << 32) | temp;
-#else
-	*cval = csr_read_num(CSR_MCYCLE + cidx);
-#endif
-
-	return 0;
-}
-
-int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval)
+int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 {
 	int event_idx_type;
 	uint32_t event_code;
-	uint64_t cval64;
+	u32 hartid = current_hartid();
+	struct sbi_pmu_fw_event *fevent;
 
 	event_idx_type = pmu_ctr_validate(cidx, &event_code);
-	if (event_idx_type < 0)
+	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
-	else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-		pmu_ctr_read_fw(cidx, cval, event_code);
-	else
-		pmu_ctr_read_hw(cidx, &cval64);
+
+	fevent = &fw_event_map[hartid][event_code];
+	*cval = fevent->curr_count;
 
 	return 0;
 }

From e238459fabb7bdf9237662297bbe8b177e0fb906 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 11:44:40 +0530
Subject: [PATCH 1064/1765] lib: sbi_pmu: Firmware counters are always 64 bits
 wide

As-per SBI specification, all firmware counters are always 64 bits
wide so let us update the SBI PMU implementation to reflect this fact.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 250808ec352..1c01d340fe8 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -36,7 +36,7 @@ struct sbi_pmu_hw_event {
 /** Representation of a firmware event */
 struct sbi_pmu_fw_event {
 	/* Current value of the counter */
-	unsigned long curr_count;
+	uint64_t curr_count;
 
 	/* A flag indicating pmu event monitoring is started */
 	bool bStarted;
@@ -719,8 +719,8 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 	} else {
 		/* it's a firmware counter */
 		cinfo.type = SBI_PMU_CTR_TYPE_FW;
-		/* Firmware counters are XLEN bits wide */
-		cinfo.width = BITS_PER_LONG - 1;
+		/* Firmware counters are always 64 bits wide */
+		cinfo.width = 63;
 	}
 
 	*ctr_info = cinfo.value;

From c9b388d578647c3283aea03f74bf1251503a58f0 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 13:27:19 +0530
Subject: [PATCH 1065/1765] lib: sbi_pmu: Simplify FW counters to reduce memory
 usage

Currently, we have 32 elements (i.e. SBI_PMU_FW_EVENT_MAX) array of
"struct sbi_pmu_fw_event" for each of 128 possible HARTs
(i.e. SBI_HARTMASK_MAX_BITS).

To reduce memory usage of OpenSBI, we update FW counter implementation
as follows:
1) Remove SBI_PMU_FW_EVENT_MAX
2) Remove "struct sbi_pmu_fw_event"
3) Create per-HART bitmap of XLEN bits to track FW counters
   which are started on each HART
4) Create per-HART uint64_t array to track values of FW
   counters on each HART.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_pmu.h |  3 --
 lib/sbi/sbi_pmu.c     | 78 ++++++++++++++++++++-----------------------
 2 files changed, 36 insertions(+), 45 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 34336f732e9..39cf0072927 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -19,9 +19,6 @@
 /* Maximum number of hardware events that can mapped by OpenSBI */
 #define SBI_PMU_HW_EVENT_MAX 256
 
-/* Maximum number of firmware events that can mapped by OpenSBI */
-#define SBI_PMU_FW_EVENT_MAX 32
-
 /* Counter related macros */
 #define SBI_PMU_FW_CTR_MAX 16
 #define SBI_PMU_HW_CTR_MAX 32
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 1c01d340fe8..26c9406bbd7 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -33,15 +33,6 @@ struct sbi_pmu_hw_event {
 	uint64_t select_mask;
 };
 
-/** Representation of a firmware event */
-struct sbi_pmu_fw_event {
-	/* Current value of the counter */
-	uint64_t curr_count;
-
-	/* A flag indicating pmu event monitoring is started */
-	bool bStarted;
-};
-
 /* Information about PMU counters as per SBI specification */
 union sbi_pmu_ctr_info {
 	unsigned long value;
@@ -63,8 +54,14 @@ static struct sbi_pmu_hw_event hw_event_map[SBI_PMU_HW_EVENT_MAX] = {0};
 /* counter to enabled event mapping */
 static uint32_t active_events[SBI_HARTMASK_MAX_BITS][SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX];
 
-/* Contains all the information about firmwares events */
-static struct sbi_pmu_fw_event fw_event_map[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_EVENT_MAX] = {0};
+/* Bitmap of firmware counters started on each HART */
+#if SBI_PMU_FW_CTR_MAX >= BITS_PER_LONG
+#error "Can't handle firmware counters beyond BITS_PER_LONG"
+#endif
+static unsigned long fw_counters_started[SBI_HARTMASK_MAX_BITS];
+
+/* Values of firmwares counters on each HART */
+static uint64_t fw_counters_value[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_CTR_MAX] = {0};
 
 /* Maximum number of hardware events available */
 static uint32_t num_hw_events;
@@ -172,14 +169,12 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 	int event_idx_type;
 	uint32_t event_code;
 	u32 hartid = current_hartid();
-	struct sbi_pmu_fw_event *fevent;
 
 	event_idx_type = pmu_ctr_validate(cidx, &event_code);
 	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
 
-	fevent = &fw_event_map[hartid][event_code];
-	*cval = fevent->curr_count;
+	*cval = fw_counters_value[hartid][cidx - num_hw_ctrs];
 
 	return 0;
 }
@@ -333,16 +328,13 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	return 0;
 }
 
-static int pmu_ctr_start_fw(uint32_t cidx, uint32_t fw_evt_code,
-			    uint64_t ival, bool ival_update)
+static int pmu_ctr_start_fw(uint32_t cidx, uint64_t ival, bool ival_update)
 {
 	u32 hartid = current_hartid();
-	struct sbi_pmu_fw_event *fevent;
 
-	fevent = &fw_event_map[hartid][fw_evt_code];
 	if (ival_update)
-		fevent->curr_count = ival;
-	fevent->bStarted = TRUE;
+		fw_counters_value[hartid][cidx - num_hw_ctrs] = ival;
+	fw_counters_started[hartid] |= BIT(cidx - num_hw_ctrs);
 
 	return 0;
 }
@@ -369,7 +361,7 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 			/* Continue the start operation for other counters */
 			continue;
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_start_fw(cidx, event_code, ival, bUpdate);
+			ret = pmu_ctr_start_fw(cidx, ival, bUpdate);
 		else
 			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
 	}
@@ -399,11 +391,9 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 		return SBI_EALREADY_STOPPED;
 }
 
-static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t fw_evt_code)
+static int pmu_ctr_stop_fw(uint32_t cidx)
 {
-	u32 hartid = current_hartid();
-
-	fw_event_map[hartid][fw_evt_code].bStarted = FALSE;
+	fw_counters_started[current_hartid()] &= ~BIT(cidx - num_hw_ctrs);
 
 	return 0;
 }
@@ -444,7 +434,7 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 			continue;
 
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_stop_fw(cidx, event_code);
+			ret = pmu_ctr_stop_fw(cidx);
 		else
 			ret = pmu_ctr_stop_hw(cidx);
 
@@ -624,8 +614,6 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	int ctr_idx = SBI_ENOTSUPP;
 	u32 hartid = current_hartid();
 	int event_type;
-	struct sbi_pmu_fw_event *fevent;
-	uint32_t fw_evt_code;
 
 	/* Do a basic sanity check of counter base & mask */
 	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs)
@@ -665,30 +653,36 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START)
 			pmu_ctr_start_hw(ctr_idx, 0, false);
 	} else if (event_type == SBI_PMU_EVENT_TYPE_FW) {
-		fw_evt_code = get_cidx_code(event_idx);
-		fevent = &fw_event_map[hartid][fw_evt_code];
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
-			fevent->curr_count = 0;
+			fw_counters_value[hartid][ctr_idx - num_hw_ctrs] = 0;
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START)
-			fevent->bStarted = TRUE;
+			fw_counters_started[hartid] |= BIT(ctr_idx - num_hw_ctrs);
 	}
 
 	return ctr_idx;
 }
 
-inline int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
+int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
 {
-	u32 hartid = current_hartid();
-	struct sbi_pmu_fw_event *fevent;
+	u32 cidx, hartid = current_hartid();
+	uint64_t *fcounter = NULL;
+
+	if (likely(!fw_counters_started[hartid]))
+		return 0;
 
 	if (unlikely(fw_id >= SBI_PMU_FW_MAX))
 		return SBI_EINVAL;
 
-	fevent = &fw_event_map[hartid][fw_id];
+	for (cidx = num_hw_ctrs; cidx < total_ctrs; cidx++) {
+		if (get_cidx_code(active_events[hartid][cidx]) == fw_id &&
+		    (fw_counters_started[hartid] & BIT(cidx - num_hw_ctrs))) {
+			fcounter = &fw_counters_value[hartid][cidx - num_hw_ctrs];
+			break;
+		}
+	}
 
-	/* PMU counters will be only enabled during performance debugging */
-	if (unlikely(fevent->bStarted))
-		fevent->curr_count++;
+	if (fcounter)
+		(*fcounter)++;
 
 	return 0;
 }
@@ -735,9 +729,9 @@ static void pmu_reset_event_map(u32 hartid)
 	/* Initialize the counter to event mapping table */
 	for (j = 3; j < total_ctrs; j++)
 		active_events[hartid][j] = SBI_PMU_EVENT_IDX_INVALID;
-	for (j = 0; j < SBI_PMU_FW_EVENT_MAX; j++)
-		sbi_memset(&fw_event_map[hartid][j], 0,
-			   sizeof(struct sbi_pmu_fw_event));
+	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
+		fw_counters_value[hartid][j] = 0;
+	fw_counters_started[hartid] = 0;
 }
 
 void sbi_pmu_exit(struct sbi_scratch *scratch)

From d10c1f4acde1753ec5818728e9f864b9838f09d1 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 15:11:41 +0530
Subject: [PATCH 1066/1765] lib: sbi_pmu: Add custom PMU device operations

We extend SBI PMU implementation to allow custom PMU device operations
which a platform can use for platform specific quirks.

The custom PMU device operations added by this patch include:
1) Operations to allow a platform implement custom firmware events.
   These custom firmware events can be SBI vendor extension related
   events or platform specific per-HART events are not possible to
   count through HPM CSRs.
2) Operations to allow a platform implement custom way for enabling
   (or disabling) an overflow interrupt (e.g. T-Head C9xx).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_pmu.h |  57 ++++++++++++++++++++++
 lib/sbi/sbi_pmu.c     | 108 ++++++++++++++++++++++++++++++++++--------
 2 files changed, 144 insertions(+), 21 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 39cf0072927..d7875755334 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -25,6 +25,63 @@
 #define SBI_PMU_CTR_MAX	   (SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX)
 #define SBI_PMU_FIXED_CTR_MASK 0x07
 
+struct sbi_pmu_device {
+	/** Name of the PMU platform device */
+	char name[32];
+
+	/**
+	 * Validate event code of custom firmware event
+	 * Note: SBI_PMU_FW_MAX <= event_idx_code
+	 */
+	int (*fw_event_validate_code)(uint32_t event_idx_code);
+
+	/**
+	 * Match custom firmware counter with custom firmware event
+	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
+	 */
+	bool (*fw_counter_match_code)(uint32_t counter_index,
+				      uint32_t event_idx_code);
+
+	/**
+	 * Read value of custom firmware counter
+	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
+	 */
+	uint64_t (*fw_counter_read_value)(uint32_t counter_index);
+
+	/**
+	 * Start custom firmware counter
+	 * Note: SBI_PMU_FW_MAX <= event_idx_code
+	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
+	 */
+	int (*fw_counter_start)(uint32_t counter_index,
+				uint32_t event_idx_code,
+				uint64_t init_val, bool init_val_update);
+
+	/**
+	 * Stop custom firmware counter
+	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
+	 */
+	int (*fw_counter_stop)(uint32_t counter_index);
+
+	/**
+	 * Custom enable irq for hardware counter
+	 * Note: 0 <= counter_index < SBI_PMU_HW_CTR_MAX
+	 */
+	void (*hw_counter_enable_irq)(uint32_t counter_index);
+
+	/**
+	 * Custom disable irq for hardware counter
+	 * Note: 0 <= counter_index < SBI_PMU_HW_CTR_MAX
+	 */
+	void (*hw_counter_disable_irq)(uint32_t counter_index);
+};
+
+/** Get the PMU platform device */
+const struct sbi_pmu_device *sbi_pmu_get_device(void);
+
+/** Set the PMU platform device */
+void sbi_pmu_set_device(const struct sbi_pmu_device *dev);
+
 /** Initialize PMU */
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot);
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 26c9406bbd7..87e1ff8ccf3 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -48,6 +48,9 @@ union sbi_pmu_ctr_info {
 	};
 };
 
+/* Platform specific PMU device */
+static const struct sbi_pmu_device *pmu_dev = NULL;
+
 /* Mapping between event range and possible counters  */
 static struct sbi_pmu_hw_event hw_event_map[SBI_PMU_HW_EVENT_MAX] = {0};
 
@@ -113,7 +116,11 @@ static int pmu_event_validate(unsigned long event_idx)
 		event_idx_code_max = SBI_PMU_HW_GENERAL_MAX;
 		break;
 	case SBI_PMU_EVENT_TYPE_FW:
-		event_idx_code_max = SBI_PMU_FW_MAX;
+		if (SBI_PMU_FW_MAX <= event_idx_code &&
+		    pmu_dev && pmu_dev->fw_event_validate_code)
+			return pmu_dev->fw_event_validate_code(event_idx_code);
+		else
+			event_idx_code_max = SBI_PMU_FW_MAX;
 		break;
 	case SBI_PMU_EVENT_TYPE_HW_CACHE:
 		cache_ops_result = event_idx_code &
@@ -174,6 +181,11 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
 
+	if (SBI_PMU_FW_MAX <= event_code &&
+	    pmu_dev && pmu_dev->fw_counter_read_value)
+		fw_counters_value[hartid][cidx - num_hw_ctrs] =
+			pmu_dev->fw_counter_read_value(cidx - num_hw_ctrs);
+
 	*cval = fw_counters_value[hartid][cidx - num_hw_ctrs];
 
 	return 0;
@@ -319,6 +331,8 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 
 	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		pmu_ctr_enable_irq_hw(cidx);
+	if (pmu_dev && pmu_dev->hw_counter_enable_irq)
+		pmu_dev->hw_counter_enable_irq(cidx);
 	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
 skip_inhibit_update:
@@ -328,10 +342,21 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	return 0;
 }
 
-static int pmu_ctr_start_fw(uint32_t cidx, uint64_t ival, bool ival_update)
+static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
+			    uint64_t ival, bool ival_update)
 {
+	int ret;
 	u32 hartid = current_hartid();
 
+	if (SBI_PMU_FW_MAX <= event_code &&
+	    pmu_dev && pmu_dev->fw_counter_start) {
+		ret = pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
+						event_code,
+						ival, ival_update);
+		if (ret)
+			return ret;
+	}
+
 	if (ival_update)
 		fw_counters_value[hartid][cidx - num_hw_ctrs] = ival;
 	fw_counters_started[hartid] |= BIT(cidx - num_hw_ctrs);
@@ -361,7 +386,7 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 			/* Continue the start operation for other counters */
 			continue;
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_start_fw(cidx, ival, bUpdate);
+			ret = pmu_ctr_start_fw(cidx, event_code, ival, bUpdate);
 		else
 			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
 	}
@@ -391,8 +416,17 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 		return SBI_EALREADY_STOPPED;
 }
 
-static int pmu_ctr_stop_fw(uint32_t cidx)
+static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
 {
+	int ret;
+
+	if (SBI_PMU_FW_MAX <= event_code &&
+	    pmu_dev && pmu_dev->fw_counter_stop) {
+		ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs);
+		if (ret)
+			return ret;
+	}
+
 	fw_counters_started[current_hartid()] &= ~BIT(cidx - num_hw_ctrs);
 
 	return 0;
@@ -434,7 +468,7 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 			continue;
 
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_stop_fw(cidx);
+			ret = pmu_ctr_stop_fw(cidx, event_code);
 		else
 			ret = pmu_ctr_stop_hw(cidx);
 
@@ -481,6 +515,9 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 		mhpmevent_val = (mhpmevent_val & ~MHPMEVENT_SSCOF_MASK) |
 				 MHPMEVENT_MINH | MHPMEVENT_OF;
 
+	if (pmu_dev && pmu_dev->hw_counter_disable_irq)
+		pmu_dev->hw_counter_disable_irq(ctr_idx);
+
 	/* Update the inhibit flags based on inhibit flags received from supervisor */
 	pmu_update_inhibit_flags(flags, &mhpmevent_val);
 
@@ -588,21 +625,26 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
  * Thus, select the first available fw counter after sanity
  * check.
  */
-static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask, u32 hartid)
+static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
+			   uint32_t event_code, u32 hartid)
 {
-	int i = 0;
-	int fw_base;
-	unsigned long ctr_mask = cmask << cbase;
+	int i, cidx;
 
-	if (cbase < num_hw_ctrs)
-		fw_base = num_hw_ctrs;
-	else
-		fw_base = cbase;
+	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
+		cidx = i + cbase;
+		if (cidx < num_hw_ctrs || total_ctrs <= cidx)
+			continue;
+		if (active_events[hartid][i] != SBI_PMU_EVENT_IDX_INVALID)
+			continue;
+		if (SBI_PMU_FW_MAX <= event_code &&
+		    pmu_dev && pmu_dev->fw_counter_match_code) {
+			if (!pmu_dev->fw_counter_match_code(cidx - num_hw_ctrs,
+							    event_code))
+				continue;
+		}
 
-	for (i = fw_base; i < total_ctrs; i++)
-		if ((active_events[hartid][i] == SBI_PMU_EVENT_IDX_INVALID) &&
-		    ((1UL << i) & ctr_mask))
-			return i;
+		return i;
+	}
 
 	return SBI_ENOTSUPP;
 }
@@ -611,8 +653,8 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			  unsigned long flags, unsigned long event_idx,
 			  uint64_t event_data)
 {
-	int ctr_idx = SBI_ENOTSUPP;
-	u32 hartid = current_hartid();
+	int ret, ctr_idx = SBI_ENOTSUPP;
+	u32 event_code, hartid = current_hartid();
 	int event_type;
 
 	/* Do a basic sanity check of counter base & mask */
@@ -622,6 +664,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	event_type = pmu_event_validate(event_idx);
 	if (event_type < 0)
 		return SBI_EINVAL;
+	event_code = get_cidx_code(event_idx);
 
 	if (flags & SBI_PMU_CFG_FLAG_SKIP_MATCH) {
 		/* The caller wants to skip the match because it already knows the
@@ -636,7 +679,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 
 	if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		/* Any firmware counter can be used track any firmware event */
-		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, hartid);
+		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, event_code, hartid);
 	} else {
 		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, flags, event_idx,
 					  event_data);
@@ -655,8 +698,18 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	} else if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
 			fw_counters_value[hartid][ctr_idx - num_hw_ctrs] = 0;
-		if (flags & SBI_PMU_CFG_FLAG_AUTO_START)
+		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
+			if (SBI_PMU_FW_MAX <= event_code &&
+			    pmu_dev && pmu_dev->fw_counter_start) {
+				ret = pmu_dev->fw_counter_start(
+					ctr_idx - num_hw_ctrs, event_code,
+					fw_counters_value[hartid][ctr_idx - num_hw_ctrs],
+					true);
+				if (ret)
+					return ret;
+			}
 			fw_counters_started[hartid] |= BIT(ctr_idx - num_hw_ctrs);
+		}
 	}
 
 	return ctr_idx;
@@ -734,6 +787,19 @@ static void pmu_reset_event_map(u32 hartid)
 	fw_counters_started[hartid] = 0;
 }
 
+const struct sbi_pmu_device *sbi_pmu_get_device(void)
+{
+	return pmu_dev;
+}
+
+void sbi_pmu_set_device(const struct sbi_pmu_device *dev)
+{
+	if (!dev || pmu_dev)
+		return;
+
+	pmu_dev = dev;
+}
+
 void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
 	u32 hartid = current_hartid();

From ee69f8eeb3c16bfdb4bb3d8b5033fb8a7816f7b6 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 15:29:27 +0530
Subject: [PATCH 1067/1765] lib: sbi: Print platform PMU device at boot-time

Let us print the platform PMU device name at the boot-time so that users
know whether the underlying platform has custom per-HART PMU operations.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_init.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index d57efa7e22e..a8500e59274 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -63,6 +63,7 @@ static void sbi_boot_print_banner(struct sbi_scratch *scratch)
 static void sbi_boot_print_general(struct sbi_scratch *scratch)
 {
 	char str[128];
+	const struct sbi_pmu_device *pdev;
 	const struct sbi_hsm_device *hdev;
 	const struct sbi_ipi_device *idev;
 	const struct sbi_timer_device *tdev;
@@ -93,6 +94,9 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	hdev = sbi_hsm_get_device();
 	sbi_printf("Platform HSM Device       : %s\n",
 		   (hdev) ? hdev->name : "---");
+	pdev = sbi_pmu_get_device();
+	sbi_printf("Platform PMU Device       : %s\n",
+		   (pdev) ? pdev->name : "---");
 	srdev = sbi_system_reset_get_device(SBI_SRST_RESET_TYPE_COLD_REBOOT, 0);
 	sbi_printf("Platform Reboot Device    : %s\n",
 		   (srdev) ? srdev->name : "---");

From 5019fd124b4c46e1581129c5154fc2cdd3b777ed Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 24 Aug 2022 16:49:30 +0530
Subject: [PATCH 1068/1765] include: sbi: Reduce includes in sbi_pmu.h

The sbi_pmu.h should only include minimal required headers whereas
sbi_pmu.c should include all required headers.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_pmu.h | 5 ++---
 lib/sbi/sbi_pmu.c     | 2 ++
 lib/sbi/sbi_trap.c    | 1 +
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index d7875755334..a2ce42da7c1 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -11,9 +11,8 @@
 #define __SBI_PMU_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_hartmask.h>
-#include <sbi/sbi_scratch.h>
-#include <sbi/sbi_ecall_interface.h>
+
+struct sbi_scratch;
 
 /* Event related macros */
 /* Maximum number of hardware events that can mapped by OpenSBI */
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 87e1ff8ccf3..214d5e8a686 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -10,7 +10,9 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 0e3094699f8..4c1339e61e4 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_error.h>

From d32b0a92dbba0f96d5e6c930e24e8e60f3baf7b4 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 2 Sep 2022 10:41:03 +0300
Subject: [PATCH 1069/1765] docs: pmu: fix Unmatched example typo

bitmap for MHPMCOUNTERx should be 0x18 and not 0x0c, we check
against SBI_PMU_FIXED_CTR_MASK which assumes than first 3 bits are
dedicated to mcycle, mtime and minstret, u74 has 2 hardware counters.

Reported-by: Zhang Xin <zhangxin.xa@gmail.com>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 8751bb541be..ca6ca25033b 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -93,8 +93,8 @@ pmu {
  */
 pmu {
 	compatible 			= "riscv,pmu";
-	riscv,raw-event-to-mhpmcounters = <0x0 0x0 0xffffffff 0xfc0000ff 0xc>,
-					  <0x0 0x1 0xffffffff 0xfff800ff 0xc>,
-					  <0x0 0x2 0xffffffff 0xffffe0ff 0xc>;
+	riscv,raw-event-to-mhpmcounters = <0x0 0x0 0xffffffff 0xfc0000ff 0x18>,
+					  <0x0 0x1 0xffffffff 0xfff800ff 0x18>,
+					  <0x0 0x2 0xffffffff 0xffffe0ff 0x18>;
 };
 ```

From 19664f67579181d370621338f96307775add2bf9 Mon Sep 17 00:00:00 2001
From: Nikita Shubin <n.shubin@yadro.com>
Date: Fri, 2 Sep 2022 10:41:04 +0300
Subject: [PATCH 1070/1765] docs: pmu: extend bindings example for Unmatched

Extend example for Unmatched board to provide SBI PMU bindings
for generalized and cache event's where they are applicable.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index ca6ca25033b..d79b515e73d 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -90,9 +90,39 @@ pmu {
 /*
  * For HiFive Unmatched board. The encodings can be found here
  * https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16acba_fu740-c000-manual-v1p6.pdf
+ * This example also binds standard SBI PMU hardware id's to U74 PMU event codes, U74 uses bitfield for
+ * events encoding, so several U74 events can be bound to single perf id.
+ * See SBI PMU hardware id's in include/sbi/sbi_ecall_interface.h
  */
 pmu {
 	compatible 			= "riscv,pmu";
+	riscv,event-to-mhpmevent =
+/* SBI_PMU_HW_CACHE_REFERENCES -> Instruction cache/ITIM busy | Data cache/DTIM busy */
+				   <0x00003 0x00000000 0x1801>,
+/* SBI_PMU_HW_CACHE_MISSES -> Instruction cache miss | Data cache miss or memory-mapped I/O access */
+				   <0x00004 0x00000000 0x0302>,
+/* SBI_PMU_HW_BRANCH_INSTRUCTIONS -> Conditional branch retired */
+				   <0x00005 0x00000000 0x4000>,
+/* SBI_PMU_HW_BRANCH_MISSES -> Branch direction misprediction | Branch/jump target misprediction */
+				   <0x00006 0x00000000 0x6001>,
+/* L1D_READ_MISS -> Data cache miss or memory-mapped I/O access */
+				   <0x10001 0x00000000 0x0202>,
+/* L1D_WRITE_ACCESS -> Data cache write-back */
+				   <0x10002 0x00000000 0x0402>,
+/* L1I_READ_ACCESS -> Instruction cache miss */
+				   <0x10009 0x00000000 0x0102>,
+/* LL_READ_MISS -> UTLB miss */
+				   <0x10011 0x00000000 0x2002>,
+/* DTLB_READ_MISS -> Data TLB miss */
+				   <0x10019 0x00000000 0x1002>,
+/* ITLB_READ_MISS-> Instruction TLB miss */
+				   <0x10021 0x00000000 0x0802>;
+	riscv,event-to-mhpmcounters = <0x00003 0x00006 0x18>,
+				      <0x10001 0x10002 0x18>,
+				      <0x10009 0x10009 0x18>,
+				      <0x10011 0x10011 0x18>,
+				      <0x10019 0x10019 0x18>,
+				      <0x10021 0x10021 0x18>;
 	riscv,raw-event-to-mhpmcounters = <0x0 0x0 0xffffffff 0xfc0000ff 0x18>,
 					  <0x0 0x1 0xffffffff 0xfff800ff 0x18>,
 					  <0x0 0x2 0xffffffff 0xffffe0ff 0x18>;

From 37a0d83b6d5a06fd740fcdfb5e4074c33e472a2d Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Fri, 2 Sep 2022 23:48:34 +0800
Subject: [PATCH 1071/1765] lib: sbi_trap: Add helper to get GVA in
 sbi_trap_regs

The GVA bit is in mstatus on RV64, and in mstatush in RV32. Refactor
code handling this in sbi_trap_handler into a helper function to extract
GVA from sbi_trap_regs, so that future code accessing GVA can be
XLEN-agnostic.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap.h | 18 ++++++++++++++++++
 lib/sbi/sbi_trap.c     | 14 +-------------
 2 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index fe3640af017..a562b95e883 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -10,6 +10,8 @@
 #ifndef __SBI_TRAP_H__
 #define __SBI_TRAP_H__
 
+#include <sbi/riscv_encoding.h>
+
 /* clang-format off */
 
 /** Index of zero member in sbi_trap_regs */
@@ -206,6 +208,22 @@ struct sbi_trap_info {
 	unsigned long gva;
 };
 
+static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
+{
+	/*
+	 * If the hypervisor extension is not implemented, mstatus[h].GVA is a
+	 * WPRI field, which is guaranteed to read as zero. In addition, in this
+	 * case we don't read mstatush and instead pretend it is zero, which
+	 * handles privileged spec version < 1.12.
+	 */
+
+#if __riscv_xlen == 32
+	return (regs->mstatusH & MSTATUSH_GVA) ? 1 : 0;
+#else
+	return (regs->mstatus & MSTATUS_GVA) ? 1 : 0;
+#endif
+}
+
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      struct sbi_trap_info *trap);
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 4c1339e61e4..c875c907388 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -316,19 +316,7 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		trap.tval = mtval;
 		trap.tval2 = mtval2;
 		trap.tinst = mtinst;
-
-		/*
-		 * If the hypervisor extension is not implemented,
-		 * mstatus[h].GVA is a WPRI field, which is guaranteed to read
-		 * as zero. In addition, in this case we don't read mstatush and
-		 * instead pretend it is zero, which handles privileged spec
-		 * version < 1.12.
-		 */
-#if __riscv_xlen == 32
-		trap.gva = (regs->mstatusH & MSTATUSH_GVA) ? 1 : 0;
-#else
-		trap.gva = (regs->mstatus & MSTATUS_GVA) ? 1 : 0;
-#endif
+		trap.gva   = sbi_regs_gva(regs);
 
 		rc = sbi_trap_redirect(regs, &trap);
 		break;

From 46e744ab6736c0d14a1a1609d9dda3b802c164fe Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Fri, 2 Sep 2022 23:48:35 +0800
Subject: [PATCH 1072/1765] lib: sbi_misaligned_ldst: Set GVA if not emulating

If a particular misaligned load or store cannot be emulated at all, for
the redirected trap, trap.gva is set to 0, but it should be the same as
mstatus[h].GVA of the original trap. Fix this so that if the trap is
destined for HS-mode, hstatus.GVA is then set correctly.

Fixes: 1c4ce74f5128 ("lib: sbi: Set gva when creating sbi_trap_info")
Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_misaligned_ldst.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 92a23939913..4b91e072c64 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -129,7 +129,7 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
-		uptrap.gva   = 0;
+		uptrap.gva   = sbi_regs_gva(regs);
 		return sbi_trap_redirect(regs, &uptrap);
 	}
 
@@ -245,7 +245,7 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		uptrap.tval = addr;
 		uptrap.tval2 = tval2;
 		uptrap.tinst = tinst;
-		uptrap.gva   = 0;
+		uptrap.gva   = sbi_regs_gva(regs);
 		return sbi_trap_redirect(regs, &uptrap);
 	}
 

From 8ce486a781f61941c136efd507a91677f34da713 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 13 Sep 2022 14:40:15 +0530
Subject: [PATCH 1073/1765] lib: utils/fdt: Fix DT parsing in fdt_pmu_setup()

This patch does following fixes in fdt_pmu_setup():
1) If any of the event mapping DT property is absent or too small
   then don't skip parsing of other DT properties.
2) Return failure if sbi_pmu_add_hw_event_counter_map() fails.
3) Return failure if sbi_pmu_add_raw_event_counter_map() fails.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/fdt/fdt_pmu.c | 74 +++++++++++++++++++++++------------------
 1 file changed, 42 insertions(+), 32 deletions(-)

diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 8ba6b08fe74..4829f2127ac 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -75,42 +75,52 @@ int fdt_pmu_setup(void *fdt)
 	if (pmu_offset < 0)
 		return SBI_EFAIL;
 
-	event_ctr_map = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters", &len);
-	if (!event_ctr_map || len < 8)
-		return SBI_EFAIL;
-	len = len / (sizeof(u32) * 3);
-	for (i = 0; i < len; i++) {
-		event_idx_start = fdt32_to_cpu(event_ctr_map[3 * i]);
-		event_idx_end = fdt32_to_cpu(event_ctr_map[3 * i + 1]);
-		ctr_map = fdt32_to_cpu(event_ctr_map[3 * i + 2]);
-		sbi_pmu_add_hw_event_counter_map(event_idx_start, event_idx_end, ctr_map);
+	event_ctr_map = fdt_getprop(fdt, pmu_offset,
+				    "riscv,event-to-mhpmcounters", &len);
+	if (event_ctr_map && len >= 8) {
+		len = len / (sizeof(u32) * 3);
+		for (i = 0; i < len; i++) {
+			event_idx_start = fdt32_to_cpu(event_ctr_map[3 * i]);
+			event_idx_end = fdt32_to_cpu(event_ctr_map[3 * i + 1]);
+			ctr_map = fdt32_to_cpu(event_ctr_map[3 * i + 2]);
+			result = sbi_pmu_add_hw_event_counter_map(
+				event_idx_start, event_idx_end, ctr_map);
+			if (result)
+				return result;
+		}
 	}
 
-	event_val = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmevent", &len);
-	if (!event_val || len < 8)
-		return SBI_EFAIL;
-	len = len / (sizeof(u32) * 3);
-	for (i = 0; i < len; i++) {
-		event = &fdt_pmu_evt_select[hw_event_count];
-		event->eidx = fdt32_to_cpu(event_val[3 * i]);
-		event->select = fdt32_to_cpu(event_val[3 * i + 1]);
-		event->select = (event->select << 32) | fdt32_to_cpu(event_val[3 * i + 2]);
-		hw_event_count++;
+	event_val = fdt_getprop(fdt, pmu_offset,
+				"riscv,event-to-mhpmevent", &len);
+	if (event_val && len >= 8) {
+		len = len / (sizeof(u32) * 3);
+		for (i = 0; i < len; i++) {
+			event = &fdt_pmu_evt_select[hw_event_count];
+			event->eidx = fdt32_to_cpu(event_val[3 * i]);
+			event->select = fdt32_to_cpu(event_val[3 * i + 1]);
+			event->select = (event->select << 32) |
+					fdt32_to_cpu(event_val[3 * i + 2]);
+			hw_event_count++;
+		}
 	}
 
-	event_val = fdt_getprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters", &len);
-	if (!event_val || len < 20)
-		return SBI_EFAIL;
-	len = len / (sizeof(u32) * 5);
-	for (i = 0; i < len; i++) {
-		raw_selector = fdt32_to_cpu(event_val[5 * i]);
-		raw_selector = (raw_selector << 32) | fdt32_to_cpu(event_val[5 * i + 1]);
-		select_mask = fdt32_to_cpu(event_val[5 * i + 2]);
-		select_mask = (select_mask  << 32) | fdt32_to_cpu(event_val[5 * i + 3]);
-		ctr_map = fdt32_to_cpu(event_val[5 * i + 4]);
-		result = sbi_pmu_add_raw_event_counter_map(raw_selector, select_mask, ctr_map);
-		if (!result)
-			hw_event_count++;
+	event_val = fdt_getprop(fdt, pmu_offset,
+				"riscv,raw-event-to-mhpmcounters", &len);
+	if (event_val && len >= 20) {
+		len = len / (sizeof(u32) * 5);
+		for (i = 0; i < len; i++) {
+			raw_selector = fdt32_to_cpu(event_val[5 * i]);
+			raw_selector = (raw_selector << 32) |
+					fdt32_to_cpu(event_val[5 * i + 1]);
+			select_mask = fdt32_to_cpu(event_val[5 * i + 2]);
+			select_mask = (select_mask  << 32) |
+					fdt32_to_cpu(event_val[5 * i + 3]);
+			ctr_map = fdt32_to_cpu(event_val[5 * i + 4]);
+			result = sbi_pmu_add_raw_event_counter_map(
+					raw_selector, select_mask, ctr_map);
+			if (result)
+				return result;
+		}
 	}
 
 	return 0;

From 49372f2691a006d5a8d424b5a90be23539b06067 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Tue, 13 Sep 2022 15:17:08 +0530
Subject: [PATCH 1074/1765] lib: sbi: Fix sbi_strnlen wrong count decrement

count(maxlen) should not be decremented here

Fixes: 1901e8a287bc ("platform: Add minimal libc support.")
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_string.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/sbi/sbi_string.c b/lib/sbi/sbi_string.c
index c163f317650..9ebea693d0f 100644
--- a/lib/sbi/sbi_string.c
+++ b/lib/sbi/sbi_string.c
@@ -59,7 +59,6 @@ size_t sbi_strnlen(const char *str, size_t count)
 	while (*str != '\0' && ret < count) {
 		ret++;
 		str++;
-		count--;
 	}
 
 	return ret;

From 7f09fba86e439808e0b40bdf536937c42e1ea2c9 Mon Sep 17 00:00:00 2001
From: Kautuk Consul <kconsul@ventanamicro.com>
Date: Mon, 12 Sep 2022 16:22:53 +0530
Subject: [PATCH 1075/1765] lib: utils/serial: add semihosting support

We add RISC-V semihosting based serial console for JTAG based early
debugging.

The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/serial/semihosting.h |  47 +++++++
 lib/utils/serial/Kconfig               |   4 +
 lib/utils/serial/objects.mk            |   1 +
 lib/utils/serial/semihosting.c         | 178 +++++++++++++++++++++++++
 platform/generic/configs/defconfig     |   1 +
 platform/generic/platform.c            |  11 +-
 6 files changed, 241 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi_utils/serial/semihosting.h
 create mode 100644 lib/utils/serial/semihosting.c

diff --git a/include/sbi_utils/serial/semihosting.h b/include/sbi_utils/serial/semihosting.h
new file mode 100644
index 00000000000..8cc4a86c3af
--- /dev/null
+++ b/include/sbi_utils/serial/semihosting.h
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ *   Kautuk Consul <kconsul@ventanamicro.com>
+ */
+
+#ifndef __SERIAL_SEMIHOSTING_H__
+#define __SERIAL_SEMIHOSTING_H__
+
+#include <sbi/sbi_types.h>
+
+/**
+ * enum semihosting_open_mode - Numeric file modes for use with semihosting_open()
+ * MODE_READ: 'r'
+ * MODE_BINARY: 'b'
+ * MODE_PLUS: '+'
+ * MODE_WRITE: 'w'
+ * MODE_APPEND: 'a'
+ *
+ * These modes represent the mode string used by fopen(3) in a form which can
+ * be passed to semihosting_open(). These do NOT correspond directly to %O_RDONLY,
+ * %O_CREAT, etc; see fopen(3) for details. In particular, @MODE_PLUS
+ * effectively results in adding %O_RDWR, and @MODE_WRITE will add %O_TRUNC.
+ * For compatibility, @MODE_BINARY should be added when opening non-text files
+ * (such as images).
+ */
+enum semihosting_open_mode {
+	MODE_READ	= 0x0,
+	MODE_BINARY	= 0x1,
+	MODE_PLUS	= 0x2,
+	MODE_WRITE	= 0x4,
+	MODE_APPEND	= 0x8,
+};
+
+#ifdef CONFIG_SERIAL_SEMIHOSTING
+int semihosting_init(void);
+int semihosting_enabled(void);
+#else
+static inline int semihosting_init(void) { return SBI_ENODEV; }
+static inline int semihosting_enabled(void) { return 0; }
+#endif
+
+#endif
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index 6e425f21a1d..da549a768c0 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -79,4 +79,8 @@ config SERIAL_XILINX_UARTLITE
 	bool "Xilinx UART Lite support"
 	default n
 
+config SERIAL_SEMIHOSTING
+	bool "Semihosting support"
+	default n
+
 endmenu
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index efb1d9e5805..98f3f9a8509 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -41,3 +41,4 @@ libsbiutils-objs-$(CONFIG_SERIAL_SIFIVE) += serial/sifive-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_LITEX) += serial/litex-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_UART8250) += serial/uart8250.o
 libsbiutils-objs-$(CONFIG_SERIAL_XILINX_UARTLITE) += serial/xlnx-uartlite.o
+libsbiutils-objs-$(CONFIG_SERIAL_SEMIHOSTING) += serial/semihosting.o
diff --git a/lib/utils/serial/semihosting.c b/lib/utils/serial/semihosting.c
new file mode 100644
index 00000000000..5012fa12b8f
--- /dev/null
+++ b/lib/utils/serial/semihosting.c
@@ -0,0 +1,178 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ *   Kautuk Consul <kconsul@ventanamicro.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/serial/semihosting.h>
+
+#define SYSOPEN     0x01
+#define SYSWRITEC   0x03
+#define SYSREAD     0x06
+#define SYSREADC    0x07
+#define SYSERRNO	0x13
+
+static long semihosting_trap(int sysnum, void *addr)
+{
+	register int ret asm ("a0") = sysnum;
+	register void *param0 asm ("a1") = addr;
+
+	asm volatile (
+		"	.align 4\n"
+		"	.option push\n"
+		"	.option norvc\n"
+
+		"	slli zero, zero, 0x1f\n"
+		"	ebreak\n"
+		"	srai zero, zero, 7\n"
+
+		"	.option pop\n"
+		: "+r" (ret) : "r" (param0) : "memory");
+
+	return ret;
+}
+
+static bool _semihosting_enabled = true;
+static bool try_semihosting = true;
+
+bool semihosting_enabled(void)
+{
+	register int ret asm ("a0") = SYSERRNO;
+	register void *param0 asm ("a1") = NULL;
+	unsigned long tmp = 0;
+
+	if (!try_semihosting)
+		return _semihosting_enabled;
+
+	asm volatile (
+		"	.align 4\n"
+		"	.option push\n"
+		"	.option norvc\n"
+
+		"	j _semihost_test_vector_next\n"
+		"	.align 4\n"
+		"_semihost_test_vector:\n"
+		"	csrr %[en], mepc\n"
+		"	addi %[en], %[en], 4\n"
+		"	csrw mepc, %[en]\n"
+		"	add %[en], zero, zero\n"
+		"	mret\n"
+		"_semihost_test_vector_next:\n"
+
+		"	la %[tmp], _semihost_test_vector\n"
+		"	csrrw %[tmp], mtvec, %[tmp]\n"
+		"	.align 4\n"
+		"	slli zero, zero, 0x1f\n"
+		"	ebreak\n"
+		"	srai zero, zero, 7\n"
+		"	csrw mtvec, %[tmp]\n"
+
+		"	.option pop\n"
+		: [tmp] "+r" (tmp), [en] "+r" (_semihosting_enabled),
+		  [ret] "+r" (ret)
+		: "r" (param0) : "memory");
+
+	try_semihosting = false;
+	return _semihosting_enabled;
+}
+
+static int semihosting_errno(void)
+{
+	long ret = semihosting_trap(SYSERRNO, NULL);
+
+	if (ret > 0)
+		return -ret;
+	return SBI_EIO;
+}
+
+static int semihosting_infd = SBI_ENODEV;
+
+static long semihosting_open(const char *fname, enum semihosting_open_mode mode)
+{
+	long fd;
+	struct semihosting_open_s {
+		const char *fname;
+		unsigned long mode;
+		size_t len;
+	} open;
+
+	open.fname = fname;
+	open.len = sbi_strlen(fname);
+	open.mode = mode;
+
+	/* Open the file on the host */
+	fd = semihosting_trap(SYSOPEN, &open);
+	if (fd == -1)
+		return semihosting_errno();
+	return fd;
+}
+
+/**
+ * struct semihosting_rdwr_s - Arguments for read and write
+ * @fd: A file descriptor returned from semihosting_open()
+ * @memp: Pointer to a buffer of memory of at least @len bytes
+ * @len: The number of bytes to read or write
+ */
+struct semihosting_rdwr_s {
+	long fd;
+	void *memp;
+	size_t len;
+};
+
+static long semihosting_read(long fd, void *memp, size_t len)
+{
+	long ret;
+	struct semihosting_rdwr_s read;
+
+	read.fd = fd;
+	read.memp = memp;
+	read.len = len;
+
+	ret = semihosting_trap(SYSREAD, &read);
+	if (ret < 0)
+		return semihosting_errno();
+	return len - ret;
+}
+
+/* clang-format on */
+
+static void semihosting_putc(char ch)
+{
+	semihosting_trap(SYSWRITEC, &ch);
+}
+
+static int semihosting_getc(void)
+{
+	char ch = 0;
+	int ret;
+
+	if (semihosting_infd < 0)  {
+		ch = semihosting_trap(SYSREADC, NULL);
+		ret = ch > -1 ? ch : -1;
+	} else
+		ret = semihosting_read(semihosting_infd, &ch, 1) > 0 ? ch : -1;
+
+	return ret;
+}
+
+static struct sbi_console_device semihosting_console = {
+	.name = "semihosting",
+	.console_putc = semihosting_putc,
+	.console_getc = semihosting_getc
+};
+
+int semihosting_init(void)
+{
+	semihosting_infd = semihosting_open(":tt", MODE_READ);
+
+	sbi_console_set_device(&semihosting_console);
+
+	return 0;
+}
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index e3241733e17..c95b7fa9c6e 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -28,3 +28,4 @@ CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
+CONFIG_SERIAL_SEMIHOSTING=y
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index cc3620f1d24..bf51aba783a 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -23,6 +23,7 @@
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/serial/semihosting.h>
 
 /* List of platform override modules generated at compile time */
 extern const struct platform_override *platform_override_modules[];
@@ -242,6 +243,14 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
 	return evt_val;
 }
 
+static int generic_console_init(void)
+{
+	if (semihosting_enabled())
+		return semihosting_init();
+	else
+		return fdt_serial_init();
+}
+
 const struct sbi_platform_operations platform_ops = {
 	.nascent_init		= generic_nascent_init,
 	.early_init		= generic_early_init,
@@ -249,7 +258,7 @@ const struct sbi_platform_operations platform_ops = {
 	.early_exit		= generic_early_exit,
 	.final_exit		= generic_final_exit,
 	.domains_init		= generic_domains_init,
-	.console_init		= fdt_serial_init,
+	.console_init		= generic_console_init,
 	.irqchip_init		= fdt_irqchip_init,
 	.irqchip_exit		= fdt_irqchip_exit,
 	.ipi_init		= fdt_ipi_init,

From 7105c189f67028ef73720d7e9816c800ab53dda5 Mon Sep 17 00:00:00 2001
From: "Nylon.Chen" <nylon.chen@sifive.com>
Date: Tue, 27 Sep 2022 15:34:09 +0800
Subject: [PATCH 1076/1765] docs/firmware: Update FW_JUMP documentation

Add a tip for OpenSBI's FW_JUMP which helps
users avoid overwriting the kernel.

Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw_jump.md | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 35a4301e3ab..956897e7e7c 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -41,6 +41,22 @@ follows:
   provided, then the OpenSBI firmware will pass the FDT address passed by the
   previous booting stage to the next booting stage.
 
+  When using the default *FW_JUMP_FDT_ADDR* with *PLATFORM=generic*, you must
+  ensure *FW_JUMP_FDT_ADDR* is set high enough to avoid overwriting the kernel.
+  You can use the following method.
+
+  ```
+  ${CROSS_COMPILE}objdump -h $KERNEL_ELF | sort -k 5,5 | awk -n '/^ +[0-9]+ /\
+  {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}' \
+  | (( `tail -1` > 0x2200000 )) && echo fdt overlaps kernel,\
+  increase FW_JUMP_FDT_ADDR
+
+  ${LLVM}objdump -h --show-lma $KERNEL_ELF | sort -k 5,5 | \
+  awk -n '/^ +[0-9]+ / {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}'\
+  | (( `tail -1` > 0x2200000 )) && echo fdt overlaps kernel,\
+  increase FW_JUMP_FDT_ADDR
+  ```
+
 *FW_JUMP* Example
 -----------------
 

From 3f3d401d2dfbed232d77012ba9289b62e98ad519 Mon Sep 17 00:00:00 2001
From: zhangdongdong <zhangdongdong@eswincomputing.com>
Date: Wed, 28 Sep 2022 10:35:30 +0800
Subject: [PATCH 1077/1765] docs: Fix some typos

We fix few typos in documentation.

Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md        |  6 +++---
 docs/library_usage.md         |  2 +-
 docs/platform_requirements.md |  2 +-
 docs/pmu_support.md           | 10 +++++-----
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 73931f1da70..8963b57e378 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -2,7 +2,7 @@ OpenSBI Domain Support
 ======================
 
 An OpenSBI domain is a system-level partition (subset) of underlying hardware
-having it's own memory regions (RAM and MMIO devices) and HARTs. The OpenSBI
+having its own memory regions (RAM and MMIO devices) and HARTs. The OpenSBI
 will try to achieve secure isolation between domains using RISC-V platform
 features such as PMP, ePMP, IOPMP, SiFive Shield, etc.
 
@@ -15,7 +15,7 @@ Important entities which help implement OpenSBI domain support are:
 Each HART of a RISC-V platform must have an OpenSBI domain assigned to it.
 The OpenSBI platform support is responsible for populating domains and
 providing HART id to domain mapping. The OpenSBI domain support will by
-default assign **the ROOT domain** to all HARTs of a RISC-V platform so
+default assign **the ROOT domain** to all HARTs of a RISC-V platform, so
 it is not mandatory for the OpenSBI platform support to populate domains.
 
 Domain Memory Region
@@ -29,7 +29,7 @@ OpenSBI and has following details:
 * **base** - The base address of a memory region is **2 ^ order**
   aligned start address
 * **flags** - The flags of a memory region represent memory type (i.e.
-  RAM or MMIO) and allowed accesses (i.e. READ, WRITE, EXECUTE, etc)
+  RAM or MMIO) and allowed accesses (i.e. READ, WRITE, EXECUTE, etc.)
 
 Domain Instance
 ---------------
diff --git a/docs/library_usage.md b/docs/library_usage.md
index d5d2ba92515..bb64bc40d8d 100644
--- a/docs/library_usage.md
+++ b/docs/library_usage.md
@@ -73,7 +73,7 @@ firmware drivers based on the external firmware architecture.
 **OPENSBI_EXTERNAL_SBI_TYPES** identifier is introduced to *sbi_types.h* for selecting
 external header file during the build preprocess in order to define OpensSBI data types
 based on external firmware data type binding.
-For example, *bool* is declared as *int* in sbi_types.h. However in EDK2 build system,
+For example, *bool* is declared as *int* in sbi_types.h. However, in EDK2 build system,
 *bool* is declared as *BOOLEAN* which is defined as *unsigned char* data type.
 
 External firmware can define **OPENSBI_EXTERNAL_SBI_TYPES** in CFLAGS and specify it to the
diff --git a/docs/platform_requirements.md b/docs/platform_requirements.md
index 68dc3935a96..8735adba2a8 100644
--- a/docs/platform_requirements.md
+++ b/docs/platform_requirements.md
@@ -10,7 +10,7 @@ To handle this, we have two types of RISC-V platform requirements:
 2. **Release specific platform requirements** which apply to a OpenSBI
    release and later releases
 
-Currently, we don't have any **Release specific platform requirements**
+Currently, we don't have any **Release specific platform requirements**,
 but such platform requirements will be added in future.
 
 Base Platform Requirements
diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index d79b515e73d..1db36fcd8e3 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -1,7 +1,7 @@
 OpenSBI SBI PMU extension support
 ==================================
 SBI PMU extension supports allow supervisor software to configure/start/stop
-any performance counter at anytime. Thus, an user can leverage full
+any performance counter at anytime. Thus, a user can leverage full
 capability of performance analysis tools such as perf if SBI PMU extension is
 enabled. The OpenSBI implementation makes the following assumptions about the
 hardware platform.
@@ -25,7 +25,7 @@ SBI PMU Device Tree Bindings
 ----------------------------
 
 Platforms may choose to describe PMU event selector and event to counter mapping
-values via device tree. The following sections describes the PMU DT node
+values via device tree. The following sections describe the PMU DT node
 bindings in details.
 
 * **compatible** (Mandatory) - The compatible string of SBI PMU device tree node.
@@ -42,7 +42,7 @@ This property shouldn't encode any raw hardware event.
 * **riscv,event-to-mhpmcounters**(Optional) - It represents a MANY-to-MANY
 mapping between a range of events and all the MHPMCOUNTERx in a bitmap format
 that can be used to monitor these range of events. The information is encoded in
-a table format where each row represent a certain range of events and
+a table format where each row represents a certain range of events and
 corresponding counters. The first column represents starting of the pmu event id
 and 2nd column represents the end of the pmu event id. The third column
 represent a bitmap of all the MHPMCOUNTERx. This property is mandatory if
@@ -53,10 +53,10 @@ shouldn't encode any raw event.
 or MANY-to-MANY mapping between the raw event(s) and all the MHPMCOUNTERx in
 a bitmap format that can be used to monitor that raw event. The encoding of the
 raw events are platform specific. The information is encoded in a table format
-where each row represent the specific raw event(s). The first column is a 64bit
+where each row represents the specific raw event(s). The first column is a 64bit
 match value where the invariant bits of range of events are set. The second
 column is a 64 bit mask that will have all the variant bits of the range of
-events cleared. Every other bits should be set in the mask.
+events cleared. All other bits should be set in the mask.
 The third column is a 32bit value to represent bitmap of all MHPMCOUNTERx that
 can monitor these set of event(s).
 If a platform directly encodes each raw PMU event as a unique ID, the value of

From e54cb3298bfcaa2ac56fe51d0f39c901d5397166 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Tue, 4 Oct 2022 18:42:23 +0200
Subject: [PATCH 1078/1765] lib: sbi_pmu: move pmu irq information into pmu
 itself

Don't spread checking for pmu extensions through the code
but instead introduce a sbi-pmu function that other code can
call to get the correct information about the existence of the
pmu interrupt.

Add a sbi_pmu_device override function to allow overridung this
bit as well if needed.

Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 include/sbi/sbi_pmu.h |  8 ++++++++
 lib/sbi/sbi_hart.c    |  4 ++--
 lib/sbi/sbi_pmu.c     | 12 ++++++++++++
 3 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index a2ce42da7c1..c36524393bc 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -73,6 +73,11 @@ struct sbi_pmu_device {
 	 * Note: 0 <= counter_index < SBI_PMU_HW_CTR_MAX
 	 */
 	void (*hw_counter_disable_irq)(uint32_t counter_index);
+
+	/**
+	 * Custom function returning the machine-specific irq-bit.
+	 */
+	int (*hw_counter_irq_bit)(void);
 };
 
 /** Get the PMU platform device */
@@ -87,6 +92,9 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot);
 /** Reset PMU during hart exit */
 void sbi_pmu_exit(struct sbi_scratch *scratch);
 
+/** Return the pmu irq bit depending on extension existence */
+int sbi_pmu_irq_bit(void);
+
 /**
  * Add the hardware event to counter mapping information. This should be called
  * from the platform code to update the mapping table.
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 129486847a8..447f99e4d80 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -19,6 +19,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_trap.h>
 
@@ -208,8 +209,7 @@ static int delegate_traps(struct sbi_scratch *scratch)
 
 	/* Send M-mode interrupts and most exceptions to S-mode */
 	interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
-	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
-		interrupts |= MIP_LCOFIP;
+	interrupts |= sbi_pmu_irq_bit();
 
 	exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_BREAKPOINT) |
 		     (1U << CAUSE_USER_ECALL);
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 214d5e8a686..91d9ccc332b 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -344,6 +344,18 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	return 0;
 }
 
+int sbi_pmu_irq_bit(void)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
+		return MIP_LCOFIP;
+	if (pmu_dev && pmu_dev->hw_counter_irq_bit)
+		return pmu_dev->hw_counter_irq_bit();
+
+	return 0;
+}
+
 static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 			    uint64_t ival, bool ival_update)
 {

From c316fa38c264a1c01f178621e79a8c451f5f5a46 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Tue, 4 Oct 2022 18:42:24 +0200
Subject: [PATCH 1079/1765] lib: sbi_hart: move hart_features struct to a
 public location

Platforms may need to override auto-detected hart features
in their override functions. So move the hart_features
struct to the sbi_hart.h header allowing us to pass it over
to platform-handlers.

Suggested-by: Atish Patra <atishp@atishpatra.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 include/sbi/sbi_hart.h | 11 +++++++++++
 lib/sbi/sbi_hart.c     | 36 +++++++++++++-----------------------
 2 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 0032364017e..95b40e75933 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -41,6 +41,17 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_MAX,
 };
 
+struct sbi_hart_features {
+	bool detected;
+	int priv_version;
+	unsigned long extensions;
+	unsigned int pmp_count;
+	unsigned int pmp_addr_bits;
+	unsigned long pmp_gran;
+	unsigned int mhpm_count;
+	unsigned int mhpm_bits;
+};
+
 struct sbi_scratch;
 
 int sbi_hart_reinit(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 447f99e4d80..d0a62951ce1 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -28,16 +28,6 @@ extern void __sbi_expected_trap_hext(void);
 
 void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
 
-struct hart_features {
-	bool detected;
-	int priv_version;
-	unsigned long extensions;
-	unsigned int pmp_count;
-	unsigned int pmp_addr_bits;
-	unsigned long pmp_gran;
-	unsigned int mhpm_count;
-	unsigned int mhpm_bits;
-};
 static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch)
@@ -254,7 +244,7 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->mhpm_count;
@@ -262,7 +252,7 @@ unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)
 
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->pmp_count;
@@ -270,7 +260,7 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 
 unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->pmp_gran;
@@ -278,7 +268,7 @@ unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch)
 
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->pmp_addr_bits;
@@ -286,7 +276,7 @@ unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch)
 
 unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->mhpm_bits;
@@ -336,7 +326,7 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 
 int sbi_hart_priv_version(struct sbi_scratch *scratch)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	return hfeatures->priv_version;
@@ -346,7 +336,7 @@ void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 				   char *version_str, int nvstr)
 {
 	char *temp;
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	switch (hfeatures->priv_version) {
@@ -368,7 +358,7 @@ void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 }
 
 static inline void __sbi_hart_update_extension(
-					struct hart_features *hfeatures,
+					struct sbi_hart_features *hfeatures,
 					enum sbi_hart_extensions ext,
 					bool enable)
 {
@@ -389,7 +379,7 @@ void sbi_hart_update_extension(struct sbi_scratch *scratch,
 			       enum sbi_hart_extensions ext,
 			       bool enable)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	__sbi_hart_update_extension(hfeatures, ext, enable);
@@ -405,7 +395,7 @@ void sbi_hart_update_extension(struct sbi_scratch *scratch,
 bool sbi_hart_has_extension(struct sbi_scratch *scratch,
 			    enum sbi_hart_extensions ext)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
 	if (hfeatures->extensions & BIT(ext))
@@ -453,7 +443,7 @@ static inline char *sbi_hart_extension_id2string(int ext)
 void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
 				 char *extensions_str, int nestr)
 {
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	int offset = 0, ext = 0;
 	char *temp;
@@ -539,7 +529,7 @@ static int hart_pmu_get_allowed_bits(void)
 static int hart_detect_features(struct sbi_scratch *scratch)
 {
 	struct sbi_trap_info trap = {0};
-	struct hart_features *hfeatures =
+	struct sbi_hart_features *hfeatures =
 		sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	unsigned long val, oldval;
 	int rc;
@@ -718,7 +708,7 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;
 
 		hart_features_offset = sbi_scratch_alloc_offset(
-						sizeof(struct hart_features));
+					sizeof(struct sbi_hart_features));
 		if (!hart_features_offset)
 			return SBI_ENOMEM;
 	}

From 4f2acb53e21af805e499f7f594a931af9b0623fd Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Tue, 4 Oct 2022 18:42:25 +0200
Subject: [PATCH 1080/1765] lib: sbi_platform: expose hart_features to
 extension_init callback

The platform-specific extension_init callback is supposed to
set specific things for the platform opensbi is running on.

So it's also the right place to override specific hart_features
if needed - when it's know that autodetection has provided
wrong results for example.

Suggested-by: Atish Patra <atishp@atishpatra.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 include/sbi/sbi_platform.h | 8 +++++---
 lib/sbi/sbi_hart.c         | 3 ++-
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 87024dbd30b..722f27a1a32 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -48,6 +48,7 @@
 struct sbi_domain_memregion;
 struct sbi_trap_info;
 struct sbi_trap_regs;
+struct sbi_hart_features;
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
@@ -90,7 +91,7 @@ struct sbi_platform_operations {
 	int (*misa_get_xlen)(void);
 
 	/** Initialize (or populate) HART extensions for the platform */
-	int (*extensions_init)(void);
+	int (*extensions_init)(struct sbi_hart_features *hfeatures);
 
 	/** Initialize (or populate) domains for the platform */
 	int (*domains_init)(void);
@@ -464,10 +465,11 @@ static inline int sbi_platform_misa_xlen(const struct sbi_platform *plat)
  * @return 0 on success and negative error code on failure
  */
 static inline int sbi_platform_extensions_init(
-					const struct sbi_platform *plat)
+					const struct sbi_platform *plat,
+					struct sbi_hart_features *hfeatures)
 {
 	if (plat && sbi_platform_ops(plat)->extensions_init)
-		return sbi_platform_ops(plat)->extensions_init();
+		return sbi_platform_ops(plat)->extensions_init(hfeatures);
 	return 0;
 }
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d0a62951ce1..dacab1a0940 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -672,7 +672,8 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	}
 
 	/* Let platform populate extensions */
-	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr());
+	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr(),
+					  hfeatures);
 	if (rc)
 		return rc;
 

From 2f63f2465c42c64559e4f7b9d0183c2b47472019 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Tue, 4 Oct 2022 18:42:26 +0200
Subject: [PATCH 1081/1765] platform: generic: add extensions_init handler and
 platform-override

Init of non-standard extensions is a platform-specific thing,
so allow generic platforms to do this via a platform-override.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 platform/generic/include/platform_override.h |  3 +++
 platform/generic/platform.c                  | 10 ++++++++++
 2 files changed, 13 insertions(+)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index e55da2517e6..7f1558dde1a 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -10,6 +10,7 @@
 #ifndef __PLATFORM_OVERRIDE_H__
 #define __PLATFORM_OVERRIDE_H__
 
+#include <sbi/sbi_hart.h>
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_trap.h>
 
@@ -22,6 +23,8 @@ struct platform_override {
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+	int (*extensions_init)(const struct fdt_match *match,
+			       struct sbi_hart_features *hfeatures);
 	int (*vendor_ext_check)(long extid, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long extid, long funcid,
 				   const struct sbi_trap_regs *regs,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index bf51aba783a..595b0fdb0a9 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -204,6 +204,15 @@ static void generic_final_exit(void)
 		generic_plat->final_exit(generic_plat_match);
 }
 
+static int generic_extensions_init(struct sbi_hart_features *hfeatures)
+{
+	if (generic_plat && generic_plat->extensions_init)
+		return generic_plat->extensions_init(generic_plat_match,
+						     hfeatures);
+
+	return 0;
+}
+
 static int generic_domains_init(void)
 {
 	return fdt_domains_populate(fdt_get_address());
@@ -257,6 +266,7 @@ const struct sbi_platform_operations platform_ops = {
 	.final_init		= generic_final_init,
 	.early_exit		= generic_early_exit,
 	.final_exit		= generic_final_exit,
+	.extensions_init	= generic_extensions_init,
 	.domains_init		= generic_domains_init,
 	.console_init		= generic_console_init,
 	.irqchip_init		= fdt_irqchip_init,

From b6e520b2a836cd7cc8dc99c25a21a470e8589888 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko@sntech.de>
Date: Tue, 4 Oct 2022 18:42:27 +0200
Subject: [PATCH 1082/1765] platform: generic: allwinner: add support for c9xx
 pmu

With the T-HEAD C9XX cores being designed before or during ratification
of the SSCOFPMF extension, they implement a PMU extension that behaves
very similar but not equal to it by providing overflow interrupts though
in a slightly different registers format.

The sun20i-d1 is using this core. So implement the necessary overrides
to allow its pmu to be used via the standard sbi-pmu extension.

For now it's also the only soc using this core, so keep the additional
code in the d1-space for now.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 platform/generic/allwinner/sun20i-d1.c |  60 ++++++++++++
 platform/generic/include/thead_c9xx.h  | 127 +++++++++++++++++++++++++
 2 files changed, 187 insertions(+)
 create mode 100644 platform/generic/include/thead_c9xx.h

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 5b2656c7612..6a502e5d886 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -5,11 +5,13 @@
  */
 
 #include <platform_override.h>
+#include <thead_c9xx.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
+#include <sbi/sbi_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip_plic.h>
 
@@ -199,6 +201,63 @@ static int sun20i_d1_final_init(bool cold_boot, const struct fdt_match *match)
 	return 0;
 }
 
+#include <sbi/sbi_console.h>
+
+static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
+{
+	unsigned long mip_val;
+
+	if (ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return;
+
+	mip_val = csr_read(CSR_MIP);
+	/**
+	 * Clear out the OF bit so that next interrupt can be enabled.
+	 * This should be done only when the corresponding overflow interrupt
+	 * bit is cleared. That indicates that software has already handled the
+	 * previous interrupts or the hardware yet to set an overflow interrupt.
+	 * Otherwise, there will be race conditions where we may clear the bit
+	 * the software is yet to handle the interrupt.
+	 */
+	if (!(mip_val & THEAD_C9XX_MIP_MOIP))
+		csr_clear(THEAD_C9XX_CSR_MCOUNTEROF, BIT(ctr_idx));
+
+	/**
+	 * SSCOFPMF uses the OF bit for enabling/disabling the interrupt,
+	 * while the C9XX has designated enable bits.
+	 * So enable per-counter interrupt on C9xx here.
+	 */
+	csr_set(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static void thead_c9xx_pmu_ctr_disable_irq(uint32_t ctr_idx)
+{
+	csr_clear(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static int thead_c9xx_pmu_irq_bit(void)
+{
+	return THEAD_C9XX_MIP_MOIP;
+}
+
+const struct sbi_pmu_device thead_c9xx_pmu_device = {
+	.hw_counter_enable_irq = thead_c9xx_pmu_ctr_enable_irq,
+	.hw_counter_disable_irq = thead_c9xx_pmu_ctr_disable_irq,
+	.hw_counter_irq_bit = thead_c9xx_pmu_irq_bit,
+};
+
+static int sun20i_d1_extensions_init(const struct fdt_match *match,
+				     struct sbi_hart_features *hfeatures)
+{
+	sbi_pmu_set_device(&thead_c9xx_pmu_device);
+
+	/* auto-detection doesn't work on t-head c9xx cores */
+	hfeatures->mhpm_count = 29;
+	hfeatures->mhpm_bits = 64;
+
+	return 0;
+}
+
 static const struct fdt_match sun20i_d1_match[] = {
 	{ .compatible = "allwinner,sun20i-d1" },
 	{ },
@@ -207,4 +266,5 @@ static const struct fdt_match sun20i_d1_match[] = {
 const struct platform_override sun20i_d1 = {
 	.match_table	= sun20i_d1_match,
 	.final_init	= sun20i_d1_final_init,
+	.extensions_init = sun20i_d1_extensions_init,
 };
diff --git a/platform/generic/include/thead_c9xx.h b/platform/generic/include/thead_c9xx.h
new file mode 100644
index 00000000000..bab04082364
--- /dev/null
+++ b/platform/generic/include/thead_c9xx.h
@@ -0,0 +1,127 @@
+#ifndef __RISCV_THEAD_C9XX_H____
+#define __RISCV_THEAD_C9XX_H____
+
+/* T-HEAD C9xx M mode CSR.  */
+#define THEAD_C9XX_CSR_MXSTATUS		0x7c0
+#define THEAD_C9XX_CSR_MHCR		0x7c1
+#define THEAD_C9XX_CSR_MCOR		0x7c2
+#define THEAD_C9XX_CSR_MCCR2		0x7c3
+#define THEAD_C9XX_CSR_MCER2		0x7c4
+#define THEAD_C9XX_CSR_MHINT		0x7c5
+#define THEAD_C9XX_CSR_MRMR		0x7c6
+#define THEAD_C9XX_CSR_MRVBR		0x7c7
+#define THEAD_C9XX_CSR_MCER		0x7c8
+#define THEAD_C9XX_CSR_MCOUNTERWEN	0x7c9
+#define THEAD_C9XX_CSR_MCOUNTERINTEN	0x7ca
+#define THEAD_C9XX_CSR_MCOUNTEROF	0x7cb
+#define THEAD_C9XX_CSR_MHINT2		0x7cc
+#define THEAD_C9XX_CSR_MHINT3		0x7cd
+#define THEAD_C9XX_CSR_MRADDR		0x7e0
+#define THEAD_C9XX_CSR_MEXSTATUS	0x7e1
+#define THEAD_C9XX_CSR_MNMICAUSE	0x7e2
+#define THEAD_C9XX_CSR_MNMIPC		0x7e3
+#define THEAD_C9XX_CSR_MHPMCR		0x7f0
+#define THEAD_C9XX_CSR_MHPMSR		0x7f1
+#define THEAD_C9XX_CSR_MHPMER		0x7f2
+#define THEAD_C9XX_CSR_MSMPR		0x7f3
+#define THEAD_C9XX_CSR_MTEECFG		0x7f4
+#define THEAD_C9XX_CSR_MZONEID		0x7f5
+#define THEAD_C9XX_CSR_ML2CPID		0x7f6
+#define THEAD_C9XX_CSR_ML2WP		0x7f7
+#define THEAD_C9XX_CSR_MDTCMCR		0x7f8
+#define THEAD_C9XX_CSR_USP		0x7d1
+#define THEAD_C9XX_CSR_MCINS		0x7d2
+#define THEAD_C9XX_CSR_MCINDEX		0x7d3
+#define THEAD_C9XX_CSR_MCDATA0		0x7d4
+#define THEAD_C9XX_CSR_MCDATA1		0x7d5
+#define THEAD_C9XX_CSR_MEICR		0x7d6
+#define THEAD_C9XX_CSR_MEICR2		0x7d7
+#define THEAD_C9XX_CSR_MBEADDR		0x7d8
+#define THEAD_C9XX_CSR_MCPUID		0xfc0
+#define THEAD_C9XX_CSR_MAPBADDR		0xfc1
+#define THEAD_C9XX_CSR_MWMSR		0xfc2
+#define THEAD_C9XX_CSR_MHALTCAUSE	0xfe0
+#define THEAD_C9XX_CSR_MDBGINFO		0xfe1
+#define THEAD_C9XX_CSR_MPCFIFO		0xfe2
+
+/* T-HEAD C9xx S mode CSR.  */
+#define THEAD_C9XX_CSR_SXSTATUS		0x5c0
+#define THEAD_C9XX_CSR_SHCR		0x5c1
+#define THEAD_C9XX_CSR_SCER2		0x5c2
+#define THEAD_C9XX_CSR_SCER		0x5c3
+#define THEAD_C9XX_CSR_SCOUNTERINTEN	0x5c4
+#define THEAD_C9XX_CSR_SCOUNTEROF	0x5c5
+#define THEAD_C9XX_CSR_SHINT		0x5c6
+#define THEAD_C9XX_CSR_SHINT2		0x5c7
+#define THEAD_C9XX_CSR_SHPMINHIBIT	0x5c8
+#define THEAD_C9XX_CSR_SHPMCR		0x5c9
+#define THEAD_C9XX_CSR_SHPMSR		0x5ca
+#define THEAD_C9XX_CSR_SHPMER		0x5cb
+#define THEAD_C9XX_CSR_SL2CPID		0x5cc
+#define THEAD_C9XX_CSR_SL2WP		0x5cd
+#define THEAD_C9XX_CSR_SBEADDR		0x5d0
+#define THEAD_C9XX_CSR_SCYCLE		0x5e0
+#define THEAD_C9XX_CSR_SHPMCOUNTER1	0x5e1
+#define THEAD_C9XX_CSR_SHPMCOUNTER2	0x5e2
+#define THEAD_C9XX_CSR_SHPMCOUNTER3	0x5e3
+#define THEAD_C9XX_CSR_SHPMCOUNTER4	0x5e4
+#define THEAD_C9XX_CSR_SHPMCOUNTER5	0x5e5
+#define THEAD_C9XX_CSR_SHPMCOUNTER6	0x5e6
+#define THEAD_C9XX_CSR_SHPMCOUNTER7	0x5e7
+#define THEAD_C9XX_CSR_SHPMCOUNTER8	0x5e8
+#define THEAD_C9XX_CSR_SHPMCOUNTER9	0x5e9
+#define THEAD_C9XX_CSR_SHPMCOUNTER10	0x5ea
+#define THEAD_C9XX_CSR_SHPMCOUNTER11	0x5eb
+#define THEAD_C9XX_CSR_SHPMCOUNTER12	0x5ec
+#define THEAD_C9XX_CSR_SHPMCOUNTER13	0x5ed
+#define THEAD_C9XX_CSR_SHPMCOUNTER14	0x5ee
+#define THEAD_C9XX_CSR_SHPMCOUNTER15	0x5ef
+#define THEAD_C9XX_CSR_SHPMCOUNTER16	0x5f0
+#define THEAD_C9XX_CSR_SHPMCOUNTER17	0x5f1
+#define THEAD_C9XX_CSR_SHPMCOUNTER18	0x5f2
+#define THEAD_C9XX_CSR_SHPMCOUNTER19	0x5f3
+#define THEAD_C9XX_CSR_SHPMCOUNTER20	0x5f4
+#define THEAD_C9XX_CSR_SHPMCOUNTER21	0x5f5
+#define THEAD_C9XX_CSR_SHPMCOUNTER22	0x5f6
+#define THEAD_C9XX_CSR_SHPMCOUNTER23	0x5f7
+#define THEAD_C9XX_CSR_SHPMCOUNTER24	0x5f8
+#define THEAD_C9XX_CSR_SHPMCOUNTER25	0x5f9
+#define THEAD_C9XX_CSR_SHPMCOUNTER26	0x5fa
+#define THEAD_C9XX_CSR_SHPMCOUNTER27	0x5fb
+#define THEAD_C9XX_CSR_SHPMCOUNTER28	0x5fc
+#define THEAD_C9XX_CSR_SHPMCOUNTER29	0x5fd
+#define THEAD_C9XX_CSR_SHPMCOUNTER30	0x5fe
+#define THEAD_C9XX_CSR_SHPMCOUNTER31	0x5ff
+
+/* T-HEAD C9xx U mode CSR.  */
+#define THEAD_C9XX_CSR_FXCR		0x800
+
+/* T-HEAD C9xx MMU extentions.  */
+#define THEAD_C9XX_CSR_SMIR		0x9c0
+#define THEAD_C9XX_CSR_SMEL		0x9c1
+#define THEAD_C9XX_CSR_SMEH		0x9c2
+#define THEAD_C9XX_CSR_SMCIR		0x9c3
+
+/* T-HEAD C9xx Security CSR(May be droped).  */
+#define THEAD_C9XX_CSR_MEBR		0xbe0
+#define THEAD_C9XX_CSR_NT_MSTATUS	0xbe1
+#define THEAD_C9XX_CSR_NT_MIE		0xbe2
+#define THEAD_C9XX_CSR_NT_MTVEC		0xbe3
+#define THEAD_C9XX_CSR_NT_MTVT		0xbe4
+#define THEAD_C9XX_CSR_NT_MEPC		0xbe5
+#define THEAD_C9XX_CSR_NT_MCAUSE	0xbe6
+#define THEAD_C9XX_CSR_NT_MIP		0xbe7
+#define THEAD_C9XX_CSR_NT_MINTSTATE	0xbe8
+#define THEAD_C9XX_CSR_NT_MXSTATUS	0xbe9
+#define THEAD_C9XX_CSR_NT_MEBR		0xbea
+#define THEAD_C9XX_CSR_NT_MSP		0xbeb
+#define THEAD_C9XX_CSR_T_USP		0xbec
+#define THEAD_C9XX_CSR_T_MDCR		0xbed
+#define THEAD_C9XX_CSR_T_MPCR		0xbee
+#define THEAD_C9XX_CSR_PMPTEECFG	0xbef
+
+/* T-HEAD C9xx MIP CSR extension */
+#define THEAD_C9XX_IRQ_PMU_OVF		17
+#define THEAD_C9XX_MIP_MOIP		(_UL(1) << THEAD_C9XX_IRQ_PMU_OVF)
+
+#endif

From 98aa12738df6867d8cc35490e32da7e17de06e1a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:39 +0800
Subject: [PATCH 1083/1765] include: sbi: Fix typo in comment

%s/Priviledge/Privilege

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 2f6f0a13ac8..40a3bc93c6d 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -57,7 +57,7 @@ struct sbi_scratch {
 	unsigned long next_arg1;
 	/** Address of next booting stage for this HART */
 	unsigned long next_addr;
-	/** Priviledge mode of next booting stage for this HART */
+	/** Privilege mode of next booting stage for this HART */
 	unsigned long next_mode;
 	/** Warm boot entry point address for this HART */
 	unsigned long warmboot_addr;

From 11d14ae7f2a6fb8974f05adc9113cfd0b2ec7646 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:40 +0800
Subject: [PATCH 1084/1765] lib: sbi: Fix typo in comment

%s/is is/is

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_expected_trap.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_expected_trap.S b/lib/sbi/sbi_expected_trap.S
index a5ef26a3f8a..1f2d6b97d09 100644
--- a/lib/sbi/sbi_expected_trap.S
+++ b/lib/sbi/sbi_expected_trap.S
@@ -11,7 +11,7 @@
 #include <sbi/sbi_trap.h>
 
 	/*
-	 * We assume that faulting instruction is is 4-byte long and blindly
+	 * We assume that faulting instruction is 4-byte long and blindly
 	 * increment SEPC by 4.
 	 *
 	 * The trap info will be saved as follows:

From 60b78fee9225155ac6e9d4733bf3dc0f7a8a9933 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:41 +0800
Subject: [PATCH 1085/1765] include: sbi: Fix grammar in comment

Fix minor grammar issue in function description.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index b90f59c709c..00662a1654f 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -175,7 +175,7 @@ int sbi_domain_register(struct sbi_domain *dom,
  * @param reg pointer to the memory region to be added
  *
  * @return 0 on success
- * @return SBI_EALREADY if memory region conflicts with existing
+ * @return SBI_EALREADY if memory region conflicts with the existing one
  * @return SBI_EINVAL otherwise
  */
 int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);

From dcdaf3027489cadd513767eda6dcaa0c1ecd2d29 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:42 +0800
Subject: [PATCH 1086/1765] lib: sbi: Add sbi_domain_root_add_memrange() API

This patch generalizes the logic to add a memory range with desired
alignment and flags of consecutive regions to the root domain.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h                | 14 +++++++
 include/sbi_utils/timer/aclint_mtimer.h |  2 +
 lib/sbi/sbi_domain.c                    | 27 +++++++++++++
 lib/utils/timer/aclint_mtimer.c         | 50 +++++++------------------
 4 files changed, 57 insertions(+), 36 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 00662a1654f..5553d214e73 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -180,6 +180,20 @@ int sbi_domain_register(struct sbi_domain *dom,
  */
 int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
 
+/**
+ * Add a memory range with its flags to the root domain
+ * @param addr start physical address of memory range
+ * @param size physical size of memory range
+ * @param align alignment of memory region
+ * @param region_flags memory range flags
+ *
+ * @return 0 on success
+ * @return SBI_EALREADY if memory region conflicts with the existing one
+ * @return SBI_EINVAL otherwise
+ */
+int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
+			   unsigned long align, unsigned long region_flags);
+
 /** Finalize domain tables and startup non-root domains */
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
 
diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
index f02cc62de79..6ab8799c9bf 100644
--- a/include/sbi_utils/timer/aclint_mtimer.h
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -22,6 +22,8 @@
 
 #define CLINT_MTIMER_OFFSET		0x4000
 
+#define MTIMER_REGION_ALIGN		0x1000
+
 struct aclint_mtimer_data {
 	/* Public details */
 	unsigned long mtime_freq;
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4e4c1e1a401..f24a8e5ecaa 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -522,6 +522,33 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	return 0;
 }
 
+int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
+			   unsigned long align, unsigned long region_flags)
+{
+	int rc;
+	unsigned long pos, end, rsize;
+	struct sbi_domain_memregion reg;
+
+	pos = addr;
+	end = addr + size;
+	while (pos < end) {
+		rsize = pos & (align - 1);
+		if (rsize)
+			rsize = 1UL << sbi_ffs(pos);
+		else
+			rsize = ((end - pos) < align) ?
+				(end - pos) : align;
+
+		sbi_domain_memregion_init(pos, rsize, region_flags, &reg);
+		rc = sbi_domain_root_add_memregion(&reg);
+		if (rc)
+			return rc;
+		pos += rsize;
+	}
+
+	return 0;
+}
+
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index a957b1caa32..3f00c218c3d 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -142,34 +142,6 @@ int aclint_mtimer_warm_init(void)
 	return 0;
 }
 
-static int aclint_mtimer_add_regions(unsigned long addr, unsigned long size)
-{
-#define MTIMER_ADD_REGION_ALIGN		0x1000
-	int rc;
-	unsigned long pos, end, rsize;
-	struct sbi_domain_memregion reg;
-
-	pos = addr;
-	end = addr + size;
-	while (pos < end) {
-		rsize = pos & (MTIMER_ADD_REGION_ALIGN - 1);
-		if (rsize)
-			rsize = 1UL << sbi_ffs(pos);
-		else
-			rsize = ((end - pos) < MTIMER_ADD_REGION_ALIGN) ?
-				(end - pos) : MTIMER_ADD_REGION_ALIGN;
-
-		sbi_domain_memregion_init(pos, rsize,
-					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
-		if (rc)
-			return rc;
-		pos += rsize;
-	}
-
-	return 0;
-}
-
 int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 			    struct aclint_mtimer_data *reference)
 {
@@ -208,23 +180,29 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 
 	/* Add MTIMER regions to the root domain */
 	if (mt->mtime_addr == (mt->mtimecmp_addr + mt->mtimecmp_size)) {
-		rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
-					mt->mtime_size + mt->mtimecmp_size);
+		rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
+					mt->mtime_size + mt->mtimecmp_size,
+					MTIMER_REGION_ALIGN,
+					SBI_DOMAIN_MEMREGION_MMIO);
 		if (rc)
 			return rc;
 	} else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) {
-		rc = aclint_mtimer_add_regions(mt->mtime_addr,
-					mt->mtime_size + mt->mtimecmp_size);
+		rc = sbi_domain_root_add_memrange(mt->mtime_addr,
+					mt->mtime_size + mt->mtimecmp_size,
+					MTIMER_REGION_ALIGN,
+					SBI_DOMAIN_MEMREGION_MMIO);
 		if (rc)
 			return rc;
 	} else {
-		rc = aclint_mtimer_add_regions(mt->mtime_addr,
-						mt->mtime_size);
+		rc = sbi_domain_root_add_memrange(mt->mtime_addr,
+						mt->mtime_size, MTIMER_REGION_ALIGN,
+						SBI_DOMAIN_MEMREGION_MMIO);
 		if (rc)
 			return rc;
 
-		rc = aclint_mtimer_add_regions(mt->mtimecmp_addr,
-						mt->mtimecmp_size);
+		rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
+						mt->mtimecmp_size, MTIMER_REGION_ALIGN,
+						SBI_DOMAIN_MEMREGION_MMIO);
 		if (rc)
 			return rc;
 	}

From bd7ef4139829da5c30fa980f7498d385124408fa Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:43 +0800
Subject: [PATCH 1087/1765] platform: andes/ae350: Remove enabling cache from
 an350_final_init

The boot-time cache operations have been handled by U-boot SPL, so we
can drop duplicate code.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/platform.c | 19 -------------------
 1 file changed, 19 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 6bd0a69295c..33f9c4c826d 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -34,25 +34,6 @@ static int ae350_final_init(bool cold_boot)
 {
 	void *fdt;
 
-	/* enable L1 cache */
-	uintptr_t mcache_ctl_val = csr_read(CSR_MCACHECTL);
-
-	if (!(mcache_ctl_val & V5_MCACHE_CTL_IC_EN))
-		mcache_ctl_val |= V5_MCACHE_CTL_IC_EN;
-	if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN))
-		mcache_ctl_val |= V5_MCACHE_CTL_DC_EN;
-	if (!(mcache_ctl_val & V5_MCACHE_CTL_CCTL_SUEN))
-		mcache_ctl_val |= V5_MCACHE_CTL_CCTL_SUEN;
-	csr_write(CSR_MCACHECTL, mcache_ctl_val);
-
-	/* enable L2 cache */
-	uint32_t *l2c_ctl_base = (void *)AE350_L2C_ADDR + V5_L2C_CTL_OFFSET;
-	uint32_t l2c_ctl_val = *l2c_ctl_base;
-
-	if (!(l2c_ctl_val & V5_L2C_CTL_ENABLE_MASK))
-		l2c_ctl_val |= V5_L2C_CTL_ENABLE_MASK;
-	*l2c_ctl_base = l2c_ctl_val;
-
 	if (!cold_boot)
 		return 0;
 

From 9899b59beb840a377fdb62b758506fc5ffbc6b44 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:44 +0800
Subject: [PATCH 1088/1765] platform: andes/ae350: Use kconfig to set platform
 version and default name

This patch makes andes platform name and version can be set in
menuconfig interface.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/Kconfig    | 18 ++++++++++++++++++
 platform/andes/ae350/platform.c |  6 ++++--
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index d57f19fcec9..3abad04c677 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -6,3 +6,21 @@ config PLATFORM_ANDES_AE350
 	select IRQCHIP_PLIC
 	select SERIAL_UART8250
 	default y
+
+if PLATFORM_ANDES_AE350
+
+config PLATFORM_ANDES_AE350_NAME
+	string "Platform default name"
+	default "Andes AE350"
+
+config PLATFORM_ANDES_AE350_MAJOR_VER
+	int "Platform major version"
+	range 0 65535
+	default 0
+
+config PLATFORM_ANDES_AE350_MINOR_VER
+	int "Platform minor version"
+	range 0 65535
+	default 1
+
+endif
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 33f9c4c826d..c07f6bea1fe 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -168,8 +168,10 @@ const struct sbi_platform_operations platform_ops = {
 
 const struct sbi_platform platform = {
 	.opensbi_version = OPENSBI_VERSION,
-	.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
-	.name = "Andes AE350",
+	.platform_version =
+		SBI_PLATFORM_VERSION(CONFIG_PLATFORM_ANDES_AE350_MAJOR_VER,
+				     CONFIG_PLATFORM_ANDES_AE350_MINOR_VER),
+	.name = CONFIG_PLATFORM_ANDES_AE350_NAME,
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = AE350_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,

From 88f58a3694c936791eb875d3cc85f1cde41c3d09 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:45 +0800
Subject: [PATCH 1089/1765] platform: andes/ae350: Use fdt serial driver

Andes UART is compatible with uart8250 driver. We can use
fdt_serial_init() as platform console init hook.

dts example:

  serial0: serial@f0300000 {
    compatible = "andestech,uart16550", "ns16550a";
    reg = <0x00000000 0xf0300000 0x00000000 0x00001000>;
    interrupts = <9 4>;
    interrupt-parent = <&plic0>;
    clock-frequency = <19660800>;
    current-speed = <38400>;
    reg-shift = <2>;
    reg-offset = <32>;
    reg-io-width = <4>;
    no-loopback-test = <1>;
  };

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/Kconfig    |  3 ++-
 platform/andes/ae350/platform.c | 15 ++-------------
 platform/andes/ae350/platform.h |  8 --------
 3 files changed, 4 insertions(+), 22 deletions(-)

diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 3abad04c677..8dd8ebe2336 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -4,7 +4,8 @@ config PLATFORM_ANDES_AE350
 	bool
 	select FDT
 	select IRQCHIP_PLIC
-	select SERIAL_UART8250
+	select FDT_SERIAL
+	select FDT_SERIAL_UART8250
 	default y
 
 if PLATFORM_ANDES_AE350
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index c07f6bea1fe..04428d132c1 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -18,7 +18,7 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/serial/fdt_serial.h>
 #include "platform.h"
 #include "plicsw.h"
 #include "plmt.h"
@@ -43,17 +43,6 @@ static int ae350_final_init(bool cold_boot)
 	return 0;
 }
 
-/* Initialize the platform console. */
-static int ae350_console_init(void)
-{
-	return uart8250_init(AE350_UART_ADDR,
-			     AE350_UART_FREQUENCY,
-			     AE350_UART_BAUDRATE,
-			     AE350_UART_REG_SHIFT,
-			     AE350_UART_REG_WIDTH,
-			     AE350_UART_REG_OFFSET);
-}
-
 /* Initialize the platform interrupt controller for current HART. */
 static int ae350_irqchip_init(bool cold_boot)
 {
@@ -155,7 +144,7 @@ static int ae350_vendor_ext_provider(long extid, long funcid,
 const struct sbi_platform_operations platform_ops = {
 	.final_init = ae350_final_init,
 
-	.console_init = ae350_console_init,
+	.console_init = fdt_serial_init,
 
 	.irqchip_init = ae350_irqchip_init,
 
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 9b548166a34..c699b7f023f 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -22,14 +22,6 @@
 
 #define AE350_L2C_ADDR			0xe0500000
 
-#define AE350_UART_ADDR_OFFSET		0x20
-#define AE350_UART_ADDR			(0xf0300000 + AE350_UART_ADDR_OFFSET)
-#define AE350_UART_FREQUENCY		19660800
-#define AE350_UART_BAUDRATE		38400
-#define AE350_UART_REG_SHIFT		2
-#define AE350_UART_REG_WIDTH		0
-#define AE350_UART_REG_OFFSET		0
-
 /*Memory and Miscellaneous Registers*/
 #define CSR_MILMB		0x7c0
 #define CSR_MDLMB		0x7c1

From ef9f02e7fba47412d6c057ba78fd3d89cb4e5fc3 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:46 +0800
Subject: [PATCH 1090/1765] lib: utils/timer: Add Andes fdt timer support

Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.

dts example (Quad-core AX45MP):

  cpus {
      ...
      timebase-frequency = <0x3938700>;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = <0x00 0xe6000000 0x00 0x100000>;
          interrupts-extended = <&cpu0_intc 0x07
                                 &cpu1_intc 0x07
                                 &cpu2_intc 0x07
                                 &cpu3_intc 0x07>;
      };
      ...
  }

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h   |   3 +
 include/sbi_utils/timer/andes_plmt.h |  29 ++++++++
 lib/utils/fdt/fdt_helper.c           |  54 ++++++++++++++
 lib/utils/timer/Kconfig              |   9 +++
 lib/utils/timer/andes_plmt.c         | 104 ++++++++++++++++++++++++++
 lib/utils/timer/fdt_timer_plmt.c     |  51 +++++++++++++
 lib/utils/timer/objects.mk           |   4 +
 platform/andes/ae350/Kconfig         |   2 +
 platform/andes/ae350/objects.mk      |   2 +-
 platform/andes/ae350/platform.c      |  19 +----
 platform/andes/ae350/platform.h      |   2 -
 platform/andes/ae350/plmt.c          | 107 ---------------------------
 platform/andes/ae350/plmt.h          |  17 -----
 13 files changed, 259 insertions(+), 144 deletions(-)
 create mode 100644 include/sbi_utils/timer/andes_plmt.h
 create mode 100644 lib/utils/timer/andes_plmt.c
 create mode 100644 lib/utils/timer/fdt_timer_plmt.c
 delete mode 100644 platform/andes/ae350/plmt.c
 delete mode 100644 platform/andes/ae350/plmt.h

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index bcd49961b10..7ef63c99092 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -95,6 +95,9 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count);
 
+int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
+			  unsigned long *plmt_size, u32 *hart_count);
+
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible);
 
diff --git a/include/sbi_utils/timer/andes_plmt.h b/include/sbi_utils/timer/andes_plmt.h
new file mode 100644
index 00000000000..08bce33296a
--- /dev/null
+++ b/include/sbi_utils/timer/andes_plmt.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#ifndef __TIMER_ANDES_PLMT_H__
+#define __TIMER_ANDES_PLMT_H__
+
+#define DEFAULT_AE350_PLMT_FREQ 60000000
+#define PLMT_REGION_ALIGN 0x1000
+
+struct plmt_data {
+	u32 hart_count;
+	unsigned long size;
+	unsigned long timer_freq;
+	volatile u64 *time_val;
+	volatile u64 *time_cmp;
+};
+
+int plmt_cold_timer_init(struct plmt_data *plmt);
+int plmt_warm_timer_init(void);
+
+#endif /* __TIMER_ANDES_PLMT_H__ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 6a75d6fcd48..ce52fca802f 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -835,6 +835,60 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 	return 0;
 }
 
+int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
+			  unsigned long *plmt_size, u32 *hart_count)
+{
+	const fdt32_t *val;
+	int rc, i, count;
+	uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
+	u32 phandle, hwirq, hartid, hcount;
+
+	if (nodeoffset < 0 || !fdt || !plmt_base ||
+	    !hart_count || !plmt_size)
+		return SBI_EINVAL;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
+	if (rc < 0 || !plmt_base || !plmt_size)
+		return SBI_ENODEV;
+	*plmt_base = reg_addr;
+	*plmt_size = reg_size;
+
+	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
+	if (!val || count < sizeof(fdt32_t))
+		return 0;
+	count = count / sizeof(fdt32_t);
+
+	hcount = 0;
+	for (i = 0; i < (count / 2); i++) {
+		phandle = fdt32_to_cpu(val[2 * i]);
+		hwirq = fdt32_to_cpu(val[2 * i + 1]);
+
+		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+
+		if (rc)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		if (hwirq == IRQ_M_TIMER)
+			hcount++;
+	}
+
+	*hart_count = hcount;
+
+	return 0;
+}
+
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible)
 {
diff --git a/lib/utils/timer/Kconfig b/lib/utils/timer/Kconfig
index 23c48c5f2d5..ba211b62204 100644
--- a/lib/utils/timer/Kconfig
+++ b/lib/utils/timer/Kconfig
@@ -14,10 +14,19 @@ config FDT_TIMER_MTIMER
 	select TIMER_MTIMER
 	default n
 
+config FDT_TIMER_PLMT
+	bool "Andes PLMT FDT driver"
+	select TIMER_PLMT
+	default n
+
 endif
 
 config TIMER_MTIMER
 	bool "ACLINT MTIMER support"
 	default n
 
+config TIMER_PLMT
+	bool "Andes PLMT support"
+	default n
+
 endmenu
diff --git a/lib/utils/timer/andes_plmt.c b/lib/utils/timer/andes_plmt.c
new file mode 100644
index 00000000000..94a86cc5d46
--- /dev/null
+++ b/lib/utils/timer/andes_plmt.c
@@ -0,0 +1,104 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_timer.h>
+#include <sbi_utils/timer/andes_plmt.h>
+
+struct plmt_data plmt;
+
+static u64 plmt_timer_value(void)
+{
+#if __riscv_xlen == 64
+	return readq_relaxed(plmt.time_val);
+#else
+	u32 lo, hi;
+
+	do {
+		hi = readl_relaxed((void *)plmt.time_val + 0x04);
+		lo = readl_relaxed(plmt.time_val);
+	} while (hi != readl_relaxed((void *)plmt.time_val + 0x04));
+
+	return ((u64)hi << 32) | (u64)lo;
+#endif
+}
+
+static void plmt_timer_event_stop(void)
+{
+	u32 target_hart = current_hartid();
+
+	if (plmt.hart_count <= target_hart)
+		ebreak();
+
+	/* Clear PLMT Time Compare */
+#if __riscv_xlen == 64
+	writeq_relaxed(-1ULL, &plmt.time_cmp[target_hart]);
+#else
+	writel_relaxed(-1UL, &plmt.time_cmp[target_hart]);
+	writel_relaxed(-1UL, (void *)(&plmt.time_cmp[target_hart]) + 0x04);
+#endif
+}
+
+static void plmt_timer_event_start(u64 next_event)
+{
+	u32 target_hart = current_hartid();
+
+	if (plmt.hart_count <= target_hart)
+		ebreak();
+
+	/* Program PLMT Time Compare */
+#if __riscv_xlen == 64
+	writeq_relaxed(next_event, &plmt.time_cmp[target_hart]);
+#else
+	u32 mask = -1UL;
+
+	writel_relaxed(next_event & mask, &plmt.time_cmp[target_hart]);
+	writel_relaxed(next_event >> 32,
+		       (void *)(&plmt.time_cmp[target_hart]) + 0x04);
+#endif
+}
+
+static struct sbi_timer_device plmt_timer = {
+	.name		   = "andes_plmt",
+	.timer_freq	   = DEFAULT_AE350_PLMT_FREQ,
+	.timer_value	   = plmt_timer_value,
+	.timer_event_start = plmt_timer_event_start,
+	.timer_event_stop  = plmt_timer_event_stop
+};
+
+int plmt_cold_timer_init(struct plmt_data *plmt)
+{
+	int rc;
+
+	/* Add PLMT region to the root domain */
+	rc = sbi_domain_root_add_memrange(
+		(unsigned long)plmt->time_val, plmt->size, PLMT_REGION_ALIGN,
+		SBI_DOMAIN_MEMREGION_MMIO | SBI_DOMAIN_MEMREGION_READABLE);
+	if (rc)
+		return rc;
+
+	plmt_timer.timer_freq = plmt->timer_freq;
+
+	sbi_timer_set_device(&plmt_timer);
+
+	return 0;
+}
+
+int plmt_warm_timer_init(void)
+{
+	if (!plmt.time_val)
+		return SBI_ENODEV;
+
+	plmt_timer_event_stop();
+
+	return 0;
+}
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c
new file mode 100644
index 00000000000..e8be91b902c
--- /dev/null
+++ b/lib/utils/timer/fdt_timer_plmt.c
@@ -0,0 +1,51 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/timer/andes_plmt.h>
+
+extern struct plmt_data plmt;
+
+static int fdt_plmt_cold_timer_init(void *fdt, int nodeoff,
+				    const struct fdt_match *match)
+{
+	int rc;
+	unsigned long plmt_base;
+
+	rc = fdt_parse_plmt_node(fdt, nodeoff, &plmt_base, &plmt.size,
+				 &plmt.hart_count);
+	if (rc)
+		return rc;
+
+	plmt.time_val = (u64 *)plmt_base;
+	plmt.time_cmp = (u64 *)(plmt_base + 0x8);
+
+	rc = fdt_parse_timebase_frequency(fdt, &plmt.timer_freq);
+	if (rc)
+		return rc;
+
+	rc = plmt_cold_timer_init(&plmt);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+static const struct fdt_match timer_plmt_match[] = {
+	{ .compatible = "andestech,plmt0" },
+	{},
+};
+
+struct fdt_timer fdt_timer_plmt = {
+	.match_table = timer_plmt_match,
+	.cold_init   = fdt_plmt_cold_timer_init,
+	.warm_init   = plmt_warm_timer_init,
+	.exit	     = NULL,
+};
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index 7f5f3cee870..9360a76271b 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -8,9 +8,13 @@
 #
 
 libsbiutils-objs-$(CONFIG_TIMER_MTIMER) += timer/aclint_mtimer.o
+libsbiutils-objs-$(CONFIG_TIMER_PLMT) += timer/andes_plmt.o
 
 libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer.o
 libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer_drivers.o
 
 carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_MTIMER) += fdt_timer_mtimer
 libsbiutils-objs-$(CONFIG_FDT_TIMER_MTIMER) += timer/fdt_timer_mtimer.o
+
+carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_PLMT) += fdt_timer_plmt
+libsbiutils-objs-$(CONFIG_FDT_TIMER_PLMT) += timer/fdt_timer_plmt.o
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 8dd8ebe2336..f6f50eb8e74 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -6,6 +6,8 @@ config PLATFORM_ANDES_AE350
 	select IRQCHIP_PLIC
 	select FDT_SERIAL
 	select FDT_SERIAL_UART8250
+	select FDT_TIMER
+	select FDT_TIMER_PLMT
 	default y
 
 if PLATFORM_ANDES_AE350
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
index 80f07376bc2..1ccb8943b06 100644
--- a/platform/andes/ae350/objects.mk
+++ b/platform/andes/ae350/objects.mk
@@ -15,7 +15,7 @@ platform-asflags-y =
 platform-ldflags-y =
 
 # Objects to build
-platform-objs-y += cache.o platform.o plicsw.o plmt.o
+platform-objs-y += cache.o platform.o plicsw.o
 
 # Blobs to build
 FW_TEXT_START=0x00000000
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 04428d132c1..79736c0bdc4 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -19,9 +19,9 @@
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
 #include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/timer/fdt_timer.h>
 #include "platform.h"
 #include "plicsw.h"
-#include "plmt.h"
 #include "cache.h"
 
 static struct plic_data plic = {
@@ -81,21 +81,6 @@ static int ae350_ipi_init(bool cold_boot)
 	return plicsw_warm_ipi_init();
 }
 
-/* Initialize platform timer for current HART. */
-static int ae350_timer_init(bool cold_boot)
-{
-	int ret;
-
-	if (cold_boot) {
-		ret = plmt_cold_timer_init(AE350_PLMT_ADDR,
-					   AE350_HART_COUNT);
-		if (ret)
-			return ret;
-	}
-
-	return plmt_warm_timer_init();
-}
-
 /* Vendor-Specific SBI handler */
 static int ae350_vendor_ext_provider(long extid, long funcid,
 	const struct sbi_trap_regs *regs, unsigned long *out_value,
@@ -150,7 +135,7 @@ const struct sbi_platform_operations platform_ops = {
 
 	.ipi_init     = ae350_ipi_init,
 
-	.timer_init	   = ae350_timer_init,
+	.timer_init	   = fdt_timer_init,
 
 	.vendor_ext_provider = ae350_vendor_ext_provider
 };
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index c699b7f023f..6a29fe551c3 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -18,8 +18,6 @@
 
 #define AE350_PLICSW_ADDR		0xe6400000
 
-#define AE350_PLMT_ADDR			0xe6000000
-
 #define AE350_L2C_ADDR			0xe0500000
 
 /*Memory and Miscellaneous Registers*/
diff --git a/platform/andes/ae350/plmt.c b/platform/andes/ae350/plmt.c
deleted file mode 100644
index 54dcb94927b..00000000000
--- a/platform/andes/ae350/plmt.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_timer.h>
-
-static u32 plmt_time_hart_count;
-static volatile void *plmt_time_base;
-static volatile u64 *plmt_time_val;
-static volatile u64 *plmt_time_cmp;
-
-static u64 plmt_timer_value(void)
-{
-#if __riscv_xlen == 64
-	return readq_relaxed(plmt_time_val);
-#else
-	u32 lo, hi;
-
-	do {
-		hi = readl_relaxed((void *)plmt_time_val + 0x04);
-		lo = readl_relaxed(plmt_time_val);
-	} while (hi != readl_relaxed((void *)plmt_time_val + 0x04));
-
-	return ((u64)hi << 32) | (u64)lo;
-#endif
-}
-
-static void plmt_timer_event_stop(void)
-{
-	u32 target_hart = current_hartid();
-
-	if (plmt_time_hart_count <= target_hart)
-		return;
-
-	/* Clear PLMT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(-1ULL, &plmt_time_cmp[target_hart]);
-#else
-	writel_relaxed(-1UL, &plmt_time_cmp[target_hart]);
-	writel_relaxed(-1UL, (void *)(&plmt_time_cmp[target_hart]) + 0x04);
-#endif
-}
-
-static void plmt_timer_event_start(u64 next_event)
-{
-	u32 target_hart = current_hartid();
-
-	if (plmt_time_hart_count <= target_hart)
-		return;
-
-	/* Program PLMT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(next_event, &plmt_time_cmp[target_hart]);
-#else
-	u32 mask = -1UL;
-
-	writel_relaxed(next_event & mask, &plmt_time_cmp[target_hart]);
-	writel_relaxed(next_event >> 32,
-		       (void *)(&plmt_time_cmp[target_hart]) + 0x04);
-#endif
-
-}
-
-static struct sbi_timer_device plmt_timer = {
-	.name = "ae350_plmt",
-	.timer_value = plmt_timer_value,
-	.timer_event_start = plmt_timer_event_start,
-	.timer_event_stop = plmt_timer_event_stop
-};
-
-int plmt_warm_timer_init(void)
-{
-	u32 target_hart = current_hartid();
-
-	if (plmt_time_hart_count <= target_hart || !plmt_time_base)
-		return -1;
-
-	/* Clear PLMT Time Compare */
-#if __riscv_xlen == 64
-	writeq_relaxed(-1ULL, &plmt_time_cmp[target_hart]);
-#else
-	writel_relaxed(-1UL, &plmt_time_cmp[target_hart]);
-	writel_relaxed(-1UL, (void *)(&plmt_time_cmp[target_hart]) + 0x04);
-#endif
-
-	return 0;
-}
-
-int plmt_cold_timer_init(unsigned long base, u32 hart_count)
-{
-	plmt_time_hart_count = hart_count;
-	plmt_time_base	     = (void *)base;
-	plmt_time_val        = (u64 *)(plmt_time_base);
-	plmt_time_cmp        = (u64 *)(plmt_time_base + 0x8);
-
-	sbi_timer_set_device(&plmt_timer);
-
-	return 0;
-}
diff --git a/platform/andes/ae350/plmt.h b/platform/andes/ae350/plmt.h
deleted file mode 100644
index db093e03020..00000000000
--- a/platform/andes/ae350/plmt.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- */
-
-#ifndef _AE350_PLMT_H_
-#define _AE350_PLMT_H_
-
-int plmt_warm_timer_init(void);
-
-int plmt_cold_timer_init(unsigned long base, u32 hart_count);
-
-#endif /* _AE350_PLMT_H_ */

From 8234fc1bdf4629fc0fec41ebc2e091c407ef8d6a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:47 +0800
Subject: [PATCH 1091/1765] lib: utils/reset: Add Andes fdt reset driver
 support

Add ATCWDT200 as reset device of AE350 platform, this driver requires
SMU to program the reset vector registers before triggering WDT software
restart signal.

dts example:

  smu@f0100000 {
    compatible = "andestech,atcsmu";
    reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
  };

  wdt: wdt@f0500000 {
    compatible = "andestech,atcwdt200";
    reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
    interrupts = <3 4>;
    interrupt-parent = <&plic0>;
    clock-frequency = <15000000>;
  };

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/Kconfig               |   4 +
 lib/utils/reset/fdt_reset_atcwdt200.c | 122 ++++++++++++++++++++++++++
 lib/utils/reset/objects.mk            |   3 +
 platform/andes/ae350/Kconfig          |   2 +
 platform/andes/ae350/platform.c       |   3 +
 5 files changed, 134 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_atcwdt200.c

diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 2e83ff638ae..0e0c2c1d7c4 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -9,6 +9,10 @@ config FDT_RESET
 
 if FDT_RESET
 
+config FDT_RESET_ATCWDT200
+	bool "Andes WDT FDT reset driver"
+	default n
+
 config FDT_RESET_GPIO
 	bool "GPIO FDT reset driver"
 	depends on FDT_GPIO
diff --git a/lib/utils/reset/fdt_reset_atcwdt200.c b/lib/utils/reset/fdt_reset_atcwdt200.c
new file mode 100644
index 00000000000..91acc9f7f11
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_atcwdt200.c
@@ -0,0 +1,122 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+#define ATCWDT200_WP_NUM 0x5aa5
+#define WREN_REG 0x18
+#define CTRL_REG 0x10
+#define RST_TIME_OFF 8
+#define RST_TIME_MSK (0x3 << RST_TIME_OFF)
+#define RST_CLK_128 (0 << RST_TIME_OFF)
+#define RST_CLK_256 (1 << RST_TIME_OFF)
+#define RST_CLK_512 (2 << RST_TIME_OFF)
+#define RST_CLK_1024 (3 << RST_TIME_OFF)
+#define INT_TIME_OFF 4
+#define INT_TIME_MSK (0xf << INT_TIME_OFF)
+#define INT_CLK_64 (0 << INT_TIME_OFF)
+#define INT_CLK_256 (1 << INT_TIME_OFF)
+#define INT_CLK_1024 (2 << INT_TIME_OFF)
+#define INT_CLK_2048 (3 << INT_TIME_OFF)
+#define INT_CLK_4096 (4 << INT_TIME_OFF)
+#define INT_CLK_8192 (5 << INT_TIME_OFF)
+#define INT_CLK_16384 (6 << INT_TIME_OFF)
+#define INT_CLK_32768 (7 << INT_TIME_OFF)
+#define RST_EN (1 << 3)
+#define INT_EN (1 << 2)
+#define CLK_PCLK (1 << 1)
+#define WDT_EN (1 << 0)
+
+#define FLASH_BASE 0x80000000ULL
+#define SMU_RESET_VEC_LO_OFF 0x50
+#define SMU_RESET_VEC_HI_OFF 0x60
+#define SMU_HARTn_RESET_VEC_LO(n) (SMU_RESET_VEC_LO_OFF + (n * 0x4))
+#define SMU_HARTn_RESET_VEC_HI(n) (SMU_RESET_VEC_HI_OFF + (n * 0x4))
+
+static volatile char *wdt_addr;
+static volatile char *smu_addr;
+
+static int ae350_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		return 1;
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+	default:
+		return 0;
+	}
+}
+
+static void ae350_system_reset(u32 type, u32 reason)
+{
+	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
+
+	for (int i = 0; i < sbi_platform_hart_count(plat); i++) {
+		writel(FLASH_BASE, smu_addr + SMU_HARTn_RESET_VEC_LO(i));
+		writel(FLASH_BASE >> 32, smu_addr + SMU_HARTn_RESET_VEC_HI(i));
+	}
+
+	/* Program WDT control register  */
+	writew(ATCWDT200_WP_NUM, wdt_addr + WREN_REG);
+	writel(INT_CLK_32768 | INT_EN | RST_CLK_128 | RST_EN | WDT_EN,
+	       wdt_addr + CTRL_REG);
+
+	sbi_hart_hang();
+}
+
+static struct sbi_system_reset_device atcwdt200_reset = {
+	.name		    = "atcwdt200",
+	.system_reset_check = ae350_system_reset_check,
+	.system_reset	    = ae350_system_reset,
+};
+
+static int atcwdt200_reset_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	uint64_t reg_addr;
+	int rc;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, NULL);
+	if (rc < 0 || !reg_addr)
+		return SBI_ENODEV;
+
+	wdt_addr = (volatile char *)(unsigned long)reg_addr;
+
+	/*
+	 * The reset device requires smu to program the reset
+	 * vector for each hart.
+	 */
+	if (fdt_parse_compat_addr(fdt, &reg_addr, "andestech,atcsmu"))
+		return SBI_ENODEV;
+
+	smu_addr = (volatile char *)(unsigned long)reg_addr;
+
+	sbi_system_reset_add_device(&atcwdt200_reset);
+
+	return 0;
+}
+
+static const struct fdt_match atcwdt200_reset_match[] = {
+	{ .compatible = "andestech,atcwdt200" },
+	{},
+};
+
+struct fdt_reset fdt_reset_atcwdt200 = {
+	.match_table = atcwdt200_reset_match,
+	.init	     = atcwdt200_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 8a50dd0403b..c9f851cd193 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -10,6 +10,9 @@
 libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset.o
 libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset_drivers.o
 
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_ATCWDT200) += fdt_reset_atcwdt200
+libsbiutils-objs-$(CONFIG_FDT_RESET_ATCWDT200) += reset/fdt_reset_atcwdt200.o
+
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_GPIO) += fdt_poweroff_gpio
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_GPIO) += fdt_reset_gpio
 libsbiutils-objs-$(CONFIG_FDT_RESET_GPIO) += reset/fdt_reset_gpio.o
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index f6f50eb8e74..8486f08cf10 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -8,6 +8,8 @@ config PLATFORM_ANDES_AE350
 	select FDT_SERIAL_UART8250
 	select FDT_TIMER
 	select FDT_TIMER_PLMT
+	select FDT_RESET
+	select FDT_RESET_ATCWDT200
 	default y
 
 if PLATFORM_ANDES_AE350
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 79736c0bdc4..c6a8eebc575 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -18,6 +18,7 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/reset/fdt_reset.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
 #include "platform.h"
@@ -37,6 +38,8 @@ static int ae350_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
+	fdt_reset_init();
+
 	fdt = fdt_get_address();
 	fdt_fixups(fdt);
 

From 127a3f2ab4e4c8245046529ac6102aafe58b3a51 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:48 +0800
Subject: [PATCH 1092/1765] platform: andes/ae350: Use fdt irqchip driver

Andes PLIC is compatible with plic driver. The PLIC base address and
number of source can be obtained by parsing the device tree.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/Kconfig    |  3 ++-
 platform/andes/ae350/platform.c | 24 ++----------------------
 platform/andes/ae350/platform.h |  3 ---
 3 files changed, 4 insertions(+), 26 deletions(-)

diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 8486f08cf10..084b27f6434 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -3,13 +3,14 @@
 config PLATFORM_ANDES_AE350
 	bool
 	select FDT
-	select IRQCHIP_PLIC
 	select FDT_SERIAL
 	select FDT_SERIAL_UART8250
 	select FDT_TIMER
 	select FDT_TIMER_PLMT
 	select FDT_RESET
 	select FDT_RESET_ATCWDT200
+	select FDT_IRQCHIP
+	select FDT_IRQCHIP_PLIC
 	default y
 
 if PLATFORM_ANDES_AE350
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index c6a8eebc575..98acaaa530f 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -17,7 +17,7 @@
 #include <sbi/sbi_trap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/reset/fdt_reset.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
@@ -25,11 +25,6 @@
 #include "plicsw.h"
 #include "cache.h"
 
-static struct plic_data plic = {
-	.addr = AE350_PLIC_ADDR,
-	.num_src = AE350_PLIC_NUM_SOURCES,
-};
-
 /* Platform final initialization. */
 static int ae350_final_init(bool cold_boot)
 {
@@ -46,21 +41,6 @@ static int ae350_final_init(bool cold_boot)
 	return 0;
 }
 
-/* Initialize the platform interrupt controller for current HART. */
-static int ae350_irqchip_init(bool cold_boot)
-{
-	u32 hartid = current_hartid();
-	int ret;
-
-	if (cold_boot) {
-		ret = plic_cold_irqchip_init(&plic);
-		if (ret)
-			return ret;
-	}
-
-	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
-}
-
 static struct sbi_ipi_device plicsw_ipi = {
 	.name = "ae350_plicsw",
 	.ipi_send = plicsw_ipi_send,
@@ -134,7 +114,7 @@ const struct sbi_platform_operations platform_ops = {
 
 	.console_init = fdt_serial_init,
 
-	.irqchip_init = ae350_irqchip_init,
+	.irqchip_init = fdt_irqchip_init,
 
 	.ipi_init     = ae350_ipi_init,
 
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 6a29fe551c3..3264b6f1992 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -13,9 +13,6 @@
 
 #define AE350_HART_COUNT		4
 
-#define AE350_PLIC_ADDR			0xe4000000
-#define AE350_PLIC_NUM_SOURCES		71
-
 #define AE350_PLICSW_ADDR		0xe6400000
 
 #define AE350_L2C_ADDR			0xe0500000

From 6f3258e67187554b1202d3d2a065ef1adcdde3e6 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:49 +0800
Subject: [PATCH 1093/1765] platform: andes/ae350: Add fw_platform_init for
 platform initialization

This patch adds fw_platform_init() to initialize ae350 platform.name
and platform.hart_count by parsing device tree.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/platform.c | 51 +++++++++++++++++++++++++++++++--
 platform/andes/ae350/platform.h |  2 --
 2 files changed, 49 insertions(+), 4 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 98acaaa530f..cf5417cd493 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -6,14 +6,18 @@
  * Authors:
  *   Zong Li <zong@andestech.com>
  *   Nylon Chen <nylon7@andestech.com>
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
  */
 
+#include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
 #include <sbi/sbi_trap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
@@ -25,6 +29,49 @@
 #include "plicsw.h"
 #include "cache.h"
 
+struct sbi_platform platform;
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+				unsigned long arg2, unsigned long arg3,
+				unsigned long arg4)
+{
+	const char *model;
+	void *fdt = (void *)arg1;
+	u32 hartid, hart_count = 0;
+	int rc, root_offset, cpus_offset, cpu_offset, len;
+
+	root_offset = fdt_path_offset(fdt, "/");
+	if (root_offset < 0)
+		goto fail;
+
+	model = fdt_getprop(fdt, root_offset, "model", &len);
+	if (model)
+		sbi_strncpy(platform.name, model, sizeof(platform.name) - 1);
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		goto fail;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (rc)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		hart_count++;
+	}
+
+	platform.hart_count = hart_count;
+
+	/* Return original FDT pointer */
+	return arg1;
+
+fail:
+	while (1)
+		wfi();
+}
+
 /* Platform final initialization. */
 static int ae350_final_init(bool cold_boot)
 {
@@ -123,14 +170,14 @@ const struct sbi_platform_operations platform_ops = {
 	.vendor_ext_provider = ae350_vendor_ext_provider
 };
 
-const struct sbi_platform platform = {
+struct sbi_platform platform = {
 	.opensbi_version = OPENSBI_VERSION,
 	.platform_version =
 		SBI_PLATFORM_VERSION(CONFIG_PLATFORM_ANDES_AE350_MAJOR_VER,
 				     CONFIG_PLATFORM_ANDES_AE350_MINOR_VER),
 	.name = CONFIG_PLATFORM_ANDES_AE350_NAME,
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = AE350_HART_COUNT,
+	.hart_count = SBI_HARTMASK_MAX_BITS,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 3264b6f1992..3003bb4c9d7 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -11,8 +11,6 @@
 #ifndef _AE350_PLATFORM_H_
 #define _AE350_PLATFORM_H_
 
-#define AE350_HART_COUNT		4
-
 #define AE350_PLICSW_ADDR		0xe6400000
 
 #define AE350_L2C_ADDR			0xe0500000

From ce7c490719ed4e268979c8b6b54a5252396fbb3b Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:50 +0800
Subject: [PATCH 1094/1765] lib: utils/ipi: Add Andes fdt ipi driver support

Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.

Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.

dts example (Quad-core AX45MP):

  plicsw: interrupt-controller@e6400000 {
          compatible = "andestech,plicsw";
          reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
          interrupts-extended = <&CPU0_intc 3
                                 &CPU1_intc 3
                                 &CPU2_intc 3
                                 &CPU3_intc 3>;
          interrupt-controller;
          #address-cells = <2>;
          #interrupt-cells = <2>;
  };

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h   |   3 +
 include/sbi_utils/ipi/andes_plicsw.h |  46 +++++++++
 lib/utils/fdt/fdt_helper.c           |  54 +++++++++++
 lib/utils/ipi/Kconfig                |   9 ++
 lib/utils/ipi/andes_plicsw.c         | 137 ++++++++++++++++++++++++++
 lib/utils/ipi/fdt_ipi_plicsw.c       |  47 +++++++++
 lib/utils/ipi/objects.mk             |   4 +
 platform/andes/ae350/Kconfig         |   2 +
 platform/andes/ae350/objects.mk      |   2 +-
 platform/andes/ae350/platform.c      |  27 +-----
 platform/andes/ae350/platform.h      |   2 -
 platform/andes/ae350/plicsw.c        | 139 ---------------------------
 platform/andes/ae350/plicsw.h        |  44 ---------
 13 files changed, 305 insertions(+), 211 deletions(-)
 create mode 100644 include/sbi_utils/ipi/andes_plicsw.h
 create mode 100644 lib/utils/ipi/andes_plicsw.c
 create mode 100644 lib/utils/ipi/fdt_ipi_plicsw.c
 delete mode 100644 platform/andes/ae350/plicsw.c
 delete mode 100644 platform/andes/ae350/plicsw.h

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 7ef63c99092..c39f77aa7b2 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -98,6 +98,9 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 			  unsigned long *plmt_size, u32 *hart_count);
 
+int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
+			  unsigned long *size, u32 *hart_count);
+
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible);
 
diff --git a/include/sbi_utils/ipi/andes_plicsw.h b/include/sbi_utils/ipi/andes_plicsw.h
new file mode 100644
index 00000000000..e93cda0b30d
--- /dev/null
+++ b/include/sbi_utils/ipi/andes_plicsw.h
@@ -0,0 +1,46 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ *   Leo Yu-Chi Liang <ycliang@andestech.com>
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#ifndef _IPI_ANDES_PLICSW_H_
+#define _IPI_ANDES_PLICSW_H_
+
+#define PLICSW_PRIORITY_BASE 0x4
+
+#define PLICSW_PENDING_BASE 0x1000
+#define PLICSW_PENDING_STRIDE 0x8
+
+#define PLICSW_ENABLE_BASE 0x2000
+#define PLICSW_ENABLE_STRIDE 0x80
+
+#define PLICSW_CONTEXT_BASE 0x200000
+#define PLICSW_CONTEXT_STRIDE 0x1000
+#define PLICSW_CONTEXT_CLAIM 0x4
+
+#define PLICSW_HART_MASK 0x01010101
+
+#define PLICSW_HART_MAX_NR 8
+
+#define PLICSW_REGION_ALIGN 0x1000
+
+struct plicsw_data {
+	unsigned long addr;
+	unsigned long size;
+	uint32_t hart_count;
+	/* hart id to source id table */
+	uint32_t source_id[PLICSW_HART_MAX_NR];
+};
+
+int plicsw_warm_ipi_init(void);
+
+int plicsw_cold_ipi_init(struct plicsw_data *plicsw);
+
+#endif /* _IPI_ANDES_PLICSW_H_ */
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index ce52fca802f..d390436c9a9 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -889,6 +889,60 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 	return 0;
 }
 
+int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
+			  unsigned long *size, u32 *hart_count)
+{
+	const fdt32_t *val;
+	int rc, i, count;
+	uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
+	u32 phandle, hwirq, hartid, hcount;
+
+	if (nodeoffset < 0 || !fdt || !plicsw_base ||
+	    !hart_count || !size)
+		return SBI_EINVAL;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
+				    &reg_addr, &reg_size);
+	if (rc < 0 || !plicsw_base || !size)
+		return SBI_ENODEV;
+	*plicsw_base = reg_addr;
+	*size = reg_size;
+
+	val = fdt_getprop(fdt, nodeoffset, "interrupts-extended", &count);
+	if (!val || count < sizeof(fdt32_t))
+		return 0;
+	count = count / sizeof(fdt32_t);
+
+	hcount = 0;
+	for (i = 0; i < (count / 2); i++) {
+		phandle = fdt32_to_cpu(val[2 * i]);
+		hwirq = fdt32_to_cpu(val[2 * i + 1]);
+
+		cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
+		if (cpu_intc_offset < 0)
+			continue;
+
+		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+
+		if (rc)
+			continue;
+
+		if (SBI_HARTMASK_MAX_BITS <= hartid)
+			continue;
+
+		if (hwirq == IRQ_M_SOFT)
+			hcount++;
+	}
+
+	*hart_count = hcount;
+
+	return 0;
+}
+
 int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible)
 {
diff --git a/lib/utils/ipi/Kconfig b/lib/utils/ipi/Kconfig
index efc89601560..37188527a5c 100644
--- a/lib/utils/ipi/Kconfig
+++ b/lib/utils/ipi/Kconfig
@@ -14,10 +14,19 @@ config FDT_IPI_MSWI
 	select IPI_MSWI
 	default n
 
+config FDT_IPI_PLICSW
+	bool "Andes PLICSW FDT driver"
+	select IPI_PLICSW
+	default n
+
 endif
 
 config IPI_MSWI
 	bool "ACLINT MSWI support"
 	default n
 
+config IPI_PLICSW
+	bool "Andes PLICSW support"
+	default n
+
 endmenu
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
new file mode 100644
index 00000000000..db25ae239e1
--- /dev/null
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -0,0 +1,137 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ *   Leo Yu-Chi Liang <ycliang@andestech.com>
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi_utils/ipi/andes_plicsw.h>
+
+struct plicsw_data plicsw;
+
+static inline void plicsw_claim(void)
+{
+	u32 hartid = current_hartid();
+
+	if (plicsw.hart_count <= hartid)
+		ebreak();
+
+	plicsw.source_id[hartid] =
+		readl((void *)plicsw.addr + PLICSW_CONTEXT_BASE +
+		      PLICSW_CONTEXT_CLAIM + PLICSW_CONTEXT_STRIDE * hartid);
+}
+
+static inline void plicsw_complete(void)
+{
+	u32 hartid = current_hartid();
+	u32 source = plicsw.source_id[hartid];
+
+	writel(source, (void *)plicsw.addr + PLICSW_CONTEXT_BASE +
+			       PLICSW_CONTEXT_CLAIM +
+			       PLICSW_CONTEXT_STRIDE * hartid);
+}
+
+static inline void plic_sw_pending(u32 target_hart)
+{
+	/*
+	 * The pending array registers are w1s type.
+	 * IPI pending array mapping as following:
+	 *
+	 * Pending array start address: base + 0x1000
+	 * ---------------------------------
+	 * | hart3 | hart2 | hart1 | hart0 |
+	 * ---------------------------------
+	 * Each hartX can send IPI to another hart by setting the
+	 * bitY to its own region (see the below).
+	 *
+	 * In each hartX region:
+	 * <---------- PICSW_PENDING_STRIDE -------->
+	 * | bit7 | ... | bit3 | bit2 | bit1 | bit0 |
+	 * ------------------------------------------
+	 * The bitY of hartX region indicates that hartX sends an
+	 * IPI to hartY.
+	 */
+	u32 hartid	    = current_hartid();
+	u32 word_index	    = hartid / 4;
+	u32 per_hart_offset = PLICSW_PENDING_STRIDE * hartid;
+	u32 val		    = 1 << target_hart << per_hart_offset;
+
+	writel(val, (void *)plicsw.addr + PLICSW_PENDING_BASE + word_index * 4);
+}
+
+static void plicsw_ipi_send(u32 target_hart)
+{
+	if (plicsw.hart_count <= target_hart)
+		ebreak();
+
+	/* Set PLICSW IPI */
+	plic_sw_pending(target_hart);
+}
+
+static void plicsw_ipi_clear(u32 target_hart)
+{
+	if (plicsw.hart_count <= target_hart)
+		ebreak();
+
+	/* Clear PLICSW IPI */
+	plicsw_claim();
+	plicsw_complete();
+}
+
+static struct sbi_ipi_device plicsw_ipi = {
+	.name      = "andes_plicsw",
+	.ipi_send  = plicsw_ipi_send,
+	.ipi_clear = plicsw_ipi_clear
+};
+
+int plicsw_warm_ipi_init(void)
+{
+	u32 hartid = current_hartid();
+
+	/* Clear PLICSW IPI */
+	plicsw_ipi_clear(hartid);
+
+	return 0;
+}
+
+int plicsw_cold_ipi_init(struct plicsw_data *plicsw)
+{
+	int rc;
+
+	/* Setup source priority */
+	uint32_t *priority = (void *)plicsw->addr + PLICSW_PRIORITY_BASE;
+
+	for (int i = 0; i < plicsw->hart_count; i++)
+		writel(1, &priority[i]);
+
+	/* Setup target enable */
+	uint32_t enable_mask = PLICSW_HART_MASK;
+
+	for (int i = 0; i < plicsw->hart_count; i++) {
+		uint32_t *enable = (void *)plicsw->addr + PLICSW_ENABLE_BASE +
+				   PLICSW_ENABLE_STRIDE * i;
+		writel(enable_mask, enable);
+		writel(enable_mask, enable + 1);
+		enable_mask <<= 1;
+	}
+
+	/* Add PLICSW region to the root domain */
+	rc = sbi_domain_root_add_memrange(plicsw->addr, plicsw->size,
+					  PLICSW_REGION_ALIGN,
+					  SBI_DOMAIN_MEMREGION_MMIO);
+	if (rc)
+		return rc;
+
+	sbi_ipi_set_device(&plicsw_ipi);
+
+	return 0;
+}
diff --git a/lib/utils/ipi/fdt_ipi_plicsw.c b/lib/utils/ipi/fdt_ipi_plicsw.c
new file mode 100644
index 00000000000..bf29bfc19d8
--- /dev/null
+++ b/lib/utils/ipi/fdt_ipi_plicsw.c
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Zong Li <zong@andestech.com>
+ *   Nylon Chen <nylon7@andestech.com>
+ *   Leo Yu-Chi Liang <ycliang@andestech.com>
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/ipi/andes_plicsw.h>
+
+extern struct plicsw_data plicsw;
+
+int fdt_plicsw_cold_ipi_init(void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	int rc;
+
+	rc = fdt_parse_plicsw_node(fdt, nodeoff, &plicsw.addr, &plicsw.size,
+				   &plicsw.hart_count);
+	if (rc)
+		return rc;
+
+	rc = plicsw_cold_ipi_init(&plicsw);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+static const struct fdt_match ipi_plicsw_match[] = {
+	{ .compatible = "andestech,plicsw" },
+	{},
+};
+
+struct fdt_ipi fdt_ipi_plicsw = {
+	.match_table = ipi_plicsw_match,
+	.cold_init   = fdt_plicsw_cold_ipi_init,
+	.warm_init   = plicsw_warm_ipi_init,
+	.exit	     = NULL,
+};
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 0600cac414c..999e7bd9c24 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -8,9 +8,13 @@
 #
 
 libsbiutils-objs-$(CONFIG_IPI_MSWI) += ipi/aclint_mswi.o
+libsbiutils-objs-$(CONFIG_IPI_PLICSW) += ipi/andes_plicsw.o
 
 libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi.o
 libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi_drivers.o
 
 carray-fdt_ipi_drivers-$(CONFIG_FDT_IPI_MSWI) += fdt_ipi_mswi
 libsbiutils-objs-$(CONFIG_FDT_IPI_MSWI) += ipi/fdt_ipi_mswi.o
+
+carray-fdt_ipi_drivers-$(CONFIG_FDT_IPI_PLICSW) += fdt_ipi_plicsw
+libsbiutils-objs-$(CONFIG_FDT_IPI_PLICSW) += ipi/fdt_ipi_plicsw.o
diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
index 084b27f6434..38e40014323 100644
--- a/platform/andes/ae350/Kconfig
+++ b/platform/andes/ae350/Kconfig
@@ -11,6 +11,8 @@ config PLATFORM_ANDES_AE350
 	select FDT_RESET_ATCWDT200
 	select FDT_IRQCHIP
 	select FDT_IRQCHIP_PLIC
+	select FDT_IPI
+	select FDT_IPI_PLICSW
 	default y
 
 if PLATFORM_ANDES_AE350
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
index 1ccb8943b06..a4a2332daa2 100644
--- a/platform/andes/ae350/objects.mk
+++ b/platform/andes/ae350/objects.mk
@@ -15,7 +15,7 @@ platform-asflags-y =
 platform-ldflags-y =
 
 # Objects to build
-platform-objs-y += cache.o platform.o plicsw.o
+platform-objs-y += cache.o platform.o
 
 # Blobs to build
 FW_TEXT_START=0x00000000
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index cf5417cd493..30e46062b61 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -25,8 +25,8 @@
 #include <sbi_utils/reset/fdt_reset.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
 #include "platform.h"
-#include "plicsw.h"
 #include "cache.h"
 
 struct sbi_platform platform;
@@ -88,29 +88,6 @@ static int ae350_final_init(bool cold_boot)
 	return 0;
 }
 
-static struct sbi_ipi_device plicsw_ipi = {
-	.name = "ae350_plicsw",
-	.ipi_send = plicsw_ipi_send,
-	.ipi_clear = plicsw_ipi_clear
-};
-
-/* Initialize IPI for current HART. */
-static int ae350_ipi_init(bool cold_boot)
-{
-	int ret;
-
-	if (cold_boot) {
-		ret = plicsw_cold_ipi_init(AE350_PLICSW_ADDR,
-					   AE350_HART_COUNT);
-		if (ret)
-			return ret;
-
-		sbi_ipi_set_device(&plicsw_ipi);
-	}
-
-	return plicsw_warm_ipi_init();
-}
-
 /* Vendor-Specific SBI handler */
 static int ae350_vendor_ext_provider(long extid, long funcid,
 	const struct sbi_trap_regs *regs, unsigned long *out_value,
@@ -163,7 +140,7 @@ const struct sbi_platform_operations platform_ops = {
 
 	.irqchip_init = fdt_irqchip_init,
 
-	.ipi_init     = ae350_ipi_init,
+	.ipi_init     = fdt_ipi_init,
 
 	.timer_init	   = fdt_timer_init,
 
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
index 3003bb4c9d7..903bef0278a 100644
--- a/platform/andes/ae350/platform.h
+++ b/platform/andes/ae350/platform.h
@@ -11,8 +11,6 @@
 #ifndef _AE350_PLATFORM_H_
 #define _AE350_PLATFORM_H_
 
-#define AE350_PLICSW_ADDR		0xe6400000
-
 #define AE350_L2C_ADDR			0xe0500000
 
 /*Memory and Miscellaneous Registers*/
diff --git a/platform/andes/ae350/plicsw.c b/platform/andes/ae350/plicsw.c
deleted file mode 100644
index edbbb114720..00000000000
--- a/platform/andes/ae350/plicsw.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_types.h>
-#include "plicsw.h"
-#include "platform.h"
-
-static u32 plicsw_ipi_hart_count;
-static struct plicsw plicsw_dev[AE350_HART_COUNT];
-
-static inline void plicsw_claim(void)
-{
-	u32 source_hart = current_hartid();
-
-	plicsw_dev[source_hart].source_id =
-		readl(plicsw_dev[source_hart].plicsw_claim);
-}
-
-static inline void plicsw_complete(void)
-{
-	u32 source_hart = current_hartid();
-	u32 source = plicsw_dev[source_hart].source_id;
-
-	writel(source, plicsw_dev[source_hart].plicsw_claim);
-}
-
-static inline void plic_sw_pending(u32 target_hart)
-{
-	/*
-	 * The pending array registers are w1s type.
-	 * IPI pending array mapping as following:
-	 *
-	 * Pending array start address: base + 0x1000
-	 * -------------------------------------
-	 * | hart 3 | hart 2 | hart 1 | hart 0 |
-	 * -------------------------------------
-	 * Each hart X can send IPI to another hart by setting the
-	 * corresponding bit in hart X own region(see the below).
-	 *
-	 * In each hart region:
-	 * -----------------------------------------------
-	 * | bit 7 | bit 6 | bit 5 | bit 4 | ... | bit 0 |
-	 * -----------------------------------------------
-	 * The bit 7 is used to send IPI to hart 0
-	 * The bit 6 is used to send IPI to hart 1
-	 * The bit 5 is used to send IPI to hart 2
-	 * The bit 4 is used to send IPI to hart 3
-	 */
-	u32 source_hart = current_hartid();
-	u32 target_offset = (PLICSW_PENDING_PER_HART - 1) - target_hart;
-	u32 per_hart_offset = PLICSW_PENDING_PER_HART * source_hart;
-	u32 val = 1 << target_offset << per_hart_offset;
-
-	writel(val, plicsw_dev[source_hart].plicsw_pending);
-}
-
-void plicsw_ipi_send(u32 target_hart)
-{
-	if (plicsw_ipi_hart_count <= target_hart)
-		return;
-
-	/* Set PLICSW IPI */
-	plic_sw_pending(target_hart);
-}
-
-void plicsw_ipi_clear(u32 target_hart)
-{
-	if (plicsw_ipi_hart_count <= target_hart)
-		return;
-
-	/* Clear PLICSW IPI */
-	plicsw_claim();
-	plicsw_complete();
-}
-
-int plicsw_warm_ipi_init(void)
-{
-	u32 hartid = current_hartid();
-
-	if (!plicsw_dev[hartid].plicsw_pending
-	    && !plicsw_dev[hartid].plicsw_enable
-	    && !plicsw_dev[hartid].plicsw_claim)
-		return -1;
-
-	/* Clear PLICSW IPI */
-	plicsw_ipi_clear(hartid);
-
-	return 0;
-}
-
-int plicsw_cold_ipi_init(unsigned long base, u32 hart_count)
-{
-	/* Setup source priority */
-	uint32_t *priority = (void *)base + PLICSW_PRIORITY_BASE;
-
-	for (int i = 0; i < AE350_HART_COUNT * PLICSW_PENDING_PER_HART; i++)
-		writel(1, &priority[i]);
-
-	/* Setup target enable */
-	uint32_t enable_mask = PLICSW_HART_MASK;
-
-	for (int i = 0; i < AE350_HART_COUNT; i++) {
-		uint32_t *enable = (void *)base + PLICSW_ENABLE_BASE
-			+ PLICSW_ENABLE_PER_HART * i;
-		writel(enable_mask, &enable[0]);
-		enable_mask >>= 1;
-	}
-
-	/* Figure-out PLICSW IPI register address */
-	plicsw_ipi_hart_count = hart_count;
-
-	for (u32 hartid = 0; hartid < AE350_HART_COUNT; hartid++) {
-		plicsw_dev[hartid].source_id = 0;
-		plicsw_dev[hartid].plicsw_pending =
-			(void *)base
-			+ PLICSW_PENDING_BASE
-			+ ((hartid / 4) * 4);
-		plicsw_dev[hartid].plicsw_enable  =
-			(void *)base
-			+ PLICSW_ENABLE_BASE
-			+ PLICSW_ENABLE_PER_HART * hartid;
-		plicsw_dev[hartid].plicsw_claim   =
-			(void *)base
-			+ PLICSW_CONTEXT_BASE
-			+ PLICSW_CONTEXT_CLAIM
-			+ PLICSW_CONTEXT_PER_HART * hartid;
-	}
-
-	return 0;
-}
diff --git a/platform/andes/ae350/plicsw.h b/platform/andes/ae350/plicsw.h
deleted file mode 100644
index 58728f629d2..00000000000
--- a/platform/andes/ae350/plicsw.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-#ifndef _AE350_PLICSW_H_
-#define _AE350_PLICSW_H_
-
-#define PLICSW_PRIORITY_BASE		0x4
-
-#define PLICSW_PENDING_BASE		0x1000
-#define PLICSW_PENDING_PER_HART		0x8
-
-#define PLICSW_ENABLE_BASE		0x2000
-#define PLICSW_ENABLE_PER_HART		0x80
-
-#define PLICSW_CONTEXT_BASE		0x200000
-#define PLICSW_CONTEXT_PER_HART		0x1000
-#define PLICSW_CONTEXT_CLAIM		0x4
-
-#define PLICSW_HART_MASK		0x80808080
-
-struct plicsw {
-	u32 source_id;
-
-	volatile uint32_t *plicsw_pending;
-	volatile uint32_t *plicsw_enable;
-	volatile uint32_t *plicsw_claim;
-};
-
-void plicsw_ipi_send(u32 target_hart);
-
-void plicsw_ipi_clear(u32 target_hart);
-
-int plicsw_warm_ipi_init(void);
-
-int plicsw_cold_ipi_init(unsigned long base, u32 hart_count);
-
-#endif /* _AE350_PLICSW_H_ */

From c8683c57f62c00e84ea66a5354a29ffcfec2a9eb Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:51 +0800
Subject: [PATCH 1095/1765] platform: andes/ae350: Add AE350 domain support

Add domains_init platform hook for Andes AE350, users can add domain
description in device tree and select FDT domain support in Kconfig
to achieve system-level partitioning.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/platform.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
index 30e46062b61..d36d11ee841 100644
--- a/platform/andes/ae350/platform.c
+++ b/platform/andes/ae350/platform.c
@@ -19,13 +19,14 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_trap.h>
-#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/reset/fdt_reset.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/timer/fdt_timer.h>
-#include <sbi_utils/ipi/fdt_ipi.h>
 #include "platform.h"
 #include "cache.h"
 
@@ -84,6 +85,7 @@ static int ae350_final_init(bool cold_boot)
 
 	fdt = fdt_get_address();
 	fdt_fixups(fdt);
+	fdt_domain_fixup(fdt);
 
 	return 0;
 }
@@ -132,10 +134,17 @@ static int ae350_vendor_ext_provider(long extid, long funcid,
 	return ret;
 }
 
+static int ae350_domains_init(void)
+{
+	return fdt_domains_populate(fdt_get_address());
+}
+
 /* Platform descriptor. */
 const struct sbi_platform_operations platform_ops = {
 	.final_init = ae350_final_init,
 
+	.domains_init = ae350_domains_init,
+
 	.console_init = fdt_serial_init,
 
 	.irqchip_init = fdt_irqchip_init,

From d682a0afa1bc4d1491e1017a19a6320c90a5109c Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 14 Oct 2022 08:32:52 +0800
Subject: [PATCH 1096/1765] docs: andes-ae350.md: Update ae350 documentation
 for fdt driver support

We update ae350 documentation to add details about platform device tree.
The nodes and their properties must be provided to properly initialize
data of underlying hardware and access their mmio registers.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/andes-ae350.md | 184 ++++++++++++++++++++++++++++++++++-
 1 file changed, 180 insertions(+), 4 deletions(-)

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index 1cf83cf7fe8..ec241ec374a 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -18,13 +18,189 @@ The Andes AE350 platform does not have any platform-specific options.
 Building Andes AE350 Platform
 -----------------------------
 
-To use Linux v5.2 should be used to build Andes AE350 OpenSBI binaries by using
-the compile time option FW_FDT_PATH.
-
-AE350's dts is included in https://github.com/andestech/linux/tree/ast-v3_2_0-release-public
+AE350's dts is included in https://github.com/andestech/linux/tree/RISCV-Linux-5.4-ast-v5_1_0-branch
 
 **Linux Kernel Payload**
 
 ```
 make PLATFORM=andes/ae350 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<ae350.dtb path>
 ```
+
+DTS Example: (Quad-core AX45MP)
+-------------------------------
+
+```
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <60000000>;
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			riscv,priv-major = <1>;
+			riscv,priv-minor = <10>;
+			mmu-type = "riscv,sv48";
+			clock-frequency = <60000000>;
+			i-cache-size = <0x8000>;
+			i-cache-sets = <256>;
+			i-cache-line-size = <64>;
+			i-cache-block-size = <64>;
+			d-cache-size = <0x8000>;
+			d-cache-sets = <128>;
+			d-cache-line-size = <64>;
+			d-cache-block-size = <64>;
+			next-level-cache = <&L2>;
+			CPU0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+			};
+		};
+		CPU1: cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			riscv,priv-major = <1>;
+			riscv,priv-minor = <10>;
+			mmu-type = "riscv,sv48";
+			clock-frequency = <60000000>;
+			i-cache-size = <0x8000>;
+			i-cache-sets = <256>;
+			i-cache-line-size = <64>;
+			i-cache-block-size = <64>;
+			d-cache-size = <0x8000>;
+			d-cache-sets = <128>;
+			d-cache-line-size = <64>;
+			d-cache-block-size = <64>;
+			next-level-cache = <&L2>;
+			CPU1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+			};
+		};
+		CPU2: cpu@2 {
+			device_type = "cpu";
+			reg = <2>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			riscv,priv-major = <1>;
+			riscv,priv-minor = <10>;
+			mmu-type = "riscv,sv48";
+			clock-frequency = <60000000>;
+			i-cache-size = <0x8000>;
+			i-cache-sets = <256>;
+			i-cache-line-size = <64>;
+			i-cache-block-size = <64>;
+			d-cache-size = <0x8000>;
+			d-cache-sets = <128>;
+			d-cache-line-size = <64>;
+			d-cache-block-size = <64>;
+			next-level-cache = <&L2>;
+			CPU2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+			};
+		};
+		CPU3: cpu@3 {
+			device_type = "cpu";
+			reg = <3>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdc";
+			riscv,priv-major = <1>;
+			riscv,priv-minor = <10>;
+			mmu-type = "riscv,sv48";
+			clock-frequency = <60000000>;
+			i-cache-size = <0x8000>;
+			i-cache-sets = <256>;
+			i-cache-line-size = <64>;
+			i-cache-block-size = <64>;
+			d-cache-size = <0x8000>;
+			d-cache-sets = <128>;
+			d-cache-line-size = <64>;
+			d-cache-block-size = <64>;
+			next-level-cache = <&L2>;
+			CPU3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+			};
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "andestech,riscv-ae350-soc", "simple-bus";
+		ranges;
+
+		plic0: interrupt-controller@e4000000 {
+			compatible = "riscv,plic0";
+			reg = <0x00000000 0xe4000000 0x00000000 0x02000000>;
+			interrupts-extended = < &CPU0_intc 11 &CPU0_intc 9
+			                        &CPU1_intc 11 &CPU1_intc 9
+			                        &CPU2_intc 11 &CPU2_intc 9
+			                        &CPU3_intc 11 &CPU3_intc 9 >;
+			interrupt-controller;
+			#address-cells = <2>;
+			#interrupt-cells = <2>;
+			riscv,ndev = <71>;
+		};
+
+		plicsw: interrupt-controller@e6400000 {
+			compatible = "andestech,plicsw";
+			reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
+			interrupts-extended = < &CPU0_intc 3
+			                        &CPU1_intc 3
+			                        &CPU2_intc 3
+			                        &CPU3_intc 3 >;
+			interrupt-controller;
+			#address-cells = <2>;
+			#interrupt-cells = <2>;
+		};
+
+		plmt0: plmt0@e6000000 {
+			compatible = "andestech,plmt0";
+			reg = <0x00000000 0xe6000000 0x00000000 0x00100000>;
+			interrupts-extended = < &CPU0_intc 7
+			                        &CPU1_intc 7
+			                        &CPU2_intc 7
+			                        &CPU3_intc 7 >;
+		};
+
+		wdt: wdt@f0500000 {
+			compatible = "andestech,atcwdt200";
+			reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
+			interrupts = <3 4>;
+			interrupt-parent = <&plic0>;
+			clock-frequency = <15000000>;
+		};
+
+		serial0: serial@f0300000 {
+			compatible = "andestech,uart16550", "ns16550a";
+			reg = <0x00000000 0xf0300000 0x00000000 0x00001000>;
+			interrupts = <9 4>;
+			interrupt-parent = <&plic0>;
+			clock-frequency = <19660800>;
+			current-speed = <38400>;
+			reg-shift = <2>;
+			reg-offset = <32>;
+			reg-io-width = <4>;
+			no-loopback-test = <1>;
+		};
+
+		smu: smu@f0100000 {
+			compatible = "andestech,atcsmu";
+			reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
+		};
+	};
+```

From 0fee0bf826b86ceb05b04d82ddaa0d6eaf6713ba Mon Sep 17 00:00:00 2001
From: Tan En De <ende.tan@linux.starfivetech.com>
Date: Thu, 13 Oct 2022 09:26:23 +0800
Subject: [PATCH 1097/1765] Makefile: Add cscope support

Add cscope support so that running `make cscope` will generate/update
cscope files used for source code browsing, while running `make
distclean` will remove the cscope files.

Also add entry in .gitignore to ignore generated cscope files.

Signed-off-by: Tan En De <ende.tan@linux.starfivetech.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 .gitignore |  1 +
 Makefile   | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/.gitignore b/.gitignore
index 534ad6477c7..95692bb4acb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -9,3 +9,4 @@ install/
 
 # Development friendly files
 tags
+cscope*
diff --git a/Makefile b/Makefile
index 0ab9f223762..4b175a03fae 100644
--- a/Makefile
+++ b/Makefile
@@ -623,6 +623,17 @@ install_firmwares: $(platform_build_dir)/lib/libplatsbi.a $(build_dir)/lib/libsb
 install_docs: $(build_dir)/docs/latex/refman.pdf
 	$(call inst_file,$(install_root_dir)/$(install_docs_path)/refman.pdf,$(build_dir)/docs/latex/refman.pdf)
 
+.PHONY: cscope
+cscope:
+	$(CMD_PREFIX)find \
+		"$(src_dir)/firmware" \
+		"$(src_dir)/include" \
+		"$(src_dir)/lib" \
+		"$(platform_src_dir)" \
+	-name "*.[chS]" -print > cscope.files
+	$(CMD_PREFIX)echo "$(KCONFIG_AUTOHEADER)" >> cscope.files
+	$(CMD_PREFIX)cscope -bkq -i cscope.files -f cscope.out
+
 # Rule for "make clean"
 .PHONY: clean
 clean:
@@ -652,6 +663,8 @@ ifeq ($(install_root_dir),$(install_root_dir_default)/usr)
 	$(if $(V), @echo " RM        $(install_root_dir_default)")
 	$(CMD_PREFIX)rm -rf $(install_root_dir_default)
 endif
+	$(if $(V), @echo " RM        $(src_dir)/cscope*")
+	$(CMD_PREFIX)rm -f $(src_dir)/cscope*
 
 .PHONY: FORCE
 FORCE:

From 51acd4956aebe7c338eb456c1a380df164895749 Mon Sep 17 00:00:00 2001
From: Yangjie Zhang <pyjmstr@gmail.com>
Date: Thu, 20 Oct 2022 22:41:08 +0800
Subject: [PATCH 1098/1765] docs/firmware: update the document

Since
commit 9c07c513aa9b ("firmware:Remove FW_PAYLOAD_FDT_PATH compile-time option"),
the section where FDT would be embedded in has changed from *.text* to *.rodata*,
but some places in fw_payload.md and fw.md are still *.text*.
This patch updates the document.

Signed-off-by: Yangjie Zhang <pyjmstr@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw.md         | 2 +-
 docs/firmware/fw_payload.md | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 5a678487d02..18faaa9e27e 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -53,7 +53,7 @@ the booting stage to follow OpenSBI firmware.
 A *FW_PAYLOAD* firmware is also useful for cases where the booting stage prior
 to OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In such
 case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree in the
-.text section of the final firmware.
+.rodata section of the final firmware.
 
 Firmware Configuration and Compilation
 --------------------------------------
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 3bb918f5512..3d50ddcd6f7 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -12,7 +12,7 @@ firmware and the booting stage to follow OpenSBI firmware.
 A *FW_PAYLOAD* firmware is also useful for cases where the booting stage prior
 to the OpenSBI firmware does not pass a *flattened device tree (FDT file)*. In
 such a case, a *FW_PAYLOAD* firmware allows embedding a flattened device tree
-in the .text section of the final firmware.
+in the .rodata section of the final firmware.
 
 Enabling *FW_PAYLOAD* compilation
 ---------------------------------

From 9d54f431e803342218561faa6b4649bbdcea1d24 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Tue, 11 Oct 2022 00:34:43 +0800
Subject: [PATCH 1099/1765] Makefile: Add rules for carray sources in lib/sbi

Add back the missing rules needed to build carray files in lib/sbi. This
allows future usage of carray in lib/sbi.

Fixes: de80e9337d81 ("Makefile: Compile lib/utils sources separately for each platform")
Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Makefile b/Makefile
index 4b175a03fae..8db6eabe9fd 100644
--- a/Makefile
+++ b/Makefile
@@ -478,6 +478,13 @@ $(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 $(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
+$(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
+	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
+
+$(build_dir)/%.c: $(src_dir)/%.carray
+	$(call compile_carray,$@,$<)
+
 $(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
 	$(call compile_cc_dep,$@,$<)
 

From 56bed1a0fe39cc788452202827ab5fdc3c58bc20 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Tue, 11 Oct 2022 00:34:44 +0800
Subject: [PATCH 1100/1765] lib: sbi_ecall: Generate extensions list with
 carray

Instead of hard-coding the list of extensions in C code, use carray to
generate the list of extensions.

Using carray makes adding and removing extensions slightly cleaner. This
also paves the way for using Kconfig to disable unneeded extensions.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall.h       | 10 ---------
 lib/sbi/objects.mk            | 22 ++++++++++++++++----
 lib/sbi/sbi_ecall.c           | 39 ++++++++++-------------------------
 lib/sbi/sbi_ecall_exts.carray |  3 +++
 4 files changed, 32 insertions(+), 42 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_exts.carray

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 046a56a5993..ff9bf8e2b43 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -31,16 +31,6 @@ struct sbi_ecall_extension {
 		       struct sbi_trap_info *out_trap);
 };
 
-extern struct sbi_ecall_extension ecall_base;
-extern struct sbi_ecall_extension ecall_legacy;
-extern struct sbi_ecall_extension ecall_time;
-extern struct sbi_ecall_extension ecall_rfence;
-extern struct sbi_ecall_extension ecall_ipi;
-extern struct sbi_ecall_extension ecall_vendor;
-extern struct sbi_ecall_extension ecall_hsm;
-extern struct sbi_ecall_extension ecall_srst;
-extern struct sbi_ecall_extension ecall_pmu;
-
 u16 sbi_ecall_version_major(void);
 
 u16 sbi_ecall_version_minor(void);
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 1ed198346f6..fa20b7b0cdb 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -12,17 +12,31 @@ libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
 
-libsbi-objs-y += sbi_bitmap.o
-libsbi-objs-y += sbi_bitops.o
-libsbi-objs-y += sbi_console.o
-libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_ecall.o
+libsbi-objs-y += sbi_ecall_exts.o
+
+# The order of below extensions is performance optimized
+carray-sbi_ecall_exts-y += ecall_time
+carray-sbi_ecall_exts-y += ecall_rfence
+carray-sbi_ecall_exts-y += ecall_ipi
+carray-sbi_ecall_exts-y += ecall_base
+carray-sbi_ecall_exts-y += ecall_hsm
+carray-sbi_ecall_exts-y += ecall_srst
+carray-sbi_ecall_exts-y += ecall_pmu
+carray-sbi_ecall_exts-y += ecall_legacy
+carray-sbi_ecall_exts-y += ecall_vendor
+
 libsbi-objs-y += sbi_ecall_base.o
 libsbi-objs-y += sbi_ecall_hsm.o
 libsbi-objs-y += sbi_ecall_legacy.o
 libsbi-objs-y += sbi_ecall_pmu.o
 libsbi-objs-y += sbi_ecall_replace.o
 libsbi-objs-y += sbi_ecall_vendor.o
+
+libsbi-objs-y += sbi_bitmap.o
+libsbi-objs-y += sbi_bitops.o
+libsbi-objs-y += sbi_console.o
+libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hart.o
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index ce021eba7d9..25dd78c4015 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -13,6 +13,9 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_trap.h>
 
+extern struct sbi_ecall_extension *sbi_ecall_exts[];
+extern unsigned long sbi_ecall_exts_size;
+
 u16 sbi_ecall_version_major(void)
 {
 	return SBI_ECALL_VERSION_MAJOR;
@@ -144,35 +147,15 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 int sbi_ecall_init(void)
 {
 	int ret;
+	struct sbi_ecall_extension *ext;
+	unsigned long i;
 
-	/* The order of below registrations is performance optimized */
-	ret = sbi_ecall_register_extension(&ecall_time);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_rfence);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_ipi);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_base);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_hsm);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_srst);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_pmu);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_legacy);
-	if (ret)
-		return ret;
-	ret = sbi_ecall_register_extension(&ecall_vendor);
-	if (ret)
-		return ret;
+	for (i = 0; i < sbi_ecall_exts_size; i++) {
+		ext = sbi_ecall_exts[i];
+		ret = sbi_ecall_register_extension(ext);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
diff --git a/lib/sbi/sbi_ecall_exts.carray b/lib/sbi/sbi_ecall_exts.carray
new file mode 100644
index 00000000000..710e3edc64b
--- /dev/null
+++ b/lib/sbi/sbi_ecall_exts.carray
@@ -0,0 +1,3 @@
+HEADER: sbi/sbi_ecall.h
+TYPE: struct sbi_ecall_extension
+NAME: sbi_ecall_exts

From 22f38ee6c658a660083aa45c4ec6c72f66a17260 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Tue, 11 Oct 2022 00:34:45 +0800
Subject: [PATCH 1101/1765] lib: sbi_ecall: Add Kconfig option for each
 extension

For each SBI extension, we:

- Add a Kconfig option for it
- Add the extension to sbi_ecall_exts only if the extension is enabled
- Add the corresponding sbi_ecall_* object file only if the extension is
  enabled

Special cases are as follows:

- The legacy extensions are lumped together as one 'big' extension, as
  has always been the case in OpenSBI code.
- The platform-defined vendor extensions are regarded as one extension.
- The Base extension cannot be disabled.
- sbi_ecall_replace implements multiple extensions, so it's not easy to
  avoid linking it in. Enable it always, and use #ifdef to
  disable/enable individual extensions.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Kconfig                     |  2 ++
 lib/sbi/Kconfig             | 37 +++++++++++++++++++++++++++++++++++++
 lib/sbi/objects.mk          | 24 ++++++++++++------------
 lib/sbi/sbi_ecall_replace.c |  8 ++++++++
 4 files changed, 59 insertions(+), 12 deletions(-)
 create mode 100644 lib/sbi/Kconfig

diff --git a/Kconfig b/Kconfig
index b3213a993bc..acfc1388874 100644
--- a/Kconfig
+++ b/Kconfig
@@ -18,6 +18,8 @@ menu "Platform Options"
 source "$(OPENSBI_PLATFORM_SRC_DIR)/Kconfig"
 endmenu
 
+source "$(OPENSBI_SRC_DIR)/lib/sbi/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/firmware/Kconfig"
diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
new file mode 100644
index 00000000000..df74bba3854
--- /dev/null
+++ b/lib/sbi/Kconfig
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "SBI Extension Support"
+
+config SBI_ECALL_TIME
+	bool "Timer extension"
+	default y
+
+config SBI_ECALL_RFENCE
+	bool "RFENCE extension"
+	default y
+
+config SBI_ECALL_IPI
+	bool "IPI extension"
+	default y
+
+config SBI_ECALL_HSM
+	bool "Hart State Management extension"
+	default y
+
+config SBI_ECALL_SRST
+	bool "System Reset extension"
+	default y
+
+config SBI_ECALL_PMU
+	bool "Performance Monitoring Unit extension"
+	default y
+
+config SBI_ECALL_LEGACY
+	bool "SBI v0.1 legacy extensions"
+	default y
+
+config SBI_ECALL_VENDOR
+	bool "Platform-defined vendor extensions"
+	default y
+
+endmenu
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index fa20b7b0cdb..783c46d5e2f 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -16,22 +16,22 @@ libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_exts.o
 
 # The order of below extensions is performance optimized
-carray-sbi_ecall_exts-y += ecall_time
-carray-sbi_ecall_exts-y += ecall_rfence
-carray-sbi_ecall_exts-y += ecall_ipi
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_TIME) += ecall_time
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_RFENCE) += ecall_rfence
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_IPI) += ecall_ipi
 carray-sbi_ecall_exts-y += ecall_base
-carray-sbi_ecall_exts-y += ecall_hsm
-carray-sbi_ecall_exts-y += ecall_srst
-carray-sbi_ecall_exts-y += ecall_pmu
-carray-sbi_ecall_exts-y += ecall_legacy
-carray-sbi_ecall_exts-y += ecall_vendor
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_HSM) += ecall_hsm
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SRST) += ecall_srst
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_PMU) += ecall_pmu
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_VENDOR) += ecall_vendor
 
 libsbi-objs-y += sbi_ecall_base.o
-libsbi-objs-y += sbi_ecall_hsm.o
-libsbi-objs-y += sbi_ecall_legacy.o
-libsbi-objs-y += sbi_ecall_pmu.o
+libsbi-objs-$(CONFIG_SBI_ECALL_HSM) += sbi_ecall_hsm.o
+libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
+libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
 libsbi-objs-y += sbi_ecall_replace.o
-libsbi-objs-y += sbi_ecall_vendor.o
+libsbi-objs-$(CONFIG_SBI_ECALL_VENDOR) += sbi_ecall_vendor.o
 
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_replace.c
index 93f44da4f58..0ea00d66893 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_replace.c
@@ -19,6 +19,7 @@
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
 
+#ifdef CONFIG_SBI_ECALL_TIME
 static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
 				  const struct sbi_trap_regs *regs,
 				  unsigned long *out_val,
@@ -43,7 +44,9 @@ struct sbi_ecall_extension ecall_time = {
 	.extid_end = SBI_EXT_TIME,
 	.handle = sbi_ecall_time_handler,
 };
+#endif
 
+#ifdef CONFIG_SBI_ECALL_RFENCE
 static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 				    const struct sbi_trap_regs *regs,
 				    unsigned long *out_val,
@@ -113,7 +116,9 @@ struct sbi_ecall_extension ecall_rfence = {
 	.extid_end = SBI_EXT_RFENCE,
 	.handle = sbi_ecall_rfence_handler,
 };
+#endif
 
+#ifdef CONFIG_SBI_ECALL_IPI
 static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
 				 const struct sbi_trap_regs *regs,
 				 unsigned long *out_val,
@@ -134,7 +139,9 @@ struct sbi_ecall_extension ecall_ipi = {
 	.extid_end = SBI_EXT_IPI,
 	.handle = sbi_ecall_ipi_handler,
 };
+#endif
 
+#ifdef CONFIG_SBI_ECALL_SRST
 static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 				  const struct sbi_trap_regs *regs,
 				  unsigned long *out_val,
@@ -194,3 +201,4 @@ struct sbi_ecall_extension ecall_srst = {
 	.handle = sbi_ecall_srst_handler,
 	.probe = sbi_ecall_srst_probe,
 };
+#endif

From 85cf56c159f6c955bf3616271cb1ce9c946bc9ad Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 31 Oct 2022 19:21:44 +0800
Subject: [PATCH 1102/1765] lib: utils/fdt: Remove redundant code

uart->reg_offset and uart->reg_io_width are only used on uart8250 and
not required on other platforms. Remove for sifive and gaisler.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index d390436c9a9..cdd0b35a685 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -25,10 +25,6 @@
 
 #define DEFAULT_SIFIVE_UART_FREQ		0
 #define DEFAULT_SIFIVE_UART_BAUD		115200
-#define DEFAULT_SIFIVE_UART_REG_SHIFT		0
-#define DEFAULT_SIFIVE_UART_REG_IO_WIDTH	4
-
-#define DEFAULT_GAISLER_UART_REG_IO_WIDTH	4
 
 #define DEFAULT_SHAKTI_UART_FREQ		50000000
 #define DEFAULT_SHAKTI_UART_BAUD		115200
@@ -363,10 +359,6 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 	if (rc)
 		return rc;
 
-	/* For Gaisler APBUART, the reg-shift and reg-io-width are fixed .*/
-	uart->reg_shift	   = DEFAULT_UART_REG_SHIFT;
-	uart->reg_io_width = DEFAULT_GAISLER_UART_REG_IO_WIDTH;
-
 	return 0;
 }
 
@@ -394,10 +386,6 @@ int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 	if (rc)
 		return rc;
 
-	/* For SiFive UART, the reg-shift and reg-io-width are fixed .*/
-	uart->reg_shift = DEFAULT_SIFIVE_UART_REG_SHIFT;
-	uart->reg_io_width = DEFAULT_SIFIVE_UART_REG_IO_WIDTH;
-
 	return 0;
 }
 

From 21ba418f1a3b5e9f9f787073c13b15f2243c3297 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 31 Oct 2022 19:21:45 +0800
Subject: [PATCH 1103/1765] lib: utils/fdt: Simplified code

Simplified fdt_parse_xxx_uart_node which direct call
fdt_parse_uart_node_common.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 31 ++++---------------------------
 1 file changed, 4 insertions(+), 27 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index cdd0b35a685..89b8bbac010 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -350,43 +350,25 @@ static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
 int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart)
 {
-	int rc;
-
-	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
 					DEFAULT_UART_FREQ,
 					DEFAULT_UART_BAUD);
-
-	if (rc)
-		return rc;
-
-	return 0;
 }
 
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
-	int rc;
-
-	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
 					DEFAULT_SHAKTI_UART_FREQ,
 					DEFAULT_SHAKTI_UART_BAUD);
-
-	return rc ? : 0;
 }
 
 int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
-	int rc;
-
-	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
 					DEFAULT_SIFIVE_UART_FREQ,
 					DEFAULT_SIFIVE_UART_BAUD);
-
-	if (rc)
-		return rc;
-
-	return 0;
 }
 
 int fdt_parse_uart_node(void *fdt, int nodeoffset,
@@ -398,7 +380,6 @@ int fdt_parse_uart_node(void *fdt, int nodeoffset,
 	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart,
 					DEFAULT_UART_FREQ,
 					DEFAULT_UART_BAUD);
-
 	if (rc)
 		return rc;
 
@@ -441,11 +422,7 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
-	int rc;
-
-	rc = fdt_parse_uart_node_common(fdt, nodeoffset, uart, 0, 0);
-
-	return rc ? : 0;
+	return fdt_parse_uart_node_common(fdt, nodeoffset, uart, 0, 0);
 }
 
 int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)

From 8e9966c1a722b4b630bb1f5f3cf6a1f8a4726102 Mon Sep 17 00:00:00 2001
From: zhangdongdong <zhangdongdong@eswincomputing.com>
Date: Tue, 25 Oct 2022 08:57:41 +0800
Subject: [PATCH 1104/1765] docs: fix some typos

Corrected the typos of some documents in the 'docs' folder.

Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/contributing.md          | 2 +-
 docs/firmware/fw_dynamic.md   | 2 +-
 docs/platform/fpga-ariane.md  | 2 +-
 docs/platform/sifive_fu540.md | 2 +-
 docs/platform/thead-c9xx.md   | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index 9c2b3ba2c81..78d909e474c 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -29,7 +29,7 @@ and "top:".
 5. Maintainers should use "Rebase and Merge" when using GitHub to merge pull
 requests to avoid creating unnecessary merge commits.
 6. Maintainers should avoid creating branches directly in the main
-riscv/opensbi repository. Instead prefer using a fork of the riscv/opensbi main
+riscv/opensbi repository. Instead, prefer using a fork of the riscv/opensbi main
 repository and branches within that fork to create pull requests.
 7. A maintainer cannot merge his own pull requests in the riscv/opensbi main
 repository.
diff --git a/docs/firmware/fw_dynamic.md b/docs/firmware/fw_dynamic.md
index e251488074a..9fc8cfa31f9 100644
--- a/docs/firmware/fw_dynamic.md
+++ b/docs/firmware/fw_dynamic.md
@@ -31,6 +31,6 @@ directory.
 *FW_DYNAMIC* Firmware Configuration Options
 -------------------------------------------
 
-The *FW_DYNAMIC* firmware does not requires any platform specific configuration
+The *FW_DYNAMIC* firmware does not require any platform specific configuration
 parameters because all required information is passed by previous booting stage
 at runtime via *struct fw_dynamic_info*.
diff --git a/docs/platform/fpga-ariane.md b/docs/platform/fpga-ariane.md
index f95001fb323..9b1e15667f2 100644
--- a/docs/platform/fpga-ariane.md
+++ b/docs/platform/fpga-ariane.md
@@ -7,7 +7,7 @@ Linux.
 
 The FPGA SoC currently contains the following peripherals:
 - DDR3 memory controller
-- SPI controller to conncet to an SDCard
+- SPI controller to connect to an SDCard
 - Ethernet controller
 - JTAG port (see debugging section below)
 - Bootrom containing zero stage bootloader and device tree.
diff --git a/docs/platform/sifive_fu540.md b/docs/platform/sifive_fu540.md
index 5cbca21acc2..3dc1d281440 100644
--- a/docs/platform/sifive_fu540.md
+++ b/docs/platform/sifive_fu540.md
@@ -150,7 +150,7 @@ If you want to test OpenSBI with QEMU 'sifive_u' machine, please follow the
 same instructions above, with the exception of not passing FW_FDT_PATH.
 
 This is because QEMU generates a device tree blob on the fly based on the
-command line parameters and it's compatible with the one used in the upstream
+command line parameters, and it's compatible with the one used in the upstream
 Linux kernel.
 
 When U-Boot v2021.07 (or higher) is used as the payload, as the SiFive FU540
diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index ced784d13f7..8bb9e91f1a9 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -13,7 +13,7 @@ Platform Options
 ----------------
 
 The *T-HEAD C9xx* does not have any platform-specific compile options
-because it use generic platform.
+because it uses generic platform.
 
 ```
 CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic /usr/bin/make

From 7b29264f11b8ac9aef0df23122feed763f803779 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 8 Nov 2022 17:40:16 +0530
Subject: [PATCH 1105/1765] lib: utils/serial: Fix semihosting compile error
 using LLVM

We fix the following semihosting compile error observed using LLVM:
lib/utils/serial/semihosting.c:158:12: error: result of comparison of constant -1 with expression of type 'char' is always true [-Werror,-Wtautological-constant-out-of-range-compare]
                ret = ch > -1 ? ch : -1;
                      ~~ ^ ~~

Fixes: 7f09fba86e43 ("lib: utils/serial: add semihosting support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/serial/semihosting.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/serial/semihosting.c b/lib/utils/serial/semihosting.c
index 5012fa12b8f..86fa296ce17 100644
--- a/lib/utils/serial/semihosting.c
+++ b/lib/utils/serial/semihosting.c
@@ -154,8 +154,8 @@ static int semihosting_getc(void)
 	int ret;
 
 	if (semihosting_infd < 0)  {
-		ch = semihosting_trap(SYSREADC, NULL);
-		ret = ch > -1 ? ch : -1;
+		ret = semihosting_trap(SYSREADC, NULL);
+		ret = ret < 0 ? -1 : ret;
 	} else
 		ret = semihosting_read(semihosting_infd, &ch, 1) > 0 ? ch : -1;
 

From 14f5c4cb4d2b9a5839a156c957f77a19a2f3eda7 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Wed, 9 Nov 2022 14:53:37 +0800
Subject: [PATCH 1106/1765] lib: sbi_ecall: Split up sbi_ecall_replace

Split up sbi_ecall_replace so that each extension is in its individual
file.

Also reorganize the corresponding section in lib/sbi/objects.mk so
that it is grouped by extension, now that the object file targets are
split up.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/objects.mk                            |  22 +++-
 lib/sbi/sbi_ecall_ipi.c                       |  36 ++++++
 ...sbi_ecall_replace.c => sbi_ecall_rfence.c} | 122 +-----------------
 lib/sbi/sbi_ecall_srst.c                      |  75 +++++++++++
 lib/sbi/sbi_ecall_time.c                      |  40 ++++++
 5 files changed, 169 insertions(+), 126 deletions(-)
 create mode 100644 lib/sbi/sbi_ecall_ipi.c
 rename lib/sbi/{sbi_ecall_replace.c => sbi_ecall_rfence.c} (50%)
 create mode 100644 lib/sbi/sbi_ecall_srst.c
 create mode 100644 lib/sbi/sbi_ecall_time.c

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 783c46d5e2f..c774ebbcd14 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -17,20 +17,30 @@ libsbi-objs-y += sbi_ecall_exts.o
 
 # The order of below extensions is performance optimized
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_TIME) += ecall_time
+libsbi-objs-$(CONFIG_SBI_ECALL_TIME) += sbi_ecall_time.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_RFENCE) += ecall_rfence
+libsbi-objs-$(CONFIG_SBI_ECALL_RFENCE) += sbi_ecall_rfence.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_IPI) += ecall_ipi
+libsbi-objs-$(CONFIG_SBI_ECALL_IPI) += sbi_ecall_ipi.o
+
 carray-sbi_ecall_exts-y += ecall_base
+libsbi-objs-y += sbi_ecall_base.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_HSM) += ecall_hsm
+libsbi-objs-$(CONFIG_SBI_ECALL_HSM) += sbi_ecall_hsm.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SRST) += ecall_srst
+libsbi-objs-$(CONFIG_SBI_ECALL_SRST) += sbi_ecall_srst.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_PMU) += ecall_pmu
-carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
-carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_VENDOR) += ecall_vendor
+libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
 
-libsbi-objs-y += sbi_ecall_base.o
-libsbi-objs-$(CONFIG_SBI_ECALL_HSM) += sbi_ecall_hsm.o
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
 libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
-libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
-libsbi-objs-y += sbi_ecall_replace.o
+
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_VENDOR) += ecall_vendor
 libsbi-objs-$(CONFIG_SBI_ECALL_VENDOR) += sbi_ecall_vendor.o
 
 libsbi-objs-y += sbi_bitmap.o
diff --git a/lib/sbi/sbi_ecall_ipi.c b/lib/sbi/sbi_ecall_ipi.c
new file mode 100644
index 00000000000..f4797e117a3
--- /dev/null
+++ b/lib/sbi/sbi_ecall_ipi.c
@@ -0,0 +1,36 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_ipi.h>
+
+static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
+				 const struct sbi_trap_regs *regs,
+				 unsigned long *out_val,
+				 struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_IPI_SEND_IPI)
+		ret = sbi_ipi_send_smode(regs->a0, regs->a1);
+	else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_ipi = {
+	.extid_start = SBI_EXT_IPI,
+	.extid_end = SBI_EXT_IPI,
+	.handle = sbi_ecall_ipi_handler,
+};
diff --git a/lib/sbi/sbi_ecall_replace.c b/lib/sbi/sbi_ecall_rfence.c
similarity index 50%
rename from lib/sbi/sbi_ecall_replace.c
rename to lib/sbi/sbi_ecall_rfence.c
index 0ea00d66893..8f0e3d7bacf 100644
--- a/lib/sbi/sbi_ecall_replace.c
+++ b/lib/sbi/sbi_ecall_rfence.c
@@ -9,44 +9,12 @@
  */
 
 #include <sbi/riscv_asm.h>
+#include <sbi/sbi_error.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_ipi.h>
-#include <sbi/sbi_system.h>
-#include <sbi/sbi_timer.h>
-#include <sbi/sbi_tlb.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_tlb.h>
 
-#ifdef CONFIG_SBI_ECALL_TIME
-static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-
-	if (funcid == SBI_EXT_TIME_SET_TIMER) {
-#if __riscv_xlen == 32
-		sbi_timer_event_start((((u64)regs->a1 << 32) | (u64)regs->a0));
-#else
-		sbi_timer_event_start((u64)regs->a0);
-#endif
-	} else
-		ret = SBI_ENOTSUPP;
-
-	return ret;
-}
-
-struct sbi_ecall_extension ecall_time = {
-	.extid_start = SBI_EXT_TIME,
-	.extid_end = SBI_EXT_TIME,
-	.handle = sbi_ecall_time_handler,
-};
-#endif
-
-#ifdef CONFIG_SBI_ECALL_RFENCE
 static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 				    const struct sbi_trap_regs *regs,
 				    unsigned long *out_val,
@@ -116,89 +84,3 @@ struct sbi_ecall_extension ecall_rfence = {
 	.extid_end = SBI_EXT_RFENCE,
 	.handle = sbi_ecall_rfence_handler,
 };
-#endif
-
-#ifdef CONFIG_SBI_ECALL_IPI
-static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
-				 const struct sbi_trap_regs *regs,
-				 unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-
-	if (funcid == SBI_EXT_IPI_SEND_IPI)
-		ret = sbi_ipi_send_smode(regs->a0, regs->a1);
-	else
-		ret = SBI_ENOTSUPP;
-
-	return ret;
-}
-
-struct sbi_ecall_extension ecall_ipi = {
-	.extid_start = SBI_EXT_IPI,
-	.extid_end = SBI_EXT_IPI,
-	.handle = sbi_ecall_ipi_handler,
-};
-#endif
-
-#ifdef CONFIG_SBI_ECALL_SRST
-static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
-{
-	if (funcid == SBI_EXT_SRST_RESET) {
-		if ((((u32)-1U) <= ((u64)regs->a0)) ||
-		    (((u32)-1U) <= ((u64)regs->a1)))
-			return SBI_EINVAL;
-
-		switch (regs->a0) {
-		case SBI_SRST_RESET_TYPE_SHUTDOWN:
-		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
-		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
-			break;
-		default:
-			return SBI_EINVAL;
-		}
-
-		switch (regs->a1) {
-		case SBI_SRST_RESET_REASON_NONE:
-		case SBI_SRST_RESET_REASON_SYSFAIL:
-			break;
-		default:
-			return SBI_EINVAL;
-		}
-
-		if (sbi_system_reset_supported(regs->a0, regs->a1))
-			sbi_system_reset(regs->a0, regs->a1);
-	}
-
-	return SBI_ENOTSUPP;
-}
-
-static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
-{
-	u32 type, count = 0;
-
-	/*
-	 * At least one standard reset types should be supported by
-	 * the platform for SBI SRST extension to be usable.
-	 */
-
-	for (type = 0; type <= SBI_SRST_RESET_TYPE_LAST; type++) {
-		if (sbi_system_reset_supported(type,
-					SBI_SRST_RESET_REASON_NONE))
-			count++;
-	}
-
-	*out_val = (count) ? 1 : 0;
-	return 0;
-}
-
-struct sbi_ecall_extension ecall_srst = {
-	.extid_start = SBI_EXT_SRST,
-	.extid_end = SBI_EXT_SRST,
-	.handle = sbi_ecall_srst_handler,
-	.probe = sbi_ecall_srst_probe,
-};
-#endif
diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
new file mode 100644
index 00000000000..93b012ce024
--- /dev/null
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -0,0 +1,75 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_system.h>
+
+static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	if (funcid == SBI_EXT_SRST_RESET) {
+		if ((((u32)-1U) <= ((u64)regs->a0)) ||
+		    (((u32)-1U) <= ((u64)regs->a1)))
+			return SBI_EINVAL;
+
+		switch (regs->a0) {
+		case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+			break;
+		default:
+			return SBI_EINVAL;
+		}
+
+		switch (regs->a1) {
+		case SBI_SRST_RESET_REASON_NONE:
+		case SBI_SRST_RESET_REASON_SYSFAIL:
+			break;
+		default:
+			return SBI_EINVAL;
+		}
+
+		if (sbi_system_reset_supported(regs->a0, regs->a1))
+			sbi_system_reset(regs->a0, regs->a1);
+	}
+
+	return SBI_ENOTSUPP;
+}
+
+static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
+{
+	u32 type, count = 0;
+
+	/*
+	 * At least one standard reset types should be supported by
+	 * the platform for SBI SRST extension to be usable.
+	 */
+
+	for (type = 0; type <= SBI_SRST_RESET_TYPE_LAST; type++) {
+		if (sbi_system_reset_supported(type,
+					SBI_SRST_RESET_REASON_NONE))
+			count++;
+	}
+
+	*out_val = (count) ? 1 : 0;
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_srst = {
+	.extid_start = SBI_EXT_SRST,
+	.extid_end = SBI_EXT_SRST,
+	.handle = sbi_ecall_srst_handler,
+	.probe = sbi_ecall_srst_probe,
+};
diff --git a/lib/sbi/sbi_ecall_time.c b/lib/sbi/sbi_ecall_time.c
new file mode 100644
index 00000000000..668cb17680c
--- /dev/null
+++ b/lib/sbi/sbi_ecall_time.c
@@ -0,0 +1,40 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ *   Atish Patra <atish.patra@wdc.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_timer.h>
+
+static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+
+	if (funcid == SBI_EXT_TIME_SET_TIMER) {
+#if __riscv_xlen == 32
+		sbi_timer_event_start((((u64)regs->a1 << 32) | (u64)regs->a0));
+#else
+		sbi_timer_event_start((u64)regs->a0);
+#endif
+	} else
+		ret = SBI_ENOTSUPP;
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_time = {
+	.extid_start = SBI_EXT_TIME,
+	.extid_end = SBI_EXT_TIME,
+	.handle = sbi_ecall_time_handler,
+};

From 8e63716c1ce0ff5f8b5c3c2b515a3f1cda21f580 Mon Sep 17 00:00:00 2001
From: Leizheng Zhang <zhangleizheng@eswincomputing.com>
Date: Mon, 21 Nov 2022 16:26:22 +0800
Subject: [PATCH 1107/1765] firmware: payloads: Optimize usage of "ALIGN"

Delete the redundant "ALIGN" and adjust the position of "ALIGN"

Signed-off-by: Leizheng Zhang <zhangleizheng@eswincomputing.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 firmware/fw_base.ldS           | 10 ++++------
 firmware/payloads/test.elf.ldS | 10 ++++------
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 220c043e9d3..563ae252a3d 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -24,14 +24,12 @@
 		PROVIDE(_text_end = .);
 	}
 
-	. = ALIGN(0x1000); /* Ensure next section is page aligned */
-
 	/* End of the code sections */
 
-	/* Beginning of the read-only data sections */
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	/* Beginning of the read-only data sections */
+
 	.rodata :
 	{
 		PROVIDE(_rodata_start = .);
@@ -42,10 +40,10 @@
 
 	/* End of the read-only data sections */
 
-	/* Beginning of the read-write data sections */
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	/* Beginning of the read-write data sections */
+
 	.data :
 	{
 		PROVIDE(_data_start = .);
diff --git a/firmware/payloads/test.elf.ldS b/firmware/payloads/test.elf.ldS
index f3f3242abc8..2328a1b782d 100644
--- a/firmware/payloads/test.elf.ldS
+++ b/firmware/payloads/test.elf.ldS
@@ -33,14 +33,12 @@ SECTIONS
 		PROVIDE(_text_end = .);
 	}
 
-	. = ALIGN(0x1000); /* Ensure next section is page aligned */
-
 	/* End of the code sections */
 
-	/* Beginning of the read-only data sections */
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	/* Beginning of the read-only data sections */
+
 	.rodata :
 	{
 		PROVIDE(_rodata_start = .);
@@ -51,10 +49,10 @@ SECTIONS
 
 	/* End of the read-only data sections */
 
-	/* Beginning of the read-write data sections */
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	/* Beginning of the read-write data sections */
+
 	.data :
 	{
 		PROVIDE(_data_start = .);

From 1b0d71bb9ff9180c4ae0026de5f4a92a88f1884e Mon Sep 17 00:00:00 2001
From: Leizheng Zhang <zhangleizheng@eswincomputing.com>
Date: Fri, 18 Nov 2022 13:20:29 +0800
Subject: [PATCH 1108/1765] platform: generic/allwinner: Remove unused header
 files

Remove "#include <sbi/sbi_console.h>"

Signed-off-by: Leizheng Zhang <zhangleizheng@eswincomputing.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 platform/generic/allwinner/sun20i-d1.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 6a502e5d886..707313b2d1d 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -201,8 +201,6 @@ static int sun20i_d1_final_init(bool cold_boot, const struct fdt_match *match)
 	return 0;
 }
 
-#include <sbi/sbi_console.h>
-
 static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
 {
 	unsigned long mip_val;

From 9a740f5c4655053f4d8c7df65f51ad58cfb1bb2e Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Sat, 19 Nov 2022 16:55:07 +0800
Subject: [PATCH 1109/1765] platform: generic/allwinner: Remove ghostly type
 cast

Corrected the same parameter of writel_relaxed in sun20i_d1_riscv_cfg_init
to be u32 for a while and u64 for a while.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 707313b2d1d..18d330d4c14 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -146,14 +146,14 @@ static void sun20i_d1_riscv_cfg_restore(void)
 
 static void sun20i_d1_riscv_cfg_init(void)
 {
-	unsigned long entry = sbi_hartid_to_scratch(0)->warmboot_addr;
+	u64 entry = sbi_hartid_to_scratch(0)->warmboot_addr;
 
 	/* Enable MMIO access. */
 	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_CCU_BASE + RISCV_CFG_BGR_REG);
 
 	/* Program the reset entry address. */
-	writel_relaxed((u32)entry, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_LO_REG);
-	writel_relaxed((u64)entry >> 32, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_HI_REG);
+	writel_relaxed(entry, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_LO_REG);
+	writel_relaxed(entry >> 32, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_HI_REG);
 }
 
 static int sun20i_d1_hart_suspend(u32 suspend_type)

From ba3202168339e86b5aa28cccf090cfe6d848d88b Mon Sep 17 00:00:00 2001
From: KaDiWa <kalle.wachsmuth@gmail.com>
Date: Mon, 21 Nov 2022 16:59:05 +0100
Subject: [PATCH 1110/1765] Makefile: replace `echo` with `printf` for
 compatibility

I don't know why but `echo -n` didn't work for me. macOS supports
the `-n` option but it doesn't work in the makefile. What it does
instead is it literally writes `-n` to the file and then also
leaves a newline at the end.

I'm using GNU Make 4.4 (`gmake` from Homebrew).

Signed-off-by: KaDiWa <kalle.wachsmuth@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 8db6eabe9fd..98e42fc1718 100644
--- a/Makefile
+++ b/Makefile
@@ -224,7 +224,7 @@ $(KCONFIG_CONFIG): $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG) $(platform_
 
 $(KCONFIG_AUTOCMD): $(KCONFIG_CONFIG)
 	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
-	$(CMD_PREFIX)echo -n "$(KCONFIG_CONFIG): " > $(KCONFIG_AUTOCMD)
+	$(CMD_PREFIX)printf "%s: " $(KCONFIG_CONFIG) > $(KCONFIG_AUTOCMD)
 	$(CMD_PREFIX)cat $(KCONFIG_AUTOLIST) | tr '\n' ' ' >> $(KCONFIG_AUTOCMD)
 
 include $(KCONFIG_CONFIG)

From 49b0e355e6586dbb55bc8bb4d3b073f3e692d765 Mon Sep 17 00:00:00 2001
From: Alejandro Cabrera Aldaya <aldaya@gmail.com>
Date: Tue, 22 Nov 2022 12:28:25 +0200
Subject: [PATCH 1111/1765] Makefile: bugfix for handling platform paths

If the path where this repo is located contains the platform name on
it, the original Makefile replaced its occurrences from the path making
it an invalid path. This commit prevents this behavior replacing only
the last part of the path as intended.

Signed-off-by: Alejandro Cabrera Aldaya <aldaya@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 98e42fc1718..92203c5a2ac 100644
--- a/Makefile
+++ b/Makefile
@@ -47,7 +47,7 @@ ifdef PLATFORM_DIR
     platform_parent_dir=$(platform_dir_path)
   else
     PLATFORM=$(shell basename $(platform_dir_path))
-    platform_parent_dir=$(subst $(PLATFORM),,$(platform_dir_path))
+    platform_parent_dir=$(shell realpath ${platform_dir_path}/..)
   endif
 else
  platform_parent_dir=$(src_dir)/platform

From 74e20293c45634048d2a3ab045e8531bca904818 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 24 Nov 2022 11:16:03 +0800
Subject: [PATCH 1112/1765] lib: sbi: Simplified mmio match checking

We simplify the mmio flag matching in sbi_domain_check_addr().

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index f24a8e5ecaa..fec90742930 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -105,7 +105,7 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
 			   unsigned long access_flags)
 {
-	bool mmio = FALSE;
+	bool rmmio, mmio = FALSE;
 	struct sbi_domain_memregion *reg;
 	unsigned long rstart, rend, rflags, rwx = 0;
 
@@ -130,8 +130,8 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 		rend = (reg->order < __riscv_xlen) ?
 			rstart + ((1UL << reg->order) - 1) : -1UL;
 		if (rstart <= addr && addr <= rend) {
-			if ((mmio && !(rflags & SBI_DOMAIN_MEMREGION_MMIO)) ||
-			    (!mmio && (rflags & SBI_DOMAIN_MEMREGION_MMIO)))
+			rmmio = (rflags & SBI_DOMAIN_MEMREGION_MMIO) ? TRUE : FALSE;
+			if (mmio != rmmio)
 				return FALSE;
 			return ((rflags & rwx) == rwx) ? TRUE : FALSE;
 		}

From fc82e84329760540ec62b257c700025ba37cb7ab Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 24 Nov 2022 11:16:05 +0800
Subject: [PATCH 1113/1765] lib: sbi: Fix is_region_valid()

When order is equal to __riscv_xlen, the shift operation will not perform
any operation, which will cause reg->base & (BIT(reg->order) - 1) to always
be 0, and the condition has not been established.

This patch fixes this bug.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index fec90742930..3302213c1d6 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -146,6 +146,9 @@ static bool is_region_valid(const struct sbi_domain_memregion *reg)
 	if (reg->order < 3 || __riscv_xlen < reg->order)
 		return FALSE;
 
+	if (reg->order == __riscv_xlen && reg->base != 0)
+		return FALSE;
+
 	if (reg->base & (BIT(reg->order) - 1))
 		return FALSE;
 

From f8eec91de8b9221bc2b29f3020ec67d9b46109c7 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:15 +0100
Subject: [PATCH 1114/1765] lib: simplify fdt_parse_plmt_node()

We should not check !plmt_base || !plmt_size twice.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 89b8bbac010..dbd74841dd2 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -814,7 +814,7 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
 				    &reg_addr, &reg_size);
-	if (rc < 0 || !plmt_base || !plmt_size)
+	if (rc < 0)
 		return SBI_ENODEV;
 	*plmt_base = reg_addr;
 	*plmt_size = reg_size;

From cc5418461910dc775249e87091b2c6a3ea8d2cd3 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:16 +0100
Subject: [PATCH 1115/1765] lib: simplify fdt_parse_plicsw_node()

We should not check !plicsw_base || !size twice.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index dbd74841dd2..87b9fb2fca8 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -868,7 +868,7 @@ int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
 				    &reg_addr, &reg_size);
-	if (rc < 0 || !plicsw_base || !size)
+	if (rc < 0)
 		return SBI_ENODEV;
 	*plicsw_base = reg_addr;
 	*size = reg_size;

From e9bc7f175756064cb033097dc039888431cb0e66 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:17 +0100
Subject: [PATCH 1116/1765] lib: fix fdt_parse_plmt_node()

cpu_offset, cpu_intc_offset must be int to discover failed invocations of
fdt_node_offset_by_phandle() or fdt_parent_offset().

After determining cpu_offset we have to check this value and not
cpu_intc_offset.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 87b9fb2fca8..976c96ed3a3 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -805,7 +805,7 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 {
 	const fdt32_t *val;
 	int rc, i, count;
-	uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
+	uint64_t reg_addr, reg_size;
 	u32 phandle, hwirq, hartid, hcount;
 
 	if (nodeoffset < 0 || !fdt || !plmt_base ||
@@ -826,6 +826,8 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 
 	hcount = 0;
 	for (i = 0; i < (count / 2); i++) {
+		int cpu_offset, cpu_intc_offset;
+
 		phandle = fdt32_to_cpu(val[2 * i]);
 		hwirq = fdt32_to_cpu(val[2 * i + 1]);
 
@@ -834,7 +836,7 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 			continue;
 
 		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
-		if (cpu_intc_offset < 0)
+		if (cpu_offset < 0)
 			continue;
 
 		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);

From 5daa0ef0875561e7a9152b5e75e147a3ce8afca7 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:18 +0100
Subject: [PATCH 1117/1765] lib: fix fdt_parse_plicsw_node()

cpu_offset and cpu_intc_offset must be int to detect failed invocations of
fdt_node_offset_by_phandle() or fdt_parent_offset().

After determining cpu_offset we have to check this value and not
cpu_intc_offset.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 976c96ed3a3..674f17bf6a1 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -861,7 +861,7 @@ int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 {
 	const fdt32_t *val;
 	int rc, i, count;
-	uint64_t reg_addr, reg_size, cpu_offset, cpu_intc_offset;
+	uint64_t reg_addr, reg_size;
 	u32 phandle, hwirq, hartid, hcount;
 
 	if (nodeoffset < 0 || !fdt || !plicsw_base ||
@@ -882,6 +882,8 @@ int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 
 	hcount = 0;
 	for (i = 0; i < (count / 2); i++) {
+		int cpu_offset, cpu_intc_offset;
+
 		phandle = fdt32_to_cpu(val[2 * i]);
 		hwirq = fdt32_to_cpu(val[2 * i + 1]);
 
@@ -890,7 +892,7 @@ int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 			continue;
 
 		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
-		if (cpu_intc_offset < 0)
+		if (cpu_offset < 0)
 			continue;
 
 		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);

From 1f6866e0159d0c78279e8a22abe73fb39469597d Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:19 +0100
Subject: [PATCH 1118/1765] lib: simplify fdt_translate_address()

Don't assign a value to offset which is never used.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 674f17bf6a1..43d78576d9b 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -124,7 +124,7 @@ static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
 	int i, rlen;
 	int cell_addr, cell_size;
 	const fdt32_t *ranges;
-	uint64_t offset = 0, caddr = 0, paddr = 0, rsize = 0;
+	uint64_t offset, caddr = 0, paddr = 0, rsize = 0;
 
 	cell_addr = fdt_address_cells(fdt, parent);
 	if (cell_addr < 1)

From ad2ac292635ec48fece67ce62bd7e967d9538616 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 28 Nov 2022 10:14:20 +0100
Subject: [PATCH 1119/1765] lib: fix fdt_parse_aclint_node()

After determining cpu_offset we have to check this variable and not
cpu_intc_offset.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 43d78576d9b..d4b38dc5892 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -772,7 +772,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 			continue;
 
 		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
-		if (cpu_intc_offset < 0)
+		if (cpu_offset < 0)
 			continue;
 
 		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);

From cfbabb9ec6ba4979411ff8050638ac2628806beb Mon Sep 17 00:00:00 2001
From: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Date: Tue, 29 Nov 2022 11:54:07 +0800
Subject: [PATCH 1120/1765] firmware: Minor optimization for relocate

The t3 register stores the address of _load_end. If relocation is not
required, it is unnecessary to calculate the address of _load_end.

This can reduce the operation time of two instructions.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 07be4c4b930..3f622b3b39a 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -128,9 +128,9 @@ _relocate:
 	REG_L	t1, 0(t1)
 	lla	t2, _load_start
 	REG_L	t2, 0(t2)
+	beq	t0, t2, _relocate_done
 	sub	t3, t1, t0
 	add	t3, t3, t2
-	beq	t0, t2, _relocate_done
 	lla	t4, _relocate_done
 	sub	t4, t4, t2
 	add	t4, t4, t0

From a36d455182ea0e34d7372110fea215c74f747da2 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 5 Dec 2022 10:03:57 +0800
Subject: [PATCH 1121/1765] platform: generic/andes: Enable generic platform
 support for AE350

We move andes directory to platform/generic as the necessary fdt
drivers are available, the users can enable the console, timer, ipi,
irqchip and reset devices by adding device tree nodes stated in the
docs/platform/andes-ae350.md.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/andes/ae350/Kconfig           |  34 -----
 platform/andes/ae350/cache.c           |  89 -------------
 platform/andes/ae350/cache.h           |  17 ---
 platform/andes/ae350/configs/defconfig |   0
 platform/andes/ae350/objects.mk        |  40 ------
 platform/andes/ae350/platform.c        | 169 -------------------------
 platform/andes/ae350/platform.h        | 109 ----------------
 platform/generic/Kconfig               |   4 +
 platform/generic/andes/ae350.c         |  21 +++
 platform/generic/andes/objects.mk      |   6 +
 platform/generic/configs/defconfig     |   4 +
 11 files changed, 35 insertions(+), 458 deletions(-)
 delete mode 100644 platform/andes/ae350/Kconfig
 delete mode 100644 platform/andes/ae350/cache.c
 delete mode 100644 platform/andes/ae350/cache.h
 delete mode 100644 platform/andes/ae350/configs/defconfig
 delete mode 100644 platform/andes/ae350/objects.mk
 delete mode 100644 platform/andes/ae350/platform.c
 delete mode 100644 platform/andes/ae350/platform.h
 create mode 100644 platform/generic/andes/ae350.c
 create mode 100644 platform/generic/andes/objects.mk

diff --git a/platform/andes/ae350/Kconfig b/platform/andes/ae350/Kconfig
deleted file mode 100644
index 38e40014323..00000000000
--- a/platform/andes/ae350/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-# SPDX-License-Identifier: BSD-2-Clause
-
-config PLATFORM_ANDES_AE350
-	bool
-	select FDT
-	select FDT_SERIAL
-	select FDT_SERIAL_UART8250
-	select FDT_TIMER
-	select FDT_TIMER_PLMT
-	select FDT_RESET
-	select FDT_RESET_ATCWDT200
-	select FDT_IRQCHIP
-	select FDT_IRQCHIP_PLIC
-	select FDT_IPI
-	select FDT_IPI_PLICSW
-	default y
-
-if PLATFORM_ANDES_AE350
-
-config PLATFORM_ANDES_AE350_NAME
-	string "Platform default name"
-	default "Andes AE350"
-
-config PLATFORM_ANDES_AE350_MAJOR_VER
-	int "Platform major version"
-	range 0 65535
-	default 0
-
-config PLATFORM_ANDES_AE350_MINOR_VER
-	int "Platform minor version"
-	range 0 65535
-	default 1
-
-endif
diff --git a/platform/andes/ae350/cache.c b/platform/andes/ae350/cache.c
deleted file mode 100644
index af724c5c7ff..00000000000
--- a/platform/andes/ae350/cache.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Andes Technology Corporation
- *
- * Authors:
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_types.h>
-#include "platform.h"
-
-uintptr_t mcall_set_mcache_ctl(unsigned long input)
-{
-	csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_MASK);
-	csr_write(CSR_MCACHECTL, input);
-	return 0;
-}
-
-uintptr_t mcall_set_mmisc_ctl(unsigned long input)
-{
-	csr_clear(CSR_MMISCCTL, V5_MMISC_CTL_MASK);
-	csr_write(CSR_MMISCCTL, input);
-	return 0;
-}
-
-uintptr_t mcall_icache_op(unsigned int enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_IC_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_IC_EN);
-		asm volatile("fence.i\n\t");
-	}
-	return 0;
-}
-
-uintptr_t mcall_dcache_op(unsigned int enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_DC_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_DC_EN);
-		csr_write(CSR_MCCTLCOMMAND, V5_UCCTL_L1D_WBINVAL_ALL);
-	}
-	return 0;
-}
-
-uintptr_t mcall_l1_cache_i_prefetch_op(unsigned long enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_L1I_PREFETCH_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_L1I_PREFETCH_EN);
-	}
-	return 0;
-}
-
-uintptr_t mcall_l1_cache_d_prefetch_op(unsigned long enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_L1D_PREFETCH_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_L1D_PREFETCH_EN);
-	}
-	return 0;
-}
-
-uintptr_t mcall_non_blocking_load_store(unsigned long enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MMISC_CTL_NON_BLOCKING_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MMISC_CTL_NON_BLOCKING_EN);
-	}
-	return 0;
-}
-
-uintptr_t mcall_write_around(unsigned long enable)
-{
-	if (enable) {
-		csr_set(CSR_MCACHECTL, V5_MCACHE_CTL_DC_WAROUND_1_EN);
-	} else {
-		csr_clear(CSR_MCACHECTL, V5_MCACHE_CTL_DC_WAROUND_1_EN);
-	}
-	return 0;
-}
diff --git a/platform/andes/ae350/cache.h b/platform/andes/ae350/cache.h
deleted file mode 100644
index e1c1826f3c5..00000000000
--- a/platform/andes/ae350/cache.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Andes Technology Corporation
- *
- * Authors:
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-uintptr_t mcall_set_mcache_ctl(unsigned long input);
-uintptr_t mcall_set_mmisc_ctl(unsigned long input);
-uintptr_t mcall_icache_op(unsigned int enable);
-uintptr_t mcall_dcache_op(unsigned int enable);
-uintptr_t mcall_l1_cache_i_prefetch_op(unsigned long enable);
-uintptr_t mcall_l1_cache_d_prefetch_op(unsigned long enable);
-uintptr_t mcall_non_blocking_load_store(unsigned long enable);
-uintptr_t mcall_write_around(unsigned long enable);
diff --git a/platform/andes/ae350/configs/defconfig b/platform/andes/ae350/configs/defconfig
deleted file mode 100644
index e69de29bb2d..00000000000
diff --git a/platform/andes/ae350/objects.mk b/platform/andes/ae350/objects.mk
deleted file mode 100644
index a4a2332daa2..00000000000
--- a/platform/andes/ae350/objects.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# SPDX-License-Identifier: BSD-2-Clause
-#
-# Copyright (c) 2019 Andes Technology Corporation
-#
-# Authors:
-#   Zong Li <zong@andestech.com>
-#   Nylon Chen <nylon7@andestech.com>
-#
-
-# Compiler flags
-platform-cppflags-y =
-platform-cflags-y =
-platform-asflags-y =
-platform-ldflags-y =
-
-# Objects to build
-platform-objs-y += cache.o platform.o
-
-# Blobs to build
-FW_TEXT_START=0x00000000
-
-FW_DYNAMIC=y
-
-FW_JUMP=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  FW_JUMP_ADDR=0x400000
-else
-  FW_JUMP_ADDR=0x200000
-endif
-FW_JUMP_FDT_ADDR=0x2000000
-
-FW_PAYLOAD=y
-ifeq ($(PLATFORM_RISCV_XLEN), 32)
-  FW_PAYLOAD_OFFSET=0x400000
-else
-  FW_PAYLOAD_OFFSET=0x200000
-endif
-
-FW_PAYLOAD_FDT_ADDR=0x2000000
diff --git a/platform/andes/ae350/platform.c b/platform/andes/ae350/platform.c
deleted file mode 100644
index d36d11ee841..00000000000
--- a/platform/andes/ae350/platform.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- *   Nylon Chen <nylon7@andestech.com>
- *   Yu Chien Peter Lin <peterlin@andestech.com>
- */
-
-#include <libfdt.h>
-#include <sbi/riscv_asm.h>
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_const.h>
-#include <sbi/sbi_hartmask.h>
-#include <sbi/sbi_ipi.h>
-#include <sbi/sbi_platform.h>
-#include <sbi/sbi_string.h>
-#include <sbi/sbi_trap.h>
-#include <sbi_utils/fdt/fdt_domain.h>
-#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/ipi/fdt_ipi.h>
-#include <sbi_utils/irqchip/fdt_irqchip.h>
-#include <sbi_utils/reset/fdt_reset.h>
-#include <sbi_utils/serial/fdt_serial.h>
-#include <sbi_utils/timer/fdt_timer.h>
-#include "platform.h"
-#include "cache.h"
-
-struct sbi_platform platform;
-unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
-				unsigned long arg2, unsigned long arg3,
-				unsigned long arg4)
-{
-	const char *model;
-	void *fdt = (void *)arg1;
-	u32 hartid, hart_count = 0;
-	int rc, root_offset, cpus_offset, cpu_offset, len;
-
-	root_offset = fdt_path_offset(fdt, "/");
-	if (root_offset < 0)
-		goto fail;
-
-	model = fdt_getprop(fdt, root_offset, "model", &len);
-	if (model)
-		sbi_strncpy(platform.name, model, sizeof(platform.name) - 1);
-
-	cpus_offset = fdt_path_offset(fdt, "/cpus");
-	if (cpus_offset < 0)
-		goto fail;
-
-	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
-		rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
-		if (rc)
-			continue;
-
-		if (SBI_HARTMASK_MAX_BITS <= hartid)
-			continue;
-
-		hart_count++;
-	}
-
-	platform.hart_count = hart_count;
-
-	/* Return original FDT pointer */
-	return arg1;
-
-fail:
-	while (1)
-		wfi();
-}
-
-/* Platform final initialization. */
-static int ae350_final_init(bool cold_boot)
-{
-	void *fdt;
-
-	if (!cold_boot)
-		return 0;
-
-	fdt_reset_init();
-
-	fdt = fdt_get_address();
-	fdt_fixups(fdt);
-	fdt_domain_fixup(fdt);
-
-	return 0;
-}
-
-/* Vendor-Specific SBI handler */
-static int ae350_vendor_ext_provider(long extid, long funcid,
-	const struct sbi_trap_regs *regs, unsigned long *out_value,
-	struct sbi_trap_info *out_trap)
-{
-	int ret = 0;
-	switch (funcid) {
-	case SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS:
-		*out_value = csr_read(CSR_MCACHECTL);
-		break;
-	case SBI_EXT_ANDES_GET_MMISC_CTL_STATUS:
-		*out_value = csr_read(CSR_MMISCCTL);
-		break;
-	case SBI_EXT_ANDES_SET_MCACHE_CTL:
-		ret = mcall_set_mcache_ctl(regs->a0);
-		break;
-	case SBI_EXT_ANDES_SET_MMISC_CTL:
-		ret = mcall_set_mmisc_ctl(regs->a0);
-		break;
-	case SBI_EXT_ANDES_ICACHE_OP:
-		ret = mcall_icache_op(regs->a0);
-		break;
-	case SBI_EXT_ANDES_DCACHE_OP:
-		ret = mcall_dcache_op(regs->a0);
-		break;
-	case SBI_EXT_ANDES_L1CACHE_I_PREFETCH:
-		ret = mcall_l1_cache_i_prefetch_op(regs->a0);
-		break;
-	case SBI_EXT_ANDES_L1CACHE_D_PREFETCH:
-		ret = mcall_l1_cache_d_prefetch_op(regs->a0);
-		break;
-	case SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE:
-		ret = mcall_non_blocking_load_store(regs->a0);
-		break;
-	case SBI_EXT_ANDES_WRITE_AROUND:
-		ret = mcall_write_around(regs->a0);
-		break;
-	default:
-		sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);
-		asm volatile("ebreak");
-	}
-	return ret;
-}
-
-static int ae350_domains_init(void)
-{
-	return fdt_domains_populate(fdt_get_address());
-}
-
-/* Platform descriptor. */
-const struct sbi_platform_operations platform_ops = {
-	.final_init = ae350_final_init,
-
-	.domains_init = ae350_domains_init,
-
-	.console_init = fdt_serial_init,
-
-	.irqchip_init = fdt_irqchip_init,
-
-	.ipi_init     = fdt_ipi_init,
-
-	.timer_init	   = fdt_timer_init,
-
-	.vendor_ext_provider = ae350_vendor_ext_provider
-};
-
-struct sbi_platform platform = {
-	.opensbi_version = OPENSBI_VERSION,
-	.platform_version =
-		SBI_PLATFORM_VERSION(CONFIG_PLATFORM_ANDES_AE350_MAJOR_VER,
-				     CONFIG_PLATFORM_ANDES_AE350_MINOR_VER),
-	.name = CONFIG_PLATFORM_ANDES_AE350_NAME,
-	.features = SBI_PLATFORM_DEFAULT_FEATURES,
-	.hart_count = SBI_HARTMASK_MAX_BITS,
-	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-	.platform_ops_addr = (unsigned long)&platform_ops
-};
diff --git a/platform/andes/ae350/platform.h b/platform/andes/ae350/platform.h
deleted file mode 100644
index 903bef0278a..00000000000
--- a/platform/andes/ae350/platform.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2019 Andes Technology Corporation
- *
- * Authors:
- *   Zong Li <zong@andestech.com>
- *   Nylon Chen <nylon7@andestech.com>
- */
-
-#ifndef _AE350_PLATFORM_H_
-#define _AE350_PLATFORM_H_
-
-#define AE350_L2C_ADDR			0xe0500000
-
-/*Memory and Miscellaneous Registers*/
-#define CSR_MILMB		0x7c0
-#define CSR_MDLMB		0x7c1
-#define CSR_MECC_CDOE		0x7c2
-#define CSR_MNVEC		0x7c3
-#define CSR_MPFTCTL		0x7c5
-#define CSR_MCACHECTL		0x7ca
-#define CSR_MCCTLBEGINADDR	0x7cb
-#define CSR_MCCTLCOMMAND	0x7cc
-#define CSR_MCCTLDATA		0x7cc
-#define CSR_SCCTLDATA		0x9cd
-#define CSR_UCCTLBEGINADDR	0x80c
-#define CSR_MMISCCTL		0x7d0
-
-enum sbi_ext_andes_fid {
-	SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS = 0,
-	SBI_EXT_ANDES_GET_MMISC_CTL_STATUS,
-	SBI_EXT_ANDES_SET_MCACHE_CTL,
-	SBI_EXT_ANDES_SET_MMISC_CTL,
-	SBI_EXT_ANDES_ICACHE_OP,
-	SBI_EXT_ANDES_DCACHE_OP,
-	SBI_EXT_ANDES_L1CACHE_I_PREFETCH,
-	SBI_EXT_ANDES_L1CACHE_D_PREFETCH,
-	SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE,
-	SBI_EXT_ANDES_WRITE_AROUND,
-};
-
-/* nds v5 mmisc_ctl register*/
-#define V5_MMISC_CTL_VEC_PLIC_OFFSET            1
-#define V5_MMISC_CTL_RVCOMPM_OFFSET             2
-#define V5_MMISC_CTL_BRPE_OFFSET                3
-#define V5_MMISC_CTL_MSA_OR_UNA_OFFSET          6
-#define V5_MMISC_CTL_NON_BLOCKING_OFFSET        8
-#define V5_MCACHE_CTL_L1I_PREFETCH_OFFSET       9
-#define V5_MCACHE_CTL_L1D_PREFETCH_OFFSET       10
-#define V5_MCACHE_CTL_DC_WAROUND_OFFSET_1       13
-#define V5_MCACHE_CTL_DC_WAROUND_OFFSET_2       14
-
-#define V5_MMISC_CTL_VEC_PLIC_EN        (1UL << V5_MMISC_CTL_VEC_PLIC_OFFSET)
-#define V5_MMISC_CTL_RVCOMPM_EN         (1UL << V5_MMISC_CTL_RVCOMPM_OFFSET)
-#define V5_MMISC_CTL_BRPE_EN            (1UL << V5_MMISC_CTL_BRPE_OFFSET)
-#define V5_MMISC_CTL_MSA_OR_UNA_EN      (1UL << V5_MMISC_CTL_MSA_OR_UNA_OFFSET)
-#define V5_MMISC_CTL_NON_BLOCKING_EN    (1UL << V5_MMISC_CTL_NON_BLOCKING_OFFSET)
-#define V5_MCACHE_CTL_L1I_PREFETCH_EN   (1UL << V5_MCACHE_CTL_L1I_PREFETCH_OFFSET)
-#define V5_MCACHE_CTL_L1D_PREFETCH_EN   (1UL << V5_MCACHE_CTL_L1D_PREFETCH_OFFSET)
-#define V5_MCACHE_CTL_DC_WAROUND_1_EN   (1UL << V5_MCACHE_CTL_DC_WAROUND_OFFSET_1)
-#define V5_MCACHE_CTL_DC_WAROUND_2_EN   (1UL << V5_MCACHE_CTL_DC_WAROUND_OFFSET_2)
-
-#define V5_MMISC_CTL_MASK  (V5_MMISC_CTL_VEC_PLIC_EN | V5_MMISC_CTL_RVCOMPM_EN \
-	| V5_MMISC_CTL_BRPE_EN | V5_MMISC_CTL_MSA_OR_UNA_EN | V5_MMISC_CTL_NON_BLOCKING_EN)
-
-/* nds mcache_ctl register*/
-#define V5_MCACHE_CTL_IC_EN_OFFSET      0
-#define V5_MCACHE_CTL_DC_EN_OFFSET      1
-#define V5_MCACHE_CTL_IC_ECCEN_OFFSET   2
-#define V5_MCACHE_CTL_DC_ECCEN_OFFSET   4
-#define V5_MCACHE_CTL_IC_RWECC_OFFSET   6
-#define V5_MCACHE_CTL_DC_RWECC_OFFSET   7
-#define V5_MCACHE_CTL_CCTL_SUEN_OFFSET  8
-
-/*nds cctl command*/
-#define V5_UCCTL_L1D_WBINVAL_ALL 6
-#define V5_UCCTL_L1D_WB_ALL 7
-
-#define V5_MCACHE_CTL_IC_EN     (1UL << V5_MCACHE_CTL_IC_EN_OFFSET)
-#define V5_MCACHE_CTL_DC_EN     (1UL << V5_MCACHE_CTL_DC_EN_OFFSET)
-#define V5_MCACHE_CTL_IC_RWECC  (1UL << V5_MCACHE_CTL_IC_RWECC_OFFSET)
-#define V5_MCACHE_CTL_DC_RWECC  (1UL << V5_MCACHE_CTL_DC_RWECC_OFFSET)
-#define V5_MCACHE_CTL_CCTL_SUEN (1UL << V5_MCACHE_CTL_CCTL_SUEN_OFFSET)
-
-#define V5_MCACHE_CTL_MASK (V5_MCACHE_CTL_IC_EN | V5_MCACHE_CTL_DC_EN \
-	| V5_MCACHE_CTL_IC_RWECC | V5_MCACHE_CTL_DC_RWECC \
-	| V5_MCACHE_CTL_CCTL_SUEN | V5_MCACHE_CTL_L1I_PREFETCH_EN \
-	| V5_MCACHE_CTL_L1D_PREFETCH_EN | V5_MCACHE_CTL_DC_WAROUND_1_EN \
-	| V5_MCACHE_CTL_DC_WAROUND_2_EN)
-
-#define V5_L2C_CTL_OFFSET           0x8
-#define V5_L2C_CTL_ENABLE_OFFSET    0
-#define V5_L2C_CTL_IPFDPT_OFFSET    3
-#define V5_L2C_CTL_DPFDPT_OFFSET    5
-#define V5_L2C_CTL_TRAMOCTL_OFFSET  8
-#define V5_L2C_CTL_TRAMICTL_OFFSET  10
-#define V5_L2C_CTL_DRAMOCTL_OFFSET  11
-#define V5_L2C_CTL_DRAMICTL_OFFSET  13
-
-#define V5_L2C_CTL_ENABLE_MASK      (1UL << V5_L2C_CTL_ENABLE_OFFSET)
-#define V5_L2C_CTL_IPFDPT_MASK      (3UL << V5_L2C_CTL_IPFDPT_OFFSET)
-#define V5_L2C_CTL_DPFDPT_MASK      (3UL << V5_L2C_CTL_DPFDPT_OFFSET)
-#define V5_L2C_CTL_TRAMOCTL_MASK    (3UL << V5_L2C_CTL_TRAMOCTL_OFFSET)
-#define V5_L2C_CTL_TRAMICTL_MASK    (1UL << V5_L2C_CTL_TRAMICTL_OFFSET)
-#define V5_L2C_CTL_DRAMOCTL_MASK    (3UL << V5_L2C_CTL_DRAMOCTL_OFFSET)
-#define V5_L2C_CTL_DRAMICTL_MASK    (1UL << V5_L2C_CTL_DRAMICTL_OFFSET)
-
-#endif /* _AE350_PLATFORM_H_ */
diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 63d1be4054d..4b5d2cdda5b 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -28,6 +28,10 @@ config PLATFORM_ALLWINNER_D1
 	depends on FDT_IRQCHIP_PLIC
 	default n
 
+config PLATFORM_ANDES_AE350
+	bool "Andes AE350 support"
+	default n
+
 config PLATFORM_SIFIVE_FU540
 	bool "SiFive FU540 support"
 	default n
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
new file mode 100644
index 00000000000..cf7f6f2a0f5
--- /dev/null
+++ b/platform/generic/andes/ae350.c
@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <platform_override.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+
+static const struct fdt_match andes_ae350_match[] = {
+	{ .compatible = "andestech,ae350" },
+	{ },
+};
+
+const struct platform_override andes_ae350 = {
+	.match_table = andes_ae350_match,
+};
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
new file mode 100644
index 00000000000..dd6408de01f
--- /dev/null
+++ b/platform/generic/andes/objects.mk
@@ -0,0 +1,6 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
+platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index c95b7fa9c6e..2eaeeb7338f 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,4 +1,5 @@
 CONFIG_PLATFORM_ALLWINNER_D1=y
+CONFIG_PLATFORM_ANDES_AE350=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_FDT_GPIO=y
@@ -7,11 +8,13 @@ CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_IPI=y
 CONFIG_FDT_IPI_MSWI=y
+CONFIG_FDT_IPI_PLICSW=y
 CONFIG_FDT_IRQCHIP=y
 CONFIG_FDT_IRQCHIP_APLIC=y
 CONFIG_FDT_IRQCHIP_IMSIC=y
 CONFIG_FDT_IRQCHIP_PLIC=y
 CONFIG_FDT_RESET=y
+CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
 CONFIG_FDT_RESET_SIFIVE_TEST=y
@@ -28,4 +31,5 @@ CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
+CONFIG_FDT_TIMER_PLMT=y
 CONFIG_SERIAL_SEMIHOSTING=y

From 6cd4b9b223a15b41f7019a5ac992c9d7bff799f5 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 5 Dec 2022 10:03:58 +0800
Subject: [PATCH 1122/1765] docs: platform: Update AE350 and generic platform
 documentation

Update compile option and platform compatible string for AE350 and
add it to the generic platform list.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/andes-ae350.md | 5 +++--
 docs/platform/generic.md     | 2 ++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index ec241ec374a..473995143fe 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -8,7 +8,7 @@ AHB/APB IPs suites a majority embedded systems, and the verified platform serves
 as a starting point to jump start SoC designs.
 
 To build platform specific library and firmwares, provide the
-*PLATFORM=andes/ae350* parameter to the top level make command.
+*PLATFORM=generic* parameter to the top level `make` command.
 
 Platform Options
 ----------------
@@ -23,13 +23,14 @@ AE350's dts is included in https://github.com/andestech/linux/tree/RISCV-Linux-5
 **Linux Kernel Payload**
 
 ```
-make PLATFORM=andes/ae350 FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<ae350.dtb path>
+make PLATFORM=generic FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image FW_FDT_PATH=<ae350.dtb path>
 ```
 
 DTS Example: (Quad-core AX45MP)
 -------------------------------
 
 ```
+	compatible = "andestech,ae350";
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index 73a8afa437a..e8a32964f79 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -45,12 +45,14 @@ The *Generic* platform does not have any platform-specific options.
 RISC-V Platforms Using Generic Platform
 ---------------------------------------
 
+* **Andes AE350 Platform** (*[andes-ae350.md]*)
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
 * **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
 * **SiFive HiFive Unleashed** (*[sifive_fu540.md]*)
 * **Spike** (*[spike.md]*)
 * **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*)
 
+[andes-ae350.md]: andse-ae350.md
 [qemu_virt.md]: qemu_virt.md
 [shakti_cclass.md]: shakti_cclass.md
 [sifive_fu540.md]: sifive_fu540.md

From d3fcff77a1e5d79cfb84810370a777b07302ca18 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 5 Dec 2022 10:03:59 +0800
Subject: [PATCH 1123/1765] docs: andes-ae350.md: fix watchdog nodename in dts
 example

The example should use watchdog as nodename instead of wdt.
This is defined in watchdog common schemas:
https://github.com/torvalds/linux/blob/v6.0/Documentation/devicetree/bindings/watchdog/watchdog.yaml#L19

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/andes-ae350.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/andes-ae350.md b/docs/platform/andes-ae350.md
index 473995143fe..8fc8ec6a91f 100644
--- a/docs/platform/andes-ae350.md
+++ b/docs/platform/andes-ae350.md
@@ -178,7 +178,7 @@ DTS Example: (Quad-core AX45MP)
 			                        &CPU3_intc 7 >;
 		};
 
-		wdt: wdt@f0500000 {
+		wdt: watchdog@f0500000 {
 			compatible = "andestech,atcwdt200";
 			reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
 			interrupts = <3 4>;

From 4640d041d3ccb13c07c10f811199bae08448e91a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 5 Dec 2022 10:04:00 +0800
Subject: [PATCH 1124/1765] scripts/create-binary-archive.sh: remove
 andes/ae350 build directory

The andes-specific files have been moved to generic platform so we
can drop this line.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 scripts/create-binary-archive.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 261a45ad6bd..4dda7b4b234 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -103,7 +103,6 @@ build_opensbi() {
 		BUILD_PLATFORM_SUBDIR+=("kendryte/k210")
 		BUILD_PLATFORM_SUBDIR+=("fpga/ariane")
 		BUILD_PLATFORM_SUBDIR+=("fpga/openpiton")
-		BUILD_PLATFORM_SUBDIR+=("andes/ae350")
 		BUILD_PLATFORM_SUBDIR+=("generic")
 		;;
 	*)

From e9775120f554d35b92fcdeb2c3ad8ee8140396e8 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Fri, 2 Dec 2022 11:59:47 +0000
Subject: [PATCH 1125/1765] lib: utils: Add fdt_fixup_node() helper function

Add a helper function fdt_fixup_node() based on the compatible string.
This will avoid code duplication for every new node fixup being added.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_fixup.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index d1050bbc75b..41f6cbb7023 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -74,22 +74,23 @@ static void fdt_domain_based_fixup_one(void *fdt, int nodeoff)
 	}
 }
 
-void fdt_aplic_fixup(void *fdt)
+static void fdt_fixup_node(void *fdt, const char *compatible)
 {
 	int noff = 0;
 
 	while ((noff = fdt_node_offset_by_compatible(fdt, noff,
-						     "riscv,aplic")) >= 0)
+						     compatible)) >= 0)
 		fdt_domain_based_fixup_one(fdt, noff);
 }
 
-void fdt_imsic_fixup(void *fdt)
+void fdt_aplic_fixup(void *fdt)
 {
-	int noff = 0;
+	fdt_fixup_node(fdt, "riscv,aplic");
+}
 
-	while ((noff = fdt_node_offset_by_compatible(fdt, noff,
-						     "riscv,imsics")) >= 0)
-		fdt_domain_based_fixup_one(fdt, noff);
+void fdt_imsic_fixup(void *fdt)
+{
+	fdt_fixup_node(fdt, "riscv,imsics");
 }
 
 void fdt_plic_fixup(void *fdt)

From e1a0cb062ad6e302ac3f2b64f1abebbc3a3ace85 Mon Sep 17 00:00:00 2001
From: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Date: Sun, 4 Dec 2022 00:04:15 +0300
Subject: [PATCH 1126/1765] gitignore: add vim swap files

Update .gitignore for vim swap files.

Signed-off-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 95692bb4acb..c11afd3845b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,3 +10,4 @@ install/
 # Development friendly files
 tags
 cscope*
+*.swp

From ed8b8f5254752b1a7c7b90f61302095eade5b04a Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Wed, 7 Dec 2022 16:14:19 +0000
Subject: [PATCH 1127/1765] platform: generic: Make use of fdt_match_node()

It makes sense to use fdt_match_node() instead of fdt_find_match()
in fw_platform_lookup_special() as we already have the start offset
to search from.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/platform.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 595b0fdb0a9..bfe15f0d6b8 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -34,17 +34,17 @@ static const struct fdt_match *generic_plat_match = NULL;
 
 static void fw_platform_lookup_special(void *fdt, int root_offset)
 {
-	int pos, noff;
 	const struct platform_override *plat;
 	const struct fdt_match *match;
+	int pos;
 
 	for (pos = 0; pos < platform_override_modules_size; pos++) {
 		plat = platform_override_modules[pos];
 		if (!plat->match_table)
 			continue;
 
-		noff = fdt_find_match(fdt, -1, plat->match_table, &match);
-		if (noff < 0)
+		match = fdt_match_node(fdt, root_offset, plat->match_table);
+		if (!match)
 			continue;
 
 		generic_plat = plat;

From 8b00be692740736e989776b312c87dc9c0b403c8 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Thu, 8 Dec 2022 02:14:19 +0100
Subject: [PATCH 1128/1765] lib: fix is_region_valid()

For 'reg->order == __riscv_xlen' the term 'BIT(reg->order)' is undefined.

Addresses-Coverity-ID: 1529706 ("Bad bit shift operation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 3302213c1d6..32055958d5d 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -149,7 +149,7 @@ static bool is_region_valid(const struct sbi_domain_memregion *reg)
 	if (reg->order == __riscv_xlen && reg->base != 0)
 		return FALSE;
 
-	if (reg->base & (BIT(reg->order) - 1))
+	if (reg->order < __riscv_xlen && (reg->base & (BIT(reg->order) - 1)))
 		return FALSE;
 
 	return TRUE;

From c2be21432c00840e6b2d2e5cdc668b5ee6180738 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Thu, 8 Dec 2022 02:14:20 +0100
Subject: [PATCH 1129/1765] lib: fix __fdt_parse_region()

If fdt_getprop() returns NULL, this indicates an error. In this case lenp
is set to an error code. But even if lenp = 0 we should not continue.

If fdt_getprop() returns a wider value than we expect this is a separate
error condition.

In both cases the device-tree is invalid.

Addresses-Coverity-ID: 1529703 ("Dereference after null check")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_domain.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index bd0eec30375..056860357d6 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -246,7 +246,7 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 
 	/* Read "base" DT property */
 	val = fdt_getprop(fdt, region_offset, "base", &len);
-	if (!val && len >= 8)
+	if (!val || len != 8)
 		return SBI_EINVAL;
 	val64 = fdt32_to_cpu(val[0]);
 	val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
@@ -254,7 +254,7 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 
 	/* Read "order" DT property */
 	val = fdt_getprop(fdt, region_offset, "order", &len);
-	if (!val && len >= 4)
+	if (!val || len != 4)
 		return SBI_EINVAL;
 	val32 = fdt32_to_cpu(*val);
 	if (val32 < 3 || __riscv_xlen < val32)

From 7b087781c210b756f6c6ca8e66d43a6d3b02af0a Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Thu, 8 Dec 2022 02:14:21 +0100
Subject: [PATCH 1130/1765] lib: fix irqchip_plic_update_hartid_table

After determining cpu_offset we have to check this value.

Addresses-Coverity-ID: 1529706 ("Logically dead code")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/irqchip/fdt_irqchip_plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index a6e185cfe12..fe08836ac2d 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -86,7 +86,7 @@ static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
 			continue;
 
 		cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
-		if (cpu_intc_offset < 0)
+		if (cpu_offset < 0)
 			continue;
 
 		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);

From cb568b9b294d5b20f7dd416e89b61c8bf0fa375d Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 5 Dec 2022 22:12:31 +0530
Subject: [PATCH 1131/1765] lib: sbi: Synchronize PMP settings with virtual
 memory system

As per section 3.7.2 of RISC-V Privileged Specification,
PMP settings must be synchronized with the virtual memory
system after PMP settings have been written.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index dacab1a0940..5447c523987 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -22,6 +22,7 @@
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/sbi_hfence.h>
 
 extern void __sbi_expected_trap(void);
 extern void __sbi_expected_trap_hext(void);
@@ -321,6 +322,27 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 		}
 	}
 
+	/*
+	 * As per section 3.7.2 of privileged specification v1.12,
+	 * virtual address translations can be speculatively performed
+	 * (even before actual access). These, along with PMP traslations,
+	 * can be cached. This can pose a problem with CPU hotplug
+	 * and non-retentive suspend scenario because PMP states are
+	 * not preserved.
+	 * It is advisable to flush the caching structures under such
+	 * conditions.
+	 */
+	if (misa_extension('S')) {
+		__asm__ __volatile__("sfence.vma");
+
+		/*
+		 * If hypervisor mode is supported, flush caching
+		 * structures in guest mode too.
+		 */
+		if (misa_extension('H'))
+			__sbi_hfence_gvma_all();
+	}
+
 	return 0;
 }
 

From 506928a1be9952abc52f05c0c661338aa1d66f6d Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Fri, 9 Dec 2022 11:43:35 +0530
Subject: [PATCH 1132/1765] scripts: use env to invoke bash

Not all systems have bash at a fixed location like /bin/bash.
FreeBSD, for example, would typically have it at /usr/local/bin/bash.
When building OpenSBI on freebsd system, the build breaks.

Its advisable to use: #!/usr/bin/env bash

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 scripts/carray.sh                | 2 +-
 scripts/create-binary-archive.sh | 2 +-
 scripts/d2c.sh                   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/scripts/carray.sh b/scripts/carray.sh
index 0c52bd6fa64..13f9d360fb8 100755
--- a/scripts/carray.sh
+++ b/scripts/carray.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 function usage()
 {
diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
index 4dda7b4b234..9d56f2f4ac5 100755
--- a/scripts/create-binary-archive.sh
+++ b/scripts/create-binary-archive.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 function usage()
 {
diff --git a/scripts/d2c.sh b/scripts/d2c.sh
index 33a3ccf76a4..c411fcda980 100755
--- a/scripts/d2c.sh
+++ b/scripts/d2c.sh
@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 
 function usage()
 {

From 64e8b9f72e986aba25f7cb41218b1a1088042ae3 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Sat, 10 Dec 2022 10:30:07 +0000
Subject: [PATCH 1133/1765] lib: utils: serial: Add Renesas SCIF driver

Add Renesas SCIF driver.

Based on a patch in the BSP by Takeki Hamada
<takeki.hamada.ak@bp.renesas.com>
Link: https://github.com/renesas-rz/rz_opensbi/commits/work/OpenSBI-PMA

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/serial/renesas-scif.h |  11 +++
 lib/utils/serial/Kconfig                |   4 +
 lib/utils/serial/objects.mk             |   1 +
 lib/utils/serial/renesas_scif.c         | 116 ++++++++++++++++++++++++
 4 files changed, 132 insertions(+)
 create mode 100644 include/sbi_utils/serial/renesas-scif.h
 create mode 100644 lib/utils/serial/renesas_scif.c

diff --git a/include/sbi_utils/serial/renesas-scif.h b/include/sbi_utils/serial/renesas-scif.h
new file mode 100644
index 00000000000..0002a1a7ab4
--- /dev/null
+++ b/include/sbi_utils/serial/renesas-scif.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ */
+
+#ifndef __SERIAL_RENESAS_SCIF_H__
+#define __SERIAL_RENESAS_SCIF_H__
+
+int renesas_scif_init(unsigned long base, u32 in_freq, u32 baudrate);
+
+#endif /* __SERIAL_RENESAS_SCIF_H__ */
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index da549a768c0..f6ed803aec5 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -59,6 +59,10 @@ config SERIAL_GAISLER
 	bool "Gaisler UART support"
 	default n
 
+config SERIAL_RENESAS_SCIF
+	bool "Renesas SCIF support"
+	default n
+
 config SERIAL_SHAKTI
 	bool "Shakti UART support"
 	default n
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 98f3f9a8509..652042492c9 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -36,6 +36,7 @@ libsbiutils-objs-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += serial/fdt_serial_xlnx_
 
 libsbiutils-objs-$(CONFIG_SERIAL_CADENCE) += serial/cadence-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_GAISLER) += serial/gaisler-uart.o
+libsbiutils-objs-$(CONFIG_SERIAL_RENESAS_SCIF) += serial/renesas_scif.o
 libsbiutils-objs-$(CONFIG_SERIAL_SHAKTI) += serial/shakti-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_SIFIVE) += serial/sifive-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_LITEX) += serial/litex-uart.o
diff --git a/lib/utils/serial/renesas_scif.c b/lib/utils/serial/renesas_scif.c
new file mode 100644
index 00000000000..cbe9db4ec56
--- /dev/null
+++ b/lib/utils/serial/renesas_scif.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_timer.h>
+#include <sbi_utils/serial/renesas-scif.h>
+
+/* clang-format off */
+
+#define SCIF_REG_SMR		0x0
+#define SCIF_REG_BRR		0x2
+#define SCIF_REG_SCR		0x4
+#define SCIF_REG_FTDR		0x6
+#define SCIF_REG_FSR		0x8
+#define SCIF_REG_FCR		0xc
+#define SCIF_REG_LSR		0x12
+#define SCIF_REG_SEMR		0x14
+
+#define SCIF_FCR_RFRST		0x2 /* Reset assert receive-FIFO (bit[1]) */
+#define SCIF_FCR_TFRST		0x4 /* Reset assert transmit-FIFO(bit[2]) */
+
+#define SCIF_FCR_RST_ASSRT_RFTF	(SCIF_FCR_RFRST | SCIF_FCR_TFRST) /* Reset assert tx-FIFO & rx-FIFO */
+#define SCIF_FCR_RST_NGATE_RFTF	0x0 /* Reset negate tx-FIFO & rx-FIFO */
+
+#define SCIF_SCR_RE		0x10 /* Enable receive (bit[4]) */
+#define SCIF_SCR_TE		0x20 /* Enable transmit(bit[5]) */
+#define SCIF_SCR_RCV_TRN_EN	(SCIF_SCR_RE | SCIF_SCR_TE) /* Enable receive & transmit */
+#define SCIF_SCR_RCV_TRN_DIS	0x0 /* Disable receive & transmit */
+
+#define SCIF_FSR_ER		0x80 /* Receive error flag */
+#define SCIF_FSR_TEND		0x40 /* Transmit End Flag */
+#define SCIF_FSR_TDFE		0x20 /* Transmit FIFO Data Empty Flag */
+#define SCIF_FSR_BRK		0x10 /* Detect break flag */
+#define SCIF_FSR_DR		0x1  /* Receive data ready flag */
+
+#define SCIF_FSR_TXD_CHK	(SCIF_FSR_TEND | SCIF_FSR_TDFE)
+
+#define SCIF_SEMR_MDDRS		0x10 /* MDDR access enable */
+
+#define SCIF_REG_8BIT(reg)	((reg == SCIF_REG_BRR) || \
+				 (reg == SCIF_REG_FTDR) || \
+				 (reg == SCIF_REG_SEMR))
+
+#define SCBRR_VALUE(clk, baudrate) ((clk) / (32 * (baudrate)) - 1)
+
+/* clang-format on */
+
+static volatile char *scif_base;
+
+static u32 get_reg(u32 offset)
+{
+	if (SCIF_REG_8BIT(offset))
+		return readb(scif_base + offset);
+
+	return readw(scif_base + offset);
+}
+
+static void set_reg(u32 offset, u32 val)
+{
+	if (SCIF_REG_8BIT(offset))
+		writeb(val, scif_base + offset);
+	else
+		writew(val, scif_base + offset);
+}
+
+static void renesas_scif_putc(char ch)
+{
+	uint16_t reg;
+
+	while (!(SCIF_FSR_TXD_CHK & get_reg(SCIF_REG_FSR)))
+		;
+
+	set_reg(SCIF_REG_FTDR, ch);
+	reg = get_reg(SCIF_REG_FSR);
+	reg &= ~SCIF_FSR_TXD_CHK;
+	set_reg(SCIF_REG_FSR, reg);
+}
+
+static struct sbi_console_device renesas_scif_console = {
+	.name		= "renesas_scif",
+	.console_putc	= renesas_scif_putc,
+};
+
+int renesas_scif_init(unsigned long base, u32 in_freq, u32 baudrate)
+{
+	uint16_t data16;
+
+	scif_base = (volatile char *)base;
+
+	set_reg(SCIF_REG_SCR, SCIF_SCR_RCV_TRN_DIS);
+	set_reg(SCIF_REG_FCR, SCIF_FCR_RST_ASSRT_RFTF);
+
+	data16 = get_reg(SCIF_REG_FSR); /* Dummy read */
+	set_reg(SCIF_REG_FSR, 0x0); /* Clear all error bit */
+
+	data16 = get_reg(SCIF_REG_LSR); /* Dummy read */
+	set_reg(SCIF_REG_LSR, 0x0); /* Clear ORER bit */
+
+	set_reg(SCIF_REG_SCR, 0x0);
+
+	set_reg(SCIF_REG_SMR, 0x0);
+
+	data16 = get_reg(SCIF_REG_SEMR);
+	set_reg(SCIF_REG_SEMR, data16 & (~SCIF_SEMR_MDDRS));
+	set_reg(SCIF_REG_BRR, SCBRR_VALUE(in_freq, baudrate));
+
+	set_reg(SCIF_REG_FCR, SCIF_FCR_RST_NGATE_RFTF);
+	set_reg(SCIF_REG_SCR, SCIF_SCR_RCV_TRN_EN);
+
+	sbi_console_set_device(&renesas_scif_console);
+
+	return 0;
+}

From 0021b437377b4ea95f567f91fbf506c0b0b9e227 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Sat, 10 Dec 2022 10:30:08 +0000
Subject: [PATCH 1134/1765] lib: utils: serial: Add FDT driver for Renesas SCIF

Add FDT driver for Renesas SCIF.

    dts example:

    soc: soc {
          ....
            scif0: serial@1004b800 {
                    compatible = "renesas,scif-r9a07g043",
                                 "renesas,scif-r9a07g044";
                    reg = <0 0x1004b800 0 0x400>;
                    interrupts = <412 IRQ_TYPE_LEVEL_HIGH>,
                                 <414 IRQ_TYPE_LEVEL_HIGH>,
                                 <415 IRQ_TYPE_LEVEL_HIGH>,
                                 <413 IRQ_TYPE_LEVEL_HIGH>,
                                 <416 IRQ_TYPE_LEVEL_HIGH>,
                                 <416 IRQ_TYPE_LEVEL_HIGH>;
                    interrupt-names = "eri", "rxi", "txi",
                                      "bri", "dri", "tei";
                    clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
                    clock-names = "fck";
                    power-domains = <&cpg>;
                    resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
                    status = "disabled";
            };
          ....
    };

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h         |  3 +++
 lib/utils/fdt/fdt_helper.c                 | 11 ++++++++
 lib/utils/serial/Kconfig                   |  5 ++++
 lib/utils/serial/fdt_serial_renesas_scif.c | 31 ++++++++++++++++++++++
 lib/utils/serial/objects.mk                |  3 +++
 5 files changed, 53 insertions(+)
 create mode 100644 lib/utils/serial/fdt_serial_renesas_scif.c

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index c39f77aa7b2..09f3095d0d9 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -59,6 +59,9 @@ int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
 int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
+int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
+				struct platform_uart_data *uart);
+
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index d4b38dc5892..48bc2fe4c28 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -23,6 +23,9 @@
 #define DEFAULT_UART_REG_IO_WIDTH	1
 #define DEFAULT_UART_REG_OFFSET		0
 
+#define DEFAULT_RENESAS_SCIF_FREQ		100000000
+#define DEFAULT_RENESAS_SCIF_BAUD		115200
+
 #define DEFAULT_SIFIVE_UART_FREQ		0
 #define DEFAULT_SIFIVE_UART_BAUD		115200
 
@@ -355,6 +358,14 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 					DEFAULT_UART_BAUD);
 }
 
+int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
+				struct platform_uart_data *uart)
+{
+	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
+					  DEFAULT_RENESAS_SCIF_FREQ,
+					  DEFAULT_RENESAS_SCIF_BAUD);
+}
+
 int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index f6ed803aec5..e3589cac103 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -24,6 +24,11 @@ config FDT_SERIAL_HTIF
 	select SYS_HTIF
 	default n
 
+config FDT_SERIAL_RENESAS_SCIF
+	bool "Renesas SCIF FDT driver"
+	select SERIAL_RENESAS_SCIF
+	default n
+
 config FDT_SERIAL_SHAKTI
 	bool "Shakti UART FDT driver"
 	select SERIAL_SHAKTI
diff --git a/lib/utils/serial/fdt_serial_renesas_scif.c b/lib/utils/serial/fdt_serial_renesas_scif.c
new file mode 100644
index 00000000000..c331ca1ad69
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_renesas_scif.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ */
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/renesas-scif.h>
+
+static int serial_renesas_scif_init(void *fdt, int nodeoff,
+				    const struct fdt_match *match)
+{
+	struct platform_uart_data uart = { 0 };
+	int ret;
+
+	ret = fdt_parse_renesas_scif_node(fdt, nodeoff, &uart);
+	if (ret)
+		return ret;
+
+	return renesas_scif_init(uart.addr, uart.freq, uart.baud);
+}
+
+static const struct fdt_match serial_renesas_scif_match[] = {
+	{ .compatible = "renesas,scif-r9a07g043" },
+	{ /* sentinel */ }
+};
+
+struct fdt_serial fdt_serial_renesas_scif = {
+	.match_table = serial_renesas_scif_match,
+	.init = serial_renesas_scif_init
+};
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 652042492c9..1e6bd2e6777 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -19,6 +19,9 @@ libsbiutils-objs-$(CONFIG_FDT_SERIAL_GAISLER) += serial/fdt_serial_gaisler.o
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_HTIF) += fdt_serial_htif
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_HTIF) += serial/fdt_serial_htif.o
 
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_RENESAS_SCIF) += fdt_serial_renesas_scif
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_RENESAS_SCIF) += serial/fdt_serial_renesas_scif.o
+
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_SHAKTI) += fdt_serial_shakti
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_SHAKTI) += serial/fdt_serial_shakti.o
 

From 684090272af9ce84ff0768d8294bf7d42f14edeb Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Sat, 10 Dec 2022 10:30:09 +0000
Subject: [PATCH 1135/1765] lib: utils/irqchip: Add compatible string for
 Andestech NCEPLIC100

Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five SoC
which is equipped with AX45MP AndesCore.

While at it drop the comma after the sentinel as it does not make sense to
have a comma after a sentinel, as any new elements must be added before the
sentinel.

dts example (Single-core AX45MP):

    soc: soc {
          ....
          plic: interrupt-controller@12c00000 {
              compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
              #interrupt-cells = <2>;
              #address-cells = <0>;
              riscv,ndev = <511>;
              interrupt-controller;
              reg = <0x0 0x12c00000 0 0x400000>;
              clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
              power-domains = <&cpg>;
              resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
              interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
          };
          ....
    };

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/irqchip/fdt_irqchip_plic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index fe08836ac2d..8e90fa75eb0 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -159,11 +159,12 @@ void thead_plic_restore(void)
 }
 
 static const struct fdt_match irqchip_plic_match[] = {
+	{ .compatible = "andestech,nceplic100" },
 	{ .compatible = "riscv,plic0" },
 	{ .compatible = "sifive,plic-1.0.0" },
 	{ .compatible = "thead,c900-plic",
 	  .data = thead_plic_plat_init },
-	{ },
+	{ /* sentinel */ }
 };
 
 struct fdt_irqchip fdt_irqchip_plic = {

From 8b1617d13a4200d1ec7d1604e4a4025cc1bcf891 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Sat, 10 Dec 2022 10:30:10 +0000
Subject: [PATCH 1136/1765] platform: generic: Add Renesas RZ/Five initial
 support

This commit provides basic support for the Renesas RZ/Five
(R9A07G043F) SoC.

The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP)
1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include:
- Gigabit Ethernet 2ch
- CAN interface (CAN-FD) 2ch
- USB 2.0 interface 2ch
- SD interface 2ch
- AD converter 2ch

Useful links:
-------------
Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                   |  4 ++++
 platform/generic/configs/defconfig         |  2 ++
 platform/generic/renesas/rzfive/objects.mk |  8 ++++++++
 platform/generic/renesas/rzfive/rzfive.c   | 17 +++++++++++++++++
 4 files changed, 31 insertions(+)
 create mode 100644 platform/generic/renesas/rzfive/objects.mk
 create mode 100644 platform/generic/renesas/rzfive/rzfive.c

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 4b5d2cdda5b..62c7a2d8051 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -32,6 +32,10 @@ config PLATFORM_ANDES_AE350
 	bool "Andes AE350 support"
 	default n
 
+config PLATFORM_RENESAS_RZFIVE
+	bool "Renesas RZ/Five support"
+	default n
+
 config PLATFORM_SIFIVE_FU540
 	bool "SiFive FU540 support"
 	default n
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 2eaeeb7338f..47fca950c24 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,5 +1,6 @@
 CONFIG_PLATFORM_ALLWINNER_D1=y
 CONFIG_PLATFORM_ANDES_AE350=y
+CONFIG_PLATFORM_RENESAS_RZFIVE=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_FDT_GPIO=y
@@ -24,6 +25,7 @@ CONFIG_FDT_SERIAL=y
 CONFIG_FDT_SERIAL_CADENCE=y
 CONFIG_FDT_SERIAL_GAISLER=y
 CONFIG_FDT_SERIAL_HTIF=y
+CONFIG_FDT_SERIAL_RENESAS_SCIF=y
 CONFIG_FDT_SERIAL_SHAKTI=y
 CONFIG_FDT_SERIAL_SIFIVE=y
 CONFIG_FDT_SERIAL_LITEX=y
diff --git a/platform/generic/renesas/rzfive/objects.mk b/platform/generic/renesas/rzfive/objects.mk
new file mode 100644
index 00000000000..2e7e37fd6c2
--- /dev/null
+++ b/platform/generic/renesas/rzfive/objects.mk
@@ -0,0 +1,8 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (C) 2022 Renesas Electronics Corp.
+#
+
+carray-platform_override_modules-$(CONFIG_PLATFORM_RENESAS_RZFIVE) += renesas_rzfive
+platform-objs-$(CONFIG_PLATFORM_RENESAS_RZFIVE) += renesas/rzfive/rzfive.o
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
new file mode 100644
index 00000000000..ca182e3136f
--- /dev/null
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ *
+ */
+
+#include <platform_override.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+static const struct fdt_match renesas_rzfive_match[] = {
+	{ .compatible = "renesas,r9a07g043f01" },
+	{ /* sentinel */ }
+};
+
+const struct platform_override renesas_rzfive = {
+	.match_table = renesas_rzfive_match,
+};

From 7a3354ac1591201c1f2380b79c9c3c75075d312c Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Sat, 10 Dec 2022 10:30:11 +0000
Subject: [PATCH 1137/1765] docs: platform: Add documentation for Renesas
 RZ/Five SoC

This patch adds documentation to build Renesas RZ/Five (R9A07G043F) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/generic.md        |   2 +
 docs/platform/platform.md       |   5 +
 docs/platform/renesas-rzfive.md | 160 ++++++++++++++++++++++++++++++++
 3 files changed, 167 insertions(+)
 create mode 100644 docs/platform/renesas-rzfive.md

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index e8a32964f79..8e4cf2d090c 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -47,6 +47,7 @@ RISC-V Platforms Using Generic Platform
 
 * **Andes AE350 Platform** (*[andes-ae350.md]*)
 * **QEMU RISC-V Virt Machine** (*[qemu_virt.md]*)
+* **Renesas RZ/Five SoC** (*[renesas-rzfive.md]*)
 * **Shakti C-class SoC Platform** (*[shakti_cclass.md]*)
 * **SiFive HiFive Unleashed** (*[sifive_fu540.md]*)
 * **Spike** (*[spike.md]*)
@@ -54,6 +55,7 @@ RISC-V Platforms Using Generic Platform
 
 [andes-ae350.md]: andse-ae350.md
 [qemu_virt.md]: qemu_virt.md
+[renesas-rzfive.md]: renesas-rzfive.md
 [shakti_cclass.md]: shakti_cclass.md
 [sifive_fu540.md]: sifive_fu540.md
 [spike.md]: spike.md
diff --git a/docs/platform/platform.md b/docs/platform/platform.md
index f291931600d..4504d87a804 100644
--- a/docs/platform/platform.md
+++ b/docs/platform/platform.md
@@ -39,6 +39,10 @@ OpenSBI currently supports the following virtual and hardware platforms:
   processor based SOCs. More details on this platform can be found in the
   file *[shakti_cclass.md]*.
 
+* **Renesas RZ/Five SoC**: Platform support for Renesas RZ/Five (R9A07G043F) SoC
+  used on the Renesas RZ/Five SMARC EVK board. More details on this platform can
+  be found in the file *[renesas-rzfive.md]*.
+
 The code for these supported platforms can be used as example to implement
 support for other platforms. The *platform/template* directory also provides
 template files for implementing support for a new platform. The *objects.mk*,
@@ -54,3 +58,4 @@ comments to facilitate the implementation.
 [spike.md]: spike.md
 [fpga-openpiton.md]: fpga-openpiton.md
 [shakti_cclass.md]: shakti_cclass.md
+[renesas-rzfive.md]: renesas-rzfive.md
diff --git a/docs/platform/renesas-rzfive.md b/docs/platform/renesas-rzfive.md
new file mode 100644
index 00000000000..a73c53fd49b
--- /dev/null
+++ b/docs/platform/renesas-rzfive.md
@@ -0,0 +1,160 @@
+Renesas RZ/Five SoC (R9A07G043F) Platform
+=========================================
+The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP)
+1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include:
+- Memory controller for DDR4-1600 / DDR3L-1333 with 16 bits
+- System RAM (RAM of 128 Kbytes (ECC))
+- SPI Multi I/O Bus Controller 1ch
+- SD Card Host Interface/Multimedia Card Interface (SD/MMC) 2ch
+- Serial Sound Interface (SSI) 4ch
+- Sampling Rate Converter (SRC) 1ch
+- USB2.0 host/function interface 2ch (ch0: Host-Function ch1: Host only)
+- Gigabit Ethernet Interface (GbE) 2ch
+- Controller Area Network Interface (CAN) 2ch (CAN-FD ISO 11898-1 (CD2014) compliant)
+- Multi-function Timer Pulse Unit 3 (MTU3a) 9 ch (16 bits × 8 channels, 32 bits × 1 channel)
+- Port Output Enable 3 (POE3)
+- Watchdog Timer (WDT) 1ch
+- General Timer (GTM) 3ch (32bits)
+- I2C Bus Interface (I2C) 4ch
+- Serial Communication Interface with FIFO (SCIFA) 5ch
+- Serial Communication Interface (SCI) 2ch
+- Renesas Serial Peripheral Interface (RSPI) 3ch
+- A/D Converter (ADC) 2ch
+making it ideal for applications such as entry-class social infrastructure
+gateway control and industrial gateway control. More details can be found at
+below link [0].
+
+[0] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
+
+To build platform specific library and firmwares, provide the
+*PLATFORM=generic* parameter to the top level make command.
+
+Platform Options
+----------------
+
+The Renesas RZ/Five platform does not have any platform-specific options.
+
+Building Renesas RZ/Five Platform
+---------------------------------
+
+```
+make PLATFORM=generic
+```
+
+DTS Example: (RZ/Five AX45MP)
+-----------------------------
+
+```
+	compatible = "renesas,r9a07g043f01", "renesas,r9a07g043";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <12000000>;
+
+		cpu0: cpu@0 {
+			compatible = "andestech,ax45mp", "riscv";
+			device_type = "cpu";
+			reg = <0x0>;
+			status = "okay";
+			riscv,isa = "rv64imafdc";
+			mmu-type = "riscv,sv39";
+			i-cache-size = <0x8000>;
+			i-cache-line-size = <0x40>;
+			d-cache-size = <0x8000>;
+			d-cache-line-size = <0x40>;
+			clocks = <&cpg CPG_CORE R9A07G043_CLK_I>;
+
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		ranges;
+
+		scif0: serial@1004b800 {
+			compatible = "renesas,scif-r9a07g043",
+				     "renesas,scif-r9a07g044";
+			reg = <0 0x1004b800 0 0x400>;
+			interrupts = <412 IRQ_TYPE_LEVEL_HIGH>,
+				     <414 IRQ_TYPE_LEVEL_HIGH>,
+				     <415 IRQ_TYPE_LEVEL_HIGH>,
+				     <413 IRQ_TYPE_LEVEL_HIGH>,
+				     <416 IRQ_TYPE_LEVEL_HIGH>,
+				     <416 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "eri", "rxi", "txi",
+					  "bri", "dri", "tei";
+			clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
+			clock-names = "fck";
+			power-domains = <&cpg>;
+			resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
+			status = "disabled";
+		};
+
+		cpg: clock-controller@11010000 {
+			compatible = "renesas,r9a07g043-cpg";
+			reg = <0 0x11010000 0 0x10000>;
+			clocks = <&extal_clk>;
+			clock-names = "extal";
+			#clock-cells = <2>;
+			#reset-cells = <1>;
+			#power-domain-cells = <0>;
+		};
+
+		sysc: system-controller@11020000 {
+			compatible = "renesas,r9a07g043-sysc";
+			reg = <0 0x11020000 0 0x10000>;
+			status = "disabled";
+		};
+
+		pinctrl: pinctrl@11030000 {
+			compatible = "renesas,r9a07g043-pinctrl";
+			reg = <0 0x11030000 0 0x10000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			gpio-ranges = <&pinctrl 0 0 152>;
+			clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>;
+			power-domains = <&cpg>;
+			resets = <&cpg R9A07G043_GPIO_RSTN>,
+				 <&cpg R9A07G043_GPIO_PORT_RESETN>,
+				 <&cpg R9A07G043_GPIO_SPARE_RESETN>;
+		};
+
+		plmt0: plmt0@110c0000 {
+			compatible = "andestech,plmt0", "riscv,plmt0";
+			reg = <0x0 0x110c0000 0x0 0x10000>;
+			interrupts-extended = <&cpu0_intc 7>;
+		};
+
+		plic: interrupt-controller@12c00000 {
+			compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
+			#interrupt-cells = <2>;
+			#address-cells = <0>;
+			riscv,ndev = <511>;
+			interrupt-controller;
+			reg = <0x0 0x12c00000 0x0 0x400000>;
+			clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
+			power-domains = <&cpg>;
+			resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
+			interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
+		};
+
+		plicsw: interrupt-controller@13000000 {
+			compatible = "andestech,plicsw";
+			reg = <0x0 0x13000000 0x0 0x400000>;
+			interrupts-extended = <&cpu0_intc 3>;
+			interrupt-controller;
+			#address-cells = <2>;
+			#interrupt-cells = <2>;
+		};
+	};
+```

From 34da6638ad7b3d8c1834dffe5cd2629aa748efaf Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Sun, 11 Dec 2022 14:54:20 +0800
Subject: [PATCH 1138/1765] lib: utils/irqchip: plic: Fix the off-by-one error
 in priority save/restore helpers

Interrupt source 0 is reserved. Hence the irq should start from 1.

Fixes: 2b79b694a805 ("lib: irqchip/plic: Add priority save/restore helpers")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/irqchip/plic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 73d778894a4..4df9020821a 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -38,13 +38,13 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 
 void plic_priority_save(const struct plic_data *plic, u8 *priority)
 {
-	for (u32 i = 0; i < plic->num_src; i++)
+	for (u32 i = 1; i <= plic->num_src; i++)
 		priority[i] = plic_get_priority(plic, i);
 }
 
 void plic_priority_restore(const struct plic_data *plic, const u8 *priority)
 {
-	for (u32 i = 0; i < plic->num_src; i++)
+	for (u32 i = 1; i <= plic->num_src; i++)
 		plic_set_priority(plic, i, priority[i]);
 }
 

From 8509e46ca63a4ed7dff2244cd7f288bf5591ab61 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Sun, 11 Dec 2022 14:54:21 +0800
Subject: [PATCH 1139/1765] lib: utils/irqchip: plic: Ensure no out-of-bound
 access in priority save/restore helpers

Currently the priority save/restore helpers writes/reads the provided
array using an index whose maximum value is determined by PLIC, which
potentially may disagree with the caller to these helpers.

Add a parameter to ask the caller to provide the size limit of the
array to ensure no out-of-bound access happens.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h | 14 ++++++++++++--
 include/sbi_utils/irqchip/plic.h             |  5 +++--
 lib/utils/irqchip/fdt_irqchip_plic.c         |  8 ++++----
 lib/utils/irqchip/plic.c                     |  9 +++++----
 platform/generic/allwinner/sun20i-d1.c       |  4 ++--
 5 files changed, 26 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
index 98d4de5767f..d5b1c60ee92 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip_plic.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
@@ -9,9 +9,19 @@
 
 #include <sbi/sbi_types.h>
 
-void fdt_plic_priority_save(u8 *priority);
+/**
+ * Save the PLIC priority state
+ * @param priority pointer to the memory region for the saved priority
+ * @param num size of the memory region including interrupt source 0
+ */
+void fdt_plic_priority_save(u8 *priority, u32 num);
 
-void fdt_plic_priority_restore(const u8 *priority);
+/**
+ * Restore the PLIC priority state
+ * @param priority pointer to the memory region for the saved priority
+ * @param num size of the memory region including interrupt source 0
+ */
+void fdt_plic_priority_restore(const u8 *priority, u32 num);
 
 void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold);
 
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 48c24f0bf27..38704a10f34 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -18,9 +18,10 @@ struct plic_data {
 };
 
 /* So far, priorities on all consumers of these functions fit in 8 bits. */
-void plic_priority_save(const struct plic_data *plic, u8 *priority);
+void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
 
-void plic_priority_restore(const struct plic_data *plic, const u8 *priority);
+void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
+			   u32 num);
 
 void plic_context_save(const struct plic_data *plic, int context_id,
 		       u32 *enable, u32 *threshold);
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 8e90fa75eb0..1c37512cfbd 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -24,18 +24,18 @@ static struct plic_data plic[PLIC_MAX_NR];
 static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
 static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
 
-void fdt_plic_priority_save(u8 *priority)
+void fdt_plic_priority_save(u8 *priority, u32 num)
 {
 	struct plic_data *plic = plic_hartid2data[current_hartid()];
 
-	plic_priority_save(plic, priority);
+	plic_priority_save(plic, priority, num);
 }
 
-void fdt_plic_priority_restore(const u8 *priority)
+void fdt_plic_priority_restore(const u8 *priority, u32 num)
 {
 	struct plic_data *plic = plic_hartid2data[current_hartid()];
 
-	plic_priority_restore(plic, priority);
+	plic_priority_restore(plic, priority, num);
 }
 
 void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold)
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 4df9020821a..c5c18796f58 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -36,15 +36,16 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
-void plic_priority_save(const struct plic_data *plic, u8 *priority)
+void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num)
 {
-	for (u32 i = 1; i <= plic->num_src; i++)
+	for (u32 i = 1; i <= num; i++)
 		priority[i] = plic_get_priority(plic, i);
 }
 
-void plic_priority_restore(const struct plic_data *plic, const u8 *priority)
+void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
+			   u32 num)
 {
-	for (u32 i = 1; i <= plic->num_src; i++)
+	for (u32 i = 1; i <= num; i++)
 		plic_set_priority(plic, i, priority[i]);
 }
 
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 18d330d4c14..1f27575be38 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -79,13 +79,13 @@ static u32 plic_threshold;
 static void sun20i_d1_plic_save(void)
 {
 	fdt_plic_context_save(true, plic_sie, &plic_threshold);
-	fdt_plic_priority_save(plic_priority);
+	fdt_plic_priority_save(plic_priority, PLIC_SOURCES);
 }
 
 static void sun20i_d1_plic_restore(void)
 {
 	thead_plic_restore();
-	fdt_plic_priority_restore(plic_priority);
+	fdt_plic_priority_restore(plic_priority, PLIC_SOURCES);
 	fdt_plic_context_restore(true, plic_sie, plic_threshold);
 }
 

From 91c8a7d5cef1e9729c1c2bad549ebc69afeadb3b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Sun, 11 Dec 2022 14:54:22 +0800
Subject: [PATCH 1140/1765] lib: utils/irqchip: plic: Fix the off-by-one error
 in plic_context_init()

The number of interrupt enable register in words was once correct,
but was wrongly changed to have an off-by-one error since
commit 8c362e7d065e ("lib: irqchip/plic: Factor out a context init function").

Fixes: 8c362e7d065e ("lib: irqchip/plic: Factor out a context init function")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
---
 lib/utils/irqchip/plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index c5c18796f58..5b87d3bc9e4 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -121,7 +121,7 @@ int plic_context_init(const struct plic_data *plic, int context_id,
 	if (!plic || context_id < 0)
 		return SBI_EINVAL;
 
-	ie_words = (plic->num_src + 31) / 32;
+	ie_words = plic->num_src / 32 + 1;
 	ie_value = enable ? 0xffffffffU : 0U;
 
 	for (u32 i = 0; i < ie_words; i++)

From fabbc006687a0fddeabb7a3effabb3a8e1c81c48 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Sun, 11 Dec 2022 14:54:23 +0800
Subject: [PATCH 1141/1765] lib: utils/irqchip: plic: Fix the off-by-one error
 in context save/restore helpers

plic->num_src holds the number of interrupt sources without interrupt
source 0 but the interrupt enable register includes a bit for the
interrupt source 0 in the first word.

Fixes: 415ecf28f7ad ("lib: irqchip/plic: Add context save/restore helpers")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
---
 lib/utils/irqchip/plic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 5b87d3bc9e4..0a1596c0df1 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -94,7 +94,7 @@ static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
 void plic_context_save(const struct plic_data *plic, int context_id,
 		       u32 *enable, u32 *threshold)
 {
-	u32 ie_words = (plic->num_src + 31) / 32;
+	u32 ie_words = plic->num_src / 32 + 1;
 
 	for (u32 i = 0; i < ie_words; i++)
 		enable[i] = plic_get_ie(plic, context_id, i);
@@ -105,7 +105,7 @@ void plic_context_save(const struct plic_data *plic, int context_id,
 void plic_context_restore(const struct plic_data *plic, int context_id,
 			  const u32 *enable, u32 threshold)
 {
-	u32 ie_words = (plic->num_src + 31) / 32;
+	u32 ie_words = plic->num_src / 32 + 1;
 
 	for (u32 i = 0; i < ie_words; i++)
 		plic_set_ie(plic, context_id, i, enable[i]);

From 9a2eeb4aaeac9102a7db3676035d83394784c88b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Sun, 11 Dec 2022 14:54:24 +0800
Subject: [PATCH 1142/1765] lib: utils/irqchip: plic: Ensure no out-of-bound
 access in context save/restore helpers

Currently the context save/restore helpers writes/reads the provided
array using an index whose maximum value is determined by PLIC, which
potentially may disagree with the caller to these helpers.

Add a parameter to ask the caller to provide the size limit of the
array to ensure no out-of-bound access happens.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h |  5 +++--
 include/sbi_utils/irqchip/plic.h             |  4 ++--
 lib/utils/irqchip/fdt_irqchip_plic.c         |  9 +++++----
 lib/utils/irqchip/plic.c                     | 14 ++++++++++----
 platform/generic/allwinner/sun20i-d1.c       |  5 +++--
 5 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
index d5b1c60ee92..df645dd00ee 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip_plic.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
@@ -23,9 +23,10 @@ void fdt_plic_priority_save(u8 *priority, u32 num);
  */
 void fdt_plic_priority_restore(const u8 *priority, u32 num);
 
-void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold);
+void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num);
 
-void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold);
+void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
+			      u32 num);
 
 void thead_plic_restore(void);
 
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 38704a10f34..112a714fd37 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -24,10 +24,10 @@ void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
 			   u32 num);
 
 void plic_context_save(const struct plic_data *plic, int context_id,
-		       u32 *enable, u32 *threshold);
+		       u32 *enable, u32 *threshold, u32 num);
 
 void plic_context_restore(const struct plic_data *plic, int context_id,
-			  const u32 *enable, u32 threshold);
+			  const u32 *enable, u32 threshold, u32 num);
 
 int plic_context_init(const struct plic_data *plic, int context_id,
 		      bool enable, u32 threshold);
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 1c37512cfbd..1aadf9190ca 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -38,22 +38,23 @@ void fdt_plic_priority_restore(const u8 *priority, u32 num)
 	plic_priority_restore(plic, priority, num);
 }
 
-void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold)
+void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num)
 {
 	u32 hartid = current_hartid();
 
 	plic_context_save(plic_hartid2data[hartid],
 			  plic_hartid2context[hartid][smode],
-			  enable, threshold);
+			  enable, threshold, num);
 }
 
-void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold)
+void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
+			      u32 num)
 {
 	u32 hartid = current_hartid();
 
 	plic_context_restore(plic_hartid2data[hartid],
 			     plic_hartid2context[hartid][smode],
-			     enable, threshold);
+			     enable, threshold, num);
 }
 
 static int irqchip_plic_warm_init(void)
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 0a1596c0df1..d63351484a3 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -92,22 +92,28 @@ static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
 }
 
 void plic_context_save(const struct plic_data *plic, int context_id,
-		       u32 *enable, u32 *threshold)
+		       u32 *enable, u32 *threshold, u32 num)
 {
 	u32 ie_words = plic->num_src / 32 + 1;
 
-	for (u32 i = 0; i < ie_words; i++)
+	if (num > ie_words)
+		num = ie_words;
+
+	for (u32 i = 0; i < num; i++)
 		enable[i] = plic_get_ie(plic, context_id, i);
 
 	*threshold = plic_get_thresh(plic, context_id);
 }
 
 void plic_context_restore(const struct plic_data *plic, int context_id,
-			  const u32 *enable, u32 threshold)
+			  const u32 *enable, u32 threshold, u32 num)
 {
 	u32 ie_words = plic->num_src / 32 + 1;
 
-	for (u32 i = 0; i < ie_words; i++)
+	if (num > ie_words)
+		num = ie_words;
+
+	for (u32 i = 0; i < num; i++)
 		plic_set_ie(plic, context_id, i, enable[i]);
 
 	plic_set_thresh(plic, context_id, threshold);
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 1f27575be38..1da9e5b5914 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -78,7 +78,7 @@ static u32 plic_threshold;
 
 static void sun20i_d1_plic_save(void)
 {
-	fdt_plic_context_save(true, plic_sie, &plic_threshold);
+	fdt_plic_context_save(true, plic_sie, &plic_threshold, PLIC_IE_WORDS);
 	fdt_plic_priority_save(plic_priority, PLIC_SOURCES);
 }
 
@@ -86,7 +86,8 @@ static void sun20i_d1_plic_restore(void)
 {
 	thead_plic_restore();
 	fdt_plic_priority_restore(plic_priority, PLIC_SOURCES);
-	fdt_plic_context_restore(true, plic_sie, plic_threshold);
+	fdt_plic_context_restore(true, plic_sie, plic_threshold,
+				 PLIC_IE_WORDS);
 }
 
 /*

From a8ee82cd8c008f09c91b5c307de4c9b37660ff71 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <uwu@icenowy.me>
Date: Mon, 12 Dec 2022 16:22:36 +0800
Subject: [PATCH 1143/1765] lib: utils/ipi: mswi: add T-Head C9xx CLINT
 compatible

Althoug the MTIMER part of a C9xx CLINT differs from a SiFive one, the
MSWI part is compliant.

Add T-Head C9xx CLINT compatible string to fdt_ipi_mswi code, sharing
the same codepath with SiFive CLINT.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/fdt_ipi_mswi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 0176941a7d6..4dc91f2cb96 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -56,6 +56,7 @@ static const unsigned long clint_offset = CLINT_MSWI_OFFSET;
 static const struct fdt_match ipi_mswi_match[] = {
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
 	{ .compatible = "sifive,clint0", .data = &clint_offset },
+	{ .compatible = "thead,c900-clint", .data = &clint_offset },
 	{ .compatible = "riscv,aclint-mswi" },
 	{ },
 };

From ca7810aecdbae0630c506f05dbed641f3875ec5b Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <uwu@icenowy.me>
Date: Mon, 12 Dec 2022 16:22:37 +0800
Subject: [PATCH 1144/1765] lib: utils/timer: mtimer: add a quirk for lacking
 mtime register

T-Head developers surely have a different understanding of time CSR and
CLINT's mtime register with SiFive ones, that they did not implement
the mtime register at all -- as shown in openC906 source code, their
time CSR value is just exposed at the top of their processor IP block
and expects an external continous counter, which makes it not
overrideable, and thus mtime register is not implemented, even not for
reading. However, if CLINTEE is not enabled in T-Head's MXSTATUS
extended CSR, these systems still rely on the mtimecmp registers to
generate timer interrupts. This makes it necessary to implement T-Head
C9xx CLINT support in OpenSBI MTIMER driver, which skips implementing
reading mtime register and falls back to default code that reads time
CSR.

Add a quirk into MTIMER driver, which represents a mtime register is
lacking and time CSR value should be used instead.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/aclint_mtimer.c    | 11 ++++++++---
 lib/utils/timer/fdt_timer_mtimer.c | 30 ++++++++++++++++++++----------
 2 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 3f00c218c3d..1846a9a7cc9 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -149,10 +149,10 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	int rc;
 
 	/* Sanity checks */
-	if (!mt || !mt->mtime_size ||
+	if (!mt ||
 	    (mt->hart_count && !mt->mtimecmp_size) ||
-	    (mt->mtime_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
-	    (mt->mtime_size & (ACLINT_MTIMER_ALIGN - 1)) ||
+	    (mt->mtime_size && (mt->mtime_addr & (ACLINT_MTIMER_ALIGN - 1))) ||
+	    (mt->mtime_size && (mt->mtime_size & (ACLINT_MTIMER_ALIGN - 1))) ||
 	    (mt->mtimecmp_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
 	    (mt->mtimecmp_size & (ACLINT_MTIMER_ALIGN - 1)) ||
 	    (mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
@@ -178,6 +178,11 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	for (i = 0; i < mt->hart_count; i++)
 		mtimer_hartid2data[mt->first_hartid + i] = mt;
 
+	if (!mt->mtime_size) {
+		/* Disable reading mtime when mtime is not available */
+		mtimer.timer_value = NULL;
+	}
+
 	/* Add MTIMER regions to the root domain */
 	if (mt->mtime_addr == (mt->mtimecmp_addr + mt->mtimecmp_size)) {
 		rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 7b8546b090b..a0adc70ecef 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -18,6 +18,7 @@
 struct timer_mtimer_quirks {
 	unsigned int	mtime_offset;
 	bool		has_64bit_mmio;
+	bool		without_mtime;
 };
 
 static unsigned long mtimer_count = 0;
@@ -53,12 +54,16 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		/* Set CLINT addresses */
 		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
 		mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
-		mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
-		mt->mtime_size = size[0] - mt->mtimecmp_size;
-		/* Adjust MTIMER address and size for CLINT device */
-		mt->mtime_addr += quirks->mtime_offset;
+		if (!quirks->without_mtime) {
+			mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
+			mt->mtime_size = size[0] - mt->mtimecmp_size;
+			/* Adjust MTIMER address and size for CLINT device */
+			mt->mtime_addr += quirks->mtime_offset;
+			mt->mtime_size -= quirks->mtime_offset;
+		} else {
+			mt->mtime_addr = mt->mtime_size = 0;
+		}
 		mt->mtimecmp_addr += quirks->mtime_offset;
-		mt->mtime_size -= quirks->mtime_offset;
 		/* Apply additional CLINT quirks */
 		mt->has_64bit_mmio = quirks->has_64bit_mmio;
 	} else { /* RISC-V ACLINT MTIMER */
@@ -70,12 +75,17 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	}
 
 	/* Check if MTIMER device has shared MTIME address */
-	mt->has_shared_mtime = false;
-	for (i = 0; i < mtimer_count; i++) {
-		if (mtimer[i].mtime_addr == mt->mtime_addr) {
-			mt->has_shared_mtime = true;
-			break;
+	if (mt->mtime_size) {
+		mt->has_shared_mtime = false;
+		for (i = 0; i < mtimer_count; i++) {
+			if (mtimer[i].mtime_addr == mt->mtime_addr) {
+				mt->has_shared_mtime = true;
+				break;
+			}
 		}
+	} else {
+		/* Assume shared time CSR */
+		mt->has_shared_mtime = true;
 	}
 
 	/* Initialize the MTIMER device */

From b848d8763a737de44b64bfc036c8f51200226440 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <uwu@icenowy.me>
Date: Mon, 12 Dec 2022 16:22:38 +0800
Subject: [PATCH 1145/1765] lib: utils/timer: mtimer: add T-Head C9xx CLINT
 compatible

As we already added the quirk for lacking mtime register to MTIMER
driver, add T-Head C9xx CLINT compatible to it and wire the quirk.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/fdt_timer_mtimer.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index a0adc70ecef..5244f98f5e7 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -124,9 +124,15 @@ static const struct timer_mtimer_quirks sifive_clint_quirks = {
 	.has_64bit_mmio	= true,
 };
 
+static const struct timer_mtimer_quirks thead_clint_quirks = {
+	.mtime_offset	= CLINT_MTIMER_OFFSET,
+	.without_mtime  = true,
+};
+
 static const struct fdt_match timer_mtimer_match[] = {
 	{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
+	{ .compatible = "thead,c900-clint", .data = &thead_clint_quirks },
 	{ .compatible = "riscv,aclint-mtimer" },
 	{ },
 };

From 391ec858751499d0e3de897a931ce045e4e466a7 Mon Sep 17 00:00:00 2001
From: Conor Dooley <conor.dooley@microchip.com>
Date: Wed, 21 Dec 2022 13:59:40 +0000
Subject: [PATCH 1146/1765] docs: pmu: fix binding example

The first PMU binding example does not terminate properties with a ;,
which is invalid. Noticed while converting the binding to yaml.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 1db36fcd8e3..1a16bade85d 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -70,17 +70,17 @@ via platform hooks rather than the device tree.
 ```
 pmu {
 	compatible 			= "riscv,pmu";
-	riscv,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>,
+	riscv,event-to-mhpmevent 		= <0x0000B  0x0000 0x0001>;
 	riscv,event-to-mhpmcounters 	= <0x00001 0x00001 0x00000001>,
 						  <0x00002 0x00002 0x00000004>,
 						  <0x00003 0x0000A 0x00000ff8>,
-						  <0x10000 0x10033 0x000ff000>,
+						  <0x10000 0x10033 0x000ff000>;
 					/* For event ID 0x0002 */
 	riscv,raw-event-to-mhpmcounters = <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
 					/* For event ID 0-4 */
 					<0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
 					/* For event ID 0xffffffff0000000f - 0xffffffff000000ff */
-					<0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0>,
+					<0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0>;
 };
 ```
 

From 0412460baf338a4d65c02f9456ae42ed9c3e5e4f Mon Sep 17 00:00:00 2001
From: Conor Dooley <conor.dooley@microchip.com>
Date: Thu, 22 Dec 2022 19:39:14 +0000
Subject: [PATCH 1147/1765] docs: pmu: update a reference to a deprecated
 property name

event-to-mhpmevent was deprecated and replaced by
riscv,event-to-mhpmevent, but a reference remains to the old name.
Replace it with the new one.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 1a16bade85d..9c796366810 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -46,7 +46,7 @@ a table format where each row represents a certain range of events and
 corresponding counters. The first column represents starting of the pmu event id
 and 2nd column represents the end of the pmu event id. The third column
 represent a bitmap of all the MHPMCOUNTERx. This property is mandatory if
-event-to-mhpmevent is present. Otherwise, it can be omitted. This property
+riscv,event-to-mhpmevent is present. Otherwise, it can be omitted. This property
 shouldn't encode any raw event.
 
 * **riscv,raw-event-to-mhpmcounters**(Optional) - It represents an ONE-to-MANY

From d5d12a91d101764678cb7336fc916bada071911b Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 22 Dec 2022 12:38:50 -0800
Subject: [PATCH 1148/1765] docs: pmu: Update the pmu doc with removal of
 mcountinhbit restriction

Since commit b28f070, it is possible for platforms to run perf monitoring
even if mcountinhibit is not supported. Sampling still won't be possible
though as it requires sscofpmf extension.

Update the docs to remove the restriction.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/pmu_support.md | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 9c796366810..8cfa08c814d 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -6,9 +6,6 @@ capability of performance analysis tools such as perf if SBI PMU extension is
 enabled. The OpenSBI implementation makes the following assumptions about the
 hardware platform.
 
- * MCOUNTINHIBIT CSR must be implemented in the hardware. Otherwise, SBI PMU
-extension will not be enabled.
-
  * The platform must provide information about PMU event to counter mapping
 via device tree or platform specific hooks. Otherwise, SBI PMU extension will
 not be enabled.

From 6b5188ca14e59ce7bf71afe4e7d3d557c3d31bf8 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sat, 24 Dec 2022 11:36:49 +0530
Subject: [PATCH 1149/1765] include: Bump-up version to 1.2

This patch updates OpenSBI version to 1.2 as part of
release preparation.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index f687f30c696..dd75deae814 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 1
+#define OPENSBI_VERSION_MINOR 2
 
 /**
  * OpenSBI 32-bit version with:

From 440fa818fbffd0771d75890c4fcda062ceab7ebd Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Wed, 21 Dec 2022 19:38:06 +0800
Subject: [PATCH 1150/1765] treewide: Replace TRUE/FALSE with true/false

C language standard uses true/false for the boolean type.
Let's switch to that for better language compatibility.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi/sbi_domain.h           |  4 +--
 include/sbi/sbi_list.h             |  2 +-
 include/sbi/sbi_platform.h         | 18 +++++------
 include/sbi/sbi_types.h            |  6 ++--
 lib/sbi/sbi_console.c              |  4 +--
 lib/sbi/sbi_domain.c               | 44 ++++++++++++-------------
 lib/sbi/sbi_ecall.c                |  4 +--
 lib/sbi/sbi_ecall_hsm.c            |  2 +-
 lib/sbi/sbi_emulate_csr.c          | 10 +++---
 lib/sbi/sbi_fifo.c                 |  8 ++---
 lib/sbi/sbi_init.c                 | 52 +++++++++++++++---------------
 lib/sbi/sbi_ipi.c                  |  2 +-
 lib/sbi/sbi_pmu.c                  | 14 ++++----
 lib/sbi/sbi_system.c               |  2 +-
 lib/sbi/sbi_trap.c                 |  8 ++---
 lib/utils/fdt/fdt_domain.c         |  4 +--
 lib/utils/reset/fdt_reset_gpio.c   | 12 +++----
 platform/fpga/ariane/platform.c    |  2 +-
 platform/fpga/openpiton/platform.c |  2 +-
 platform/generic/sifive/fu740.c    |  2 +-
 platform/kendryte/k210/platform.c  |  2 +-
 platform/nuclei/ux600/platform.c   |  2 +-
 platform/template/platform.c       |  2 +-
 23 files changed, 103 insertions(+), 105 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 5553d214e73..f0d9289ec7c 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -113,7 +113,7 @@ extern struct sbi_domain *domidx_to_domain_table[];
  * Check whether given HART is assigned to specified domain
  * @param dom pointer to domain
  * @param hartid the HART ID
- * @return TRUE if HART is assigned to domain otherwise FALSE
+ * @return true if HART is assigned to domain otherwise false
  */
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
 
@@ -148,7 +148,7 @@ void sbi_domain_memregion_init(unsigned long addr,
  * @param addr the address to be checked
  * @param mode the privilege mode of access
  * @param access_flags bitmask of domain access types (enum sbi_domain_access)
- * @return TRUE if access allowed otherwise FALSE
+ * @return true if access allowed otherwise false
  */
 bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
diff --git a/include/sbi/sbi_list.h b/include/sbi/sbi_list.h
index b1178dfc9b8..fe735dff054 100644
--- a/include/sbi/sbi_list.h
+++ b/include/sbi/sbi_list.h
@@ -47,7 +47,7 @@ static inline void __sbi_list_add(struct sbi_dlist *new,
  * Checks if the list is empty or not.
  * @param head List head
  *
- * Retruns TRUE if list is empty, FALSE otherwise.
+ * Returns true if list is empty, false otherwise.
  */
 static inline bool sbi_list_empty(struct sbi_dlist *head)
 {
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 722f27a1a32..010e9cebdd7 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -344,16 +344,16 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
  * @param plat pointer to struct sbi_platform
  * @param hartid HART ID
  *
- * @return TRUE if HART is invalid and FALSE otherwise
+ * @return true if HART is invalid and false otherwise
  */
 static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
 					     u32 hartid)
 {
 	if (!plat)
-		return TRUE;
+		return true;
 	if (plat->hart_count <= sbi_platform_hart_index(plat, hartid))
-		return TRUE;
-	return FALSE;
+		return true;
+	return false;
 }
 
 /**
@@ -377,7 +377,7 @@ static inline int sbi_platform_nascent_init(const struct sbi_platform *plat)
  * Early initialization for current HART
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
@@ -393,7 +393,7 @@ static inline int sbi_platform_early_init(const struct sbi_platform *plat,
  * Final initialization for current HART
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
@@ -538,7 +538,7 @@ static inline int sbi_platform_console_init(const struct sbi_platform *plat)
  * Initialize the platform interrupt controller for current HART
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
@@ -565,7 +565,7 @@ static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
  * Initialize the platform IPI support for current HART
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
@@ -592,7 +592,7 @@ static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
  * Initialize the platform timer for current HART
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 7fb1af7baae..75cddddfe0d 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -54,10 +54,8 @@ typedef unsigned long		virtual_size_t;
 typedef unsigned long		physical_addr_t;
 typedef unsigned long		physical_size_t;
 
-#define TRUE			1
-#define FALSE			0
-#define true			TRUE
-#define false			FALSE
+#define true			1
+#define false			0
 
 #define NULL			((void *)0)
 
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index cfef2f8608d..bb6e1ef159a 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -20,9 +20,9 @@ bool sbi_isprintable(char c)
 {
 	if (((31 < c) && (c < 127)) || (c == '\f') || (c == '\r') ||
 	    (c == '\n') || (c == '\t')) {
-		return TRUE;
+		return true;
 	}
-	return FALSE;
+	return false;
 }
 
 int sbi_getc(void)
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 32055958d5d..19e2029e6c4 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -33,7 +33,7 @@ struct sbi_domain root = {
 	.name = "root",
 	.possible_harts = &root_hmask,
 	.regions = root_memregs,
-	.system_reset_allowed = TRUE,
+	.system_reset_allowed = true,
 };
 
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
@@ -41,7 +41,7 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 	if (dom)
 		return sbi_hartmask_test_hart(hartid, &dom->assigned_harts);
 
-	return FALSE;
+	return false;
 }
 
 ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
@@ -105,12 +105,12 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
 			   unsigned long access_flags)
 {
-	bool rmmio, mmio = FALSE;
+	bool rmmio, mmio = false;
 	struct sbi_domain_memregion *reg;
 	unsigned long rstart, rend, rflags, rwx = 0;
 
 	if (!dom)
-		return FALSE;
+		return false;
 
 	if (access_flags & SBI_DOMAIN_READ)
 		rwx |= SBI_DOMAIN_MEMREGION_READABLE;
@@ -119,7 +119,7 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 	if (access_flags & SBI_DOMAIN_EXECUTE)
 		rwx |= SBI_DOMAIN_MEMREGION_EXECUTABLE;
 	if (access_flags & SBI_DOMAIN_MMIO)
-		mmio = TRUE;
+		mmio = true;
 
 	sbi_domain_for_each_memregion(dom, reg) {
 		rflags = reg->flags;
@@ -130,29 +130,29 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 		rend = (reg->order < __riscv_xlen) ?
 			rstart + ((1UL << reg->order) - 1) : -1UL;
 		if (rstart <= addr && addr <= rend) {
-			rmmio = (rflags & SBI_DOMAIN_MEMREGION_MMIO) ? TRUE : FALSE;
+			rmmio = (rflags & SBI_DOMAIN_MEMREGION_MMIO) ? true : false;
 			if (mmio != rmmio)
-				return FALSE;
-			return ((rflags & rwx) == rwx) ? TRUE : FALSE;
+				return false;
+			return ((rflags & rwx) == rwx) ? true : false;
 		}
 	}
 
-	return (mode == PRV_M) ? TRUE : FALSE;
+	return (mode == PRV_M) ? true : false;
 }
 
 /* Check if region complies with constraints */
 static bool is_region_valid(const struct sbi_domain_memregion *reg)
 {
 	if (reg->order < 3 || __riscv_xlen < reg->order)
-		return FALSE;
+		return false;
 
 	if (reg->order == __riscv_xlen && reg->base != 0)
-		return FALSE;
+		return false;
 
 	if (reg->order < __riscv_xlen && (reg->base & (BIT(reg->order) - 1)))
-		return FALSE;
+		return false;
 
-	return TRUE;
+	return true;
 }
 
 /** Check if regionA is sub-region of regionB */
@@ -168,9 +168,9 @@ static bool is_region_subset(const struct sbi_domain_memregion *regA,
 	    (regA_start < regB_end) &&
 	    (regB_start < regA_end) &&
 	    (regA_end <= regB_end))
-		return TRUE;
+		return true;
 
-	return FALSE;
+	return false;
 }
 
 /** Check if regionA conflicts regionB */
@@ -179,9 +179,9 @@ static bool is_region_conflict(const struct sbi_domain_memregion *regA,
 {
 	if ((is_region_subset(regA, regB) || is_region_subset(regB, regA)) &&
 	    regA->flags == regB->flags)
-		return TRUE;
+		return true;
 
-	return FALSE;
+	return false;
 }
 
 /** Check if regionA should be placed before regionB */
@@ -189,13 +189,13 @@ static bool is_region_before(const struct sbi_domain_memregion *regA,
 			     const struct sbi_domain_memregion *regB)
 {
 	if (regA->order < regB->order)
-		return TRUE;
+		return true;
 
 	if ((regA->order == regB->order) &&
 	    (regA->base < regB->base))
-		return TRUE;
+		return true;
 
-	return FALSE;
+	return false;
 }
 
 static int sanitize_domain(const struct sbi_platform *plat,
@@ -237,12 +237,12 @@ static int sanitize_domain(const struct sbi_platform *plat,
 
 	/* Count memory regions and check presence of firmware region */
 	count = 0;
-	have_fw_reg = FALSE;
+	have_fw_reg = false;
 	sbi_domain_for_each_memregion(dom, reg) {
 		if (reg->order == root_fw_region.order &&
 		    reg->base == root_fw_region.base &&
 		    reg->flags == root_fw_region.flags)
-			have_fw_reg = TRUE;
+			have_fw_reg = true;
 		count++;
 	}
 	if (!have_fw_reg) {
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 25dd78c4015..27ce5d49342 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -78,7 +78,7 @@ int sbi_ecall_register_extension(struct sbi_ecall_extension *ext)
 
 void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext)
 {
-	bool found = FALSE;
+	bool found = false;
 	struct sbi_ecall_extension *t;
 
 	if (!ext)
@@ -86,7 +86,7 @@ void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext)
 
 	sbi_list_for_each_entry(t, &ecall_exts_list, head) {
 		if (t == ext) {
-			found = TRUE;
+			found = true;
 			break;
 		}
 	}
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index a339abf07c1..703a824493b 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -33,7 +33,7 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 					 regs->a0, regs->a1, smode, regs->a2);
 		break;
 	case SBI_EXT_HSM_HART_STOP:
-		ret = sbi_hsm_hart_stop(scratch, TRUE);
+		ret = sbi_hsm_hart_stop(scratch, true);
 		break;
 	case SBI_EXT_HSM_HART_GET_STATUS:
 		ret = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(),
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index aec9d3c778f..64bebd8da7a 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -39,7 +39,7 @@ static bool hpm_allowed(int hpm_num, ulong prev_mode, bool virt)
 			cen = 0;
 	}
 
-	return ((cen >> hpm_num) & 1) ? TRUE : FALSE;
+	return ((cen >> hpm_num) & 1) ? true : false;
 }
 
 int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
@@ -49,9 +49,9 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
 #else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
 #endif
 
 	switch (csr_num) {
@@ -164,9 +164,9 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 	int ret = 0;
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 #if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
 #else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+	bool virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
 #endif
 
 	switch (csr_num) {
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 68d6039a2e7..72c6d398f18 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -26,7 +26,7 @@ void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 /* Note: must be called with fifo->qlock held */
 static inline bool __sbi_fifo_is_full(struct sbi_fifo *fifo)
 {
-	return (fifo->avail == fifo->num_entries) ? TRUE : FALSE;
+	return (fifo->avail == fifo->num_entries) ? true : false;
 }
 
 u16 sbi_fifo_avail(struct sbi_fifo *fifo)
@@ -75,7 +75,7 @@ static inline void  __sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 /* Note: must be called with fifo->qlock held */
 static inline bool __sbi_fifo_is_empty(struct sbi_fifo *fifo)
 {
-	return (fifo->avail == 0) ? TRUE : FALSE;
+	return (fifo->avail == 0) ? true : false;
 }
 
 int sbi_fifo_is_empty(struct sbi_fifo *fifo)
@@ -105,13 +105,13 @@ static inline void __sbi_fifo_reset(struct sbi_fifo *fifo)
 bool sbi_fifo_reset(struct sbi_fifo *fifo)
 {
 	if (!fifo)
-		return FALSE;
+		return false;
 
 	spin_lock(&fifo->qlock);
 	__sbi_fifo_reset(fifo);
 	spin_unlock(&fifo->qlock);
 
-	return TRUE;
+	return true;
 }
 
 /**
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index a8500e59274..ded3da00a93 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -255,15 +255,15 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (!init_count_offset)
 		sbi_hart_hang();
 
-	rc = sbi_hsm_init(scratch, hartid, TRUE);
+	rc = sbi_hsm_init(scratch, hartid, true);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_early_init(plat, TRUE);
+	rc = sbi_platform_early_init(plat, true);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, TRUE);
+	rc = sbi_hart_init(scratch, true);
 	if (rc)
 		sbi_hart_hang();
 
@@ -271,32 +271,32 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_pmu_init(scratch, TRUE);
+	rc = sbi_pmu_init(scratch, true);
 	if (rc)
 		sbi_hart_hang();
 
 	sbi_boot_print_banner(scratch);
 
-	rc = sbi_irqchip_init(scratch, TRUE);
+	rc = sbi_irqchip_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: irqchip init failed (error %d)\n",
 			   __func__, rc);
 		sbi_hart_hang();
 	}
 
-	rc = sbi_ipi_init(scratch, TRUE);
+	rc = sbi_ipi_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: ipi init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
 	}
 
-	rc = sbi_tlb_init(scratch, TRUE);
+	rc = sbi_tlb_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: tlb init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
 	}
 
-	rc = sbi_timer_init(scratch, TRUE);
+	rc = sbi_timer_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: timer init failed (error %d)\n", __func__, rc);
 		sbi_hart_hang();
@@ -332,7 +332,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	 * Note: Platform final initialization should be last so that
 	 * it sees correct domain assignment and PMP configuration.
 	 */
-	rc = sbi_platform_final_init(plat, TRUE);
+	rc = sbi_platform_final_init(plat, true);
 	if (rc) {
 		sbi_printf("%s: platform final init failed (error %d)\n",
 			   __func__, rc);
@@ -352,7 +352,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_hsm_prepare_next_jump(scratch, hartid);
 	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
-			     scratch->next_mode, FALSE);
+			     scratch->next_mode, false);
 }
 
 static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
@@ -364,35 +364,35 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	if (!init_count_offset)
 		sbi_hart_hang();
 
-	rc = sbi_hsm_init(scratch, hartid, FALSE);
+	rc = sbi_hsm_init(scratch, hartid, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_early_init(plat, FALSE);
+	rc = sbi_platform_early_init(plat, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_init(scratch, FALSE);
+	rc = sbi_hart_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_pmu_init(scratch, FALSE);
+	rc = sbi_pmu_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_irqchip_init(scratch, FALSE);
+	rc = sbi_irqchip_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_ipi_init(scratch, FALSE);
+	rc = sbi_ipi_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_tlb_init(scratch, FALSE);
+	rc = sbi_tlb_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_timer_init(scratch, FALSE);
+	rc = sbi_timer_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
@@ -400,7 +400,7 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_final_init(plat, FALSE);
+	rc = sbi_platform_final_init(plat, false);
 	if (rc)
 		sbi_hart_hang();
 
@@ -444,7 +444,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_hart_switch_mode(hartid, scratch->next_arg1,
 			     scratch->next_addr,
-			     scratch->next_mode, FALSE);
+			     scratch->next_mode, false);
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
@@ -463,8 +463,8 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  */
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
-	bool next_mode_supported	= FALSE;
-	bool coldboot			= FALSE;
+	bool next_mode_supported	= false;
+	bool coldboot			= false;
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
@@ -474,15 +474,15 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 
 	switch (scratch->next_mode) {
 	case PRV_M:
-		next_mode_supported = TRUE;
+		next_mode_supported = true;
 		break;
 	case PRV_S:
 		if (misa_extension('S'))
-			next_mode_supported = TRUE;
+			next_mode_supported = true;
 		break;
 	case PRV_U:
 		if (misa_extension('U'))
-			next_mode_supported = TRUE;
+			next_mode_supported = true;
 		break;
 	default:
 		sbi_hart_hang();
@@ -499,7 +499,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	 */
 
 	if (next_mode_supported && atomic_xchg(&coldboot_lottery, 1) == 0)
-		coldboot = TRUE;
+		coldboot = true;
 
 	/*
 	 * Do platform specific nascent (very early) initialization so
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 7aafbbde50b..1bcc2e40c90 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -163,7 +163,7 @@ void sbi_ipi_clear_smode(void)
 
 static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
 {
-	sbi_hsm_hart_stop(scratch, TRUE);
+	sbi_hsm_hart_stop(scratch, true);
 }
 
 static struct sbi_ipi_event_ops ipi_halt_ops = {
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 91d9ccc332b..154dbdac549 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -85,7 +85,7 @@ static uint32_t total_ctrs;
  * @param evtA Pointer to the existing hw event structure
  * @param evtB Pointer to the new hw event structure
  *
- * Return FALSE if the range doesn't overlap, TRUE otherwise
+ * Return false if the range doesn't overlap, true otherwise
  */
 static bool pmu_event_range_overlap(struct sbi_pmu_hw_event *evtA,
 				    struct sbi_pmu_hw_event *evtB)
@@ -93,17 +93,17 @@ static bool pmu_event_range_overlap(struct sbi_pmu_hw_event *evtA,
 	/* check if the range of events overlap with a previous entry */
 	if (((evtA->end_idx < evtB->start_idx) && (evtA->end_idx < evtB->end_idx)) ||
 	   ((evtA->start_idx > evtB->start_idx) && (evtA->start_idx > evtB->end_idx)))
-		return FALSE;
-	return TRUE;
+		return false;
+	return true;
 }
 
 static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
 				     uint64_t select_val, uint64_t select_mask)
 {
 	if ((evt->select == select_val) && (evt->select_mask == select_mask))
-		return TRUE;
+		return true;
 
-	return FALSE;
+	return false;
 }
 
 static int pmu_event_validate(unsigned long event_idx)
@@ -384,14 +384,14 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 	int event_idx_type;
 	uint32_t event_code;
 	int ret = SBI_EINVAL;
-	bool bUpdate = FALSE;
+	bool bUpdate = false;
 	int i, cidx;
 
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return ret;
 
 	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
-		bUpdate = TRUE;
+		bUpdate = true;
 
 	for_each_set_bit(i, &cmask, total_ctrs) {
 		cidx = i + cbase;
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 9cea3c0c37a..f37c811d0bf 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -79,7 +79,7 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 	}
 
 	/* Stop current HART */
-	sbi_hsm_hart_stop(scratch, FALSE);
+	sbi_hsm_hart_stop(scratch, false);
 
 	/* Platform specific reset if domain allowed system reset */
 	if (dom->system_reset_allowed) {
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index c875c907388..025cf614c27 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -88,12 +88,12 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 {
 	ulong hstatus, vsstatus, prev_mode;
 #if __riscv_xlen == 32
-	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
+	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
 #else
-	bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
+	bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
 #endif
 	/* By default, we redirect to HS-mode */
-	bool next_virt = FALSE;
+	bool next_virt = false;
 
 	/* Sanity check on previous mode */
 	prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
@@ -106,7 +106,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	if (misa_extension('H') && prev_virt) {
 		if ((trap->cause < __riscv_xlen) &&
 		    (csr_read(CSR_HEDELEG) & BIT(trap->cause))) {
-			next_virt = TRUE;
+			next_virt = true;
 		}
 	}
 
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 056860357d6..35462a2008a 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -401,9 +401,9 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	/* Read "system-reset-allowed" DT property */
 	if (fdt_get_property(fdt, domain_offset,
 			     "system-reset-allowed", NULL))
-		dom->system_reset_allowed = TRUE;
+		dom->system_reset_allowed = true;
 	else
-		dom->system_reset_allowed = FALSE;
+		dom->system_reset_allowed = false;
 
 	/* Find /cpus DT node */
 	cpus_offset = fdt_path_offset(fdt, "/cpus");
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index bd2c6227064..6a908dd7f1a 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -77,7 +77,7 @@ static void gpio_reset_exec(struct gpio_reset *reset)
 
 static int gpio_system_poweroff_check(u32 type, u32 reason)
 {
-	if (gpio_reset_get(FALSE, type))
+	if (gpio_reset_get(false, type))
 		return 128;
 
 	return 0;
@@ -85,7 +85,7 @@ static int gpio_system_poweroff_check(u32 type, u32 reason)
 
 static void gpio_system_poweroff(u32 type, u32 reason)
 {
-	gpio_reset_exec(gpio_reset_get(FALSE, type));
+	gpio_reset_exec(gpio_reset_get(false, type));
 }
 
 static struct sbi_system_reset_device gpio_poweroff = {
@@ -96,7 +96,7 @@ static struct sbi_system_reset_device gpio_poweroff = {
 
 static int gpio_system_restart_check(u32 type, u32 reason)
 {
-	if (gpio_reset_get(TRUE, type))
+	if (gpio_reset_get(true, type))
 		return 128;
 
 	return 0;
@@ -104,7 +104,7 @@ static int gpio_system_restart_check(u32 type, u32 reason)
 
 static void gpio_system_restart(u32 type, u32 reason)
 {
-	gpio_reset_exec(gpio_reset_get(TRUE, type));
+	gpio_reset_exec(gpio_reset_get(true, type));
 }
 
 static struct sbi_system_reset_device gpio_restart = {
@@ -149,7 +149,7 @@ static int gpio_reset_init(void *fdt, int nodeoff,
 }
 
 static const struct fdt_match gpio_poweroff_match[] = {
-	{ .compatible = "gpio-poweroff", .data = (const void *)FALSE },
+	{ .compatible = "gpio-poweroff", .data = (const void *)false },
 	{ },
 };
 
@@ -159,7 +159,7 @@ struct fdt_reset fdt_poweroff_gpio = {
 };
 
 static const struct fdt_match gpio_reset_match[] = {
-	{ .compatible = "gpio-restart", .data = (const void *)TRUE },
+	{ .compatible = "gpio-restart", .data = (const void *)true },
 	{ },
 };
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 56a666bb82c..1e341c2049f 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -56,7 +56,7 @@ static struct aclint_mtimer_data mtimer = {
 	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = ARIANE_HART_COUNT,
-	.has_64bit_mmio = TRUE,
+	.has_64bit_mmio = true,
 };
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 5ff7d200aba..57ae6980924 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -60,7 +60,7 @@ static struct aclint_mtimer_data mtimer = {
 	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
-	.has_64bit_mmio = TRUE,
+	.has_64bit_mmio = true,
 };
 
 /*
diff --git a/platform/generic/sifive/fu740.c b/platform/generic/sifive/fu740.c
index f595c0484b6..fe71ce6a9ea 100644
--- a/platform/generic/sifive/fu740.c
+++ b/platform/generic/sifive/fu740.c
@@ -205,7 +205,7 @@ static int da9063_reset_init(void *fdt, int nodeoff,
 }
 
 static const struct fdt_match da9063_reset_match[] = {
-	{ .compatible = "dlg,da9063", .data = (void *)TRUE },
+	{ .compatible = "dlg,da9063", .data = (void *)true },
 	{ },
 };
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index ef848c7ce78..7eb9015bb85 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -52,7 +52,7 @@ static struct aclint_mtimer_data mtimer = {
 	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = K210_HART_COUNT,
-	.has_64bit_mmio = TRUE,
+	.has_64bit_mmio = true,
 };
 
 static u32 k210_get_clk_freq(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 2b0273475f8..4eccff15ee2 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -83,7 +83,7 @@ static struct aclint_mtimer_data mtimer = {
 	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = UX600_HART_COUNT,
-	.has_64bit_mmio = TRUE,
+	.has_64bit_mmio = true,
 };
 
 static u32 measure_cpu_freq(u32 n)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index f3802dad663..8adc431f1ce 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -53,7 +53,7 @@ static struct aclint_mtimer_data mtimer = {
 	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
 	.first_hartid = 0,
 	.hart_count = PLATFORM_HART_COUNT,
-	.has_64bit_mmio = TRUE,
+	.has_64bit_mmio = true,
 };
 
 /*

From 6509127ad620748c90c02b4bd32fa91df165ee82 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Sun, 25 Dec 2022 08:52:11 +0530
Subject: [PATCH 1151/1765] Makefile: Remove -N ldflag to prevent linker RWX
 warning

-N option coalesce all sections into single LOAD segment which causes
data and other sections to have executable permission causing warning
with new binutils ld 2.39.
New ld emits warning when any segment have all three permissions RWX.

ld.bfd: warning: test.elf has a LOAD segment with RWX permissions
ld.bfd: warning: fw_dynamic.elf has a LOAD segment with RWX permissions
ld.bfd: warning: fw_jump.elf has a LOAD segment with RWX permissions
ld.bfd: warning: fw_payload.elf has a LOAD segment with RWX permissions

This option was added in below commit -
commit: eeab92f2423e ("Makefile: Convert to a more standard format")

Removing -N option allows to have text and rodata into one LOAD
segment and other sections into separate LOAD segment which prevents
RWX permissions on single LOAD segment. Here X == E

Current
 LOAD           0x0000000000000120 0x0000000080000000 0x0000000080000000
                 0x000000000001d4d0 0x0000000000032ed8  RWE    0x10

-N removed
  LOAD           0x0000000000001000 0x0000000080000000 0x0000000080000000
                 0x00000000000198cc 0x00000000000198cc  R E    0x1000
  LOAD           0x000000000001b000 0x000000008001a000 0x000000008001a000
                 0x00000000000034d0 0x0000000000018ed8  RW     0x1000

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Samuel Holland <samuel@sholland.org>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 92203c5a2ac..b742d6dbc5e 100644
--- a/Makefile
+++ b/Makefile
@@ -369,7 +369,7 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
-ELFFLAGS	+=	-Wl,--build-id=none -Wl,-N
+ELFFLAGS	+=	-Wl,--build-id=none
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)
 

From 65638f8d6b1f438ae442bad7a4f77b188d3d3689 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Mon, 26 Dec 2022 11:36:03 +0800
Subject: [PATCH 1152/1765] lib: utils/sys: Allow custom HTIF base address for
 RV32

commit 6dde43584f18 ("lib: utils/sys: Extend HTIF library to allow custom base address")
forgot to update do_tohost_fromhost() codes for RV32, which still
accesses the HTIF registers using the ELF symbol address directly.

Fixes: 6dde43584f18 ("lib: utils/sys: Extend HTIF library to allow custom base address")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/sys/htif.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/sys/htif.c b/lib/utils/sys/htif.c
index d7cbeaf6217..b4e63212477 100644
--- a/lib/utils/sys/htif.c
+++ b/lib/utils/sys/htif.c
@@ -135,11 +135,11 @@ static void do_tohost_fromhost(uint64_t dev, uint64_t cmd, uint64_t data)
 	__set_tohost(HTIF_DEV_SYSTEM, cmd, data);
 
 	while (1) {
-		uint64_t fh = fromhost;
+		uint64_t fh = __read_fromhost();
 		if (fh) {
 			if (FROMHOST_DEV(fh) == HTIF_DEV_SYSTEM &&
 			    FROMHOST_CMD(fh) == cmd) {
-				fromhost = 0;
+				__write_fromhost(0);
 				break;
 			}
 			__check_fromhost();

From f14595a7cfc8de16a06335c6ecdf9ae23a0adf53 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 29 Dec 2022 10:56:15 +0800
Subject: [PATCH 1153/1765] lib: sbi: Allow platform to influence cold boot
 HART selection

We add an optional cold_boot_allowed() platform callback which allows
platform support to decide which HARTs can do cold boot initialization.

If this platform callback is not available then any HART can do cold
boot initialization.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_platform.h | 20 ++++++++++++++++++++
 lib/sbi/sbi_init.c         |  7 +++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 010e9cebdd7..43d1c031ed7 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -65,6 +65,9 @@ enum sbi_platform_features {
 
 /** Platform functions */
 struct sbi_platform_operations {
+	/* Check if specified HART is allowed to do cold boot */
+	bool (*cold_boot_allowed)(u32 hartid);
+
 	/* Platform nascent initialization */
 	int (*nascent_init)(void);
 
@@ -356,6 +359,23 @@ static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
 	return false;
 }
 
+/**
+ * Check whether given HART is allowed to do cold boot
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param hartid HART ID
+ *
+ * @return true if HART is allowed to do cold boot and false otherwise
+ */
+static inline bool sbi_platform_cold_boot_allowed(
+					const struct sbi_platform *plat,
+					u32 hartid)
+{
+	if (plat && sbi_platform_ops(plat)->cold_boot_allowed)
+		return sbi_platform_ops(plat)->cold_boot_allowed(hartid);
+	return true;
+}
+
 /**
  * Nascent (very early) initialization for current HART
  *
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index ded3da00a93..259a191051a 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -498,8 +498,11 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 	 * HARTs which satisfy above condition.
 	 */
 
-	if (next_mode_supported && atomic_xchg(&coldboot_lottery, 1) == 0)
-		coldboot = true;
+	if (sbi_platform_cold_boot_allowed(plat, hartid)) {
+		if (next_mode_supported &&
+		    atomic_xchg(&coldboot_lottery, 1) == 0)
+			coldboot = true;
+	}
 
 	/*
 	 * Do platform specific nascent (very early) initialization so

From 6957ae0e91ebd9f17411b56f3e9100d31bc48b56 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 29 Dec 2022 10:56:16 +0800
Subject: [PATCH 1154/1765] platform: generic: Allow platform_override to
 select cold boot HART

We add a generic platform override callback to allow platform specific
selection of cold boot HART.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 platform/generic/include/platform_override.h | 1 +
 platform/generic/platform.c                  | 9 +++++++++
 2 files changed, 10 insertions(+)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 7f1558dde1a..21354e96bf6 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -18,6 +18,7 @@ struct platform_override {
 	const struct fdt_match *match_table;
 	u64 (*features)(const struct fdt_match *match);
 	u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+	bool (*cold_boot_allowed)(u32 hartid, const struct fdt_match *match);
 	int (*early_init)(bool cold_boot, const struct fdt_match *match);
 	int (*final_init)(bool cold_boot, const struct fdt_match *match);
 	void (*early_exit)(const struct fdt_match *match);
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index bfe15f0d6b8..5fb0dc6565b 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -122,6 +122,14 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 		wfi();
 }
 
+static bool generic_cold_boot_allowed(u32 hartid)
+{
+	if (generic_plat && generic_plat->cold_boot_allowed)
+		return generic_plat->cold_boot_allowed(
+						hartid, generic_plat_match);
+	return true;
+}
+
 static int generic_nascent_init(void)
 {
 	if (platform_has_mlevel_imsic)
@@ -261,6 +269,7 @@ static int generic_console_init(void)
 }
 
 const struct sbi_platform_operations platform_ops = {
+	.cold_boot_allowed	= generic_cold_boot_allowed,
 	.nascent_init		= generic_nascent_init,
 	.early_init		= generic_early_init,
 	.final_init		= generic_final_init,

From cb7e7c3325e68a9b4d5ea210b97cac693cf5814f Mon Sep 17 00:00:00 2001
From: Wei Liang Lim <weiliang.lim@starfivetech.com>
Date: Thu, 29 Dec 2022 10:56:17 +0800
Subject: [PATCH 1155/1765] platform: generic: Allow platform_override to
 perform firmware init

We add a generic platform override callback to allow platform specific firmware init.

Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Chee Hong Ang <cheehong.ang@starfivetech.com>
Reviewed-by: Jun Liang Tan <junliang.tan@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/include/platform_override.h | 1 +
 platform/generic/platform.c                  | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 21354e96bf6..a59b06a11d8 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -26,6 +26,7 @@ struct platform_override {
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
 	int (*extensions_init)(const struct fdt_match *match,
 			       struct sbi_hart_features *hfeatures);
+	void (*fw_init)(void *fdt, const struct fdt_match *match);
 	int (*vendor_ext_check)(long extid, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long extid, long funcid,
 				   const struct sbi_trap_regs *regs,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 5fb0dc6565b..a34d3b01933 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -85,6 +85,9 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 	fw_platform_lookup_special(fdt, root_offset);
 
+	if (generic_plat && generic_plat->fw_init)
+		generic_plat->fw_init(fdt, generic_plat_match);
+
 	model = fdt_getprop(fdt, root_offset, "model", &len);
 	if (model)
 		sbi_strncpy(platform.name, model, sizeof(platform.name) - 1);

From 8020df8733b060f01e35b0b2bcb2b41e6b992e9b Mon Sep 17 00:00:00 2001
From: Wei Liang Lim <weiliang.lim@starfivetech.com>
Date: Thu, 29 Dec 2022 10:56:18 +0800
Subject: [PATCH 1156/1765] generic/starfive: Add Starfive JH7110 platform
 implementation

Add Starfive JH7110 platform implementation

Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Chee Hong Ang <cheehong.ang@starfivetech.com>
Reviewed-by: Jun Liang Tan <junliang.tan@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig             |  4 +++
 platform/generic/configs/defconfig   |  1 +
 platform/generic/starfive/jh7110.c   | 47 ++++++++++++++++++++++++++++
 platform/generic/starfive/objects.mk |  6 ++++
 4 files changed, 58 insertions(+)
 create mode 100644 platform/generic/starfive/jh7110.c
 create mode 100644 platform/generic/starfive/objects.mk

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 62c7a2d8051..47c10e53a32 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -45,4 +45,8 @@ config PLATFORM_SIFIVE_FU740
 	depends on FDT_RESET && FDT_I2C
 	default n
 
+config PLATFORM_STARFIVE_JH7110
+	bool "StarFive JH7110 support"
+	default n
+
 endif
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 47fca950c24..4b0842e03ed 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -3,6 +3,7 @@ CONFIG_PLATFORM_ANDES_AE350=y
 CONFIG_PLATFORM_RENESAS_RZFIVE=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
+CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_I2C=y
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
new file mode 100644
index 00000000000..c665658ac9b
--- /dev/null
+++ b/platform/generic/starfive/jh7110.c
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 StarFive
+ *
+ * Authors:
+ *   Wei Liang Lim <weiliang.lim@starfivetech.com>
+ */
+
+#include <libfdt.h>
+#include <platform_override.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+static u32 selected_hartid = -1;
+
+static bool starfive_jh7110_cold_boot_allowed(u32 hartid,
+				   const struct fdt_match *match)
+{
+	if (selected_hartid != -1)
+		return (selected_hartid == hartid);
+
+	return true;
+}
+
+static void starfive_jh7110_fw_init(void *fdt, const struct fdt_match *match)
+{
+	const fdt32_t *val;
+	int len, coff;
+
+	coff = fdt_path_offset(fdt, "/chosen");
+	if (-1 < coff) {
+		val = fdt_getprop(fdt, coff, "starfive,boot-hart-id", &len);
+		if (val && len >= sizeof(fdt32_t))
+			selected_hartid = (u32) fdt32_to_cpu(*val);
+	}
+}
+
+static const struct fdt_match starfive_jh7110_match[] = {
+	{ .compatible = "starfive,jh7110" },
+	{ },
+};
+
+const struct platform_override starfive_jh7110 = {
+	.match_table = starfive_jh7110_match,
+	.cold_boot_allowed = starfive_jh7110_cold_boot_allowed,
+	.fw_init = starfive_jh7110_fw_init,
+};
diff --git a/platform/generic/starfive/objects.mk b/platform/generic/starfive/objects.mk
new file mode 100644
index 00000000000..0b900fb6fe6
--- /dev/null
+++ b/platform/generic/starfive/objects.mk
@@ -0,0 +1,6 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+
+carray-platform_override_modules-$(CONFIG_PLATFORM_STARFIVE_JH7110) += starfive_jh7110
+platform-objs-$(CONFIG_PLATFORM_STARFIVE_JH7110) += starfive/jh7110.o

From 6997552ea2236b2a0fe1269e71e3588a58e100e7 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Fri, 30 Dec 2022 13:07:23 +0800
Subject: [PATCH 1157/1765] lib: sbi_hsm: Rename 'priv' argument to 'arg1'

'priv' argument of sbi_hsm_hart_start() and sbi_hsm_hart_suspend()
may mislead people to think it stands for 'privilege mode', but it
is not. Change it to 'arg1' to clearly indicate the a1 register.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h | 4 ++--
 lib/sbi/sbi_hsm.c     | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index d6cc468d052..c2a728a4aca 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -59,12 +59,12 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       const struct sbi_domain *dom,
-		       u32 hartid, ulong saddr, ulong smode, ulong priv);
+		       u32 hartid, ulong saddr, ulong smode, ulong arg1);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch);
 void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch);
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
-			 ulong raddr, ulong rmode, ulong priv);
+			 ulong raddr, ulong rmode, ulong arg1);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 836008fc92d..c0a5505423b 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -248,7 +248,7 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       const struct sbi_domain *dom,
-		       u32 hartid, ulong saddr, ulong smode, ulong priv)
+		       u32 hartid, ulong saddr, ulong smode, ulong arg1)
 {
 	unsigned long init_count;
 	unsigned int hstate;
@@ -281,7 +281,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		return SBI_EINVAL;
 
 	init_count = sbi_init_count(hartid);
-	rscratch->next_arg1 = priv;
+	rscratch->next_arg1 = arg1;
 	rscratch->next_addr = saddr;
 	rscratch->next_mode = smode;
 
@@ -402,7 +402,7 @@ void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
 }
 
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
-			 ulong raddr, ulong rmode, ulong priv)
+			 ulong raddr, ulong rmode, ulong arg1)
 {
 	int oldstate, ret;
 	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
@@ -433,7 +433,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	}
 
 	/* Save the resume address and resume mode */
-	scratch->next_arg1 = priv;
+	scratch->next_arg1 = arg1;
 	scratch->next_addr = raddr;
 	scratch->next_mode = rmode;
 

From 9e397e3960413360aa8972da5320adf744996e69 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Fri, 30 Dec 2022 13:07:51 +0800
Subject: [PATCH 1158/1765] docs: domain_support: Use capital letter for
 privilege modes

The RISC-V convention for the privilege mode is capital letter, like
'M-mode', instead of 'm-mode'.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 8963b57e378..c909d4a6878 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -161,7 +161,7 @@ The DT properties of a domain instance DT node are as follows:
   and access permissions for the domain instance. Each list entry is a pair
   of DT node phandle and access permissions. The access permissions are
   represented as a 32bit bitmask having bits: **readable** (BIT[0]),
-  **writeable** (BIT[1]), **executable** (BIT[2]), and **m-mode** (BIT[3]).
+  **writeable** (BIT[1]), **executable** (BIT[2]), and **M-mode** (BIT[3]).
 * **boot-hart** (Optional) - The DT node phandle of the HART booting the
   domain instance. If coldboot HART is assigned to the domain instance then
   this DT property is ignored and the coldboot HART is assumed to be the
@@ -180,7 +180,7 @@ The DT properties of a domain instance DT node are as follows:
   is used as default value.
 * **next-mode** (Optional) - The 32 bit next booting stage mode for the
   domain instance. The possible values of this DT property are: **0x1**
-  (s-mode), and **0x0** (u-mode). If this DT property is not available
+  (S-mode), and **0x0** (U-mode). If this DT property is not available
   and coldboot HART is not assigned to the domain instance then **0x1**
   is used as default value. If this DT property is not available and
   coldboot HART is assigned to the domain instance then **next booting

From 9e0ba090763a7d31d63ba67421b09647f2f2adc4 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:35 +0000
Subject: [PATCH 1159/1765] include: sbi: Fine grain the permissions for M and
 SU modes

Split the permissions for M-mode and SU-mode. This would
help if different sections of OpenSBI need to be given
different permissions and if M-mode has different permisssions
than the SU-mode over a region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 47 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 42 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index f0d9289ec7c..a42c20ddf38 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -36,11 +36,48 @@ struct sbi_domain_memregion {
 	 */
 	unsigned long base;
 	/** Flags representing memory region attributes */
-#define SBI_DOMAIN_MEMREGION_READABLE		(1UL << 0)
-#define SBI_DOMAIN_MEMREGION_WRITEABLE		(1UL << 1)
-#define SBI_DOMAIN_MEMREGION_EXECUTABLE		(1UL << 2)
-#define SBI_DOMAIN_MEMREGION_MMODE		(1UL << 3)
-#define SBI_DOMAIN_MEMREGION_ACCESS_MASK	(0xfUL)
+#define SBI_DOMAIN_MEMREGION_M_READABLE		(1UL << 0)
+#define SBI_DOMAIN_MEMREGION_M_WRITABLE		(1UL << 1)
+#define SBI_DOMAIN_MEMREGION_M_EXECUTABLE	(1UL << 2)
+#define SBI_DOMAIN_MEMREGION_SU_READABLE	(1UL << 3)
+#define SBI_DOMAIN_MEMREGION_SU_WRITABLE	(1UL << 4)
+#define SBI_DOMAIN_MEMREGION_SU_EXECUTABLE	(1UL << 5)
+
+/** Bit to control if permissions are enforced on all modes */
+#define SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS	(1UL << 6)
+
+#define SBI_DOMAIN_MEMREGION_M_RWX		\
+				(SBI_DOMAIN_MEMREGION_M_READABLE | \
+				 SBI_DOMAIN_MEMREGION_M_WRITABLE | \
+				 SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+
+/* Unrestricted M-mode accesses but enfoced on SU-mode */
+#define SBI_DOMAIN_MEMREGION_READABLE		\
+				(SBI_DOMAIN_MEMREGION_SU_READABLE | \
+				 SBI_DOMAIN_MEMREGION_M_RWX)
+#define SBI_DOMAIN_MEMREGION_WRITEABLE		\
+				(SBI_DOMAIN_MEMREGION_SU_WRITABLE | \
+				 SBI_DOMAIN_MEMREGION_M_RWX)
+#define SBI_DOMAIN_MEMREGION_EXECUTABLE		\
+				(SBI_DOMAIN_MEMREGION_SU_EXECUTABLE | \
+				 SBI_DOMAIN_MEMREGION_M_RWX)
+
+/* Enforced accesses across all modes */
+#define SBI_DOMAIN_MEMREGION_ENF_READABLE	\
+				(SBI_DOMAIN_MEMREGION_SU_READABLE | \
+				 SBI_DOMAIN_MEMREGION_M_READABLE)
+#define SBI_DOMAIN_MEMREGION_ENF_WRITABLE	\
+				(SBI_DOMAIN_MEMREGION_SU_WRITABLE | \
+				 SBI_DOMAIN_MEMREGION_M_WRITABLE)
+#define SBI_DOMAIN_MEMREGION_ENF_EXECUTABLE	\
+				(SBI_DOMAIN_MEMREGION_SU_EXECUTABLE | \
+				 SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+
+#define SBI_DOMAIN_MEMREGION_ACCESS_MASK	(0x3fUL)
+#define SBI_DOMAIN_MEMREGION_M_ACCESS_MASK	(0x7UL)
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK	(0x38UL)
+
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_SHIFT	(3)
 
 #define SBI_DOMAIN_MEMREGION_MMIO		(1UL << 31)
 	unsigned long flags;

From aace1e145dbd987e6bd5a8b4583faafde7d33c43 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:36 +0000
Subject: [PATCH 1160/1765] lib: sbi: Use finer permission semantics for
 address validation

Use the fine grained permisssion semantics for address validation
of a given region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 19e2029e6c4..97eec25c857 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -107,24 +107,34 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 {
 	bool rmmio, mmio = false;
 	struct sbi_domain_memregion *reg;
-	unsigned long rstart, rend, rflags, rwx = 0;
+	unsigned long rstart, rend, rflags, rwx = 0, rrwx = 0;
 
 	if (!dom)
 		return false;
 
+	/*
+	 * Use M_{R/W/X} bits because the SU-bits are at the
+	 * same relative offsets. If the mode is not M, the SU
+	 * bits will fall at same offsets after the shift.
+	 */
 	if (access_flags & SBI_DOMAIN_READ)
-		rwx |= SBI_DOMAIN_MEMREGION_READABLE;
+		rwx |= SBI_DOMAIN_MEMREGION_M_READABLE;
+
 	if (access_flags & SBI_DOMAIN_WRITE)
-		rwx |= SBI_DOMAIN_MEMREGION_WRITEABLE;
+		rwx |= SBI_DOMAIN_MEMREGION_M_WRITABLE;
+
 	if (access_flags & SBI_DOMAIN_EXECUTE)
-		rwx |= SBI_DOMAIN_MEMREGION_EXECUTABLE;
+		rwx |= SBI_DOMAIN_MEMREGION_M_EXECUTABLE;
+
 	if (access_flags & SBI_DOMAIN_MMIO)
 		mmio = true;
 
 	sbi_domain_for_each_memregion(dom, reg) {
 		rflags = reg->flags;
-		if (mode == PRV_M && !(rflags & SBI_DOMAIN_MEMREGION_MMODE))
-			continue;
+		rrwx = (mode == PRV_M ?
+			(rflags & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK) :
+			(rflags & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK)
+			>> SBI_DOMAIN_MEMREGION_SU_ACCESS_SHIFT);
 
 		rstart = reg->base;
 		rend = (reg->order < __riscv_xlen) ?
@@ -133,7 +143,7 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			rmmio = (rflags & SBI_DOMAIN_MEMREGION_MMIO) ? true : false;
 			if (mmio != rmmio)
 				return false;
-			return ((rflags & rwx) == rwx) ? true : false;
+			return ((rrwx & rwx) == rwx) ? true : false;
 		}
 	}
 

From 22dbdb3d60c64975d7e5704a6bd64f7b73bee157 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:37 +0000
Subject: [PATCH 1161/1765] lib: sbi: Add permissions for the firmware start
 till end

Change the zero flag to M-mode R/W/X flag for the firmware
region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 97eec25c857..b08d6e35a69 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -629,7 +629,8 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Root domain firmware memory region */
-	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size, 0,
+	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size,
+				  SBI_DOMAIN_MEMREGION_M_RWX,
 				  &root_fw_region);
 	domain_memregion_initfw(&root_memregs[root_memregs_count++]);
 

From 1ac14f10f6f27f1078d684b7931718db0e6822c4 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:38 +0000
Subject: [PATCH 1162/1765] lib: sbi: Use finer permission sematics to decide
 on PMP bits

Use the fine grained permission bits to decide if the region
permissions are to be enforced on all modes. Also use the new
permission bits for deciding on R/W/X bits in pmpcfg register.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 5447c523987..02ce99191cd 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -303,14 +303,20 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 			break;
 
 		pmp_flags = 0;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
+
+		/*
+		 * If permissions are to be enforced for all modes on this
+		 * region, the lock bit should be set.
+		 */
+		if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS)
+			pmp_flags |= PMP_L;
+
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
 			pmp_flags |= PMP_R;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
 			pmp_flags |= PMP_W;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
 			pmp_flags |= PMP_X;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE)
-			pmp_flags |= PMP_L;
 
 		pmp_addr =  reg->base >> PMP_SHIFT;
 		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max)

From 44f736c96ed997df6e40d90acdd1cdd3342a8ff4 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:39 +0000
Subject: [PATCH 1163/1765] lib: sbi: Modify the boot time region flag prints

With the finer permission semantics, the region access
permissions must be displayed separately for M and SU mode.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index b08d6e35a69..60fda012d7b 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -345,15 +345,25 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 			   dom->index, i, suffix, rstart, rend);
 
 		k = 0;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_MMODE)
-			sbi_printf("%cM", (k++) ? ',' : '(');
+
+		sbi_printf("M: ");
 		if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO)
 			sbi_printf("%cI", (k++) ? ',' : '(');
-		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_READABLE)
+			sbi_printf("%cR", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_WRITABLE)
+			sbi_printf("%cW", (k++) ? ',' : '(');
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+			sbi_printf("%cX", (k++) ? ',' : '(');
+		sbi_printf("%s ", (k++) ? ")" : "()");
+
+		k = 0;
+		sbi_printf("S/U: ");
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
 			sbi_printf("%cR", (k++) ? ',' : '(');
-		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
 			sbi_printf("%cW", (k++) ? ',' : '(');
-		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
 			sbi_printf("%cX", (k++) ? ',' : '(');
 		sbi_printf("%s\n", (k++) ? ")" : "()");
 

From 20646e0184e23cacfeb951060d33881453d14772 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:40 +0000
Subject: [PATCH 1164/1765] lib: utils: Use SU-{R/W/X} flags for region
 permissions during parsing

Use the newer SU-{R/W/X} flags for checking and assigning region
permissions.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_domain.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 35462a2008a..45612ef6924 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -338,9 +338,9 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	 * 2) mmio regions protecting M-mode only mmio devices
 	 */
 	sbi_domain_for_each_memregion(&root, reg) {
-		if ((reg->flags & SBI_DOMAIN_MEMREGION_READABLE) ||
-		    (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE) ||
-		    (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE))
+		if ((reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE) ||
+		    (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE) ||
+		    (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
 			continue;
 		if (FDT_DOMAIN_REGION_MAX_COUNT <= val32)
 			return SBI_EINVAL;

From 3e2f573e707e78c7e00a977b28ce917ff051e69d Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:41 +0000
Subject: [PATCH 1165/1765] lib: utils: Disallow non-root domains from adding
 M-mode regions

The M-mode regions can only be added to the root domain. The non-root
domains shouldn't be able to add them from FDT.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h   |  5 +++++
 lib/utils/fdt/fdt_domain.c | 14 ++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index a42c20ddf38..bbb3effa244 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -51,6 +51,11 @@ struct sbi_domain_memregion {
 				 SBI_DOMAIN_MEMREGION_M_WRITABLE | \
 				 SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
 
+#define SBI_DOMAIN_MEMREGION_SU_RWX		\
+				(SBI_DOMAIN_MEMREGION_SU_READABLE | \
+				 SBI_DOMAIN_MEMREGION_SU_WRITABLE | \
+				 SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+
 /* Unrestricted M-mode accesses but enfoced on SU-mode */
 #define SBI_DOMAIN_MEMREGION_READABLE		\
 				(SBI_DOMAIN_MEMREGION_SU_READABLE | \
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 45612ef6924..2b51a8ebe13 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -239,6 +239,20 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 	u32 *region_count = opaque;
 	struct sbi_domain_memregion *region;
 
+	/*
+	 * Non-root domains cannot add a region with only M-mode
+	 * access permissions. M-mode regions can only be part of
+	 * root domain.
+	 *
+	 * SU permission bits can't be all zeroes and M-mode permission
+	 * bits must be all set.
+	 */
+	if (!((region_access & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK)
+	     & SBI_DOMAIN_MEMREGION_SU_RWX)
+	    && ((region_access & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK)
+		& SBI_DOMAIN_MEMREGION_M_RWX))
+		return SBI_EINVAL;
+
 	/* Find next region of the domain */
 	if (FDT_DOMAIN_REGION_MAX_COUNT <= *region_count)
 		return SBI_EINVAL;

From 59a08cd7d632bb2394a29956497dfe7829099997 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:42 +0000
Subject: [PATCH 1166/1765] lib: utils: Add M-mode {R/W} flags to the MMIO
 regions

Add the M-mode readable/writable flags to mmio regions
of various drivers.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/aclint_mswi.c     |  5 ++++-
 lib/utils/irqchip/aplic.c       |  5 ++++-
 lib/utils/irqchip/imsic.c       |  5 ++++-
 lib/utils/timer/aclint_mtimer.c | 16 ++++++++++++----
 4 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 832e223f08d..6b004cb9efb 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -88,7 +88,10 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 		region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ?
 			      (mswi->size - pos) : ACLINT_MSWI_ALIGN;
 		sbi_domain_memregion_init(mswi->addr + pos, region_size,
-					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+					  (SBI_DOMAIN_MEMREGION_MMIO |
+					   SBI_DOMAIN_MEMREGION_M_READABLE |
+					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
+					  &reg);
 		rc = sbi_domain_root_add_memregion(&reg);
 		if (rc)
 			return rc;
diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
index 0a8469b618b..d7fd9928044 100644
--- a/lib/utils/irqchip/aplic.c
+++ b/lib/utils/irqchip/aplic.c
@@ -269,7 +269,10 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
 	    (last_deleg_irq == aplic->num_source) &&
 	    (first_deleg_irq == 1))) {
 		sbi_domain_memregion_init(aplic->addr, aplic->size,
-					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+					  (SBI_DOMAIN_MEMREGION_MMIO |
+					   SBI_DOMAIN_MEMREGION_M_READABLE |
+					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
+					  &reg);
 		rc = sbi_domain_root_add_memregion(&reg);
 		if (rc)
 			return rc;
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 98f2cb63eeb..11667cd90df 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -313,7 +313,10 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
 		sbi_domain_memregion_init(imsic->regs[i].addr,
 					  imsic->regs[i].size,
-					  SBI_DOMAIN_MEMREGION_MMIO, &reg);
+					  (SBI_DOMAIN_MEMREGION_MMIO |
+					   SBI_DOMAIN_MEMREGION_M_READABLE |
+					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
+					  &reg);
 		rc = sbi_domain_root_add_memregion(&reg);
 		if (rc)
 			return rc;
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 1846a9a7cc9..84ded4ed44e 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -188,26 +188,34 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 		rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
 					mt->mtime_size + mt->mtimecmp_size,
 					MTIMER_REGION_ALIGN,
-					SBI_DOMAIN_MEMREGION_MMIO);
+					(SBI_DOMAIN_MEMREGION_MMIO |
+					 SBI_DOMAIN_MEMREGION_M_READABLE |
+					 SBI_DOMAIN_MEMREGION_M_WRITABLE));
 		if (rc)
 			return rc;
 	} else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) {
 		rc = sbi_domain_root_add_memrange(mt->mtime_addr,
 					mt->mtime_size + mt->mtimecmp_size,
 					MTIMER_REGION_ALIGN,
-					SBI_DOMAIN_MEMREGION_MMIO);
+					(SBI_DOMAIN_MEMREGION_MMIO |
+					 SBI_DOMAIN_MEMREGION_M_READABLE |
+					 SBI_DOMAIN_MEMREGION_M_WRITABLE));
 		if (rc)
 			return rc;
 	} else {
 		rc = sbi_domain_root_add_memrange(mt->mtime_addr,
 						mt->mtime_size, MTIMER_REGION_ALIGN,
-						SBI_DOMAIN_MEMREGION_MMIO);
+						(SBI_DOMAIN_MEMREGION_MMIO |
+						 SBI_DOMAIN_MEMREGION_M_READABLE |
+						 SBI_DOMAIN_MEMREGION_M_WRITABLE));
 		if (rc)
 			return rc;
 
 		rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr,
 						mt->mtimecmp_size, MTIMER_REGION_ALIGN,
-						SBI_DOMAIN_MEMREGION_MMIO);
+						(SBI_DOMAIN_MEMREGION_MMIO |
+						 SBI_DOMAIN_MEMREGION_M_READABLE |
+						 SBI_DOMAIN_MEMREGION_M_WRITABLE));
 		if (rc)
 			return rc;
 	}

From 001106d19b21cd6443ae7f7f6d4d048d80e9ecac Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 9 Jan 2023 05:20:43 +0000
Subject: [PATCH 1167/1765] docs: Update domain's region permissions and
 requirements

Updated the various permissions bits available for domains
defined in DT node and restrictions on them.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index c909d4a6878..4ccbcff8719 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -160,8 +160,16 @@ The DT properties of a domain instance DT node are as follows:
 * **regions** (Optional) - The list of domain memory region DT node phandle
   and access permissions for the domain instance. Each list entry is a pair
   of DT node phandle and access permissions. The access permissions are
-  represented as a 32bit bitmask having bits: **readable** (BIT[0]),
-  **writeable** (BIT[1]), **executable** (BIT[2]), and **M-mode** (BIT[3]).
+  represented as a 32bit bitmask having bits: **M readable** (BIT[0]),
+  **M writeable** (BIT[1]), **M executable** (BIT[2]), **SU readable**
+  (BIT[3]), **SU writable** (BIT[4]), and **SU executable** (BIT[5]).
+  The enforce permission bit (BIT[6]), if set, will lock the permissions
+  in the PMP. This will enforce the permissions on M-mode as well which
+  otherwise will have unrestricted access. This bit must be used with
+  caution because no changes can be made to a PMP entry once its locked
+  until the hart is reset.
+  Any region of a domain defined in DT node cannot have only M-bits set
+  in access permissions i.e. it cannot be an m-mode only accessible region.
 * **boot-hart** (Optional) - The DT node phandle of the HART booting the
   domain instance. If coldboot HART is assigned to the domain instance then
   this DT property is ignored and the coldboot HART is assumed to be the

From da5594bf853d9c635aee14bce3abc1076641e395 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Tue, 27 Dec 2022 12:44:44 -0600
Subject: [PATCH 1168/1765] platform: generic: allwinner: Fix PLIC array bounds

The two referenced commits passed incorrect bounds to the PLIC save/
restore functions, causing out-of-bounds memory access. The functions
expect "num" to be the 1-based number of interrupt sources, equivalent
to the "riscv,ndev" devicetree property. Thus, "num" must be strictly
smaller than the 0-based size of the array storing the register values.

However, the referenced commits incorrectly passed in the unmodified
size of the array as "num". Fix this by reducing PLIC_SOURCES (matching
"riscv,ndev" on this platform), while keeping the same array sizes.

Addresses-Coverity-ID: 1530251 ("Out-of-bounds access")
Addresses-Coverity-ID: 1530252 ("Out-of-bounds access")
Fixes: 8509e46ca63a ("lib: utils/irqchip: plic: Ensure no out-of-bound access in priority save/restore helpers")
Fixes: 9a2eeb4aaeac ("lib: utils/irqchip: plic: Ensure no out-of-bound access in context save/restore helpers")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 1da9e5b5914..e2b76a33d95 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -69,10 +69,10 @@ static void sun20i_d1_csr_restore(void)
  * PLIC
  */
 
-#define PLIC_SOURCES			176
-#define PLIC_IE_WORDS			((PLIC_SOURCES + 31) / 32)
+#define PLIC_SOURCES			175
+#define PLIC_IE_WORDS			(PLIC_SOURCES / 32 + 1)
 
-static u8 plic_priority[PLIC_SOURCES];
+static u8 plic_priority[1 + PLIC_SOURCES];
 static u32 plic_sie[PLIC_IE_WORDS];
 static u32 plic_threshold;
 

From ce2a834c989043895d339df4d61221eca2b428e9 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:07 +0800
Subject: [PATCH 1169/1765] docs: generic.md: fix typo of andes-ae350

Fix hyperlink due to the typo.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/generic.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index 8e4cf2d090c..c29eb047607 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -53,7 +53,7 @@ RISC-V Platforms Using Generic Platform
 * **Spike** (*[spike.md]*)
 * **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*)
 
-[andes-ae350.md]: andse-ae350.md
+[andes-ae350.md]: andes-ae350.md
 [qemu_virt.md]: qemu_virt.md
 [renesas-rzfive.md]: renesas-rzfive.md
 [shakti_cclass.md]: shakti_cclass.md

From 8ecbe6d3fba6a655b5b5d8e39381187826ac750f Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:08 +0800
Subject: [PATCH 1170/1765] lib: sbi_hsm: handle failure when hart_stop returns
 SBI_ENOTSUPP

Make use of generic warm-boot path when platform hart_stop callback
returns SBI_ENOTSUPP, in case certain hart can not turn off its
power domain, or it detects some error occured in power management
unit, it can fall through warm-boot flow and wait for interrupt in
sbi_hsm_hart_wait().

Also improves comment in sbi_hsm_hart_wait().

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h | 8 ++++++--
 lib/sbi/sbi_hsm.c     | 7 +++----
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index c2a728a4aca..1170127baa8 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -21,8 +21,12 @@ struct sbi_hsm_device {
 	int (*hart_start)(u32 hartid, ulong saddr);
 
 	/**
-	 * Stop (or power-down) the current hart from running. This call
-	 * doesn't expect to return if success.
+	 * Stop (or power-down) the current hart from running.
+	 *
+	 * Return SBI_ENOTSUPP if the hart does not support platform-specific
+	 * stop actions.
+	 *
+	 * For successful stop, the call won't return.
 	 */
 	int (*hart_stop)(void);
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index c0a5505423b..d4cce4ac914 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -116,7 +116,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	/* Set MSIE and MEIE bits to receive IPI */
 	csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
 
-	/* Wait for hart_add call*/
+	/* Wait for state transition requested by sbi_hsm_hart_start() */
 	while (atomic_read(&hdata->state) != SBI_HSM_STATE_START_PENDING) {
 		wfi();
 	};
@@ -228,9 +228,8 @@ void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 		goto fail_exit;
 
 	if (hsm_device_has_hart_hotplug()) {
-		hsm_device_hart_stop();
-		/* It should never reach here */
-		goto fail_exit;
+		if (hsm_device_hart_stop() != SBI_ENOTSUPP)
+			goto fail_exit;
 	}
 
 	/**

From b1818ee244adae3c07fcd4494873a74f7aaeb21a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:09 +0800
Subject: [PATCH 1171/1765] include: types: add always inline compiler
 attribute

Provide __always_inline to sbi_types header.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 75cddddfe0d..9c1fef3b8dc 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -62,6 +62,7 @@ typedef unsigned long		physical_size_t;
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 #define __aligned(x)		__attribute__((aligned(x)))
+#define __always_inline	inline __attribute__((always_inline))
 
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)

From 9c4eb3521e515603671198295f2c7d5114e4c601 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:10 +0800
Subject: [PATCH 1172/1765] lib: utils: atcsmu: Add Andes System Management
 Unit support

This patch adds atcsmu support for Andes AE350 platforms. The SMU
provides system management capabilities, including clock, reset
and power control based on power domain partitions.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/sys/atcsmu.h | 59 ++++++++++++++++++++++
 lib/utils/sys/Kconfig          |  4 ++
 lib/utils/sys/atcsmu.c         | 92 ++++++++++++++++++++++++++++++++++
 lib/utils/sys/objects.mk       |  1 +
 platform/generic/Kconfig       |  1 +
 5 files changed, 157 insertions(+)
 create mode 100644 include/sbi_utils/sys/atcsmu.h
 create mode 100644 lib/utils/sys/atcsmu.c

diff --git a/include/sbi_utils/sys/atcsmu.h b/include/sbi_utils/sys/atcsmu.h
new file mode 100644
index 00000000000..07be22eef62
--- /dev/null
+++ b/include/sbi_utils/sys/atcsmu.h
@@ -0,0 +1,59 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2023 Andes Technology Corporation
+ */
+
+#ifndef _SYS_ATCSMU_H
+#define _SYS_ATCSMU_H
+
+#include <sbi/sbi_types.h>
+
+/* clang-format off */
+
+#define PCS0_WE_OFFSET		0x90
+#define PCSm_WE_OFFSET(i)	((i + 3) * 0x20 + PCS0_WE_OFFSET)
+
+#define PCS0_CTL_OFFSET		0x94
+#define PCSm_CTL_OFFSET(i)	((i + 3) * 0x20 + PCS0_CTL_OFFSET)
+#define PCS_CTL_CMD_SHIFT	0
+#define PCS_CTL_PARAM_SHIFT	3
+#define SLEEP_CMD		0x3
+#define WAKEUP_CMD		(0x0 | (1 << PCS_CTL_PARAM_SHIFT))
+#define LIGHTSLEEP_MODE		0
+#define DEEPSLEEP_MODE		1
+#define LIGHT_SLEEP_CMD		(SLEEP_CMD | (LIGHTSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
+#define DEEP_SLEEP_CMD		(SLEEP_CMD | (DEEPSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
+
+#define PCS0_CFG_OFFSET			0x80
+#define PCSm_CFG_OFFSET(i)		((i + 3) * 0x20 + PCS0_CFG_OFFSET)
+#define PCS_CFG_LIGHT_SLEEP_SHIFT	2
+#define PCS_CFG_LIGHT_SLEEP		(1 << PCS_CFG_LIGHT_SLEEP_SHIFT)
+#define PCS_CFG_DEEP_SLEEP_SHIFT	3
+#define PCS_CFG_DEEP_SLEEP		(1 << PCS_CFG_DEEP_SLEEP_SHIFT)
+
+#define RESET_VEC_LO_OFFSET	0x50
+#define RESET_VEC_HI_OFFSET	0x60
+#define RESET_VEC_8CORE_OFFSET	0x1a0
+#define HARTn_RESET_VEC_LO(n)	(RESET_VEC_LO_OFFSET + \
+			        ((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
+			        ((n) * 0x4))
+#define HARTn_RESET_VEC_HI(n)	(RESET_VEC_HI_OFFSET + \
+			        ((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
+			        ((n) * 0x4))
+
+#define PCS_MAX_NR  8
+#define FLASH_BASE  0x80000000ULL
+
+/* clang-format on */
+
+struct smu_data {
+	unsigned long addr;
+};
+
+int smu_set_wakeup_events(struct smu_data *smu, u32 events, u32 hartid);
+bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode, u32 hartid);
+int smu_set_command(struct smu_data *smu, u32 pcs_ctl, u32 hartid);
+int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr, u32 hartid);
+
+#endif /* _SYS_ATCSMU_H */
diff --git a/lib/utils/sys/Kconfig b/lib/utils/sys/Kconfig
index ee85b1a3106..76190f8c52a 100644
--- a/lib/utils/sys/Kconfig
+++ b/lib/utils/sys/Kconfig
@@ -2,6 +2,10 @@
 
 menu "System Device Support"
 
+config SYS_ATCSMU
+	bool "Andes System Management Unit (SMU) support"
+	default n
+
 config SYS_HTIF
 	bool "Host transfere interface (HTIF) support"
 	default n
diff --git a/lib/utils/sys/atcsmu.c b/lib/utils/sys/atcsmu.c
new file mode 100644
index 00000000000..8ddd88d5f52
--- /dev/null
+++ b/lib/utils/sys/atcsmu.c
@@ -0,0 +1,92 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2023 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi_utils/sys/atcsmu.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_bitops.h>
+
+inline int smu_set_wakeup_events(struct smu_data *smu, u32 events, u32 hartid)
+{
+	if (smu) {
+		writel(events, (void *)(smu->addr + PCSm_WE_OFFSET(hartid)));
+		return 0;
+	} else
+		return SBI_EINVAL;
+}
+
+inline bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode,
+				   u32 hartid)
+{
+	u32 pcs_cfg;
+
+	if (!smu) {
+		sbi_printf("%s(): Failed to access smu_data\n", __func__);
+		return false;
+	}
+
+	pcs_cfg = readl((void *)(smu->addr + PCSm_CFG_OFFSET(hartid)));
+
+	switch (sleep_mode) {
+	case LIGHTSLEEP_MODE:
+		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_LIGHT_SLEEP) == 0) {
+			sbi_printf(
+				"SMU: hart%d (PCS%d) does not support light sleep mode\n",
+				hartid, hartid + 3);
+			return false;
+		}
+		break;
+	case DEEPSLEEP_MODE:
+		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_DEEP_SLEEP) == 0) {
+			sbi_printf(
+				"SMU: hart%d (PCS%d) does not support deep sleep mode\n",
+				hartid, hartid + 3);
+			return false;
+		}
+		break;
+	}
+
+	return true;
+}
+
+inline int smu_set_command(struct smu_data *smu, u32 pcs_ctl, u32 hartid)
+{
+	if (smu) {
+		writel(pcs_ctl, (void *)(smu->addr + PCSm_CTL_OFFSET(hartid)));
+		return 0;
+	} else
+		return SBI_EINVAL;
+}
+
+inline int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr,
+				u32 hartid)
+{
+	u32 vec_lo, vec_hi;
+	u64 reset_vector;
+
+	if (!smu)
+		return SBI_EINVAL;
+
+	writel(wakeup_addr, (void *)(smu->addr + HARTn_RESET_VEC_LO(hartid)));
+	writel((u64)wakeup_addr >> 32,
+	       (void *)(smu->addr + HARTn_RESET_VEC_HI(hartid)));
+
+	vec_lo = readl((void *)(smu->addr + HARTn_RESET_VEC_LO(hartid)));
+	vec_hi = readl((void *)(smu->addr + HARTn_RESET_VEC_HI(hartid)));
+	reset_vector = ((u64)vec_hi << 32) | vec_lo;
+
+	if (reset_vector != (u64)wakeup_addr) {
+		sbi_printf(
+			"hard%d (PCS%d): Failed to program the reset vector.\n",
+			hartid, hartid + 3);
+		return SBI_EFAIL;
+	} else
+		return 0;
+}
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index 9f67aee2777..03d6740b142 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -9,3 +9,4 @@
 
 libsbiutils-objs-$(CONFIG_SYS_HTIF) += sys/htif.o
 libsbiutils-objs-$(CONFIG_SYS_SIFIVE_TEST) += sys/sifive_test.o
+libsbiutils-objs-$(CONFIG_SYS_ATCSMU) += sys/atcsmu.o
diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 47c10e53a32..c7f198aee84 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -30,6 +30,7 @@ config PLATFORM_ALLWINNER_D1
 
 config PLATFORM_ANDES_AE350
 	bool "Andes AE350 support"
+	select SYS_ATCSMU
 	default n
 
 config PLATFORM_RENESAS_RZFIVE

From 787296ae92b7ec5363dab71b6d036e8def31c6f7 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:11 +0800
Subject: [PATCH 1173/1765] platform: andes/ae350: Implement hart hotplug using
 HSM extension

Add hart_start() and hart_stop() callbacks for the multi-core ae350
platform, it utilizes the ATCSMU to put the harts into power-gated
deep sleep mode. The programming sequence is stated as below:

1. Set the wakeup events to PCSm_WE
2. Set the sleep command to PCSm_CTL
3. Set the reset vector to HARTm_RESET_VECTOR_{LO|HI}
4. Write back and invalidate D-cache by executing the CCTL command L1D_WBINVAL_ALL
5. Disable I/D-cache by clearing mcache_ctl.{I|D}C_EN
6. Disable D-cache coherency by clearing mcache_ctl_.DC_COHEN
7. Wait for mcache_ctl.DC_COHSTA to be cleared to ensure the previous step is completed
8. Execute WFI

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/ae350.c           | 99 ++++++++++++++++++++++++
 platform/generic/andes/objects.mk        |  2 +-
 platform/generic/andes/sleep.S           | 70 +++++++++++++++++
 platform/generic/include/andes/andes45.h | 10 +++
 4 files changed, 180 insertions(+), 1 deletion(-)
 create mode 100644 platform/generic/andes/sleep.S
 create mode 100644 platform/generic/include/andes/andes45.h

diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index cf7f6f2a0f5..89f5b74af71 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -10,6 +10,104 @@
 #include <platform_override.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/sys/atcsmu.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_init.h>
+#include <andes/andes45.h>
+
+static struct smu_data smu = { 0 };
+extern void __ae350_enable_coherency_warmboot(void);
+extern void __ae350_disable_coherency(void);
+
+static __always_inline bool is_andes25(void)
+{
+	ulong marchid = csr_read(CSR_MARCHID);
+	return !!(EXTRACT_FIELD(marchid, CSR_MARCHID_MICROID) == 0xa25);
+}
+
+static int ae350_hart_start(u32 hartid, ulong saddr)
+{
+	/* Don't send wakeup command at boot-time */
+	if (!sbi_init_count(hartid) || (is_andes25() && hartid == 0))
+		return sbi_ipi_raw_send(hartid);
+
+	/* Write wakeup command to the sleep hart */
+	smu_set_command(&smu, WAKEUP_CMD, hartid);
+
+	return 0;
+}
+
+static int ae350_hart_stop(void)
+{
+	int rc;
+	u32 hartid = current_hartid();
+
+	/**
+	 * For Andes AX25MP, the hart0 shares power domain with
+	 * L2-cache, instead of turning it off, it should fall
+	 * through and jump to warmboot_addr.
+	 */
+	if (is_andes25() && hartid == 0)
+		return SBI_ENOTSUPP;
+
+	if (!smu_support_sleep_mode(&smu, DEEPSLEEP_MODE, hartid))
+		return SBI_ENOTSUPP;
+
+	/**
+	 * disable all events, the current hart will be
+	 * woken up from reset vector when other hart
+	 * writes its PCS (power control slot) control
+	 * register
+	 */
+	smu_set_wakeup_events(&smu, 0x0, hartid);
+	smu_set_command(&smu, DEEP_SLEEP_CMD, hartid);
+
+	rc = smu_set_reset_vector(&smu, (ulong)__ae350_enable_coherency_warmboot,
+			       hartid);
+	if (rc)
+		goto fail;
+
+	__ae350_disable_coherency();
+
+	wfi();
+
+fail:
+	/* It should never reach here */
+	sbi_hart_hang();
+	return 0;
+}
+
+static const struct sbi_hsm_device andes_smu = {
+	.name	      = "andes_smu",
+	.hart_start   = ae350_hart_start,
+	.hart_stop    = ae350_hart_stop,
+};
+
+static void ae350_hsm_device_init(void)
+{
+	int rc;
+	void *fdt;
+
+	fdt = fdt_get_address();
+
+	rc = fdt_parse_compat_addr(fdt, (uint64_t *)&smu.addr,
+				   "andestech,atcsmu");
+
+	if (!rc) {
+		sbi_hsm_set_device(&andes_smu);
+	}
+}
+
+static int ae350_final_init(bool cold_boot, const struct fdt_match *match)
+{
+	if (cold_boot)
+		ae350_hsm_device_init();
+
+	return 0;
+}
 
 static const struct fdt_match andes_ae350_match[] = {
 	{ .compatible = "andestech,ae350" },
@@ -18,4 +116,5 @@ static const struct fdt_match andes_ae350_match[] = {
 
 const struct platform_override andes_ae350 = {
 	.match_table = andes_ae350_match,
+	.final_init  = ae350_final_init,
 };
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index dd6408de01f..28275efbccf 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -3,4 +3,4 @@
 #
 
 carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
-platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o
+platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
diff --git a/platform/generic/andes/sleep.S b/platform/generic/andes/sleep.S
new file mode 100644
index 00000000000..59a5597d6d8
--- /dev/null
+++ b/platform/generic/andes/sleep.S
@@ -0,0 +1,70 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Andes Technology Corporation
+ *
+ * Authors:
+ *   Yu Chien Peter Lin <peterlin@andestech.com>
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_asm.h>
+#include <andes/andes45.h>
+
+	.section .text, "ax", %progbits
+	.align 3
+	.global __ae350_disable_coherency
+__ae350_disable_coherency:
+	/* flush d-cache */
+	csrw	CSR_MCCTLCOMMAND, 0x6
+	/* disable i/d-cache */
+	csrc	CSR_MCACHE_CTL, 0x3
+	/* disable d-cache coherency */
+	lui	t1, 0x80
+	csrc	CSR_MCACHE_CTL, t1
+	/*
+	 * wait for mcache_ctl.DC_COHSTA to be cleared,
+	 * the bit is hard-wired 0 on platforms w/o CM
+	 * (Coherence Manager)
+	 */
+check_cm_disabled:
+	csrr	t1, CSR_MCACHE_CTL
+	srli	t1, t1, 20
+	andi	t1, t1, 0x1
+	bnez	t1, check_cm_disabled
+
+	ret
+
+	.section .text, "ax", %progbits
+	.align 3
+	.global __ae350_enable_coherency
+__ae350_enable_coherency:
+	/* enable d-cache coherency */
+	lui		t1, 0x80
+	csrs	CSR_MCACHE_CTL, t1
+	/*
+	 * mcache_ctl.DC_COHEN is hard-wired 0 on platforms
+	 * w/o CM support
+	 */
+	csrr	t1, CSR_MCACHE_CTL
+	srli	t1, t1, 19
+	andi	t1, t1, 0x1
+	beqz	t1, enable_L1_cache
+	/* wait for mcache_ctl.DC_COHSTA to be set */
+check_cm_enabled:
+	csrr	t1, CSR_MCACHE_CTL
+	srli	t1, t1, 20
+	andi	t1, t1, 0x1
+	beqz	t1, check_cm_enabled
+enable_L1_cache:
+	/* enable i/d-cache */
+	csrs	CSR_MCACHE_CTL, 0x3
+
+	ret
+
+	.section .text, "ax", %progbits
+	.align 3
+	.global __ae350_enable_coherency_warmboot
+__ae350_enable_coherency_warmboot:
+	call ra, __ae350_enable_coherency
+	j _start_warm
diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes45.h
new file mode 100644
index 00000000000..08b3d18876e
--- /dev/null
+++ b/platform/generic/include/andes/andes45.h
@@ -0,0 +1,10 @@
+#ifndef _RISCV_ANDES45_H
+#define _RISCV_ANDES45_H
+
+#define CSR_MARCHID_MICROID 0xfff
+
+/* Memory and Miscellaneous Registers */
+#define CSR_MCACHE_CTL 0x7ca
+#define CSR_MCCTLCOMMAND 0x7cc
+
+#endif /* _RISCV_ANDES45_H */

From 7aaeeab9e794e5a15a0253ef3c3453496f74117a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 20 Jan 2023 11:05:12 +0800
Subject: [PATCH 1174/1765] lib: reset/fdt_reset_atcwdt200: Use defined macros
 and function in atcsmu.h

Reuse the smu related macros and function in atcsmu.h.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/Kconfig               |  1 +
 lib/utils/reset/fdt_reset_atcwdt200.c | 21 ++++++++-------------
 2 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 0e0c2c1d7c4..4748cc8504a 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -11,6 +11,7 @@ if FDT_RESET
 
 config FDT_RESET_ATCWDT200
 	bool "Andes WDT FDT reset driver"
+	depends on SYS_ATCSMU
 	default n
 
 config FDT_RESET_GPIO
diff --git a/lib/utils/reset/fdt_reset_atcwdt200.c b/lib/utils/reset/fdt_reset_atcwdt200.c
index 91acc9f7f11..03d547b9dd7 100644
--- a/lib/utils/reset/fdt_reset_atcwdt200.c
+++ b/lib/utils/reset/fdt_reset_atcwdt200.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/sys/atcsmu.h>
 
 #define ATCWDT200_WP_NUM 0x5aa5
 #define WREN_REG 0x18
@@ -41,14 +42,8 @@
 #define CLK_PCLK (1 << 1)
 #define WDT_EN (1 << 0)
 
-#define FLASH_BASE 0x80000000ULL
-#define SMU_RESET_VEC_LO_OFF 0x50
-#define SMU_RESET_VEC_HI_OFF 0x60
-#define SMU_HARTn_RESET_VEC_LO(n) (SMU_RESET_VEC_LO_OFF + (n * 0x4))
-#define SMU_HARTn_RESET_VEC_HI(n) (SMU_RESET_VEC_HI_OFF + (n * 0x4))
-
-static volatile char *wdt_addr;
-static volatile char *smu_addr;
+static volatile char *wdt_addr = NULL;
+static struct smu_data smu = { 0 };
 
 static int ae350_system_reset_check(u32 type, u32 reason)
 {
@@ -66,16 +61,16 @@ static void ae350_system_reset(u32 type, u32 reason)
 {
 	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
-	for (int i = 0; i < sbi_platform_hart_count(plat); i++) {
-		writel(FLASH_BASE, smu_addr + SMU_HARTn_RESET_VEC_LO(i));
-		writel(FLASH_BASE >> 32, smu_addr + SMU_HARTn_RESET_VEC_HI(i));
-	}
+	for (int i = 0; i < sbi_platform_hart_count(plat); i++)
+		if (smu_set_reset_vector(&smu, FLASH_BASE, i))
+			goto fail;
 
 	/* Program WDT control register  */
 	writew(ATCWDT200_WP_NUM, wdt_addr + WREN_REG);
 	writel(INT_CLK_32768 | INT_EN | RST_CLK_128 | RST_EN | WDT_EN,
 	       wdt_addr + CTRL_REG);
 
+fail:
 	sbi_hart_hang();
 }
 
@@ -104,7 +99,7 @@ static int atcwdt200_reset_init(void *fdt, int nodeoff,
 	if (fdt_parse_compat_addr(fdt, &reg_addr, "andestech,atcsmu"))
 		return SBI_ENODEV;
 
-	smu_addr = (volatile char *)(unsigned long)reg_addr;
+	smu.addr = (unsigned long)reg_addr;
 
 	sbi_system_reset_add_device(&atcwdt200_reset);
 

From a990309fa362aa050caf7fb175f35c7bfa486ccc Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Sat, 21 Jan 2023 12:15:59 +0530
Subject: [PATCH 1175/1765] lib: utils: Fix reserved memory node for firmware
 memory

The commit 9e0ba090 introduced more fine grained permissions for memory
regions and did not update the fdt_reserved_memory_fixup() function. As
a result, the fdt_reserved_memory_fixup continued to use the older coarse
permissions which causes the reserved memory node to be not inserted
into the DT.

To fix the above issue, we correct the flags used for memory region
permission checks in the fdt_reserved_memory_fixup() function.

Fixes: 9e0ba090 ("include: sbi: Fine grain the permissions for M and SU modes")
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_fixup.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 41f6cbb7023..42692cc4e25 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -259,11 +259,11 @@ int fdt_reserved_memory_fixup(void *fdt)
 		/* Ignore MMIO or READABLE or WRITABLE or EXECUTABLE regions */
 		if (reg->flags & SBI_DOMAIN_MEMREGION_MMIO)
 			continue;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_READABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
 			continue;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_WRITEABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
 			continue;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_EXECUTABLE)
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
 			continue;
 
 		addr = reg->base;

From fefa5488038584a6376a8f361e74ccc2183dd50b Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Thu, 19 Jan 2023 20:48:22 +0530
Subject: [PATCH 1176/1765] firmware: Split RO/RX and RW sections

Split the RO/RX and RW sections so that they can have
independent pmp entries with required permissions. The
split size is ensured to be a power-of-2 as required by
pmp.

_fw_rw_offset symbol marks the beginning of the data
section.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.ldS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 563ae252a3d..5411bbdc092 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -42,6 +42,14 @@
 
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	/*
+	 * PMP regions must be to be power-of-2. RO/RW will have separate
+	 * regions, so ensure that the split is power-of-2.
+	 */
+	. = ALIGN(1 << LOG2CEIL(SIZEOF(.rodata) + SIZEOF(.text)));
+
+	PROVIDE(_fw_rw_offset = (.  - _fw_start));
+
 	/* Beginning of the read-write data sections */
 
 	.data :

From 2f40a99c9e0876ac543e918191b2e06ab8a0fdc5 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Thu, 19 Jan 2023 20:48:23 +0530
Subject: [PATCH 1177/1765] firmware: Move dynsym and reladyn sections to RX
 section

Currently, the dynsym and reladyn sections are under RW data.
They are moved to the Read-only/Executable region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.ldS | 41 ++++++++++++++++++++++-------------------
 1 file changed, 22 insertions(+), 19 deletions(-)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 5411bbdc092..9a1304e98ec 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -30,23 +30,39 @@
 
 	/* Beginning of the read-only data sections */
 
+	PROVIDE(_rodata_start = .);
+
 	.rodata :
 	{
-		PROVIDE(_rodata_start = .);
 		*(.rodata .rodata.*)
 		. = ALIGN(8);
-		PROVIDE(_rodata_end = .);
 	}
 
-	/* End of the read-only data sections */
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
+	.dynsym : {
+		PROVIDE(__dyn_sym_start = .);
+		*(.dynsym)
+		PROVIDE(__dyn_sym_end = .);
+	}
+
+	.rela.dyn : {
+		PROVIDE(__rel_dyn_start = .);
+		*(.rela*)
+		. = ALIGN(8);
+		PROVIDE(__rel_dyn_end = .);
+	}
+
+	PROVIDE(_rodata_end = .);
+
+	/* End of the read-only data sections */
+
 	/*
-	 * PMP regions must be to be power-of-2. RO/RW will have separate
+	 * PMP regions must be to be power-of-2. RX/RW will have separate
 	 * regions, so ensure that the split is power-of-2.
 	 */
-	. = ALIGN(1 << LOG2CEIL(SIZEOF(.rodata) + SIZEOF(.text)));
+	. = ALIGN(1 << LOG2CEIL((SIZEOF(.rodata) + SIZEOF(.text)
+				+ SIZEOF(.dynsym) + SIZEOF(.rela.dyn))));
 
 	PROVIDE(_fw_rw_offset = (.  - _fw_start));
 
@@ -67,19 +83,6 @@
 		PROVIDE(_data_end = .);
 	}
 
-	.dynsym : {
-		PROVIDE(__dyn_sym_start = .);
-		*(.dynsym)
-		PROVIDE(__dyn_sym_end = .);
-	}
-
-	.rela.dyn : {
-		PROVIDE(__rel_dyn_start = .);
-		*(.rela*)
-		. = ALIGN(8);
-		PROVIDE(__rel_dyn_end = .);
-	}
-
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
 	.bss :

From c10e3fe5f9a14de3f001a6b007b7d9f117858dff Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Thu, 19 Jan 2023 20:48:24 +0530
Subject: [PATCH 1178/1765] firmware: Add RW section offset in scratch

Add the RW section offset, provided by _fw_rw_offset symbol,
to the scratch structure. This will be used to program
separate pmp entry for RW section.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S        |  8 ++++++++
 include/sbi/sbi_scratch.h | 24 ++++++++++++++----------
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 3f622b3b39a..e04b683331d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -298,6 +298,12 @@ _scratch_init:
 	sub	a5, t3, a4
 	REG_S	a4, SBI_SCRATCH_FW_START_OFFSET(tp)
 	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
+
+	/* Store R/W section's offset in scratch space */
+	lla	a4, __fw_rw_offset
+	REG_L	a5, 0(a4)
+	REG_S	a5, SBI_SCRATCH_FW_RW_OFFSET(tp)
+
 	/* Store next arg1 in scratch space */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_next_arg1
@@ -519,6 +525,8 @@ _link_start:
 	RISCV_PTR	FW_TEXT_START
 _link_end:
 	RISCV_PTR	_fw_reloc_end
+__fw_rw_offset:
+	RISCV_PTR	_fw_rw_offset
 
 	.section .entry, "ax", %progbits
 	.align 3
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 40a3bc93c6d..2966188d699 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -18,26 +18,28 @@
 #define SBI_SCRATCH_FW_START_OFFSET		(0 * __SIZEOF_POINTER__)
 /** Offset of fw_size member in sbi_scratch */
 #define SBI_SCRATCH_FW_SIZE_OFFSET		(1 * __SIZEOF_POINTER__)
+/** Offset (in sbi_scratch) of the R/W Offset */
+#define SBI_SCRATCH_FW_RW_OFFSET		(2 * __SIZEOF_POINTER__)
 /** Offset of next_arg1 member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(2 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(3 * __SIZEOF_POINTER__)
 /** Offset of next_addr member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(3 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(4 * __SIZEOF_POINTER__)
 /** Offset of next_mode member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_MODE_OFFSET		(4 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_MODE_OFFSET		(5 * __SIZEOF_POINTER__)
 /** Offset of warmboot_addr member in sbi_scratch */
-#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(5 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
 /** Offset of platform_addr member in sbi_scratch */
-#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(7 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
-#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(7 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(8 * __SIZEOF_POINTER__)
 /** Offset of trap_exit member in sbi_scratch */
-#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(8 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(9 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET			(10 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET		(10 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET		(11 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(11 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(12 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -53,6 +55,8 @@ struct sbi_scratch {
 	unsigned long fw_start;
 	/** Size (in bytes) of firmware linked to OpenSBI library */
 	unsigned long fw_size;
+	/** Offset (in bytes) of the R/W section */
+	unsigned long fw_rw_offset;
 	/** Arg1 (or 'a1' register) of next booting stage for this HART */
 	unsigned long next_arg1;
 	/** Address of next booting stage for this HART */

From b666760bfafda75b6d31d6f9f01bcc60bc673aa4 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Thu, 19 Jan 2023 20:48:25 +0530
Subject: [PATCH 1179/1765] lib: sbi: Print the RW section offset

Print the RW section offset when firmware base and size is
being printed.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 259a191051a..e353c334830 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -108,6 +108,7 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	sbi_printf("Firmware Base             : 0x%lx\n", scratch->fw_start);
 	sbi_printf("Firmware Size             : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
+	sbi_printf("Firmware RW Offset        : 0x%lx\n", scratch->fw_rw_offset);
 
 	/* SBI details */
 	sbi_printf("Runtime SBI Version       : %d.%d\n",

From 230278dcf127e2a336d54748f03b5bc280656498 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Thu, 19 Jan 2023 20:48:26 +0530
Subject: [PATCH 1180/1765] lib: sbi: Add separate entries for firmware RX and
 RW regions

Add two entries for firmware in the root domain:

1. TEXT: fw_start to _fw_rw_offset with RX permissions
2. DATA: _fw_rw_offset to fw_size with RW permissions

These permissions are still not enforced from M-mode but lay
the ground work for enforcing them for M-mode. SU-mode don't
have any access to these regions.

Sample output:
 Domain0 Region01  : 0x0000000080000000-0x000000008001ffff M: (R,X) S/U: ()
 Domain0 Region02  : 0x0000000080020000-0x000000008003ffff M: (R,W) S/U: ()

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 60fda012d7b..3ab1fbe0b7d 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -638,12 +638,32 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	u32 i;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	if (scratch->fw_rw_offset == 0 ||
+	    (scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
+		sbi_printf("%s: fw_rw_offset is not a power of 2 (0x%lx)\n",
+			   __func__, scratch->fw_rw_offset);
+		return SBI_EINVAL;
+	}
+
+	if ((scratch->fw_start & (scratch->fw_rw_offset - 1)) != 0) {
+		sbi_printf("%s: fw_start and fw_rw_offset not aligned\n",
+			   __func__);
+		return SBI_EINVAL;
+	}
+
 	/* Root domain firmware memory region */
-	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size,
-				  SBI_DOMAIN_MEMREGION_M_RWX,
+	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_rw_offset,
+				  (SBI_DOMAIN_MEMREGION_M_READABLE |
+				   SBI_DOMAIN_MEMREGION_M_EXECUTABLE),
 				  &root_fw_region);
 	domain_memregion_initfw(&root_memregs[root_memregs_count++]);
 
+	sbi_domain_memregion_init((scratch->fw_start + scratch->fw_rw_offset),
+				  (scratch->fw_size - scratch->fw_rw_offset),
+				  (SBI_DOMAIN_MEMREGION_M_READABLE |
+				   SBI_DOMAIN_MEMREGION_M_WRITABLE),
+				  &root_memregs[root_memregs_count++]);
+
 	/* Root domain allow everything memory region */
 	sbi_domain_memregion_init(0, ~0UL,
 				  (SBI_DOMAIN_MEMREGION_READABLE |

From dea0922f867f3d681ad3191fb562a082ea4a339f Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Fri, 13 Jan 2023 16:47:19 +0000
Subject: [PATCH 1181/1765] platform: renesas/rzfive: Configure Local memory
 regions as part of root domain

Renesas RZ/Five RISC-V SoC has Instruction local memory and Data local
memory (ILM & DLM) mapped between region 0x30000 - 0x4FFFF. When a
virtual address falls within this range, the MMU doesn't trigger a page
fault; it assumes the virtual address is a physical address which can
cause undesired behaviours for statically linked applications/libraries.

To avoid this, add the ILM/DLM memory regions to the root domain region
of the PMPU with permissions set to 0x0 for S/U modes so that any access
to these regions gets blocked and for M-mode we grant full access (R/W/X).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/renesas/rzfive/rzfive.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index ca182e3136f..ee9c9c4eba9 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -5,8 +5,27 @@
  */
 
 #include <platform_override.h>
+#include <sbi/sbi_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
+int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
+{
+	/*
+	 * Renesas RZ/Five RISC-V SoC has Instruction local memory and
+	 * Data local memory (ILM & DLM) mapped between region 0x30000
+	 * to 0x4FFFF. When a virtual address falls within this range,
+	 * the MMU doesn't trigger a page fault; it assumes the virtual
+	 * address is a physical address which can cause undesired
+	 * behaviours for statically linked applications/libraries. To
+	 * avoid this, add the ILM/DLM memory regions to the root domain
+	 * region of the PMPU with permissions set to 0x0 for S/U modes
+	 * so that any access to these regions gets blocked and for M-mode
+	 * we grant full access.
+	 */
+	return sbi_domain_root_add_memrange(0x30000, 0x20000, 0x1000,
+					    SBI_DOMAIN_MEMREGION_M_RWX);
+}
+
 static const struct fdt_match renesas_rzfive_match[] = {
 	{ .compatible = "renesas,r9a07g043f01" },
 	{ /* sentinel */ }
@@ -14,4 +33,5 @@ static const struct fdt_match renesas_rzfive_match[] = {
 
 const struct platform_override renesas_rzfive = {
 	.match_table = renesas_rzfive_match,
+	.early_init = renesas_rzfive_early_init,
 };

From 33bf9174602c900201481241e9ade31cf37fccd8 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Mon, 23 Jan 2023 00:32:06 -0600
Subject: [PATCH 1182/1765] lib: utils: Add fdt_add_cpu_idle_states() helper
 function

Since the availability and latency properties of CPU idle states depend
on the specific SBI HSM implementation, it is appropriate that the idle
states are added to the devicetree at runtime by that implementation.

This helper function adds a platform-provided array of idle states to
the devicetree, following the SBI idle state binding.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 include/sbi_utils/fdt/fdt_fixup.h | 23 +++++++++
 lib/utils/fdt/fdt_fixup.c         | 85 +++++++++++++++++++++++++++++++
 2 files changed, 108 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index fb076bad76c..cab3f0f2a99 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -9,6 +9,29 @@
 #ifndef __FDT_FIXUP_H__
 #define __FDT_FIXUP_H__
 
+struct sbi_cpu_idle_state {
+	const char *name;
+	uint32_t suspend_param;
+	bool local_timer_stop;
+	uint32_t entry_latency_us;
+	uint32_t exit_latency_us;
+	uint32_t min_residency_us;
+	uint32_t wakeup_latency_us;
+};
+
+/**
+ * Add CPU idle states to cpu nodes in the DT
+ *
+ * Add information about CPU idle states to the devicetree. This function
+ * assumes that CPU idle states are not already present in the devicetree, and
+ * that all CPU states are equally applicable to all CPUs.
+ *
+ * @param fdt: device tree blob
+ * @param states: array of idle state descriptions, ending with empty element
+ * @return zero on success and -ve on failure
+ */
+int fdt_add_cpu_idle_states(void *dtb, const struct sbi_cpu_idle_state *state);
+
 /**
  * Fix up the CPU node in the device tree
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 42692cc4e25..e57a4e1da27 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -18,6 +18,91 @@
 #include <sbi_utils/fdt/fdt_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
+int fdt_add_cpu_idle_states(void *fdt, const struct sbi_cpu_idle_state *state)
+{
+	int cpu_node, cpus_node, err, idle_states_node;
+	uint32_t count, phandle;
+
+	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 1024);
+	if (err < 0)
+		return err;
+
+	err = fdt_find_max_phandle(fdt, &phandle);
+	phandle++;
+	if (err < 0)
+		return err;
+
+	cpus_node = fdt_path_offset(fdt, "/cpus");
+	if (cpus_node < 0)
+		return cpus_node;
+
+	/* Do nothing if the idle-states node already exists. */
+	idle_states_node = fdt_subnode_offset(fdt, cpus_node, "idle-states");
+	if (idle_states_node >= 0)
+		return 0;
+
+	/* Create the idle-states node and its child nodes. */
+	idle_states_node = fdt_add_subnode(fdt, cpus_node, "idle-states");
+	if (idle_states_node < 0)
+		return idle_states_node;
+
+	for (count = 0; state->name; count++, phandle++, state++) {
+		int idle_state_node;
+
+		idle_state_node = fdt_add_subnode(fdt, idle_states_node,
+						  state->name);
+		if (idle_state_node < 0)
+			return idle_state_node;
+
+		fdt_setprop_string(fdt, idle_state_node, "compatible",
+				   "riscv,idle-state");
+		fdt_setprop_u32(fdt, idle_state_node,
+				"riscv,sbi-suspend-param",
+				state->suspend_param);
+		if (state->local_timer_stop)
+			fdt_setprop_empty(fdt, idle_state_node,
+					  "local-timer-stop");
+		fdt_setprop_u32(fdt, idle_state_node, "entry-latency-us",
+				state->entry_latency_us);
+		fdt_setprop_u32(fdt, idle_state_node, "exit-latency-us",
+				state->exit_latency_us);
+		fdt_setprop_u32(fdt, idle_state_node, "min-residency-us",
+				state->min_residency_us);
+		if (state->wakeup_latency_us)
+			fdt_setprop_u32(fdt, idle_state_node,
+					"wakeup-latency-us",
+					state->wakeup_latency_us);
+		fdt_setprop_u32(fdt, idle_state_node, "phandle", phandle);
+	}
+
+	if (count == 0)
+		return 0;
+
+	/* Link each cpu node to the idle state nodes. */
+	fdt_for_each_subnode(cpu_node, fdt, cpus_node) {
+		const char *device_type;
+		fdt32_t *value;
+
+		/* Only process child nodes with device_type = "cpu". */
+		device_type = fdt_getprop(fdt, cpu_node, "device_type", NULL);
+		if (!device_type || strcmp(device_type, "cpu"))
+			continue;
+
+		/* Allocate space for the list of phandles. */
+		err = fdt_setprop_placeholder(fdt, cpu_node, "cpu-idle-states",
+					      count * sizeof(phandle),
+					      (void **)&value);
+		if (err < 0)
+			return err;
+
+		/* Fill in the phandles of the idle state nodes. */
+		for (uint32_t i = 0; i < count; ++i)
+			value[i] = cpu_to_fdt32(phandle - count + i);
+	}
+
+	return 0;
+}
+
 void fdt_cpu_fixup(void *fdt)
 {
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();

From c45992cc2b121e05c74b438462b8066de3e7d999 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Mon, 23 Jan 2023 00:32:07 -0600
Subject: [PATCH 1183/1765] platform: generic: allwinner: Advertise
 nonretentive suspend

Add D1's nonretentive suspend state to the devicetree so S-mode software
knows about it and can use it.

Latency and power measurements were taken on an Allwinner Nezha board:
 - Entry latency was measured from the beginning of sbi_ecall_handler()
   to before the call to wfi() in sun20i_d1_hart_suspend().
 - Exit latency was measured from the beginning of sbi_init() to before
   the call to sbi_hart_switch_mode() in init_warmboot().
 - There was a 17.5 mW benefit from non-retentive suspend compared to
   WFI, with a 170 mW cost during the 107 us entry/exit period. This
   provides a break-even point around 1040 us. Residency includes entry
   latency, so round this up to 1100 us.
 - The hardware power sequence latency (after the WFI) is assumed to be
   negligible, so set the wakeup latency to the exit latency.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 platform/generic/allwinner/sun20i-d1.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index e2b76a33d95..295c1593db1 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_pmu.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip_plic.h>
 
@@ -202,6 +203,24 @@ static int sun20i_d1_final_init(bool cold_boot, const struct fdt_match *match)
 	return 0;
 }
 
+static const struct sbi_cpu_idle_state sun20i_d1_cpu_idle_states[] = {
+	{
+		.name			= "cpu-nonretentive",
+		.suspend_param		= SBI_HSM_SUSPEND_NON_RET_DEFAULT,
+		.local_timer_stop	= true,
+		.entry_latency_us	= 40,
+		.exit_latency_us	= 67,
+		.min_residency_us	= 1100,
+		.wakeup_latency_us	= 67,
+	},
+	{ }
+};
+
+static int sun20i_d1_fdt_fixup(void *fdt, const struct fdt_match *match)
+{
+	return fdt_add_cpu_idle_states(fdt, sun20i_d1_cpu_idle_states);
+}
+
 static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
 {
 	unsigned long mip_val;
@@ -265,5 +284,6 @@ static const struct fdt_match sun20i_d1_match[] = {
 const struct platform_override sun20i_d1 = {
 	.match_table	= sun20i_d1_match,
 	.final_init	= sun20i_d1_final_init,
+	.fdt_fixup	= sun20i_d1_fdt_fixup,
 	.extensions_init = sun20i_d1_extensions_init,
 };

From c8ea836ee33eb778f48f780412e147386dac5301 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Thu, 26 Jan 2023 21:10:03 +0530
Subject: [PATCH 1184/1765] firmware: Fix fw_rw_offset computation in fw_base.S
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

It seems BFD just does totally nonsensical things for SHN_ABS symbols
when producing position-independent outputs (both -pie and -shared)
for various historical reasons, and so SHN_ABS symbols are still
subject to relocation as far as BFD is concerned (except AArch64,
which fixes it in limited cases that don’t apply here...).

The above affects the _fw_rw_offset provided through fw_base.ldS
linker script which results in OpenSBI firmware failing to boot
when loaded at an address different from FW_TEXT_START.

Fixes: c10e3fe5f9a1 ("firmware: Add RW section offset in scratch")
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reported-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 firmware/fw_base.S   | 2 +-
 firmware/fw_base.ldS | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index e04b683331d..fb6ac926978 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -526,7 +526,7 @@ _link_start:
 _link_end:
 	RISCV_PTR	_fw_reloc_end
 __fw_rw_offset:
-	RISCV_PTR	_fw_rw_offset
+	RISCV_PTR	_fw_rw_start - _fw_start
 
 	.section .entry, "ax", %progbits
 	.align 3
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 9a1304e98ec..3d68484ba5e 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -64,7 +64,7 @@
 	. = ALIGN(1 << LOG2CEIL((SIZEOF(.rodata) + SIZEOF(.text)
 				+ SIZEOF(.dynsym) + SIZEOF(.rela.dyn))));
 
-	PROVIDE(_fw_rw_offset = (.  - _fw_start));
+	PROVIDE(_fw_rw_start = .);
 
 	/* Beginning of the read-write data sections */
 

From 8050081f68b2b66f8937b15a6753ec6408c2fdee Mon Sep 17 00:00:00 2001
From: Nick Hu <nick.hu@sifive.com>
Date: Tue, 17 Jan 2023 16:14:27 +0800
Subject: [PATCH 1185/1765] firmware: Not to clear all the MIP

In generic behavior of QEMU, if the pending bits of PLIC are still set and
we clear the SEIP, the QEMU may not set the SEIP back immediately and the
interrupt may not be handled anymore until the new interrupts arrived and
QEMU set the SEIP back which is a generic behavior in QEMU.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index fb6ac926978..ceef44f26b1 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -428,9 +428,15 @@ _start_warm:
 	li	ra, 0
 	call	_reset_regs
 
-	/* Disable and clear all interrupts */
+	/* Disable all interrupts */
 	csrw	CSR_MIE, zero
-	csrw	CSR_MIP, zero
+	/*
+	 * Only clear the MIP_SSIP and MIP_STIP. For the platform like QEMU,
+	 * If we clear other interrupts like MIP_SEIP and the pendings of
+	 * PLIC still exist, the QEMU may not set it back immediately.
+	 */
+	li	t0, (MIP_SSIP | MIP_STIP)
+	csrc	CSR_MIP, t0
 
 	/* Find HART count and HART stack size */
 	lla	a4, platform

From 84d15f4f529c92d3f32fbc570c02f7d40e9e70cb Mon Sep 17 00:00:00 2001
From: Nick Hu <nick.hu@sifive.com>
Date: Tue, 17 Jan 2023 16:14:28 +0800
Subject: [PATCH 1186/1765] lib: sbi_hsm: Use csr_set to restore the MIP

If we use the csr_write to restore the MIP, we may clear the SEIP.
In generic behavior of QEMU, if the pending bits of PLIC are set and we
clear the SEIP, the QEMU may not set it back immediately. It may cause
the interrupts won't be handled anymore until the new interrupts arrived
and QEMU set the bits back.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index d4cce4ac914..8499bb1ddea 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -357,7 +357,7 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 							    hart_data_offset);
 
 	csr_write(CSR_MIE, hdata->saved_mie);
-	csr_write(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));
+	csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));
 }
 
 void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)

From 199189bd1c172aab5a9733c0ffaaa14bbebb3323 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Fri, 27 Jan 2023 09:49:23 +0530
Subject: [PATCH 1187/1765] lib: utils: Mark only the largest region as
 reserved in FDT

In commit 230278dcf, RX and RW regions were marked separately.
When the RW region grows (e.g. with more harts) and it isn't a
power-of-two, sbi_domain_memregion_init will upgrade the region
to the next power-of-two. This will make RX and RW both start
at the same base address, like so (with 64 harts):
Domain0 Region01 : 0x0000000080000000-0x000000008001ffff M: (R,X) S/U: ()
Domain0 Region02 : 0x0000000080000000-0x00000000800fffff M: (R,W) S/U: ()

This doesn't break the permission enforcement because of static
priorities in PMP but makes the kernel complain about the regions
overlapping each other. Like so:
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] mmode_resv0@80000000 (0x0000000080000000--0x0000000080020000) \
	overlaps with mmode_resv1@80000000 (0x0000000080000000--0x0000000080100000)

To fix this warning, among the multiple regions having same base
address but different sizes, add only the largest region as reserved
region during fdt fixup.

Fixes: 230278dcf (lib: sbi: Add separate entries for firmware RX and RW regions)
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_fixup.c | 34 ++++++++++++++++++++++++++++++----
 1 file changed, 30 insertions(+), 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index e57a4e1da27..619e4f5cbaf 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -1,3 +1,4 @@
+
 // SPDX-License-Identifier: BSD-2-Clause
 /*
  * fdt_fixup.c - Flat Device Tree parsing helper routines
@@ -14,6 +15,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -285,8 +287,10 @@ int fdt_reserved_memory_fixup(void *fdt)
 	struct sbi_domain_memregion *reg;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	unsigned long filtered_base[PMP_COUNT] = { 0 };
+	unsigned char filtered_order[PMP_COUNT] = { 0 };
 	unsigned long addr, size;
-	int err, parent, i;
+	int err, parent, i, j;
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
 
@@ -351,11 +355,33 @@ int fdt_reserved_memory_fixup(void *fdt)
 		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
 			continue;
 
+		if (i > PMP_COUNT) {
+			sbi_printf("%s: Too many memory regions to fixup.\n",
+				   __func__);
+			return SBI_ENOSPC;
+		}
+
 		addr = reg->base;
-		size = 1UL << reg->order;
-		fdt_resv_memory_update_node(fdt, addr, size, i, parent,
-			(sbi_hart_pmp_count(scratch)) ? false : true);
+		for (j = 0; j < i; j++) {
+			if (addr == filtered_base[j]
+			    && filtered_order[j] < reg->order) {
+				filtered_order[j] = reg->order;
+				goto next_entry;
+			}
+		}
+
+		filtered_base[i] = reg->base;
+		filtered_order[i] = reg->order;
 		i++;
+	next_entry:
+	}
+
+	for (j = 0; j < i; j++) {
+		addr = filtered_base[j];
+		size = 1UL << filtered_order[j];
+		fdt_resv_memory_update_node(fdt, addr, size, j, parent,
+					    (sbi_hart_pmp_count(scratch))
+					    ? false : true);
 	}
 
 	return 0;

From 66b0e23a0cecb863b8fbb24c337be5710f31da62 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 30 Jan 2023 17:42:24 +0100
Subject: [PATCH 1188/1765] lib: sbi: Ensure domidx_to_domain_table is
 null-terminated

sbi_domain_for_each() requires domidx_to_domain_table[] to be
null-terminated. Allocate one extra element which will always
be null.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 3ab1fbe0b7d..3813f1b2e97 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -17,8 +17,12 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
+/*
+ * We allocate an extra element because sbi_domain_for_each() expects
+ * the array to be null-terminated.
+ */
+struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX + 1] = { 0 };
 struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 };
-struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX] = { 0 };
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 

From 642f3de9b947b747a4fe0eaae348f1c55f1ac409 Mon Sep 17 00:00:00 2001
From: Jessica Clarke <jrtc27@jrtc27.com>
Date: Wed, 1 Feb 2023 16:49:16 +0000
Subject: [PATCH 1189/1765] Makefile: Add missing .dep files for fw_*.elf.ld

Since we don't currently create these, changes to fw_base.ldS do not
cause the preprocessed fw_*.elf.ld files to be rebuilt, and thus
incremental builds can end up failing with missing symbols if crossing
the recent commits that introduced _fw_rw_offset and then replaced it
with _fw_rw_start.

Reported-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Makefile b/Makefile
index b742d6dbc5e..b20404f94aa 100644
--- a/Makefile
+++ b/Makefile
@@ -254,6 +254,7 @@ deps-y=$(platform-objs-path-y:.o=.dep)
 deps-y+=$(libsbi-objs-path-y:.o=.dep)
 deps-y+=$(libsbiutils-objs-path-y:.o=.dep)
 deps-y+=$(firmware-objs-path-y:.o=.dep)
+deps-y+=$(firmware-elfs-path-y:=.dep)
 
 # Setup platform ABI, ISA and Code Model
 ifndef PLATFORM_RISCV_ABI
@@ -413,6 +414,11 @@ inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
 	     echo " INSTALL   $(subst $(install_root_dir)/,,$(1))"; \
 	     cp -rf $(2) $(1)
+compile_cpp_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
+	     echo " CPP-DEP   $(subst $(build_dir)/,,$(1))"; \
+	     printf %s `dirname $(1)`/  > $(1) && \
+	     $(CC) $(CPPFLAGS) -x c -MM $(3) \
+	       -MT `basename $(1:.dep=$(2))` >> $(1) || rm -f $(1)
 compile_cpp = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP       $(subst $(build_dir)/,,$(1))"; \
 	     $(CPP) $(CPPFLAGS) -x c $(2) | grep -v "\#" > $(1)
@@ -543,6 +549,9 @@ $(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
 $(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
 	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
 
+$(platform_build_dir)/%.dep: $(src_dir)/%.ldS $(KCONFIG_CONFIG)
+	$(call compile_cpp_dep,$@,.ld,$<)
+
 $(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 

From 09b34d8cca513dbd4d52ffd6d3d5b6dedeea516b Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 2 Feb 2023 10:14:25 +0530
Subject: [PATCH 1190/1765] include: Add support for byteorder/endianness
 conversion

Define macros general byteorder conversion
Define functions for endianness conversion
from general byteorder conversion macros

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_byteorder.h | 57 +++++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 include/sbi/sbi_byteorder.h

diff --git a/include/sbi/sbi_byteorder.h b/include/sbi/sbi_byteorder.h
new file mode 100644
index 00000000000..680710fe6d9
--- /dev/null
+++ b/include/sbi/sbi_byteorder.h
@@ -0,0 +1,57 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ */
+
+#ifndef __SBI_BYTEORDER_H__
+#define __SBI_BYTEORDER_H__
+
+#include <sbi/sbi_types.h>
+
+#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
+
+#define BSWAP16(x)	((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
+#define BSWAP32(x)	((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
+			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
+#define BSWAP64(x)	((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
+			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
+			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
+			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
+
+
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__  /* CPU(little-endian) */
+#define cpu_to_be16(x)		((uint16_t)BSWAP16(x))
+#define cpu_to_be32(x)		((uint32_t)BSWAP32(x))
+#define cpu_to_be64(x)		((uint64_t)BSWAP64(x))
+
+#define be16_to_cpu(x)		((uint16_t)BSWAP16(x))
+#define be32_to_cpu(x)		((uint32_t)BSWAP32(x))
+#define be64_to_cpu(x)		((uint64_t)BSWAP64(x))
+
+#define cpu_to_le16(x)		((uint16_t)(x))
+#define cpu_to_le32(x)		((uint32_t)(x))
+#define cpu_to_le64(x)		((uint64_t)(x))
+
+#define le16_to_cpu(x)		((uint16_t)(x))
+#define le32_to_cpu(x)		((uint32_t)(x))
+#define le64_to_cpu(x)		((uint64_t)(x))
+#else /* CPU(big-endian) */
+#define cpu_to_be16(x)		((uint16_t)(x))
+#define cpu_to_be32(x)		((uint32_t)(x))
+#define cpu_to_be64(x)		((uint64_t)(x))
+
+#define be16_to_cpu(x)		((uint16_t)(x))
+#define be32_to_cpu(x)		((uint32_t)(x))
+#define be64_to_cpu(x)		((uint64_t)(x))
+
+#define cpu_to_le16(x)		((uint16_t)BSWAP16(x))
+#define cpu_to_le32(x)		((uint32_t)BSWAP32(x))
+#define cpu_to_le64(x)		((uint64_t)BSWAP64(x))
+
+#define le16_to_cpu(x)		((uint16_t)BSWAP16(x))
+#define le32_to_cpu(x)		((uint32_t)BSWAP32(x))
+#define le64_to_cpu(x)		((uint64_t)BSWAP64(x))
+#endif
+
+#endif /* __SBI_BYTEORDER_H__ */

From 680bea02bf47e04594ed8810bfee7e9088cd1ca7 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 2 Feb 2023 10:14:26 +0530
Subject: [PATCH 1191/1765] lib: utils/fdt: Use byteorder conversion functions
 in libfdt_env.h

FDT follows big-endian and CPU can be little or big
endian as per the implementation.
libfdt_env.h defines function for conversion between
fdt and cpu byteorder according to the endianness.

Currently, libfdt_env.h defines custom byte swapping
macros and then undefines them. Instead, use the generic
endianness conversion functions

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/libfdt/libfdt_env.h | 29 ++++++++++-------------------
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index f9d9c6783c5..e5ad7698efc 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -9,6 +9,7 @@
 
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_byteorder.h>
 
 #define INT_MAX		((int)(~0U >> 1))
 #define UINT_MAX	((unsigned int)~0U)
@@ -41,45 +42,35 @@ typedef uint16_t FDT_BITWISE fdt16_t;
 typedef uint32_t FDT_BITWISE fdt32_t;
 typedef uint64_t FDT_BITWISE fdt64_t;
 
-#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
-#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
-#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
-			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
-#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
-			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
-			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
-			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
-
 static inline uint16_t fdt16_to_cpu(fdt16_t x)
 {
-	return (FDT_FORCE uint16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE uint16_t)be16_to_cpu(x);
 }
+
 static inline fdt16_t cpu_to_fdt16(uint16_t x)
 {
-	return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE fdt16_t)cpu_to_be16(x);
 }
 
 static inline uint32_t fdt32_to_cpu(fdt32_t x)
 {
-	return (FDT_FORCE uint32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE uint32_t)be32_to_cpu(x);
 }
+
 static inline fdt32_t cpu_to_fdt32(uint32_t x)
 {
-	return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE fdt32_t)cpu_to_be32(x);
 }
 
 static inline uint64_t fdt64_to_cpu(fdt64_t x)
 {
-	return (FDT_FORCE uint64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE uint64_t)be64_to_cpu(x);
 }
+
 static inline fdt64_t cpu_to_fdt64(uint64_t x)
 {
-	return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE fdt64_t)cpu_to_be64(x);
 }
-#undef CPU_TO_FDT64
-#undef CPU_TO_FDT32
-#undef CPU_TO_FDT16
-#undef EXTRACT_BYTE
 
 #ifdef __APPLE__
 #include <AvailabilityMacros.h>

From b224ddb41fe1f9cbdfb246ebf22036ae1fe3f40f Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 2 Feb 2023 10:14:27 +0530
Subject: [PATCH 1192/1765] include: types: Add typedefs for endianness

If any variable/memory-location follows certain
endianness then its important to annotate it properly
so that proper conversion can be done before read/write
from that variable/memory.

Also, use these new typedefs in libfdt_env.h for deriving
its own custom fdtX_t types

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_types.h       | 7 +++++++
 lib/utils/libfdt/libfdt_env.h | 6 +++---
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index 9c1fef3b8dc..def88bbad2c 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -54,6 +54,13 @@ typedef unsigned long		virtual_size_t;
 typedef unsigned long		physical_addr_t;
 typedef unsigned long		physical_size_t;
 
+typedef uint16_t		le16_t;
+typedef uint16_t		be16_t;
+typedef uint32_t		le32_t;
+typedef uint32_t		be32_t;
+typedef uint64_t		le64_t;
+typedef uint64_t		be64_t;
+
 #define true			1
 #define false			0
 
diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index e5ad7698efc..6ebbae01b51 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -38,9 +38,9 @@
 #define strlen		sbi_strlen
 #define strnlen		sbi_strnlen
 
-typedef uint16_t FDT_BITWISE fdt16_t;
-typedef uint32_t FDT_BITWISE fdt32_t;
-typedef uint64_t FDT_BITWISE fdt64_t;
+typedef be16_t FDT_BITWISE fdt16_t;
+typedef be32_t FDT_BITWISE fdt32_t;
+typedef be64_t FDT_BITWISE fdt64_t;
 
 static inline uint16_t fdt16_to_cpu(fdt16_t x)
 {

From aa5dafcb5bfc04f8509a04291402d86d6b5c36d5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 9 Feb 2023 09:15:19 +0530
Subject: [PATCH 1193/1765] include: sbi: Fix BSWAPx() macros for big-endian
 host

The BSWAPx() macros won't do any swapping for big-endian host
because the EXTRACT_BYTE() macro will pickup bytes in reverse
order. Also, the EXTRACT_BYTE() will generate compile error
for constants.

To fix this, we get remove the EXTRACT_BYTE() macro and re-write
BSWAPx() using simple mask and shift operations.

Fixes: 09b34d8cca51 ("include: Add support for byteorder/endianness
conversion")
Reported-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_byteorder.h | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_byteorder.h b/include/sbi/sbi_byteorder.h
index 680710fe6d9..15107e1ea3d 100644
--- a/include/sbi/sbi_byteorder.h
+++ b/include/sbi/sbi_byteorder.h
@@ -9,16 +9,20 @@
 
 #include <sbi/sbi_types.h>
 
-#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
-
-#define BSWAP16(x)	((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
-#define BSWAP32(x)	((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
-			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
-#define BSWAP64(x)	((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
-			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
-			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
-			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
-
+#define BSWAP16(x)	((((x) & 0x00ff) << 8) | \
+			 (((x) & 0xff00) >> 8))
+#define BSWAP32(x)	((((x) & 0x000000ff) << 24) | \
+			 (((x) & 0x0000ff00) << 8) | \
+			 (((x) & 0x00ff0000) >> 8) | \
+			 (((x) & 0xff000000) >> 24))
+#define BSWAP64(x)	((((x) & 0x00000000000000ffULL) << 56) | \
+			 (((x) & 0x000000000000ff00ULL) << 40) | \
+			 (((x) & 0x0000000000ff0000ULL) << 24) | \
+			 (((x) & 0x00000000ff000000ULL) << 8) | \
+			 (((x) & 0x000000ff00000000ULL) >> 8) | \
+			 (((x) & 0x0000ff0000000000ULL) >> 24) | \
+			 (((x) & 0x00ff000000000000ULL) >> 40) | \
+			 (((x) & 0xff00000000000000ULL) >> 56))
 
 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__  /* CPU(little-endian) */
 #define cpu_to_be16(x)		((uint16_t)BSWAP16(x))

From e3bf1afcc568fece971d67395f63461fddb4c0fa Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 22 Jul 2022 16:25:51 +0530
Subject: [PATCH 1194/1765] include: Add defines for SBI debug console
 extension

We add SBI debug console extension related defines to the
SBI ecall interface header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_ecall_interface.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index a3f2bf4bdf6..9d6f4743651 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -29,6 +29,7 @@
 #define SBI_EXT_HSM				0x48534D
 #define SBI_EXT_SRST				0x53525354
 #define SBI_EXT_PMU				0x504D55
+#define SBI_EXT_DBCN				0x4442434E
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -230,6 +231,11 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+/* SBI function IDs for DBCN extension */
+#define SBI_EXT_DBCN_CONSOLE_WRITE		0x0
+#define SBI_EXT_DBCN_CONSOLE_READ		0x1
+#define SBI_EXT_DBCN_CONSOLE_WRITE_BYTE		0x2
+
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f

From 0ee3a86fedafccaa5f57df86b07547747920972e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 22 Jul 2022 16:28:21 +0530
Subject: [PATCH 1195/1765] lib: sbi: Add sbi_nputs() function

We add new sbi_nputs() which help us print a fixed number of characters
from a physical memory location.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_console.h |  2 ++
 lib/sbi/sbi_console.c     | 12 ++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index e15b55dcb54..dd6a905d116 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -33,6 +33,8 @@ void sbi_putc(char ch);
 
 void sbi_puts(const char *str);
 
+unsigned long sbi_nputs(const char *str, unsigned long len);
+
 void sbi_gets(char *s, int maxwidth, char endchar);
 
 int __printf(2, 3) sbi_sprintf(char *out, const char *format, ...);
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index bb6e1ef159a..2f83a26c734 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -51,6 +51,18 @@ void sbi_puts(const char *str)
 	spin_unlock(&console_out_lock);
 }
 
+unsigned long sbi_nputs(const char *str, unsigned long len)
+{
+	unsigned long i;
+
+	spin_lock(&console_out_lock);
+	for (i = 0; i < len; i++)
+		sbi_putc(str[i]);
+	spin_unlock(&console_out_lock);
+
+	return i;
+}
+
 void sbi_gets(char *s, int maxwidth, char endchar)
 {
 	int ch;

From 4e0572f57bc832b13f6e813dcdaebb1bf4d1172a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 4 Jan 2023 17:36:29 +0530
Subject: [PATCH 1196/1765] lib: sbi: Add sbi_ngets() function

We add new sbi_ngets() which help us read characters into a
physical memory location.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_console.h |  2 ++
 lib/sbi/sbi_console.c     | 15 +++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index dd6a905d116..3c1f5e595a6 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -37,6 +37,8 @@ unsigned long sbi_nputs(const char *str, unsigned long len);
 
 void sbi_gets(char *s, int maxwidth, char endchar);
 
+unsigned long sbi_ngets(char *str, unsigned long len);
+
 int __printf(2, 3) sbi_sprintf(char *out, const char *format, ...);
 
 int __printf(3, 4) sbi_snprintf(char *out, u32 out_sz, const char *format, ...);
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 2f83a26c734..c734bc0a04f 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -76,6 +76,21 @@ void sbi_gets(char *s, int maxwidth, char endchar)
 	*retval = '\0';
 }
 
+unsigned long sbi_ngets(char *str, unsigned long len)
+{
+	int ch;
+	unsigned long i;
+
+	for (i = 0; i < len; i++) {
+		ch = sbi_getc();
+		if (ch < 0)
+			break;
+		str[i] = ch;
+	}
+
+	return i;
+}
+
 #define PAD_RIGHT 1
 #define PAD_ZERO 2
 #define PAD_ALTERNATE 4

From eab48c33a12d5cdb01e36d0078c9f79764055952 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 23 Nov 2022 11:46:16 +0530
Subject: [PATCH 1197/1765] lib: sbi: Add sbi_domain_check_addr_range()
 function

We add sbi_domain_check_addr_range() helper function to check
whether a given address range is accessible under a particular
domain.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_domain.h | 15 +++++++++
 lib/sbi/sbi_domain.c     | 69 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index bbb3effa244..ab1a944b474 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -196,6 +196,21 @@ bool sbi_domain_check_addr(const struct sbi_domain *dom,
 			   unsigned long addr, unsigned long mode,
 			   unsigned long access_flags);
 
+/**
+ * Check whether we can access specified address range for given mode and
+ * memory region flags under a domain
+ * @param dom pointer to domain
+ * @param addr the start of the address range to be checked
+ * @param size the size of the address range to be checked
+ * @param mode the privilege mode of access
+ * @param access_flags bitmask of domain access types (enum sbi_domain_access)
+ * @return TRUE if access allowed otherwise FALSE
+ */
+bool sbi_domain_check_addr_range(const struct sbi_domain *dom,
+				 unsigned long addr, unsigned long size,
+				 unsigned long mode,
+				 unsigned long access_flags);
+
 /** Dump domain details on the console */
 void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix);
 
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 3813f1b2e97..dc825b0d95f 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -212,6 +212,44 @@ static bool is_region_before(const struct sbi_domain_memregion *regA,
 	return false;
 }
 
+static const struct sbi_domain_memregion *find_region(
+						const struct sbi_domain *dom,
+						unsigned long addr)
+{
+	unsigned long rstart, rend;
+	struct sbi_domain_memregion *reg;
+
+	sbi_domain_for_each_memregion(dom, reg) {
+		rstart = reg->base;
+		rend = (reg->order < __riscv_xlen) ?
+			rstart + ((1UL << reg->order) - 1) : -1UL;
+		if (rstart <= addr && addr <= rend)
+			return reg;
+	}
+
+	return NULL;
+}
+
+static const struct sbi_domain_memregion *find_next_subset_region(
+				const struct sbi_domain *dom,
+				const struct sbi_domain_memregion *reg,
+				unsigned long addr)
+{
+	struct sbi_domain_memregion *sreg, *ret = NULL;
+
+	sbi_domain_for_each_memregion(dom, sreg) {
+		if (sreg == reg || (sreg->base <= addr) ||
+		    !is_region_subset(sreg, reg))
+			continue;
+
+		if (!ret || (sreg->base < ret->base) ||
+		    ((sreg->base == ret->base) && (sreg->order < ret->order)))
+			ret = sreg;
+	}
+
+	return ret;
+}
+
 static int sanitize_domain(const struct sbi_platform *plat,
 			   struct sbi_domain *dom)
 {
@@ -320,6 +358,37 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	return 0;
 }
 
+bool sbi_domain_check_addr_range(const struct sbi_domain *dom,
+				 unsigned long addr, unsigned long size,
+				 unsigned long mode,
+				 unsigned long access_flags)
+{
+	unsigned long max = addr + size;
+	const struct sbi_domain_memregion *reg, *sreg;
+
+	if (!dom)
+		return false;
+
+	while (addr < max) {
+		reg = find_region(dom, addr);
+		if (!reg)
+			return false;
+
+		if (!sbi_domain_check_addr(dom, addr, mode, access_flags))
+			return false;
+
+		sreg = find_next_subset_region(dom, reg, addr);
+		if (sreg)
+			addr = sreg->base;
+		else if (reg->order < __riscv_xlen)
+			addr = reg->base + (1UL << reg->order);
+		else
+			break;
+	}
+
+	return true;
+}
+
 void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 {
 	u32 i, k;

From 5a41a3884fe2a639698aaa67a9c1ecc33573eb78 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 23 Nov 2022 11:11:43 +0530
Subject: [PATCH 1198/1765] lib: sbi: Implement SBI debug console extension

We implement SBI debug console extension as one of the replacement
SBI extensions. This extension is only available when OpenSBI platform
provides a console device to generic library.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/sbi/Kconfig          |  4 +++
 lib/sbi/objects.mk       |  3 ++
 lib/sbi/sbi_ecall_dbcn.c | 72 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 79 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_dbcn.c

diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index df74bba3854..ef6728bab3e 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -26,6 +26,10 @@ config SBI_ECALL_PMU
 	bool "Performance Monitoring Unit extension"
 	default y
 
+config SBI_ECALL_DBCN
+	bool "Debug Console extension"
+	default y
+
 config SBI_ECALL_LEGACY
 	bool "SBI v0.1 legacy extensions"
 	default y
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index c774ebbcd14..319f38dce70 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -37,6 +37,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_SRST) += sbi_ecall_srst.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_PMU) += ecall_pmu
 libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_DBCN) += ecall_dbcn
+libsbi-objs-$(CONFIG_SBI_ECALL_DBCN) += sbi_ecall_dbcn.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
 libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
 
diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
new file mode 100644
index 00000000000..fe7e175a64c
--- /dev/null
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -0,0 +1,72 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/riscv_asm.h>
+
+static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	ulong smode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >>
+			MSTATUS_MPP_SHIFT;
+
+	switch (funcid) {
+	case SBI_EXT_DBCN_CONSOLE_WRITE:
+	case SBI_EXT_DBCN_CONSOLE_READ:
+		/*
+		 * On RV32, the M-mode can only access the first 4GB of
+		 * the physical address space because M-mode does not have
+		 * MMU to access full 34-bit physical address space.
+		 *
+		 * Based on above, we simply fail if the upper 32bits of
+		 * the physical address (i.e. a2 register) is non-zero on
+		 * RV32.
+		 */
+#if __riscv_xlen == 32
+		if (regs->a2)
+			return SBI_ERR_FAILED;
+#endif
+		if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(),
+					regs->a1, regs->a0, smode,
+					SBI_DOMAIN_READ|SBI_DOMAIN_WRITE))
+			return SBI_ERR_INVALID_PARAM;
+		if (funcid == SBI_EXT_DBCN_CONSOLE_WRITE)
+			*out_val = sbi_nputs((const char *)regs->a1, regs->a0);
+		else
+			*out_val = sbi_ngets((char *)regs->a1, regs->a0);
+		return 0;
+	case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
+		sbi_putc(regs->a0);
+		return 0;
+	default:
+		break;
+	}
+
+	return SBI_ENOTSUPP;
+}
+
+static int sbi_ecall_dbcn_probe(unsigned long extid, unsigned long *out_val)
+{
+	*out_val = sbi_console_get_device() ? 1 : 0;
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_dbcn = {
+	.extid_start = SBI_EXT_DBCN,
+	.extid_end = SBI_EXT_DBCN,
+	.handle = sbi_ecall_dbcn_handler,
+	.probe = sbi_ecall_dbcn_probe,
+};

From c43903c4eae41be9917b0623f3625d96ca25fbc3 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 23 Nov 2022 12:32:06 +0530
Subject: [PATCH 1199/1765] lib: sbi: Add console_puts() callback in the
 console device

We add console_puts() callback in the console device which allows
console drivers (such as semihosting) to implement a specialized
way to output character string.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_console.h |  3 +++
 lib/sbi/sbi_console.c     | 29 ++++++++++++++++++++++-------
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 3c1f5e595a6..0979765240c 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -19,6 +19,9 @@ struct sbi_console_device {
 	/** Write a character to the console output */
 	void (*console_putc)(char ch);
 
+	/** Write a character string to the console output */
+	unsigned long (*console_puts)(const char *str, unsigned long len);
+
 	/** Read a character from the console input */
 	int (*console_getc)(void);
 };
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index c734bc0a04f..8a5d9de0485 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
 
 static const struct sbi_console_device *console_dev = NULL;
 static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
@@ -43,24 +44,38 @@ void sbi_putc(char ch)
 
 void sbi_puts(const char *str)
 {
+	unsigned long p, len;
+
 	spin_lock(&console_out_lock);
-	while (*str) {
-		sbi_putc(*str);
-		str++;
+	if (console_dev && console_dev->console_puts) {
+		p = 0;
+		len = sbi_strlen(str);
+		while (p < len)
+			p += console_dev->console_puts(&str[p], len - p);
+	} else {
+		while (*str) {
+			sbi_putc(*str);
+			str++;
+		}
 	}
 	spin_unlock(&console_out_lock);
 }
 
 unsigned long sbi_nputs(const char *str, unsigned long len)
 {
-	unsigned long i;
+	unsigned long i, ret;
 
 	spin_lock(&console_out_lock);
-	for (i = 0; i < len; i++)
-		sbi_putc(str[i]);
+	if (console_dev && console_dev->console_puts) {
+		ret = console_dev->console_puts(str, len);
+	} else {
+		for (i = 0; i < len; i++)
+			sbi_putc(str[i]);
+		ret = len;
+	}
 	spin_unlock(&console_out_lock);
 
-	return i;
+	return ret;
 }
 
 void sbi_gets(char *s, int maxwidth, char endchar)

From 29285aead07d2778855e1e67ba9c08b4fa4a2c7a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 23 Nov 2022 15:40:17 +0530
Subject: [PATCH 1200/1765] lib: utils/serial: Implement console_puts() for
 semihosting

We implement console_puts() for semihosting serial driver to speed-up
semihosting based prints.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/serial/semihosting.c | 37 ++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/lib/utils/serial/semihosting.c b/lib/utils/serial/semihosting.c
index 86fa296ce17..ce65887dd72 100644
--- a/lib/utils/serial/semihosting.c
+++ b/lib/utils/serial/semihosting.c
@@ -15,6 +15,7 @@
 
 #define SYSOPEN     0x01
 #define SYSWRITEC   0x03
+#define SYSWRITE    0x05
 #define SYSREAD     0x06
 #define SYSREADC    0x07
 #define SYSERRNO	0x13
@@ -93,6 +94,7 @@ static int semihosting_errno(void)
 }
 
 static int semihosting_infd = SBI_ENODEV;
+static int semihosting_outfd = SBI_ENODEV;
 
 static long semihosting_open(const char *fname, enum semihosting_open_mode mode)
 {
@@ -141,6 +143,21 @@ static long semihosting_read(long fd, void *memp, size_t len)
 	return len - ret;
 }
 
+static long semihosting_write(long fd, const void *memp, size_t len)
+{
+	long ret;
+	struct semihosting_rdwr_s write;
+
+	write.fd = fd;
+	write.memp = (void *)memp;
+	write.len = len;
+
+	ret = semihosting_trap(SYSWRITE, &write);
+	if (ret < 0)
+		return semihosting_errno();
+	return len - ret;
+}
+
 /* clang-format on */
 
 static void semihosting_putc(char ch)
@@ -148,6 +165,24 @@ static void semihosting_putc(char ch)
 	semihosting_trap(SYSWRITEC, &ch);
 }
 
+static unsigned long semihosting_puts(const char *str, unsigned long len)
+{
+	char ch;
+	long ret;
+	unsigned long i;
+
+	if (semihosting_outfd < 0) {
+		for (i = 0; i < len; i++) {
+			ch = str[i];
+			semihosting_trap(SYSWRITEC, &ch);
+		}
+		ret = len;
+	} else
+		ret = semihosting_write(semihosting_outfd, str, len);
+
+	return (ret < 0) ? 0 : ret;
+}
+
 static int semihosting_getc(void)
 {
 	char ch = 0;
@@ -165,12 +200,14 @@ static int semihosting_getc(void)
 static struct sbi_console_device semihosting_console = {
 	.name = "semihosting",
 	.console_putc = semihosting_putc,
+	.console_puts = semihosting_puts,
 	.console_getc = semihosting_getc
 };
 
 int semihosting_init(void)
 {
 	semihosting_infd = semihosting_open(":tt", MODE_READ);
+	semihosting_outfd = semihosting_open(":tt", MODE_WRITE);
 
 	sbi_console_set_device(&semihosting_console);
 

From 65c2190b47b14341dac9f763fed2d4ecbbff2a69 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 13 Jan 2023 14:53:53 +0530
Subject: [PATCH 1201/1765] lib: sbi: Speed-up sbi_printf() and friends using
 nputs()

The sbi_printf() is slow for semihosting because it prints one
character at a time. To speed-up sbi_printf() for semihosting,
we use a temporary buffer and nputs().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/sbi_console.c | 76 ++++++++++++++++++++++++++++++-------------
 1 file changed, 54 insertions(+), 22 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 8a5d9de0485..f3ac0033460 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -14,7 +14,11 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
+#define CONSOLE_TBUF_MAX 256
+
 static const struct sbi_console_device *console_dev = NULL;
+static char console_tbuf[CONSOLE_TBUF_MAX];
+static u32 console_tbuf_len;
 static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
 
 bool sbi_isprintable(char c)
@@ -42,37 +46,44 @@ void sbi_putc(char ch)
 	}
 }
 
-void sbi_puts(const char *str)
+static unsigned long nputs(const char *str, unsigned long len)
 {
-	unsigned long p, len;
+	unsigned long i, ret;
 
-	spin_lock(&console_out_lock);
 	if (console_dev && console_dev->console_puts) {
-		p = 0;
-		len = sbi_strlen(str);
-		while (p < len)
-			p += console_dev->console_puts(&str[p], len - p);
+		ret = console_dev->console_puts(str, len);
 	} else {
-		while (*str) {
-			sbi_putc(*str);
-			str++;
-		}
+		for (i = 0; i < len; i++)
+			sbi_putc(str[i]);
+		ret = len;
 	}
+
+	return ret;
+}
+
+static void nputs_all(const char *str, unsigned long len)
+{
+	unsigned long p = 0;
+
+	while (p < len)
+		p += nputs(&str[p], len - p);
+}
+
+void sbi_puts(const char *str)
+{
+	unsigned long len = sbi_strlen(str);
+
+	spin_lock(&console_out_lock);
+	nputs_all(str, len);
 	spin_unlock(&console_out_lock);
 }
 
 unsigned long sbi_nputs(const char *str, unsigned long len)
 {
-	unsigned long i, ret;
+	unsigned long ret;
 
 	spin_lock(&console_out_lock);
-	if (console_dev && console_dev->console_puts) {
-		ret = console_dev->console_puts(str, len);
-	} else {
-		for (i = 0; i < len; i++)
-			sbi_putc(str[i]);
-		ret = len;
-	}
+	ret = nputs(str, len);
 	spin_unlock(&console_out_lock);
 
 	return ret;
@@ -225,12 +236,30 @@ static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 
 static int print(char **out, u32 *out_len, const char *format, va_list args)
 {
-	int width, flags;
-	int pc = 0;
-	char scr[2];
+	int width, flags, pc = 0;
+	char scr[2], *tout;
+	bool use_tbuf = (!out) ? true : false;
 	unsigned long long tmp;
 
+	/*
+	 * The console_tbuf is protected by console_out_lock and
+	 * print() is always called with console_out_lock held
+	 * when out == NULL.
+	 */
+	if (use_tbuf) {
+		console_tbuf_len = CONSOLE_TBUF_MAX;
+		tout = console_tbuf;
+		out = &tout;
+		out_len = &console_tbuf_len;
+	}
+
 	for (; *format != 0; ++format) {
+		if (use_tbuf && !console_tbuf_len) {
+			nputs_all(console_tbuf, CONSOLE_TBUF_MAX);
+			console_tbuf_len = CONSOLE_TBUF_MAX;
+			tout = console_tbuf;
+		}
+
 		if (*format == '%') {
 			++format;
 			width = flags = 0;
@@ -356,6 +385,9 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 		}
 	}
 
+	if (use_tbuf && console_tbuf_len < CONSOLE_TBUF_MAX)
+		nputs_all(console_tbuf, CONSOLE_TBUF_MAX - console_tbuf_len);
+
 	return pc;
 }
 

From 321293c6443ea55e2fcb17975ebc498dcbcb7290 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Thu, 23 Feb 2023 18:40:06 +0800
Subject: [PATCH 1202/1765] lib: utils/fdt: Fix fdt_pmu.c header dependency

The code calls sbi_scratch_thishart_ptr() from sbi_scratch.h which
is not directly included. Fix such dependency.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_pmu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 4829f2127ac..83301bb5c1a 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_pmu.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
 #define FDT_PMU_HW_EVENT_MAX (SBI_PMU_HW_EVENT_MAX * 2)

From aafcc90a875b58b883275522fb63d9b19964c851 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Thu, 23 Feb 2023 18:40:07 +0800
Subject: [PATCH 1203/1765] platform: generic/allwinner: Fix sun20i-d1.c header
 dependency

The code calls various macros from riscv_asm.h and sbi_scratch.h
which are not directly included. Fix such dependency.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 295c1593db1..0f0a9f347a6 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -6,12 +6,14 @@
 
 #include <platform_override.h>
 #include <thead_c9xx.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_pmu.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip_plic.h>

From 745aaecc64dcae0cfb7e40702a173100af94d582 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Thu, 23 Feb 2023 18:40:08 +0800
Subject: [PATCH 1204/1765] platform: generic/andes: Fix ae350.c header
 dependency

The code calls various macros from riscv_asm.h which is not directly
included. Fix such dependency.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/ae350.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 89f5b74af71..01bd02d5b96 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -11,6 +11,7 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/sys/atcsmu.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hsm.h>

From 99d09b601eb3809a4cc2aa409da34bc4fe32f67f Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Thu, 23 Feb 2023 18:40:09 +0800
Subject: [PATCH 1205/1765] include: fdt/fdt_helper: Change fdt_get_address()
 to return root.next_arg1

In sbi_domain_finalize(), when locating the coldboot hart's domain,
the coldboot hart's scratch->arg1 will be overwritten by the domain
configuration. However scratch->arg1 holds the FDT address of the
coldboot hart, and is still being accessed by fdt_get_address() in
later boot process. scratch->arg1 could then contain completely
garbage and lead to a crash.

To fix this, we change fdt_get_address() to return root domain's
next_arg1 as the FDT pointer.

Resolves: https://github.com/riscv-software-src/opensbi/issues/281
Fixes: b1678af210dc ("lib: sbi: Add initial domain support")
Reported-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 09f3095d0d9..39d7f3a01d8 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -11,7 +11,7 @@
 #define __FDT_HELPER_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_domain.h>
 
 struct fdt_match {
 	const char *compatible;
@@ -109,7 +109,7 @@ int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 
 static inline void *fdt_get_address(void)
 {
-	return sbi_scratch_thishart_arg1_ptr();
+	return (void *)root.next_arg1;
 }
 
 #endif /* __FDT_HELPER_H__ */

From 6861ee996ce5b1f2017ca7a9b0342f9cd9462917 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 21 Feb 2023 13:07:07 +0800
Subject: [PATCH 1206/1765] lib: utils: fdt_fixup: Fix compile error

When building with GCC-10 or older versions, it throws the following
error:

 CC-DEP    platform/generic/lib/utils/fdt/fdt_fixup.dep
 CC        platform/generic/lib/utils/fdt/fdt_fixup.o
lib/utils/fdt/fdt_fixup.c: In function 'fdt_reserved_memory_fixup':
lib/utils/fdt/fdt_fixup.c:376:2: error: label at end of compound statement
  376 |  next_entry:
      |  ^~~~~~~~~~

Remove the goto statement.

Resolves: https://github.com/riscv-software-src/opensbi/issues/288

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
---
 lib/utils/fdt/fdt_fixup.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 619e4f5cbaf..c10179b900c 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -361,19 +361,22 @@ int fdt_reserved_memory_fixup(void *fdt)
 			return SBI_ENOSPC;
 		}
 
+		bool overlap = false;
 		addr = reg->base;
 		for (j = 0; j < i; j++) {
 			if (addr == filtered_base[j]
 			    && filtered_order[j] < reg->order) {
+				overlap = true;
 				filtered_order[j] = reg->order;
-				goto next_entry;
+				break;
 			}
 		}
 
-		filtered_base[i] = reg->base;
-		filtered_order[i] = reg->order;
-		i++;
-	next_entry:
+		if (!overlap) {
+			filtered_base[i] = reg->base;
+			filtered_order[i] = reg->order;
+			i++;
+		}
 	}
 
 	for (j = 0; j < i; j++) {

From 4f2be401025d7f5095dd2a4d2acad0fa60ef15e0 Mon Sep 17 00:00:00 2001
From: Shengyu Qu <wiagn233@outlook.com>
Date: Thu, 16 Feb 2023 02:26:28 +0800
Subject: [PATCH 1207/1765] docs: fix typo in fw.md

In docs/firmware/fw.md, there's a configuration parameter called
FW_TEXT_ADDR, which actually should be FW_TEXT_START, so fix it.

Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 18faaa9e27e..38351c84a54 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -61,7 +61,7 @@ Firmware Configuration and Compilation
 All firmware types support the following common compile time configuration
 parameters:
 
-* **FW_TEXT_ADDR** - Defines the execution address of the OpenSBI firmware.
+* **FW_TEXT_START** - Defines the execution address of the OpenSBI firmware.
   This configuration parameter is mandatory.
 * **FW_FDT_PATH** - Path to an external flattened device tree binary file to
   be embedded in the *.rodata* section of the final firmware. If this option

From 30ea8069f4c704e67017215f90f74b8588ee9bdf Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon.chen@sifive.com>
Date: Fri, 10 Feb 2023 16:52:38 +0800
Subject: [PATCH 1208/1765] lib: sbi_hart: Enable hcontext and scontext

According to the description in "riscv-state-enable[0]", to access
h/scontext in S-Mode, we need to enable the 57th bit.

If it is not enabled, an "illegal instruction" error will occur.

Link: https://github.com/riscv/riscv-state-enable/blob/a28bfae443f350d5b4c42874f428367d5b322ffe/content.adoc [0]

Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 2 ++
 lib/sbi/sbi_hart.c           | 1 +
 2 files changed, 3 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index b0f08c87676..4ebed97ab0a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -736,6 +736,8 @@
 #define SMSTATEEN0_CS			(_ULL(1) << SMSTATEEN0_CS_SHIFT)
 #define SMSTATEEN0_FCSR_SHIFT		1
 #define SMSTATEEN0_FCSR			(_ULL(1) << SMSTATEEN0_FCSR_SHIFT)
+#define SMSTATEEN0_CONTEXT_SHIFT	57
+#define SMSTATEEN0_CONTEXT		(_ULL(1) << SMSTATEEN0_CONTEXT_SHIFT)
 #define SMSTATEEN0_IMSIC_SHIFT		58
 #define SMSTATEEN0_IMSIC		(_ULL(1) << SMSTATEEN0_IMSIC_SHIFT)
 #define SMSTATEEN0_AIA_SHIFT		59
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 02ce99191cd..5e06918c7a4 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -90,6 +90,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		mstateen_val |= ((uint64_t)csr_read(CSR_MSTATEEN0H)) << 32;
 #endif
 		mstateen_val |= SMSTATEEN_STATEN;
+		mstateen_val |= SMSTATEEN0_CONTEXT;
 		mstateen_val |= SMSTATEEN0_HSENVCFG;
 
 		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA))

From 81adc62f45c0baf13112358164a327197e70a7af Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 13 Feb 2023 10:20:30 +0530
Subject: [PATCH 1209/1765] lib: sbi: Align SBI vendor extension id with
 mvendorid CSR

As-per the SBI specification, the lower 24bits of the SBI vendor
extension id is same as lower 24bits of the mvendorid CSR.

We update the SBI vendor extension id checking based on above.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_platform.h                   | 17 ++++++++---------
 lib/sbi/sbi_ecall_vendor.c                   | 19 +++++++++++++++++--
 platform/generic/include/platform_override.h |  1 -
 platform/generic/platform.c                  | 19 ++++++-------------
 4 files changed, 31 insertions(+), 25 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 43d1c031ed7..3a629a69038 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -126,8 +126,8 @@ struct sbi_platform_operations {
 	/** Exit platform timer for current HART */
 	void (*timer_exit)(void);
 
-	/** platform specific SBI extension implementation probe function */
-	int (*vendor_ext_check)(long extid);
+	/** Check if SBI vendor extension is implemented or not */
+	bool (*vendor_ext_check)(void);
 	/** platform specific SBI extension implementation provider */
 	int (*vendor_ext_provider)(long extid, long funcid,
 				   const struct sbi_trap_regs *regs,
@@ -636,20 +636,19 @@ static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
 }
 
 /**
- * Check if a vendor extension is implemented or not.
+ * Check if SBI vendor extension is implemented or not.
  *
  * @param plat pointer to struct sbi_platform
- * @param extid	vendor SBI extension id
  *
- * @return 0 if extid is not implemented and 1 if implemented
+ * @return false if not implemented and true if implemented
  */
-static inline int sbi_platform_vendor_ext_check(const struct sbi_platform *plat,
-						long extid)
+static inline bool sbi_platform_vendor_ext_check(
+					const struct sbi_platform *plat)
 {
 	if (plat && sbi_platform_ops(plat)->vendor_ext_check)
-		return sbi_platform_ops(plat)->vendor_ext_check(extid);
+		return sbi_platform_ops(plat)->vendor_ext_check();
 
-	return 0;
+	return false;
 }
 
 /**
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 9252829633a..9ea5156ba10 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -13,12 +13,23 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_trap.h>
+#include <sbi/riscv_asm.h>
+
+static inline unsigned long sbi_ecall_vendor_id(void)
+{
+	return SBI_EXT_VENDOR_START +
+		(csr_read(CSR_MVENDORID) &
+		 (SBI_EXT_VENDOR_END - SBI_EXT_VENDOR_START));
+}
 
 static int sbi_ecall_vendor_probe(unsigned long extid,
 				  unsigned long *out_val)
 {
-	*out_val = sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr(),
-						 extid);
+	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()) ||
+	    extid != sbi_ecall_vendor_id())
+		*out_val = 0;
+	else
+		*out_val = 1;
 	return 0;
 }
 
@@ -27,6 +38,10 @@ static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
+	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()) ||
+	    extid != sbi_ecall_vendor_id())
+		return SBI_ERR_NOT_SUPPORTED;
+
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
 						extid, funcid, regs,
 						out_val, out_trap);
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index a59b06a11d8..350c3811fae 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -27,7 +27,6 @@ struct platform_override {
 	int (*extensions_init)(const struct fdt_match *match,
 			       struct sbi_hart_features *hfeatures);
 	void (*fw_init)(void *fdt, const struct fdt_match *match);
-	int (*vendor_ext_check)(long extid, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long extid, long funcid,
 				   const struct sbi_trap_regs *regs,
 				   unsigned long *out_value,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index a34d3b01933..88c3ec7e3ab 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -180,13 +180,10 @@ static int generic_final_init(bool cold_boot)
 	return 0;
 }
 
-static int generic_vendor_ext_check(long extid)
+static bool generic_vendor_ext_check(void)
 {
-	if (generic_plat && generic_plat->vendor_ext_check)
-		return generic_plat->vendor_ext_check(extid,
-						      generic_plat_match);
-
-	return 0;
+	return (generic_plat && generic_plat->vendor_ext_provider) ?
+		true : false;
 }
 
 static int generic_vendor_ext_provider(long extid, long funcid,
@@ -194,13 +191,9 @@ static int generic_vendor_ext_provider(long extid, long funcid,
 				       unsigned long *out_value,
 				       struct sbi_trap_info *out_trap)
 {
-	if (generic_plat && generic_plat->vendor_ext_provider) {
-		return generic_plat->vendor_ext_provider(extid, funcid, regs,
-							 out_value, out_trap,
-							 generic_plat_match);
-	}
-
-	return SBI_ENOTSUPP;
+	return generic_plat->vendor_ext_provider(extid, funcid, regs,
+						 out_value, out_trap,
+						 generic_plat_match);
 }
 
 static void generic_early_exit(void)

From 31b82e0d5046dda92d5d393d66455545763b99c9 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 13 Feb 2023 10:39:06 +0530
Subject: [PATCH 1210/1765] include: sbi: Remove extid parameter from
 vendor_ext_provider() callback

The extid parameter of vendor_ext_provider() is redundant so let us
remove it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_platform.h                   | 9 ++++-----
 lib/sbi/sbi_ecall_vendor.c                   | 2 +-
 platform/generic/include/platform_override.h | 2 +-
 platform/generic/platform.c                  | 4 ++--
 4 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 3a629a69038..546c0a61acb 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -129,7 +129,7 @@ struct sbi_platform_operations {
 	/** Check if SBI vendor extension is implemented or not */
 	bool (*vendor_ext_check)(void);
 	/** platform specific SBI extension implementation provider */
-	int (*vendor_ext_provider)(long extid, long funcid,
+	int (*vendor_ext_provider)(long funcid,
 				   const struct sbi_trap_regs *regs,
 				   unsigned long *out_value,
 				   struct sbi_trap_info *out_trap);
@@ -655,7 +655,6 @@ static inline bool sbi_platform_vendor_ext_check(
  * Invoke platform specific vendor SBI extension implementation.
  *
  * @param plat pointer to struct sbi_platform
- * @param extid	vendor SBI extension id
  * @param funcid SBI function id within the extension id
  * @param regs pointer to trap registers passed by the caller
  * @param out_value output value that can be filled by the callee
@@ -665,14 +664,14 @@ static inline bool sbi_platform_vendor_ext_check(
  */
 static inline int sbi_platform_vendor_ext_provider(
 					const struct sbi_platform *plat,
-					long extid, long funcid,
+					long funcid,
 					const struct sbi_trap_regs *regs,
 					unsigned long *out_value,
 					struct sbi_trap_info *out_trap)
 {
 	if (plat && sbi_platform_ops(plat)->vendor_ext_provider) {
-		return sbi_platform_ops(plat)->vendor_ext_provider(extid,
-								funcid, regs,
+		return sbi_platform_ops(plat)->vendor_ext_provider(funcid,
+								regs,
 								out_value,
 								out_trap);
 	}
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 9ea5156ba10..8b8dab00c92 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -43,7 +43,7 @@ static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 		return SBI_ERR_NOT_SUPPORTED;
 
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
-						extid, funcid, regs,
+						funcid, regs,
 						out_val, out_trap);
 }
 
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 350c3811fae..0d9e5ee6b40 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -27,7 +27,7 @@ struct platform_override {
 	int (*extensions_init)(const struct fdt_match *match,
 			       struct sbi_hart_features *hfeatures);
 	void (*fw_init)(void *fdt, const struct fdt_match *match);
-	int (*vendor_ext_provider)(long extid, long funcid,
+	int (*vendor_ext_provider)(long funcid,
 				   const struct sbi_trap_regs *regs,
 				   unsigned long *out_value,
 				   struct sbi_trap_info *out_trap,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 88c3ec7e3ab..0b90fd7c144 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -186,12 +186,12 @@ static bool generic_vendor_ext_check(void)
 		true : false;
 }
 
-static int generic_vendor_ext_provider(long extid, long funcid,
+static int generic_vendor_ext_provider(long funcid,
 				       const struct sbi_trap_regs *regs,
 				       unsigned long *out_value,
 				       struct sbi_trap_info *out_trap)
 {
-	return generic_plat->vendor_ext_provider(extid, funcid, regs,
+	return generic_plat->vendor_ext_provider(funcid, regs,
 						 out_value, out_trap,
 						 generic_plat_match);
 }

From c10095132aca1711a485fb25865237e0e768341c Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Mon, 13 Feb 2023 21:51:09 +0000
Subject: [PATCH 1211/1765] platform: generic: renesas: rzfive: Add support to
 configure the PMA

I/O Coherence Port (IOCP) provides an AXI interface for connecting
external non-caching masters, such as DMA controllers. The accesses
from IOCP are coherent with D-Caches and L2 Cache.

IOCP is a specification option and is disabled on the Renesas RZ/Five
SoC due to this reason IP blocks using DMA will fail.

The Andes AX45MP core has a Programmable Physical Memory Attributes (PMA)
block that allows dynamic adjustment of memory attributes in the runtime.
It contains a configurable amount of PMA entries implemented as CSR
registers to control the attributes of memory locations in interest.
Below are the memory attributes supported:
* Device, Non-bufferable
* Device, bufferable
* Memory, Non-cacheable, Non-bufferable
* Memory, Non-cacheable, Bufferable
* Memory, Write-back, No-allocate
* Memory, Write-back, Read-allocate
* Memory, Write-back, Write-allocate
* Memory, Write-back, Read and Write-allocate

More info about PMA (section 10.3):
Link: http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf

As a workaround for SoCs with IOCP disabled CMO needs to be handled by
software. Firstly OpenSBI configures the memory region as
"Memory, Non-cacheable, Bufferable" and passes this region as a global
shared dma pool as a DT node. With DMA_GLOBAL_POOL enabled all DMA
allocations happen from this region and synchronization callbacks are
implemented to synchronize when doing DMA transactions.

Example PMA region passed as a DT node from OpenSBI:
    reserved-memory {
        #address-cells = <2>;
        #size-cells = <2>;
        ranges;

        pma_resv0@58000000 {
            compatible = "shared-dma-pool";
            reg = <0x0 0x58000000 0x0 0x08000000>;
            no-map;
            linux,dma-default;
        };
    };

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                     |   2 +
 platform/generic/andes/Kconfig               |   5 +
 platform/generic/andes/andes45-pma.c         | 350 +++++++++++++++++++
 platform/generic/andes/objects.mk            |   2 +
 platform/generic/include/andes/andes45_pma.h |  48 +++
 5 files changed, 407 insertions(+)
 create mode 100644 platform/generic/andes/Kconfig
 create mode 100644 platform/generic/andes/andes45-pma.c
 create mode 100644 platform/generic/include/andes/andes45_pma.h

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index c7f198aee84..39fb4e90d7f 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -50,4 +50,6 @@ config PLATFORM_STARFIVE_JH7110
 	bool "StarFive JH7110 support"
 	default n
 
+source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
+
 endif
diff --git a/platform/generic/andes/Kconfig b/platform/generic/andes/Kconfig
new file mode 100644
index 00000000000..3ad4e4ca56f
--- /dev/null
+++ b/platform/generic/andes/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config ANDES45_PMA
+	bool "Andes PMA support"
+	default n
diff --git a/platform/generic/andes/andes45-pma.c b/platform/generic/andes/andes45-pma.c
new file mode 100644
index 00000000000..2745bc3a998
--- /dev/null
+++ b/platform/generic/andes/andes45-pma.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ *
+ * Copyright (c) 2020 Andes Technology Corporation
+ *
+ * Authors:
+ *      Nick Hu <nickhu@andestech.com>
+ *      Nylon Chen <nylon7@andestech.com>
+ *      Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
+ */
+
+#include <andes/andes45_pma.h>
+#include <libfdt.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+/* Configuration Registers */
+#define ANDES45_CSR_MMSC_CFG		0xFC2
+#define ANDES45_CSR_MMSC_PPMA_OFFSET	(1 << 30)
+
+#define ANDES45_PMAADDR_0		0xBD0
+
+#define ANDES45_PMACFG_0		0xBC0
+
+static inline unsigned long andes45_pma_read_cfg(unsigned int pma_cfg_off)
+{
+#define switchcase_pma_cfg_read(__pma_cfg_off, __val)		\
+	case __pma_cfg_off:					\
+		__val = csr_read(__pma_cfg_off);		\
+		break;
+#define switchcase_pma_cfg_read_2(__pma_cfg_off, __val)		\
+	switchcase_pma_cfg_read(__pma_cfg_off + 0, __val)	\
+	switchcase_pma_cfg_read(__pma_cfg_off + 2, __val)
+
+	unsigned long ret = 0;
+
+	switch (pma_cfg_off) {
+	switchcase_pma_cfg_read_2(ANDES45_PMACFG_0, ret)
+
+	default:
+		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
+		break;
+	}
+
+	return ret;
+
+#undef switchcase_pma_cfg_read_2
+#undef switchcase_pma_cfg_read
+}
+
+static inline void andes45_pma_write_cfg(unsigned int pma_cfg_off, unsigned long val)
+{
+#define switchcase_pma_cfg_write(__pma_cfg_off, __val)		\
+	case __pma_cfg_off:					\
+		csr_write(__pma_cfg_off, __val);		\
+		break;
+#define switchcase_pma_cfg_write_2(__pma_cfg_off, __val)	\
+	switchcase_pma_cfg_write(__pma_cfg_off + 0, __val)	\
+	switchcase_pma_cfg_write(__pma_cfg_off + 2, __val)
+
+	switch (pma_cfg_off) {
+	switchcase_pma_cfg_write_2(ANDES45_PMACFG_0, val)
+
+	default:
+		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
+		break;
+	}
+
+#undef switchcase_pma_cfg_write_2
+#undef switchcase_pma_cfg_write
+}
+
+static inline void andes45_pma_write_addr(unsigned int pma_addr_off, unsigned long val)
+{
+#define switchcase_pma_write(__pma_addr_off, __val)		\
+	case __pma_addr_off:					\
+		csr_write(__pma_addr_off, __val);		\
+		break;
+#define switchcase_pma_write_2(__pma_addr_off, __val)		\
+	switchcase_pma_write(__pma_addr_off + 0, __val)		\
+	switchcase_pma_write(__pma_addr_off + 1, __val)
+#define switchcase_pma_write_4(__pma_addr_off, __val)		\
+	switchcase_pma_write_2(__pma_addr_off + 0, __val)	\
+	switchcase_pma_write_2(__pma_addr_off + 2, __val)
+#define switchcase_pma_write_8(__pma_addr_off, __val)		\
+	switchcase_pma_write_4(__pma_addr_off + 0, __val)	\
+	switchcase_pma_write_4(__pma_addr_off + 4, __val)
+#define switchcase_pma_write_16(__pma_addr_off, __val)		\
+	switchcase_pma_write_8(__pma_addr_off + 0, __val)	\
+	switchcase_pma_write_8(__pma_addr_off + 8, __val)
+
+	switch (pma_addr_off) {
+	switchcase_pma_write_16(ANDES45_PMAADDR_0, val)
+
+	default:
+		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
+		break;
+	}
+
+#undef switchcase_pma_write_16
+#undef switchcase_pma_write_8
+#undef switchcase_pma_write_4
+#undef switchcase_pma_write_2
+#undef switchcase_pma_write
+}
+
+static inline unsigned long andes45_pma_read_addr(unsigned int pma_addr_off)
+{
+#define switchcase_pma_read(__pma_addr_off, __val)		\
+	case __pma_addr_off:					\
+		__val = csr_read(__pma_addr_off);		\
+		break;
+#define switchcase_pma_read_2(__pma_addr_off, __val)		\
+	switchcase_pma_read(__pma_addr_off + 0, __val)		\
+	switchcase_pma_read(__pma_addr_off + 1, __val)
+#define switchcase_pma_read_4(__pma_addr_off, __val)		\
+	switchcase_pma_read_2(__pma_addr_off + 0, __val)	\
+	switchcase_pma_read_2(__pma_addr_off + 2, __val)
+#define switchcase_pma_read_8(__pma_addr_off, __val)		\
+	switchcase_pma_read_4(__pma_addr_off + 0, __val)	\
+	switchcase_pma_read_4(__pma_addr_off + 4, __val)
+#define switchcase_pma_read_16(__pma_addr_off, __val)		\
+	switchcase_pma_read_8(__pma_addr_off + 0, __val)	\
+	switchcase_pma_read_8(__pma_addr_off + 8, __val)
+
+	unsigned long ret = 0;
+
+	switch (pma_addr_off) {
+	switchcase_pma_read_16(ANDES45_PMAADDR_0, ret)
+
+	default:
+		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
+		break;
+	}
+
+	return ret;
+
+#undef switchcase_pma_read_16
+#undef switchcase_pma_read_8
+#undef switchcase_pma_read_4
+#undef switchcase_pma_read_2
+#undef switchcase_pma_read
+}
+
+static unsigned long
+andes45_pma_setup(const struct andes45_pma_region *pma_region,
+		  unsigned int entry_id)
+{
+	unsigned long size = pma_region->size;
+	unsigned long addr = pma_region->pa;
+	unsigned int pma_cfg_addr;
+	unsigned long pmacfg_val;
+	unsigned long pmaaddr;
+	char *pmaxcfg;
+
+	/* Check for 4KiB granularity */
+	if (size < (1 << 12))
+		return SBI_EINVAL;
+
+	/* Check size is power of 2 */
+	if (size & (size - 1))
+		return SBI_EINVAL;
+
+	if (entry_id > 15)
+		return SBI_EINVAL;
+
+	if (!(pma_region->flags & ANDES45_PMACFG_ETYP_NAPOT))
+		return SBI_EINVAL;
+
+	if ((addr & (size - 1)) != 0)
+		return SBI_EINVAL;
+
+	pma_cfg_addr = entry_id / 8 ? ANDES45_PMACFG_0 + 2 : ANDES45_PMACFG_0;
+	pmacfg_val = andes45_pma_read_cfg(pma_cfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
+	*pmaxcfg = 0;
+	*pmaxcfg = pma_region->flags;
+
+	andes45_pma_write_cfg(pma_cfg_addr, pmacfg_val);
+
+	pmaaddr = (addr >> 2) + (size >> 3) - 1;
+
+	andes45_pma_write_addr(ANDES45_PMAADDR_0 + entry_id, pmaaddr);
+
+	return andes45_pma_read_addr(ANDES45_PMAADDR_0 + entry_id) == pmaaddr ?
+			pmaaddr : SBI_EINVAL;
+}
+
+static int andes45_fdt_pma_resv(void *fdt, const struct andes45_pma_region *pma,
+				unsigned int index, int parent)
+{
+	int na = fdt_address_cells(fdt, 0);
+	int ns = fdt_size_cells(fdt, 0);
+	static bool dma_default = false;
+	fdt32_t addr_high, addr_low;
+	fdt32_t size_high, size_low;
+	int subnode, err;
+	fdt32_t reg[4];
+	fdt32_t *val;
+	char name[32];
+
+	addr_high = (u64)pma->pa >> 32;
+	addr_low = pma->pa;
+	size_high = (u64)pma->size >> 32;
+	size_low = pma->size;
+
+	if (na > 1 && addr_high)
+		sbi_snprintf(name, sizeof(name),
+			     "pma_resv%d@%x,%x", index,
+			     addr_high, addr_low);
+	else
+		sbi_snprintf(name, sizeof(name),
+			     "pma_resv%d@%x", index,
+			     addr_low);
+
+	subnode = fdt_add_subnode(fdt, parent, name);
+	if (subnode < 0)
+		return subnode;
+
+	if (pma->shared_dma) {
+		err = fdt_setprop_string(fdt, subnode, "compatible", "shared-dma-pool");
+		if (err < 0)
+			return err;
+	}
+
+	if (pma->no_map) {
+		err = fdt_setprop_empty(fdt, subnode, "no-map");
+		if (err < 0)
+			return err;
+	}
+
+	/* Linux allows single linux,dma-default region. */
+	if (pma->dma_default) {
+		if (dma_default)
+			return SBI_EINVAL;
+
+		err = fdt_setprop_empty(fdt, subnode, "linux,dma-default");
+		if (err < 0)
+			return err;
+		dma_default = true;
+	}
+
+	/* encode the <reg> property value */
+	val = reg;
+	if (na > 1)
+		*val++ = cpu_to_fdt32(addr_high);
+	*val++ = cpu_to_fdt32(addr_low);
+	if (ns > 1)
+		*val++ = cpu_to_fdt32(size_high);
+	*val++ = cpu_to_fdt32(size_low);
+
+	err = fdt_setprop(fdt, subnode, "reg", reg,
+			  (na + ns) * sizeof(fdt32_t));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+static int andes45_fdt_reserved_memory_fixup(void *fdt,
+					     const struct andes45_pma_region *pma,
+					     unsigned int entry)
+{
+	int parent;
+
+	/* try to locate the reserved memory node */
+	parent = fdt_path_offset(fdt, "/reserved-memory");
+	if (parent < 0) {
+		int na = fdt_address_cells(fdt, 0);
+		int ns = fdt_size_cells(fdt, 0);
+		int err;
+
+		/* if such node does not exist, create one */
+		parent = fdt_add_subnode(fdt, 0, "reserved-memory");
+		if (parent < 0)
+			return parent;
+
+		err = fdt_setprop_empty(fdt, parent, "ranges");
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#size-cells", ns);
+		if (err < 0)
+			return err;
+
+		err = fdt_setprop_u32(fdt, parent, "#address-cells", na);
+		if (err < 0)
+			return err;
+	}
+
+	return andes45_fdt_pma_resv(fdt, pma, entry, parent);
+}
+
+int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
+			      unsigned int pma_regions_count)
+{
+	unsigned long mmsc = csr_read(ANDES45_CSR_MMSC_CFG);
+	unsigned int dt_populate_cnt;
+	unsigned int i, j;
+	unsigned long pa;
+	void *fdt;
+	int ret;
+
+	if (!pma_regions || !pma_regions_count)
+		return 0;
+
+	if (pma_regions_count > ANDES45_MAX_PMA_REGIONS)
+		return SBI_EINVAL;
+
+	if ((mmsc & ANDES45_CSR_MMSC_PPMA_OFFSET) == 0)
+		return SBI_ENOTSUPP;
+
+	/* Configure the PMA regions */
+	for (i = 0; i < pma_regions_count; i++) {
+		pa = andes45_pma_setup(&pma_regions[i], i);
+		if (pa == SBI_EINVAL)
+			return SBI_EINVAL;
+	}
+
+	dt_populate_cnt = 0;
+	for (i = 0; i < pma_regions_count; i++) {
+		if (!pma_regions[i].dt_populate)
+			continue;
+		dt_populate_cnt++;
+	}
+
+	if (!dt_populate_cnt)
+		return 0;
+
+	fdt = fdt_get_address();
+
+	ret = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + (64 * dt_populate_cnt));
+	if (ret < 0)
+		return ret;
+
+	for (i = 0, j = 0; i < pma_regions_count; i++) {
+		if (!pma_regions[i].dt_populate)
+			continue;
+
+		ret = andes45_fdt_reserved_memory_fixup(fdt, &pma_regions[i], j++);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index 28275efbccf..ea6b561953e 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -4,3 +4,5 @@
 
 carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
 platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
+
+platform-objs-$(CONFIG_ANDES45_PMA) += andes/andes45-pma.o
diff --git a/platform/generic/include/andes/andes45_pma.h b/platform/generic/include/andes/andes45_pma.h
new file mode 100644
index 00000000000..37ec77cf670
--- /dev/null
+++ b/platform/generic/include/andes/andes45_pma.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+#ifndef _ANDES45_PMA_H_
+#define _ANDES45_PMA_H_
+
+#include <sbi/sbi_types.h>
+
+#define ANDES45_MAX_PMA_REGIONS			16
+
+/* Naturally aligned power of 2 region */
+#define ANDES45_PMACFG_ETYP_NAPOT		3
+
+/* Memory, Non-cacheable, Bufferable */
+#define ANDES45_PMACFG_MTYP_MEM_NON_CACHE_BUF	(3 << 2)
+
+/**
+ * struct andes45_pma_region - Describes PMA regions
+ *
+ * @pa: Address to be configured in the PMA
+ * @size: Size of the region
+ * @flags: Flags to be set for the PMA region
+ * @dt_populate: Boolean flag indicating if the DT entry should be
+ *               populated for the given PMA region
+ * @shared_dma: Boolean flag if set "shared-dma-pool" property will
+ *              be set in the DT node
+ * @no_map: Boolean flag if set "no-map" property will be set in the
+ *          DT node
+ * @dma_default: Boolean flag if set "linux,dma-default" property will
+ *              be set in the DT node. Note Linux expects single node
+ *              with this property set.
+ */
+struct andes45_pma_region {
+	unsigned long pa;
+	unsigned long size;
+	u8 flags:7;
+	bool dt_populate;
+	bool shared_dma;
+	bool no_map;
+	bool dma_default;
+};
+
+int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
+			      unsigned int pma_regions_count);
+
+#endif /* _ANDES45_PMA_H_ */

From 2491242282b4e3bb0617f41dfb667ca9a8241c0a Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Mon, 13 Feb 2023 21:51:10 +0000
Subject: [PATCH 1212/1765] platform: generic: renesas: rzfive: Configure the
 PMA region

On the Renesas RZ/Five SoC by default we want to configure 128MiB of memory
ranging from 0x58000000 as a non-cacheable + bufferable region in the PMA
and populate this region as PMA reserve DT node with shared DMA pool and
no-map flags set so that Linux drivers requesting any DMA'able memory go
through this region.

PMA node passed to the above stack:

        reserved-memory {
            #address-cells = <2>;
            #size-cells = <2>;
            ranges;

            pma_resv0@58000000 {
                compatible = "shared-dma-pool";
                reg = <0x0 0x58000000 0x0 0x08000000>;
                no-map;
                linux,dma-default;
            };
        };

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                 |  1 +
 platform/generic/renesas/rzfive/rzfive.c | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 39fb4e90d7f..1f4f8e1f340 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -35,6 +35,7 @@ config PLATFORM_ANDES_AE350
 
 config PLATFORM_RENESAS_RZFIVE
 	bool "Renesas RZ/Five support"
+	select ANDES45_PMA
 	default n
 
 config PLATFORM_SIFIVE_FU540
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index ee9c9c4eba9..4d71d0d6c22 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -4,10 +4,30 @@
  *
  */
 
+#include <andes/andes45_pma.h>
 #include <platform_override.h>
 #include <sbi/sbi_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
+static const struct andes45_pma_region renesas_rzfive_pma_regions[] = {
+	{
+		.pa = 0x58000000,
+		.size = 0x8000000,
+		.flags = ANDES45_PMACFG_ETYP_NAPOT |
+			 ANDES45_PMACFG_MTYP_MEM_NON_CACHE_BUF,
+		.dt_populate = true,
+		.shared_dma = true,
+		.no_map = true,
+		.dma_default = true,
+	},
+};
+
+static int renesas_rzfive_final_init(bool cold_boot, const struct fdt_match *match)
+{
+	return andes45_pma_setup_regions(renesas_rzfive_pma_regions,
+					 array_size(renesas_rzfive_pma_regions));
+}
+
 int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
 {
 	/*
@@ -34,4 +54,5 @@ static const struct fdt_match renesas_rzfive_match[] = {
 const struct platform_override renesas_rzfive = {
 	.match_table = renesas_rzfive_match,
 	.early_init = renesas_rzfive_early_init,
+	.final_init = renesas_rzfive_final_init,
 };

From 67b2a408924b466dcd659c70348043987401f0b1 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Wed, 22 Feb 2023 10:48:54 +0800
Subject: [PATCH 1213/1765] lib: sbi: sbi_ecall: Check the range of SBI error

We should also check if the return error code is greater than 0
(SBI_SUCCESS), as this is an invalid error.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 27ce5d49342..d0f01665368 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -120,7 +120,7 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 		trap.epc = regs->mepc;
 		sbi_trap_redirect(regs, &trap);
 	} else {
-		if (ret < SBI_LAST_ERR) {
+		if (ret < SBI_LAST_ERR || SBI_SUCCESS < ret) {
 			sbi_printf("%s: Invalid error %d for ext=0x%lx "
 				   "func=0x%lx\n", __func__, ret,
 				   extension_id, func_id);

From 5a75f5309c7544bbf7ef021bdeee0b0455af6d9b Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Fri, 24 Feb 2023 12:28:25 +0800
Subject: [PATCH 1214/1765] lib: sbi/sbi_domain: cosmetic style fixes

Minor updates to the comments for language and style fixes.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index dc825b0d95f..d2f58a28cbd 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -337,7 +337,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 	/*
 	 * Check next mode
 	 *
-	 * We only allow next mode to be S-mode or U-mode.so that we can
+	 * We only allow next mode to be S-mode or U-mode, so that we can
 	 * protect M-mode context and enforce checks on memory accesses.
 	 */
 	if (dom->next_mode != PRV_S &&
@@ -347,7 +347,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 		return SBI_EINVAL;
 	}
 
-	/* Check next address and next mode*/
+	/* Check next address and next mode */
 	if (!sbi_domain_check_addr(dom, dom->next_addr, dom->next_mode,
 				   SBI_DOMAIN_EXECUTE)) {
 		sbi_printf("%s: %s next booting stage address 0x%lx can't "

From bc06ff65bf97172d11d6c898291fe1b98e177715 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Fri, 24 Feb 2023 12:28:26 +0800
Subject: [PATCH 1215/1765] lib: utils/fdt/fdt_domain: Simplify region access
 permission check

The region access permission check in __fdt_parse_region() can be
simplified as masking SBI_DOMAIN_MEMREGION_{M,SU}_ACCESS_MASK is
enough.

While we are here, update the confusing comments to match the codes.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_domain.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 2b51a8ebe13..bc30010a888 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -244,13 +244,11 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 	 * access permissions. M-mode regions can only be part of
 	 * root domain.
 	 *
-	 * SU permission bits can't be all zeroes and M-mode permission
-	 * bits must be all set.
+	 * SU permission bits can't be all zeroes when M-mode permission
+	 * bits have at least one bit set.
 	 */
-	if (!((region_access & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK)
-	     & SBI_DOMAIN_MEMREGION_SU_RWX)
-	    && ((region_access & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK)
-		& SBI_DOMAIN_MEMREGION_M_RWX))
+	if (!(region_access & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK)
+	    && (region_access & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK))
 		return SBI_EINVAL;
 
 	/* Find next region of the domain */

From 17b3776c812921adcc527d542331b439b53c7b71 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Fri, 24 Feb 2023 12:28:27 +0800
Subject: [PATCH 1216/1765] docs: domain_support: Update the DT example

commit 3e2f573e707e ("lib: utils: Disallow non-root domains from adding M-mode regions")
added access permission check in __fdt_parse_region(). With the
existing DT example in the doc OpenSBI won't boot anymore.

Let's update the DT example so that it can work out of the box.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 4ccbcff8719..2a9ca3d70ea 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -254,7 +254,7 @@ be done:
             tdomain: trusted-domain {
                 compatible = "opensbi,domain,instance";
                 possible-harts = <&cpu0>;
-                regions = <&tmem 0x7>, <&tuart 0x7>;
+                regions = <&tmem 0x3f>, <&tuart 0x3f>;
                 boot-hart = <&cpu0>;
                 next-arg1 = <0x0 0x0>;
                 next-addr = <0x0 0x80100000>;
@@ -265,7 +265,7 @@ be done:
             udomain: untrusted-domain {
                 compatible = "opensbi,domain,instance";
                 possible-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
-                regions = <&tmem 0x0>, <&tuart 0x0>, <&allmem 0x7>;
+                regions = <&tmem 0x0>, <&tuart 0x0>, <&allmem 0x3f>;
             };
         };
     };

From 1364d5adb291ecf7471db571956545f592a5a615 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:30:56 +0100
Subject: [PATCH 1217/1765] lib: sbi_hsm: Factor out invalid state detection

Remove some redundant code by creating an invalid state detection
macro.

No functional change intended.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 65 +++++++++++++++++------------------------------
 1 file changed, 24 insertions(+), 41 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 8499bb1ddea..b71ee6ba4e8 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -26,6 +26,15 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_console.h>
 
+#define __sbi_hsm_hart_change_state(hdata, oldstate, newstate)		\
+({									\
+	long state = atomic_cmpxchg(&(hdata)->state, oldstate, newstate); \
+	if (state != (oldstate))					\
+		sbi_printf("%s: ERR: The hart is in invalid state [%lu]\n", \
+			   __func__, state);				\
+	state == (oldstate);						\
+})
+
 static const struct sbi_hsm_device *hsm_dev = NULL;
 static unsigned long hart_data_offset;
 
@@ -95,13 +104,11 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 {
-	u32 oldstate;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_START_PENDING,
-				  SBI_HSM_STATE_STARTED);
-	if (oldstate != SBI_HSM_STATE_START_PENDING)
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_START_PENDING,
+					 SBI_HSM_STATE_STARTED))
 		sbi_hart_hang();
 }
 
@@ -217,14 +224,12 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch)
 {
-	u32 hstate;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 
-	hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOP_PENDING,
-				SBI_HSM_STATE_STOPPED);
-	if (hstate != SBI_HSM_STATE_STOP_PENDING)
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_STOP_PENDING,
+					 SBI_HSM_STATE_STOPPED))
 		goto fail_exit;
 
 	if (hsm_device_has_hart_hotplug()) {
@@ -298,7 +303,6 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 {
-	int oldstate;
 	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
@@ -306,13 +310,9 @@ int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)
 	if (!dom)
 		return SBI_EFAIL;
 
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STARTED,
-				  SBI_HSM_STATE_STOP_PENDING);
-	if (oldstate != SBI_HSM_STATE_STARTED) {
-		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
-			   __func__, oldstate);
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_STARTED,
+					 SBI_HSM_STATE_STOP_PENDING))
 		return SBI_EFAIL;
-	}
 
 	if (exitnow)
 		sbi_exit(scratch);
@@ -362,36 +362,26 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 
 void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)
 {
-	int oldstate;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
 	/* If current HART was SUSPENDED then set RESUME_PENDING state */
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_SUSPENDED,
-			SBI_HSM_STATE_RESUME_PENDING);
-	if (oldstate != SBI_HSM_STATE_SUSPENDED) {
-		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
-			   __func__, oldstate);
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_SUSPENDED,
+					 SBI_HSM_STATE_RESUME_PENDING))
 		sbi_hart_hang();
-	}
 
 	hsm_device_hart_resume();
 }
 
 void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
 {
-	u32 oldstate;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
 	/* If current HART was RESUME_PENDING then set STARTED state */
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_RESUME_PENDING,
-				  SBI_HSM_STATE_STARTED);
-	if (oldstate != SBI_HSM_STATE_RESUME_PENDING) {
-		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
-			   __func__, oldstate);
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_RESUME_PENDING,
+					 SBI_HSM_STATE_STARTED))
 		sbi_hart_hang();
-	}
 
 	/*
 	 * Restore some of the M-mode CSRs which we are re-configured by
@@ -403,7 +393,7 @@ void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 			 ulong raddr, ulong rmode, ulong arg1)
 {
-	int oldstate, ret;
+	int ret;
 	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
@@ -437,11 +427,8 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	scratch->next_mode = rmode;
 
 	/* Directly move from STARTED to SUSPENDED state */
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STARTED,
-				  SBI_HSM_STATE_SUSPENDED);
-	if (oldstate != SBI_HSM_STATE_STARTED) {
-		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
-			   __func__, oldstate);
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_STARTED,
+					 SBI_HSM_STATE_SUSPENDED)) {
 		ret = SBI_EDENIED;
 		goto fail_restore_state;
 	}
@@ -484,13 +471,9 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	 * We might have successfully resumed from retentive suspend
 	 * or suspend failed. In both cases, we restore state of hart.
 	 */
-	oldstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_SUSPENDED,
-				  SBI_HSM_STATE_STARTED);
-	if (oldstate != SBI_HSM_STATE_SUSPENDED) {
-		sbi_printf("%s: ERR: The hart is in invalid state [%u]\n",
-			   __func__, oldstate);
+	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_SUSPENDED,
+					 SBI_HSM_STATE_STARTED))
 		sbi_hart_hang();
-	}
 
 	return ret;
 }

From 40f16a81d33d70b113645fc9dc5071a74267e613 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:30:57 +0100
Subject: [PATCH 1218/1765] lib: sbi_hsm: Don't try to restore state on failed
 change

When a state change fails there's no need to restore the original
state as it remains the same.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index b71ee6ba4e8..7ee4159256b 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -428,10 +428,8 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 
 	/* Directly move from STARTED to SUSPENDED state */
 	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_STARTED,
-					 SBI_HSM_STATE_SUSPENDED)) {
-		ret = SBI_EDENIED;
-		goto fail_restore_state;
-	}
+					 SBI_HSM_STATE_SUSPENDED))
+		return SBI_EDENIED;
 
 	/* Save the suspend type */
 	hdata->suspend_type = suspend_type;
@@ -466,7 +464,6 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 		jump_warmboot();
 	}
 
-fail_restore_state:
 	/*
 	 * We might have successfully resumed from retentive suspend
 	 * or suspend failed. In both cases, we restore state of hart.

From c88e039ec23c41ad0769c6714f60904f89fa3a5d Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:30:58 +0100
Subject: [PATCH 1219/1765] lib: sbi_hsm: Ensure errors are consistent with
 spec

HSM functions define when SBI_ERR_INVALID_PARAM should be returned.
Ensure it's not used for reasons that don't meet the definitions by
using the catch-all code, SBI_ERR_FAILED, for those reasons instead.
Also, in one case sbi_hart_suspend() may have returned SBI_ERR_DENIED,
which isn't defined for that function at all. Use SBI_ERR_FAILED for
that case too.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 7ee4159256b..3455520b8a9 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -402,7 +402,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 
 	/* Sanity check on domain assigned to current HART */
 	if (!dom)
-		return SBI_EINVAL;
+		return SBI_EFAIL;
 
 	/* Sanity check on suspend type */
 	if (SBI_HSM_SUSPEND_RET_DEFAULT < suspend_type &&
@@ -415,7 +415,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	/* Additional sanity check for non-retentive suspend */
 	if (suspend_type & SBI_HSM_SUSP_NON_RET_BIT) {
 		if (rmode != PRV_S && rmode != PRV_U)
-			return SBI_EINVAL;
+			return SBI_EFAIL;
 		if (dom && !sbi_domain_check_addr(dom, raddr, rmode,
 						  SBI_DOMAIN_EXECUTE))
 			return SBI_EINVALID_ADDR;
@@ -429,7 +429,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	/* Directly move from STARTED to SUSPENDED state */
 	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_STARTED,
 					 SBI_HSM_STATE_SUSPENDED))
-		return SBI_EDENIED;
+		return SBI_EFAIL;
 
 	/* Save the suspend type */
 	hdata->suspend_type = suspend_type;

From b1ae6ef33ba92fe7d85edd87656998330637ed7e Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:30:59 +0100
Subject: [PATCH 1220/1765] lib: sbi_hsm: Move misplaced comment

While non-retentive suspend is not allowed for M-mode, the comment
at the top of sbi_hsm_hart_suspend() implied suspend wasn't allowed
for M-mode at all. Move the comment above the mode check which is
inside a suspend type is non-retentive check.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 3455520b8a9..294156a9a7b 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -398,8 +398,6 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	/* For now, we only allow suspend from S-mode or U-mode. */
-
 	/* Sanity check on domain assigned to current HART */
 	if (!dom)
 		return SBI_EFAIL;
@@ -414,6 +412,10 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 
 	/* Additional sanity check for non-retentive suspend */
 	if (suspend_type & SBI_HSM_SUSP_NON_RET_BIT) {
+		/*
+		 * For now, we only allow non-retentive suspend from
+		 * S-mode or U-mode.
+		 */
 		if (rmode != PRV_S && rmode != PRV_U)
 			return SBI_EFAIL;
 		if (dom && !sbi_domain_check_addr(dom, raddr, rmode,

From 07673fc0633db82db939c0cf896c19ef0a7c548e Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:00 +0100
Subject: [PATCH 1221/1765] lib: sbi_hsm: Remove unnecessary include

Also remove a superfluous semicolon and add a blank line.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_hsm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 703a824493b..f1b41d073b2 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -12,7 +12,6 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_version.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/riscv_asm.h>
@@ -45,7 +44,8 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
-	};
+	}
+
 	if (ret >= 0) {
 		*out_val = ret;
 		ret = 0;

From 8a40306371b7e5dbe20da946edd0ddd9693bfa85 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:01 +0100
Subject: [PATCH 1222/1765] lib: sbi_hsm: Export some functions

A coming patch can make use of a few internal hsm functions if
we export them.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h |  4 ++++
 lib/sbi/sbi_hsm.c     | 12 ++++++++++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 1170127baa8..c0b483030de 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -69,9 +69,13 @@ void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch);
 void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch);
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 			 ulong raddr, ulong rmode, ulong arg1);
+bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
+			       long newstate);
+int __sbi_hsm_hart_get_state(u32 hartid);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask);
+void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch);
 void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
 
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 294156a9a7b..3eeeb586cbb 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -46,7 +46,15 @@ struct sbi_hsm_data {
 	unsigned long saved_mip;
 };
 
-static inline int __sbi_hsm_hart_get_state(u32 hartid)
+bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
+			       long newstate)
+{
+	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
+							    hart_data_offset);
+	return __sbi_hsm_hart_change_state(hdata, oldstate, newstate);
+}
+
+int __sbi_hsm_hart_get_state(u32 hartid)
 {
 	struct sbi_hsm_data *hdata;
 	struct sbi_scratch *scratch;
@@ -328,7 +336,7 @@ static int __sbi_hsm_suspend_default(struct sbi_scratch *scratch)
 	return 0;
 }
 
-static void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
+void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
 {
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);

From 73623a0acac7f62646757cdd5a03b325eba3e0c9 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:02 +0100
Subject: [PATCH 1223/1765] lib: sbi: Add system suspend skeleton

Add the SUSP extension probe and ecall support, but for now the
system suspend function is just a stub.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |  8 ++++++
 include/sbi/sbi_system.h          | 26 +++++++++++++++++
 lib/sbi/Kconfig                   |  4 +++
 lib/sbi/objects.mk                |  3 ++
 lib/sbi/sbi_ecall_susp.c          | 48 +++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c                |  4 +++
 lib/sbi/sbi_system.c              | 26 +++++++++++++++++
 7 files changed, 119 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_susp.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 9d6f4743651..4c378c3e7c3 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -30,6 +30,7 @@
 #define SBI_EXT_SRST				0x53525354
 #define SBI_EXT_PMU				0x504D55
 #define SBI_EXT_DBCN				0x4442434E
+#define SBI_EXT_SUSP				0x53555350
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -236,6 +237,13 @@ enum sbi_pmu_ctr_type {
 #define SBI_EXT_DBCN_CONSOLE_READ		0x1
 #define SBI_EXT_DBCN_CONSOLE_WRITE_BYTE		0x2
 
+/* SBI function IDs for SUSP extension */
+#define SBI_EXT_SUSP_SUSPEND			0x0
+
+#define SBI_SUSP_SLEEP_TYPE_SUSPEND		0x0
+#define SBI_SUSP_SLEEP_TYPE_LAST		SBI_SUSP_SLEEP_TYPE_SUSPEND
+#define SBI_SUSP_PLATFORM_SLEEP_START		0x80000000
+
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 84c281383d8..11d3d6fd9a6 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -43,4 +43,30 @@ bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason);
 
 void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason);
 
+/** System suspend device */
+struct sbi_system_suspend_device {
+	/** Name of the system suspend device */
+	char name[32];
+
+	/* Check whether sleep type is supported by the device */
+	int (*system_suspend_check)(u32 sleep_type);
+
+	/**
+	 * Suspend the system
+	 *
+	 * @sleep_type: The sleep type identifier passed to the SBI call.
+	 * @mmode_resume_addr:
+	 *     This is the same as sbi_scratch.warmboot_addr. Some platforms
+	 *     may not be able to return from system_suspend(), so they will
+	 *     jump directly to this address instead. Platforms which can
+	 *     return from system_suspend() may ignore this parameter.
+	 */
+	int (*system_suspend)(u32 sleep_type, unsigned long mmode_resume_addr);
+};
+
+const struct sbi_system_suspend_device *sbi_system_suspend_get_device(void);
+void sbi_system_suspend_set_device(struct sbi_system_suspend_device *dev);
+bool sbi_system_suspend_supported(u32 sleep_type);
+int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque);
+
 #endif
diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index ef6728bab3e..7eb3273d546 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -22,6 +22,10 @@ config SBI_ECALL_SRST
 	bool "System Reset extension"
 	default y
 
+config SBI_ECALL_SUSP
+	bool "System Suspend extension"
+	default y
+
 config SBI_ECALL_PMU
 	bool "Performance Monitoring Unit extension"
 	default y
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 319f38dce70..770238b25fa 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -34,6 +34,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_HSM) += sbi_ecall_hsm.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SRST) += ecall_srst
 libsbi-objs-$(CONFIG_SBI_ECALL_SRST) += sbi_ecall_srst.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SUSP) += ecall_susp
+libsbi-objs-$(CONFIG_SBI_ECALL_SUSP) += sbi_ecall_susp.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_PMU) += ecall_pmu
 libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
 
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
new file mode 100644
index 00000000000..f20126c49a6
--- /dev/null
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: BSD-2-Clause
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_system.h>
+
+static int sbi_ecall_susp_handler(unsigned long extid, unsigned long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	int ret = SBI_ENOTSUPP;
+
+	if (funcid == SBI_EXT_SUSP_SUSPEND)
+		ret = sbi_system_suspend(regs->a0, regs->a1, regs->a2);
+
+	if (ret >= 0) {
+		*out_val = ret;
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static int sbi_ecall_susp_probe(unsigned long extid, unsigned long *out_val)
+{
+	u32 type, count = 0;
+
+	/*
+	 * At least one suspend type should be supported by the
+	 * platform for the SBI SUSP extension to be usable.
+	 */
+	for (type = 0; type <= SBI_SUSP_SLEEP_TYPE_LAST; type++) {
+		if (sbi_system_suspend_supported(type))
+			count++;
+	}
+
+	*out_val = count ? 1 : 0;
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_susp = {
+	.extid_start = SBI_EXT_SUSP,
+	.extid_end = SBI_EXT_SUSP,
+	.handle = sbi_ecall_susp_handler,
+	.probe = sbi_ecall_susp_probe,
+};
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e353c334830..bc60a427935 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -69,6 +69,7 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	const struct sbi_timer_device *tdev;
 	const struct sbi_console_device *cdev;
 	const struct sbi_system_reset_device *srdev;
+	const struct sbi_system_suspend_device *susp_dev;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
@@ -103,6 +104,9 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	srdev = sbi_system_reset_get_device(SBI_SRST_RESET_TYPE_SHUTDOWN, 0);
 	sbi_printf("Platform Shutdown Device  : %s\n",
 		   (srdev) ? srdev->name : "---");
+	susp_dev = sbi_system_suspend_get_device();
+	sbi_printf("Platform Suspend Device   : %s\n",
+		   (susp_dev) ? susp_dev->name : "---");
 
 	/* Firmware details */
 	sbi_printf("Firmware Base             : 0x%lx\n", scratch->fw_start);
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index f37c811d0bf..5c123a6c9d8 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -92,3 +92,29 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 	/* If platform specific reset did not work then do sbi_exit() */
 	sbi_exit(scratch);
 }
+
+static const struct sbi_system_suspend_device *suspend_dev = NULL;
+
+const struct sbi_system_suspend_device *sbi_system_suspend_get_device(void)
+{
+	return suspend_dev;
+}
+
+void sbi_system_suspend_set_device(struct sbi_system_suspend_device *dev)
+{
+	if (!dev || suspend_dev)
+		return;
+
+	suspend_dev = dev;
+}
+
+bool sbi_system_suspend_supported(u32 sleep_type)
+{
+	return suspend_dev && suspend_dev->system_suspend_check &&
+	       suspend_dev->system_suspend_check(sleep_type);
+}
+
+int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
+{
+	return 0;
+}

From c9917b610871e4f9a0142e5c37c2b698177c3291 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:03 +0100
Subject: [PATCH 1224/1765] lib: sbi: Add system_suspend_allowed domain
 property

Only privileged domains should be allowed to suspend the entire
system. Give the root domain this property by default and allow
other domains to be given the property by specifying it in the
DT.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md     | 5 +++++
 include/sbi/sbi_domain.h   | 2 ++
 lib/sbi/sbi_domain.c       | 4 ++++
 lib/utils/fdt/fdt_domain.c | 7 +++++++
 4 files changed, 18 insertions(+)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 2a9ca3d70ea..039f262bfec 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -52,6 +52,7 @@ has following details:
 * **next_mode** - Privilege mode of the next booting stage for this
   domain. This can be either S-mode or U-mode.
 * **system_reset_allowed** - Is domain allowed to reset the system?
+* **system_suspend_allowed** - Is domain allowed to suspend the system?
 
 The memory regions represented by **regions** in **struct sbi_domain** have
 following additional constraints to align with RISC-V PMP requirements:
@@ -91,6 +92,7 @@ following manner:
 * **next_mode** - Next booting stage mode in coldboot HART scratch space
   is the next mode for the ROOT domain
 * **system_reset_allowed** - The ROOT domain is allowed to reset the system
+* **system_suspend_allowed** - The ROOT domain is allowed to suspend the system
 
 Domain Effects
 --------------
@@ -195,6 +197,8 @@ The DT properties of a domain instance DT node are as follows:
   stage mode of coldboot HART** is used as default value.
 * **system-reset-allowed** (Optional) - A boolean flag representing
   whether the domain instance is allowed to do system reset.
+* **system-suspend-allowed** (Optional) - A boolean flag representing
+  whether the domain instance is allowed to do system suspend.
 
 ### Assigning HART To Domain Instance
 
@@ -260,6 +264,7 @@ be done:
                 next-addr = <0x0 0x80100000>;
                 next-mode = <0x0>;
                 system-reset-allowed;
+                system-suspend-allowed;
             };
 
             udomain: untrusted-domain {
diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index ab1a944b474..eaca7f09327 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -120,6 +120,8 @@ struct sbi_domain {
 	unsigned long next_mode;
 	/** Is domain allowed to reset the system */
 	bool system_reset_allowed;
+	/** Is domain allowed to suspend the system */
+	bool system_suspend_allowed;
 };
 
 /** The root domain instance */
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index d2f58a28cbd..4d7b80a3ddd 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -38,6 +38,7 @@ struct sbi_domain root = {
 	.possible_harts = &root_hmask,
 	.regions = root_memregs,
 	.system_reset_allowed = true,
+	.system_suspend_allowed = true,
 };
 
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
@@ -467,6 +468,9 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 
 	sbi_printf("Domain%d SysReset    %s: %s\n",
 		   dom->index, suffix, (dom->system_reset_allowed) ? "yes" : "no");
+
+	sbi_printf("Domain%d SysSuspend  %s: %s\n",
+		   dom->index, suffix, (dom->system_suspend_allowed) ? "yes" : "no");
 }
 
 void sbi_domain_dump_all(const char *suffix)
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index bc30010a888..adcb94b6413 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -417,6 +417,13 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	else
 		dom->system_reset_allowed = false;
 
+	/* Read "system-suspend-allowed" DT property */
+	if (fdt_get_property(fdt, domain_offset,
+			     "system-suspend-allowed", NULL))
+		dom->system_suspend_allowed = true;
+	else
+		dom->system_suspend_allowed = false;
+
 	/* Find /cpus DT node */
 	cpus_offset = fdt_path_offset(fdt, "/cpus");
 	if (cpus_offset < 0)

From 7c964e279cbca3bad88b2fe35217e44a73862151 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:04 +0100
Subject: [PATCH 1225/1765] lib: sbi: Implement system suspend

Fill the implementation of the system suspend ecall. A platform
implementation of the suspend callbacks is still required for this
to do anything.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_system.c | 57 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 56 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 5c123a6c9d8..7fa5ea82b7a 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -116,5 +116,60 @@ bool sbi_system_suspend_supported(u32 sleep_type)
 
 int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 {
-	return 0;
+	int ret = SBI_ENOTSUPP;
+	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
+	unsigned int hartid = current_hartid();
+	unsigned long prev_mode;
+	unsigned long i;
+
+	if (!dom || !dom->system_suspend_allowed)
+		return SBI_EFAIL;
+
+	if (!suspend_dev || !suspend_dev->system_suspend)
+		return SBI_EFAIL;
+
+	if (!sbi_system_suspend_supported(sleep_type))
+		return SBI_ENOTSUPP;
+
+	prev_mode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	if (prev_mode != PRV_S && prev_mode != PRV_U)
+		return SBI_EFAIL;
+
+	sbi_hartmask_for_each_hart(i, &dom->assigned_harts) {
+		if (i == hartid)
+			continue;
+		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED)
+			return SBI_EFAIL;
+	}
+
+	if (!sbi_domain_check_addr(dom, resume_addr, prev_mode,
+				   SBI_DOMAIN_EXECUTE))
+		return SBI_EINVALID_ADDR;
+
+	if (!sbi_hsm_hart_change_state(scratch, SBI_HSM_STATE_STARTED,
+				       SBI_HSM_STATE_SUSPENDED))
+		return SBI_EFAIL;
+
+	/* Prepare for resume */
+	scratch->next_mode = prev_mode;
+	scratch->next_addr = resume_addr;
+	scratch->next_arg1 = opaque;
+
+	__sbi_hsm_suspend_non_ret_save(scratch);
+
+	/* Suspend */
+	ret = suspend_dev->system_suspend(sleep_type, scratch->warmboot_addr);
+	if (ret != SBI_OK) {
+		if (!sbi_hsm_hart_change_state(scratch, SBI_HSM_STATE_SUSPENDED,
+					       SBI_HSM_STATE_STARTED))
+			sbi_hart_hang();
+		return ret;
+	}
+
+	/* Resume */
+	jump_warmboot();
+
+	__builtin_unreachable();
 }

From 37558dccbedbb571150630a910547a93d7ec8822 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:05 +0100
Subject: [PATCH 1226/1765] docs: Correct opensbi-domain property name

Replace the commas with dashes to correct the name.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 039f262bfec..65b61427166 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -207,9 +207,9 @@ platform support can provide the HART to domain instance assignment using
 platform specific callback.
 
 The HART to domain instance assignment can be parsed from the device tree
-using optional DT property **opensbi,domain** in each CPU DT node. The
-value of DT property **opensbi,domain** is the DT phandle of the domain
-instance DT node. If **opensbi,domain** DT property is not specified then
+using optional DT property **opensbi-domain** in each CPU DT node. The
+value of DT property **opensbi-domain** is the DT phandle of the domain
+instance DT node. If **opensbi-domain** DT property is not specified then
 corresponding HART is assigned to **the ROOT domain**.
 
 ### Domain Configuration Only Accessible to OpenSBI

From 5ccebf0a7ec79d0bbef36d6dcdc2717f25d40767 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 27 Feb 2023 11:31:06 +0100
Subject: [PATCH 1227/1765] platform: generic: Add system suspend test

When the system-suspend-test property is present in the domain config
node as shown below, implement system suspend with a simple 5 second
delay followed by a WFI. This allows testing system suspend when the
low-level firmware doesn't support it.

  / {
    chosen {
      opensbi-domains {
          compatible = "opensbi,domain,config";
          system-suspend-test;
      };

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md      |  4 ++++
 include/sbi/sbi_system.h    |  1 +
 lib/sbi/sbi_system.c        | 31 +++++++++++++++++++++++++++++++
 platform/generic/platform.c | 20 +++++++++++++++++++-
 4 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 65b61427166..b285d65aec0 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -126,6 +126,9 @@ The DT properties of a domain configuration DT node are as follows:
 * **compatible** (Mandatory) - The compatible string of the domain
   configuration. This DT property should have value *"opensbi,domain,config"*
 
+* **system-suspend-test** (Optional) - When present, enable a system
+  suspend test implementation which simply waits five seconds and issues a WFI.
+
 ### Domain Memory Region Node
 
 The domain memory region DT node describes details of a memory region and
@@ -234,6 +237,7 @@ be done:
     chosen {
         opensbi-domains {
             compatible = "opensbi,domain,config";
+            system-suspend-test;
 
             tmem: tmem {
                 compatible = "opensbi,domain,memregion";
diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 11d3d6fd9a6..33ff7f1a44a 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -66,6 +66,7 @@ struct sbi_system_suspend_device {
 
 const struct sbi_system_suspend_device *sbi_system_suspend_get_device(void);
 void sbi_system_suspend_set_device(struct sbi_system_suspend_device *dev);
+void sbi_system_suspend_test_enable(void);
 bool sbi_system_suspend_supported(u32 sleep_type);
 int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque);
 
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 7fa5ea82b7a..6933915a12e 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
+#include <sbi/sbi_timer.h>
 
 static SBI_LIST_HEAD(reset_devices_list);
 
@@ -108,6 +109,36 @@ void sbi_system_suspend_set_device(struct sbi_system_suspend_device *dev)
 	suspend_dev = dev;
 }
 
+static int sbi_system_suspend_test_check(u32 sleep_type)
+{
+	return sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND;
+}
+
+static int sbi_system_suspend_test_suspend(u32 sleep_type,
+					   unsigned long mmode_resume_addr)
+{
+	if (sleep_type != SBI_SUSP_SLEEP_TYPE_SUSPEND)
+		return SBI_EINVAL;
+
+	sbi_timer_mdelay(5000);
+
+	/* Wait for interrupt */
+	wfi();
+
+	return SBI_OK;
+}
+
+static struct sbi_system_suspend_device sbi_system_suspend_test = {
+	.name = "system-suspend-test",
+	.system_suspend_check = sbi_system_suspend_test_check,
+	.system_suspend = sbi_system_suspend_test_suspend,
+};
+
+void sbi_system_suspend_test_enable(void)
+{
+	sbi_system_suspend_set_device(&sbi_system_suspend_test);
+}
+
 bool sbi_system_suspend_supported(u32 sleep_type)
 {
 	return suspend_dev && suspend_dev->system_suspend_check &&
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 0b90fd7c144..eeefef4c953 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_system.h>
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -219,7 +220,24 @@ static int generic_extensions_init(struct sbi_hart_features *hfeatures)
 
 static int generic_domains_init(void)
 {
-	return fdt_domains_populate(fdt_get_address());
+	void *fdt = fdt_get_address();
+	int offset, ret;
+
+	ret = fdt_domains_populate(fdt);
+	if (ret < 0)
+		return ret;
+
+	offset = fdt_path_offset(fdt, "/chosen");
+
+	if (offset >= 0) {
+		offset = fdt_node_offset_by_compatible(fdt, offset,
+						       "opensbi,domain,config");
+		if (offset >= 0 &&
+		    fdt_get_property(fdt, offset, "system-suspend-test", NULL))
+			sbi_system_suspend_test_enable();
+	}
+
+	return 0;
 }
 
 static u64 generic_tlbr_flush_limit(void)

From 908be1b85c8ff0695ea226fbbf0ff24a779cdece Mon Sep 17 00:00:00 2001
From: "minda.chen" <minda.chen@starfivetech.com>
Date: Thu, 16 Feb 2023 17:21:26 +0800
Subject: [PATCH 1228/1765] gpio/starfive: add gpio driver and support gpio
 reset

Add gpio driver and gpio reset function in Starfive
JH7110 SOC platform.

Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/Kconfig             |   3 +
 lib/utils/gpio/fdt_gpio_starfive.c | 117 +++++++++++++++++++++++++++++
 lib/utils/gpio/objects.mk          |   3 +
 platform/generic/configs/defconfig |   1 +
 4 files changed, 124 insertions(+)
 create mode 100644 lib/utils/gpio/fdt_gpio_starfive.c

diff --git a/lib/utils/gpio/Kconfig b/lib/utils/gpio/Kconfig
index 38a9d75c829..1b338a6fd94 100644
--- a/lib/utils/gpio/Kconfig
+++ b/lib/utils/gpio/Kconfig
@@ -14,6 +14,9 @@ config FDT_GPIO_SIFIVE
 	bool "SiFive GPIO FDT driver"
 	default n
 
+config FDT_GPIO_STARFIVE
+	bool "StarFive GPIO FDT driver"
+	default n
 endif
 
 config GPIO
diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
new file mode 100644
index 00000000000..18cca72aa89
--- /dev/null
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -0,0 +1,117 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Starfive
+ *
+ * Authors:
+ *   Minda.chen <Minda.chen@starfivetech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/gpio/fdt_gpio.h>
+
+#define STARFIVE_GPIO_CHIP_MAX		2
+#define STARFIVE_GPIO_PINS_DEF		64
+#define STARFIVE_GPIO_OUTVAL		0x40
+#define STARFIVE_GPIO_MASK		0xff
+#define STARFIVE_GPIO_REG_SHIFT_MASK	0x3
+#define STARFIVE_GPIO_SHIFT_BITS	0x3
+
+struct starfive_gpio_chip {
+	unsigned long addr;
+	struct gpio_chip chip;
+};
+
+static unsigned int starfive_gpio_chip_count;
+static struct starfive_gpio_chip starfive_gpio_chip_array[STARFIVE_GPIO_CHIP_MAX];
+
+static int starfive_gpio_direction_output(struct gpio_pin *gp, int value)
+{
+	u32 val;
+	unsigned long reg_addr;
+	u32 bit_mask, shift_bits;
+	struct starfive_gpio_chip *chip =
+		container_of(gp->chip, struct starfive_gpio_chip, chip);
+
+	/* set out en*/
+	reg_addr = chip->addr + gp->offset;
+	reg_addr &= ~(STARFIVE_GPIO_REG_SHIFT_MASK);
+
+	val = readl((void *)(reg_addr));
+	shift_bits = (gp->offset & STARFIVE_GPIO_REG_SHIFT_MASK)
+		<< STARFIVE_GPIO_SHIFT_BITS;
+	bit_mask = STARFIVE_GPIO_MASK << shift_bits;
+
+	val = readl((void *)reg_addr);
+	val &= ~bit_mask;
+	writel(val, (void *)reg_addr);
+
+	return 0;
+}
+
+static void starfive_gpio_set(struct gpio_pin *gp, int value)
+{
+	u32 val;
+	unsigned long reg_addr;
+	u32 bit_mask, shift_bits;
+	struct starfive_gpio_chip *chip =
+		container_of(gp->chip, struct starfive_gpio_chip, chip);
+
+	reg_addr = chip->addr + gp->offset;
+	reg_addr &= ~(STARFIVE_GPIO_REG_SHIFT_MASK);
+
+	shift_bits = (gp->offset & STARFIVE_GPIO_REG_SHIFT_MASK)
+		<< STARFIVE_GPIO_SHIFT_BITS;
+	bit_mask = STARFIVE_GPIO_MASK << shift_bits;
+	/* set output value */
+	val = readl((void *)(reg_addr + STARFIVE_GPIO_OUTVAL));
+	val &= ~bit_mask;
+	val |= value << shift_bits;
+	writel(val, (void *)(reg_addr + STARFIVE_GPIO_OUTVAL));
+}
+
+extern struct fdt_gpio fdt_gpio_starfive;
+
+static int starfive_gpio_init(void *fdt, int nodeoff, u32 phandle,
+			      const struct fdt_match *match)
+{
+	int rc;
+	struct starfive_gpio_chip *chip;
+	u64 addr;
+
+	if (starfive_gpio_chip_count >= STARFIVE_GPIO_CHIP_MAX)
+		return SBI_ENOSPC;
+	chip = &starfive_gpio_chip_array[starfive_gpio_chip_count];
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	chip->addr = addr;
+	chip->chip.driver = &fdt_gpio_starfive;
+	chip->chip.id = phandle;
+	chip->chip.ngpio = STARFIVE_GPIO_PINS_DEF;
+	chip->chip.direction_output = starfive_gpio_direction_output;
+	chip->chip.set = starfive_gpio_set;
+	rc = gpio_chip_add(&chip->chip);
+	if (rc)
+		return rc;
+
+	starfive_gpio_chip_count++;
+	return 0;
+}
+
+static const struct fdt_match starfive_gpio_match[] = {
+	{ .compatible = "starfive,jh7110-sys-pinctrl" },
+	{ .compatible = "starfive,iomux-pinctrl" },
+	{ },
+};
+
+struct fdt_gpio fdt_gpio_starfive = {
+	.match_table = starfive_gpio_match,
+	.xlate = fdt_gpio_simple_xlate,
+	.init = starfive_gpio_init,
+};
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index eedd699d85f..8f4a6a84fb1 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -13,4 +13,7 @@ libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio_drivers.o
 carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_SIFIVE) += fdt_gpio_sifive
 libsbiutils-objs-$(CONFIG_FDT_GPIO_SIFIVE) += gpio/fdt_gpio_sifive.o
 
+carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_STARFIVE) += fdt_gpio_starfive
+libsbiutils-objs-$(CONFIG_FDT_GPIO_STARFIVE) += gpio/fdt_gpio_starfive.o
+
 libsbiutils-objs-$(CONFIG_GPIO) += gpio/gpio.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 4b0842e03ed..2ad953d3ab0 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -6,6 +6,7 @@ CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_SIFIVE=y
+CONFIG_FDT_GPIO_STARFIVE=y
 CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_IPI=y

From 4b28afc98bbe406e3ad6f4a97d0fe96a882e83a1 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Mon, 27 Feb 2023 10:35:06 +0800
Subject: [PATCH 1229/1765] make: Add a command line option for debugging
 OpenSBI

Add a new make command line option "make DEBUG=1" to prevent compiler
optimizations using -O2.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile  |  7 ++++++-
 README.md | 13 +++++++++++++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index b20404f94aa..a26a39baf12 100644
--- a/Makefile
+++ b/Makefile
@@ -331,7 +331,12 @@ GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -O2
+CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing
+ifneq ($(DEBUG),)
+CFLAGS		+=	-O0
+else
+CFLAGS		+=	-O2
+endif
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
 # enable -m(no-)save-restore option by CC_SUPPORT_SAVE_RESTORE
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
diff --git a/README.md b/README.md
index 895bbf27a37..a6bcb0c1c3a 100644
--- a/README.md
+++ b/README.md
@@ -298,6 +298,19 @@ NOTE: Using `BUILD_INFO=y` without specifying SOURCE_DATE_EPOCH will violate
 purpose, and should NOT be used in a product which follows "reproducible
 builds".
 
+Building with optimization off for debugging
+--------------------------------------------
+
+When debugging OpenSBI, we may want to turn off the compiler optimization and
+make debugging produce the expected results for a better debugging experience.
+To build with optimization off we can just simply add `DEBUG=1`, like:
+```
+make DEBUG=1
+```
+
+This definition is ONLY for development and debug purpose, and should NOT be
+used in a product build.
+
 Contributing to OpenSBI
 -----------------------
 

From e9d08bd99cc702fcec1c5b59b593781da668e2bc Mon Sep 17 00:00:00 2001
From: Minda Chen <minda.chen@starfivetech.com>
Date: Thu, 9 Mar 2023 14:19:58 +0800
Subject: [PATCH 1230/1765] lib: utils/i2c: Add minimal StarFive jh7110 I2C
 driver

Starfive JH7110 I2C IP is synopsys designware.
Minimum StarFIve I2C driver to read/send bytes over I2C bus.

This allows querying information and perform operation of onboard PMIC,
as well as power-off and reset.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/i2c/dw_i2c.h |  21 ++++
 lib/utils/i2c/Kconfig          |   8 ++
 lib/utils/i2c/dw_i2c.c         | 190 +++++++++++++++++++++++++++++++++
 lib/utils/i2c/fdt_i2c_dw.c     |  62 +++++++++++
 lib/utils/i2c/objects.mk       |   5 +
 5 files changed, 286 insertions(+)
 create mode 100644 include/sbi_utils/i2c/dw_i2c.h
 create mode 100644 lib/utils/i2c/dw_i2c.c
 create mode 100644 lib/utils/i2c/fdt_i2c_dw.c

diff --git a/include/sbi_utils/i2c/dw_i2c.h b/include/sbi_utils/i2c/dw_i2c.h
new file mode 100644
index 00000000000..88703e057ff
--- /dev/null
+++ b/include/sbi_utils/i2c/dw_i2c.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 StarFive Technology Co., Ltd.
+ *
+ * Author: Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#ifndef __DW_I2C_H__
+#define __DW_I2C_H__
+
+#include <sbi_utils/i2c/i2c.h>
+
+int dw_i2c_init(struct i2c_adapter *, int nodeoff);
+
+struct dw_i2c_adapter {
+	unsigned long addr;
+	struct i2c_adapter adapter;
+};
+
+#endif
diff --git a/lib/utils/i2c/Kconfig b/lib/utils/i2c/Kconfig
index 46a3454c034..7fa32fcf967 100644
--- a/lib/utils/i2c/Kconfig
+++ b/lib/utils/i2c/Kconfig
@@ -14,8 +14,16 @@ config FDT_I2C_SIFIVE
 	bool "SiFive I2C FDT driver"
 	default n
 
+config FDT_I2C_DW
+	bool "Synopsys Designware I2C FDT driver"
+	select I2C_DW
+	default n
 endif
 
+config I2C_DW
+	bool "Synopsys Designware I2C support"
+	default n
+
 config I2C
 	bool "I2C support"
 	default n
diff --git a/lib/utils/i2c/dw_i2c.c b/lib/utils/i2c/dw_i2c.c
new file mode 100644
index 00000000000..e2ffc71259a
--- /dev/null
+++ b/lib/utils/i2c/dw_i2c.c
@@ -0,0 +1,190 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 starfivetech.com
+ *
+ * Authors:
+ *   Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi_utils/i2c/dw_i2c.h>
+
+#define DW_IC_CON		0x00
+#define DW_IC_TAR		0x04
+#define DW_IC_SAR		0x08
+#define DW_IC_DATA_CMD		0x10
+#define DW_IC_SS_SCL_HCNT	0x14
+#define DW_IC_SS_SCL_LCNT	0x18
+#define DW_IC_FS_SCL_HCNT	0x1c
+#define DW_IC_FS_SCL_LCNT	0x20
+#define DW_IC_HS_SCL_HCNT	0x24
+#define DW_IC_HS_SCL_LCNT	0x28
+#define DW_IC_INTR_STAT		0x2c
+#define DW_IC_INTR_MASK		0x30
+#define DW_IC_RAW_INTR_STAT	0x34
+#define DW_IC_RX_TL		0x38
+#define DW_IC_TX_TL		0x3c
+#define DW_IC_CLR_INTR		0x40
+#define DW_IC_CLR_RX_UNDER	0x44
+#define DW_IC_CLR_RX_OVER	0x48
+#define DW_IC_CLR_TX_OVER	0x4c
+#define DW_IC_CLR_RD_REQ	0x50
+#define DW_IC_CLR_TX_ABRT	0x54
+#define DW_IC_CLR_RX_DONE	0x58
+#define DW_IC_CLR_ACTIVITY	0x5c
+#define DW_IC_CLR_STOP_DET	0x60
+#define DW_IC_CLR_START_DET	0x64
+#define DW_IC_CLR_GEN_CALL	0x68
+#define DW_IC_ENABLE		0x6c
+#define DW_IC_STATUS		0x70
+#define DW_IC_TXFLR		0x74
+#define DW_IC_RXFLR		0x78
+#define DW_IC_SDA_HOLD		0x7c
+#define DW_IC_TX_ABRT_SOURCE	0x80
+#define DW_IC_ENABLE_STATUS	0x9c
+#define DW_IC_CLR_RESTART_DET	0xa8
+#define DW_IC_COMP_PARAM_1	0xf4
+#define DW_IC_COMP_VERSION	0xf8
+
+#define DW_I2C_STATUS_TXFIFO_EMPTY	BIT(2)
+#define DW_I2C_STATUS_RXFIFO_NOT_EMPTY	BIT(3)
+
+#define IC_DATA_CMD_READ	BIT(8)
+#define IC_DATA_CMD_STOP	BIT(9)
+#define IC_DATA_CMD_RESTART	BIT(10)
+#define IC_INT_STATUS_STOPDET	BIT(9)
+
+static inline void dw_i2c_setreg(struct dw_i2c_adapter *adap,
+				 u8 reg, u32 value)
+{
+	writel(value, (void *)adap->addr + reg);
+}
+
+static inline u32 dw_i2c_getreg(struct dw_i2c_adapter *adap,
+				u32 reg)
+{
+	return readl((void *)adap->addr + reg);
+}
+
+static int dw_i2c_adapter_poll(struct dw_i2c_adapter *adap,
+			       u32 mask, u32 addr,
+			       bool inverted)
+{
+	unsigned int timeout = 10; /* msec */
+	int count = 0;
+	u32 val;
+
+	do {
+		val = dw_i2c_getreg(adap, addr);
+		if (inverted) {
+			if (!(val & mask))
+				return 0;
+		} else {
+			if (val & mask)
+				return 0;
+		}
+		sbi_timer_udelay(2);
+		count += 1;
+		if (count == (timeout * 1000))
+			return SBI_ETIMEDOUT;
+	} while (1);
+}
+
+#define dw_i2c_adapter_poll_rxrdy(adap)	\
+	dw_i2c_adapter_poll(adap, DW_I2C_STATUS_RXFIFO_NOT_EMPTY, DW_IC_STATUS, 0)
+#define dw_i2c_adapter_poll_txfifo_ready(adap)	\
+	dw_i2c_adapter_poll(adap, DW_I2C_STATUS_TXFIFO_EMPTY, DW_IC_STATUS, 0)
+
+static int dw_i2c_write_addr(struct dw_i2c_adapter *adap, u8 addr)
+{
+	dw_i2c_setreg(adap, DW_IC_ENABLE, 0);
+	dw_i2c_setreg(adap, DW_IC_TAR, addr);
+	dw_i2c_setreg(adap, DW_IC_ENABLE, 1);
+
+	return 0;
+}
+
+static int dw_i2c_adapter_read(struct i2c_adapter *ia, u8 addr,
+			       u8 reg, u8 *buffer, int len)
+{
+	struct dw_i2c_adapter *adap =
+		container_of(ia, struct dw_i2c_adapter, adapter);
+	int rc;
+
+	dw_i2c_write_addr(adap, addr);
+
+	rc = dw_i2c_adapter_poll_txfifo_ready(adap);
+	if (rc)
+		return rc;
+
+	/* set register address */
+	dw_i2c_setreg(adap, DW_IC_DATA_CMD, reg);
+
+	/* set value */
+	while (len) {
+		if (len == 1)
+			dw_i2c_setreg(adap, DW_IC_DATA_CMD,
+				      IC_DATA_CMD_READ | IC_DATA_CMD_STOP);
+		else
+			dw_i2c_setreg(adap, DW_IC_DATA_CMD, IC_DATA_CMD_READ);
+
+		rc = dw_i2c_adapter_poll_rxrdy(adap);
+		if (rc)
+			return rc;
+
+		*buffer = dw_i2c_getreg(adap, DW_IC_DATA_CMD) & 0xff;
+		buffer++;
+		len--;
+	}
+
+	return 0;
+}
+
+static int dw_i2c_adapter_write(struct i2c_adapter *ia, u8 addr,
+				u8 reg, u8 *buffer, int len)
+{
+	struct dw_i2c_adapter *adap =
+		container_of(ia, struct dw_i2c_adapter, adapter);
+	int rc;
+
+	dw_i2c_write_addr(adap, addr);
+
+	rc = dw_i2c_adapter_poll_txfifo_ready(adap);
+	if (rc)
+		return rc;
+
+	/* set register address */
+	dw_i2c_setreg(adap, DW_IC_DATA_CMD, reg);
+
+	while (len) {
+		rc = dw_i2c_adapter_poll_txfifo_ready(adap);
+		if (rc)
+			return rc;
+
+		if (len == 1)
+			dw_i2c_setreg(adap, DW_IC_DATA_CMD, *buffer | IC_DATA_CMD_STOP);
+		else
+			dw_i2c_setreg(adap, DW_IC_DATA_CMD, *buffer);
+
+		buffer++;
+		len--;
+	}
+	rc = dw_i2c_adapter_poll_txfifo_ready(adap);
+
+	return rc;
+}
+
+int dw_i2c_init(struct i2c_adapter *adapter, int nodeoff)
+{
+	adapter->id = nodeoff;
+	adapter->write = dw_i2c_adapter_write;
+	adapter->read = dw_i2c_adapter_read;
+
+	return i2c_adapter_add(adapter);
+}
diff --git a/lib/utils/i2c/fdt_i2c_dw.c b/lib/utils/i2c/fdt_i2c_dw.c
new file mode 100644
index 00000000000..71062f4b403
--- /dev/null
+++ b/lib/utils/i2c/fdt_i2c_dw.c
@@ -0,0 +1,62 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 starfivetech.com
+ *
+ * Authors:
+ *   Minda Chen <minda.chen@starfivetech.com>
+ */
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/i2c/dw_i2c.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
+
+#define FDT_DW_I2C_ADAPTER_MAX	7
+
+static unsigned int fdt_dw_i2c_adapter_count;
+static struct dw_i2c_adapter
+	fdt_dw_i2c_adapter_array[FDT_DW_I2C_ADAPTER_MAX];
+
+extern struct fdt_i2c_adapter fdt_i2c_adapter_dw;
+
+static int fdt_dw_i2c_init(void *fdt, int nodeoff,
+			     const struct fdt_match *match)
+{
+	int rc;
+	struct dw_i2c_adapter *adapter;
+	u64 addr;
+
+	if (fdt_dw_i2c_adapter_count >= FDT_DW_I2C_ADAPTER_MAX)
+		return SBI_ENOSPC;
+
+	adapter = &fdt_dw_i2c_adapter_array[fdt_dw_i2c_adapter_count];
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	adapter->addr = addr;
+	adapter->adapter.driver = &fdt_i2c_adapter_dw;
+
+	rc = dw_i2c_init(&adapter->adapter, nodeoff);
+	if (rc)
+		return rc;
+
+	fdt_dw_i2c_adapter_count++;
+
+	return 0;
+}
+
+static const struct fdt_match fdt_dw_i2c_match[] = {
+	{ .compatible = "snps,designware-i2c" },
+	{ .compatible = "starfive,jh7110-i2c" },
+	{ },
+};
+
+struct fdt_i2c_adapter fdt_i2c_adapter_dw = {
+	.match_table = fdt_dw_i2c_match,
+	.init = fdt_dw_i2c_init,
+};
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index a0fbbb5de32..5f7a79ff3d3 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -14,3 +14,8 @@ libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c_adapter_drivers.o
 
 carray-fdt_i2c_adapter_drivers-$(CONFIG_FDT_I2C_SIFIVE) += fdt_i2c_adapter_sifive
 libsbiutils-objs-$(CONFIG_FDT_I2C_SIFIVE) += i2c/fdt_i2c_sifive.o
+
+carray-fdt_i2c_adapter_drivers-$(CONFIG_FDT_I2C_DW) += fdt_i2c_adapter_dw
+libsbiutils-objs-$(CONFIG_FDT_I2C_DW) += i2c/fdt_i2c_dw.o
+
+libsbiutils-objs-$(CONFIG_I2C_DW) += i2c/dw_i2c.o

From 568ea49490d935e01b9a41ef8bb5daf9cb0ef201 Mon Sep 17 00:00:00 2001
From: Minda Chen <minda.chen@starfivetech.com>
Date: Thu, 9 Mar 2023 14:19:59 +0800
Subject: [PATCH 1231/1765] platform: starfive: add PMIC power ops in JH7110
 visionfive2 board

add reboot and poweroff support. The whole reboot and shutdown
pm op includes shutdown jh7110 pmu device power domain
and access on board pmic register through I2C.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/configs/defconfig |   1 +
 platform/generic/starfive/jh7110.c | 272 +++++++++++++++++++++++++++++
 2 files changed, 273 insertions(+)

diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 2ad953d3ab0..ee0df38a22e 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -9,6 +9,7 @@ CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_GPIO_STARFIVE=y
 CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
+CONFIG_FDT_I2C_DW=y
 CONFIG_FDT_IPI=y
 CONFIG_FDT_IPI_MSWI=y
 CONFIG_FDT_IPI_PLICSW=y
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index c665658ac9b..dcd6306be5f 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -5,14 +5,285 @@
  *
  * Authors:
  *   Wei Liang Lim <weiliang.lim@starfivetech.com>
+ *   Minda Chen <minda.chen@starfivetech.com>
  */
 
 #include <libfdt.h>
 #include <platform_override.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/riscv_io.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
 
+struct pmic {
+	struct i2c_adapter *adapter;
+	u32 dev_addr;
+	const char *compatible;
+};
+
+struct jh7110 {
+	u64 pmu_reg_base;
+	u64 clk_reg_base;
+	u32 i2c_index;
+};
+
+static struct pmic pmic_inst;
+static struct jh7110 jh7110_inst;
 static u32 selected_hartid = -1;
 
+/* PMU register define */
+#define HW_EVENT_TURN_ON_MASK		0x04
+#define HW_EVENT_TURN_OFF_MASK		0x08
+#define SW_TURN_ON_POWER_MODE		0x0C
+#define SW_TURN_OFF_POWER_MODE		0x10
+#define SW_ENCOURAGE			0x44
+#define PMU_INT_MASK			0x48
+#define PCH_BYPASS			0x4C
+#define PCH_PSTATE			0x50
+#define PCH_TIMEOUT			0x54
+#define LP_TIMEOUT			0x58
+#define HW_TURN_ON_MODE			0x5C
+#define CURR_POWER_MODE			0x80
+#define PMU_EVENT_STATUS		0x88
+#define PMU_INT_STATUS			0x8C
+
+/* sw encourage cfg */
+#define SW_MODE_ENCOURAGE_EN_LO		0x05
+#define SW_MODE_ENCOURAGE_EN_HI		0x50
+#define SW_MODE_ENCOURAGE_DIS_LO	0x0A
+#define SW_MODE_ENCOURAGE_DIS_HI	0xA0
+#define SW_MODE_ENCOURAGE_ON		0xFF
+
+#define DEVICE_PD_MASK			0xfc
+#define SYSTOP_CPU_PD_MASK		0x3
+
+#define TIMEOUT_COUNT			100000
+#define AXP15060_POWER_REG		0x32
+#define AXP15060_POWER_OFF_BIT		BIT(7)
+#define AXP15060_RESET_BIT		BIT(6)
+
+#define I2C_APB_CLK_OFFSET		0x228
+#define I2C_APB_CLK_ENABLE_BIT		BIT(31)
+
+static int pm_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		return 1;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		return 255;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static int wait_pmu_pd_state(u32 mask)
+{
+	int count = 0;
+	unsigned long addr = jh7110_inst.pmu_reg_base;
+	u32 val;
+
+	do {
+		val = readl((void *)(addr + CURR_POWER_MODE));
+		if (val == mask)
+			return 0;
+
+		sbi_timer_udelay(2);
+		count += 1;
+		if (count == TIMEOUT_COUNT)
+			return SBI_ETIMEDOUT;
+	} while (1);
+}
+
+static int shutdown_device_power_domain(void)
+{
+	unsigned long addr = jh7110_inst.pmu_reg_base;
+	u32 curr_mode;
+	int ret = 0;
+
+	curr_mode = readl((void *)(addr + CURR_POWER_MODE));
+	curr_mode &= DEVICE_PD_MASK;
+
+	if (curr_mode) {
+		writel(curr_mode, (void *)(addr + SW_TURN_OFF_POWER_MODE));
+		writel(SW_MODE_ENCOURAGE_ON, (void *)(addr + SW_ENCOURAGE));
+		writel(SW_MODE_ENCOURAGE_DIS_LO, (void *)(addr + SW_ENCOURAGE));
+		writel(SW_MODE_ENCOURAGE_DIS_HI, (void *)(addr + SW_ENCOURAGE));
+		ret = wait_pmu_pd_state(SYSTOP_CPU_PD_MASK);
+		if (ret)
+			sbi_printf("%s shutdown device power %x error\n",
+				   __func__, curr_mode);
+	}
+	return ret;
+}
+
+static void pmic_ops(struct pmic *pmic, int type)
+{
+	int ret = 0;
+	u8 val;
+
+	ret = shutdown_device_power_domain();
+
+	if (ret)
+		return;
+
+	if (!sbi_strcmp("stf,axp15060-regulator", pmic->compatible)) {
+		ret = i2c_adapter_reg_read(pmic->adapter, pmic->dev_addr,
+					   AXP15060_POWER_REG, &val);
+
+		if (ret) {
+			sbi_printf("%s: cannot read pmic power register\n",
+				   __func__);
+			return;
+		}
+
+		val |= AXP15060_POWER_OFF_BIT;
+		if (type == SBI_SRST_RESET_TYPE_SHUTDOWN)
+			val |= AXP15060_POWER_OFF_BIT;
+		else
+			val |= AXP15060_RESET_BIT;
+
+		ret = i2c_adapter_reg_write(pmic->adapter, pmic->dev_addr,
+					    AXP15060_POWER_REG, val);
+		if (ret)
+			sbi_printf("%s: cannot write pmic power register\n",
+				   __func__);
+	}
+}
+
+static void pmic_i2c_clk_enable(void)
+{
+	unsigned long clock_base;
+	unsigned int val;
+
+	clock_base = jh7110_inst.clk_reg_base +
+		I2C_APB_CLK_OFFSET +
+		(jh7110_inst.i2c_index << 2);
+
+	val = readl((void *)clock_base);
+
+	if (!val)
+		writel(I2C_APB_CLK_ENABLE_BIT, (void *)clock_base);
+}
+
+static void pm_system_reset(u32 type, u32 reason)
+{
+	if (pmic_inst.adapter) {
+		switch (type) {
+		case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+			/* i2c clk may be disabled by kernel driver */
+			pmic_i2c_clk_enable();
+			pmic_ops(&pmic_inst, type);
+			break;
+		default:
+			break;
+		}
+	}
+
+	sbi_hart_hang();
+}
+
+static struct sbi_system_reset_device pm_reset = {
+	.name = "pm-reset",
+	.system_reset_check = pm_system_reset_check,
+	.system_reset = pm_system_reset
+};
+
+static int pm_reset_init(void *fdt, int nodeoff,
+			 const struct fdt_match *match)
+{
+	int rc;
+	int i2c_bus;
+	struct i2c_adapter *adapter;
+	u64 addr;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	pmic_inst.dev_addr = addr;
+	pmic_inst.compatible = match->compatible;
+
+	i2c_bus = fdt_parent_offset(fdt, nodeoff);
+	if (i2c_bus < 0)
+		return i2c_bus;
+
+	/* i2c adapter get */
+	rc = fdt_i2c_adapter_get(fdt, i2c_bus, &adapter);
+	if (rc)
+		return rc;
+
+	pmic_inst.adapter = adapter;
+
+	sbi_system_reset_add_device(&pm_reset);
+
+	return 0;
+}
+
+static const struct fdt_match pm_reset_match[] = {
+	{ .compatible = "stf,axp15060-regulator", .data = (void *)true },
+	{ },
+};
+
+static struct fdt_reset fdt_reset_pmic = {
+	.match_table = pm_reset_match,
+	.init = pm_reset_init,
+};
+
+static int starfive_jh7110_inst_init(void *fdt)
+{
+	int noff, rc = 0;
+	const char *name;
+	u64 addr;
+
+	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-pmu");
+	if (-1 < noff) {
+		rc = fdt_get_node_addr_size(fdt, noff, 0, &addr, NULL);
+		if (rc)
+			goto err;
+		jh7110_inst.pmu_reg_base = addr;
+	}
+
+	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-clkgen");
+	if (-1 < noff) {
+		rc = fdt_get_node_addr_size(fdt, noff, 0, &addr, NULL);
+		if (rc)
+			goto err;
+		jh7110_inst.clk_reg_base = addr;
+	}
+
+	if (pmic_inst.adapter) {
+		name = fdt_get_name(fdt, pmic_inst.adapter->id, NULL);
+		if (!sbi_strncmp(name, "i2c", 3))
+			jh7110_inst.i2c_index = name[3] - '0';
+		else
+			rc = SBI_EINVAL;
+	}
+err:
+	return rc;
+}
+
+static int starfive_jh7110_final_init(bool cold_boot,
+				      const struct fdt_match *match)
+{
+	void *fdt = fdt_get_address();
+
+	if (cold_boot) {
+		fdt_reset_driver_init(fdt, &fdt_reset_pmic);
+		return starfive_jh7110_inst_init(fdt);
+	}
+
+	return 0;
+}
+
 static bool starfive_jh7110_cold_boot_allowed(u32 hartid,
 				   const struct fdt_match *match)
 {
@@ -44,4 +315,5 @@ const struct platform_override starfive_jh7110 = {
 	.match_table = starfive_jh7110_match,
 	.cold_boot_allowed = starfive_jh7110_cold_boot_allowed,
 	.fw_init = starfive_jh7110_fw_init,
+	.final_init = starfive_jh7110_final_init,
 };

From 506144f398b7911a2395d127fb6a64082a4a79cc Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Wed, 1 Mar 2023 20:08:00 +0530
Subject: [PATCH 1232/1765] lib: serial: Cadence: Enable compatibility for
 cdns,uart-r1p8

The Cadence driver does not use the RX byte status feature and hence can
be advertised to be compatible with cdns,uart-r1p8 as well.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/fdt_serial_cadence.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/serial/fdt_serial_cadence.c b/lib/utils/serial/fdt_serial_cadence.c
index 946e5336547..ae59e4c1e9c 100644
--- a/lib/utils/serial/fdt_serial_cadence.c
+++ b/lib/utils/serial/fdt_serial_cadence.c
@@ -24,6 +24,7 @@ static int serial_cadence_init(void *fdt, int nodeoff,
 }
 
 static const struct fdt_match serial_cadence_match[] = {
+	{ .compatible = "cdns,uart-r1p8", },
 	{ .compatible = "cdns,uart-r1p12" },
 	{ .compatible = "starfive,jh8100-uart" },
 	{ },

From 1fe8dc995566d869836d3caf37e427c28536f453 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:51 +0530
Subject: [PATCH 1233/1765] lib: sbi_pmu: add callback for counter width

This patch adds a callback to fetch the number of bits implemented for a
custom firmware counter. If the callback fails or is not implemented then
width defaults to 63.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h | 5 +++++
 lib/sbi/sbi_pmu.c     | 6 ++++++
 2 files changed, 11 insertions(+)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index c36524393bc..b3b75c1bad0 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -41,6 +41,11 @@ struct sbi_pmu_device {
 	bool (*fw_counter_match_code)(uint32_t counter_index,
 				      uint32_t event_idx_code);
 
+	/**
+	 * Fetch the max width of this counter in number of bits.
+	 */
+	int (*fw_counter_width)(void);
+
 	/**
 	 * Read value of custom firmware counter
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 154dbdac549..a99c04506f3 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -761,6 +761,7 @@ unsigned long sbi_pmu_num_ctr(void)
 
 int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 {
+	int width;
 	union sbi_pmu_ctr_info cinfo = {0};
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
@@ -782,6 +783,11 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 		cinfo.type = SBI_PMU_CTR_TYPE_FW;
 		/* Firmware counters are always 64 bits wide */
 		cinfo.width = 63;
+		if (pmu_dev && pmu_dev->fw_counter_width) {
+			width = pmu_dev->fw_counter_width();
+			if (width)
+				cinfo.width = width - 1;
+		}
 	}
 
 	*ctr_info = cinfo.value;

From 51951d9e9af86c885cf5564bba7dd83a9a59a3b3 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:52 +0530
Subject: [PATCH 1234/1765] lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi

To support 64 bit firmware counters on RV32 systems, we implement
sbi_pmu_counter_fw_read_hi() which returns the upper 32 bits of
the firmware counter value. On RV64 (or higher) systems, this
function will always return zero.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 1 +
 lib/sbi/sbi_ecall_pmu.c           | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 4c378c3e7c3..d4482129f89 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -101,6 +101,7 @@
 #define SBI_EXT_PMU_COUNTER_START	0x3
 #define SBI_EXT_PMU_COUNTER_STOP	0x4
 #define SBI_EXT_PMU_COUNTER_FW_READ	0x5
+#define SBI_EXT_PMU_COUNTER_FW_READ_HI	0x6
 
 /** General pmu event codes specified in SBI PMU extension */
 enum sbi_pmu_hw_generic_events_t {
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 826c8a89bf0..8f91f9cec01 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -54,6 +54,14 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
 		*out_val = temp;
 		break;
+	case SBI_EXT_PMU_COUNTER_FW_READ_HI:
+#if __riscv_xlen == 32
+		ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
+		*out_val = temp >> 32;
+#else
+		*out_val = 0;
+#endif
+		break;
 	case SBI_EXT_PMU_COUNTER_START:
 
 #if __riscv_xlen == 32

From 60c358e6774847629cd608a8841c4e7752b4949a Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:53 +0530
Subject: [PATCH 1235/1765] lib: sbi_pmu: Reserve space for implementation
 specific firmware events

We reserve space for SBI implementation specific custom firmware
events which can be used by M-mode firmwares and HS-mode hypervisors
for their own use. This reserved space is intentionally large to
ensure that SBI implementation has enough space to accommodate
platform specific firmware events as well.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index d4482129f89..459735807f1 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -185,6 +185,17 @@ enum sbi_pmu_fw_event_code_id {
 	SBI_PMU_FW_HFENCE_VVMA_ASID_SENT = 20,
 	SBI_PMU_FW_HFENCE_VVMA_ASID_RCVD = 21,
 	SBI_PMU_FW_MAX,
+	/*
+	 * Event codes 22 to 255 are reserved for future use.
+	 * Event codes 256 to 65534 are reserved for SBI implementation
+	 * specific custom firmware events.
+	 */
+	SBI_PMU_FW_RESERVED_MAX = 0xFFFE,
+	/*
+	 * Event code 0xFFFF is used for platform specific firmware
+	 * events where the event data contains any event specific information.
+	 */
+	SBI_PMU_FW_PLATFORM = 0xFFFF,
 };
 
 /** SBI PMU event idx type */

From 548e4b4b28b96aa771c2f49a5b255ba6cc26777f Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:54 +0530
Subject: [PATCH 1236/1765] lib: sbi_pmu: Rename fw_counter_value

Rename and reuse fw_counter_value array to save both the counter values
for the SBI firmware events and event data for the SBI platform specific
firmware events.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/sbi_pmu.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index a99c04506f3..1a3c44d182e 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -65,8 +65,12 @@ static uint32_t active_events[SBI_HARTMASK_MAX_BITS][SBI_PMU_HW_CTR_MAX + SBI_PM
 #endif
 static unsigned long fw_counters_started[SBI_HARTMASK_MAX_BITS];
 
-/* Values of firmwares counters on each HART */
-static uint64_t fw_counters_value[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_CTR_MAX] = {0};
+/*
+ * Counter values for SBI firmware events and event codes for platform
+ * firmware events. Both are mutually exclusive and hence can optimally share
+ * the same memory.
+ */
+static uint64_t fw_counters_data[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_CTR_MAX] = {0};
 
 /* Maximum number of hardware events available */
 static uint32_t num_hw_events;
@@ -185,10 +189,10 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 
 	if (SBI_PMU_FW_MAX <= event_code &&
 	    pmu_dev && pmu_dev->fw_counter_read_value)
-		fw_counters_value[hartid][cidx - num_hw_ctrs] =
+		fw_counters_data[hartid][cidx - num_hw_ctrs] =
 			pmu_dev->fw_counter_read_value(cidx - num_hw_ctrs);
 
-	*cval = fw_counters_value[hartid][cidx - num_hw_ctrs];
+	*cval = fw_counters_data[hartid][cidx - num_hw_ctrs];
 
 	return 0;
 }
@@ -372,7 +376,7 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 	}
 
 	if (ival_update)
-		fw_counters_value[hartid][cidx - num_hw_ctrs] = ival;
+		fw_counters_data[hartid][cidx - num_hw_ctrs] = ival;
 	fw_counters_started[hartid] |= BIT(cidx - num_hw_ctrs);
 
 	return 0;
@@ -711,13 +715,13 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			pmu_ctr_start_hw(ctr_idx, 0, false);
 	} else if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
-			fw_counters_value[hartid][ctr_idx - num_hw_ctrs] = 0;
+			fw_counters_data[hartid][ctr_idx - num_hw_ctrs] = 0;
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
 			if (SBI_PMU_FW_MAX <= event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
 				ret = pmu_dev->fw_counter_start(
 					ctr_idx - num_hw_ctrs, event_code,
-					fw_counters_value[hartid][ctr_idx - num_hw_ctrs],
+					fw_counters_data[hartid][ctr_idx - num_hw_ctrs],
 					true);
 				if (ret)
 					return ret;
@@ -743,7 +747,7 @@ int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
 	for (cidx = num_hw_ctrs; cidx < total_ctrs; cidx++) {
 		if (get_cidx_code(active_events[hartid][cidx]) == fw_id &&
 		    (fw_counters_started[hartid] & BIT(cidx - num_hw_ctrs))) {
-			fcounter = &fw_counters_value[hartid][cidx - num_hw_ctrs];
+			fcounter = &fw_counters_data[hartid][cidx - num_hw_ctrs];
 			break;
 		}
 	}
@@ -803,7 +807,7 @@ static void pmu_reset_event_map(u32 hartid)
 	for (j = 3; j < total_ctrs; j++)
 		active_events[hartid][j] = SBI_PMU_EVENT_IDX_INVALID;
 	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
-		fw_counters_value[hartid][j] = 0;
+		fw_counters_data[hartid][j] = 0;
 	fw_counters_started[hartid] = 0;
 }
 

From b51ddffcc043fb94ebcbffce7682b2d0deef5afd Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:55 +0530
Subject: [PATCH 1237/1765] lib: sbi_pmu: Update sbi_pmu dev ops

Update fw_event_validate_code, fw_counter_match_code and fw_counter_start
ops which used a 32 bit event code to use the 64 bit event data instead.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h |  9 ++++-----
 lib/sbi/sbi_pmu.c     | 30 +++++++++++++++++-------------
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index b3b75c1bad0..3232e140ad7 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -30,16 +30,15 @@ struct sbi_pmu_device {
 
 	/**
 	 * Validate event code of custom firmware event
-	 * Note: SBI_PMU_FW_MAX <= event_idx_code
 	 */
-	int (*fw_event_validate_code)(uint32_t event_idx_code);
+	int (*fw_event_validate_encoding)(uint64_t event_data);
 
 	/**
 	 * Match custom firmware counter with custom firmware event
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	bool (*fw_counter_match_code)(uint32_t counter_index,
-				      uint32_t event_idx_code);
+	bool (*fw_counter_match_encoding)(uint32_t counter_index,
+					  uint64_t event_data);
 
 	/**
 	 * Fetch the max width of this counter in number of bits.
@@ -58,7 +57,7 @@ struct sbi_pmu_device {
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
 	int (*fw_counter_start)(uint32_t counter_index,
-				uint32_t event_idx_code,
+				uint64_t event_data,
 				uint64_t init_val, bool init_val_update);
 
 	/**
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 1a3c44d182e..1169ef29bde 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -110,7 +110,7 @@ static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
 	return false;
 }
 
-static int pmu_event_validate(unsigned long event_idx)
+static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 {
 	uint32_t event_idx_type = get_cidx_type(event_idx);
 	uint32_t event_idx_code = get_cidx_code(event_idx);
@@ -123,8 +123,8 @@ static int pmu_event_validate(unsigned long event_idx)
 		break;
 	case SBI_PMU_EVENT_TYPE_FW:
 		if (SBI_PMU_FW_MAX <= event_idx_code &&
-		    pmu_dev && pmu_dev->fw_event_validate_code)
-			return pmu_dev->fw_event_validate_code(event_idx_code);
+		    pmu_dev && pmu_dev->fw_event_validate_encoding)
+			return pmu_dev->fw_event_validate_encoding(edata);
 		else
 			event_idx_code_max = SBI_PMU_FW_MAX;
 		break;
@@ -361,7 +361,8 @@ int sbi_pmu_irq_bit(void)
 }
 
 static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
-			    uint64_t ival, bool ival_update)
+			    uint64_t event_data, uint64_t ival,
+			    bool ival_update)
 {
 	int ret;
 	u32 hartid = current_hartid();
@@ -369,7 +370,7 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 	if (SBI_PMU_FW_MAX <= event_code &&
 	    pmu_dev && pmu_dev->fw_counter_start) {
 		ret = pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
-						event_code,
+						event_data,
 						ival, ival_update);
 		if (ret)
 			return ret;
@@ -390,6 +391,7 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 	int ret = SBI_EINVAL;
 	bool bUpdate = false;
 	int i, cidx;
+	uint64_t edata = 0;
 
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return ret;
@@ -404,7 +406,8 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 			/* Continue the start operation for other counters */
 			continue;
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_start_fw(cidx, event_code, ival, bUpdate);
+			ret = pmu_ctr_start_fw(cidx, event_code, edata, ival,
+					       bUpdate);
 		else
 			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
 	}
@@ -644,7 +647,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
  * check.
  */
 static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
-			   uint32_t event_code, u32 hartid)
+			   uint32_t event_code, u32 hartid, uint64_t edata)
 {
 	int i, cidx;
 
@@ -655,9 +658,9 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
 		if (active_events[hartid][i] != SBI_PMU_EVENT_IDX_INVALID)
 			continue;
 		if (SBI_PMU_FW_MAX <= event_code &&
-		    pmu_dev && pmu_dev->fw_counter_match_code) {
-			if (!pmu_dev->fw_counter_match_code(cidx - num_hw_ctrs,
-							    event_code))
+		    pmu_dev && pmu_dev->fw_counter_match_encoding) {
+			if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs,
+								edata))
 				continue;
 		}
 
@@ -679,7 +682,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs)
 		return SBI_EINVAL;
 
-	event_type = pmu_event_validate(event_idx);
+	event_type = pmu_event_validate(event_idx, event_data);
 	if (event_type < 0)
 		return SBI_EINVAL;
 	event_code = get_cidx_code(event_idx);
@@ -697,7 +700,8 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 
 	if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		/* Any firmware counter can be used track any firmware event */
-		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, event_code, hartid);
+		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, event_code,
+					  hartid, event_data);
 	} else {
 		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, flags, event_idx,
 					  event_data);
@@ -720,7 +724,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			if (SBI_PMU_FW_MAX <= event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
 				ret = pmu_dev->fw_counter_start(
-					ctr_idx - num_hw_ctrs, event_code,
+					ctr_idx - num_hw_ctrs, event_data,
 					fw_counters_data[hartid][ctr_idx - num_hw_ctrs],
 					true);
 				if (ret)

From 641d2e9f38e085ccee77cfd866cae5c7222830fc Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:56 +0530
Subject: [PATCH 1238/1765] lib: sbi_pmu: Use dedicated event code for platform
 firmware events

For all platform specific firmware event operations use the dedicated
event code (0xFFFF) when matching against the input firmware event.
Furthermore save the real platform specific firmware event code received as
the event data for future use.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 65 +++++++++++++++++++++++++++++++++++++----------
 1 file changed, 52 insertions(+), 13 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 1169ef29bde..d0831985bb0 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -122,7 +122,12 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 		event_idx_code_max = SBI_PMU_HW_GENERAL_MAX;
 		break;
 	case SBI_PMU_EVENT_TYPE_FW:
-		if (SBI_PMU_FW_MAX <= event_idx_code &&
+		if ((event_idx_code >= SBI_PMU_FW_MAX &&
+		    event_idx_code <= SBI_PMU_FW_RESERVED_MAX) ||
+		    event_idx_code > SBI_PMU_FW_PLATFORM)
+			return SBI_EINVAL;
+
+		if (SBI_PMU_FW_PLATFORM == event_idx_code &&
 		    pmu_dev && pmu_dev->fw_event_validate_encoding)
 			return pmu_dev->fw_event_validate_encoding(edata);
 		else
@@ -187,12 +192,19 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
 
-	if (SBI_PMU_FW_MAX <= event_code &&
-	    pmu_dev && pmu_dev->fw_counter_read_value)
-		fw_counters_data[hartid][cidx - num_hw_ctrs] =
-			pmu_dev->fw_counter_read_value(cidx - num_hw_ctrs);
+	if ((event_code >= SBI_PMU_FW_MAX &&
+	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
+	    event_code > SBI_PMU_FW_PLATFORM)
+		return SBI_EINVAL;
 
-	*cval = fw_counters_data[hartid][cidx - num_hw_ctrs];
+	if (SBI_PMU_FW_PLATFORM == event_code) {
+		if (pmu_dev && pmu_dev->fw_counter_read_value)
+			*cval = pmu_dev->fw_counter_read_value(cidx -
+							       num_hw_ctrs);
+		else
+			*cval = 0;
+	} else
+		*cval = fw_counters_data[hartid][cidx - num_hw_ctrs];
 
 	return 0;
 }
@@ -367,8 +379,17 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 	int ret;
 	u32 hartid = current_hartid();
 
-	if (SBI_PMU_FW_MAX <= event_code &&
-	    pmu_dev && pmu_dev->fw_counter_start) {
+	if ((event_code >= SBI_PMU_FW_MAX &&
+	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
+	    event_code > SBI_PMU_FW_PLATFORM)
+		return SBI_EINVAL;
+
+	if (SBI_PMU_FW_PLATFORM == event_code) {
+		if (!pmu_dev ||
+		    !pmu_dev->fw_counter_start) {
+			return SBI_EINVAL;
+		    }
+
 		ret = pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
 						event_data,
 						ival, ival_update);
@@ -386,12 +407,13 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 		      unsigned long flags, uint64_t ival)
 {
+	u32 hartid = current_hartid();
 	int event_idx_type;
 	uint32_t event_code;
 	int ret = SBI_EINVAL;
 	bool bUpdate = false;
 	int i, cidx;
-	uint64_t edata = 0;
+	uint64_t edata;
 
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return ret;
@@ -405,9 +427,13 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 		if (event_idx_type < 0)
 			/* Continue the start operation for other counters */
 			continue;
-		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
+		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW) {
+			edata = (event_code == SBI_PMU_FW_PLATFORM) ?
+				 fw_counters_data[hartid][cidx - num_hw_ctrs]
+				 : 0x0;
 			ret = pmu_ctr_start_fw(cidx, event_code, edata, ival,
 					       bUpdate);
+		}
 		else
 			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
 	}
@@ -441,7 +467,12 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
 {
 	int ret;
 
-	if (SBI_PMU_FW_MAX <= event_code &&
+	if ((event_code >= SBI_PMU_FW_MAX &&
+	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
+	    event_code > SBI_PMU_FW_PLATFORM)
+		return SBI_EINVAL;
+
+	if (SBI_PMU_FW_PLATFORM == event_code &&
 	    pmu_dev && pmu_dev->fw_counter_stop) {
 		ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs);
 		if (ret)
@@ -651,13 +682,18 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
 {
 	int i, cidx;
 
+	if ((event_code >= SBI_PMU_FW_MAX &&
+	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
+	    event_code > SBI_PMU_FW_PLATFORM)
+		return SBI_EINVAL;
+
 	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
 		cidx = i + cbase;
 		if (cidx < num_hw_ctrs || total_ctrs <= cidx)
 			continue;
 		if (active_events[hartid][i] != SBI_PMU_EVENT_IDX_INVALID)
 			continue;
-		if (SBI_PMU_FW_MAX <= event_code &&
+		if (SBI_PMU_FW_PLATFORM == event_code &&
 		    pmu_dev && pmu_dev->fw_counter_match_encoding) {
 			if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs,
 								edata))
@@ -702,6 +738,9 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		/* Any firmware counter can be used track any firmware event */
 		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, event_code,
 					  hartid, event_data);
+		if (event_code == SBI_PMU_FW_PLATFORM)
+			fw_counters_data[hartid][ctr_idx - num_hw_ctrs] =
+								event_data;
 	} else {
 		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, flags, event_idx,
 					  event_data);
@@ -721,7 +760,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
 			fw_counters_data[hartid][ctr_idx - num_hw_ctrs] = 0;
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
-			if (SBI_PMU_FW_MAX <= event_code &&
+			if (SBI_PMU_FW_PLATFORM == event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
 				ret = pmu_dev->fw_counter_start(
 					ctr_idx - num_hw_ctrs, event_data,

From 57d3aa3b0dbd534ab702dce61767df0e9dc7577f Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:57 +0530
Subject: [PATCH 1239/1765] lib: sbi_pmu: Introduce fw_counter_write_value API

Add fw_counter_write_value API for platform specific firmware events
which separates setting the counter's initial value from starting the
counter. This is required so that the fw_event_data array can be reused
to save the event data received.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h | 11 ++++++++---
 lib/sbi/sbi_pmu.c     | 25 +++++++++++++------------
 2 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 3232e140ad7..53f27003a9e 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -51,14 +51,19 @@ struct sbi_pmu_device {
 	 */
 	uint64_t (*fw_counter_read_value)(uint32_t counter_index);
 
+	/**
+	 * Write value to custom firmware counter
+	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
+	 */
+	void (*fw_counter_write_value)(uint32_t counter_index,
+				       uint64_t value);
+
 	/**
 	 * Start custom firmware counter
-	 * Note: SBI_PMU_FW_MAX <= event_idx_code
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
 	int (*fw_counter_start)(uint32_t counter_index,
-				uint64_t event_data,
-				uint64_t init_val, bool init_val_update);
+				uint64_t event_data);
 
 	/**
 	 * Stop custom firmware counter
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index d0831985bb0..00a2c3e9244 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -376,7 +376,6 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 			    uint64_t event_data, uint64_t ival,
 			    bool ival_update)
 {
-	int ret;
 	u32 hartid = current_hartid();
 
 	if ((event_code >= SBI_PMU_FW_MAX &&
@@ -386,19 +385,22 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 
 	if (SBI_PMU_FW_PLATFORM == event_code) {
 		if (!pmu_dev ||
+		    !pmu_dev->fw_counter_write_value ||
 		    !pmu_dev->fw_counter_start) {
 			return SBI_EINVAL;
 		    }
 
-		ret = pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
-						event_data,
-						ival, ival_update);
-		if (ret)
-			return ret;
+		if (ival_update)
+			pmu_dev->fw_counter_write_value(cidx - num_hw_ctrs,
+							ival);
+
+		return pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
+						 event_data);
+	} else {
+		if (ival_update)
+			fw_counters_data[hartid][cidx - num_hw_ctrs] = ival;
 	}
 
-	if (ival_update)
-		fw_counters_data[hartid][cidx - num_hw_ctrs] = ival;
 	fw_counters_started[hartid] |= BIT(cidx - num_hw_ctrs);
 
 	return 0;
@@ -762,10 +764,9 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
 			if (SBI_PMU_FW_PLATFORM == event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
-				ret = pmu_dev->fw_counter_start(
-					ctr_idx - num_hw_ctrs, event_data,
-					fw_counters_data[hartid][ctr_idx - num_hw_ctrs],
-					true);
+				ret = pmu_dev->fw_counter_start(ctr_idx -
+								num_hw_ctrs,
+								event_data);
 				if (ret)
 					return ret;
 			}

From c631a7da279e735590231d2ae432fbc05743aa9e Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 9 Mar 2023 18:43:58 +0530
Subject: [PATCH 1240/1765] lib: sbi_pmu: Add hartid parameter PMU device ops

Platform specific firmware event handler may leverage the hartid to program
per hart specific registers for a given counter.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h | 14 ++++++++------
 lib/sbi/sbi_pmu.c     | 25 +++++++++++++++----------
 2 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 53f27003a9e..16f687733ba 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -31,13 +31,14 @@ struct sbi_pmu_device {
 	/**
 	 * Validate event code of custom firmware event
 	 */
-	int (*fw_event_validate_encoding)(uint64_t event_data);
+	int (*fw_event_validate_encoding)(uint32_t hartid, uint64_t event_data);
 
 	/**
 	 * Match custom firmware counter with custom firmware event
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	bool (*fw_counter_match_encoding)(uint32_t counter_index,
+	bool (*fw_counter_match_encoding)(uint32_t hartid,
+					  uint32_t counter_index,
 					  uint64_t event_data);
 
 	/**
@@ -49,27 +50,28 @@ struct sbi_pmu_device {
 	 * Read value of custom firmware counter
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	uint64_t (*fw_counter_read_value)(uint32_t counter_index);
+	uint64_t (*fw_counter_read_value)(uint32_t hartid,
+					  uint32_t counter_index);
 
 	/**
 	 * Write value to custom firmware counter
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	void (*fw_counter_write_value)(uint32_t counter_index,
+	void (*fw_counter_write_value)(uint32_t hartid, uint32_t counter_index,
 				       uint64_t value);
 
 	/**
 	 * Start custom firmware counter
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	int (*fw_counter_start)(uint32_t counter_index,
+	int (*fw_counter_start)(uint32_t hartid, uint32_t counter_index,
 				uint64_t event_data);
 
 	/**
 	 * Stop custom firmware counter
 	 * Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
 	 */
-	int (*fw_counter_stop)(uint32_t counter_index);
+	int (*fw_counter_stop)(uint32_t hartid, uint32_t counter_index);
 
 	/**
 	 * Custom enable irq for hardware counter
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 00a2c3e9244..74d69122efb 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -116,6 +116,7 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 	uint32_t event_idx_code = get_cidx_code(event_idx);
 	uint32_t event_idx_code_max = -1;
 	uint32_t cache_ops_result, cache_ops_id, cache_id;
+	u32 hartid = current_hartid();
 
 	switch(event_idx_type) {
 	case SBI_PMU_EVENT_TYPE_HW:
@@ -129,7 +130,8 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 
 		if (SBI_PMU_FW_PLATFORM == event_idx_code &&
 		    pmu_dev && pmu_dev->fw_event_validate_encoding)
-			return pmu_dev->fw_event_validate_encoding(edata);
+			return pmu_dev->fw_event_validate_encoding(hartid,
+							           edata);
 		else
 			event_idx_code_max = SBI_PMU_FW_MAX;
 		break;
@@ -199,7 +201,8 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 
 	if (SBI_PMU_FW_PLATFORM == event_code) {
 		if (pmu_dev && pmu_dev->fw_counter_read_value)
-			*cval = pmu_dev->fw_counter_read_value(cidx -
+			*cval = pmu_dev->fw_counter_read_value(hartid,
+							       cidx -
 							       num_hw_ctrs);
 		else
 			*cval = 0;
@@ -391,10 +394,11 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 		    }
 
 		if (ival_update)
-			pmu_dev->fw_counter_write_value(cidx - num_hw_ctrs,
+			pmu_dev->fw_counter_write_value(hartid,
+							cidx - num_hw_ctrs,
 							ival);
 
-		return pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
+		return pmu_dev->fw_counter_start(hartid, cidx - num_hw_ctrs,
 						 event_data);
 	} else {
 		if (ival_update)
@@ -467,6 +471,7 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 
 static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
 {
+	u32 hartid = current_hartid();
 	int ret;
 
 	if ((event_code >= SBI_PMU_FW_MAX &&
@@ -476,7 +481,7 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
 
 	if (SBI_PMU_FW_PLATFORM == event_code &&
 	    pmu_dev && pmu_dev->fw_counter_stop) {
-		ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs);
+		ret = pmu_dev->fw_counter_stop(hartid, cidx - num_hw_ctrs);
 		if (ret)
 			return ret;
 	}
@@ -697,8 +702,9 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
 			continue;
 		if (SBI_PMU_FW_PLATFORM == event_code &&
 		    pmu_dev && pmu_dev->fw_counter_match_encoding) {
-			if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs,
-								edata))
+			if (!pmu_dev->fw_counter_match_encoding(hartid,
+							    cidx - num_hw_ctrs,
+							    edata))
 				continue;
 		}
 
@@ -764,9 +770,8 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
 			if (SBI_PMU_FW_PLATFORM == event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
-				ret = pmu_dev->fw_counter_start(ctr_idx -
-								num_hw_ctrs,
-								event_data);
+				ret = pmu_dev->fw_counter_start(hartid,
+					ctr_idx - num_hw_ctrs, event_data);
 				if (ret)
 					return ret;
 			}

From d56049e299cce3bca2022903a5550acdc323d8a4 Mon Sep 17 00:00:00 2001
From: Evgenii Shatokhin <e.shatokhin@yadro.com>
Date: Mon, 6 Mar 2023 00:22:45 +0300
Subject: [PATCH 1241/1765] lib: sbi: Refactor the calls to
 sbi_hart_switch_mode()

Move them into sbi_hsm_hart_start_finish() and sbi_hsm_hart_resume_finish()
to make them easier to manage.

This will be used by subsequent patches.

Suggested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h |  6 ++++--
 lib/sbi/sbi_hsm.c     | 13 +++++++++++--
 lib/sbi/sbi_init.c    | 20 ++++++++------------
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index c0b483030de..4b5601ba40c 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -66,7 +66,8 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       u32 hartid, ulong saddr, ulong smode, ulong arg1);
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow);
 void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch);
-void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch);
+void __noreturn sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch,
+					   u32 hartid);
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 			 ulong raddr, ulong rmode, ulong arg1);
 bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
@@ -76,6 +77,7 @@ int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask);
 void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch);
-void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid);
+void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
+					  u32 hartid);
 
 #endif
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 3eeeb586cbb..100b8c0a669 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -110,7 +110,8 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 	return 0;
 }
 
-void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
+void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
+					  u32 hartid)
 {
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
@@ -118,6 +119,9 @@ void sbi_hsm_prepare_next_jump(struct sbi_scratch *scratch, u32 hartid)
 	if (!__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_START_PENDING,
 					 SBI_HSM_STATE_STARTED))
 		sbi_hart_hang();
+
+	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
+			     scratch->next_mode, false);
 }
 
 static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
@@ -381,7 +385,8 @@ void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch)
 	hsm_device_hart_resume();
 }
 
-void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
+void __noreturn sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch,
+					   u32 hartid)
 {
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
@@ -396,6 +401,10 @@ void sbi_hsm_hart_resume_finish(struct sbi_scratch *scratch)
 	 * the warm-boot sequence.
 	 */
 	__sbi_hsm_suspend_non_ret_restore(scratch);
+
+	sbi_hart_switch_mode(hartid, scratch->next_arg1,
+			     scratch->next_addr,
+			     scratch->next_mode, false);
 }
 
 int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index bc60a427935..dcca2c811e1 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -355,12 +355,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
-	sbi_hsm_prepare_next_jump(scratch, hartid);
-	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
-			     scratch->next_mode, false);
+	sbi_hsm_hart_start_finish(scratch, hartid);
 }
 
-static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
+static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
+					 u32 hartid)
 {
 	int rc;
 	unsigned long *init_count;
@@ -412,10 +411,11 @@ static void init_warm_startup(struct sbi_scratch *scratch, u32 hartid)
 	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*init_count)++;
 
-	sbi_hsm_prepare_next_jump(scratch, hartid);
+	sbi_hsm_hart_start_finish(scratch, hartid);
 }
 
-static void init_warm_resume(struct sbi_scratch *scratch)
+static void __noreturn init_warm_resume(struct sbi_scratch *scratch,
+					u32 hartid)
 {
 	int rc;
 
@@ -429,7 +429,7 @@ static void init_warm_resume(struct sbi_scratch *scratch)
 	if (rc)
 		sbi_hart_hang();
 
-	sbi_hsm_hart_resume_finish(scratch);
+	sbi_hsm_hart_resume_finish(scratch, hartid);
 }
 
 static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
@@ -443,13 +443,9 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 
 	if (hstate == SBI_HSM_STATE_SUSPENDED)
-		init_warm_resume(scratch);
+		init_warm_resume(scratch, hartid);
 	else
 		init_warm_startup(scratch, hartid);
-
-	sbi_hart_switch_mode(hartid, scratch->next_arg1,
-			     scratch->next_addr,
-			     scratch->next_mode, false);
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);

From e8e9ed3790feac05ec6fd5c279ec80b05293d67b Mon Sep 17 00:00:00 2001
From: Evgenii Shatokhin <e.shatokhin@yadro.com>
Date: Mon, 6 Mar 2023 00:22:46 +0300
Subject: [PATCH 1242/1765] lib: sbi: Set the state of a hart to START_PENDING
 after the hart is ready

When a boot hart executes sbi_hsm_hart_start() to start a secondary hart,
next_arg1, next_addr and next_mode for the latter are stored in the scratch
area after the state has been set to SBI_HSM_STATE_START_PENDING.

The secondary hart waits in the loop with wfi() in sbi_hsm_hart_wait() at
that time. However, "wfi" instruction is not guaranteed to wait for an
interrupt to be received by the hart, it is just a hint for the CPU.
According to RISC-V Privileged Architectures spec. v20211203, even an
implementation of "wfi" as "nop" is legal.

So, the secondary might leave the loop in sbi_hsm_hart_wait() as soon as
its state has been set to SBI_HSM_STATE_START_PENDING, even if it got no
IPI or it got an IPI unrelated to sbi_hsm_hart_start(). This could lead to
the following race condition when booting Linux, for example:

  Boot hart (#0)                        Secondary hart (#1)
  runs Linux startup code               waits in sbi_hsm_hart_wait()

  sbi_ecall(SBI_EXT_HSM,
            SBI_EXT_HSM_HART_START,
            ...)
  enters sbi_hsm_hart_start()
  sets state of hart #1 to START_PENDING
                                        leaves sbi_hsm_hart_wait()
                                        runs to the end of init_warmboot()
                                        returns to scratch->next_addr
                                        (next_addr can be garbage here)

  sets next_addr, etc. for hart #1
  (no good: hart #1 has already left)

  sends IPI to hart #1
  (no good either)

If this happens, the secondary hart jumps to a wrong next_addr at the end
of init_warmboot(), which leads to a system hang or crash.

To reproduce the issue more reliably, one could add a delay in
sbi_hsm_hart_start() after setting the hart's state but before sending
IPI to that hart:

    hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOPPED,
                            SBI_HSM_STATE_START_PENDING);
    ...
  + sbi_timer_mdelay(10);
    init_count = sbi_init_count(hartid);
    rscratch->next_arg1 = arg1;
    rscratch->next_addr = saddr;

The issue can be reproduced, for example, in a QEMU VM with '-machine virt'
and 2 or more CPUs, with Linux as the guest OS.

This patch moves writing of next_arg1, next_addr and next_mode for the
secondary hart before setting its state to SBI_HSM_STATE_START_PENDING.

In theory, it is possible that two or more harts enter sbi_hsm_hart_start()
for the same target hart simultaneously. To make sure the current hart has
exclusive access to the scratch area of the target hart at that point, a
per-hart 'start_ticket' is used. It is initially 0. The current hart tries
to acquire the ticket first (set it to 1) at the beginning of
sbi_hsm_hart_start() and only proceeds if it has successfully acquired it.

The target hart reads next_addr, etc., and then the releases the ticket
(sets it to 0) before calling sbi_hart_switch_mode(). This way, even if
some other hart manages to enter sbi_hsm_hart_start() after the ticket has
been released but before the target hart jumps to next_addr, it will not
cause problems.

atomic_cmpxchg() already has "acquire" semantics, among other things, so
no additional barriers are needed in hsm_start_ticket_acquire(). No hart
can perform or observe the update of *rscratch before setting of
'start_ticket' to 1.

atomic_write() only imposes ordering of writes, so an explicit barrier is
needed in hsm_start_ticket_release() to ensure its "release" semantics.
This guarantees that reads of scratch->next_addr, etc., in
sbi_hsm_hart_start_finish() cannot happen after 'start_ticket' has been
released.

Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 83 ++++++++++++++++++++++++++++++++++++++---------
 1 file changed, 67 insertions(+), 16 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 100b8c0a669..16e3846faef 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -44,6 +44,7 @@ struct sbi_hsm_data {
 	unsigned long suspend_type;
 	unsigned long saved_mie;
 	unsigned long saved_mip;
+	atomic_t start_ticket;
 };
 
 bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
@@ -75,6 +76,32 @@ int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 	return __sbi_hsm_hart_get_state(hartid);
 }
 
+/*
+ * Try to acquire the ticket for the given target hart to make sure only
+ * one hart prepares the start of the target hart.
+ * Returns true if the ticket has been acquired, false otherwise.
+ *
+ * The function has "acquire" semantics: no memory operations following it
+ * in the current hart can be seen before it by other harts.
+ * atomic_cmpxchg() provides the memory barriers needed for that.
+ */
+static bool hsm_start_ticket_acquire(struct sbi_hsm_data *hdata)
+{
+	return (atomic_cmpxchg(&hdata->start_ticket, 0, 1) == 0);
+}
+
+/*
+ * Release the ticket for the given target hart.
+ *
+ * The function has "release" semantics: no memory operations preceding it
+ * in the current hart can be seen after it by other harts.
+ */
+static void hsm_start_ticket_release(struct sbi_hsm_data *hdata)
+{
+	RISCV_FENCE(rw, w);
+	atomic_write(&hdata->start_ticket, 0);
+}
+
 /**
  * Get ulong HART mask for given HART base ID
  * @param dom the domain to be used for output HART mask
@@ -113,6 +140,9 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
 					  u32 hartid)
 {
+	unsigned long next_arg1;
+	unsigned long next_addr;
+	unsigned long next_mode;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
@@ -120,8 +150,12 @@ void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
 					 SBI_HSM_STATE_STARTED))
 		sbi_hart_hang();
 
-	sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
-			     scratch->next_mode, false);
+	next_arg1 = scratch->next_arg1;
+	next_addr = scratch->next_addr;
+	next_mode = scratch->next_mode;
+	hsm_start_ticket_release(hdata);
+
+	sbi_hart_switch_mode(hartid, next_arg1, next_addr, next_mode, false);
 }
 
 static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
@@ -226,6 +260,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 				    (i == hartid) ?
 				    SBI_HSM_STATE_START_PENDING :
 				    SBI_HSM_STATE_STOPPED);
+			ATOMIC_INIT(&hdata->start_ticket, 0);
 		}
 	} else {
 		sbi_hsm_hart_wait(scratch, hartid);
@@ -270,6 +305,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	unsigned int hstate;
 	struct sbi_scratch *rscratch;
 	struct sbi_hsm_data *hdata;
+	int rc;
 
 	/* For now, we only allow start mode to be S-mode or U-mode. */
 	if (smode != PRV_S && smode != PRV_U)
@@ -283,34 +319,49 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	rscratch = sbi_hartid_to_scratch(hartid);
 	if (!rscratch)
 		return SBI_EINVAL;
+
 	hdata = sbi_scratch_offset_ptr(rscratch, hart_data_offset);
+	if (!hsm_start_ticket_acquire(hdata))
+		return SBI_EINVAL;
+
+	init_count = sbi_init_count(hartid);
+	rscratch->next_arg1 = arg1;
+	rscratch->next_addr = saddr;
+	rscratch->next_mode = smode;
+
+	/*
+	 * atomic_cmpxchg() is an implicit barrier. It makes sure that
+	 * other harts see reading of init_count and writing to *rscratch
+	 * before hdata->state is set to SBI_HSM_STATE_START_PENDING.
+	 */
 	hstate = atomic_cmpxchg(&hdata->state, SBI_HSM_STATE_STOPPED,
 				SBI_HSM_STATE_START_PENDING);
-	if (hstate == SBI_HSM_STATE_STARTED)
-		return SBI_EALREADY;
+	if (hstate == SBI_HSM_STATE_STARTED) {
+		rc = SBI_EALREADY;
+		goto err;
+	}
 
 	/**
 	 * if a hart is already transition to start or stop, another start call
 	 * is considered as invalid request.
 	 */
-	if (hstate != SBI_HSM_STATE_STOPPED)
-		return SBI_EINVAL;
-
-	init_count = sbi_init_count(hartid);
-	rscratch->next_arg1 = arg1;
-	rscratch->next_addr = saddr;
-	rscratch->next_mode = smode;
+	if (hstate != SBI_HSM_STATE_STOPPED) {
+		rc = SBI_EINVAL;
+		goto err;
+	}
 
 	if (hsm_device_has_hart_hotplug() ||
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
-		return hsm_device_hart_start(hartid, scratch->warmboot_addr);
+		rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
-		int rc = sbi_ipi_raw_send(hartid);
-		if (rc)
-		    return rc;
+		rc = sbi_ipi_raw_send(hartid);
 	}
 
-	return 0;
+	if (!rc)
+		return 0;
+err:
+	hsm_start_ticket_release(hdata);
+	return rc;
 }
 
 int sbi_hsm_hart_stop(struct sbi_scratch *scratch, bool exitnow)

From c6a092cd80112529cb2e92e180767ff5341b22a3 Mon Sep 17 00:00:00 2001
From: Evgenii Shatokhin <e.shatokhin@yadro.com>
Date: Mon, 6 Mar 2023 00:22:47 +0300
Subject: [PATCH 1243/1765] lib: sbi: Clear IPIs before init_warm_startup in
 non-boot harts

Since commit 50d4fde1c5a4 ("lib: Remove redundant sbi_platform_ipi_clear()
calls"), the IPI sent from the boot hart in wake_coldboot_harts() is not
cleared in the secondary harts until they reach sbi_ipi_init(). However,
sbi_hsm_init() and sbi_hsm_hart_wait() are called earlier, so a secondary
hart might enter sbi_hsm_hart_wait() with an already pending IPI.

sbi_hsm_hart_wait() makes sure the hart leaves the loop only when it is
actually ready, so a pending unrelated IPI should not cause safety issues.
However, it might be inefficient on certain hardware, because it prevents
"wfi" from stalling the hart even if the hardware supports this, making the
hart needlessly spin in a "busy-wait" loop.

This behaviour can be observed, for example, in a QEMU VM (QEMU 7.2.0) with
"-machine virt" running a Linux guest. Inserting delays in
sbi_hsm_hart_start() allows reproducing the issue more reliably.

The comment in wait_for_coldboot() suggests that the initial IPI is needed
in the warm resume path, so let us clear it before init_warm_startup()
only.

To do this, sbi_ipi_raw_clear() was created similar to sbi_ipi_raw_send().

Signed-off-by: Evgenii Shatokhin <e.shatokhin@yadro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ipi.h | 2 ++
 lib/sbi/sbi_init.c    | 6 ++++--
 lib/sbi/sbi_ipi.c     | 6 ++++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index f6ac8072f68..f384e748672 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -77,6 +77,8 @@ void sbi_ipi_process(void);
 
 int sbi_ipi_raw_send(u32 target_hart);
 
+void sbi_ipi_raw_clear(u32 target_hart);
+
 const struct sbi_ipi_device *sbi_ipi_get_device(void);
 
 void sbi_ipi_set_device(const struct sbi_ipi_device *dev);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index dcca2c811e1..ffa214ca7ee 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -442,10 +442,12 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (hstate < 0)
 		sbi_hart_hang();
 
-	if (hstate == SBI_HSM_STATE_SUSPENDED)
+	if (hstate == SBI_HSM_STATE_SUSPENDED) {
 		init_warm_resume(scratch, hartid);
-	else
+	} else {
+		sbi_ipi_raw_clear(hartid);
 		init_warm_startup(scratch, hartid);
+	}
 }
 
 static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 1bcc2e40c90..b9f62056cb6 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -217,6 +217,12 @@ int sbi_ipi_raw_send(u32 target_hart)
 	return 0;
 }
 
+void sbi_ipi_raw_clear(u32 target_hart)
+{
+	if (ipi_dev && ipi_dev->ipi_clear)
+		ipi_dev->ipi_clear(target_hart);
+}
+
 const struct sbi_ipi_device *sbi_ipi_get_device(void)
 {
 	return ipi_dev;

From ed88a63b90249c570c7f1f123e979f6f5faf657a Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 9 Mar 2023 18:35:28 +0800
Subject: [PATCH 1244/1765] lib: sbi_scratch: Optimize the alignment code for
 alloc size

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_scratch.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 87b34c6d4de..55ebdbb76a8 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -59,8 +59,8 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size)
 	if (!size)
 		return 0;
 
-	if (size & (__SIZEOF_POINTER__ - 1))
-		size = (size & ~(__SIZEOF_POINTER__ - 1)) + __SIZEOF_POINTER__;
+	size += __SIZEOF_POINTER__ - 1;
+	size &= ~((unsigned long)__SIZEOF_POINTER__ - 1);
 
 	spin_lock(&extra_lock);
 

From 73ab11dfb0bfaa2f7792cf10804c04c157dc2291 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 16 Mar 2023 20:11:11 +0800
Subject: [PATCH 1245/1765] lib: sbi: Fix how to check whether the domain
 contains fw_region

Because firmware is split into rw/rx segments, it cannot be recorded
by a root_fw_region. This problem is solved by adding a flag
fw_region_inited to sbi_domain.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h   |  2 ++
 lib/sbi/sbi_domain.c       | 30 +++++++++---------------------
 lib/utils/fdt/fdt_domain.c |  1 +
 3 files changed, 12 insertions(+), 21 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index eaca7f09327..124ea90b9db 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -122,6 +122,8 @@ struct sbi_domain {
 	bool system_reset_allowed;
 	/** Is domain allowed to suspend the system */
 	bool system_suspend_allowed;
+	/** Identifies whether to include the firmware region */
+	bool fw_region_inited;
 };
 
 /** The root domain instance */
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4d7b80a3ddd..67b87f3043c 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -30,7 +30,6 @@ static struct sbi_hartmask root_hmask = { 0 };
 
 #define ROOT_REGION_MAX	16
 static u32 root_memregs_count = 0;
-static struct sbi_domain_memregion root_fw_region;
 static struct sbi_domain_memregion root_memregs[ROOT_REGION_MAX + 1] = { 0 };
 
 struct sbi_domain root = {
@@ -39,6 +38,7 @@ struct sbi_domain root = {
 	.regions = root_memregs,
 	.system_reset_allowed = true,
 	.system_suspend_allowed = true,
+	.fw_region_inited = false,
 };
 
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
@@ -69,14 +69,6 @@ ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 	return ret;
 }
 
-static void domain_memregion_initfw(struct sbi_domain_memregion *reg)
-{
-	if (!reg)
-		return;
-
-	sbi_memcpy(reg, &root_fw_region, sizeof(*reg));
-}
-
 void sbi_domain_memregion_init(unsigned long addr,
 				unsigned long size,
 				unsigned long flags,
@@ -255,7 +247,6 @@ static int sanitize_domain(const struct sbi_platform *plat,
 			   struct sbi_domain *dom)
 {
 	u32 i, j, count;
-	bool have_fw_reg;
 	struct sbi_domain_memregion treg, *reg, *reg1;
 
 	/* Check possible HARTs */
@@ -288,17 +279,13 @@ static int sanitize_domain(const struct sbi_platform *plat,
 		}
 	}
 
-	/* Count memory regions and check presence of firmware region */
+	/* Count memory regions */
 	count = 0;
-	have_fw_reg = false;
-	sbi_domain_for_each_memregion(dom, reg) {
-		if (reg->order == root_fw_region.order &&
-		    reg->base == root_fw_region.base &&
-		    reg->flags == root_fw_region.flags)
-			have_fw_reg = true;
+	sbi_domain_for_each_memregion(dom, reg)
 		count++;
-	}
-	if (!have_fw_reg) {
+
+	/* Check presence of firmware regions */
+	if (!dom->fw_region_inited) {
 		sbi_printf("%s: %s does not have firmware region\n",
 			   __func__, dom->name);
 		return SBI_EINVAL;
@@ -732,8 +719,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_rw_offset,
 				  (SBI_DOMAIN_MEMREGION_M_READABLE |
 				   SBI_DOMAIN_MEMREGION_M_EXECUTABLE),
-				  &root_fw_region);
-	domain_memregion_initfw(&root_memregs[root_memregs_count++]);
+				  &root_memregs[root_memregs_count++]);
 
 	sbi_domain_memregion_init((scratch->fw_start + scratch->fw_rw_offset),
 				  (scratch->fw_size - scratch->fw_rw_offset),
@@ -741,6 +727,8 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 				   SBI_DOMAIN_MEMREGION_M_WRITABLE),
 				  &root_memregs[root_memregs_count++]);
 
+	root.fw_region_inited = true;
+
 	/* Root domain allow everything memory region */
 	sbi_domain_memregion_init(0, ~0UL,
 				  (SBI_DOMAIN_MEMREGION_READABLE |
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index adcb94b6413..bb6d17d29fd 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -358,6 +358,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			return SBI_EINVAL;
 		memcpy(&regions[val32++], reg, sizeof(*reg));
 	}
+	dom->fw_region_inited = root.fw_region_inited;
 
 	/* Read "boot-hart" DT property */
 	val32 = -1U;

From f64dfcd2b5e78e9eea3fe3fee58e0632b5f81b99 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 20 Mar 2023 18:52:02 +0530
Subject: [PATCH 1246/1765] lib: sbi: Introduce sbi_entry_count() function

We introduce sbi_entry_count() function which counts the number
of times a HART enters OpenSBI via cold-boot or warm-boot path.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_init.h |  2 ++
 lib/sbi/sbi_init.c     | 42 +++++++++++++++++++++++++++++++++++-------
 2 files changed, 37 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index 74eb1c07599..9640fee9143 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -16,6 +16,8 @@ struct sbi_scratch;
 
 void __noreturn sbi_init(struct sbi_scratch *scratch);
 
+unsigned long sbi_entry_count(u32 hartid);
+
 unsigned long sbi_init_count(u32 hartid);
 
 void __noreturn sbi_exit(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index ffa214ca7ee..f184248d0a9 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -238,12 +238,13 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	spin_unlock(&coldboot_lock);
 }
 
+static unsigned long entry_count_offset;
 static unsigned long init_count_offset;
 
 static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int rc;
-	unsigned long *init_count;
+	unsigned long *count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	/* Note: This has to be first thing in coldboot init sequence */
@@ -256,10 +257,17 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	entry_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__);
+	if (!entry_count_offset)
+		sbi_hart_hang();
+
 	init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__);
 	if (!init_count_offset)
 		sbi_hart_hang();
 
+	count = sbi_scratch_offset_ptr(scratch, entry_count_offset);
+	(*count)++;
+
 	rc = sbi_hsm_init(scratch, hartid, true);
 	if (rc)
 		sbi_hart_hang();
@@ -352,8 +360,8 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	wake_coldboot_harts(scratch, hartid);
 
-	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
-	(*init_count)++;
+	count = sbi_scratch_offset_ptr(scratch, init_count_offset);
+	(*count)++;
 
 	sbi_hsm_hart_start_finish(scratch, hartid);
 }
@@ -362,12 +370,15 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 					 u32 hartid)
 {
 	int rc;
-	unsigned long *init_count;
+	unsigned long *count;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (!init_count_offset)
+	if (!entry_count_offset || !init_count_offset)
 		sbi_hart_hang();
 
+	count = sbi_scratch_offset_ptr(scratch, entry_count_offset);
+	(*count)++;
+
 	rc = sbi_hsm_init(scratch, hartid, false);
 	if (rc)
 		sbi_hart_hang();
@@ -408,8 +419,8 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
-	(*init_count)++;
+	count = sbi_scratch_offset_ptr(scratch, init_count_offset);
+	(*count)++;
 
 	sbi_hsm_hart_start_finish(scratch, hartid);
 }
@@ -521,6 +532,23 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 		init_warmboot(scratch, hartid);
 }
 
+unsigned long sbi_entry_count(u32 hartid)
+{
+	struct sbi_scratch *scratch;
+	unsigned long *entry_count;
+
+	if (!entry_count_offset)
+		return 0;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return 0;
+
+	entry_count = sbi_scratch_offset_ptr(scratch, entry_count_offset);
+
+	return *entry_count;
+}
+
 unsigned long sbi_init_count(u32 hartid)
 {
 	struct sbi_scratch *scratch;

From 30b9e7ee14498e5db805f471dbb23ea67c7a3b32 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 20 Mar 2023 18:58:54 +0530
Subject: [PATCH 1247/1765] lib: sbi_hsm: Fix sbi_hsm_hart_start() for platform
 with hart hotplug

It possible that a platform supports hart hotplug (i.e. both hart_start
and hart_stop callbacks available) and all harts are start simultaneously
at platform boot-time. In this situation, the sbi_hsm_hart_start() will
call hsm_device_hart_start() for secondary harts at platform boot-time
which will fail because secondary harts were already started.

To fix above, we call hsm_device_hart_start() from sbi_hsm_hart_start()
only when entry_count is same as init_count for the secondary hart.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_hsm.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 16e3846faef..b2614105096 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -301,7 +301,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       const struct sbi_domain *dom,
 		       u32 hartid, ulong saddr, ulong smode, ulong arg1)
 {
-	unsigned long init_count;
+	unsigned long init_count, entry_count;
 	unsigned int hstate;
 	struct sbi_scratch *rscratch;
 	struct sbi_hsm_data *hdata;
@@ -325,6 +325,8 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		return SBI_EINVAL;
 
 	init_count = sbi_init_count(hartid);
+	entry_count = sbi_entry_count(hartid);
+
 	rscratch->next_arg1 = arg1;
 	rscratch->next_addr = saddr;
 	rscratch->next_mode = smode;
@@ -350,7 +352,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		goto err;
 	}
 
-	if (hsm_device_has_hart_hotplug() ||
+	if ((hsm_device_has_hart_hotplug() && (entry_count == init_count)) ||
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
 		rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {

From 8e90259da8b4b5bc6c934506cc4302578d44dbc2 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Sat, 25 Mar 2023 22:20:47 +0530
Subject: [PATCH 1248/1765] lib: sbi_hart: clear mip csr during hart init

If mip.SEIP bit is not cleared then on HiFive Unmatched board it causes
spurious external interrupts. This breaks the boot up of HiFive Unmatched
board. Hence it is required to bring the mip CSR to a known state during
hart init and avoid spurious interrupts.

Fixes: d9e7368 ("firmware: Not to clear all the MIP")
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 7 -------
 lib/sbi/sbi_hart.c | 6 ++++++
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ceef44f26b1..5a3e89485a8 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -430,13 +430,6 @@ _start_warm:
 
 	/* Disable all interrupts */
 	csrw	CSR_MIE, zero
-	/*
-	 * Only clear the MIP_SSIP and MIP_STIP. For the platform like QEMU,
-	 * If we clear other interrupts like MIP_SEIP and the pendings of
-	 * PLIC still exist, the QEMU may not set it back immediately.
-	 */
-	li	t0, (MIP_SSIP | MIP_STIP)
-	csrc	CSR_MIP, t0
 
 	/* Find HART count and HART stack size */
 	lla	a4, platform
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 5e06918c7a4..6e52cbd76d8 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -733,6 +733,12 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int rc;
 
+	/*
+	 * Clear mip CSR before proceeding with init to avoid any spurious
+	 * external interrupts in S-mode.
+	 */
+	csr_write(CSR_MIP, 0);
+
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;

From 45ba2b203cc38ebfd634dc42c1dd3a2d380a8899 Mon Sep 17 00:00:00 2001
From: Sunil V L <sunilvl@ventanamicro.com>
Date: Wed, 29 Mar 2023 14:27:25 +0530
Subject: [PATCH 1249/1765] include: Add defines for SBI CPPC extension

Add SBI CPPC extension related defines to the
SBI ecall interface header.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 34 +++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 459735807f1..dee2dd9681c 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -31,6 +31,7 @@
 #define SBI_EXT_PMU				0x504D55
 #define SBI_EXT_DBCN				0x4442434E
 #define SBI_EXT_SUSP				0x53555350
+#define SBI_EXT_CPPC				0x43505043
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -256,6 +257,39 @@ enum sbi_pmu_ctr_type {
 #define SBI_SUSP_SLEEP_TYPE_LAST		SBI_SUSP_SLEEP_TYPE_SUSPEND
 #define SBI_SUSP_PLATFORM_SLEEP_START		0x80000000
 
+/* SBI function IDs for CPPC extension */
+#define SBI_EXT_CPPC_PROBE			0x0
+#define SBI_EXT_CPPC_READ			0x1
+#define SBI_EXT_CPPC_READ_HI			0x2
+#define SBI_EXT_CPPC_WRITE			0x3
+
+enum sbi_cppc_reg_id {
+	SBI_CPPC_HIGHEST_PERF		= 0x00000000,
+	SBI_CPPC_NOMINAL_PERF		= 0x00000001,
+	SBI_CPPC_LOW_NON_LINEAR_PERF	= 0x00000002,
+	SBI_CPPC_LOWEST_PERF		= 0x00000003,
+	SBI_CPPC_GUARANTEED_PERF	= 0x00000004,
+	SBI_CPPC_DESIRED_PERF		= 0x00000005,
+	SBI_CPPC_MIN_PERF		= 0x00000006,
+	SBI_CPPC_MAX_PERF		= 0x00000007,
+	SBI_CPPC_PERF_REDUC_TOLERANCE	= 0x00000008,
+	SBI_CPPC_TIME_WINDOW		= 0x00000009,
+	SBI_CPPC_CTR_WRAP_TIME		= 0x0000000A,
+	SBI_CPPC_REFERENCE_CTR		= 0x0000000B,
+	SBI_CPPC_DELIVERED_CTR		= 0x0000000C,
+	SBI_CPPC_PERF_LIMITED		= 0x0000000D,
+	SBI_CPPC_ENABLE			= 0x0000000E,
+	SBI_CPPC_AUTO_SEL_ENABLE	= 0x0000000F,
+	SBI_CPPC_AUTO_ACT_WINDOW	= 0x00000010,
+	SBI_CPPC_ENERGY_PERF_PREFERENCE	= 0x00000011,
+	SBI_CPPC_REFERENCE_PERF		= 0x00000012,
+	SBI_CPPC_LOWEST_FREQ		= 0x00000013,
+	SBI_CPPC_NOMINAL_FREQ		= 0x00000014,
+	SBI_CPPC_ACPI_LAST		= SBI_CPPC_NOMINAL_FREQ,
+	SBI_CPPC_TRANSITION_LATENCY	= 0x80000000,
+	SBI_CPPC_NON_ACPI_LAST		= SBI_CPPC_TRANSITION_LATENCY,
+};
+
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f

From 33caae8069f4205861445f58095bcecb814be881 Mon Sep 17 00:00:00 2001
From: Sunil V L <sunilvl@ventanamicro.com>
Date: Wed, 29 Mar 2023 14:27:26 +0530
Subject: [PATCH 1250/1765] lib: sbi: Implement SBI CPPC extension

Implement SBI CPPC extension. This extension is only available when
OpenSBI platform provides a CPPC device to generic library.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_cppc.h   |  35 +++++++++++++
 lib/sbi/Kconfig          |   4 ++
 lib/sbi/objects.mk       |   4 ++
 lib/sbi/sbi_cppc.c       | 110 +++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_ecall_cppc.c |  63 ++++++++++++++++++++++
 5 files changed, 216 insertions(+)
 create mode 100644 include/sbi/sbi_cppc.h
 create mode 100644 lib/sbi/sbi_cppc.c
 create mode 100644 lib/sbi/sbi_ecall_cppc.c

diff --git a/include/sbi/sbi_cppc.h b/include/sbi/sbi_cppc.h
new file mode 100644
index 00000000000..edf73f52ac0
--- /dev/null
+++ b/include/sbi/sbi_cppc.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ */
+
+#ifndef __SBI_CPPC_H__
+#define __SBI_CPPC_H__
+
+#include <sbi/sbi_types.h>
+
+/** CPPC device */
+struct sbi_cppc_device {
+	/** Name of the CPPC device */
+	char name[32];
+
+	/** probe - returns register width if implemented, 0 otherwise */
+	int (*cppc_probe)(unsigned long reg);
+
+	/** read the cppc register*/
+	int (*cppc_read)(unsigned long reg, uint64_t *val);
+
+	/** write to the cppc register*/
+	int (*cppc_write)(unsigned long reg, uint64_t val);
+};
+
+int sbi_cppc_probe(unsigned long reg);
+int sbi_cppc_read(unsigned long reg, uint64_t *val);
+int sbi_cppc_write(unsigned long reg, uint64_t val);
+
+const struct sbi_cppc_device *sbi_cppc_get_device(void);
+void sbi_cppc_set_device(const struct sbi_cppc_device *dev);
+
+#endif
diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index 7eb3273d546..477775e21ea 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -34,6 +34,10 @@ config SBI_ECALL_DBCN
 	bool "Debug Console extension"
 	default y
 
+config SBI_ECALL_CPPC
+	bool "CPPC extension"
+	default y
+
 config SBI_ECALL_LEGACY
 	bool "SBI v0.1 legacy extensions"
 	default y
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 770238b25fa..7d691c61f0e 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -43,6 +43,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_PMU) += sbi_ecall_pmu.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_DBCN) += ecall_dbcn
 libsbi-objs-$(CONFIG_SBI_ECALL_DBCN) += sbi_ecall_dbcn.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_CPPC) += ecall_cppc
+libsbi-objs-$(CONFIG_SBI_ECALL_CPPC) += sbi_ecall_cppc.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
 libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
 
@@ -74,3 +77,4 @@ libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_unpriv.o
 libsbi-objs-y += sbi_expected_trap.o
+libsbi-objs-y += sbi_cppc.o
diff --git a/lib/sbi/sbi_cppc.c b/lib/sbi/sbi_cppc.c
new file mode 100644
index 00000000000..afb60b332c2
--- /dev/null
+++ b/lib/sbi/sbi_cppc.c
@@ -0,0 +1,110 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_cppc.h>
+
+static const struct sbi_cppc_device *cppc_dev = NULL;
+
+const struct sbi_cppc_device *sbi_cppc_get_device(void)
+{
+	return cppc_dev;
+}
+
+void sbi_cppc_set_device(const struct sbi_cppc_device *dev)
+{
+	if (!dev || cppc_dev)
+		return;
+
+	cppc_dev = dev;
+}
+
+static bool sbi_cppc_is_reserved(unsigned long reg)
+{
+	if ((reg > SBI_CPPC_ACPI_LAST && reg < SBI_CPPC_TRANSITION_LATENCY) ||
+	    reg > SBI_CPPC_NON_ACPI_LAST)
+		return true;
+
+	return false;
+}
+
+static bool sbi_cppc_readable(unsigned long reg)
+{
+	/* there are no write-only cppc registers currently */
+	return true;
+}
+
+static bool sbi_cppc_writable(unsigned long reg)
+{
+	switch (reg) {
+	case SBI_CPPC_HIGHEST_PERF:
+	case SBI_CPPC_NOMINAL_PERF:
+	case SBI_CPPC_LOW_NON_LINEAR_PERF:
+	case SBI_CPPC_LOWEST_PERF:
+	case SBI_CPPC_GUARANTEED_PERF:
+	case SBI_CPPC_CTR_WRAP_TIME:
+	case SBI_CPPC_REFERENCE_CTR:
+	case SBI_CPPC_DELIVERED_CTR:
+	case SBI_CPPC_REFERENCE_PERF:
+	case SBI_CPPC_LOWEST_FREQ:
+	case SBI_CPPC_NOMINAL_FREQ:
+	case SBI_CPPC_TRANSITION_LATENCY:
+		return false;
+	}
+
+	return true;
+}
+
+int sbi_cppc_probe(unsigned long reg)
+{
+	if (!cppc_dev || !cppc_dev->cppc_probe)
+		return SBI_EFAIL;
+
+	/* Check whether register is reserved */
+	if (sbi_cppc_is_reserved(reg))
+		return SBI_ERR_INVALID_PARAM;
+
+	return cppc_dev->cppc_probe(reg);
+}
+
+int sbi_cppc_read(unsigned long reg, uint64_t *val)
+{
+	int ret;
+
+	if (!cppc_dev || !cppc_dev->cppc_read)
+		return SBI_EFAIL;
+
+	/* Check whether register is implemented */
+	ret = sbi_cppc_probe(reg);
+	if (ret <= 0)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	/* Check whether the register is write-only */
+	if (!sbi_cppc_readable(reg))
+		return SBI_ERR_DENIED;
+
+	return cppc_dev->cppc_read(reg, val);
+}
+
+int sbi_cppc_write(unsigned long reg, uint64_t val)
+{
+	int ret;
+
+	if (!cppc_dev || !cppc_dev->cppc_write)
+		return SBI_EFAIL;
+
+	/* Check whether register is implemented */
+	ret = sbi_cppc_probe(reg);
+	if (ret <= 0)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	/* Check whether the register is read-only */
+	if (!sbi_cppc_writable(reg))
+		return SBI_ERR_DENIED;
+
+	return cppc_dev->cppc_write(reg, val);
+}
diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
new file mode 100644
index 00000000000..91585f3b74e
--- /dev/null
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -0,0 +1,63 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_cppc.h>
+
+static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_val,
+				  struct sbi_trap_info *out_trap)
+{
+	int ret = 0;
+	uint64_t temp;
+
+	switch (funcid) {
+	case SBI_EXT_CPPC_READ:
+		ret = sbi_cppc_read(regs->a0, &temp);
+		*out_val = temp;
+		break;
+	case SBI_EXT_CPPC_READ_HI:
+#if __riscv_xlen == 32
+		ret = sbi_cppc_read(regs->a0, &temp);
+		*out_val = temp >> 32;
+#else
+		*out_val = 0;
+#endif
+		break;
+	case SBI_EXT_CPPC_WRITE:
+		ret = sbi_cppc_write(regs->a0, regs->a1);
+		break;
+	case SBI_EXT_CPPC_PROBE:
+		ret = sbi_cppc_probe(regs->a0);
+		if (ret >= 0) {
+			*out_val = ret;
+			ret = 0;
+		}
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	}
+
+	return ret;
+}
+
+static int sbi_ecall_cppc_probe(unsigned long extid, unsigned long *out_val)
+{
+	*out_val = sbi_cppc_get_device() ? 1 : 0;
+	return 0;
+}
+
+struct sbi_ecall_extension ecall_cppc = {
+	.extid_start	= SBI_EXT_CPPC,
+	.extid_end	= SBI_EXT_CPPC,
+	.handle		= sbi_ecall_cppc_handler,
+	.probe		= sbi_ecall_cppc_probe,
+};

From 91767d093bf76c169c61194dd3ea7bbec1fc13f6 Mon Sep 17 00:00:00 2001
From: Sunil V L <sunilvl@ventanamicro.com>
Date: Wed, 29 Mar 2023 14:27:27 +0530
Subject: [PATCH 1251/1765] lib: sbi: Print the CPPC device name

If CPPC device is registered by the platform, print its name.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index f184248d0a9..a0313367117 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_barrier.h>
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_cppc.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
@@ -70,6 +71,7 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	const struct sbi_console_device *cdev;
 	const struct sbi_system_reset_device *srdev;
 	const struct sbi_system_suspend_device *susp_dev;
+	const struct sbi_cppc_device *cppc_dev;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS)
@@ -107,6 +109,9 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	susp_dev = sbi_system_suspend_get_device();
 	sbi_printf("Platform Suspend Device   : %s\n",
 		   (susp_dev) ? susp_dev->name : "---");
+	cppc_dev = sbi_cppc_get_device();
+	sbi_printf("Platform CPPC Device      : %s\n",
+		   (cppc_dev) ? cppc_dev->name : "---");
 
 	/* Firmware details */
 	sbi_printf("Firmware Base             : 0x%lx\n", scratch->fw_start);

From edc9914392791031df624a7c79d1706f83199666 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Mar 2023 16:41:14 +0800
Subject: [PATCH 1252/1765] lib: sbi_pmu: Align the event type offset as per
 SBI specification

The bits encoded in event_idx[19:16] indicate the event type, with
an offset of 16 instead of 20.

Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_ecall_interface.h | 4 ++--
 lib/sbi/sbi_pmu.c                 | 7 ++++---
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index dee2dd9681c..1fe469e3707 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -215,10 +215,10 @@ enum sbi_pmu_ctr_type {
 };
 
 /* Helper macros to decode event idx */
-#define SBI_PMU_EVENT_IDX_OFFSET 20
 #define SBI_PMU_EVENT_IDX_MASK 0xFFFFF
+#define SBI_PMU_EVENT_IDX_TYPE_OFFSET 16
+#define SBI_PMU_EVENT_IDX_TYPE_MASK (0xF << SBI_PMU_EVENT_IDX_TYPE_OFFSET)
 #define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF
-#define SBI_PMU_EVENT_IDX_TYPE_MASK 0xF0000
 #define SBI_PMU_EVENT_RAW_IDX 0x20000
 
 #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 74d69122efb..04259aeb24e 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -81,7 +81,8 @@ static uint32_t num_hw_ctrs;
 static uint32_t total_ctrs;
 
 /* Helper macros to retrieve event idx and code type */
-#define get_cidx_type(x) ((x & SBI_PMU_EVENT_IDX_TYPE_MASK) >> 16)
+#define get_cidx_type(x) \
+  (((x) & SBI_PMU_EVENT_IDX_TYPE_MASK) >> SBI_PMU_EVENT_IDX_TYPE_OFFSET)
 #define get_cidx_code(x) (x & SBI_PMU_EVENT_IDX_CODE_MASK)
 
 /**
@@ -903,10 +904,10 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 	pmu_reset_event_map(hartid);
 
 	/* First three counters are fixed by the priv spec and we enable it by default */
-	active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET |
+	active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
 				   SBI_PMU_HW_CPU_CYCLES;
 	active_events[hartid][1] = SBI_PMU_EVENT_IDX_INVALID;
-	active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_OFFSET |
+	active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
 				   SBI_PMU_HW_INSTRUCTIONS;
 
 	return 0;

From ee016a7bb098578a5d0d4bde01259fe3cd57b02f Mon Sep 17 00:00:00 2001
From: Gabriel Somlo <gsomlo@gmail.com>
Date: Thu, 30 Mar 2023 16:25:30 -0400
Subject: [PATCH 1253/1765] docs: Correct FW_JUMP_FDT_ADDR calculation example

When using `PLATFORM=generic` defaults, the kernel is loaded at
`FW_JUMP_ADDR`, and the FDT is loaded at `FW_JUMP_FDT_ADDR.

Therefore, the maximum kernel size before `FW_JUMP_FDT_ADDR` must
be increased is `$(( FW_JUMP_FDT_ADDR - FW_JUMP_ADDR ))`.

The example calculation assumes `rv64`, and is wrong to boot
(off by 0x200000). Fix it and update it for the general case.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 docs/firmware/fw_jump.md | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 956897e7e7c..3e883fa814f 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -43,18 +43,18 @@ follows:
 
   When using the default *FW_JUMP_FDT_ADDR* with *PLATFORM=generic*, you must
   ensure *FW_JUMP_FDT_ADDR* is set high enough to avoid overwriting the kernel.
-  You can use the following method.
+  You can use the following method (e.g., using bash or zsh):
 
   ```
-  ${CROSS_COMPILE}objdump -h $KERNEL_ELF | sort -k 5,5 | awk -n '/^ +[0-9]+ /\
-  {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}' \
-  | (( `tail -1` > 0x2200000 )) && echo fdt overlaps kernel,\
-  increase FW_JUMP_FDT_ADDR
-
-  ${LLVM}objdump -h --show-lma $KERNEL_ELF | sort -k 5,5 | \
-  awk -n '/^ +[0-9]+ / {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}'\
-  | (( `tail -1` > 0x2200000 )) && echo fdt overlaps kernel,\
-  increase FW_JUMP_FDT_ADDR
+  ${CROSS_COMPILE}objdump -h $KERNEL_ELF | sort -k 5,5 | awk -n '
+  /^ +[0-9]+ / {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}' |
+  (( `tail -1` > (FW_JUMP_FDT_ADDR - FW_JUMP_ADDR) )) &&
+  echo fdt overlaps kernel, increase FW_JUMP_FDT_ADDR
+
+  ${LLVM}objdump -h --show-lma $KERNEL_ELF | sort -k 5,5 | awk -n '
+  /^ +[0-9]+ / {addr="0x"$3; size="0x"$5; printf "0x""%x\n",addr+size}' |
+  (( `tail -1` > (FW_JUMP_FDT_ADDR - FW_JUMP_ADDR) )) &&
+  echo fdt overlaps kernel, increase FW_JUMP_FDT_ADDR
   ```
 
 *FW_JUMP* Example

From 2868f26131308ff345382084681ea89c5b0159f1 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 31 Mar 2023 15:15:15 +0200
Subject: [PATCH 1254/1765] lib: utils: fdt_fixup: avoid buffer overrun

fdt_reserved_memory_fixup() uses filtered_order[PMP_COUNT]. The index
must not reach PMP_COUNT.

Fixes: 199189bd1c17 ("lib: utils: Mark only the largest region as reserved in FDT")
Addresses-Coverity-ID: 1536994 ("Out-of-bounds write")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_fixup.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index c10179b900c..ae6be008579 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -355,7 +355,7 @@ int fdt_reserved_memory_fixup(void *fdt)
 		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
 			continue;
 
-		if (i > PMP_COUNT) {
+		if (i >= PMP_COUNT) {
 			sbi_printf("%s: Too many memory regions to fixup.\n",
 				   __func__);
 			return SBI_ENOSPC;

From 66fa925353a133173e4f51a5ba247ee3e1a5943c Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Apr 2023 12:56:18 +0800
Subject: [PATCH 1255/1765] lib: sbi: Optimize sbi_tlb

Originally, the process and sync of sbi_tlb need to wait for each other.
Evasion by atomic addition and subtraction.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_tlb.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 4c142ea3e66..d950c4520ae 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -215,7 +215,7 @@ static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
 	u32 rhartid;
 	struct sbi_scratch *rscratch = NULL;
-	unsigned long *rtlb_sync = NULL;
+	atomic_t *rtlb_sync = NULL;
 
 	tinfo->local_fn(tinfo);
 
@@ -225,7 +225,7 @@ static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 			continue;
 
 		rtlb_sync = sbi_scratch_offset_ptr(rscratch, tlb_sync_off);
-		while (atomic_raw_xchg_ulong(rtlb_sync, 1)) ;
+		atomic_sub_return(rtlb_sync, 1);
 	}
 }
 
@@ -257,10 +257,10 @@ static void tlb_process(struct sbi_scratch *scratch)
 
 static void tlb_sync(struct sbi_scratch *scratch)
 {
-	unsigned long *tlb_sync =
+	atomic_t *tlb_sync =
 			sbi_scratch_offset_ptr(scratch, tlb_sync_off);
 
-	while (!atomic_raw_xchg_ulong(tlb_sync, 0)) {
+	while (atomic_read(tlb_sync) > 0) {
 		/*
 		 * While we are waiting for remote hart to set the sync,
 		 * consume fifo requests to avoid deadlock.
@@ -343,6 +343,7 @@ static int tlb_update(struct sbi_scratch *scratch,
 			  u32 remote_hartid, void *data)
 {
 	int ret;
+	atomic_t *tlb_sync;
 	struct sbi_fifo *tlb_fifo_r;
 	struct sbi_tlb_info *tinfo = data;
 	u32 curr_hartid = current_hartid();
@@ -369,11 +370,8 @@ static int tlb_update(struct sbi_scratch *scratch,
 	tlb_fifo_r = sbi_scratch_offset_ptr(remote_scratch, tlb_fifo_off);
 
 	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, tlb_update_cb);
-	if (ret != SBI_FIFO_UNCHANGED) {
-		return 1;
-	}
 
-	while (sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
+	while (ret == SBI_FIFO_UNCHANGED && sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
 		/**
 		 * For now, Busy loop until there is space in the fifo.
 		 * There may be case where target hart is also
@@ -387,6 +385,9 @@ static int tlb_update(struct sbi_scratch *scratch,
 			    curr_hartid, remote_hartid);
 	}
 
+	tlb_sync = sbi_scratch_offset_ptr(scratch, tlb_sync_off);
+	atomic_add_return(tlb_sync, 1);
+
 	return 0;
 }
 
@@ -413,7 +414,7 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int ret;
 	void *tlb_mem;
-	unsigned long *tlb_sync;
+	atomic_t *tlb_sync;
 	struct sbi_fifo *tlb_q;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
@@ -455,7 +456,7 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 	tlb_q = sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 	tlb_mem = sbi_scratch_offset_ptr(scratch, tlb_fifo_mem_off);
 
-	*tlb_sync = 0;
+	ATOMIC_INIT(tlb_sync, 0);
 
 	sbi_fifo_init(tlb_q, tlb_mem,
 		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);

From 24dde46b8df0830174580919d49c21160d7d9fce Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Apr 2023 12:56:19 +0800
Subject: [PATCH 1256/1765] lib: sbi: Optimize sbi_ipi

The original sbi_ipi will be processed by hart by hart, after optimization,
send ipi first and finally wait together.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ipi.c | 34 ++++++++++++++++++++++++++++++++--
 1 file changed, 32 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index b9f62056cb6..24d8a93a0b9 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -69,6 +69,18 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
 
+	return 0;
+}
+
+static int sbi_ipi_sync(struct sbi_scratch *scratch, u32 event)
+{
+	const struct sbi_ipi_event_ops *ipi_ops;
+
+	if ((SBI_IPI_EVENT_MAX <= event) ||
+	    !ipi_ops_array[event])
+		return SBI_EINVAL;
+	ipi_ops = ipi_ops_array[event];
+
 	if (ipi_ops->sync)
 		ipi_ops->sync(scratch);
 
@@ -83,7 +95,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
-	ulong i, m;
+	ulong i, m, n;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
@@ -92,22 +104,40 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 		if (rc)
 			return rc;
 		m &= hmask;
+		n = m;
 
 		/* Send IPIs */
 		for (i = hbase; m; i++, m >>= 1) {
 			if (m & 1UL)
 				sbi_ipi_send(scratch, i, event, data);
 		}
+
+		/* Sync IPIs */
+		m = n;
+		for (i = hbase; m; i++, m >>= 1) {
+			if (m & 1UL)
+				sbi_ipi_sync(scratch, event);
+		}
 	} else {
+		/* Send IPIs */
 		hbase = 0;
 		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
-			/* Send IPIs */
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
 					sbi_ipi_send(scratch, i, event, data);
 			}
 			hbase += BITS_PER_LONG;
 		}
+
+		/* Sync IPIs */
+		hbase = 0;
+		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
+			for (i = hbase; m; i++, m >>= 1) {
+				if (m & 1UL)
+					sbi_ipi_sync(scratch, event);
+			}
+			hbase += BITS_PER_LONG;
+		}
 	}
 
 	return 0;

From 80078ab088c34aafce52f0c0d4d1e367da146b9c Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Apr 2023 12:56:20 +0800
Subject: [PATCH 1257/1765] sbi: tlb: Simplify to tlb_process_count/tlb_process
 function

tlb_process_count is only used when count=1, so refactor to
tlb_process_once and add the return value to be reused in
tlb_process

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_tlb.c | 23 ++++++++---------------
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index d950c4520ae..60ca8c6f089 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -229,30 +229,23 @@ static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 	}
 }
 
-static void tlb_process_count(struct sbi_scratch *scratch, int count)
+static bool tlb_process_once(struct sbi_scratch *scratch)
 {
 	struct sbi_tlb_info tinfo;
-	unsigned int deq_count = 0;
 	struct sbi_fifo *tlb_fifo =
 			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
 
-	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo)) {
+	if (!sbi_fifo_dequeue(tlb_fifo, &tinfo)) {
 		tlb_entry_process(&tinfo);
-		deq_count++;
-		if (deq_count > count)
-			break;
-
+		return true;
 	}
+
+	return false;
 }
 
 static void tlb_process(struct sbi_scratch *scratch)
 {
-	struct sbi_tlb_info tinfo;
-	struct sbi_fifo *tlb_fifo =
-			sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
-
-	while (!sbi_fifo_dequeue(tlb_fifo, &tinfo))
-		tlb_entry_process(&tinfo);
+	while (tlb_process_once(scratch));
 }
 
 static void tlb_sync(struct sbi_scratch *scratch)
@@ -265,7 +258,7 @@ static void tlb_sync(struct sbi_scratch *scratch)
 		 * While we are waiting for remote hart to set the sync,
 		 * consume fifo requests to avoid deadlock.
 		 */
-		tlb_process_count(scratch, 1);
+		tlb_process_once(scratch);
 	}
 
 	return;
@@ -380,7 +373,7 @@ static int tlb_update(struct sbi_scratch *scratch,
 		 * TODO: Introduce a wait/wakeup event mechanism to handle
 		 * this properly.
 		 */
-		tlb_process_count(scratch, 1);
+		tlb_process_once(scratch);
 		sbi_dprintf("hart%d: hart%d tlb fifo full\n",
 			    curr_hartid, remote_hartid);
 	}

From bf40e07f6f24a9c3ed08cfeb730d4e62ba3e215b Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 14 Apr 2023 09:32:47 +0800
Subject: [PATCH 1258/1765] lib: sbi: Optimize sbi_tlb queue waiting

When tlb_fifo is full, it will wait and affect the ipi update to
other harts. This patch is optimized.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ipi.h | 10 ++++++++++
 lib/sbi/sbi_ipi.c     | 44 +++++++++++++++++++++----------------------
 lib/sbi/sbi_tlb.c     |  7 ++++---
 3 files changed, 35 insertions(+), 26 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index f384e748672..c64f422c030 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -30,6 +30,12 @@ struct sbi_ipi_device {
 	void (*ipi_clear)(u32 target_hart);
 };
 
+enum sbi_ipi_update_type {
+	SBI_IPI_UPDATE_SUCCESS,
+	SBI_IPI_UPDATE_BREAK,
+	SBI_IPI_UPDATE_RETRY,
+};
+
 struct sbi_scratch;
 
 /** IPI event operations or callbacks */
@@ -41,6 +47,10 @@ struct sbi_ipi_event_ops {
 	 * Update callback to save/enqueue data for remote HART
 	 * Note: This is an optional callback and it is called just before
 	 * triggering IPI to remote HART.
+	 * @return < 0, error or failure
+	 * @return SBI_IPI_UPDATE_SUCCESS, success
+	 * @return SBI_IPI_UPDATE_BREAK, break IPI, done on local hart
+	 * @return SBI_IPI_UPDATE_RETRY, need retry
 	 */
 	int (* update)(struct sbi_scratch *scratch,
 			struct sbi_scratch *remote_scratch,
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 24d8a93a0b9..4f94bcee6db 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -53,7 +53,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	if (ipi_ops->update) {
 		ret = ipi_ops->update(scratch, remote_scratch,
 				      remote_hartid, data);
-		if (ret < 0)
+		if (ret != SBI_IPI_UPDATE_SUCCESS)
 			return ret;
 	}
 
@@ -95,50 +95,48 @@ static int sbi_ipi_sync(struct sbi_scratch *scratch, u32 event)
 int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
-	ulong i, m, n;
+	bool retry_needed;
+	ulong i, m;
+	struct sbi_hartmask target_mask = {0};
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
+	/* Find the target harts */
 	if (hbase != -1UL) {
 		rc = sbi_hsm_hart_interruptible_mask(dom, hbase, &m);
 		if (rc)
 			return rc;
 		m &= hmask;
-		n = m;
 
-		/* Send IPIs */
 		for (i = hbase; m; i++, m >>= 1) {
 			if (m & 1UL)
-				sbi_ipi_send(scratch, i, event, data);
-		}
-
-		/* Sync IPIs */
-		m = n;
-		for (i = hbase; m; i++, m >>= 1) {
-			if (m & 1UL)
-				sbi_ipi_sync(scratch, event);
+				sbi_hartmask_set_hart(i, &target_mask);
 		}
 	} else {
-		/* Send IPIs */
 		hbase = 0;
 		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
-					sbi_ipi_send(scratch, i, event, data);
+					sbi_hartmask_set_hart(i, &target_mask);
 			}
 			hbase += BITS_PER_LONG;
 		}
+	}
 
-		/* Sync IPIs */
-		hbase = 0;
-		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
-			for (i = hbase; m; i++, m >>= 1) {
-				if (m & 1UL)
-					sbi_ipi_sync(scratch, event);
-			}
-			hbase += BITS_PER_LONG;
+	/* Send IPIs */
+	do {
+		retry_needed = false;
+		sbi_hartmask_for_each_hart(i, &target_mask) {
+			rc = sbi_ipi_send(scratch, i, event, data);
+			if (rc == SBI_IPI_UPDATE_RETRY)
+				retry_needed = true;
+			else
+				sbi_hartmask_clear_hart(i, &target_mask);
 		}
-	}
+	} while (retry_needed);
+
+	/* Sync IPIs */
+	sbi_ipi_sync(scratch, event);
 
 	return 0;
 }
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 60ca8c6f089..26a87f32930 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -357,14 +357,14 @@ static int tlb_update(struct sbi_scratch *scratch,
 	 */
 	if (remote_hartid == curr_hartid) {
 		tinfo->local_fn(tinfo);
-		return -1;
+		return SBI_IPI_UPDATE_BREAK;
 	}
 
 	tlb_fifo_r = sbi_scratch_offset_ptr(remote_scratch, tlb_fifo_off);
 
 	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, tlb_update_cb);
 
-	while (ret == SBI_FIFO_UNCHANGED && sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
+	if (ret == SBI_FIFO_UNCHANGED && sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
 		/**
 		 * For now, Busy loop until there is space in the fifo.
 		 * There may be case where target hart is also
@@ -376,12 +376,13 @@ static int tlb_update(struct sbi_scratch *scratch,
 		tlb_process_once(scratch);
 		sbi_dprintf("hart%d: hart%d tlb fifo full\n",
 			    curr_hartid, remote_hartid);
+		return SBI_IPI_UPDATE_RETRY;
 	}
 
 	tlb_sync = sbi_scratch_offset_ptr(scratch, tlb_sync_off);
 	atomic_add_return(tlb_sync, 1);
 
-	return 0;
+	return SBI_IPI_UPDATE_SUCCESS;
 }
 
 static struct sbi_ipi_event_ops tlb_ops = {

From eeab500a65d8a576874b36653a02c864e515b5e2 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Tue, 11 Apr 2023 17:36:33 +0100
Subject: [PATCH 1259/1765] platform: generic: andes/renesas: Add SBI EXT to
 check for enabling IOCP errata

I/O Coherence Port (IOCP) provides an AXI interface for connecting
external non-caching masters, such as DMA controllers. The accesses
from IOCP are coherent with D-Caches and L2 Cache.

IOCP is a specification option and is disabled on the Renesas RZ/Five
SoC (which is based on Andes AX45MP core) due to this reason IP blocks
using DMA will fail.

As a workaround for SoCs with IOCP disabled CMO needs to be handled by
software. Firstly OpenSBI configures the memory region as
"Memory, Non-cacheable, Bufferable" and passes this region as a global
shared dma pool as a DT node. With DMA_GLOBAL_POOL enabled all DMA
allocations happen from this region and synchronization callbacks are
implemented to synchronize when doing DMA transactions.

SBI_EXT_ANDES_IOCP_SW_WORKAROUND checks if the IOCP errata should be
applied to handle cache management.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
 platform/generic/Kconfig                   |  1 +
 platform/generic/andes/Kconfig             |  4 ++
 platform/generic/andes/andes_sbi.c         | 51 ++++++++++++++++++++++
 platform/generic/andes/objects.mk          |  1 +
 platform/generic/include/andes/andes45.h   | 23 +++++++++-
 platform/generic/include/andes/andes_sbi.h | 15 +++++++
 platform/generic/renesas/rzfive/rzfive.c   |  2 +
 7 files changed, 95 insertions(+), 2 deletions(-)
 create mode 100644 platform/generic/andes/andes_sbi.c
 create mode 100644 platform/generic/include/andes/andes_sbi.h

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 1f4f8e1f340..72768edeb92 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -36,6 +36,7 @@ config PLATFORM_ANDES_AE350
 config PLATFORM_RENESAS_RZFIVE
 	bool "Renesas RZ/Five support"
 	select ANDES45_PMA
+	select ANDES_SBI
 	default n
 
 config PLATFORM_SIFIVE_FU540
diff --git a/platform/generic/andes/Kconfig b/platform/generic/andes/Kconfig
index 3ad4e4ca56f..a91fb9c95dc 100644
--- a/platform/generic/andes/Kconfig
+++ b/platform/generic/andes/Kconfig
@@ -3,3 +3,7 @@
 config ANDES45_PMA
 	bool "Andes PMA support"
 	default n
+
+config ANDES_SBI
+	bool "Andes SBI support"
+	default n
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
new file mode 100644
index 00000000000..3e89fb9c696
--- /dev/null
+++ b/platform/generic/andes/andes_sbi.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ *
+ */
+#include <andes/andes45.h>
+#include <andes/andes_sbi.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_error.h>
+
+enum sbi_ext_andes_fid {
+	SBI_EXT_ANDES_FID0 = 0, /* Reserved for future use */
+	SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
+};
+
+static bool andes45_cache_controllable(void)
+{
+	return (((csr_read(CSR_MICM_CFG) & MICM_CFG_ISZ_MASK) ||
+		 (csr_read(CSR_MDCM_CFG) & MDCM_CFG_DSZ_MASK)) &&
+		(csr_read(CSR_MMSC_CFG) & MMSC_CFG_CCTLCSR_MASK) &&
+		(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_CCTL_SUEN_MASK) &&
+		misa_extension('U'));
+}
+
+static bool andes45_iocp_disabled(void)
+{
+	return (csr_read(CSR_MMSC_CFG) & MMSC_IOCP_MASK) ? false : true;
+}
+
+static bool andes45_apply_iocp_sw_workaround(void)
+{
+	return andes45_cache_controllable() & andes45_iocp_disabled();
+}
+
+int andes_sbi_vendor_ext_provider(long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_value,
+				  struct sbi_trap_info *out_trap,
+				  const struct fdt_match *match)
+{
+	switch (funcid) {
+	case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
+		*out_value = andes45_apply_iocp_sw_workaround();
+		break;
+
+	default:
+		return SBI_EINVAL;
+	}
+
+	return 0;
+}
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index ea6b561953e..e8f86ea0815 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -6,3 +6,4 @@ carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
 platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
 
 platform-objs-$(CONFIG_ANDES45_PMA) += andes/andes45-pma.o
+platform-objs-$(CONFIG_ANDES_SBI) += andes/andes_sbi.o
diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes45.h
index 08b3d18876e..f5709943538 100644
--- a/platform/generic/include/andes/andes45.h
+++ b/platform/generic/include/andes/andes45.h
@@ -4,7 +4,26 @@
 #define CSR_MARCHID_MICROID 0xfff
 
 /* Memory and Miscellaneous Registers */
-#define CSR_MCACHE_CTL 0x7ca
-#define CSR_MCCTLCOMMAND 0x7cc
+#define CSR_MCACHE_CTL		0x7ca
+#define CSR_MCCTLCOMMAND	0x7cc
+
+/* Configuration Control & Status Registers */
+#define CSR_MICM_CFG		0xfc0
+#define CSR_MDCM_CFG		0xfc1
+#define CSR_MMSC_CFG		0xfc2
+
+#define MICM_CFG_ISZ_OFFSET		6
+#define MICM_CFG_ISZ_MASK		(0x7  << MICM_CFG_ISZ_OFFSET)
+
+#define MDCM_CFG_DSZ_OFFSET		6
+#define MDCM_CFG_DSZ_MASK		(0x7  << MDCM_CFG_DSZ_OFFSET)
+
+#define MMSC_CFG_CCTLCSR_OFFSET		16
+#define MMSC_CFG_CCTLCSR_MASK		(0x1 << MMSC_CFG_CCTLCSR_OFFSET)
+#define MMSC_IOCP_OFFSET			47
+#define MMSC_IOCP_MASK			(0x1ULL << MMSC_IOCP_OFFSET)
+
+#define MCACHE_CTL_CCTL_SUEN_OFFSET	8
+#define MCACHE_CTL_CCTL_SUEN_MASK	(0x1 << MCACHE_CTL_CCTL_SUEN_OFFSET)
 
 #endif /* _RISCV_ANDES45_H */
diff --git a/platform/generic/include/andes/andes_sbi.h b/platform/generic/include/andes/andes_sbi.h
new file mode 100644
index 00000000000..e5dc250707b
--- /dev/null
+++ b/platform/generic/include/andes/andes_sbi.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: BSD-2-Clause
+
+#ifndef _RISCV_ANDES_SBI_H
+#define _RISCV_ANDES_SBI_H
+
+#include <sbi/sbi_trap.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+int andes_sbi_vendor_ext_provider(long funcid,
+				  const struct sbi_trap_regs *regs,
+				  unsigned long *out_value,
+				  struct sbi_trap_info *out_trap,
+				  const struct fdt_match *match);
+
+#endif /* _RISCV_ANDES_SBI_H */
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index 4d71d0d6c22..a69797b18df 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -5,6 +5,7 @@
  */
 
 #include <andes/andes45_pma.h>
+#include <andes/andes_sbi.h>
 #include <platform_override.h>
 #include <sbi/sbi_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -55,4 +56,5 @@ const struct platform_override renesas_rzfive = {
 	.match_table = renesas_rzfive_match,
 	.early_init = renesas_rzfive_early_init,
 	.final_init = renesas_rzfive_final_init,
+	.vendor_ext_provider = andes_sbi_vendor_ext_provider,
 };

From f692289ed42882567491c35700a1feb64ba540b5 Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Tue, 4 Apr 2023 12:46:00 +0800
Subject: [PATCH 1260/1765] firmware: Optimize loading relocation type

't5' already contains relocation type so don't bother reloading it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 firmware/fw_base.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 5a3e89485a8..2d6be70e9d4 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -95,7 +95,6 @@ _try_lottery:
 	lla	t4, __dyn_sym_start
 
 4:
-	REG_L	t5, -(REGBYTES*2)(t0)	/* t5 <-- relocation info:type */
 	srli	t6, t5, SYM_INDEX	/* t6 <--- sym table index */
 	andi	t5, t5, 0xFF		/* t5 <--- relocation type */
 	li	t3, RELOC_TYPE

From e41dbb507c422c52cf93228ca7157394d49ca9fe Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng@tinylab.org>
Date: Tue, 4 Apr 2023 12:46:01 +0800
Subject: [PATCH 1261/1765] firmware: Change to use positive offset to access
 relocation entries

The codes currently skip the very first relocation entry, but later
reference the elements in the relocation entry using minus offsets.

Change to use positive offsets so that there is no need to skip the
first relocation entry.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 firmware/fw_base.S | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 2d6be70e9d4..e37df095845 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -79,13 +79,12 @@ _try_lottery:
 	lla	t0, __rel_dyn_start
 	lla	t1, __rel_dyn_end
 	beq	t0, t1, _relocate_done
-	j	5f
 2:
-	REG_L	t5, -(REGBYTES*2)(t0)	/* t5 <-- relocation info:type */
+	REG_L	t5, REGBYTES(t0)	/* t5 <-- relocation info:type */
 	li	t3, R_RISCV_RELATIVE	/* reloc type R_RISCV_RELATIVE */
 	bne	t5, t3, 3f
-	REG_L	t3, -(REGBYTES*3)(t0)
-	REG_L	t5, -(REGBYTES)(t0)	/* t5 <-- addend */
+	REG_L	t3, 0(t0)
+	REG_L	t5, (REGBYTES * 2)(t0)	/* t5 <-- addend */
 	add	t5, t5, t2
 	add	t3, t3, t2
 	REG_S	t5, 0(t3)		/* store runtime address to the GOT entry */
@@ -101,11 +100,11 @@ _try_lottery:
 	bne	t5, t3, 5f
 
 	/* address R_RISCV_64 or R_RISCV_32 cases*/
-	REG_L	t3, -(REGBYTES*3)(t0)
+	REG_L	t3, 0(t0)
 	li	t5, SYM_SIZE
 	mul	t6, t6, t5
 	add	s5, t4, t6
-	REG_L	t6, -(REGBYTES)(t0)	/* t0 <-- addend */
+	REG_L	t6, (REGBYTES * 2)(t0)	/* t0 <-- addend */
 	REG_L	t5, REGBYTES(s5)
 	add	t5, t5, t6
 	add	t5, t5, t2		/* t5 <-- location to fix up in RAM */
@@ -113,8 +112,8 @@ _try_lottery:
 	REG_S	t5, 0(t3)		/* store runtime address to the variable */
 
 5:
-	addi	t0, t0, (REGBYTES*3)
-	ble	t0, t1, 2b
+	addi	t0, t0, (REGBYTES * 3)
+	blt	t0, t1, 2b
 	j	_relocate_done
 _wait_relocate_copy_done:
 	j	_wait_for_boot_hart

From bdb3c42bca1c7fddd0c43f0be24c3a1590f02e50 Mon Sep 17 00:00:00 2001
From: Alexandre Ghiti <alexghiti@rivosinc.com>
Date: Thu, 13 Apr 2023 16:02:18 +0200
Subject: [PATCH 1262/1765] lib: sbi: Do not clear active_events for
 cycle/instret when stopping

Those events are enabled by default and should not be reset afterwards
since when using SBI_PMU_CFG_FLAG_SKIP_MATCH, it leads to unaccessible
counters after the first use.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 04259aeb24e..f28c9f5e80a 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -532,7 +532,7 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		else
 			ret = pmu_ctr_stop_hw(cidx);
 
-		if (flag & SBI_PMU_STOP_FLAG_RESET) {
+		if (cidx > (CSR_INSTRET - CSR_CYCLE) && flag & SBI_PMU_STOP_FLAG_RESET) {
 			active_events[hartid][cidx] = SBI_PMU_EVENT_IDX_INVALID;
 			pmu_reset_hw_mhpmevent(cidx);
 		}

From 674e0199b23effebfc5311d09b636ca9b46cde7e Mon Sep 17 00:00:00 2001
From: Alexandre Ghiti <alexghiti@rivosinc.com>
Date: Thu, 13 Apr 2023 16:02:19 +0200
Subject: [PATCH 1263/1765] lib: sbi: Fix counter index calculation for
 SBI_PMU_CFG_FLAG_SKIP_MATCH

As per the SBI specification, we should "unconditionally select the first
counter from the set of counters specified by the counter_idx_base and
counter_idx_mask", so implement this behaviour.

Suggested-by: Atish Patra <atishp@atishpatra.org>
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index f28c9f5e80a..939f29d841e 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -736,10 +736,15 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		/* The caller wants to skip the match because it already knows the
 		 * counter idx for the given event. Verify that the counter idx
 		 * is still valid.
+		 * As per the specification, we should "unconditionally select
+		 * the first counter from the set of counters specified by the
+		 * counter_idx_base and counter_idx_mask".
 		 */
-		if (active_events[hartid][cidx_base] == SBI_PMU_EVENT_IDX_INVALID)
+		unsigned long cidx_first = cidx_base + sbi_ffs(cidx_mask);
+
+		if (active_events[hartid][cidx_first] == SBI_PMU_EVENT_IDX_INVALID)
 			return SBI_EINVAL;
-		ctr_idx = cidx_base;
+		ctr_idx = cidx_first;
 		goto skip_match;
 	}
 

From f5dfd991396891d87d7780be45f887bc9ed13099 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 17 Apr 2023 09:48:13 +0530
Subject: [PATCH 1264/1765] lib: sbi: Don't check SBI error range for legacy
 console getchar

The legacy console getchar SBI call returns character value in
the sbiret.error field so the "SBI_SUCCESS < ret" check in
sbi_ecall_handler() results in unwanted error prints for the
legacy console getchar SBI call. Let's suppress these unwanted
error prints.

Fixes: 67b2a408924b ("lib: sbi: sbi_ecall: Check the range of
SBI error")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_ecall.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index d0f01665368..76a1ae9ab73 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -120,7 +120,9 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 		trap.epc = regs->mepc;
 		sbi_trap_redirect(regs, &trap);
 	} else {
-		if (ret < SBI_LAST_ERR || SBI_SUCCESS < ret) {
+		if (ret < SBI_LAST_ERR ||
+		    (extension_id != SBI_EXT_0_1_CONSOLE_GETCHAR &&
+		     SBI_SUCCESS < ret)) {
 			sbi_printf("%s: Invalid error %d for ext=0x%lx "
 				   "func=0x%lx\n", __func__, ret,
 				   extension_id, func_id);

From 791953030836d39687688a8e7f1a3e708892cfa1 Mon Sep 17 00:00:00 2001
From: Tan En De <ende.tan@starfivetech.com>
Date: Fri, 14 Apr 2023 13:13:11 +0800
Subject: [PATCH 1265/1765] lib: sbi: Add debug print when sbi_pmu_init fails

Since sbi_pmu_init is called after sbi_console_init,
the sbi_printf can be called when sbi_pmu_init fails.

Signed-off-by: Tan En De <ende.tan@starfivetech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_init.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index a0313367117..5db8e7f68c8 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -290,8 +290,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 
 	rc = sbi_pmu_init(scratch, true);
-	if (rc)
+	if (rc) {
+		sbi_printf("%s: pmu init failed (error %d)\n",
+			   __func__, rc);
 		sbi_hart_hang();
+	}
 
 	sbi_boot_print_banner(scratch);
 

From 4e3353057a3b975ca58c9b831749e2760f7812c0 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 25 Apr 2023 16:56:23 +0800
Subject: [PATCH 1266/1765] lib: sbi: Remove unnecessary semicolon

We have redundant semicolon at quite a few places so let's remove it.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_list.h         | 2 +-
 lib/sbi/riscv_asm.c            | 4 ++--
 lib/sbi/sbi_domain.c           | 4 ++--
 lib/sbi/sbi_ecall_legacy.c     | 2 +-
 lib/sbi/sbi_ecall_pmu.c        | 2 +-
 lib/sbi/sbi_ecall_rfence.c     | 2 +-
 lib/sbi/sbi_emulate_csr.c      | 4 ++--
 lib/sbi/sbi_hsm.c              | 2 +-
 lib/sbi/sbi_illegal_insn.c     | 2 +-
 lib/sbi/sbi_init.c             | 2 +-
 lib/sbi/sbi_ipi.c              | 2 +-
 lib/sbi/sbi_trap.c             | 4 ++--
 lib/sbi/sbi_unpriv.c           | 2 +-
 lib/utils/fdt/fdt_helper.c     | 2 +-
 lib/utils/libfdt/fdt_overlay.c | 2 +-
 15 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_list.h b/include/sbi/sbi_list.h
index fe735dff054..9e56c526faf 100644
--- a/include/sbi/sbi_list.h
+++ b/include/sbi/sbi_list.h
@@ -31,7 +31,7 @@ struct sbi_dlist _lname = SBI_LIST_HEAD_INIT(_lname)
 #define SBI_INIT_LIST_HEAD(ptr)	\
 do { \
 	(ptr)->next = ptr; (ptr)->prev = ptr; \
-} while (0);
+} while (0)
 
 static inline void __sbi_list_add(struct sbi_dlist *new,
 				  struct sbi_dlist *prev,
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index a09cf78e9c1..cd565534ca1 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -152,7 +152,7 @@ unsigned long csr_read_num(int csr_num)
 	default:
 		sbi_panic("%s: Unknown CSR %#x", __func__, csr_num);
 		break;
-	};
+	}
 
 	return ret;
 
@@ -220,7 +220,7 @@ void csr_write_num(int csr_num, unsigned long val)
 	default:
 		sbi_panic("%s: Unknown CSR %#x", __func__, csr_num);
 		break;
-	};
+	}
 
 #undef switchcase_csr_write_64
 #undef switchcase_csr_write_32
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 67b87f3043c..c55e192207d 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -261,7 +261,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 				   "hart %d\n", __func__, dom->name, i);
 			return SBI_EINVAL;
 		}
-	};
+	}
 
 	/* Check memory regions */
 	if (!dom->regions) {
@@ -451,7 +451,7 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 	default:
 		sbi_printf("Unknown\n");
 		break;
-	};
+	}
 
 	sbi_printf("Domain%d SysReset    %s: %s\n",
 		   dom->index, suffix, (dom->system_reset_allowed) ? "yes" : "no");
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index e20de766d27..8237498b538 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -112,7 +112,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
-	};
+	}
 
 	return ret;
 }
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 8f91f9cec01..367e9277426 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -76,7 +76,7 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
-	};
+	}
 
 	return ret;
 }
diff --git a/lib/sbi/sbi_ecall_rfence.c b/lib/sbi/sbi_ecall_rfence.c
index 8f0e3d7bacf..6334c001d45 100644
--- a/lib/sbi/sbi_ecall_rfence.c
+++ b/lib/sbi/sbi_ecall_rfence.c
@@ -74,7 +74,7 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
-	};
+	}
 
 	return ret;
 }
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 64bebd8da7a..da811653661 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -149,7 +149,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	default:
 		ret = SBI_ENOTSUPP;
 		break;
-	};
+	}
 
 	if (ret)
 		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
@@ -187,7 +187,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 	default:
 		ret = SBI_ENOTSUPP;
 		break;
-	};
+	}
 
 	if (ret)
 		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index b2614105096..f870ca72baf 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -172,7 +172,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
 	/* Wait for state transition requested by sbi_hsm_hart_start() */
 	while (atomic_read(&hdata->state) != SBI_HSM_STATE_START_PENDING) {
 		wfi();
-	};
+	}
 
 	/* Restore MIE CSR */
 	csr_write(CSR_MIE, saved_mie);
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 9691bce930f..2be47575a36 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -90,7 +90,7 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 		break;
 	default:
 		return truly_illegal_insn(insn, regs);
-	};
+	}
 
 	if (do_write && sbi_emulate_csr_write(csr_num, regs, new_csr_val))
 		return truly_illegal_insn(insn, regs);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 5db8e7f68c8..539f8245c44 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -200,7 +200,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 			wfi();
 			cmip = csr_read(CSR_MIP);
 		 } while (!(cmip & (MIP_MSIP | MIP_MEIP)));
-	};
+	}
 
 	/* Acquire coldboot lock */
 	spin_lock(&coldboot_lock);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 4f94bcee6db..ba83f245c14 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -233,7 +233,7 @@ void sbi_ipi_process(void)
 skip:
 		ipi_type = ipi_type >> 1;
 		ipi_event++;
-	};
+	}
 }
 
 int sbi_ipi_raw_send(u32 target_hart)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 025cf614c27..dbf307c6894 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -212,7 +212,7 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 		return sbi_irqchip_process(regs);
 	default:
 		return SBI_ENOENT;
-	};
+	}
 
 	return 0;
 }
@@ -320,7 +320,7 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 
 		rc = sbi_trap_redirect(regs, &trap);
 		break;
-	};
+	}
 
 trap_error:
 	if (rc)
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c
index 9a34a717b00..2a55d9dbf11 100644
--- a/lib/sbi/sbi_unpriv.c
+++ b/lib/sbi/sbi_unpriv.c
@@ -163,7 +163,7 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap)
 		break;
 	default:
 		break;
-	};
+	}
 
 	return insn;
 }
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 48bc2fe4c28..a88a4ba83fa 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -689,7 +689,7 @@ int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic)
 			break;
 		regs->addr = reg_addr;
 		regs->size = reg_size;
-	};
+	}
 	if (!imsic->regs[0].size)
 		return SBI_EINVAL;
 
diff --git a/lib/utils/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
index d217e79b672..0871e260ff4 100644
--- a/lib/utils/libfdt/fdt_overlay.c
+++ b/lib/utils/libfdt/fdt_overlay.c
@@ -404,7 +404,7 @@ static int overlay_fixup_one_phandle(void *fdt, void *fdto,
 						   name, name_len, poffset,
 						   &phandle_prop,
 						   sizeof(phandle_prop));
-};
+}
 
 /**
  * overlay_fixup_phandle - Set an overlay phandle to the base one

From 6bc02dede86c47f87e65293b7099e9caf3b22c29 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 25 Apr 2023 16:56:24 +0800
Subject: [PATCH 1267/1765] lib: sbi: Simplify sbi_ipi_process remove goto

Simplify sbi_ipi_process() by removing goto statement.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ipi.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index ba83f245c14..ad09154521f 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -223,14 +223,11 @@ void sbi_ipi_process(void)
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
 	ipi_event = 0;
 	while (ipi_type) {
-		if (!(ipi_type & 1UL))
-			goto skip;
-
-		ipi_ops = ipi_ops_array[ipi_event];
-		if (ipi_ops && ipi_ops->process)
-			ipi_ops->process(scratch);
-
-skip:
+		if (ipi_type & 1UL) {
+			ipi_ops = ipi_ops_array[ipi_event];
+			if (ipi_ops && ipi_ops->process)
+				ipi_ops->process(scratch);
+		}
 		ipi_type = ipi_type >> 1;
 		ipi_event++;
 	}

From dc1c7db05e075e0910b93504370b50d064a51402 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 25 Apr 2023 19:32:21 +0800
Subject: [PATCH 1268/1765] lib: sbi: Simplify BITS_PER_LONG definition

No need to use #elif ladder when defining BITS_PER_LONG.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_bitops.h | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 251e4d89d59..2e08947beed 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -12,13 +12,7 @@
 
 #include <sbi/sbi_types.h>
 
-#if __SIZEOF_POINTER__ == 8
-#define BITS_PER_LONG		64
-#elif __SIZEOF_POINTER__ == 4
-#define BITS_PER_LONG		32
-#else
-#error "Unexpected __SIZEOF_POINTER__"
-#endif
+#define BITS_PER_LONG		(8 * __SIZEOF_LONG__)
 
 #define EXTRACT_FIELD(val, which) \
 	(((val) & (which)) / ((which) & ~((which)-1)))

From f58c14090f79b5d3bde86573c979a019bbd7421d Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:34 +0200
Subject: [PATCH 1269/1765] lib: sbi: Introduce register_extensions extension
 callback

Rather than registering all extensions on their behalf in
sbi_ecall_init(), introduce another extension callback and
invoke that instead. For now, implement each callback by
simply registering the extension, which means this patch
has no intended functional change. In later patches, extension
callbacks will be modified to choose when to register and to
possibly narrow the extension ID range prior to registering.
When an extension range needs to remove IDs, leaving gaps, then
multiple invocations of sbi_ecall_register_extension() may be
used. In summary, later patches for current extensions and the
introductions of future extensions will use the new callback to
ensure that only valid extension IDs from the initial range,
which are also available, will be registered.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall.h    |  1 +
 lib/sbi/sbi_ecall.c        |  5 ++++-
 lib/sbi/sbi_ecall_base.c   | 14 +++++++++++---
 lib/sbi/sbi_ecall_cppc.c   | 16 ++++++++++++----
 lib/sbi/sbi_ecall_dbcn.c   | 16 ++++++++++++----
 lib/sbi/sbi_ecall_hsm.c    | 14 +++++++++++---
 lib/sbi/sbi_ecall_ipi.c    | 14 +++++++++++---
 lib/sbi/sbi_ecall_legacy.c | 14 +++++++++++---
 lib/sbi/sbi_ecall_pmu.c    | 16 ++++++++++++----
 lib/sbi/sbi_ecall_rfence.c | 14 +++++++++++---
 lib/sbi/sbi_ecall_srst.c   | 16 ++++++++++++----
 lib/sbi/sbi_ecall_susp.c   | 16 ++++++++++++----
 lib/sbi/sbi_ecall_time.c   | 14 +++++++++++---
 lib/sbi/sbi_ecall_vendor.c | 16 ++++++++++++----
 14 files changed, 143 insertions(+), 43 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index ff9bf8e2b43..fac26429cf5 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -24,6 +24,7 @@ struct sbi_ecall_extension {
 	struct sbi_dlist head;
 	unsigned long extid_start;
 	unsigned long extid_end;
+	int (* register_extensions)(void);
 	int (* probe)(unsigned long extid, unsigned long *out_val);
 	int (* handle)(unsigned long extid, unsigned long funcid,
 		       const struct sbi_trap_regs *regs,
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 76a1ae9ab73..3eb4f0addb0 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -154,7 +154,10 @@ int sbi_ecall_init(void)
 
 	for (i = 0; i < sbi_ecall_exts_size; i++) {
 		ext = sbi_ecall_exts[i];
-		ret = sbi_ecall_register_extension(ext);
+		ret = SBI_ENODEV;
+
+		if (ext->register_extensions)
+			ret = ext->register_extensions();
 		if (ret)
 			return ret;
 	}
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
index 786d2ac6792..74f05eb26a3 100644
--- a/lib/sbi/sbi_ecall_base.c
+++ b/lib/sbi/sbi_ecall_base.c
@@ -72,8 +72,16 @@ static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_base;
+
+static int sbi_ecall_base_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_base);
+}
+
 struct sbi_ecall_extension ecall_base = {
-	.extid_start = SBI_EXT_BASE,
-	.extid_end = SBI_EXT_BASE,
-	.handle = sbi_ecall_base_handler,
+	.extid_start		= SBI_EXT_BASE,
+	.extid_end		= SBI_EXT_BASE,
+	.register_extensions	= sbi_ecall_base_register_extensions,
+	.handle			= sbi_ecall_base_handler,
 };
diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index 91585f3b74e..42ec744c22b 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -55,9 +55,17 @@ static int sbi_ecall_cppc_probe(unsigned long extid, unsigned long *out_val)
 	return 0;
 }
 
+struct sbi_ecall_extension ecall_cppc;
+
+static int sbi_ecall_cppc_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_cppc);
+}
+
 struct sbi_ecall_extension ecall_cppc = {
-	.extid_start	= SBI_EXT_CPPC,
-	.extid_end	= SBI_EXT_CPPC,
-	.handle		= sbi_ecall_cppc_handler,
-	.probe		= sbi_ecall_cppc_probe,
+	.extid_start		= SBI_EXT_CPPC,
+	.extid_end		= SBI_EXT_CPPC,
+	.register_extensions	= sbi_ecall_cppc_register_extensions,
+	.probe			= sbi_ecall_cppc_probe,
+	.handle			= sbi_ecall_cppc_handler,
 };
diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index fe7e175a64c..58b19e4468e 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -64,9 +64,17 @@ static int sbi_ecall_dbcn_probe(unsigned long extid, unsigned long *out_val)
 	return 0;
 }
 
+struct sbi_ecall_extension ecall_dbcn;
+
+static int sbi_ecall_dbcn_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_dbcn);
+}
+
 struct sbi_ecall_extension ecall_dbcn = {
-	.extid_start = SBI_EXT_DBCN,
-	.extid_end = SBI_EXT_DBCN,
-	.handle = sbi_ecall_dbcn_handler,
-	.probe = sbi_ecall_dbcn_probe,
+	.extid_start		= SBI_EXT_DBCN,
+	.extid_end		= SBI_EXT_DBCN,
+	.register_extensions	= sbi_ecall_dbcn_register_extensions,
+	.probe			= sbi_ecall_dbcn_probe,
+	.handle			= sbi_ecall_dbcn_handler,
 };
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index f1b41d073b2..20705c39513 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -54,8 +54,16 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_hsm;
+
+static int sbi_ecall_hsm_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_hsm);
+}
+
 struct sbi_ecall_extension ecall_hsm = {
-	.extid_start = SBI_EXT_HSM,
-	.extid_end = SBI_EXT_HSM,
-	.handle = sbi_ecall_hsm_handler,
+	.extid_start		= SBI_EXT_HSM,
+	.extid_end		= SBI_EXT_HSM,
+	.register_extensions	= sbi_ecall_hsm_register_extensions,
+	.handle			= sbi_ecall_hsm_handler,
 };
diff --git a/lib/sbi/sbi_ecall_ipi.c b/lib/sbi/sbi_ecall_ipi.c
index f4797e117a3..a40d6b8cc8a 100644
--- a/lib/sbi/sbi_ecall_ipi.c
+++ b/lib/sbi/sbi_ecall_ipi.c
@@ -29,8 +29,16 @@ static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_ipi;
+
+static int sbi_ecall_ipi_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_ipi);
+}
+
 struct sbi_ecall_extension ecall_ipi = {
-	.extid_start = SBI_EXT_IPI,
-	.extid_end = SBI_EXT_IPI,
-	.handle = sbi_ecall_ipi_handler,
+	.extid_start		= SBI_EXT_IPI,
+	.extid_end		= SBI_EXT_IPI,
+	.register_extensions	= sbi_ecall_ipi_register_extensions,
+	.handle			= sbi_ecall_ipi_handler,
 };
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 8237498b538..99e862e0f19 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -117,8 +117,16 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_legacy;
+
+static int sbi_ecall_legacy_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_legacy);
+}
+
 struct sbi_ecall_extension ecall_legacy = {
-	.extid_start = SBI_EXT_0_1_SET_TIMER,
-	.extid_end = SBI_EXT_0_1_SHUTDOWN,
-	.handle = sbi_ecall_legacy_handler,
+	.extid_start		= SBI_EXT_0_1_SET_TIMER,
+	.extid_end		= SBI_EXT_0_1_SHUTDOWN,
+	.register_extensions	= sbi_ecall_legacy_register_extensions,
+	.handle			= sbi_ecall_legacy_handler,
 };
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 367e9277426..b0589d0ecfa 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -88,9 +88,17 @@ static int sbi_ecall_pmu_probe(unsigned long extid, unsigned long *out_val)
 	return 0;
 }
 
+struct sbi_ecall_extension ecall_pmu;
+
+static int sbi_ecall_pmu_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_pmu);
+}
+
 struct sbi_ecall_extension ecall_pmu = {
-	.extid_start = SBI_EXT_PMU,
-	.extid_end = SBI_EXT_PMU,
-	.handle = sbi_ecall_pmu_handler,
-	.probe = sbi_ecall_pmu_probe,
+	.extid_start		= SBI_EXT_PMU,
+	.extid_end		= SBI_EXT_PMU,
+	.register_extensions	= sbi_ecall_pmu_register_extensions,
+	.probe			= sbi_ecall_pmu_probe,
+	.handle			= sbi_ecall_pmu_handler,
 };
diff --git a/lib/sbi/sbi_ecall_rfence.c b/lib/sbi/sbi_ecall_rfence.c
index 6334c001d45..22c66522782 100644
--- a/lib/sbi/sbi_ecall_rfence.c
+++ b/lib/sbi/sbi_ecall_rfence.c
@@ -79,8 +79,16 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_rfence;
+
+static int sbi_ecall_rfence_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_rfence);
+}
+
 struct sbi_ecall_extension ecall_rfence = {
-	.extid_start = SBI_EXT_RFENCE,
-	.extid_end = SBI_EXT_RFENCE,
-	.handle = sbi_ecall_rfence_handler,
+	.extid_start		= SBI_EXT_RFENCE,
+	.extid_end		= SBI_EXT_RFENCE,
+	.register_extensions	= sbi_ecall_rfence_register_extensions,
+	.handle			= sbi_ecall_rfence_handler,
 };
diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
index 93b012ce024..ad31537604a 100644
--- a/lib/sbi/sbi_ecall_srst.c
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -67,9 +67,17 @@ static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
 	return 0;
 }
 
+struct sbi_ecall_extension ecall_srst;
+
+static int sbi_ecall_srst_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_srst);
+}
+
 struct sbi_ecall_extension ecall_srst = {
-	.extid_start = SBI_EXT_SRST,
-	.extid_end = SBI_EXT_SRST,
-	.handle = sbi_ecall_srst_handler,
-	.probe = sbi_ecall_srst_probe,
+	.extid_start		= SBI_EXT_SRST,
+	.extid_end		= SBI_EXT_SRST,
+	.register_extensions	= sbi_ecall_srst_register_extensions,
+	.probe			= sbi_ecall_srst_probe,
+	.handle			= sbi_ecall_srst_handler,
 };
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
index f20126c49a6..bfbdbe64862 100644
--- a/lib/sbi/sbi_ecall_susp.c
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -40,9 +40,17 @@ static int sbi_ecall_susp_probe(unsigned long extid, unsigned long *out_val)
 	return 0;
 }
 
+struct sbi_ecall_extension ecall_susp;
+
+static int sbi_ecall_susp_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_susp);
+}
+
 struct sbi_ecall_extension ecall_susp = {
-	.extid_start = SBI_EXT_SUSP,
-	.extid_end = SBI_EXT_SUSP,
-	.handle = sbi_ecall_susp_handler,
-	.probe = sbi_ecall_susp_probe,
+	.extid_start		= SBI_EXT_SUSP,
+	.extid_end		= SBI_EXT_SUSP,
+	.register_extensions	= sbi_ecall_susp_register_extensions,
+	.probe			= sbi_ecall_susp_probe,
+	.handle			= sbi_ecall_susp_handler,
 };
diff --git a/lib/sbi/sbi_ecall_time.c b/lib/sbi/sbi_ecall_time.c
index 668cb17680c..e79196f77ad 100644
--- a/lib/sbi/sbi_ecall_time.c
+++ b/lib/sbi/sbi_ecall_time.c
@@ -33,8 +33,16 @@ static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
+struct sbi_ecall_extension ecall_time;
+
+static int sbi_ecall_time_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_time);
+}
+
 struct sbi_ecall_extension ecall_time = {
-	.extid_start = SBI_EXT_TIME,
-	.extid_end = SBI_EXT_TIME,
-	.handle = sbi_ecall_time_handler,
+	.extid_start		= SBI_EXT_TIME,
+	.extid_end		= SBI_EXT_TIME,
+	.register_extensions	= sbi_ecall_time_register_extensions,
+	.handle			= sbi_ecall_time_handler,
 };
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 8b8dab00c92..126156f79a1 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -47,9 +47,17 @@ static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 						out_val, out_trap);
 }
 
+struct sbi_ecall_extension ecall_vendor;
+
+static int sbi_ecall_vendor_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_vendor);
+}
+
 struct sbi_ecall_extension ecall_vendor = {
-	.extid_start = SBI_EXT_VENDOR_START,
-	.extid_end = SBI_EXT_VENDOR_END,
-	.probe = sbi_ecall_vendor_probe,
-	.handle = sbi_ecall_vendor_handler,
+	.extid_start		= SBI_EXT_VENDOR_START,
+	.extid_end		= SBI_EXT_VENDOR_END,
+	.register_extensions	= sbi_ecall_vendor_register_extensions,
+	.probe			= sbi_ecall_vendor_probe,
+	.handle			= sbi_ecall_vendor_handler,
 };

From e307ba7d464a8280e71195d79cc497e86d59b7fd Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:35 +0200
Subject: [PATCH 1270/1765] lib: sbi: Narrow vendor extension range

The vendor extension ID range is large, but at runtime at most
a single ID will be available. Narrow the range in the
register_extensions callback. After narrowing, we no longer
need to check that the extension ID is correct in the other
callbacks, as those callbacks will never be invoked with
anything other than the single ID.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_vendor.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 126156f79a1..39c58c8b6fd 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -25,8 +25,7 @@ static inline unsigned long sbi_ecall_vendor_id(void)
 static int sbi_ecall_vendor_probe(unsigned long extid,
 				  unsigned long *out_val)
 {
-	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()) ||
-	    extid != sbi_ecall_vendor_id())
+	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()))
 		*out_val = 0;
 	else
 		*out_val = 1;
@@ -38,8 +37,7 @@ static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
-	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()) ||
-	    extid != sbi_ecall_vendor_id())
+	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()))
 		return SBI_ERR_NOT_SUPPORTED;
 
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
@@ -51,6 +49,11 @@ struct sbi_ecall_extension ecall_vendor;
 
 static int sbi_ecall_vendor_register_extensions(void)
 {
+	unsigned long extid = sbi_ecall_vendor_id();
+
+	ecall_vendor.extid_start = extid;
+	ecall_vendor.extid_end = extid;
+
 	return sbi_ecall_register_extension(&ecall_vendor);
 }
 

From 042f0c3ea25e995a6db93cd64964b816cb8ffba4 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:36 +0200
Subject: [PATCH 1271/1765] lib: sbi: pmu: Remove unnecessary probe function

The absence of a probe implementation means that the extension is
always available. Remove the implementation for the PMU extension,
which does no checking, and indeed even has a comment saying it's
always available.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_pmu.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index b0589d0ecfa..1d5d512eeed 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -81,13 +81,6 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
-static int sbi_ecall_pmu_probe(unsigned long extid, unsigned long *out_val)
-{
-	/* PMU extension is always enabled */
-	*out_val = 1;
-	return 0;
-}
-
 struct sbi_ecall_extension ecall_pmu;
 
 static int sbi_ecall_pmu_register_extensions(void)
@@ -99,6 +92,5 @@ struct sbi_ecall_extension ecall_pmu = {
 	.extid_start		= SBI_EXT_PMU,
 	.extid_end		= SBI_EXT_PMU,
 	.register_extensions	= sbi_ecall_pmu_register_extensions,
-	.probe			= sbi_ecall_pmu_probe,
 	.handle			= sbi_ecall_pmu_handler,
 };

From 8b952d4fcd4e1341ed7061bd01b8b12802031ea1 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:37 +0200
Subject: [PATCH 1272/1765] lib: sbi: Only register available extensions

When an extension implements a probe function it means there's a
chance that the extension is not available. Use this function in the
register_extensions callback to determine if the extension should be
registered at all. Where the probe implementation is simple, just
open code the check.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_cppc.c   |  3 +++
 lib/sbi/sbi_ecall_dbcn.c   |  3 +++
 lib/sbi/sbi_ecall_srst.c   |  6 ++++++
 lib/sbi/sbi_ecall_susp.c   |  6 ++++++
 lib/sbi/sbi_ecall_vendor.c | 17 +++--------------
 lib/sbi/sbi_init.c         | 22 ++++++++++++++--------
 6 files changed, 35 insertions(+), 22 deletions(-)

diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index 42ec744c22b..a6398ac7822 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -59,6 +59,9 @@ struct sbi_ecall_extension ecall_cppc;
 
 static int sbi_ecall_cppc_register_extensions(void)
 {
+	if (!sbi_cppc_get_device())
+		return 0;
+
 	return sbi_ecall_register_extension(&ecall_cppc);
 }
 
diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index 58b19e4468e..cbb2e802e61 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -68,6 +68,9 @@ struct sbi_ecall_extension ecall_dbcn;
 
 static int sbi_ecall_dbcn_register_extensions(void)
 {
+	if (!sbi_console_get_device())
+		return 0;
+
 	return sbi_ecall_register_extension(&ecall_dbcn);
 }
 
diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
index ad31537604a..ea0dc73f010 100644
--- a/lib/sbi/sbi_ecall_srst.c
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -71,6 +71,12 @@ struct sbi_ecall_extension ecall_srst;
 
 static int sbi_ecall_srst_register_extensions(void)
 {
+	unsigned long out_val;
+
+	sbi_ecall_srst_probe(SBI_EXT_SRST, &out_val);
+	if (!out_val)
+		return 0;
+
 	return sbi_ecall_register_extension(&ecall_srst);
 }
 
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
index bfbdbe64862..c4124046b92 100644
--- a/lib/sbi/sbi_ecall_susp.c
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -44,6 +44,12 @@ struct sbi_ecall_extension ecall_susp;
 
 static int sbi_ecall_susp_register_extensions(void)
 {
+	unsigned long out_val;
+
+	sbi_ecall_susp_probe(SBI_EXT_SUSP, &out_val);
+	if (!out_val)
+		return 0;
+
 	return sbi_ecall_register_extension(&ecall_susp);
 }
 
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 39c58c8b6fd..700f475f0a8 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -22,24 +22,11 @@ static inline unsigned long sbi_ecall_vendor_id(void)
 		 (SBI_EXT_VENDOR_END - SBI_EXT_VENDOR_START));
 }
 
-static int sbi_ecall_vendor_probe(unsigned long extid,
-				  unsigned long *out_val)
-{
-	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()))
-		*out_val = 0;
-	else
-		*out_val = 1;
-	return 0;
-}
-
 static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
 				    const struct sbi_trap_regs *regs,
 				    unsigned long *out_val,
 				    struct sbi_trap_info *out_trap)
 {
-	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()))
-		return SBI_ERR_NOT_SUPPORTED;
-
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
 						funcid, regs,
 						out_val, out_trap);
@@ -51,6 +38,9 @@ static int sbi_ecall_vendor_register_extensions(void)
 {
 	unsigned long extid = sbi_ecall_vendor_id();
 
+	if (!sbi_platform_vendor_ext_check(sbi_platform_thishart_ptr()))
+		return 0;
+
 	ecall_vendor.extid_start = extid;
 	ecall_vendor.extid_end = extid;
 
@@ -61,6 +51,5 @@ struct sbi_ecall_extension ecall_vendor = {
 	.extid_start		= SBI_EXT_VENDOR_START,
 	.extid_end		= SBI_EXT_VENDOR_END,
 	.register_extensions	= sbi_ecall_vendor_register_extensions,
-	.probe			= sbi_ecall_vendor_probe,
 	.handle			= sbi_ecall_vendor_handler,
 };
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 539f8245c44..7c78d9bf706 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -323,12 +323,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
-	rc = sbi_ecall_init();
-	if (rc) {
-		sbi_printf("%s: ecall init failed (error %d)\n", __func__, rc);
-		sbi_hart_hang();
-	}
-
 	/*
 	 * Note: Finalize domains after HSM initialization so that we
 	 * can startup non-root domains.
@@ -350,8 +344,9 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	}
 
 	/*
-	 * Note: Platform final initialization should be last so that
-	 * it sees correct domain assignment and PMP configuration.
+	 * Note: Platform final initialization should be after finalizing
+	 * domains so that it sees correct domain assignment and PMP
+	 * configuration for FDT fixups.
 	 */
 	rc = sbi_platform_final_init(plat, true);
 	if (rc) {
@@ -360,6 +355,17 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
+	/*
+	 * Note: Ecall initialization should be after platform final
+	 * initialization so that all available platform devices are
+	 * already registered.
+	 */
+	rc = sbi_ecall_init();
+	if (rc) {
+		sbi_printf("%s: ecall init failed (error %d)\n", __func__, rc);
+		sbi_hart_hang();
+	}
+
 	sbi_boot_print_general(scratch);
 
 	sbi_boot_print_domains(scratch);

From 767b5fc4180a883497c081a95bb861a68651e9a6 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 15 May 2023 13:12:38 +0200
Subject: [PATCH 1273/1765] lib: sbi: Optimize probe of srst/susp

No need to do a fully comprehensive count, just find a supported reset
or suspend type

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_srst.c | 10 ++++++----
 lib/sbi/sbi_ecall_susp.c | 10 ++++++----
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
index ea0dc73f010..fd2dc0d251f 100644
--- a/lib/sbi/sbi_ecall_srst.c
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -50,7 +50,7 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 
 static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
 {
-	u32 type, count = 0;
+	u32 type;
 
 	/*
 	 * At least one standard reset types should be supported by
@@ -59,11 +59,13 @@ static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
 
 	for (type = 0; type <= SBI_SRST_RESET_TYPE_LAST; type++) {
 		if (sbi_system_reset_supported(type,
-					SBI_SRST_RESET_REASON_NONE))
-			count++;
+					SBI_SRST_RESET_REASON_NONE)) {
+			*out_val = 1;
+			return 0;
+		}
 	}
 
-	*out_val = (count) ? 1 : 0;
+	*out_val = 0;
 	return 0;
 }
 
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
index c4124046b92..716a6d585af 100644
--- a/lib/sbi/sbi_ecall_susp.c
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -25,18 +25,20 @@ static int sbi_ecall_susp_handler(unsigned long extid, unsigned long funcid,
 
 static int sbi_ecall_susp_probe(unsigned long extid, unsigned long *out_val)
 {
-	u32 type, count = 0;
+	u32 type;
 
 	/*
 	 * At least one suspend type should be supported by the
 	 * platform for the SBI SUSP extension to be usable.
 	 */
 	for (type = 0; type <= SBI_SUSP_SLEEP_TYPE_LAST; type++) {
-		if (sbi_system_suspend_supported(type))
-			count++;
+		if (sbi_system_suspend_supported(type)) {
+			*out_val = 1;
+			return 0;
+		}
 	}
 
-	*out_val = count ? 1 : 0;
+	*out_val = 0;
 	return 0;
 }
 

From c3e31cbf364e1c47392e57d31d055193946e866e Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:39 +0200
Subject: [PATCH 1274/1765] lib: sbi: Remove 0/1 probe implementations

When a probe implementation just returns zero for not available and
one for available then we don't need it, as the extension won't be
registered at all if it would return zero and the Base extension
probe function will already set out_val to 1 if not probe function
is implemented. Currently all probe functions only return zero or
one, so remove them all.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_cppc.c |  7 -------
 lib/sbi/sbi_ecall_dbcn.c |  7 -------
 lib/sbi/sbi_ecall_srst.c | 18 +++++-------------
 lib/sbi/sbi_ecall_susp.c | 17 +++++------------
 4 files changed, 10 insertions(+), 39 deletions(-)

diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index a6398ac7822..b54d54ec684 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -49,12 +49,6 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
-static int sbi_ecall_cppc_probe(unsigned long extid, unsigned long *out_val)
-{
-	*out_val = sbi_cppc_get_device() ? 1 : 0;
-	return 0;
-}
-
 struct sbi_ecall_extension ecall_cppc;
 
 static int sbi_ecall_cppc_register_extensions(void)
@@ -69,6 +63,5 @@ struct sbi_ecall_extension ecall_cppc = {
 	.extid_start		= SBI_EXT_CPPC,
 	.extid_end		= SBI_EXT_CPPC,
 	.register_extensions	= sbi_ecall_cppc_register_extensions,
-	.probe			= sbi_ecall_cppc_probe,
 	.handle			= sbi_ecall_cppc_handler,
 };
diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index cbb2e802e61..e0b892c2ed6 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -58,12 +58,6 @@ static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 	return SBI_ENOTSUPP;
 }
 
-static int sbi_ecall_dbcn_probe(unsigned long extid, unsigned long *out_val)
-{
-	*out_val = sbi_console_get_device() ? 1 : 0;
-	return 0;
-}
-
 struct sbi_ecall_extension ecall_dbcn;
 
 static int sbi_ecall_dbcn_register_extensions(void)
@@ -78,6 +72,5 @@ struct sbi_ecall_extension ecall_dbcn = {
 	.extid_start		= SBI_EXT_DBCN,
 	.extid_end		= SBI_EXT_DBCN,
 	.register_extensions	= sbi_ecall_dbcn_register_extensions,
-	.probe			= sbi_ecall_dbcn_probe,
 	.handle			= sbi_ecall_dbcn_handler,
 };
diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
index fd2dc0d251f..dcd560d22f9 100644
--- a/lib/sbi/sbi_ecall_srst.c
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -48,7 +48,7 @@ static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
 	return SBI_ENOTSUPP;
 }
 
-static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
+static bool srst_available(void)
 {
 	u32 type;
 
@@ -56,27 +56,20 @@ static int sbi_ecall_srst_probe(unsigned long extid, unsigned long *out_val)
 	 * At least one standard reset types should be supported by
 	 * the platform for SBI SRST extension to be usable.
 	 */
-
 	for (type = 0; type <= SBI_SRST_RESET_TYPE_LAST; type++) {
 		if (sbi_system_reset_supported(type,
-					SBI_SRST_RESET_REASON_NONE)) {
-			*out_val = 1;
-			return 0;
-		}
+					SBI_SRST_RESET_REASON_NONE))
+			return true;
 	}
 
-	*out_val = 0;
-	return 0;
+	return false;
 }
 
 struct sbi_ecall_extension ecall_srst;
 
 static int sbi_ecall_srst_register_extensions(void)
 {
-	unsigned long out_val;
-
-	sbi_ecall_srst_probe(SBI_EXT_SRST, &out_val);
-	if (!out_val)
+	if (!srst_available())
 		return 0;
 
 	return sbi_ecall_register_extension(&ecall_srst);
@@ -86,6 +79,5 @@ struct sbi_ecall_extension ecall_srst = {
 	.extid_start		= SBI_EXT_SRST,
 	.extid_end		= SBI_EXT_SRST,
 	.register_extensions	= sbi_ecall_srst_register_extensions,
-	.probe			= sbi_ecall_srst_probe,
 	.handle			= sbi_ecall_srst_handler,
 };
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
index 716a6d585af..2bfd99ae872 100644
--- a/lib/sbi/sbi_ecall_susp.c
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -23,7 +23,7 @@ static int sbi_ecall_susp_handler(unsigned long extid, unsigned long funcid,
 	return ret;
 }
 
-static int sbi_ecall_susp_probe(unsigned long extid, unsigned long *out_val)
+static bool susp_available(void)
 {
 	u32 type;
 
@@ -32,24 +32,18 @@ static int sbi_ecall_susp_probe(unsigned long extid, unsigned long *out_val)
 	 * platform for the SBI SUSP extension to be usable.
 	 */
 	for (type = 0; type <= SBI_SUSP_SLEEP_TYPE_LAST; type++) {
-		if (sbi_system_suspend_supported(type)) {
-			*out_val = 1;
-			return 0;
-		}
+		if (sbi_system_suspend_supported(type))
+			return true;
 	}
 
-	*out_val = 0;
-	return 0;
+	return false;
 }
 
 struct sbi_ecall_extension ecall_susp;
 
 static int sbi_ecall_susp_register_extensions(void)
 {
-	unsigned long out_val;
-
-	sbi_ecall_susp_probe(SBI_EXT_SUSP, &out_val);
-	if (!out_val)
+	if (!susp_available())
 		return 0;
 
 	return sbi_ecall_register_extension(&ecall_susp);
@@ -59,6 +53,5 @@ struct sbi_ecall_extension ecall_susp = {
 	.extid_start		= SBI_EXT_SUSP,
 	.extid_end		= SBI_EXT_SUSP,
 	.register_extensions	= sbi_ecall_susp_register_extensions,
-	.probe			= sbi_ecall_susp_probe,
 	.handle			= sbi_ecall_susp_handler,
 };

From 33f1722f2b6e1ad8f8bd0675271e3c7998d448c2 Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Mon, 15 May 2023 13:12:40 +0200
Subject: [PATCH 1275/1765] lib: sbi: Document sbi_ecall_extension members

With the introduction of the register_extensions callback the
range members (extid_start and extid_end) may now change and it
has become a bit subtle as to when a probe function should be
implemented. Document all the members and their relationship to
the register_extensions callback.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index fac26429cf5..90f33bac0bc 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -21,11 +21,46 @@ struct sbi_trap_regs;
 struct sbi_trap_info;
 
 struct sbi_ecall_extension {
+	/* head is used by the extension list */
 	struct sbi_dlist head;
+	/*
+	 * extid_start and extid_end specify the range for this extension. As
+	 * the initial range may be wider than the valid runtime range, the
+	 * register_extensions callback is responsible for narrowing the range
+	 * before other callbacks may be invoked.
+	 */
 	unsigned long extid_start;
 	unsigned long extid_end;
+	/*
+	 * register_extensions
+	 *
+	 * Calls sbi_ecall_register_extension() one or more times to register
+	 * extension ID range(s) which should be handled by this extension.
+	 * More than one sbi_ecall_extension struct and
+	 * sbi_ecall_register_extension() call is necessary when the supported
+	 * extension ID ranges have gaps. Additionally, extension availability
+	 * must be checked before registering, which means, when this callback
+	 * returns, only valid extension IDs from the initial range, which are
+	 * also available, have been registered.
+	 */
 	int (* register_extensions)(void);
+	/*
+	 * probe
+	 *
+	 * Implements the Base extension's probe function for the extension. As
+	 * the register_extensions callback ensures that no other extension
+	 * callbacks will be invoked when the extension is not available, then
+	 * probe can never fail. However, an extension may choose to set
+	 * out_val to a nonzero value other than one. In those cases, it should
+	 * implement this callback.
+	 */
 	int (* probe)(unsigned long extid, unsigned long *out_val);
+	/*
+	 * handle
+	 *
+	 * This is the extension handler. register_extensions ensures it is
+	 * never invoked with an invalid or unavailable extension ID.
+	 */
 	int (* handle)(unsigned long extid, unsigned long funcid,
 		       const struct sbi_trap_regs *regs,
 		       unsigned long *out_val,

From d4c46e0ff1b0ead9d5a586e1a19a00a92160206d Mon Sep 17 00:00:00 2001
From: Filip Filmar <fmil@google.com>
Date: Tue, 16 May 2023 02:38:45 +0000
Subject: [PATCH 1276/1765] Makefile: Dereference symlinks on install

Adds the `-L` flag (follow symlinks) to the `cp` commands used to
install `libsbi.a` and `include/sbi/*`.

This should make no difference in regular compilation. However,
it does make a difference when compiling with bazel.  Namely,
bazel's sandboxing will turn all the source files into symlinks.
After installation with `cp` the destination files will be
symlinks pointing to the sandbox symlinks. As the sandbox files
are removed when compilation ends, the just-copied symlinks
become dangling symlinks.

The resulting include files will be
unusable due to the dangling symlink issues. Adding `-L` when
copying ensures that the files obtained by executing the `install`
targets are always dereferenced to files, rather than symlinks,
eliminating this issue.

Signed-off-by: Filip Filmar <fmil@google.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index a26a39baf12..730dbd910e5 100644
--- a/Makefile
+++ b/Makefile
@@ -401,10 +401,10 @@ merge_deps = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     cat $(2) > $(1)
 copy_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " COPY      $(subst $(build_dir)/,,$(1))"; \
-	     cp -f $(2) $(1)
+	     cp -L -f $(2) $(1)
 inst_file =  $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " INSTALL   $(subst $(install_root_dir)/,,$(1))"; \
-	     cp -f $(2) $(1)
+	     cp -L -f $(2) $(1)
 inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 	     mkdir -p $(1)/$(3); \
 	     for file in $(4) ; do \
@@ -413,12 +413,12 @@ inst_file_list = $(CMD_PREFIX)if [ ! -z "$(4)" ]; then \
 	     dest_dir=`dirname $$dest_file`; \
 	     echo " INSTALL   "$(3)"/"`echo $$rel_file`; \
 	     mkdir -p $$dest_dir; \
-	     cp -f $$file $$dest_file; \
+	     cp -L -f $$file $$dest_file; \
 	     done \
 	     fi
 inst_header_dir =  $(CMD_PREFIX)mkdir -p $(1); \
 	     echo " INSTALL   $(subst $(install_root_dir)/,,$(1))"; \
-	     cp -rf $(2) $(1)
+	     cp -L -rf $(2) $(1)
 compile_cpp_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CPP-DEP   $(subst $(build_dir)/,,$(1))"; \
 	     printf %s `dirname $(1)`/  > $(1) && \

From 8b99a7f7d8294be29e18a667d51e13755ed2c0e0 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 22 May 2023 13:18:06 +0800
Subject: [PATCH 1277/1765] lib: sbi: Fix return of sbi_console_init

console is not a required peripheral. So it should return success when
the console does not exist.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index f3ac0033460..168dffd0642 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -481,5 +481,11 @@ void sbi_console_set_device(const struct sbi_console_device *dev)
 
 int sbi_console_init(struct sbi_scratch *scratch)
 {
-	return sbi_platform_console_init(sbi_platform_ptr(scratch));
+	int rc = sbi_platform_console_init(sbi_platform_ptr(scratch));
+
+	/* console is not a necessary device */
+	if (rc == SBI_ENODEV)
+		return 0;
+
+	return rc;
 }

From 264d0be1fdd93874bc8f4a365c911e15ec330ce5 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 22 May 2023 13:18:07 +0800
Subject: [PATCH 1278/1765] lib: utils: Improve fdt_serial_init

A final check of all DT nodes does not necessarily find a match, so
SBI_ENODEV needs to be returned. Optimize removal of current_driver.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/fdt_serial.c | 48 +++++++++++++----------------------
 1 file changed, 17 insertions(+), 31 deletions(-)

diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 1a4bf9e87b6..0baa7228117 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -17,13 +17,6 @@
 extern struct fdt_serial *fdt_serial_drivers[];
 extern unsigned long fdt_serial_drivers_size;
 
-static struct fdt_serial dummy = {
-	.match_table = NULL,
-	.init = NULL,
-};
-
-static struct fdt_serial *current_driver = &dummy;
-
 int fdt_serial_init(void)
 {
 	const void *prop;
@@ -57,20 +50,15 @@ int fdt_serial_init(void)
 		if (!match)
 			continue;
 
-		if (drv->init) {
-			rc = drv->init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-		}
-		current_driver = drv;
-		break;
-	}
+		/* drv->init must not be NULL */
+		if (drv->init == NULL)
+			return SBI_EFAIL;
 
-	/* Check if we found desired driver */
-	if (current_driver != &dummy)
-		goto done;
+		rc = drv->init(fdt, noff, match);
+		if (rc == SBI_ENODEV)
+			continue;
+		return rc;
+	}
 
 	/* Lastly check all DT nodes */
 	for (pos = 0; pos < fdt_serial_drivers_size; pos++) {
@@ -80,17 +68,15 @@ int fdt_serial_init(void)
 		if (noff < 0)
 			continue;
 
-		if (drv->init) {
-			rc = drv->init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-		}
-		current_driver = drv;
-		break;
+		/* drv->init must not be NULL */
+		if (drv->init == NULL)
+			return SBI_EFAIL;
+
+		rc = drv->init(fdt, noff, match);
+		if (rc == SBI_ENODEV)
+			continue;
+		return rc;
 	}
 
-done:
-	return 0;
+	return SBI_ENODEV;
 }

From 9a0bdd0c844ea87a7b83c313e1dd8e8152d508e7 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 22 May 2023 13:18:08 +0800
Subject: [PATCH 1279/1765] lib: utils: Improve fdt_ipi

Remove dummy driver. Optimize fdt_ipi_cold_init to exit the loop
early.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/fdt_ipi.c | 41 +++++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 66dc51082ed..7762ababe59 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -16,24 +16,17 @@
 extern struct fdt_ipi *fdt_ipi_drivers[];
 extern unsigned long fdt_ipi_drivers_size;
 
-static struct fdt_ipi dummy = {
-	.match_table = NULL,
-	.cold_init = NULL,
-	.warm_init = NULL,
-	.exit = NULL,
-};
-
-static struct fdt_ipi *current_driver = &dummy;
+static struct fdt_ipi *current_driver = NULL;
 
 void fdt_ipi_exit(void)
 {
-	if (current_driver->exit)
+	if (current_driver && current_driver->exit)
 		current_driver->exit();
 }
 
 static int fdt_ipi_warm_init(void)
 {
-	if (current_driver->warm_init)
+	if (current_driver && current_driver->warm_init)
 		return current_driver->warm_init();
 	return 0;
 }
@@ -51,20 +44,28 @@ static int fdt_ipi_cold_init(void)
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
-			if (drv->cold_init) {
-				rc = drv->cold_init(fdt, noff, match);
-				if (rc == SBI_ENODEV)
-					continue;
-				if (rc)
-					return rc;
-			}
+			/* drv->cold_init must not be NULL */
+			if (drv->cold_init == NULL)
+				return SBI_EFAIL;
+
+			rc = drv->cold_init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			if (rc)
+				return rc;
 			current_driver = drv;
-		}
 
-		if (current_driver != &dummy)
-			break;
+			/*
+			 * We will have multiple IPI devices on multi-die or
+			 * multi-socket systems so we cannot break here.
+			 */
+		}
 	}
 
+	/*
+	 * On some single-hart system there is no need for ipi,
+	 * so we cannot return a failure here
+	 */
 	return 0;
 }
 

From 122f2260b350e94e4e79439ea289f08a329eb14a Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 22 May 2023 13:18:09 +0800
Subject: [PATCH 1280/1765] lib: utils: Improve fdt_timer

Remove dummy driver. Optimize fdt_timer_cold_init to exit the
loop early.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/fdt_timer.c | 41 +++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 4695c0f02aa..62426a70fb0 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -16,24 +16,17 @@
 extern struct fdt_timer *fdt_timer_drivers[];
 extern unsigned long fdt_timer_drivers_size;
 
-static struct fdt_timer dummy = {
-	.match_table = NULL,
-	.cold_init = NULL,
-	.warm_init = NULL,
-	.exit = NULL,
-};
-
-static struct fdt_timer *current_driver = &dummy;
+static struct fdt_timer *current_driver = NULL;
 
 void fdt_timer_exit(void)
 {
-	if (current_driver->exit)
+	if (current_driver && current_driver->exit)
 		current_driver->exit();
 }
 
 static int fdt_timer_warm_init(void)
 {
-	if (current_driver->warm_init)
+	if (current_driver && current_driver->warm_init)
 		return current_driver->warm_init();
 	return 0;
 }
@@ -51,20 +44,28 @@ static int fdt_timer_cold_init(void)
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
-			if (drv->cold_init) {
-				rc = drv->cold_init(fdt, noff, match);
-				if (rc == SBI_ENODEV)
-					continue;
-				if (rc)
-					return rc;
-			}
+			/* drv->cold_init must not be NULL */
+			if (drv->cold_init == NULL)
+				return SBI_EFAIL;
+
+			rc = drv->cold_init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			if (rc)
+				return rc;
 			current_driver = drv;
-		}
 
-		if (current_driver != &dummy)
-			break;
+			/*
+			 * We will have multiple timer devices on multi-die or
+			 * multi-socket systems so we cannot break here.
+			 */
+		}
 	}
 
+	/*
+	 * We can't fail here since systems with Sstc might not provide
+	 * mtimer/clint DT node in the device tree.
+	 */
 	return 0;
 }
 

From df75e0995689842b3022a4a8d4d69e980430c129 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 29 May 2023 11:27:20 +0200
Subject: [PATCH 1281/1765] lib: utils/ipi: buffer overrun
 aclint_mswi_cold_init

The parameter checks in aclint_mswi_cold_init() don't guard against a
buffer overrun.

mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries.
The current check allows

    mswi->hart_count = ACLINT_MSWI_MAX_HARTS
    mswi->first_hartid = SBI_HARTMASK_MAX_BITS - 1.

With these values mswi_hartid2data will be accessed at index

    SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2.

We have to check the sum of mswi->first_hartid and mswi->hart_count.

Furthermore mswi->hart_count = 0 would not make much sense.

Addresses-Coverity-ID: 1529705 ("Out-of-bounds write")
Fixes: 5a049fe1d6a5 ("lib: utils/ipi: Add ACLINT MSWI library")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/aclint_mswi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 6b004cb9efb..ac8570bc5fa 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -75,8 +75,8 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 	/* Sanity checks */
 	if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
 	    (mswi->size < (mswi->hart_count * sizeof(u32))) ||
-	    (mswi->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
-	    (mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
+	    (mswi->first_hartid + mswi->hart_count > SBI_HARTMASK_MAX_BITS) ||
+	    (!mswi->hart_count || mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
 		return SBI_EINVAL;
 
 	/* Update MSWI hartid table */

From bdde2ecd27af1ac158669809f6658376fb5137ab Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Thu, 1 Jun 2023 09:48:10 +0200
Subject: [PATCH 1282/1765] lib: sbi: Align system suspend errors with spec

The spec says sbi_system_suspend() will return SBI_ERR_INVALID_PARAM
when "sleep_type is reserved or is platform-specific and unimplemented"
and SBI_ERR_NOT_SUPPORTED when sleep_type "is not reserved and is
implemented, but the platform does not support it due to one or more
missing dependencies." Ensure SBI_ERR_INVALID_PARAM is returned for
reserved sleep types and that the system suspend driver can choose
which of the two error types to return itself by returning an error
from its check function rather than a boolean.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_system.h |  9 ++++++++-
 lib/sbi/sbi_system.c     | 14 ++++++++------
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_system.h b/include/sbi/sbi_system.h
index 33ff7f1a44a..0fdcc98cce5 100644
--- a/include/sbi/sbi_system.h
+++ b/include/sbi/sbi_system.h
@@ -48,7 +48,14 @@ struct sbi_system_suspend_device {
 	/** Name of the system suspend device */
 	char name[32];
 
-	/* Check whether sleep type is supported by the device */
+	/**
+	 * Check whether sleep type is supported by the device
+	 *
+	 * Returns 0 when @sleep_type supported, SBI_ERR_INVALID_PARAM
+	 * when @sleep_type is reserved, or SBI_ERR_NOT_SUPPORTED when
+	 * @sleep_type is not reserved and is implemented, but the
+	 * platform doesn't support it due to missing dependencies.
+	 */
 	int (*system_suspend_check)(u32 sleep_type);
 
 	/**
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 6933915a12e..d803ffa8418 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -111,7 +111,7 @@ void sbi_system_suspend_set_device(struct sbi_system_suspend_device *dev)
 
 static int sbi_system_suspend_test_check(u32 sleep_type)
 {
-	return sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND;
+	return sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND ? 0 : SBI_EINVAL;
 }
 
 static int sbi_system_suspend_test_suspend(u32 sleep_type,
@@ -142,27 +142,29 @@ void sbi_system_suspend_test_enable(void)
 bool sbi_system_suspend_supported(u32 sleep_type)
 {
 	return suspend_dev && suspend_dev->system_suspend_check &&
-	       suspend_dev->system_suspend_check(sleep_type);
+	       suspend_dev->system_suspend_check(sleep_type) == 0;
 }
 
 int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 {
-	int ret = SBI_ENOTSUPP;
 	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 	unsigned int hartid = current_hartid();
 	unsigned long prev_mode;
 	unsigned long i;
+	int ret;
 
 	if (!dom || !dom->system_suspend_allowed)
 		return SBI_EFAIL;
 
-	if (!suspend_dev || !suspend_dev->system_suspend)
+	if (!suspend_dev || !suspend_dev->system_suspend ||
+	    !suspend_dev->system_suspend_check)
 		return SBI_EFAIL;
 
-	if (!sbi_system_suspend_supported(sleep_type))
-		return SBI_ENOTSUPP;
+	ret = suspend_dev->system_suspend_check(sleep_type);
+	if (ret != SBI_OK)
+		return ret;
 
 	prev_mode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 	if (prev_mode != PRV_S && prev_mode != PRV_U)

From aad7a377051136c2e0f4adeea2689167a294d2b4 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 5 Jun 2023 12:22:37 +0530
Subject: [PATCH 1283/1765] include: sbi_scratch: Add helper macros to access
 data type

Reading and writing a data type in scratch space is a very common
use-case so let us add related helper macros in sbi_scratch.h.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_scratch.h | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 2966188d699..58f2d06b2d9 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -174,6 +174,23 @@ void sbi_scratch_free_offset(unsigned long offset);
 #define sbi_scratch_thishart_offset_ptr(offset)	\
 	(void *)((char *)sbi_scratch_thishart_ptr() + (offset))
 
+/** Allocate offset for a data type in sbi_scratch */
+#define sbi_scratch_alloc_type_offset(__type)				\
+	sbi_scratch_alloc_offset(sizeof(__type))
+
+/** Read a data type from sbi_scratch at given offset */
+#define sbi_scratch_read_type(__scratch, __type, __offset)		\
+({									\
+	*((__type *)sbi_scratch_offset_ptr((__scratch), (__offset)));	\
+})
+
+/** Write a data type to sbi_scratch at given offset */
+#define sbi_scratch_write_type(__scratch, __type, __offset, __ptr)	\
+do {									\
+	*((__type *)sbi_scratch_offset_ptr((__scratch), (__offset)))	\
+					= (__type)(__ptr);		\
+} while (0)
+
 /** HART id to scratch table */
 extern struct sbi_scratch *hartid_to_scratch_table[];
 

From 5cf9a540164a018a31a679578a27eb964af0340d Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 17 Apr 2023 11:28:03 +0530
Subject: [PATCH 1284/1765] platform: Allow platforms to specify heap size

We extend struct sbi_platform and struct sbi_scratch to allow platforms
specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares
will use this information to determine the location of heap and provide
heap base address in per-HART scratch space.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 firmware/fw_base.S                 | 15 +++++++++++++++
 include/sbi/sbi_platform.h         | 18 +++++++++++++++---
 include/sbi/sbi_scratch.h          | 28 ++++++++++++++++++----------
 platform/fpga/ariane/platform.c    |  1 +
 platform/fpga/openpiton/platform.c |  2 ++
 platform/generic/platform.c        |  3 ++-
 platform/kendryte/k210/platform.c  |  2 ++
 platform/nuclei/ux600/platform.c   |  2 ++
 platform/template/platform.c       |  1 +
 9 files changed, 58 insertions(+), 14 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index e37df095845..fff09e1365c 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -255,20 +255,28 @@ _bss_zero:
 	/* Preload HART details
 	 * s7 -> HART Count
 	 * s8 -> HART Stack Size
+	 * s9 -> Heap Size
+	 * s10 -> Heap Offset
 	 */
 	lla	a4, platform
 #if __riscv_xlen > 32
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+	lwu	s9, SBI_PLATFORM_HEAP_SIZE_OFFSET(a4)
 #else
 	lw	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lw	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
+	lw	s9, SBI_PLATFORM_HEAP_SIZE_OFFSET(a4)
 #endif
 
 	/* Setup scratch space for all the HARTs*/
 	lla	tp, _fw_end
 	mul	a5, s7, s8
 	add	tp, tp, a5
+	/* Setup heap base address */
+	lla	s10, _fw_start
+	sub	s10, tp, s10
+	add	tp, tp, s9
 	/* Keep a copy of tp */
 	add	t3, tp, zero
 	/* Counter */
@@ -283,8 +291,11 @@ _scratch_init:
 	 * t3 -> the firmware end address
 	 * s7 -> HART count
 	 * s8 -> HART stack size
+	 * s9 -> Heap Size
+	 * s10 -> Heap Offset
 	 */
 	add	tp, t3, zero
+	sub	tp, tp, s9
 	mul	a5, s8, t1
 	sub	tp, tp, a5
 	li	a5, SBI_SCRATCH_SIZE
@@ -302,6 +313,10 @@ _scratch_init:
 	REG_L	a5, 0(a4)
 	REG_S	a5, SBI_SCRATCH_FW_RW_OFFSET(tp)
 
+	/* Store fw_heap_offset and fw_heap_size in scratch space */
+	REG_S	s10, SBI_SCRATCH_FW_HEAP_OFFSET(tp)
+	REG_S	s9, SBI_SCRATCH_FW_HEAP_SIZE_OFFSET(tp)
+
 	/* Store next arg1 in scratch space */
 	MOV_3R	s0, a0, s1, a1, s2, a2
 	call	fw_next_arg1
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 546c0a61acb..3e9616f6daf 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -29,12 +29,16 @@
 #define SBI_PLATFORM_HART_COUNT_OFFSET (0x50)
 /** Offset of hart_stack_size in struct sbi_platform */
 #define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x54)
+/** Offset of heap_size in struct sbi_platform */
+#define SBI_PLATFORM_HEAP_SIZE_OFFSET (0x58)
+/** Offset of reserved in struct sbi_platform */
+#define SBI_PLATFORM_RESERVED_OFFSET (0x5c)
 /** Offset of platform_ops_addr in struct sbi_platform */
-#define SBI_PLATFORM_OPS_OFFSET (0x58)
+#define SBI_PLATFORM_OPS_OFFSET (0x60)
 /** Offset of firmware_context in struct sbi_platform */
-#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x58 + __SIZEOF_POINTER__)
+#define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
 /** Offset of hart_index2id in struct sbi_platform */
-#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x58 + (__SIZEOF_POINTER__ * 2))
+#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
@@ -138,6 +142,10 @@ struct sbi_platform_operations {
 /** Platform default per-HART stack size for exception/interrupt handling */
 #define SBI_PLATFORM_DEFAULT_HART_STACK_SIZE	8192
 
+/** Platform default heap size */
+#define SBI_PLATFORM_DEFAULT_HEAP_SIZE(__num_hart)	\
+					(0x8000 + 0x800 * (__num_hart))
+
 /** Representation of a platform */
 struct sbi_platform {
 	/**
@@ -160,6 +168,10 @@ struct sbi_platform {
 	u32 hart_count;
 	/** Per-HART stack size for exception/interrupt handling */
 	u32 hart_stack_size;
+	/** Size of heap shared by all HARTs */
+	u32 heap_size;
+	/** Reserved for future use */
+	u32 reserved;
 	/** Pointer to sbi platform operations */
 	unsigned long platform_ops_addr;
 	/** Pointer to system firmware specific context */
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 58f2d06b2d9..9894c704757 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -20,26 +20,30 @@
 #define SBI_SCRATCH_FW_SIZE_OFFSET		(1 * __SIZEOF_POINTER__)
 /** Offset (in sbi_scratch) of the R/W Offset */
 #define SBI_SCRATCH_FW_RW_OFFSET		(2 * __SIZEOF_POINTER__)
+/** Offset of fw_heap_offset member in sbi_scratch */
+#define SBI_SCRATCH_FW_HEAP_OFFSET		(3 * __SIZEOF_POINTER__)
+/** Offset of fw_heap_size_offset member in sbi_scratch */
+#define SBI_SCRATCH_FW_HEAP_SIZE_OFFSET		(4 * __SIZEOF_POINTER__)
 /** Offset of next_arg1 member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(3 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ARG1_OFFSET		(5 * __SIZEOF_POINTER__)
 /** Offset of next_addr member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(4 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_ADDR_OFFSET		(6 * __SIZEOF_POINTER__)
 /** Offset of next_mode member in sbi_scratch */
-#define SBI_SCRATCH_NEXT_MODE_OFFSET		(5 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_NEXT_MODE_OFFSET		(7 * __SIZEOF_POINTER__)
 /** Offset of warmboot_addr member in sbi_scratch */
-#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(6 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_WARMBOOT_ADDR_OFFSET	(8 * __SIZEOF_POINTER__)
 /** Offset of platform_addr member in sbi_scratch */
-#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(7 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(9 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
-#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(8 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(10 * __SIZEOF_POINTER__)
 /** Offset of trap_exit member in sbi_scratch */
-#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(9 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(11 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(10 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET			(12 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET		(11 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET		(13 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(12 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(14 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -57,6 +61,10 @@ struct sbi_scratch {
 	unsigned long fw_size;
 	/** Offset (in bytes) of the R/W section */
 	unsigned long fw_rw_offset;
+	/** Offset (in bytes) of the heap area */
+	unsigned long fw_heap_offset;
+	/** Size (in bytes) of the heap area */
+	unsigned long fw_heap_size;
 	/** Arg1 (or 'a1' register) of next booting stage for this HART */
 	unsigned long next_arg1;
 	/** Address of next booting stage for this HART */
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 1e341c2049f..975528f1372 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -185,5 +185,6 @@ const struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = ARIANE_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(ARIANE_HART_COUNT),
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 57ae6980924..e59dc992fe3 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -220,5 +220,7 @@ const struct sbi_platform platform = {
 	.features = SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count = OPENPITON_DEFAULT_HART_COUNT,
 	.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size =
+		SBI_PLATFORM_DEFAULT_HEAP_SIZE(OPENPITON_DEFAULT_HART_COUNT),
 	.platform_ops_addr = (unsigned long)&platform_ops
 };
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index eeefef4c953..0c9cd951817 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -115,7 +115,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 	}
 
 	platform.hart_count = hart_count;
-
+	platform.heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(hart_count);
 	platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
 
 	/* Return original FDT pointer */
@@ -315,5 +315,6 @@ struct sbi_platform platform = {
 	.hart_count		= SBI_HARTMASK_MAX_BITS,
 	.hart_index2id		= generic_hart_index2id,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size		= SBI_PLATFORM_DEFAULT_HEAP_SIZE(0),
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 7eb9015bb85..637a217fcd7 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -196,5 +196,7 @@ const struct sbi_platform platform = {
 	.features		= 0,
 	.hart_count		= K210_HART_COUNT,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size		=
+			SBI_PLATFORM_DEFAULT_HEAP_SIZE(K210_HART_COUNT),
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 4eccff15ee2..6fd6cd7082f 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -244,5 +244,7 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= UX600_HART_COUNT,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size		=
+			SBI_PLATFORM_DEFAULT_HEAP_SIZE(UX600_HART_COUNT),
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 8adc431f1ce..86381ca2b70 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -152,5 +152,6 @@ const struct sbi_platform platform = {
 	.features		= SBI_PLATFORM_DEFAULT_FEATURES,
 	.hart_count		= 1,
 	.hart_stack_size	= SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+	.heap_size		= SBI_PLATFORM_DEFAULT_HEAP_SIZE(1),
 	.platform_ops_addr	= (unsigned long)&platform_ops
 };

From 40d36a6673131e36075b1df78af4d7ab92e8cc01 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 18 Apr 2023 18:38:21 +0530
Subject: [PATCH 1285/1765] lib: sbi: Introduce simple heap allocator

We provide simple heap allocator to manage the heap space provided
by OpenSBI firmware and platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_heap.h |  44 +++++++++
 lib/sbi/objects.mk     |   1 +
 lib/sbi/sbi_heap.c     | 206 +++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c     |  15 +++
 4 files changed, 266 insertions(+)
 create mode 100644 include/sbi/sbi_heap.h
 create mode 100644 lib/sbi/sbi_heap.c

diff --git a/include/sbi/sbi_heap.h b/include/sbi/sbi_heap.h
new file mode 100644
index 00000000000..88d176ef0ed
--- /dev/null
+++ b/include/sbi/sbi_heap.h
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel<apatel@ventanamicro.com>
+ */
+
+#ifndef __SBI_HEAP_H__
+#define __SBI_HEAP_H__
+
+#include <sbi/sbi_types.h>
+
+struct sbi_scratch;
+
+/** Allocate from heap area */
+void *sbi_malloc(size_t size);
+
+/** Zero allocate from heap area */
+void *sbi_zalloc(size_t size);
+
+/** Allocate array from heap area */
+static inline void *sbi_calloc(size_t nitems, size_t size)
+{
+	return sbi_zalloc(nitems * size);
+}
+
+/** Free-up to heap area */
+void sbi_free(void *ptr);
+
+/** Amount (in bytes) of free space in the heap area */
+unsigned long sbi_heap_free_space(void);
+
+/** Amount (in bytes) of used space in the heap area */
+unsigned long sbi_heap_used_space(void);
+
+/** Amount (in bytes) of reserved space in the heap area */
+unsigned long sbi_heap_reserved_space(void);
+
+/** Initialize heap area */
+int sbi_heap_init(struct sbi_scratch *scratch);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 7d691c61f0e..c6991870191 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -59,6 +59,7 @@ libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_hart.o
+libsbi-objs-y += sbi_heap.o
 libsbi-objs-y += sbi_math.o
 libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hsm.o
diff --git a/lib/sbi/sbi_heap.c b/lib/sbi/sbi_heap.c
new file mode 100644
index 00000000000..698c3775d99
--- /dev/null
+++ b/lib/sbi/sbi_heap.c
@@ -0,0 +1,206 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel<apatel@ventanamicro.com>
+ */
+
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_list.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+
+/* Alignment of heap base address and size */
+#define HEAP_BASE_ALIGN			1024
+/* Minimum size and alignment of heap allocations */
+#define HEAP_ALLOC_ALIGN		64
+#define HEAP_HOUSEKEEPING_FACTOR	16
+
+struct heap_node {
+	struct sbi_dlist head;
+	unsigned long addr;
+	unsigned long size;
+};
+
+struct heap_control {
+	spinlock_t lock;
+	unsigned long base;
+	unsigned long size;
+	unsigned long hkbase;
+	unsigned long hksize;
+	struct sbi_dlist free_node_list;
+	struct sbi_dlist free_space_list;
+	struct sbi_dlist used_space_list;
+};
+
+static struct heap_control hpctrl;
+
+void *sbi_malloc(size_t size)
+{
+	void *ret = NULL;
+	struct heap_node *n, *np;
+
+	if (!size)
+		return NULL;
+
+	size += HEAP_ALLOC_ALIGN - 1;
+	size &= ~((unsigned long)HEAP_ALLOC_ALIGN - 1);
+
+	spin_lock(&hpctrl.lock);
+
+	np = NULL;
+	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head) {
+		if (size <= n->size) {
+			np = n;
+			break;
+		}
+	}
+	if (np) {
+		if ((size < np->size) &&
+		    !sbi_list_empty(&hpctrl.free_node_list)) {
+			n = sbi_list_first_entry(&hpctrl.free_node_list,
+						 struct heap_node, head);
+			sbi_list_del(&n->head);
+			n->addr = np->addr + np->size - size;
+			n->size = size;
+			np->size -= size;
+			sbi_list_add_tail(&n->head, &hpctrl.used_space_list);
+			ret = (void *)n->addr;
+		} else if (size == np->size) {
+			sbi_list_del(&np->head);
+			sbi_list_add_tail(&np->head, &hpctrl.used_space_list);
+			ret = (void *)np->addr;
+		}
+	}
+
+	spin_unlock(&hpctrl.lock);
+
+	return ret;
+}
+
+void *sbi_zalloc(size_t size)
+{
+	void *ret = sbi_malloc(size);
+
+	if (ret)
+		sbi_memset(ret, 0, size);
+	return ret;
+}
+
+void sbi_free(void *ptr)
+{
+	struct heap_node *n, *np;
+
+	if (!ptr)
+		return;
+
+	spin_lock(&hpctrl.lock);
+
+	np = NULL;
+	sbi_list_for_each_entry(n, &hpctrl.used_space_list, head) {
+		if ((n->addr <= (unsigned long)ptr) &&
+		    ((unsigned long)ptr < (n->addr + n->size))) {
+			np = n;
+			break;
+		}
+	}
+	if (!np) {
+		spin_unlock(&hpctrl.lock);
+		return;
+	}
+
+	sbi_list_del(&np->head);
+
+	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head) {
+		if ((np->addr + np->size) == n->addr) {
+			n->addr = np->addr;
+			n->size += np->size;
+			sbi_list_add_tail(&np->head, &hpctrl.free_node_list);
+			np = NULL;
+			break;
+		} else if (np->addr == (n->addr + n->size)) {
+			n->size += np->size;
+			sbi_list_add_tail(&np->head, &hpctrl.free_node_list);
+			np = NULL;
+			break;
+		} else if ((n->addr + n->size) < np->addr) {
+			sbi_list_add(&np->head, &n->head);
+			np = NULL;
+			break;
+		}
+	}
+	if (np)
+		sbi_list_add_tail(&np->head, &hpctrl.free_space_list);
+
+	spin_unlock(&hpctrl.lock);
+}
+
+unsigned long sbi_heap_free_space(void)
+{
+	struct heap_node *n;
+	unsigned long ret = 0;
+
+	spin_lock(&hpctrl.lock);
+	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head)
+		ret += n->size;
+	spin_unlock(&hpctrl.lock);
+
+	return ret;
+}
+
+unsigned long sbi_heap_used_space(void)
+{
+	return hpctrl.size - hpctrl.hksize - sbi_heap_free_space();
+}
+
+unsigned long sbi_heap_reserved_space(void)
+{
+	return hpctrl.hksize;
+}
+
+int sbi_heap_init(struct sbi_scratch *scratch)
+{
+	unsigned long i;
+	struct heap_node *n;
+
+	/* Sanity checks on heap offset and size */
+	if (!scratch->fw_heap_size ||
+	    (scratch->fw_heap_size & (HEAP_BASE_ALIGN - 1)) ||
+	    (scratch->fw_heap_offset < scratch->fw_rw_offset) ||
+	    (scratch->fw_size < (scratch->fw_heap_offset + scratch->fw_heap_size)) ||
+	    (scratch->fw_heap_offset & (HEAP_BASE_ALIGN - 1)))
+		return SBI_EINVAL;
+
+	/* Initialize heap control */
+	SPIN_LOCK_INIT(hpctrl.lock);
+	hpctrl.base = scratch->fw_start + scratch->fw_heap_offset;
+	hpctrl.size = scratch->fw_heap_size;
+	hpctrl.hkbase = hpctrl.base;
+	hpctrl.hksize = hpctrl.size / HEAP_HOUSEKEEPING_FACTOR;
+	hpctrl.hksize &= ~((unsigned long)HEAP_BASE_ALIGN - 1);
+	SBI_INIT_LIST_HEAD(&hpctrl.free_node_list);
+	SBI_INIT_LIST_HEAD(&hpctrl.free_space_list);
+	SBI_INIT_LIST_HEAD(&hpctrl.used_space_list);
+
+	/* Prepare free node list */
+	for (i = 0; i < (hpctrl.hksize / sizeof(*n)); i++) {
+		n = (struct heap_node *)(hpctrl.hkbase + (sizeof(*n) * i));
+		SBI_INIT_LIST_HEAD(&n->head);
+		n->addr = n->size = 0;
+		sbi_list_add_tail(&n->head, &hpctrl.free_node_list);
+	}
+
+	/* Prepare free space list */
+	n = sbi_list_first_entry(&hpctrl.free_node_list,
+				 struct heap_node, head);
+	sbi_list_del(&n->head);
+	n->addr = hpctrl.hkbase + hpctrl.hksize;
+	n->size = hpctrl.size - hpctrl.hksize;
+	sbi_list_add_tail(&n->head, &hpctrl.free_space_list);
+
+	return 0;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 7c78d9bf706..a1705254d9d 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_irqchip.h>
@@ -118,6 +119,15 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 	sbi_printf("Firmware Size             : %d KB\n",
 		   (u32)(scratch->fw_size / 1024));
 	sbi_printf("Firmware RW Offset        : 0x%lx\n", scratch->fw_rw_offset);
+	sbi_printf("Firmware RW Size          : %d KB\n",
+		   (u32)((scratch->fw_size - scratch->fw_rw_offset) / 1024));
+	sbi_printf("Firmware Heap Offset      : 0x%lx\n", scratch->fw_heap_offset);
+	sbi_printf("Firmware Heap Size        : "
+		   "%d KB (total), %d KB (reserved), %d KB (used), %d KB (free)\n",
+		   (u32)(scratch->fw_heap_size / 1024),
+		   (u32)(sbi_heap_reserved_space() / 1024),
+		   (u32)(sbi_heap_used_space() / 1024),
+		   (u32)(sbi_heap_free_space() / 1024));
 
 	/* SBI details */
 	sbi_printf("Runtime SBI Version       : %d.%d\n",
@@ -258,6 +268,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 
 	/* Note: This has to be second thing in coldboot init sequence */
+	rc = sbi_heap_init(scratch);
+	if (rc)
+		sbi_hart_hang();
+
+	/* Note: This has to be the third thing in coldboot init sequence */
 	rc = sbi_domain_init(scratch, hartid);
 	if (rc)
 		sbi_hart_hang();

From 2a04f7037317c6c5b591b160a074c700de9b3378 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 20 Apr 2023 14:02:37 +0530
Subject: [PATCH 1286/1765] lib: sbi: Print scratch size and usage at boot time

The scratch space being a scarce resource so let us print it's
size and usage at boot time.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_scratch.h |  3 +++
 lib/sbi/sbi_init.c        |  5 +++++
 lib/sbi/sbi_scratch.c     | 11 +++++++++++
 3 files changed, 19 insertions(+)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 9894c704757..48014923e36 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -175,6 +175,9 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size);
 /** Free-up extra space in sbi_scratch */
 void sbi_scratch_free_offset(unsigned long offset);
 
+/** Amount (in bytes) of used space in in sbi_scratch */
+unsigned long sbi_scratch_used_space(void);
+
 /** Get pointer from offset in sbi_scratch */
 #define sbi_scratch_offset_ptr(scratch, offset)	(void *)((char *)(scratch) + (offset))
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index a1705254d9d..423e6d83650 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -128,6 +128,11 @@ static void sbi_boot_print_general(struct sbi_scratch *scratch)
 		   (u32)(sbi_heap_reserved_space() / 1024),
 		   (u32)(sbi_heap_used_space() / 1024),
 		   (u32)(sbi_heap_free_space() / 1024));
+	sbi_printf("Firmware Scratch Size     : "
+		   "%d B (total), %d B (used), %d B (free)\n",
+		   SBI_SCRATCH_SIZE,
+		   (u32)sbi_scratch_used_space(),
+		   (u32)(SBI_SCRATCH_SIZE - sbi_scratch_used_space()));
 
 	/* SBI details */
 	sbi_printf("Runtime SBI Version       : %d.%d\n",
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 55ebdbb76a8..87ef84cafd3 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -97,3 +97,14 @@ void sbi_scratch_free_offset(unsigned long offset)
 	 * brain-dead allocator.
 	 */
 }
+
+unsigned long sbi_scratch_used_space(void)
+{
+	unsigned long ret = 0;
+
+	spin_lock(&extra_lock);
+	ret = extra_offset;
+	spin_unlock(&extra_lock);
+
+	return ret;
+}

From bbff53fe3b6cdd3c9bc084d489640d7ee2a3f831 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 13:40:19 +0530
Subject: [PATCH 1287/1765] lib: sbi_pmu: Use heap for per-HART PMU state

Instead of using a global array for per-HART PMU state, we should
use heap to on-demand allocate per-HART PMU state when the HART
is initialized in cold boot or warm boot path.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/sbi_pmu.c | 215 +++++++++++++++++++++++++++-------------------
 1 file changed, 127 insertions(+), 88 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 939f29d841e..c73e6ef3ff2 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -12,7 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
-#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
@@ -50,27 +50,43 @@ union sbi_pmu_ctr_info {
 	};
 };
 
-/* Platform specific PMU device */
-static const struct sbi_pmu_device *pmu_dev = NULL;
-
-/* Mapping between event range and possible counters  */
-static struct sbi_pmu_hw_event hw_event_map[SBI_PMU_HW_EVENT_MAX] = {0};
-
-/* counter to enabled event mapping */
-static uint32_t active_events[SBI_HARTMASK_MAX_BITS][SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX];
-
-/* Bitmap of firmware counters started on each HART */
 #if SBI_PMU_FW_CTR_MAX >= BITS_PER_LONG
 #error "Can't handle firmware counters beyond BITS_PER_LONG"
 #endif
-static unsigned long fw_counters_started[SBI_HARTMASK_MAX_BITS];
 
-/*
- * Counter values for SBI firmware events and event codes for platform
- * firmware events. Both are mutually exclusive and hence can optimally share
- * the same memory.
- */
-static uint64_t fw_counters_data[SBI_HARTMASK_MAX_BITS][SBI_PMU_FW_CTR_MAX] = {0};
+/** Per-HART state of the PMU counters */
+struct sbi_pmu_hart_state {
+	/* HART to which this state belongs */
+	uint32_t hartid;
+	/* Counter to enabled event mapping */
+	uint32_t active_events[SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX];
+	/* Bitmap of firmware counters started */
+	unsigned long fw_counters_started;
+	/*
+	 * Counter values for SBI firmware events and event codes
+	 * for platform firmware events. Both are mutually exclusive
+	 * and hence can optimally share the same memory.
+	 */
+	uint64_t fw_counters_data[SBI_PMU_FW_CTR_MAX];
+};
+
+/** Offset of pointer to PMU HART state in scratch space */
+static unsigned long phs_ptr_offset;
+
+#define pmu_get_hart_state_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, phs_ptr_offset)
+
+#define pmu_thishart_state_ptr()					\
+	pmu_get_hart_state_ptr(sbi_scratch_thishart_ptr())
+
+#define pmu_set_hart_state_ptr(__scratch, __phs)			\
+	sbi_scratch_write_type((__scratch), void *, phs_ptr_offset, (__phs))
+
+/* Platform specific PMU device */
+static const struct sbi_pmu_device *pmu_dev = NULL;
+
+/* Mapping between event range and possible counters  */
+static struct sbi_pmu_hw_event *hw_event_map;
 
 /* Maximum number of hardware events available */
 static uint32_t num_hw_events;
@@ -111,13 +127,13 @@ static bool pmu_event_select_overlap(struct sbi_pmu_hw_event *evt,
 	return false;
 }
 
-static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
+static int pmu_event_validate(struct sbi_pmu_hart_state *phs,
+			      unsigned long event_idx, uint64_t edata)
 {
 	uint32_t event_idx_type = get_cidx_type(event_idx);
 	uint32_t event_idx_code = get_cidx_code(event_idx);
 	uint32_t event_idx_code_max = -1;
 	uint32_t cache_ops_result, cache_ops_id, cache_id;
-	u32 hartid = current_hartid();
 
 	switch(event_idx_type) {
 	case SBI_PMU_EVENT_TYPE_HW:
@@ -131,7 +147,7 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 
 		if (SBI_PMU_FW_PLATFORM == event_idx_code &&
 		    pmu_dev && pmu_dev->fw_event_validate_encoding)
-			return pmu_dev->fw_event_validate_encoding(hartid,
+			return pmu_dev->fw_event_validate_encoding(phs->hartid,
 							           edata);
 		else
 			event_idx_code_max = SBI_PMU_FW_MAX;
@@ -165,16 +181,16 @@ static int pmu_event_validate(unsigned long event_idx, uint64_t edata)
 	return SBI_EINVAL;
 }
 
-static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code)
+static int pmu_ctr_validate(struct sbi_pmu_hart_state *phs,
+			    uint32_t cidx, uint32_t *event_idx_code)
 {
 	uint32_t event_idx_val;
 	uint32_t event_idx_type;
-	u32 hartid = current_hartid();
 
 	if (cidx >= total_ctrs)
 		return SBI_EINVAL;
 
-	event_idx_val = active_events[hartid][cidx];
+	event_idx_val = phs->active_events[cidx];
 	event_idx_type = get_cidx_type(event_idx_val);
 	if (event_idx_val == SBI_PMU_EVENT_IDX_INVALID ||
 	    event_idx_type >= SBI_PMU_EVENT_TYPE_MAX)
@@ -189,9 +205,9 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 {
 	int event_idx_type;
 	uint32_t event_code;
-	u32 hartid = current_hartid();
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 
-	event_idx_type = pmu_ctr_validate(cidx, &event_code);
+	event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
 
@@ -202,13 +218,13 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 
 	if (SBI_PMU_FW_PLATFORM == event_code) {
 		if (pmu_dev && pmu_dev->fw_counter_read_value)
-			*cval = pmu_dev->fw_counter_read_value(hartid,
+			*cval = pmu_dev->fw_counter_read_value(phs->hartid,
 							       cidx -
 							       num_hw_ctrs);
 		else
 			*cval = 0;
 	} else
-		*cval = fw_counters_data[hartid][cidx - num_hw_ctrs];
+		*cval = phs->fw_counters_data[cidx - num_hw_ctrs];
 
 	return 0;
 }
@@ -376,12 +392,11 @@ int sbi_pmu_irq_bit(void)
 	return 0;
 }
 
-static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
+static int pmu_ctr_start_fw(struct sbi_pmu_hart_state *phs,
+			    uint32_t cidx, uint32_t event_code,
 			    uint64_t event_data, uint64_t ival,
 			    bool ival_update)
 {
-	u32 hartid = current_hartid();
-
 	if ((event_code >= SBI_PMU_FW_MAX &&
 	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
 	    event_code > SBI_PMU_FW_PLATFORM)
@@ -395,18 +410,19 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 		    }
 
 		if (ival_update)
-			pmu_dev->fw_counter_write_value(hartid,
+			pmu_dev->fw_counter_write_value(phs->hartid,
 							cidx - num_hw_ctrs,
 							ival);
 
-		return pmu_dev->fw_counter_start(hartid, cidx - num_hw_ctrs,
+		return pmu_dev->fw_counter_start(phs->hartid,
+						 cidx - num_hw_ctrs,
 						 event_data);
 	} else {
 		if (ival_update)
-			fw_counters_data[hartid][cidx - num_hw_ctrs] = ival;
+			phs->fw_counters_data[cidx - num_hw_ctrs] = ival;
 	}
 
-	fw_counters_started[hartid] |= BIT(cidx - num_hw_ctrs);
+	phs->fw_counters_started |= BIT(cidx - num_hw_ctrs);
 
 	return 0;
 }
@@ -414,7 +430,7 @@ static int pmu_ctr_start_fw(uint32_t cidx, uint32_t event_code,
 int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 		      unsigned long flags, uint64_t ival)
 {
-	u32 hartid = current_hartid();
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 	int event_idx_type;
 	uint32_t event_code;
 	int ret = SBI_EINVAL;
@@ -430,16 +446,16 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 
 	for_each_set_bit(i, &cmask, total_ctrs) {
 		cidx = i + cbase;
-		event_idx_type = pmu_ctr_validate(cidx, &event_code);
+		event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 		if (event_idx_type < 0)
 			/* Continue the start operation for other counters */
 			continue;
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW) {
 			edata = (event_code == SBI_PMU_FW_PLATFORM) ?
-				 fw_counters_data[hartid][cidx - num_hw_ctrs]
+				 phs->fw_counters_data[cidx - num_hw_ctrs]
 				 : 0x0;
-			ret = pmu_ctr_start_fw(cidx, event_code, edata, ival,
-					       bUpdate);
+			ret = pmu_ctr_start_fw(phs, cidx, event_code, edata,
+					       ival, bUpdate);
 		}
 		else
 			ret = pmu_ctr_start_hw(cidx, ival, bUpdate);
@@ -470,9 +486,9 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 		return SBI_EALREADY_STOPPED;
 }
 
-static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
+static int pmu_ctr_stop_fw(struct sbi_pmu_hart_state *phs,
+			   uint32_t cidx, uint32_t event_code)
 {
-	u32 hartid = current_hartid();
 	int ret;
 
 	if ((event_code >= SBI_PMU_FW_MAX &&
@@ -482,12 +498,12 @@ static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
 
 	if (SBI_PMU_FW_PLATFORM == event_code &&
 	    pmu_dev && pmu_dev->fw_counter_stop) {
-		ret = pmu_dev->fw_counter_stop(hartid, cidx - num_hw_ctrs);
+		ret = pmu_dev->fw_counter_stop(phs->hartid, cidx - num_hw_ctrs);
 		if (ret)
 			return ret;
 	}
 
-	fw_counters_started[current_hartid()] &= ~BIT(cidx - num_hw_ctrs);
+	phs->fw_counters_started &= ~BIT(cidx - num_hw_ctrs);
 
 	return 0;
 }
@@ -511,7 +527,7 @@ static int pmu_reset_hw_mhpmevent(int ctr_idx)
 int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		     unsigned long flag)
 {
-	u32 hartid = current_hartid();
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 	int ret = SBI_EINVAL;
 	int event_idx_type;
 	uint32_t event_code;
@@ -522,18 +538,18 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 
 	for_each_set_bit(i, &cmask, total_ctrs) {
 		cidx = i + cbase;
-		event_idx_type = pmu_ctr_validate(cidx, &event_code);
+		event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 		if (event_idx_type < 0)
 			/* Continue the stop operation for other counters */
 			continue;
 
 		else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW)
-			ret = pmu_ctr_stop_fw(cidx, event_code);
+			ret = pmu_ctr_stop_fw(phs, cidx, event_code);
 		else
 			ret = pmu_ctr_stop_hw(cidx);
 
 		if (cidx > (CSR_INSTRET - CSR_CYCLE) && flag & SBI_PMU_STOP_FLAG_RESET) {
-			active_events[hartid][cidx] = SBI_PMU_EVENT_IDX_INVALID;
+			phs->active_events[cidx] = SBI_PMU_EVENT_IDX_INVALID;
 			pmu_reset_hw_mhpmevent(cidx);
 		}
 	}
@@ -604,14 +620,15 @@ static int pmu_ctr_find_fixed_fw(unsigned long evt_idx_code)
 		return SBI_EINVAL;
 }
 
-static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned long flags,
+static int pmu_ctr_find_hw(struct sbi_pmu_hart_state *phs,
+			   unsigned long cbase, unsigned long cmask,
+			   unsigned long flags,
 			   unsigned long event_idx, uint64_t data)
 {
 	unsigned long ctr_mask;
 	int i, ret = 0, fixed_ctr, ctr_idx = SBI_ENOTSUPP;
 	struct sbi_pmu_hw_event *temp;
 	unsigned long mctr_inhbt = 0;
-	u32 hartid = current_hartid();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	if (cbase >= num_hw_ctrs)
@@ -650,7 +667,7 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
 			 * Some of the platform may not support mcountinhibit.
 			 * Checking the active_events is enough for them
 			 */
-			if (active_events[hartid][cbase] != SBI_PMU_EVENT_IDX_INVALID)
+			if (phs->active_events[cbase] != SBI_PMU_EVENT_IDX_INVALID)
 				continue;
 			/* If mcountinhibit is supported, the bit must be enabled */
 			if ((sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11) &&
@@ -685,8 +702,9 @@ static int pmu_ctr_find_hw(unsigned long cbase, unsigned long cmask, unsigned lo
  * Thus, select the first available fw counter after sanity
  * check.
  */
-static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
-			   uint32_t event_code, u32 hartid, uint64_t edata)
+static int pmu_ctr_find_fw(struct sbi_pmu_hart_state *phs,
+			   unsigned long cbase, unsigned long cmask,
+			   uint32_t event_code, uint64_t edata)
 {
 	int i, cidx;
 
@@ -699,11 +717,11 @@ static int pmu_ctr_find_fw(unsigned long cbase, unsigned long cmask,
 		cidx = i + cbase;
 		if (cidx < num_hw_ctrs || total_ctrs <= cidx)
 			continue;
-		if (active_events[hartid][i] != SBI_PMU_EVENT_IDX_INVALID)
+		if (phs->active_events[i] != SBI_PMU_EVENT_IDX_INVALID)
 			continue;
 		if (SBI_PMU_FW_PLATFORM == event_code &&
 		    pmu_dev && pmu_dev->fw_counter_match_encoding) {
-			if (!pmu_dev->fw_counter_match_encoding(hartid,
+			if (!pmu_dev->fw_counter_match_encoding(phs->hartid,
 							    cidx - num_hw_ctrs,
 							    edata))
 				continue;
@@ -719,15 +737,15 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			  unsigned long flags, unsigned long event_idx,
 			  uint64_t event_data)
 {
-	int ret, ctr_idx = SBI_ENOTSUPP;
-	u32 event_code, hartid = current_hartid();
-	int event_type;
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+	int ret, event_type, ctr_idx = SBI_ENOTSUPP;
+	u32 event_code;
 
 	/* Do a basic sanity check of counter base & mask */
 	if ((cidx_base + sbi_fls(cidx_mask)) >= total_ctrs)
 		return SBI_EINVAL;
 
-	event_type = pmu_event_validate(event_idx, event_data);
+	event_type = pmu_event_validate(phs, event_idx, event_data);
 	if (event_type < 0)
 		return SBI_EINVAL;
 	event_code = get_cidx_code(event_idx);
@@ -742,7 +760,7 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 		 */
 		unsigned long cidx_first = cidx_base + sbi_ffs(cidx_mask);
 
-		if (active_events[hartid][cidx_first] == SBI_PMU_EVENT_IDX_INVALID)
+		if (phs->active_events[cidx_first] == SBI_PMU_EVENT_IDX_INVALID)
 			return SBI_EINVAL;
 		ctr_idx = cidx_first;
 		goto skip_match;
@@ -750,20 +768,20 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 
 	if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		/* Any firmware counter can be used track any firmware event */
-		ctr_idx = pmu_ctr_find_fw(cidx_base, cidx_mask, event_code,
-					  hartid, event_data);
+		ctr_idx = pmu_ctr_find_fw(phs, cidx_base, cidx_mask,
+					  event_code, event_data);
 		if (event_code == SBI_PMU_FW_PLATFORM)
-			fw_counters_data[hartid][ctr_idx - num_hw_ctrs] =
+			phs->fw_counters_data[ctr_idx - num_hw_ctrs] =
 								event_data;
 	} else {
-		ctr_idx = pmu_ctr_find_hw(cidx_base, cidx_mask, flags, event_idx,
-					  event_data);
+		ctr_idx = pmu_ctr_find_hw(phs, cidx_base, cidx_mask, flags,
+					  event_idx, event_data);
 	}
 
 	if (ctr_idx < 0)
 		return SBI_ENOTSUPP;
 
-	active_events[hartid][ctr_idx] = event_idx;
+	phs->active_events[ctr_idx] = event_idx;
 skip_match:
 	if (event_type == SBI_PMU_EVENT_TYPE_HW) {
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
@@ -772,16 +790,17 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			pmu_ctr_start_hw(ctr_idx, 0, false);
 	} else if (event_type == SBI_PMU_EVENT_TYPE_FW) {
 		if (flags & SBI_PMU_CFG_FLAG_CLEAR_VALUE)
-			fw_counters_data[hartid][ctr_idx - num_hw_ctrs] = 0;
+			phs->fw_counters_data[ctr_idx - num_hw_ctrs] = 0;
 		if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
 			if (SBI_PMU_FW_PLATFORM == event_code &&
 			    pmu_dev && pmu_dev->fw_counter_start) {
-				ret = pmu_dev->fw_counter_start(hartid,
+				ret = pmu_dev->fw_counter_start(
+					phs->hartid,
 					ctr_idx - num_hw_ctrs, event_data);
 				if (ret)
 					return ret;
 			}
-			fw_counters_started[hartid] |= BIT(ctr_idx - num_hw_ctrs);
+			phs->fw_counters_started |= BIT(ctr_idx - num_hw_ctrs);
 		}
 	}
 
@@ -790,19 +809,20 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 
 int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
 {
-	u32 cidx, hartid = current_hartid();
+	u32 cidx;
 	uint64_t *fcounter = NULL;
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 
-	if (likely(!fw_counters_started[hartid]))
+	if (likely(!phs->fw_counters_started))
 		return 0;
 
 	if (unlikely(fw_id >= SBI_PMU_FW_MAX))
 		return SBI_EINVAL;
 
 	for (cidx = num_hw_ctrs; cidx < total_ctrs; cidx++) {
-		if (get_cidx_code(active_events[hartid][cidx]) == fw_id &&
-		    (fw_counters_started[hartid] & BIT(cidx - num_hw_ctrs))) {
-			fcounter = &fw_counters_data[hartid][cidx - num_hw_ctrs];
+		if (get_cidx_code(phs->active_events[cidx]) == fw_id &&
+		    (phs->fw_counters_started & BIT(cidx - num_hw_ctrs))) {
+			fcounter = &phs->fw_counters_data[cidx - num_hw_ctrs];
 			break;
 		}
 	}
@@ -854,16 +874,16 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 	return 0;
 }
 
-static void pmu_reset_event_map(u32 hartid)
+static void pmu_reset_event_map(struct sbi_pmu_hart_state *phs)
 {
 	int j;
 
 	/* Initialize the counter to event mapping table */
 	for (j = 3; j < total_ctrs; j++)
-		active_events[hartid][j] = SBI_PMU_EVENT_IDX_INVALID;
+		phs->active_events[j] = SBI_PMU_EVENT_IDX_INVALID;
 	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
-		fw_counters_data[hartid][j] = 0;
-	fw_counters_started[hartid] = 0;
+		phs->fw_counters_data[j] = 0;
+	phs->fw_counters_started = 0;
 }
 
 const struct sbi_pmu_device *sbi_pmu_get_device(void)
@@ -881,22 +901,32 @@ void sbi_pmu_set_device(const struct sbi_pmu_device *dev)
 
 void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
-	u32 hartid = current_hartid();
-
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 		csr_write(CSR_MCOUNTEREN, -1);
-	pmu_reset_event_map(hartid);
+
+	pmu_reset_event_map(pmu_get_hart_state_ptr(scratch));
 }
 
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	struct sbi_pmu_hart_state *phs;
 	const struct sbi_platform *plat;
-	u32 hartid = current_hartid();
 
 	if (cold_boot) {
+		hw_event_map = sbi_calloc(sizeof(*hw_event_map),
+					  SBI_PMU_HW_EVENT_MAX);
+		if (!hw_event_map)
+			return SBI_ENOMEM;
+
+		phs_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!phs_ptr_offset) {
+			sbi_free(hw_event_map);
+			return SBI_ENOMEM;
+		}
+
 		plat = sbi_platform_ptr(scratch);
 		/* Initialize hw pmu events */
 		sbi_platform_pmu_init(plat);
@@ -906,14 +936,23 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 
-	pmu_reset_event_map(hartid);
+	phs = pmu_get_hart_state_ptr(scratch);
+	if (!phs) {
+		phs = sbi_zalloc(sizeof(*phs));
+		if (!phs)
+			return SBI_ENOMEM;
+		phs->hartid = current_hartid();
+		pmu_set_hart_state_ptr(scratch, phs);
+	}
+
+	pmu_reset_event_map(phs);
 
 	/* First three counters are fixed by the priv spec and we enable it by default */
-	active_events[hartid][0] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
-				   SBI_PMU_HW_CPU_CYCLES;
-	active_events[hartid][1] = SBI_PMU_EVENT_IDX_INVALID;
-	active_events[hartid][2] = SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET |
-				   SBI_PMU_HW_INSTRUCTIONS;
+	phs->active_events[0] = (SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET) |
+				SBI_PMU_HW_CPU_CYCLES;
+	phs->active_events[1] = SBI_PMU_EVENT_IDX_INVALID;
+	phs->active_events[2] = (SBI_PMU_EVENT_TYPE_HW << SBI_PMU_EVENT_IDX_TYPE_OFFSET) |
+				SBI_PMU_HW_INSTRUCTIONS;
 
 	return 0;
 }

From ef4542dc1363038676e688cf3cb5edd174f65d76 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Apr 2023 13:48:37 +0530
Subject: [PATCH 1288/1765] lib: sbi: Use heap for root domain creation

Let's use heap allocation in root domain creation instead of using
a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/sbi_domain.c | 45 +++++++++++++++++++++++++++++++++-----------
 1 file changed, 34 insertions(+), 11 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index c55e192207d..5800870ae65 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -11,6 +11,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
@@ -26,16 +27,13 @@ struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 
-static struct sbi_hartmask root_hmask = { 0 };
-
 #define ROOT_REGION_MAX	16
 static u32 root_memregs_count = 0;
-static struct sbi_domain_memregion root_memregs[ROOT_REGION_MAX + 1] = { 0 };
 
 struct sbi_domain root = {
 	.name = "root",
-	.possible_harts = &root_hmask,
-	.regions = root_memregs,
+	.possible_harts = NULL,
+	.regions = NULL,
 	.system_reset_allowed = true,
 	.system_suspend_allowed = true,
 	.fw_region_inited = false,
@@ -551,8 +549,7 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
 	/* Sanity checks */
-	if (!reg || domain_finalized ||
-	    (root.regions != root_memregs) ||
+	if (!reg || domain_finalized || !root.regions ||
 	    (ROOT_REGION_MAX <= root_memregs_count))
 		return SBI_EINVAL;
 
@@ -567,10 +564,10 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	}
 
 	/* Append the memregion to root memregions */
-	nreg = &root_memregs[root_memregs_count];
+	nreg = &root.regions[root_memregs_count];
 	sbi_memcpy(nreg, reg, sizeof(*reg));
 	root_memregs_count++;
-	root_memregs[root_memregs_count].order = 0;
+	root.regions[root_memregs_count].order = 0;
 
 	/* Sort and optimize root regions */
 	do {
@@ -700,6 +697,9 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	u32 i;
+	int rc;
+	struct sbi_hartmask *root_hmask;
+	struct sbi_domain_memregion *root_memregs;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->fw_rw_offset == 0 ||
@@ -715,6 +715,21 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 		return SBI_EINVAL;
 	}
 
+	root_memregs = sbi_calloc(sizeof(*root_memregs), ROOT_REGION_MAX + 1);
+	if (!root_memregs) {
+		sbi_printf("%s: no memory for root regions\n", __func__);
+		return SBI_ENOMEM;
+	}
+	root.regions = root_memregs;
+
+	root_hmask = sbi_zalloc(sizeof(*root_hmask));
+	if (!root_hmask) {
+		sbi_printf("%s: no memory for root hartmask\n", __func__);
+		sbi_free(root_memregs);
+		return SBI_ENOMEM;
+	}
+	root.possible_harts = root_hmask;
+
 	/* Root domain firmware memory region */
 	sbi_domain_memregion_init(scratch->fw_start, scratch->fw_rw_offset,
 				  (SBI_DOMAIN_MEMREGION_M_READABLE |
@@ -751,8 +766,16 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
 		if (sbi_platform_hart_invalid(plat, i))
 			continue;
-		sbi_hartmask_set_hart(i, &root_hmask);
+		sbi_hartmask_set_hart(i, root_hmask);
+	}
+
+	/* Finally register the root domain */
+	rc = sbi_domain_register(&root, root_hmask);
+	if (rc) {
+		sbi_free(root_hmask);
+		sbi_free(root_memregs);
+		return rc;
 	}
 
-	return sbi_domain_register(&root, &root_hmask);
+	return 0;
 }

From 66daafe3ba210eec78900269817ee504ffa9c212 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 25 Apr 2023 09:12:36 +0530
Subject: [PATCH 1289/1765] lib: sbi: Use scratch space to save per-HART domain
 pointer

Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART domain pointer.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_domain.h |  6 +----
 lib/sbi/sbi_domain.c     | 55 ++++++++++++++++++++++++++++++++--------
 2 files changed, 45 insertions(+), 16 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 124ea90b9db..b05bcf4d1c9 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -129,12 +129,8 @@ struct sbi_domain {
 /** The root domain instance */
 extern struct sbi_domain root;
 
-/** HART id to domain table */
-extern struct sbi_domain *hartid_to_domain_table[];
-
 /** Get pointer to sbi_domain from HART id */
-#define sbi_hartid_to_domain(__hartid) \
-	hartid_to_domain_table[__hartid]
+struct sbi_domain *sbi_hartid_to_domain(u32 hartid);
 
 /** Get pointer to sbi_domain for current HART */
 #define sbi_domain_thishart_ptr() \
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 5800870ae65..38a5902ff47 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -23,7 +23,6 @@
  * the array to be null-terminated.
  */
 struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX + 1] = { 0 };
-struct sbi_domain *hartid_to_domain_table[SBI_HARTMASK_MAX_BITS] = { 0 };
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 
@@ -39,6 +38,30 @@ struct sbi_domain root = {
 	.fw_region_inited = false,
 };
 
+static unsigned long domain_hart_ptr_offset;
+
+struct sbi_domain *sbi_hartid_to_domain(u32 hartid)
+{
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch || !domain_hart_ptr_offset)
+		return NULL;
+
+	return sbi_scratch_read_type(scratch, void *, domain_hart_ptr_offset);
+}
+
+static void update_hartid_to_domain(u32 hartid, struct sbi_domain *dom)
+{
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return;
+
+	sbi_scratch_write_type(scratch, void *, domain_hart_ptr_offset, dom);
+}
+
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 {
 	if (dom)
@@ -519,11 +542,11 @@ int sbi_domain_register(struct sbi_domain *dom,
 		if (!sbi_hartmask_test_hart(i, dom->possible_harts))
 			continue;
 
-		tdom = hartid_to_domain_table[i];
+		tdom = sbi_hartid_to_domain(i);
 		if (tdom)
 			sbi_hartmask_clear_hart(i,
 					&tdom->assigned_harts);
-		hartid_to_domain_table[i] = dom;
+		update_hartid_to_domain(i, dom);
 		sbi_hartmask_set_hart(i, &dom->assigned_harts);
 
 		/*
@@ -715,18 +738,23 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 		return SBI_EINVAL;
 	}
 
+	domain_hart_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+	if (!domain_hart_ptr_offset)
+		return SBI_ENOMEM;
+
 	root_memregs = sbi_calloc(sizeof(*root_memregs), ROOT_REGION_MAX + 1);
 	if (!root_memregs) {
 		sbi_printf("%s: no memory for root regions\n", __func__);
-		return SBI_ENOMEM;
+		rc = SBI_ENOMEM;
+		goto fail_free_domain_hart_ptr_offset;
 	}
 	root.regions = root_memregs;
 
 	root_hmask = sbi_zalloc(sizeof(*root_hmask));
 	if (!root_hmask) {
 		sbi_printf("%s: no memory for root hartmask\n", __func__);
-		sbi_free(root_memregs);
-		return SBI_ENOMEM;
+		rc = SBI_ENOMEM;
+		goto fail_free_root_memregs;
 	}
 	root.possible_harts = root_hmask;
 
@@ -771,11 +799,16 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	/* Finally register the root domain */
 	rc = sbi_domain_register(&root, root_hmask);
-	if (rc) {
-		sbi_free(root_hmask);
-		sbi_free(root_memregs);
-		return rc;
-	}
+	if (rc)
+		goto fail_free_root_hmask;
 
 	return 0;
+
+fail_free_root_hmask:
+	sbi_free(root_hmask);
+fail_free_root_memregs:
+	sbi_free(root_memregs);
+fail_free_domain_hart_ptr_offset:
+	sbi_scratch_free_offset(domain_hart_ptr_offset);
+	return rc;
 }

From fa5ad2e6f9e9c77b69cdf2506da753c8bad9509d Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 16:49:19 +0530
Subject: [PATCH 1290/1765] lib: utils/gpio: Use heap in SiFive and StartFive
 GPIO drivers

Let's use heap allocation in SiFive and Starfive GPIO drivers
instead of using a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/gpio/fdt_gpio_sifive.c   | 21 ++++++++++-----------
 lib/utils/gpio/fdt_gpio_starfive.c | 20 ++++++++++----------
 2 files changed, 20 insertions(+), 21 deletions(-)

diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index 677f0fa78b6..5e3f39d77b9 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -9,11 +9,10 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 
-#define SIFIVE_GPIO_CHIP_MAX	2
-
 #define SIFIVE_GPIO_PINS_MIN	1
 #define SIFIVE_GPIO_PINS_MAX	32
 #define SIFIVE_GPIO_PINS_DEF	16
@@ -27,9 +26,6 @@ struct sifive_gpio_chip {
 	struct gpio_chip chip;
 };
 
-static unsigned int sifive_gpio_chip_count;
-static struct sifive_gpio_chip sifive_gpio_chip_array[SIFIVE_GPIO_CHIP_MAX];
-
 static int sifive_gpio_direction_output(struct gpio_pin *gp, int value)
 {
 	unsigned int v;
@@ -73,13 +69,15 @@ static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 	struct sifive_gpio_chip *chip;
 	uint64_t addr;
 
-	if (SIFIVE_GPIO_CHIP_MAX <= sifive_gpio_chip_count)
-		return SBI_ENOSPC;
-	chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
+	chip = sbi_zalloc(sizeof(*chip));
+	if (!chip)
+		return SBI_ENOMEM;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
-	if (rc)
+	if (rc) {
+		sbi_free(chip);
 		return rc;
+	}
 
 	chip->addr = addr;
 	chip->chip.driver = &fdt_gpio_sifive;
@@ -88,10 +86,11 @@ static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 	chip->chip.direction_output = sifive_gpio_direction_output;
 	chip->chip.set = sifive_gpio_set;
 	rc = gpio_chip_add(&chip->chip);
-	if (rc)
+	if (rc) {
+		sbi_free(chip);
 		return rc;
+	}
 
-	sifive_gpio_chip_count++;
 	return 0;
 }
 
diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
index 18cca72aa89..f430b1352c9 100644
--- a/lib/utils/gpio/fdt_gpio_starfive.c
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -9,11 +9,11 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_console.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 
-#define STARFIVE_GPIO_CHIP_MAX		2
 #define STARFIVE_GPIO_PINS_DEF		64
 #define STARFIVE_GPIO_OUTVAL		0x40
 #define STARFIVE_GPIO_MASK		0xff
@@ -25,9 +25,6 @@ struct starfive_gpio_chip {
 	struct gpio_chip chip;
 };
 
-static unsigned int starfive_gpio_chip_count;
-static struct starfive_gpio_chip starfive_gpio_chip_array[STARFIVE_GPIO_CHIP_MAX];
-
 static int starfive_gpio_direction_output(struct gpio_pin *gp, int value)
 {
 	u32 val;
@@ -82,13 +79,15 @@ static int starfive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 	struct starfive_gpio_chip *chip;
 	u64 addr;
 
-	if (starfive_gpio_chip_count >= STARFIVE_GPIO_CHIP_MAX)
-		return SBI_ENOSPC;
-	chip = &starfive_gpio_chip_array[starfive_gpio_chip_count];
+	chip = sbi_zalloc(sizeof(*chip));
+	if (!chip)
+		return SBI_ENOMEM;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
-	if (rc)
+	if (rc) {
+		sbi_free(chip);
 		return rc;
+	}
 
 	chip->addr = addr;
 	chip->chip.driver = &fdt_gpio_starfive;
@@ -97,10 +96,11 @@ static int starfive_gpio_init(void *fdt, int nodeoff, u32 phandle,
 	chip->chip.direction_output = starfive_gpio_direction_output;
 	chip->chip.set = starfive_gpio_set;
 	rc = gpio_chip_add(&chip->chip);
-	if (rc)
+	if (rc) {
+		sbi_free(chip);
 		return rc;
+	}
 
-	starfive_gpio_chip_count++;
 	return 0;
 }
 

From 903e88caaf9404a52ed90fcf1e594eb2f8ff1a0c Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 16:52:44 +0530
Subject: [PATCH 1291/1765] lib: utils/i2c: Use heap in DesignWare and SiFive
 I2C drivers

Let's use heap allocation in DesignWare and SiFive I2C drivers
instead of using a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/i2c/fdt_i2c_dw.c     | 24 ++++++++++--------------
 lib/utils/i2c/fdt_i2c_sifive.c | 23 ++++++++++-------------
 2 files changed, 20 insertions(+), 27 deletions(-)

diff --git a/lib/utils/i2c/fdt_i2c_dw.c b/lib/utils/i2c/fdt_i2c_dw.c
index 71062f4b403..99b2ddb8411 100644
--- a/lib/utils/i2c/fdt_i2c_dw.c
+++ b/lib/utils/i2c/fdt_i2c_dw.c
@@ -9,17 +9,12 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/i2c/dw_i2c.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
-#define FDT_DW_I2C_ADAPTER_MAX	7
-
-static unsigned int fdt_dw_i2c_adapter_count;
-static struct dw_i2c_adapter
-	fdt_dw_i2c_adapter_array[FDT_DW_I2C_ADAPTER_MAX];
-
 extern struct fdt_i2c_adapter fdt_i2c_adapter_dw;
 
 static int fdt_dw_i2c_init(void *fdt, int nodeoff,
@@ -29,23 +24,24 @@ static int fdt_dw_i2c_init(void *fdt, int nodeoff,
 	struct dw_i2c_adapter *adapter;
 	u64 addr;
 
-	if (fdt_dw_i2c_adapter_count >= FDT_DW_I2C_ADAPTER_MAX)
-		return SBI_ENOSPC;
-
-	adapter = &fdt_dw_i2c_adapter_array[fdt_dw_i2c_adapter_count];
+	adapter = sbi_zalloc(sizeof(*adapter));
+	if (!adapter)
+		return SBI_ENOMEM;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
-	if (rc)
+	if (rc) {
+		sbi_free(adapter);
 		return rc;
+	}
 
 	adapter->addr = addr;
 	adapter->adapter.driver = &fdt_i2c_adapter_dw;
 
 	rc = dw_i2c_init(&adapter->adapter, nodeoff);
-	if (rc)
+	if (rc) {
+		sbi_free(adapter);
 		return rc;
-
-	fdt_dw_i2c_adapter_count++;
+	}
 
 	return 0;
 }
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
index 195541cf2f0..b85b245c75f 100644
--- a/lib/utils/i2c/fdt_i2c_sifive.c
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -9,12 +9,11 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_timer.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
-#define SIFIVE_I2C_ADAPTER_MAX	2
-
 #define SIFIVE_I2C_PRELO	0x00
 #define SIFIVE_I2C_PREHI	0x04
 #define SIFIVE_I2C_CTR		0x08
@@ -47,10 +46,6 @@ struct sifive_i2c_adapter {
 	struct i2c_adapter adapter;
 };
 
-static unsigned int sifive_i2c_adapter_count;
-static struct sifive_i2c_adapter
-	sifive_i2c_adapter_array[SIFIVE_I2C_ADAPTER_MAX];
-
 extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
 
 static inline void sifive_i2c_setreg(struct sifive_i2c_adapter *adap,
@@ -244,14 +239,15 @@ static int sifive_i2c_init(void *fdt, int nodeoff,
 	struct sifive_i2c_adapter *adapter;
 	uint64_t addr;
 
-	if (sifive_i2c_adapter_count >= SIFIVE_I2C_ADAPTER_MAX)
-		return SBI_ENOSPC;
-
-	adapter = &sifive_i2c_adapter_array[sifive_i2c_adapter_count];
+	adapter = sbi_zalloc(sizeof(*adapter));
+	if (!adapter)
+		return SBI_ENOMEM;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
-	if (rc)
+	if (rc) {
+		sbi_free(adapter);
 		return rc;
+	}
 
 	adapter->addr = addr;
 	adapter->adapter.driver = &fdt_i2c_adapter_sifive;
@@ -259,10 +255,11 @@ static int sifive_i2c_init(void *fdt, int nodeoff,
 	adapter->adapter.write = sifive_i2c_adapter_write;
 	adapter->adapter.read = sifive_i2c_adapter_read;
 	rc = i2c_adapter_add(&adapter->adapter);
-	if (rc)
+	if (rc) {
+		sbi_free(adapter);
 		return rc;
+	}
 
-	sifive_i2c_adapter_count++;
 	return 0;
 }
 

From 5a8cfcdf19d98b8dc5dd5a087a2eceb7f5b185fb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 16:54:13 +0530
Subject: [PATCH 1292/1765] lib: utils/ipi: Use heap in ACLINT MSWI driver

Let's use heap allocation in ACLINT MSWI driver instead of using
a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/ipi/fdt_ipi_mswi.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 4dc91f2cb96..e3a63782465 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -8,15 +8,11 @@
  */
 
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 
-#define MSWI_MAX_NR			16
-
-static unsigned long mswi_count = 0;
-static struct aclint_mswi_data mswi[MSWI_MAX_NR];
-
 static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 			      const struct fdt_match *match)
 {
@@ -24,15 +20,17 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 	unsigned long offset;
 	struct aclint_mswi_data *ms;
 
-	if (MSWI_MAX_NR <= mswi_count)
-		return SBI_ENOSPC;
-	ms = &mswi[mswi_count];
+	ms = sbi_zalloc(sizeof(*ms));
+	if (!ms)
+		return SBI_ENOMEM;
 
 	rc = fdt_parse_aclint_node(fdt, nodeoff, false,
 				   &ms->addr, &ms->size, NULL, NULL,
 				   &ms->first_hartid, &ms->hart_count);
-	if (rc)
+	if (rc) {
+		sbi_free(ms);
 		return rc;
+	}
 
 	if (match->data) {
 		/* Adjust MSWI address and size for CLINT device */
@@ -44,10 +42,11 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 	}
 
 	rc = aclint_mswi_cold_init(ms);
-	if (rc)
+	if (rc) {
+		sbi_free(ms);
 		return rc;
+	}
 
-	mswi_count++;
 	return 0;
 }
 

From 30137166c67753299a7b4a4ac5e1f92269090423 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 16:55:59 +0530
Subject: [PATCH 1293/1765] lib: utils/irqchip: Use heap in PLIC, APLIC and
 IMSIC drivers

Let's use heap allocation in PLIC, APLIC, and IMSIC irqchip drivers
instead of using a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/irqchip/fdt_irqchip_aplic.c | 24 ++++++++++--------
 lib/utils/irqchip/fdt_irqchip_imsic.c | 28 +++++++++------------
 lib/utils/irqchip/fdt_irqchip_plic.c  | 36 ++++++++++++---------------
 3 files changed, 42 insertions(+), 46 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c
index 965f02394c4..583a3e30fa5 100644
--- a/lib/utils/irqchip/fdt_irqchip_aplic.c
+++ b/lib/utils/irqchip/fdt_irqchip_aplic.c
@@ -11,15 +11,11 @@
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/aplic.h>
 
-#define APLIC_MAX_NR			16
-
-static unsigned long aplic_count = 0;
-static struct aplic_data aplic[APLIC_MAX_NR];
-
 static int irqchip_aplic_warm_init(void)
 {
 	/* Nothing to do here. */
@@ -32,15 +28,23 @@ static int irqchip_aplic_cold_init(void *fdt, int nodeoff,
 	int rc;
 	struct aplic_data *pd;
 
-	if (APLIC_MAX_NR <= aplic_count)
-		return SBI_ENOSPC;
-	pd = &aplic[aplic_count++];
+	pd = sbi_zalloc(sizeof(*pd));
+	if (!pd)
+		return SBI_ENOMEM;
 
 	rc = fdt_parse_aplic_node(fdt, nodeoff, pd);
 	if (rc)
-		return rc;
+		goto fail_free_data;
+
+	rc = aplic_cold_irqchip_init(pd);
+	if (rc)
+		goto fail_free_data;
+
+	return 0;
 
-	return aplic_cold_irqchip_init(pd);
+fail_free_data:
+	sbi_free(pd);
+	return rc;
 }
 
 static const struct fdt_match irqchip_aplic_match[] = {
diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index 6020ac0b992..590b2022b0a 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -11,16 +11,12 @@
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/imsic.h>
 
-#define IMSIC_MAX_NR			16
-
-static unsigned long imsic_count = 0;
-static struct imsic_data imsic[IMSIC_MAX_NR];
-
 static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
 					     struct imsic_data *id)
 {
@@ -71,27 +67,27 @@ static int irqchip_imsic_cold_init(void *fdt, int nodeoff,
 	int rc;
 	struct imsic_data *id;
 
-	if (IMSIC_MAX_NR <= imsic_count)
-		return SBI_ENOSPC;
-	id = &imsic[imsic_count];
+	id = sbi_zalloc(sizeof(*id));
+	if (!id)
+		return SBI_ENOMEM;
 
 	rc = fdt_parse_imsic_node(fdt, nodeoff, id);
-	if (rc)
-		return rc;
-	if (!id->targets_mmode)
-		return 0;
+	if (rc || !id->targets_mmode)
+		goto fail_free_data;
 
 	rc = irqchip_imsic_update_hartid_table(fdt, nodeoff, id);
 	if (rc)
-		return rc;
+		goto fail_free_data;
 
 	rc = imsic_cold_irqchip_init(id);
 	if (rc)
-		return rc;
-
-	imsic_count++;
+		goto fail_free_data;
 
 	return 0;
+
+fail_free_data:
+	sbi_free(id);
+	return rc;
 }
 
 static const struct fdt_match irqchip_imsic_match[] = {
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 1aadf9190ca..d7332848eff 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -11,18 +11,14 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/plic.h>
 
-#define PLIC_MAX_NR			16
-
-static unsigned long plic_count = 0;
-static struct plic_data plic[PLIC_MAX_NR];
-
 static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
-static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
+static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2] = { { -1 } };
 
 void fdt_plic_priority_save(u8 *priority, u32 num)
 {
@@ -114,16 +110,16 @@ static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
 static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
-	int i, rc;
+	int rc;
 	struct plic_data *pd;
 
-	if (PLIC_MAX_NR <= plic_count)
-		return SBI_ENOSPC;
-	pd = &plic[plic_count++];
+	pd = sbi_zalloc(sizeof(*pd));
+	if (!pd)
+		return SBI_ENOMEM;
 
 	rc = fdt_parse_plic_node(fdt, nodeoff, pd);
 	if (rc)
-		return rc;
+		goto fail_free_data;
 
 	if (match->data) {
 		void (*plic_plat_init)(struct plic_data *) = match->data;
@@ -132,17 +128,17 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 
 	rc = plic_cold_irqchip_init(pd);
 	if (rc)
-		return rc;
+		goto fail_free_data;
 
-	if (plic_count == 1) {
-		for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-			plic_hartid2data[i] = NULL;
-			plic_hartid2context[i][0] = -1;
-			plic_hartid2context[i][1] = -1;
-		}
-	}
+	rc = irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
+	if (rc)
+		goto fail_free_data;
+
+	return 0;
 
-	return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
+fail_free_data:
+	sbi_free(pd);
+	return rc;
 }
 
 #define THEAD_PLIC_CTRL_REG 0x1ffffc

From 7e5636ac3788451991a65791c5adcc7798dcc22a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 17:13:22 +0530
Subject: [PATCH 1294/1765] lib: utils/timer: Use heap in ACLINT MTIMER driver

Let's use heap allocation in ACLINT MTIMER driver instead of using
a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/timer/fdt_timer_mtimer.c | 47 +++++++++++++++++++-----------
 1 file changed, 30 insertions(+), 17 deletions(-)

diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 5244f98f5e7..9eaa11d855c 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -9,44 +9,54 @@
 
 #include <libfdt.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_list.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/timer/aclint_mtimer.h>
 
-#define MTIMER_MAX_NR			16
-
 struct timer_mtimer_quirks {
 	unsigned int	mtime_offset;
 	bool		has_64bit_mmio;
 	bool		without_mtime;
 };
 
-static unsigned long mtimer_count = 0;
-static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR];
+struct timer_mtimer_node {
+	struct sbi_dlist head;
+	struct aclint_mtimer_data data;
+};
+static SBI_LIST_HEAD(mtn_list);
+
 static struct aclint_mtimer_data *mt_reference = NULL;
 
 static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
-	int i, rc;
+	int rc;
 	unsigned long addr[2], size[2];
+	struct timer_mtimer_node *mtn, *n;
 	struct aclint_mtimer_data *mt;
 
-	if (MTIMER_MAX_NR <= mtimer_count)
-		return SBI_ENOSPC;
-	mt = &mtimer[mtimer_count];
+	mtn = sbi_zalloc(sizeof(*mtn));
+	if (!mtn)
+		return SBI_ENOMEM;
+	mt = &mtn->data;
 
 	rc = fdt_parse_aclint_node(fdt, nodeoff, true,
 				   &addr[0], &size[0], &addr[1], &size[1],
 				   &mt->first_hartid, &mt->hart_count);
-	if (rc)
+	if (rc) {
+		sbi_free(mtn);
 		return rc;
+	}
 	mt->has_64bit_mmio = true;
 	mt->has_shared_mtime = false;
 
 	rc = fdt_parse_timebase_frequency(fdt, &mt->mtime_freq);
-	if (rc)
+	if (rc) {
+		sbi_free(mtn);
 		return rc;
+	}
 
 	if (match->data) { /* SiFive CLINT */
 		const struct timer_mtimer_quirks *quirks = match->data;
@@ -77,8 +87,8 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	/* Check if MTIMER device has shared MTIME address */
 	if (mt->mtime_size) {
 		mt->has_shared_mtime = false;
-		for (i = 0; i < mtimer_count; i++) {
-			if (mtimer[i].mtime_addr == mt->mtime_addr) {
+		sbi_list_for_each_entry(n, &mtn_list, head) {
+			if (n->data.mtime_addr == mt->mtime_addr) {
 				mt->has_shared_mtime = true;
 				break;
 			}
@@ -90,8 +100,10 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 
 	/* Initialize the MTIMER device */
 	rc = aclint_mtimer_cold_init(mt, mt_reference);
-	if (rc)
+	if (rc) {
+		sbi_free(mtn);
 		return rc;
+	}
 
 	/*
 	 * Select first MTIMER device with no associated HARTs as our
@@ -106,16 +118,17 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		 * Set reference for already propbed MTIMER devices
 		 * with non-shared MTIME
 		 */
-		for (i = 0; i < mtimer_count; i++)
-			if (!mtimer[i].has_shared_mtime)
-				aclint_mtimer_set_reference(&mtimer[i], mt);
+		sbi_list_for_each_entry(n, &mtn_list, head) {
+			if (!n->data.has_shared_mtime)
+				aclint_mtimer_set_reference(&n->data, mt);
+		}
 	}
 
 	/* Explicitly sync-up MTIMER devices not associated with any HARTs */
 	if (!mt->hart_count)
 		aclint_mtimer_sync(mt);
 
-	mtimer_count++;
+	sbi_list_add_tail(&mtn->head, &mtn_list);
 	return 0;
 }
 

From 3c1c972cb69d670ddc309391c4db76f1f19fd77e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 20 Apr 2023 18:09:55 +0530
Subject: [PATCH 1295/1765] lib: utils/fdt: Use heap in FDT domain parsing

Let's use heap allocation in FDT domain parsing instead of using
a fixed size global array.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/fdt/fdt_domain.c | 113 +++++++++++++++++++++++--------------
 1 file changed, 71 insertions(+), 42 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index bb6d17d29fd..788683d27c1 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -219,14 +220,13 @@ void fdt_domain_fixup(void *fdt)
 	fdt_nop_node(fdt, poffset);
 }
 
-#define FDT_DOMAIN_MAX_COUNT		8
 #define FDT_DOMAIN_REGION_MAX_COUNT	16
 
-static u32 fdt_domains_count;
-static struct sbi_domain fdt_domains[FDT_DOMAIN_MAX_COUNT];
-static struct sbi_hartmask fdt_masks[FDT_DOMAIN_MAX_COUNT];
-static struct sbi_domain_memregion
-	fdt_regions[FDT_DOMAIN_MAX_COUNT][FDT_DOMAIN_REGION_MAX_COUNT + 1];
+struct parse_region_data {
+	struct sbi_domain *dom;
+	u32 region_count;
+	u32 max_regions;
+};
 
 static int __fdt_parse_region(void *fdt, int domain_offset,
 			      int region_offset, u32 region_access,
@@ -236,7 +236,7 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 	u32 val32;
 	u64 val64;
 	const u32 *val;
-	u32 *region_count = opaque;
+	struct parse_region_data *preg = opaque;
 	struct sbi_domain_memregion *region;
 
 	/*
@@ -252,9 +252,9 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 		return SBI_EINVAL;
 
 	/* Find next region of the domain */
-	if (FDT_DOMAIN_REGION_MAX_COUNT <= *region_count)
-		return SBI_EINVAL;
-	region = &fdt_regions[fdt_domains_count][*region_count];
+	if (preg->max_regions <= preg->region_count)
+		return SBI_ENOSPC;
+	region = &preg->dom->regions[preg->region_count];
 
 	/* Read "base" DT property */
 	val = fdt_getprop(fdt, region_offset, "base", &len);
@@ -278,7 +278,7 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 	if (fdt_get_property(fdt, region_offset, "mmio", NULL))
 		region->flags |= SBI_DOMAIN_MEMREGION_MMIO;
 
-	(*region_count)++;
+	preg->region_count++;
 
 	return 0;
 }
@@ -291,16 +291,30 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	struct sbi_domain *dom;
 	struct sbi_hartmask *mask;
 	struct sbi_hartmask assign_mask;
+	struct parse_region_data preg;
 	int *cold_domain_offset = opaque;
-	struct sbi_domain_memregion *reg, *regions;
-	int i, err, len, cpus_offset, cpu_offset, doffset;
-
-	/* Sanity check on maximum domains we can handle */
-	if (FDT_DOMAIN_MAX_COUNT <= fdt_domains_count)
-		return SBI_EINVAL;
-	dom = &fdt_domains[fdt_domains_count];
-	mask = &fdt_masks[fdt_domains_count];
-	regions = &fdt_regions[fdt_domains_count][0];
+	struct sbi_domain_memregion *reg;
+	int i, err = 0, len, cpus_offset, cpu_offset, doffset;
+
+	dom = sbi_zalloc(sizeof(*dom));
+	if (!dom)
+		return SBI_ENOMEM;
+
+	dom->regions = sbi_calloc(sizeof(*dom->regions),
+				  FDT_DOMAIN_REGION_MAX_COUNT + 1);
+	if (!dom->regions) {
+		err = SBI_ENOMEM;
+		goto fail_free_domain;
+	}
+	preg.dom = dom;
+	preg.region_count = 0;
+	preg.max_regions = FDT_DOMAIN_REGION_MAX_COUNT;
+
+	mask = sbi_zalloc(sizeof(*mask));
+	if (!mask) {
+		err = SBI_ENOMEM;
+		goto fail_free_regions;
+	}
 
 	/* Read DT node name */
 	strncpy(dom->name, fdt_get_name(fdt, domain_offset, NULL),
@@ -316,12 +330,14 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 		for (i = 0; i < len; i++) {
 			cpu_offset = fdt_node_offset_by_phandle(fdt,
 							fdt32_to_cpu(val[i]));
-			if (cpu_offset < 0)
-				return cpu_offset;
+			if (cpu_offset < 0) {
+				err = cpu_offset;
+				goto fail_free_all;
+			}
 
 			err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
 			if (err)
-				return err;
+				goto fail_free_all;
 
 			if (!fdt_node_is_enabled(fdt, cpu_offset))
 				continue;
@@ -331,14 +347,10 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	}
 
 	/* Setup memregions from DT */
-	val32 = 0;
-	memset(regions, 0,
-		   sizeof(*regions) * (FDT_DOMAIN_REGION_MAX_COUNT + 1));
-	dom->regions = regions;
-	err = fdt_iterate_each_memregion(fdt, domain_offset, &val32,
+	err = fdt_iterate_each_memregion(fdt, domain_offset, &preg,
 					 __fdt_parse_region);
 	if (err)
-		return err;
+		goto fail_free_all;
 
 	/*
 	 * Copy over root domain memregions which don't allow
@@ -354,9 +366,11 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 		    (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE) ||
 		    (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
 			continue;
-		if (FDT_DOMAIN_REGION_MAX_COUNT <= val32)
-			return SBI_EINVAL;
-		memcpy(&regions[val32++], reg, sizeof(*reg));
+		if (preg.max_regions <= preg.region_count) {
+			err = SBI_EINVAL;
+			goto fail_free_all;
+		}
+		memcpy(&dom->regions[preg.region_count++], reg, sizeof(*reg));
 	}
 	dom->fw_region_inited = root.fw_region_inited;
 
@@ -427,8 +441,10 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 
 	/* Find /cpus DT node */
 	cpus_offset = fdt_path_offset(fdt, "/cpus");
-	if (cpus_offset < 0)
-		return cpus_offset;
+	if (cpus_offset < 0) {
+		err = cpus_offset;
+		goto fail_free_all;
+	}
 
 	/* HART to domain assignment mask based on CPU DT nodes */
 	sbi_hartmask_clear_all(&assign_mask);
@@ -444,22 +460,35 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			continue;
 
 		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
-		if (!val || len < 4)
-			return SBI_EINVAL;
+		if (!val || len < 4) {
+			err = SBI_EINVAL;
+			goto fail_free_all;
+		}
 
 		doffset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
-		if (doffset < 0)
-			return doffset;
+		if (doffset < 0) {
+			err = doffset;
+			goto fail_free_all;
+		}
 
 		if (doffset == domain_offset)
 			sbi_hartmask_set_hart(val32, &assign_mask);
 	}
 
-	/* Increment domains count */
-	fdt_domains_count++;
-
 	/* Register the domain */
-	return sbi_domain_register(dom, &assign_mask);
+	err = sbi_domain_register(dom, &assign_mask);
+	if (err)
+		goto fail_free_all;
+
+	return 0;
+
+fail_free_all:
+	sbi_free(mask);
+fail_free_regions:
+	sbi_free(dom->regions);
+fail_free_domain:
+	sbi_free(dom);
+	return err;
 }
 
 int fdt_domains_populate(void *fdt)

From acbd8fce9e5d92f07d344388a3b046f1722ce072 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 21:23:53 +0530
Subject: [PATCH 1296/1765] lib: utils/ipi: Use scratch space to save per-HART
 MSWI pointer

Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART MSWI pointer.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/ipi/aclint_mswi.c | 43 ++++++++++++++++++++++++++++---------
 1 file changed, 33 insertions(+), 10 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index ac8570bc5fa..f47b3bcbbb4 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -12,21 +12,30 @@
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_ipi.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 
-static struct aclint_mswi_data *mswi_hartid2data[SBI_HARTMASK_MAX_BITS];
+static unsigned long mswi_ptr_offset;
+
+#define mswi_get_hart_data_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, mswi_ptr_offset)
+
+#define mswi_set_hart_data_ptr(__scratch, __mswi)			\
+	sbi_scratch_write_type((__scratch), void *, mswi_ptr_offset, (__mswi))
 
 static void mswi_ipi_send(u32 target_hart)
 {
 	u32 *msip;
+	struct sbi_scratch *scratch;
 	struct aclint_mswi_data *mswi;
 
-	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
 		return;
-	mswi = mswi_hartid2data[target_hart];
+
+	mswi = mswi_get_hart_data_ptr(scratch);
 	if (!mswi)
 		return;
 
@@ -38,11 +47,14 @@ static void mswi_ipi_send(u32 target_hart)
 static void mswi_ipi_clear(u32 target_hart)
 {
 	u32 *msip;
+	struct sbi_scratch *scratch;
 	struct aclint_mswi_data *mswi;
 
-	if (SBI_HARTMASK_MAX_BITS <= target_hart)
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
 		return;
-	mswi = mswi_hartid2data[target_hart];
+
+	mswi = mswi_get_hart_data_ptr(scratch);
 	if (!mswi)
 		return;
 
@@ -69,19 +81,30 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 {
 	u32 i;
 	int rc;
+	struct sbi_scratch *scratch;
 	unsigned long pos, region_size;
 	struct sbi_domain_memregion reg;
 
 	/* Sanity checks */
 	if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
 	    (mswi->size < (mswi->hart_count * sizeof(u32))) ||
-	    (mswi->first_hartid + mswi->hart_count > SBI_HARTMASK_MAX_BITS) ||
 	    (!mswi->hart_count || mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
 		return SBI_EINVAL;
 
-	/* Update MSWI hartid table */
-	for (i = 0; i < mswi->hart_count; i++)
-		mswi_hartid2data[mswi->first_hartid + i] = mswi;
+	/* Allocate scratch space pointer */
+	if (!mswi_ptr_offset) {
+		mswi_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!mswi_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
+	/* Update MSWI pointer in scratch space */
+	for (i = 0; i < mswi->hart_count; i++) {
+		scratch = sbi_hartid_to_scratch(mswi->first_hartid + i);
+		if (!scratch)
+			return SBI_ENOENT;
+		mswi_set_hart_data_ptr(scratch, mswi);
+	}
 
 	/* Add MSWI regions to the root domain */
 	for (pos = 0; pos < mswi->size; pos += ACLINT_MSWI_ALIGN) {

From f0516beae068ffce0d5a79f09a96904a661a25ba Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 21:27:27 +0530
Subject: [PATCH 1297/1765] lib: utils/timer: Use scratch space to save
 per-HART MTIMER pointer

Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART MTIMER pointer.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/timer/aclint_mtimer.c | 76 ++++++++++++++++++++++++++-------
 1 file changed, 61 insertions(+), 15 deletions(-)

diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 84ded4ed44e..13af5d8232d 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -13,12 +13,17 @@
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_hartmask.h>
-#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
 #include <sbi_utils/timer/aclint_mtimer.h>
 
-static struct aclint_mtimer_data *mtimer_hartid2data[SBI_HARTMASK_MAX_BITS];
+static unsigned long mtimer_ptr_offset;
+
+#define mtimer_get_hart_data_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, mtimer_ptr_offset)
+
+#define mtimer_set_hart_data_ptr(__scratch, __mtimer)			\
+	sbi_scratch_write_type((__scratch), void *, mtimer_ptr_offset, (__mtimer))
 
 #if __riscv_xlen != 32
 static u64 mtimer_time_rd64(volatile u64 *addr)
@@ -53,30 +58,54 @@ static void mtimer_time_wr32(bool timecmp, u64 value, volatile u64 *addr)
 
 static u64 mtimer_value(void)
 {
-	struct aclint_mtimer_data *mt = mtimer_hartid2data[current_hartid()];
-	u64 *time_val = (void *)mt->mtime_addr;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	struct aclint_mtimer_data *mt;
+
+	mt = mtimer_get_hart_data_ptr(scratch);
+	if (!mt)
+		return 0;
 
 	/* Read MTIMER Time Value */
-	return mt->time_rd(time_val);
+	return mt->time_rd((void *)mt->mtime_addr);
 }
 
 static void mtimer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
-	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
-	u64 *time_cmp = (void *)mt->mtimecmp_addr;
+	struct sbi_scratch *scratch;
+	struct aclint_mtimer_data *mt;
+	u64 *time_cmp;
+
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
+		return;
+
+	mt = mtimer_get_hart_data_ptr(scratch);
+	if (!mt)
+		return;
 
 	/* Clear MTIMER Time Compare */
+	time_cmp = (void *)mt->mtimecmp_addr;
 	mt->time_wr(true, -1ULL, &time_cmp[target_hart - mt->first_hartid]);
 }
 
 static void mtimer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
-	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
-	u64 *time_cmp = (void *)mt->mtimecmp_addr;
+	struct sbi_scratch *scratch;
+	struct aclint_mtimer_data *mt;
+	u64 *time_cmp;
+
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
+		return;
+
+	mt = mtimer_get_hart_data_ptr(scratch);
+	if (!mt)
+		return;
 
 	/* Program MTIMER Time Compare */
+	time_cmp = (void *)mt->mtimecmp_addr;
 	mt->time_wr(true, next_event,
 		    &time_cmp[target_hart - mt->first_hartid]);
 }
@@ -126,8 +155,14 @@ int aclint_mtimer_warm_init(void)
 {
 	u64 *mt_time_cmp;
 	u32 target_hart = current_hartid();
-	struct aclint_mtimer_data *mt = mtimer_hartid2data[target_hart];
+	struct sbi_scratch *scratch;
+	struct aclint_mtimer_data *mt;
 
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
+		return SBI_ENOENT;
+
+	mt = mtimer_get_hart_data_ptr(scratch);
 	if (!mt)
 		return SBI_ENODEV;
 
@@ -147,6 +182,7 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 {
 	u32 i;
 	int rc;
+	struct sbi_scratch *scratch;
 
 	/* Sanity checks */
 	if (!mt ||
@@ -155,12 +191,18 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	    (mt->mtime_size && (mt->mtime_size & (ACLINT_MTIMER_ALIGN - 1))) ||
 	    (mt->mtimecmp_addr & (ACLINT_MTIMER_ALIGN - 1)) ||
 	    (mt->mtimecmp_size & (ACLINT_MTIMER_ALIGN - 1)) ||
-	    (mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
 	    (mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
 		return SBI_EINVAL;
 	if (reference && mt->mtime_freq != reference->mtime_freq)
 		return SBI_EINVAL;
 
+	/* Allocate scratch space pointer */
+	if (!mtimer_ptr_offset) {
+		mtimer_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!mtimer_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
 	/* Initialize private data */
 	aclint_mtimer_set_reference(mt, reference);
 	mt->time_rd = mtimer_time_rd32;
@@ -174,9 +216,13 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	}
 #endif
 
-	/* Update MTIMER hartid table */
-	for (i = 0; i < mt->hart_count; i++)
-		mtimer_hartid2data[mt->first_hartid + i] = mt;
+	/* Update MTIMER pointer in scratch space */
+	for (i = 0; i < mt->hart_count; i++) {
+		scratch = sbi_hartid_to_scratch(mt->first_hartid + i);
+		if (!scratch)
+			return SBI_ENOENT;
+		mtimer_set_hart_data_ptr(scratch, mt);
+	}
 
 	if (!mt->mtime_size) {
 		/* Disable reading mtime when mtime is not available */

From b3594ac1d10ef6c7269c6381a1e826b73b06aca0 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 19 Apr 2023 21:29:50 +0530
Subject: [PATCH 1298/1765] lib: utils/irqchip: Use scratch space to save
 per-HART PLIC pointer

Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART PLIC pointer and PLIC context numbers.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/irqchip/fdt_irqchip_plic.c | 88 +++++++++++++++++++++-------
 1 file changed, 66 insertions(+), 22 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index d7332848eff..829c5ee2034 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -12,54 +12,77 @@
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_heap.h>
-#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/plic.h>
 
-static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
-static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2] = { { -1 } };
+static unsigned long plic_ptr_offset;
+
+#define plic_get_hart_data_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, plic_ptr_offset)
+
+#define plic_set_hart_data_ptr(__scratch, __plic)			\
+	sbi_scratch_write_type((__scratch), void *, plic_ptr_offset, (__plic))
+
+static unsigned long plic_mcontext_offset;
+
+#define plic_get_hart_mcontext(__scratch)				\
+	(sbi_scratch_read_type((__scratch), long, plic_mcontext_offset) - 1)
+
+#define plic_set_hart_mcontext(__scratch, __mctx)			\
+	sbi_scratch_write_type((__scratch), long, plic_mcontext_offset, (__mctx) + 1)
+
+static unsigned long plic_scontext_offset;
+
+#define plic_get_hart_scontext(__scratch)				\
+	(sbi_scratch_read_type((__scratch), long, plic_scontext_offset) - 1)
+
+#define plic_set_hart_scontext(__scratch, __sctx)			\
+	sbi_scratch_write_type((__scratch), long, plic_scontext_offset, (__sctx) + 1)
 
 void fdt_plic_priority_save(u8 *priority, u32 num)
 {
-	struct plic_data *plic = plic_hartid2data[current_hartid()];
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_priority_save(plic, priority, num);
+	plic_priority_save(plic_get_hart_data_ptr(scratch), priority, num);
 }
 
 void fdt_plic_priority_restore(const u8 *priority, u32 num)
 {
-	struct plic_data *plic = plic_hartid2data[current_hartid()];
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_priority_restore(plic, priority, num);
+	plic_priority_restore(plic_get_hart_data_ptr(scratch), priority, num);
 }
 
 void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num)
 {
-	u32 hartid = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_context_save(plic_hartid2data[hartid],
-			  plic_hartid2context[hartid][smode],
+	plic_context_save(plic_get_hart_data_ptr(scratch),
+			  smode ? plic_get_hart_scontext(scratch) :
+				  plic_get_hart_mcontext(scratch),
 			  enable, threshold, num);
 }
 
 void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
 			      u32 num)
 {
-	u32 hartid = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_context_restore(plic_hartid2data[hartid],
-			     plic_hartid2context[hartid][smode],
+	plic_context_restore(plic_get_hart_data_ptr(scratch),
+			     smode ? plic_get_hart_scontext(scratch) :
+				     plic_get_hart_mcontext(scratch),
 			     enable, threshold, num);
 }
 
 static int irqchip_plic_warm_init(void)
 {
-	u32 hartid = current_hartid();
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	return plic_warm_irqchip_init(plic_hartid2data[hartid],
-				      plic_hartid2context[hartid][0],
-				      plic_hartid2context[hartid][1]);
+	return plic_warm_irqchip_init(plic_get_hart_data_ptr(scratch),
+				      plic_get_hart_mcontext(scratch),
+				      plic_get_hart_scontext(scratch));
 }
 
 static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
@@ -67,6 +90,7 @@ static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
 {
 	const fdt32_t *val;
 	u32 phandle, hwirq, hartid;
+	struct sbi_scratch *scratch;
 	int i, err, count, cpu_offset, cpu_intc_offset;
 
 	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
@@ -90,16 +114,17 @@ static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
 		if (err)
 			continue;
 
-		if (SBI_HARTMASK_MAX_BITS <= hartid)
+		scratch = sbi_hartid_to_scratch(hartid);
+		if (!scratch)
 			continue;
 
-		plic_hartid2data[hartid] = pd;
+		plic_set_hart_data_ptr(scratch, pd);
 		switch (hwirq) {
 		case IRQ_M_EXT:
-			plic_hartid2context[hartid][0] = i / 2;
+			plic_set_hart_mcontext(scratch, i / 2);
 			break;
 		case IRQ_S_EXT:
-			plic_hartid2context[hartid][1] = i / 2;
+			plic_set_hart_scontext(scratch, i / 2);
 			break;
 		}
 	}
@@ -113,6 +138,24 @@ static int irqchip_plic_cold_init(void *fdt, int nodeoff,
 	int rc;
 	struct plic_data *pd;
 
+	if (!plic_ptr_offset) {
+		plic_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!plic_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
+	if (!plic_mcontext_offset) {
+		plic_mcontext_offset = sbi_scratch_alloc_type_offset(long);
+		if (!plic_mcontext_offset)
+			return SBI_ENOMEM;
+	}
+
+	if (!plic_scontext_offset) {
+		plic_scontext_offset = sbi_scratch_alloc_type_offset(long);
+		if (!plic_scontext_offset)
+			return SBI_ENOMEM;
+	}
+
 	pd = sbi_zalloc(sizeof(*pd));
 	if (!pd)
 		return SBI_ENOMEM;
@@ -150,7 +193,8 @@ static void thead_plic_plat_init(struct plic_data *pd)
 
 void thead_plic_restore(void)
 {
-	struct plic_data *plic = plic_hartid2data[current_hartid()];
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	struct plic_data *plic = plic_get_hart_data_ptr(scratch);
 
 	thead_plic_plat_init(plic);
 }

From 1df52fa7e8db2c23a921014404bd472d20ca42e8 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 20 Apr 2023 10:14:43 +0530
Subject: [PATCH 1299/1765] lib: utils/irqchip: Don't check hartid in
 imsic_update_hartid_table()

The imsic_map_hartid_to_data() already checks hartid before using
so we don't need to check in imsic_update_hartid_table().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/irqchip/fdt_irqchip_imsic.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index 590b2022b0a..d032ac8f540 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -12,7 +12,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_heap.h>
-#include <sbi/sbi_hartmask.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/imsic.h>
@@ -44,8 +43,6 @@ static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
 		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
 		if (err)
 			return SBI_EINVAL;
-		if (SBI_HARTMASK_MAX_BITS <= hartid)
-			return SBI_EINVAL;
 
 		switch (hwirq) {
 		case IRQ_M_EXT:

From 355796c5bc1906d749850e4215e0f7f53802ba5b Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 20 Apr 2023 10:18:08 +0530
Subject: [PATCH 1300/1765] lib: utils/irqchip: Use scratch space to save
 per-HART IMSIC pointer

Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART IMSIC pointer and IMSIC file number.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/utils/irqchip/fdt_irqchip_imsic.c |  4 +-
 lib/utils/irqchip/imsic.c             | 83 ++++++++++++++++++++++-----
 2 files changed, 70 insertions(+), 17 deletions(-)

diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index d032ac8f540..4eb1854556b 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -72,11 +72,11 @@ static int irqchip_imsic_cold_init(void *fdt, int nodeoff,
 	if (rc || !id->targets_mmode)
 		goto fail_free_data;
 
-	rc = irqchip_imsic_update_hartid_table(fdt, nodeoff, id);
+	rc = imsic_cold_irqchip_init(id);
 	if (rc)
 		goto fail_free_data;
 
-	rc = imsic_cold_irqchip_init(id);
+	rc = irqchip_imsic_update_hartid_table(fdt, nodeoff, id);
 	if (rc)
 		goto fail_free_data;
 
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 11667cd90df..7fc61d9e8a2 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -13,10 +13,10 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_domain.h>
-#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_scratch.h>
 #include <sbi_utils/irqchip/imsic.h>
 
 #define IMSIC_MMIO_PAGE_LE		0x00
@@ -79,33 +79,65 @@ do { \
 	csr_clear(CSR_MIREG, __v); \
 } while (0)
 
-static struct imsic_data *imsic_hartid2data[SBI_HARTMASK_MAX_BITS];
-static int imsic_hartid2file[SBI_HARTMASK_MAX_BITS];
+static unsigned long imsic_ptr_offset;
+
+#define imsic_get_hart_data_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, imsic_ptr_offset)
+
+#define imsic_set_hart_data_ptr(__scratch, __imsic)			\
+	sbi_scratch_write_type((__scratch), void *, imsic_ptr_offset, (__imsic))
+
+static unsigned long imsic_file_offset;
+
+#define imsic_get_hart_file(__scratch)					\
+	sbi_scratch_read_type((__scratch), long, imsic_file_offset)
+
+#define imsic_set_hart_file(__scratch, __file)				\
+	sbi_scratch_write_type((__scratch), long, imsic_file_offset, (__file))
 
 int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file)
 {
-	if (!imsic || !imsic->targets_mmode ||
-	    (SBI_HARTMASK_MAX_BITS <= hartid))
+	struct sbi_scratch *scratch;
+
+	if (!imsic || !imsic->targets_mmode)
 		return SBI_EINVAL;
 
-	imsic_hartid2data[hartid] = imsic;
-	imsic_hartid2file[hartid] = file;
+	/*
+	 * We don't need to fail if scratch pointer is not available
+	 * because we might be dealing with hartid of a HART disabled
+	 * in device tree. For HARTs disabled in device tree, the
+	 * imsic_get_data() and imsic_get_target_file() will anyway
+	 * fail.
+	 */
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return 0;
+
+	imsic_set_hart_data_ptr(scratch, imsic);
+	imsic_set_hart_file(scratch, file);
 	return 0;
 }
 
 struct imsic_data *imsic_get_data(u32 hartid)
 {
-	if (SBI_HARTMASK_MAX_BITS <= hartid)
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
 		return NULL;
-	return imsic_hartid2data[hartid];
+
+	return imsic_get_hart_data_ptr(scratch);
 }
 
 int imsic_get_target_file(u32 hartid)
 {
-	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
-	    !imsic_hartid2data[hartid])
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
 		return SBI_ENOENT;
-	return imsic_hartid2file[hartid];
+
+	return imsic_get_hart_file(scratch);
 }
 
 static int imsic_external_irqfn(struct sbi_trap_regs *regs)
@@ -133,9 +165,16 @@ static void imsic_ipi_send(u32 target_hart)
 {
 	unsigned long reloff;
 	struct imsic_regs *regs;
-	struct imsic_data *data = imsic_hartid2data[target_hart];
-	int file = imsic_hartid2file[target_hart];
+	struct imsic_data *data;
+	struct sbi_scratch *scratch;
+	int file;
+
+	scratch = sbi_hartid_to_scratch(target_hart);
+	if (!scratch)
+		return;
 
+	data = imsic_get_hart_data_ptr(scratch);
+	file = imsic_get_hart_file(scratch);
 	if (!data || !data->targets_mmode)
 		return;
 
@@ -204,7 +243,7 @@ void imsic_local_irqchip_init(void)
 
 int imsic_warm_irqchip_init(void)
 {
-	struct imsic_data *imsic = imsic_hartid2data[current_hartid()];
+	struct imsic_data *imsic = imsic_get_data(current_hartid());
 
 	/* Sanity checks */
 	if (!imsic || !imsic->targets_mmode)
@@ -306,6 +345,20 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 	if (!imsic->targets_mmode)
 		return SBI_EINVAL;
 
+	/* Allocate scratch space pointer */
+	if (!imsic_ptr_offset) {
+		imsic_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!imsic_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
+	/* Allocate scratch space file */
+	if (!imsic_file_offset) {
+		imsic_file_offset = sbi_scratch_alloc_type_offset(long);
+		if (!imsic_file_offset)
+			return SBI_ENOMEM;
+	}
+
 	/* Setup external interrupt function for IMSIC */
 	sbi_irqchip_set_irqfn(imsic_external_irqfn);
 

From 524feec7b74aa4079999af13ba4daf73b423f28a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 9 Jun 2023 17:21:08 +0530
Subject: [PATCH 1301/1765] docs: Add OpenSBI logo and use it in the top-level
 README.md

We do have an official OpenSBI logo which was designed few months ago
and was also approved by RISC-V International. Lets add this logo
under docs and also use it in the top-level README.md

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 README.md                               |   2 ++
 docs/riscv_opensbi_logo_final_color.png | Bin 0 -> 7758 bytes
 docs/riscv_opensbi_logo_final_grey.png  | Bin 0 -> 9159 bytes
 3 files changed, 2 insertions(+)
 create mode 100644 docs/riscv_opensbi_logo_final_color.png
 create mode 100644 docs/riscv_opensbi_logo_final_grey.png

diff --git a/README.md b/README.md
index a6bcb0c1c3a..bb09fdfeeb0 100644
--- a/README.md
+++ b/README.md
@@ -1,6 +1,8 @@
 RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 ========================================================
 
+![RISC-V OpenSBI](docs/riscv_opensbi_logo_final_color.png)
+
 Copyright and License
 ---------------------
 
diff --git a/docs/riscv_opensbi_logo_final_color.png b/docs/riscv_opensbi_logo_final_color.png
new file mode 100644
index 0000000000000000000000000000000000000000..111478119b5cdda1e9beddd5d779e54e7cb78d0d
GIT binary patch
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HcmV?d00001


From 932be2cde1b0f38c676bddaf801fa1030f9e9065 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 9 Jun 2023 17:29:10 +0530
Subject: [PATCH 1302/1765] README.md: Improve project copyright information

Over-time a lot of organizations and individuals have contributed to
the OpenSBI project so let us add copyright RISC-V International to
respect the contributions from all RISC-V members.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 README.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index bb09fdfeeb0..73de8eaf84f 100644
--- a/README.md
+++ b/README.md
@@ -6,8 +6,10 @@ RISC-V Open Source Supervisor Binary Interface (OpenSBI)
 Copyright and License
 ---------------------
 
-The OpenSBI project is copyright (c) 2019 Western Digital Corporation
-or its affiliates and other contributors.
+The OpenSBI project is:
+
+* Copyright (c) 2019 Western Digital Corporation or its affiliates
+* Copyright (c) 2023 RISC-V International
 
 It is distributed under the terms of the BSD 2-clause license
 ("Simplified BSD License" or "FreeBSD License", SPDX: *BSD-2-Clause*).

From 8153b2622b08802cc542f30a1fcba407a5667ab9 Mon Sep 17 00:00:00 2001
From: Alexandre Ghiti <alexghiti@rivosinc.com>
Date: Wed, 14 Jun 2023 10:20:39 +0200
Subject: [PATCH 1303/1765] platform/lib: Set no-map attribute on all PMP
 regions

This reverts commit 6966ad0abe70 ("platform/lib: Allow the OS to map the
regions that are protected by PMP").

It was thought at the time of this commit that allowing the kernel to map
PMP protected regions was safe but it is actually not: for example, the
hibernation process will try to access any linear mapping page and then
will fault on such mapped PMP regions [1]. Another issue is that the
device tree specification [2] states that a !no-map region must be
declared as EfiBootServicesData/Code in the EFI memory map which would make
the PMP protected regions reclaimable by the kernel. And to circumvent
this, RISC-V edk2 diverges from the DT specification to declare those
regions as EfiReserved.

The no-map attribute was removed to allow the kernel to use hugepages
larger than 2MB to map the linear mapping to improve the performance but
actually a recent talk from Mike Rapoport [3] stated that the
performance benefit was marginal.

For all those reasons, let's mark all the PMP protected regions as "no-map".

[1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/
[2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf
[3] https://lwn.net/Articles/931406/

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/fdt/fdt_fixup.h | 14 ---------
 lib/utils/fdt/fdt_fixup.c         | 49 +++++++------------------------
 platform/generic/sifive/fu540.c   | 13 --------
 3 files changed, 10 insertions(+), 66 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index cab3f0f2a99..ecd55a724a8 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -93,20 +93,6 @@ void fdt_plic_fixup(void *fdt);
  */
 int fdt_reserved_memory_fixup(void *fdt);
 
-/**
- * Fix up the reserved memory subnodes in the device tree
- *
- * This routine adds the no-map property to the reserved memory subnodes so
- * that the OS does not map those PMP protected memory regions.
- *
- * Platform codes must call this helper in their final_init() after fdt_fixups()
- * if the OS should not map the PMP protected reserved regions.
- *
- * @param fdt: device tree blob
- * @return zero on success and -ve on failure
- */
-int fdt_reserved_memory_nomap_fixup(void *fdt);
-
 /**
  * General device tree fix-up
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index ae6be008579..e213dedba61 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -210,7 +210,7 @@ void fdt_plic_fixup(void *fdt)
 
 static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 				       unsigned long size, int index,
-				       int parent, bool no_map)
+				       int parent)
 {
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
@@ -239,16 +239,14 @@ static int fdt_resv_memory_update_node(void *fdt, unsigned long addr,
 	if (subnode < 0)
 		return subnode;
 
-	if (no_map) {
-		/*
-		 * Tell operating system not to create a virtual
-		 * mapping of the region as part of its standard
-		 * mapping of system memory.
-		 */
-		err = fdt_setprop_empty(fdt, subnode, "no-map");
-		if (err < 0)
-			return err;
-	}
+	/*
+	 * Tell operating system not to create a virtual
+	 * mapping of the region as part of its standard
+	 * mapping of system memory.
+	 */
+	err = fdt_setprop_empty(fdt, subnode, "no-map");
+	if (err < 0)
+		return err;
 
 	/* encode the <reg> property value */
 	val = reg;
@@ -286,7 +284,6 @@ int fdt_reserved_memory_fixup(void *fdt)
 {
 	struct sbi_domain_memregion *reg;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	unsigned long filtered_base[PMP_COUNT] = { 0 };
 	unsigned char filtered_order[PMP_COUNT] = { 0 };
 	unsigned long addr, size;
@@ -382,33 +379,7 @@ int fdt_reserved_memory_fixup(void *fdt)
 	for (j = 0; j < i; j++) {
 		addr = filtered_base[j];
 		size = 1UL << filtered_order[j];
-		fdt_resv_memory_update_node(fdt, addr, size, j, parent,
-					    (sbi_hart_pmp_count(scratch))
-					    ? false : true);
-	}
-
-	return 0;
-}
-
-int fdt_reserved_memory_nomap_fixup(void *fdt)
-{
-	int parent, subnode;
-	int err;
-
-	/* Locate the reserved memory node */
-	parent = fdt_path_offset(fdt, "/reserved-memory");
-	if (parent < 0)
-		return parent;
-
-	fdt_for_each_subnode(subnode, fdt, parent) {
-		/*
-		 * Tell operating system not to create a virtual
-		 * mapping of the region as part of its standard
-		 * mapping of system memory.
-		 */
-		err = fdt_setprop_empty(fdt, subnode, "no-map");
-		if (err < 0)
-			return err;
+		fdt_resv_memory_update_node(fdt, addr, size, j, parent);
 	}
 
 	return 0;
diff --git a/platform/generic/sifive/fu540.c b/platform/generic/sifive/fu540.c
index 08f7bfc401e..b980f44371b 100644
--- a/platform/generic/sifive/fu540.c
+++ b/platform/generic/sifive/fu540.c
@@ -20,18 +20,6 @@ static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
 	return 0;
 }
 
-static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match)
-{
-	/*
-	 * SiFive Freedom U540 has an erratum that prevents S-mode software
-	 * to access a PMP protected region using 1GB page table mapping, so
-	 * always add the no-map attribute on this platform.
-	 */
-	fdt_reserved_memory_nomap_fixup(fdt);
-
-	return 0;
-}
-
 static const struct fdt_match sifive_fu540_match[] = {
 	{ .compatible = "sifive,fu540" },
 	{ .compatible = "sifive,fu540g" },
@@ -43,5 +31,4 @@ static const struct fdt_match sifive_fu540_match[] = {
 const struct platform_override sifive_fu540 = {
 	.match_table = sifive_fu540_match,
 	.tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
-	.fdt_fixup = sifive_fu540_fdt_fixup,
 };

From d64942f0e4fe63a248e7ba3dd7ff4dec02954134 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 16 Jun 2023 15:03:51 +0800
Subject: [PATCH 1304/1765] firmware: Fix find hart index

After the loop to find the hartid is launched, assigning -1 to
index will fail in the subsequent compare instruction bge. Fix
This.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index fff09e1365c..b94742395c9 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -471,7 +471,6 @@ _start_warm:
 	add	s9, s9, 4
 	add	a4, a4, 1
 	blt	a4, s7, 1b
-	li	a4, -1
 2:	add	s6, a4, zero
 3:	bge	s6, s7, _start_hang
 

From 27c957a43b030523baf931a3b8ef002418fb27ad Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Sun, 18 Jun 2023 11:07:16 -0400
Subject: [PATCH 1305/1765] lib: reset: Move fdt_reset_init into
 generic_early_init

The fdt_reset_thead driver needs to modify the __reset_thead_csr_stub
text region for the secondary harts booting. After that, the
sbi_hart_pmp_configure may lock down the text region with M_READABLE &
M_EXECUTABLE attributes in the future. Currently, the M_READABLE &
M_EXECUtABLE have no effect on m-mode, the L-bit in pmpcfg csr is
useless for the current opensbi scenario. See:

Priv-isa-spec 3.7.1.2. Locking and Privilege Mode
When the L bit is clear, any M-mode access matching the PMP entry will
succeed; the R/W/X permissions apply only to S and U modes.

That's why current fdt_reset_thead could still work well after commit:
230278dcf127 ("lib: sbi: Add separate entries for firmware RX and RW
regions"). So this patch fixes up a fake bug for the M-mode permission
setting of the future.

Fixes: 230278dcf127 ("lib: sbi: Add separate entries for firmware RX and RW regions")
Link: http://lists.infradead.org/pipermail/opensbi/2023-June/005176.html
Reported-by: Jessica Clarke <jrtc27@jrtc27.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/platform.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 0c9cd951817..86811e6b02c 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -143,6 +143,9 @@ static int generic_nascent_init(void)
 
 static int generic_early_init(bool cold_boot)
 {
+	if (cold_boot)
+		fdt_reset_init();
+
 	if (!generic_plat || !generic_plat->early_init)
 		return 0;
 
@@ -154,9 +157,6 @@ static int generic_final_init(bool cold_boot)
 	void *fdt;
 	int rc;
 
-	if (cold_boot)
-		fdt_reset_init();
-
 	if (generic_plat && generic_plat->final_init) {
 		rc = generic_plat->final_init(cold_boot, generic_plat_match);
 		if (rc)

From 8bd666a25b543ba391ae6ee81c1a2469e95c4a05 Mon Sep 17 00:00:00 2001
From: Gianluca Guida <gianluca@rivosinc.com>
Date: Thu, 22 Jun 2023 18:38:59 +0100
Subject: [PATCH 1306/1765] lib: sbi: check A2 register in ecall_dbcn_handler.

Do not ignore register A2 (high bits of physical address) in the dbcn
handler (RV64).

Signed-off-by: Gianluca Guida <gianluca@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_dbcn.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index e0b892c2ed6..ecec027a0e1 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -34,11 +34,14 @@ static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 		 * Based on above, we simply fail if the upper 32bits of
 		 * the physical address (i.e. a2 register) is non-zero on
 		 * RV32.
+                 *
+                 * Analogously, we fail if the upper 64bit of the
+                 * physical address (i.e. a2 register) is non-zero on
+                 * RV64.
 		 */
-#if __riscv_xlen == 32
 		if (regs->a2)
 			return SBI_ERR_FAILED;
-#endif
+
 		if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(),
 					regs->a1, regs->a0, smode,
 					SBI_DOMAIN_READ|SBI_DOMAIN_WRITE))

From 2552799a1df30a3dcd2321a8b75d61d06f5fb9fc Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 23 Jun 2023 11:01:49 +0530
Subject: [PATCH 1307/1765] include: Bump-up version to 1.3

This patch updates OpenSBI version to 1.3 as part of
release preparation.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index dd75deae814..641cf8814b2 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 2
+#define OPENSBI_VERSION_MINOR 3
 
 /**
  * OpenSBI 32-bit version with:

From 0907de38dbcd121d2f8b4bafaf7f9fe76092d5f1 Mon Sep 17 00:00:00 2001
From: Gianluca Guida <gianluca@rivosinc.com>
Date: Thu, 29 Jun 2023 15:24:08 +0100
Subject: [PATCH 1308/1765] lib: sbi: fix comment indent

Use tabs rather than spaces.

Signed-off-by: Gianluca Guida <gianluca@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_dbcn.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index ecec027a0e1..8e687298a39 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -34,10 +34,10 @@ static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 		 * Based on above, we simply fail if the upper 32bits of
 		 * the physical address (i.e. a2 register) is non-zero on
 		 * RV32.
-                 *
-                 * Analogously, we fail if the upper 64bit of the
-                 * physical address (i.e. a2 register) is non-zero on
-                 * RV64.
+		 *
+		 * Analogously, we fail if the upper 64bit of the
+		 * physical address (i.e. a2 register) is non-zero on
+		 * RV64.
 		 */
 		if (regs->a2)
 			return SBI_ERR_FAILED;

From eb736a5118b8d271bd649d713b6a058882c8fb7b Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 3 Jul 2023 15:43:18 +0200
Subject: [PATCH 1309/1765] lib: sbi_pmu: Avoid out of bounds access

On a misconfigured system we could access phs->active_events[] out of
bounds. Check that num_hw_ctrs is less or equal SBI_PMU_HW_CTR_MAX.

Addresses-Coverity-ID: 1566113 ("Out-of-bounds read")
Addresses-Coverity-ID: 1566114 ("Out-of-bounds write")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index c73e6ef3ff2..7213a53b0b5 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -933,6 +933,8 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 
 		/* mcycle & minstret is available always */
 		num_hw_ctrs = sbi_hart_mhpm_count(scratch) + 3;
+		if (num_hw_ctrs > SBI_PMU_HW_CTR_MAX)
+			return SBI_EINVAL;
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 

From 7828eebaaa773fd83e63471ca27be3f30a0694f6 Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@sifive.com>
Date: Wed, 1 Mar 2023 12:25:25 +0000
Subject: [PATCH 1310/1765] gpio/desginware: add Synopsys DesignWare APB GPIO
 support

Add a driver for the Synopsys DesignWare APB GPIO IP block found in many
SoCs.

Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/Kconfig               |   4 +
 lib/utils/gpio/fdt_gpio_designware.c | 140 +++++++++++++++++++++++++++
 lib/utils/gpio/objects.mk            |   3 +
 platform/generic/configs/defconfig   |   1 +
 4 files changed, 148 insertions(+)
 create mode 100644 lib/utils/gpio/fdt_gpio_designware.c

diff --git a/lib/utils/gpio/Kconfig b/lib/utils/gpio/Kconfig
index 1b338a6fd94..1a437e67d97 100644
--- a/lib/utils/gpio/Kconfig
+++ b/lib/utils/gpio/Kconfig
@@ -10,6 +10,10 @@ config FDT_GPIO
 
 if FDT_GPIO
 
+config FDT_GPIO_DESIGNWARE
+	bool "DesignWare GPIO driver"
+	default n
+
 config FDT_GPIO_SIFIVE
 	bool "SiFive GPIO FDT driver"
 	default n
diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
new file mode 100644
index 00000000000..6223d7e7c41
--- /dev/null
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -0,0 +1,140 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 SiFive
+ *
+ * GPIO driver for Synopsys DesignWare APB GPIO
+ *
+ * Authors:
+ *   Ben Dooks <ben.dooks@sifive.com>
+ */
+
+#include <libfdt.h>
+
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_error.h>
+
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/gpio/fdt_gpio.h>
+
+#define DW_GPIO_CHIP_MAX	4	/* need 1 per bank in use */
+#define DW_GPIO_PINS_MAX	32
+
+#define DW_GPIO_DDR	0x4
+#define DW_GPIO_DR	0x0
+#define DW_GPIO_BIT(_b)	(1UL << (_b))
+
+struct dw_gpio_chip {
+	void *dr;
+	void *ext;
+	struct gpio_chip chip;
+};
+
+extern struct fdt_gpio fdt_gpio_designware;
+
+static unsigned int dw_gpio_chip_count;
+static struct dw_gpio_chip dw_gpio_chip_array[DW_GPIO_CHIP_MAX];
+
+#define pin_to_chip(__p) container_of((__p)->chip, struct dw_gpio_chip, chip);
+
+static int dw_gpio_direction_output(struct gpio_pin *gp, int value)
+{
+	struct dw_gpio_chip *chip = pin_to_chip(gp);
+	unsigned long v;
+
+	v = readl(chip->dr + DW_GPIO_DR);
+	if (!value)
+		v &= ~DW_GPIO_BIT(gp->offset);
+	else
+		v |= DW_GPIO_BIT(gp->offset);
+	writel(v, chip->dr + DW_GPIO_DR);
+
+	/* the DR is output only so we can set it then the DDR to set
+	 * the data direction, to avoid glitches.
+	 */
+	v = readl(chip->dr + DW_GPIO_DDR);
+	v |= DW_GPIO_BIT(gp->offset);
+	writel(v, chip->dr + DW_GPIO_DDR);
+
+	return 0;
+}
+
+static void dw_gpio_set(struct gpio_pin *gp, int value)
+{
+	struct dw_gpio_chip *chip = pin_to_chip(gp);
+	unsigned long v;
+
+	v = readl(chip->dr + DW_GPIO_DR);
+	if (!value)
+		v &= ~DW_GPIO_BIT(gp->offset);
+	else
+		v |= DW_GPIO_BIT(gp->offset);
+	writel(v, chip->dr + DW_GPIO_DR);
+}
+
+/* notes:
+ * each sub node is a bank and has ngpios or snpns,nr-gpios and a reg property
+ * with the compatible `snps,dw-apb-gpio-port`.
+ * bank A is the only one with irq support but we're not using it here
+*/
+
+static int dw_gpio_init_bank(void *fdt, int nodeoff, u32 phandle,
+			     const struct fdt_match *match)
+{
+	struct dw_gpio_chip *chip;
+	const fdt32_t *val;
+	uint64_t addr;
+	int rc, poff, nr_pins, bank, len;
+
+	if (dw_gpio_chip_count >= DW_GPIO_CHIP_MAX)
+		return SBI_ENOSPC;
+
+	/* need to get parent for the address property  */
+	poff = fdt_parent_offset(fdt, nodeoff);
+	if (poff < 0)
+		return SBI_EINVAL;
+
+	rc = fdt_get_node_addr_size(fdt, poff, 0, &addr, NULL);
+	if (rc)
+		return rc;
+
+	val = fdt_getprop(fdt, nodeoff, "reg", &len);
+	if (!val || len <= 0)
+		return SBI_EINVAL;
+	bank = fdt32_to_cpu(*val);
+
+	val = fdt_getprop(fdt, nodeoff, "snps,nr-gpios", &len);
+	if (!val)
+		val = fdt_getprop(fdt, nodeoff, "ngpios", &len);
+	if (!val || len <= 0)
+		return SBI_EINVAL;
+	nr_pins = fdt32_to_cpu(*val);
+
+	chip = &dw_gpio_chip_array[dw_gpio_chip_count];
+
+	chip->dr = (void *)addr + (bank * 0xc);
+	chip->ext = (void *)addr + (bank * 4) + 0x50;
+	chip->chip.driver = &fdt_gpio_designware;
+	chip->chip.id = phandle;
+	chip->chip.ngpio = nr_pins;
+	chip->chip.set = dw_gpio_set;
+	chip->chip.direction_output = dw_gpio_direction_output;
+	rc = gpio_chip_add(&chip->chip);
+	if (rc)
+		return rc;
+
+	dw_gpio_chip_count++;
+	return 0;
+}
+
+/* since we're only probed when used, match on port not main controller node */
+static const struct fdt_match dw_gpio_match[] = {
+	{ .compatible = "snps,dw-apb-gpio-port" },
+	{ },
+};
+
+struct fdt_gpio fdt_gpio_designware = {
+	.match_table = dw_gpio_match,
+	.xlate = fdt_gpio_simple_xlate,
+	.init = dw_gpio_init_bank,
+};
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index 8f4a6a84fb1..76647a591d5 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -10,6 +10,9 @@
 libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio.o
 libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio_drivers.o
 
+carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_DESIGNWARE) += fdt_gpio_designware
+libsbiutils-objs-$(CONFIG_FDT_GPIO_DESIGNWARE) += gpio/fdt_gpio_designware.o
+
 carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_SIFIVE) += fdt_gpio_sifive
 libsbiutils-objs-$(CONFIG_FDT_GPIO_SIFIVE) += gpio/fdt_gpio_sifive.o
 
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index ee0df38a22e..671281bb6cb 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -5,6 +5,7 @@ CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_FDT_GPIO=y
+CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_GPIO_STARFIVE=y
 CONFIG_FDT_I2C=y

From c6a35733b74aeff612398f274ed19a74f81d1f37 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jul 2023 12:15:15 +0530
Subject: [PATCH 1311/1765] lib: utils: Fix sbi_hartid_to_scratch() usage in
 ACLINT drivers

The cold_init() functions of ACLINT drivers should skip the HART
if sbi_hartid_to_scratch() returns NULL because we might be dealing
with a HART that is disabled in the device tree.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/ipi/aclint_mswi.c     | 7 ++++++-
 lib/utils/timer/aclint_mtimer.c | 7 ++++++-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index f47b3bcbbb4..140a49b5f52 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -101,8 +101,13 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 	/* Update MSWI pointer in scratch space */
 	for (i = 0; i < mswi->hart_count; i++) {
 		scratch = sbi_hartid_to_scratch(mswi->first_hartid + i);
+		/*
+		 * We don't need to fail if scratch pointer is not available
+		 * because we might be dealing with hartid of a HART disabled
+		 * in the device tree.
+		 */
 		if (!scratch)
-			return SBI_ENOENT;
+			continue;
 		mswi_set_hart_data_ptr(scratch, mswi);
 	}
 
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 13af5d8232d..271e6252fef 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -219,8 +219,13 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	/* Update MTIMER pointer in scratch space */
 	for (i = 0; i < mt->hart_count; i++) {
 		scratch = sbi_hartid_to_scratch(mt->first_hartid + i);
+		/*
+		 * We don't need to fail if scratch pointer is not available
+		 * because we might be dealing with hartid of a HART disabled
+		 * in the device tree.
+		 */
 		if (!scratch)
-			return SBI_ENOENT;
+			continue;
 		mtimer_set_hart_data_ptr(scratch, mt);
 	}
 

From 1a398d9faa60ac0341614f59b864340fc5e49a35 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jul 2023 11:57:17 +0530
Subject: [PATCH 1312/1765] lib: sbi: Add Zicntr as a HART ISA extension

Recently ratified Zicntr ISA extension covers cycle, time and
instret CSRs so we replace the "time" ISA extension with "zicntr"
ISA extension in OpenSBI.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_hart.h | 4 ++--
 lib/sbi/sbi_hart.c     | 6 +++---
 lib/sbi/sbi_timer.c    | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 95b40e75933..d48940d235f 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -28,8 +28,8 @@ enum sbi_hart_priv_versions {
 enum sbi_hart_extensions {
 	/** Hart has Sscofpmt extension */
 	SBI_HART_EXT_SSCOFPMF = 0,
-	/** HART has HW time CSR (extension name not available) */
-	SBI_HART_EXT_TIME,
+	/** HART has Zicntr extension (i.e. HW cycle, time & instret CSRs) */
+	SBI_HART_EXT_ZICNTR,
 	/** HART has AIA M-mode CSRs */
 	SBI_HART_EXT_SMAIA,
 	/** HART has Smstateen CSR **/
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6e52cbd76d8..c47048285fd 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -441,8 +441,8 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_SSCOFPMF:
 		estr = "sscofpmf";
 		break;
-	case SBI_HART_EXT_TIME:
-		estr = "time";
+	case SBI_HART_EXT_ZICNTR:
+		estr = "zicntr";
 		break;
 	case SBI_HART_EXT_SMAIA:
 		estr = "smaia";
@@ -676,7 +676,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
 	if (!trap.cause)
 		__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_TIME, true);
+					SBI_HART_EXT_ZICNTR, true);
 
 	/* Detect if hart has AIA local interrupt CSRs */
 	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 4b24cbeb7c2..7b618de1e7f 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -188,7 +188,7 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 		if (!time_delta_off)
 			return SBI_ENOMEM;
 
-		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_TIME))
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_ZICNTR))
 			get_time_val = get_ticks;
 	} else {
 		if (!time_delta_off)

From 669089c5f291f5543db1c46e8d6b04ffe49e9576 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jul 2023 12:15:56 +0530
Subject: [PATCH 1313/1765] lib: sbi: Add Zihpm as a HART ISA extension

Recently ratified Zihpm ISA extension covers all [m]hpm* CSRs
so we add Zihpm as a HART ISA extension in OpenSBI.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_hart.h | 2 ++
 lib/sbi/sbi_hart.c     | 8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index d48940d235f..938248f36c4 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -36,6 +36,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SMSTATEEN,
 	/** HART has Sstc extension */
 	SBI_HART_EXT_SSTC,
+	/** HART has Zihpm extension */
+	SBI_HART_EXT_ZIHPM,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c47048285fd..ff6f5826c62 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -453,6 +453,9 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_SMSTATEEN:
 		estr = "smstateen";
 		break;
+	case SBI_HART_EXT_ZIHPM:
+		estr = "zihpm";
+		break;
 	default:
 		break;
 	}
@@ -706,6 +709,11 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	if (rc)
 		return rc;
 
+	/* Extensions implied by other extensions and features */
+	if (hfeatures->mhpm_count)
+		__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_ZIHPM, true);
+
 	/* Mark hart feature detection done */
 	hfeatures->detected = true;
 

From 72b9c8ff89a963bcec0a7f41fc679ee5246efd01 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jul 2023 12:23:57 +0530
Subject: [PATCH 1314/1765] lib: sbi: Alphabetically sort HART ISA extensions

Let us follow alphabetical order for HART ISA extension so that
it is simpler to maintain.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi/sbi_hart.h | 10 +++++-----
 lib/sbi/sbi_hart.c     | 16 ++++++++--------
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 938248f36c4..b97f78cd11e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -26,16 +26,16 @@ enum sbi_hart_priv_versions {
 
 /** Possible ISA extensions of a hart */
 enum sbi_hart_extensions {
-	/** Hart has Sscofpmt extension */
-	SBI_HART_EXT_SSCOFPMF = 0,
-	/** HART has Zicntr extension (i.e. HW cycle, time & instret CSRs) */
-	SBI_HART_EXT_ZICNTR,
 	/** HART has AIA M-mode CSRs */
-	SBI_HART_EXT_SMAIA,
+	SBI_HART_EXT_SMAIA = 0,
 	/** HART has Smstateen CSR **/
 	SBI_HART_EXT_SMSTATEEN,
+	/** Hart has Sscofpmt extension */
+	SBI_HART_EXT_SSCOFPMF,
 	/** HART has Sstc extension */
 	SBI_HART_EXT_SSTC,
+	/** HART has Zicntr extension (i.e. HW cycle, time & instret CSRs) */
+	SBI_HART_EXT_ZICNTR,
 	/** HART has Zihpm extension */
 	SBI_HART_EXT_ZIHPM,
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index ff6f5826c62..2eacefb17c2 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -438,20 +438,20 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	char *estr = NULL;
 
 	switch (ext) {
-	case SBI_HART_EXT_SSCOFPMF:
-		estr = "sscofpmf";
-		break;
-	case SBI_HART_EXT_ZICNTR:
-		estr = "zicntr";
-		break;
 	case SBI_HART_EXT_SMAIA:
 		estr = "smaia";
 		break;
+	case SBI_HART_EXT_SMSTATEEN:
+		estr = "smstateen";
+		break;
+	case SBI_HART_EXT_SSCOFPMF:
+		estr = "sscofpmf";
+		break;
 	case SBI_HART_EXT_SSTC:
 		estr = "sstc";
 		break;
-	case SBI_HART_EXT_SMSTATEEN:
-		estr = "smstateen";
+	case SBI_HART_EXT_ZICNTR:
+		estr = "zicntr";
 		break;
 	case SBI_HART_EXT_ZIHPM:
 		estr = "zihpm";

From 5359fc69552ffa270b95c2935ef4407b050c43cb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jul 2023 12:34:31 +0530
Subject: [PATCH 1315/1765] lib: sbi: Rename hart_pmu_get_allowed_bits()
 function

The hart_pmu_get_allowed_bits() function detects implemented bits
of mhpm counters so let us rename this function accordingly.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_hart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 2eacefb17c2..e9b2b271b8a 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -527,7 +527,7 @@ static unsigned long hart_pmp_get_allowed_addr(void)
 	return val;
 }
 
-static int hart_pmu_get_allowed_bits(void)
+static int hart_mhpm_get_allowed_bits(void)
 {
 	unsigned long val = ~(0UL);
 	struct sbi_trap_info trap = {0};
@@ -628,7 +628,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 
 	/* Detect number of MHPM counters */
 	__check_csr(CSR_MHPMCOUNTER3, 0, 1UL, mhpm_count, __mhpm_skip);
-	hfeatures->mhpm_bits = hart_pmu_get_allowed_bits();
+	hfeatures->mhpm_bits = hart_mhpm_get_allowed_bits();
 
 	__check_csr_4(CSR_MHPMCOUNTER4, 0, 1UL, mhpm_count, __mhpm_skip);
 	__check_csr_8(CSR_MHPMCOUNTER8, 0, 1UL, mhpm_count, __mhpm_skip);

From 976895c57e3b0655466e20c6eb0d7c670b9e8452 Mon Sep 17 00:00:00 2001
From: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Date: Thu, 6 Jul 2023 14:30:28 +0800
Subject: [PATCH 1316/1765] lib: sbi: Fix Priv spec version for [m|s]counteren
 and mcountinhibit CSRs

Fix Priv spec version typo in commit d4b563c881d6 ("lib: sbi: Remove MCOUNTEREN
and SCOUNTEREN hart features").

At least Priv spec v1.11 is required for [m|s]counteren and mcountinhibit CSRs.

Fixes: d4b563c881d6 ("lib: sbi: Remove MCOUNTEREN and SCOUNTEREN hart features")
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e9b2b271b8a..0c27fd7ba01 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -667,7 +667,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 		hfeatures->priv_version = SBI_HART_PRIV_VER_1_12;
 
 	/* Counter overflow/filtering is not useful without mcounter/inhibit */
-	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
+	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11) {
 		/* Detect if hart supports sscofpmf */
 		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
 		if (!trap.cause)

From 60539176266fa37b4bc20054128bebec5bbe7055 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:21 +0800
Subject: [PATCH 1317/1765] lib: sbi: Fix how print gets flags

The flags for print should be able to appear in any order. The
previous code required the order to be fixed.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 30 +++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 168dffd0642..d87b5c20efc 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -236,6 +236,7 @@ static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 
 static int print(char **out, u32 *out_len, const char *format, va_list args)
 {
+	bool flags_done;
 	int width, flags, pc = 0;
 	char scr[2], *tout;
 	bool use_tbuf = (!out) ? true : false;
@@ -268,17 +269,24 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			if (*format == '%')
 				goto literal;
 			/* Get flags */
-			if (*format == '-') {
-				++format;
-				flags = PAD_RIGHT;
-			}
-			if (*format == '#') {
-				++format;
-				flags |= PAD_ALTERNATE;
-			}
-			while (*format == '0') {
-				++format;
-				flags |= PAD_ZERO;
+			flags_done = false;
+			while (!flags_done) {
+				switch (*format) {
+				case '-':
+					flags |= PAD_RIGHT;
+					break;
+				case '#':
+					flags |= PAD_ALTERNATE;
+					break;
+				case '0':
+					flags |= PAD_ZERO;
+					break;
+				default:
+					flags_done = true;
+					break;
+				}
+				if (!flags_done)
+					++format;
 			}
 			/* Get width */
 			for (; *format >= '0' && *format <= '9'; ++format) {

From 35ef1826906b5abfa0fc0c969ad29662fa83106d Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:22 +0800
Subject: [PATCH 1318/1765] lib: sbi: print not fill '0' when left-aligned

Left alignment and padding '0' should not exist at the same time,
this patch skips padding.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index d87b5c20efc..03ee05a11cb 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -288,6 +288,8 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				if (!flags_done)
 					++format;
 			}
+			if (flags & PAD_RIGHT)
+				flags &= ~PAD_ZERO;
 			/* Get width */
 			for (; *format >= '0' && *format <= '9'; ++format) {
 				width *= 10;

From 40dac06e3c3c4056bf47d295c6fd85856556d998 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:23 +0800
Subject: [PATCH 1319/1765] lib: sbi: Add '+' flags for print

Adds + flags for print, prefixing positive numbers with + when this
flags is present

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 03ee05a11cb..20fe65a3030 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -120,6 +120,7 @@ unsigned long sbi_ngets(char *str, unsigned long len)
 #define PAD_RIGHT 1
 #define PAD_ZERO 2
 #define PAD_ALTERNATE 4
+#define PAD_SIGN 8
 #define PRINT_BUF_LEN 64
 
 #define va_start(v, l) __builtin_va_start((v), l)
@@ -186,15 +187,18 @@ static int prints(char **out, u32 *out_len, const char *string, int width,
 static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 		  int width, int flags, int letbase)
 {
-	char print_buf[PRINT_BUF_LEN];
-	char *s;
-	int neg = 0, pc = 0;
+	char *s, sign = 0, print_buf[PRINT_BUF_LEN];
+	int pc = 0;
 	u64 t;
 	unsigned long long u = i;
 
-	if (sg && b == 10 && i < 0) {
-		neg = 1;
-		u   = -i;
+	if (sg && b == 10) {
+		if ((flags & PAD_SIGN) && i > 0)
+			sign = '+';
+		if (i < 0) {
+			sign = '-';
+			u = -i;
+		}
 	}
 
 	s  = print_buf + PRINT_BUF_LEN - 1;
@@ -221,13 +225,13 @@ static int printi(char **out, u32 *out_len, long long i, int b, int sg,
 		*--s = '0';
 	}
 
-	if (neg) {
+	if (sign) {
 		if (width && (flags & PAD_ZERO)) {
-			printc(out, out_len, '-');
+			printc(out, out_len, sign);
 			++pc;
 			--width;
 		} else {
-			*--s = '-';
+			*--s = sign;
 		}
 	}
 
@@ -275,6 +279,9 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				case '-':
 					flags |= PAD_RIGHT;
 					break;
+				case '+':
+					flags |= PAD_SIGN;
+					break;
 				case '#':
 					flags |= PAD_ALTERNATE;
 					break;

From 458fa742663f889033b87b6d866f68fbc1c22eb4 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:24 +0800
Subject: [PATCH 1320/1765] lib: sbi: Add ' ' '\'' flags for print

The space flag is used to add a space before positive numbers, and
apostrophe is used to print the thousand separator. Add code to
ignore these two flags

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 20fe65a3030..4229e7e3be3 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -288,6 +288,10 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				case '0':
 					flags |= PAD_ZERO;
 					break;
+				case ' ':
+				case '\'':
+					/* Ignored flags, do nothing */
+					break;
 				default:
 					flags_done = true;
 					break;

From 05cbb6e908a469f152d0253cfdf7c1aa2bda820d Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:25 +0800
Subject: [PATCH 1321/1765] lib: sbi: implifying the parameters of printi

The information of sg/b/letbase can be obtained by the type character,
simplifying the parameter by passing the type directly.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 127 +++++++++++++++++-------------------------
 1 file changed, 50 insertions(+), 77 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 4229e7e3be3..51380cffc7d 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -184,15 +184,26 @@ static int prints(char **out, u32 *out_len, const char *string, int width,
 	return pc;
 }
 
-static int printi(char **out, u32 *out_len, long long i, int b, int sg,
-		  int width, int flags, int letbase)
+static int printi(char **out, u32 *out_len, long long i,
+		  int width, int flags, int type)
 {
-	char *s, sign = 0, print_buf[PRINT_BUF_LEN];
 	int pc = 0;
-	u64 t;
-	unsigned long long u = i;
+	char *s, sign = 0, letbase, print_buf[PRINT_BUF_LEN];
+	unsigned long long u, b, t;
+
+	b = 10;
+	letbase = 'a';
+	if (type == 'o')
+		b = 8;
+	else if (type == 'x' || type == 'X' || type == 'p' || type == 'P') {
+		b = 16;
+		letbase &= ~0x20;
+		letbase |= type & 0x20;
+	}
 
-	if (sg && b == 10) {
+	u = i;
+	sign = 0;
+	if (type == 'i' || type == 'd') {
 		if ((flags & PAD_SIGN) && i > 0)
 			sign = '+';
 		if (i < 0) {
@@ -242,9 +253,8 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 {
 	bool flags_done;
 	int width, flags, pc = 0;
-	char scr[2], *tout;
+	char type, scr[2], *tout;
 	bool use_tbuf = (!out) ? true : false;
-	unsigned long long tmp;
 
 	/*
 	 * The console_tbuf is protected by console_out_lock and
@@ -314,83 +324,46 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			}
 			if ((*format == 'd') || (*format == 'i')) {
 				pc += printi(out, out_len, va_arg(args, int),
-					     10, 1, width, flags, '0');
-				continue;
-			}
-			if (*format == 'x') {
-				pc += printi(out, out_len,
-					     va_arg(args, unsigned int), 16, 0,
-					     width, flags, 'a');
+					     width, flags, *format);
 				continue;
 			}
-			if (*format == 'X') {
-				pc += printi(out, out_len,
-					     va_arg(args, unsigned int), 16, 0,
-					     width, flags, 'A');
+			if ((*format == 'u') || (*format == 'x') || (*format == 'X')) {
+				pc += printi(out, out_len, va_arg(args, unsigned int),
+					     width, flags, *format);
 				continue;
 			}
-			if (*format == 'u') {
-				pc += printi(out, out_len,
-					     va_arg(args, unsigned int), 10, 0,
-					     width, flags, 'a');
+			if ((*format == 'p') || (*format == 'P')) {
+				pc += printi(out, out_len, (uintptr_t)va_arg(args, void*),
+					     width, flags, *format);
 				continue;
 			}
-			if (*format == 'p') {
-				pc += printi(out, out_len,
-					     va_arg(args, unsigned long), 16, 0,
-					     width, flags, 'a');
-				continue;
-			}
-			if (*format == 'P') {
-				pc += printi(out, out_len,
-					     va_arg(args, unsigned long), 16, 0,
-					     width, flags, 'A');
-				continue;
-			}
-			if (*format == 'l' && *(format + 1) == 'l') {
-				tmp = va_arg(args, unsigned long long);
-				if (*(format + 2) == 'u') {
-					format += 2;
-					pc += printi(out, out_len, tmp, 10, 0,
-						     width, flags, 'a');
-				} else if (*(format + 2) == 'x') {
-					format += 2;
-					pc += printi(out, out_len, tmp, 16, 0,
-						     width, flags, 'a');
-				} else if (*(format + 2) == 'X') {
-					format += 2;
-					pc += printi(out, out_len, tmp, 16, 0,
-						     width, flags, 'A');
-				} else {
-					format += 1;
-					pc += printi(out, out_len, tmp, 10, 1,
-						     width, flags, '0');
+			if (*format == 'l') {
+				type = 'i';
+				if (format[1] == 'l') {
+					++format;
+					if ((format[1] == 'u')
+							|| (format[1] == 'd') || (format[1] == 'i')
+							|| (format[1] == 'x') || (format[1] == 'X')) {
+						++format;
+						type = *format;
+					}
+					pc += printi(out, out_len, va_arg(args, long long),
+						width, flags, type);
+					continue;
 				}
-				continue;
-			} else if (*format == 'l') {
-				if (*(format + 1) == 'u') {
-					format += 1;
-					pc += printi(
-						out, out_len,
-						va_arg(args, unsigned long), 10,
-						0, width, flags, 'a');
-				} else if (*(format + 1) == 'x') {
-					format += 1;
-					pc += printi(
-						out, out_len,
-						va_arg(args, unsigned long), 16,
-						0, width, flags, 'a');
-				} else if (*(format + 1) == 'X') {
-					format += 1;
-					pc += printi(
-						out, out_len,
-						va_arg(args, unsigned long), 16,
-						0, width, flags, 'A');
-				} else {
-					pc += printi(out, out_len,
-						     va_arg(args, long), 10, 1,
-						     width, flags, '0');
+				if ((format[1] == 'u')
+						|| (format[1] == 'd') || (format[1] == 'i')
+						|| (format[1] == 'x') || (format[1] == 'X')) {
+					++format;
+					type = *format;
 				}
+				if ((type == 'd') || (type == 'i'))
+					pc += printi(out, out_len, va_arg(args, long),
+					     width, flags, type);
+				else
+					pc += printi(out, out_len, va_arg(args, unsigned long),
+					     width, flags, type);
+				continue;
 			}
 			if (*format == 'c') {
 				/* char are converted to int then pushed on the stack */

From fe0828142fa34a95b6933dd94e68ed528d4c5778 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:26 +0800
Subject: [PATCH 1322/1765] lib: sbi: print add 'o' type

Add o type for print to print octal numbers

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 51380cffc7d..10b27c621c4 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -327,7 +327,8 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 					     width, flags, *format);
 				continue;
 			}
-			if ((*format == 'u') || (*format == 'x') || (*format == 'X')) {
+			if ((*format == 'u') || (*format == 'o')
+					 || (*format == 'x') || (*format == 'X')) {
 				pc += printi(out, out_len, va_arg(args, unsigned int),
 					     width, flags, *format);
 				continue;
@@ -341,7 +342,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 				type = 'i';
 				if (format[1] == 'l') {
 					++format;
-					if ((format[1] == 'u')
+					if ((format[1] == 'u') || (format[1] == 'o')
 							|| (format[1] == 'd') || (format[1] == 'i')
 							|| (format[1] == 'x') || (format[1] == 'X')) {
 						++format;
@@ -351,7 +352,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 						width, flags, type);
 					continue;
 				}
-				if ((format[1] == 'u')
+				if ((format[1] == 'u') || (format[1] == 'o')
 						|| (format[1] == 'd') || (format[1] == 'i')
 						|| (format[1] == 'x') || (format[1] == 'X')) {
 					++format;

From c6ee5ae5a485335fa28a5f74811f900d8da9f87d Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:27 +0800
Subject: [PATCH 1323/1765] lib: sbi: Fix printi

Fix two bug:
> printf("%#08x", 0x123); /* print 0000x123 */
> printf("%#x", 0); /* print 0x0 */

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 36 +++++++++++++++++++++++-------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 10b27c621c4..9e9f273f54d 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -227,23 +227,33 @@ static int printi(char **out, u32 *out_len, long long i,
 		}
 	}
 
-	if (flags & PAD_ALTERNATE) {
-		if ((b == 16) && (letbase == 'A')) {
-			*--s = 'X';
-		} else if ((b == 16) && (letbase == 'a')) {
-			*--s = 'x';
-		}
-		*--s = '0';
-	}
-
-	if (sign) {
-		if (width && (flags & PAD_ZERO)) {
+	if (flags & PAD_ZERO) {
+		if (sign) {
 			printc(out, out_len, sign);
 			++pc;
 			--width;
-		} else {
-			*--s = sign;
 		}
+		if (i && (flags & PAD_ALTERNATE)) {
+			if (b == 16 || b == 8) {
+				printc(out, out_len, '0');
+				++pc;
+				--width;
+			}
+			if (b == 16) {
+				printc(out, out_len, 'x' - 'a' + letbase);
+				++pc;
+				--width;
+			}
+		}
+	} else {
+		if (i && (flags & PAD_ALTERNATE)) {
+			if (b == 16)
+				*--s = 'x' - 'a' + letbase;
+			if (b == 16 || b == 8)
+				*--s = '0';
+		}
+		if (sign)
+			*--s = sign;
 	}
 
 	return pc + prints(out, out_len, s, width, flags);

From 3b6fcddcebf82bb58ac750a2ab4d6e22d7549ac9 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:28 +0800
Subject: [PATCH 1324/1765] lib: sbi: Simplify prints

When doing width = width - strlen(string) in prints there is no need
to consider the case that witdh may be less than 0. This is because
the code to do filling needs to be executed under the condition that
width > 0.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 21 ++++-----------------
 1 file changed, 4 insertions(+), 17 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 9e9f273f54d..adbe2e6b5db 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -151,24 +151,11 @@ static void printc(char **out, u32 *out_len, char ch)
 static int prints(char **out, u32 *out_len, const char *string, int width,
 		  int flags)
 {
-	int pc	     = 0;
-	char padchar = ' ';
-
-	if (width > 0) {
-		int len = 0;
-		const char *ptr;
-		for (ptr = string; *ptr; ++ptr)
-			++len;
-		if (len >= width)
-			width = 0;
-		else
-			width -= len;
-		if (flags & PAD_ZERO)
-			padchar = '0';
-	}
+	int pc = 0;
+	width -= sbi_strlen(string);
 	if (!(flags & PAD_RIGHT)) {
 		for (; width > 0; --width) {
-			printc(out, out_len, padchar);
+			printc(out, out_len, flags & PAD_ZERO ? '0' : ' ');
 			++pc;
 		}
 	}
@@ -177,7 +164,7 @@ static int prints(char **out, u32 *out_len, const char *string, int width,
 		++pc;
 	}
 	for (; width > 0; --width) {
-		printc(out, out_len, padchar);
+		printc(out, out_len, ' ');
 		++pc;
 	}
 

From cc89fa7b5481b3279f1628f71debf795d5618044 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:29 +0800
Subject: [PATCH 1325/1765] lib: sbi: Fix printc

Because *out needs to reserve a byte to hold '\0', no more characters
should be added to the buffer when *out has one byte left, and the
buffer size *out_len should not be modified. this patch prevents
the correction of *out_len when *out_len is 1.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index adbe2e6b5db..6915148b175 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -142,10 +142,9 @@ static void printc(char **out, u32 *out_len, char ch)
 	if (!out_len || *out_len > 1) {
 		*(*out)++ = ch;
 		**out = '\0';
+		if (out_len)
+			--(*out_len);
 	}
-
-	if (out_len && *out_len > 0)
-		--(*out_len);
 }
 
 static int prints(char **out, u32 *out_len, const char *string, int width,

From ff43168137a4890fe65460c1506fdf08c26bebad Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:02:30 +0800
Subject: [PATCH 1326/1765] lib: sbi: Fix timing of clearing tbuf

A single scan of the format char may add multiple characters to the
tbuf, causing a buffer overflow. You should check if tbuf is full in
printc so that it does not cause a buffer overflow.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 6915148b175..07a90452141 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -121,6 +121,7 @@ unsigned long sbi_ngets(char *str, unsigned long len)
 #define PAD_ZERO 2
 #define PAD_ALTERNATE 4
 #define PAD_SIGN 8
+#define USE_TBUF 16
 #define PRINT_BUF_LEN 64
 
 #define va_start(v, l) __builtin_va_start((v), l)
@@ -128,7 +129,7 @@ unsigned long sbi_ngets(char *str, unsigned long len)
 #define va_arg __builtin_va_arg
 typedef __builtin_va_list va_list;
 
-static void printc(char **out, u32 *out_len, char ch)
+static void printc(char **out, u32 *out_len, char ch, int flags)
 {
 	if (!out) {
 		sbi_putc(ch);
@@ -142,8 +143,14 @@ static void printc(char **out, u32 *out_len, char ch)
 	if (!out_len || *out_len > 1) {
 		*(*out)++ = ch;
 		**out = '\0';
-		if (out_len)
+		if (out_len) {
 			--(*out_len);
+			if ((flags & USE_TBUF) && *out_len == 1) {
+				nputs_all(console_tbuf, CONSOLE_TBUF_MAX - *out_len);
+				*out = console_tbuf;
+				*out_len = CONSOLE_TBUF_MAX;
+			}
+		}
 	}
 }
 
@@ -154,16 +161,16 @@ static int prints(char **out, u32 *out_len, const char *string, int width,
 	width -= sbi_strlen(string);
 	if (!(flags & PAD_RIGHT)) {
 		for (; width > 0; --width) {
-			printc(out, out_len, flags & PAD_ZERO ? '0' : ' ');
+			printc(out, out_len, flags & PAD_ZERO ? '0' : ' ', flags);
 			++pc;
 		}
 	}
 	for (; *string; ++string) {
-		printc(out, out_len, *string);
+		printc(out, out_len, *string, flags);
 		++pc;
 	}
 	for (; width > 0; --width) {
-		printc(out, out_len, ' ');
+		printc(out, out_len, ' ', flags);
 		++pc;
 	}
 
@@ -215,18 +222,18 @@ static int printi(char **out, u32 *out_len, long long i,
 
 	if (flags & PAD_ZERO) {
 		if (sign) {
-			printc(out, out_len, sign);
+			printc(out, out_len, sign, flags);
 			++pc;
 			--width;
 		}
 		if (i && (flags & PAD_ALTERNATE)) {
 			if (b == 16 || b == 8) {
-				printc(out, out_len, '0');
+				printc(out, out_len, '0', flags);
 				++pc;
 				--width;
 			}
 			if (b == 16) {
-				printc(out, out_len, 'x' - 'a' + letbase);
+				printc(out, out_len, 'x' - 'a' + letbase, flags);
 				++pc;
 				--width;
 			}
@@ -265,15 +272,11 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 	}
 
 	for (; *format != 0; ++format) {
-		if (use_tbuf && !console_tbuf_len) {
-			nputs_all(console_tbuf, CONSOLE_TBUF_MAX);
-			console_tbuf_len = CONSOLE_TBUF_MAX;
-			tout = console_tbuf;
-		}
-
+		width = flags = 0;
+		if (use_tbuf)
+			flags |= USE_TBUF;
 		if (*format == '%') {
 			++format;
-			width = flags = 0;
 			if (*format == '\0')
 				break;
 			if (*format == '%')
@@ -371,7 +374,7 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 			}
 		} else {
 literal:
-			printc(out, out_len, *format);
+			printc(out, out_len, *format, flags);
 			++pc;
 		}
 	}

From a73982d7376a71cf6e230b255069da46fe2becc9 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 10 Jul 2023 00:03:26 +0800
Subject: [PATCH 1327/1765] lib: sbi: Fix missing '\0' when buffer szie equal 1

Fix special case: sbi_snprintf(out, out_len, ...) when out_len equal
1, The previous code will not fill the buffer with any char.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 07a90452141..2b3b0a3fe80 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -271,6 +271,12 @@ static int print(char **out, u32 *out_len, const char *format, va_list args)
 		out_len = &console_tbuf_len;
 	}
 
+	/* handle special case: *out_len == 1*/
+	if (out) {
+		if(!out_len || *out_len)
+			**out = '\0';
+	}
+
 	for (; *format != 0; ++format) {
 		width = flags = 0;
 		if (use_tbuf)

From ea6533ada828cf71b9359f566be0f9c640022543 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 11 Jul 2023 09:00:31 +0530
Subject: [PATCH 1328/1765] lib: utils/gpio: Fix RV32 compile error for
 designware GPIO driver

Currently, we see following compile error in the designeware GPIO driver
for RV32 systems:

lib/utils/gpio/fdt_gpio_designware.c:115:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
  115 |         chip->dr = (void *)addr + (bank * 0xc);
      |                    ^
lib/utils/gpio/fdt_gpio_designware.c:116:21: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
  116 |         chip->ext = (void *)addr + (bank * 4) + 0x50;

We fix the above error using an explicit type-cast to 'unsigned long'.

Fixes: 7828eebaaa77 ("gpio/desginware: add Synopsys DesignWare APB GPIO support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/gpio/fdt_gpio_designware.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
index 6223d7e7c41..018e2d54035 100644
--- a/lib/utils/gpio/fdt_gpio_designware.c
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -112,8 +112,8 @@ static int dw_gpio_init_bank(void *fdt, int nodeoff, u32 phandle,
 
 	chip = &dw_gpio_chip_array[dw_gpio_chip_count];
 
-	chip->dr = (void *)addr + (bank * 0xc);
-	chip->ext = (void *)addr + (bank * 4) + 0x50;
+	chip->dr = (void *)(uintptr_t)addr + (bank * 0xc);
+	chip->ext = (void *)(uintptr_t)addr + (bank * 4) + 0x50;
 	chip->chip.driver = &fdt_gpio_designware;
 	chip->chip.id = phandle;
 	chip->chip.ngpio = nr_pins;

From c3b98c610b63ebb75b023135e392b4f48080f380 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:27 +0530
Subject: [PATCH 1329/1765] include: sbi: Add macro definitions for mseccfg CSR

- Add macros for Machine Security Configuration (mseccfg) CSR
- Add macros to access/manipulate bits in msecfg CSR

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 4ebed97ab0a..50071ad3e12 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -663,6 +663,18 @@
 #define CSR_MHPMEVENT30H		0x73e
 #define CSR_MHPMEVENT31H		0x73f
 
+/* Machine Security Configuration CSR (mseccfg) */
+#define CSR_MSECCFG_LOWER		0x747
+#define CSR_MSECCFG_UPPER		0x757
+#define CSR_MSECCFG			(CSR_MSECCFG_LOWER)
+
+#define MSECCFG_MML_SHIFT		(0)
+#define MSECCFG_MML			(_UL(1) << MSECCFG_MML_SHIFT)
+#define MSECCFG_MMWP_SHIFT		(1)
+#define MSECCFG_MMWP			(_UL(1) << MSECCFG_MMWP_SHIFT)
+#define MSECCFG_RLB_SHIFT		(2)
+#define MSECCFG_RLB			(_UL(1) << MSECCFG_RLB_SHIFT)
+
 /* Counter Overflow CSR */
 #define CSR_SCOUNTOVF			0xda0
 

From 1c099c4f36528e00388a77309a4887640888e35a Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:28 +0530
Subject: [PATCH 1330/1765] lib: sbi: Add functions to manipulate PMP entries

- Add a function to disable a given PMP entry.
- Add a function to check if a given entry is disabled.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_asm.h |  6 ++++++
 lib/sbi/riscv_asm.c     | 42 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 1ff36de76e3..2c34635a393 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -181,6 +181,12 @@ int misa_xlen(void);
 /* Get RISC-V ISA string representation */
 void misa_string(int xlen, char *out, unsigned int out_sz);
 
+/* Disable pmp entry at a given index */
+int pmp_disable(unsigned int n);
+
+/* Check if the matching field is set */
+int is_pmp_entry_mapped(unsigned long entry);
+
 int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len);
 
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index cd565534ca1..881dea3e54a 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -246,6 +246,48 @@ static unsigned long ctz(unsigned long x)
 	return ret;
 }
 
+int pmp_disable(unsigned int n)
+{
+	int pmpcfg_csr, pmpcfg_shift;
+	unsigned long cfgmask, pmpcfg;
+
+	if (n >= PMP_COUNT)
+		return SBI_EINVAL;
+
+#if __riscv_xlen == 32
+	pmpcfg_csr   = CSR_PMPCFG0 + (n >> 2);
+	pmpcfg_shift = (n & 3) << 3;
+#elif __riscv_xlen == 64
+	pmpcfg_csr   = (CSR_PMPCFG0 + (n >> 2)) & ~1;
+	pmpcfg_shift = (n & 7) << 3;
+#else
+# error "Unexpected __riscv_xlen"
+#endif
+
+	/* Clear the address matching bits to disable the pmp entry */
+	cfgmask = ~(0xffUL << pmpcfg_shift);
+	pmpcfg	= (csr_read_num(pmpcfg_csr) & cfgmask);
+
+	csr_write_num(pmpcfg_csr, pmpcfg);
+
+	return SBI_OK;
+}
+
+int is_pmp_entry_mapped(unsigned long entry)
+{
+	unsigned long prot;
+	unsigned long addr;
+	unsigned long log2len;
+
+	pmp_get(entry, &prot, &addr, &log2len);
+
+	/* If address matching bits are non-zero, the entry is enable */
+	if (prot & PMP_A)
+		return true;
+
+	return false;
+}
+
 int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
 	    unsigned long log2len)
 {

From 6c202c5efda59d9bbc00b52f3664ebdc2e442f9a Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:29 +0530
Subject: [PATCH 1331/1765] include: sbi: Add Smepmp specific access flags for
 PMP entries

Smepmp specification defines a truth table based on which the access is allowed to
different modes. This patch adds different flags based on this truth table.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 84 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 78 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index b05bcf4d1c9..da2a65a4d44 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -43,6 +43,84 @@ struct sbi_domain_memregion {
 #define SBI_DOMAIN_MEMREGION_SU_WRITABLE	(1UL << 4)
 #define SBI_DOMAIN_MEMREGION_SU_EXECUTABLE	(1UL << 5)
 
+#define SBI_DOMAIN_MEMREGION_ACCESS_MASK	(0x3fUL)
+#define SBI_DOMAIN_MEMREGION_M_ACCESS_MASK	(0x7UL)
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK	(0x38UL)
+
+#define SBI_DOMAIN_MEMREGION_SU_ACCESS_SHIFT	(3)
+
+#define SBI_DOMAIN_MEMREGION_SHARED_RDONLY		\
+		(SBI_DOMAIN_MEMREGION_M_READABLE |	\
+		 SBI_DOMAIN_MEMREGION_SU_READABLE)
+
+#define SBI_DOMAIN_MEMREGION_SHARED_SUX_MRX		\
+		(SBI_DOMAIN_MEMREGION_M_READABLE   |	\
+		 SBI_DOMAIN_MEMREGION_M_EXECUTABLE |	\
+		 SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+
+#define SBI_DOMAIN_MEMREGION_SHARED_SUX_MX		\
+		(SBI_DOMAIN_MEMREGION_M_EXECUTABLE |	\
+		 SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+
+#define SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW		\
+		(SBI_DOMAIN_MEMREGION_M_READABLE |	\
+		 SBI_DOMAIN_MEMREGION_M_WRITABLE |	\
+		 SBI_DOMAIN_MEMREGION_SU_READABLE|	\
+		 SBI_DOMAIN_MEMREGION_SU_WRITABLE)
+
+#define SBI_DOMAIN_MEMREGION_SHARED_SUR_MRW		\
+		(SBI_DOMAIN_MEMREGION_M_READABLE |	\
+		 SBI_DOMAIN_MEMREGION_M_WRITABLE |	\
+		 SBI_DOMAIN_MEMREGION_SU_READABLE)
+
+	/* Shared read-only region between M and SU mode */
+#define SBI_DOMAIN_MEMREGION_IS_SUR_MR(__flags)			\
+		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE))
+
+	/* Shared region: SU execute-only and M read/execute */
+#define SBI_DOMAIN_MEMREGION_IS_SUX_MRX(__flags)			\
+		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&		\
+		 (__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
+
+	/* Shared region: SU and M execute-only */
+#define SBI_DOMAIN_MEMREGION_IS_SUX_MX(__flags)				\
+		((__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
+
+	/* Shared region: SU and M read/write */
+#define SBI_DOMAIN_MEMREGION_IS_SURW_MRW(__flags)		\
+		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE) &	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE))
+
+	/* Shared region: SU read-only and M read/write */
+#define SBI_DOMAIN_MEMREGION_IS_SUR_MRW(__flags)		\
+		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) &&	\
+		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE))
+
+	/*
+	 * Check if region flags match with any of the above
+	 * mentioned shared region type
+	 */
+#define SBI_DOMAIN_MEMREGION_IS_SHARED(_flags)			\
+		(SBI_DOMAIN_MEMREGION_IS_SUR_MR(_flags)  ||	\
+		 SBI_DOMAIN_MEMREGION_IS_SUX_MRX(_flags) ||	\
+		 SBI_DOMAIN_MEMREGION_IS_SUX_MX(_flags)  ||	\
+		 SBI_DOMAIN_MEMREGION_IS_SURW_MRW(_flags)||	\
+		 SBI_DOMAIN_MEMREGION_IS_SUR_MRW(_flags))
+
+#define SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(__flags)			\
+		((__flags & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK) &&	\
+		 !(__flags & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK))
+
+#define SBI_DOMAIN_MEMREGION_SU_ONLY_ACCESS(__flags)			\
+		((__flags & SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK)  &&	\
+		 !(__flags & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK))
+
 /** Bit to control if permissions are enforced on all modes */
 #define SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS	(1UL << 6)
 
@@ -78,12 +156,6 @@ struct sbi_domain_memregion {
 				(SBI_DOMAIN_MEMREGION_SU_EXECUTABLE | \
 				 SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
 
-#define SBI_DOMAIN_MEMREGION_ACCESS_MASK	(0x3fUL)
-#define SBI_DOMAIN_MEMREGION_M_ACCESS_MASK	(0x7UL)
-#define SBI_DOMAIN_MEMREGION_SU_ACCESS_MASK	(0x38UL)
-
-#define SBI_DOMAIN_MEMREGION_SU_ACCESS_SHIFT	(3)
-
 #define SBI_DOMAIN_MEMREGION_MMIO		(1UL << 31)
 	unsigned long flags;
 };

From cbcfc7b10c3a99349f184647c73448b0cb8482df Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:30 +0530
Subject: [PATCH 1332/1765] lib: sbi: Add smepmp in hart extensions

- Add Smepmp as extension in sbi_hart_extensions enum
- Return "smepmp" string for Smepmp extension from sbi_hart_extension_id2string

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h | 2 ++
 lib/sbi/sbi_hart.c     | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index b97f78cd11e..8b0e896894e 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -28,6 +28,8 @@ enum sbi_hart_priv_versions {
 enum sbi_hart_extensions {
 	/** HART has AIA M-mode CSRs */
 	SBI_HART_EXT_SMAIA = 0,
+	/** HART has Smepmp */
+	SBI_HART_EXT_SMEPMP,
 	/** HART has Smstateen CSR **/
 	SBI_HART_EXT_SMSTATEEN,
 	/** Hart has Sscofpmt extension */
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 0c27fd7ba01..4dfa1704210 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -456,6 +456,9 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_ZIHPM:
 		estr = "zihpm";
 		break;
+	case SBI_HART_EXT_SMEPMP:
+		estr = "smepmp";
+		break;
 	default:
 		break;
 	}

From d72f5f17478dfef3df817339a0f02cfdb77a1dc1 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:31 +0530
Subject: [PATCH 1333/1765] lib: utils: Add detection of Smepmp from ISA string
 in FDT

- Add function to parse ISA string in FDT.
- Set Smepmp feature bit in extensions if "smepmp" string is found in ISA string.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h |   3 +
 lib/utils/fdt/fdt_helper.c         | 111 +++++++++++++++++++++++++++++
 platform/generic/platform.c        |   9 +++
 3 files changed, 123 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 39d7f3a01d8..5c928ffd72c 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -56,6 +56,9 @@ int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid);
 
 int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
 
+int fdt_parse_isa_extensions(void *fdt, unsigned int hard_id,
+			     unsigned long *extensions);
+
 int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index a88a4ba83fa..61a41003ae6 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_hart.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/aplic.h>
 #include <sbi_utils/irqchip/imsic.h>
@@ -313,6 +314,116 @@ int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
 	return 0;
 }
 
+static int fdt_get_isa_string(void *fdt, unsigned int hartid,
+			const char **isa_string)
+{
+	int err, cpu_offset, cpus_offset, len;
+	u32 c_hartid;
+	const fdt32_t *val;
+
+	if (!fdt)
+		return SBI_EINVAL;
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &c_hartid);
+		if (err)
+			continue;
+
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
+		if (c_hartid == hartid) {
+			val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len);
+			if (val && len > 0) {
+				*isa_string = (const char *)val;
+				return 0;
+			}
+		}
+	}
+
+	return SBI_EINVAL;
+}
+
+#define RISCV_ISA_EXT_NAME_LEN_MAX	32
+
+int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
+			unsigned long *extensions)
+{
+	size_t i, j, isa_len;
+	char mstr[RISCV_ISA_EXT_NAME_LEN_MAX];
+	const char *isa = NULL;
+
+	if (fdt_get_isa_string(fdt, hartid, &isa))
+		return SBI_EINVAL;
+
+	if (!isa)
+		return SBI_EINVAL;
+
+	i = 0;
+	isa_len = strlen(isa);
+
+	if (isa[i] == 'r' || isa[i] == 'R')
+		i++;
+	else
+		return SBI_EINVAL;
+
+	if (isa[i] == 'v' || isa[i] == 'V')
+		i++;
+	else
+		return SBI_EINVAL;
+
+	if (isa[i] == '3' || isa[i+1] == '2')
+		i += 2;
+	else if (isa[i] == '6' || isa[i+1] == '4')
+		i += 2;
+	else
+		return SBI_EINVAL;
+
+	/* Skip base ISA extensions */
+	for (; i < isa_len; i++) {
+		if (isa[i] == '_')
+			break;
+	}
+
+	while (i < isa_len) {
+		if (isa[i] != '_') {
+			i++;
+			continue;
+		}
+
+		/* Skip the '_' character */
+		i++;
+
+		/* Extract the multi-letter extension name */
+		j = 0;
+		while ((i < isa_len) && (isa[i] != '_') &&
+		       (j < (sizeof(mstr) - 1)))
+			mstr[j++] = isa[i++];
+		mstr[j] = '\0';
+
+		/* Skip empty multi-letter extension name */
+		if (!j)
+			continue;
+
+#define SET_ISA_EXT_MAP(name, bit)				\
+		do {						\
+			if (!strcmp(mstr, name)) {		\
+				__set_bit(bit, extensions);	\
+				continue;			\
+			}					\
+		} while (false)					\
+
+		SET_ISA_EXT_MAP("smepmp", SBI_HART_EXT_SMEPMP);
+#undef SET_ISA_EXT_MAP
+	}
+
+	return 0;
+}
+
 static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
 				      struct platform_uart_data *uart,
 				      unsigned long default_freq,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 86811e6b02c..34b87f74d37 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -211,6 +211,15 @@ static void generic_final_exit(void)
 
 static int generic_extensions_init(struct sbi_hart_features *hfeatures)
 {
+	int rc;
+
+	/* Parse the ISA string from FDT and enable the listed extensions */
+	rc = fdt_parse_isa_extensions(fdt_get_address(), current_hartid(),
+				      &hfeatures->extensions);
+
+	if (rc)
+		return rc;
+
 	if (generic_plat && generic_plat->extensions_init)
 		return generic_plat->extensions_init(generic_plat_match,
 						     hfeatures);

From 4a42a2347c757457f455d9293812a32a7552e4d5 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:32 +0530
Subject: [PATCH 1334/1765] lib: sbi: Grant SU R/W/X permissions to whole
 memory

Since pmp entries have implicit priority on index, previous entries will
deny access to SU on M-mode region. Also, M-mode will not have access to
SU region while previous entries will allow access to M-mode regions.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 38a5902ff47..acd0f74c301 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -772,11 +772,17 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	root.fw_region_inited = true;
 
-	/* Root domain allow everything memory region */
+	/*
+	 * Allow SU RWX on rest of the memory region. Since pmp entries
+	 * have implicit priority on index, previous entries will
+	 * deny access to SU on M-mode region. Also, M-mode will not
+	 * have access to SU region while previous entries will allow
+	 * access to M-mode regions.
+	 */
 	sbi_domain_memregion_init(0, ~0UL,
-				  (SBI_DOMAIN_MEMREGION_READABLE |
-				   SBI_DOMAIN_MEMREGION_WRITEABLE |
-				   SBI_DOMAIN_MEMREGION_EXECUTABLE),
+				  (SBI_DOMAIN_MEMREGION_SU_READABLE |
+				   SBI_DOMAIN_MEMREGION_SU_WRITABLE |
+				   SBI_DOMAIN_MEMREGION_SU_EXECUTABLE),
 				  &root_memregs[root_memregs_count++]);
 
 	/* Root domain memory region end */

From f3fdd041acf5bfb9c261c1e8a909e9b0d78c03e8 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:34 +0530
Subject: [PATCH 1335/1765] lib: sbi: Change the order of PMP initialization

Configure PMP at last when all other initializations have been done.
Because if SMEPMP is detected, M-mode access to the S/U space will be
rescinded.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 26 +++++++++++++++++---------
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 423e6d83650..35e66333501 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -356,13 +356,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
-	rc = sbi_hart_pmp_configure(scratch);
-	if (rc) {
-		sbi_printf("%s: PMP configure failed (error %d)\n",
-			   __func__, rc);
-		sbi_hart_hang();
-	}
-
 	/*
 	 * Note: Platform final initialization should be after finalizing
 	 * domains so that it sees correct domain assignment and PMP
@@ -392,6 +385,17 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_boot_print_hart(scratch, hartid);
 
+	/*
+	 * Configure PMP at last because if SMEPMP is detected,
+	 * M-mode access to the S/U space will be rescinded.
+	 */
+	rc = sbi_hart_pmp_configure(scratch);
+	if (rc) {
+		sbi_printf("%s: PMP configure failed (error %d)\n",
+			   __func__, rc);
+		sbi_hart_hang();
+	}
+
 	wake_coldboot_harts(scratch, hartid);
 
 	count = sbi_scratch_offset_ptr(scratch, init_count_offset);
@@ -445,11 +449,15 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_hart_pmp_configure(scratch);
+	rc = sbi_platform_final_init(plat, false);
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_platform_final_init(plat, false);
+	/*
+	 * Configure PMP at last because if SMEPMP is detected,
+	 * M-mode access to the S/U space will be rescinded.
+	 */
+	rc = sbi_hart_pmp_configure(scratch);
 	if (rc)
 		sbi_hart_hang();
 

From 5dd8db5b10fc03aeded76407aecb731a8a9f1cfa Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:33 +0530
Subject: [PATCH 1336/1765] lib: sbi: Add support for Smepmp

- If Smepmp is enabled, the access flags of an entry are determined based on
  truth table defined in Smepmp.
- First PMP entry (index 0) is reserved.
- Existing boot PMP entries start from index 1.
- Since enabling Smepmp revokes the access privileges of the M-mode software
  on S/U-mode region, first PMP entry is used to map/unmap the shared memory
  between M and S/U-mode. This allows a temporary access window for the M-mode
  software to read/write to S/U-mode memory region.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  15 +++++
 lib/sbi/sbi_hart.c     | 134 +++++++++++++++++++++++++++++++++++------
 2 files changed, 130 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 8b0e896894e..1b78343652d 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -45,6 +45,21 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_MAX,
 };
 
+/*
+ * Smepmp enforces access boundaries between M-mode and
+ * S/U-mode. When it is enabled, the PMPs are programmed
+ * such that M-mode doesn't have access to S/U-mode memory.
+ *
+ * To give M-mode R/W access to the shared memory between M and
+ * S/U-mode, first entry is reserved. It is disabled at boot.
+ * When shared memory access is required, the physical address
+ * should be programmed into the first PMP entry with R/W
+ * permissions to the M-mode. Once the work is done, it should be
+ * unmapped. sbi_hart_map_saddr/sbi_hart_unmap_saddr function
+ * pair should be used to map/unmap the shared memory.
+ */
+#define SBI_SMEPMP_RESV_ENTRY		0
+
 struct sbi_hart_features {
 	bool detected;
 	int priv_version;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 4dfa1704210..12f9c7eadd1 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -284,11 +284,75 @@ unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch)
 	return hfeatures->mhpm_bits;
 }
 
+/*
+ * Returns Smepmp flags for a given domain and region based on permissions.
+ */
+unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
+				       struct sbi_domain *dom,
+				       struct sbi_domain_memregion *reg)
+{
+	unsigned int pmp_flags = 0;
+
+	if (SBI_DOMAIN_MEMREGION_IS_SHARED(reg->flags)) {
+		/* Read only for both M and SU modes */
+		if (SBI_DOMAIN_MEMREGION_IS_SUR_MR(reg->flags))
+			pmp_flags = (PMP_R | PMP_W | PMP_X);
+
+		/* Execute for SU but Read/Execute for M mode */
+		else if (SBI_DOMAIN_MEMREGION_IS_SUX_MRX(reg->flags))
+			/* locked region */
+			pmp_flags = (PMP_L | PMP_W | PMP_X);
+
+		/* Execute only for both M and SU modes */
+		else if (SBI_DOMAIN_MEMREGION_IS_SUX_MX(reg->flags))
+			pmp_flags = (PMP_L | PMP_W);
+
+		/* Read/Write for both M and SU modes */
+		else if (SBI_DOMAIN_MEMREGION_IS_SURW_MRW(reg->flags))
+			pmp_flags = (PMP_W | PMP_X);
+
+		/* Read only for SU mode but Read/Write for M mode */
+		else if (SBI_DOMAIN_MEMREGION_IS_SUR_MRW(reg->flags))
+			pmp_flags = (PMP_W);
+	} else if (SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(reg->flags)) {
+		/*
+		 * When smepmp is supported and used, M region cannot have RWX
+		 * permissions on any region.
+		 */
+		if ((reg->flags & SBI_DOMAIN_MEMREGION_M_ACCESS_MASK)
+		    == SBI_DOMAIN_MEMREGION_M_RWX) {
+			sbi_printf("%s: M-mode only regions cannot have"
+				   "RWX permissions\n", __func__);
+			return 0;
+		}
+
+		/* M-mode only access regions are always locked */
+		pmp_flags |= PMP_L;
+
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_READABLE)
+			pmp_flags |= PMP_R;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_WRITABLE)
+			pmp_flags |= PMP_W;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE)
+			pmp_flags |= PMP_X;
+	} else if (SBI_DOMAIN_MEMREGION_SU_ONLY_ACCESS(reg->flags)) {
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
+			pmp_flags |= PMP_R;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
+			pmp_flags |= PMP_W;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+			pmp_flags |= PMP_X;
+	}
+
+	return pmp_flags;
+}
+
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	struct sbi_domain_memregion *reg;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	unsigned int pmp_idx = 0, pmp_flags, pmp_bits, pmp_gran_log2;
+	unsigned int pmp_idx = 0;
+	unsigned int pmp_flags, pmp_bits, pmp_gran_log2;
 	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
 	unsigned long pmp_addr = 0, pmp_addr_max = 0;
 
@@ -299,36 +363,68 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 	pmp_bits = sbi_hart_pmp_addrbits(scratch) - 1;
 	pmp_addr_max = (1UL << pmp_bits) | ((1UL << pmp_bits) - 1);
 
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
+		/* Reserve first entry for dynamic shared mappings */
+		 pmp_idx = SBI_SMEPMP_RESV_ENTRY + 1;
+
+		/*
+		 * Set the RLB and clear MML so that, we can write to
+		 * entries without enforcement even if some entries
+		 * are locked.
+		 */
+		csr_set(CSR_MSECCFG, MSECCFG_RLB);
+		csr_clear(CSR_MSECCFG, MSECCFG_MML);
+
+		/* Disable the reserved entry */
+		pmp_disable(SBI_SMEPMP_RESV_ENTRY);
+	}
+
 	sbi_domain_for_each_memregion(dom, reg) {
 		if (pmp_count <= pmp_idx)
 			break;
 
 		pmp_flags = 0;
 
-		/*
-		 * If permissions are to be enforced for all modes on this
-		 * region, the lock bit should be set.
-		 */
-		if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS)
-			pmp_flags |= PMP_L;
-
-		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
-			pmp_flags |= PMP_R;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
-			pmp_flags |= PMP_W;
-		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
-			pmp_flags |= PMP_X;
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
+			pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg);
+
+			if (pmp_flags == 0)
+				return 0;
+		} else {
+			/*
+			 * If permissions are to be enforced for all modes on
+			 * this region, the lock bit should be set.
+			 */
+			if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS)
+				pmp_flags |= PMP_L;
+
+			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
+				pmp_flags |= PMP_R;
+			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
+				pmp_flags |= PMP_W;
+			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+				pmp_flags |= PMP_X;
+		}
 
 		pmp_addr =  reg->base >> PMP_SHIFT;
-		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max)
+		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
 			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
-		else {
-			sbi_printf("Can not configure pmp for domain %s", dom->name);
-			sbi_printf(" because memory region address %lx or size %lx is not in range\n",
-				    reg->base, reg->order);
+		} else {
+			sbi_printf("Can not configure pmp for domain %s because"
+				   " memory region address 0x%lx or size 0x%lx "
+				   "is not in range.\n", dom->name, reg->base,
+				   reg->order);
 		}
 	}
 
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
+		/*
+		 * All entries are programmed. Enable MML bit.
+		 * Keep the RLB bit so that dynamic mappings can be done.
+		 */
+		csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML));
+	}
+
 	/*
 	 * As per section 3.7.2 of privileged specification v1.12,
 	 * virtual address translations can be speculatively performed

From 6e44ef686a9b329d837c61d7f121541abfcfed90 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:35 +0530
Subject: [PATCH 1337/1765] lib: sbi: Add functions to map/unmap shared memory

When Smepmp is enabled, M-mode will need to map/unmap the
shared memory before it can read/write to it. This patch
adds functions to create dynamic short-lived mappings.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  2 ++
 lib/sbi/sbi_hart.c     | 42 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 1b78343652d..c150b7e40db 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -90,6 +90,8 @@ unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
 unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
+int sbi_hart_map_saddr(unsigned long base, unsigned long size);
+int sbi_hart_unmap_saddr(void);
 int sbi_hart_priv_version(struct sbi_scratch *scratch);
 void sbi_hart_get_priv_version_str(struct sbi_scratch *scratch,
 				   char *version_str, int nvstr);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 12f9c7eadd1..7b5f38012a6 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -347,6 +347,48 @@ unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
 	return pmp_flags;
 }
 
+int sbi_hart_map_saddr(unsigned long addr, unsigned long size)
+{
+	/* shared R/W access for M and S/U mode */
+	unsigned int pmp_flags = (PMP_W | PMP_X);
+	unsigned long order, base = 0;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	/* If Smepmp is not supported no special mapping is required */
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP))
+		return SBI_OK;
+
+	if (is_pmp_entry_mapped(SBI_SMEPMP_RESV_ENTRY))
+		return SBI_ENOSPC;
+
+	for (order = log2roundup(size) ; order <= __riscv_xlen; order++) {
+		if (order < __riscv_xlen) {
+			base = addr & ~((1UL << order) - 1UL);
+			if ((base <= addr) &&
+			    (addr < (base + (1UL << order))) &&
+			    (base <= (addr + size - 1UL)) &&
+			    ((addr + size - 1UL) < (base + (1UL << order))))
+				break;
+		} else {
+			return SBI_EFAIL;
+		}
+	}
+
+	pmp_set(SBI_SMEPMP_RESV_ENTRY, pmp_flags, base, order);
+
+	return SBI_OK;
+}
+
+int sbi_hart_unmap_saddr(void)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP))
+		return SBI_OK;
+
+	return pmp_disable(SBI_SMEPMP_RESV_ENTRY);
+}
+
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	struct sbi_domain_memregion *reg;

From 0ad866067d7853683d88c10ea9269ae6001bcf6f Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Wed, 12 Jul 2023 10:04:36 +0530
Subject: [PATCH 1338/1765] lib: sbi: Map/Unmap debug console shared memory
 buffers

With Smepmp enabled, it is necessary for shared memory from
S/U mode to be mapped/unmapped before and after read/write
of the memory region. This patch maps the debug console
shared memory before accessing it.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_dbcn.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index 8e687298a39..18cd6c8b5cc 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/riscv_asm.h>
+#include <sbi/sbi_hart.h>
 
 static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 				  const struct sbi_trap_regs *regs,
@@ -46,10 +47,12 @@ static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 					regs->a1, regs->a0, smode,
 					SBI_DOMAIN_READ|SBI_DOMAIN_WRITE))
 			return SBI_ERR_INVALID_PARAM;
+		sbi_hart_map_saddr(regs->a1, regs->a0);
 		if (funcid == SBI_EXT_DBCN_CONSOLE_WRITE)
 			*out_val = sbi_nputs((const char *)regs->a1, regs->a0);
 		else
 			*out_val = sbi_ngets((char *)regs->a1, regs->a0);
+		sbi_hart_unmap_saddr();
 		return 0;
 	case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
 		sbi_putc(regs->a0);

From 0e2111e12c62dda9b52b89619a89ac6839c13b52 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 14 Jul 2023 13:07:36 +0200
Subject: [PATCH 1339/1765] libfdt: fix SPDX license identifiers

License identifiers should be machine readable.

According to the SPDX v2.3.0 specification annex E parentheses are not
used in the SPDX identifier field when specifying multiple licenses [1].

[1] https://spdx.github.io/spdx-spec/v2.3/using-SPDX-short-identifiers-in-source-files/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/libfdt/Makefile.libfdt   | 2 +-
 lib/utils/libfdt/fdt.c             | 2 +-
 lib/utils/libfdt/fdt.h             | 2 +-
 lib/utils/libfdt/fdt_addresses.c   | 2 +-
 lib/utils/libfdt/fdt_check.c       | 2 +-
 lib/utils/libfdt/fdt_empty_tree.c  | 2 +-
 lib/utils/libfdt/fdt_overlay.c     | 2 +-
 lib/utils/libfdt/fdt_ro.c          | 2 +-
 lib/utils/libfdt/fdt_rw.c          | 2 +-
 lib/utils/libfdt/fdt_strerror.c    | 2 +-
 lib/utils/libfdt/fdt_sw.c          | 2 +-
 lib/utils/libfdt/fdt_wip.c         | 2 +-
 lib/utils/libfdt/libfdt.h          | 2 +-
 lib/utils/libfdt/libfdt_env.h      | 2 +-
 lib/utils/libfdt/libfdt_internal.h | 2 +-
 lib/utils/libfdt/version.lds       | 2 +-
 16 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/lib/utils/libfdt/Makefile.libfdt b/lib/utils/libfdt/Makefile.libfdt
index b6d8fc02dd0..f99cd12f9ce 100644
--- a/lib/utils/libfdt/Makefile.libfdt
+++ b/lib/utils/libfdt/Makefile.libfdt
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 # Makefile.libfdt
 #
 # This is not a complete Makefile of itself.  Instead, it is designed to
diff --git a/lib/utils/libfdt/fdt.c b/lib/utils/libfdt/fdt.c
index 9fe7cf4b747..d8f2daadc05 100644
--- a/lib/utils/libfdt/fdt.c
+++ b/lib/utils/libfdt/fdt.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt.h b/lib/utils/libfdt/fdt.h
index f2e68807f27..0d9b09a345a 100644
--- a/lib/utils/libfdt/fdt.h
+++ b/lib/utils/libfdt/fdt.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */
 #ifndef FDT_H
 #define FDT_H
 /*
diff --git a/lib/utils/libfdt/fdt_addresses.c b/lib/utils/libfdt/fdt_addresses.c
index 9a82cd0ba2f..78a1226c181 100644
--- a/lib/utils/libfdt/fdt_addresses.c
+++ b/lib/utils/libfdt/fdt_addresses.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
diff --git a/lib/utils/libfdt/fdt_check.c b/lib/utils/libfdt/fdt_check.c
index fa410a86e28..7283c415ff8 100644
--- a/lib/utils/libfdt/fdt_check.c
+++ b/lib/utils/libfdt/fdt_check.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_empty_tree.c b/lib/utils/libfdt/fdt_empty_tree.c
index 49d54d44b8e..5a0ac631079 100644
--- a/lib/utils/libfdt/fdt_empty_tree.c
+++ b/lib/utils/libfdt/fdt_empty_tree.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2012 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_overlay.c b/lib/utils/libfdt/fdt_overlay.c
index 0871e260ff4..3ba8244b8f9 100644
--- a/lib/utils/libfdt/fdt_overlay.c
+++ b/lib/utils/libfdt/fdt_overlay.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2016 Free Electrons
diff --git a/lib/utils/libfdt/fdt_ro.c b/lib/utils/libfdt/fdt_ro.c
index 17584da2576..fc7303075eb 100644
--- a/lib/utils/libfdt/fdt_ro.c
+++ b/lib/utils/libfdt/fdt_ro.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_rw.c b/lib/utils/libfdt/fdt_rw.c
index 3621d3651d3..b3b8e73c11e 100644
--- a/lib/utils/libfdt/fdt_rw.c
+++ b/lib/utils/libfdt/fdt_rw.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_strerror.c b/lib/utils/libfdt/fdt_strerror.c
index b4356931b06..15b4cfb701b 100644
--- a/lib/utils/libfdt/fdt_strerror.c
+++ b/lib/utils/libfdt/fdt_strerror.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_sw.c b/lib/utils/libfdt/fdt_sw.c
index 4c569ee7eb0..90394f3e90e 100644
--- a/lib/utils/libfdt/fdt_sw.c
+++ b/lib/utils/libfdt/fdt_sw.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/fdt_wip.c b/lib/utils/libfdt/fdt_wip.c
index c2d7566a67d..e90d2ac6bb1 100644
--- a/lib/utils/libfdt/fdt_wip.c
+++ b/lib/utils/libfdt/fdt_wip.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 /*
  * libfdt - Flat Device Tree manipulation
  * Copyright (C) 2006 David Gibson, IBM Corporation.
diff --git a/lib/utils/libfdt/libfdt.h b/lib/utils/libfdt/libfdt.h
index 73467f75c58..be3b7223f3b 100644
--- a/lib/utils/libfdt/libfdt.h
+++ b/lib/utils/libfdt/libfdt.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */
 #ifndef LIBFDT_H
 #define LIBFDT_H
 /*
diff --git a/lib/utils/libfdt/libfdt_env.h b/lib/utils/libfdt/libfdt_env.h
index 6ebbae01b51..d36eba27b6c 100644
--- a/lib/utils/libfdt/libfdt_env.h
+++ b/lib/utils/libfdt/libfdt_env.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */
 #ifndef LIBFDT_ENV_H
 #define LIBFDT_ENV_H
 /*
diff --git a/lib/utils/libfdt/libfdt_internal.h b/lib/utils/libfdt/libfdt_internal.h
index 16bda1906a7..e511be0e08d 100644
--- a/lib/utils/libfdt/libfdt_internal.h
+++ b/lib/utils/libfdt/libfdt_internal.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */
 #ifndef LIBFDT_INTERNAL_H
 #define LIBFDT_INTERNAL_H
 /*
diff --git a/lib/utils/libfdt/version.lds b/lib/utils/libfdt/version.lds
index 7ab85f1d9d8..9c00004e44d 100644
--- a/lib/utils/libfdt/version.lds
+++ b/lib/utils/libfdt/version.lds
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */
 LIBFDT_1.2 {
 	global:
 		fdt_next_node;

From e05a9cfefcf33e9fffb04f091ed371df525f594c Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Thu, 20 Jul 2023 17:48:37 +0200
Subject: [PATCH 1340/1765] lib: sbi: Update system suspend to spec

commit 68e66106120f ("SUSP: Add SBI_ERR_DENIED") of the SBI spec adds
a new error code, SBI_ERR_DENIED, which is returned when entry criteria
has not be meant. Update the system suspend implementation to return
this error when it has detected that not all harts are in the STOPPED
state.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_system.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index d803ffa8418..2e917c9e913 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -174,7 +174,7 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 		if (i == hartid)
 			continue;
 		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED)
-			return SBI_EFAIL;
+			return SBI_ERR_DENIED;
 	}
 
 	if (!sbi_domain_check_addr(dom, resume_addr, prev_mode,

From 5e20d25f19472e98e53f24fe9183ded6de04bce9 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 14 Jul 2023 18:08:34 +0800
Subject: [PATCH 1341/1765] include: sbi: fix CSR define of mseccfg

Because the CSR names in the spec are mseccfg and mseccfgh. Remove
CSR_MSECCFG_LOWER and CSR_MSECCFG_UPPER and directly define
CSR_MSECCFG and CSR_MSECCFGH.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 50071ad3e12..776a0835792 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -664,9 +664,8 @@
 #define CSR_MHPMEVENT31H		0x73f
 
 /* Machine Security Configuration CSR (mseccfg) */
-#define CSR_MSECCFG_LOWER		0x747
-#define CSR_MSECCFG_UPPER		0x757
-#define CSR_MSECCFG			(CSR_MSECCFG_LOWER)
+#define CSR_MSECCFG			0x747
+#define CSR_MSECCFGH			0x757
 
 #define MSECCFG_MML_SHIFT		(0)
 #define MSECCFG_MML			(_UL(1) << MSECCFG_MML_SHIFT)

From 44c5151293849736118090bf5230d6b298a9d0b0 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 13:39:43 +0530
Subject: [PATCH 1342/1765] include: sbi_utils: Remove driver pointer from
 struct i2c_adapter

The "driver" pointer in struct i2c_adapter is not used anywhere
so let us remove it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/i2c/i2c.h    | 3 ---
 lib/utils/i2c/fdt_i2c_dw.c     | 3 ---
 lib/utils/i2c/fdt_i2c_sifive.c | 3 ---
 3 files changed, 9 deletions(-)

diff --git a/include/sbi_utils/i2c/i2c.h b/include/sbi_utils/i2c/i2c.h
index 5a70364144b..93a44f4e49a 100644
--- a/include/sbi_utils/i2c/i2c.h
+++ b/include/sbi_utils/i2c/i2c.h
@@ -15,9 +15,6 @@
 
 /** Representation of a I2C adapter */
 struct i2c_adapter {
-	/** Pointer to I2C driver owning this I2C adapter */
-	void *driver;
-
 	/** Unique ID of the I2C adapter assigned by the driver */
 	int id;
 
diff --git a/lib/utils/i2c/fdt_i2c_dw.c b/lib/utils/i2c/fdt_i2c_dw.c
index 99b2ddb8411..358ad3c7743 100644
--- a/lib/utils/i2c/fdt_i2c_dw.c
+++ b/lib/utils/i2c/fdt_i2c_dw.c
@@ -15,8 +15,6 @@
 #include <sbi_utils/i2c/dw_i2c.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
-extern struct fdt_i2c_adapter fdt_i2c_adapter_dw;
-
 static int fdt_dw_i2c_init(void *fdt, int nodeoff,
 			     const struct fdt_match *match)
 {
@@ -35,7 +33,6 @@ static int fdt_dw_i2c_init(void *fdt, int nodeoff,
 	}
 
 	adapter->addr = addr;
-	adapter->adapter.driver = &fdt_i2c_adapter_dw;
 
 	rc = dw_i2c_init(&adapter->adapter, nodeoff);
 	if (rc) {
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
index b85b245c75f..11740624b40 100644
--- a/lib/utils/i2c/fdt_i2c_sifive.c
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -46,8 +46,6 @@ struct sifive_i2c_adapter {
 	struct i2c_adapter adapter;
 };
 
-extern struct fdt_i2c_adapter fdt_i2c_adapter_sifive;
-
 static inline void sifive_i2c_setreg(struct sifive_i2c_adapter *adap,
 				     uint8_t reg, uint8_t value)
 {
@@ -250,7 +248,6 @@ static int sifive_i2c_init(void *fdt, int nodeoff,
 	}
 
 	adapter->addr = addr;
-	adapter->adapter.driver = &fdt_i2c_adapter_sifive;
 	adapter->adapter.id = nodeoff;
 	adapter->adapter.write = sifive_i2c_adapter_write;
 	adapter->adapter.read = sifive_i2c_adapter_read;

From 14a35b0e0e8ceaeb664c5078d6a1fec9e7193c72 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 13:39:50 +0530
Subject: [PATCH 1343/1765] lib: utils/regmap: Add generic regmap access
 library

We add generic regmap access library which is independent of
hardware description format (FDT or ACPI). The OpenSBI platform
support or regmap drivers can register regmap instances which
can be discovered by different regmap clients based on the
unique ID of regmap instances.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/regmap/regmap.h  |  67 +++++++++++++++++
 lib/utils/Kconfig                  |   2 +
 lib/utils/regmap/Kconfig           |   9 +++
 lib/utils/regmap/objects.mk        |  10 +++
 lib/utils/regmap/regmap.c          | 114 +++++++++++++++++++++++++++++
 platform/generic/configs/defconfig |   3 +-
 6 files changed, 204 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi_utils/regmap/regmap.h
 create mode 100644 lib/utils/regmap/Kconfig
 create mode 100644 lib/utils/regmap/objects.mk
 create mode 100644 lib/utils/regmap/regmap.c

diff --git a/include/sbi_utils/regmap/regmap.h b/include/sbi_utils/regmap/regmap.h
new file mode 100644
index 00000000000..58084fda5ce
--- /dev/null
+++ b/include/sbi_utils/regmap/regmap.h
@@ -0,0 +1,67 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __REGMAP_H__
+#define __REGMAP_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
+
+/** Representation of a regmap instance */
+struct regmap {
+	/** Uniquie ID of the regmap instance assigned by the driver */
+	unsigned int id;
+
+	/** Configuration of regmap registers */
+	int reg_shift;
+	int reg_stride;
+	unsigned int reg_base;
+	unsigned int reg_max;
+
+	/** Read a regmap register */
+	int (*reg_read)(struct regmap *rmap, unsigned int reg,
+			unsigned int *val);
+
+	/** Write a regmap register */
+	int (*reg_write)(struct regmap *rmap, unsigned int reg,
+			 unsigned int val);
+
+	/** Read-modify-write a regmap register */
+	int (*reg_update_bits)(struct regmap *rmap, unsigned int reg,
+			       unsigned int mask, unsigned int val);
+
+	/** List */
+	struct sbi_dlist node;
+};
+
+static inline struct regmap *to_regmap(struct sbi_dlist *node)
+{
+	return container_of(node, struct regmap, node);
+}
+
+/** Find a registered regmap instance */
+struct regmap *regmap_find(unsigned int id);
+
+/** Register a regmap instance */
+int regmap_add(struct regmap *rmap);
+
+/** Un-register a regmap instance */
+void regmap_remove(struct regmap *rmap);
+
+/** Read a register in a regmap instance */
+int regmap_read(struct regmap *rmap, unsigned int reg, unsigned int *val);
+
+/** Write a register in a regmap instance */
+int regmap_write(struct regmap *rmap, unsigned int reg, unsigned int val);
+
+/** Read-modify-write a register in a regmap instance */
+int regmap_update_bits(struct regmap *rmap, unsigned int reg,
+		       unsigned int mask, unsigned int val);
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 5a71e7509ca..de8b4eb919f 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -14,6 +14,8 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/irqchip/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/libfdt/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/regmap/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
diff --git a/lib/utils/regmap/Kconfig b/lib/utils/regmap/Kconfig
new file mode 100644
index 00000000000..8db5c8b8a21
--- /dev/null
+++ b/lib/utils/regmap/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "Regmap Support"
+
+config REGMAP
+	bool "Regmap support"
+	default n
+
+endmenu
diff --git a/lib/utils/regmap/objects.mk b/lib/utils/regmap/objects.mk
new file mode 100644
index 00000000000..5d1bead0e16
--- /dev/null
+++ b/lib/utils/regmap/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2023 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_REGMAP) += regmap/regmap.o
diff --git a/lib/utils/regmap/regmap.c b/lib/utils/regmap/regmap.c
new file mode 100644
index 00000000000..a2180c88dc0
--- /dev/null
+++ b/lib/utils/regmap/regmap.c
@@ -0,0 +1,114 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/regmap/regmap.h>
+
+static SBI_LIST_HEAD(regmap_list);
+
+struct regmap *regmap_find(unsigned int id)
+{
+	struct sbi_dlist *pos;
+
+	sbi_list_for_each(pos, &(regmap_list)) {
+		struct regmap *rmap = to_regmap(pos);
+
+		if (rmap->id == id)
+			return rmap;
+	}
+
+	return NULL;
+}
+
+int regmap_add(struct regmap *rmap)
+{
+	if (!rmap)
+		return SBI_EINVAL;
+	if (regmap_find(rmap->id))
+		return SBI_EALREADY;
+
+	sbi_list_add(&(rmap->node), &(regmap_list));
+
+	return 0;
+}
+
+void regmap_remove(struct regmap *rmap)
+{
+	if (!rmap)
+		return;
+
+	sbi_list_del(&(rmap->node));
+}
+
+static bool regmap_reg_valid(struct regmap *rmap, unsigned int reg)
+{
+	if ((reg >= rmap->reg_max) ||
+	    (reg & (rmap->reg_stride - 1)))
+		return false;
+	return true;
+}
+
+static unsigned int regmap_reg_addr(struct regmap *rmap, unsigned int reg)
+{
+	reg += rmap->reg_base;
+
+	if (rmap->reg_shift > 0)
+		reg >>= rmap->reg_shift;
+	else if (rmap->reg_shift < 0)
+		reg <<= -(rmap->reg_shift);
+
+	return reg;
+}
+
+int regmap_read(struct regmap *rmap, unsigned int reg, unsigned int *val)
+{
+	if (!rmap || !regmap_reg_valid(rmap, reg))
+		return SBI_EINVAL;
+	if (!rmap->reg_read)
+		return SBI_ENOSYS;
+
+	return rmap->reg_read(rmap, regmap_reg_addr(rmap, reg), val);
+}
+
+int regmap_write(struct regmap *rmap, unsigned int reg, unsigned int val)
+{
+	if (!rmap || !regmap_reg_valid(rmap, reg))
+		return SBI_EINVAL;
+	if (!rmap->reg_write)
+		return SBI_ENOSYS;
+
+	return rmap->reg_write(rmap, regmap_reg_addr(rmap, reg), val);
+}
+
+int regmap_update_bits(struct regmap *rmap, unsigned int reg,
+		       unsigned int mask, unsigned int val)
+{
+	int rc;
+	unsigned int reg_val;
+
+	if (!rmap || !regmap_reg_valid(rmap, reg))
+		return SBI_EINVAL;
+
+	if (rmap->reg_update_bits) {
+		return rmap->reg_update_bits(rmap, regmap_reg_addr(rmap, reg),
+					     mask, val);
+	} else if (rmap->reg_read && rmap->reg_write) {
+		reg = regmap_reg_addr(rmap, reg);
+
+		rc = rmap->reg_read(rmap, reg, &reg_val);
+		if (rc)
+			return rc;
+
+		reg_val &= ~mask;
+		reg_val |= val & mask;
+		return rmap->reg_write(rmap, reg, reg_val);
+	}
+
+	return SBI_ENOSYS;
+}
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 671281bb6cb..d8793ea5ce1 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -18,6 +18,7 @@ CONFIG_FDT_IRQCHIP=y
 CONFIG_FDT_IRQCHIP_APLIC=y
 CONFIG_FDT_IRQCHIP_IMSIC=y
 CONFIG_FDT_IRQCHIP_PLIC=y
+CONFIG_REGMAP=y
 CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y
@@ -35,7 +36,7 @@ CONFIG_FDT_SERIAL_SIFIVE=y
 CONFIG_FDT_SERIAL_LITEX=y
 CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
+CONFIG_SERIAL_SEMIHOSTING=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
 CONFIG_FDT_TIMER_PLMT=y
-CONFIG_SERIAL_SEMIHOSTING=y

From 8e97275d97bbfb9b990a5e7beafe99bea0e3f538 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 13:39:57 +0530
Subject: [PATCH 1344/1765] lib: utils/regmap: Add simple FDT based regmap
 framework

We add a simple FDT based regmap framework which is built on top of
generic regmap library. The phandle of FDT regmap DT node is treated
as unique regmap ID. The FDT based regmap drivers will be probed
on-demand from fdt_regmap_get_by_phandle() and fdt_regmap_get()
called by the regmap client drivers.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 include/sbi_utils/regmap/fdt_regmap.h      | 31 +++++++
 lib/utils/regmap/Kconfig                   |  6 ++
 lib/utils/regmap/fdt_regmap.c              | 94 ++++++++++++++++++++++
 lib/utils/regmap/fdt_regmap_drivers.carray |  3 +
 lib/utils/regmap/objects.mk                |  3 +
 platform/generic/configs/defconfig         |  2 +-
 6 files changed, 138 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi_utils/regmap/fdt_regmap.h
 create mode 100644 lib/utils/regmap/fdt_regmap.c
 create mode 100644 lib/utils/regmap/fdt_regmap_drivers.carray

diff --git a/include/sbi_utils/regmap/fdt_regmap.h b/include/sbi_utils/regmap/fdt_regmap.h
new file mode 100644
index 00000000000..0672162c02f
--- /dev/null
+++ b/include/sbi_utils/regmap/fdt_regmap.h
@@ -0,0 +1,31 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_REGMAP_H__
+#define __FDT_REGMAP_H__
+
+#include <sbi_utils/regmap/regmap.h>
+
+struct fdt_phandle_args;
+
+/** FDT based regmap driver */
+struct fdt_regmap {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, u32 phandle,
+		    const struct fdt_match *match);
+};
+
+/** Get regmap instance based on phandle */
+int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
+			      struct regmap **out_rmap);
+
+/** Get regmap instance based on "regmap' property of the specified DT node */
+int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap);
+
+#endif
diff --git a/lib/utils/regmap/Kconfig b/lib/utils/regmap/Kconfig
index 8db5c8b8a21..b1ff501b2cb 100644
--- a/lib/utils/regmap/Kconfig
+++ b/lib/utils/regmap/Kconfig
@@ -2,6 +2,12 @@
 
 menu "Regmap Support"
 
+config FDT_REGMAP
+	bool "FDT based regmap drivers"
+	depends on FDT
+	select REGMAP
+	default n
+
 config REGMAP
 	bool "Regmap support"
 	default n
diff --git a/lib/utils/regmap/fdt_regmap.c b/lib/utils/regmap/fdt_regmap.c
new file mode 100644
index 00000000000..fffac1de7e6
--- /dev/null
+++ b/lib/utils/regmap/fdt_regmap.c
@@ -0,0 +1,94 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/regmap/fdt_regmap.h>
+
+/* List of FDT regmap drivers generated at compile time */
+extern struct fdt_regmap *fdt_regmap_drivers[];
+extern unsigned long fdt_regmap_drivers_size;
+
+static int fdt_regmap_init(void *fdt, int nodeoff, u32 phandle)
+{
+	int pos, rc;
+	struct fdt_regmap *drv;
+	const struct fdt_match *match;
+
+	/* Try all I2C drivers one-by-one */
+	for (pos = 0; pos < fdt_regmap_drivers_size; pos++) {
+		drv = fdt_regmap_drivers[pos];
+		match = fdt_match_node(fdt, nodeoff, drv->match_table);
+		if (match && drv->init) {
+			rc = drv->init(fdt, nodeoff, phandle, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			if (rc)
+				return rc;
+			return 0;
+		}
+	}
+
+	return SBI_ENOSYS;
+}
+
+static int fdt_regmap_find(void *fdt, int nodeoff, u32 phandle,
+			   struct regmap **out_rmap)
+{
+	int rc;
+	struct regmap *rmap = regmap_find(phandle);
+
+	if (!rmap) {
+		/* Regmap not found so initialize matching driver */
+		rc = fdt_regmap_init(fdt, nodeoff, phandle);
+		if (rc)
+			return rc;
+
+		/* Try to find regmap again */
+		rmap = regmap_find(phandle);
+		if (!rmap)
+			return SBI_ENOSYS;
+	}
+
+	if (out_rmap)
+		*out_rmap = rmap;
+
+	return 0;
+}
+
+int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
+			      struct regmap **out_rmap)
+{
+	int pnodeoff;
+
+	if (!fdt || !out_rmap)
+		return SBI_EINVAL;
+
+	pnodeoff = fdt_node_offset_by_phandle(fdt, phandle);
+	if (pnodeoff < 0)
+		return pnodeoff;
+
+	return fdt_regmap_find(fdt, pnodeoff, phandle, out_rmap);
+}
+
+int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap)
+{
+	int len;
+	const fdt32_t *val;
+
+	if (!fdt || (nodeoff < 0) || !out_rmap)
+		return SBI_EINVAL;
+
+	val = fdt_getprop(fdt, nodeoff, "regmap", &len);
+	if (!val)
+		return SBI_ENOENT;
+
+	return fdt_regmap_get_by_phandle(fdt, fdt32_to_cpu(*val), out_rmap);
+}
diff --git a/lib/utils/regmap/fdt_regmap_drivers.carray b/lib/utils/regmap/fdt_regmap_drivers.carray
new file mode 100644
index 00000000000..c2f1c9d0856
--- /dev/null
+++ b/lib/utils/regmap/fdt_regmap_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/regmap/fdt_regmap.h
+TYPE: struct fdt_regmap
+NAME: fdt_regmap_drivers
diff --git a/lib/utils/regmap/objects.mk b/lib/utils/regmap/objects.mk
index 5d1bead0e16..5ce2373ef70 100644
--- a/lib/utils/regmap/objects.mk
+++ b/lib/utils/regmap/objects.mk
@@ -7,4 +7,7 @@
 #   Anup Patel <apatel@ventanamicro.com>
 #
 
+libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap.o
+libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap_drivers.o
+
 libsbiutils-objs-$(CONFIG_REGMAP) += regmap/regmap.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index d8793ea5ce1..ad585e34157 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -18,7 +18,7 @@ CONFIG_FDT_IRQCHIP=y
 CONFIG_FDT_IRQCHIP_APLIC=y
 CONFIG_FDT_IRQCHIP_IMSIC=y
 CONFIG_FDT_IRQCHIP_PLIC=y
-CONFIG_REGMAP=y
+CONFIG_FDT_REGMAP=y
 CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y

From f21d8f7d59114fdf73a56603ff082ce23797d9e5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 13:40:03 +0530
Subject: [PATCH 1345/1765] lib: utils/regmap: Add simple FDT based syscon
 regmap driver

Let us add a simple FDT based system regmap driver which follows the
device tree bindings already defined in the Linux kernel.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/regmap/Kconfig             |   7 +
 lib/utils/regmap/fdt_regmap_syscon.c | 262 +++++++++++++++++++++++++++
 lib/utils/regmap/objects.mk          |   3 +
 platform/generic/configs/defconfig   |   1 +
 4 files changed, 273 insertions(+)
 create mode 100644 lib/utils/regmap/fdt_regmap_syscon.c

diff --git a/lib/utils/regmap/Kconfig b/lib/utils/regmap/Kconfig
index b1ff501b2cb..62d9f9325f5 100644
--- a/lib/utils/regmap/Kconfig
+++ b/lib/utils/regmap/Kconfig
@@ -8,6 +8,13 @@ config FDT_REGMAP
 	select REGMAP
 	default n
 
+if FDT_REGMAP
+
+config FDT_REGMAP_SYSCON
+	bool "Syscon regmap FDT driver"
+	default n
+endif
+
 config REGMAP
 	bool "Regmap support"
 	default n
diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c
new file mode 100644
index 00000000000..29263ddd355
--- /dev/null
+++ b/lib/utils/regmap/fdt_regmap_syscon.c
@@ -0,0 +1,262 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_byteorder.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/regmap/fdt_regmap.h>
+
+enum syscon_regmap_endian {
+	SYSCON_ENDIAN_NATIVE = 0,
+	SYSCON_ENDIAN_LITTLE,
+	SYSCON_ENDIAN_BIG,
+	SYSCON_ENDIAN_MAX
+};
+
+struct syscon_regmap {
+	u32 reg_io_width;
+	enum syscon_regmap_endian reg_endian;
+	unsigned long addr;
+	struct regmap rmap;
+};
+
+#define to_syscon_regmap(__rmap)	\
+	container_of((__rmap), struct syscon_regmap, rmap)
+
+static int regmap_syscon_read_8(struct regmap *rmap, unsigned int reg,
+				unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = readb((volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_write_8(struct regmap *rmap, unsigned int reg,
+				 unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writeb(val, (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_16(struct regmap *rmap, unsigned int reg,
+				unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = readw((volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_write_16(struct regmap *rmap, unsigned int reg,
+				 unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writew(val, (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_32(struct regmap *rmap, unsigned int reg,
+				unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = readl((volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_write_32(struct regmap *rmap, unsigned int reg,
+				 unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writel(val, (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_le16(struct regmap *rmap, unsigned int reg,
+				   unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = le16_to_cpu(readw((volatile void *)(srm->addr + reg)));
+	return 0;
+}
+
+static int regmap_syscon_write_le16(struct regmap *rmap, unsigned int reg,
+				    unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writew(cpu_to_le16(val), (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_le32(struct regmap *rmap, unsigned int reg,
+				   unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = le32_to_cpu(readl((volatile void *)(srm->addr + reg)));
+	return 0;
+}
+
+static int regmap_syscon_write_le32(struct regmap *rmap, unsigned int reg,
+				    unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writel(cpu_to_le32(val), (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_be16(struct regmap *rmap, unsigned int reg,
+				   unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = be16_to_cpu(readl((volatile void *)(srm->addr + reg)));
+	return 0;
+}
+
+static int regmap_syscon_write_be16(struct regmap *rmap, unsigned int reg,
+				    unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writel(cpu_to_be16(val), (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_read_be32(struct regmap *rmap, unsigned int reg,
+				   unsigned int *val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	*val = be32_to_cpu(readl((volatile void *)(srm->addr + reg)));
+	return 0;
+}
+
+static int regmap_syscon_write_be32(struct regmap *rmap, unsigned int reg,
+				    unsigned int val)
+{
+	struct syscon_regmap *srm = to_syscon_regmap(rmap);
+
+	writel(cpu_to_be32(val), (volatile void *)(srm->addr + reg));
+	return 0;
+}
+
+static int regmap_syscon_init(void *fdt, int nodeoff, u32 phandle,
+			      const struct fdt_match *match)
+{
+	struct syscon_regmap *srm;
+	uint64_t addr, size;
+	const fdt32_t *val;
+	int rc, len;
+
+	srm = sbi_zalloc(sizeof(*srm));
+	if (!srm)
+		return SBI_ENOMEM;
+
+	val = fdt_getprop(fdt, nodeoff, "reg-io-width", &len);
+	srm->reg_io_width = val ? fdt32_to_cpu(*val) : 4;
+
+	if (fdt_getprop(fdt, nodeoff, "native-endian", &len))
+		srm->reg_endian = SYSCON_ENDIAN_NATIVE;
+	else if (fdt_getprop(fdt, nodeoff, "little-endian", &len))
+		srm->reg_endian = SYSCON_ENDIAN_LITTLE;
+	else if (fdt_getprop(fdt, nodeoff, "big-endian", &len))
+		srm->reg_endian = SYSCON_ENDIAN_BIG;
+	else
+		srm->reg_endian = SYSCON_ENDIAN_NATIVE;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, &size);
+	if (rc)
+		goto fail_free_syscon;
+	srm->addr = addr;
+
+	srm->rmap.id = phandle;
+	srm->rmap.reg_shift = 0;
+	srm->rmap.reg_stride = srm->reg_io_width * 8;
+	srm->rmap.reg_base = 0;
+	srm->rmap.reg_max = size / srm->reg_io_width;
+	switch (srm->reg_io_width) {
+	case 1:
+		srm->rmap.reg_read = regmap_syscon_read_8;
+		srm->rmap.reg_write = regmap_syscon_write_8;
+		break;
+	case 2:
+		switch (srm->reg_endian) {
+		case SYSCON_ENDIAN_NATIVE:
+			srm->rmap.reg_read = regmap_syscon_read_16;
+			srm->rmap.reg_write = regmap_syscon_write_16;
+			break;
+		case SYSCON_ENDIAN_LITTLE:
+			srm->rmap.reg_read = regmap_syscon_read_le16;
+			srm->rmap.reg_write = regmap_syscon_write_le16;
+			break;
+		case SYSCON_ENDIAN_BIG:
+			srm->rmap.reg_read = regmap_syscon_read_be16;
+			srm->rmap.reg_write = regmap_syscon_write_be16;
+			break;
+		default:
+			rc = SBI_EINVAL;
+			goto fail_free_syscon;
+		}
+		break;
+	case 4:
+		switch (srm->reg_endian) {
+		case SYSCON_ENDIAN_NATIVE:
+			srm->rmap.reg_read = regmap_syscon_read_32;
+			srm->rmap.reg_write = regmap_syscon_write_32;
+			break;
+		case SYSCON_ENDIAN_LITTLE:
+			srm->rmap.reg_read = regmap_syscon_read_le32;
+			srm->rmap.reg_write = regmap_syscon_write_le32;
+			break;
+		case SYSCON_ENDIAN_BIG:
+			srm->rmap.reg_read = regmap_syscon_read_be32;
+			srm->rmap.reg_write = regmap_syscon_write_be32;
+			break;
+		default:
+			rc = SBI_EINVAL;
+			goto fail_free_syscon;
+		}
+		break;
+	default:
+		rc = SBI_EINVAL;
+		goto fail_free_syscon;
+	}
+
+	rc = regmap_add(&srm->rmap);
+	if (rc)
+		goto fail_free_syscon;
+
+	return 0;
+
+fail_free_syscon:
+	sbi_free(srm);
+	return rc;
+}
+
+static const struct fdt_match regmap_syscon_match[] = {
+	{ .compatible = "syscon" },
+	{ },
+};
+
+struct fdt_regmap fdt_regmap_syscon = {
+	.match_table = regmap_syscon_match,
+	.init = regmap_syscon_init,
+};
diff --git a/lib/utils/regmap/objects.mk b/lib/utils/regmap/objects.mk
index 5ce2373ef70..5bd139f5d55 100644
--- a/lib/utils/regmap/objects.mk
+++ b/lib/utils/regmap/objects.mk
@@ -10,4 +10,7 @@
 libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap.o
 libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap_drivers.o
 
+carray-fdt_regmap_drivers-$(CONFIG_FDT_REGMAP_SYSCON) += fdt_regmap_syscon
+libsbiutils-objs-$(CONFIG_FDT_REGMAP_SYSCON) += regmap/fdt_regmap_syscon.o
+
 libsbiutils-objs-$(CONFIG_REGMAP) += regmap/regmap.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index ad585e34157..b76729077df 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -19,6 +19,7 @@ CONFIG_FDT_IRQCHIP_APLIC=y
 CONFIG_FDT_IRQCHIP_IMSIC=y
 CONFIG_FDT_IRQCHIP_PLIC=y
 CONFIG_FDT_REGMAP=y
+CONFIG_FDT_REGMAP_SYSCON=y
 CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y

From 4a344a9b4cc89f64ab5326f428696e15bc2fcdba Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 18:11:52 +0530
Subject: [PATCH 1346/1765] lib: utils/reset: Add syscon based reboot and
 poweroff

Let us have common FDT based reset driver for syscon reboot and
poweroff. The device tree bindings for syscon reboot and poweroff
are already available in the Linux kernel sources.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/utils/reset/Kconfig            |   5 +
 lib/utils/reset/fdt_reset_syscon.c | 167 +++++++++++++++++++++++++++++
 lib/utils/reset/objects.mk         |   4 +
 platform/generic/configs/defconfig |   1 +
 4 files changed, 177 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_syscon.c

diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 4748cc8504a..c0b964066ee 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -33,6 +33,11 @@ config FDT_RESET_SUNXI_WDT
 	bool "Sunxi WDT FDT reset driver"
 	default n
 
+config FDT_RESET_SYSCON
+	bool "Syscon FDT reset driver"
+	depends on FDT_REGMAP
+	default n
+
 config FDT_RESET_THEAD
 	bool "T-HEAD FDT reset driver"
 	default n
diff --git a/lib/utils/reset/fdt_reset_syscon.c b/lib/utils/reset/fdt_reset_syscon.c
new file mode 100644
index 00000000000..bae9ec58f29
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_syscon.c
@@ -0,0 +1,167 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_system.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/regmap/fdt_regmap.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+struct syscon_reset {
+	struct regmap *rmap;
+	u32 priority;
+	u32 offset;
+	u32 value;
+	u32 mask;
+};
+
+static struct syscon_reset poweroff;
+static struct syscon_reset reboot;
+
+static struct syscon_reset *syscon_reset_get(bool is_reboot, u32 type)
+{
+	struct syscon_reset *reset = NULL;
+
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		if (!is_reboot)
+			reset = &poweroff;
+		break;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		if (is_reboot)
+			reset = &reboot;
+		break;
+	}
+
+	if (reset && !reset->rmap)
+		reset = NULL;
+
+	return reset;
+}
+
+static void syscon_reset_exec(struct syscon_reset *reset)
+{
+	/* Issue the reset through regmap */
+	if (reset)
+		regmap_update_bits(reset->rmap, reset->offset,
+				   reset->mask, reset->value);
+
+	/* hang !!! */
+	sbi_hart_hang();
+}
+
+static int syscon_poweroff_check(u32 type, u32 reason)
+{
+	struct syscon_reset *reset = syscon_reset_get(false, type);
+
+	return (reset) ? reset->priority : 0;
+}
+
+static void syscon_do_poweroff(u32 type, u32 reason)
+{
+	syscon_reset_exec(syscon_reset_get(false, type));
+}
+
+static struct sbi_system_reset_device syscon_poweroff = {
+	.name = "syscon-poweroff",
+	.system_reset_check = syscon_poweroff_check,
+	.system_reset = syscon_do_poweroff
+};
+
+static int syscon_reboot_check(u32 type, u32 reason)
+{
+	struct syscon_reset *reset = syscon_reset_get(true, type);
+
+	return (reset) ? reset->priority : 0;
+}
+
+static void syscon_do_reboot(u32 type, u32 reason)
+{
+	syscon_reset_exec(syscon_reset_get(true, type));
+}
+
+static struct sbi_system_reset_device syscon_reboot = {
+	.name = "syscon-reboot",
+	.system_reset_check = syscon_reboot_check,
+	.system_reset = syscon_do_reboot
+};
+
+static int syscon_reset_init(void *fdt, int nodeoff,
+			   const struct fdt_match *match)
+{
+	int rc, len;
+	const fdt32_t *val, *mask;
+	bool is_reboot = (ulong)match->data;
+	struct syscon_reset *reset = (is_reboot) ? &reboot : &poweroff;
+
+	if (reset->rmap)
+		return SBI_EALREADY;
+
+	rc = fdt_regmap_get(fdt, nodeoff, &reset->rmap);
+	if (rc)
+		return rc;
+
+	val = fdt_getprop(fdt, nodeoff, "priority", &len);
+	reset->priority = (val && len > 0) ? fdt32_to_cpu(*val) : 192;
+
+	val = fdt_getprop(fdt, nodeoff, "offset", &len);
+	if (val && len > 0)
+		reset->offset = fdt32_to_cpu(*val);
+	else
+		return SBI_EINVAL;
+
+	val = fdt_getprop(fdt, nodeoff, "value", &len);
+	mask = fdt_getprop(fdt, nodeoff, "mask", &len);
+	if (!val && !mask)
+		return SBI_EINVAL;
+
+	if (!val) {
+		/* support old binding */
+		reset->value = fdt32_to_cpu(*mask);
+		reset->mask = 0xFFFFFFFF;
+	} else if (!mask) {
+		/* support value without mask */
+		reset->value = fdt32_to_cpu(*val);
+		reset->mask = 0xFFFFFFFF;
+	} else {
+		reset->value = fdt32_to_cpu(*val);
+		reset->mask = fdt32_to_cpu(*mask);
+	}
+
+	if (is_reboot)
+		sbi_system_reset_add_device(&syscon_reboot);
+	else
+		sbi_system_reset_add_device(&syscon_poweroff);
+
+	return 0;
+}
+
+static const struct fdt_match syscon_poweroff_match[] = {
+	{ .compatible = "syscon-poweroff", .data = (const void *)false },
+	{ },
+};
+
+struct fdt_reset fdt_syscon_poweroff = {
+	.match_table = syscon_poweroff_match,
+	.init = syscon_reset_init,
+};
+
+static const struct fdt_match syscon_reboot_match[] = {
+	{ .compatible = "syscon-reboot", .data = (const void *)true },
+	{ },
+};
+
+struct fdt_reset fdt_syscon_reboot = {
+	.match_table = syscon_reboot_match,
+	.init = syscon_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index c9f851cd193..17287a5e2be 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -26,6 +26,10 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_SIFIVE_TEST) += reset/fdt_reset_sifive_test.
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SUNXI_WDT) += fdt_reset_sunxi_wdt
 libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_poweroff
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_reboot
+libsbiutils-objs-$(CONFIG_FDT_RESET_SYSCON) += reset/fdt_reset_syscon.o
+
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_THEAD) += fdt_reset_thead
 libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead.o
 libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead_asm.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index b76729077df..5008c7e6cea 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -26,6 +26,7 @@ CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
 CONFIG_FDT_RESET_SIFIVE_TEST=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
+CONFIG_FDT_RESET_SYSCON=y
 CONFIG_FDT_RESET_THEAD=y
 CONFIG_FDT_SERIAL=y
 CONFIG_FDT_SERIAL_CADENCE=y

From c2e602707dc0f915e96b8726d63d569cbb6724b4 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 21 Jul 2023 18:20:27 +0530
Subject: [PATCH 1347/1765] lib: utils/reset: Remove SiFive Test reset driver

The functionality of SiFive Test reset driver is easily available
through Syscon reset driver so let us remove the SiFive Test driver.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/sys/sifive_test.h     | 17 -------
 lib/utils/reset/Kconfig                 |  5 --
 lib/utils/reset/fdt_reset_sifive_test.c | 36 --------------
 lib/utils/reset/objects.mk              |  3 --
 lib/utils/sys/Kconfig                   |  4 --
 lib/utils/sys/objects.mk                |  1 -
 lib/utils/sys/sifive_test.c             | 65 -------------------------
 platform/generic/configs/defconfig      |  1 -
 8 files changed, 132 deletions(-)
 delete mode 100644 include/sbi_utils/sys/sifive_test.h
 delete mode 100644 lib/utils/reset/fdt_reset_sifive_test.c
 delete mode 100644 lib/utils/sys/sifive_test.c

diff --git a/include/sbi_utils/sys/sifive_test.h b/include/sbi_utils/sys/sifive_test.h
deleted file mode 100644
index 0a09499d519..00000000000
--- a/include/sbi_utils/sys/sifive_test.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#ifndef __SYS_SIFIVE_TEST_H__
-#define __SYS_SIFIVE_TEST_H__
-
-#include <sbi/sbi_types.h>
-
-int sifive_test_init(unsigned long base);
-
-#endif
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index c0b964066ee..23f50c4dfe4 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -24,11 +24,6 @@ config FDT_RESET_HTIF
 	select SYS_HTIF
 	default n
 
-config FDT_RESET_SIFIVE_TEST
-	bool "SiFive Test FDT reset driver"
-	select SYS_SIFIVE_TEST
-	default n
-
 config FDT_RESET_SUNXI_WDT
 	bool "Sunxi WDT FDT reset driver"
 	default n
diff --git a/lib/utils/reset/fdt_reset_sifive_test.c b/lib/utils/reset/fdt_reset_sifive_test.c
deleted file mode 100644
index 7e0eba37ac2..00000000000
--- a/lib/utils/reset/fdt_reset_sifive_test.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/sbi_scratch.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/reset/fdt_reset.h>
-#include <sbi_utils/sys/sifive_test.h>
-
-static int sifive_test_reset_init(void *fdt, int nodeoff,
-				  const struct fdt_match *match)
-{
-	int rc;
-	uint64_t addr;
-
-	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
-	if (rc)
-		return rc;
-
-	return sifive_test_init(addr);
-}
-
-static const struct fdt_match sifive_test_reset_match[] = {
-	{ .compatible = "sifive,test1" },
-	{ },
-};
-
-struct fdt_reset fdt_reset_sifive_test = {
-	.match_table = sifive_test_reset_match,
-	.init = sifive_test_reset_init,
-};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 17287a5e2be..ea9cedcd800 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -20,9 +20,6 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_GPIO) += reset/fdt_reset_gpio.o
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_HTIF) += fdt_reset_htif
 libsbiutils-objs-$(CONFIG_FDT_RESET_HTIF) += reset/fdt_reset_htif.o
 
-carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SIFIVE_TEST) += fdt_reset_sifive_test
-libsbiutils-objs-$(CONFIG_FDT_RESET_SIFIVE_TEST) += reset/fdt_reset_sifive_test.o
-
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SUNXI_WDT) += fdt_reset_sunxi_wdt
 libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 
diff --git a/lib/utils/sys/Kconfig b/lib/utils/sys/Kconfig
index 76190f8c52a..a22191cd7c2 100644
--- a/lib/utils/sys/Kconfig
+++ b/lib/utils/sys/Kconfig
@@ -10,8 +10,4 @@ config SYS_HTIF
 	bool "Host transfere interface (HTIF) support"
 	default n
 
-config SYS_SIFIVE_TEST
-	bool "SiFive test support"
-	default n
-
 endmenu
diff --git a/lib/utils/sys/objects.mk b/lib/utils/sys/objects.mk
index 03d6740b142..409d7e8c7ef 100644
--- a/lib/utils/sys/objects.mk
+++ b/lib/utils/sys/objects.mk
@@ -8,5 +8,4 @@
 #
 
 libsbiutils-objs-$(CONFIG_SYS_HTIF) += sys/htif.o
-libsbiutils-objs-$(CONFIG_SYS_SIFIVE_TEST) += sys/sifive_test.o
 libsbiutils-objs-$(CONFIG_SYS_ATCSMU) += sys/atcsmu.o
diff --git a/lib/utils/sys/sifive_test.c b/lib/utils/sys/sifive_test.c
deleted file mode 100644
index a9ebb5c8076..00000000000
--- a/lib/utils/sys/sifive_test.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *   Anup Patel <anup.patel@wdc.com>
- */
-
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_ecall_interface.h>
-#include <sbi/sbi_system.h>
-#include <sbi_utils/sys/sifive_test.h>
-
-#define FINISHER_FAIL		0x3333
-#define FINISHER_PASS		0x5555
-#define FINISHER_RESET		0x7777
-
-static void *sifive_test_base;
-
-static int sifive_test_system_reset_check(u32 type, u32 reason)
-{
-	switch (type) {
-	case SBI_SRST_RESET_TYPE_SHUTDOWN:
-	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
-	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
-		return 1;
-	}
-
-	return 0;
-}
-
-static void sifive_test_system_reset(u32 type, u32 reason)
-{
-	/*
-	 * Tell the "finisher" that the simulation
-	 * was successful so that QEMU exits
-	 */
-	switch (type) {
-	case SBI_SRST_RESET_TYPE_SHUTDOWN:
-		if (reason == SBI_SRST_RESET_REASON_NONE)
-			writew(FINISHER_PASS, sifive_test_base);
-		else
-			writew(FINISHER_FAIL, sifive_test_base);
-		break;
-	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
-	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
-		writew(FINISHER_RESET, sifive_test_base);
-		break;
-	}
-}
-
-static struct sbi_system_reset_device sifive_test_reset = {
-	.name = "sifive_test",
-	.system_reset_check = sifive_test_system_reset_check,
-	.system_reset = sifive_test_system_reset
-};
-
-int sifive_test_init(unsigned long base)
-{
-	sifive_test_base = (void *)base;
-	sbi_system_reset_add_device(&sifive_test_reset);
-
-	return 0;
-}
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 5008c7e6cea..634d4108161 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -24,7 +24,6 @@ CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
-CONFIG_FDT_RESET_SIFIVE_TEST=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
 CONFIG_FDT_RESET_SYSCON=y
 CONFIG_FDT_RESET_THEAD=y

From f536e0b02e7e29abc7e6d845939a8c9fb00ab7e1 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Tue, 1 Aug 2023 19:41:19 +0800
Subject: [PATCH 1348/1765] gitignore: allow gitignore to ignore most dot file

Nowadays, most of the editor use files or directories begin with dot to
store some settings. So let git ignore these files and directories to
reduce potential mistakes.

Add dot match to ignore any editor file and there are two exceptions:
- .gitignore
- .clang-format

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 .gitignore | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/.gitignore b/.gitignore
index c11afd3845b..fbba52e1e33 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,10 @@
+# ignore anything begin with dot
+.*
+
+# exceptions we need even begin with dot
+!.clang-format
+!.gitignore
+
 # Object files
 *.o
 *.a
@@ -10,4 +17,3 @@ install/
 # Development friendly files
 tags
 cscope*
-*.swp

From c744ed77b18cd2c3c6deb77a53f6a6e67de2d153 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Wed, 2 Aug 2023 16:45:23 +0530
Subject: [PATCH 1349/1765] lib: sbi_pmu: Enable noncontigous hpm event and
 counters

Platforms may implement hpm events/counters non contiguously but the current
implementation assumes them to be always contigous. Add a bitmap that
captures the hpm events/counters as implemented in the hardware and use
it to set the max limit of hardware counters visible to the OS. Counters
not implemented in the hardware can't be used by the OS because those
wont be described in the DT.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  2 ++
 lib/sbi/sbi_hart.c     | 56 +++++++++++++++++++++++++++++++-----------
 lib/sbi/sbi_init.c     |  2 ++
 lib/sbi/sbi_pmu.c      | 13 ++++++----
 4 files changed, 54 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index c150b7e40db..1310198b309 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -68,6 +68,7 @@ struct sbi_hart_features {
 	unsigned int pmp_addr_bits;
 	unsigned long pmp_gran;
 	unsigned int mhpm_count;
+	unsigned int mhpm_mask;
 	unsigned int mhpm_bits;
 };
 
@@ -83,6 +84,7 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 }
 
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
+unsigned int sbi_hart_mhpm_mask(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 			      const char *prefix, const char *suffix);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 7b5f38012a6..252f33d8973 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -35,7 +35,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 {
 	unsigned long menvcfg_val, mstatus_val = 0;
 	int cidx;
-	unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
+	unsigned int mhpm_mask = sbi_hart_mhpm_mask(scratch);
 	uint64_t mhpmevent_init_val = 0;
 	uint64_t mstateen_val;
 
@@ -69,13 +69,14 @@ static void mstatus_init(struct sbi_scratch *scratch)
 	/**
 	 * The mhpmeventn[h] CSR should be initialized with interrupt disabled
 	 * and inhibited running in M-mode during init.
-	 * To keep it simple, only contiguous mhpmcounters are supported as a
-	 * platform with discontiguous mhpmcounters may not make much sense.
 	 */
 	mhpmevent_init_val |= (MHPMEVENT_OF | MHPMEVENT_MINH);
-	for (cidx = 0; cidx < num_mhpm; cidx++) {
+	for (cidx = 0; cidx <= 28; cidx++) {
+		if (!(mhpm_mask & 1 << (cidx + 3)))
+			continue;
 #if __riscv_xlen == 32
-		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val & 0xFFFFFFFF);
+		csr_write_num(CSR_MHPMEVENT3 + cidx,
+			       mhpmevent_init_val & 0xFFFFFFFF);
 		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 			csr_write_num(CSR_MHPMEVENT3H + cidx,
 				      mhpmevent_init_val >> BITS_PER_LONG);
@@ -244,6 +245,14 @@ void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 		   prefix, suffix, csr_read(CSR_MEDELEG));
 }
 
+unsigned int sbi_hart_mhpm_mask(struct sbi_scratch *scratch)
+{
+	struct sbi_hart_features *hfeatures =
+			sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+	return hfeatures->mhpm_mask;
+}
+
 unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)
 {
 	struct sbi_hart_features *hfeatures =
@@ -715,6 +724,30 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->extensions = 0;
 	hfeatures->pmp_count = 0;
 	hfeatures->mhpm_count = 0;
+	hfeatures->mhpm_mask = 0;
+
+#define __check_hpm_csr(__csr, __count, __mask) 			  \
+	oldval = csr_read_allowed(__csr, (ulong)&trap);			  \
+	if (!trap.cause) {						  \
+		csr_write_allowed(__csr, (ulong)&trap, 1UL);		  \
+		if (!trap.cause && csr_swap(__csr, oldval) == 1UL) {	  \
+			(hfeatures->__count)++;				  \
+			(hfeatures->__mask) |= 1 << (__csr - CSR_MCYCLE); \
+		}							  \
+	}
+
+#define __check_hpm_csr_2(__csr, __count, __mask)	 		  \
+	__check_hpm_csr(__csr + 0, __count, __mask)	 		  \
+	__check_hpm_csr(__csr + 1, __count, __mask)
+#define __check_hpm_csr_4(__csr, __count, __mask)	 		  \
+	__check_hpm_csr_2(__csr + 0, __count, __mask) 			  \
+	__check_hpm_csr_2(__csr + 2, __count, __mask)
+#define __check_hpm_csr_8(__csr, __count, __mask)	 		  \
+	__check_hpm_csr_4(__csr + 0, __count, __mask) 			  \
+	__check_hpm_csr_4(__csr + 4, __count, __mask)
+#define __check_hpm_csr_16(__csr, __count, __mask)	 		  \
+	__check_hpm_csr_8(__csr + 0, __count, __mask) 			  \
+	__check_hpm_csr_8(__csr + 8, __count, __mask)
 
 #define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
 	oldval = csr_read_allowed(__csr, (ulong)&trap);			\
@@ -766,22 +799,17 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 		__check_csr_64(CSR_PMPADDR0, 0, val, pmp_count, __pmp_skip);
 	}
 __pmp_skip:
-
 	/* Detect number of MHPM counters */
-	__check_csr(CSR_MHPMCOUNTER3, 0, 1UL, mhpm_count, __mhpm_skip);
+	__check_hpm_csr(CSR_MHPMCOUNTER3, mhpm_count, mhpm_mask);
 	hfeatures->mhpm_bits = hart_mhpm_get_allowed_bits();
-
-	__check_csr_4(CSR_MHPMCOUNTER4, 0, 1UL, mhpm_count, __mhpm_skip);
-	__check_csr_8(CSR_MHPMCOUNTER8, 0, 1UL, mhpm_count, __mhpm_skip);
-	__check_csr_16(CSR_MHPMCOUNTER16, 0, 1UL, mhpm_count, __mhpm_skip);
+	__check_hpm_csr_4(CSR_MHPMCOUNTER4, mhpm_count, mhpm_mask);
+	__check_hpm_csr_8(CSR_MHPMCOUNTER8, mhpm_count, mhpm_mask);
+	__check_hpm_csr_16(CSR_MHPMCOUNTER16, mhpm_count, mhpm_mask);
 
 	/**
 	 * No need to check for MHPMCOUNTERH for RV32 as they are expected to be
 	 * implemented if MHPMCOUNTER is implemented.
 	 */
-
-__mhpm_skip:
-
 #undef __check_csr_64
 #undef __check_csr_32
 #undef __check_csr_16
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 35e66333501..eae4f28d8a4 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -182,6 +182,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 		   sbi_hart_pmp_addrbits(scratch));
 	sbi_printf("Boot HART MHPM Count      : %d\n",
 		   sbi_hart_mhpm_count(scratch));
+	sbi_printf("Boot HART MHPM Mask       : 0x%x\n",
+		   sbi_hart_mhpm_mask(scratch));
 	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 7213a53b0b5..cc8a88e176b 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -236,8 +236,7 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 	bool is_overlap;
 	struct sbi_pmu_hw_event *event = &hw_event_map[num_hw_events];
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	int hw_ctr_avail = sbi_hart_mhpm_count(scratch);
-	uint32_t ctr_avail_mask = ((uint32_t)(~0) >> (32 - (hw_ctr_avail + 3)));
+	uint32_t ctr_avail_mask = sbi_hart_mhpm_mask(scratch) | 0x7;
 
 	/* The first two counters are reserved by priv spec */
 	if (eidx_start > SBI_PMU_HW_INSTRUCTIONS && (cmap & SBI_PMU_FIXED_CTR_MASK))
@@ -912,6 +911,7 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 {
+	int hpm_count = sbi_fls(sbi_hart_mhpm_mask(scratch));
 	struct sbi_pmu_hart_state *phs;
 	const struct sbi_platform *plat;
 
@@ -932,9 +932,12 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 		sbi_platform_pmu_init(plat);
 
 		/* mcycle & minstret is available always */
-		num_hw_ctrs = sbi_hart_mhpm_count(scratch) + 3;
-		if (num_hw_ctrs > SBI_PMU_HW_CTR_MAX)
-			return SBI_EINVAL;
+		if (!hpm_count)
+			/* Only CY, TM & IR are implemented in the hw */
+			num_hw_ctrs = 3;
+		else
+			num_hw_ctrs = hpm_count + 1;
+
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 

From 6259b2ec2d095a059c89237551839c0fe8bd5bd7 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 3 Aug 2023 12:41:01 +0530
Subject: [PATCH 1350/1765] lib: utils/fdt: Fix fdt_parse_isa_extensions()
 implementation

Currently, the fdt_parse_isa_extensions() tries to parse the ISA
string once for each HART. This ISA string parsing can fail for
secondary HARTs if the FDT memory is already overwritten by the
supervisor OS.

To tackle this issue, we improve the fdt_parse_isa_extensions()
implementation to pre-parse ISA string for all HARTs during
cold boot.

Fixes: d72f5f17478d ("lib: utils: Add detection of Smepmp from ISA
string in FDT")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-By: Mayuresh Chitale<mchitale@ventanamicro.com>
---
 lib/utils/fdt/fdt_helper.c | 122 ++++++++++++++++++++++++-------------
 1 file changed, 79 insertions(+), 43 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 61a41003ae6..c97f09d3cc3 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -314,54 +314,14 @@ int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
 	return 0;
 }
 
-static int fdt_get_isa_string(void *fdt, unsigned int hartid,
-			const char **isa_string)
-{
-	int err, cpu_offset, cpus_offset, len;
-	u32 c_hartid;
-	const fdt32_t *val;
-
-	if (!fdt)
-		return SBI_EINVAL;
-
-	cpus_offset = fdt_path_offset(fdt, "/cpus");
-	if (cpus_offset < 0)
-		return cpus_offset;
-
-	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
-		err = fdt_parse_hart_id(fdt, cpu_offset, &c_hartid);
-		if (err)
-			continue;
-
-		if (!fdt_node_is_enabled(fdt, cpu_offset))
-			continue;
-
-		if (c_hartid == hartid) {
-			val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len);
-			if (val && len > 0) {
-				*isa_string = (const char *)val;
-				return 0;
-			}
-		}
-	}
-
-	return SBI_EINVAL;
-}
-
 #define RISCV_ISA_EXT_NAME_LEN_MAX	32
 
-int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
-			unsigned long *extensions)
+static unsigned long fdt_isa_bitmap_offset;
+
+static int fdt_parse_isa_one_hart(const char *isa, unsigned long *extensions)
 {
 	size_t i, j, isa_len;
 	char mstr[RISCV_ISA_EXT_NAME_LEN_MAX];
-	const char *isa = NULL;
-
-	if (fdt_get_isa_string(fdt, hartid, &isa))
-		return SBI_EINVAL;
-
-	if (!isa)
-		return SBI_EINVAL;
 
 	i = 0;
 	isa_len = strlen(isa);
@@ -424,6 +384,82 @@ int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
 	return 0;
 }
 
+static int fdt_parse_isa_all_harts(void *fdt)
+{
+	u32 hartid;
+	const fdt32_t *val;
+	unsigned long *hart_exts;
+	struct sbi_scratch *scratch;
+	int err, cpu_offset, cpus_offset, len;
+
+	if (!fdt || !fdt_isa_bitmap_offset)
+		return SBI_EINVAL;
+
+	cpus_offset = fdt_path_offset(fdt, "/cpus");
+	if (cpus_offset < 0)
+		return cpus_offset;
+
+	fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+		err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+		if (err)
+			continue;
+
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
+
+		val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len);
+		if (!val || len <= 0)
+			return SBI_ENOENT;
+
+		scratch = sbi_hartid_to_scratch(hartid);
+		if (!scratch)
+			return SBI_ENOENT;
+
+		hart_exts = sbi_scratch_offset_ptr(scratch,
+						   fdt_isa_bitmap_offset);
+		if (!hart_exts)
+			return SBI_ENOENT;
+
+		err = fdt_parse_isa_one_hart((const char *)val, hart_exts);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
+int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
+			unsigned long *extensions)
+{
+	int rc, i;
+	unsigned long *hart_exts;
+	struct sbi_scratch *scratch;
+
+	if (!fdt_isa_bitmap_offset) {
+		fdt_isa_bitmap_offset = sbi_scratch_alloc_offset(
+					sizeof(*hart_exts) *
+					BITS_TO_LONGS(SBI_HART_EXT_MAX));
+		if (!fdt_isa_bitmap_offset)
+			return SBI_ENOMEM;
+
+		rc = fdt_parse_isa_all_harts(fdt);
+		if (rc)
+			return rc;
+	}
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch)
+		return SBI_ENOENT;
+
+	hart_exts = sbi_scratch_offset_ptr(scratch, fdt_isa_bitmap_offset);
+	if (!hart_exts)
+		return SBI_ENOENT;
+
+	for (i = 0; i < BITS_TO_LONGS(SBI_HART_EXT_MAX); i++)
+		extensions[i] |= hart_exts[i];
+	return 0;
+}
+
 static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
 				      struct platform_uart_data *uart,
 				      unsigned long default_freq,

From f46a5643bc4a524975261b694814bf5d14bc2d71 Mon Sep 17 00:00:00 2001
From: Kaiwen Xue <kaiwenx@rivosinc.com>
Date: Thu, 3 Aug 2023 11:34:15 -0700
Subject: [PATCH 1351/1765] lib: sbi: Fix typo for finding fixed event counter

Cycle and instructions are hardware events instead of firmware ones. Fix
the typo in the name of this function.

Signed-off-by: Kaiwen Xue <kaiwenx@andrew.cmu.edu>
Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com>
Reviewed-by: Anup patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index cc8a88e176b..adb9f187e3b 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -608,7 +608,7 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	return 0;
 }
 
-static int pmu_ctr_find_fixed_fw(unsigned long evt_idx_code)
+static int pmu_ctr_find_fixed_hw(unsigned long evt_idx_code)
 {
 	/* Non-programmables counters are enabled always. No need to do lookup */
 	if (evt_idx_code == SBI_PMU_HW_CPU_CYCLES)
@@ -637,7 +637,7 @@ static int pmu_ctr_find_hw(struct sbi_pmu_hart_state *phs,
 	 * If Sscof is present try to find the programmable counter for
 	 * cycle/instret as well.
 	 */
-	fixed_ctr = pmu_ctr_find_fixed_fw(event_idx);
+	fixed_ctr = pmu_ctr_find_fixed_hw(event_idx);
 	if (fixed_ctr >= 0 &&
 	    !sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		return fixed_ctr;

From 94197a8c49751eabe73ff2849fce183ac8ead3fd Mon Sep 17 00:00:00 2001
From: Mitchell Horne <mhorne@freebsd.org>
Date: Sun, 6 Aug 2023 10:45:36 +0530
Subject: [PATCH 1352/1765] fw_base.S: Fix assembler error with clang 16+

Attempting to build OpenSBI with clang 16 and the following command:

   $ make LLVM=1 PLATFORM=generic

Results in the following error:

    AS        platform/generic/firmware/fw_dynamic.o
   /tmp/fw_dynamic-d000a6.s:429:9: error: symbol '_fw_start' can not be undefined in a subtraction expression
    .dword _fw_rw_start - _fw_start

Work around this issue by eliminating the __fw_rw_offset variable and
performing the offset calculation at run-time instead. This takes
advantage of the fact that the a4 register contains the value of
_fw_start.

Signed-off-by: Mitchell Horne <mhorne@FreeBSD.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b94742395c9..ca34b4ccc9d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -309,8 +309,8 @@ _scratch_init:
 	REG_S	a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
 
 	/* Store R/W section's offset in scratch space */
-	lla	a4, __fw_rw_offset
-	REG_L	a5, 0(a4)
+	lla	a5, _fw_rw_start
+	sub	a5, a5, a4
 	REG_S	a5, SBI_SCRATCH_FW_RW_OFFSET(tp)
 
 	/* Store fw_heap_offset and fw_heap_size in scratch space */
@@ -536,8 +536,6 @@ _link_start:
 	RISCV_PTR	FW_TEXT_START
 _link_end:
 	RISCV_PTR	_fw_reloc_end
-__fw_rw_offset:
-	RISCV_PTR	_fw_rw_start - _fw_start
 
 	.section .entry, "ax", %progbits
 	.align 3

From c104c60912a4ed26093f00a9675ad0286e8dcd29 Mon Sep 17 00:00:00 2001
From: Kaiwen Xue <kaiwenx@rivosinc.com>
Date: Thu, 20 Jul 2023 14:07:02 -0700
Subject: [PATCH 1353/1765] lib: sbi: Add support for smcntrpmf

This adds the support for ISA extension smcntrpmf. When some inhibit flags
are set by a lower privilege mode for new CSRs added by smcntrpmf, OpenSBI
sets the appropriate values correspondingly.

Signed-off-by: Kaiwen Xue <kaiwenx@andrew.cmu.edu>
Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/riscv_encoding.h |  4 ++++
 include/sbi/sbi_hart.h       |  2 ++
 lib/sbi/riscv_asm.c          | 12 +++++++++++
 lib/sbi/sbi_hart.c           | 11 ++++++++++
 lib/sbi/sbi_pmu.c            | 42 ++++++++++++++++++++++++++++++++++--
 5 files changed, 69 insertions(+), 2 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 776a0835792..d137bf829f4 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -602,6 +602,8 @@
 
 /* Machine Counter Setup */
 #define CSR_MCOUNTINHIBIT		0x320
+#define CSR_MCYCLECFG			0x321
+#define CSR_MINSTRETCFG			0x322
 #define CSR_MHPMEVENT3			0x323
 #define CSR_MHPMEVENT4			0x324
 #define CSR_MHPMEVENT5			0x325
@@ -633,6 +635,8 @@
 #define CSR_MHPMEVENT31			0x33f
 
 /* For RV32 */
+#define CSR_MCYCLECFGH			0x721
+#define CSR_MINSTRETCFGH		0x722
 #define CSR_MHPMEVENT3H			0x723
 #define CSR_MHPMEVENT4H			0x724
 #define CSR_MHPMEVENT5H			0x725
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 1310198b309..17d3ada9a58 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -40,6 +40,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_ZICNTR,
 	/** HART has Zihpm extension */
 	SBI_HART_EXT_ZIHPM,
+	/** Hart has Smcntrpmf extension */
+	SBI_HART_EXT_SMCNTRPMF,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 881dea3e54a..05b8c7ce6e3 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -128,6 +128,8 @@ unsigned long csr_read_num(int csr_num)
 	switchcase_csr_read_8(CSR_MHPMCOUNTER8, ret)
 	switchcase_csr_read_16(CSR_MHPMCOUNTER16, ret)
 	switchcase_csr_read(CSR_MCOUNTINHIBIT, ret)
+	switchcase_csr_read(CSR_MCYCLECFG, ret)
+	switchcase_csr_read(CSR_MINSTRETCFG, ret)
 	switchcase_csr_read(CSR_MHPMEVENT3, ret)
 	switchcase_csr_read_4(CSR_MHPMEVENT4, ret)
 	switchcase_csr_read_8(CSR_MHPMEVENT8, ret)
@@ -139,6 +141,12 @@ unsigned long csr_read_num(int csr_num)
 	switchcase_csr_read_4(CSR_MHPMCOUNTER4H, ret)
 	switchcase_csr_read_8(CSR_MHPMCOUNTER8H, ret)
 	switchcase_csr_read_16(CSR_MHPMCOUNTER16H, ret)
+	/**
+	 * The CSR range M[CYCLE, INSTRET]CFGH are available only if smcntrpmf
+	 * extension is present. The caller must ensure that.
+	 */
+	switchcase_csr_read(CSR_MCYCLECFGH, ret)
+	switchcase_csr_read(CSR_MINSTRETCFGH, ret)
 	/**
 	 * The CSR range MHPMEVENT[3-16]H are available only if sscofpmf
 	 * extension is present. The caller must ensure that.
@@ -206,12 +214,16 @@ void csr_write_num(int csr_num, unsigned long val)
 	switchcase_csr_write_4(CSR_MHPMCOUNTER4H, val)
 	switchcase_csr_write_8(CSR_MHPMCOUNTER8H, val)
 	switchcase_csr_write_16(CSR_MHPMCOUNTER16H, val)
+	switchcase_csr_write(CSR_MCYCLECFGH, val)
+	switchcase_csr_write(CSR_MINSTRETCFGH, val)
 	switchcase_csr_write(CSR_MHPMEVENT3H, val)
 	switchcase_csr_write_4(CSR_MHPMEVENT4H, val)
 	switchcase_csr_write_8(CSR_MHPMEVENT8H, val)
 	switchcase_csr_write_16(CSR_MHPMEVENT16H, val)
 #endif
 	switchcase_csr_write(CSR_MCOUNTINHIBIT, val)
+	switchcase_csr_write(CSR_MCYCLECFG, val)
+	switchcase_csr_write(CSR_MINSTRETCFG, val)
 	switchcase_csr_write(CSR_MHPMEVENT3, val)
 	switchcase_csr_write_4(CSR_MHPMEVENT4, val)
 	switchcase_csr_write_8(CSR_MHPMEVENT8, val)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 252f33d8973..be795f562b9 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -606,6 +606,9 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_SMEPMP:
 		estr = "smepmp";
 		break;
+	case SBI_HART_EXT_SMCNTRPMF:
+		estr = "smcntrpmf";
+		break;
 	default:
 		break;
 	}
@@ -872,6 +875,14 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 					SBI_HART_EXT_SMSTATEEN, true);
 	}
 
+	/* Detect if hart supports smcntrpmf */
+	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
+		csr_read_allowed(CSR_MCYCLECFG, (unsigned long)&trap);
+		if (!trap.cause)
+			__sbi_hart_update_extension(hfeatures,
+					SBI_HART_EXT_SMCNTRPMF, true);
+	}
+
 	/* Let platform populate extensions */
 	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr(),
 					  hfeatures);
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index adb9f187e3b..e8bed49f3fd 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -608,6 +608,44 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 	return 0;
 }
 
+static int pmu_fixed_ctr_update_inhibit_bits(int fixed_ctr, unsigned long flags)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	uint64_t cfg_val = 0, cfg_csr_no;
+#if __riscv_xlen == 32
+	uint64_t cfgh_csr_no;
+#endif
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF))
+		return fixed_ctr;
+
+	switch (fixed_ctr) {
+	case 0:
+		cfg_csr_no = CSR_MCYCLECFG;
+#if __riscv_xlen == 32
+		cfgh_csr_no = CSR_MCYCLECFGH;
+#endif
+		break;
+	case 2:
+		cfg_csr_no = CSR_MINSTRETCFG;
+#if __riscv_xlen == 32
+		cfgh_csr_no = CSR_MINSTRETCFGH;
+#endif
+		break;
+	default:
+		return SBI_EFAIL;
+	}
+
+	cfg_val |= MHPMEVENT_MINH;
+	pmu_update_inhibit_flags(flags, &cfg_val);
+#if __riscv_xlen == 32
+	csr_write_num(cfg_csr_no, cfg_val & 0xFFFFFFFF);
+	csr_write_num(cfgh_csr_no, cfg_val >> BITS_PER_LONG);
+#else
+	csr_write_num(cfg_csr_no, cfg_val);
+#endif
+	return fixed_ctr;
+}
+
 static int pmu_ctr_find_fixed_hw(unsigned long evt_idx_code)
 {
 	/* Non-programmables counters are enabled always. No need to do lookup */
@@ -640,7 +678,7 @@ static int pmu_ctr_find_hw(struct sbi_pmu_hart_state *phs,
 	fixed_ctr = pmu_ctr_find_fixed_hw(event_idx);
 	if (fixed_ctr >= 0 &&
 	    !sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
-		return fixed_ctr;
+		return pmu_fixed_ctr_update_inhibit_bits(fixed_ctr, flags);
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		mctr_inhbt = csr_read(CSR_MCOUNTINHIBIT);
@@ -683,7 +721,7 @@ static int pmu_ctr_find_hw(struct sbi_pmu_hart_state *phs,
 		 * Return the fixed counter as they are mandatory anyways.
 		 */
 		if (fixed_ctr >= 0)
-			return fixed_ctr;
+			return pmu_fixed_ctr_update_inhibit_bits(fixed_ctr, flags);
 		else
 			return SBI_EFAIL;
 	}

From 7aabeee93edb2e7ab03954e235683bfd9d8f29eb Mon Sep 17 00:00:00 2001
From: Andrew Jones <ajones@ventanamicro.com>
Date: Thu, 10 Aug 2023 14:15:28 +0200
Subject: [PATCH 1354/1765] Makefile: Fix grep warning

grep (at least my version, grep-3.8-3.fc38.x86_64) warns with
"grep: warning: stray \ before -". Fix the warning by making
the command line input to grep less ambiguous.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel  <anup@brainfault.org>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 730dbd910e5..ca70949df48 100644
--- a/Makefile
+++ b/Makefile
@@ -168,7 +168,7 @@ endif
 OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
 # Check whether the compiler supports -m(no-)save-restore
-CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep "\-save\-restore" >/dev/null && echo n || echo y)
+CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep -e "-save-restore" >/dev/null && echo n || echo y)
 
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
 CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)

From e7e73aa532fa5813f457b9b09899413f41885d37 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 11 Aug 2023 08:13:01 +0800
Subject: [PATCH 1355/1765] platform: generic: allwinner: correct mhpmevent
 count

Only the CSR mhpmevent 3-9,13-17 of D1 have valid function, so change
the mhpm_mask to a valid value to avoid invalid usage.

Due to the openc906 pmu code
https://github.com/T-head-Semi/openc906/blob/main/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel  <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 0f0a9f347a6..03cb92cf92b 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -272,7 +272,8 @@ static int sun20i_d1_extensions_init(const struct fdt_match *match,
 	sbi_pmu_set_device(&thead_c9xx_pmu_device);
 
 	/* auto-detection doesn't work on t-head c9xx cores */
-	hfeatures->mhpm_count = 29;
+	/* D1 has 29 mhpmevent csrs, but only 3-9,13-17 have valid value */
+	hfeatures->mhpm_mask = 0x0003e3f8;
 	hfeatures->mhpm_bits = 64;
 
 	return 0;

From ee1f83ca848d3639b808e52719bc7111f5a1be7c Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 11 Aug 2023 08:24:43 +0800
Subject: [PATCH 1356/1765] lib: sbi_pmu: remove mhpm_count field in hart
 feature

After supporting noncontigous hpm event and counters in opensbi, the
number of hpm counters can be calculated by the mhpm_mask. So this field
is unnecessary and can be removed to save some space.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel  <anup@brainfault.org>
---
 include/sbi/sbi_bitops.h  | 16 ++++++++++++++
 include/sbi/sbi_hart.h    |  2 --
 lib/sbi/sbi_emulate_csr.c |  2 +-
 lib/sbi/sbi_hart.c        | 46 +++++++++++++++------------------------
 lib/sbi/sbi_init.c        |  5 ++---
 5 files changed, 37 insertions(+), 34 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 2e08947beed..48a20901eff 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -112,6 +112,22 @@ static inline unsigned long sbi_fls(unsigned long word)
 	return num;
 }
 
+/**
+ * sbi_popcount - find the number of set bit in a long word
+ * @word: the word to search
+ */
+static inline unsigned long sbi_popcount(unsigned long word)
+{
+	unsigned long count = 0;
+
+	while (word) {
+		word &= word - 1;
+		count++;
+	}
+
+	return count;
+}
+
 #define for_each_set_bit(bit, addr, size) \
 	for ((bit) = find_first_bit((addr), (size));		\
 	     (bit) < (size);					\
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 17d3ada9a58..e60f41502f6 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -69,7 +69,6 @@ struct sbi_hart_features {
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
 	unsigned long pmp_gran;
-	unsigned int mhpm_count;
 	unsigned int mhpm_mask;
 	unsigned int mhpm_bits;
 };
@@ -85,7 +84,6 @@ static inline ulong sbi_hart_expected_trap_addr(void)
 	return (ulong)sbi_hart_expected_trap;
 }
 
-unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch);
 unsigned int sbi_hart_mhpm_mask(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 			      const char *prefix, const char *suffix);
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index da811653661..5f3b111d69f 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -109,7 +109,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 
 #define switchcase_hpm(__uref, __mref, __csr)				\
 	case __csr:							\
-		if ((sbi_hart_mhpm_count(scratch) + 3) <= (__csr - __uref))\
+		if (sbi_hart_mhpm_mask(scratch) & (1 << (__csr - __uref)))\
 			return SBI_ENOTSUPP;				\
 		if (!hpm_allowed(__csr - __uref, prev_mode, virt))	\
 			return SBI_ENOTSUPP;				\
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index be795f562b9..f7cefe4d9b2 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -253,14 +253,6 @@ unsigned int sbi_hart_mhpm_mask(struct sbi_scratch *scratch)
 	return hfeatures->mhpm_mask;
 }
 
-unsigned int sbi_hart_mhpm_count(struct sbi_scratch *scratch)
-{
-	struct sbi_hart_features *hfeatures =
-			sbi_scratch_offset_ptr(scratch, hart_features_offset);
-
-	return hfeatures->mhpm_count;
-}
-
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 {
 	struct sbi_hart_features *hfeatures =
@@ -726,31 +718,29 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	/* Clear hart features */
 	hfeatures->extensions = 0;
 	hfeatures->pmp_count = 0;
-	hfeatures->mhpm_count = 0;
 	hfeatures->mhpm_mask = 0;
 
-#define __check_hpm_csr(__csr, __count, __mask) 			  \
+#define __check_hpm_csr(__csr, __mask) 					  \
 	oldval = csr_read_allowed(__csr, (ulong)&trap);			  \
 	if (!trap.cause) {						  \
 		csr_write_allowed(__csr, (ulong)&trap, 1UL);		  \
 		if (!trap.cause && csr_swap(__csr, oldval) == 1UL) {	  \
-			(hfeatures->__count)++;				  \
 			(hfeatures->__mask) |= 1 << (__csr - CSR_MCYCLE); \
 		}							  \
 	}
 
-#define __check_hpm_csr_2(__csr, __count, __mask)	 		  \
-	__check_hpm_csr(__csr + 0, __count, __mask)	 		  \
-	__check_hpm_csr(__csr + 1, __count, __mask)
-#define __check_hpm_csr_4(__csr, __count, __mask)	 		  \
-	__check_hpm_csr_2(__csr + 0, __count, __mask) 			  \
-	__check_hpm_csr_2(__csr + 2, __count, __mask)
-#define __check_hpm_csr_8(__csr, __count, __mask)	 		  \
-	__check_hpm_csr_4(__csr + 0, __count, __mask) 			  \
-	__check_hpm_csr_4(__csr + 4, __count, __mask)
-#define __check_hpm_csr_16(__csr, __count, __mask)	 		  \
-	__check_hpm_csr_8(__csr + 0, __count, __mask) 			  \
-	__check_hpm_csr_8(__csr + 8, __count, __mask)
+#define __check_hpm_csr_2(__csr, __mask)	 		  \
+	__check_hpm_csr(__csr + 0, __mask)	 		  \
+	__check_hpm_csr(__csr + 1, __mask)
+#define __check_hpm_csr_4(__csr, __mask)	 		  \
+	__check_hpm_csr_2(__csr + 0, __mask) 			  \
+	__check_hpm_csr_2(__csr + 2, __mask)
+#define __check_hpm_csr_8(__csr, __mask)	 		  \
+	__check_hpm_csr_4(__csr + 0, __mask) 			  \
+	__check_hpm_csr_4(__csr + 4, __mask)
+#define __check_hpm_csr_16(__csr, __mask)	 		  \
+	__check_hpm_csr_8(__csr + 0, __mask) 			  \
+	__check_hpm_csr_8(__csr + 8, __mask)
 
 #define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
 	oldval = csr_read_allowed(__csr, (ulong)&trap);			\
@@ -803,11 +793,11 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	}
 __pmp_skip:
 	/* Detect number of MHPM counters */
-	__check_hpm_csr(CSR_MHPMCOUNTER3, mhpm_count, mhpm_mask);
+	__check_hpm_csr(CSR_MHPMCOUNTER3, mhpm_mask);
 	hfeatures->mhpm_bits = hart_mhpm_get_allowed_bits();
-	__check_hpm_csr_4(CSR_MHPMCOUNTER4, mhpm_count, mhpm_mask);
-	__check_hpm_csr_8(CSR_MHPMCOUNTER8, mhpm_count, mhpm_mask);
-	__check_hpm_csr_16(CSR_MHPMCOUNTER16, mhpm_count, mhpm_mask);
+	__check_hpm_csr_4(CSR_MHPMCOUNTER4, mhpm_mask);
+	__check_hpm_csr_8(CSR_MHPMCOUNTER8, mhpm_mask);
+	__check_hpm_csr_16(CSR_MHPMCOUNTER16, mhpm_mask);
 
 	/**
 	 * No need to check for MHPMCOUNTERH for RV32 as they are expected to be
@@ -890,7 +880,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 		return rc;
 
 	/* Extensions implied by other extensions and features */
-	if (hfeatures->mhpm_count)
+	if (hfeatures->mhpm_mask)
 		__sbi_hart_update_extension(hfeatures,
 					SBI_HART_EXT_ZIHPM, true);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index eae4f28d8a4..252b41ace41 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -180,9 +180,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 		   sbi_hart_pmp_granularity(scratch));
 	sbi_printf("Boot HART PMP Address Bits: %d\n",
 		   sbi_hart_pmp_addrbits(scratch));
-	sbi_printf("Boot HART MHPM Count      : %d\n",
-		   sbi_hart_mhpm_count(scratch));
-	sbi_printf("Boot HART MHPM Mask       : 0x%x\n",
+	sbi_printf("Boot HART MHPM Info       : %lu (0x%08x)\n",
+		   sbi_popcount(sbi_hart_mhpm_mask(scratch)),
 		   sbi_hart_mhpm_mask(scratch));
 	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }

From a9cffd65324caf5512e3ebb5b08d5b85efd0a23c Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Wed, 30 Aug 2023 08:34:43 +0800
Subject: [PATCH 1357/1765] firmware: payload: test: Change to SBI v2.0 DBCN
 ecalls

As the the "Console Putchar" extension is already legacy and may
be removed in the furture. So replace it with the SBI v2.0 "DBCN"
extension.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/payloads/test_main.c | 53 +++++++++++++++++++++--------------
 1 file changed, 32 insertions(+), 21 deletions(-)

diff --git a/firmware/payloads/test_main.c b/firmware/payloads/test_main.c
index ae2ed4f5edf..194dbbe6c50 100644
--- a/firmware/payloads/test_main.c
+++ b/firmware/payloads/test_main.c
@@ -8,31 +8,42 @@
  */
 
 #include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_string.h>
 
-#define SBI_ECALL(__eid, __fid, __a0, __a1, __a2)                             \
-	({                                                                    \
-		register unsigned long a0 asm("a0") = (unsigned long)(__a0);  \
-		register unsigned long a1 asm("a1") = (unsigned long)(__a1);  \
-		register unsigned long a2 asm("a2") = (unsigned long)(__a2);  \
-		register unsigned long a6 asm("a6") = (unsigned long)(__fid); \
-		register unsigned long a7 asm("a7") = (unsigned long)(__eid); \
-		asm volatile("ecall"                                          \
-			     : "+r"(a0)                                       \
-			     : "r"(a1), "r"(a2), "r"(a6), "r"(a7)             \
-			     : "memory");                                     \
-		a0;                                                           \
-	})
-
-#define SBI_ECALL_0(__eid, __fid) SBI_ECALL(__eid, __fid, 0, 0, 0)
-#define SBI_ECALL_1(__eid, __fid, __a0) SBI_ECALL(__eid, __fid, __a0, 0, 0)
-#define SBI_ECALL_2(__eid, __fid, __a0, __a1) SBI_ECALL(__eid, __fid, __a0, __a1, 0)
-
-#define sbi_ecall_console_putc(c) SBI_ECALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, (c))
+struct sbiret {
+	unsigned long error;
+	unsigned long value;
+};
+
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+			unsigned long arg1, unsigned long arg2,
+			unsigned long arg3, unsigned long arg4,
+			unsigned long arg5)
+{
+	struct sbiret ret;
+
+	register unsigned long a0 asm ("a0") = (unsigned long)(arg0);
+	register unsigned long a1 asm ("a1") = (unsigned long)(arg1);
+	register unsigned long a2 asm ("a2") = (unsigned long)(arg2);
+	register unsigned long a3 asm ("a3") = (unsigned long)(arg3);
+	register unsigned long a4 asm ("a4") = (unsigned long)(arg4);
+	register unsigned long a5 asm ("a5") = (unsigned long)(arg5);
+	register unsigned long a6 asm ("a6") = (unsigned long)(fid);
+	register unsigned long a7 asm ("a7") = (unsigned long)(ext);
+	asm volatile ("ecall"
+		      : "+r" (a0), "+r" (a1)
+		      : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+		      : "memory");
+	ret.error = a0;
+	ret.value = a1;
+
+	return ret;
+}
 
 static inline void sbi_ecall_console_puts(const char *str)
 {
-	while (str && *str)
-		sbi_ecall_console_putc(*str++);
+	sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+		  sbi_strlen(str), (unsigned long)str, 0, 0, 0, 0);
 }
 
 #define wfi()                                             \

From b20bd479eff1588bfea52cceda213c40cc273ba9 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 21 Aug 2023 22:11:45 +0800
Subject: [PATCH 1358/1765] lib: sbi: improve the definition of
 SBI_IPI_EVENT_MAX

The previous definition had the assumption that the machine word length
is equal to the word length of LONG. Remove this assumption and add a
static check to prevent errors in subsequent modifications.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ipi.h | 2 +-
 lib/sbi/sbi_ipi.c     | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index c64f422c030..6b5e260b78c 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -14,7 +14,7 @@
 
 /* clang-format off */
 
-#define SBI_IPI_EVENT_MAX			__riscv_xlen
+#define SBI_IPI_EVENT_MAX			(8 * __SIZEOF_LONG__)
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index ad09154521f..0d8edab020f 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -27,6 +27,11 @@ struct sbi_ipi_data {
 	unsigned long ipi_type;
 };
 
+_Static_assert(
+	8 * sizeof(((struct sbi_ipi_data*)0)->ipi_type) == SBI_IPI_EVENT_MAX,
+	"type of sbi_ipi_data.ipi_type has changed, please redefine SBI_IPI_EVENT_MAX"
+	);
+
 static unsigned long ipi_data_off;
 static const struct sbi_ipi_device *ipi_dev = NULL;
 static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];

From 664692f507a8b3a173256e1231dc1aed00eaf249 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Tue, 15 Aug 2023 17:40:31 +0800
Subject: [PATCH 1359/1765] lib: sbi_pmu: ensure update hpm counter before
 starting counting

When detecting features of PMU, the hpm counter may be written to some
value, this will cause some unexpected behavior in some cases. So ensure
the hpm counter is updated before starting the counter and the related
interrupt.

Signed-off-by: Haijiao Liu <haijiao.liu@sophgo.com>
Co-authored-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Samuel Holland <samuel@sholland.org>
---
 lib/sbi/sbi_pmu.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index e8bed49f3fd..c52e8a29356 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -353,8 +353,11 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	if (cidx >= num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
-	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
-		goto skip_inhibit_update;
+	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) {
+		if (ival_update)
+			pmu_ctr_write_hw(cidx, ival);
+		return 0;
+	}
 
 	/*
 	 * Some of the hardware may not support mcountinhibit but perf stat
@@ -368,13 +371,12 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 
 	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
 		pmu_ctr_enable_irq_hw(cidx);
+	if (ival_update)
+		pmu_ctr_write_hw(cidx, ival);
 	if (pmu_dev && pmu_dev->hw_counter_enable_irq)
 		pmu_dev->hw_counter_enable_irq(cidx);
-	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
-skip_inhibit_update:
-	if (ival_update)
-		pmu_ctr_write_hw(cidx, ival);
+	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
 	return 0;
 }

From c9a296d0edc9cb64638c026949ef091d7d9e01e9 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Tue, 15 Aug 2023 17:40:32 +0800
Subject: [PATCH 1360/1765] platform: generic: allwinner: fix OF process for
 T-HEAD c9xx pmu

T-HEAD c9xx pmu needs to clear OV bits of MCOUNTEROF in any condition
to avoid unnecessary OF interrupts.

In addition, the S-mode SCOUNTEROF only have OF bit set when the related
bits of MCOUNTERWEN is set, so also configure MCOUNTERWEN to allow kernel
to access valid SCOUNTEROF.

Signed-off-by: Haijiao Liu <haijiao.liu@sophgo.com>
Co-authored-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Samuel Holland <samuel@sholland.org>
---
 platform/generic/allwinner/sun20i-d1.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 03cb92cf92b..a9a7e477eec 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -225,22 +225,23 @@ static int sun20i_d1_fdt_fixup(void *fdt, const struct fdt_match *match)
 
 static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
 {
-	unsigned long mip_val;
-
 	if (ctr_idx >= SBI_PMU_HW_CTR_MAX)
 		return;
 
-	mip_val = csr_read(CSR_MIP);
 	/**
 	 * Clear out the OF bit so that next interrupt can be enabled.
-	 * This should be done only when the corresponding overflow interrupt
-	 * bit is cleared. That indicates that software has already handled the
-	 * previous interrupts or the hardware yet to set an overflow interrupt.
-	 * Otherwise, there will be race conditions where we may clear the bit
-	 * the software is yet to handle the interrupt.
+	 * This should be done before starting interrupt to avoid unexcepted
+	 * overflow interrupt.
+	 */
+	csr_clear(THEAD_C9XX_CSR_MCOUNTEROF, BIT(ctr_idx));
+
+	/**
+	 * This register is described in C9xx document as the control register
+	 * for enabling writes to the superuser state counter. However, if the
+	 * corresponding bit is not set to 1, scounterof will always read as 0
+	 * when the counter register overflows.
 	 */
-	if (!(mip_val & THEAD_C9XX_MIP_MOIP))
-		csr_clear(THEAD_C9XX_CSR_MCOUNTEROF, BIT(ctr_idx));
+	csr_set(THEAD_C9XX_CSR_MCOUNTERWEN, BIT(ctr_idx));
 
 	/**
 	 * SSCOFPMF uses the OF bit for enabling/disabling the interrupt,
@@ -252,6 +253,10 @@ static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
 
 static void thead_c9xx_pmu_ctr_disable_irq(uint32_t ctr_idx)
 {
+	/**
+	 * There is no need to clear the bit of mcounterwen, it will expire
+	 * after setting the csr mcountinhibit.
+	 */
 	csr_clear(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
 }
 

From 901d3d7bff5a511b5f320aad8a0d65e79c95d09c Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Tue, 15 Aug 2023 17:40:33 +0800
Subject: [PATCH 1361/1765] lib: sbi_pmu: keep overflow interrupt of stopped
 hpm counter disabled

After the hardware hpm counter is stopped, it should not raise any new
interrupt as it is already stopped. So add the hw_counter_disable_irq
callback to allow the custom pmu device to control this behavior.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Samuel Holland <samuel@sholland.org>
---
 lib/sbi/sbi_pmu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index c52e8a29356..9694aae4fd3 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -482,6 +482,9 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
 	if (!__test_bit(cidx, &mctr_inhbt)) {
 		__set_bit(cidx, &mctr_inhbt);
 		csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
+		if (pmu_dev && pmu_dev->hw_counter_disable_irq) {
+			pmu_dev->hw_counter_disable_irq(cidx);
+		}
 		return 0;
 	} else
 		return SBI_EALREADY_STOPPED;

From cacfba32cc9541b7b9f838df43c1f2bd43222d3a Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 6 Sep 2023 21:10:03 +0800
Subject: [PATCH 1362/1765] platform: Allow platforms to specify the size of
 tlb fifo

For some platforms with a particularly high number of harts, if the
tlb fifo is too small, it case harts to wait. Platforms should be
allowed to specify the size of the tlb fifo.

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Xing Xiaoguang <xiaoguang.xing@sophgo.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h                   | 18 ++++++++++++++++++
 include/sbi/sbi_tlb.h                        |  2 --
 lib/sbi/sbi_tlb.c                            |  4 ++--
 platform/generic/include/platform_override.h |  1 +
 platform/generic/platform.c                  |  8 ++++++++
 5 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 3e9616f6daf..e6a4a3170a2 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -41,6 +41,7 @@
 #define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
+#define SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES				8
 
 #ifndef __ASSEMBLER__
 
@@ -125,6 +126,9 @@ struct sbi_platform_operations {
 	/** Get tlb flush limit value **/
 	u64 (*get_tlbr_flush_limit)(void);
 
+	/** Get tlb fifo num entries*/
+	u32 (*get_tlb_num_entries)(void);
+
 	/** Initialize platform timer for current HART */
 	int (*timer_init)(bool cold_boot);
 	/** Exit platform timer for current HART */
@@ -325,6 +329,20 @@ static inline u64 sbi_platform_tlbr_flush_limit(const struct sbi_platform *plat)
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
+/**
+ * Get platform specific tlb fifo num entries.
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return number of tlb fifo entries
+*/
+static inline u32 sbi_platform_tlb_fifo_num_entries(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->get_tlb_num_entries)
+		return sbi_platform_ops(plat)->get_tlb_num_entries();
+	return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+}
+
 /**
  * Get total number of HARTs supported by the platform
  *
diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 48f1962d7dc..55dcab0893c 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -20,8 +20,6 @@
 
 /* clang-format on */
 
-#define SBI_TLB_FIFO_NUM_ENTRIES		8
-
 struct sbi_scratch;
 
 struct sbi_tlb_info {
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 26a87f32930..92648da02be 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -422,7 +422,7 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 			return SBI_ENOMEM;
 		}
 		tlb_fifo_mem_off = sbi_scratch_alloc_offset(
-				SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE);
+				sbi_platform_tlb_fifo_num_entries(plat) * SBI_TLB_INFO_SIZE);
 		if (!tlb_fifo_mem_off) {
 			sbi_scratch_free_offset(tlb_fifo_off);
 			sbi_scratch_free_offset(tlb_sync_off);
@@ -453,7 +453,7 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 	ATOMIC_INIT(tlb_sync, 0);
 
 	sbi_fifo_init(tlb_q, tlb_mem,
-		      SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
+		      sbi_platform_tlb_fifo_num_entries(plat), SBI_TLB_INFO_SIZE);
 
 	return 0;
 }
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index 0d9e5ee6b40..bf4b1125877 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -18,6 +18,7 @@ struct platform_override {
 	const struct fdt_match *match_table;
 	u64 (*features)(const struct fdt_match *match);
 	u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+	u32 (*tlb_num_entries)(const struct fdt_match *match);
 	bool (*cold_boot_allowed)(u32 hartid, const struct fdt_match *match);
 	int (*early_init)(bool cold_boot, const struct fdt_match *match);
 	int (*final_init)(bool cold_boot, const struct fdt_match *match);
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 34b87f74d37..66a0b77c952 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -256,6 +256,13 @@ static u64 generic_tlbr_flush_limit(void)
 	return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
 }
 
+static u32 generic_tlb_num_entries(void)
+{
+	if (generic_plat && generic_plat->tlb_num_entries)
+		return generic_plat->tlb_num_entries(generic_plat_match);
+	return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+}
+
 static int generic_pmu_init(void)
 {
 	return fdt_pmu_setup(fdt_get_address());
@@ -308,6 +315,7 @@ const struct sbi_platform_operations platform_ops = {
 	.pmu_init		= generic_pmu_init,
 	.pmu_xlate_to_mhpmevent = generic_pmu_xlate_to_mhpmevent,
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
+	.get_tlb_num_entries	= generic_tlb_num_entries,
 	.timer_init		= fdt_timer_init,
 	.timer_exit		= fdt_timer_exit,
 	.vendor_ext_check	= generic_vendor_ext_check,

From 5bd969477f2c710ee5945f1a66cf534c478c48de Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 6 Sep 2023 21:10:04 +0800
Subject: [PATCH 1363/1765] lib: sbi: alloc tlb fifo by sbi_malloc

If the system is defined from tlb_fifo_num_entries, the scratch may be
too small to hold the fifo, so it is alloc through the heap.

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Xing Xiaoguang <xiaoguang.xing@sophgo.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_tlb.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 92648da02be..ee6a4fe9948 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_tlb.h>
@@ -421,8 +422,7 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 			sbi_scratch_free_offset(tlb_sync_off);
 			return SBI_ENOMEM;
 		}
-		tlb_fifo_mem_off = sbi_scratch_alloc_offset(
-				sbi_platform_tlb_fifo_num_entries(plat) * SBI_TLB_INFO_SIZE);
+		tlb_fifo_mem_off = sbi_scratch_alloc_offset(sizeof(tlb_mem));
 		if (!tlb_fifo_mem_off) {
 			sbi_scratch_free_offset(tlb_fifo_off);
 			sbi_scratch_free_offset(tlb_sync_off);
@@ -448,7 +448,14 @@ int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot)
 
 	tlb_sync = sbi_scratch_offset_ptr(scratch, tlb_sync_off);
 	tlb_q = sbi_scratch_offset_ptr(scratch, tlb_fifo_off);
-	tlb_mem = sbi_scratch_offset_ptr(scratch, tlb_fifo_mem_off);
+	tlb_mem = sbi_scratch_read_type(scratch, void *, tlb_fifo_mem_off);
+	if (!tlb_mem) {
+		tlb_mem = sbi_malloc(
+				sbi_platform_tlb_fifo_num_entries(plat) * SBI_TLB_INFO_SIZE);
+		if (!tlb_mem)
+			return SBI_ENOMEM;
+		sbi_scratch_write_type(scratch, void *, tlb_fifo_mem_off, tlb_mem);
+	}
 
 	ATOMIC_INIT(tlb_sync, 0);
 

From 130e65dd9d44c11ef3a3048eb9a491d33e5f14b8 Mon Sep 17 00:00:00 2001
From: Greentime Hu <greentime.hu@sifive.com>
Date: Wed, 6 Sep 2023 09:01:14 +0000
Subject: [PATCH 1364/1765] lib: sbi: Implement SET_FS_DIRTY() to make sure the
 mstatus FS dirty is set

We found the mstatus.FS status is not set correctly after the SET_F64_REG()
and SET_F32_REG(). We should set mstatus.FS dirty after we emulate the FPU
instructions.

Co-developed-by: Roy Lin <roy.lin@sifive.com>
Signed-off-by: Roy Lin <roy.lin@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_fp.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index b3dc08b9db6..3141c1c5b82 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -84,7 +84,7 @@
 #define GET_FFLAGS() csr_read(CSR_FFLAGS)
 #define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value))
 
-#define SET_FS_DIRTY() ((void)0)
+#define SET_FS_DIRTY(regs) (regs->mstatus |= MSTATUS_FS)
 
 #define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs))
 #define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs))
@@ -93,9 +93,9 @@
 #define GET_F64_RS2(insn, regs) (GET_F64_REG(insn, 20, regs))
 #define GET_F64_RS3(insn, regs) (GET_F64_REG(insn, 27, regs))
 #define SET_F32_RD(insn, regs, val) \
-	(SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY())
+	(SET_F32_REG(insn, 7, regs, val), SET_FS_DIRTY(regs))
 #define SET_F64_RD(insn, regs, val) \
-	(SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY())
+	(SET_F64_REG(insn, 7, regs, val), SET_FS_DIRTY(regs))
 
 #define GET_F32_RS2C(insn, regs) (GET_F32_REG(insn, 2, regs))
 #define GET_F32_RS2S(insn, regs) (GET_F32_REG(RVC_RS2S(insn), 0, regs))

From d1e4dff45b2d3ce2c88d09e98ae5795d323b2267 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 12 Sep 2022 09:50:43 +0530
Subject: [PATCH 1365/1765] lib: sbi: Introduce HART index in sbi_scratch

We introduce HART index and related helper functions in sbi_scratch
where HART index is contiguous and each HART index maps to a physical
HART id such that 0 <= HART index and HART index < SBI_HARTMASK_MAX_BITS.

The HART index to HART id mapping follows the index2id mapping provided
by the platform. If the platform does not provide index2id mapping then
identity mapping is assumed.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_scratch.h | 45 ++++++++++++++++++++++++++++++++++++---
 lib/sbi/sbi_scratch.c     | 37 +++++++++++++++++++++-----------
 2 files changed, 67 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 48014923e36..9a4dce16dca 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -202,12 +202,47 @@ do {									\
 					= (__type)(__ptr);		\
 } while (0)
 
-/** HART id to scratch table */
-extern struct sbi_scratch *hartid_to_scratch_table[];
+/** Last HART index having a sbi_scratch pointer */
+extern u32 last_hartindex_having_scratch;
+
+/** Get last HART index having a sbi_scratch pointer */
+#define sbi_scratch_last_hartindex()	last_hartindex_having_scratch
+
+/** Check whether a particular HART index is valid or not */
+#define sbi_hartindex_valid(__hartindex) \
+(((__hartindex) <= sbi_scratch_last_hartindex()) ? true : false)
+
+/** HART index to HART id table */
+extern u32 hartindex_to_hartid_table[];
+
+/** Get sbi_scratch from HART index */
+#define sbi_hartindex_to_hartid(__hartindex)		\
+({							\
+	((__hartindex) <= sbi_scratch_last_hartindex()) ?\
+	hartindex_to_hartid_table[__hartindex] : -1U;	\
+})
+
+/** HART index to scratch table */
+extern struct sbi_scratch *hartindex_to_scratch_table[];
+
+/** Get sbi_scratch from HART index */
+#define sbi_hartindex_to_scratch(__hartindex)		\
+({							\
+	((__hartindex) <= sbi_scratch_last_hartindex()) ?\
+	hartindex_to_scratch_table[__hartindex] : NULL;\
+})
+
+/**
+ * Get logical index for given HART id
+ * @param hartid physical HART id
+ * @returns value between 0 to SBI_HARTMASK_MAX_BITS upon success and
+ *	    SBI_HARTMASK_MAX_BITS upon failure.
+ */
+u32 sbi_hartid_to_hartindex(u32 hartid);
 
 /** Get sbi_scratch from HART id */
 #define sbi_hartid_to_scratch(__hartid) \
-	hartid_to_scratch_table[__hartid]
+	sbi_hartindex_to_scratch(sbi_hartid_to_hartindex(__hartid))
 
 /** Last HART id having a sbi_scratch pointer */
 extern u32 last_hartid_having_scratch;
@@ -215,6 +250,10 @@ extern u32 last_hartid_having_scratch;
 /** Get last HART id having a sbi_scratch pointer */
 #define sbi_scratch_last_hartid()	last_hartid_having_scratch
 
+/** Check whether particular HART id is valid or not */
+#define sbi_hartid_valid(__hartid)	\
+	sbi_hartindex_valid(sbi_hartid_to_hartindex(__hartid))
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index 87ef84cafd3..de2aa34d016 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -15,28 +15,41 @@
 #include <sbi/sbi_string.h>
 
 u32 last_hartid_having_scratch = SBI_HARTMASK_MAX_BITS - 1;
-struct sbi_scratch *hartid_to_scratch_table[SBI_HARTMASK_MAX_BITS] = { 0 };
+u32 last_hartindex_having_scratch = 0;
+u32 hartindex_to_hartid_table[SBI_HARTMASK_MAX_BITS + 1] = { -1U };
+struct sbi_scratch *hartindex_to_scratch_table[SBI_HARTMASK_MAX_BITS + 1] = { 0 };
 
 static spinlock_t extra_lock = SPIN_LOCK_INITIALIZER;
 static unsigned long extra_offset = SBI_SCRATCH_EXTRA_SPACE_OFFSET;
 
+u32 sbi_hartid_to_hartindex(u32 hartid)
+{
+	u32 i;
+
+	for (i = 0; i <= last_hartindex_having_scratch; i++)
+		if (hartindex_to_hartid_table[i] == hartid)
+			return i;
+
+	return -1U;
+}
+
 typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid, ulong hartindex);
 
 int sbi_scratch_init(struct sbi_scratch *scratch)
 {
-	u32 i;
+	u32 i, h;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		if (sbi_platform_hart_invalid(plat, i))
-			continue;
-		hartid_to_scratch_table[i] =
-			((hartid2scratch)scratch->hartid_to_scratch)(i,
-					sbi_platform_hart_index(plat, i));
-		if (hartid_to_scratch_table[i])
-			last_hartid_having_scratch = i;
+	for (i = 0; i < plat->hart_count; i++) {
+		h = (plat->hart_index2id) ? plat->hart_index2id[i] : i;
+		hartindex_to_hartid_table[i] = h;
+		hartindex_to_scratch_table[i] =
+			((hartid2scratch)scratch->hartid_to_scratch)(h, i);
+		last_hartid_having_scratch = h;
 	}
 
+	last_hartindex_having_scratch = plat->hart_count - 1;
+
 	return 0;
 }
 
@@ -74,8 +87,8 @@ unsigned long sbi_scratch_alloc_offset(unsigned long size)
 	spin_unlock(&extra_lock);
 
 	if (ret) {
-		for (i = 0; i <= sbi_scratch_last_hartid(); i++) {
-			rscratch = sbi_hartid_to_scratch(i);
+		for (i = 0; i <= sbi_scratch_last_hartindex(); i++) {
+			rscratch = sbi_hartindex_to_scratch(i);
 			if (!rscratch)
 				continue;
 			ptr = sbi_scratch_offset_ptr(rscratch, ret);

From e6125c3c4f53ba0c1029b06e17f38f3c982d9815 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 1 Sep 2023 14:43:34 +0530
Subject: [PATCH 1366/1765] lib: sbi: Remove sbi_platform_hart_index/invalid()
 functions

The hartid to hartindex mapping is now tracked in sbi_scratch so we
don't need sbi_platform_hart_index() and sbi_platform_hart_invalid()
functions hence let us remove them.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_platform.h | 28 ----------------------------
 lib/sbi/sbi_domain.c       |  5 ++---
 lib/sbi/sbi_init.c         | 12 +++++++++---
 lib/sbi/sbi_platform.c     | 17 -----------------
 4 files changed, 11 insertions(+), 51 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e6a4a3170a2..389203b02a4 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -262,16 +262,6 @@ _Static_assert(
 #define sbi_platform_has_mfaults_delegation(__p) \
 	((__p)->features & SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
-/**
- * Get HART index for the given HART
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return 0 <= value < hart_count for valid HART otherwise -1U
- */
-u32 sbi_platform_hart_index(const struct sbi_platform *plat, u32 hartid);
-
 /**
  * Get the platform features in string format
  *
@@ -371,24 +361,6 @@ static inline u32 sbi_platform_hart_stack_size(const struct sbi_platform *plat)
 	return 0;
 }
 
-/**
- * Check whether given HART is invalid
- *
- * @param plat pointer to struct sbi_platform
- * @param hartid HART ID
- *
- * @return true if HART is invalid and false otherwise
- */
-static inline bool sbi_platform_hart_invalid(const struct sbi_platform *plat,
-					     u32 hartid)
-{
-	if (!plat)
-		return true;
-	if (plat->hart_count <= sbi_platform_hart_index(plat, hartid))
-		return true;
-	return false;
-}
-
 /**
  * Check whether given HART is allowed to do cold boot
  *
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index acd0f74c301..77d6ca43193 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -277,7 +277,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 		return SBI_EINVAL;
 	}
 	sbi_hartmask_for_each_hart(i, dom->possible_harts) {
-		if (sbi_platform_hart_invalid(plat, i)) {
+		if (!sbi_hartid_valid(i)) {
 			sbi_printf("%s: %s possible HART mask has invalid "
 				   "hart %d\n", __func__, dom->name, i);
 			return SBI_EINVAL;
@@ -723,7 +723,6 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	int rc;
 	struct sbi_hartmask *root_hmask;
 	struct sbi_domain_memregion *root_memregs;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->fw_rw_offset == 0 ||
 	    (scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
@@ -798,7 +797,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	/* Root domain possible and assigned HARTs */
 	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		if (sbi_platform_hart_invalid(plat, i))
+		if (!sbi_hartid_valid(i))
 			continue;
 		sbi_hartmask_set_hart(i, root_hmask);
 	}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 252b41ace41..07be3d246c8 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -520,13 +520,19 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  */
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
+	u32 i, h;
+	bool hartid_valid		= false;
 	bool next_mode_supported	= false;
 	bool coldboot			= false;
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
-	    sbi_platform_hart_invalid(plat, hartid))
+	for (i = 0; i < plat->hart_count; i++) {
+		h = (plat->hart_index2id) ? plat->hart_index2id[i] : i;
+		if (h == hartid)
+			hartid_valid = true;
+	}
+	if (SBI_HARTMASK_MAX_BITS <= hartid || !hartid_valid)
 		sbi_hart_hang();
 
 	switch (scratch->next_mode) {
@@ -623,7 +629,7 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	if (sbi_platform_hart_invalid(plat, hartid))
+	if (!sbi_hartid_valid(hartid))
 		sbi_hart_hang();
 
 	sbi_platform_early_exit(plat);
diff --git a/lib/sbi/sbi_platform.c b/lib/sbi/sbi_platform.c
index 445a8c1631b..43fc88af906 100644
--- a/lib/sbi/sbi_platform.c
+++ b/lib/sbi/sbi_platform.c
@@ -71,20 +71,3 @@ void sbi_platform_get_features_str(const struct sbi_platform *plat,
 	else
 		sbi_strncpy(features_str, "none", nfstr);
 }
-
-u32 sbi_platform_hart_index(const struct sbi_platform *plat, u32 hartid)
-{
-	u32 i;
-
-	if (!plat)
-		return -1U;
-	if (plat->hart_index2id) {
-		for (i = 0; i < plat->hart_count; i++) {
-			if (plat->hart_index2id[i] == hartid)
-				return i;
-		}
-		return -1U;
-	}
-
-	return hartid;
-}

From 296e70d69da74b09426e4f565306f26e9a6c79f8 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 31 Aug 2023 11:39:30 +0800
Subject: [PATCH 1367/1765] lib: sbi: Extend sbi_hartmask to support both
 hartid and hartindex

Currently, the sbi_hartmask is indexed by hartid which puts a
limit on hartid to be less than SBI_HARTMASK_MAX_BITS.

We extend the sbi_hartmask implementation to use hartindex and
support updating sbi_hartmask using hartid. This removes the
limit on hartid and existing code works largely unmodified.

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_hartmask.h | 88 ++++++++++++++++++++++++++++++--------
 lib/sbi/sbi_domain.c       | 47 ++++++++------------
 lib/sbi/sbi_init.c         |  8 ++--
 lib/sbi/sbi_ipi.c          | 10 ++---
 lib/sbi/sbi_system.c       |  4 +-
 lib/sbi/sbi_tlb.c          |  4 +-
 lib/utils/fdt/fdt_domain.c |  4 +-
 7 files changed, 105 insertions(+), 60 deletions(-)

diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h
index f1cef0c2a07..105653e1446 100644
--- a/include/sbi/sbi_hartmask.h
+++ b/include/sbi/sbi_hartmask.h
@@ -11,6 +11,7 @@
 #define __SBI_HARTMASK_H__
 
 #include <sbi/sbi_bitmap.h>
+#include <sbi/sbi_scratch.h>
 
 /**
  * Maximum number of bits in a hartmask
@@ -32,7 +33,10 @@ struct sbi_hartmask {
 
 /** Initialize hartmask to zero except a particular HART id */
 #define SBI_HARTMASK_INIT_EXCEPT(__m, __h)	\
-	bitmap_zero_except(((__m)->bits), (__h), SBI_HARTMASK_MAX_BITS)
+	do { \
+		u32 __i = sbi_hartid_to_hartindex(__h); \
+		bitmap_zero_except(((__m)->bits), __i, SBI_HARTMASK_MAX_BITS); \
+	} while(0)
 
 /**
  * Get underlying bitmap of hartmask
@@ -41,39 +45,70 @@ struct sbi_hartmask {
 #define sbi_hartmask_bits(__m)		((__m)->bits)
 
 /**
- * Set a HART in hartmask
+ * Set a HART index in hartmask
+ * @param i HART index to set
+ * @param m the hartmask pointer
+ */
+static inline void sbi_hartmask_set_hartindex(u32 i, struct sbi_hartmask *m)
+{
+	if (i < SBI_HARTMASK_MAX_BITS)
+		__set_bit(i, m->bits);
+}
+
+/**
+ * Set a HART id in hartmask
  * @param h HART id to set
  * @param m the hartmask pointer
  */
-static inline void sbi_hartmask_set_hart(u32 h, struct sbi_hartmask *m)
+static inline void sbi_hartmask_set_hartid(u32 h, struct sbi_hartmask *m)
+{
+	sbi_hartmask_set_hartindex(sbi_hartid_to_hartindex(h), m);
+}
+
+/**
+ * Clear a HART index in hartmask
+ * @param i HART index to clear
+ * @param m the hartmask pointer
+ */
+static inline void sbi_hartmask_clear_hartindex(u32 i, struct sbi_hartmask *m)
 {
-	if (h < SBI_HARTMASK_MAX_BITS)
-		__set_bit(h, m->bits);
+	if (i < SBI_HARTMASK_MAX_BITS)
+		__clear_bit(i, m->bits);
 }
 
 /**
- * Clear a HART in hartmask
+ * Clear a HART id in hartmask
  * @param h HART id to clear
  * @param m the hartmask pointer
  */
-static inline void sbi_hartmask_clear_hart(u32 h, struct sbi_hartmask *m)
+static inline void sbi_hartmask_clear_hartid(u32 h, struct sbi_hartmask *m)
 {
-	if (h < SBI_HARTMASK_MAX_BITS)
-		__clear_bit(h, m->bits);
+	sbi_hartmask_clear_hartindex(sbi_hartid_to_hartindex(h), m);
 }
 
 /**
- * Test a HART in hartmask
- * @param h HART id to test
+ * Test a HART index in hartmask
+ * @param i HART index to test
  * @param m the hartmask pointer
  */
-static inline int sbi_hartmask_test_hart(u32 h, const struct sbi_hartmask *m)
+static inline int sbi_hartmask_test_hartindex(u32 i,
+					      const struct sbi_hartmask *m)
 {
-	if (h < SBI_HARTMASK_MAX_BITS)
-		return __test_bit(h, m->bits);
+	if (i < SBI_HARTMASK_MAX_BITS)
+		return __test_bit(i, m->bits);
 	return 0;
 }
 
+/**
+ * Test a HART id in hartmask
+ * @param h HART id to test
+ * @param m the hartmask pointer
+ */
+static inline int sbi_hartmask_test_hartid(u32 h, const struct sbi_hartmask *m)
+{
+	return sbi_hartmask_test_hartindex(sbi_hartid_to_hartindex(h), m);
+}
+
 /**
  * Set all HARTs in a hartmask
  * @param dstp the hartmask pointer
@@ -134,8 +169,27 @@ static inline void sbi_hartmask_xor(struct sbi_hartmask *dstp,
 		   sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
 }
 
-/** Iterate over each HART in hartmask */
-#define sbi_hartmask_for_each_hart(__h, __m)	\
-	for_each_set_bit(__h, (__m)->bits, SBI_HARTMASK_MAX_BITS)
+/**
+ * Iterate over each HART in hartmask
+ * __h hart id
+ * __i hart index
+ * __m hartmask
+*/
+#define sbi_hartmask_for_each_hart(__h, __i, __m) \
+	for((__i) = find_first_bit((__m)->bits, SBI_HARTMASK_MAX_BITS), \
+		(__h) = sbi_hartindex_to_hartid(__i); \
+		(__i) < SBI_HARTMASK_MAX_BITS; \
+		(__i) = find_next_bit((__m)->bits, SBI_HARTMASK_MAX_BITS, (__i) + 1), \
+		(__h) = sbi_hartindex_to_hartid(__i))
+
+/**
+ * Iterate over each HART index in hartmask
+ * __i hart index
+ * __m hartmask
+*/
+#define sbi_hartmask_for_each_hartindex(__i, __m) \
+	for((__i) = find_first_bit((__m)->bits, SBI_HARTMASK_MAX_BITS); \
+		(__i) < SBI_HARTMASK_MAX_BITS; \
+		(__i) = find_next_bit((__m)->bits, SBI_HARTMASK_MAX_BITS, (__i) + 1))
 
 #endif
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 77d6ca43193..ee3a5e948b9 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -65,7 +65,7 @@ static void update_hartid_to_domain(u32 hartid, struct sbi_domain *dom)
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 {
 	if (dom)
-		return sbi_hartmask_test_hart(hartid, &dom->assigned_harts);
+		return sbi_hartmask_test_hartid(hartid, &dom->assigned_harts);
 
 	return false;
 }
@@ -73,18 +73,10 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 				       ulong hbase)
 {
-	ulong ret, bword, boff;
-
-	if (!dom)
-		return 0;
-
-	bword = BIT_WORD(hbase);
-	boff = BIT_WORD_OFFSET(hbase);
-
-	ret = sbi_hartmask_bits(&dom->assigned_harts)[bword++] >> boff;
-	if (boff && bword < BIT_WORD(SBI_HARTMASK_MAX_BITS)) {
-		ret |= (sbi_hartmask_bits(&dom->assigned_harts)[bword] &
-			(BIT(boff) - 1UL)) << (BITS_PER_LONG - boff);
+	ulong ret = 0;
+	for (int i = 0; i < 8 * sizeof(ret); i++) {
+		if (sbi_domain_is_assigned_hart(dom, hbase + i))
+			ret |= 1 << i;
 	}
 
 	return ret;
@@ -276,7 +268,7 @@ static int sanitize_domain(const struct sbi_platform *plat,
 			   __func__, dom->name);
 		return SBI_EINVAL;
 	}
-	sbi_hartmask_for_each_hart(i, dom->possible_harts) {
+	sbi_hartmask_for_each_hart(i, j, dom->possible_harts) {
 		if (!sbi_hartid_valid(i)) {
 			sbi_printf("%s: %s possible HART mask has invalid "
 				   "hart %d\n", __func__, dom->name, i);
@@ -400,7 +392,7 @@ bool sbi_domain_check_addr_range(const struct sbi_domain *dom,
 
 void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 {
-	u32 i, k;
+	u32 i, j, k;
 	unsigned long rstart, rend;
 	struct sbi_domain_memregion *reg;
 
@@ -412,7 +404,7 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 
 	k = 0;
 	sbi_printf("Domain%d HARTs       %s: ", dom->index, suffix);
-	sbi_hartmask_for_each_hart(i, dom->possible_harts)
+	sbi_hartmask_for_each_hart(i, j, dom->possible_harts)
 		sbi_printf("%s%d%s", (k++) ? "," : "",
 			   i, sbi_domain_is_assigned_hart(dom, i) ? "*" : "");
 	sbi_printf("\n");
@@ -495,7 +487,7 @@ void sbi_domain_dump_all(const char *suffix)
 int sbi_domain_register(struct sbi_domain *dom,
 			const struct sbi_hartmask *assign_mask)
 {
-	u32 i;
+	u32 i, j;
 	int rc;
 	struct sbi_domain *tdom;
 	u32 cold_hartid = current_hartid();
@@ -538,16 +530,16 @@ int sbi_domain_register(struct sbi_domain *dom,
 	sbi_hartmask_clear_all(&dom->assigned_harts);
 
 	/* Assign domain to HART if HART is a possible HART */
-	sbi_hartmask_for_each_hart(i, assign_mask) {
-		if (!sbi_hartmask_test_hart(i, dom->possible_harts))
+	sbi_hartmask_for_each_hart(i, j, assign_mask) {
+		if (!sbi_hartmask_test_hartid(i, dom->possible_harts))
 			continue;
 
 		tdom = sbi_hartid_to_domain(i);
 		if (tdom)
-			sbi_hartmask_clear_hart(i,
+			sbi_hartmask_clear_hartid(i,
 					&tdom->assigned_harts);
 		update_hartid_to_domain(i, dom);
-		sbi_hartmask_set_hart(i, &dom->assigned_harts);
+		sbi_hartmask_set_hartid(i, &dom->assigned_harts);
 
 		/*
 		 * If cold boot HART is assigned to this domain then
@@ -681,12 +673,12 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 			continue;
 
 		/* Ignore if boot HART not possible for this domain */
-		if (!sbi_hartmask_test_hart(dhart, dom->possible_harts))
+		if (!sbi_hartmask_test_hartid(dhart, dom->possible_harts))
 			continue;
 
 		/* Ignore if boot HART assigned different domain */
 		if (sbi_hartid_to_domain(dhart) != dom ||
-		    !sbi_hartmask_test_hart(dhart, &dom->assigned_harts))
+		    !sbi_hartmask_test_hartid(dhart, &dom->assigned_harts))
 			continue;
 
 		/* Startup boot HART of domain */
@@ -723,6 +715,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	int rc;
 	struct sbi_hartmask *root_hmask;
 	struct sbi_domain_memregion *root_memregs;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->fw_rw_offset == 0 ||
 	    (scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
@@ -796,11 +789,9 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	root.next_mode = scratch->next_mode;
 
 	/* Root domain possible and assigned HARTs */
-	for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
-		if (!sbi_hartid_valid(i))
-			continue;
-		sbi_hartmask_set_hart(i, root_hmask);
-	}
+	for (i = 0; i < plat->hart_count; i++)
+		sbi_hartmask_set_hartid(sbi_hartindex_to_hartid(i),
+					root_hmask);
 
 	/* Finally register the root domain */
 	rc = sbi_domain_register(&root, root_hmask);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 07be3d246c8..10dbd0af95c 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -205,7 +205,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	spin_lock(&coldboot_lock);
 
 	/* Mark current HART as waiting */
-	sbi_hartmask_set_hart(hartid, &coldboot_wait_hmask);
+	sbi_hartmask_set_hartid(hartid, &coldboot_wait_hmask);
 
 	/* Release coldboot lock */
 	spin_unlock(&coldboot_lock);
@@ -222,7 +222,7 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	spin_lock(&coldboot_lock);
 
 	/* Unmark current HART as waiting */
-	sbi_hartmask_clear_hart(hartid, &coldboot_wait_hmask);
+	sbi_hartmask_clear_hartid(hartid, &coldboot_wait_hmask);
 
 	/* Release coldboot lock */
 	spin_unlock(&coldboot_lock);
@@ -251,7 +251,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	/* Send an IPI to all HARTs waiting for coldboot */
 	for (u32 i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&
-		    sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
+		    sbi_hartmask_test_hartid(i, &coldboot_wait_hmask))
 			sbi_ipi_raw_send(i);
 	}
 
@@ -532,7 +532,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 		if (h == hartid)
 			hartid_valid = true;
 	}
-	if (SBI_HARTMASK_MAX_BITS <= hartid || !hartid_valid)
+	if (!hartid_valid)
 		sbi_hart_hang();
 
 	switch (scratch->next_mode) {
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 0d8edab020f..ee59d28edbb 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -101,7 +101,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
 	bool retry_needed;
-	ulong i, m;
+	ulong i, j, m;
 	struct sbi_hartmask target_mask = {0};
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -115,14 +115,14 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 
 		for (i = hbase; m; i++, m >>= 1) {
 			if (m & 1UL)
-				sbi_hartmask_set_hart(i, &target_mask);
+				sbi_hartmask_set_hartid(i, &target_mask);
 		}
 	} else {
 		hbase = 0;
 		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
 			for (i = hbase; m; i++, m >>= 1) {
 				if (m & 1UL)
-					sbi_hartmask_set_hart(i, &target_mask);
+					sbi_hartmask_set_hartid(i, &target_mask);
 			}
 			hbase += BITS_PER_LONG;
 		}
@@ -131,12 +131,12 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 	/* Send IPIs */
 	do {
 		retry_needed = false;
-		sbi_hartmask_for_each_hart(i, &target_mask) {
+		sbi_hartmask_for_each_hart(i, j, &target_mask) {
 			rc = sbi_ipi_send(scratch, i, event, data);
 			if (rc == SBI_IPI_UPDATE_RETRY)
 				retry_needed = true;
 			else
-				sbi_hartmask_clear_hart(i, &target_mask);
+				sbi_hartmask_clear_hartid(i, &target_mask);
 		}
 	} while (retry_needed);
 
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 2e917c9e913..bae973041d2 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -152,7 +152,7 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 	unsigned int hartid = current_hartid();
 	unsigned long prev_mode;
-	unsigned long i;
+	unsigned long i, j;
 	int ret;
 
 	if (!dom || !dom->system_suspend_allowed)
@@ -170,7 +170,7 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_EFAIL;
 
-	sbi_hartmask_for_each_hart(i, &dom->assigned_harts) {
+	sbi_hartmask_for_each_hart(i, j, &dom->assigned_harts) {
 		if (i == hartid)
 			continue;
 		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED)
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index ee6a4fe9948..0573bb19037 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -214,13 +214,13 @@ static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
 
 static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
-	u32 rhartid;
+	u32 rhartid, rindex;
 	struct sbi_scratch *rscratch = NULL;
 	atomic_t *rtlb_sync = NULL;
 
 	tinfo->local_fn(tinfo);
 
-	sbi_hartmask_for_each_hart(rhartid, &tinfo->smask) {
+	sbi_hartmask_for_each_hart(rhartid, rindex, &tinfo->smask) {
 		rscratch = sbi_hartid_to_scratch(rhartid);
 		if (!rscratch)
 			continue;
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 788683d27c1..fa1c35759ba 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -342,7 +342,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 			if (!fdt_node_is_enabled(fdt, cpu_offset))
 				continue;
 
-			sbi_hartmask_set_hart(val32, mask);
+			sbi_hartmask_set_hartid(val32, mask);
 		}
 	}
 
@@ -472,7 +472,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 		}
 
 		if (doffset == domain_offset)
-			sbi_hartmask_set_hart(val32, &assign_mask);
+			sbi_hartmask_set_hartid(val32, &assign_mask);
 	}
 
 	/* Register the domain */

From e632cd7c816736dc9dab7597b59f9f77a7925fb3 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 1 Sep 2023 16:59:58 +0530
Subject: [PATCH 1368/1765] lib: sbi: Use sbi_scratch_last_hartindex() in
 remote TLB managment

The sbi_hartid_to_scratch() involves translating hartid to hartindex
which is expensive so let's use sbi_hartindex_to_scratch() instead.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_tlb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index 0573bb19037..bfcb4d83270 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -214,14 +214,14 @@ static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
 
 static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 {
-	u32 rhartid, rindex;
+	u32 rindex;
 	struct sbi_scratch *rscratch = NULL;
 	atomic_t *rtlb_sync = NULL;
 
 	tinfo->local_fn(tinfo);
 
-	sbi_hartmask_for_each_hart(rhartid, rindex, &tinfo->smask) {
-		rscratch = sbi_hartid_to_scratch(rhartid);
+	sbi_hartmask_for_each_hartindex(rindex, &tinfo->smask) {
+		rscratch = sbi_hartindex_to_scratch(rindex);
 		if (!rscratch)
 			continue;
 

From 78c667b6fc07d2ea783fbd18f43a3f8191de6164 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 1 Sep 2023 17:41:07 +0530
Subject: [PATCH 1369/1765] lib: sbi: Prefer hartindex over hartid in IPI
 framework

Let us prefer hartindex over hartid in IPI framework which in-turn
forces IPI users to also prefer hartindex.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_ipi.h          | 14 +++++++-------
 lib/sbi/sbi_hsm.c              |  2 +-
 lib/sbi/sbi_init.c             |  4 ++--
 lib/sbi/sbi_ipi.c              | 26 +++++++++++++-------------
 lib/sbi/sbi_tlb.c              |  8 ++++----
 lib/utils/ipi/aclint_mswi.c    | 14 ++++++++------
 lib/utils/ipi/andes_plicsw.c   |  8 ++++++--
 lib/utils/irqchip/imsic.c      |  4 ++--
 platform/generic/andes/ae350.c |  2 +-
 9 files changed, 44 insertions(+), 38 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 6b5e260b78c..d396233487e 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -23,11 +23,11 @@ struct sbi_ipi_device {
 	/** Name of the IPI device */
 	char name[32];
 
-	/** Send IPI to a target HART */
-	void (*ipi_send)(u32 target_hart);
+	/** Send IPI to a target HART index */
+	void (*ipi_send)(u32 hart_index);
 
-	/** Clear IPI for a target HART */
-	void (*ipi_clear)(u32 target_hart);
+	/** Clear IPI for a target HART index */
+	void (*ipi_clear)(u32 hart_index);
 };
 
 enum sbi_ipi_update_type {
@@ -54,7 +54,7 @@ struct sbi_ipi_event_ops {
 	 */
 	int (* update)(struct sbi_scratch *scratch,
 			struct sbi_scratch *remote_scratch,
-			u32 remote_hartid, void *data);
+			u32 remote_hartindex, void *data);
 
 	/**
 	 * Sync callback to wait for remote HART
@@ -85,9 +85,9 @@ int sbi_ipi_send_halt(ulong hmask, ulong hbase);
 
 void sbi_ipi_process(void);
 
-int sbi_ipi_raw_send(u32 target_hart);
+int sbi_ipi_raw_send(u32 hartindex);
 
-void sbi_ipi_raw_clear(u32 target_hart);
+void sbi_ipi_raw_clear(u32 hartindex);
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void);
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index f870ca72baf..814130e18a5 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -356,7 +356,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
 		rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
-		rc = sbi_ipi_raw_send(hartid);
+		rc = sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
 	}
 
 	if (!rc)
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 10dbd0af95c..a6d96e66a09 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -252,7 +252,7 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	for (u32 i = 0; i <= sbi_scratch_last_hartid(); i++) {
 		if ((i != hartid) &&
 		    sbi_hartmask_test_hartid(i, &coldboot_wait_hmask))
-			sbi_ipi_raw_send(i);
+			sbi_ipi_raw_send(sbi_hartid_to_hartindex(i));
 	}
 
 	/* Release coldboot lock */
@@ -499,7 +499,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (hstate == SBI_HSM_STATE_SUSPENDED) {
 		init_warm_resume(scratch, hartid);
 	} else {
-		sbi_ipi_raw_clear(hartid);
+		sbi_ipi_raw_clear(sbi_hartid_to_hartindex(hartid));
 		init_warm_startup(scratch, hartid);
 	}
 }
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index ee59d28edbb..5571b37bdf6 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -36,7 +36,7 @@ static unsigned long ipi_data_off;
 static const struct sbi_ipi_device *ipi_dev = NULL;
 static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];
 
-static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
+static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 			u32 event, void *data)
 {
 	int ret;
@@ -49,7 +49,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 		return SBI_EINVAL;
 	ipi_ops = ipi_ops_array[event];
 
-	remote_scratch = sbi_hartid_to_scratch(remote_hartid);
+	remote_scratch = sbi_hartindex_to_scratch(remote_hartindex);
 	if (!remote_scratch)
 		return SBI_EINVAL;
 
@@ -57,7 +57,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 
 	if (ipi_ops->update) {
 		ret = ipi_ops->update(scratch, remote_scratch,
-				      remote_hartid, data);
+				      remote_hartindex, data);
 		if (ret != SBI_IPI_UPDATE_SUCCESS)
 			return ret;
 	}
@@ -70,7 +70,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
 	smp_wmb();
 
 	if (ipi_dev && ipi_dev->ipi_send)
-		ipi_dev->ipi_send(remote_hartid);
+		ipi_dev->ipi_send(remote_hartindex);
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
 
@@ -101,7 +101,7 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc;
 	bool retry_needed;
-	ulong i, j, m;
+	ulong i, m;
 	struct sbi_hartmask target_mask = {0};
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -131,12 +131,12 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 	/* Send IPIs */
 	do {
 		retry_needed = false;
-		sbi_hartmask_for_each_hart(i, j, &target_mask) {
+		sbi_hartmask_for_each_hartindex(i, &target_mask) {
 			rc = sbi_ipi_send(scratch, i, event, data);
 			if (rc == SBI_IPI_UPDATE_RETRY)
 				retry_needed = true;
 			else
-				sbi_hartmask_clear_hartid(i, &target_mask);
+				sbi_hartmask_clear_hartindex(i, &target_mask);
 		}
 	} while (retry_needed);
 
@@ -219,11 +219,11 @@ void sbi_ipi_process(void)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
-	u32 hartid = current_hartid();
+	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
 	if (ipi_dev && ipi_dev->ipi_clear)
-		ipi_dev->ipi_clear(hartid);
+		ipi_dev->ipi_clear(hartindex);
 
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
 	ipi_event = 0;
@@ -238,19 +238,19 @@ void sbi_ipi_process(void)
 	}
 }
 
-int sbi_ipi_raw_send(u32 target_hart)
+int sbi_ipi_raw_send(u32 hartindex)
 {
 	if (!ipi_dev || !ipi_dev->ipi_send)
 		return SBI_EINVAL;
 
-	ipi_dev->ipi_send(target_hart);
+	ipi_dev->ipi_send(hartindex);
 	return 0;
 }
 
-void sbi_ipi_raw_clear(u32 target_hart)
+void sbi_ipi_raw_clear(u32 hartindex)
 {
 	if (ipi_dev && ipi_dev->ipi_clear)
-		ipi_dev->ipi_clear(target_hart);
+		ipi_dev->ipi_clear(hartindex);
 }
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void)
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index bfcb4d83270..ced2854256c 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -334,7 +334,7 @@ static int tlb_update_cb(void *in, void *data)
 
 static int tlb_update(struct sbi_scratch *scratch,
 			  struct sbi_scratch *remote_scratch,
-			  u32 remote_hartid, void *data)
+			  u32 remote_hartindex, void *data)
 {
 	int ret;
 	atomic_t *tlb_sync;
@@ -356,7 +356,7 @@ static int tlb_update(struct sbi_scratch *scratch,
 	 * If the request is to queue a tlb flush entry for itself
 	 * then just do a local flush and return;
 	 */
-	if (remote_hartid == curr_hartid) {
+	if (sbi_hartindex_to_hartid(remote_hartindex) == curr_hartid) {
 		tinfo->local_fn(tinfo);
 		return SBI_IPI_UPDATE_BREAK;
 	}
@@ -375,8 +375,8 @@ static int tlb_update(struct sbi_scratch *scratch,
 		 * this properly.
 		 */
 		tlb_process_once(scratch);
-		sbi_dprintf("hart%d: hart%d tlb fifo full\n",
-			    curr_hartid, remote_hartid);
+		sbi_dprintf("hart%d: hart%d tlb fifo full\n", curr_hartid,
+			    sbi_hartindex_to_hartid(remote_hartindex));
 		return SBI_IPI_UPDATE_RETRY;
 	}
 
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 140a49b5f52..a3bfb4a9e3b 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -25,13 +25,13 @@ static unsigned long mswi_ptr_offset;
 #define mswi_set_hart_data_ptr(__scratch, __mswi)			\
 	sbi_scratch_write_type((__scratch), void *, mswi_ptr_offset, (__mswi))
 
-static void mswi_ipi_send(u32 target_hart)
+static void mswi_ipi_send(u32 hart_index)
 {
 	u32 *msip;
 	struct sbi_scratch *scratch;
 	struct aclint_mswi_data *mswi;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
+	scratch = sbi_hartindex_to_scratch(hart_index);
 	if (!scratch)
 		return;
 
@@ -41,16 +41,17 @@ static void mswi_ipi_send(u32 target_hart)
 
 	/* Set ACLINT IPI */
 	msip = (void *)mswi->addr;
-	writel(1, &msip[target_hart - mswi->first_hartid]);
+	writel(1, &msip[sbi_hartindex_to_hartid(hart_index) -
+			mswi->first_hartid]);
 }
 
-static void mswi_ipi_clear(u32 target_hart)
+static void mswi_ipi_clear(u32 hart_index)
 {
 	u32 *msip;
 	struct sbi_scratch *scratch;
 	struct aclint_mswi_data *mswi;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
+	scratch = sbi_hartindex_to_scratch(hart_index);
 	if (!scratch)
 		return;
 
@@ -60,7 +61,8 @@ static void mswi_ipi_clear(u32 target_hart)
 
 	/* Clear ACLINT IPI */
 	msip = (void *)mswi->addr;
-	writel(0, &msip[target_hart - mswi->first_hartid]);
+	writel(0, &msip[sbi_hartindex_to_hartid(hart_index) -
+			mswi->first_hartid]);
 }
 
 static struct sbi_ipi_device aclint_mswi = {
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index db25ae239e1..dde39c045a8 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -68,8 +68,10 @@ static inline void plic_sw_pending(u32 target_hart)
 	writel(val, (void *)plicsw.addr + PLICSW_PENDING_BASE + word_index * 4);
 }
 
-static void plicsw_ipi_send(u32 target_hart)
+static void plicsw_ipi_send(u32 hart_index)
 {
+	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
+
 	if (plicsw.hart_count <= target_hart)
 		ebreak();
 
@@ -77,8 +79,10 @@ static void plicsw_ipi_send(u32 target_hart)
 	plic_sw_pending(target_hart);
 }
 
-static void plicsw_ipi_clear(u32 target_hart)
+static void plicsw_ipi_clear(u32 hart_index)
 {
+	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
+
 	if (plicsw.hart_count <= target_hart)
 		ebreak();
 
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 7fc61d9e8a2..78f5895ac54 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -161,7 +161,7 @@ static int imsic_external_irqfn(struct sbi_trap_regs *regs)
 	return 0;
 }
 
-static void imsic_ipi_send(u32 target_hart)
+static void imsic_ipi_send(u32 hart_index)
 {
 	unsigned long reloff;
 	struct imsic_regs *regs;
@@ -169,7 +169,7 @@ static void imsic_ipi_send(u32 target_hart)
 	struct sbi_scratch *scratch;
 	int file;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
+	scratch = sbi_hartindex_to_scratch(hart_index);
 	if (!scratch)
 		return;
 
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 01bd02d5b96..80eca056121 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -33,7 +33,7 @@ static int ae350_hart_start(u32 hartid, ulong saddr)
 {
 	/* Don't send wakeup command at boot-time */
 	if (!sbi_init_count(hartid) || (is_andes25() && hartid == 0))
-		return sbi_ipi_raw_send(hartid);
+		return sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
 
 	/* Write wakeup command to the sleep hart */
 	smu_set_command(&smu, WAKEUP_CMD, hartid);

From 22d6ff86750e0e40ff5966dc4671e2845b0536cb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 1 Sep 2023 21:41:48 +0530
Subject: [PATCH 1370/1765] lib: sbi: Remove sbi_scratch_last_hartid() macro

The sbi_scratch_last_hartid() macro is not of much use on platforms
with really sparse hartids so let us replace use of this macro with
other approaches.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_scratch.h |  6 ------
 lib/sbi/sbi_hsm.c         | 28 +++++++++++++---------------
 lib/sbi/sbi_init.c        | 10 ++++++----
 lib/sbi/sbi_scratch.c     |  2 --
 4 files changed, 19 insertions(+), 27 deletions(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 9a4dce16dca..e6a33bab58f 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -244,12 +244,6 @@ u32 sbi_hartid_to_hartindex(u32 hartid);
 #define sbi_hartid_to_scratch(__hartid) \
 	sbi_hartindex_to_scratch(sbi_hartid_to_hartindex(__hartid))
 
-/** Last HART id having a sbi_scratch pointer */
-extern u32 last_hartid_having_scratch;
-
-/** Get last HART id having a sbi_scratch pointer */
-#define sbi_scratch_last_hartid()	last_hartid_having_scratch
-
 /** Check whether particular HART id is valid or not */
 #define sbi_hartid_valid(__hartid)	\
 	sbi_hartindex_valid(sbi_hartid_to_hartindex(__hartid))
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 814130e18a5..147f954e328 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -115,23 +115,21 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 {
 	int hstate;
 	ulong i, hmask, dmask;
-	ulong hend = sbi_scratch_last_hartid() + 1;
 
 	*out_hmask = 0;
-	if (hend <= hbase)
+	if (!sbi_hartid_valid(hbase))
 		return SBI_EINVAL;
-	if (BITS_PER_LONG < (hend - hbase))
-		hend = hbase + BITS_PER_LONG;
 
 	dmask = sbi_domain_get_assigned_hartmask(dom, hbase);
-	for (i = hbase; i < hend; i++) {
-		hmask = 1UL << (i - hbase);
-		if (dmask & hmask) {
-			hstate = __sbi_hsm_hart_get_state(i);
-			if (hstate == SBI_HSM_STATE_STARTED ||
-			    hstate == SBI_HSM_STATE_SUSPENDED)
-				*out_hmask |= hmask;
-		}
+	for (i = 0; i < BITS_PER_LONG; i++) {
+		hmask = 1UL << i;
+		if (!(dmask & hmask))
+			continue;
+
+		hstate = __sbi_hsm_hart_get_state(hbase + i);
+		if (hstate == SBI_HSM_STATE_STARTED ||
+		    hstate == SBI_HSM_STATE_SUSPENDED)
+			*out_hmask |= hmask;
 	}
 
 	return 0;
@@ -249,15 +247,15 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 			return SBI_ENOMEM;
 
 		/* Initialize hart state data for every hart */
-		for (i = 0; i <= sbi_scratch_last_hartid(); i++) {
-			rscratch = sbi_hartid_to_scratch(i);
+		for (i = 0; i <= sbi_scratch_last_hartindex(); i++) {
+			rscratch = sbi_hartindex_to_scratch(i);
 			if (!rscratch)
 				continue;
 
 			hdata = sbi_scratch_offset_ptr(rscratch,
 						       hart_data_offset);
 			ATOMIC_INIT(&hdata->state,
-				    (i == hartid) ?
+				    (sbi_hartindex_to_hartid(i) == hartid) ?
 				    SBI_HSM_STATE_START_PENDING :
 				    SBI_HSM_STATE_STOPPED);
 			ATOMIC_INIT(&hdata->start_ticket, 0);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index a6d96e66a09..e723553fc26 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -242,6 +242,8 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
+	u32 i, hartindex = sbi_hartid_to_hartindex(hartid);
+
 	/* Mark coldboot done */
 	__smp_store_release(&coldboot_done, 1);
 
@@ -249,10 +251,10 @@ static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 	spin_lock(&coldboot_lock);
 
 	/* Send an IPI to all HARTs waiting for coldboot */
-	for (u32 i = 0; i <= sbi_scratch_last_hartid(); i++) {
-		if ((i != hartid) &&
-		    sbi_hartmask_test_hartid(i, &coldboot_wait_hmask))
-			sbi_ipi_raw_send(sbi_hartid_to_hartindex(i));
+	sbi_hartmask_for_each_hartindex(i, &coldboot_wait_hmask) {
+		if (i == hartindex)
+			continue;
+		sbi_ipi_raw_send(i);
 	}
 
 	/* Release coldboot lock */
diff --git a/lib/sbi/sbi_scratch.c b/lib/sbi/sbi_scratch.c
index de2aa34d016..ccbbc68e12f 100644
--- a/lib/sbi/sbi_scratch.c
+++ b/lib/sbi/sbi_scratch.c
@@ -14,7 +14,6 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
-u32 last_hartid_having_scratch = SBI_HARTMASK_MAX_BITS - 1;
 u32 last_hartindex_having_scratch = 0;
 u32 hartindex_to_hartid_table[SBI_HARTMASK_MAX_BITS + 1] = { -1U };
 struct sbi_scratch *hartindex_to_scratch_table[SBI_HARTMASK_MAX_BITS + 1] = { 0 };
@@ -45,7 +44,6 @@ int sbi_scratch_init(struct sbi_scratch *scratch)
 		hartindex_to_hartid_table[i] = h;
 		hartindex_to_scratch_table[i] =
 			((hartid2scratch)scratch->hartid_to_scratch)(h, i);
-		last_hartid_having_scratch = h;
 	}
 
 	last_hartindex_having_scratch = plat->hart_count - 1;

From 112daa2e647cb819834b84abd77cd8cdfc3bfee3 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sat, 2 Sep 2023 16:16:20 +0530
Subject: [PATCH 1371/1765] lib: sbi: Maximize the use of HART index in
 sbi_domain

Let us maximize the use of HART index in sbi_domain because hartindex
based hartmask access and sbi_scratch lookup is faster.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_domain.h |  6 ++---
 lib/sbi/sbi_domain.c     | 56 +++++++++++++++++++++-------------------
 2 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index da2a65a4d44..e10daff90df 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -201,12 +201,12 @@ struct sbi_domain {
 /** The root domain instance */
 extern struct sbi_domain root;
 
-/** Get pointer to sbi_domain from HART id */
-struct sbi_domain *sbi_hartid_to_domain(u32 hartid);
+/** Get pointer to sbi_domain from HART index */
+struct sbi_domain *sbi_hartindex_to_domain(u32 hartindex);
 
 /** Get pointer to sbi_domain for current HART */
 #define sbi_domain_thishart_ptr() \
-	sbi_hartid_to_domain(current_hartid())
+	sbi_hartindex_to_domain(sbi_hartid_to_hartindex(current_hartid()))
 
 /** Index to domain table */
 extern struct sbi_domain *domidx_to_domain_table[];
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index ee3a5e948b9..b1f485d4888 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -40,22 +40,22 @@ struct sbi_domain root = {
 
 static unsigned long domain_hart_ptr_offset;
 
-struct sbi_domain *sbi_hartid_to_domain(u32 hartid)
+struct sbi_domain *sbi_hartindex_to_domain(u32 hartindex)
 {
 	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch || !domain_hart_ptr_offset)
 		return NULL;
 
 	return sbi_scratch_read_type(scratch, void *, domain_hart_ptr_offset);
 }
 
-static void update_hartid_to_domain(u32 hartid, struct sbi_domain *dom)
+static void update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
 {
 	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return;
 
@@ -268,10 +268,11 @@ static int sanitize_domain(const struct sbi_platform *plat,
 			   __func__, dom->name);
 		return SBI_EINVAL;
 	}
-	sbi_hartmask_for_each_hart(i, j, dom->possible_harts) {
-		if (!sbi_hartid_valid(i)) {
+	sbi_hartmask_for_each_hartindex(i, dom->possible_harts) {
+		if (!sbi_hartindex_valid(i)) {
 			sbi_printf("%s: %s possible HART mask has invalid "
-				   "hart %d\n", __func__, dom->name, i);
+				   "hart %d\n", __func__,
+				   dom->name, sbi_hartindex_to_hartid(i));
 			return SBI_EINVAL;
 		}
 	}
@@ -404,9 +405,11 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 
 	k = 0;
 	sbi_printf("Domain%d HARTs       %s: ", dom->index, suffix);
-	sbi_hartmask_for_each_hart(i, j, dom->possible_harts)
+	sbi_hartmask_for_each_hartindex(i, dom->possible_harts) {
+		j = sbi_hartindex_to_hartid(i);
 		sbi_printf("%s%d%s", (k++) ? "," : "",
-			   i, sbi_domain_is_assigned_hart(dom, i) ? "*" : "");
+			   j, sbi_domain_is_assigned_hart(dom, j) ? "*" : "");
+	}
 	sbi_printf("\n");
 
 	i = 0;
@@ -487,7 +490,7 @@ void sbi_domain_dump_all(const char *suffix)
 int sbi_domain_register(struct sbi_domain *dom,
 			const struct sbi_hartmask *assign_mask)
 {
-	u32 i, j;
+	u32 i;
 	int rc;
 	struct sbi_domain *tdom;
 	u32 cold_hartid = current_hartid();
@@ -530,22 +533,22 @@ int sbi_domain_register(struct sbi_domain *dom,
 	sbi_hartmask_clear_all(&dom->assigned_harts);
 
 	/* Assign domain to HART if HART is a possible HART */
-	sbi_hartmask_for_each_hart(i, j, assign_mask) {
-		if (!sbi_hartmask_test_hartid(i, dom->possible_harts))
+	sbi_hartmask_for_each_hartindex(i, assign_mask) {
+		if (!sbi_hartmask_test_hartindex(i, dom->possible_harts))
 			continue;
 
-		tdom = sbi_hartid_to_domain(i);
+		tdom = sbi_hartindex_to_domain(i);
 		if (tdom)
-			sbi_hartmask_clear_hartid(i,
+			sbi_hartmask_clear_hartindex(i,
 					&tdom->assigned_harts);
-		update_hartid_to_domain(i, dom);
-		sbi_hartmask_set_hartid(i, &dom->assigned_harts);
+		update_hartindex_to_domain(i, dom);
+		sbi_hartmask_set_hartindex(i, &dom->assigned_harts);
 
 		/*
 		 * If cold boot HART is assigned to this domain then
 		 * override boot HART of this domain.
 		 */
-		if (i == cold_hartid &&
+		if (sbi_hartindex_to_hartid(i) == cold_hartid &&
 		    dom->boot_hartid != cold_hartid) {
 			sbi_printf("Domain%d Boot HARTID forced to"
 				   " %d\n", dom->index, cold_hartid);
@@ -665,36 +668,37 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	/* Startup boot HART of domains */
 	sbi_domain_for_each(i, dom) {
-		/* Domain boot HART */
-		dhart = dom->boot_hartid;
+		/* Domain boot HART index */
+		dhart = sbi_hartid_to_hartindex(dom->boot_hartid);
 
 		/* Ignore of boot HART is off limits */
-		if (SBI_HARTMASK_MAX_BITS <= dhart)
+		if (!sbi_hartindex_valid(dhart))
 			continue;
 
 		/* Ignore if boot HART not possible for this domain */
-		if (!sbi_hartmask_test_hartid(dhart, dom->possible_harts))
+		if (!sbi_hartmask_test_hartindex(dhart, dom->possible_harts))
 			continue;
 
 		/* Ignore if boot HART assigned different domain */
-		if (sbi_hartid_to_domain(dhart) != dom ||
-		    !sbi_hartmask_test_hartid(dhart, &dom->assigned_harts))
+		if (sbi_hartindex_to_domain(dhart) != dom ||
+		    !sbi_hartmask_test_hartindex(dhart, &dom->assigned_harts))
 			continue;
 
 		/* Startup boot HART of domain */
-		if (dhart == cold_hartid) {
+		if (dom->boot_hartid == cold_hartid) {
 			scratch->next_addr = dom->next_addr;
 			scratch->next_mode = dom->next_mode;
 			scratch->next_arg1 = dom->next_arg1;
 		} else {
-			rc = sbi_hsm_hart_start(scratch, NULL, dhart,
+			rc = sbi_hsm_hart_start(scratch, NULL,
+						dom->boot_hartid,
 						dom->next_addr,
 						dom->next_mode,
 						dom->next_arg1);
 			if (rc) {
 				sbi_printf("%s: failed to start boot HART %d"
 					   " for %s (error %d)\n", __func__,
-					   dhart, dom->name, rc);
+					   dom->boot_hartid, dom->name, rc);
 				return rc;
 			}
 		}

From 9560fb38febf6e74d30a2c22e020b0e0dece8d49 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sat, 2 Sep 2023 17:34:32 +0530
Subject: [PATCH 1372/1765] include: sbi: Remove sbi_hartmask_for_each_hart()
 macro

The sbi_hartmask_for_each_hart() macro is slow and has only one user
so let us completely remove the sbi_hartmask_for_each_hart() macro.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_hartmask.h | 13 -------------
 lib/sbi/sbi_system.c       |  3 ++-
 2 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h
index 105653e1446..bcfa50db12e 100644
--- a/include/sbi/sbi_hartmask.h
+++ b/include/sbi/sbi_hartmask.h
@@ -169,19 +169,6 @@ static inline void sbi_hartmask_xor(struct sbi_hartmask *dstp,
 		   sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
 }
 
-/**
- * Iterate over each HART in hartmask
- * __h hart id
- * __i hart index
- * __m hartmask
-*/
-#define sbi_hartmask_for_each_hart(__h, __i, __m) \
-	for((__i) = find_first_bit((__m)->bits, SBI_HARTMASK_MAX_BITS), \
-		(__h) = sbi_hartindex_to_hartid(__i); \
-		(__i) < SBI_HARTMASK_MAX_BITS; \
-		(__i) = find_next_bit((__m)->bits, SBI_HARTMASK_MAX_BITS, (__i) + 1), \
-		(__h) = sbi_hartindex_to_hartid(__i))
-
 /**
  * Iterate over each HART index in hartmask
  * __i hart index
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index bae973041d2..d1fa349544c 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -170,7 +170,8 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_EFAIL;
 
-	sbi_hartmask_for_each_hart(i, j, &dom->assigned_harts) {
+	sbi_hartmask_for_each_hartindex(j, &dom->assigned_harts) {
+		i = sbi_hartindex_to_hartid(j);
 		if (i == hartid)
 			continue;
 		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED)

From b8fb96eceba546de7f36afd56a76a1e36fabcc77 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:41 +0530
Subject: [PATCH 1373/1765] include: sbi_domain: Fix permission test macros

The macros to test permissions must perform an exact match of all the
bits in the input with the desired permission bits. Otherwise, the check
returns false positives in those cases where only some of the desired
permissions are set in the input.

Fixes: 6c202c5 ("include: sbi: Add Smepmp specific access flags for PMP
entries")
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 34 +++++++++++++++-------------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index e10daff90df..c88dbac63d5 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -74,33 +74,29 @@ struct sbi_domain_memregion {
 		 SBI_DOMAIN_MEMREGION_SU_READABLE)
 
 	/* Shared read-only region between M and SU mode */
-#define SBI_DOMAIN_MEMREGION_IS_SUR_MR(__flags)			\
-		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE))
+#define SBI_DOMAIN_MEMREGION_IS_SUR_MR(__flags)			 \
+		((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \
+		 SBI_DOMAIN_MEMREGION_SHARED_RDONLY)
 
 	/* Shared region: SU execute-only and M read/execute */
-#define SBI_DOMAIN_MEMREGION_IS_SUX_MRX(__flags)			\
-		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&		\
-		 (__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
+#define SBI_DOMAIN_MEMREGION_IS_SUX_MRX(__flags)		 \
+		((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \
+		 SBI_DOMAIN_MEMREGION_SHARED_SUX_MRX)
 
 	/* Shared region: SU and M execute-only */
-#define SBI_DOMAIN_MEMREGION_IS_SUX_MX(__flags)				\
-		((__flags & SBI_DOMAIN_MEMREGION_M_EXECUTABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE))
+#define SBI_DOMAIN_MEMREGION_IS_SUX_MX(__flags)			 \
+		((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \
+		 SBI_DOMAIN_MEMREGION_SHARED_SUX_MX)
 
 	/* Shared region: SU and M read/write */
-#define SBI_DOMAIN_MEMREGION_IS_SURW_MRW(__flags)		\
-		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE) &	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE))
+#define SBI_DOMAIN_MEMREGION_IS_SURW_MRW(__flags)		 \
+		((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \
+		 SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW)
 
 	/* Shared region: SU read-only and M read/write */
-#define SBI_DOMAIN_MEMREGION_IS_SUR_MRW(__flags)		\
-		((__flags & SBI_DOMAIN_MEMREGION_M_READABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_M_WRITABLE) &&	\
-		 (__flags & SBI_DOMAIN_MEMREGION_SU_READABLE))
+#define SBI_DOMAIN_MEMREGION_IS_SUR_MRW(__flags)		 \
+		((__flags & SBI_DOMAIN_MEMREGION_ACCESS_MASK) == \
+		 SBI_DOMAIN_MEMREGION_SHARED_SUR_MRW)
 
 	/*
 	 * Check if region flags match with any of the above

From bff27c1fb4424c0e499c427e5f1b2b72fa3b5dc3 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:42 +0530
Subject: [PATCH 1374/1765] lib: sbi: Factor-out Smepmp configuration as
 separate function

Let us factor-out Smepmp configuaration as separate function so
that code is more readable.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 180 +++++++++++++++++++++++++++------------------
 1 file changed, 110 insertions(+), 70 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index f7cefe4d9b2..48784c856a4 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -288,9 +288,9 @@ unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch)
 /*
  * Returns Smepmp flags for a given domain and region based on permissions.
  */
-unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
-				       struct sbi_domain *dom,
-				       struct sbi_domain_memregion *reg)
+static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
+					      struct sbi_domain *dom,
+					      struct sbi_domain_memregion *reg)
 {
 	unsigned int pmp_flags = 0;
 
@@ -348,6 +348,103 @@ unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
 	return pmp_flags;
 }
 
+static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
+				     unsigned int pmp_count,
+				     unsigned int pmp_gran_log2,
+				     unsigned long pmp_addr_max)
+{
+	struct sbi_domain_memregion *reg;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	unsigned int pmp_idx = 0;
+	unsigned int pmp_flags;
+	unsigned long pmp_addr;
+
+	/*
+	 * Set the RLB and clear MML so that, we can write to
+	 * entries without enforcement even if some entries
+	 * are locked.
+	 */
+	csr_set(CSR_MSECCFG, MSECCFG_RLB);
+	csr_clear(CSR_MSECCFG, MSECCFG_MML);
+
+	/* Disable the reserved entry */
+	pmp_disable(SBI_SMEPMP_RESV_ENTRY);
+
+	sbi_domain_for_each_memregion(dom, reg) {
+		if (pmp_idx == SBI_SMEPMP_RESV_ENTRY)
+			pmp_idx++;
+		if (pmp_count <= pmp_idx)
+			break;
+
+		pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg);
+		if (pmp_flags == 0)
+			return 0;
+
+		pmp_addr = reg->base >> PMP_SHIFT;
+		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
+			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
+		} else {
+			sbi_printf("Can not configure pmp for domain %s because"
+				   " memory region address 0x%lx or size 0x%lx "
+				   "is not in range.\n", dom->name, reg->base,
+				   reg->order);
+		}
+	}
+
+	/*
+	 * All entries are programmed. Enable MML bit.
+	 * Keep the RLB bit so that dynamic mappings can be done.
+	 */
+	csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML));
+
+	return 0;
+}
+
+static int sbi_hart_oldpmp_configure(struct sbi_scratch *scratch,
+				     unsigned int pmp_count,
+				     unsigned int pmp_gran_log2,
+				     unsigned long pmp_addr_max)
+{
+	struct sbi_domain_memregion *reg;
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	unsigned int pmp_idx = 0;
+	unsigned int pmp_flags;
+	unsigned long pmp_addr;
+
+	sbi_domain_for_each_memregion(dom, reg) {
+		if (pmp_count <= pmp_idx)
+			break;
+
+		pmp_flags = 0;
+
+		/*
+		 * If permissions are to be enforced for all modes on
+		 * this region, the lock bit should be set.
+		 */
+		if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS)
+			pmp_flags |= PMP_L;
+
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
+			pmp_flags |= PMP_R;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
+			pmp_flags |= PMP_W;
+		if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
+			pmp_flags |= PMP_X;
+
+		pmp_addr = reg->base >> PMP_SHIFT;
+		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
+			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
+		} else {
+			sbi_printf("Can not configure pmp for domain %s because"
+				   " memory region address 0x%lx or size 0x%lx "
+				   "is not in range.\n", dom->name, reg->base,
+				   reg->order);
+		}
+	}
+
+	return 0;
+}
+
 int sbi_hart_map_saddr(unsigned long addr, unsigned long size)
 {
 	/* shared R/W access for M and S/U mode */
@@ -392,12 +489,10 @@ int sbi_hart_unmap_saddr(void)
 
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
-	struct sbi_domain_memregion *reg;
-	struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	unsigned int pmp_idx = 0;
-	unsigned int pmp_flags, pmp_bits, pmp_gran_log2;
+	int rc;
+	unsigned int pmp_bits, pmp_gran_log2;
 	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
-	unsigned long pmp_addr = 0, pmp_addr_max = 0;
+	unsigned long pmp_addr_max;
 
 	if (!pmp_count)
 		return 0;
@@ -406,67 +501,12 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 	pmp_bits = sbi_hart_pmp_addrbits(scratch) - 1;
 	pmp_addr_max = (1UL << pmp_bits) | ((1UL << pmp_bits) - 1);
 
-	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
-		/* Reserve first entry for dynamic shared mappings */
-		 pmp_idx = SBI_SMEPMP_RESV_ENTRY + 1;
-
-		/*
-		 * Set the RLB and clear MML so that, we can write to
-		 * entries without enforcement even if some entries
-		 * are locked.
-		 */
-		csr_set(CSR_MSECCFG, MSECCFG_RLB);
-		csr_clear(CSR_MSECCFG, MSECCFG_MML);
-
-		/* Disable the reserved entry */
-		pmp_disable(SBI_SMEPMP_RESV_ENTRY);
-	}
-
-	sbi_domain_for_each_memregion(dom, reg) {
-		if (pmp_count <= pmp_idx)
-			break;
-
-		pmp_flags = 0;
-
-		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
-			pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg);
-
-			if (pmp_flags == 0)
-				return 0;
-		} else {
-			/*
-			 * If permissions are to be enforced for all modes on
-			 * this region, the lock bit should be set.
-			 */
-			if (reg->flags & SBI_DOMAIN_MEMREGION_ENF_PERMISSIONS)
-				pmp_flags |= PMP_L;
-
-			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_READABLE)
-				pmp_flags |= PMP_R;
-			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_WRITABLE)
-				pmp_flags |= PMP_W;
-			if (reg->flags & SBI_DOMAIN_MEMREGION_SU_EXECUTABLE)
-				pmp_flags |= PMP_X;
-		}
-
-		pmp_addr =  reg->base >> PMP_SHIFT;
-		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
-			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
-		} else {
-			sbi_printf("Can not configure pmp for domain %s because"
-				   " memory region address 0x%lx or size 0x%lx "
-				   "is not in range.\n", dom->name, reg->base,
-				   reg->order);
-		}
-	}
-
-	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP)) {
-		/*
-		 * All entries are programmed. Enable MML bit.
-		 * Keep the RLB bit so that dynamic mappings can be done.
-		 */
-		csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML));
-	}
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP))
+		rc = sbi_hart_smepmp_configure(scratch, pmp_count,
+						pmp_gran_log2, pmp_addr_max);
+	else
+		rc = sbi_hart_oldpmp_configure(scratch, pmp_count,
+						pmp_gran_log2, pmp_addr_max);
 
 	/*
 	 * As per section 3.7.2 of privileged specification v1.12,
@@ -489,7 +529,7 @@ int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 			__sbi_hfence_gvma_all();
 	}
 
-	return 0;
+	return rc;
 }
 
 int sbi_hart_priv_version(struct sbi_scratch *scratch)

From 5240d312d310f1325802f6b66b0d92afabb23911 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:43 +0530
Subject: [PATCH 1375/1765] lib: sbi: Don't clear mseccfg.MML bit in
 sbi_hart_smepmp_configure()

The mseccfg.MML bit is a sticky bit which remains unchanged once set
so no need to clear it in sbi_hart_smepmp_configure().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 48784c856a4..6320ea6e4fe 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -360,12 +360,10 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 	unsigned long pmp_addr;
 
 	/*
-	 * Set the RLB and clear MML so that, we can write to
-	 * entries without enforcement even if some entries
-	 * are locked.
+	 * Set the RLB so that, we can write to PMP entries without
+	 * enforcement even if some entries are locked.
 	 */
 	csr_set(CSR_MSECCFG, MSECCFG_RLB);
-	csr_clear(CSR_MSECCFG, MSECCFG_MML);
 
 	/* Disable the reserved entry */
 	pmp_disable(SBI_SMEPMP_RESV_ENTRY);

From 2b51a9dd9c24783154dd776773603116d53a2d28 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:44 +0530
Subject: [PATCH 1376/1765] lib: sbi: Fix pmp_flags for Smepmp read-only shared
 region

The Smepmp read-only shared region must have pmpcfg.L, pmpcfg.R,
pmpcfg.W, and pmpcfg.X bits set so sbi_hart_get_smepmp_flags()
must return pmp_flags accordingly.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6320ea6e4fe..c8aa342e207 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -297,7 +297,7 @@ static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
 	if (SBI_DOMAIN_MEMREGION_IS_SHARED(reg->flags)) {
 		/* Read only for both M and SU modes */
 		if (SBI_DOMAIN_MEMREGION_IS_SUR_MR(reg->flags))
-			pmp_flags = (PMP_R | PMP_W | PMP_X);
+			pmp_flags = (PMP_L | PMP_R | PMP_W | PMP_X);
 
 		/* Execute for SU but Read/Execute for M mode */
 		else if (SBI_DOMAIN_MEMREGION_IS_SUX_MRX(reg->flags))

From 73aea28264977286f72d2efe615dd1773d94e2cd Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:45 +0530
Subject: [PATCH 1377/1765] lib: sbi: Populate M-only Smepmp entries before
 setting mseccfg.MML

Based on sections 4.c and 4.d in Ch.2 of the Smepmp spec the PMP entries
must be programmed as below:
1. Program M-only entries
2. Enable mseccfg.MML
3. Program shared-region entries
4. Program SU-only entries

Co-developed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 73 +++++++++++++++++++++++++++++++++++++---------
 1 file changed, 59 insertions(+), 14 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c8aa342e207..29d648127de 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -348,6 +348,26 @@ static unsigned int sbi_hart_get_smepmp_flags(struct sbi_scratch *scratch,
 	return pmp_flags;
 }
 
+static void sbi_hart_smepmp_set(struct sbi_scratch *scratch,
+				struct sbi_domain *dom,
+				struct sbi_domain_memregion *reg,
+				unsigned int pmp_idx,
+				unsigned int pmp_flags,
+				unsigned int pmp_gran_log2,
+				unsigned long pmp_addr_max)
+{
+	unsigned long pmp_addr = reg->base >> PMP_SHIFT;
+
+	if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
+		pmp_set(pmp_idx, pmp_flags, reg->base, reg->order);
+	} else {
+		sbi_printf("Can not configure pmp for domain %s because"
+			   " memory region address 0x%lx or size 0x%lx "
+			   "is not in range.\n", dom->name, reg->base,
+			   reg->order);
+	}
+}
+
 static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 				     unsigned int pmp_count,
 				     unsigned int pmp_gran_log2,
@@ -355,9 +375,7 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 {
 	struct sbi_domain_memregion *reg;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
-	unsigned int pmp_idx = 0;
-	unsigned int pmp_flags;
-	unsigned long pmp_addr;
+	unsigned int pmp_idx, pmp_flags;
 
 	/*
 	 * Set the RLB so that, we can write to PMP entries without
@@ -368,32 +386,59 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 	/* Disable the reserved entry */
 	pmp_disable(SBI_SMEPMP_RESV_ENTRY);
 
+	/* Program M-only regions when MML is not set. */
+	pmp_idx = 0;
 	sbi_domain_for_each_memregion(dom, reg) {
+		/* Skip reserved entry */
 		if (pmp_idx == SBI_SMEPMP_RESV_ENTRY)
 			pmp_idx++;
 		if (pmp_count <= pmp_idx)
 			break;
 
+		/* Skip shared and SU-only regions */
+		if (!SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(reg->flags)) {
+			pmp_idx++;
+			continue;
+		}
+
 		pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg);
-		if (pmp_flags == 0)
+		if (!pmp_flags)
 			return 0;
 
-		pmp_addr = reg->base >> PMP_SHIFT;
-		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
-			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
-		} else {
-			sbi_printf("Can not configure pmp for domain %s because"
-				   " memory region address 0x%lx or size 0x%lx "
-				   "is not in range.\n", dom->name, reg->base,
-				   reg->order);
+		sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags,
+				    pmp_gran_log2, pmp_addr_max);
+	}
+
+	/* Set the MML to enforce new encoding */
+	csr_set(CSR_MSECCFG, MSECCFG_MML);
+
+	/* Program shared and SU-only regions */
+	pmp_idx = 0;
+	sbi_domain_for_each_memregion(dom, reg) {
+		/* Skip reserved entry */
+		if (pmp_idx == SBI_SMEPMP_RESV_ENTRY)
+			pmp_idx++;
+		if (pmp_count <= pmp_idx)
+			break;
+
+		/* Skip M-only regions */
+		if (SBI_DOMAIN_MEMREGION_M_ONLY_ACCESS(reg->flags)) {
+			pmp_idx++;
+			continue;
 		}
+
+		pmp_flags = sbi_hart_get_smepmp_flags(scratch, dom, reg);
+		if (!pmp_flags)
+			return 0;
+
+		sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags,
+				    pmp_gran_log2, pmp_addr_max);
 	}
 
 	/*
-	 * All entries are programmed. Enable MML bit.
+	 * All entries are programmed.
 	 * Keep the RLB bit so that dynamic mappings can be done.
 	 */
-	csr_set(CSR_MSECCFG, (MSECCFG_RLB | MSECCFG_MML));
 
 	return 0;
 }

From e8bc1621c6882766815d2a46f5c2ae88c977bfa4 Mon Sep 17 00:00:00 2001
From: Mayuresh Chitale <mchitale@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:46 +0530
Subject: [PATCH 1378/1765] lib: utils/serial: Add shared regions for serial
 drivers

The serial driver regions used by OpenSBI should be marked as a shared
read-write regions between M-mode and SU-mode as those are accessed
by earlycon and the corresponding tty serial drivers running in 'S' mode.
When the smepmp extension is enabled, PMP entries for these shared regions
will get programmed.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/utils/serial/cadence-uart.c    | 6 +++++-
 lib/utils/serial/fdt_serial_htif.c | 9 +++++++++
 lib/utils/serial/uart8250.c        | 7 ++++++-
 3 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/lib/utils/serial/cadence-uart.c b/lib/utils/serial/cadence-uart.c
index 8a2b6ba7a72..30fbb95f445 100644
--- a/lib/utils/serial/cadence-uart.c
+++ b/lib/utils/serial/cadence-uart.c
@@ -6,6 +6,8 @@
  * Author: Jun Liang Tan <junliang.tan@linux.starfivetech.com>
  */
 
+#include <sbi/sbi_domain.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_console.h>
 #include <sbi_utils/serial/cadence-uart.h>
@@ -124,5 +126,7 @@ int cadence_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 
 	sbi_console_set_device(&cadence_console);
 
-	return 0;
+	return sbi_domain_root_add_memrange(base, PAGE_SIZE, PAGE_SIZE,
+					    (SBI_DOMAIN_MEMREGION_MMIO |
+					    SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
 }
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
index 61f66d683e8..7d88e7a16b8 100644
--- a/lib/utils/serial/fdt_serial_htif.c
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -7,6 +7,8 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/sys/htif.h>
@@ -19,6 +21,7 @@ static const struct fdt_match serial_htif_match[] = {
 static int serial_htif_init(void *fdt, int nodeoff,
 			    const struct fdt_match *match)
 {
+	int rc;
 	bool custom = false;
 	uint64_t fromhost_addr = 0, tohost_addr = 0;
 
@@ -29,6 +32,12 @@ static int serial_htif_init(void *fdt, int nodeoff,
 
 	fdt_get_node_addr_size(fdt, nodeoff, 1, &tohost_addr, NULL);
 
+	rc = sbi_domain_root_add_memrange(fromhost_addr, PAGE_SIZE, PAGE_SIZE,
+					  (SBI_DOMAIN_MEMREGION_MMIO |
+					   SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
+	if (rc)
+		return rc;
+
 	return htif_serial_init(custom, fromhost_addr, tohost_addr);
 }
 
diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 99bf1bf733f..4d158d3b839 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -7,8 +7,10 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi_utils/serial/uart8250.h>
 
 /* clang-format off */
@@ -133,5 +135,8 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 
 	sbi_console_set_device(&uart8250_console);
 
-	return 0;
+	return sbi_domain_root_add_memrange(base + reg_offset, PAGE_SIZE,
+					    PAGE_SIZE,
+					    (SBI_DOMAIN_MEMREGION_MMIO |
+					    SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
 }

From b7e9d34edf4f728bb02d11f73a2f9f79ad4acce4 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 7 Sep 2023 17:19:47 +0530
Subject: [PATCH 1379/1765] lib: utils/regmap: Mark syscon region as shared
 read-write

The syscon region used by OpenSBI should be marked as a shared
read-write region between M-mode and SU-mode.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 lib/utils/regmap/fdt_regmap_syscon.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c
index 29263ddd355..d87b6e0926e 100644
--- a/lib/utils/regmap/fdt_regmap_syscon.c
+++ b/lib/utils/regmap/fdt_regmap_syscon.c
@@ -8,6 +8,7 @@
  */
 
 #include <libfdt.h>
+#include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_byteorder.h>
 #include <sbi/sbi_error.h>
@@ -240,6 +241,12 @@ static int regmap_syscon_init(void *fdt, int nodeoff, u32 phandle,
 		goto fail_free_syscon;
 	}
 
+	rc = sbi_domain_root_add_memrange(addr, size, PAGE_SIZE,
+				(SBI_DOMAIN_MEMREGION_MMIO |
+				 SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
+	if (rc)
+		goto fail_free_syscon;
+
 	rc = regmap_add(&srm->rmap);
 	if (rc)
 		goto fail_free_syscon;

From 3669153e06cbae66da28b685c29c8e622d547263 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 15 Sep 2023 17:39:36 +0800
Subject: [PATCH 1380/1765] platform: generic: thead: fix stale TLB entries for
 th1520/sg2042

The TLB entries remain functional all the time once added in T-HEAD th1520
and Sophgo sg2042 (even if the MMU is then disabled afterwards). If there
are some stale TLB entries that contains the address of SBI, it will cause
unexpected memory access and issue a illegal instruction error. To avoid
this, a TLB flush is needed to drop these TLB entries before any memory
access in the trap handler.

To handle this workaroud, add a custom trap handler with executing TLB flush
first in the T-HEAD platform to fix affected socs.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                    |  4 ++
 platform/generic/configs/defconfig          |  1 +
 platform/generic/thead/objects.mk           | 10 +++++
 platform/generic/thead/thead-generic.c      | 50 +++++++++++++++++++++
 platform/generic/thead/thead-trap-handler.S | 13 ++++++
 5 files changed, 78 insertions(+)
 create mode 100644 platform/generic/thead/objects.mk
 create mode 100644 platform/generic/thead/thead-generic.c
 create mode 100644 platform/generic/thead/thead-trap-handler.S

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 72768edeb92..e7bd94eb482 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -52,6 +52,10 @@ config PLATFORM_STARFIVE_JH7110
 	bool "StarFive JH7110 support"
 	default n
 
+config PLATFORM_THEAD
+	bool "THEAD C9xx support"
+	default n
+
 source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
 
 endif
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 634d4108161..c432bc2f893 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -4,6 +4,7 @@ CONFIG_PLATFORM_RENESAS_RZFIVE=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
+CONFIG_PLATFORM_THEAD=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y
diff --git a/platform/generic/thead/objects.mk b/platform/generic/thead/objects.mk
new file mode 100644
index 00000000000..854bfbdedf7
--- /dev/null
+++ b/platform/generic/thead/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
+# Copyright (C) 2023 Alibaba Group Holding Limited.
+#
+
+carray-platform_override_modules-$(CONFIG_PLATFORM_THEAD) += thead_generic
+platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-generic.o
+platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-trap-handler.o
diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
new file mode 100644
index 00000000000..8120f6fcd15
--- /dev/null
+++ b/platform/generic/thead/thead-generic.c
@@ -0,0 +1,50 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *
+ */
+
+#include <platform_override.h>
+#include <sbi/riscv_barrier.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+/**
+ * T-HEAD board with this quirk need to execute sfence.vma to flush
+ * stale entrie avoid incorrect memory access.
+ */
+#define THEAD_QUIRK_TLB_FLUSH_FIXUP		BIT(0)
+
+void _thead_tlb_flush_fixup_trap_handler(void);
+
+void thead_register_tlb_flush_trap_handler(void)
+{
+	csr_write(CSR_MTVEC, &_thead_tlb_flush_fixup_trap_handler);
+}
+
+static int thead_generic_early_init(bool cold_boot,
+				    const struct fdt_match *match)
+{
+	unsigned long quirks = (unsigned long)match->data;
+
+	if (quirks & THEAD_QUIRK_TLB_FLUSH_FIXUP)
+		thead_register_tlb_flush_trap_handler();
+
+	return 0;
+}
+
+static const struct fdt_match thead_generic_match[] = {
+	{ .compatible = "thead,th1520",
+	  .data = (void*)THEAD_QUIRK_TLB_FLUSH_FIXUP },
+	{ },
+};
+
+const struct platform_override thead_generic = {
+	.match_table	= thead_generic_match,
+	.early_init	= thead_generic_early_init,
+};
diff --git a/platform/generic/thead/thead-trap-handler.S b/platform/generic/thead/thead-trap-handler.S
new file mode 100644
index 00000000000..861c02920fb
--- /dev/null
+++ b/platform/generic/thead/thead-trap-handler.S
@@ -0,0 +1,13 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *
+ */
+	.section .entry, "ax", %progbits
+	.align 3
+	.globl _thead_tlb_flush_fixup_trap_handler
+_thead_tlb_flush_fixup_trap_handler:
+	sfence.vma t0, zero
+	j _trap_handler

From de525ac18dc32bafc64e78893f343afdd6003028 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Mon, 18 Sep 2023 01:52:49 +0800
Subject: [PATCH 1381/1765] firmware: Remove ALIGN in .rela.dyn in linker
 script

The .rela.dyn section should be exactly the size of the relocations,
without padding. On RV64, .rela* sections are already aligned and
there's no need for padding. On RV32, this adds padding up to 4 bytes,
which, if present, confuses the relocation loop into processing an extra
entry past the end of .rela*, and it crashes with an invalid memory
access.

Fixes: 0f20e8adcf42 ("firmware: Support position independent execution")
Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.ldS | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 3d68484ba5e..88b8dfd9cb5 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -49,7 +49,6 @@
 	.rela.dyn : {
 		PROVIDE(__rel_dyn_start = .);
 		*(.rela*)
-		. = ALIGN(8);
 		PROVIDE(__rel_dyn_end = .);
 	}
 

From 2a6d72534d44c39e1de0614970a0dad97b1c41ba Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Mon, 18 Sep 2023 01:52:50 +0800
Subject: [PATCH 1382/1765] firmware: Remove handling of R_RISCV_{32,64}

Since everything is statically linked, we won't actually have
R_RISCV_{32,64} relocations. No need to handle these.

Fixes: 0f20e8adcf42 ("firmware: Support position independent execution")
Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S      | 22 ----------------------
 firmware/fw_base.ldS    |  6 ------
 include/sbi/riscv_elf.h |  8 --------
 3 files changed, 36 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ca34b4ccc9d..42b03fe890f 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -88,30 +88,8 @@ _try_lottery:
 	add	t5, t5, t2
 	add	t3, t3, t2
 	REG_S	t5, 0(t3)		/* store runtime address to the GOT entry */
-	j	5f
 
 3:
-	lla	t4, __dyn_sym_start
-
-4:
-	srli	t6, t5, SYM_INDEX	/* t6 <--- sym table index */
-	andi	t5, t5, 0xFF		/* t5 <--- relocation type */
-	li	t3, RELOC_TYPE
-	bne	t5, t3, 5f
-
-	/* address R_RISCV_64 or R_RISCV_32 cases*/
-	REG_L	t3, 0(t0)
-	li	t5, SYM_SIZE
-	mul	t6, t6, t5
-	add	s5, t4, t6
-	REG_L	t6, (REGBYTES * 2)(t0)	/* t0 <-- addend */
-	REG_L	t5, REGBYTES(s5)
-	add	t5, t5, t6
-	add	t5, t5, t2		/* t5 <-- location to fix up in RAM */
-	add	t3, t3, t2		/* t3 <-- location to fix up in RAM */
-	REG_S	t5, 0(t3)		/* store runtime address to the variable */
-
-5:
 	addi	t0, t0, (REGBYTES * 3)
 	blt	t0, t1, 2b
 	j	_relocate_done
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 88b8dfd9cb5..c15ccdbf661 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -40,12 +40,6 @@
 
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
-	.dynsym : {
-		PROVIDE(__dyn_sym_start = .);
-		*(.dynsym)
-		PROVIDE(__dyn_sym_end = .);
-	}
-
 	.rela.dyn : {
 		PROVIDE(__rel_dyn_start = .);
 		*(.rela*)
diff --git a/include/sbi/riscv_elf.h b/include/sbi/riscv_elf.h
index 3b62c38b4a2..ed361e34615 100644
--- a/include/sbi/riscv_elf.h
+++ b/include/sbi/riscv_elf.h
@@ -1,14 +1,6 @@
 #ifndef __RISCV_ELF_H__
 #define __RISCV_ELF_H__
 
-#include <sbi/riscv_asm.h>
-
-#define R_RISCV_32		1
-#define R_RISCV_64		2
 #define R_RISCV_RELATIVE	3
 
-#define RELOC_TYPE		__REG_SEL(R_RISCV_64, R_RISCV_32)
-#define SYM_INDEX		__REG_SEL(0x20,	0x8)
-#define SYM_SIZE		__REG_SEL(0x18,0x10)
-
 #endif

From 6ed125a6027eea0f22b92d96d6fb538446fa94c0 Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Mon, 18 Sep 2023 01:52:51 +0800
Subject: [PATCH 1383/1765] Makefile: Add --exclude-libs ALL to avoid .dynsym

Since everything is statically linked, we don't need to expose symbols
for dynamic linking.

For a default build this saves about 2 KiB of useless read only data in
.dynsym, .dynstr, .hash, .gnu.hash sections.

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index ca70949df48..de4e73a0e3d 100644
--- a/Makefile
+++ b/Makefile
@@ -375,6 +375,7 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
+ELFFLAGS	+=	-Wl,--exclude-libs,ALL
 ELFFLAGS	+=	-Wl,--build-id=none
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)

From e21901d3175c7f96961b576ee06a1185ed051ec3 Mon Sep 17 00:00:00 2001
From: Hoa Nguyen <hn@hnpl.org>
Date: Sun, 24 Sep 2023 14:48:23 -0700
Subject: [PATCH 1384/1765] doc: Fix fw_payload.md

The base of .text is defined by `FW_TEXT_START`, not `FW_TEXT_BASE`.

Signed-off-by: Hoa Nguyen <hn@hnpl.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw_payload.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 3d50ddcd6f7..113604a8b11 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -36,7 +36,7 @@ options. These configuration parameters can be defined using either the top
 level `make` command line or the target platform *objects.mk* configuration
 file. The parameters currently defined are as follows:
 
-* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_BASE* where the payload binary
+* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_START* where the payload binary
   will be linked in the final *FW_PAYLOAD* firmware binary image. This
   configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not defined.
   Compilation errors will result from an incorrect definition of

From a12542316c98bbc8731dd6048d0a7ba3ab67fa6c Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 25 Sep 2023 20:24:26 +0800
Subject: [PATCH 1385/1765] lib: utils/serial: Ensure proper allocation of PMP
 entries for uart8250

The added memory region should start from the base address.
Otherwise, the range will be shifted by reg_offset and not
able to merge consecutive NAPOT regions in the root domain,
resulting in wasted PMP entries.

Fixes: e8bc1621 ("lib: utils/serial: Add shared regions for
serial drivers")

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/uart8250.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/utils/serial/uart8250.c b/lib/utils/serial/uart8250.c
index 4d158d3b839..1fe053f860e 100644
--- a/lib/utils/serial/uart8250.c
+++ b/lib/utils/serial/uart8250.c
@@ -135,8 +135,7 @@ int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
 
 	sbi_console_set_device(&uart8250_console);
 
-	return sbi_domain_root_add_memrange(base + reg_offset, PAGE_SIZE,
-					    PAGE_SIZE,
+	return sbi_domain_root_add_memrange(base, PAGE_SIZE, PAGE_SIZE,
 					    (SBI_DOMAIN_MEMREGION_MMIO |
 					    SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
 }

From d36709fcafe2d39c3d999489a8ca836b138e4f04 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Wed, 27 Sep 2023 18:08:31 +0800
Subject: [PATCH 1386/1765] lib: utils: timer/ipi: Update memregion flags for
 PLMT and PLICSW

This patch adds unspecified permission flags for the PLICSW region
and updates the permission of the PLMT region.

With this update, both regions will become M-mode only read/write
regions in the root domain.

  Domain0 Region00: 0x00000000f0300000-0x00000000f0300fff M: (I,R,W) S/U: (R,W)
  Domain0 Region01: 0x0000000000040000-0x000000000005ffff M: (R,W) S/U: ()
  Domain0 Region02: 0x0000000000000000-0x000000000003ffff M: (R,X) S/U: ()
> Domain0 Region03: 0x00000000e6000000-0x00000000e60fffff M: (I,R,W) S/U: ()
> Domain0 Region04: 0x00000000e6400000-0x00000000e67fffff M: (I,R,W) S/U: ()
  Domain0 Region05: 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)

The PMP rules of AE350-AX65 (single-core) w/ Smepmp:

  p/x $pmpcfg0
  $1 = {0x1f9b9b9d9b1e00,
  pmp0cfg = {0x0},
                    L--AAXWR
  pmp1cfg = {0x1e} (00011110), pmpaddr1: 0xf0300000 ~   0xf0300fff  (UART1)
  pmp2cfg = {0x9b} (10011011), pmpaddr2:    0x40000 ~      0x5ffff
  pmp3cfg = {0x9d} (10011101), pmpaddr3:        0x0 ~      0x3ffff
  pmp4cfg = {0x9b} (10011011), pmpaddr4: 0xe6000000 ~   0xe60fffff  (PLMT)
  pmp5cfg = {0x9b} (10011011), pmpaddr5: 0xe6400000 ~   0xe67fffff  (PLICSW)
  pmp6cfg = {0x1f} (00011111), pmpaddr6:        0x0 ~ 0xffffffffff
  pmp7cfg = {0x0 }}

The PMP rules of AE350-AX45MP (qual-core) w/o Smepmp:

  p/x $pmpcfg0
  $1 = {0x1f181818181b,
                     L--AAXWR
  pmp0cfg = {0x1b}, (00011011), pmpaddr0: 0xf0300000 ~  0xf0300fff  (UART1)
  pmp1cfg = {0x18}, (00011000), pmpaddr1:    0x40000 ~     0x5ffff
  pmp2cfg = {0x18}, (00011000), pmpaddr2:        0x0 ~     0x3ffff
  pmp3cfg = {0x18}, (00011000), pmpaddr3: 0xe6000000 ~  0xe60fffff  (PLMT)
  pmp4cfg = {0x18}, (00011000), pmpaddr4: 0xe6400000 ~  0xe67fffff  (PLICSW)
  pmp5cfg = {0x1f}, (00011111), pmpaddr5:        0x0 ~ 0x1ffffffff
  pmp6cfg = {0x0 }}

Note that starting from this patch, we restrict the S/U-mode read
permission to the PLMT region, since we should read the TIME CSR
in a lower privilege mode.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/andes_plicsw.c | 4 +++-
 lib/utils/timer/andes_plmt.c | 7 +++++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index dde39c045a8..5693efb3e38 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -131,7 +131,9 @@ int plicsw_cold_ipi_init(struct plicsw_data *plicsw)
 	/* Add PLICSW region to the root domain */
 	rc = sbi_domain_root_add_memrange(plicsw->addr, plicsw->size,
 					  PLICSW_REGION_ALIGN,
-					  SBI_DOMAIN_MEMREGION_MMIO);
+					  SBI_DOMAIN_MEMREGION_MMIO |
+					  SBI_DOMAIN_MEMREGION_M_READABLE |
+					  SBI_DOMAIN_MEMREGION_M_WRITABLE);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/timer/andes_plmt.c b/lib/utils/timer/andes_plmt.c
index 94a86cc5d46..6e4bfafe9e5 100644
--- a/lib/utils/timer/andes_plmt.c
+++ b/lib/utils/timer/andes_plmt.c
@@ -81,8 +81,11 @@ int plmt_cold_timer_init(struct plmt_data *plmt)
 
 	/* Add PLMT region to the root domain */
 	rc = sbi_domain_root_add_memrange(
-		(unsigned long)plmt->time_val, plmt->size, PLMT_REGION_ALIGN,
-		SBI_DOMAIN_MEMREGION_MMIO | SBI_DOMAIN_MEMREGION_READABLE);
+		(unsigned long)plmt->time_val, plmt->size,
+		PLMT_REGION_ALIGN,
+		SBI_DOMAIN_MEMREGION_MMIO |
+		SBI_DOMAIN_MEMREGION_M_READABLE |
+		SBI_DOMAIN_MEMREGION_M_WRITABLE);
 	if (rc)
 		return rc;
 

From 8197c2f1ec5bcdd3aa7477efef59e9ebd57ee331 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Wed, 27 Sep 2023 16:14:51 +0200
Subject: [PATCH 1387/1765] lib: sbi: fix sbi_domain_get_assigned_hartmask()

'1' is a 32 bit integer. When shifting it by more than 31 bits it becomes
zero and we get an incorrect return value.

Addresses-Coverity-ID: 1568356 Bad bit shift operation
Fixes: 296e70d69da7 ("lib: sbi: Extend sbi_hartmask to support both hartid and hartindex")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index b1f485d4888..fd4a2965c3a 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -76,7 +76,7 @@ ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 	ulong ret = 0;
 	for (int i = 0; i < 8 * sizeof(ret); i++) {
 		if (sbi_domain_is_assigned_hart(dom, hbase + i))
-			ret |= 1 << i;
+			ret |= 1UL << i;
 	}
 
 	return ret;

From 9da30f6105565c920d1e27c08cb67284619d6984 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Wed, 27 Sep 2023 16:19:12 +0200
Subject: [PATCH 1388/1765] lib: utils/fdt: simplify dt_parse_isa_extensions

hart_exts == NULL can only occur if offset and node address lead to an
overflow resulting in exactly NULL. As we don't catch other values of
overflow it does not make sense to treat this one as special.

Addresses-Coverity-ID: 1568355 Logically dead code
Addresses-Coverity-ID: 1568358 Logically dead code
Fixes: 6259b2ec2d09 ("lib: utils/fdt: Fix fdt_parse_isa_extensions() implementation")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index c97f09d3cc3..13e79b96f7e 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -417,8 +417,6 @@ static int fdt_parse_isa_all_harts(void *fdt)
 
 		hart_exts = sbi_scratch_offset_ptr(scratch,
 						   fdt_isa_bitmap_offset);
-		if (!hart_exts)
-			return SBI_ENOENT;
 
 		err = fdt_parse_isa_one_hart((const char *)val, hart_exts);
 		if (err)
@@ -452,8 +450,6 @@ int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
 		return SBI_ENOENT;
 
 	hart_exts = sbi_scratch_offset_ptr(scratch, fdt_isa_bitmap_offset);
-	if (!hart_exts)
-		return SBI_ENOENT;
 
 	for (i = 0; i < BITS_TO_LONGS(SBI_HART_EXT_MAX); i++)
 		extensions[i] |= hart_exts[i];

From 942aca232ec8e412160bdc9cd3331a63eaf1ff24 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Thu, 28 Sep 2023 14:17:20 +0200
Subject: [PATCH 1389/1765] lib: utils: Simplify SET_ISA_EXT_MAP()

The define is hard to read. The continue statement does not do what was
intended.

* Remove do {} while (false);
* Change the name to set_multi_letter_ext
  - Other local macros are lower case too.
  - Refer to the fact that this is only used for multi-letter extensions.

Addresses-Coverity-ID: 1568359 Unexpected control flow
Fixes: d72f5f17478d ("lib: utils: Add detection of Smepmp from ISA string in FDT")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 13e79b96f7e..9ae7f09fb3b 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -369,16 +369,14 @@ static int fdt_parse_isa_one_hart(const char *isa, unsigned long *extensions)
 		if (!j)
 			continue;
 
-#define SET_ISA_EXT_MAP(name, bit)				\
-		do {						\
+#define set_multi_letter_ext(name, bit)				\
 			if (!strcmp(mstr, name)) {		\
 				__set_bit(bit, extensions);	\
 				continue;			\
-			}					\
-		} while (false)					\
+			}
 
-		SET_ISA_EXT_MAP("smepmp", SBI_HART_EXT_SMEPMP);
-#undef SET_ISA_EXT_MAP
+		set_multi_letter_ext("smepmp", SBI_HART_EXT_SMEPMP);
+#undef set_multi_letter_ext
 	}
 
 	return 0;

From f831b93357dd5858ba0f610f1f21f7bc599decb1 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Thu, 28 Sep 2023 15:03:57 +0200
Subject: [PATCH 1390/1765] lib: sbi_pmu: check for index overflows

sbi_pmu_ctr_cfg_match() receives data from a lower privilege level mode.
We must catch maliciously wrong values.

We already check against total_ctrs. But we do not check that total_ctrs is
less than SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX.

Check that the number of hardware counters is in the valid range.

Addresses-Coverity-ID: 1566114 Out-of-bounds write
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 9694aae4fd3..f4c8fc4c3be 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -981,6 +981,9 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 		else
 			num_hw_ctrs = hpm_count + 1;
 
+		if (num_hw_ctrs > SBI_PMU_HW_CTR_MAX)
+			return SBI_EINVAL;
+
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 

From d891caeae96397ba7a5ab01d6722996ea3a1dd16 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 29 Sep 2023 23:53:55 +0200
Subject: [PATCH 1391/1765] gpio/starfive: redundant readl() call

In starfive_gpio_direction_output() readl() is called twice to read the
gpio direction register. The result of the first read is discarded.

Remove the redundant read.

Fixes: 908be1b85c8f ("gpio/starfive: add gpio driver and support gpio reset")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/fdt_gpio_starfive.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
index f430b1352c9..bd2a9f214aa 100644
--- a/lib/utils/gpio/fdt_gpio_starfive.c
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -37,7 +37,6 @@ static int starfive_gpio_direction_output(struct gpio_pin *gp, int value)
 	reg_addr = chip->addr + gp->offset;
 	reg_addr &= ~(STARFIVE_GPIO_REG_SHIFT_MASK);
 
-	val = readl((void *)(reg_addr));
 	shift_bits = (gp->offset & STARFIVE_GPIO_REG_SHIFT_MASK)
 		<< STARFIVE_GPIO_SHIFT_BITS;
 	bit_mask = STARFIVE_GPIO_MASK << shift_bits;

From e8114c6ae2f9ae2db96e49907710434557b0dc2a Mon Sep 17 00:00:00 2001
From: Yangjie Zhang <jay1273062855@outlook.com>
Date: Thu, 28 Sep 2023 16:25:23 +0800
Subject: [PATCH 1392/1765] docs: platform: update platform_requirements.md

"Zicsr" isa extension has been separated from "I" extension.
This patch add the isa requirement of "Zicsr" extension in
platform requirements documentation.

Signed-off-by: Yangjie Zhang <jay1273062855@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform_requirements.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/platform_requirements.md b/docs/platform_requirements.md
index 8735adba2a8..a843febf7ad 100644
--- a/docs/platform_requirements.md
+++ b/docs/platform_requirements.md
@@ -18,7 +18,7 @@ Base Platform Requirements
 
 The base RISC-V platform requirements for OpenSBI are as follows:
 
-1. At least rv32ima or rv64ima required on all HARTs
+1. At least rv32ima_zicsr or rv64ima_zicsr required on all HARTs
 2. At least one HART should have S-mode support because:
 
      * SBI calls are meant for RISC-V S-mode (Supervisor mode)
@@ -33,7 +33,7 @@ The base RISC-V platform requirements for OpenSBI are as follows:
 6. Hardware support for injecting M-mode software interrupts on
    a multi-HART platform
 
-The RISC-V extensions not covered by rv32ima or rv64ima are optional
+The RISC-V extensions not covered by rv32ima_zicsr or rv64ima_zicsr are optional
 for OpenSBI. Although, OpenSBI will detect and handle some of these
 optional RISC-V extensions at runtime.
 

From 3632f2b5c43e2a01bbfdcf4864d358845dcf281e Mon Sep 17 00:00:00 2001
From: Yangjie Zhang <jay1273062855@outlook.com>
Date: Thu, 28 Sep 2023 16:27:09 +0800
Subject: [PATCH 1393/1765] lib: sbi: Add support for mconfigptr

RISC-V privileged specification v1.12 introduced the mconfigptr CSR
which will hold the physical address of a configuration data
structure.

Signed-off-by: Yangjie Zhang <jay1273062855@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index d137bf829f4..a545242a69d 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -430,6 +430,7 @@
 #define CSR_MARCHID			0xf12
 #define CSR_MIMPID			0xf13
 #define CSR_MHARTID			0xf14
+#define CSR_MCONFIGPTR			0xf15
 
 /* Machine Trap Setup */
 #define CSR_MSTATUS			0x300

From ec0559eb315bd11a5ef8865a8a8fa91ab6888250 Mon Sep 17 00:00:00 2001
From: Amanieu d'Antras <amanieu@gmail.com>
Date: Sun, 1 Oct 2023 10:12:02 +0100
Subject: [PATCH 1394/1765] lib: sbi_misaligned_ldst: Fix handling of C.SWSP
 and C.SDSP

Unlike C.LWSP/C.LDSP, these encodings can be used with the zero
register, so checking that the rs2 field is non-zero is unnecessary.

Additionally, the previous check was incorrect since it was checking
the immediate field of the instruction instead of the rs2 field.

Signed-off-by: Amanieu d'Antras <amanieu@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_misaligned_ldst.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index 4b91e072c64..aa512de3985 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -211,16 +211,14 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 	} else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
 		len	       = 8;
 		val.data_ulong = GET_RS2S(insn, regs);
-	} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP &&
-		   ((insn >> SH_RD) & 0x1f)) {
+	} else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP) {
 		len	       = 8;
 		val.data_ulong = GET_RS2C(insn, regs);
 #endif
 	} else if ((insn & INSN_MASK_C_SW) == INSN_MATCH_C_SW) {
 		len	       = 4;
 		val.data_ulong = GET_RS2S(insn, regs);
-	} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP &&
-		   ((insn >> SH_RD) & 0x1f)) {
+	} else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP) {
 		len	       = 4;
 		val.data_ulong = GET_RS2C(insn, regs);
 #ifdef __riscv_flen

From cbdd86973901b6be2a1a2d3d6b54f3184fdf9a44 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 10 Oct 2023 14:10:41 +0530
Subject: [PATCH 1395/1765] include: sbi: Change spec version to 2.0

Now that SBI v2.0 specification is frozen, we change spec version
implemented by OpenSBI to v2.0.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_ecall.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 90f33bac0bc..027213cbb3a 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -13,7 +13,7 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_list.h>
 
-#define SBI_ECALL_VERSION_MAJOR		1
+#define SBI_ECALL_VERSION_MAJOR		2
 #define SBI_ECALL_VERSION_MINOR		0
 #define SBI_OPENSBI_IMPID		1
 

From 5d0ed1bfb85c36c927fe35e5ad2f98b5d6322b6e Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 6 Oct 2023 22:59:26 +0200
Subject: [PATCH 1396/1765] lib: sbi: simplify sanitize_domain()

Since commit 112daa2e647c ("lib: sbi: Maximize the use of HART index in
sbi_domain") the platform parameter is unused.

Fixes: 112daa2e647c ("lib: sbi: Maximize the use of HART index in sbi_domain")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index fd4a2965c3a..4d248d0b03b 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -256,8 +256,7 @@ static const struct sbi_domain_memregion *find_next_subset_region(
 	return ret;
 }
 
-static int sanitize_domain(const struct sbi_platform *plat,
-			   struct sbi_domain *dom)
+static int sanitize_domain(struct sbi_domain *dom)
 {
 	u32 i, j, count;
 	struct sbi_domain_memregion treg, *reg, *reg1;
@@ -494,7 +493,6 @@ int sbi_domain_register(struct sbi_domain *dom,
 	int rc;
 	struct sbi_domain *tdom;
 	u32 cold_hartid = current_hartid();
-	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
 	/* Sanity checks */
 	if (!dom || !assign_mask || domain_finalized)
@@ -517,7 +515,7 @@ int sbi_domain_register(struct sbi_domain *dom,
 	}
 
 	/* Sanitize discovered domain */
-	rc = sanitize_domain(plat, dom);
+	rc = sanitize_domain(dom);
 	if (rc) {
 		sbi_printf("%s: sanity checks failed for"
 			   " %s (error %d)\n", __func__,
@@ -564,7 +562,6 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	int rc;
 	bool reg_merged;
 	struct sbi_domain_memregion *nreg, *nreg1, *nreg2;
-	const struct sbi_platform *plat = sbi_platform_thishart_ptr();
 
 	/* Sanity checks */
 	if (!reg || domain_finalized || !root.regions ||
@@ -590,7 +587,7 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	/* Sort and optimize root regions */
 	do {
 		/* Sanitize the root domain so that memregions are sorted */
-		rc = sanitize_domain(plat, &root);
+		rc = sanitize_domain(&root);
 		if (rc) {
 			sbi_printf("%s: sanity checks failed for"
 				   " %s (error %d)\n", __func__,

From c1a69874476810aa47bb1ca8bbe7697f855dba5f Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sat, 7 Oct 2023 11:06:28 +0800
Subject: [PATCH 1397/1765] platform: generic: thead: move to thead c9xx header
 to vendor specific postion

The CSR encoding for t-head c9xx cores is shared across all the
platforms with these cores. So move header thead_c9xx.h to the
thead subdir.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c                        | 2 +-
 .../generic/include/{thead_c9xx.h => thead/c9xx_encoding.h}   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)
 rename platform/generic/include/{thead_c9xx.h => thead/c9xx_encoding.h} (98%)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index a9a7e477eec..b9602843ba3 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -5,7 +5,7 @@
  */
 
 #include <platform_override.h>
-#include <thead_c9xx.h>
+#include <thead/c9xx_encoding.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_bitops.h>
diff --git a/platform/generic/include/thead_c9xx.h b/platform/generic/include/thead/c9xx_encoding.h
similarity index 98%
rename from platform/generic/include/thead_c9xx.h
rename to platform/generic/include/thead/c9xx_encoding.h
index bab04082364..58adbef00a9 100644
--- a/platform/generic/include/thead_c9xx.h
+++ b/platform/generic/include/thead/c9xx_encoding.h
@@ -1,5 +1,5 @@
-#ifndef __RISCV_THEAD_C9XX_H____
-#define __RISCV_THEAD_C9XX_H____
+#ifndef __RISCV_THEAD_C9XX_ENCODING_H____
+#define __RISCV_THEAD_C9XX_ENCODING_H____
 
 /* T-HEAD C9xx M mode CSR.  */
 #define THEAD_C9XX_CSR_MXSTATUS		0x7c0

From 8e941e7fe3b8244107832b931980006bf9b0dc55 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sat, 7 Oct 2023 11:06:29 +0800
Subject: [PATCH 1398/1765] platform: generic: thead: separate implement of
 T-HEAD c9xx pmu

Separate the implement of T-HEAD c9xx pmu to allow any platform with
c9xx cores can use it.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                  |  2 +
 platform/generic/allwinner/sun20i-d1.c    | 51 +----------------
 platform/generic/include/thead/c9xx_pmu.h |  7 +++
 platform/generic/thead/Kconfig            |  5 ++
 platform/generic/thead/objects.mk         |  2 +
 platform/generic/thead/thead_c9xx_pmu.c   | 69 +++++++++++++++++++++++
 6 files changed, 87 insertions(+), 49 deletions(-)
 create mode 100644 platform/generic/include/thead/c9xx_pmu.h
 create mode 100644 platform/generic/thead/Kconfig
 create mode 100644 platform/generic/thead/thead_c9xx_pmu.c

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index e7bd94eb482..ea3b5cf43ec 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -26,6 +26,7 @@ config PLATFORM_GENERIC_MINOR_VER
 config PLATFORM_ALLWINNER_D1
 	bool "Allwinner D1 support"
 	depends on FDT_IRQCHIP_PLIC
+	select THEAD_C9XX_PMU
 	default n
 
 config PLATFORM_ANDES_AE350
@@ -57,5 +58,6 @@ config PLATFORM_THEAD
 	default n
 
 source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
+source "$(OPENSBI_SRC_DIR)/platform/generic/thead/Kconfig"
 
 endif
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index b9602843ba3..e9388dba76b 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -6,6 +6,7 @@
 
 #include <platform_override.h>
 #include <thead/c9xx_encoding.h>
+#include <thead/c9xx_pmu.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_bitops.h>
@@ -223,58 +224,10 @@ static int sun20i_d1_fdt_fixup(void *fdt, const struct fdt_match *match)
 	return fdt_add_cpu_idle_states(fdt, sun20i_d1_cpu_idle_states);
 }
 
-static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
-{
-	if (ctr_idx >= SBI_PMU_HW_CTR_MAX)
-		return;
-
-	/**
-	 * Clear out the OF bit so that next interrupt can be enabled.
-	 * This should be done before starting interrupt to avoid unexcepted
-	 * overflow interrupt.
-	 */
-	csr_clear(THEAD_C9XX_CSR_MCOUNTEROF, BIT(ctr_idx));
-
-	/**
-	 * This register is described in C9xx document as the control register
-	 * for enabling writes to the superuser state counter. However, if the
-	 * corresponding bit is not set to 1, scounterof will always read as 0
-	 * when the counter register overflows.
-	 */
-	csr_set(THEAD_C9XX_CSR_MCOUNTERWEN, BIT(ctr_idx));
-
-	/**
-	 * SSCOFPMF uses the OF bit for enabling/disabling the interrupt,
-	 * while the C9XX has designated enable bits.
-	 * So enable per-counter interrupt on C9xx here.
-	 */
-	csr_set(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
-}
-
-static void thead_c9xx_pmu_ctr_disable_irq(uint32_t ctr_idx)
-{
-	/**
-	 * There is no need to clear the bit of mcounterwen, it will expire
-	 * after setting the csr mcountinhibit.
-	 */
-	csr_clear(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
-}
-
-static int thead_c9xx_pmu_irq_bit(void)
-{
-	return THEAD_C9XX_MIP_MOIP;
-}
-
-const struct sbi_pmu_device thead_c9xx_pmu_device = {
-	.hw_counter_enable_irq = thead_c9xx_pmu_ctr_enable_irq,
-	.hw_counter_disable_irq = thead_c9xx_pmu_ctr_disable_irq,
-	.hw_counter_irq_bit = thead_c9xx_pmu_irq_bit,
-};
-
 static int sun20i_d1_extensions_init(const struct fdt_match *match,
 				     struct sbi_hart_features *hfeatures)
 {
-	sbi_pmu_set_device(&thead_c9xx_pmu_device);
+	thead_c9xx_register_pmu_device();
 
 	/* auto-detection doesn't work on t-head c9xx cores */
 	/* D1 has 29 mhpmevent csrs, but only 3-9,13-17 have valid value */
diff --git a/platform/generic/include/thead/c9xx_pmu.h b/platform/generic/include/thead/c9xx_pmu.h
new file mode 100644
index 00000000000..bb1d831a437
--- /dev/null
+++ b/platform/generic/include/thead/c9xx_pmu.h
@@ -0,0 +1,7 @@
+
+#ifndef __RISCV_THEAD_C9XX_PMU_H____
+#define __RISCV_THEAD_C9XX_PMU_H____
+
+void thead_c9xx_register_pmu_device(void);
+
+#endif // __RISCV_THEAD_C9XX_PMU_H____
diff --git a/platform/generic/thead/Kconfig b/platform/generic/thead/Kconfig
new file mode 100644
index 00000000000..e54e621029d
--- /dev/null
+++ b/platform/generic/thead/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config THEAD_C9XX_PMU
+	bool "T-HEAD c9xx M-mode PMU support"
+	default n
diff --git a/platform/generic/thead/objects.mk b/platform/generic/thead/objects.mk
index 854bfbdedf7..df2c61ba866 100644
--- a/platform/generic/thead/objects.mk
+++ b/platform/generic/thead/objects.mk
@@ -5,6 +5,8 @@
 # Copyright (C) 2023 Alibaba Group Holding Limited.
 #
 
+platform-objs-$(CONFIG_THEAD_C9XX_PMU) += thead/thead_c9xx_pmu.o
+
 carray-platform_override_modules-$(CONFIG_PLATFORM_THEAD) += thead_generic
 platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-generic.o
 platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-trap-handler.o
diff --git a/platform/generic/thead/thead_c9xx_pmu.c b/platform/generic/thead/thead_c9xx_pmu.c
new file mode 100644
index 00000000000..d205802296e
--- /dev/null
+++ b/platform/generic/thead/thead_c9xx_pmu.c
@@ -0,0 +1,69 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *   Haijiao Liu <haijiao.liu@sophgo.com>
+ *
+ */
+
+#include <thead/c9xx_encoding.h>
+#include <thead/c9xx_pmu.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_pmu.h>
+
+static void thead_c9xx_pmu_ctr_enable_irq(uint32_t ctr_idx)
+{
+	if (ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return;
+
+	/**
+	 * Clear out the OF bit so that next interrupt can be enabled.
+	 * This should be done before starting interrupt to avoid unexcepted
+	 * overflow interrupt.
+	 */
+	csr_clear(THEAD_C9XX_CSR_MCOUNTEROF, BIT(ctr_idx));
+
+	/**
+	 * This register is described in C9xx document as the control register
+	 * for enabling writes to the superuser state counter. However, if the
+	 * corresponding bit is not set to 1, scounterof will always read as 0
+	 * when the counter register overflows.
+	 */
+	csr_set(THEAD_C9XX_CSR_MCOUNTERWEN, BIT(ctr_idx));
+
+	/**
+	 * SSCOFPMF uses the OF bit for enabling/disabling the interrupt,
+	 * while the C9XX has designated enable bits.
+	 * So enable per-counter interrupt on C9xx here.
+	 */
+	csr_set(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static void thead_c9xx_pmu_ctr_disable_irq(uint32_t ctr_idx)
+{
+	/**
+	 * There is no need to clear the bit of mcounterwen, it will expire
+	 * after setting the csr mcountinhibit.
+	 */
+	csr_clear(THEAD_C9XX_CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static int thead_c9xx_pmu_irq_bit(void)
+{
+	return THEAD_C9XX_MIP_MOIP;
+}
+
+static const struct sbi_pmu_device thead_c9xx_pmu_device = {
+	.name = "thead,c900-pmu",
+	.hw_counter_enable_irq = thead_c9xx_pmu_ctr_enable_irq,
+	.hw_counter_disable_irq = thead_c9xx_pmu_ctr_disable_irq,
+	.hw_counter_irq_bit = thead_c9xx_pmu_irq_bit,
+};
+
+void thead_c9xx_register_pmu_device(void)
+{
+	sbi_pmu_set_device(&thead_c9xx_pmu_device);
+}

From 492d9b153d00ec2fc2fec89ded42e71df52e27aa Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sat, 7 Oct 2023 11:06:30 +0800
Subject: [PATCH 1399/1765] platform: generic: thead: separate implement of
 T-HEAD c9xx errata

Separate the implement of T-HEAD c9xx errata to allow any platform
with bug related to c9xx cores can use it.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                      |  1 +
 platform/generic/include/thead/c9xx_errata.h  | 13 +++++++++
 platform/generic/thead/Kconfig                |  4 +++
 platform/generic/thead/objects.mk             |  4 ++-
 platform/generic/thead/thead-generic.c        | 28 ++++++++-----------
 .../thead/thead_c9xx_errata_tlb_flush.c       | 17 +++++++++++
 ...andler.S => thead_c9xx_tlb_trap_handler.S} |  0
 7 files changed, 49 insertions(+), 18 deletions(-)
 create mode 100644 platform/generic/include/thead/c9xx_errata.h
 create mode 100644 platform/generic/thead/thead_c9xx_errata_tlb_flush.c
 rename platform/generic/thead/{thead-trap-handler.S => thead_c9xx_tlb_trap_handler.S} (100%)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index ea3b5cf43ec..3be75cf3d23 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -55,6 +55,7 @@ config PLATFORM_STARFIVE_JH7110
 
 config PLATFORM_THEAD
 	bool "THEAD C9xx support"
+	select THEAD_C9XX_ERRATA
 	default n
 
 source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
diff --git a/platform/generic/include/thead/c9xx_errata.h b/platform/generic/include/thead/c9xx_errata.h
new file mode 100644
index 00000000000..bf979384048
--- /dev/null
+++ b/platform/generic/include/thead/c9xx_errata.h
@@ -0,0 +1,13 @@
+
+#ifndef __RISCV_THEAD_C9XX_ERRATA_H____
+#define __RISCV_THEAD_C9XX_ERRATA_H____
+
+/**
+ * T-HEAD board with this quirk need to execute sfence.vma to flush
+ * stale entrie avoid incorrect memory access.
+ */
+#define THEAD_QUIRK_ERRATA_TLB_FLUSH		BIT(0)
+
+void thead_register_tlb_flush_trap_handler(void);
+
+#endif // __RISCV_THEAD_C9XX_ERRATA_H____
diff --git a/platform/generic/thead/Kconfig b/platform/generic/thead/Kconfig
index e54e621029d..c50d38ee6e4 100644
--- a/platform/generic/thead/Kconfig
+++ b/platform/generic/thead/Kconfig
@@ -3,3 +3,7 @@
 config THEAD_C9XX_PMU
 	bool "T-HEAD c9xx M-mode PMU support"
 	default n
+
+config THEAD_C9XX_ERRATA
+	bool "T-HEAD c9xx errata support"
+	default n
diff --git a/platform/generic/thead/objects.mk b/platform/generic/thead/objects.mk
index df2c61ba866..84f9fafbc7a 100644
--- a/platform/generic/thead/objects.mk
+++ b/platform/generic/thead/objects.mk
@@ -7,6 +7,8 @@
 
 platform-objs-$(CONFIG_THEAD_C9XX_PMU) += thead/thead_c9xx_pmu.o
 
+platform-objs-$(CONFIG_THEAD_C9XX_ERRATA) += thead/thead_c9xx_tlb_trap_handler.o
+platform-objs-$(CONFIG_THEAD_C9XX_ERRATA) += thead/thead_c9xx_errata_tlb_flush.o
+
 carray-platform_override_modules-$(CONFIG_PLATFORM_THEAD) += thead_generic
 platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-generic.o
-platform-objs-$(CONFIG_PLATFORM_THEAD) += thead/thead-trap-handler.o
diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index 8120f6fcd15..c77140c33af 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -7,40 +7,34 @@
  */
 
 #include <platform_override.h>
-#include <sbi/riscv_barrier.h>
+#include <thead/c9xx_errata.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-/**
- * T-HEAD board with this quirk need to execute sfence.vma to flush
- * stale entrie avoid incorrect memory access.
- */
-#define THEAD_QUIRK_TLB_FLUSH_FIXUP		BIT(0)
-
-void _thead_tlb_flush_fixup_trap_handler(void);
-
-void thead_register_tlb_flush_trap_handler(void)
-{
-	csr_write(CSR_MTVEC, &_thead_tlb_flush_fixup_trap_handler);
-}
+struct thead_generic_quirks {
+	u64	errata;
+};
 
 static int thead_generic_early_init(bool cold_boot,
 				    const struct fdt_match *match)
 {
-	unsigned long quirks = (unsigned long)match->data;
+	struct thead_generic_quirks *quirks = (void *)match->data;
 
-	if (quirks & THEAD_QUIRK_TLB_FLUSH_FIXUP)
+	if (quirks->errata & THEAD_QUIRK_ERRATA_TLB_FLUSH)
 		thead_register_tlb_flush_trap_handler();
 
 	return 0;
 }
 
+static struct thead_generic_quirks thead_th1520_quirks = {
+	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH,
+};
+
 static const struct fdt_match thead_generic_match[] = {
-	{ .compatible = "thead,th1520",
-	  .data = (void*)THEAD_QUIRK_TLB_FLUSH_FIXUP },
+	{ .compatible = "thead,th1520", .data = &thead_th1520_quirks },
 	{ },
 };
 
diff --git a/platform/generic/thead/thead_c9xx_errata_tlb_flush.c b/platform/generic/thead/thead_c9xx_errata_tlb_flush.c
new file mode 100644
index 00000000000..755899ac1b5
--- /dev/null
+++ b/platform/generic/thead/thead_c9xx_errata_tlb_flush.c
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_asm.h>
+
+void _thead_tlb_flush_fixup_trap_handler(void);
+
+void thead_register_tlb_flush_trap_handler(void)
+{
+	csr_write(CSR_MTVEC, &_thead_tlb_flush_fixup_trap_handler);
+}
diff --git a/platform/generic/thead/thead-trap-handler.S b/platform/generic/thead/thead_c9xx_tlb_trap_handler.S
similarity index 100%
rename from platform/generic/thead/thead-trap-handler.S
rename to platform/generic/thead/thead_c9xx_tlb_trap_handler.S

From 3e21b96003526d00a102ad500990014f1daf5136 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sat, 7 Oct 2023 11:06:31 +0800
Subject: [PATCH 1400/1765] platform: generic: thead: initialize PMU by default
 in thead generic platform

Since all the SoC with thead c9xx cores need this initialization at now,
initialize the c9xx pmu in the thead generic platform by default.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig               |  1 +
 platform/generic/thead/thead-generic.c | 13 +++++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 3be75cf3d23..f9e7ed2ab94 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -56,6 +56,7 @@ config PLATFORM_STARFIVE_JH7110
 config PLATFORM_THEAD
 	bool "THEAD C9xx support"
 	select THEAD_C9XX_ERRATA
+	select THEAD_C9XX_PMU
 	default n
 
 source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index c77140c33af..72f4aaacce7 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -8,6 +8,7 @@
 
 #include <platform_override.h>
 #include <thead/c9xx_errata.h>
+#include <thead/c9xx_pmu.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
@@ -29,6 +30,13 @@ static int thead_generic_early_init(bool cold_boot,
 	return 0;
 }
 
+static int thead_generic_extensions_init(const struct fdt_match *match,
+					 struct sbi_hart_features *hfeatures)
+{
+	thead_c9xx_register_pmu_device();
+	return 0;
+}
+
 static struct thead_generic_quirks thead_th1520_quirks = {
 	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH,
 };
@@ -39,6 +47,7 @@ static const struct fdt_match thead_generic_match[] = {
 };
 
 const struct platform_override thead_generic = {
-	.match_table	= thead_generic_match,
-	.early_init	= thead_generic_early_init,
+	.match_table		= thead_generic_match,
+	.early_init		= thead_generic_early_init,
+	.extensions_init	= thead_generic_extensions_init,
 };

From a140a4e862ce04584dee208424714952609e5b2c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 17 Oct 2023 15:20:19 -0700
Subject: [PATCH 1401/1765] lib: sbi: Correctly limit flushes to a single
 ASID/VMID

Per the SBI specification, the effects of these functions are limited to
a specific ASID and/or VMID. This applies even when flushing the entire
address space.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_tlb.c | 21 +++------------------
 1 file changed, 3 insertions(+), 18 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index ced2854256c..dad95088b17 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -111,12 +111,7 @@ void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	hgatp = csr_swap(CSR_HGATP,
 			 (vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
 
-	if (start == 0 && size == 0) {
-		__sbi_hfence_vvma_all();
-		goto done;
-	}
-
-	if (size == SBI_TLB_FLUSH_ALL) {
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		__sbi_hfence_vvma_asid(asid);
 		goto done;
 	}
@@ -138,12 +133,7 @@ void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_RCVD);
 
-	if (start == 0 && size == 0) {
-		__sbi_hfence_gvma_all();
-		return;
-	}
-
-	if (size == SBI_TLB_FLUSH_ALL) {
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		__sbi_hfence_gvma_vmid(vmid);
 		return;
 	}
@@ -162,13 +152,8 @@ void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_RCVD);
 
-	if (start == 0 && size == 0) {
-		tlb_flush_all();
-		return;
-	}
-
 	/* Flush entire MM context for a given ASID */
-	if (size == SBI_TLB_FLUSH_ALL) {
+	if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
 		__asm__ __volatile__("sfence.vma x0, %0"
 				     :
 				     : "r"(asid)

From 88ae718d361aa47b4f23537d4b00cfc93b4e739e Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 12 Oct 2023 09:54:18 +0800
Subject: [PATCH 1402/1765] platform: generic: thead: improve tlb flush errata

Flushing the tlb entries can solve the thead tlb problem, but flushing
it by address will miss something and lead to a exception in some rare
cases, and this is more common for sg2042.

To solve this problem, flush the tlb entries by asid in the custom trap
handler to ensure it is refreshed.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/thead/thead_c9xx_tlb_trap_handler.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/thead/thead_c9xx_tlb_trap_handler.S b/platform/generic/thead/thead_c9xx_tlb_trap_handler.S
index 861c02920fb..120daa73ce5 100644
--- a/platform/generic/thead/thead_c9xx_tlb_trap_handler.S
+++ b/platform/generic/thead/thead_c9xx_tlb_trap_handler.S
@@ -9,5 +9,5 @@
 	.align 3
 	.globl _thead_tlb_flush_fixup_trap_handler
 _thead_tlb_flush_fixup_trap_handler:
-	sfence.vma t0, zero
+	sfence.vma zero, t0
 	j _trap_handler

From 52fd64b82c0de0fdf386c96f2b9e1c4c3e56d80d Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 12 Oct 2023 16:33:28 +0800
Subject: [PATCH 1403/1765] platform: Uses hart count as the default size of
 tlb info

For platform with high number of harts, it is better to auto detect a
suitable number of entries in tlb fifo. Since allocating tlb entry for
all online harts can reduce the wait time significantly, using the
number of the online harts can make most platforms happy. This auto
detection can avoid most duplicate code for setting tlb fifo size.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h  | 3 +--
 platform/generic/platform.c | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 389203b02a4..58b9069d903 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -41,7 +41,6 @@
 #define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
-#define SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES				8
 
 #ifndef __ASSEMBLER__
 
@@ -330,7 +329,7 @@ static inline u32 sbi_platform_tlb_fifo_num_entries(const struct sbi_platform *p
 {
 	if (plat && sbi_platform_ops(plat)->get_tlb_num_entries)
 		return sbi_platform_ops(plat)->get_tlb_num_entries();
-	return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+	return sbi_scratch_last_hartindex() + 1;
 }
 
 /**
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 66a0b77c952..4246efdb1ad 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -260,7 +260,7 @@ static u32 generic_tlb_num_entries(void)
 {
 	if (generic_plat && generic_plat->tlb_num_entries)
 		return generic_plat->tlb_num_entries(generic_plat_match);
-	return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+	return sbi_scratch_last_hartindex() + 1;
 }
 
 static int generic_pmu_init(void)

From 07f2ccd990de5f55ce7d194846fff91b6c3aedf6 Mon Sep 17 00:00:00 2001
From: Chen Pei <cp0613@linux.alibaba.com>
Date: Wed, 18 Oct 2023 10:42:05 +0800
Subject: [PATCH 1404/1765] lib: utils/serial: Optimize semihosting_putc
 implementation

For some debuggers that do not implement SYSWRITEC and SYSREADC
operations, we can use SYSWRITE and SYSREAD instead like the
implementation of semihosting_getc().

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/semihosting.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/utils/serial/semihosting.c b/lib/utils/serial/semihosting.c
index ce65887dd72..a27c69eed81 100644
--- a/lib/utils/serial/semihosting.c
+++ b/lib/utils/serial/semihosting.c
@@ -160,11 +160,6 @@ static long semihosting_write(long fd, const void *memp, size_t len)
 
 /* clang-format on */
 
-static void semihosting_putc(char ch)
-{
-	semihosting_trap(SYSWRITEC, &ch);
-}
-
 static unsigned long semihosting_puts(const char *str, unsigned long len)
 {
 	char ch;
@@ -183,6 +178,11 @@ static unsigned long semihosting_puts(const char *str, unsigned long len)
 	return (ret < 0) ? 0 : ret;
 }
 
+static void semihosting_putc(char ch)
+{
+	semihosting_puts(&ch, 1);
+}
+
 static int semihosting_getc(void)
 {
 	char ch = 0;

From fccdf41d32877eca0cef3789d12a197cba73c2e2 Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Thu, 19 Oct 2023 05:27:34 -0400
Subject: [PATCH 1405/1765] firmware: fw_base.S: Fix boot hart status
 synchronization
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

It's wrong to put the fence after setting the boot status flag because
all relocation operations must be finished before setting the status
flag. So, this fence must be put before the setting status flag, and
there is no use in putting a fence between _start_warm and setting
status flag.

Also, nop can't delay other harts too much, so use div instead, just
like Linux cpu_relax. Current opensbi force enables “M” Standard
Extension, and mul instructions have been used in the fw_base.S.

After the above two fixes, the boot hart index param of the
fw_dynamic_info could be guaranteed properly for all platforms.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 42b03fe890f..f7763f4d9e5 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -399,8 +399,8 @@ _fdt_reloc_done:
 	/* mark boot hart done */
 	li	t0, BOOT_STATUS_BOOT_HART_DONE
 	lla	t1, _boot_status
-	REG_S	t0, 0(t1)
 	fence	rw, rw
+	REG_S	t0, 0(t1)
 	j	_start_warm
 
 	/* waiting for boot hart to be done (_boot_status == 2) */
@@ -409,9 +409,9 @@ _wait_for_boot_hart:
 	lla	t1, _boot_status
 	REG_L	t1, 0(t1)
 	/* Reduce the bus traffic so that boot hart may proceed faster */
-	nop
-	nop
-	nop
+	div	t2, t2, zero
+	div	t2, t2, zero
+	div	t2, t2, zero
 	bne	t0, t1, _wait_for_boot_hart
 
 _start_warm:

From d1e0f7f25b2f1527425942dfc327f1d4a61bbff4 Mon Sep 17 00:00:00 2001
From: Guo Ren <guoren@linux.alibaba.com>
Date: Thu, 12 Oct 2023 04:59:13 -0400
Subject: [PATCH 1406/1765] utils/reset: Remove fdt_reset_thead

In the past, we used fdt_reset_thead to help customers with prototype
verification. However, with the emergence of the Big-little SoC system,
it can no longer meet the demand. Therefore, we use zero_stage_boot
instead of fdt_reset_thead. It cleans up the opensbi code and ends the
disputation of reset_sample's dts.

This patch removes the fdt_reset_thead component and updates the related
doc.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/thead-c9xx.md           | 183 +-------------------------
 lib/utils/reset/Kconfig               |   4 -
 lib/utils/reset/fdt_reset_thead.c     | 134 -------------------
 lib/utils/reset/fdt_reset_thead.h     |  23 ----
 lib/utils/reset/fdt_reset_thead_asm.S |  47 -------
 lib/utils/reset/objects.mk            |   4 -
 platform/generic/configs/defconfig    |   1 -
 7 files changed, 7 insertions(+), 389 deletions(-)
 delete mode 100644 lib/utils/reset/fdt_reset_thead.c
 delete mode 100644 lib/utils/reset/fdt_reset_thead.h
 delete mode 100644 lib/utils/reset/fdt_reset_thead_asm.S

diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md
index 8bb9e91f1a9..cc05b58ca6b 100644
--- a/docs/platform/thead-c9xx.md
+++ b/docs/platform/thead-c9xx.md
@@ -1,7 +1,7 @@
 T-HEAD C9xx Series Processors
 =============================
 
-The **C9xx** series processors are high-performance RISC-V architecture
+The C9xx series processors are high-performance RISC-V architecture
 multi-core processors with AI vector acceleration engine.
 
 For more details, refer [T-HEAD.CN](https://www.t-head.cn/)
@@ -12,185 +12,16 @@ To build the platform-specific library and firmware images, provide the
 Platform Options
 ----------------
 
-The *T-HEAD C9xx* does not have any platform-specific compile options
+The T-HEAD C9xx does not have any platform-specific compile options
 because it uses generic platform.
 
 ```
-CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic /usr/bin/make
+CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic make
 ```
 
-The *T-HEAD C9xx* DTB provided to OpenSBI generic firmwares will usually have
-"riscv,clint0", "riscv,plic0", "thead,reset-sample" compatible strings.
+Here is the simplest boot flow for a fpga prototype:
 
-DTS Example1: (Single core, eg: Allwinner D1 - c906)
-----------------------------------------------------
+ (Jtag gdbinit) -> (zsb) -> (opensbi) -> (linux)
 
-```
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		timebase-frequency = <3000000>;
-		cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcv";
-			mmu-type = "riscv,sv39";
-			cpu0_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-			};
-		};
-	};
-
-	soc {
-		#address-cells = <2>;
-		#size-cells = <2>;
-		compatible = "simple-bus";
-		ranges;
-
-		clint0: clint@14000000 {
-			compatible = "allwinner,sun20i-d1-clint";
-			interrupts-extended = <
-				&cpu0_intc  3 &cpu0_intc  7
-				>;
-			reg = <0x0 0x14000000 0x0 0x04000000>;
-		};
-
-		intc: interrupt-controller@10000000 {
-			#interrupt-cells = <1>;
-			compatible = "allwinner,sun20i-d1-plic",
-				     "thead,c900-plic";
-			interrupt-controller;
-			interrupts-extended = <
-				&cpu0_intc  0xffffffff &cpu0_intc  9
-				>;
-			reg = <0x0 0x10000000 0x0 0x04000000>;
-			reg-names = "control";
-			riscv,max-priority = <7>;
-			riscv,ndev = <200>;
-		};
-	}
-```
-
-DTS Example2: (Multi cores with soc reset-regs)
------------------------------------------------
-
-```
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		timebase-frequency = <3000000>;
-		cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdc";
-			mmu-type = "riscv,sv39";
-			cpu0_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-			};
-		};
-		cpu@1 {
-			device_type = "cpu";
-			reg = <1>;
-			status = "fail";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdc";
-			mmu-type = "riscv,sv39";
-			cpu1_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-			};
-		};
-		cpu@2 {
-			device_type = "cpu";
-			reg = <2>;
-			status = "fail";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdc";
-			mmu-type = "riscv,sv39";
-			cpu2_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-			};
-		};
-		cpu@3 {
-			device_type = "cpu";
-			reg = <3>;
-			status = "fail";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdc";
-			mmu-type = "riscv,sv39";
-			cpu3_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-			};
-		};
-	};
-
-	soc {
-		#address-cells = <2>;
-		#size-cells = <2>;
-		compatible = "simple-bus";
-		ranges;
-
-		reset: reset-sample {
-			compatible = "thead,reset-sample";
-			entry-reg = <0xff 0xff019050>;
-			entry-cnt = <4>;
-			control-reg = <0xff 0xff015004>;
-			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
-		};
-
-		clint0: clint@ffdc000000 {
-			compatible = "riscv,clint0";
-			interrupts-extended = <
-				&cpu0_intc  3 &cpu0_intc  7
-				&cpu1_intc  3 &cpu1_intc  7
-				&cpu2_intc  3 &cpu2_intc  7
-				&cpu3_intc  3 &cpu3_intc  7
-				&cpu4_intc  3 &cpu4_intc  7
-				>;
-			reg = <0xff 0xdc000000 0x0 0x04000000>;
-		};
-
-		intc: interrupt-controller@ffd8000000 {
-			#interrupt-cells = <1>;
-			compatible = "thead,c900-plic";
-			interrupt-controller;
-			interrupts-extended = <
-				&cpu0_intc  0xffffffff &cpu0_intc  9
-				&cpu1_intc  0xffffffff &cpu1_intc  9
-				&cpu2_intc  0xffffffff &cpu2_intc  9
-				&cpu3_intc  0xffffffff &cpu3_intc  9
-				>;
-			reg = <0xff 0xd8000000 0x0 0x04000000>;
-			reg-names = "control";
-			riscv,max-priority = <7>;
-			riscv,ndev = <80>;
-		};
-	}
-```
-
-DTS Example2: (Multi cores with old reset csrs)
------------------------------------------------
-```
-	reset: reset-sample {
-		compatible = "thead,reset-sample";
-		using-csr-reset;
-		csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
-			    0x3b0 0x3b1 0x3b2 0x3b3
-			    0x3b4 0x3b5 0x3b6 0x3b7
-			    0x3a0>;
-	};
-```
+For more details, refer:
+ [zero stage boot](https://github.com/c-sky/zero_stage_boot)
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 23f50c4dfe4..b26260db167 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -33,10 +33,6 @@ config FDT_RESET_SYSCON
 	depends on FDT_REGMAP
 	default n
 
-config FDT_RESET_THEAD
-	bool "T-HEAD FDT reset driver"
-	default n
-
 endif
 
 endmenu
diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c
deleted file mode 100644
index e1d6885deba..00000000000
--- a/lib/utils/reset/fdt_reset_thead.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#include <libfdt.h>
-#include <sbi/riscv_io.h>
-#include <sbi/sbi_bitops.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_scratch.h>
-#include <sbi/sbi_system.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/reset/fdt_reset.h>
-
-#include "fdt_reset_thead.h"
-
-struct custom_csr custom_csr[MAX_CUSTOM_CSR];
-
-#define CSR_OPCODE 0x39073
-static void clone_csrs(int cnt)
-{
-	unsigned long i;
-
-	for (i = 0; i < cnt; i++) {
-		/* Write csr BIT[31 - 20] to stub */
-		__reset_thead_csr_stub[3*i + 1] =
-				CSR_OPCODE | (custom_csr[i].index << 20);
-
-		/* Mask csr BIT[31 - 20] */
-		*(u32 *)&__fdt_reset_thead_csrr &= BIT(20) - 1;
-		smp_mb();
-
-		/* Write csr BIT[31 - 20] to __fdt_reset_thead_csrr */
-		*(u32 *)&__fdt_reset_thead_csrr |= custom_csr[i].index << 20;
-		smp_mb();
-
-		RISCV_FENCE_I;
-
-		custom_csr[i].value = __fdt_reset_thead_csrr();
-	}
-}
-
-static int thead_system_reset_check(u32 type, u32 reason)
-{
-	return 1;
-}
-
-static void thead_system_reset(u32 type, u32 reason)
-{
-	ebreak();
-}
-
-static struct sbi_system_reset_device thead_reset = {
-	.name = "thead_reset",
-	.system_reset_check = thead_system_reset_check,
-	.system_reset = thead_system_reset
-};
-
-extern void __thead_pre_start_warm(void);
-static int thead_reset_init(void *fdt, int nodeoff,
-				 const struct fdt_match *match)
-{
-	char *p;
-	const fdt64_t *val;
-	const fdt32_t *val_w;
-	int len, i;
-	u32 t, tmp = 0;
-
-	/* Prepare clone csrs */
-	val_w = fdt_getprop(fdt, nodeoff, "csr-copy", &len);
-	if (len > 0 && val_w) {
-		int cnt;
-
-		cnt = len / sizeof(fdt32_t);
-		if (cnt > MAX_CUSTOM_CSR)
-			sbi_hart_hang();
-
-		for (i = 0; i < cnt; i++) {
-			custom_csr[i].index = fdt32_to_cpu(val_w[i]);
-		}
-
-		if (cnt)
-			clone_csrs(cnt);
-	}
-
-	/* Old reset method for secondary harts */
-	if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) {
-		csr_write(0x7c7, (ulong)&__thead_pre_start_warm);
-		csr_write(0x7c6, -1);
-	}
-
-	/* Custom reset method for secondary harts */
-	val = fdt_getprop(fdt, nodeoff, "entry-reg", &len);
-	if (len > 0 && val) {
-          p = (char *)(ulong)fdt64_to_cpu(*val);
-
-		val_w = fdt_getprop(fdt, nodeoff, "entry-cnt", &len);
-		if (len > 0 && val_w) {
-			tmp = fdt32_to_cpu(*val_w);
-
-			for (i = 0; i < tmp; i++) {
-				t = (ulong)&__thead_pre_start_warm;
-				writel(t, p + (8 * i));
-				t = (u64)(ulong)&__thead_pre_start_warm >> 32;
-				writel(t, p + (8 * i) + 4);
-			}
-		}
-
-		val = fdt_getprop(fdt, nodeoff, "control-reg", &len);
-		if (len > 0 && val) {
-			p = (void *)(ulong)fdt64_to_cpu(*val);
-
-			val_w = fdt_getprop(fdt, nodeoff, "control-val", &len);
-			if (len > 0 && val_w) {
-				tmp = fdt32_to_cpu(*val_w);
-				tmp |= readl(p);
-				writel(tmp, p);
-			}
-		}
-	}
-
-	sbi_system_reset_add_device(&thead_reset);
-
-	return 0;
-}
-
-static const struct fdt_match thead_reset_match[] = {
-	{ .compatible = "thead,reset-sample" },
-	{ },
-};
-
-struct fdt_reset fdt_reset_thead = {
-	.match_table = thead_reset_match,
-	.init = thead_reset_init
-};
diff --git a/lib/utils/reset/fdt_reset_thead.h b/lib/utils/reset/fdt_reset_thead.h
deleted file mode 100644
index d7a686ec931..00000000000
--- a/lib/utils/reset/fdt_reset_thead.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#ifndef __FDT_RESET_THEAD_H__
-#define __FDT_RESET_THEAD_H__
-
-#define MAX_CUSTOM_CSR	32
-
-#ifndef __ASSEMBLER__
-struct custom_csr {
-	unsigned long index;
-	unsigned long value;
-};
-
-u64  __fdt_reset_thead_csrr(void);
-
-extern struct custom_csr custom_csr[MAX_CUSTOM_CSR];
-extern u32 __reset_thead_csr_stub[];
-
-#endif /* __ASSEMBLER__ */
-
-#endif /* __FDT_RESET_THEAD_H__ */
diff --git a/lib/utils/reset/fdt_reset_thead_asm.S b/lib/utils/reset/fdt_reset_thead_asm.S
deleted file mode 100644
index 8237951fd82..00000000000
--- a/lib/utils/reset/fdt_reset_thead_asm.S
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- */
-
-#include <sbi/riscv_asm.h>
-#include "fdt_reset_thead.h"
-
-/*
- * csrrs rd, csr, rs1
- * |31   20|19   15|14   12|11  7|6       0|
- *    csr     rs1     010     rd   1110011
- */
-#define CSR_STUB	addi    x0, x0, 0
-
-	.option norvc
-	.align 3
-	.global __fdt_reset_thead_csrr
-__fdt_reset_thead_csrr:
-	csrrs a0, 0, x0
-	ret
-
-	.align 3
-	.global __thead_pre_start_warm
-__thead_pre_start_warm:
-	/*
-	 * Clear L1 cache & BTB & BHT ...
-	 */
-	li	t1, 0x70013
-	csrw	0x7c2, t1
-	fence rw,rw
-
-	lla	t1, custom_csr
-
-	.global __reset_thead_csr_stub
-__reset_thead_csr_stub:
-.rept	MAX_CUSTOM_CSR
-	REG_L	t2, 8(t1)
-	CSR_STUB
-	addi	t1, t1, 16
-.endr
-	/*
-	 * Clear L1 cache & BTB & BHT ...
-	 */
-	li	t1, 0x70013
-	csrw	0x7c2, t1
-	fence rw,rw
-	j _start_warm
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index ea9cedcd800..b5222347b21 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -26,7 +26,3 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_poweroff
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_reboot
 libsbiutils-objs-$(CONFIG_FDT_RESET_SYSCON) += reset/fdt_reset_syscon.o
-
-carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_THEAD) += fdt_reset_thead
-libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead.o
-libsbiutils-objs-$(CONFIG_FDT_RESET_THEAD) += reset/fdt_reset_thead_asm.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index c432bc2f893..95bab61ea5d 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -27,7 +27,6 @@ CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
 CONFIG_FDT_RESET_SYSCON=y
-CONFIG_FDT_RESET_THEAD=y
 CONFIG_FDT_SERIAL=y
 CONFIG_FDT_SERIAL_CADENCE=y
 CONFIG_FDT_SERIAL_GAISLER=y

From 896d2c99e239c8142be16cc6df979e7f805d8896 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 16 Nov 2023 17:07:13 +0800
Subject: [PATCH 1407/1765] lib: utils/timer: Allow ACLINT MTIMER driver to
 setup quirks

The quirks checking will cause ACLINT step into a CLINT code path, this
is not expected when ACLINT needs custom quirks.

Add a new quirk to identify custom ACLINT, and apply the general quirks
after applying CLINT specific quirks.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/fdt_timer_mtimer.c | 35 +++++++++++++++++-------------
 1 file changed, 20 insertions(+), 15 deletions(-)

diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 9eaa11d855c..3d2dce02c41 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -16,9 +16,10 @@
 #include <sbi_utils/timer/aclint_mtimer.h>
 
 struct timer_mtimer_quirks {
-	unsigned int	mtime_offset;
+	bool		is_clint;
+	unsigned int	clint_mtime_offset;
+	bool		clint_without_mtime;
 	bool		has_64bit_mmio;
-	bool		without_mtime;
 };
 
 struct timer_mtimer_node {
@@ -36,6 +37,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	unsigned long addr[2], size[2];
 	struct timer_mtimer_node *mtn, *n;
 	struct aclint_mtimer_data *mt;
+	const struct timer_mtimer_quirks *quirks = match->data;
 
 	mtn = sbi_zalloc(sizeof(*mtn));
 	if (!mtn)
@@ -58,24 +60,20 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		return rc;
 	}
 
-	if (match->data) { /* SiFive CLINT */
-		const struct timer_mtimer_quirks *quirks = match->data;
-
+	if (quirks && quirks->is_clint) { /* SiFive CLINT */
 		/* Set CLINT addresses */
 		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
 		mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;
-		if (!quirks->without_mtime) {
+		if (!quirks->clint_without_mtime) {
 			mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET;
 			mt->mtime_size = size[0] - mt->mtimecmp_size;
 			/* Adjust MTIMER address and size for CLINT device */
-			mt->mtime_addr += quirks->mtime_offset;
-			mt->mtime_size -= quirks->mtime_offset;
+			mt->mtime_addr += quirks->clint_mtime_offset;
+			mt->mtime_size -= quirks->clint_mtime_offset;
 		} else {
 			mt->mtime_addr = mt->mtime_size = 0;
 		}
-		mt->mtimecmp_addr += quirks->mtime_offset;
-		/* Apply additional CLINT quirks */
-		mt->has_64bit_mmio = quirks->has_64bit_mmio;
+		mt->mtimecmp_addr += quirks->clint_mtime_offset;
 	} else { /* RISC-V ACLINT MTIMER */
 		/* Set ACLINT MTIMER addresses */
 		mt->mtime_addr = addr[0];
@@ -84,6 +82,11 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		mt->mtimecmp_size = size[1];
 	}
 
+	/* Apply additional quirks */
+	if (quirks) {
+		mt->has_64bit_mmio = quirks->has_64bit_mmio;
+	}
+
 	/* Check if MTIMER device has shared MTIME address */
 	if (mt->mtime_size) {
 		mt->has_shared_mtime = false;
@@ -133,13 +136,15 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 }
 
 static const struct timer_mtimer_quirks sifive_clint_quirks = {
-	.mtime_offset	= CLINT_MTIMER_OFFSET,
-	.has_64bit_mmio	= true,
+	.is_clint		= true,
+	.clint_mtime_offset	= CLINT_MTIMER_OFFSET,
+	.has_64bit_mmio		= true,
 };
 
 static const struct timer_mtimer_quirks thead_clint_quirks = {
-	.mtime_offset	= CLINT_MTIMER_OFFSET,
-	.without_mtime  = true,
+	.is_clint		= true,
+	.clint_mtime_offset	= CLINT_MTIMER_OFFSET,
+	.clint_without_mtime	= true,
 };
 
 static const struct fdt_match timer_mtimer_match[] = {

From accafb13d47ca1511364def6cd8840ef1f947e50 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 16 Nov 2023 17:07:14 +0800
Subject: [PATCH 1408/1765] lib: utils/timer: mtimer: add separate T-Head C9xx
 CLINT mtimer compatible

T-HEAD allows soc vendor to map the mtimer and mswi of C9xx clint on
different address, which may cause a misuse if use the same compatible
string, add a new timer compatible string to avoid this.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/linux-riscv/6e48cbe5e60f9ada2fd1fe58e803e127f1a678e5.1696433229.git.unicorn_wang@outlook.com/
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/fdt_timer_mtimer.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 3d2dce02c41..3ba6b8f9f98 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -147,10 +147,16 @@ static const struct timer_mtimer_quirks thead_clint_quirks = {
 	.clint_without_mtime	= true,
 };
 
+static const struct timer_mtimer_quirks thead_aclint_quirks = {
+	.has_64bit_mmio		= false,
+};
+
 static const struct fdt_match timer_mtimer_match[] = {
 	{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "thead,c900-clint", .data = &thead_clint_quirks },
+	{ .compatible = "thead,c900-aclint-mtimer",
+	  .data = &thead_aclint_quirks },
 	{ .compatible = "riscv,aclint-mtimer" },
 	{ },
 };

From 98bc25f181a3dbdda1c630a4473f5a5a50ac7d58 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 16 Nov 2023 17:07:15 +0800
Subject: [PATCH 1409/1765] lib: utils/ipi: mswi: add separate T-Head C9xx
 CLINT mswi compatible

Like the mtimer of T-HEAD C9xx clint, the mswi also needs new compatible
string to avoid misuse.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/linux-riscv/1f6b82a1864477a51db33d3f295889ff985b497b.1696433229.git.unicorn_wang@outlook.com/
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/fdt_ipi_mswi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index e3a63782465..5432db6ef92 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -56,6 +56,7 @@ static const struct fdt_match ipi_mswi_match[] = {
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
 	{ .compatible = "sifive,clint0", .data = &clint_offset },
 	{ .compatible = "thead,c900-clint", .data = &clint_offset },
+	{ .compatible = "thead,c900-aclint-mswi" },
 	{ .compatible = "riscv,aclint-mswi" },
 	{ },
 };

From 5b2f55d65ac2af9a0a880665a2e9172688616755 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 16 Nov 2023 18:49:38 +0800
Subject: [PATCH 1410/1765] lib: sbi: separate the swap operation of domain
 region

Swapping domain region is a common operation when sorting domain region,
so separate it as a function to make code clean.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4d248d0b03b..71cb381ff6b 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -256,10 +256,20 @@ static const struct sbi_domain_memregion *find_next_subset_region(
 	return ret;
 }
 
+static void swap_region(struct sbi_domain_memregion* reg1,
+			struct sbi_domain_memregion* reg2)
+{
+	struct sbi_domain_memregion treg;
+
+	sbi_memcpy(&treg, reg1, sizeof(treg));
+	sbi_memcpy(reg1, reg2, sizeof(treg));
+	sbi_memcpy(reg2, &treg, sizeof(treg));
+}
+
 static int sanitize_domain(struct sbi_domain *dom)
 {
 	u32 i, j, count;
-	struct sbi_domain_memregion treg, *reg, *reg1;
+	struct sbi_domain_memregion *reg, *reg1;
 
 	/* Check possible HARTs */
 	if (!dom->possible_harts) {
@@ -323,9 +333,7 @@ static int sanitize_domain(struct sbi_domain *dom)
 			if (!is_region_before(reg1, reg))
 				continue;
 
-			sbi_memcpy(&treg, reg1, sizeof(treg));
-			sbi_memcpy(reg1, reg, sizeof(treg));
-			sbi_memcpy(reg, &treg, sizeof(treg));
+			swap_region(reg, reg1);
 		}
 	}
 

From 3b03cdd60ce5f91c4324a301b8cb2943a17b0843 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 16 Nov 2023 18:49:39 +0800
Subject: [PATCH 1411/1765] lib: sbi: Add regions merging when sanitizing
 domain region

As the domain will reject a new memory region which has a sub-regions
already in the domain, even the new region is bigger and has the same
flags. This problem can be solved by relaxing region restriction and
rechecking when adding and sanitizing domains.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 60 ++++++++++++++++++++++++++++----------------
 1 file changed, 38 insertions(+), 22 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 71cb381ff6b..88d25deb100 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -193,12 +193,11 @@ static bool is_region_subset(const struct sbi_domain_memregion *regA,
 	return false;
 }
 
-/** Check if regionA conflicts regionB */
-static bool is_region_conflict(const struct sbi_domain_memregion *regA,
-				const struct sbi_domain_memregion *regB)
+/** Check if regionA can be replaced by regionB */
+static bool is_region_compatible(const struct sbi_domain_memregion *regA,
+				 const struct sbi_domain_memregion *regB)
 {
-	if ((is_region_subset(regA, regB) || is_region_subset(regB, regA)) &&
-	    regA->flags == regB->flags)
+	if (is_region_subset(regA, regB) && regA->flags == regB->flags)
 		return true;
 
 	return false;
@@ -266,9 +265,15 @@ static void swap_region(struct sbi_domain_memregion* reg1,
 	sbi_memcpy(reg2, &treg, sizeof(treg));
 }
 
+static void clear_region(struct sbi_domain_memregion* reg)
+{
+	sbi_memset(reg, 0x0, sizeof(*reg));
+}
+
 static int sanitize_domain(struct sbi_domain *dom)
 {
 	u32 i, j, count;
+	bool is_covered;
 	struct sbi_domain_memregion *reg, *reg1;
 
 	/* Check possible HARTs */
@@ -320,16 +325,6 @@ static int sanitize_domain(struct sbi_domain *dom)
 		for (j = i + 1; j < count; j++) {
 			reg1 = &dom->regions[j];
 
-			if (is_region_conflict(reg1, reg)) {
-				sbi_printf("%s: %s conflict between regions "
-					"(base=0x%lx order=%lu flags=0x%lx) and "
-					"(base=0x%lx order=%lu flags=0x%lx)\n",
-					__func__, dom->name,
-					reg->base, reg->order, reg->flags,
-					reg1->base, reg1->order, reg1->flags);
-				return SBI_EINVAL;
-			}
-
 			if (!is_region_before(reg1, reg))
 				continue;
 
@@ -337,6 +332,31 @@ static int sanitize_domain(struct sbi_domain *dom)
 		}
 	}
 
+	/* Remove covered regions */
+	while(i < (count - 1)) {
+		is_covered = false;
+		reg = &dom->regions[i];
+
+		for (j = i + 1; j < count; j++) {
+			reg1 = &dom->regions[j];
+
+			if (is_region_compatible(reg, reg1)) {
+				is_covered = true;
+				break;
+			}
+		}
+
+		/* find a region is superset of reg, remove reg */
+		if (is_covered) {
+			for (j = i; j < (count - 1); j++)
+				swap_region(&dom->regions[j],
+					    &dom->regions[j + 1]);
+			clear_region(&dom->regions[count - 1]);
+			count--;
+		} else
+			i++;
+	}
+
 	/*
 	 * We don't need to check boot HART id of domain because if boot
 	 * HART id is not possible/assigned to this domain then it won't
@@ -576,14 +596,10 @@ int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 	    (ROOT_REGION_MAX <= root_memregs_count))
 		return SBI_EINVAL;
 
-	/* Check for conflicts */
+	/* Check whether compatible region exists for the new one */
 	sbi_domain_for_each_memregion(&root, nreg) {
-		if (is_region_conflict(reg, nreg)) {
-			sbi_printf("%s: is_region_conflict check failed"
-			" 0x%lx conflicts existing 0x%lx\n", __func__,
-				   reg->base, nreg->base);
-			return SBI_EALREADY;
-		}
+		if (is_region_compatible(reg, nreg))
+			return 0;
 	}
 
 	/* Append the memregion to root memregions */

From 2bfdb9e5c239db4ee39fb5286c6eb0c44641d8da Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 20 Oct 2023 07:57:18 +0800
Subject: [PATCH 1412/1765] platform: generic: Add Sophgo sg2042 platform
 support

Add Sophgo sg2042 soc support

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig           |  6 +++
 platform/generic/configs/defconfig |  1 +
 platform/generic/sophgo/objects.mk |  9 +++++
 platform/generic/sophgo/sg2042.c   | 63 ++++++++++++++++++++++++++++++
 4 files changed, 79 insertions(+)
 create mode 100644 platform/generic/sophgo/objects.mk
 create mode 100644 platform/generic/sophgo/sg2042.c

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index f9e7ed2ab94..a902cf37d92 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -49,6 +49,12 @@ config PLATFORM_SIFIVE_FU740
 	depends on FDT_RESET && FDT_I2C
 	default n
 
+config PLATFORM_SOPHGO_SG2042
+	bool "Sophgo sg2042 support"
+	select THEAD_C9XX_ERRATA
+	select THEAD_C9XX_PMU
+	default n
+
 config PLATFORM_STARFIVE_JH7110
 	bool "StarFive JH7110 support"
 	default n
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 95bab61ea5d..1ce6a1204cf 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -3,6 +3,7 @@ CONFIG_PLATFORM_ANDES_AE350=y
 CONFIG_PLATFORM_RENESAS_RZFIVE=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
+CONFIG_PLATFORM_SOPHGO_SG2042=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_PLATFORM_THEAD=y
 CONFIG_FDT_GPIO=y
diff --git a/platform/generic/sophgo/objects.mk b/platform/generic/sophgo/objects.mk
new file mode 100644
index 00000000000..3d2908ad127
--- /dev/null
+++ b/platform/generic/sophgo/objects.mk
@@ -0,0 +1,9 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
+# Copyright (C) 2023 Alibaba Group Holding Limited.
+#
+
+carray-platform_override_modules-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo_sg2042
+platform-objs-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo/sg2042.o
diff --git a/platform/generic/sophgo/sg2042.c b/platform/generic/sophgo/sg2042.c
new file mode 100644
index 00000000000..ae2d702e765
--- /dev/null
+++ b/platform/generic/sophgo/sg2042.c
@@ -0,0 +1,63 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *
+ */
+
+#include <platform_override.h>
+#include <thead/c9xx_errata.h>
+#include <thead/c9xx_pmu.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
+
+#define SOPHGO_SG2042_TIMER_BASE	0x70ac000000ULL
+#define SOPHGO_SG2042_TIMER_SIZE	0x10000UL
+#define SOPHGO_SG2042_TIMER_NUM		16
+
+static int sophgo_sg2042_early_init(bool cold_boot,
+				    const struct fdt_match *match)
+{
+	thead_register_tlb_flush_trap_handler();
+
+	/*
+	 * Sophgo sg2042 soc use separate 16 timers while initiating,
+	 * merge them as a single domain to avoid wasting.
+	 */
+	if (cold_boot)
+		return sbi_domain_root_add_memrange(
+					(ulong)SOPHGO_SG2042_TIMER_BASE,
+					SOPHGO_SG2042_TIMER_SIZE *
+					SOPHGO_SG2042_TIMER_NUM,
+					MTIMER_REGION_ALIGN,
+					(SBI_DOMAIN_MEMREGION_MMIO |
+					 SBI_DOMAIN_MEMREGION_M_READABLE |
+					 SBI_DOMAIN_MEMREGION_M_WRITABLE));
+
+
+	return 0;
+}
+
+static int sophgo_sg2042_extensions_init(const struct fdt_match *match,
+					 struct sbi_hart_features *hfeatures)
+{
+	thead_c9xx_register_pmu_device();
+	return 0;
+}
+
+static const struct fdt_match sophgo_sg2042_match[] = {
+	{ .compatible = "sophgo,sg2042" },
+	{ },
+};
+
+const struct platform_override sophgo_sg2042 = {
+	.match_table		= sophgo_sg2042_match,
+	.early_init		= sophgo_sg2042_early_init,
+	.extensions_init	= sophgo_sg2042_extensions_init,
+};

From 280f7ae62724b184fdd61347e6f905bc39dec64b Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sun, 29 Oct 2023 00:49:57 +0200
Subject: [PATCH 1413/1765] include: sbi: macros for mseccfg.sseed and .useed

Define macros to access the sseed and the useed bit in the machine
security configuration register (mseccfg).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a545242a69d..0996d649a68 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -678,6 +678,10 @@
 #define MSECCFG_MMWP			(_UL(1) << MSECCFG_MMWP_SHIFT)
 #define MSECCFG_RLB_SHIFT		(2)
 #define MSECCFG_RLB			(_UL(1) << MSECCFG_RLB_SHIFT)
+#define MSECCFG_USEED_SHIFT		(8)
+#define MSECCFG_USEED			(_UL(1) << MSECCFG_USEED_SHIFT)
+#define MSECCFG_SSEED_SHIFT		(9)
+#define MSECCFG_SSEED			(_UL(1) << MSECCFG_SSEED_SHIFT)
 
 /* Counter Overflow CSR */
 #define CSR_SCOUNTOVF			0xda0

From efcac338bdf24273ea8a8e332bcb64adfd0dbf39 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sun, 29 Oct 2023 00:49:58 +0200
Subject: [PATCH 1414/1765] lib: sbi: Add Zkr in hart extensions

- Add Zkr as extension in sbi_hart_extensions enum
- Return "zkr" string for Zkr extension from sbi_hart_extension_id2string

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h     | 2 ++
 lib/sbi/sbi_hart.c         | 3 +++
 lib/utils/fdt/fdt_helper.c | 1 +
 3 files changed, 6 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index e60f41502f6..fe1124ab2d9 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -40,6 +40,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_ZICNTR,
 	/** HART has Zihpm extension */
 	SBI_HART_EXT_ZIHPM,
+	/** HART has Zkr extension */
+	SBI_HART_EXT_ZKR,
 	/** Hart has Smcntrpmf extension */
 	SBI_HART_EXT_SMCNTRPMF,
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 29d648127de..569596f182f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -678,6 +678,9 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_ZIHPM:
 		estr = "zihpm";
 		break;
+	case SBI_HART_EXT_ZKR:
+		estr = "zkr";
+		break;
 	case SBI_HART_EXT_SMEPMP:
 		estr = "smepmp";
 		break;
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 9ae7f09fb3b..35be7baba44 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -376,6 +376,7 @@ static int fdt_parse_isa_one_hart(const char *isa, unsigned long *extensions)
 			}
 
 		set_multi_letter_ext("smepmp", SBI_HART_EXT_SMEPMP);
+		set_multi_letter_ext("zkr", SBI_HART_EXT_ZKR);
 #undef set_multi_letter_ext
 	}
 

From 6e5b0cfb4520d0c2d36ae1005770f2537970e90a Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Sun, 29 Oct 2023 00:49:59 +0200
Subject: [PATCH 1415/1765] lib: sbi: enable seed access in S-mode

If ISA extension Zkr is available, set

    mseccfg.sseed=1
    mseccfg.useed=0

This enables access to the seed CSR in S-mode but not in U-mode.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 569596f182f..b47f00b2ed1 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -160,6 +160,12 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		}
 
 		csr_write(CSR_MENVCFG, menvcfg_val);
+
+		/* Enable S-mode access to seed CSR */
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_ZKR)) {
+			csr_set(CSR_MSECCFG, MSECCFG_SSEED);
+			csr_clear(CSR_MSECCFG, MSECCFG_USEED);
+		}
 	}
 
 	/* Disable all interrupts */

From 6602e11de375b761d778808cc38645fce314c4fa Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 31 Oct 2023 00:39:40 +0800
Subject: [PATCH 1416/1765] lib: sbi: change sbi_hart_features.extensions as an
 array

In the future there may be a lot of ISA extensions, a 'long' may not
be able to accommodate, changed to an array for the future.

Addresses-Coverity-ID: 1568357 Out-of-bounds access
Fixes: 6259b2ec2d09 ("lib: utils/fdt: Fix fdt_parse_isa_extensions()
implementation")
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h      |  3 ++-
 lib/sbi/sbi_hart.c          | 32 ++++++++++++--------------------
 platform/generic/platform.c |  2 +-
 3 files changed, 15 insertions(+), 22 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index fe1124ab2d9..6ee49ffcd38 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -11,6 +11,7 @@
 #define __SBI_HART_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_bitops.h>
 
 /** Possible privileged specification versions of a hart */
 enum sbi_hart_priv_versions {
@@ -67,7 +68,7 @@ enum sbi_hart_extensions {
 struct sbi_hart_features {
 	bool detected;
 	int priv_version;
-	unsigned long extensions;
+	unsigned long extensions[BITS_TO_LONGS(SBI_HART_EXT_MAX)];
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
 	unsigned long pmp_gran;
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index b47f00b2ed1..77eef49cbf8 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -620,9 +620,9 @@ static inline void __sbi_hart_update_extension(
 					bool enable)
 {
 	if (enable)
-		hfeatures->extensions |= BIT(ext);
+		__set_bit(ext, hfeatures->extensions);
 	else
-		hfeatures->extensions &= ~BIT(ext);
+		__clear_bit(ext, hfeatures->extensions);
 }
 
 /**
@@ -655,7 +655,7 @@ bool sbi_hart_has_extension(struct sbi_scratch *scratch,
 	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	if (hfeatures->extensions & BIT(ext))
+	if (__test_bit(ext, hfeatures->extensions))
 		return true;
 	else
 		return false;
@@ -721,24 +721,16 @@ void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
 		return;
 	sbi_memset(extensions_str, 0, nestr);
 
-	if (!hfeatures->extensions)
-		goto done;
-
-	do {
-		if (hfeatures->extensions & BIT(ext)) {
-			temp = sbi_hart_extension_id2string(ext);
-			if (temp) {
-				sbi_snprintf(extensions_str + offset,
-					     nestr - offset,
-					     "%s,", temp);
-				offset = offset + sbi_strlen(temp) + 1;
-			}
+	for_each_set_bit(ext, hfeatures->extensions, SBI_HART_EXT_MAX) {
+		temp = sbi_hart_extension_id2string(ext);
+		if (temp) {
+			sbi_snprintf(extensions_str + offset,
+				     nestr - offset,
+				     "%s,", temp);
+			offset = offset + sbi_strlen(temp) + 1;
 		}
+	}
 
-		ext++;
-	} while (ext < SBI_HART_EXT_MAX);
-
-done:
 	if (offset)
 		extensions_str[offset - 1] = '\0';
 	else
@@ -808,7 +800,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 		return 0;
 
 	/* Clear hart features */
-	hfeatures->extensions = 0;
+	sbi_memset(hfeatures->extensions, 0, sizeof(hfeatures->extensions));
 	hfeatures->pmp_count = 0;
 	hfeatures->mhpm_mask = 0;
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 4246efdb1ad..85acecd7b8d 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -215,7 +215,7 @@ static int generic_extensions_init(struct sbi_hart_features *hfeatures)
 
 	/* Parse the ISA string from FDT and enable the listed extensions */
 	rc = fdt_parse_isa_extensions(fdt_get_address(), current_hartid(),
-				      &hfeatures->extensions);
+				      hfeatures->extensions);
 
 	if (rc)
 		return rc;

From 3aaed4fadfce9e02823c813bd5a69a84376b3397 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 17 Nov 2023 09:03:58 +0800
Subject: [PATCH 1417/1765] lib: sbi: Make console_puts/console_putc
 interchangeable

console_puts/console_putc should replace each other, but the previous
sbi_putc can only use console_putc. This patch addresses this problem.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_console.c | 35 +++++++++++++++++------------------
 1 file changed, 17 insertions(+), 18 deletions(-)

diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 2b3b0a3fe80..ab09a5c01e1 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -37,28 +37,22 @@ int sbi_getc(void)
 	return -1;
 }
 
-void sbi_putc(char ch)
-{
-	if (console_dev && console_dev->console_putc) {
-		if (ch == '\n')
-			console_dev->console_putc('\r');
-		console_dev->console_putc(ch);
-	}
-}
-
 static unsigned long nputs(const char *str, unsigned long len)
 {
-	unsigned long i, ret;
+	unsigned long i;
 
-	if (console_dev && console_dev->console_puts) {
-		ret = console_dev->console_puts(str, len);
-	} else {
-		for (i = 0; i < len; i++)
-			sbi_putc(str[i]);
-		ret = len;
+	if (console_dev) {
+		if (console_dev->console_puts)
+			return console_dev->console_puts(str, len);
+		else if (console_dev->console_putc) {
+			for (i = 0; i < len; i++) {
+				if (str[i] == '\n')
+					console_dev->console_putc('\r');
+				console_dev->console_putc(str[i]);
+			}
+		}
 	}
-
-	return ret;
+	return len;
 }
 
 static void nputs_all(const char *str, unsigned long len)
@@ -69,6 +63,11 @@ static void nputs_all(const char *str, unsigned long len)
 		p += nputs(&str[p], len - p);
 }
 
+void sbi_putc(char ch)
+{
+	nputs_all(&ch, 1);
+}
+
 void sbi_puts(const char *str)
 {
 	unsigned long len = sbi_strlen(str);

From dc0bb19bd2f969e8c2b8c55a71b3ae569eedfaf6 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 17 Nov 2023 09:03:59 +0800
Subject: [PATCH 1418/1765] lib: utils/serial: remove semihosting_putc

For some debuggers that do not implement SYSWRITEC and SYSREADC
operations, we have to use SYSWRITE and SYSREAD.

Instead of implementing semihosting_putc() using SYSWRITE, let us
simply remove semihosting_putc() because console_putc/console_puts
are now interchangeable.

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/semihosting.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/lib/utils/serial/semihosting.c b/lib/utils/serial/semihosting.c
index a27c69eed81..19ebaa07e34 100644
--- a/lib/utils/serial/semihosting.c
+++ b/lib/utils/serial/semihosting.c
@@ -178,11 +178,6 @@ static unsigned long semihosting_puts(const char *str, unsigned long len)
 	return (ret < 0) ? 0 : ret;
 }
 
-static void semihosting_putc(char ch)
-{
-	semihosting_puts(&ch, 1);
-}
-
 static int semihosting_getc(void)
 {
 	char ch = 0;
@@ -199,7 +194,6 @@ static int semihosting_getc(void)
 
 static struct sbi_console_device semihosting_console = {
 	.name = "semihosting",
-	.console_putc = semihosting_putc,
 	.console_puts = semihosting_puts,
 	.console_getc = semihosting_getc
 };

From 16bb9305338b4ae87d95ce776cf029accf07bc49 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sun, 19 Nov 2023 18:32:10 +0530
Subject: [PATCH 1419/1765] lib: sbi: Fix PMP granularity handling in
 sbi_hart_map_saddr()

The sbi_hart_map_saddr() must create PMP mapping of size greater
than or equal to PMP granularity otherwise PMP mapping does not
work when size parameter less than sbi_hart_pmp_granularity(scratch).

Fixes: 6e44ef686a9b ("lib: sbi: Add functions to map/unmap shared memory")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/sbi/sbi_hart.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 77eef49cbf8..bf8792af73b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -508,7 +508,8 @@ int sbi_hart_map_saddr(unsigned long addr, unsigned long size)
 	if (is_pmp_entry_mapped(SBI_SMEPMP_RESV_ENTRY))
 		return SBI_ENOSPC;
 
-	for (order = log2roundup(size) ; order <= __riscv_xlen; order++) {
+	for (order = log2roundup(MAX(sbi_hart_pmp_granularity(scratch), size));
+	     order <= __riscv_xlen; order++) {
 		if (order < __riscv_xlen) {
 			base = addr & ~((1UL << order) - 1UL);
 			if ((base <= addr) &&

From 574b9c8ec22e742e63b6204ad43916c54fc49eba Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Fri, 17 Nov 2023 14:59:31 +0100
Subject: [PATCH 1420/1765] lib: sbi_pmu: avoid buffer overflow

total_ctrs is bounded by

    SBI_PMU_FW_CTR_MAX + SBI_PMU_HW_CTR_MAX) == 48

which exceeds BITS_PER_LONG on 32 bit systems.

Iterating over the bits of &cmask results in a buffer overflow when looking
for a bit >= BITS_PER_LONG.

Adjust the iterators in sbi_pmu_ctr_start() and sbi_pmu_ctr_stop()
accordingly.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index f4c8fc4c3be..185068bb1f4 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -445,7 +445,7 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
 		bUpdate = true;
 
-	for_each_set_bit(i, &cmask, total_ctrs) {
+	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
 		cidx = i + cbase;
 		event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 		if (event_idx_type < 0)
@@ -540,7 +540,7 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return SBI_EINVAL;
 
-	for_each_set_bit(i, &cmask, total_ctrs) {
+	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
 		cidx = i + cbase;
 		event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 		if (event_idx_type < 0)

From 791704cd09c019decf438f6e4f56423cc95cb66a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 21 Nov 2023 11:34:14 +0530
Subject: [PATCH 1421/1765] lib: utils/irqchip: Avoid redundant writes to APLIC
 CLRIE register

Each APLIC CLRIE register allows disabling 32 interrupt sources at
a time by writing -1 so no need to write CLRIE register separately
for each interrupt source.

Fixes: 99792653de29 ("lib: utils/irqchip: Add APLIC initialization library")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/utils/irqchip/aplic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
index d7fd9928044..10236e7ad16 100644
--- a/lib/utils/irqchip/aplic.c
+++ b/lib/utils/irqchip/aplic.c
@@ -193,7 +193,7 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
 	writel(0, (void *)(aplic->addr + APLIC_DOMAINCFG));
 
 	/* Disable all interrupts */
-	for (i = 0; i <= aplic->num_source; i++)
+	for (i = 0; i <= aplic->num_source; i += 32)
 		writel(-1U, (void *)(aplic->addr + APLIC_CLRIE_BASE +
 				     (i / 32) * sizeof(u32)));
 

From f520256d03da84e7ff8bddd084ef873192f46304 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 21 Nov 2023 14:49:42 +0530
Subject: [PATCH 1422/1765] lib: sbi: Allow relaxed MMIO writes in device
 ipi_send() callback

Currently, we have a smp_wmb() between atomic_raw_set_bit() and
ipi_send() device callback whereas the MMIO writes done by the
device ipi_send() callback will also include a barrier.

We can avoid unnecessary/redundant barriers described above by
allowing relaxed MMIO writes in device ipi_send() callback. To
achieve this, we simply use  wmb() instead of smp_wmb() before
calling device ipi_send().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reported-by: Bo Gan <ganboing@gmail.com>
---
 lib/sbi/sbi_ipi.c           | 15 +++++++++++----
 lib/utils/ipi/aclint_mswi.c |  2 +-
 lib/utils/irqchip/imsic.c   |  4 ++--
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 5571b37bdf6..1694a23fd8c 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -67,14 +67,12 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 	 * trigger the interrupt
 	 */
 	atomic_raw_set_bit(event, &ipi_data->ipi_type);
-	smp_wmb();
 
-	if (ipi_dev && ipi_dev->ipi_send)
-		ipi_dev->ipi_send(remote_hartindex);
+	ret = sbi_ipi_raw_send(remote_hartindex);
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
 
-	return 0;
+	return ret;
 }
 
 static int sbi_ipi_sync(struct sbi_scratch *scratch, u32 event)
@@ -243,6 +241,15 @@ int sbi_ipi_raw_send(u32 hartindex)
 	if (!ipi_dev || !ipi_dev->ipi_send)
 		return SBI_EINVAL;
 
+	/*
+	 * Ensure that memory or MMIO writes done before
+	 * this function are not observed after the memory
+	 * or MMIO writes done by the ipi_send() device
+	 * callback. This also allows the ipi_send() device
+	 * callback to use relaxed MMIO writes.
+	 */
+	wmb();
+
 	ipi_dev->ipi_send(hartindex);
 	return 0;
 }
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index a3bfb4a9e3b..bfd6a45b88e 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -41,7 +41,7 @@ static void mswi_ipi_send(u32 hart_index)
 
 	/* Set ACLINT IPI */
 	msip = (void *)mswi->addr;
-	writel(1, &msip[sbi_hartindex_to_hartid(hart_index) -
+	writel_relaxed(1, &msip[sbi_hartindex_to_hartid(hart_index) -
 			mswi->first_hartid]);
 }
 
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 78f5895ac54..36ef66cf1eb 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -186,8 +186,8 @@ static void imsic_ipi_send(u32 hart_index)
 	}
 
 	if (regs->size && (reloff < regs->size))
-		writel(IMSIC_IPI_ID,
-		       (void *)(regs->addr + reloff + IMSIC_MMIO_PAGE_LE));
+		writel_relaxed(IMSIC_IPI_ID,
+			(void *)(regs->addr + reloff + IMSIC_MMIO_PAGE_LE));
 }
 
 static struct sbi_ipi_device imsic_ipi_device = {

From b70d6285f0f7cbb84619ba1758bb0c6d7620eaef Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 21 Nov 2023 15:52:17 +0530
Subject: [PATCH 1423/1765] lib: sbi: Allow relaxed MMIO writes in device
 ipi_clear() callback

Currently, there are no barriers before or after the ipi_clear()
device callback which forces ipi_clear() device callback to always
use non-relaxed MMIO writes.

Instead of above, we use wmb() in after the ipi_clear() device
callback which pairs with the wmb() done before the ipi_send()
device callback. This also allows device ipi_clear() callback
to use relaxed MMIO writes.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reported-by: Bo Gan <ganboing@gmail.com>
---
 lib/sbi/sbi_ipi.c           | 16 ++++++++++++++--
 lib/utils/ipi/aclint_mswi.c |  2 +-
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 1694a23fd8c..0bf446a046e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -220,8 +220,7 @@ void sbi_ipi_process(void)
 	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
-	if (ipi_dev && ipi_dev->ipi_clear)
-		ipi_dev->ipi_clear(hartindex);
+	sbi_ipi_raw_clear(hartindex);
 
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
 	ipi_event = 0;
@@ -247,6 +246,8 @@ int sbi_ipi_raw_send(u32 hartindex)
 	 * or MMIO writes done by the ipi_send() device
 	 * callback. This also allows the ipi_send() device
 	 * callback to use relaxed MMIO writes.
+	 *
+	 * This pairs with the wmb() in sbi_ipi_raw_clear().
 	 */
 	wmb();
 
@@ -258,6 +259,17 @@ void sbi_ipi_raw_clear(u32 hartindex)
 {
 	if (ipi_dev && ipi_dev->ipi_clear)
 		ipi_dev->ipi_clear(hartindex);
+
+	/*
+	 * Ensure that memory or MMIO writes after this
+	 * function returns are not observed before the
+	 * memory or MMIO writes done by the ipi_clear()
+	 * device callback. This also allows ipi_clear()
+	 * device callback to use relaxed MMIO writes.
+	 *
+	 * This pairs with the wmb() in sbi_ipi_raw_send().
+	 */
+	wmb();
 }
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void)
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index bfd6a45b88e..4ae6bb1c322 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -61,7 +61,7 @@ static void mswi_ipi_clear(u32 hart_index)
 
 	/* Clear ACLINT IPI */
 	msip = (void *)mswi->addr;
-	writel(0, &msip[sbi_hartindex_to_hartid(hart_index) -
+	writel_relaxed(0, &msip[sbi_hartindex_to_hartid(hart_index) -
 			mswi->first_hartid]);
 }
 

From bd74931d79e1b81494a22b1ce368c935abbc0d2c Mon Sep 17 00:00:00 2001
From: Leo Yu-Chi Liang <ycliang@andestech.com>
Date: Thu, 30 Nov 2023 20:41:59 +0800
Subject: [PATCH 1424/1765] lib: ipi: Adjust Andes PLICSW to
 single-bit-per-hart scheme

The old scheme doesn't allow sending hart0 self-IPI as the
corresponding bit on pending register is hardwired to 0, this
could lead to unhandle IPIs on SMP systems, esp. on single-core.

Furthermore, the limitation of old scheme is 8-core, instead of
reserving source hart information, we assign bit (x + 1) as the
enable and pending bit of hartx, this also expands the bootable
hart number.

The following diagram shows the enable bits of the new scheme
on 32-core Andes platform.

   Pending regs: 0x1000  x---0---0---0---0------0---0
Pending hart ID:             0   1   2   3 ... 30  31
   Interrupt ID:         0   1   2   3   4 ... 31  32
                         |   |   |   |   |      |   |
    Enable regs: 0x2000  x---1---0---0---0-...--0---0---> hart0
                         |   |   |   |   |      |   |
                 0x2080  x---0---1---0---0-...--0---0---> hart1
                         |   |   |   |   |      |   |
                 0x2100  x---0---0---1---0-...--0---0---> hart2
                         |   |   |   |   |      |   |
                 0x2180  x---0---0---0---1-...--0---0---> hart3
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                 0x2f00  x---0---0---0---0-...--1---0---> hart30
                         |   |   |   |   |      |   |
                 0x2f80  x---0---0---0---0-...--0---1---> hart31
                         <-------- word 0 -------><--- word 1 --->

To send IPI to hart0, for example, another hart (including hart0
itself) will set bit 1 of first word on the pending register.

We also fix indentation in andes_plicsw.h along with this patch.

Fixes: ce7c490719ed ("lib: utils/ipi: Add Andes fdt ipi driver support")
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Randolph <randolph@andestech.com>
Reported-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005665.html
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/ipi/andes_plicsw.h |  23 +++---
 lib/utils/ipi/andes_plicsw.c         | 104 ++++++++++-----------------
 2 files changed, 46 insertions(+), 81 deletions(-)

diff --git a/include/sbi_utils/ipi/andes_plicsw.h b/include/sbi_utils/ipi/andes_plicsw.h
index e93cda0b30d..0d184449d8f 100644
--- a/include/sbi_utils/ipi/andes_plicsw.h
+++ b/include/sbi_utils/ipi/andes_plicsw.h
@@ -13,30 +13,23 @@
 #ifndef _IPI_ANDES_PLICSW_H_
 #define _IPI_ANDES_PLICSW_H_
 
-#define PLICSW_PRIORITY_BASE 0x4
+#define PLICSW_PRIORITY_BASE	0x4
 
-#define PLICSW_PENDING_BASE 0x1000
-#define PLICSW_PENDING_STRIDE 0x8
+#define PLICSW_PENDING_BASE	0x1000
 
-#define PLICSW_ENABLE_BASE 0x2000
-#define PLICSW_ENABLE_STRIDE 0x80
+#define PLICSW_ENABLE_BASE	0x2000
+#define PLICSW_ENABLE_STRIDE	0x80
 
-#define PLICSW_CONTEXT_BASE 0x200000
-#define PLICSW_CONTEXT_STRIDE 0x1000
-#define PLICSW_CONTEXT_CLAIM 0x4
+#define PLICSW_CONTEXT_BASE	0x200000
+#define PLICSW_CONTEXT_STRIDE	0x1000
+#define PLICSW_CONTEXT_CLAIM	0x4
 
-#define PLICSW_HART_MASK 0x01010101
-
-#define PLICSW_HART_MAX_NR 8
-
-#define PLICSW_REGION_ALIGN 0x1000
+#define PLICSW_REGION_ALIGN	0x1000
 
 struct plicsw_data {
 	unsigned long addr;
 	unsigned long size;
 	uint32_t hart_count;
-	/* hart id to source id table */
-	uint32_t source_id[PLICSW_HART_MAX_NR];
 };
 
 int plicsw_warm_ipi_init(void);
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index 5693efb3e38..413ac20e491 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -18,77 +18,45 @@
 
 struct plicsw_data plicsw;
 
-static inline void plicsw_claim(void)
+static void plicsw_ipi_send(u32 hart_index)
 {
-	u32 hartid = current_hartid();
+	ulong pending_reg;
+	u32 interrupt_id, word_index, pending_bit;
+	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
 
-	if (plicsw.hart_count <= hartid)
+	if (plicsw.hart_count <= target_hart)
 		ebreak();
 
-	plicsw.source_id[hartid] =
-		readl((void *)plicsw.addr + PLICSW_CONTEXT_BASE +
-		      PLICSW_CONTEXT_CLAIM + PLICSW_CONTEXT_STRIDE * hartid);
-}
-
-static inline void plicsw_complete(void)
-{
-	u32 hartid = current_hartid();
-	u32 source = plicsw.source_id[hartid];
-
-	writel(source, (void *)plicsw.addr + PLICSW_CONTEXT_BASE +
-			       PLICSW_CONTEXT_CLAIM +
-			       PLICSW_CONTEXT_STRIDE * hartid);
-}
-
-static inline void plic_sw_pending(u32 target_hart)
-{
 	/*
-	 * The pending array registers are w1s type.
-	 * IPI pending array mapping as following:
-	 *
-	 * Pending array start address: base + 0x1000
-	 * ---------------------------------
-	 * | hart3 | hart2 | hart1 | hart0 |
-	 * ---------------------------------
-	 * Each hartX can send IPI to another hart by setting the
-	 * bitY to its own region (see the below).
-	 *
-	 * In each hartX region:
-	 * <---------- PICSW_PENDING_STRIDE -------->
-	 * | bit7 | ... | bit3 | bit2 | bit1 | bit0 |
-	 * ------------------------------------------
-	 * The bitY of hartX region indicates that hartX sends an
-	 * IPI to hartY.
+	 * We assign a single bit for each hart.
+	 * Bit 0 is hardwired to 0, thus unavailable.
+	 * Bit(X+1) indicates that IPI is sent to hartX.
 	 */
-	u32 hartid	    = current_hartid();
-	u32 word_index	    = hartid / 4;
-	u32 per_hart_offset = PLICSW_PENDING_STRIDE * hartid;
-	u32 val		    = 1 << target_hart << per_hart_offset;
+	interrupt_id = target_hart + 1;
+	word_index   = interrupt_id / 32;
+	pending_bit  = interrupt_id % 32;
+	pending_reg  = plicsw.addr + PLICSW_PENDING_BASE + word_index * 4;
 
-	writel(val, (void *)plicsw.addr + PLICSW_PENDING_BASE + word_index * 4);
+	/* Set target hart's mip.MSIP */
+	writel_relaxed(BIT(pending_bit), (void *)pending_reg);
 }
 
-static void plicsw_ipi_send(u32 hart_index)
+static void plicsw_ipi_clear(u32 hart_index)
 {
 	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
+	ulong reg = plicsw.addr + PLICSW_CONTEXT_BASE + PLICSW_CONTEXT_CLAIM +
+		    PLICSW_CONTEXT_STRIDE * target_hart;
 
 	if (plicsw.hart_count <= target_hart)
 		ebreak();
 
-	/* Set PLICSW IPI */
-	plic_sw_pending(target_hart);
-}
+	/* Claim */
+	u32 source = readl((void *)reg);
 
-static void plicsw_ipi_clear(u32 hart_index)
-{
-	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
-
-	if (plicsw.hart_count <= target_hart)
-		ebreak();
+	/* A successful claim will clear mip.MSIP */
 
-	/* Clear PLICSW IPI */
-	plicsw_claim();
-	plicsw_complete();
+	/* Complete */
+	writel(source, (void *)reg);
 }
 
 static struct sbi_ipi_device plicsw_ipi = {
@@ -110,22 +78,26 @@ int plicsw_warm_ipi_init(void)
 int plicsw_cold_ipi_init(struct plicsw_data *plicsw)
 {
 	int rc;
+	u32 interrupt_id, word_index, enable_bit;
+	ulong enable_reg, priority_reg;
 
 	/* Setup source priority */
-	uint32_t *priority = (void *)plicsw->addr + PLICSW_PRIORITY_BASE;
-
-	for (int i = 0; i < plicsw->hart_count; i++)
-		writel(1, &priority[i]);
-
-	/* Setup target enable */
-	uint32_t enable_mask = PLICSW_HART_MASK;
+	for (int i = 0; i < plicsw->hart_count; i++) {
+		priority_reg = plicsw->addr + PLICSW_PRIORITY_BASE + i * 4;
+		writel(1, (void *)priority_reg);
+	}
 
+	/*
+	 * Setup enable for each hart, skip non-existent interrupt ID 0
+	 * which is hardwired to 0.
+	 */
 	for (int i = 0; i < plicsw->hart_count; i++) {
-		uint32_t *enable = (void *)plicsw->addr + PLICSW_ENABLE_BASE +
-				   PLICSW_ENABLE_STRIDE * i;
-		writel(enable_mask, enable);
-		writel(enable_mask, enable + 1);
-		enable_mask <<= 1;
+		interrupt_id = i + 1;
+		word_index   = interrupt_id / 32;
+		enable_bit   = interrupt_id % 32;
+		enable_reg   = plicsw->addr + PLICSW_ENABLE_BASE +
+			       PLICSW_ENABLE_STRIDE * i + 4 * word_index;
+		writel(BIT(enable_bit), (void *)enable_reg);
 	}
 
 	/* Add PLICSW region to the root domain */

From 291403f6f29dd119d94ac99303c94dadcb5496c3 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:00 +0800
Subject: [PATCH 1425/1765] sbi: sbi_pmu: Improve sbi_pmu_init() error handling

This patch makes the following changes:

- As sbi_platform_pmu_init() returns a negative error code on
  failure, let sbi_pmu_init() print out the error code with
  sbi_dprintf().

- In order to distinguish the SBI_EFAIL error returned by
  sbi_pmu_add_*_counter_map(), return SBI_ENOENT to indicate
  that fdt_pmu_setup() failed to locate "riscv,pmu" node, and
  generic_pmu_init() ignores such case.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_pmu.c           | 6 +++++-
 lib/utils/fdt/fdt_pmu.c     | 2 +-
 platform/generic/platform.c | 8 +++++++-
 3 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 185068bb1f4..2ee6e62a8f9 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -957,6 +957,7 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 	int hpm_count = sbi_fls(sbi_hart_mhpm_mask(scratch));
 	struct sbi_pmu_hart_state *phs;
 	const struct sbi_platform *plat;
+	int rc;
 
 	if (cold_boot) {
 		hw_event_map = sbi_calloc(sizeof(*hw_event_map),
@@ -972,7 +973,10 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 
 		plat = sbi_platform_ptr(scratch);
 		/* Initialize hw pmu events */
-		sbi_platform_pmu_init(plat);
+		rc = sbi_platform_pmu_init(plat);
+		if (rc)
+			sbi_dprintf("%s: platform pmu init failed "
+				    "(error %d)\n", __func__, rc);
 
 		/* mcycle & minstret is available always */
 		if (!hpm_count)
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 83301bb5c1a..a8d764822a6 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -74,7 +74,7 @@ int fdt_pmu_setup(void *fdt)
 
 	pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
 	if (pmu_offset < 0)
-		return SBI_EFAIL;
+		return SBI_ENOENT;
 
 	event_ctr_map = fdt_getprop(fdt, pmu_offset,
 				    "riscv,event-to-mhpmcounters", &len);
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 85acecd7b8d..fa400b9e68e 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -265,7 +265,13 @@ static u32 generic_tlb_num_entries(void)
 
 static int generic_pmu_init(void)
 {
-	return fdt_pmu_setup(fdt_get_address());
+	int rc;
+
+	rc = fdt_pmu_setup(fdt_get_address());
+	if (rc && rc != SBI_ENOENT)
+		return rc;
+
+	return 0;
 }
 
 static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,

From 090fa99d7cf519a8b7d2685ae9f84a2fbe46b083 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:01 +0800
Subject: [PATCH 1426/1765] lib: sbi: Add XAndesPMU in hart extensions

Add the custom extension to hart extension list.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h | 2 ++
 lib/sbi/sbi_hart.c     | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 6ee49ffcd38..811e5f50c38 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -45,6 +45,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_ZKR,
 	/** Hart has Smcntrpmf extension */
 	SBI_HART_EXT_SMCNTRPMF,
+	/** Hart has Xandespmu extension */
+	SBI_HART_EXT_XANDESPMU,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index bf8792af73b..c9483738fc0 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -694,6 +694,9 @@ static inline char *sbi_hart_extension_id2string(int ext)
 	case SBI_HART_EXT_SMCNTRPMF:
 		estr = "smcntrpmf";
 		break;
+	case SBI_HART_EXT_XANDESPMU:
+		estr = "xandespmu";
+		break;
 	default:
 		break;
 	}

From a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:02 +0800
Subject: [PATCH 1427/1765] sbi: sbi_pmu: Add hw_counter_filter_mode() to pmu
 device

Add support for custom PMU extensions to set inhibit bits
on custom CSRs by introducing the PMU device callback
hw_counter_filter_mode(). This allows the perf tool to
restrict event counting under a specified privileged
mode by appending a modifier, e.g. perf record -e event:k
to count events only happening in kernel mode.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h |  6 ++++++
 lib/sbi/sbi_pmu.c     | 20 ++++++++++++++------
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 16f687733ba..d63149cde8a 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -89,6 +89,12 @@ struct sbi_pmu_device {
 	 * Custom function returning the machine-specific irq-bit.
 	 */
 	int (*hw_counter_irq_bit)(void);
+
+	/**
+	 * Custom function to inhibit counting of events while in
+	 * specified mode.
+	 */
+	void (*hw_counter_filter_mode)(unsigned long flags, int counter_index);
 };
 
 /** Get the PMU platform device */
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 2ee6e62a8f9..4b0f5be4bf7 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -599,7 +599,10 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
 		pmu_dev->hw_counter_disable_irq(ctr_idx);
 
 	/* Update the inhibit flags based on inhibit flags received from supervisor */
-	pmu_update_inhibit_flags(flags, &mhpmevent_val);
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF))
+		pmu_update_inhibit_flags(flags, &mhpmevent_val);
+	if (pmu_dev && pmu_dev->hw_counter_filter_mode)
+		pmu_dev->hw_counter_filter_mode(flags, ctr_idx);
 
 #if __riscv_xlen == 32
 	csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val & 0xFFFFFFFF);
@@ -620,7 +623,8 @@ static int pmu_fixed_ctr_update_inhibit_bits(int fixed_ctr, unsigned long flags)
 #if __riscv_xlen == 32
 	uint64_t cfgh_csr_no;
 #endif
-	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF))
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF) &&
+		!(pmu_dev && pmu_dev->hw_counter_filter_mode))
 		return fixed_ctr;
 
 	switch (fixed_ctr) {
@@ -641,13 +645,17 @@ static int pmu_fixed_ctr_update_inhibit_bits(int fixed_ctr, unsigned long flags)
 	}
 
 	cfg_val |= MHPMEVENT_MINH;
-	pmu_update_inhibit_flags(flags, &cfg_val);
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF)) {
+		pmu_update_inhibit_flags(flags, &cfg_val);
 #if __riscv_xlen == 32
-	csr_write_num(cfg_csr_no, cfg_val & 0xFFFFFFFF);
-	csr_write_num(cfgh_csr_no, cfg_val >> BITS_PER_LONG);
+		csr_write_num(cfg_csr_no, cfg_val & 0xFFFFFFFF);
+		csr_write_num(cfgh_csr_no, cfg_val >> BITS_PER_LONG);
 #else
-	csr_write_num(cfg_csr_no, cfg_val);
+		csr_write_num(cfg_csr_no, cfg_val);
 #endif
+	}
+	if (pmu_dev && pmu_dev->hw_counter_filter_mode)
+		pmu_dev->hw_counter_filter_mode(flags, fixed_ctr);
 	return fixed_ctr;
 }
 

From 51ec60c9ea826a26aafb7f85a5ba3a18d4fe2a1e Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:03 +0800
Subject: [PATCH 1428/1765] platform: include: andes45: Add PMU related CSR
 defines

Add CSR definitions for Andes PMU extension.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 platform/generic/include/andes/andes45.h | 26 ++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes45.h
index f5709943538..ce31617c5ec 100644
--- a/platform/generic/include/andes/andes45.h
+++ b/platform/generic/include/andes/andes45.h
@@ -12,6 +12,17 @@
 #define CSR_MDCM_CFG		0xfc1
 #define CSR_MMSC_CFG		0xfc2
 
+/* Machine Trap Related Registers */
+#define CSR_MSLIDELEG		0x7d5
+
+/* Counter Related Registers */
+#define CSR_MCOUNTERWEN		0x7ce
+#define CSR_MCOUNTERINTEN	0x7cf
+#define CSR_MCOUNTERMASK_M	0x7d1
+#define CSR_MCOUNTERMASK_S	0x7d2
+#define CSR_MCOUNTERMASK_U	0x7d3
+#define CSR_MCOUNTEROVF		0x7d4
+
 #define MICM_CFG_ISZ_OFFSET		6
 #define MICM_CFG_ISZ_MASK		(0x7  << MICM_CFG_ISZ_OFFSET)
 
@@ -26,4 +37,19 @@
 #define MCACHE_CTL_CCTL_SUEN_OFFSET	8
 #define MCACHE_CTL_CCTL_SUEN_MASK	(0x1 << MCACHE_CTL_CCTL_SUEN_OFFSET)
 
+/* Performance monitor */
+#define MMSC_CFG_PMNDS_MASK		(1 << 15)
+#define MIP_PMOVI			(1 << 18)
+
+#ifndef __ASSEMBLER__
+
+#define has_andes_pmu()					\
+({							\
+	(((csr_read(CSR_MMSC_CFG) &			\
+	   MMSC_CFG_PMNDS_MASK)				\
+	  && misa_extension('S')) ? true : false);	\
+})
+
+#endif /* __ASSEMBLER__ */
+
 #endif /* _RISCV_ANDES45_H */

From effd89aa055c7cc6a167f55d333c2b7ba035614b Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:04 +0800
Subject: [PATCH 1429/1765] platform: generic: Introduce pmu_init() platform
 override

Add pmu_init() platform override, which will be used to register
PMU device and populate event mappings.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/include/platform_override.h | 1 +
 platform/generic/platform.c                  | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index bf4b1125877..f2a4327ec27 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -27,6 +27,7 @@ struct platform_override {
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
 	int (*extensions_init)(const struct fdt_match *match,
 			       struct sbi_hart_features *hfeatures);
+	int (*pmu_init)(const struct fdt_match *match);
 	void (*fw_init)(void *fdt, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long funcid,
 				   const struct sbi_trap_regs *regs,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index fa400b9e68e..f17e94ed35c 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -267,6 +267,12 @@ static int generic_pmu_init(void)
 {
 	int rc;
 
+	if (generic_plat && generic_plat->pmu_init) {
+		rc = generic_plat->pmu_init(generic_plat_match);
+		if (rc)
+			return rc;
+	}
+
 	rc = fdt_pmu_setup(fdt_get_address());
 	if (rc && rc != SBI_ENOENT)
 		return rc;

From 1b9e743c3d5de93e2422c0a0a6db269d862aab9a Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:05 +0800
Subject: [PATCH 1430/1765] platform: andes: Add Andes custom PMU support

Before the ratification of Sscofpmf, the Andes PMU extension
was designed to support the sampling and filtering with hardware
performance counters (zihpm), it works with the current SBI PMU
extension and Linux SBI PMU driver.

We implement 1) the PMU device callbacks that update the
corresponding bits on custom CSRs, 2) extentions_init() to detect
the hardware support of Andes PMU and initialize the per-hart
PMU related CSR, and 3) pmu_init() to register PMU device and
populate event mappings.

Also define a andes_pmu_setup() function which is in preparation
for adding default PMU mappings in andes_hpm.h

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/Kconfig             |   8 ++
 platform/generic/andes/andes_pmu.c         | 105 +++++++++++++++++++++
 platform/generic/andes/objects.mk          |   1 +
 platform/generic/include/andes/andes_hpm.h |  12 +++
 platform/generic/include/andes/andes_pmu.h |  34 +++++++
 5 files changed, 160 insertions(+)
 create mode 100644 platform/generic/andes/andes_pmu.c
 create mode 100644 platform/generic/include/andes/andes_hpm.h
 create mode 100644 platform/generic/include/andes/andes_pmu.h

diff --git a/platform/generic/andes/Kconfig b/platform/generic/andes/Kconfig
index a91fb9c95dc..3665b337343 100644
--- a/platform/generic/andes/Kconfig
+++ b/platform/generic/andes/Kconfig
@@ -7,3 +7,11 @@ config ANDES45_PMA
 config ANDES_SBI
 	bool "Andes SBI support"
 	default n
+
+config ANDES_PMU
+	bool "Andes PMU extension (XAndesPMU) support"
+	default n
+	help
+	  Andes PMU extension supports the event counter overflow
+	  interrupt and mode filtering, similar to the standard
+	  Sscofpmf and Smcntrpmf.
diff --git a/platform/generic/andes/andes_pmu.c b/platform/generic/andes/andes_pmu.c
new file mode 100644
index 00000000000..4b2d45b062e
--- /dev/null
+++ b/platform/generic/andes/andes_pmu.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * andes_pmu.c - Andes PMU device callbacks and platform overrides
+ *
+ * Copyright (C) 2023 Andes Technology Corporation
+ */
+
+#include <andes/andes45.h>
+#include <andes/andes_hpm.h>
+#include <andes/andes_pmu.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_pmu.h>
+#include <libfdt.h>
+
+static void andes_hw_counter_enable_irq(uint32_t ctr_idx)
+{
+	unsigned long mip_val;
+
+	if (ctr_idx >= SBI_PMU_HW_CTR_MAX)
+		return;
+
+	mip_val = csr_read(CSR_MIP);
+	if (!(mip_val & MIP_PMOVI))
+		csr_clear(CSR_MCOUNTEROVF, BIT(ctr_idx));
+
+	csr_set(CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static void andes_hw_counter_disable_irq(uint32_t ctr_idx)
+{
+	csr_clear(CSR_MCOUNTERINTEN, BIT(ctr_idx));
+}
+
+static void andes_hw_counter_filter_mode(unsigned long flags, int ctr_idx)
+{
+	if (flags & SBI_PMU_CFG_FLAG_SET_UINH)
+		csr_set(CSR_MCOUNTERMASK_U, BIT(ctr_idx));
+	else
+		csr_clear(CSR_MCOUNTERMASK_U, BIT(ctr_idx));
+
+	if (flags & SBI_PMU_CFG_FLAG_SET_SINH)
+		csr_set(CSR_MCOUNTERMASK_S, BIT(ctr_idx));
+	else
+		csr_clear(CSR_MCOUNTERMASK_S, BIT(ctr_idx));
+}
+
+static struct sbi_pmu_device andes_pmu = {
+	.name = "andes_pmu",
+	.hw_counter_enable_irq  = andes_hw_counter_enable_irq,
+	.hw_counter_disable_irq = andes_hw_counter_disable_irq,
+	/*
+	 * We set delegation of supervisor local interrupts via
+	 * 18th bit on mslideleg instead of mideleg, so leave
+	 * hw_counter_irq_bit() callback unimplemented.
+	 */
+	.hw_counter_irq_bit     = NULL,
+	.hw_counter_filter_mode = andes_hw_counter_filter_mode
+};
+
+int andes_pmu_extensions_init(const struct fdt_match *match,
+			      struct sbi_hart_features *hfeatures)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	if (!has_andes_pmu())
+		return 0;
+
+	/*
+	 * Don't expect both Andes PMU and standard Sscofpmf/Smcntrpmf,
+	 * are supported as they serve the same purpose.
+	 */
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF) ||
+		sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF))
+		return SBI_EINVAL;
+	sbi_hart_update_extension(scratch, SBI_HART_EXT_XANDESPMU, true);
+
+	/* Inhibit all HPM counters in M-mode */
+	csr_write(CSR_MCOUNTERMASK_M, 0xfffffffd);
+	/* Delegate counter overflow interrupt to S-mode */
+	csr_write(CSR_MSLIDELEG, MIP_PMOVI);
+
+	return 0;
+}
+
+int andes_pmu_init(const struct fdt_match *match)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	void *fdt = fdt_get_address();
+	int pmu_offset;
+
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_XANDESPMU))
+		sbi_pmu_set_device(&andes_pmu);
+
+	/*
+	 * Populate default mappings if device-tree doesn't
+	 * provide a valid pmu node.
+	 */
+	pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
+	if (pmu_offset < 0)
+		return (pmu_offset == -FDT_ERR_NOTFOUND) ? andes_pmu_setup()
+							 : SBI_EFAIL;
+
+	return 0;
+}
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index e8f86ea0815..6a8c66c2422 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -7,3 +7,4 @@ platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
 
 platform-objs-$(CONFIG_ANDES45_PMA) += andes/andes45-pma.o
 platform-objs-$(CONFIG_ANDES_SBI) += andes/andes_sbi.o
+platform-objs-$(CONFIG_ANDES_PMU) += andes/andes_pmu.o
diff --git a/platform/generic/include/andes/andes_hpm.h b/platform/generic/include/andes/andes_hpm.h
new file mode 100644
index 00000000000..b4d71b9dd26
--- /dev/null
+++ b/platform/generic/include/andes/andes_hpm.h
@@ -0,0 +1,12 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Andes Technology Corporation
+ */
+
+#ifndef _ANDES_HPM_H_
+#define _ANDES_HPM_H_
+
+static inline int andes_pmu_setup(void) { return 0; }
+
+#endif /* _ANDES_HPM_H_ */
diff --git a/platform/generic/include/andes/andes_pmu.h b/platform/generic/include/andes/andes_pmu.h
new file mode 100644
index 00000000000..f3553246f97
--- /dev/null
+++ b/platform/generic/include/andes/andes_pmu.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) Copyright (c) 2023 Andes Technology Corporation
+ */
+
+#ifndef _RISCV_ANDES_PMU_H
+#define _RISCV_ANDES_PMU_H
+
+#include <sbi/sbi_hart.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_pmu.h>
+
+#ifdef CONFIG_ANDES_PMU
+
+int andes_pmu_init(const struct fdt_match *match);
+int andes_pmu_extensions_init(const struct fdt_match *match,
+			      struct sbi_hart_features *hfeatures);
+
+#else
+
+static inline int andes_pmu_init(const struct fdt_match *match)
+{
+	return 0;
+}
+static inline int andes_pmu_extensions_init(const struct fdt_match *match,
+			      struct sbi_hart_features *hfeatures)
+{
+	return 0;
+}
+
+#endif /* CONFIG_ANDES_PMU */
+
+#endif /* _RISCV_ANDES_PMU_H */

From 2e50c24399d64c42114c7952fca9e22ec0fb8d09 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:06 +0800
Subject: [PATCH 1431/1765] platform: andes: Enable Andes PMU for AE350

Enable Andes PMU extension support for AE350 platforms.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig       | 1 +
 platform/generic/andes/ae350.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index a902cf37d92..89e56035947 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -32,6 +32,7 @@ config PLATFORM_ALLWINNER_D1
 config PLATFORM_ANDES_AE350
 	bool "Andes AE350 support"
 	select SYS_ATCSMU
+	select ANDES_PMU
 	default n
 
 config PLATFORM_RENESAS_RZFIVE
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 80eca056121..dc769b72666 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -8,6 +8,7 @@
  */
 
 #include <platform_override.h>
+#include <andes/andes_pmu.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/sys/atcsmu.h>
@@ -118,4 +119,6 @@ static const struct fdt_match andes_ae350_match[] = {
 const struct platform_override andes_ae350 = {
 	.match_table = andes_ae350_match,
 	.final_init  = ae350_final_init,
+	.extensions_init = andes_pmu_extensions_init,
+	.pmu_init = andes_pmu_init,
 };

From 535c661d87e1fc2ce31e08cab03fed0dd2742335 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:07 +0800
Subject: [PATCH 1432/1765] platform: rzfive: Enable Andes PMU for RZ/Five

Enable Andes PMU extension support for RZ/Five.
We also staticize renesas_rzfive_early_init() as
it is not used outside of this unit.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                 | 1 +
 platform/generic/renesas/rzfive/rzfive.c | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 89e56035947..c9b601171a4 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -39,6 +39,7 @@ config PLATFORM_RENESAS_RZFIVE
 	bool "Renesas RZ/Five support"
 	select ANDES45_PMA
 	select ANDES_SBI
+	select ANDES_PMU
 	default n
 
 config PLATFORM_SIFIVE_FU540
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index a69797b18df..b5b5e6516a9 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -5,6 +5,7 @@
  */
 
 #include <andes/andes45_pma.h>
+#include <andes/andes_pmu.h>
 #include <andes/andes_sbi.h>
 #include <platform_override.h>
 #include <sbi/sbi_domain.h>
@@ -29,7 +30,7 @@ static int renesas_rzfive_final_init(bool cold_boot, const struct fdt_match *mat
 					 array_size(renesas_rzfive_pma_regions));
 }
 
-int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
+static int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
 {
 	/*
 	 * Renesas RZ/Five RISC-V SoC has Instruction local memory and
@@ -57,4 +58,6 @@ const struct platform_override renesas_rzfive = {
 	.early_init = renesas_rzfive_early_init,
 	.final_init = renesas_rzfive_final_init,
 	.vendor_ext_provider = andes_sbi_vendor_ext_provider,
+	.extensions_init = andes_pmu_extensions_init,
+	.pmu_init = andes_pmu_init,
 };

From 0b3262efc6bcde391da84e49ec978804cc6eac37 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:08 +0800
Subject: [PATCH 1433/1765] lib: utils: fdt_fixup: Allow preserving PMU
 properties

Add a Kconfig option to control PMU fixup, so the next
stage software can dump the PMU node including event
mapping information for debugging purposes.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/Kconfig     | 7 +++++++
 lib/utils/fdt/fdt_fixup.c | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/lib/utils/fdt/Kconfig b/lib/utils/fdt/Kconfig
index 23b003bfb46..9a42d158ff2 100644
--- a/lib/utils/fdt/Kconfig
+++ b/lib/utils/fdt/Kconfig
@@ -15,4 +15,11 @@ config FDT_PMU
 	bool "FDT performance monitoring unit (PMU) support"
 	default n
 
+config FDT_FIXUPS_PRESERVE_PMU_NODE
+	bool "Preserve PMU node in device-tree"
+	depends on FDT_PMU
+	default n
+	help
+	  Preserve PMU node properties for debugging purposes.
+
 endif
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index e213dedba61..5fc76738077 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -394,5 +394,8 @@ void fdt_fixups(void *fdt)
 	fdt_plic_fixup(fdt);
 
 	fdt_reserved_memory_fixup(fdt);
+
+#ifndef CONFIG_FDT_FIXUPS_PRESERVE_PMU_NODE
 	fdt_pmu_fixup(fdt);
+#endif
 }

From 009ae4e60221fd17858837460eb26a6a0a56d8f3 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:09 +0800
Subject: [PATCH 1434/1765] platform: andes: Factor out is_andes() helper

We will need is_andes(45) in the following patch,
so factor out the code that parses marchid to make
it reusable for checking any Andes CPU variants.

Also improves the comment in ae350_hart_start().

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/ae350.c           | 16 +++++++---------
 platform/generic/include/andes/andes45.h |  6 ++++++
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index dc769b72666..088ec077b58 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -24,16 +24,14 @@ static struct smu_data smu = { 0 };
 extern void __ae350_enable_coherency_warmboot(void);
 extern void __ae350_disable_coherency(void);
 
-static __always_inline bool is_andes25(void)
-{
-	ulong marchid = csr_read(CSR_MARCHID);
-	return !!(EXTRACT_FIELD(marchid, CSR_MARCHID_MICROID) == 0xa25);
-}
-
 static int ae350_hart_start(u32 hartid, ulong saddr)
 {
-	/* Don't send wakeup command at boot-time */
-	if (!sbi_init_count(hartid) || (is_andes25() && hartid == 0))
+	/*
+	 * Don't send wakeup command when:
+	 * 1) boot-time
+	 * 2) the target hart is non-sleepable 25-series hart0
+	 */
+	if (!sbi_init_count(hartid) || (is_andes(25) && hartid == 0))
 		return sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
 
 	/* Write wakeup command to the sleep hart */
@@ -52,7 +50,7 @@ static int ae350_hart_stop(void)
 	 * L2-cache, instead of turning it off, it should fall
 	 * through and jump to warmboot_addr.
 	 */
-	if (is_andes25() && hartid == 0)
+	if (is_andes(25) && hartid == 0)
 		return SBI_ENOTSUPP;
 
 	if (!smu_support_sleep_mode(&smu, DEEPSLEEP_MODE, hartid))
diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes45.h
index ce31617c5ec..01f63d444ea 100644
--- a/platform/generic/include/andes/andes45.h
+++ b/platform/generic/include/andes/andes45.h
@@ -43,6 +43,12 @@
 
 #ifndef __ASSEMBLER__
 
+#define is_andes(series)				\
+({							\
+	char value = csr_read(CSR_MARCHID) & 0xff;	\
+	(series) == (value >> 4) * 10 + (value & 0x0f);	\
+})
+
 #define has_andes_pmu()					\
 ({							\
 	(((csr_read(CSR_MMSC_CFG) &			\

From 0308f93dc44a21f11d5b54d449170b4142d9e473 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:10 +0800
Subject: [PATCH 1435/1765] lib: utils: fdt_pmu: Make the fdt_pmu_evt_select
 table global variable

To allow platform override pmu_init() filling the translation table
fdt_pmu_evt_select[] when PMU node doesn't provide such information,
we need to share the table and its entry counter with other .c file.

We also define the structures of PMU property in fdt_helper.h, so we
can initialize the mappings in arrays.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_pmu.h | 24 +++++++++++++++++++++++-
 lib/utils/fdt/fdt_pmu.c         | 14 +++++---------
 2 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_pmu.h b/include/sbi_utils/fdt/fdt_pmu.h
index c65cad78d78..b10ae270971 100644
--- a/include/sbi_utils/fdt/fdt_pmu.h
+++ b/include/sbi_utils/fdt/fdt_pmu.h
@@ -13,6 +13,23 @@
 
 #include <sbi/sbi_types.h>
 
+struct fdt_pmu_hw_event_select_map {
+	uint32_t eidx;
+	uint64_t select;
+};
+
+struct fdt_pmu_hw_event_counter_map {
+	uint32_t eidx_start;
+	uint32_t eidx_end;
+	uint32_t ctr_map;
+};
+
+struct fdt_pmu_raw_event_counter_map {
+	uint64_t select;
+	uint64_t select_mask;
+	uint32_t ctr_map;
+};
+
 #ifdef CONFIG_FDT_PMU
 
 /**
@@ -26,7 +43,7 @@
  *
  * @param fdt device tree blob
  */
-void fdt_pmu_fixup(void *fdt);
+int fdt_pmu_fixup(void *fdt);
 
 /**
  * Setup PMU data from device tree
@@ -45,6 +62,11 @@ int fdt_pmu_setup(void *fdt);
  */
 uint64_t fdt_pmu_get_select_value(uint32_t event_idx);
 
+/** The event index to selector value table instance */
+extern struct fdt_pmu_hw_event_select_map fdt_pmu_evt_select[];
+/** The number of valid entries in fdt_pmu_evt_select[] */
+extern uint32_t hw_event_count;
+
 #else
 
 static inline void fdt_pmu_fixup(void *fdt) { }
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index a8d764822a6..684981eb9ba 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -14,21 +14,17 @@
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_pmu.h>
 
 #define FDT_PMU_HW_EVENT_MAX (SBI_PMU_HW_EVENT_MAX * 2)
 
-struct fdt_pmu_hw_event_select {
-	uint32_t eidx;
-	uint64_t select;
-};
-
-static struct fdt_pmu_hw_event_select fdt_pmu_evt_select[FDT_PMU_HW_EVENT_MAX] = {0};
-static uint32_t hw_event_count;
+struct fdt_pmu_hw_event_select_map fdt_pmu_evt_select[FDT_PMU_HW_EVENT_MAX] = {0};
+uint32_t hw_event_count;
 
 uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
 {
 	int i;
-	struct fdt_pmu_hw_event_select *event;
+	struct fdt_pmu_hw_event_select_map *event;
 
 	for (i = 0; i < SBI_PMU_HW_EVENT_MAX; i++) {
 		event = &fdt_pmu_evt_select[i];
@@ -65,7 +61,7 @@ int fdt_pmu_setup(void *fdt)
 	int i, pmu_offset, len, result;
 	const u32 *event_val;
 	const u32 *event_ctr_map;
-	struct fdt_pmu_hw_event_select *event;
+	struct fdt_pmu_hw_event_select_map *event;
 	uint64_t raw_selector, select_mask;
 	u32 event_idx_start, event_idx_end, ctr_map;
 

From e19d419f155fc956902e8333fc4420db4b9a07df Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:11 +0800
Subject: [PATCH 1436/1765] lib: utils: fdt_pmu: Do not iterate over the
 fdt_pmu_evt_select table

The valid entry count is tracking by hw_event_count so there
is no need to check the whole table.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index 684981eb9ba..e23e8223e6f 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -26,7 +26,7 @@ uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
 	int i;
 	struct fdt_pmu_hw_event_select_map *event;
 
-	for (i = 0; i < SBI_PMU_HW_EVENT_MAX; i++) {
+	for (i = 0; i < hw_event_count; i++) {
 		event = &fdt_pmu_evt_select[i];
 		if (event->eidx == event_idx)
 			return event->select;

From d16200961213e652d77fee4e3f339e1629d695ff Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 30 Nov 2023 20:42:13 +0800
Subject: [PATCH 1437/1765] docs: pmu: Add Andes PMU node example

Add PMU node example for event index to counter index mapping
and selector value translation of Andes' CPUs.

Currently, there are 4 HPM counters that can be used to monitor
all of the events for each hart.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Locus Wei-Han Chen <locus84@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 docs/pmu_support.md | 82 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)

diff --git a/docs/pmu_support.md b/docs/pmu_support.md
index 8cfa08c814d..9b48f1ea6a6 100644
--- a/docs/pmu_support.md
+++ b/docs/pmu_support.md
@@ -125,3 +125,85 @@ pmu {
 					  <0x0 0x2 0xffffffff 0xffffe0ff 0x18>;
 };
 ```
+
+### Example 3
+
+```
+/*
+ * For Andes 45-series platforms. The encodings can be found in the
+ * "Machine Performance Monitoring Event Selector" section
+ * http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
+ */
+pmu {
+	compatible 			= "riscv,pmu";
+	riscv,event-to-mhpmevent =
+					 <0x1 0x0000 0x10>, /* CPU_CYCLES          -> Cycle count */
+					 <0x2 0x0000 0x20>, /* INSTRUCTIONS        -> Retired instruction count */
+					 <0x3 0x0000 0x41>, /* CACHE_REFERENCES    -> D-Cache access */
+					 <0x4 0x0000 0x51>, /* CACHE_MISSES        -> D-Cache miss */
+					 <0x5 0x0000 0x80>, /* BRANCH_INSTRUCTIONS -> Conditional branch instruction count */
+					 <0x6 0x0000 0x02>, /* BRANCH_MISSES       -> Misprediction of conditional branches */
+					 <0x10000 0x0000 0x61>,  /* L1D_READ_ACCESS  -> D-Cache load access */
+					 <0x10001 0x0000 0x71>,  /* L1D_READ_MISS    -> D-Cache load miss */
+					 <0x10002 0x0000 0x81>,  /* L1D_WRITE_ACCESS -> D-Cache store access */
+					 <0x10003 0x0000 0x91>,  /* L1D_WRITE_MISS   -> D-Cache store miss */
+					 <0x10008 0x0000 0x21>,  /* L1I_READ_ACCESS  -> I-Cache access */
+					 <0x10009 0x0000 0x31>;  /* L1I_READ_MISS    -> I-Cache miss */
+	riscv,event-to-mhpmcounters = <0x1 0x6 0x78>,
+							<0x10000 0x10003 0x78>,
+							<0x10008 0x10009 0x78>;
+	riscv,raw-event-to-mhpmcounters =
+						<0x0 0x10 0xffffffff 0xffffffff 0x78>, /* Cycle count */
+						<0x0 0x20 0xffffffff 0xffffffff 0x78>, /* Retired instruction count */
+						<0x0 0x30 0xffffffff 0xffffffff 0x78>, /* Integer load instruction count */
+						<0x0 0x40 0xffffffff 0xffffffff 0x78>, /* Integer store instruction count */
+						<0x0 0x50 0xffffffff 0xffffffff 0x78>, /* Atomic instruction count */
+						<0x0 0x60 0xffffffff 0xffffffff 0x78>, /* System instruction count */
+						<0x0 0x70 0xffffffff 0xffffffff 0x78>, /* Integer computational instruction count */
+						<0x0 0x80 0xffffffff 0xffffffff 0x78>, /* Conditional branch instruction count */
+						<0x0 0x90 0xffffffff 0xffffffff 0x78>, /* Taken conditional branch instruction count */
+						<0x0 0xA0 0xffffffff 0xffffffff 0x78>, /* JAL instruction count */
+						<0x0 0xB0 0xffffffff 0xffffffff 0x78>, /* JALR instruction count */
+						<0x0 0xC0 0xffffffff 0xffffffff 0x78>, /* Return instruction count */
+						<0x0 0xD0 0xffffffff 0xffffffff 0x78>, /* Control transfer instruction count */
+						<0x0 0xE0 0xffffffff 0xffffffff 0x78>, /* EXEC.IT instruction count */
+						<0x0 0xF0 0xffffffff 0xffffffff 0x78>, /* Integer multiplication instruction count */
+						<0x0 0x100 0xffffffff 0xffffffff 0x78>, /* Integer division instruction count */
+						<0x0 0x110 0xffffffff 0xffffffff 0x78>, /* Floating-point load instruction count */
+						<0x0 0x120 0xffffffff 0xffffffff 0x78>, /* Floating-point store instruction count */
+						<0x0 0x130 0xffffffff 0xffffffff 0x78>, /* Floating-point addition/subtraction instruction count */
+						<0x0 0x140 0xffffffff 0xffffffff 0x78>, /* Floating-point multiplication instruction count */
+						<0x0 0x150 0xffffffff 0xffffffff 0x78>, /* Floating-point fused multiply-add instruction count */
+						<0x0 0x160 0xffffffff 0xffffffff 0x78>, /* Floating-point division or square-root instruction count */
+						<0x0 0x170 0xffffffff 0xffffffff 0x78>, /* Other floating-point instruction count */
+						<0x0 0x180 0xffffffff 0xffffffff 0x78>, /* Integer multiplication and add/sub instruction count */
+						<0x0 0x190 0xffffffff 0xffffffff 0x78>, /* Retired operation count */
+						<0x0 0x01 0xffffffff 0xffffffff 0x78>, /* ILM access */
+						<0x0 0x11 0xffffffff 0xffffffff 0x78>, /* DLM access */
+						<0x0 0x21 0xffffffff 0xffffffff 0x78>, /* I-Cache access */
+						<0x0 0x31 0xffffffff 0xffffffff 0x78>, /* I-Cache miss */
+						<0x0 0x41 0xffffffff 0xffffffff 0x78>, /* D-Cache access */
+						<0x0 0x51 0xffffffff 0xffffffff 0x78>, /* D-Cache miss */
+						<0x0 0x61 0xffffffff 0xffffffff 0x78>, /* D-Cache load access */
+						<0x0 0x71 0xffffffff 0xffffffff 0x78>, /* D-Cache load miss */
+						<0x0 0x81 0xffffffff 0xffffffff 0x78>, /* D-Cache store access */
+						<0x0 0x91 0xffffffff 0xffffffff 0x78>, /* D-Cache store miss */
+						<0x0 0xA1 0xffffffff 0xffffffff 0x78>, /* D-Cache writeback */
+						<0x0 0xB1 0xffffffff 0xffffffff 0x78>, /* Cycles waiting for I-Cache fill data */
+						<0x0 0xC1 0xffffffff 0xffffffff 0x78>, /* Cycles waiting for D-Cache fill data */
+						<0x0 0xD1 0xffffffff 0xffffffff 0x78>, /* Uncached fetch data access from bus */
+						<0x0 0xE1 0xffffffff 0xffffffff 0x78>, /* Uncached load data access from bus */
+						<0x0 0xF1 0xffffffff 0xffffffff 0x78>, /* Cycles waiting for uncached fetch data from bus */
+						<0x0 0x101 0xffffffff 0xffffffff 0x78>, /* Cycles waiting for uncached load data from bus */
+						<0x0 0x111 0xffffffff 0xffffffff 0x78>, /* Main ITLB access */
+						<0x0 0x121 0xffffffff 0xffffffff 0x78>, /* Main ITLB miss */
+						<0x0 0x131 0xffffffff 0xffffffff 0x78>, /* Main DTLB access */
+						<0x0 0x141 0xffffffff 0xffffffff 0x78>, /* Main DTLB miss */
+						<0x0 0x151 0xffffffff 0xffffffff 0x78>, /* Cycles waiting for Main ITLB fill data */
+						<0x0 0x161 0xffffffff 0xffffffff 0x78>, /* Pipeline stall cycles caused by Main DTLB miss */
+						<0x0 0x171 0xffffffff 0xffffffff 0x78>, /* Hardware prefetch bus access */
+						<0x0 0x02 0xffffffff 0xffffffff 0x78>, /* Misprediction of conditional branches */
+						<0x0 0x12 0xffffffff 0xffffffff 0x78>, /* Misprediction of taken conditional branches */
+						<0x0 0x22 0xffffffff 0xffffffff 0x78>; /* Misprediction of targets of Return instructions */
+};
+```

From 6b9a8494828d3983784fb46bb6cd2b6cc9a54ab1 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 8 Nov 2023 11:28:16 +0800
Subject: [PATCH 1438/1765] lib: sbi: Remove xchg/cmpxchg implemented via lr/sc

lr/sc is part of the A extension. If the A extension is not supported,
lr/sc cannot be used. So remove xchg/cmpxchg.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/riscv_atomic.c | 106 ++---------------------------------------
 1 file changed, 4 insertions(+), 102 deletions(-)

diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 528686f4e9c..a1432183178 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -12,6 +12,10 @@
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
 
+#ifndef __riscv_atomic
+#error "opensbi strongly relies on the A extension of RISC-V"
+#endif
+
 long atomic_read(atomic_t *atom)
 {
 	long ret = atom->counter;
@@ -79,131 +83,29 @@ long atomic_sub_return(atomic_t *atom, long value)
 		(__typeof__(*(ptr))) __axchg((ptr), _x_, sizeof(*(ptr)));	\
 	})
 
-
-#define __xchg(ptr, new, size)                                            \
-	({                                                                \
-		__typeof__(ptr) __ptr	 = (ptr);                         \
-		__typeof__(*(ptr)) __new = (new);                         \
-		__typeof__(*(ptr)) __ret;                                 \
-		register unsigned int __rc;                               \
-		switch (size) {                                           \
-		case 4:                                                   \
-			__asm__ __volatile__("0:	lr.w %0, %2\n"    \
-					     "	sc.w.rl %1, %z3, %2\n"    \
-					     "	bnez %1, 0b\n"            \
-					     "	fence rw, rw\n"           \
-					     : "=&r"(__ret), "=&r"(__rc), \
-					       "+A"(*__ptr)               \
-					     : "rJ"(__new)                \
-					     : "memory");                 \
-			break;                                            \
-		case 8:                                                   \
-			__asm__ __volatile__("0:	lr.d %0, %2\n"    \
-					     "	sc.d.rl %1, %z3, %2\n"    \
-					     "	bnez %1, 0b\n"            \
-					     "	fence rw, rw\n"           \
-					     : "=&r"(__ret), "=&r"(__rc), \
-					       "+A"(*__ptr)               \
-					     : "rJ"(__new)                \
-					     : "memory");                 \
-			break;                                            \
-		default:                                                  \
-			break;                                            \
-		}                                                         \
-		__ret;                                                    \
-	})
-
-#define xchg(ptr, n)                                                     \
-	({                                                               \
-		__typeof__(*(ptr)) _n_ = (n);                            \
-		(__typeof__(*(ptr))) __xchg((ptr), _n_, sizeof(*(ptr))); \
-	})
-
-#define __cmpxchg(ptr, old, new, size)                                    \
-	({                                                                \
-		__typeof__(ptr) __ptr	 = (ptr);                         \
-		__typeof__(*(ptr)) __old = (old);                         \
-		__typeof__(*(ptr)) __new = (new);                         \
-		__typeof__(*(ptr)) __ret;                                 \
-		register unsigned int __rc;                               \
-		switch (size) {                                           \
-		case 4:                                                   \
-			__asm__ __volatile__("0:	lr.w %0, %2\n"    \
-					     "	bne  %0, %z3, 1f\n"       \
-					     "	sc.w.rl %1, %z4, %2\n"    \
-					     "	bnez %1, 0b\n"            \
-					     "	fence rw, rw\n"           \
-					     "1:\n"                       \
-					     : "=&r"(__ret), "=&r"(__rc), \
-					       "+A"(*__ptr)               \
-					     : "rJ"(__old), "rJ"(__new)   \
-					     : "memory");                 \
-			break;                                            \
-		case 8:                                                   \
-			__asm__ __volatile__("0:	lr.d %0, %2\n"    \
-					     "	bne %0, %z3, 1f\n"        \
-					     "	sc.d.rl %1, %z4, %2\n"    \
-					     "	bnez %1, 0b\n"            \
-					     "	fence rw, rw\n"           \
-					     "1:\n"                       \
-					     : "=&r"(__ret), "=&r"(__rc), \
-					       "+A"(*__ptr)               \
-					     : "rJ"(__old), "rJ"(__new)   \
-					     : "memory");                 \
-			break;                                            \
-		default:                                                  \
-			break;                                            \
-		}                                                         \
-		__ret;                                                    \
-	})
-
-#define cmpxchg(ptr, o, n)                                          \
-	({                                                          \
-		__typeof__(*(ptr)) _o_ = (o);                       \
-		__typeof__(*(ptr)) _n_ = (n);                       \
-		(__typeof__(*(ptr)))                                \
-			__cmpxchg((ptr), _o_, _n_, sizeof(*(ptr))); \
-	})
-
 long atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
 {
-#ifdef __riscv_atomic
 	return __sync_val_compare_and_swap(&atom->counter, oldval, newval);
-#else
-	return cmpxchg(&atom->counter, oldval, newval);
-#endif
 }
 
 long atomic_xchg(atomic_t *atom, long newval)
 {
 	/* Atomically set new value and return old value. */
-#ifdef __riscv_atomic
 	return axchg(&atom->counter, newval);
-#else
-	return xchg(&atom->counter, newval);
-#endif
 }
 
 unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 				  unsigned int newval)
 {
 	/* Atomically set new value and return old value. */
-#ifdef __riscv_atomic
 	return axchg(ptr, newval);
-#else
-	return xchg(ptr, newval);
-#endif
 }
 
 unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 				    unsigned long newval)
 {
 	/* Atomically set new value and return old value. */
-#ifdef __riscv_atomic
 	return axchg(ptr, newval);
-#else
-	return xchg(ptr, newval);
-#endif
 }
 
 #if (__SIZEOF_POINTER__ == 8)

From 11bf49b44466b821d0936419caf24befab0a61b7 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 15 Nov 2023 22:59:21 +0800
Subject: [PATCH 1439/1765] lib: sbi: Fix __atomic_op_bit_ord and comments

The original code returns the value of the word before modification.
When modifying the upper 32 bits under RV64, the value returned via
int return will have no meaning. Corrected to return the value of the
bit. And modify the function description.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_atomic.h |  8 ++++----
 lib/sbi/riscv_atomic.c     | 10 +++++-----
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/sbi/riscv_atomic.h b/include/sbi/riscv_atomic.h
index 3972e0b727c..c5aa05e4134 100644
--- a/include/sbi/riscv_atomic.h
+++ b/include/sbi/riscv_atomic.h
@@ -39,14 +39,14 @@ unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
 unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 				    unsigned long newval);
 /**
- * Set a bit in an atomic variable and return the new value.
+ * Set a bit in an atomic variable and return the value of bit before modify.
  * @nr : Bit to set.
  * @atom: atomic variable to modify
  */
 int atomic_set_bit(int nr, atomic_t *atom);
 
 /**
- * Clear a bit in an atomic variable and return the new value.
+ * Clear a bit in an atomic variable and return the value of bit before modify.
  * @nr : Bit to set.
  * @atom: atomic variable to modify
  */
@@ -54,14 +54,14 @@ int atomic_set_bit(int nr, atomic_t *atom);
 int atomic_clear_bit(int nr, atomic_t *atom);
 
 /**
- * Set a bit in any address and return the new value .
+ * Set a bit in any address and return the value of bit before modify.
  * @nr : Bit to set.
  * @addr: Address to modify
  */
 int atomic_raw_set_bit(int nr, volatile unsigned long *addr);
 
 /**
- * Clear a bit in any address and return the new value .
+ * Clear a bit in any address and return the value of bit before modify.
  * @nr : Bit to set.
  * @addr: Address to modify
  */
diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index a1432183178..4d14bc56e18 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -124,7 +124,7 @@ unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 				     : "=r"(__res), "+A"(addr[BIT_WORD(nr)]) \
 				     : "r"(mod(__mask))                      \
 				     : "memory");                            \
-		__res;                                                       \
+		__res & __mask ? 1 : 0;                                      \
 	})
 
 #define __atomic_op_bit(op, mod, nr, addr) \
@@ -134,22 +134,22 @@ unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 #define __NOP(x) (x)
 #define __NOT(x) (~(x))
 
-inline int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
+int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
 {
 	return __atomic_op_bit(or, __NOP, nr, addr);
 }
 
-inline int atomic_raw_clear_bit(int nr, volatile unsigned long *addr)
+int atomic_raw_clear_bit(int nr, volatile unsigned long *addr)
 {
 	return __atomic_op_bit(and, __NOT, nr, addr);
 }
 
-inline int atomic_set_bit(int nr, atomic_t *atom)
+int atomic_set_bit(int nr, atomic_t *atom)
 {
 	return atomic_raw_set_bit(nr, (unsigned long *)&atom->counter);
 }
 
-inline int atomic_clear_bit(int nr, atomic_t *atom)
+int atomic_clear_bit(int nr, atomic_t *atom)
 {
 	return atomic_raw_clear_bit(nr, (unsigned long *)&atom->counter);
 }

From 88398696c816dfc79d5301180dfe42a5d8c497c9 Mon Sep 17 00:00:00 2001
From: Anup Patel <anup@brainfault.org>
Date: Fri, 8 Dec 2023 13:54:07 +0530
Subject: [PATCH 1440/1765] lib: sbi: Replace __atomic_op_bit_ord with __atomic
 intrinsics

Simplify atomic-related bit operations through __atomic intrinsics.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/riscv_atomic.c | 34 ++++++----------------------------
 1 file changed, 6 insertions(+), 28 deletions(-)

diff --git a/lib/sbi/riscv_atomic.c b/lib/sbi/riscv_atomic.c
index 4d14bc56e18..32cf3f03521 100644
--- a/lib/sbi/riscv_atomic.c
+++ b/lib/sbi/riscv_atomic.c
@@ -108,40 +108,18 @@ unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
 	return axchg(ptr, newval);
 }
 
-#if (__SIZEOF_POINTER__ == 8)
-#define __AMO(op) "amo" #op ".d"
-#elif (__SIZEOF_POINTER__ == 4)
-#define __AMO(op) "amo" #op ".w"
-#else
-#error "Unexpected __SIZEOF_POINTER__"
-#endif
-
-#define __atomic_op_bit_ord(op, mod, nr, addr, ord)                          \
-	({                                                                   \
-		unsigned long __res, __mask;                                 \
-		__mask = BIT_MASK(nr);                                       \
-		__asm__ __volatile__(__AMO(op) #ord " %0, %2, %1"            \
-				     : "=r"(__res), "+A"(addr[BIT_WORD(nr)]) \
-				     : "r"(mod(__mask))                      \
-				     : "memory");                            \
-		__res & __mask ? 1 : 0;                                      \
-	})
-
-#define __atomic_op_bit(op, mod, nr, addr) \
-	__atomic_op_bit_ord(op, mod, nr, addr, .aqrl)
-
-/* Bitmask modifiers */
-#define __NOP(x) (x)
-#define __NOT(x) (~(x))
-
 int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
 {
-	return __atomic_op_bit(or, __NOP, nr, addr);
+	unsigned long res, mask = BIT_MASK(nr);
+	res = __atomic_fetch_or(&addr[BIT_WORD(nr)], mask, __ATOMIC_RELAXED);
+	return res & mask ? 1 : 0;
 }
 
 int atomic_raw_clear_bit(int nr, volatile unsigned long *addr)
 {
-	return __atomic_op_bit(and, __NOT, nr, addr);
+	unsigned long res, mask = BIT_MASK(nr);
+	res = __atomic_fetch_and(&addr[BIT_WORD(nr)], ~mask, __ATOMIC_RELAXED);
+	return res & mask ? 1 : 0;
 }
 
 int atomic_set_bit(int nr, atomic_t *atom)

From 07419ec84bc39d476a17f8b1450434e57407600d Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 22 Nov 2023 20:54:38 +0800
Subject: [PATCH 1441/1765] lib: sbi: Prevent redundant sbi_ipi_process

Multiple harts may try to send IPI to a particular target hart A
in which case the send_ipi() should be called only when the old
value of the hart A ipi_type is zero.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ipi.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 0bf446a046e..5c33a78b2f3 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -39,7 +39,7 @@ static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];
 static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 			u32 event, void *data)
 {
-	int ret;
+	int ret = 0;
 	struct sbi_scratch *remote_scratch = NULL;
 	struct sbi_ipi_data *ipi_data;
 	const struct sbi_ipi_event_ops *ipi_ops;
@@ -64,11 +64,15 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 
 	/*
 	 * Set IPI type on remote hart's scratch area and
-	 * trigger the interrupt
+	 * trigger the interrupt.
+	 *
+	 * Multiple harts may be trying to send IPI to the
+	 * remote hart so call sbi_ipi_raw_send() only when
+	 * the ipi_type was previously zero.
 	 */
-	atomic_raw_set_bit(event, &ipi_data->ipi_type);
-
-	ret = sbi_ipi_raw_send(remote_hartindex);
+	if (!__atomic_fetch_or(&ipi_data->ipi_type,
+				BIT(event), __ATOMIC_RELAXED))
+		ret = sbi_ipi_raw_send(remote_hartindex);
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
 

From 93da66b7d40605c3288ba05e70de8ef1914cdb60 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Wed, 22 Nov 2023 11:44:04 -0800
Subject: [PATCH 1442/1765] lib: sbi_hart: Store PMP granularity as log base 2

This minimizes the need to call log2roundup() to recover the log value.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  4 ++--
 lib/sbi/sbi_hart.c     | 30 +++++++++++++++---------------
 lib/sbi/sbi_init.c     |  4 ++--
 3 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 811e5f50c38..0aefc2bebc0 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -73,7 +73,7 @@ struct sbi_hart_features {
 	unsigned long extensions[BITS_TO_LONGS(SBI_HART_EXT_MAX)];
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
-	unsigned long pmp_gran;
+	unsigned int pmp_log2gran;
 	unsigned int mhpm_mask;
 	unsigned int mhpm_bits;
 };
@@ -93,7 +93,7 @@ unsigned int sbi_hart_mhpm_mask(struct sbi_scratch *scratch);
 void sbi_hart_delegation_dump(struct sbi_scratch *scratch,
 			      const char *prefix, const char *suffix);
 unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
-unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
+unsigned int sbi_hart_pmp_log2gran(struct sbi_scratch *scratch);
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
 unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch);
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c9483738fc0..6acff378bbf 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -267,12 +267,12 @@ unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
 	return hfeatures->pmp_count;
 }
 
-unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch)
+unsigned int sbi_hart_pmp_log2gran(struct sbi_scratch *scratch)
 {
 	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 
-	return hfeatures->pmp_gran;
+	return hfeatures->pmp_log2gran;
 }
 
 unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch)
@@ -359,12 +359,12 @@ static void sbi_hart_smepmp_set(struct sbi_scratch *scratch,
 				struct sbi_domain_memregion *reg,
 				unsigned int pmp_idx,
 				unsigned int pmp_flags,
-				unsigned int pmp_gran_log2,
+				unsigned int pmp_log2gran,
 				unsigned long pmp_addr_max)
 {
 	unsigned long pmp_addr = reg->base >> PMP_SHIFT;
 
-	if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
+	if (pmp_log2gran <= reg->order && pmp_addr < pmp_addr_max) {
 		pmp_set(pmp_idx, pmp_flags, reg->base, reg->order);
 	} else {
 		sbi_printf("Can not configure pmp for domain %s because"
@@ -376,7 +376,7 @@ static void sbi_hart_smepmp_set(struct sbi_scratch *scratch,
 
 static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 				     unsigned int pmp_count,
-				     unsigned int pmp_gran_log2,
+				     unsigned int pmp_log2gran,
 				     unsigned long pmp_addr_max)
 {
 	struct sbi_domain_memregion *reg;
@@ -412,7 +412,7 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 			return 0;
 
 		sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags,
-				    pmp_gran_log2, pmp_addr_max);
+				    pmp_log2gran, pmp_addr_max);
 	}
 
 	/* Set the MML to enforce new encoding */
@@ -438,7 +438,7 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 			return 0;
 
 		sbi_hart_smepmp_set(scratch, dom, reg, pmp_idx++, pmp_flags,
-				    pmp_gran_log2, pmp_addr_max);
+				    pmp_log2gran, pmp_addr_max);
 	}
 
 	/*
@@ -451,7 +451,7 @@ static int sbi_hart_smepmp_configure(struct sbi_scratch *scratch,
 
 static int sbi_hart_oldpmp_configure(struct sbi_scratch *scratch,
 				     unsigned int pmp_count,
-				     unsigned int pmp_gran_log2,
+				     unsigned int pmp_log2gran,
 				     unsigned long pmp_addr_max)
 {
 	struct sbi_domain_memregion *reg;
@@ -481,7 +481,7 @@ static int sbi_hart_oldpmp_configure(struct sbi_scratch *scratch,
 			pmp_flags |= PMP_X;
 
 		pmp_addr = reg->base >> PMP_SHIFT;
-		if (pmp_gran_log2 <= reg->order && pmp_addr < pmp_addr_max) {
+		if (pmp_log2gran <= reg->order && pmp_addr < pmp_addr_max) {
 			pmp_set(pmp_idx++, pmp_flags, reg->base, reg->order);
 		} else {
 			sbi_printf("Can not configure pmp for domain %s because"
@@ -508,7 +508,7 @@ int sbi_hart_map_saddr(unsigned long addr, unsigned long size)
 	if (is_pmp_entry_mapped(SBI_SMEPMP_RESV_ENTRY))
 		return SBI_ENOSPC;
 
-	for (order = log2roundup(MAX(sbi_hart_pmp_granularity(scratch), size));
+	for (order = MAX(sbi_hart_pmp_log2gran(scratch), log2roundup(size));
 	     order <= __riscv_xlen; order++) {
 		if (order < __riscv_xlen) {
 			base = addr & ~((1UL << order) - 1UL);
@@ -540,23 +540,23 @@ int sbi_hart_unmap_saddr(void)
 int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
 {
 	int rc;
-	unsigned int pmp_bits, pmp_gran_log2;
+	unsigned int pmp_bits, pmp_log2gran;
 	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
 	unsigned long pmp_addr_max;
 
 	if (!pmp_count)
 		return 0;
 
-	pmp_gran_log2 = log2roundup(sbi_hart_pmp_granularity(scratch));
+	pmp_log2gran = sbi_hart_pmp_log2gran(scratch);
 	pmp_bits = sbi_hart_pmp_addrbits(scratch) - 1;
 	pmp_addr_max = (1UL << pmp_bits) | ((1UL << pmp_bits) - 1);
 
 	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP))
 		rc = sbi_hart_smepmp_configure(scratch, pmp_count,
-						pmp_gran_log2, pmp_addr_max);
+						pmp_log2gran, pmp_addr_max);
 	else
 		rc = sbi_hart_oldpmp_configure(scratch, pmp_count,
-						pmp_gran_log2, pmp_addr_max);
+						pmp_log2gran, pmp_addr_max);
 
 	/*
 	 * As per section 3.7.2 of privileged specification v1.12,
@@ -874,7 +874,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	 */
 	val = hart_pmp_get_allowed_addr();
 	if (val) {
-		hfeatures->pmp_gran =  1 << (sbi_ffs(val) + 2);
+		hfeatures->pmp_log2gran = sbi_ffs(val) + 2;
 		hfeatures->pmp_addr_bits = sbi_fls(val) + 1;
 		/* Detect number of PMP regions. At least PMPADDR0 should be implemented*/
 		__check_csr_64(CSR_PMPADDR0, 0, val, pmp_count, __pmp_skip);
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index e723553fc26..005985d9eb3 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -176,8 +176,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Boot HART ISA Extensions  : %s\n", str);
 	sbi_printf("Boot HART PMP Count       : %d\n",
 		   sbi_hart_pmp_count(scratch));
-	sbi_printf("Boot HART PMP Granularity : %lu\n",
-		   sbi_hart_pmp_granularity(scratch));
+	sbi_printf("Boot HART PMP Granularity : %u bits\n",
+		   sbi_hart_pmp_log2gran(scratch));
 	sbi_printf("Boot HART PMP Address Bits: %d\n",
 		   sbi_hart_pmp_addrbits(scratch));
 	sbi_printf("Boot HART MHPM Info       : %lu (0x%08x)\n",

From ee725174bada254f8a081937d870feb837618d6e Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 7 Dec 2023 14:23:49 -0800
Subject: [PATCH 1443/1765] lib: sbi_pmu: Add PMU snapshot definitions

OpenSBI doesn't support SBI PMU snapshot yet as there is not much benefit
unless the multiple counters overflow at the same time.

Just add the definition and return not supported error at this moment. The
default returned error is also not supported. Thus, no functional change
intended.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 include/sbi/sbi_ecall_interface.h | 6 +++++-
 include/sbi/sbi_error.h           | 1 +
 lib/sbi/sbi_ecall_pmu.c           | 2 ++
 lib/sbi/sbi_pmu.c                 | 6 ++++++
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 1fe469e3707..d8c646d7b07 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -103,6 +103,7 @@
 #define SBI_EXT_PMU_COUNTER_STOP	0x4
 #define SBI_EXT_PMU_COUNTER_FW_READ	0x5
 #define SBI_EXT_PMU_COUNTER_FW_READ_HI	0x6
+#define SBI_EXT_PMU_SNAPSHOT_SET_SHMEM	0x7
 
 /** General pmu event codes specified in SBI PMU extension */
 enum sbi_pmu_hw_generic_events_t {
@@ -241,9 +242,11 @@ enum sbi_pmu_ctr_type {
 
 /* Flags defined for counter start function */
 #define SBI_PMU_START_FLAG_SET_INIT_VALUE (1 << 0)
+#define SBI_PMU_START_FLAG_INIT_FROM_SNAPSHOT (1 << 1)
 
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
+#define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT (1 << 1)
 
 /* SBI function IDs for DBCN extension */
 #define SBI_EXT_DBCN_CONSOLE_WRITE		0x0
@@ -309,8 +312,9 @@ enum sbi_cppc_reg_id {
 #define SBI_ERR_ALREADY_AVAILABLE		-6
 #define SBI_ERR_ALREADY_STARTED			-7
 #define SBI_ERR_ALREADY_STOPPED			-8
+#define SBI_ERR_NO_SHMEM			-9
 
-#define SBI_LAST_ERR				SBI_ERR_ALREADY_STOPPED
+#define SBI_LAST_ERR				SBI_ERR_NO_SHMEM
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index dd65e14b6fc..7f97506d8bd 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -23,6 +23,7 @@
 #define SBI_EALREADY		SBI_ERR_ALREADY_AVAILABLE
 #define SBI_EALREADY_STARTED	SBI_ERR_ALREADY_STARTED
 #define SBI_EALREADY_STOPPED	SBI_ERR_ALREADY_STOPPED
+#define SBI_ENO_SHMEM		SBI_ERR_NO_SHMEM
 
 #define SBI_ENODEV		-1000
 #define SBI_ENOSYS		-1001
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 1d5d512eeed..c58591106d0 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -74,6 +74,8 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_PMU_COUNTER_STOP:
 		ret = sbi_pmu_ctr_stop(regs->a0, regs->a1, regs->a2);
 		break;
+	case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM:
+		/* fallthrough as OpenSBI doesn't support snapshot yet */
 	default:
 		ret = SBI_ENOTSUPP;
 	}
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 4b0f5be4bf7..5f70730e402 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -442,6 +442,9 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return ret;
 
+	if (flags & SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT)
+		return SBI_ENO_SHMEM;
+
 	if (flags & SBI_PMU_START_FLAG_SET_INIT_VALUE)
 		bUpdate = true;
 
@@ -540,6 +543,9 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 	if ((cbase + sbi_fls(cmask)) >= total_ctrs)
 		return SBI_EINVAL;
 
+	if (flag & SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT)
+		return SBI_ENO_SHMEM;
+
 	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
 		cidx = i + cbase;
 		event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);

From 11a0ba5d4bce74b2573091c5533717c2871191f1 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 7 Dec 2023 14:23:50 -0800
Subject: [PATCH 1444/1765] lib: sbi_pmu: Fix the counter info function

The counter info should only return valid hardware counters for the ones
set in the counter mask. Otherwise, it will report incorrect number of
hardware counters to the supervisor if the platform has discontiguous
counters.

Fixes: c744ed77b18c ("lib: sbi_pmu: Enable noncontigous hpm event and counters")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h | 1 +
 lib/sbi/sbi_pmu.c     | 8 ++++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index d63149cde8a..7d32a4da31d 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -23,6 +23,7 @@ struct sbi_scratch;
 #define SBI_PMU_HW_CTR_MAX 32
 #define SBI_PMU_CTR_MAX	   (SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX)
 #define SBI_PMU_FIXED_CTR_MASK 0x07
+#define SBI_PMU_CY_IR_MASK	0x05
 
 struct sbi_pmu_device {
 	/** Name of the PMU platform device */
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 5f70730e402..6209ccc95d9 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -899,13 +899,17 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 	int width;
 	union sbi_pmu_ctr_info cinfo = {0};
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	unsigned long counter_mask = (unsigned long)sbi_hart_mhpm_mask(scratch) |
+				     SBI_PMU_CY_IR_MASK;
 
-	/* Sanity check. Counter1 is not mapped at all */
-	if (cidx >= total_ctrs || cidx == 1)
+	/* Sanity check */
+	if (cidx >= total_ctrs)
 		return SBI_EINVAL;
 
 	/* We have 31 HW counters with 31 being the last index(MHPMCOUNTER31) */
 	if (cidx < num_hw_ctrs) {
+		if (!(__test_bit(cidx, &counter_mask)))
+			return SBI_EINVAL;
 		cinfo.type = SBI_PMU_CTR_TYPE_HW;
 		cinfo.csr = CSR_CYCLE + cidx;
 		/* mcycle & minstret are always 64 bit */

From 06968103dcd99c2cf2dad97549ef3880ea00ccd2 Mon Sep 17 00:00:00 2001
From: Matt Waltz <matthewwaltzis@gmail.com>
Date: Tue, 5 Dec 2023 08:13:44 -0700
Subject: [PATCH 1445/1765] firmware: fix section types

These sections are only intended to hold data, and should not be executable.

Signed-off-by: Matt Waltz <matthewwaltzis@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_dynamic.S         | 2 +-
 firmware/fw_jump.S            | 2 +-
 firmware/payloads/test_head.S | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 2b6019676c5..7ff1c6a32b7 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -129,7 +129,7 @@ fw_options:
 	REG_L	a0, (a0)
 	ret
 
-	.section .entry, "ax", %progbits
+	.section .data
 	.align 3
 _dynamic_next_arg1:
 	RISCV_PTR 0x0
diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index 5b24f8b765a..ac74dc64389 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -90,7 +90,7 @@ fw_options:
 #error "Must define FW_JUMP_ADDR"
 #endif
 
-	.section .entry, "ax", %progbits
+	.section .rodata
 	.align 3
 _jump_addr:
 	RISCV_PTR FW_JUMP_ADDR
diff --git a/firmware/payloads/test_head.S b/firmware/payloads/test_head.S
index 4852f715f5d..7a2ac126752 100644
--- a/firmware/payloads/test_head.S
+++ b/firmware/payloads/test_head.S
@@ -78,7 +78,7 @@ _start_hang:
 	wfi
 	j	_start_hang
 
-	.section .entry, "ax", %progbits
+	.section .data
 	.align	3
 _hart_lottery:
 	RISCV_PTR	0

From a25fc74699feb9409e44344dff742d525f315e5c Mon Sep 17 00:00:00 2001
From: Nick Hu <nick.hu@sifive.com>
Date: Fri, 1 Dec 2023 17:51:47 +0800
Subject: [PATCH 1446/1765] lib: sbi_hsm: Put the resume_pending hart in the
 interruptible hart mask

Current interruptible hart mask doesn't include the hart which HSM state
is SBI_HSM_STATE_RESUME_PENDING. So when there is a request to send an
IPI to the hart which is in the resume process, this hart would miss the
IPI forever. Put the SBI_HSM_STATE_RESUME_PENDING hart in the
interruptible hart mask to fix the issue.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 147f954e328..3d60ceb749a 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -128,7 +128,8 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 
 		hstate = __sbi_hsm_hart_get_state(hbase + i);
 		if (hstate == SBI_HSM_STATE_STARTED ||
-		    hstate == SBI_HSM_STATE_SUSPENDED)
+		    hstate == SBI_HSM_STATE_SUSPENDED ||
+		    hstate == SBI_HSM_STATE_RESUME_PENDING)
 			*out_hmask |= hmask;
 	}
 

From 87aa3069d14b52bf87cb14d8f6b3ed51b45465ea Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sun, 10 Dec 2023 17:44:54 +0800
Subject: [PATCH 1447/1765] platform: recalculate heap size to support new tlb
 entry number

Previous patch introduced a change that using hart count as the default
number of tlb entries in the fifo. This makes the default tlb fifo size
grow in square with the number of harts. So the default heap size is
not enough to allocate tlb fifo when the hart count is big.

Fixes: 52fd64b ("platform: Uses hart count as the default size of tlb info")
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_bitops.h    |  1 +
 include/sbi/sbi_heap.h      |  3 +++
 lib/sbi/sbi_heap.c          |  2 --
 platform/generic/platform.c | 16 +++++++++++++++-
 4 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 48a20901eff..7d90334d778 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -26,6 +26,7 @@
 #define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
 #define BIT_WORD(bit)		((bit) / BITS_PER_LONG)
 #define BIT_WORD_OFFSET(bit)	((bit) & (BITS_PER_LONG - 1))
+#define BIT_ALIGN(bit, align)	(((bit) + ((align) - 1)) & ~((align) - 1))
 
 #define GENMASK(h, l) \
 	(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
diff --git a/include/sbi/sbi_heap.h b/include/sbi/sbi_heap.h
index 88d176ef0ed..16755ec9b56 100644
--- a/include/sbi/sbi_heap.h
+++ b/include/sbi/sbi_heap.h
@@ -12,6 +12,9 @@
 
 #include <sbi/sbi_types.h>
 
+/* Alignment of heap base address and size */
+#define HEAP_BASE_ALIGN			1024
+
 struct sbi_scratch;
 
 /** Allocate from heap area */
diff --git a/lib/sbi/sbi_heap.c b/lib/sbi/sbi_heap.c
index 698c3775d99..bcd404bb222 100644
--- a/lib/sbi/sbi_heap.c
+++ b/lib/sbi/sbi_heap.c
@@ -14,8 +14,6 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
-/* Alignment of heap base address and size */
-#define HEAP_BASE_ALIGN			1024
 /* Minimum size and alignment of heap allocations */
 #define HEAP_ALLOC_ALIGN		64
 #define HEAP_HOUSEKEEPING_FACTOR	16
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index f17e94ed35c..08ae92ae4de 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -10,7 +10,9 @@
 #include <libfdt.h>
 #include <platform_override.h>
 #include <sbi/riscv_asm.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_system.h>
@@ -54,6 +56,18 @@ static void fw_platform_lookup_special(void *fdt, int root_offset)
 	}
 }
 
+static u32 fw_platform_calculate_heap_size(u32 hart_count)
+{
+	u32 heap_size;
+
+	heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(hart_count);
+
+	/* For TLB fifo */
+	heap_size += 0x40 * (hart_count) * (hart_count);
+
+	return BIT_ALIGN(heap_size, HEAP_BASE_ALIGN);
+}
+
 extern struct sbi_platform platform;
 static bool platform_has_mlevel_imsic = false;
 static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
@@ -115,7 +129,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 	}
 
 	platform.hart_count = hart_count;
-	platform.heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(hart_count);
+	platform.heap_size = fw_platform_calculate_heap_size(hart_count);
 	platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
 
 	/* Return original FDT pointer */

From a2e254e88162a589c42f0e4f382170fb0d7a6d85 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Sun, 10 Dec 2023 23:21:39 +0800
Subject: [PATCH 1448/1765] lib: sbi: skip wait_for_coldboot when coolboot done

When warmboot via HSM, coolboot has been completed and
wait_for_coldboot can be skipped to speed up.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 005985d9eb3..6a98e134a93 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -195,6 +195,9 @@ static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	unsigned long saved_mie, cmip;
 
+	if (__smp_load_acquire(&coldboot_done))
+		return;
+
 	/* Save MIE CSR */
 	saved_mie = csr_read(CSR_MIE);
 

From 6112d584d435d2d2f2685cfcd8321c389056636b Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 17 Nov 2023 20:13:09 +0800
Subject: [PATCH 1449/1765] lib: utils/fdt: Allow to use reg-names when parsing
 ACLINT

Currently, the fdt_parse_aclint_node() follows a fixed order to parse
ACLINT timer. This may cause the undesirable result when the ACLINT
device does not support mtime without adding an empty entry for it in
the DT.

To be robust, make fdt_parse_aclint_node() support "reg-names" property,
so it can parse the DT in an order independent way. For compatibility,
fdt_parse_aclint_node() only use "reg-names" when parsing ACLINT timer,
and will fallback to the old way if "reg-names" property is not found.

Link: https://lore.kernel.org/all/20231114-skedaddle-precinct-66c8897227bb@squawk/
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h |  3 +
 lib/utils/fdt/fdt_helper.c         | 99 ++++++++++++++++++++++++++----
 2 files changed, 90 insertions(+), 12 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 5c928ffd72c..430d8180a9b 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -48,6 +48,9 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 int fdt_get_node_addr_size(void *fdt, int node, int index,
 			   uint64_t *addr, uint64_t *size);
 
+int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
+				   uint64_t *addr, uint64_t *size);
+
 bool fdt_node_is_enabled(void *fdt, int nodeoff);
 
 int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 35be7baba44..78c1f380793 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -216,6 +216,32 @@ int fdt_get_node_addr_size(void *fdt, int node, int index,
 	return 0;
 }
 
+int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
+				   uint64_t *addr, uint64_t *size)
+{
+	int i, j, count;
+	const char *val;
+	const char *regname;
+
+	if (!fdt || node < 0 || !name)
+		return SBI_EINVAL;
+
+	val = fdt_getprop(fdt, node, "reg-names", &count);
+	if (!val)
+		return SBI_ENODEV;
+
+	for (i = 0, j = 0; i < count; i++, j++) {
+		regname = val + i;
+
+		if (strcmp(name, regname) == 0)
+			return fdt_get_node_addr_size(fdt, node, j, addr, size);
+
+		i += strlen(regname);
+	}
+
+	return SBI_ENODEV;
+}
+
 bool fdt_node_is_enabled(void *fdt, int nodeoff)
 {
 	int len;
@@ -874,21 +900,40 @@ int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 	return fdt_parse_plic_node(fdt, nodeoffset, plic);
 }
 
-int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
-			  unsigned long *out_addr1, unsigned long *out_size1,
-			  unsigned long *out_addr2, unsigned long *out_size2,
-			  u32 *out_first_hartid, u32 *out_hart_count)
+static int fdt_get_aclint_addr_size_by_name(void *fdt, int nodeoffset,
+					    unsigned long *out_addr1,
+					    unsigned long *out_size1,
+					    unsigned long *out_addr2,
+					    unsigned long *out_size2)
 {
-	const fdt32_t *val;
+	int rc;
 	uint64_t reg_addr, reg_size;
-	int i, rc, count, cpu_offset, cpu_intc_offset;
-	u32 phandle, hwirq, hartid, first_hartid, last_hartid, hart_count;
-	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
 
-	if (nodeoffset < 0 || !fdt ||
-	    !out_addr1 || !out_size1 ||
-	    !out_first_hartid || !out_hart_count)
-		return SBI_EINVAL;
+	rc = fdt_get_node_addr_size_by_name(fdt, nodeoffset, "mtime",
+					    &reg_addr, &reg_size);
+	if (rc < 0 || !reg_size)
+		reg_addr = reg_size = 0;
+	*out_addr1 = reg_addr;
+	*out_size1 = reg_size;
+
+	rc = fdt_get_node_addr_size_by_name(fdt, nodeoffset, "mtimecmp",
+					    &reg_addr, &reg_size);
+	if (rc < 0 || !reg_size)
+		return SBI_ENODEV;
+	*out_addr2 = reg_addr;
+	*out_size2 = reg_size;
+
+	return 0;
+}
+
+static int fdt_get_aclint_addr_size(void *fdt, int nodeoffset,
+				    unsigned long *out_addr1,
+				    unsigned long *out_size1,
+				    unsigned long *out_addr2,
+				    unsigned long *out_size2)
+{
+	int rc;
+	uint64_t reg_addr, reg_size;
 
 	rc = fdt_get_node_addr_size(fdt, nodeoffset, 0,
 				    &reg_addr, &reg_size);
@@ -906,6 +951,36 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 	if (out_size2)
 		*out_size2 = reg_size;
 
+	return 0;
+}
+
+int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
+			  unsigned long *out_addr1, unsigned long *out_size1,
+			  unsigned long *out_addr2, unsigned long *out_size2,
+			  u32 *out_first_hartid, u32 *out_hart_count)
+{
+	const fdt32_t *val;
+	int i, rc, count, cpu_offset, cpu_intc_offset;
+	u32 phandle, hwirq, hartid, first_hartid, last_hartid, hart_count;
+	u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
+
+	if (nodeoffset < 0 || !fdt ||
+	    !out_addr1 || !out_size1 ||
+	    !out_first_hartid || !out_hart_count)
+		return SBI_EINVAL;
+
+	if (for_timer && out_addr2 && out_size2 &&
+	    fdt_getprop(fdt, nodeoffset, "reg-names", NULL))
+		rc = fdt_get_aclint_addr_size_by_name(fdt, nodeoffset,
+						      out_addr1, out_size1,
+						      out_addr2, out_size2);
+	else
+		rc = fdt_get_aclint_addr_size(fdt, nodeoffset,
+					      out_addr1, out_size1,
+					      out_addr2, out_size2);
+	if (rc)
+		return rc;
+
 	*out_first_hartid = 0;
 	*out_hart_count = 0;
 

From 35cba9265514ab73cc3f1777f8ee179f6aa71cd5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 8 Dec 2023 12:29:55 -0800
Subject: [PATCH 1450/1765] lib: sbi_tlb: Check tlb_range_flush_limit only once
 per request

The tlb_update() callback is called for each destination hart.
Move the size check earlier, so it is executed only once.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_tlb.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index dad95088b17..d3ed56dfe08 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -327,16 +327,6 @@ static int tlb_update(struct sbi_scratch *scratch,
 	struct sbi_tlb_info *tinfo = data;
 	u32 curr_hartid = current_hartid();
 
-	/*
-	 * If address range to flush is too big then simply
-	 * upgrade it to flush all because we can only flush
-	 * 4KB at a time.
-	 */
-	if (tinfo->size > tlb_range_flush_limit) {
-		tinfo->start = 0;
-		tinfo->size = SBI_TLB_FLUSH_ALL;
-	}
-
 	/*
 	 * If the request is to queue a tlb flush entry for itself
 	 * then just do a local flush and return;
@@ -385,6 +375,16 @@ int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 	if (!tinfo->local_fn)
 		return SBI_EINVAL;
 
+	/*
+	 * If address range to flush is too big then simply
+	 * upgrade it to flush all because we can only flush
+	 * 4KB at a time.
+	 */
+	if (tinfo->size > tlb_range_flush_limit) {
+		tinfo->start = 0;
+		tinfo->size = SBI_TLB_FLUSH_ALL;
+	}
+
 	tlb_pmu_incr_fw_ctr(tinfo);
 
 	return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);

From a894187e28895ab8e1196dea838fdef4cc4d32b3 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 18 Dec 2023 18:13:45 +0530
Subject: [PATCH 1451/1765] lib: sbi_ipi: Do not ignore errors from
 sbi_ipi_send()

Currently, failures in sbi_ipi_send() are silently ignored, which makes
them difficult to debug. Instead, abort sending the IPI and pass back
the error, but still synchronize any IPIs already sent.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ipi.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 5c33a78b2f3..56ba743c551 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -101,7 +101,7 @@ static int sbi_ipi_sync(struct sbi_scratch *scratch, u32 event)
  */
 int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
-	int rc;
+	int rc = 0;
 	bool retry_needed;
 	ulong i, m;
 	struct sbi_hartmask target_mask = {0};
@@ -135,17 +135,21 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 		retry_needed = false;
 		sbi_hartmask_for_each_hartindex(i, &target_mask) {
 			rc = sbi_ipi_send(scratch, i, event, data);
+			if (rc < 0)
+				goto done;
 			if (rc == SBI_IPI_UPDATE_RETRY)
 				retry_needed = true;
 			else
 				sbi_hartmask_clear_hartindex(i, &target_mask);
+			rc = 0;
 		}
 	} while (retry_needed);
 
+done:
 	/* Sync IPIs */
 	sbi_ipi_sync(scratch, event);
 
-	return 0;
+	return rc;
 }
 
 int sbi_ipi_event_create(const struct sbi_ipi_event_ops *ops)

From 446fa65eb57947481583df043bc613a164172131 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 8 Dec 2023 13:22:58 -0800
Subject: [PATCH 1452/1765] lib: sbi_ipi: Process self-IPIs in sbi_ipi_send()

An IPI sent to the local hart can be processed directly instead of
triggering the IPI device. This is more efficient, and it avoids a
deadlock when the .sync callback is defined. Since interrupts are
disabled while handling an ecall, the IPI would not get delivered
until the next mret, but sbi_ipi_sync() is called before then.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_ipi.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 56ba743c551..bbc97f7f463 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -60,6 +60,14 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 				      remote_hartindex, data);
 		if (ret != SBI_IPI_UPDATE_SUCCESS)
 			return ret;
+	} else if (scratch == remote_scratch) {
+		/*
+		 * IPI events with an update() callback are expected to return
+		 * SBI_IPI_UPDATE_BREAK for self-IPIs. For other events, check
+		 * for self-IPI and execute the callback directly here.
+		 */
+		ipi_ops->process(scratch);
+		return 0;
 	}
 
 	/*

From 27072504958c2eabddf1fa6ab7177bfe8035beba Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 8 Dec 2023 13:22:59 -0800
Subject: [PATCH 1453/1765] lib: sbi_ipi: Drop unnecessary ipi_process check

sbi_ipi_event_create() disallows registering an IPI event with a NULL
.process callback, so the function pointer will never be NULL here.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 lib/sbi/sbi_ipi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index bbc97f7f463..048aaa6687e 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -243,7 +243,7 @@ void sbi_ipi_process(void)
 	while (ipi_type) {
 		if (ipi_type & 1UL) {
 			ipi_ops = ipi_ops_array[ipi_event];
-			if (ipi_ops && ipi_ops->process)
+			if (ipi_ops)
 				ipi_ops->process(scratch);
 		}
 		ipi_type = ipi_type >> 1;

From 925ce146229b2b4f20506f213bff5954cd03fea7 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 11 Dec 2023 21:29:50 +0800
Subject: [PATCH 1454/1765] lib: sbi: Simplify the initialization of root_hmask
 in sbi_domain_init

The original code has multiple conversions between hartid and
hartindex. Can call sbi_hartmask_set_hartindex directly to
avoid conversion.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 88d25deb100..4e9f7428a52 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -815,8 +815,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 
 	/* Root domain possible and assigned HARTs */
 	for (i = 0; i < plat->hart_count; i++)
-		sbi_hartmask_set_hartid(sbi_hartindex_to_hartid(i),
-					root_hmask);
+		sbi_hartmask_set_hartindex(i, root_hmask);
 
 	/* Finally register the root domain */
 	rc = sbi_domain_register(&root, root_hmask);

From 2c8be566f3ecb829d36f50bc7ded1dc084f2fcc3 Mon Sep 17 00:00:00 2001
From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Date: Tue, 12 Dec 2023 08:58:32 +0000
Subject: [PATCH 1455/1765] lib: sbi: Improve the code of privilege mode and
 extensions detection

We can enhance the code by creating 2 unified interface with macro  for
privilege mode and extensions detection, which relies on supported
privilege modes and CSRs.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 88 ++++++++++++++++++++--------------------------
 1 file changed, 38 insertions(+), 50 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 6acff378bbf..2739005266e 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -807,6 +807,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	sbi_memset(hfeatures->extensions, 0, sizeof(hfeatures->extensions));
 	hfeatures->pmp_count = 0;
 	hfeatures->mhpm_mask = 0;
+	hfeatures->priv_version = SBI_HART_PRIV_VER_UNKNOWN;
 
 #define __check_hpm_csr(__csr, __mask) 					  \
 	oldval = csr_read_allowed(__csr, (ulong)&trap);			  \
@@ -899,67 +900,54 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 #undef __check_csr_2
 #undef __check_csr
 
-	/* Detect if hart supports Priv v1.10 */
-	val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
-	if (!trap.cause)
-		hfeatures->priv_version = SBI_HART_PRIV_VER_1_10;
 
-	/* Detect if hart supports Priv v1.11 */
-	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
-	if (!trap.cause &&
-	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_10))
-		hfeatures->priv_version = SBI_HART_PRIV_VER_1_11;
+#define __check_priv(__csr, __base_priv, __priv)			\
+	val = csr_read_allowed(__csr, (ulong)&trap);			\
+	if (!trap.cause && (hfeatures->priv_version >= __base_priv)) {	\
+		hfeatures->priv_version = __priv;			\
+	}
 
+	/* Detect if hart supports Priv v1.10 */
+	__check_priv(CSR_MCOUNTEREN,
+		     SBI_HART_PRIV_VER_UNKNOWN, SBI_HART_PRIV_VER_1_10);
+	/* Detect if hart supports Priv v1.11 */
+	__check_priv(CSR_MCOUNTINHIBIT,
+		     SBI_HART_PRIV_VER_1_10, SBI_HART_PRIV_VER_1_11);
 	/* Detect if hart supports Priv v1.12 */
-	csr_read_allowed(CSR_MENVCFG, (unsigned long)&trap);
-	if (!trap.cause &&
-	    (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11))
-		hfeatures->priv_version = SBI_HART_PRIV_VER_1_12;
+	__check_priv(CSR_MENVCFG,
+		     SBI_HART_PRIV_VER_1_11, SBI_HART_PRIV_VER_1_12);
 
-	/* Counter overflow/filtering is not useful without mcounter/inhibit */
-	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_11) {
-		/* Detect if hart supports sscofpmf */
-		csr_read_allowed(CSR_SCOUNTOVF, (unsigned long)&trap);
-		if (!trap.cause)
-			__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_SSCOFPMF, true);
+#undef __check_priv_csr
+
+#define __check_ext_csr(__base_priv, __csr, __ext)			\
+	if (hfeatures->priv_version >= __base_priv) {			\
+		csr_read_allowed(__csr, (ulong)&trap);			\
+		if (!trap.cause)					\
+			__sbi_hart_update_extension(hfeatures,		\
+						    __ext, true);	\
 	}
 
+	/* Counter overflow/filtering is not useful without mcounter/inhibit */
+	/* Detect if hart supports sscofpmf */
+	__check_ext_csr(SBI_HART_PRIV_VER_1_11,
+			CSR_SCOUNTOVF, SBI_HART_EXT_SSCOFPMF);
 	/* Detect if hart supports time CSR */
-	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
-	if (!trap.cause)
-		__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_ZICNTR, true);
-
+	__check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN,
+			CSR_TIME, SBI_HART_EXT_ZICNTR);
 	/* Detect if hart has AIA local interrupt CSRs */
-	csr_read_allowed(CSR_MTOPI, (unsigned long)&trap);
-	if (!trap.cause)
-		__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_SMAIA, true);
-
+	__check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN,
+			CSR_MTOPI, SBI_HART_EXT_SMAIA);
 	/* Detect if hart supports stimecmp CSR(Sstc extension) */
-	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
-		csr_read_allowed(CSR_STIMECMP, (unsigned long)&trap);
-		if (!trap.cause)
-			__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_SSTC, true);
-	}
-
+	__check_ext_csr(SBI_HART_PRIV_VER_1_12,
+			CSR_STIMECMP, SBI_HART_EXT_SSTC);
 	/* Detect if hart supports mstateen CSRs */
-	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
-		val = csr_read_allowed(CSR_MSTATEEN0, (unsigned long)&trap);
-		if (!trap.cause)
-			__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_SMSTATEEN, true);
-	}
-
+	__check_ext_csr(SBI_HART_PRIV_VER_1_12,
+			CSR_MSTATEEN0, SBI_HART_EXT_SMSTATEEN);
 	/* Detect if hart supports smcntrpmf */
-	if (hfeatures->priv_version >= SBI_HART_PRIV_VER_1_12) {
-		csr_read_allowed(CSR_MCYCLECFG, (unsigned long)&trap);
-		if (!trap.cause)
-			__sbi_hart_update_extension(hfeatures,
-					SBI_HART_EXT_SMCNTRPMF, true);
-	}
+	__check_ext_csr(SBI_HART_PRIV_VER_1_12,
+			CSR_MCYCLECFG, SBI_HART_EXT_SMCNTRPMF);
+
+#undef __check_ext_csr
 
 	/* Let platform populate extensions */
 	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr(),

From 056fe6f85dc6b68783f56cb6ea7394e857ab8cc3 Mon Sep 17 00:00:00 2001
From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Date: Tue, 12 Dec 2023 08:58:33 +0000
Subject: [PATCH 1456/1765] lib: sbi: Refactor the code for enable extensions
 in menvfg CSR

Use 1 variable to store the value of menvcfg.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h |  5 -----
 lib/sbi/sbi_hart.c           | 20 +++++++++-----------
 2 files changed, 9 insertions(+), 16 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 0996d649a68..f20df761d9b 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -207,13 +207,8 @@
 
 #define MHPMEVENT_SSCOF_MASK		_ULL(0xFFFF000000000000)
 
-#if __riscv_xlen > 32
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
-#else
-#define ENVCFGH_STCE			(_UL(1) << 31)
-#define ENVCFGH_PBMTE			(_UL(1) << 30)
-#endif
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
 #define ENVCFG_CBIE_SHIFT		4
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 2739005266e..bef4e6a376b 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -33,11 +33,11 @@ static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch)
 {
-	unsigned long menvcfg_val, mstatus_val = 0;
 	int cidx;
+	unsigned long mstatus_val = 0;
 	unsigned int mhpm_mask = sbi_hart_mhpm_mask(scratch);
 	uint64_t mhpmevent_init_val = 0;
-	uint64_t mstateen_val;
+	uint64_t menvcfg_val, mstateen_val;
 
 	/* Enable FPU */
 	if (misa_extension('D') || misa_extension('F'))
@@ -108,6 +108,9 @@ static void mstatus_init(struct sbi_scratch *scratch)
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
 		menvcfg_val = csr_read(CSR_MENVCFG);
+#if __riscv_xlen == 32
+		menvcfg_val |= ((uint64_t)csr_read(CSR_MENVCFGH)) << 32;
+#endif
 
 		/*
 		 * Set menvcfg.CBZE == 1
@@ -148,18 +151,13 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		 * Enable access to stimecmp if sstc extension is present in the
 		 * hardware.
 		 */
-		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSTC)) {
-#if __riscv_xlen == 32
-			unsigned long menvcfgh_val;
-			menvcfgh_val = csr_read(CSR_MENVCFGH);
-			menvcfgh_val |= ENVCFGH_STCE;
-			csr_write(CSR_MENVCFGH, menvcfgh_val);
-#else
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSTC))
 			menvcfg_val |= ENVCFG_STCE;
-#endif
-		}
 
 		csr_write(CSR_MENVCFG, menvcfg_val);
+#if __riscv_xlen == 32
+		csr_write(CSR_MENVCFGH, menvcfg_val >> 32);
+#endif
 
 		/* Enable S-mode access to seed CSR */
 		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_ZKR)) {

From 776770d2adbf3ae7d9d3b97f0756c7589003835f Mon Sep 17 00:00:00 2001
From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Date: Tue, 12 Dec 2023 08:58:34 +0000
Subject: [PATCH 1457/1765] lib: sbi: Using one array to define the name of
 extensions

Define an array sbi_hart_ext to map extension ID and name , and use it
for ISA parsing and printing out the supported extensions.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h     |  7 ++++
 lib/sbi/sbi_hart.c         | 68 +++++++++++---------------------------
 lib/utils/fdt/fdt_helper.c |  6 ++--
 3 files changed, 31 insertions(+), 50 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 0aefc2bebc0..77138232221 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -52,6 +52,13 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_MAX,
 };
 
+struct sbi_hart_ext_data {
+	const unsigned int id;
+	const char *name;
+};
+
+extern const struct sbi_hart_ext_data sbi_hart_ext[];
+
 /*
  * Smepmp enforces access boundaries between M-mode and
  * S/U-mode. When it is enabled, the PMPs are programmed
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index bef4e6a376b..80699fed36f 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -660,48 +660,24 @@ bool sbi_hart_has_extension(struct sbi_scratch *scratch,
 		return false;
 }
 
-static inline char *sbi_hart_extension_id2string(int ext)
-{
-	char *estr = NULL;
-
-	switch (ext) {
-	case SBI_HART_EXT_SMAIA:
-		estr = "smaia";
-		break;
-	case SBI_HART_EXT_SMSTATEEN:
-		estr = "smstateen";
-		break;
-	case SBI_HART_EXT_SSCOFPMF:
-		estr = "sscofpmf";
-		break;
-	case SBI_HART_EXT_SSTC:
-		estr = "sstc";
-		break;
-	case SBI_HART_EXT_ZICNTR:
-		estr = "zicntr";
-		break;
-	case SBI_HART_EXT_ZIHPM:
-		estr = "zihpm";
-		break;
-	case SBI_HART_EXT_ZKR:
-		estr = "zkr";
-		break;
-	case SBI_HART_EXT_SMEPMP:
-		estr = "smepmp";
-		break;
-	case SBI_HART_EXT_SMCNTRPMF:
-		estr = "smcntrpmf";
-		break;
-	case SBI_HART_EXT_XANDESPMU:
-		estr = "xandespmu";
-		break;
-	default:
-		break;
-	}
-
-	return estr;
+#define __SBI_HART_EXT_DATA(_name, _id) {	\
+	.name = #_name,				\
+	.id = _id,				\
 }
 
+const struct sbi_hart_ext_data sbi_hart_ext[] = {
+	__SBI_HART_EXT_DATA(smaia, SBI_HART_EXT_SMAIA),
+	__SBI_HART_EXT_DATA(smepmp, SBI_HART_EXT_SMEPMP),
+	__SBI_HART_EXT_DATA(smstateen, SBI_HART_EXT_SMSTATEEN),
+	__SBI_HART_EXT_DATA(sscofpmf, SBI_HART_EXT_SSCOFPMF),
+	__SBI_HART_EXT_DATA(sstc, SBI_HART_EXT_SSTC),
+	__SBI_HART_EXT_DATA(zicntr, SBI_HART_EXT_ZICNTR),
+	__SBI_HART_EXT_DATA(zihpm, SBI_HART_EXT_ZIHPM),
+	__SBI_HART_EXT_DATA(zkr, SBI_HART_EXT_ZKR),
+	__SBI_HART_EXT_DATA(smcntrpmf, SBI_HART_EXT_SMCNTRPMF),
+	__SBI_HART_EXT_DATA(xandespmu, SBI_HART_EXT_XANDESPMU),
+};
+
 /**
  * Get the hart extensions in string format
  *
@@ -717,20 +693,16 @@ void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
 	struct sbi_hart_features *hfeatures =
 			sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	int offset = 0, ext = 0;
-	char *temp;
 
 	if (!extensions_str || nestr <= 0)
 		return;
 	sbi_memset(extensions_str, 0, nestr);
 
 	for_each_set_bit(ext, hfeatures->extensions, SBI_HART_EXT_MAX) {
-		temp = sbi_hart_extension_id2string(ext);
-		if (temp) {
-			sbi_snprintf(extensions_str + offset,
-				     nestr - offset,
-				     "%s,", temp);
-			offset = offset + sbi_strlen(temp) + 1;
-		}
+		sbi_snprintf(extensions_str + offset,
+				 nestr - offset,
+				 "%s,", sbi_hart_ext[ext].name);
+		offset = offset + sbi_strlen(sbi_hart_ext[ext].name) + 1;
 	}
 
 	if (offset)
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 78c1f380793..4ed6bbc105e 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -401,8 +401,10 @@ static int fdt_parse_isa_one_hart(const char *isa, unsigned long *extensions)
 				continue;			\
 			}
 
-		set_multi_letter_ext("smepmp", SBI_HART_EXT_SMEPMP);
-		set_multi_letter_ext("zkr", SBI_HART_EXT_ZKR);
+		for (j = 0; j < SBI_HART_EXT_MAX; j++) {
+			set_multi_letter_ext(sbi_hart_ext[j].name,
+					     sbi_hart_ext[j].id);
+		}
 #undef set_multi_letter_ext
 	}
 

From 3daac8fb87a4d04fe8dfc0ff4a6ffb947107e1a9 Mon Sep 17 00:00:00 2001
From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Date: Tue, 12 Dec 2023 08:58:35 +0000
Subject: [PATCH 1458/1765] lib: sbi: Detect extensions from the ISA string in
 DT

Enable access to some extensions through menvcfg and show them in "Boot
HART ISA Extensions" if they are present in the device tree.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h |  6 ++++++
 lib/sbi/sbi_hart.c     | 49 +++++++++++++-----------------------------
 2 files changed, 21 insertions(+), 34 deletions(-)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 77138232221..47be251d31a 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -47,6 +47,12 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SMCNTRPMF,
 	/** Hart has Xandespmu extension */
 	SBI_HART_EXT_XANDESPMU,
+	/** Hart has Zicboz extension */
+	SBI_HART_EXT_ZICBOZ,
+	/** Hart has Zicbom extension */
+	SBI_HART_EXT_ZICBOM,
+	/** Hart has Svpbmt extension */
+	SBI_HART_EXT_SVPBMT,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 80699fed36f..46cd55d063c 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -112,47 +112,25 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		menvcfg_val |= ((uint64_t)csr_read(CSR_MENVCFGH)) << 32;
 #endif
 
-		/*
-		 * Set menvcfg.CBZE == 1
-		 *
-		 * If Zicboz extension is not available then writes to
-		 * menvcfg.CBZE will be ignored because it is a WARL field.
-		 */
-		menvcfg_val |= ENVCFG_CBZE;
-
-		/*
-		 * Set menvcfg.CBCFE == 1
-		 *
-		 * If Zicbom extension is not available then writes to
-		 * menvcfg.CBCFE will be ignored because it is a WARL field.
-		 */
-		menvcfg_val |= ENVCFG_CBCFE;
+#define __set_menvcfg_ext(__ext, __bits)				\
+		if (sbi_hart_has_extension(scratch, __ext))		\
+			menvcfg_val |= __bits;
 
 		/*
-		 * Set menvcfg.CBIE == 3
-		 *
-		 * If Zicbom extension is not available then writes to
-		 * menvcfg.CBIE will be ignored because it is a WARL field.
+		 * Enable access to extensions if they are present in the
+		 * hardware or in the device tree.
 		 */
-		menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
 
-		/*
-		 * Set menvcfg.PBMTE == 1 for RV64 or RV128
-		 *
-		 * If Svpbmt extension is not available then menvcfg.PBMTE
-		 * will be read-only zero.
-		 */
+		__set_menvcfg_ext(SBI_HART_EXT_ZICBOZ, ENVCFG_CBZE)
+		__set_menvcfg_ext(SBI_HART_EXT_ZICBOM, ENVCFG_CBCFE)
+		__set_menvcfg_ext(SBI_HART_EXT_ZICBOM,
+				  ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT)
 #if __riscv_xlen > 32
-		menvcfg_val |= ENVCFG_PBMTE;
+		__set_menvcfg_ext(SBI_HART_EXT_SVPBMT, ENVCFG_PBMTE)
 #endif
+		__set_menvcfg_ext(SBI_HART_EXT_SSTC, ENVCFG_STCE)
 
-		/*
-		 * The spec doesn't explicitly describe the reset value of menvcfg.
-		 * Enable access to stimecmp if sstc extension is present in the
-		 * hardware.
-		 */
-		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSTC))
-			menvcfg_val |= ENVCFG_STCE;
+#undef __set_menvcfg_ext
 
 		csr_write(CSR_MENVCFG, menvcfg_val);
 #if __riscv_xlen == 32
@@ -676,6 +654,9 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(zkr, SBI_HART_EXT_ZKR),
 	__SBI_HART_EXT_DATA(smcntrpmf, SBI_HART_EXT_SMCNTRPMF),
 	__SBI_HART_EXT_DATA(xandespmu, SBI_HART_EXT_XANDESPMU),
+	__SBI_HART_EXT_DATA(zicboz, SBI_HART_EXT_ZICBOZ),
+	__SBI_HART_EXT_DATA(zicbom, SBI_HART_EXT_ZICBOM),
+	__SBI_HART_EXT_DATA(svpbmt, SBI_HART_EXT_SVPBMT),
 };
 
 /**

From 416ceb3cd72db8d24373274316e2f5d5d3800bf3 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Dec 2023 13:26:49 +0530
Subject: [PATCH 1459/1765] lib: sbi_tlb: Reduce size of struct sbi_tlb_info

Let us reduce the size of struct sbi_tlb_info by doing the
following:
1) Change the data type of asid and vmid fields to uint16_t
2) Replace local_fn() function pointer with an enum

Based on the above, the size of struct sbi_tlb_info is reduced
by 16 bytes on RV64 and 4 bytes on RV32.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_tlb.h      | 29 ++++++++------
 lib/sbi/sbi_ecall_legacy.c |  8 ++--
 lib/sbi/sbi_ecall_rfence.c | 16 ++++----
 lib/sbi/sbi_tlb.c          | 81 ++++++++++++++++++++++++--------------
 4 files changed, 77 insertions(+), 57 deletions(-)

diff --git a/include/sbi/sbi_tlb.h b/include/sbi/sbi_tlb.h
index 55dcab0893c..2c50fe853e2 100644
--- a/include/sbi/sbi_tlb.h
+++ b/include/sbi/sbi_tlb.h
@@ -22,30 +22,33 @@
 
 struct sbi_scratch;
 
+enum sbi_tlb_type {
+	SBI_TLB_FENCE_I = 0,
+	SBI_TLB_SFENCE_VMA,
+	SBI_TLB_SFENCE_VMA_ASID,
+	SBI_TLB_HFENCE_GVMA_VMID,
+	SBI_TLB_HFENCE_GVMA,
+	SBI_TLB_HFENCE_VVMA_ASID,
+	SBI_TLB_HFENCE_VVMA,
+	SBI_TLB_TYPE_MAX,
+};
+
 struct sbi_tlb_info {
 	unsigned long start;
 	unsigned long size;
-	unsigned long asid;
-	unsigned long vmid;
-	void (*local_fn)(struct sbi_tlb_info *tinfo);
+	uint16_t asid;
+	uint16_t vmid;
+	enum sbi_tlb_type type;
 	struct sbi_hartmask smask;
 };
 
-void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo);
-void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo);
-
-#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __lfn, __src) \
+#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __type, __src) \
 do { \
 	(__p)->start = (__start); \
 	(__p)->size = (__size); \
 	(__p)->asid = (__asid); \
 	(__p)->vmid = (__vmid); \
-	(__p)->local_fn = (__lfn); \
+	(__p)->type = (__type); \
 	SBI_HARTMASK_INIT_EXCEPT(&(__p)->smask, (__src)); \
 } while (0)
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 99e862e0f19..556f629b8c2 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -80,8 +80,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
-					  sbi_tlb_local_fence_i,
-					  source_hart);
+					  SBI_TLB_FENCE_I, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
@@ -90,8 +89,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, out_trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
-					  sbi_tlb_local_sfence_vma,
-					  source_hart);
+					  SBI_TLB_SFENCE_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
 		break;
@@ -101,7 +99,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
-					  sbi_tlb_local_sfence_vma_asid,
+					  SBI_TLB_SFENCE_VMA_ASID,
 					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		}
diff --git a/lib/sbi/sbi_ecall_rfence.c b/lib/sbi/sbi_ecall_rfence.c
index 22c66522782..4b74d412540 100644
--- a/lib/sbi/sbi_ecall_rfence.c
+++ b/lib/sbi/sbi_ecall_rfence.c
@@ -33,43 +33,41 @@ static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
 	switch (funcid) {
 	case SBI_EXT_RFENCE_REMOTE_FENCE_I:
 		SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
-				  sbi_tlb_local_fence_i, source_hart);
+				  SBI_TLB_FENCE_I, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
-				  sbi_tlb_local_hfence_gvma, source_hart);
+				  SBI_TLB_HFENCE_GVMA, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, regs->a4,
-				  sbi_tlb_local_hfence_gvma_vmid,
-				  source_hart);
+				  SBI_TLB_HFENCE_GVMA_VMID, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, vmid,
-				  sbi_tlb_local_hfence_vvma, source_hart);
+				  SBI_TLB_HFENCE_VVMA, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
 		vmid = (csr_read(CSR_HGATP) & HGATP_VMID_MASK);
 		vmid = vmid >> HGATP_VMID_SHIFT;
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4,
-				  vmid, sbi_tlb_local_hfence_vvma_asid,
-				  source_hart);
+				  vmid, SBI_TLB_HFENCE_VVMA_ASID, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, 0, 0,
-				  sbi_tlb_local_sfence_vma, source_hart);
+				  SBI_TLB_SFENCE_VMA, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
 		SBI_TLB_INFO_INIT(&tlb_info, regs->a2, regs->a3, regs->a4, 0,
-				  sbi_tlb_local_sfence_vma_asid, source_hart);
+				  SBI_TLB_SFENCE_VMA_ASID, source_hart);
 		ret = sbi_tlb_request(regs->a0, regs->a1, &tlb_info);
 		break;
 	default:
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index d3ed56dfe08..cca319f9cbb 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -34,7 +34,7 @@ static void tlb_flush_all(void)
 	__asm__ __volatile("sfence.vma");
 }
 
-void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -59,7 +59,7 @@ void sbi_tlb_local_hfence_vvma(struct sbi_tlb_info *tinfo)
 	csr_write(CSR_HGATP, hgatp);
 }
 
-void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -77,7 +77,7 @@ void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -98,7 +98,7 @@ void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 	}
 }
 
-void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -124,7 +124,7 @@ void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
 	csr_write(CSR_HGATP, hgatp);
 }
 
-void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -143,7 +143,7 @@ void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
@@ -169,32 +169,43 @@ void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 	}
 }
 
-void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)
+static void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)
 {
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_RECVD);
 
 	__asm__ __volatile("fence.i");
 }
 
-static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
+static void tlb_entry_local_process(struct sbi_tlb_info *data)
 {
 	if (unlikely(!data))
 		return;
 
-	if (data->local_fn == sbi_tlb_local_fence_i)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_SENT);
-	else if (data->local_fn == sbi_tlb_local_sfence_vma)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_SENT);
-	else if (data->local_fn == sbi_tlb_local_sfence_vma_asid)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_SENT);
-	else if (data->local_fn == sbi_tlb_local_hfence_gvma)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_SENT);
-	else if (data->local_fn == sbi_tlb_local_hfence_gvma_vmid)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_SENT);
-	else if (data->local_fn == sbi_tlb_local_hfence_vvma)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_SENT);
-	else if (data->local_fn == sbi_tlb_local_hfence_vvma_asid)
-		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_SENT);
+	switch (data->type) {
+	case SBI_TLB_FENCE_I:
+		sbi_tlb_local_fence_i(data);
+		break;
+	case SBI_TLB_SFENCE_VMA:
+		sbi_tlb_local_sfence_vma(data);
+		break;
+	case SBI_TLB_SFENCE_VMA_ASID:
+		sbi_tlb_local_sfence_vma_asid(data);
+		break;
+	case SBI_TLB_HFENCE_GVMA_VMID:
+		sbi_tlb_local_hfence_gvma_vmid(data);
+		break;
+	case SBI_TLB_HFENCE_GVMA:
+		sbi_tlb_local_hfence_gvma(data);
+		break;
+	case SBI_TLB_HFENCE_VVMA_ASID:
+		sbi_tlb_local_hfence_vvma_asid(data);
+		break;
+	case SBI_TLB_HFENCE_VVMA:
+		sbi_tlb_local_hfence_vvma(data);
+		break;
+	default:
+		break;
+	};
 }
 
 static void tlb_entry_process(struct sbi_tlb_info *tinfo)
@@ -203,7 +214,7 @@ static void tlb_entry_process(struct sbi_tlb_info *tinfo)
 	struct sbi_scratch *rscratch = NULL;
 	atomic_t *rtlb_sync = NULL;
 
-	tinfo->local_fn(tinfo);
+	tlb_entry_local_process(tinfo);
 
 	sbi_hartmask_for_each_hartindex(rindex, &tinfo->smask) {
 		rscratch = sbi_hartindex_to_scratch(rindex);
@@ -305,12 +316,12 @@ static int tlb_update_cb(void *in, void *data)
 	curr = (struct sbi_tlb_info *)data;
 	next = (struct sbi_tlb_info *)in;
 
-	if (next->local_fn == sbi_tlb_local_sfence_vma_asid &&
-	    curr->local_fn == sbi_tlb_local_sfence_vma_asid) {
+	if (next->type == SBI_TLB_SFENCE_VMA_ASID &&
+	    curr->type == SBI_TLB_SFENCE_VMA_ASID) {
 		if (next->asid == curr->asid)
 			ret = tlb_range_check(curr, next);
-	} else if (next->local_fn == sbi_tlb_local_sfence_vma &&
-		   curr->local_fn == sbi_tlb_local_sfence_vma) {
+	} else if (next->type == SBI_TLB_SFENCE_VMA &&
+		   curr->type == SBI_TLB_SFENCE_VMA) {
 		ret = tlb_range_check(curr, next);
 	}
 
@@ -332,7 +343,7 @@ static int tlb_update(struct sbi_scratch *scratch,
 	 * then just do a local flush and return;
 	 */
 	if (sbi_hartindex_to_hartid(remote_hartindex) == curr_hartid) {
-		tinfo->local_fn(tinfo);
+		tlb_entry_local_process(tinfo);
 		return SBI_IPI_UPDATE_BREAK;
 	}
 
@@ -370,9 +381,19 @@ static struct sbi_ipi_event_ops tlb_ops = {
 
 static u32 tlb_event = SBI_IPI_EVENT_MAX;
 
+static const u32 tlb_type_to_pmu_fw_event[SBI_TLB_TYPE_MAX] = {
+	[SBI_TLB_FENCE_I] = SBI_PMU_FW_FENCE_I_SENT,
+	[SBI_TLB_SFENCE_VMA] = SBI_PMU_FW_SFENCE_VMA_SENT,
+	[SBI_TLB_SFENCE_VMA_ASID] = SBI_PMU_FW_SFENCE_VMA_ASID_SENT,
+	[SBI_TLB_HFENCE_GVMA_VMID] = SBI_PMU_FW_HFENCE_GVMA_VMID_SENT,
+	[SBI_TLB_HFENCE_GVMA] = SBI_PMU_FW_HFENCE_GVMA_SENT,
+	[SBI_TLB_HFENCE_VVMA_ASID] = SBI_PMU_FW_HFENCE_VVMA_ASID_SENT,
+	[SBI_TLB_HFENCE_VVMA] = SBI_PMU_FW_HFENCE_VVMA_SENT,
+};
+
 int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 {
-	if (!tinfo->local_fn)
+	if (tinfo->type < 0 || tinfo->type >= SBI_TLB_TYPE_MAX)
 		return SBI_EINVAL;
 
 	/*
@@ -385,7 +406,7 @@ int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo)
 		tinfo->size = SBI_TLB_FLUSH_ALL;
 	}
 
-	tlb_pmu_incr_fw_ctr(tinfo);
+	sbi_pmu_ctr_incr_fw(tlb_type_to_pmu_fw_event[tinfo->type]);
 
 	return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);
 }

From 80169b25f8a9a7cb8becceff9a414900919527c6 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Dec 2023 13:33:58 +0530
Subject: [PATCH 1460/1765] platform: generic: Fine tune
 fw_platform_calculate_heap_size()

Let's use SBI_TLB_INFO_SIZE instead of hard-coded 0x40 in
fw_platform_calculate_heap_size() to fine tune the heap size
required for per-hart TLB fifos.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 platform/generic/platform.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 08ae92ae4de..85072275157 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -16,6 +16,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_system.h>
+#include <sbi/sbi_tlb.h>
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -63,7 +64,7 @@ static u32 fw_platform_calculate_heap_size(u32 hart_count)
 	heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(hart_count);
 
 	/* For TLB fifo */
-	heap_size += 0x40 * (hart_count) * (hart_count);
+	heap_size += SBI_TLB_INFO_SIZE * (hart_count) * (hart_count);
 
 	return BIT_ALIGN(heap_size, HEAP_BASE_ALIGN);
 }

From cdebae2cc9539e2e0553b9c68eab22997c734cbb Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Dec 2023 14:07:56 +0530
Subject: [PATCH 1461/1765] lib: utils/irqchip: Add shared MMIO region for PLIC
 in root domain

On platforms with Smepmp, the MMIO regions accessed by M-mode need
to be explicitly marked with M-mode only read/write or shared (both
(M-mode and S-mode) read/write permission.

If the above is not done then runtime PLIC access from M-mode on
platforms with Smepmp will result in access fault when further
results in CPU hotplug not working.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/irqchip/plic.h   | 1 +
 lib/utils/fdt/fdt_helper.c         | 1 +
 lib/utils/irqchip/plic.c           | 6 +++++-
 platform/fpga/ariane/platform.c    | 3 +++
 platform/fpga/openpiton/platform.c | 3 +++
 platform/kendryte/k210/platform.c  | 1 +
 platform/kendryte/k210/platform.h  | 1 +
 platform/nuclei/ux600/platform.c   | 3 +++
 platform/template/platform.c       | 3 +++
 9 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 112a714fd37..2eda6310df8 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -14,6 +14,7 @@
 
 struct plic_data {
 	unsigned long addr;
+	unsigned long size;
 	unsigned long num_src;
 };
 
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 4ed6bbc105e..e50f4d849f6 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -880,6 +880,7 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 	if (rc < 0 || !reg_addr || !reg_size)
 		return SBI_ENODEV;
 	plic->addr = reg_addr;
+	plic->size = reg_size;
 
 	val = fdt_getprop(fdt, nodeoffset, "riscv,ndev", &len);
 	if (len > 0)
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index d63351484a3..193e3201dbc 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -10,7 +10,9 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
+#include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/irqchip/plic.h>
@@ -171,5 +173,7 @@ int plic_cold_irqchip_init(const struct plic_data *plic)
 	for (i = 1; i <= plic->num_src; i++)
 		plic_set_priority(plic, i, 0);
 
-	return 0;
+	return sbi_domain_root_add_memrange(plic->addr, plic->size, BIT(20),
+					(SBI_DOMAIN_MEMREGION_MMIO |
+					 SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
 }
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 975528f1372..8be5e6ca385 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -25,6 +25,8 @@
 #define ARIANE_UART_REG_WIDTH			4
 #define ARIANE_UART_REG_OFFSET			0
 #define ARIANE_PLIC_ADDR			0xc000000
+#define ARIANE_PLIC_SIZE			(0x200000 + \
+						 (ARIANE_HART_COUNT * 0x1000))
 #define ARIANE_PLIC_NUM_SOURCES			3
 #define ARIANE_HART_COUNT			1
 #define ARIANE_CLINT_ADDR			0x2000000
@@ -36,6 +38,7 @@
 
 static struct plic_data plic = {
 	.addr = ARIANE_PLIC_ADDR,
+	.size = ARIANE_PLIC_SIZE,
 	.num_src = ARIANE_PLIC_NUM_SOURCES,
 };
 
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index e59dc992fe3..2317a899e8d 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -24,6 +24,8 @@
 #define OPENPITON_DEFAULT_UART_REG_WIDTH	1
 #define OPENPITON_DEFAULT_UART_REG_OFFSET	0
 #define OPENPITON_DEFAULT_PLIC_ADDR		0xfff1100000
+#define OPENPITON_DEFAULT_PLIC_SIZE		(0x200000 + \
+				(OPENPITON_DEFAULT_HART_COUNT * 0x1000))
 #define OPENPITON_DEFAULT_PLIC_NUM_SOURCES	2
 #define OPENPITON_DEFAULT_HART_COUNT		3
 #define OPENPITON_DEFAULT_CLINT_ADDR		0xfff1020000
@@ -40,6 +42,7 @@ static struct platform_uart_data uart = {
 };
 static struct plic_data plic = {
 	.addr = OPENPITON_DEFAULT_PLIC_ADDR,
+	.size = OPENPITON_DEFAULT_PLIC_SIZE,
 	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
 };
 
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 637a217fcd7..27b23f7326d 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -32,6 +32,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 
 static struct plic_data plic = {
 	.addr = K210_PLIC_BASE_ADDR,
+	.size = K210_PLIC_BASE_SIZE,
 	.num_src = K210_PLIC_NUM_SOURCES,
 };
 
diff --git a/platform/kendryte/k210/platform.h b/platform/kendryte/k210/platform.h
index be52aa30a53..9417403d246 100644
--- a/platform/kendryte/k210/platform.h
+++ b/platform/kendryte/k210/platform.h
@@ -27,6 +27,7 @@
 #define K210_ACLINT_MTIMER_ADDR \
 		(K210_CLINT_BASE_ADDR + CLINT_MTIMER_OFFSET)
 #define K210_PLIC_BASE_ADDR	0x0C000000ULL
+#define K210_PLIC_BASE_SIZE	(0x200000ULL + (K210_HART_COUNT * 0x1000))
 
 /* Registers */
 #define K210_PLL0		0x08
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 6fd6cd7082f..f688b50a68d 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -39,6 +39,8 @@
 					 CLINT_MTIMER_OFFSET)
 
 #define UX600_PLIC_ADDR			0x8000000
+#define UX600_PLIC_SIZE			(0x200000 + \
+					 (UX600_HART_COUNT * 0x1000))
 #define UX600_PLIC_NUM_SOURCES		0x35
 #define UX600_PLIC_NUM_PRIORITIES	7
 
@@ -63,6 +65,7 @@ static u32 ux600_clk_freq = 8000000;
 
 static struct plic_data plic = {
 	.addr = UX600_PLIC_ADDR,
+	.size = UX600_PLIC_SIZE,
 	.num_src = UX600_PLIC_NUM_SOURCES,
 };
 
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 86381ca2b70..4b3f2acff97 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -19,6 +19,8 @@
 #include <sbi_utils/timer/aclint_mtimer.h>
 
 #define PLATFORM_PLIC_ADDR		0xc000000
+#define PLATFORM_PLIC_SIZE		(0x200000 + \
+					 (PLATFORM_HART_COUNT * 0x1000))
 #define PLATFORM_PLIC_NUM_SOURCES	128
 #define PLATFORM_HART_COUNT		4
 #define PLATFORM_CLINT_ADDR		0x2000000
@@ -33,6 +35,7 @@
 
 static struct plic_data plic = {
 	.addr = PLATFORM_PLIC_ADDR,
+	.size = PLATFORM_PLIC_SIZE,
 	.num_src = PLATFORM_PLIC_NUM_SOURCES,
 };
 

From 3284bea83368de2ced244d5b2b0eaeaae812a08d Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Dec 2023 20:59:14 +0530
Subject: [PATCH 1462/1765] lib: sbi: Allow ecall handlers to directly update
 register state

Some of the upcoming SBI extensions (such as SSE) will directly
update register state so improve the prototype of ecall handler
to accommodate this. Further, this flexibility allows us to
push the trap redirection from sbi_ecall_handler() to the
sbi_ecall_legacy_handler().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_ecall.h                      | 12 +++++--
 include/sbi/sbi_platform.h                   | 19 ++++------
 lib/sbi/sbi_ecall.c                          | 13 +++----
 lib/sbi/sbi_ecall_base.c                     | 27 +++++++-------
 lib/sbi/sbi_ecall_cppc.c                     | 13 ++++---
 lib/sbi/sbi_ecall_dbcn.c                     |  9 +++--
 lib/sbi/sbi_ecall_hsm.c                      |  7 ++--
 lib/sbi/sbi_ecall_ipi.c                      |  5 ++-
 lib/sbi/sbi_ecall_legacy.c                   | 37 +++++++++++++++-----
 lib/sbi/sbi_ecall_pmu.c                      | 17 +++++----
 lib/sbi/sbi_ecall_rfence.c                   |  5 ++-
 lib/sbi/sbi_ecall_srst.c                     |  5 ++-
 lib/sbi/sbi_ecall_susp.c                     |  7 ++--
 lib/sbi/sbi_ecall_time.c                     |  5 ++-
 lib/sbi/sbi_ecall_vendor.c                   |  8 ++---
 platform/generic/andes/andes_sbi.c           |  7 ++--
 platform/generic/include/andes/andes_sbi.h   |  6 ++--
 platform/generic/include/platform_override.h |  6 ++--
 platform/generic/platform.c                  |  8 ++---
 19 files changed, 109 insertions(+), 107 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 027213cbb3a..0bf42d16e27 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -20,6 +20,13 @@
 struct sbi_trap_regs;
 struct sbi_trap_info;
 
+struct sbi_ecall_return {
+	/* Return flag to skip register update */
+	bool skip_regs_update;
+	/* Return value */
+	unsigned long value;
+};
+
 struct sbi_ecall_extension {
 	/* head is used by the extension list */
 	struct sbi_dlist head;
@@ -62,9 +69,8 @@ struct sbi_ecall_extension {
 	 * never invoked with an invalid or unavailable extension ID.
 	 */
 	int (* handle)(unsigned long extid, unsigned long funcid,
-		       const struct sbi_trap_regs *regs,
-		       unsigned long *out_val,
-		       struct sbi_trap_info *out_trap);
+		       struct sbi_trap_regs *regs,
+		       struct sbi_ecall_return *out);
 };
 
 u16 sbi_ecall_version_major(void);
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 58b9069d903..2fb33e16e4e 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -50,7 +50,7 @@
 #include <sbi/sbi_version.h>
 
 struct sbi_domain_memregion;
-struct sbi_trap_info;
+struct sbi_ecall_return;
 struct sbi_trap_regs;
 struct sbi_hart_features;
 
@@ -137,9 +137,8 @@ struct sbi_platform_operations {
 	bool (*vendor_ext_check)(void);
 	/** platform specific SBI extension implementation provider */
 	int (*vendor_ext_provider)(long funcid,
-				   const struct sbi_trap_regs *regs,
-				   unsigned long *out_value,
-				   struct sbi_trap_info *out_trap);
+				   struct sbi_trap_regs *regs,
+				   struct sbi_ecall_return *out);
 };
 
 /** Platform default per-HART stack size for exception/interrupt handling */
@@ -666,16 +665,12 @@ static inline bool sbi_platform_vendor_ext_check(
 static inline int sbi_platform_vendor_ext_provider(
 					const struct sbi_platform *plat,
 					long funcid,
-					const struct sbi_trap_regs *regs,
-					unsigned long *out_value,
-					struct sbi_trap_info *out_trap)
+					struct sbi_trap_regs *regs,
+					struct sbi_ecall_return *out)
 {
-	if (plat && sbi_platform_ops(plat)->vendor_ext_provider) {
+	if (plat && sbi_platform_ops(plat)->vendor_ext_provider)
 		return sbi_platform_ops(plat)->vendor_ext_provider(funcid,
-								regs,
-								out_value,
-								out_trap);
-	}
+								regs, out);
 
 	return SBI_ENOTSUPP;
 }
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 3eb4f0addb0..631c5dd168d 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -101,14 +101,12 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 	struct sbi_ecall_extension *ext;
 	unsigned long extension_id = regs->a7;
 	unsigned long func_id = regs->a6;
-	struct sbi_trap_info trap = {0};
-	unsigned long out_val = 0;
+	struct sbi_ecall_return out = {0};
 	bool is_0_1_spec = 0;
 
 	ext = sbi_ecall_find_extension(extension_id);
 	if (ext && ext->handle) {
-		ret = ext->handle(extension_id, func_id,
-				  regs, &out_val, &trap);
+		ret = ext->handle(extension_id, func_id, regs, &out);
 		if (extension_id >= SBI_EXT_0_1_SET_TIMER &&
 		    extension_id <= SBI_EXT_0_1_SHUTDOWN)
 			is_0_1_spec = 1;
@@ -116,10 +114,7 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 		ret = SBI_ENOTSUPP;
 	}
 
-	if (ret == SBI_ETRAP) {
-		trap.epc = regs->mepc;
-		sbi_trap_redirect(regs, &trap);
-	} else {
+	if (!out.skip_regs_update) {
 		if (ret < SBI_LAST_ERR ||
 		    (extension_id != SBI_EXT_0_1_CONSOLE_GETCHAR &&
 		     SBI_SUCCESS < ret)) {
@@ -140,7 +135,7 @@ int sbi_ecall_handler(struct sbi_trap_regs *regs)
 		regs->mepc += 4;
 		regs->a0 = ret;
 		if (!is_0_1_spec)
-			regs->a1 = out_val;
+			regs->a1 = out.value;
 	}
 
 	return 0;
diff --git a/lib/sbi/sbi_ecall_base.c b/lib/sbi/sbi_ecall_base.c
index 74f05eb26a3..b7178ea8acc 100644
--- a/lib/sbi/sbi_ecall_base.c
+++ b/lib/sbi/sbi_ecall_base.c
@@ -33,37 +33,36 @@ static int sbi_ecall_base_probe(unsigned long extid, unsigned long *out_val)
 }
 
 static int sbi_ecall_base_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	int ret = 0;
 
 	switch (funcid) {
 	case SBI_EXT_BASE_GET_SPEC_VERSION:
-		*out_val = (SBI_ECALL_VERSION_MAJOR <<
-			   SBI_SPEC_VERSION_MAJOR_OFFSET) &
-			   (SBI_SPEC_VERSION_MAJOR_MASK <<
-			    SBI_SPEC_VERSION_MAJOR_OFFSET);
-		*out_val = *out_val | SBI_ECALL_VERSION_MINOR;
+		out->value = (SBI_ECALL_VERSION_MAJOR <<
+			      SBI_SPEC_VERSION_MAJOR_OFFSET) &
+			     (SBI_SPEC_VERSION_MAJOR_MASK <<
+			      SBI_SPEC_VERSION_MAJOR_OFFSET);
+		out->value = out->value | SBI_ECALL_VERSION_MINOR;
 		break;
 	case SBI_EXT_BASE_GET_IMP_ID:
-		*out_val = sbi_ecall_get_impid();
+		out->value = sbi_ecall_get_impid();
 		break;
 	case SBI_EXT_BASE_GET_IMP_VERSION:
-		*out_val = OPENSBI_VERSION;
+		out->value = OPENSBI_VERSION;
 		break;
 	case SBI_EXT_BASE_GET_MVENDORID:
-		*out_val = csr_read(CSR_MVENDORID);
+		out->value = csr_read(CSR_MVENDORID);
 		break;
 	case SBI_EXT_BASE_GET_MARCHID:
-		*out_val = csr_read(CSR_MARCHID);
+		out->value = csr_read(CSR_MARCHID);
 		break;
 	case SBI_EXT_BASE_GET_MIMPID:
-		*out_val = csr_read(CSR_MIMPID);
+		out->value = csr_read(CSR_MIMPID);
 		break;
 	case SBI_EXT_BASE_PROBE_EXT:
-		ret = sbi_ecall_base_probe(regs->a0, out_val);
+		ret = sbi_ecall_base_probe(regs->a0, &out->value);
 		break;
 	default:
 		ret = SBI_ENOTSUPP;
diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index b54d54ec684..c26bb401796 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -12,9 +12,8 @@
 #include <sbi/sbi_cppc.h>
 
 static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	int ret = 0;
 	uint64_t temp;
@@ -22,14 +21,14 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
 	switch (funcid) {
 	case SBI_EXT_CPPC_READ:
 		ret = sbi_cppc_read(regs->a0, &temp);
-		*out_val = temp;
+		out->value = temp;
 		break;
 	case SBI_EXT_CPPC_READ_HI:
 #if __riscv_xlen == 32
 		ret = sbi_cppc_read(regs->a0, &temp);
-		*out_val = temp >> 32;
+		out->value = temp >> 32;
 #else
-		*out_val = 0;
+		out->value = 0;
 #endif
 		break;
 	case SBI_EXT_CPPC_WRITE:
@@ -38,7 +37,7 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_CPPC_PROBE:
 		ret = sbi_cppc_probe(regs->a0);
 		if (ret >= 0) {
-			*out_val = ret;
+			out->value = ret;
 			ret = 0;
 		}
 		break;
diff --git a/lib/sbi/sbi_ecall_dbcn.c b/lib/sbi/sbi_ecall_dbcn.c
index 18cd6c8b5cc..49a7713f48b 100644
--- a/lib/sbi/sbi_ecall_dbcn.c
+++ b/lib/sbi/sbi_ecall_dbcn.c
@@ -17,9 +17,8 @@
 #include <sbi/sbi_hart.h>
 
 static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	ulong smode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >>
 			MSTATUS_MPP_SHIFT;
@@ -49,9 +48,9 @@ static int sbi_ecall_dbcn_handler(unsigned long extid, unsigned long funcid,
 			return SBI_ERR_INVALID_PARAM;
 		sbi_hart_map_saddr(regs->a1, regs->a0);
 		if (funcid == SBI_EXT_DBCN_CONSOLE_WRITE)
-			*out_val = sbi_nputs((const char *)regs->a1, regs->a0);
+			out->value = sbi_nputs((const char *)regs->a1, regs->a0);
 		else
-			*out_val = sbi_ngets((char *)regs->a1, regs->a0);
+			out->value = sbi_ngets((char *)regs->a1, regs->a0);
 		sbi_hart_unmap_saddr();
 		return 0;
 	case SBI_EXT_DBCN_CONSOLE_WRITE_BYTE:
diff --git a/lib/sbi/sbi_ecall_hsm.c b/lib/sbi/sbi_ecall_hsm.c
index 20705c39513..93170b09780 100644
--- a/lib/sbi/sbi_ecall_hsm.c
+++ b/lib/sbi/sbi_ecall_hsm.c
@@ -17,9 +17,8 @@
 #include <sbi/riscv_asm.h>
 
 static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
-				 const struct sbi_trap_regs *regs,
-				 unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
+				 struct sbi_trap_regs *regs,
+				 struct sbi_ecall_return *out)
 {
 	int ret = 0;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -47,7 +46,7 @@ static int sbi_ecall_hsm_handler(unsigned long extid, unsigned long funcid,
 	}
 
 	if (ret >= 0) {
-		*out_val = ret;
+		out->value = ret;
 		ret = 0;
 	}
 
diff --git a/lib/sbi/sbi_ecall_ipi.c b/lib/sbi/sbi_ecall_ipi.c
index a40d6b8cc8a..50ef41dcf04 100644
--- a/lib/sbi/sbi_ecall_ipi.c
+++ b/lib/sbi/sbi_ecall_ipi.c
@@ -15,9 +15,8 @@
 #include <sbi/sbi_ipi.h>
 
 static int sbi_ecall_ipi_handler(unsigned long extid, unsigned long funcid,
-				 const struct sbi_trap_regs *regs,
-				 unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
+				 struct sbi_trap_regs *regs,
+				 struct sbi_ecall_return *out)
 {
 	int ret = 0;
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 556f629b8c2..48bd2274d75 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -43,13 +43,13 @@ static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 }
 
 static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
-				    const struct sbi_trap_regs *regs,
-				    unsigned long *out_val,
-				    struct sbi_trap_info *out_trap)
+				    struct sbi_trap_regs *regs,
+				    struct sbi_ecall_return *out)
 {
 	int ret = 0;
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
+	struct sbi_trap_info trap = {0};
 	ulong hmask = 0;
 
 	switch (extid) {
@@ -71,37 +71,58 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
 		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, out_trap);
-		if (ret != SBI_ETRAP)
+						&hmask, &trap);
+		if (ret != SBI_ETRAP) {
 			ret = sbi_ipi_send_smode(hmask, 0);
+		} else {
+			ret = 0;
+			trap.epc = regs->mepc;
+			sbi_trap_redirect(regs, &trap);
+			out->skip_regs_update = true;
+		}
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, out_trap);
+						&hmask, &trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 					  SBI_TLB_FENCE_I, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+		} else {
+			ret = 0;
+			trap.epc = regs->mepc;
+			sbi_trap_redirect(regs, &trap);
+			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, out_trap);
+						&hmask, &trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
 					  SBI_TLB_SFENCE_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+		} else {
+			ret = 0;
+			trap.epc = regs->mepc;
+			sbi_trap_redirect(regs, &trap);
+			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, out_trap);
+						&hmask, &trap);
 		if (ret != SBI_ETRAP) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
 					  SBI_TLB_SFENCE_VMA_ASID,
 					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+		} else {
+			ret = 0;
+			trap.epc = regs->mepc;
+			sbi_trap_redirect(regs, &trap);
+			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_SHUTDOWN:
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index c58591106d0..40a63a626f6 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -18,9 +18,8 @@
 #include <sbi/riscv_asm.h>
 
 static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
-				 const struct sbi_trap_regs *regs,
-				 unsigned long *out_val,
-				 struct sbi_trap_info *out_trap)
+				 struct sbi_trap_regs *regs,
+				 struct sbi_ecall_return *out)
 {
 	int ret = 0;
 	uint64_t temp;
@@ -29,12 +28,12 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_PMU_NUM_COUNTERS:
 		ret = sbi_pmu_num_ctr();
 		if (ret >= 0) {
-			*out_val = ret;
+			out->value = ret;
 			ret = 0;
 		}
 		break;
 	case SBI_EXT_PMU_COUNTER_GET_INFO:
-		ret = sbi_pmu_ctr_get_info(regs->a0, out_val);
+		ret = sbi_pmu_ctr_get_info(regs->a0, &out->value);
 		break;
 	case SBI_EXT_PMU_COUNTER_CFG_MATCH:
 #if __riscv_xlen == 32
@@ -45,21 +44,21 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_pmu_ctr_cfg_match(regs->a0, regs->a1, regs->a2,
 					    regs->a3, temp);
 		if (ret >= 0) {
-			*out_val = ret;
+			out->value = ret;
 			ret = 0;
 		}
 
 		break;
 	case SBI_EXT_PMU_COUNTER_FW_READ:
 		ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
-		*out_val = temp;
+		out->value = temp;
 		break;
 	case SBI_EXT_PMU_COUNTER_FW_READ_HI:
 #if __riscv_xlen == 32
 		ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
-		*out_val = temp >> 32;
+		out->value = temp >> 32;
 #else
-		*out_val = 0;
+		out->value = 0;
 #endif
 		break;
 	case SBI_EXT_PMU_COUNTER_START:
diff --git a/lib/sbi/sbi_ecall_rfence.c b/lib/sbi/sbi_ecall_rfence.c
index 4b74d412540..ded16c26efb 100644
--- a/lib/sbi/sbi_ecall_rfence.c
+++ b/lib/sbi/sbi_ecall_rfence.c
@@ -16,9 +16,8 @@
 #include <sbi/sbi_tlb.h>
 
 static int sbi_ecall_rfence_handler(unsigned long extid, unsigned long funcid,
-				    const struct sbi_trap_regs *regs,
-				    unsigned long *out_val,
-				    struct sbi_trap_info *out_trap)
+				    struct sbi_trap_regs *regs,
+				    struct sbi_ecall_return *out)
 {
 	int ret = 0;
 	unsigned long vmid;
diff --git a/lib/sbi/sbi_ecall_srst.c b/lib/sbi/sbi_ecall_srst.c
index dcd560d22f9..46cfaca49b4 100644
--- a/lib/sbi/sbi_ecall_srst.c
+++ b/lib/sbi/sbi_ecall_srst.c
@@ -15,9 +15,8 @@
 #include <sbi/sbi_system.h>
 
 static int sbi_ecall_srst_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	if (funcid == SBI_EXT_SRST_RESET) {
 		if ((((u32)-1U) <= ((u64)regs->a0)) ||
diff --git a/lib/sbi/sbi_ecall_susp.c b/lib/sbi/sbi_ecall_susp.c
index 2bfd99ae872..7b66bfcd8da 100644
--- a/lib/sbi/sbi_ecall_susp.c
+++ b/lib/sbi/sbi_ecall_susp.c
@@ -6,9 +6,8 @@
 #include <sbi/sbi_system.h>
 
 static int sbi_ecall_susp_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	int ret = SBI_ENOTSUPP;
 
@@ -16,7 +15,7 @@ static int sbi_ecall_susp_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_system_suspend(regs->a0, regs->a1, regs->a2);
 
 	if (ret >= 0) {
-		*out_val = ret;
+		out->value = ret;
 		ret = 0;
 	}
 
diff --git a/lib/sbi/sbi_ecall_time.c b/lib/sbi/sbi_ecall_time.c
index e79196f77ad..5a2316eb3c6 100644
--- a/lib/sbi/sbi_ecall_time.c
+++ b/lib/sbi/sbi_ecall_time.c
@@ -15,9 +15,8 @@
 #include <sbi/sbi_timer.h>
 
 static int sbi_ecall_time_handler(unsigned long extid, unsigned long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_val,
-				  struct sbi_trap_info *out_trap)
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
 {
 	int ret = 0;
 
diff --git a/lib/sbi/sbi_ecall_vendor.c b/lib/sbi/sbi_ecall_vendor.c
index 700f475f0a8..ebebc586129 100644
--- a/lib/sbi/sbi_ecall_vendor.c
+++ b/lib/sbi/sbi_ecall_vendor.c
@@ -23,13 +23,11 @@ static inline unsigned long sbi_ecall_vendor_id(void)
 }
 
 static int sbi_ecall_vendor_handler(unsigned long extid, unsigned long funcid,
-				    const struct sbi_trap_regs *regs,
-				    unsigned long *out_val,
-				    struct sbi_trap_info *out_trap)
+				    struct sbi_trap_regs *regs,
+				    struct sbi_ecall_return *out)
 {
 	return sbi_platform_vendor_ext_provider(sbi_platform_thishart_ptr(),
-						funcid, regs,
-						out_val, out_trap);
+						funcid, regs, out);
 }
 
 struct sbi_ecall_extension ecall_vendor;
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
index 3e89fb9c696..267c663899d 100644
--- a/platform/generic/andes/andes_sbi.c
+++ b/platform/generic/andes/andes_sbi.c
@@ -33,14 +33,13 @@ static bool andes45_apply_iocp_sw_workaround(void)
 }
 
 int andes_sbi_vendor_ext_provider(long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_value,
-				  struct sbi_trap_info *out_trap,
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out,
 				  const struct fdt_match *match)
 {
 	switch (funcid) {
 	case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
-		*out_value = andes45_apply_iocp_sw_workaround();
+		out->value = andes45_apply_iocp_sw_workaround();
 		break;
 
 	default:
diff --git a/platform/generic/include/andes/andes_sbi.h b/platform/generic/include/andes/andes_sbi.h
index e5dc250707b..1288af81dd6 100644
--- a/platform/generic/include/andes/andes_sbi.h
+++ b/platform/generic/include/andes/andes_sbi.h
@@ -3,13 +3,13 @@
 #ifndef _RISCV_ANDES_SBI_H
 #define _RISCV_ANDES_SBI_H
 
+#include <sbi/sbi_ecall.h>
 #include <sbi/sbi_trap.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
 int andes_sbi_vendor_ext_provider(long funcid,
-				  const struct sbi_trap_regs *regs,
-				  unsigned long *out_value,
-				  struct sbi_trap_info *out_trap,
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out,
 				  const struct fdt_match *match);
 
 #endif /* _RISCV_ANDES_SBI_H */
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index f2a4327ec27..b0585c2101c 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -10,6 +10,7 @@
 #ifndef __PLATFORM_OVERRIDE_H__
 #define __PLATFORM_OVERRIDE_H__
 
+#include <sbi/sbi_ecall.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_trap.h>
@@ -30,9 +31,8 @@ struct platform_override {
 	int (*pmu_init)(const struct fdt_match *match);
 	void (*fw_init)(void *fdt, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long funcid,
-				   const struct sbi_trap_regs *regs,
-				   unsigned long *out_value,
-				   struct sbi_trap_info *out_trap,
+				   struct sbi_trap_regs *regs,
+				   struct sbi_ecall_return *out,
 				   const struct fdt_match *match);
 };
 
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 85072275157..bfd7d318fe6 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -203,12 +203,10 @@ static bool generic_vendor_ext_check(void)
 }
 
 static int generic_vendor_ext_provider(long funcid,
-				       const struct sbi_trap_regs *regs,
-				       unsigned long *out_value,
-				       struct sbi_trap_info *out_trap)
+				       struct sbi_trap_regs *regs,
+				       struct sbi_ecall_return *out)
 {
-	return generic_plat->vendor_ext_provider(funcid, regs,
-						 out_value, out_trap,
+	return generic_plat->vendor_ext_provider(funcid, regs, out,
 						 generic_plat_match);
 }
 

From 5a57e8cd41f3c8754a5f0e511a63072724c1f0b7 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Dec 2023 21:11:03 +0530
Subject: [PATCH 1463/1765] lib: sbi: Remove the SBI_ETRAP error code

The SBI_ETRAP error code was introduced only for doing trap
redirection in generic sbi_ecall_handler(). Now the trap
redirection is moved into sbi_ecall_legacy.c and SBI_ETRAP
error code is only used in this source file so let us remove
it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_error.h    |  5 ++---
 lib/sbi/sbi_ecall_legacy.c | 32 ++++++++++++--------------------
 2 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index 7f97506d8bd..a77e3f8bb3c 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -32,9 +32,8 @@
 #define SBI_EILL		-1004
 #define SBI_ENOSPC		-1005
 #define SBI_ENOMEM		-1006
-#define SBI_ETRAP		-1007
-#define SBI_EUNKNOWN		-1008
-#define SBI_ENOENT		-1009
+#define SBI_EUNKNOWN		-1007
+#define SBI_ENOENT		-1008
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 48bd2274d75..14913c962a9 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -24,22 +24,22 @@
 #include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 
-static int sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
-				     struct sbi_trap_info *uptrap)
+static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
+				      struct sbi_trap_info *uptrap)
 {
 	ulong mask = 0;
 
 	if (pmask) {
 		mask = sbi_load_ulong(pmask, uptrap);
 		if (uptrap->cause)
-			return SBI_ETRAP;
+			return false;
 	} else {
 		sbi_hsm_hart_interruptible_mask(sbi_domain_thishart_ptr(),
 						0, &mask);
 	}
 	*hmask = mask;
 
-	return 0;
+	return true;
 }
 
 static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
@@ -70,56 +70,48 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		sbi_ipi_clear_smode();
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
-		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap);
-		if (ret != SBI_ETRAP) {
+		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
+						&hmask, &trap)) {
 			ret = sbi_ipi_send_smode(hmask, 0);
 		} else {
-			ret = 0;
 			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
-		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap);
-		if (ret != SBI_ETRAP) {
+		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 					  SBI_TLB_FENCE_I, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			ret = 0;
 			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
-		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap);
-		if (ret != SBI_ETRAP) {
+		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
 					  SBI_TLB_SFENCE_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			ret = 0;
 			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
-		ret = sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap);
-		if (ret != SBI_ETRAP) {
+		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
 					  SBI_TLB_SFENCE_VMA_ASID,
 					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			ret = 0;
 			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;

From 2b80b92f028aa3726c6488eaaefddbdec43c5b54 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 12 Dec 2023 15:19:11 +0530
Subject: [PATCH 1464/1765] lib: sbi: Do not enter OpenSBI with mseccfg.MML ==
 1

On platforms with Smepmp, the previous booting stage must enter
OpenSBI with mseccfg.MML == 0. This allows OpenSBI to configure
it's own M-mode only regions without depending on the previous
booting stage.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 46cd55d063c..e2b93e6b134 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -914,6 +914,16 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	/* Mark hart feature detection done */
 	hfeatures->detected = true;
 
+	/*
+	 * On platforms with Smepmp, the previous booting stage must
+	 * enter OpenSBI with mseccfg.MML == 0. This allows OpenSBI
+	 * to configure it's own M-mode only regions without depending
+	 * on the previous booting stage.
+	 */
+	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP) &&
+	    (csr_read(CSR_MSECCFG) & MSECCFG_MML))
+		return SBI_EILL;
+
 	return 0;
 }
 

From 63e09ad3f77218e34fb6cc1df88bedde9b9f38cb Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 21 Dec 2023 09:44:27 +0800
Subject: [PATCH 1465/1765] lib: sbi: Fix shift bug in sbi_system_reset

There is a problem with judging whether the current hart belongs to
hmask. If cur_hartid minus hbase is greater than BITS_PER_LONG, the
previous hmask will also have a bit cleared incorrectly, which will
cause some harts to lose ipi.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_system.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index d1fa349544c..e930272152f 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -72,7 +72,8 @@ void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 
 	/* Send HALT IPI to every hart other than the current hart */
 	while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &hmask)) {
-		if (hbase <= cur_hartid)
+		if ((hbase <= cur_hartid)
+			  && (cur_hartid < hbase + BITS_PER_LONG))
 			hmask &= ~(1UL << (cur_hartid - hbase));
 		if (hmask)
 			sbi_ipi_send_halt(hmask, hbase);

From ba29293dc947e13fa2e63de7ed289d7bb9b540f4 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Wed, 27 Dec 2023 08:46:11 +0800
Subject: [PATCH 1466/1765] lib: utils/timer: mtimer: only use regname for
 aclint

The parser will fail if the timer is clint timer and has regname
property. As the regname is only meaningful for aclint, it is more
robust to only check regname for aclint timer.

Fixes: 6112d58 ("lib: utils/fdt: Allow to use reg-names when parsing ACLINT")
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h | 3 ++-
 lib/utils/fdt/fdt_helper.c         | 5 +++--
 lib/utils/ipi/fdt_ipi_mswi.c       | 2 +-
 lib/utils/timer/fdt_timer_mtimer.c | 5 +++--
 4 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 430d8180a9b..ab4a80fa6f4 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -99,7 +99,8 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 
 int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
-int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
+int fdt_parse_aclint_node(void *fdt, int nodeoffset,
+			  bool for_timer, bool allow_regname,
 			  unsigned long *out_addr1, unsigned long *out_size1,
 			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count);
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index e50f4d849f6..a0e93b92266 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -957,7 +957,8 @@ static int fdt_get_aclint_addr_size(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
+int fdt_parse_aclint_node(void *fdt, int nodeoffset,
+			  bool for_timer, bool allow_regname,
 			  unsigned long *out_addr1, unsigned long *out_size1,
 			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count)
@@ -972,7 +973,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset, bool for_timer,
 	    !out_first_hartid || !out_hart_count)
 		return SBI_EINVAL;
 
-	if (for_timer && out_addr2 && out_size2 &&
+	if (for_timer && allow_regname && out_addr2 && out_size2 &&
 	    fdt_getprop(fdt, nodeoffset, "reg-names", NULL))
 		rc = fdt_get_aclint_addr_size_by_name(fdt, nodeoffset,
 						      out_addr1, out_size1,
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 5432db6ef92..a709abe150d 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -24,7 +24,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff,
 	if (!ms)
 		return SBI_ENOMEM;
 
-	rc = fdt_parse_aclint_node(fdt, nodeoff, false,
+	rc = fdt_parse_aclint_node(fdt, nodeoff, false, false,
 				   &ms->addr, &ms->size, NULL, NULL,
 				   &ms->first_hartid, &ms->hart_count);
 	if (rc) {
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 3ba6b8f9f98..9e27e3ab92a 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -38,13 +38,14 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 	struct timer_mtimer_node *mtn, *n;
 	struct aclint_mtimer_data *mt;
 	const struct timer_mtimer_quirks *quirks = match->data;
+	bool is_clint = quirks && quirks->is_clint;
 
 	mtn = sbi_zalloc(sizeof(*mtn));
 	if (!mtn)
 		return SBI_ENOMEM;
 	mt = &mtn->data;
 
-	rc = fdt_parse_aclint_node(fdt, nodeoff, true,
+	rc = fdt_parse_aclint_node(fdt, nodeoff, true, !is_clint,
 				   &addr[0], &size[0], &addr[1], &size[1],
 				   &mt->first_hartid, &mt->hart_count);
 	if (rc) {
@@ -60,7 +61,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
 		return rc;
 	}
 
-	if (quirks && quirks->is_clint) { /* SiFive CLINT */
+	if (is_clint) { /* SiFive CLINT */
 		/* Set CLINT addresses */
 		mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
 		mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE;

From bbd065d903c8cafdcdc01aea5ccf280e17137013 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 27 Dec 2023 12:25:09 +0530
Subject: [PATCH 1467/1765] lib: sbi: Detect Zicntr extension only based on
 traps

OpenSBI uses time CSR if Zicntr extension present which causes
it to crash on an older QEMU because QEMU generates Zicntr in
the ISA string for unleashed machine which only has CYCLE and
INSTRET counters.

Fixes: 776770d2adbf ("lib: sbi: Using one array to define the
name of extensions")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index e2b93e6b134..770fee0768d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -748,6 +748,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	struct sbi_hart_features *hfeatures =
 		sbi_scratch_offset_ptr(scratch, hart_features_offset);
 	unsigned long val, oldval;
+	bool has_zicntr = false;
 	int rc;
 
 	/* If hart features already detected then do nothing */
@@ -900,12 +901,19 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 
 #undef __check_ext_csr
 
+	/* Save trap based detection of Zicntr */
+	has_zicntr = sbi_hart_has_extension(scratch, SBI_HART_EXT_ZICNTR);
+
 	/* Let platform populate extensions */
 	rc = sbi_platform_extensions_init(sbi_platform_thishart_ptr(),
 					  hfeatures);
 	if (rc)
 		return rc;
 
+	/* Zicntr should only be detected using traps */
+	__sbi_hart_update_extension(hfeatures, SBI_HART_EXT_ZICNTR,
+				    has_zicntr);
+
 	/* Extensions implied by other extensions and features */
 	if (hfeatures->mhpm_mask)
 		__sbi_hart_update_extension(hfeatures,

From a2b255b88918715173942f2c5e1f97ac9e90c877 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 27 Dec 2023 12:32:58 +0530
Subject: [PATCH 1468/1765] include: Bump-up version to 1.4

This patch updates OpenSBI version to 1.4 as part of
release preparation.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 641cf8814b2..8d9e395bd8f 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 3
+#define OPENSBI_VERSION_MINOR 4
 
 /**
  * OpenSBI 32-bit version with:

From b752099da8e37ec9749245fde918e9f7dbd9957e Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:13 +0530
Subject: [PATCH 1469/1765] include: sbi: Introduce common endianess conversion
 macro

Introduce cpu_to_lle and lle_to_cpu macros which invoke
correct word length cpu_to_le<64/32> conversion based on
__riscv_xlen.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_byteorder.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/sbi/sbi_byteorder.h b/include/sbi/sbi_byteorder.h
index 15107e1ea3d..db6eb2b967e 100644
--- a/include/sbi/sbi_byteorder.h
+++ b/include/sbi/sbi_byteorder.h
@@ -58,4 +58,14 @@
 #define le64_to_cpu(x)		((uint64_t)BSWAP64(x))
 #endif
 
+#if __riscv_xlen == 64
+#define cpu_to_lle		cpu_to_le64
+#define lle_to_cpu		le64_to_cpu
+#elif __riscv_xlen == 32
+#define cpu_to_lle		cpu_to_le32
+#define lle_to_cpu		le32_to_cpu
+#else
+#error "Unknown __riscv_xlen"
+#endif
+
 #endif /* __SBI_BYTEORDER_H__ */

From 20ca19ab0323bb3b162a620008d192e2a56302a2 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:14 +0530
Subject: [PATCH 1470/1765] include: sbi: Add TINFO debug trigger CSR

Add the missing TINFO debug trigger CSR.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index f20df761d9b..e74cc0df1c4 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -686,6 +686,7 @@
 #define CSR_TDATA1			0x7a1
 #define CSR_TDATA2			0x7a2
 #define CSR_TDATA3			0x7a3
+#define CSR_TINFO			0x7a4
 
 /* Debug Mode Registers */
 #define CSR_DCSR			0x7b0

From 24997697aed9856f2a7e6ea73802e4939010660e Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:15 +0530
Subject: [PATCH 1471/1765] include: sbi: Introduce debug trigger register
 encodings

This patch introduces Mcontrol and M6 control register
encodings along with macros to manipulate them.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_dbtr.h | 249 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 249 insertions(+)
 create mode 100644 include/sbi/riscv_dbtr.h

diff --git a/include/sbi/riscv_dbtr.h b/include/sbi/riscv_dbtr.h
new file mode 100644
index 00000000000..96c7d3e3dc8
--- /dev/null
+++ b/include/sbi/riscv_dbtr.h
@@ -0,0 +1,249 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro System, Inc.
+ *
+ * Authors:
+ *   Himanshu Chauhan <hchauhan@ventanamicro.com>
+ */
+
+#ifndef __RISCV_DBTR_H__
+#define __RISCV_DBTR_H__
+
+#define RV_MAX_TRIGGERS	32
+
+enum {
+	RISCV_DBTR_TRIG_NONE = 0,
+	RISCV_DBTR_TRIG_LEGACY,
+	RISCV_DBTR_TRIG_MCONTROL,
+	RISCV_DBTR_TRIG_ICOUNT,
+	RISCV_DBTR_TRIG_ITRIGGER,
+	RISCV_DBTR_TRIG_ETRIGGER,
+	RISCV_DBTR_TRIG_MCONTROL6,
+};
+
+#define RV_DBTR_BIT(_prefix, _name)		\
+	RV_DBTR_##_prefix##_##_name##_BIT
+
+#define RV_DBTR_BIT_MASK(_prefix, _name)	\
+	RV_DBTR_##_prefix##_name##_BIT_MASK
+
+#define RV_DBTR_DECLARE_BIT(_prefix, _name, _val)	\
+	RV_DBTR_BIT(_prefix, _name) = _val
+
+#define RV_DBTR_DECLARE_BIT_MASK(_prefix, _name, _width)		\
+	RV_DBTR_BIT_MASK(_prefix, _name) =				\
+		(((1UL << _width) - 1) << RV_DBTR_BIT(_prefix, _name))
+
+#define CLEAR_DBTR_BIT(_target, _prefix, _bit_name)		\
+	__clear_bit(RV_DBTR_BIT(_prefix, _bit_name), &_target)
+
+#define SET_DBTR_BIT(_target, _prefix, _bit_name)		\
+	__set_bit(RV_DBTR_BIT(_prefix, _bit_name), &_target)
+
+/* Trigger Data 1 */
+enum {
+	RV_DBTR_DECLARE_BIT(TDATA1, DATA,   0),
+#if __riscv_xlen == 64
+	RV_DBTR_DECLARE_BIT(TDATA1, DMODE,  59),
+	RV_DBTR_DECLARE_BIT(TDATA1, TYPE,   60),
+#elif __riscv_xlen == 32
+	RV_DBTR_DECLARE_BIT(TDATA1, DMODE,  27),
+	RV_DBTR_DECLARE_BIT(TDATA1, TYPE,   28),
+#else
+	#error "Unknown __riscv_xlen"
+#endif
+};
+
+enum {
+#if __riscv_xlen == 64
+	RV_DBTR_DECLARE_BIT_MASK(TDATA1, DATA,  59),
+#elif __riscv_xlen == 32
+	RV_DBTR_DECLARE_BIT_MASK(TDATA1, DATA,  27),
+#else
+	#error "Unknown __riscv_xlen"
+#endif
+	RV_DBTR_DECLARE_BIT_MASK(TDATA1, DMODE, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TDATA1, TYPE,  4),
+};
+
+/* MC - Match Control Type Register */
+enum {
+	RV_DBTR_DECLARE_BIT(MC, LOAD,    0),
+	RV_DBTR_DECLARE_BIT(MC, STORE,   1),
+	RV_DBTR_DECLARE_BIT(MC, EXEC,    2),
+	RV_DBTR_DECLARE_BIT(MC, U,       3),
+	RV_DBTR_DECLARE_BIT(MC, S,       4),
+	RV_DBTR_DECLARE_BIT(MC, RES2,    5),
+	RV_DBTR_DECLARE_BIT(MC, M,       6),
+	RV_DBTR_DECLARE_BIT(MC, MATCH,   7),
+	RV_DBTR_DECLARE_BIT(MC, CHAIN,   11),
+	RV_DBTR_DECLARE_BIT(MC, ACTION,  12),
+	RV_DBTR_DECLARE_BIT(MC, SIZELO,  16),
+	RV_DBTR_DECLARE_BIT(MC, TIMING,  18),
+	RV_DBTR_DECLARE_BIT(MC, SELECT,  19),
+	RV_DBTR_DECLARE_BIT(MC, HIT,     20),
+#if __riscv_xlen >= 64
+	RV_DBTR_DECLARE_BIT(MC, SIZEHI,  21),
+#endif
+#if __riscv_xlen == 64
+	RV_DBTR_DECLARE_BIT(MC, MASKMAX, 53),
+	RV_DBTR_DECLARE_BIT(MC, DMODE,   59),
+	RV_DBTR_DECLARE_BIT(MC, TYPE,    60),
+#elif __riscv_xlen == 32
+	RV_DBTR_DECLARE_BIT(MC, MASKMAX, 21),
+	RV_DBTR_DECLARE_BIT(MC, DMODE,   27),
+	RV_DBTR_DECLARE_BIT(MC, TYPE,    28),
+#else
+	#error "Unknown __riscv_xlen"
+#endif
+};
+
+enum {
+	RV_DBTR_DECLARE_BIT_MASK(MC, LOAD,    1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, STORE,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, EXEC,    1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, U,       1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, S,       1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, RES2,    1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, M,       1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, MATCH,   4),
+	RV_DBTR_DECLARE_BIT_MASK(MC, CHAIN,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, ACTION,  4),
+	RV_DBTR_DECLARE_BIT_MASK(MC, SIZELO,  2),
+	RV_DBTR_DECLARE_BIT_MASK(MC, TIMING,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, SELECT,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, HIT,     1),
+#if __riscv_xlen >= 64
+	RV_DBTR_DECLARE_BIT_MASK(MC, SIZEHI,  2),
+#endif
+	RV_DBTR_DECLARE_BIT_MASK(MC, MASKMAX, 6),
+	RV_DBTR_DECLARE_BIT_MASK(MC, DMODE,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC, TYPE,    4),
+};
+
+/* MC6 - Match Control 6 Type Register */
+enum {
+	RV_DBTR_DECLARE_BIT(MC6, LOAD,   0),
+	RV_DBTR_DECLARE_BIT(MC6, STORE,  1),
+	RV_DBTR_DECLARE_BIT(MC6, EXEC,   2),
+	RV_DBTR_DECLARE_BIT(MC6, U,      3),
+	RV_DBTR_DECLARE_BIT(MC6, S,      4),
+	RV_DBTR_DECLARE_BIT(MC6, RES2,   5),
+	RV_DBTR_DECLARE_BIT(MC6, M,      6),
+	RV_DBTR_DECLARE_BIT(MC6, MATCH,  7),
+	RV_DBTR_DECLARE_BIT(MC6, CHAIN,  11),
+	RV_DBTR_DECLARE_BIT(MC6, ACTION, 12),
+	RV_DBTR_DECLARE_BIT(MC6, SIZE,   16),
+	RV_DBTR_DECLARE_BIT(MC6, TIMING, 20),
+	RV_DBTR_DECLARE_BIT(MC6, SELECT, 21),
+	RV_DBTR_DECLARE_BIT(MC6, HIT,    22),
+	RV_DBTR_DECLARE_BIT(MC6, VU,     23),
+	RV_DBTR_DECLARE_BIT(MC6, VS,     24),
+#if __riscv_xlen == 64
+	RV_DBTR_DECLARE_BIT(MC6, DMODE,  59),
+	RV_DBTR_DECLARE_BIT(MC6, TYPE,   60),
+#elif __riscv_xlen == 32
+	RV_DBTR_DECLARE_BIT(MC6, DMODE,  27),
+	RV_DBTR_DECLARE_BIT(MC6, TYPE,   28),
+#else
+	#error "Unknown __riscv_xlen"
+#endif
+};
+
+enum {
+	RV_DBTR_DECLARE_BIT_MASK(MC6, LOAD,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, STORE,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, EXEC,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, U,      1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, S,      1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, RES2,   1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, M,      1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, MATCH,  4),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, CHAIN,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, ACTION, 4),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, SIZE,   4),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, TIMING, 1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, SELECT, 1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, HIT,    1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, VU,     1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, VS,     1),
+#if __riscv_xlen == 64
+	RV_DBTR_DECLARE_BIT_MASK(MC6, DMODE,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, TYPE,   4),
+#elif __riscv_xlen == 32
+	RV_DBTR_DECLARE_BIT_MASK(MC6, DMODE,  1),
+	RV_DBTR_DECLARE_BIT_MASK(MC6, TYPE,   4),
+#else
+	#error "Unknown __riscv_xlen"
+#endif
+};
+
+#define RV_DBTR_SET_TDATA1_TYPE(_t1, _type)				\
+	do {								\
+		_t1 &= ~RV_DBTR_BIT_MASK(TDATA1, TYPE);			\
+		_t1 |= (((unsigned long)_type				\
+			 << RV_DBTR_BIT(TDATA1, TYPE))			\
+			& RV_DBTR_BIT_MASK(TDATA1, TYPE));		\
+	}while (0);
+
+#define RV_DBTR_SET_MC_TYPE(_t1, _type)				\
+	do {							\
+		_t1 &= ~RV_DBTR_BIT_MASK(MC, TYPE);		\
+		_t1 |= (((unsigned long)_type			\
+			 << RV_DBTR_BIT(MC, TYPE))		\
+			& RV_DBTR_BIT_MASK(MC, TYPE));		\
+	}while (0);
+
+#define RV_DBTR_SET_MC6_TYPE(_t1, _type)			\
+	do {							\
+		_t1 &= ~RV_DBTR_BIT_MASK(MC6, TYPE);		\
+		_t1 |= (((unsigned long)_type			\
+			 << RV_DBTR_BIT(MC6, TYPE))		\
+			& RV_DBTR_BIT_MASK(MC6, TYPE));		\
+	}while (0);
+
+#define RV_DBTR_SET_MC_EXEC(_t1)		\
+	SET_DBTR_BIT(_t1, MC, EXEC)
+
+#define RV_DBTR_SET_MC_LOAD(_t1)		\
+	SET_DBTR_BIT(_t1, MC, LOAD)
+
+#define RV_DBTR_SET_MC_STORE(_t1)		\
+	SET_DBTR_BIT(_t1, MC, STORE)
+
+#define RV_DBTR_SET_MC_SIZELO(_t1, _val)			\
+	do {							\
+		_t1 &= ~RV_DBTR_BIT_MASK(MC, SIZELO);		\
+		_t1 |= ((_val << RV_DBTR_BIT(MC, SIZELO))	\
+			& RV_DBTR_BIT_MASK(MC, SIZELO));	\
+	} while(0);
+
+#define RV_DBTR_SET_MC_SIZEHI(_t1, _val)			\
+	do {							\
+		_t1 &= ~RV_DBTR_BIT_MASK(MC, SIZEHI);		\
+		_t1 |= ((_val << RV_DBTR_BIT(MC, SIZEHI))	\
+			& RV_DBTR_BIT_MASK(MC, SIZEHI));	\
+	} while(0);
+
+#define RV_DBTR_SET_MC6_EXEC(_t1)		\
+	SET_DBTR_BIT(_t1, MC6, EXEC)
+
+#define RV_DBTR_SET_MC6_LOAD(_t1)		\
+	SET_DBTR_BIT(_t1, MC6, LOAD)
+
+#define RV_DBTR_SET_MC6_STORE(_t1)		\
+	SET_DBTR_BIT(_t1, MC6, STORE)
+
+#define RV_DBTR_SET_MC6_SIZE(_t1, _val)				\
+	do {							\
+		_t1 &= ~RV_DBTR_BIT_MASK(MC6, SIZE);		\
+		_t1 |= ((_val << RV_DBTR_BIT(MC6, SIZE))	\
+			& RV_DBTR_BIT_MASK(MC6, SIZE));		\
+	} while(0);
+
+typedef unsigned long riscv_dbtr_tdata1_mcontrol_t;
+typedef unsigned long riscv_dbtr_tdata1_mcontrol6_t;
+typedef unsigned long riscv_dbtr_tdata1_t;
+
+#endif /* __RISCV_DBTR_H__ */

From 40dac6bcfe7e01fb12915e0bbf8d175df06c8170 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:16 +0530
Subject: [PATCH 1472/1765] lib: sbi: Detect support of debug triggers

Detect if debug triggers, sdtrig extension, is supported
by the CPU. The support is detected by access traps and
ISA string parsing.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hart.h | 2 ++
 lib/sbi/sbi_hart.c     | 4 ++++
 2 files changed, 6 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 47be251d31a..10dc3df5d2f 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -53,6 +53,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_ZICBOM,
 	/** Hart has Svpbmt extension */
 	SBI_HART_EXT_SVPBMT,
+	/** Hart has debug trigger extension */
+	SBI_HART_EXT_SDTRIG,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 770fee0768d..a0ab0c64003 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -657,6 +657,7 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(zicboz, SBI_HART_EXT_ZICBOZ),
 	__SBI_HART_EXT_DATA(zicbom, SBI_HART_EXT_ZICBOM),
 	__SBI_HART_EXT_DATA(svpbmt, SBI_HART_EXT_SVPBMT),
+	__SBI_HART_EXT_DATA(sdtrig, SBI_HART_EXT_SDTRIG),
 };
 
 /**
@@ -898,6 +899,9 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	/* Detect if hart supports smcntrpmf */
 	__check_ext_csr(SBI_HART_PRIV_VER_1_12,
 			CSR_MCYCLECFG, SBI_HART_EXT_SMCNTRPMF);
+	/* Detect if hart support sdtrig (debug triggers) */
+	__check_ext_csr(SBI_HART_PRIV_VER_UNKNOWN,
+			CSR_TSELECT, SBI_HART_EXT_SDTRIG);
 
 #undef __check_ext_csr
 

From 97f234f15c9657c6ec69fa6ed745be8107bf6ae2 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:17 +0530
Subject: [PATCH 1473/1765] lib: sbi: Introduce the SBI debug triggers
 extension support

RISC-V Debug specification includes Sdtrig ISA extension
which describes Trigger Module. Triggers can cause
a breakpoint exception or trace action without execution
of a special instruction. They can be used to implement
hardware breakpoints and watchpoints for native debugging.

The SBI Debut Trigger extension (Draft v6) can be found at:
https://lists.riscv.org/g/tech-debug/topic/99825362#1302

This patch is an initial implementation of SBI Debug
Trigger Extension (Draft v6) in OpenSBI.

The following features are supported:
 * mcontrol, mcontrol6 triggers
 * Breakpoint and trace actions

NOTE: Chained triggers are not supported

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_dbtr.h | 125 +++++++
 lib/sbi/objects.mk     |   1 +
 lib/sbi/sbi_dbtr.c     | 728 +++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c     |   9 +
 4 files changed, 863 insertions(+)
 create mode 100644 include/sbi/sbi_dbtr.h
 create mode 100644 lib/sbi/sbi_dbtr.c

diff --git a/include/sbi/sbi_dbtr.h b/include/sbi/sbi_dbtr.h
new file mode 100644
index 00000000000..a8b3a025579
--- /dev/null
+++ b/include/sbi/sbi_dbtr.h
@@ -0,0 +1,125 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems, Inc.
+ *
+ * Authors:
+ *   Himanshu Chauhan <hchauhan@ventanamicro.com>
+ */
+
+#ifndef __SBI_DBTR_H__
+#define __SBI_DBTR_H__
+
+#include <sbi/riscv_dbtr.h>
+#include <sbi/sbi_types.h>
+
+struct sbi_domain;
+
+enum {
+	RV_DBTR_DECLARE_BIT(TS, MAPPED, 0), /* trigger mapped to hw trigger */
+	RV_DBTR_DECLARE_BIT(TS, U, 1),
+	RV_DBTR_DECLARE_BIT(TS, S, 2),
+	RV_DBTR_DECLARE_BIT(TS, VU, 3),
+	RV_DBTR_DECLARE_BIT(TS, VS, 4),
+	RV_DBTR_DECLARE_BIT(TS, HAVE_TRIG, 5), /* H/w dbtr details available */
+	RV_DBTR_DECLARE_BIT(TS, HW_IDX, 8), /* Hardware index of trigger */
+};
+
+enum {
+	RV_DBTR_DECLARE_BIT_MASK(TS, MAPPED, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, U, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, S, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, VU, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, VS, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, HAVE_TRIG, 1),
+	RV_DBTR_DECLARE_BIT_MASK(TS, HW_IDX, (__riscv_xlen-9)),
+};
+
+#if __riscv_xlen == 64
+#define SBI_DBTR_SHMEM_INVALID_ADDR	0xFFFFFFFFFFFFFFFFUL
+#elif __riscv_xlen == 32
+#define SBI_DBTR_SHMEM_INVALID_ADDR	0xFFFFFFFFUL
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+struct sbi_dbtr_shmem {
+	unsigned long phys_lo;
+	unsigned long phys_hi;
+};
+
+struct sbi_dbtr_trigger {
+	unsigned long index;
+	unsigned long type_mask;
+	unsigned long state;
+	unsigned long tdata1;
+	unsigned long tdata2;
+	unsigned long tdata3;
+};
+
+struct sbi_dbtr_data_msg {
+	unsigned long tstate;
+	unsigned long tdata1;
+	unsigned long tdata2;
+	unsigned long tdata3;
+};
+
+struct sbi_dbtr_id_msg {
+	unsigned long idx;
+};
+
+struct sbi_dbtr_hart_triggers_state {
+	struct sbi_dbtr_trigger triggers[RV_MAX_TRIGGERS];
+	struct sbi_dbtr_shmem shmem;
+	u32 total_trigs;
+	u32 available_trigs;
+	u32 hartid;
+	u32 probed;
+};
+
+#define TDATA1_GET_TYPE(_t1)					\
+	EXTRACT_FIELD(_t1, RV_DBTR_BIT_MASK(TDATA1, TYPE))
+
+/* Set the hardware index of trigger in logical trigger state */
+#define SET_TRIG_HW_INDEX(_state, _idx)				\
+	do {							\
+		_state &= ~RV_DBTR_BIT_MASK(TS, HW_IDX);	\
+		_state |= (((unsigned long)_idx			\
+			    << RV_DBTR_BIT(TS, HW_IDX))		\
+			   & RV_DBTR_BIT_MASK(TS, HW_IDX));	\
+	}while (0);
+
+/** SBI shared mem messages layout */
+struct sbi_dbtr_shmem_entry {
+	struct sbi_dbtr_data_msg data;
+	struct sbi_dbtr_id_msg id;
+};
+
+#define SBI_DBTR_SHMEM_ALIGN_MASK	((__riscv_xlen / 8) - 1)
+
+/** Initialize debug triggers */
+int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot);
+
+/** SBI DBTR extension functions */
+int sbi_dbtr_supported(void);
+int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
+			 unsigned long shmem_phys_lo,
+			 unsigned long shmem_phys_hi);
+int sbi_dbtr_num_trig(unsigned long trig_tdata1, unsigned long *out);
+int sbi_dbtr_read_trig(unsigned long smode,
+		       unsigned long trig_idx_base, unsigned long trig_count);
+int sbi_dbtr_install_trig(unsigned long smode,
+			  unsigned long trig_count, unsigned long *out);
+int sbi_dbtr_uninstall_trig(unsigned long trig_idx_base,
+			    unsigned long trig_idx_mask);
+int sbi_dbtr_enable_trig(unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask);
+int sbi_dbtr_update_trig(unsigned long smode,
+			 unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask);
+int sbi_dbtr_disable_trig(unsigned long trig_idx_base,
+			  unsigned long trig_idx_mask);
+
+int sbi_dbtr_get_total_triggers(void);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index c6991870191..c7de150cad2 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -70,6 +70,7 @@ libsbi-objs-y += sbi_irqchip.o
 libsbi-objs-y += sbi_misaligned_ldst.o
 libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
+libsbi-objs-y += sbi_dbtr.o
 libsbi-objs-y += sbi_scratch.o
 libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_system.o
diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
new file mode 100644
index 00000000000..019e702ca21
--- /dev/null
+++ b/lib/sbi/sbi_dbtr.c
@@ -0,0 +1,728 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems, Inc.
+ *
+ * Author(s):
+ *   Himanshu Chauhan <hchauhan@ventanamicro.com>
+ */
+
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_csr_detect.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_byteorder.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_dbtr.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_asm.h>
+
+
+/** Offset of pointer to HART's debug triggers info in scratch space */
+static unsigned long hart_state_ptr_offset;
+
+#define dbtr_get_hart_state_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, hart_state_ptr_offset)
+
+#define dbtr_thishart_state_ptr()				\
+	dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr())
+
+#define dbtr_set_hart_state_ptr(__scratch, __hart_state)		\
+	sbi_scratch_write_type((__scratch), void *, hart_state_ptr_offset, \
+			       (__hart_state))
+
+#define INDEX_TO_TRIGGER(_index)					\
+	({								\
+		struct sbi_dbtr_trigger *__trg = NULL;			\
+		struct sbi_dbtr_hart_triggers_state *__hs = NULL;	\
+		__hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr()); \
+		__trg = &__hs->triggers[_index];			\
+		(__trg);						\
+	})
+
+#define for_each_trig_entry(_base, _max, _etype, _entry)		\
+	for (int _idx = 0; _entry = ((_etype *)_base + _idx),		\
+	     _idx < _max;						\
+	     _idx++, _entry = ((_etype *)_base + _idx))
+
+#if __riscv_xlen == 64
+#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
+#elif __riscv_xlen == 32
+#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
+#else
+#error "Undefined XLEN"
+#endif
+
+static inline int sbi_dbtr_shmem_disabled(void)
+{
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
+
+	if (!hs)
+		return 1;
+
+	return (hs->shmem.phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR &&
+		hs->shmem.phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR
+		? 1 : 0);
+}
+
+static inline void sbi_dbtr_disable_shmem(void)
+{
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
+
+	if (!hs)
+		return;
+
+	hs->shmem.phys_lo = SBI_DBTR_SHMEM_INVALID_ADDR;
+	hs->shmem.phys_hi = SBI_DBTR_SHMEM_INVALID_ADDR;
+}
+
+static inline void *hart_shmem_base(void)
+{
+	struct sbi_dbtr_shmem* shmem;
+	unsigned long phys_hi, phys_lo;
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
+
+	if (!hs)
+		return NULL;
+
+	shmem = &hs->shmem;
+
+	phys_hi = (shmem->phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR
+		   ? shmem->phys_hi : 0);
+	phys_lo = (shmem->phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR
+		   ? 0 : shmem->phys_lo);
+
+	return ((void *)(unsigned long)DBTR_SHMEM_MAKE_PHYS(phys_hi, phys_lo));
+}
+
+static void sbi_trigger_init(struct sbi_dbtr_trigger *trig,
+			     unsigned long type_mask, unsigned long idx)
+{
+	trig->type_mask = type_mask;
+	trig->state = 0;
+	trig->tdata1 = 0;
+	trig->tdata2 = 0;
+	trig->tdata3 = 0;
+	trig->index = idx;
+}
+
+static inline struct sbi_dbtr_trigger *sbi_alloc_trigger(void)
+{
+	int i;
+	struct sbi_dbtr_trigger *f_trig = NULL;
+	struct sbi_dbtr_hart_triggers_state *hart_state;
+
+	hart_state = dbtr_thishart_state_ptr();
+	if (!hart_state)
+		return NULL;
+
+	if (hart_state->available_trigs <= 0)
+		return NULL;
+
+	for (i = 0; i < hart_state->total_trigs; i++) {
+		f_trig = INDEX_TO_TRIGGER(i);
+		if (f_trig->state & RV_DBTR_BIT(TS, MAPPED))
+			continue;
+		hart_state->available_trigs--;
+		break;
+	}
+
+	if (i == hart_state->total_trigs)
+		return NULL;
+
+	__set_bit(RV_DBTR_BIT(TS, MAPPED), &f_trig->state);
+
+	return f_trig;
+}
+
+static inline void sbi_free_trigger(struct sbi_dbtr_trigger *trig)
+{
+	struct sbi_dbtr_hart_triggers_state *hart_state;
+
+	if (trig == NULL)
+		return;
+
+	hart_state = dbtr_thishart_state_ptr();
+	if (!hart_state)
+		return;
+
+	trig->state = 0;
+	trig->tdata1 = 0;
+	trig->tdata2 = 0;
+	trig->tdata3 = 0;
+
+	hart_state->available_trigs++;
+}
+
+int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
+{
+	struct sbi_trap_info trap = {0};
+	unsigned long tdata1;
+	unsigned long val;
+	int i;
+	struct sbi_dbtr_hart_triggers_state *hart_state = NULL;
+
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SDTRIG))
+		return SBI_SUCCESS;
+
+	if (coldboot) {
+		hart_state_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!hart_state_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
+	hart_state = dbtr_get_hart_state_ptr(scratch);
+	if (!hart_state) {
+		hart_state = sbi_zalloc(sizeof(*hart_state));
+		if (!hart_state)
+			return SBI_ENOMEM;
+		hart_state->hartid = current_hartid();
+		dbtr_set_hart_state_ptr(scratch, hart_state);
+	}
+
+	/* disable the shared memory */
+	sbi_dbtr_disable_shmem();
+
+	/* Skip probing triggers if already probed */
+	if (hart_state->probed)
+		goto _probed;
+
+	for (i = 0; i < RV_MAX_TRIGGERS; i++) {
+		csr_write_allowed(CSR_TSELECT, (ulong)&trap, i);
+		if (trap.cause)
+			break;
+
+		val = csr_read_allowed(CSR_TSELECT, (ulong)&trap);
+		if (trap.cause)
+			break;
+
+		/*
+		 * Read back tselect and check that it contains the
+		 * written value
+		 */
+		if (val != i)
+			break;
+
+		val = csr_read_allowed(CSR_TINFO, (ulong)&trap);
+		if (trap.cause) {
+			/*
+			 * If reading tinfo caused an exception, the
+			 * debugger must read tdata1 to discover the
+			 * type.
+			 */
+			tdata1 = csr_read_allowed(CSR_TDATA1,
+						  (ulong)&trap);
+			if (trap.cause)
+				break;
+
+			if (TDATA1_GET_TYPE(tdata1) == 0)
+				break;
+
+			sbi_trigger_init(INDEX_TO_TRIGGER(i),
+					 BIT(TDATA1_GET_TYPE(tdata1)),
+					 i);
+			hart_state->total_trigs++;
+		} else {
+			if (val == 1)
+				break;
+
+			sbi_trigger_init(INDEX_TO_TRIGGER(i), val, i);
+			hart_state->total_trigs++;
+		}
+	}
+
+	hart_state->probed = 1;
+
+ _probed:
+	hart_state->available_trigs = hart_state->total_trigs;
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_get_total_triggers(void)
+{
+	struct sbi_dbtr_hart_triggers_state *hs;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	/*
+	 * This function may be used during ecall registration.
+	 * By that time the debug trigger module might not be
+	 * initialized. If the extension is not supported, report
+	 * number of triggers as 0.
+	 */
+	if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SDTRIG))
+		return 0;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return 0;
+
+	return hs->total_trigs;
+}
+
+int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
+			 unsigned long shmem_phys_lo,
+			 unsigned long shmem_phys_hi)
+{
+	u32 hartid = current_hartid();
+	struct sbi_dbtr_hart_triggers_state *hart_state;
+
+	if (dom && !sbi_domain_is_assigned_hart(dom, hartid)) {
+		sbi_dprintf("%s: calling hart not assigned to this domain\n",
+			   __func__);
+		return SBI_ERR_DENIED;
+	}
+
+	/* call is to disable shared memory */
+	if (shmem_phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR
+	    && shmem_phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR) {
+		sbi_dbtr_disable_shmem();
+		return SBI_SUCCESS;
+	}
+
+	/* the shared memory must be disabled on this hart */
+	if (!sbi_dbtr_shmem_disabled())
+		return SBI_ERR_ALREADY_AVAILABLE;
+
+	/* lower physical address must be XLEN/8 bytes aligned */
+	if (shmem_phys_lo & SBI_DBTR_SHMEM_ALIGN_MASK)
+		return SBI_ERR_INVALID_PARAM;
+
+	if (dom && !sbi_domain_check_addr(dom, shmem_phys_lo, smode,
+					  SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
+		return SBI_ERR_INVALID_ADDRESS;
+
+	if (shmem_phys_hi != SBI_DBTR_SHMEM_INVALID_ADDR) {
+		if (dom &&
+		    !sbi_domain_check_addr(dom, shmem_phys_hi, smode,
+					   SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
+			return SBI_ERR_INVALID_ADDRESS;
+	}
+
+	hart_state = dbtr_thishart_state_ptr();
+	if (!hart_state)
+		return SBI_ERR_FAILED;
+
+	hart_state->shmem.phys_lo = shmem_phys_lo;
+	hart_state->shmem.phys_hi = shmem_phys_hi;
+
+	return SBI_SUCCESS;
+}
+
+static void dbtr_trigger_setup(struct sbi_dbtr_trigger *trig,
+			       struct sbi_dbtr_data_msg *recv)
+{
+	unsigned long tdata1;
+
+	if (!trig)
+		return;
+
+	trig->tdata1 = lle_to_cpu(recv->tdata1);
+	trig->tdata2 = lle_to_cpu(recv->tdata2);
+	trig->tdata3 = lle_to_cpu(recv->tdata3);
+
+	tdata1 = lle_to_cpu(recv->tdata1);
+
+	trig->state = 0;
+
+	__set_bit(RV_DBTR_BIT(TS, MAPPED), &trig->state);
+
+	SET_TRIG_HW_INDEX(trig->state, trig->index);
+
+	switch (TDATA1_GET_TYPE(tdata1)) {
+	case RISCV_DBTR_TRIG_MCONTROL:
+		if (__test_bit(RV_DBTR_BIT(MC, U), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, U), &trig->state);
+
+		if (__test_bit(RV_DBTR_BIT(MC, S), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, S), &trig->state);
+		break;
+	case RISCV_DBTR_TRIG_MCONTROL6:
+		if (__test_bit(RV_DBTR_BIT(MC6, U), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, U), &trig->state);
+
+		if (__test_bit(RV_DBTR_BIT(MC6, S), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, S), &trig->state);
+
+		if (__test_bit(RV_DBTR_BIT(MC6, VU), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, VU), &trig->state);
+
+		if (__test_bit(RV_DBTR_BIT(MC6, VS), &tdata1))
+			__set_bit(RV_DBTR_BIT(TS, VS), &trig->state);
+		break;
+	default:
+		sbi_dprintf("%s: Unknown type (tdata1: 0x%lx Type: %ld)\n",
+			    __func__, tdata1, TDATA1_GET_TYPE(tdata1));
+		break;
+	}
+}
+
+static inline void update_bit(unsigned long new, int nr, volatile unsigned long *addr)
+{
+	if (new)
+		__set_bit(nr, addr);
+	else
+		__clear_bit(nr, addr);
+}
+
+static void dbtr_trigger_enable(struct sbi_dbtr_trigger *trig)
+{
+	unsigned long state;
+	unsigned long tdata1;
+
+	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+		return;
+
+	state = trig->state;
+	tdata1 = trig->tdata1;
+
+	switch (TDATA1_GET_TYPE(tdata1)) {
+	case RISCV_DBTR_TRIG_MCONTROL:
+		update_bit(state & RV_DBTR_BIT_MASK(TS, U),
+			   RV_DBTR_BIT(MC, U), &trig->tdata1);
+		update_bit(state & RV_DBTR_BIT_MASK(TS, S),
+			   RV_DBTR_BIT(MC, S), &trig->tdata1);
+		break;
+	case RISCV_DBTR_TRIG_MCONTROL6:
+		update_bit(state & RV_DBTR_BIT_MASK(TS, VU),
+			   RV_DBTR_BIT(MC6, VU), &trig->tdata1);
+		update_bit(state & RV_DBTR_BIT_MASK(TS, VS),
+			   RV_DBTR_BIT(MC6, VS), &trig->tdata1);
+		update_bit(state & RV_DBTR_BIT_MASK(TS, U),
+			   RV_DBTR_BIT(MC6, U), &trig->tdata1);
+		update_bit(state & RV_DBTR_BIT_MASK(TS, S),
+			   RV_DBTR_BIT(MC6, S), &trig->tdata1);
+		break;
+	default:
+		break;
+	}
+
+	/*
+	 * RISC-V Debug Support v1.0.0 section 5.5:
+	 * Debugger cannot simply set a trigger by writing tdata1, then tdata2,
+	 * etc. The current value of tdata2 might not be legal with the new
+	 * value of tdata1. To help with this situation, it is guaranteed that
+	 * writing 0 to tdata1 disables the trigger, and leaves it in a state
+	 * where tdata2 and tdata3 can be written with any value that makes
+	 * sense for any trigger type supported by this trigger.
+	 */
+	csr_write(CSR_TSELECT, trig->index);
+	csr_write(CSR_TDATA1, 0x0);
+	csr_write(CSR_TDATA2, trig->tdata2);
+	csr_write(CSR_TDATA1, trig->tdata1);
+}
+
+static void dbtr_trigger_disable(struct sbi_dbtr_trigger *trig)
+{
+	unsigned long tdata1;
+
+	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+		return;
+
+	tdata1 = trig->tdata1;
+
+	switch (TDATA1_GET_TYPE(tdata1)) {
+	case RISCV_DBTR_TRIG_MCONTROL:
+		__clear_bit(RV_DBTR_BIT(MC, U), &trig->tdata1);
+		__clear_bit(RV_DBTR_BIT(MC, S), &trig->tdata1);
+		break;
+	case RISCV_DBTR_TRIG_MCONTROL6:
+		__clear_bit(RV_DBTR_BIT(MC6, VU), &trig->tdata1);
+		__clear_bit(RV_DBTR_BIT(MC6, VS), &trig->tdata1);
+		__clear_bit(RV_DBTR_BIT(MC6, U), &trig->tdata1);
+		__clear_bit(RV_DBTR_BIT(MC6, S), &trig->tdata1);
+		break;
+	default:
+		break;
+	}
+
+	csr_write(CSR_TSELECT, trig->index);
+	csr_write(CSR_TDATA1, trig->tdata1);
+}
+
+static void dbtr_trigger_clear(struct sbi_dbtr_trigger *trig)
+{
+	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+		return;
+
+	csr_write(CSR_TSELECT, trig->index);
+	csr_write(CSR_TDATA1, 0x0);
+	csr_write(CSR_TDATA2, 0x0);
+}
+
+static int dbtr_trigger_supported(unsigned long type)
+{
+	switch (type) {
+	case RISCV_DBTR_TRIG_MCONTROL:
+	case RISCV_DBTR_TRIG_MCONTROL6:
+		return 1;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static int dbtr_trigger_valid(unsigned long type, unsigned long tdata)
+{
+	switch (type) {
+	case RISCV_DBTR_TRIG_MCONTROL:
+		if (!(tdata & RV_DBTR_BIT_MASK(MC, DMODE)) &&
+		    !(tdata & RV_DBTR_BIT_MASK(MC, M)))
+			return 1;
+		break;
+	case RISCV_DBTR_TRIG_MCONTROL6:
+		if (!(tdata & RV_DBTR_BIT_MASK(MC6, DMODE)) &&
+		    !(tdata & RV_DBTR_BIT_MASK(MC6, M)))
+			return 1;
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+int sbi_dbtr_num_trig(unsigned long data, unsigned long *out)
+{
+	unsigned long type = TDATA1_GET_TYPE(data);
+	u32 hartid = current_hartid();
+	unsigned long total = 0;
+	struct sbi_dbtr_trigger *trig;
+	int i;
+	struct sbi_dbtr_hart_triggers_state *hs;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	if (data == 0) {
+		*out = hs->total_trigs;
+		return SBI_SUCCESS;
+	}
+
+	for (i = 0; i < hs->total_trigs; i++) {
+		trig = INDEX_TO_TRIGGER(i);
+
+		if (__test_bit(type, &trig->type_mask))
+			total++;
+	}
+
+	sbi_dprintf("%s: hart%d: total triggers of type %lu: %lu\n",
+		    __func__, hartid, type, total);
+
+	*out = total;
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_read_trig(unsigned long smode,
+		       unsigned long trig_idx_base, unsigned long trig_count)
+{
+	struct sbi_dbtr_data_msg *xmit;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_shmem_entry *entry;
+	void *shmem_base = NULL;
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	if (trig_idx_base >= hs->total_trigs ||
+	    trig_idx_base + trig_count >= hs->total_trigs)
+		return SBI_ERR_INVALID_PARAM;
+
+	if (sbi_dbtr_shmem_disabled())
+		return SBI_ERR_NO_SHMEM;
+
+	shmem_base = hart_shmem_base();
+
+	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
+		xmit = &entry->data;
+		trig = INDEX_TO_TRIGGER((_idx + trig_idx_base));
+		xmit->tstate = cpu_to_lle(trig->state);
+		xmit->tdata1 = cpu_to_lle(trig->tdata1);
+		xmit->tdata2 = cpu_to_lle(trig->tdata2);
+		xmit->tdata3 = cpu_to_lle(trig->tdata3);
+		sbi_hart_unmap_saddr();
+	}
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_install_trig(unsigned long smode,
+			  unsigned long trig_count, unsigned long *out)
+{
+	void *shmem_base = NULL;
+	struct sbi_dbtr_shmem_entry *entry;
+	struct sbi_dbtr_data_msg *recv;
+	struct sbi_dbtr_id_msg *xmit;
+	unsigned long ctrl;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	if (sbi_dbtr_shmem_disabled())
+		return SBI_ERR_NO_SHMEM;
+
+	shmem_base = hart_shmem_base();
+	hs = dbtr_thishart_state_ptr();
+
+	/* Check requested triggers configuration */
+	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
+		recv = (struct sbi_dbtr_data_msg *)(&entry->data);
+		ctrl = recv->tdata1;
+
+		if (!dbtr_trigger_supported(TDATA1_GET_TYPE(ctrl))) {
+			*out = _idx;
+			sbi_hart_unmap_saddr();
+			return SBI_ERR_FAILED;
+		}
+
+		if (!dbtr_trigger_valid(TDATA1_GET_TYPE(ctrl), ctrl)) {
+			*out = _idx;
+			sbi_hart_unmap_saddr();
+			return SBI_ERR_FAILED;
+		}
+		sbi_hart_unmap_saddr();
+	}
+
+	if (hs->available_trigs < trig_count) {
+		*out = hs->available_trigs;
+		return SBI_ERR_FAILED;
+	}
+
+	/* Install triggers */
+	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
+		/*
+		 * Since we have already checked if enough triggers are
+		 * available, trigger allocation must succeed.
+		 */
+		trig = sbi_alloc_trigger();
+
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
+
+		recv = (struct sbi_dbtr_data_msg *)(&entry->data);
+		xmit = (struct sbi_dbtr_id_msg *)(&entry->id);
+
+		dbtr_trigger_setup(trig,  recv);
+		dbtr_trigger_enable(trig);
+		xmit->idx = cpu_to_lle(trig->index);
+		sbi_hart_unmap_saddr();
+	}
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_uninstall_trig(unsigned long trig_idx_base,
+			    unsigned long trig_idx_mask)
+{
+	unsigned long trig_mask = trig_idx_mask << trig_idx_base;
+	unsigned long idx = trig_idx_base;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_hart_triggers_state *hs;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
+		trig = INDEX_TO_TRIGGER(idx);
+		if (!(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+			return SBI_ERR_INVALID_PARAM;
+
+		dbtr_trigger_clear(trig);
+
+		sbi_free_trigger(trig);
+	}
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_enable_trig(unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask)
+{
+	unsigned long trig_mask = trig_idx_mask << trig_idx_base;
+	unsigned long idx = trig_idx_base;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_hart_triggers_state *hs;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
+		trig = INDEX_TO_TRIGGER(idx);
+		sbi_dprintf("%s: enable trigger %lu\n", __func__, idx);
+		dbtr_trigger_enable(trig);
+	}
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_update_trig(unsigned long smode,
+			 unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask)
+{
+	unsigned long trig_mask = trig_idx_mask << trig_idx_base;
+	unsigned long idx = trig_idx_base;
+	struct sbi_dbtr_data_msg *recv;
+	unsigned long uidx = 0;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_shmem_entry *entry;
+	void *shmem_base = NULL;
+	struct sbi_dbtr_hart_triggers_state *hs = NULL;
+
+	if (sbi_dbtr_shmem_disabled())
+		return SBI_ERR_NO_SHMEM;
+
+	shmem_base = hart_shmem_base();
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
+		trig = INDEX_TO_TRIGGER(idx);
+
+		if (!(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+			return SBI_ERR_INVALID_PARAM;
+
+		entry = (shmem_base + uidx * sizeof(*entry));
+		recv = &entry->data;
+
+		trig->tdata2 = lle_to_cpu(recv->tdata2);
+		dbtr_trigger_enable(trig);
+		uidx++;
+	}
+
+	return SBI_SUCCESS;
+}
+
+int sbi_dbtr_disable_trig(unsigned long trig_idx_base,
+			  unsigned long trig_idx_mask)
+{
+	unsigned long trig_mask = trig_idx_mask << trig_idx_base;
+	unsigned long idx = trig_idx_base;
+	struct sbi_dbtr_trigger *trig;
+	struct sbi_dbtr_hart_triggers_state *hs;
+
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
+		trig = INDEX_TO_TRIGGER(idx);
+		dbtr_trigger_disable(trig);
+	}
+
+	return SBI_SUCCESS;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 6a98e134a93..0dcde27dddb 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -23,6 +23,7 @@
 #include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
+#include <sbi/sbi_dbtr.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_timer.h>
@@ -322,6 +323,10 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
+	rc = sbi_dbtr_init(scratch, true);
+	if (rc)
+		sbi_hart_hang();
+
 	sbi_boot_print_banner(scratch);
 
 	rc = sbi_irqchip_init(scratch, true);
@@ -439,6 +444,10 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_dbtr_init(scratch, false);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_irqchip_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();

From fa87ec90a029b2411023c6121ea212137ee45232 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:18 +0530
Subject: [PATCH 1474/1765] include: sbi: Add SBI debug trigger extension
 related defines

This patch adds defines for SBI debug trigger extension and
function IDs to access the extension.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index d8c646d7b07..690c31bc561 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -32,6 +32,7 @@
 #define SBI_EXT_DBCN				0x4442434E
 #define SBI_EXT_SUSP				0x53555350
 #define SBI_EXT_CPPC				0x43505043
+#define SBI_EXT_DBTR				0x44425452
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -105,6 +106,16 @@
 #define SBI_EXT_PMU_COUNTER_FW_READ_HI	0x6
 #define SBI_EXT_PMU_SNAPSHOT_SET_SHMEM	0x7
 
+/* SBI function IDs for DBTR extension */
+#define SBI_EXT_DBTR_NUM_TRIGGERS	0x0
+#define SBI_EXT_DBTR_SETUP_SHMEM	0x1
+#define SBI_EXT_DBTR_TRIGGER_READ	0x2
+#define SBI_EXT_DBTR_TRIGGER_INSTALL	0x3
+#define SBI_EXT_DBTR_TRIGGER_UPDATE	0x4
+#define SBI_EXT_DBTR_TRIGGER_UNINSTALL	0x5
+#define SBI_EXT_DBTR_TRIGGER_ENABLE	0x6
+#define SBI_EXT_DBTR_TRIGGER_DISABLE	0x7
+
 /** General pmu event codes specified in SBI PMU extension */
 enum sbi_pmu_hw_generic_events_t {
 	SBI_PMU_HW_NO_EVENT			= 0,

From 76a2a15c40b9a31b9066e2014503f954f454a9e0 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:19 +0530
Subject: [PATCH 1475/1765] lib: sbi: Implement SBI debug trigger extension

This patch adds functions to register ecalls for debug triggers
and handler to handle the debug trigger function IDs.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/Kconfig          |  4 +++
 lib/sbi/objects.mk       |  3 ++
 lib/sbi/sbi_ecall_dbtr.c | 73 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_dbtr.c

diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index 477775e21ea..81dd2db3967 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -46,4 +46,8 @@ config SBI_ECALL_VENDOR
 	bool "Platform-defined vendor extensions"
 	default y
 
+config SBI_ECALL_DBTR
+	bool "Debug Trigger Extension"
+	default y
+
 endmenu
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index c7de150cad2..0a50e95c30f 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -52,6 +52,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_VENDOR) += ecall_vendor
 libsbi-objs-$(CONFIG_SBI_ECALL_VENDOR) += sbi_ecall_vendor.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_DBTR) += ecall_dbtr
+libsbi-objs-$(CONFIG_SBI_ECALL_DBTR) += sbi_ecall_dbtr.o
+
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
diff --git a/lib/sbi/sbi_ecall_dbtr.c b/lib/sbi/sbi_ecall_dbtr.c
new file mode 100644
index 00000000000..6a7dfe67707
--- /dev/null
+++ b/lib/sbi/sbi_ecall_dbtr.c
@@ -0,0 +1,73 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Author(s):
+ *   Himanshu Chauhan <hchauhan@ventanamicro.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_dbtr.h>
+
+static int sbi_ecall_dbtr_handler(unsigned long extid, unsigned long funcid,
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
+{
+	unsigned long smode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >>
+			MSTATUS_MPP_SHIFT;
+	int ret = 0;
+
+	switch (funcid) {
+	case SBI_EXT_DBTR_NUM_TRIGGERS:
+		ret = sbi_dbtr_num_trig(regs->a0, &out->value);
+		break;
+	case SBI_EXT_DBTR_SETUP_SHMEM:
+		ret = sbi_dbtr_setup_shmem(sbi_domain_thishart_ptr(), smode,
+					   regs->a0, regs->a1);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_READ:
+		ret = sbi_dbtr_read_trig(smode, regs->a0, regs->a1);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_INSTALL:
+		ret = sbi_dbtr_install_trig(smode, regs->a0, &out->value);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_UNINSTALL:
+		ret = sbi_dbtr_uninstall_trig(regs->a0, regs->a1);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_ENABLE:
+		ret = sbi_dbtr_enable_trig(regs->a0, regs->a1);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_UPDATE:
+		ret = sbi_dbtr_update_trig(smode, regs->a0, regs->a1);
+		break;
+	case SBI_EXT_DBTR_TRIGGER_DISABLE:
+		ret = sbi_dbtr_disable_trig(regs->a0, regs->a1);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	};
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_dbtr;
+
+static int sbi_ecall_dbtr_register_extensions(void)
+{
+	if (sbi_dbtr_get_total_triggers() == 0)
+		return 0;
+
+	return sbi_ecall_register_extension(&ecall_dbtr);
+}
+
+struct sbi_ecall_extension ecall_dbtr = {
+	.extid_start = SBI_EXT_DBTR,
+	.extid_end = SBI_EXT_DBTR,
+	.handle = sbi_ecall_dbtr_handler,
+	.register_extensions = sbi_ecall_dbtr_register_extensions,
+};

From bb90a9ebf6d9a2fe7726978d594e82cdbaad7799 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 9 Jan 2024 22:30:20 +0530
Subject: [PATCH 1476/1765] lib: sbi: Print number of debug triggers found

Print the total number of triggers found on the boot hart.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 0dcde27dddb..804b01cd91c 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -184,6 +184,8 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	sbi_printf("Boot HART MHPM Info       : %lu (0x%08x)\n",
 		   sbi_popcount(sbi_hart_mhpm_mask(scratch)),
 		   sbi_hart_mhpm_mask(scratch));
+	sbi_printf("Boot HART Debug Triggers  : %d triggers\n",
+		   sbi_dbtr_get_total_triggers());
 	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }
 

From 1ec353d5046c2f58033f9fdbeb45405f00c270fb Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Tue, 2 Jan 2024 22:16:24 +0530
Subject: [PATCH 1477/1765] lib: sbi: Use mask to check the free bit during
 trigger allocation

The trigger allocation function uses bit shift instead of mask to check the
mapped status of the triggers. This causes index 0 to be return always. As a
result, the older triggers are overwritten.

Use the mask for MAPPED field in state word to check if the trigger is mapped.

Fixes: 97f234f15 ("lib: sbi: Introduce the SBI debug triggers extension support")
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_dbtr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 019e702ca21..7142fedb5a8 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -129,7 +129,7 @@ static inline struct sbi_dbtr_trigger *sbi_alloc_trigger(void)
 
 	for (i = 0; i < hart_state->total_trigs; i++) {
 		f_trig = INDEX_TO_TRIGGER(i);
-		if (f_trig->state & RV_DBTR_BIT(TS, MAPPED))
+		if (f_trig->state & RV_DBTR_BIT_MASK(TS, MAPPED))
 			continue;
 		hart_state->available_trigs--;
 		break;

From 21caaa3f56c5b8297cda228a93e76bb66a1313c9 Mon Sep 17 00:00:00 2001
From: Zhang Runmin <fmrt19zrmin@163.com>
Date: Sun, 17 Dec 2023 21:48:36 +0800
Subject: [PATCH 1478/1765] fw_base.S: Fix comment errors

When calling '_reset_regs', it'll reset all registers except some
specific registers (ra, a0, a1, and a2).

Both boot HART and non-boot HARTs will execute the '_start_warm'
function. Therefore, when '_reset_regs' is called in '_start_warm', it
will reset all registers except some specific registers (ra, a0, a1 and
a2) for both boot HART and non-boot HARTs.

Signed-off-by: Zhang Runmin <fmrt19zrmin@163.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index f7763f4d9e5..856bccdba31 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -188,7 +188,7 @@ _relocate_done:
 
 	/* At this point we are running from link address */
 
-	/* Reset all registers for boot HART */
+	/* Reset all registers except ra, a0, a1 and a2 for boot HART */
 	li	ra, 0
 	call	_reset_regs
 
@@ -415,7 +415,7 @@ _wait_for_boot_hart:
 	bne	t0, t1, _wait_for_boot_hart
 
 _start_warm:
-	/* Reset all registers for non-boot HARTs */
+	/* Reset all registers except ra, a0, a1 and a2 for non-boot HARTs */
 	li	ra, 0
 	call	_reset_regs
 

From 4a76f79ff5e01bb72eedcf636a11f4c701d1568d Mon Sep 17 00:00:00 2001
From: Kalle Wachsmuth <kalle.wachsmuth@gmail.com>
Date: Thu, 18 Jan 2024 19:02:31 +0100
Subject: [PATCH 1479/1765] Makefile: don't pass -mstrict-align if not
 supported

Support for that option will be added in LLVM 18:
https://github.com/llvm/llvm-project/commit/23ce5368409c760f3dd49d0f17f34772b0b869d8

Clang 17.0.6, however, will error when passed the
`-mstrict-align` flag.
We should only use the flag if it is supported.

Signed-off-by: Kalle Wachsmuth <kalle.wachsmuth@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Xiang W <wxjstz@126.com>
---
 Makefile | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index de4e73a0e3d..66048c38acb 100644
--- a/Makefile
+++ b/Makefile
@@ -170,6 +170,9 @@ OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fP
 # Check whether the compiler supports -m(no-)save-restore
 CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep -e "-save-restore" >/dev/null && echo n || echo y)
 
+# Check whether the compiler supports -m(no-)strict-align
+CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mstrict-align -x c /dev/null -o /dev/null 2>&1 | grep -e "-mstrict-align\|-mno-unaligned-access" >/dev/null && echo n || echo y)
+
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
 CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
 
@@ -337,11 +340,14 @@ CFLAGS		+=	-O0
 else
 CFLAGS		+=	-O2
 endif
-CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
-# enable -m(no-)save-restore option by CC_SUPPORT_SAVE_RESTORE
+CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+# Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 CFLAGS		+=	-mno-save-restore
 endif
+ifeq ($(CC_SUPPORT_STRICT_ALIGN),y)
+CFLAGS		+=	-mstrict-align
+endif
 CFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(RELAX_FLAG)
@@ -355,11 +361,14 @@ CPPFLAGS	+=	$(platform-cppflags-y)
 CPPFLAGS	+=	$(firmware-cppflags-y)
 
 ASFLAGS		=	-g -Wall -nostdlib
-ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls -mstrict-align
-# enable -m(no-)save-restore option by CC_SUPPORT_SAVE_RESTORE
+ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+# Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 ASFLAGS		+=	-mno-save-restore
 endif
+ifeq ($(CC_SUPPORT_STRICT_ALIGN),y)
+ASFLAGS		+=	-mstrict-align
+endif
 ASFLAGS		+=	-mabi=$(PLATFORM_RISCV_ABI) -march=$(PLATFORM_RISCV_ISA)
 ASFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 ASFLAGS		+=	$(RELAX_FLAG)

From d1dad07cb88fbf601556b4df8ef2bac70fed7143 Mon Sep 17 00:00:00 2001
From: "Leon M. Busch-George" <leon@georgemail.eu>
Date: Fri, 26 Jan 2024 16:21:24 +0100
Subject: [PATCH 1480/1765] Makefile: check for --exclude-libs

While writing to the dynsym is futile, the --exclude-libs options is not
recognized by all linkers (e.g. riscv64-elf-ld.bfd).

Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Makefile b/Makefile
index 66048c38acb..680c19a4bb1 100644
--- a/Makefile
+++ b/Makefile
@@ -167,6 +167,9 @@ endif
 # Check whether the linker supports creating PIEs
 OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
+# Check whether the linker supports --exclude-libs
+OPENSBI_LD_EXCLUDE_LIBS := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) "-Wl,--exclude-libs,ALL" -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
+
 # Check whether the compiler supports -m(no-)save-restore
 CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep -e "-save-restore" >/dev/null && echo n || echo y)
 
@@ -384,7 +387,9 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
+ifeq ($(OPENSBI_LD_EXCLUDE_LIBS),y)
 ELFFLAGS	+=	-Wl,--exclude-libs,ALL
+endif
 ELFFLAGS	+=	-Wl,--build-id=none
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)

From 92e8affb31b21ddc5d1193cf754ce644db7b460a Mon Sep 17 00:00:00 2001
From: "Leon M. Busch-George" <leon@georgemail.eu>
Date: Fri, 26 Jan 2024 16:21:25 +0100
Subject: [PATCH 1481/1765] firmware: always create dynsym section

With a bare-metal linkers (e.g. riscv64-elf-ld), there exists no
dynsym section. The dynsym section is not used by OpenSBI but
discarding it makes linkers with dynamic library support unhappy.

Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.ldS | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index c15ccdbf661..fb47984878f 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -38,6 +38,11 @@
 		. = ALIGN(8);
 	}
 
+	.dynsym :
+	{
+		*(.dynsym)
+	}
+
 	. = ALIGN(0x1000); /* Ensure next section is page aligned */
 
 	.rela.dyn : {

From 4c6b7cb76bfc82db71484c6695cfd5d3a93880e8 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 17 Jan 2024 18:41:58 +0800
Subject: [PATCH 1482/1765] firmware: fw_base.S: Improve loading u32

lwu exists under the current rv64 and should also exist under the rv128
in the future, so I modified the conditions of conditional compilation
so that it can adapt to the future situation

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 856bccdba31..3425fe5565d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -358,7 +358,7 @@ _scratch_init:
 	/* t0 = source FDT start address */
 	add	t0, a1, zero
 	/* t2 = source FDT size in big-endian */
-#if __riscv_xlen == 64
+#if __riscv_xlen > 32
 	lwu	t2, 4(t0)
 #else
 	lw	t2, 4(t0)
@@ -424,7 +424,7 @@ _start_warm:
 
 	/* Find HART count and HART stack size */
 	lla	a4, platform
-#if __riscv_xlen == 64
+#if __riscv_xlen > 32
 	lwu	s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
 	lwu	s8, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 #else
@@ -440,7 +440,7 @@ _start_warm:
 	beqz	s9, 3f
 	li	a4, 0
 1:
-#if __riscv_xlen == 64
+#if __riscv_xlen > 32
 	lwu	a5, (s9)
 #else
 	lw	a5, (s9)
@@ -527,7 +527,7 @@ _hartid_to_scratch:
 	 * t2 -> Temporary
 	 */
 	lla	t2, platform
-#if __riscv_xlen == 64
+#if __riscv_xlen > 32
 	lwu	t0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(t2)
 	lwu	t2, SBI_PLATFORM_HART_COUNT_OFFSET(t2)
 #else

From 9c8b18eb01b80f4a29d9c7be463b645b41fc6664 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Wed, 17 Jan 2024 18:41:59 +0800
Subject: [PATCH 1483/1765] firmware: fw_base.S: remove _runtime_offset

_runtime_offset is a variable not used elsewhere, so remove it.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 3425fe5565d..09894e6496d 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -74,8 +74,6 @@ _try_lottery:
 	REG_L	t0, 0(t0)
 	/* t1 shall has the address of _fw_start */
 	sub	t2, t1, t0
-	lla	t3, _runtime_offset
-	REG_S	t2, (t3)
 	lla	t0, __rel_dyn_start
 	lla	t1, __rel_dyn_end
 	beq	t0, t1, _relocate_done
@@ -500,10 +498,6 @@ _skip_trap_exit_rv32_hyp:
 
 	.data
 	.align 3
-#ifdef FW_PIC
-_runtime_offset:
-	RISCV_PTR	0
-#endif
 _relocate_lottery:
 	RISCV_PTR	0
 _boot_status:

From 67ce5a763cfbcfb2edca7eab3d383e15d1a7330f Mon Sep 17 00:00:00 2001
From: Cheng Yang <yangcheng.work@foxmail.com>
Date: Thu, 8 Feb 2024 11:14:32 +0800
Subject: [PATCH 1484/1765] platform: generic: Add support for specify coldboot
 harts in DT

Added support for the generic platform to specify the set of coldboot
hart in DT. If not specified in DT, all harts are allowed to coldboot
as before.

The functions related to sbi_hartmask are not available before coldboot,
so I used bitmap, and added a new bitmap_test() function to test whether
a certain bit of the bitmap is set.

Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_bitmap.h    |  5 +++
 lib/utils/fdt/fdt_fixup.c   | 17 ++++++++++
 platform/generic/platform.c | 65 ++++++++++++++++++++++++++++++++++++-
 3 files changed, 86 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_bitmap.h b/include/sbi/sbi_bitmap.h
index 4f0ebb63a69..354476c9dd8 100644
--- a/include/sbi/sbi_bitmap.h
+++ b/include/sbi/sbi_bitmap.h
@@ -62,6 +62,11 @@ static inline void bitmap_zero(unsigned long *dst, int nbits)
 	}
 }
 
+static inline int bitmap_test(unsigned long *bmap, int bit)
+{
+	return __test_bit(bit, bmap);
+}
+
 static inline void bitmap_zero_except(unsigned long *dst,
 				      int exception, int nbits)
 {
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 5fc76738077..194e55b3a82 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -385,6 +385,21 @@ int fdt_reserved_memory_fixup(void *fdt)
 	return 0;
 }
 
+void fdt_config_fixup(void *fdt)
+{
+	int chosen_offset, config_offset;
+
+	chosen_offset = fdt_path_offset(fdt, "/chosen");
+	if (chosen_offset < 0)
+		return;
+
+	config_offset = fdt_node_offset_by_compatible(fdt, chosen_offset, "opensbi,config");
+	if (chosen_offset < 0)
+		return;
+
+	fdt_nop_node(fdt, config_offset);
+}
+
 void fdt_fixups(void *fdt)
 {
 	fdt_aplic_fixup(fdt);
@@ -398,4 +413,6 @@ void fdt_fixups(void *fdt)
 #ifndef CONFIG_FDT_FIXUPS_PRESERVE_PMU_NODE
 	fdt_pmu_fixup(fdt);
 #endif
+
+	fdt_config_fixup(fdt);
 }
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index bfd7d318fe6..00c6c2e2735 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -73,6 +73,61 @@ extern struct sbi_platform platform;
 static bool platform_has_mlevel_imsic = false;
 static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
 
+static DECLARE_BITMAP(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS);
+
+/*
+ * The fw_platform_coldboot_harts_init() function is called by fw_platform_init() 
+ * function to initialize the cold boot harts allowed by the generic platform
+ * according to the DT property "cold-boot-harts" in "/chosen/opensbi-config" 
+ * DT node. If there is no "cold-boot-harts" in DT, all harts will be allowed.
+ */
+static void fw_platform_coldboot_harts_init(void *fdt)
+{
+	int chosen_offset, config_offset, cpu_offset, len, err;
+	u32 val32;
+	const u32 *val;
+
+	bitmap_zero(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS);
+
+	chosen_offset = fdt_path_offset(fdt, "/chosen");
+	if (chosen_offset < 0)
+		goto default_config;
+
+	config_offset = fdt_node_offset_by_compatible(fdt, chosen_offset, "opensbi,config");
+	if (config_offset < 0)
+		goto default_config;
+
+	val = fdt_getprop(fdt, config_offset, "cold-boot-harts", &len);
+	len = len / sizeof(u32);
+	if (val && len) {
+		for (int i = 0; i < len; i++) {
+			cpu_offset = fdt_node_offset_by_phandle(fdt,
+							fdt32_to_cpu(val[i]));
+			if (cpu_offset < 0)
+				goto default_config;
+
+			err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
+			if (err)
+				goto default_config;
+
+			if (!fdt_node_is_enabled(fdt, cpu_offset))
+				continue;
+
+			for (int i = 0; i < platform.hart_count; i++) {
+				if (val32 == generic_hart_index2id[i])
+					bitmap_set(generic_coldboot_harts, i, 1);
+			}
+
+		}
+	}
+
+	return;
+
+default_config:
+	bitmap_fill(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS);
+	return;
+}
+
 /*
  * The fw_platform_init() function is called very early on the boot HART
  * OpenSBI reference firmwares so that platform specific code get chance
@@ -133,6 +188,8 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 	platform.heap_size = fw_platform_calculate_heap_size(hart_count);
 	platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
 
+	fw_platform_coldboot_harts_init(fdt);
+
 	/* Return original FDT pointer */
 	return arg1;
 
@@ -146,7 +203,13 @@ static bool generic_cold_boot_allowed(u32 hartid)
 	if (generic_plat && generic_plat->cold_boot_allowed)
 		return generic_plat->cold_boot_allowed(
 						hartid, generic_plat_match);
-	return true;
+
+	for (int i = 0; i < platform.hart_count; i++) {
+		if (hartid == generic_hart_index2id[i])
+			return bitmap_test(generic_coldboot_harts, i);
+	}
+
+	return false;
 }
 
 static int generic_nascent_init(void)

From 23e7e483ee86123dc41f5bcb495ab22054a08697 Mon Sep 17 00:00:00 2001
From: Cheng Yang <yangcheng.work@foxmail.com>
Date: Thu, 8 Feb 2024 11:14:33 +0800
Subject: [PATCH 1485/1765] docs: Add OpenSBI DT configuration guide.

This patch add docs/opensbi_config.md which describes the
"/chosen/opensbi-config" DT node and properties

Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/doxygen.cfg       |  1 +
 docs/opensbi_config.md | 83 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)
 create mode 100644 docs/opensbi_config.md

diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 82f31a7ae6f..608cb1c8190 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -796,6 +796,7 @@ INPUT                  = @@SRC_DIR@@/README.md \
                          @@SRC_DIR@@/docs/platform_requirements.md \
                          @@SRC_DIR@@/docs/library_usage.md \
                          @@SRC_DIR@@/docs/domain_support.md \
+                         @@SRC_DIR@@/docs/opensbi_config.md \
                          @@SRC_DIR@@/docs/firmware \
                          @@SRC_DIR@@/docs/platform \
                          @@SRC_DIR@@/include \
diff --git a/docs/opensbi_config.md b/docs/opensbi_config.md
new file mode 100644
index 00000000000..0c42443b15f
--- /dev/null
+++ b/docs/opensbi_config.md
@@ -0,0 +1,83 @@
+OpenSBI Device Tree Configuration Guideline
+==================================
+
+Some configurations of OpenSBI's Generic Platform can be described
+in the **device tree (DT) blob** (or flattened device tree) passed
+to the OpenSBI firmwares by the previous booting stage. OpenSBI will
+parse and use these configurations during the boot phase, but delete
+them from the device tree at the end of cold boot.
+
+### OpenSBI Configuration Node
+
+All nodes related to OpenSBI configuration should be under the OpenSBI
+configuration DT node. The **/chosen** DT node is the preferred parent
+of the OpenSBI configuration DT node.
+
+The DT properties of a domain configuration DT node are as follows:
+
+* **compatible** (Mandatory) - The compatible string of the OpenSBI
+  configuration. This DT property should have value *"opensbi,config"*
+
+* **cold-boot-harts** (Optional) - If a platform lacks an override
+  cold_boot_allowed() mechanism, this DT property specifies that a
+  set of harts is permitted to perform a cold boot. Otherwise, all
+  harts are allowed to cold boot.
+
+The OpenSBI Configuration Node will be deleted at the end of cold boot
+(replace the node (subtree) with nop tags).
+
+### Example
+
+```text
+    chosen {
+        opensbi-config {
+            compatible = "opensbi,config";
+            cold-boot-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
+        };
+    };
+
+    cpus {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        timebase-frequency = <10000000>;
+
+        cpu0: cpu@0 {
+            device_type = "cpu";
+            reg = <0x00>;
+            compatible = "riscv";
+            ...
+        };
+
+        cpu1: cpu@1 {
+            device_type = "cpu";
+            reg = <0x01>;
+            compatible = "riscv";
+            ...
+        };
+
+        cpu2: cpu@2 {
+            device_type = "cpu";
+            reg = <0x02>;
+            compatible = "riscv";
+            ...
+        };
+
+        cpu3: cpu@3 {
+            device_type = "cpu";
+            reg = <0x03>;
+            compatible = "riscv";
+            ...
+        };
+
+        cpu4: cpu@4 {
+            device_type = "cpu";
+            reg = <0x04>;
+            compatible = "riscv";
+            ...
+        };
+    };
+
+    uart1: serial@10011000 {
+        ...
+    };
+```

From 8df836d7723f1b5e3b365a55545852b63ae690ca Mon Sep 17 00:00:00 2001
From: Cheng Yang <yangcheng.work@foxmail.com>
Date: Thu, 8 Feb 2024 11:14:34 +0800
Subject: [PATCH 1486/1765] platform: generic: Parse system suspend test from
 config node.

This patch update generic_domains_init() so that "system-suspend-test"
is parsed from "/chosen/opensbi-config" DT node.

Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 00c6c2e2735..1f46b76c4d7 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -316,7 +316,7 @@ static int generic_domains_init(void)
 
 	if (offset >= 0) {
 		offset = fdt_node_offset_by_compatible(fdt, offset,
-						       "opensbi,domain,config");
+						       "opensbi,config");
 		if (offset >= 0 &&
 		    fdt_get_property(fdt, offset, "system-suspend-test", NULL))
 			sbi_system_suspend_test_enable();

From 46c8c6582db1186ed8d474ff59df428e0e6dd89b Mon Sep 17 00:00:00 2001
From: Cheng Yang <yangcheng.work@foxmail.com>
Date: Thu, 8 Feb 2024 11:14:35 +0800
Subject: [PATCH 1487/1765] docs: move documentation of system suspend test.

This patch move documentation of "system-suspend-test" from
docs/domain_support.md to docs/opensbi_config.md

Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md | 4 ----
 docs/opensbi_config.md | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index b285d65aec0..65b61427166 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -126,9 +126,6 @@ The DT properties of a domain configuration DT node are as follows:
 * **compatible** (Mandatory) - The compatible string of the domain
   configuration. This DT property should have value *"opensbi,domain,config"*
 
-* **system-suspend-test** (Optional) - When present, enable a system
-  suspend test implementation which simply waits five seconds and issues a WFI.
-
 ### Domain Memory Region Node
 
 The domain memory region DT node describes details of a memory region and
@@ -237,7 +234,6 @@ be done:
     chosen {
         opensbi-domains {
             compatible = "opensbi,domain,config";
-            system-suspend-test;
 
             tmem: tmem {
                 compatible = "opensbi,domain,memregion";
diff --git a/docs/opensbi_config.md b/docs/opensbi_config.md
index 0c42443b15f..1b710f1a105 100644
--- a/docs/opensbi_config.md
+++ b/docs/opensbi_config.md
@@ -23,6 +23,9 @@ The DT properties of a domain configuration DT node are as follows:
   set of harts is permitted to perform a cold boot. Otherwise, all
   harts are allowed to cold boot.
 
+* **system-suspend-test** (Optional) - When present, enable a system
+  suspend test implementation which simply waits five seconds and issues a WFI.
+
 The OpenSBI Configuration Node will be deleted at the end of cold boot
 (replace the node (subtree) with nop tags).
 
@@ -33,6 +36,7 @@ The OpenSBI Configuration Node will be deleted at the end of cold boot
         opensbi-config {
             compatible = "opensbi,config";
             cold-boot-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
+            system-suspend-test;
         };
     };
 

From 88273fe19e97e76aa2645add370324840dc7222a Mon Sep 17 00:00:00 2001
From: "yang.zhang" <yang.zhang@hexintek.com>
Date: Thu, 1 Feb 2024 10:01:26 +0800
Subject: [PATCH 1488/1765] lib: sbi_pmu: Before using we should ensure PMU
 init done

If trap earlier before sbi_pmu_init done, some path would call
sbi_pmu_ctr_incr_fw, then it would go wrong:
1. if phs_ptr_offset is zero, then it get a wrong pmu state ptr
2. if phs_ptr_offset is ok, but we didn't call pmu_set_hart_state_ptr
it would be NULL POINT

Of course, the above situation will not occur at present, but it is
reasonable to check before using.

Signed-off-by: yang.zhang <yang.zhang@hexintek.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 6209ccc95d9..62a6465a1f1 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -74,7 +74,7 @@ struct sbi_pmu_hart_state {
 static unsigned long phs_ptr_offset;
 
 #define pmu_get_hart_state_ptr(__scratch)				\
-	sbi_scratch_read_type((__scratch), void *, phs_ptr_offset)
+	phs_ptr_offset ? sbi_scratch_read_type((__scratch), void *, phs_ptr_offset) : NULL
 
 #define pmu_thishart_state_ptr()					\
 	pmu_get_hart_state_ptr(sbi_scratch_thishart_ptr())
@@ -207,6 +207,9 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
 	uint32_t event_code;
 	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 
+	if (unlikely(!phs))
+		return SBI_EINVAL;
+
 	event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
 	if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
 		return SBI_EINVAL;
@@ -432,6 +435,10 @@ int sbi_pmu_ctr_start(unsigned long cbase, unsigned long cmask,
 		      unsigned long flags, uint64_t ival)
 {
 	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+
+	if (unlikely(!phs))
+		return SBI_EINVAL;
+
 	int event_idx_type;
 	uint32_t event_code;
 	int ret = SBI_EINVAL;
@@ -535,6 +542,10 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		     unsigned long flag)
 {
 	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+
+	if (unlikely(!phs))
+		return SBI_EINVAL;
+
 	int ret = SBI_EINVAL;
 	int event_idx_type;
 	uint32_t event_code;
@@ -794,6 +805,10 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 			  uint64_t event_data)
 {
 	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+
+	if (unlikely(!phs))
+		return SBI_EINVAL;
+
 	int ret, event_type, ctr_idx = SBI_ENOTSUPP;
 	u32 event_code;
 
@@ -869,6 +884,9 @@ int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id)
 	uint64_t *fcounter = NULL;
 	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
 
+	if (unlikely(!phs))
+		return 0;
+
 	if (likely(!phs->fw_counters_started))
 		return 0;
 
@@ -961,13 +979,18 @@ void sbi_pmu_set_device(const struct sbi_pmu_device *dev)
 
 void sbi_pmu_exit(struct sbi_scratch *scratch)
 {
+	struct sbi_pmu_hart_state *phs = pmu_get_hart_state_ptr(scratch);
+
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_11)
 		csr_write(CSR_MCOUNTINHIBIT, 0xFFFFFFF8);
 
 	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
 		csr_write(CSR_MCOUNTEREN, -1);
 
-	pmu_reset_event_map(pmu_get_hart_state_ptr(scratch));
+	if (unlikely(!phs))
+		return;
+
+	pmu_reset_event_map(phs);
 }
 
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)

From 034af1f85e8147cb5753933d231f5bf12c23bfb4 Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:14 +0100
Subject: [PATCH 1489/1765] platform: starfive: correct system clock device
 tree node

Starfive names the system clock device tree node "starfive,jh7110-clkgen"
in all their git repositories. However, a different name is used in
upstream U-Boot (and also Linux): "starfive,jh7110-syscrg". Since
OpenSBI gets the device tree from U-Boot, this inconsistency leads the
problem that OpenSBI doesn't know the system clock device exists.

Correct this name to keep the consistency.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Acked-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index dcd6306be5f..4b221750e0b 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -252,7 +252,7 @@ static int starfive_jh7110_inst_init(void *fdt)
 		jh7110_inst.pmu_reg_base = addr;
 	}
 
-	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-clkgen");
+	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-syscrg");
 	if (-1 < noff) {
 		rc = fdt_get_node_addr_size(fdt, noff, 0, &addr, NULL);
 		if (rc)

From 4d8569df7bd73238d8a02bb5ec850ed3c3c97093 Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:15 +0100
Subject: [PATCH 1490/1765] platform: starfive: get I2C offset address from
 clocks property

The current code gets the I2C offset address using the device tree node
name: it get the I2C device index from the 4th character in the node
name (for example, "i2c5" -> i2c device 5). However, the device tree
node's name in U-Boot is actually just "i2c" without the number, so the
current code cannot be used with the device tree from U-Boot.

Get the I2C offset address from the "clocks" property instead.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 4b221750e0b..efa4029f8bb 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -29,7 +29,7 @@ struct pmic {
 struct jh7110 {
 	u64 pmu_reg_base;
 	u64 clk_reg_base;
-	u32 i2c_index;
+	u32 i2c_clk_offset;
 };
 
 static struct pmic pmic_inst;
@@ -67,7 +67,6 @@ static u32 selected_hartid = -1;
 #define AXP15060_POWER_OFF_BIT		BIT(7)
 #define AXP15060_RESET_BIT		BIT(6)
 
-#define I2C_APB_CLK_OFFSET		0x228
 #define I2C_APB_CLK_ENABLE_BIT		BIT(31)
 
 static int pm_system_reset_check(u32 type, u32 reason)
@@ -163,10 +162,7 @@ static void pmic_i2c_clk_enable(void)
 	unsigned long clock_base;
 	unsigned int val;
 
-	clock_base = jh7110_inst.clk_reg_base +
-		I2C_APB_CLK_OFFSET +
-		(jh7110_inst.i2c_index << 2);
-
+	clock_base = jh7110_inst.clk_reg_base + jh7110_inst.i2c_clk_offset;
 	val = readl((void *)clock_base);
 
 	if (!val)
@@ -241,7 +237,8 @@ static struct fdt_reset fdt_reset_pmic = {
 static int starfive_jh7110_inst_init(void *fdt)
 {
 	int noff, rc = 0;
-	const char *name;
+	const fdt32_t *val;
+	int len;
 	u64 addr;
 
 	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-pmu");
@@ -261,9 +258,16 @@ static int starfive_jh7110_inst_init(void *fdt)
 	}
 
 	if (pmic_inst.adapter) {
-		name = fdt_get_name(fdt, pmic_inst.adapter->id, NULL);
-		if (!sbi_strncmp(name, "i2c", 3))
-			jh7110_inst.i2c_index = name[3] - '0';
+		/*
+		 * The clocks property looks like this:
+		 *    clocks = <&syscrg JH7110_SYSCLK_I2C5_APB>;
+		 *
+		 * So, check that the length is 8 bytes, and get
+		 * the offset from the second value.
+		 */
+		val = fdt_getprop(fdt, pmic_inst.adapter->id, "clocks", &len);
+		if (val && len == 8)
+			jh7110_inst.i2c_clk_offset = fdt32_to_cpu(val[1]) << 2;
 		else
 			rc = SBI_EINVAL;
 	}

From 5335340d97a1fb6f7dfcad9f3ad602491b69ece1 Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:16 +0100
Subject: [PATCH 1491/1765] platform: starfive: remove redundant compatibility
 check in pmic_ops

pmic_ops() is only called if a compatible device is found in device
tree. It is redundant for this function to check the compability again.
Remove this check.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 36 ++++++++++++------------------
 1 file changed, 14 insertions(+), 22 deletions(-)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index efa4029f8bb..0e37d564298 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -23,7 +23,6 @@
 struct pmic {
 	struct i2c_adapter *adapter;
 	u32 dev_addr;
-	const char *compatible;
 };
 
 struct jh7110 {
@@ -129,32 +128,26 @@ static void pmic_ops(struct pmic *pmic, int type)
 	u8 val;
 
 	ret = shutdown_device_power_domain();
-
 	if (ret)
 		return;
 
-	if (!sbi_strcmp("stf,axp15060-regulator", pmic->compatible)) {
-		ret = i2c_adapter_reg_read(pmic->adapter, pmic->dev_addr,
-					   AXP15060_POWER_REG, &val);
-
-		if (ret) {
-			sbi_printf("%s: cannot read pmic power register\n",
-				   __func__);
-			return;
-		}
+	ret = i2c_adapter_reg_read(pmic->adapter, pmic->dev_addr,
+				   AXP15060_POWER_REG, &val);
+	if (ret) {
+		sbi_printf("%s: cannot read pmic power register\n", __func__);
+		return;
+	}
 
+	val |= AXP15060_POWER_OFF_BIT;
+	if (type == SBI_SRST_RESET_TYPE_SHUTDOWN)
 		val |= AXP15060_POWER_OFF_BIT;
-		if (type == SBI_SRST_RESET_TYPE_SHUTDOWN)
-			val |= AXP15060_POWER_OFF_BIT;
-		else
-			val |= AXP15060_RESET_BIT;
+	else
+		val |= AXP15060_RESET_BIT;
 
-		ret = i2c_adapter_reg_write(pmic->adapter, pmic->dev_addr,
-					    AXP15060_POWER_REG, val);
-		if (ret)
-			sbi_printf("%s: cannot write pmic power register\n",
-				   __func__);
-	}
+	ret = i2c_adapter_reg_write(pmic->adapter, pmic->dev_addr,
+					AXP15060_POWER_REG, val);
+	if (ret)
+		sbi_printf("%s: cannot write pmic power register\n", __func__);
 }
 
 static void pmic_i2c_clk_enable(void)
@@ -206,7 +199,6 @@ static int pm_reset_init(void *fdt, int nodeoff,
 		return rc;
 
 	pmic_inst.dev_addr = addr;
-	pmic_inst.compatible = match->compatible;
 
 	i2c_bus = fdt_parent_offset(fdt, nodeoff);
 	if (i2c_bus < 0)

From 80ae0464c157cc7a769c2bb1140424409ee4fc1a Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:17 +0100
Subject: [PATCH 1492/1765] platform: starfive: rename "stf,axp15060-regulator"
 -> "x-powers,axp15060"

OpenSBI uses the device tree compatible string "stf,axp15060-regulator"
for the regulator node. However, the string used by U-Boot (and Linux)
is actually "x-powers,axp15060". As OpenSBI gets the device tree from
U-Boot, this causes the regulator device to be undetected, and OpenSBI
does not use this device to perform board reset/shutdown.

Rename this device tree compatible string to match U-Boot (and Linux).

Signed-off-by: Nam Cao <namcao@linutronix.de>
Acked-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 0e37d564298..16b94eaea0f 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -217,7 +217,7 @@ static int pm_reset_init(void *fdt, int nodeoff,
 }
 
 static const struct fdt_match pm_reset_match[] = {
-	{ .compatible = "stf,axp15060-regulator", .data = (void *)true },
+	{ .compatible = "x-powers,axp15060", .data = (void *)true },
 	{ },
 };
 

From 3edf0447df9cb5e63f5f584ab97357f3c5aa0fbf Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:18 +0100
Subject: [PATCH 1493/1765] platform: starfive: return error if needed devices
 are not present

Jh7110's reset driver needs power management device and clock controller
device to work. Currently, the driver proceed anyway without these
devices, and invalid addresses (jh7110_inst.pmu_reg_base and
jh7110_inst.clk_reg_base) are used during reboot, which causes
unpredictable broken behaviors.

If these devices are not present, return -SBI_ENODEV.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 16b94eaea0f..1ac0854c372 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -239,6 +239,8 @@ static int starfive_jh7110_inst_init(void *fdt)
 		if (rc)
 			goto err;
 		jh7110_inst.pmu_reg_base = addr;
+	} else {
+		return -SBI_ENODEV;
 	}
 
 	noff = fdt_node_offset_by_compatible(fdt, -1, "starfive,jh7110-syscrg");
@@ -247,6 +249,8 @@ static int starfive_jh7110_inst_init(void *fdt)
 		if (rc)
 			goto err;
 		jh7110_inst.clk_reg_base = addr;
+	} else {
+		return -SBI_ENODEV;
 	}
 
 	if (pmic_inst.adapter) {

From 741e941cb13c79c6355a98957d7fe6291f262cb5 Mon Sep 17 00:00:00 2001
From: Nam Cao <namcao@linutronix.de>
Date: Thu, 22 Feb 2024 09:16:19 +0100
Subject: [PATCH 1494/1765] platform: starfive: call
 starfive_jh7110_inst_init() in pm_reset_init()

The function starfive_jh7110_inst_init() initialize some power
management unit address and clock addresses, needed for the reset
driver. It doesn't do anything else, and also the reset driver doesn't
work without calling this function. Thus, it does not make much sense
that this function is independent from pm_reset_init().

Delete the separate call to starfive_jh7110_inst_init(), and instead
just call this function inside pm_reset_init().

Doing this also fixes another problem: if starfive_jh7110_inst_init()
returns an error code, it gets propagated to final_init() and OpenSBI
hangs. This hang is not necessary, because failures within
starfive_jh7110_inst_init() only mean OpenSBI cannot perform reboot or
shutdown, but the system can still function normally.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/starfive/jh7110.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 1ac0854c372..62dcd25613e 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -186,6 +186,8 @@ static struct sbi_system_reset_device pm_reset = {
 	.system_reset = pm_system_reset
 };
 
+static int starfive_jh7110_inst_init(void *fdt);
+
 static int pm_reset_init(void *fdt, int nodeoff,
 			 const struct fdt_match *match)
 {
@@ -211,6 +213,10 @@ static int pm_reset_init(void *fdt, int nodeoff,
 
 	pmic_inst.adapter = adapter;
 
+	rc = starfive_jh7110_inst_init(fdt);
+	if (rc)
+		return rc;
+
 	sbi_system_reset_add_device(&pm_reset);
 
 	return 0;
@@ -278,7 +284,6 @@ static int starfive_jh7110_final_init(bool cold_boot,
 
 	if (cold_boot) {
 		fdt_reset_driver_init(fdt, &fdt_reset_pmic);
-		return starfive_jh7110_inst_init(fdt);
 	}
 
 	return 0;

From 7227cddcb4c09cf63915011c409b7c1fe4f0c014 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 23 Feb 2024 16:18:12 +0800
Subject: [PATCH 1495/1765] firmware: Add relocatable FW_JUMP_ADDR and
 FW_JUMP_FDT_ADDR

If FW_PIC=y is defined, the fw_jump.bin will be broken if
FW_TEXT_START is wrong. This is not the desired behavior.

Add two new variables to identify relocatable jump address:
FW_JUMP_OFFSET and FW_JUMP_FDT_ADDR. To keep the existing
ABI, FW_JUMP_ADDR and FW_JUMP_FDT_ADDR is prefered if they
are defined.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_jump.S  | 18 ++++++++++++++----
 firmware/objects.mk |  6 ++++++
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_jump.S b/firmware/fw_jump.S
index ac74dc64389..ebf297f4632 100644
--- a/firmware/fw_jump.S
+++ b/firmware/fw_jump.S
@@ -46,6 +46,10 @@ fw_save_info:
 fw_next_arg1:
 #ifdef FW_JUMP_FDT_ADDR
 	li	a0, FW_JUMP_FDT_ADDR
+#elif defined(FW_JUMP_FDT_OFFSET)
+	lla	a0, _fw_start
+	li	a1, FW_JUMP_FDT_OFFSET
+	add	a0, a0, a1
 #else
 	add	a0, a1, zero
 #endif
@@ -59,8 +63,16 @@ fw_next_arg1:
 	 * The next address should be returned in 'a0'.
 	 */
 fw_next_addr:
+#ifdef FW_JUMP_ADDR
 	lla	a0, _jump_addr
 	REG_L	a0, (a0)
+#elif defined(FW_JUMP_OFFSET)
+	lla	a0, _fw_start
+	li	a1, FW_JUMP_OFFSET
+	add	a0, a0, a1
+#else
+#error "Must define at least FW_JUMP_ADDR or FW_JUMP_OFFSET"
+#endif
 	ret
 
 	.section .entry, "ax", %progbits
@@ -86,11 +98,9 @@ fw_options:
 	add	a0, zero, zero
 	ret
 
-#ifndef FW_JUMP_ADDR
-#error "Must define FW_JUMP_ADDR"
-#endif
-
+#ifdef FW_JUMP_ADDR
 	.section .rodata
 	.align 3
 _jump_addr:
 	RISCV_PTR FW_JUMP_ADDR
+#endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index a1704c48d81..fef090a4318 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -38,9 +38,15 @@ endif
 firmware-bins-$(FW_DYNAMIC) += fw_dynamic.bin
 
 firmware-bins-$(FW_JUMP) += fw_jump.bin
+ifdef FW_JUMP_OFFSET
+firmware-genflags-$(FW_JUMP) += -DFW_JUMP_OFFSET=$(FW_JUMP_OFFSET)
+endif
 ifdef FW_JUMP_ADDR
 firmware-genflags-$(FW_JUMP) += -DFW_JUMP_ADDR=$(FW_JUMP_ADDR)
 endif
+ifdef FW_JUMP_FDT_OFFSET
+firmware-genflags-$(FW_JUMP) += -DFW_JUMP_FDT_OFFSET=$(FW_JUMP_FDT_OFFSET)
+endif
 ifdef FW_JUMP_FDT_ADDR
 firmware-genflags-$(FW_JUMP) += -DFW_JUMP_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
 endif

From f056939d8a422d8719f185b44d4abed278f3ee8a Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 23 Feb 2024 16:18:13 +0800
Subject: [PATCH 1496/1765] firmware: Add relocatable FW_PAYLOAD_FDT_ADDR

The fw_payload.bin has the same issue as described in previous patch.
But only FW_PAYLOAD_FDT_ADDR is affected.

Add FW_PAYLOAD_FDT_OFFSET to identify relocatable payload fdt address.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_payload.S | 4 ++++
 firmware/objects.mk   | 3 +++
 2 files changed, 7 insertions(+)

diff --git a/firmware/fw_payload.S b/firmware/fw_payload.S
index c53a3bb030a..3c8433eafab 100644
--- a/firmware/fw_payload.S
+++ b/firmware/fw_payload.S
@@ -46,6 +46,10 @@ fw_save_info:
 fw_next_arg1:
 #ifdef FW_PAYLOAD_FDT_ADDR
 	li	a0, FW_PAYLOAD_FDT_ADDR
+#elif defined(FW_PAYLOAD_FDT_OFFSET)
+	lla	a0, _fw_start
+	li	a1, FW_PAYLOAD_FDT_OFFSET
+	add	a0, a0, a1
 #else
 	add	a0, a1, zero
 #endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index fef090a4318..3ae0a28f710 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -65,6 +65,9 @@ ifdef FW_PAYLOAD_ALIGN
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_ALIGN=$(FW_PAYLOAD_ALIGN)
 endif
 
+ifdef FW_PAYLOAD_FDT_OFFSET
+firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_OFFSET=$(FW_PAYLOAD_FDT_OFFSET)
+endif
 ifdef FW_PAYLOAD_FDT_ADDR
 firmware-genflags-$(FW_PAYLOAD) += -DFW_PAYLOAD_FDT_ADDR=$(FW_PAYLOAD_FDT_ADDR)
 endif

From 2cff7f350f146b72fed1b9bd29f3a72b94eed020 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 23 Feb 2024 16:18:14 +0800
Subject: [PATCH 1497/1765] platform: Apply relocatable address

Since jump and payload firmware support relocatable address, make
general platform use runtime relocatable address.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/objects.mk  |  8 ++++----
 platform/template/objects.mk | 17 +++++++++++++++++
 2 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index 136853eeb1d..85aa723a548 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -27,12 +27,12 @@ FW_DYNAMIC=y
 FW_JUMP=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB aligned for 32-bit system
-  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x400000)))
+  FW_JUMP_OFFSET=0x400000
 else
   # This needs to be 2MB aligned for 64-bit system
-  FW_JUMP_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x200000)))
+  FW_JUMP_OFFSET=0x200000
 endif
-FW_JUMP_FDT_ADDR=$(shell printf "0x%X" $$(($(FW_TEXT_START) + 0x2200000)))
+FW_JUMP_FDT_OFFSET=0x2200000
 FW_PAYLOAD=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
   # This needs to be 4MB aligned for 32-bit system
@@ -41,4 +41,4 @@ else
   # This needs to be 2MB aligned for 64-bit system
   FW_PAYLOAD_OFFSET=0x200000
 endif
-FW_PAYLOAD_FDT_ADDR=$(FW_JUMP_FDT_ADDR)
+FW_PAYLOAD_FDT_OFFSET=$(FW_JUMP_FDT_OFFSET)
diff --git a/platform/template/objects.mk b/platform/template/objects.mk
index 0025928f35c..b143cbc4ebc 100644
--- a/platform/template/objects.mk
+++ b/platform/template/objects.mk
@@ -63,6 +63,17 @@ FW_JUMP=<y|n>
 # This needs to be 4MB aligned for 32-bit support
 # This needs to be 2MB aligned for 64-bit support
 # ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# FW_JUMP_OFFSET=0x400000
+# else
+# FW_JUMP_OFFSET=0x200000
+# endif
+# FW_JUMP_FDT_OFFSET=0x2200000
+#
+# You can use fixed address for jump firmware as an alternative option,
+# but this may fail when setting wrong FW_TEXT_START. Use with caution.
+# SBI will prefer "<X>_ADDR" if both "<X>_ADDR" and "<X>_OFFSET" are
+# defined
+# ifeq ($(PLATFORM_RISCV_XLEN), 32)
 # FW_JUMP_ADDR=0x80400000
 # else
 # FW_JUMP_ADDR=0x80200000
@@ -84,4 +95,10 @@ FW_PAYLOAD_OFFSET=0x200000
 endif
 # FW_PAYLOAD_ALIGN=0x1000
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
+# FW_PAYLOAD_FDT_OFFSET=0x2200000
+#
+# You can use fixed address for payload firmware as an alternative option,
+# but this may fail when setting wrong FW_TEXT_START. Use with caution.
+# SBI will prefer "FW_PAYLOAD_FDT_ADDR" if both "FW_PAYLOAD_FDT_OFFSET"
+# and "FW_PAYLOAD_FDT_ADDR" are defined.
 # FW_PAYLOAD_FDT_ADDR=0x82200000

From 96a35db63af01977aea403b10ca80a77e101f7e4 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Fri, 23 Feb 2024 16:18:15 +0800
Subject: [PATCH 1498/1765] docs/firmware: document new options for jump and
 payload firmwares

Adding relocatable address brings new configuration options for jump
and payload firmwares. Describe these new options in documentation.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw_jump.md    | 17 ++++++++++++++---
 docs/firmware/fw_payload.md |  5 +++++
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 3e883fa814f..2ee6b291fa0 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -31,9 +31,14 @@ follows:
 
 * **FW_JUMP_ADDR** - Address of the entry point of the booting stage to be
   executed following OpenSBI firmware. This address generally corresponds
-  exactly to the address where this next booting stage was loaded. This is a
-  mandatory parameter. Compilation errors will result from not defining this
-  address.
+  exactly to the address where this next booting stage was loaded.
+  At least one of *FW_JUMP_ADDR* and *FW_JUMP_OFFSET* (see below) should be
+  defined. Compilation errors will result from not defining one of them.
+
+* **FW_JUMP_OFFSET** - Address offset from the *FW_TEXT_START* where the
+  entry point of the next booting stage is located. This offset is used as
+  relocatable address of the next booting stage entry point. If *FW_JUMP_ADDR*
+  is also defined, the firmware will prefer *FW_JUMP_ADDR*.
 
 * **FW_JUMP_FDT_ADDR** - Address where the *flattened device tree (FDT file)*
   passed by the prior booting stage will be placed in memory before executing
@@ -57,6 +62,12 @@ follows:
   echo fdt overlaps kernel, increase FW_JUMP_FDT_ADDR
   ```
 
+* **FW_JUMP_FDT_OFFSET** - Address offset from the *FW_TEXT_START* where
+  the FDT will be passed to the next booting stage. This offset is used
+  as relocatable address of the FDT passed to the next booting stage. If
+  *FW_JUMP_FDT_ADDR* is also defined, the firmware will prefer
+  *FW_JUMP_FDT_ADDR*.
+
 *FW_JUMP* Example
 -----------------
 
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index 113604a8b11..a67fc50b868 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -62,6 +62,11 @@ file. The parameters currently defined are as follows:
   firmware will pass the FDT address passed by the previous booting stage
   to the next booting stage.
 
+* **FW_PAYLOAD_FDT_OFFSET** - Address offset from the *FW_TEXT_START* where
+  the FDT will be passed to the next booting stage. This offset is used as
+  relocatable address of the FDT passed to the next booting stage. If
+  *FW_PAYLOAD_FDT_ADDR* is also defined, the firmware will prefer *FW_PAYLOAD_FDT_ADDR*.
+
 *FW_PAYLOAD* Example
 --------------------
 

From 322b59847534cbbf484190b0957fb32bee36e2ec Mon Sep 17 00:00:00 2001
From: Joshua Yeong <joshua.yeong@starfivetech.com>
Date: Mon, 19 Feb 2024 15:14:06 +0800
Subject: [PATCH 1499/1765] lib: sbi_hsm: Restor hart state to stop when fails
 to start

Hart state should change back to hart stop when hsm_device_hart_start()
or sbi_ipi_raw_send() fails to perform hart start.

Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 3d60ceb749a..be48d64eb78 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -360,6 +360,10 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 
 	if (!rc)
 		return 0;
+
+	/* If it fails to start, change hart state back to stop */
+	__sbi_hsm_hart_change_state(hdata, SBI_HSM_STATE_START_PENDING,
+				    SBI_HSM_STATE_STOPPED);
 err:
 	hsm_start_ticket_release(hdata);
 	return rc;

From 6bb6b61c27eb07da375213a7a1bb0f8e3fad663a Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Fri, 16 Feb 2024 16:06:08 -0800
Subject: [PATCH 1500/1765] lib: sbi: Add support for smcsrind and smcdeleg

Smcsrind allows generic indirect CSR access mechanism while
Smcdeleg allows delegating hpmcounters in Supervisor mode.

Enable both extensions and set the appropriate bits in mstateen
and menvcfg.

Co-developed-by: Kaiwen Xue <kaiwenxue1@gmail.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 25 ++++++++++++++++++++++---
 include/sbi/sbi_hart.h       |  8 ++++++++
 lib/sbi/sbi_hart.c           | 16 ++++++++++++----
 3 files changed, 42 insertions(+), 7 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index e74cc0df1c4..eb5306973d6 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -209,6 +209,7 @@
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
+#define ENVCFG_CDE			(_ULL(1) << 60)
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
 #define ENVCFG_CBIE_SHIFT		4
@@ -314,6 +315,9 @@
 /* Supervisor Configuration */
 #define CSR_SENVCFG			0x10a
 
+/* Supervisor Conter Inhibit */
+#define CSR_SCOUNTINHIBIT		0x120
+
 /* Supervisor Trap Handling */
 #define CSR_SSCRATCH			0x140
 #define CSR_SEPC			0x141
@@ -328,9 +332,14 @@
 /* Supervisor Protection and Translation */
 #define CSR_SATP			0x180
 
-/* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
+/* Supervisor Indirect Register Alias */
 #define CSR_SISELECT			0x150
 #define CSR_SIREG			0x151
+#define CSR_SIREG2          		0x152
+#define CSR_SIREG3          		0x153
+#define CSR_SIREG4          		0x155
+#define CSR_SIREG5          		0x156
+#define CSR_SIREG6          		0x157
 
 /* Supervisor-Level Interrupts (AIA) */
 #define CSR_STOPEI			0x15c
@@ -391,9 +400,14 @@
 #define CSR_HVIPRIO1			0x646
 #define CSR_HVIPRIO2			0x647
 
-/* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
+/* Virtual Supervisor Indirect Alias */
 #define CSR_VSISELECT			0x250
 #define CSR_VSIREG			0x251
+#define CSR_VSIREG2         		0x252
+#define CSR_VSIREG3         		0x253
+#define CSR_VSIREG4         		0x255
+#define CSR_VSIREG5         		0x256
+#define CSR_VSIREG6         		0x257
 
 /* VS-Level Interrupts (H-extension with AIA) */
 #define CSR_VSTOPEI			0x25c
@@ -694,9 +708,14 @@
 #define CSR_DSCRATCH0			0x7b2
 #define CSR_DSCRATCH1			0x7b3
 
-/* Machine-Level Window to Indirectly Accessed Registers (AIA) */
+/* Machine Indirect Register Alias */
 #define CSR_MISELECT			0x350
 #define CSR_MIREG			0x351
+#define CSR_MIREG2          		0x352
+#define CSR_MIREG3          		0x353
+#define CSR_MIREG4          		0x355
+#define CSR_MIREG5          		0x356
+#define CSR_MIREG6          		0x357
 
 /* Machine-Level Interrupts (AIA) */
 #define CSR_MTOPEI			0x35c
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 10dc3df5d2f..cc78eec6f65 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -55,6 +55,14 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SVPBMT,
 	/** Hart has debug trigger extension */
 	SBI_HART_EXT_SDTRIG,
+	/** Hart has Smcsrind extension */
+	SBI_HART_EXT_SMCSRIND,
+	/** Hart has Smcdeleg extension */
+	SBI_HART_EXT_SMCDELEG,
+	/** Hart has Sscsrind extension */
+	SBI_HART_EXT_SSCSRIND,
+	/** Hart has Ssccfg extension */
+	SBI_HART_EXT_SSCCFG,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a0ab0c64003..3d1369441c0 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -95,11 +95,16 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		mstateen_val |= SMSTATEEN0_HSENVCFG;
 
 		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA))
-			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
-					SMSTATEEN0_IMSIC);
+			mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_IMSIC);
 		else
-			mstateen_val &= ~(SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
-					SMSTATEEN0_IMSIC);
+			mstateen_val &= ~(SMSTATEEN0_AIA | SMSTATEEN0_IMSIC);
+
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA) ||
+		    sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCSRIND))
+			mstateen_val |= (SMSTATEEN0_SVSLCT);
+		else
+			mstateen_val &= ~(SMSTATEEN0_SVSLCT);
+
 		csr_write(CSR_MSTATEEN0, mstateen_val);
 #if __riscv_xlen == 32
 		csr_write(CSR_MSTATEEN0H, mstateen_val >> 32);
@@ -129,6 +134,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		__set_menvcfg_ext(SBI_HART_EXT_SVPBMT, ENVCFG_PBMTE)
 #endif
 		__set_menvcfg_ext(SBI_HART_EXT_SSTC, ENVCFG_STCE)
+		__set_menvcfg_ext(SBI_HART_EXT_SMCDELEG, ENVCFG_CDE);
 
 #undef __set_menvcfg_ext
 
@@ -658,6 +664,8 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(zicbom, SBI_HART_EXT_ZICBOM),
 	__SBI_HART_EXT_DATA(svpbmt, SBI_HART_EXT_SVPBMT),
 	__SBI_HART_EXT_DATA(sdtrig, SBI_HART_EXT_SDTRIG),
+	__SBI_HART_EXT_DATA(smcsrind, SBI_HART_EXT_SMCSRIND),
+	__SBI_HART_EXT_DATA(smcdeleg, SBI_HART_EXT_SMCDELEG),
 };
 
 /**

From bc366780c2efeb26149774bd17f0afe4ad5c7d62 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 22 Feb 2024 17:18:38 +0800
Subject: [PATCH 1501/1765] platform: andes: Drop andes_pmu_setup()

andes_pmu_setup() [1] was intended to populate event mapping from
hardcoded arrays, however, this increases firmware size and we should
just use PMU DT node [2] instead.

Link: https://lists.infradead.org/pipermail/opensbi/2023-November/006032.html [1]
Link: https://github.com/riscv-software-src/opensbi/blob/v1.4/docs/pmu_support.md#example-3 [2]
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/andes_pmu.c         | 12 ------------
 platform/generic/include/andes/andes_hpm.h | 12 ------------
 2 files changed, 24 deletions(-)
 delete mode 100644 platform/generic/include/andes/andes_hpm.h

diff --git a/platform/generic/andes/andes_pmu.c b/platform/generic/andes/andes_pmu.c
index 4b2d45b062e..479fb9a6cd2 100644
--- a/platform/generic/andes/andes_pmu.c
+++ b/platform/generic/andes/andes_pmu.c
@@ -6,7 +6,6 @@
  */
 
 #include <andes/andes45.h>
-#include <andes/andes_hpm.h>
 #include <andes/andes_pmu.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
@@ -86,20 +85,9 @@ int andes_pmu_extensions_init(const struct fdt_match *match,
 int andes_pmu_init(const struct fdt_match *match)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	void *fdt = fdt_get_address();
-	int pmu_offset;
 
 	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_XANDESPMU))
 		sbi_pmu_set_device(&andes_pmu);
 
-	/*
-	 * Populate default mappings if device-tree doesn't
-	 * provide a valid pmu node.
-	 */
-	pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
-	if (pmu_offset < 0)
-		return (pmu_offset == -FDT_ERR_NOTFOUND) ? andes_pmu_setup()
-							 : SBI_EFAIL;
-
 	return 0;
 }
diff --git a/platform/generic/include/andes/andes_hpm.h b/platform/generic/include/andes/andes_hpm.h
deleted file mode 100644
index b4d71b9dd26..00000000000
--- a/platform/generic/include/andes/andes_hpm.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2023 Andes Technology Corporation
- */
-
-#ifndef _ANDES_HPM_H_
-#define _ANDES_HPM_H_
-
-static inline int andes_pmu_setup(void) { return 0; }
-
-#endif /* _ANDES_HPM_H_ */

From 748bef1f9d6c4da16d07a8152566f3f921b8702c Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon.chen@sifive.com>
Date: Mon, 26 Feb 2024 13:56:44 +0800
Subject: [PATCH 1502/1765] lib: sbi_misaligned_ldst: Add handling of
 C.LHU/C.LH and C.SH

Added exception handling for compressed instructions C.LHU, C.LH, and
C.SH from the zcb extension to the sbi_misaligned_ldst library.

Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h  |  7 +++++++
 lib/sbi/sbi_misaligned_ldst.c | 10 ++++++++++
 2 files changed, 17 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index eb5306973d6..46bbeed04f4 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -856,6 +856,13 @@
 #define INSN_MATCH_C_FSWSP		0xe002
 #define INSN_MASK_C_FSWSP		0xe003
 
+#define INSN_MATCH_C_LHU		0x8400
+#define INSN_MASK_C_LHU		0xfc43
+#define INSN_MATCH_C_LH		0x8440
+#define INSN_MASK_C_LH			0xfc43
+#define INSN_MATCH_C_SH		0x8c00
+#define INSN_MASK_C_SH			0xfc43
+
 #define INSN_MASK_WFI			0xffffff00
 #define INSN_MATCH_WFI			0x10500000
 
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_misaligned_ldst.c
index aa512de3985..71b6232e668 100644
--- a/lib/sbi/sbi_misaligned_ldst.c
+++ b/lib/sbi/sbi_misaligned_ldst.c
@@ -123,6 +123,13 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		len = 4;
 #endif
 #endif
+	} else if ((insn & INSN_MASK_C_LHU) == INSN_MATCH_C_LHU) {
+		len = 2;
+		insn = RVC_RS2S(insn) << SH_RD;
+	} else if ((insn & INSN_MASK_C_LH) == INSN_MATCH_C_LH) {
+		len = 2;
+		shift = 8 * (sizeof(ulong) - len);
+		insn = RVC_RS2S(insn) << SH_RD;
 	} else {
 		uptrap.epc = regs->mepc;
 		uptrap.cause = CAUSE_MISALIGNED_LOAD;
@@ -237,6 +244,9 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		val.data_ulong = GET_F32_RS2C(insn, regs);
 #endif
 #endif
+	} else if ((insn & INSN_MASK_C_SH) == INSN_MATCH_C_SH) {
+		len		= 2;
+		val.data_ulong = GET_RS2S(insn, regs);
 	} else {
 		uptrap.epc = regs->mepc;
 		uptrap.cause = CAUSE_MISALIGNED_STORE;

From fdf5589f049f144eeb7d28484ad9a8444bf8410f Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 4 Mar 2024 20:15:48 +0800
Subject: [PATCH 1503/1765] firmware: fw_base.S: Simplify address get

Simplify address get and remove _link_start _link_end _load_start.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 44 +++++++++++---------------------------------
 1 file changed, 11 insertions(+), 33 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 09894e6496d..c657bd9a664 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -63,17 +63,11 @@ _try_lottery:
 	amoadd.w a6, a7, (a6)
 	bnez	a6, _wait_relocate_copy_done
 
-	/* Save load address */
-	lla	t0, _load_start
-	lla	t1, _fw_start
-	REG_S	t1, 0(t0)
-
 #ifdef FW_PIC
 	/* relocate the global table content */
-	lla	t0, _link_start
-	REG_L	t0, 0(t0)
-	/* t1 shall has the address of _fw_start */
-	sub	t2, t1, t0
+	li	t0, FW_TEXT_START	/* link start */
+	lla	t1, _fw_start		/* load start */
+	sub	t2, t1, t0		/* load offset */
 	lla	t0, __rel_dyn_start
 	lla	t1, __rel_dyn_end
 	beq	t0, t1, _relocate_done
@@ -96,18 +90,14 @@ _wait_relocate_copy_done:
 #else
 	/* Relocate if load address != link address */
 _relocate:
-	lla	t0, _link_start
-	REG_L	t0, 0(t0)
-	lla	t1, _link_end
-	REG_L	t1, 0(t1)
-	lla	t2, _load_start
-	REG_L	t2, 0(t2)
+	li	t0, FW_TEXT_START	/* link start */
+	lla	t2, _fw_start		/* load start */
+	lla	t3, _fw_reloc_end	/* load end */
+	sub	t6, t2, t0		/* load offset */
+	sub	t1, t3, t6		/* link end */
 	beq	t0, t2, _relocate_done
-	sub	t3, t1, t0
-	add	t3, t3, t2
 	lla	t4, _relocate_done
-	sub	t4, t4, t2
-	add	t4, t4, t0
+	sub	t4, t4, t6
 	blt	t2, t0, _relocate_copy_to_upper
 _relocate_copy_to_lower:
 	ble	t1, t2, _relocate_copy_to_lower_loop
@@ -147,8 +137,7 @@ _relocate_copy_to_upper_loop:
 	jr	t4
 _wait_relocate_copy_done:
 	lla	t0, _fw_start
-	lla	t1, _link_start
-	REG_L	t1, 0(t1)
+	li	t1, FW_TEXT_START
 	beq	t0, t1, _wait_for_boot_hart
 	lla	t2, _boot_status
 	lla	t3, _wait_for_boot_hart
@@ -173,12 +162,7 @@ _relocate_done:
 	 */
 	lla	t0, _boot_status
 #ifndef FW_PIC
-	lla	t1, _link_start
-	REG_L	t1, 0(t1)
-	lla	t2, _load_start
-	REG_L	t2, 0(t2)
-	sub	t0, t0, t1
-	add	t0, t0, t2
+	add	t0, t0, t6
 #endif
 	li	t1, BOOT_STATUS_RELOCATE_DONE
 	REG_S	t1, 0(t0)
@@ -502,12 +486,6 @@ _relocate_lottery:
 	RISCV_PTR	0
 _boot_status:
 	RISCV_PTR	0
-_load_start:
-	RISCV_PTR	_fw_start
-_link_start:
-	RISCV_PTR	FW_TEXT_START
-_link_end:
-	RISCV_PTR	_fw_reloc_end
 
 	.section .entry, "ax", %progbits
 	.align 3

From b27b7c6d8829d7e59cc68583129a6dfda930ea2e Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 4 Mar 2024 20:15:49 +0800
Subject: [PATCH 1504/1765] firmware: fw_base: Simplified setup trap handler

The same detection was done twice when setting mtvec and trap_exit.
Merging can reduce code size.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index c657bd9a664..d87c0a5e1a1 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -456,22 +456,14 @@ _start_warm:
 	srli	a5, a5, ('H' - 'A')
 	andi	a5, a5, 0x1
 	beq	a5, zero, _skip_trap_handler_rv32_hyp
-	lla	a4, _trap_handler_rv32_hyp
-_skip_trap_handler_rv32_hyp:
-#endif
-	csrw	CSR_MTVEC, a4
-
-#if __riscv_xlen == 32
 	/* Override trap exit for H-extension */
-	csrr	a5, CSR_MISA
-	srli	a5, a5, ('H' - 'A')
-	andi	a5, a5, 0x1
-	beq	a5, zero, _skip_trap_exit_rv32_hyp
-	lla	a4, _trap_exit_rv32_hyp
 	csrr	a5, CSR_MSCRATCH
+	lla	a4, _trap_exit_rv32_hyp
 	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
-_skip_trap_exit_rv32_hyp:
+	lla	a4, _trap_handler_rv32_hyp
+_skip_trap_handler_rv32_hyp:
 #endif
+	csrw	CSR_MTVEC, a4
 
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH

From 187397fd65570de547f3b7d49455855dd18dfff5 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 4 Mar 2024 20:15:50 +0800
Subject: [PATCH 1505/1765] firmware: fw_dynamic.S: Remove _bad_dynamic_info

_bad_dynamic_info is same as _start_hang, so remove it.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_dynamic.S | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/firmware/fw_dynamic.S b/firmware/fw_dynamic.S
index 7ff1c6a32b7..5ee288372e1 100644
--- a/firmware/fw_dynamic.S
+++ b/firmware/fw_dynamic.S
@@ -11,12 +11,6 @@
 
 #include "fw_base.S"
 
-	.section .entry, "ax", %progbits
-	.align 3
-_bad_dynamic_info:
-	wfi
-	j	_bad_dynamic_info
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.global fw_boot_hart
@@ -30,10 +24,10 @@ fw_boot_hart:
 	/* Sanity checks */
 	li	a1, FW_DYNAMIC_INFO_MAGIC_VALUE
 	REG_L	a0, FW_DYNAMIC_INFO_MAGIC_OFFSET(a2)
-	bne	a0, a1, _bad_dynamic_info
+	bne	a0, a1, _start_hang
 	li	a1, FW_DYNAMIC_INFO_VERSION_MAX
 	REG_L	a0, FW_DYNAMIC_INFO_VERSION_OFFSET(a2)
-	bgt	a0, a1, _bad_dynamic_info
+	bgt	a0, a1, _start_hang
 
 	/* Read boot HART id */
 	li	a1, FW_DYNAMIC_INFO_VERSION_2

From 8151105af5e4bd5d2a17fe0babd6cff3b36496fb Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 4 Mar 2024 20:15:51 +0800
Subject: [PATCH 1506/1765] firmware: fw_base.S: Remove _relocate_lottery

Remove _relocate_lottery and use _boot_status instead.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d87c0a5e1a1..d83397ec15f 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -14,8 +14,9 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
 
-#define BOOT_STATUS_RELOCATE_DONE	1
-#define BOOT_STATUS_BOOT_HART_DONE	2
+#define BOOT_STATUS_LOTTERY_DONE	1
+#define BOOT_STATUS_RELOCATE_DONE	2
+#define BOOT_STATUS_BOOT_HART_DONE	3
 
 .macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
 	add	\__d0, \__s0, zero
@@ -58,9 +59,9 @@ _start:
 	bne	a0, a6, _wait_relocate_copy_done
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
-	lla	a6, _relocate_lottery
-	li	a7, 1
-	amoadd.w a6, a7, (a6)
+	lla	a6, _boot_status
+	li	a7, BOOT_STATUS_LOTTERY_DONE
+	amoswap.w a6, a7, (a6)
 	bnez	a6, _wait_relocate_copy_done
 
 #ifdef FW_PIC
@@ -101,8 +102,6 @@ _relocate:
 	blt	t2, t0, _relocate_copy_to_upper
 _relocate_copy_to_lower:
 	ble	t1, t2, _relocate_copy_to_lower_loop
-	lla	t3, _relocate_lottery
-	BRANGE	t2, t1, t3, _start_hang
 	lla	t3, _boot_status
 	BRANGE	t2, t1, t3, _start_hang
 	lla	t3, _relocate
@@ -119,8 +118,6 @@ _relocate_copy_to_lower_loop:
 	jr	t4
 _relocate_copy_to_upper:
 	ble	t3, t0, _relocate_copy_to_upper_loop
-	lla	t2, _relocate_lottery
-	BRANGE	t0, t3, t2, _start_hang
 	lla	t2, _boot_status
 	BRANGE	t0, t3, t2, _start_hang
 	lla	t2, _relocate
@@ -474,8 +471,6 @@ _skip_trap_handler_rv32_hyp:
 
 	.data
 	.align 3
-_relocate_lottery:
-	RISCV_PTR	0
 _boot_status:
 	RISCV_PTR	0
 

From 526b9ce0793ab6b1a2c11e19066d9400ea77f742 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 4 Mar 2024 20:15:52 +0800
Subject: [PATCH 1507/1765] firmware: fw_base.S: fix _reset_regs

a3 and a4 cannot be reset because used in fw_platform_init.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index d83397ec15f..126b067f932 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -167,7 +167,7 @@ _relocate_done:
 
 	/* At this point we are running from link address */
 
-	/* Reset all registers except ra, a0, a1 and a2 for boot HART */
+	/* Reset all registers except ra, a0, a1, a2, a3 and a4 for boot HART */
 	li	ra, 0
 	call	_reset_regs
 
@@ -394,7 +394,7 @@ _wait_for_boot_hart:
 	bne	t0, t1, _wait_for_boot_hart
 
 _start_warm:
-	/* Reset all registers except ra, a0, a1 and a2 for non-boot HARTs */
+	/* Reset all registers except ra, a0, a1, a2, a3 and a4 for non-boot HART */
 	li	ra, 0
 	call	_reset_regs
 
@@ -745,7 +745,7 @@ _reset_regs:
 
 	/* flush the instruction cache */
 	fence.i
-	/* Reset all registers except ra, a0, a1 and a2 */
+	/* Reset all registers except ra, a0, a1, a2, a3 and a4 */
 	li sp, 0
 	li gp, 0
 	li tp, 0
@@ -754,8 +754,6 @@ _reset_regs:
 	li t2, 0
 	li s0, 0
 	li s1, 0
-	li a3, 0
-	li a4, 0
 	li a5, 0
 	li a6, 0
 	li a7, 0

From b9e4de0641a0b4e4ed9cb0439d3b7b66fe6ef75f Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 4 Mar 2024 21:45:48 +0000
Subject: [PATCH 1508/1765] docs: Add documentation about tests and SBIUnit

This patch contains the documentation for SBIUnit. It describes:

- What is SBIUnit
- Simple test writing scenario
- How we can cover static functions
- How we can "mock" structures in order to test the functions which
operate on them
- SBIUnit API Reference

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 docs/doxygen.cfg      |   1 +
 docs/writing_tests.md | 133 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 134 insertions(+)
 create mode 100644 docs/writing_tests.md

diff --git a/docs/doxygen.cfg b/docs/doxygen.cfg
index 608cb1c8190..894d36e4ae8 100644
--- a/docs/doxygen.cfg
+++ b/docs/doxygen.cfg
@@ -797,6 +797,7 @@ INPUT                  = @@SRC_DIR@@/README.md \
                          @@SRC_DIR@@/docs/library_usage.md \
                          @@SRC_DIR@@/docs/domain_support.md \
                          @@SRC_DIR@@/docs/opensbi_config.md \
+                         @@SRC_DIR@@/docs/writing_tests.md \
                          @@SRC_DIR@@/docs/firmware \
                          @@SRC_DIR@@/docs/platform \
                          @@SRC_DIR@@/include \
diff --git a/docs/writing_tests.md b/docs/writing_tests.md
new file mode 100644
index 00000000000..56d0ca37dbd
--- /dev/null
+++ b/docs/writing_tests.md
@@ -0,0 +1,133 @@
+Writing tests for OpenSBI
+=========================
+
+SBIUnit
+-------
+SBIUnit is a set of macros and functions which simplify the test development and
+automate the test execution and evaluation. All of the SBIUnit definitions are
+in the `include/sbi/sbi_unit_test.h` header file, and implementations are
+available in `lib/sbi/sbi_unit_test.c`.
+
+Simple SBIUnit test
+-------------------
+
+For instance, we would like to test the following function from
+`lib/sbi/sbi_string.c`:
+
+```c
+size_t sbi_strlen(const char *str)
+{
+	unsigned long ret = 0;
+
+	while (*str != '\0') {
+		ret++;
+		str++;
+	}
+
+	return ret;
+}
+```
+
+which calculates the string length.
+
+Create the file `lib/sbi/sbi_string_test.c` with the following content:
+
+```c
+#include <sbi/sbi_unit_test.h>
+#include <sbi/sbi_string.h>
+
+static void strlen_test(struct sbiunit_test_case *test)
+{
+	SBIUNIT_EXPECT_EQ(test, sbi_strlen("Hello"), 5);
+	SBIUNIT_EXPECT_EQ(test, sbi_strlen("Hell\0o"), 4);
+}
+
+static struct sbiunit_test_case string_test_cases[] = {
+	SBIUNIT_TEST_CASE(strlen_test),
+	SBIUNIT_END_CASE,
+};
+
+SBIUNIT_TEST_SUITE(string_test_suite, string_test_cases);
+```
+
+Then, add the corresponding Makefile entries to `lib/sbi/objects.mk`:
+```lang-makefile
+...
+libsbi-objs-$(CONFIG_SBIUNIT) += sbi_string_test.o
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
+```
+
+If you compiled OpenSBI with CONFIG_SBIUNIT enabled before, you may need to
+manually remove the build folder in order to regenerate the carray files:
+`rm -rf build/`.
+
+Recompile OpenSBI with the CONFIG_SBIUNIT option enabled and run it in QEMU.
+You will see something like this:
+```
+# make PLATFORM=generic run
+...
+# Running SBIUNIT tests #
+...
+## Running test suite: string_test_suite
+[PASSED] strlen_test
+1 PASSED / 0 FAILED / 1 TOTAL
+```
+
+Now let's try to change this test in the way that it will fail:
+
+```c
+- SBIUNIT_EXPECT_EQ(test, sbi_strlen("Hello"), 5);
++ SBIUNIT_EXPECT_EQ(test, sbi_strlen("Hello"), 100);
+```
+
+`make all` and `make run` it again:
+```
+...
+# Running SBIUNIT tests #
+...
+## Running test suite: string_test_suite
+[SBIUnit] [.../opensbi/lib/sbi/sbi_string_test.c:6]: strlen_test: Condition "(sbi_strlen("Hello")) == (100)" expected to be true!
+[FAILED] strlen_test
+0 PASSED / 1 FAILED / 1 TOTAL
+```
+Covering the static functions / using the static definitions
+------------------------------------------------------------
+
+SBIUnit also allows you to test static functions. In order to do so, simply
+include your test source in the file you would like to test. Complementing the
+example above, just add this to the
+`lib/sbi/sbi_string.c` file:
+
+```c
+#ifdef CONFIG_SBIUNIT
+#include "sbi_string_test.c"
+#endif
+```
+
+In this case you should only add a new carray entry pointing to the test suite
+to `lib/sbi/objects.mk`:
+```lang-makefile
+...
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
+```
+
+You don't have to compile the `sbi_string_test.o` separately, because the
+test code will be included into the `sbi_string` object file.
+
+See example in `lib/sbi/sbi_console_test.c`, where statically declared
+`console_dev` variable is used to mock the `sbi_console_device` structure.
+
+"Mocking" the structures
+------------------------
+See the example of structure "mocking" in the `lib/sbi/sbi_console_test.c`,
+where the sbi_console_device structure was mocked to be used in various
+console-related functions in order to test them.
+
+API Reference
+-------------
+All of the `SBIUNIT_EXPECT_*` macros will cause a test case to fail if the
+corresponding conditions are not met, however, the execution of a particular
+test case will not be stopped.
+
+All of the `SBIUNIT_ASSERT_*` macros will cause a test case to fail and stop
+immediately, triggering a panic.

From 874fcefdf5883c042b4b1f61f6265e03e16f2e79 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 4 Mar 2024 21:45:49 +0000
Subject: [PATCH 1509/1765] lib: Add SBIUnit testing macros and functions

This patch introduces all of the SBIUnit macros and functions which
can be used during the test development process. Also, it defines
the 'run_all_tests' function, which is being called during the
'init_coldboot' right after printing the boot hart information.

Also, add the CONFIG_SBIUNIT Kconfig entry in order to be able to
turn the tests on and off. When the CONFIG_SBIUNIT is disabled,
the tests and all related code is excluded completely on the
compilation stage.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 include/sbi/sbi_unit_test.h   | 71 +++++++++++++++++++++++++++++++++++
 lib/sbi/Kconfig               |  4 ++
 lib/sbi/objects.mk            |  2 +
 lib/sbi/sbi_init.c            |  3 ++
 lib/sbi/sbi_unit_test.c       | 43 +++++++++++++++++++++
 lib/sbi/sbi_unit_tests.carray |  3 ++
 6 files changed, 126 insertions(+)
 create mode 100644 include/sbi/sbi_unit_test.h
 create mode 100644 lib/sbi/sbi_unit_test.c
 create mode 100644 lib/sbi/sbi_unit_tests.carray

diff --git a/include/sbi/sbi_unit_test.h b/include/sbi/sbi_unit_test.h
new file mode 100644
index 00000000000..c63d900cbf3
--- /dev/null
+++ b/include/sbi/sbi_unit_test.h
@@ -0,0 +1,71 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Author: Ivan Orlov <ivan.orlov0322@gmail.com>
+ */
+#ifdef CONFIG_SBIUNIT
+#ifndef __SBI_UNIT_H__
+#define __SBI_UNIT_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_string.h>
+
+struct sbiunit_test_case {
+	const char *name;
+	bool failed;
+	void (*test_func)(struct sbiunit_test_case *test);
+};
+
+struct sbiunit_test_suite {
+	const char *name;
+	struct sbiunit_test_case *cases;
+};
+
+#define SBIUNIT_TEST_CASE(func)		\
+	{				\
+		.name = #func,		\
+		.failed = false,	\
+		.test_func = (func)	\
+	}
+
+#define SBIUNIT_END_CASE { }
+
+#define SBIUNIT_TEST_SUITE(suite_name, cases_arr)		\
+	struct sbiunit_test_suite suite_name = {		\
+		.name = #suite_name,				\
+		.cases = cases_arr				\
+	}
+
+#define _sbiunit_msg(test, msg) "[SBIUnit] [%s:%d]: %s: %s", __FILE__,	\
+				__LINE__, test->name, msg
+
+#define SBIUNIT_INFO(test, msg) sbi_printf(_sbiunit_msg(test, msg))
+#define SBIUNIT_PANIC(test, msg) sbi_panic(_sbiunit_msg(test, msg))
+
+#define SBIUNIT_EXPECT(test, cond) do {							\
+	if (!(cond)) {									\
+		test->failed = true;							\
+		SBIUNIT_INFO(test, "Condition \"" #cond "\" expected to be true!\n");	\
+	}										\
+} while (0)
+
+#define SBIUNIT_ASSERT(test, cond) do {						\
+	if (!(cond))								\
+		SBIUNIT_PANIC(test, "Condition \"" #cond "\" must be true!\n");	\
+} while (0)
+
+#define SBIUNIT_EXPECT_EQ(test, a, b) SBIUNIT_EXPECT(test, (a) == (b))
+#define SBIUNIT_ASSERT_EQ(test, a, b) SBIUNIT_ASSERT(test, (a) == (b))
+#define SBIUNIT_EXPECT_NE(test, a, b) SBIUNIT_EXPECT(test, (a) != (b))
+#define SBIUNIT_ASSERT_NE(test, a, b) SBIUNIT_ASSERT(test, (a) != (b))
+#define SBIUNIT_EXPECT_MEMEQ(test, a, b, len) SBIUNIT_EXPECT(test, !sbi_memcmp(a, b, len))
+#define SBIUNIT_ASSERT_MEMEQ(test, a, b, len) SBIUNIT_ASSERT(test, !sbi_memcmp(a, b, len))
+#define SBIUNIT_EXPECT_STREQ(test, a, b, len) SBIUNIT_EXPECT(test, !sbi_strncmp(a, b, len))
+#define SBIUNIT_ASSERT_STREQ(test, a, b, len) SBIUNIT_ASSERT(test, !sbi_strncmp(a, b, len))
+
+void run_all_tests(void);
+#endif
+#else
+#define run_all_tests()
+#endif
diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index 81dd2db3967..e3038ee3d28 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -50,4 +50,8 @@ config SBI_ECALL_DBTR
 	bool "Debug Trigger Extension"
 	default y
 
+config SBIUNIT
+	bool "Enable SBIUNIT tests"
+	default n
+
 endmenu
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 0a50e95c30f..08959f16411 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -11,6 +11,8 @@ libsbi-objs-y += riscv_asm.o
 libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
+libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_test.o
+libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_tests.o
 
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_exts.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 804b01cd91c..796cccceaaf 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -29,6 +29,7 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_tlb.h>
 #include <sbi/sbi_version.h>
+#include <sbi/sbi_unit_test.h>
 
 #define BANNER                                              \
 	"   ____                    _____ ____ _____\n"     \
@@ -398,6 +399,8 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 
 	sbi_boot_print_hart(scratch, hartid);
 
+	run_all_tests();
+
 	/*
 	 * Configure PMP at last because if SMEPMP is detected,
 	 * M-mode access to the S/U space will be rescinded.
diff --git a/lib/sbi/sbi_unit_test.c b/lib/sbi/sbi_unit_test.c
new file mode 100644
index 00000000000..1987838c52b
--- /dev/null
+++ b/lib/sbi/sbi_unit_test.c
@@ -0,0 +1,43 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Author: Ivan Orlov <ivan.orlov0322@gmail.com>
+ */
+#include <sbi/sbi_unit_test.h>
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_console.h>
+
+extern struct sbiunit_test_suite *sbi_unit_tests[];
+extern unsigned long sbi_unit_tests_size;
+
+static void run_test_suite(struct sbiunit_test_suite *suite)
+{
+	struct sbiunit_test_case *s_case;
+	u32 count_pass = 0, count_fail = 0;
+
+	sbi_printf("## Running test suite: %s\n", suite->name);
+
+	s_case = suite->cases;
+	while (s_case->test_func) {
+		s_case->test_func(s_case);
+		if (s_case->failed)
+			count_fail++;
+		else
+			count_pass++;
+		sbi_printf("[%s] %s\n", s_case->failed ? "FAILED" : "PASSED",
+			   s_case->name);
+		s_case++;
+	}
+	sbi_printf("%u PASSED / %u FAILED / %u TOTAL\n", count_pass, count_fail,
+		   count_pass + count_fail);
+}
+
+void run_all_tests(void)
+{
+	u32 i;
+
+	sbi_printf("\n# Running SBIUNIT tests #\n");
+
+	for (i = 0; i < sbi_unit_tests_size; i++)
+		run_test_suite(sbi_unit_tests[i]);
+}
diff --git a/lib/sbi/sbi_unit_tests.carray b/lib/sbi/sbi_unit_tests.carray
new file mode 100644
index 00000000000..8d6069b2823
--- /dev/null
+++ b/lib/sbi/sbi_unit_tests.carray
@@ -0,0 +1,3 @@
+HEADER: sbi/sbi_unit_test.h
+TYPE: struct sbiunit_test_suite
+NAME: sbi_unit_tests

From e5f53fdea30e1a3d2e22e5b7fec34b26f59f310f Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 4 Mar 2024 21:45:50 +0000
Subject: [PATCH 1510/1765] lib: tests: Add a test for sbi_bitmap

Add test suite covering all of the functions from lib/sbi/sbi_bitmap.c:
__bitmap_and, __bitmap_or and __bitmap_xor.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/objects.mk        |   3 ++
 lib/sbi/sbi_bitmap_test.c | 102 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 105 insertions(+)
 create mode 100644 lib/sbi/sbi_bitmap_test.c

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 08959f16411..b4c273fb6c8 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -14,6 +14,9 @@ libsbi-objs-y += riscv_locks.o
 libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_test.o
 libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_tests.o
 
+libsbi-objs-$(CONFIG_SBIUNIT) += sbi_bitmap_test.o
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += bitmap_test_suite
+
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_exts.o
 
diff --git a/lib/sbi/sbi_bitmap_test.c b/lib/sbi/sbi_bitmap_test.c
new file mode 100644
index 00000000000..d2c359969a1
--- /dev/null
+++ b/lib/sbi/sbi_bitmap_test.c
@@ -0,0 +1,102 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Author: Ivan Orlov <ivan.orlov0322@gmail.com>
+ */
+#include <sbi/sbi_bitmap.h>
+#include <sbi/sbi_unit_test.h>
+
+#define DATA_SIZE sizeof(data_zero)
+#define DATA_BIT_SIZE (DATA_SIZE * 8)
+
+static unsigned long data_a[] = { 0xDEADBEEF, 0x00BAB10C, 0x1BADB002, 0xABADBABE };
+static unsigned long data_b[] = { 0xC00010FF, 0x00BAB10C, 0xBAAAAAAD, 0xBADDCAFE };
+static unsigned long data_zero[] = { 0, 0, 0, 0 };
+
+static void bitmap_and_test(struct sbiunit_test_case *test)
+{
+	unsigned long res[DATA_SIZE];
+	unsigned long a_and_b[] = { data_a[0] & data_b[0], data_a[1] & data_b[1],
+				    data_a[2] & data_b[2], data_a[3] & data_b[3] };
+
+	__bitmap_and(res, data_a, data_b, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, a_and_b, DATA_SIZE);
+
+	/* a & a = a */
+	__bitmap_and(res, data_a, data_a, DATA_BIT_SIZE);
+	SBIUNIT_ASSERT_MEMEQ(test, res, data_a, DATA_SIZE);
+
+	/* a & 0 = 0 */
+	__bitmap_and(res, data_a, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+
+	/* 0 & 0 = 0 */
+	__bitmap_and(res, data_zero, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+
+	sbi_memcpy(res, data_zero, DATA_SIZE);
+	/* Cover zero 'bits' argument */
+	__bitmap_and(res, data_a, data_b, 0);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+}
+
+static void bitmap_or_test(struct sbiunit_test_case *test)
+{
+	unsigned long res[DATA_SIZE];
+	unsigned long a_or_b[] = { data_a[0] | data_b[0], data_a[1] | data_b[1],
+				   data_a[2] | data_b[2], data_a[3] | data_b[3] };
+
+	__bitmap_or(res, data_a, data_b, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, a_or_b, DATA_SIZE);
+
+	/* a | a = a */
+	__bitmap_or(res, data_a, data_a, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_a, DATA_SIZE);
+
+	/* a | 0 = a */
+	__bitmap_or(res, data_a, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_a, DATA_SIZE);
+
+	/* 0 | 0 = 0 */
+	__bitmap_or(res, data_zero, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+
+	sbi_memcpy(res, data_zero, DATA_SIZE);
+	__bitmap_or(res, data_a, data_b, 0);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+}
+
+static void bitmap_xor_test(struct sbiunit_test_case *test)
+{
+	unsigned long res[DATA_SIZE];
+	unsigned long a_xor_b[] = { data_a[0] ^ data_b[0], data_a[1] ^ data_b[1],
+				    data_a[2] ^ data_b[2], data_a[3] ^ data_b[3] };
+
+	__bitmap_xor(res, data_a, data_b, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, a_xor_b, DATA_SIZE);
+
+	/* a ^ 0 = a */
+	__bitmap_xor(res, data_a, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_a, DATA_SIZE);
+
+	/* a ^ a = 0 */
+	__bitmap_xor(res, data_a, data_a, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+
+	/* 0 ^ 0 = 0 */
+	__bitmap_xor(res, data_zero, data_zero, DATA_BIT_SIZE);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+
+	sbi_memcpy(res, data_zero, DATA_SIZE);
+	__bitmap_xor(res, data_a, data_b, 0);
+	SBIUNIT_EXPECT_MEMEQ(test, res, data_zero, DATA_SIZE);
+}
+
+static struct sbiunit_test_case bitmap_test_cases[] = {
+	SBIUNIT_TEST_CASE(bitmap_and_test),
+	SBIUNIT_TEST_CASE(bitmap_or_test),
+	SBIUNIT_TEST_CASE(bitmap_xor_test),
+	SBIUNIT_END_CASE,
+};
+
+SBIUNIT_TEST_SUITE(bitmap_test_suite, bitmap_test_cases);

From 87d8fe78653e77de33cc12b9df07fc3a202f7d49 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 4 Mar 2024 21:45:51 +0000
Subject: [PATCH 1511/1765] lib: tests: Add sbi_console test

Add the test suite covering some of the functions from
lib/sbi/sbi_console.c: putc, puts and printf. The test covers a variety
of format specifiers for printf and different strings and characters for
putc and puts.

In order to do that, the test "mocks" the sbi_console_device structure
by setting the 'console_dev' variable to the virtual console.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 lib/sbi/objects.mk         |   1 +
 lib/sbi/sbi_console.c      |   4 ++
 lib/sbi/sbi_console_test.c | 105 +++++++++++++++++++++++++++++++++++++
 3 files changed, 110 insertions(+)
 create mode 100644 lib/sbi/sbi_console_test.c

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index b4c273fb6c8..9d065fa49e5 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -16,6 +16,7 @@ libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_tests.o
 
 libsbi-objs-$(CONFIG_SBIUNIT) += sbi_bitmap_test.o
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += bitmap_test_suite
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += console_test_suite
 
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_exts.o
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index ab09a5c01e1..d1229d09712 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -488,3 +488,7 @@ int sbi_console_init(struct sbi_scratch *scratch)
 
 	return rc;
 }
+
+#ifdef CONFIG_SBIUNIT
+#include "sbi_console_test.c"
+#endif
diff --git a/lib/sbi/sbi_console_test.c b/lib/sbi/sbi_console_test.c
new file mode 100644
index 00000000000..29f4ac15b20
--- /dev/null
+++ b/lib/sbi/sbi_console_test.c
@@ -0,0 +1,105 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Author: Ivan Orlov <ivan.orlov0322@gmail.com>
+ */
+#include <sbi/sbi_unit_test.h>
+
+#define TEST_CONSOLE_BUF_LEN 1024
+
+static const struct sbi_console_device *old_dev;
+static char test_console_buf[TEST_CONSOLE_BUF_LEN];
+static u32 test_console_buf_pos;
+static spinlock_t test_console_lock = SPIN_LOCK_INITIALIZER;
+
+static void test_console_putc(char c)
+{
+	test_console_buf[test_console_buf_pos] = c;
+	test_console_buf_pos = (test_console_buf_pos + 1) % TEST_CONSOLE_BUF_LEN;
+}
+
+static void clear_test_console_buf(void)
+{
+	test_console_buf_pos = 0;
+	test_console_buf[0] = '\0';
+}
+
+static const struct sbi_console_device test_console_dev = {
+	.name = "Test console device",
+	.console_putc = test_console_putc,
+};
+
+/* Mock the console device */
+static inline void test_console_begin(const struct sbi_console_device *device)
+{
+	old_dev = console_dev;
+	console_dev = device;
+}
+
+static inline void test_console_end(void)
+{
+	console_dev = old_dev;
+}
+
+static void putc_test(struct sbiunit_test_case *test)
+{
+	clear_test_console_buf();
+	test_console_begin(&test_console_dev);
+	sbi_putc('a');
+	test_console_end();
+	SBIUNIT_ASSERT_EQ(test, test_console_buf[0], 'a');
+}
+
+#define PUTS_TEST(test, expected, str) do {			\
+	spin_lock(&test_console_lock);				\
+	clear_test_console_buf();				\
+	test_console_begin(&test_console_dev);			\
+	sbi_puts(str);						\
+	test_console_end();					\
+	SBIUNIT_ASSERT_STREQ(test, test_console_buf, expected,	\
+			     sbi_strlen(expected));		\
+	spin_unlock(&test_console_lock);			\
+} while (0)
+
+static void puts_test(struct sbiunit_test_case *test)
+{
+	PUTS_TEST(test, "Hello, OpenSBI!", "Hello, OpenSBI!");
+	PUTS_TEST(test, "Hello,\r\nOpenSBI!", "Hello,\nOpenSBI!");
+}
+
+#define PRINTF_TEST(test, expected, format, ...) do {		\
+	spin_lock(&test_console_lock);				\
+	clear_test_console_buf();				\
+	test_console_begin(&test_console_dev);			\
+	size_t __res = sbi_printf(format, ##__VA_ARGS__);	\
+	test_console_end();					\
+	SBIUNIT_ASSERT_EQ(test, __res, sbi_strlen(expected));	\
+	SBIUNIT_ASSERT_STREQ(test, test_console_buf, expected,	\
+			     sbi_strlen(expected));		\
+	spin_unlock(&test_console_lock);			\
+} while (0)
+
+static void printf_test(struct sbiunit_test_case *test)
+{
+	PRINTF_TEST(test, "Hello", "Hello");
+	PRINTF_TEST(test, "3 5 7", "%d %d %d", 3, 5, 7);
+	PRINTF_TEST(test, "Hello", "%s", "Hello");
+	PRINTF_TEST(test, "-1", "%d", -1);
+	PRINTF_TEST(test, "FF", "%X", 255);
+	PRINTF_TEST(test, "ff", "%x", 255);
+	PRINTF_TEST(test, "A", "%c", 'A');
+	PRINTF_TEST(test, "1fe", "%p", (void *)0x1fe);
+	PRINTF_TEST(test, "4294967295", "%u", 4294967295U);
+	PRINTF_TEST(test, "-2147483647", "%ld", -2147483647l);
+	PRINTF_TEST(test, "-9223372036854775807", "%lld", -9223372036854775807LL);
+	PRINTF_TEST(test, "18446744073709551615", "%llu", 18446744073709551615ULL);
+}
+
+static struct sbiunit_test_case console_test_cases[] = {
+	SBIUNIT_TEST_CASE(putc_test),
+	SBIUNIT_TEST_CASE(puts_test),
+	SBIUNIT_TEST_CASE(printf_test),
+	SBIUNIT_END_CASE,
+};
+
+SBIUNIT_TEST_SUITE(console_test_suite, console_test_cases);

From e11025c52d70c8a6042965d5f368ae9d14bd80d6 Mon Sep 17 00:00:00 2001
From: Qingyu Shang <2931013282@sjtu.edu.cn>
Date: Wed, 6 Mar 2024 19:15:58 +0800
Subject: [PATCH 1512/1765] lib: sbi: Add initial domain context management
 support

The domain context management component in OpenSBI provides basic CPU
context management routines for existing OpenSBI domain. As domain
extension, it was initially designed to facilitate the suspension
and resumption of domains, enabling secure domains to efficiently
share CPU resources.

The patch also provides an addition to the OpenSBI domain to provide
updates on hart-domain assignment and declarations of contexts within
the domain.

Signed-off-by: Qingyu Shang <2931013282@sjtu.edu.cn>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Tested-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md           |   2 +
 include/sbi/sbi_domain.h         |   6 ++
 include/sbi/sbi_domain_context.h |  77 ++++++++++++++++
 lib/sbi/objects.mk               |   1 +
 lib/sbi/sbi_domain.c             |   4 +-
 lib/sbi/sbi_domain_context.c     | 154 +++++++++++++++++++++++++++++++
 6 files changed, 242 insertions(+), 2 deletions(-)
 create mode 100755 include/sbi/sbi_domain_context.h
 create mode 100755 lib/sbi/sbi_domain_context.c

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 65b61427166..b34e43aa8da 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -41,6 +41,7 @@ has following details:
 * **name** - Name of this domain
 * **assigned_harts** - HARTs assigned to this domain
 * **possible_harts** - HARTs possible in this domain
+* **hartindex_to_context_table** - Contexts corresponding to possible HARTs
 * **regions** - Array of memory regions terminated by a memory region
   with order zero
 * **boot_hartid** - HART id of the HART booting this domain. The domain
@@ -80,6 +81,7 @@ following manner:
   platform support
 * **possible_harts** - All valid HARTs of a RISC-V platform are possible
   HARTs of the ROOT domain
+* **hartindex_to_context_table** - Contexts corresponding to ROOT domain's possible HARTs
 * **regions** - Two memory regions available to the ROOT domain:
   **A)** A memory region to protect OpenSBI firmware from S-mode and U-mode
   **B)** A memory region of **order=__riscv_xlen** allowing S-mode and
diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index c88dbac63d5..4706cfca726 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -12,6 +12,7 @@
 
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_domain_context.h>
 
 struct sbi_scratch;
 
@@ -176,6 +177,8 @@ struct sbi_domain {
 	char name[64];
 	/** Possible HARTs in this domain */
 	const struct sbi_hartmask *possible_harts;
+	/** Contexts for possible HARTs indexed by hartindex */
+	struct sbi_context *hartindex_to_context_table[SBI_HARTMASK_MAX_BITS];
 	/** Array of memory regions terminated by a region with order zero */
 	struct sbi_domain_memregion *regions;
 	/** HART id of the HART booting this domain */
@@ -200,6 +203,9 @@ extern struct sbi_domain root;
 /** Get pointer to sbi_domain from HART index */
 struct sbi_domain *sbi_hartindex_to_domain(u32 hartindex);
 
+/** Update HART local pointer to point to specified domain */
+void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom);
+
 /** Get pointer to sbi_domain for current HART */
 #define sbi_domain_thishart_ptr() \
 	sbi_hartindex_to_domain(sbi_hartid_to_hartindex(current_hartid()))
diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
new file mode 100755
index 00000000000..edba764fa21
--- /dev/null
+++ b/include/sbi/sbi_domain_context.h
@@ -0,0 +1,77 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) IPADS@SJTU 2023. All rights reserved.
+ */
+
+#ifndef __SBI_DOMAIN_CONTEXT_H__
+#define __SBI_DOMAIN_CONTEXT_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_domain.h>
+
+/** Context representation for a hart within a domain */
+struct sbi_context {
+	/** Trap-related states such as GPRs, mepc, and mstatus */
+	struct sbi_trap_regs regs;
+
+	/** Supervisor status register */
+	unsigned long sstatus;
+	/** Supervisor interrupt enable register */
+	unsigned long sie;
+	/** Supervisor trap vector base address register */
+	unsigned long stvec;
+	/** Supervisor scratch register for temporary storage */
+	unsigned long sscratch;
+	/** Supervisor exception program counter register */
+	unsigned long sepc;
+	/** Supervisor cause register */
+	unsigned long scause;
+	/** Supervisor trap value register */
+	unsigned long stval;
+	/** Supervisor interrupt pending register */
+	unsigned long sip;
+	/** Supervisor address translation and protection register */
+	unsigned long satp;
+	/** Counter-enable register */
+	unsigned long scounteren;
+	/** Supervisor environment configuration register */
+	unsigned long senvcfg;
+
+	/** Reference to the owning domain */
+	struct sbi_domain *dom;
+	/** Previous context (caller) to jump to during context exits */
+	struct sbi_context *prev_ctx;
+	/** Is context initialized and runnable */
+	bool initialized;
+};
+
+/** Get the context pointer for a given hart index and domain */
+#define sbi_hartindex_to_domain_context(__hartindex, __d) \
+	(__d)->hartindex_to_context_table[__hartindex]
+
+/** Macro to obtain the current hart's context pointer */
+#define sbi_domain_context_thishart_ptr()                  \
+	sbi_hartindex_to_domain_context(                   \
+		sbi_hartid_to_hartindex(current_hartid()), \
+		sbi_domain_thishart_ptr())
+
+/**
+ * Enter a specific domain context synchronously
+ * @param dom pointer to domain
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_domain_context_enter(struct sbi_domain *dom);
+
+/**
+ * Exit the current domain context, and then return to the caller
+ * of sbi_domain_context_enter or attempt to start the next domain
+ * context to be initialized
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_domain_context_exit(void);
+
+#endif // __SBI_DOMAIN_CONTEXT_H__
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 9d065fa49e5..fc4619db89f 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -64,6 +64,7 @@ libsbi-objs-$(CONFIG_SBI_ECALL_DBTR) += sbi_ecall_dbtr.o
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
+libsbi-objs-y += sbi_domain_context.o
 libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 4e9f7428a52..50749f15dc9 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -51,7 +51,7 @@ struct sbi_domain *sbi_hartindex_to_domain(u32 hartindex)
 	return sbi_scratch_read_type(scratch, void *, domain_hart_ptr_offset);
 }
 
-static void update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
+void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
 {
 	struct sbi_scratch *scratch;
 
@@ -567,7 +567,7 @@ int sbi_domain_register(struct sbi_domain *dom,
 		if (tdom)
 			sbi_hartmask_clear_hartindex(i,
 					&tdom->assigned_harts);
-		update_hartindex_to_domain(i, dom);
+		sbi_update_hartindex_to_domain(i, dom);
 		sbi_hartmask_set_hartindex(i, &dom->assigned_harts);
 
 		/*
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
new file mode 100755
index 00000000000..d6843a6a906
--- /dev/null
+++ b/lib/sbi/sbi_domain_context.c
@@ -0,0 +1,154 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) IPADS@SJTU 2023. All rights reserved.
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/riscv_locks.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_domain_context.h>
+
+/**
+ * Switches the HART context from the current domain to the target domain.
+ * This includes changing domain assignments and reconfiguring PMP, as well
+ * as saving and restoring CSRs and trap states.
+ *
+ * @param ctx pointer to the current HART context
+ * @param dom_ctx pointer to the target domain context
+ */
+static void switch_to_next_domain_context(struct sbi_context *ctx,
+					  struct sbi_context *dom_ctx)
+{
+	u32 hartindex;
+	struct sbi_trap_regs *trap_regs;
+	struct sbi_domain *dom = dom_ctx->dom;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
+
+	/* Assign current hart to target domain */
+	hartindex = sbi_hartid_to_hartindex(current_hartid());
+	sbi_hartmask_clear_hartindex(
+		hartindex, &sbi_domain_thishart_ptr()->assigned_harts);
+	sbi_update_hartindex_to_domain(hartindex, dom);
+	sbi_hartmask_set_hartindex(hartindex, &dom->assigned_harts);
+
+	/* Reconfigure PMP settings for the new domain */
+	for (int i = 0; i < pmp_count; i++) {
+		pmp_disable(i);
+	}
+	sbi_hart_pmp_configure(scratch);
+
+	/* Save current CSR context and restore target domain's CSR context */
+	ctx->sstatus	= csr_swap(CSR_SSTATUS, dom_ctx->sstatus);
+	ctx->sie	= csr_swap(CSR_SIE, dom_ctx->sie);
+	ctx->stvec	= csr_swap(CSR_STVEC, dom_ctx->stvec);
+	ctx->sscratch	= csr_swap(CSR_SSCRATCH, dom_ctx->sscratch);
+	ctx->sepc	= csr_swap(CSR_SEPC, dom_ctx->sepc);
+	ctx->scause	= csr_swap(CSR_SCAUSE, dom_ctx->scause);
+	ctx->stval	= csr_swap(CSR_STVAL, dom_ctx->stval);
+	ctx->sip	= csr_swap(CSR_SIP, dom_ctx->sip);
+	ctx->satp	= csr_swap(CSR_SATP, dom_ctx->satp);
+	ctx->scounteren = csr_swap(CSR_SCOUNTEREN, dom_ctx->scounteren);
+	ctx->senvcfg	= csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
+
+	/* Save current trap state and restore target domain's trap state */
+	trap_regs = (struct sbi_trap_regs *)(csr_read(CSR_MSCRATCH) -
+					     SBI_TRAP_REGS_SIZE);
+	sbi_memcpy(&ctx->regs, trap_regs, sizeof(*trap_regs));
+	sbi_memcpy(trap_regs, &dom_ctx->regs, sizeof(*trap_regs));
+
+	/* Mark current context structure initialized because context saved */
+	ctx->initialized = true;
+
+	/* If target domain context is not initialized or runnable */
+	if (!dom_ctx->initialized) {
+		/* Startup boot HART of target domain */
+		if (current_hartid() == dom->boot_hartid)
+			sbi_hart_switch_mode(dom->boot_hartid, dom->next_arg1,
+					     dom->next_addr, dom->next_mode,
+					     false);
+		else
+			sbi_hsm_hart_stop(scratch, true);
+	}
+}
+
+int sbi_domain_context_enter(struct sbi_domain *dom)
+{
+	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
+	struct sbi_context *dom_ctx = sbi_hartindex_to_domain_context(
+		sbi_hartid_to_hartindex(current_hartid()), dom);
+
+	/* Validate the domain context existence */
+	if (!dom_ctx)
+		return SBI_EINVAL;
+
+	/* Update target context's previous context to indicate the caller */
+	dom_ctx->prev_ctx = ctx;
+
+	switch_to_next_domain_context(ctx, dom_ctx);
+
+	return 0;
+}
+
+int sbi_domain_context_exit(void)
+{
+	u32 i, hartindex = sbi_hartid_to_hartindex(current_hartid());
+	struct sbi_domain *dom;
+	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
+	struct sbi_context *dom_ctx, *tmp;
+
+	/*
+	 * If it's first time to call `exit` on the current hart, no
+	 * context allocated before. Loop through each domain to allocate
+	 * its context on the current hart if valid.
+	 */
+	if (!ctx) {
+		sbi_domain_for_each(i, dom) {
+			if (!sbi_hartmask_test_hartindex(hartindex,
+							 dom->possible_harts))
+				continue;
+
+			dom_ctx = sbi_zalloc(sizeof(struct sbi_context));
+			if (!dom_ctx)
+				return SBI_ENOMEM;
+
+			/* Bind context and domain */
+			dom_ctx->dom				   = dom;
+			dom->hartindex_to_context_table[hartindex] = dom_ctx;
+		}
+
+		ctx = sbi_domain_context_thishart_ptr();
+	}
+
+	dom_ctx = ctx->prev_ctx;
+
+	/* If no previous caller context */
+	if (!dom_ctx) {
+		/* Try to find next uninitialized user-defined domain's context */
+		sbi_domain_for_each(i, dom) {
+			if (dom == &root || dom == sbi_domain_thishart_ptr())
+				continue;
+
+			tmp = sbi_hartindex_to_domain_context(hartindex, dom);
+			if (tmp && !tmp->initialized) {
+				dom_ctx = tmp;
+				break;
+			}
+		}
+	}
+
+	/* Take the root domain context if fail to find */
+	if (!dom_ctx)
+		dom_ctx = sbi_hartindex_to_domain_context(hartindex, &root);
+
+	switch_to_next_domain_context(ctx, dom_ctx);
+
+	return 0;
+}

From c0a63205f8bd6029aea59711a449805142614464 Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:34 -0800
Subject: [PATCH 1513/1765] lib: sbi: rename sbi_misaligned_ldst.c to
 sbi_trap_ldst.c

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/objects.mk                                 | 2 +-
 lib/sbi/{sbi_misaligned_ldst.c => sbi_trap_ldst.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename lib/sbi/{sbi_misaligned_ldst.c => sbi_trap_ldst.c} (100%)

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index fc4619db89f..2bed7f38a63 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -77,7 +77,6 @@ libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
 libsbi-objs-y += sbi_irqchip.o
-libsbi-objs-y += sbi_misaligned_ldst.o
 libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
 libsbi-objs-y += sbi_dbtr.o
@@ -87,6 +86,7 @@ libsbi-objs-y += sbi_system.o
 libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
+libsbi-objs-y += sbi_trap_ldst.o
 libsbi-objs-y += sbi_unpriv.o
 libsbi-objs-y += sbi_expected_trap.o
 libsbi-objs-y += sbi_cppc.o
diff --git a/lib/sbi/sbi_misaligned_ldst.c b/lib/sbi/sbi_trap_ldst.c
similarity index 100%
rename from lib/sbi/sbi_misaligned_ldst.c
rename to lib/sbi/sbi_trap_ldst.c

From 2471cf2e6ce1429bad3b000941f95957be8da9c0 Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:35 -0800
Subject: [PATCH 1514/1765] include: sbi: rename sbi_misaligned_ldst.h to
 sbi_trap_ldst.h

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/{sbi_misaligned_ldst.h => sbi_trap_ldst.h} | 4 ++--
 lib/sbi/sbi_trap.c                                     | 2 +-
 lib/sbi/sbi_trap_ldst.c                                | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)
 rename include/sbi/{sbi_misaligned_ldst.h => sbi_trap_ldst.h} (86%)

diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_trap_ldst.h
similarity index 86%
rename from include/sbi/sbi_misaligned_ldst.h
rename to include/sbi/sbi_trap_ldst.h
index ab27eb422fa..9bbd2373b89 100644
--- a/include/sbi/sbi_misaligned_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -7,8 +7,8 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#ifndef __SBI_MISALIGNED_LDST_H__
-#define __SBI_MISALIGNED_LDST_H__
+#ifndef __SBI_TRAP_LDST_H__
+#define __SBI_TRAP_LDST_H__
 
 #include <sbi/sbi_types.h>
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index dbf307c6894..145db4b448c 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -17,7 +17,7 @@
 #include <sbi/sbi_illegal_insn.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_irqchip.h>
-#include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_trap_ldst.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_timer.h>
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index 71b6232e668..a9ae96e9ae1 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -11,7 +11,7 @@
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_trap_ldst.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>

From a17600c186e80bca6d8641757d7ff1ccbf8fface Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:36 -0800
Subject: [PATCH 1515/1765] lib: sbi: change prototype of sbi_trap_redirect

sbi_trap_redirect now uses const pointer to `trap`.
This ensures the caller that we never change `trap` in sbi_trap_redirect.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap.h | 2 +-
 lib/sbi/sbi_trap.c     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index a562b95e883..2727bdbcffd 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -225,7 +225,7 @@ static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
 }
 
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_trap_info *trap);
+		      const struct sbi_trap_info *trap);
 
 struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 145db4b448c..10249811453 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -84,7 +84,7 @@ static void __noreturn sbi_trap_error(const char *msg, int rc,
  * @return 0 on success and negative error code on failure
  */
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
-		      struct sbi_trap_info *trap)
+		      const struct sbi_trap_info *trap)
 {
 	ulong hstatus, vsstatus, prev_mode;
 #if __riscv_xlen == 32

From 9221fe58d1e65d0a1b6f62098c814994ce04dd5d Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:37 -0800
Subject: [PATCH 1516/1765] lib: sbi: change prototype of
 sbi_misaligned_load/store_handler

This simplifies both handlers such that when the handler needs to
redirect the original trap, it's readily available.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap_ldst.h |  9 ++++---
 lib/sbi/sbi_trap.c          | 21 ++++++++--------
 lib/sbi/sbi_trap_ldst.c     | 50 ++++++++++++++-----------------------
 3 files changed, 35 insertions(+), 45 deletions(-)

diff --git a/include/sbi/sbi_trap_ldst.h b/include/sbi/sbi_trap_ldst.h
index 9bbd2373b89..5f0ed921e48 100644
--- a/include/sbi/sbi_trap_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -11,13 +11,14 @@
 #define __SBI_TRAP_LDST_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_trap.h>
 
 struct sbi_trap_regs;
 
-int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
-				struct sbi_trap_regs *regs);
+int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
+				const struct sbi_trap_info *orig_trap);
 
-int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
-				 struct sbi_trap_regs *regs);
+int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
+				 const struct sbi_trap_info *orig_trap);
 
 #endif
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 10249811453..e3799846587 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -285,6 +285,13 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		}
 		return regs;
 	}
+	/* Original trap_info */
+	trap.epc   = regs->mepc;
+	trap.cause = mcause;
+	trap.tval  = mtval;
+	trap.tval2 = mtval2;
+	trap.tinst = mtinst;
+	trap.gva   = sbi_regs_gva(regs);
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
@@ -292,11 +299,11 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
-		rc = sbi_misaligned_load_handler(mtval, mtval2, mtinst, regs);
+		rc  = sbi_misaligned_load_handler(regs, &trap);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
-		rc  = sbi_misaligned_store_handler(mtval, mtval2, mtinst, regs);
+		rc  = sbi_misaligned_store_handler(regs, &trap);
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
@@ -311,14 +318,8 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		/* fallthrough */
 	default:
 		/* If the trap came from S or U mode, redirect it there */
-		trap.epc = regs->mepc;
-		trap.cause = mcause;
-		trap.tval = mtval;
-		trap.tval2 = mtval2;
-		trap.tinst = mtinst;
-		trap.gva   = sbi_regs_gva(regs);
-
-		rc = sbi_trap_redirect(regs, &trap);
+		msg = "trap redirect failed";
+		rc  = sbi_trap_redirect(regs, &trap);
 		break;
 	}
 
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index a9ae96e9ae1..5feef605d2c 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -34,8 +34,8 @@ static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 		return orig_tinst | (addr_offset << SH_RS1);
 }
 
-int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
-				struct sbi_trap_regs *regs)
+int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
+				const struct sbi_trap_info *orig_trap)
 {
 	ulong insn, insn_len;
 	union reg_data val;
@@ -44,13 +44,13 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
 
-	if (tinst & 0x1) {
+	if (orig_trap->tinst & 0x1) {
 		/*
 		 * Bit[0] == 1 implies trapped instruction value is
 		 * transformed instruction or custom instruction.
 		 */
-		insn = tinst | INSN_16BIT_MASK;
-		insn_len = (tinst & 0x2) ? INSN_LEN(insn) : 2;
+		insn	 = orig_trap->tinst | INSN_16BIT_MASK;
+		insn_len = (orig_trap->tinst & 0x2) ? INSN_LEN(insn) : 2;
 	} else {
 		/*
 		 * Bit[0] == 0 implies trapped instruction value is
@@ -131,23 +131,17 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 		shift = 8 * (sizeof(ulong) - len);
 		insn = RVC_RS2S(insn) << SH_RD;
 	} else {
-		uptrap.epc = regs->mepc;
-		uptrap.cause = CAUSE_MISALIGNED_LOAD;
-		uptrap.tval = addr;
-		uptrap.tval2 = tval2;
-		uptrap.tinst = tinst;
-		uptrap.gva   = sbi_regs_gva(regs);
-		return sbi_trap_redirect(regs, &uptrap);
+		return sbi_trap_redirect(regs, orig_trap);
 	}
 
 	val.data_u64 = 0;
 	for (i = 0; i < len; i++) {
-		val.data_bytes[i] = sbi_load_u8((void *)(addr + i),
-						&uptrap);
+		val.data_bytes[i] =
+			sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc = regs->mepc;
+			uptrap.epc   = regs->mepc;
 			uptrap.tinst = sbi_misaligned_tinst_fixup(
-				tinst, uptrap.tinst, i);
+				orig_trap->tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
@@ -166,8 +160,8 @@ int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
 	return 0;
 }
 
-int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
-				 struct sbi_trap_regs *regs)
+int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
+				 const struct sbi_trap_info *orig_trap)
 {
 	ulong insn, insn_len;
 	union reg_data val;
@@ -176,13 +170,13 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
 
-	if (tinst & 0x1) {
+	if (orig_trap->tinst & 0x1) {
 		/*
 		 * Bit[0] == 1 implies trapped instruction value is
 		 * transformed instruction or custom instruction.
 		 */
-		insn = tinst | INSN_16BIT_MASK;
-		insn_len = (tinst & 0x2) ? INSN_LEN(insn) : 2;
+		insn	 = orig_trap->tinst | INSN_16BIT_MASK;
+		insn_len = (orig_trap->tinst & 0x2) ? INSN_LEN(insn) : 2;
 	} else {
 		/*
 		 * Bit[0] == 0 implies trapped instruction value is
@@ -248,22 +242,16 @@ int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
 		len		= 2;
 		val.data_ulong = GET_RS2S(insn, regs);
 	} else {
-		uptrap.epc = regs->mepc;
-		uptrap.cause = CAUSE_MISALIGNED_STORE;
-		uptrap.tval = addr;
-		uptrap.tval2 = tval2;
-		uptrap.tinst = tinst;
-		uptrap.gva   = sbi_regs_gva(regs);
-		return sbi_trap_redirect(regs, &uptrap);
+		return sbi_trap_redirect(regs, orig_trap);
 	}
 
 	for (i = 0; i < len; i++) {
-		sbi_store_u8((void *)(addr + i), val.data_bytes[i],
+		sbi_store_u8((void *)(orig_trap->tval + i), val.data_bytes[i],
 			     &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc = regs->mepc;
+			uptrap.epc   = regs->mepc;
 			uptrap.tinst = sbi_misaligned_tinst_fixup(
-				tinst, uptrap.tinst, i);
+				orig_trap->tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}

From 4c112650bbb0611de4939c749e2a34c8168e09f7 Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:38 -0800
Subject: [PATCH 1517/1765] lib: sbi: abstract out insn decoding to unify mem
 fault handlers

This patch abstracts out the instruction decoding part of misaligned ld/st
fault handlers, so it can be reused by ld/st access fault handlers.
Also Added lb/lbu/sb decoding. (previously unreachable by misaligned fault)

sbi_trap_emulate_load/store is now the common handler which takes a `emu`
parameter that is responsible for emulating the misaligned or access fault.
The `emu` callback is expected to fixup the fault, and based on the return
code of `emu`, sbi_trap_emulate_load/store will:

  r/wlen => the fixup is successful and regs/mepc needs to be updated.
  0      => the fixup is successful, but regs/mepc should be left untouched
            (this is usually used if `emu` does `sbi_trap_redirect`)
  -err   => failed, sbi_trap_error will be called

For now, load/store access faults are blindly redirected. It will be
enhanced in the following patches.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap_ldst.h |  13 +++-
 lib/sbi/sbi_trap.c          |  13 +++-
 lib/sbi/sbi_trap_ldst.c     | 140 +++++++++++++++++++++++++++---------
 3 files changed, 127 insertions(+), 39 deletions(-)

diff --git a/include/sbi/sbi_trap_ldst.h b/include/sbi/sbi_trap_ldst.h
index 5f0ed921e48..9cab4e424e6 100644
--- a/include/sbi/sbi_trap_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -13,7 +13,12 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_trap.h>
 
-struct sbi_trap_regs;
+union sbi_ldst_data {
+	u64 data_u64;
+	u32 data_u32;
+	u8 data_bytes[8];
+	ulong data_ulong;
+};
 
 int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
 				const struct sbi_trap_info *orig_trap);
@@ -21,4 +26,10 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
 int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
 				 const struct sbi_trap_info *orig_trap);
 
+int sbi_load_access_handler(struct sbi_trap_regs *regs,
+			    const struct sbi_trap_info *orig_trap);
+
+int sbi_store_access_handler(struct sbi_trap_regs *regs,
+			     const struct sbi_trap_info *orig_trap);
+
 #endif
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index e3799846587..c6650130497 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -299,10 +299,12 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
 		rc  = sbi_misaligned_load_handler(regs, &trap);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
 		rc  = sbi_misaligned_store_handler(regs, &trap);
 		msg = "misaligned store handler failed";
 		break;
@@ -312,10 +314,15 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		msg = "ecall handler failed";
 		break;
 	case CAUSE_LOAD_ACCESS:
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
+		rc  = sbi_load_access_handler(regs, &trap);
+		msg = "load fault handler failed";
+		break;
 	case CAUSE_STORE_ACCESS:
-		sbi_pmu_ctr_incr_fw(mcause == CAUSE_LOAD_ACCESS ?
-			SBI_PMU_FW_ACCESS_LOAD : SBI_PMU_FW_ACCESS_STORE);
-		/* fallthrough */
+		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
+		rc  = sbi_store_access_handler(regs, &trap);
+		msg = "store fault handler failed";
+		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		msg = "trap redirect failed";
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index 5feef605d2c..b9dc7ea9299 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -16,11 +16,23 @@
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 
-union reg_data {
-	u8 data_bytes[8];
-	ulong data_ulong;
-	u64 data_u64;
-};
+/**
+ * Load emulator callback:
+ *
+ * @return rlen=success, 0=success w/o regs modification, or negative error
+ */
+typedef int (*sbi_trap_ld_emulator)(int rlen, union sbi_ldst_data *out_val,
+				    struct sbi_trap_regs *regs,
+				    const struct sbi_trap_info *orig_trap);
+
+/**
+ * Store emulator callback:
+ *
+ * @return wlen=success, 0=success w/o regs modification, or negative error
+ */
+typedef int (*sbi_trap_st_emulator)(int wlen, union sbi_ldst_data in_val,
+				    struct sbi_trap_regs *regs,
+				    const struct sbi_trap_info *orig_trap);
 
 static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 					ulong addr_offset)
@@ -34,15 +46,14 @@ static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 		return orig_tinst | (addr_offset << SH_RS1);
 }
 
-int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
-				const struct sbi_trap_info *orig_trap)
+static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
+				 const struct sbi_trap_info *orig_trap,
+				 sbi_trap_ld_emulator emu)
 {
 	ulong insn, insn_len;
-	union reg_data val;
+	union sbi_ldst_data val = { 0 };
 	struct sbi_trap_info uptrap;
-	int i, fp = 0, shift = 0, len = 0;
-
-	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
+	int rc, fp = 0, shift = 0, len = 0;
 
 	if (orig_trap->tinst & 0x1) {
 		/*
@@ -64,7 +75,12 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
 		insn_len = INSN_LEN(insn);
 	}
 
-	if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
+	if ((insn & INSN_MASK_LB) == INSN_MATCH_LB) {
+		len   = 1;
+		shift = 8 * (sizeof(ulong) - len);
+	} else if ((insn & INSN_MASK_LBU) == INSN_MATCH_LBU) {
+		len = 1;
+	} else if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
 		len   = 4;
 		shift = 8 * (sizeof(ulong) - len);
 #if __riscv_xlen == 64
@@ -134,17 +150,10 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
 		return sbi_trap_redirect(regs, orig_trap);
 	}
 
-	val.data_u64 = 0;
-	for (i = 0; i < len; i++) {
-		val.data_bytes[i] =
-			sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
-		if (uptrap.cause) {
-			uptrap.epc   = regs->mepc;
-			uptrap.tinst = sbi_misaligned_tinst_fixup(
-				orig_trap->tinst, uptrap.tinst, i);
-			return sbi_trap_redirect(regs, &uptrap);
-		}
-	}
+	rc = emu(len, &val, regs, orig_trap);
+
+	if (rc <= 0)
+		return rc;
 
 	if (!fp)
 		SET_RD(insn, regs, ((long)(val.data_ulong << shift)) >> shift);
@@ -160,15 +169,14 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
 	return 0;
 }
 
-int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
-				 const struct sbi_trap_info *orig_trap)
+static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
+				  const struct sbi_trap_info *orig_trap,
+				  sbi_trap_st_emulator emu)
 {
 	ulong insn, insn_len;
-	union reg_data val;
+	union sbi_ldst_data val;
 	struct sbi_trap_info uptrap;
-	int i, len = 0;
-
-	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
+	int rc, len = 0;
 
 	if (orig_trap->tinst & 0x1) {
 		/*
@@ -192,7 +200,9 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
 
 	val.data_ulong = GET_RS2(insn, regs);
 
-	if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
+	if ((insn & INSN_MASK_SB) == INSN_MATCH_SB) {
+		len = 1;
+	} else if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
 		len = 4;
 #if __riscv_xlen == 64
 	} else if ((insn & INSN_MASK_SD) == INSN_MATCH_SD) {
@@ -245,9 +255,53 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
 		return sbi_trap_redirect(regs, orig_trap);
 	}
 
-	for (i = 0; i < len; i++) {
-		sbi_store_u8((void *)(orig_trap->tval + i), val.data_bytes[i],
-			     &uptrap);
+	rc = emu(len, val, regs, orig_trap);
+
+	if (rc <= 0)
+		return rc;
+
+	regs->mepc += insn_len;
+
+	return 0;
+}
+
+static int sbi_misaligned_ld_emulator(int rlen, union sbi_ldst_data *out_val,
+				      struct sbi_trap_regs *regs,
+				      const struct sbi_trap_info *orig_trap)
+{
+	struct sbi_trap_info uptrap;
+	int i;
+
+	for (i = 0; i < rlen; i++) {
+		out_val->data_bytes[i] =
+			sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
+		if (uptrap.cause) {
+			uptrap.epc   = regs->mepc;
+			uptrap.tinst = sbi_misaligned_tinst_fixup(
+				orig_trap->tinst, uptrap.tinst, i);
+			return sbi_trap_redirect(regs, &uptrap);
+		}
+	}
+	return rlen;
+}
+
+int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
+				const struct sbi_trap_info *orig_trap)
+{
+	return sbi_trap_emulate_load(regs, orig_trap,
+				     sbi_misaligned_ld_emulator);
+}
+
+static int sbi_misaligned_st_emulator(int wlen, union sbi_ldst_data in_val,
+				      struct sbi_trap_regs *regs,
+				      const struct sbi_trap_info *orig_trap)
+{
+	struct sbi_trap_info uptrap;
+	int i;
+
+	for (i = 0; i < wlen; i++) {
+		sbi_store_u8((void *)(orig_trap->tval + i),
+			     in_val.data_bytes[i], &uptrap);
 		if (uptrap.cause) {
 			uptrap.epc   = regs->mepc;
 			uptrap.tinst = sbi_misaligned_tinst_fixup(
@@ -255,8 +309,24 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 	}
+	return wlen;
+}
 
-	regs->mepc += insn_len;
+int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
+				 const struct sbi_trap_info *orig_trap)
+{
+	return sbi_trap_emulate_store(regs, orig_trap,
+				      sbi_misaligned_st_emulator);
+}
 
-	return 0;
+int sbi_load_access_handler(struct sbi_trap_regs *regs,
+			    const struct sbi_trap_info *orig_trap)
+{
+	return sbi_trap_redirect(regs, orig_trap);
+}
+
+int sbi_store_access_handler(struct sbi_trap_regs *regs,
+			     const struct sbi_trap_info *orig_trap)
+{
+	return sbi_trap_redirect(regs, orig_trap);
 }

From ddf3b649f1edd9eb5ad171c7faadf34acfb942f0 Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:39 -0800
Subject: [PATCH 1518/1765] include: sbi: add emulate_load/store handler to
 platform ops

This patch allows the platform to define load/store emulators. This
enables a platform to trap-and-emulate special devices or filter
access to existing physical devices.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 2fb33e16e4e..f962aa46e16 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -53,6 +53,7 @@ struct sbi_domain_memregion;
 struct sbi_ecall_return;
 struct sbi_trap_regs;
 struct sbi_hart_features;
+union sbi_ldst_data;
 
 /** Possible feature flags of a platform */
 enum sbi_platform_features {
@@ -139,6 +140,13 @@ struct sbi_platform_operations {
 	int (*vendor_ext_provider)(long funcid,
 				   struct sbi_trap_regs *regs,
 				   struct sbi_ecall_return *out);
+
+	/** platform specific handler to fixup load fault */
+	int (*emulate_load)(int rlen, unsigned long addr,
+			    union sbi_ldst_data *out_val);
+	/** platform specific handler to fixup store fault */
+	int (*emulate_store)(int wlen, unsigned long addr,
+			     union sbi_ldst_data in_val);
 };
 
 /** Platform default per-HART stack size for exception/interrupt handling */

From 81e3ba77a6dae8763972fffb6e4a833adccbeb1b Mon Sep 17 00:00:00 2001
From: Bo Gan <ganboing@gmail.com>
Date: Tue, 5 Mar 2024 18:35:40 -0800
Subject: [PATCH 1519/1765] lib: sbi: call platform load/store emulators

sbi_load/store_access_handler now tries to call platform emulators
if defined. Otherwise, redirects the fault. If the platform code
returns failure, this means the H/S/U has accessed the emulated
devices in an unexpected manner, which is very likely caused by
buggy code in H/S/U. We redirect the fault, so lower privileged
level can get notified, and act accordingly. (E.g., oops in Linux)

We let the handler truly fail if the trap was originated from M mode.
In this case, something must be very wrong and we should just fail.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h | 45 ++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_trap_ldst.c    | 37 +++++++++++++++++++++++++++++--
 2 files changed, 80 insertions(+), 2 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index f962aa46e16..581935abcea 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -48,6 +48,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_version.h>
+#include <sbi/sbi_trap_ldst.h>
 
 struct sbi_domain_memregion;
 struct sbi_ecall_return;
@@ -683,6 +684,50 @@ static inline int sbi_platform_vendor_ext_provider(
 	return SBI_ENOTSUPP;
 }
 
+/**
+ * Ask platform to emulate the trapped load
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param rlen length of the load: 1/2/4/8...
+ * @param addr virtual address of the load. Platform needs to page-walk and
+ *        find the physical address if necessary
+ * @param out_val value loaded
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_emulate_load(const struct sbi_platform *plat,
+					    int rlen, unsigned long addr,
+					    union sbi_ldst_data *out_val)
+{
+	if (plat && sbi_platform_ops(plat)->emulate_load) {
+		return sbi_platform_ops(plat)->emulate_load(rlen, addr,
+							    out_val);
+	}
+	return SBI_ENOTSUPP;
+}
+
+/**
+ * Ask platform to emulate the trapped store
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param wlen length of the store: 1/2/4/8...
+ * @param addr virtual address of the store. Platform needs to page-walk and
+ *        find the physical address if necessary
+ * @param in_val value to store
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_emulate_store(const struct sbi_platform *plat,
+					     int wlen, unsigned long addr,
+					     union sbi_ldst_data in_val)
+{
+	if (plat && sbi_platform_ops(plat)->emulate_store) {
+		return sbi_platform_ops(plat)->emulate_store(wlen, addr,
+							     in_val);
+	}
+	return SBI_ENOTSUPP;
+}
+
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index b9dc7ea9299..d864ad19297 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
+#include <sbi/sbi_platform.h>
 
 /**
  * Load emulator callback:
@@ -319,14 +320,46 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
 				      sbi_misaligned_st_emulator);
 }
 
+static int sbi_ld_access_emulator(int rlen, union sbi_ldst_data *out_val,
+				  struct sbi_trap_regs *regs,
+				  const struct sbi_trap_info *orig_trap)
+{
+	/* If fault came from M mode, just fail */
+	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
+		return SBI_EINVAL;
+
+	/* If platform emulator failed, we redirect instead of fail */
+	if (sbi_platform_emulate_load(sbi_platform_thishart_ptr(), rlen,
+				      orig_trap->tval, out_val))
+		return sbi_trap_redirect(regs, orig_trap);
+
+	return rlen;
+}
+
 int sbi_load_access_handler(struct sbi_trap_regs *regs,
 			    const struct sbi_trap_info *orig_trap)
 {
-	return sbi_trap_redirect(regs, orig_trap);
+	return sbi_trap_emulate_load(regs, orig_trap, sbi_ld_access_emulator);
+}
+
+static int sbi_st_access_emulator(int wlen, union sbi_ldst_data in_val,
+				  struct sbi_trap_regs *regs,
+				  const struct sbi_trap_info *orig_trap)
+{
+	/* If fault came from M mode, just fail */
+	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
+		return SBI_EINVAL;
+
+	/* If platform emulator failed, we redirect instead of fail */
+	if (sbi_platform_emulate_store(sbi_platform_thishart_ptr(), wlen,
+				       orig_trap->tval, in_val))
+		return sbi_trap_redirect(regs, orig_trap);
+
+	return wlen;
 }
 
 int sbi_store_access_handler(struct sbi_trap_regs *regs,
 			     const struct sbi_trap_info *orig_trap)
 {
-	return sbi_trap_redirect(regs, orig_trap);
+	return sbi_trap_emulate_store(regs, orig_trap, sbi_st_access_emulator);
 }

From 5c992a115a15ce2f2518f0ff7a655b42c3a8ebad Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Wed, 13 Mar 2024 15:01:57 +0000
Subject: [PATCH 1520/1765] lib: tests: Move tests to a separate directory

Move all of the SBIUnit-related code into the lib/sbi/tests directory.
Update 'Makefile' to index objects from the tests subdirectory.

I don't think creating the full separate list of Makefile variables
(libsbitests-objs-path-y, libsbitests-object-mks, etc. as it is done for
libsbiutils) is necessary for the tests because:

1) `lib/sbi/tests/objects.mk` is already indexed into
'libsbi-objects-mks' since the find expression for the libsbi-object-mks
variable looks for objects.mk files in the nested directories as well).

2) Tests are tightly coupled with the `lib/sbi/` sources, therefore it
may be reasonable to store the list of lib/sbi and lib/sbi/tests object
files together in the libsbi-objs-path-y variable.

Additionally, update relative paths in the tests where necessary.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/objects.mk                        | 6 ------
 lib/sbi/sbi_console.c                     | 6 +-----
 lib/sbi/tests/objects.mk                  | 8 ++++++++
 lib/sbi/{ => tests}/sbi_bitmap_test.c     | 0
 lib/sbi/{ => tests}/sbi_console_test.c    | 8 +++++---
 lib/sbi/{ => tests}/sbi_unit_test.c       | 0
 lib/sbi/{ => tests}/sbi_unit_tests.carray | 0
 7 files changed, 14 insertions(+), 14 deletions(-)
 create mode 100644 lib/sbi/tests/objects.mk
 rename lib/sbi/{ => tests}/sbi_bitmap_test.c (100%)
 rename lib/sbi/{ => tests}/sbi_console_test.c (94%)
 rename lib/sbi/{ => tests}/sbi_unit_test.c (100%)
 rename lib/sbi/{ => tests}/sbi_unit_tests.carray (100%)

diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 2bed7f38a63..5d06d25d9cf 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -11,12 +11,6 @@ libsbi-objs-y += riscv_asm.o
 libsbi-objs-y += riscv_atomic.o
 libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
-libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_test.o
-libsbi-objs-$(CONFIG_SBIUNIT) += sbi_unit_tests.o
-
-libsbi-objs-$(CONFIG_SBIUNIT) += sbi_bitmap_test.o
-carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += bitmap_test_suite
-carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += console_test_suite
 
 libsbi-objs-y += sbi_ecall.o
 libsbi-objs-y += sbi_ecall_exts.o
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index d1229d09712..d3ec4616f03 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -472,7 +472,7 @@ const struct sbi_console_device *sbi_console_get_device(void)
 
 void sbi_console_set_device(const struct sbi_console_device *dev)
 {
-	if (!dev || console_dev)
+	if (!dev)
 		return;
 
 	console_dev = dev;
@@ -488,7 +488,3 @@ int sbi_console_init(struct sbi_scratch *scratch)
 
 	return rc;
 }
-
-#ifdef CONFIG_SBIUNIT
-#include "sbi_console_test.c"
-#endif
diff --git a/lib/sbi/tests/objects.mk b/lib/sbi/tests/objects.mk
new file mode 100644
index 00000000000..5ce188ada02
--- /dev/null
+++ b/lib/sbi/tests/objects.mk
@@ -0,0 +1,8 @@
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_unit_test.o
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_unit_tests.o
+
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += bitmap_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_bitmap_test.o
+
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += console_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_console_test.o
diff --git a/lib/sbi/sbi_bitmap_test.c b/lib/sbi/tests/sbi_bitmap_test.c
similarity index 100%
rename from lib/sbi/sbi_bitmap_test.c
rename to lib/sbi/tests/sbi_bitmap_test.c
diff --git a/lib/sbi/sbi_console_test.c b/lib/sbi/tests/sbi_console_test.c
similarity index 94%
rename from lib/sbi/sbi_console_test.c
rename to lib/sbi/tests/sbi_console_test.c
index 29f4ac15b20..72db2530886 100644
--- a/lib/sbi/sbi_console_test.c
+++ b/lib/sbi/tests/sbi_console_test.c
@@ -3,6 +3,8 @@
  *
  * Author: Ivan Orlov <ivan.orlov0322@gmail.com>
  */
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_console.h>
 #include <sbi/sbi_unit_test.h>
 
 #define TEST_CONSOLE_BUF_LEN 1024
@@ -32,13 +34,13 @@ static const struct sbi_console_device test_console_dev = {
 /* Mock the console device */
 static inline void test_console_begin(const struct sbi_console_device *device)
 {
-	old_dev = console_dev;
-	console_dev = device;
+	old_dev = sbi_console_get_device();
+	sbi_console_set_device(device);
 }
 
 static inline void test_console_end(void)
 {
-	console_dev = old_dev;
+	sbi_console_set_device(old_dev);
 }
 
 static void putc_test(struct sbiunit_test_case *test)
diff --git a/lib/sbi/sbi_unit_test.c b/lib/sbi/tests/sbi_unit_test.c
similarity index 100%
rename from lib/sbi/sbi_unit_test.c
rename to lib/sbi/tests/sbi_unit_test.c
diff --git a/lib/sbi/sbi_unit_tests.carray b/lib/sbi/tests/sbi_unit_tests.carray
similarity index 100%
rename from lib/sbi/sbi_unit_tests.carray
rename to lib/sbi/tests/sbi_unit_tests.carray

From 86224ec36aed6bb1b991bba31ab793475c8eac76 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Wed, 13 Mar 2024 15:01:58 +0000
Subject: [PATCH 1521/1765] docs/writing_tests: Update tests paths

Since the tests should be moved to the lib/sbi/tests directory, the
documentation should be updated correspondingly. So, update the paths
where they have to be changed.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/writing_tests.md | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/docs/writing_tests.md b/docs/writing_tests.md
index 56d0ca37dbd..816adbae500 100644
--- a/docs/writing_tests.md
+++ b/docs/writing_tests.md
@@ -6,7 +6,7 @@ SBIUnit
 SBIUnit is a set of macros and functions which simplify the test development and
 automate the test execution and evaluation. All of the SBIUnit definitions are
 in the `include/sbi/sbi_unit_test.h` header file, and implementations are
-available in `lib/sbi/sbi_unit_test.c`.
+available in `lib/sbi/tests/sbi_unit_test.c`.
 
 Simple SBIUnit test
 -------------------
@@ -30,7 +30,7 @@ size_t sbi_strlen(const char *str)
 
 which calculates the string length.
 
-Create the file `lib/sbi/sbi_string_test.c` with the following content:
+Create the file `lib/sbi/tests/sbi_string_test.c` with the following content:
 
 ```c
 #include <sbi/sbi_unit_test.h>
@@ -50,10 +50,10 @@ static struct sbiunit_test_case string_test_cases[] = {
 SBIUNIT_TEST_SUITE(string_test_suite, string_test_cases);
 ```
 
-Then, add the corresponding Makefile entries to `lib/sbi/objects.mk`:
+Then, add the corresponding Makefile entries to `lib/sbi/tests/objects.mk`:
 ```lang-makefile
 ...
-libsbi-objs-$(CONFIG_SBIUNIT) += sbi_string_test.o
+libsbitests-objs-$(CONFIG_SBIUNIT) += sbi_string_test.o
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
 ```
 
@@ -86,7 +86,7 @@ Now let's try to change this test in the way that it will fail:
 # Running SBIUNIT tests #
 ...
 ## Running test suite: string_test_suite
-[SBIUnit] [.../opensbi/lib/sbi/sbi_string_test.c:6]: strlen_test: Condition "(sbi_strlen("Hello")) == (100)" expected to be true!
+[SBIUnit] [.../opensbi/lib/sbi/tests/sbi_string_test.c:6]: strlen_test: Condition "(sbi_strlen("Hello")) == (100)" expected to be true!
 [FAILED] strlen_test
 0 PASSED / 1 FAILED / 1 TOTAL
 ```
@@ -95,17 +95,16 @@ Covering the static functions / using the static definitions
 
 SBIUnit also allows you to test static functions. In order to do so, simply
 include your test source in the file you would like to test. Complementing the
-example above, just add this to the
-`lib/sbi/sbi_string.c` file:
+example above, just add this to the `lib/sbi/sbi_string.c` file:
 
 ```c
 #ifdef CONFIG_SBIUNIT
-#include "sbi_string_test.c"
+#include "tests/sbi_string_test.c"
 #endif
 ```
 
 In this case you should only add a new carray entry pointing to the test suite
-to `lib/sbi/objects.mk`:
+to `lib/sbi/tests/objects.mk`:
 ```lang-makefile
 ...
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
@@ -114,12 +113,12 @@ carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
 You don't have to compile the `sbi_string_test.o` separately, because the
 test code will be included into the `sbi_string` object file.
 
-See example in `lib/sbi/sbi_console_test.c`, where statically declared
+See example in `lib/sbi/tests/sbi_console_test.c`, where statically declared
 `console_dev` variable is used to mock the `sbi_console_device` structure.
 
 "Mocking" the structures
 ------------------------
-See the example of structure "mocking" in the `lib/sbi/sbi_console_test.c`,
+See the example of structure "mocking" in `lib/sbi/tests/sbi_console_test.c`,
 where the sbi_console_device structure was mocked to be used in various
 console-related functions in order to test them.
 

From 2e8517865ab7f25a9ed92a2c1b4f938368fe45f9 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Mar 2024 10:47:50 -0700
Subject: [PATCH 1522/1765] lib: sbi: Remove epc from struct sbi_trap_info

In the only places this value is used, it duplicates mepc from
struct sbi_trap_regs.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_trap.h      | 16 ++++++----------
 lib/sbi/sbi_ecall_legacy.c  |  4 ----
 lib/sbi/sbi_expected_trap.S |  4 ----
 lib/sbi/sbi_illegal_insn.c  |  2 --
 lib/sbi/sbi_trap.c          |  5 ++---
 lib/sbi/sbi_trap_ldst.c     |  4 ----
 6 files changed, 8 insertions(+), 27 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 2727bdbcffd..37576942d49 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -87,20 +87,18 @@
 /** Last member index in sbi_trap_regs */
 #define SBI_TRAP_REGS_last			35
 
-/** Index of epc member in sbi_trap_info */
-#define SBI_TRAP_INFO_epc			0
 /** Index of cause member in sbi_trap_info */
-#define SBI_TRAP_INFO_cause			1
+#define SBI_TRAP_INFO_cause			0
 /** Index of tval member in sbi_trap_info */
-#define SBI_TRAP_INFO_tval			2
+#define SBI_TRAP_INFO_tval			1
 /** Index of tval2 member in sbi_trap_info */
-#define SBI_TRAP_INFO_tval2			3
+#define SBI_TRAP_INFO_tval2			2
 /** Index of tinst member in sbi_trap_info */
-#define SBI_TRAP_INFO_tinst			4
+#define SBI_TRAP_INFO_tinst			3
 /** Index of gva member in sbi_trap_info */
-#define SBI_TRAP_INFO_gva			5
+#define SBI_TRAP_INFO_gva			4
 /** Last member index in sbi_trap_info */
-#define SBI_TRAP_INFO_last			6
+#define SBI_TRAP_INFO_last			5
 
 /* clang-format on */
 
@@ -194,8 +192,6 @@ struct sbi_trap_regs {
 
 /** Representation of trap details */
 struct sbi_trap_info {
-	/** epc Trap program counter */
-	unsigned long epc;
 	/** cause Trap exception cause */
 	unsigned long cause;
 	/** tval Trap value */
diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 14913c962a9..9a1ae1e481a 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -74,7 +74,6 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 						&hmask, &trap)) {
 			ret = sbi_ipi_send_smode(hmask, 0);
 		} else {
-			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
@@ -86,7 +85,6 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 					  SBI_TLB_FENCE_I, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
@@ -98,7 +96,6 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 					  SBI_TLB_SFENCE_VMA, source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
@@ -112,7 +109,6 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 					  source_hart);
 			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
-			trap.epc = regs->mepc;
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
 		}
diff --git a/lib/sbi/sbi_expected_trap.S b/lib/sbi/sbi_expected_trap.S
index 1f2d6b97d09..99dede5f37b 100644
--- a/lib/sbi/sbi_expected_trap.S
+++ b/lib/sbi/sbi_expected_trap.S
@@ -23,8 +23,6 @@
 	.global __sbi_expected_trap
 __sbi_expected_trap:
 	/* Without H-extension so, MTVAL2 and MTINST CSRs and GVA not available */
-	csrr	a4, CSR_MEPC
-	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
 	csrr	a4, CSR_MCAUSE
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
 	csrr	a4, CSR_MTVAL
@@ -41,8 +39,6 @@ __sbi_expected_trap:
 	.global __sbi_expected_trap_hext
 __sbi_expected_trap_hext:
 	/* With H-extension so, MTVAL2 and MTINST CSRs and GVA available */
-	csrr	a4, CSR_MEPC
-	REG_S	a4, SBI_TRAP_INFO_OFFSET(epc)(a3)
 	csrr	a4, CSR_MCAUSE
 	REG_S	a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
 	csrr	a4, CSR_MTVAL
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index 2be47575a36..dd0b3c126ce 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -25,7 +25,6 @@ static int truly_illegal_insn(ulong insn, struct sbi_trap_regs *regs)
 {
 	struct sbi_trap_info trap;
 
-	trap.epc = regs->mepc;
 	trap.cause = CAUSE_ILLEGAL_INSTRUCTION;
 	trap.tval = insn;
 	trap.tval2 = 0;
@@ -156,7 +155,6 @@ int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
 	if (unlikely((insn & 3) != 3)) {
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 		if ((insn & 3) != 3)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index c6650130497..c9db73f9530 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -140,7 +140,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	if (next_virt) {
 		/* Update VS-mode exception info */
 		csr_write(CSR_VSTVAL, trap->tval);
-		csr_write(CSR_VSEPC, trap->epc);
+		csr_write(CSR_VSEPC, regs->mepc);
 		csr_write(CSR_VSCAUSE, trap->cause);
 
 		/* Set MEPC to VS-mode exception vector base */
@@ -171,7 +171,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	} else {
 		/* Update S-mode exception info */
 		csr_write(CSR_STVAL, trap->tval);
-		csr_write(CSR_SEPC, trap->epc);
+		csr_write(CSR_SEPC, regs->mepc);
 		csr_write(CSR_SCAUSE, trap->cause);
 
 		/* Set MEPC to S-mode exception vector base */
@@ -286,7 +286,6 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		return regs;
 	}
 	/* Original trap_info */
-	trap.epc   = regs->mepc;
 	trap.cause = mcause;
 	trap.tval  = mtval;
 	trap.tval2 = mtval2;
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index d864ad19297..5a0537b1be1 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -70,7 +70,6 @@ static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
 		 */
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 		insn_len = INSN_LEN(insn);
@@ -193,7 +192,6 @@ static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
 		 */
 		insn = sbi_get_insn(regs->mepc, &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc = regs->mepc;
 			return sbi_trap_redirect(regs, &uptrap);
 		}
 		insn_len = INSN_LEN(insn);
@@ -277,7 +275,6 @@ static int sbi_misaligned_ld_emulator(int rlen, union sbi_ldst_data *out_val,
 		out_val->data_bytes[i] =
 			sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc   = regs->mepc;
 			uptrap.tinst = sbi_misaligned_tinst_fixup(
 				orig_trap->tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);
@@ -304,7 +301,6 @@ static int sbi_misaligned_st_emulator(int wlen, union sbi_ldst_data in_val,
 		sbi_store_u8((void *)(orig_trap->tval + i),
 			     in_val.data_bytes[i], &uptrap);
 		if (uptrap.cause) {
-			uptrap.epc   = regs->mepc;
 			uptrap.tinst = sbi_misaligned_tinst_fixup(
 				orig_trap->tinst, uptrap.tinst, i);
 			return sbi_trap_redirect(regs, &uptrap);

From ebb697ad8cdd5c281a94e7801fc0c1d99d6a891e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 11:04:50 +0530
Subject: [PATCH 1523/1765] lib: sbi: Remove sbi_trap_exit() and related code

Over the years, no uses of sbi_trap_exit() have been found so remove
it and also remove related code from fw_base.S and sbi_scratch.h.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 firmware/fw_base.S        | 11 -----------
 include/sbi/sbi_scratch.h | 15 +++------------
 include/sbi/sbi_trap.h    |  2 --
 lib/sbi/sbi_trap.c        | 19 -------------------
 4 files changed, 3 insertions(+), 44 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 126b067f932..c404d8bd145 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -298,9 +298,6 @@ _scratch_init:
 	/* Store hartid-to-scratch function address in scratch space */
 	lla	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
-	/* Store trap-exit function address in scratch space */
-	lla	a4, _trap_exit
-	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(tp)
 	/* Clear tmp0 in scratch space */
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 	/* Store firmware options in scratch space */
@@ -453,10 +450,6 @@ _start_warm:
 	srli	a5, a5, ('H' - 'A')
 	andi	a5, a5, 0x1
 	beq	a5, zero, _skip_trap_handler_rv32_hyp
-	/* Override trap exit for H-extension */
-	csrr	a5, CSR_MSCRATCH
-	lla	a4, _trap_exit_rv32_hyp
-	REG_S	a4, SBI_SCRATCH_TRAP_EXIT_OFFSET(a5)
 	lla	a4, _trap_handler_rv32_hyp
 _skip_trap_handler_rv32_hyp:
 #endif
@@ -695,7 +688,6 @@ memcmp:
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _trap_handler
-	.globl _trap_exit
 _trap_handler:
 	TRAP_SAVE_AND_SETUP_SP_T0
 
@@ -705,7 +697,6 @@ _trap_handler:
 
 	TRAP_CALL_C_ROUTINE
 
-_trap_exit:
 	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
 
 	TRAP_RESTORE_MEPC_MSTATUS 0
@@ -718,7 +709,6 @@ _trap_exit:
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _trap_handler_rv32_hyp
-	.globl _trap_exit_rv32_hyp
 _trap_handler_rv32_hyp:
 	TRAP_SAVE_AND_SETUP_SP_T0
 
@@ -728,7 +718,6 @@ _trap_handler_rv32_hyp:
 
 	TRAP_CALL_C_ROUTINE
 
-_trap_exit_rv32_hyp:
 	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
 
 	TRAP_RESTORE_MEPC_MSTATUS 1
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index e6a33bab58f..55b937f088b 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -36,14 +36,12 @@
 #define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(9 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(10 * __SIZEOF_POINTER__)
-/** Offset of trap_exit member in sbi_scratch */
-#define SBI_SCRATCH_TRAP_EXIT_OFFSET		(11 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(12 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET			(11 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET		(13 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET		(12 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(14 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(13 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -77,8 +75,6 @@ struct sbi_scratch {
 	unsigned long platform_addr;
 	/** Address of HART ID to sbi_scratch conversion function */
 	unsigned long hartid_to_scratch;
-	/** Address of trap exit function */
-	unsigned long trap_exit;
 	/** Temporary storage */
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
@@ -129,11 +125,6 @@ _Static_assert(
 		== SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET,
 	"struct sbi_scratch definition has changed, please redefine "
 	"SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET");
-_Static_assert(
-	offsetof(struct sbi_scratch, trap_exit)
-		== SBI_SCRATCH_TRAP_EXIT_OFFSET,
-	"struct sbi_scratch definition has changed, please redefine "
-	"SBI_SCRATCH_TRAP_EXIT_OFFSET");
 _Static_assert(
 	offsetof(struct sbi_scratch, tmp0)
 		== SBI_SCRATCH_TMP0_OFFSET,
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 37576942d49..a6032ab6b0a 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -225,8 +225,6 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 
 struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
 
-void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs);
-
 #endif
 
 #endif
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index c9db73f9530..b059c4bfd33 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -334,22 +334,3 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		sbi_trap_error(msg, rc, mcause, mtval, mtval2, mtinst, regs);
 	return regs;
 }
-
-typedef void (*trap_exit_t)(const struct sbi_trap_regs *regs);
-
-/**
- * Exit trap/interrupt handling
- *
- * This function is called by non-firmware code to abruptly exit
- * trap/interrupt handling and resume execution at context pointed
- * by given register state.
- *
- * @param regs pointer to register state
- */
-void __noreturn sbi_trap_exit(const struct sbi_trap_regs *regs)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	((trap_exit_t)scratch->trap_exit)(regs);
-	__builtin_unreachable();
-}

From 60ffc154c84dfe93b23bd02566310deb153a4360 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 12:39:00 +0530
Subject: [PATCH 1524/1765] include: sbi: Add trap_context pointer in struct
 sbi_scratch

To track nested traps, the struct sbi_scratch needs a pointer the
current trap context so add trap_context pointer in struct sbi_context.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 firmware/fw_base.S        |  3 ++-
 include/sbi/sbi_scratch.h | 15 ++++++++++++---
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index c404d8bd145..539fd1dcfb3 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -298,7 +298,8 @@ _scratch_init:
 	/* Store hartid-to-scratch function address in scratch space */
 	lla	a4, _hartid_to_scratch
 	REG_S	a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
-	/* Clear tmp0 in scratch space */
+	/* Clear trap_context and tmp0 in scratch space */
+	REG_S	zero, SBI_SCRATCH_TRAP_CONTEXT_OFFSET(tp)
 	REG_S	zero, SBI_SCRATCH_TMP0_OFFSET(tp)
 	/* Store firmware options in scratch space */
 	MOV_3R	s0, a0, s1, a1, s2, a2
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 55b937f088b..12e6a983889 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -36,12 +36,14 @@
 #define SBI_SCRATCH_PLATFORM_ADDR_OFFSET	(9 * __SIZEOF_POINTER__)
 /** Offset of hartid_to_scratch member in sbi_scratch */
 #define SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET	(10 * __SIZEOF_POINTER__)
+/** Offset of trap_context member in sbi_scratch */
+#define SBI_SCRATCH_TRAP_CONTEXT_OFFSET		(11 * __SIZEOF_POINTER__)
 /** Offset of tmp0 member in sbi_scratch */
-#define SBI_SCRATCH_TMP0_OFFSET			(11 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_TMP0_OFFSET			(12 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
-#define SBI_SCRATCH_OPTIONS_OFFSET		(12 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_OPTIONS_OFFSET		(13 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(13 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(14 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -75,6 +77,8 @@ struct sbi_scratch {
 	unsigned long platform_addr;
 	/** Address of HART ID to sbi_scratch conversion function */
 	unsigned long hartid_to_scratch;
+	/** Address of current trap context */
+	unsigned long trap_context;
 	/** Temporary storage */
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
@@ -125,6 +129,11 @@ _Static_assert(
 		== SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET,
 	"struct sbi_scratch definition has changed, please redefine "
 	"SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, trap_context)
+		== SBI_SCRATCH_TRAP_CONTEXT_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_TRAP_CONTEXT_OFFSET");
 _Static_assert(
 	offsetof(struct sbi_scratch, tmp0)
 		== SBI_SCRATCH_TMP0_OFFSET,

From abea949721bc635cfe39e34adc501d7be87db8ae Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 14:40:12 +0530
Subject: [PATCH 1525/1765] lib: sbi: Introduce trap context

Club the struct sbi_trap_regs and struct sbi_trap_info a new
struct sbi_trap_context (aka trap context) which must be saved
by low-level trap handler before calling sbi_trap_handler().

To track nested traps, the struct sbi_scratch points to the current
trap context and the trap context has pointer to pervious context
of previous trap.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 firmware/fw_base.S     | 62 ++++++++++++++++++++++++++++++++++--------
 include/sbi/sbi_trap.h | 29 +++++++++++++++++++-
 lib/sbi/sbi_trap.c     | 58 +++++++++++++++++----------------------
 3 files changed, 103 insertions(+), 46 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 539fd1dcfb3..629032221e0 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -446,14 +446,12 @@ _start_warm:
 
 	/* Setup trap handler */
 	lla	a4, _trap_handler
-#if __riscv_xlen == 32
 	csrr	a5, CSR_MISA
 	srli	a5, a5, ('H' - 'A')
 	andi	a5, a5, 0x1
-	beq	a5, zero, _skip_trap_handler_rv32_hyp
-	lla	a4, _trap_handler_rv32_hyp
-_skip_trap_handler_rv32_hyp:
-#endif
+	beq	a5, zero, _skip_trap_handler_hyp
+	lla	a4, _trap_handler_hyp
+_skip_trap_handler_hyp:
 	csrw	CSR_MTVEC, a4
 
 	/* Initialize SBI runtime */
@@ -564,10 +562,10 @@ memcmp:
 	xor	t0, tp, t0
 
 	/* Save original SP on exception stack */
-	REG_S	sp, (SBI_TRAP_REGS_OFFSET(sp) - SBI_TRAP_REGS_SIZE)(t0)
+	REG_S	sp, (SBI_TRAP_REGS_OFFSET(sp) - SBI_TRAP_CONTEXT_SIZE)(t0)
 
-	/* Set SP to exception stack and make room for trap registers */
-	add	sp, t0, -(SBI_TRAP_REGS_SIZE)
+	/* Set SP to exception stack and make room for trap context */
+	add	sp, t0, -(SBI_TRAP_CONTEXT_SIZE)
 
 	/* Restore T0 from scratch space */
 	REG_L	t0, SBI_SCRATCH_TMP0_OFFSET(tp)
@@ -627,6 +625,32 @@ memcmp:
 	REG_S	t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
 .endm
 
+.macro	TRAP_SAVE_INFO have_mstatush have_h_extension
+	csrr	t0, CSR_MCAUSE
+	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(cause))(sp)
+	csrr	t0, CSR_MTVAL
+	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tval))(sp)
+.if \have_h_extension
+	csrr	t0, CSR_MTVAL2
+	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tval2))(sp)
+	csrr	t0, CSR_MTINST
+	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tinst))(sp)
+	.if \have_mstatush
+	csrr	t0, CSR_MSTATUSH
+	srli	t0, t0, MSTATUSH_GVA_SHIFT
+	.else
+	csrr	t0, CSR_MSTATUS
+	srli	t0, t0, MSTATUS_GVA_SHIFT
+	.endif
+	and	t0, t0, 0x1
+.else
+	REG_S	zero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tval2))(sp)
+	REG_S	zero, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(tinst))(sp)
+	li	t0, 0
+.endif
+	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(gva))(sp)
+.endm
+
 .macro	TRAP_CALL_C_ROUTINE
 	/* Call C routine */
 	add	a0, sp, zero
@@ -696,6 +720,8 @@ _trap_handler:
 
 	TRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0
 
+	TRAP_SAVE_INFO 0 0
+
 	TRAP_CALL_C_ROUTINE
 
 	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
@@ -706,27 +732,39 @@ _trap_handler:
 
 	mret
 
-#if __riscv_xlen == 32
 	.section .entry, "ax", %progbits
 	.align 3
-	.globl _trap_handler_rv32_hyp
-_trap_handler_rv32_hyp:
+	.globl _trap_handler_hyp
+_trap_handler_hyp:
 	TRAP_SAVE_AND_SETUP_SP_T0
 
+#if __riscv_xlen == 32
 	TRAP_SAVE_MEPC_MSTATUS 1
+#else
+	TRAP_SAVE_MEPC_MSTATUS 0
+#endif
 
 	TRAP_SAVE_GENERAL_REGS_EXCEPT_SP_T0
 
+#if __riscv_xlen == 32
+	TRAP_SAVE_INFO 1 1
+#else
+	TRAP_SAVE_INFO 0 1
+#endif
+
 	TRAP_CALL_C_ROUTINE
 
 	TRAP_RESTORE_GENERAL_REGS_EXCEPT_A0_T0
 
+#if __riscv_xlen == 32
 	TRAP_RESTORE_MEPC_MSTATUS 1
+#else
+	TRAP_RESTORE_MEPC_MSTATUS 0
+#endif
 
 	TRAP_RESTORE_A0_T0
 
 	mret
-#endif
 
 	.section .entry, "ax", %progbits
 	.align 3
diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index a6032ab6b0a..f7c170e6491 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -112,9 +112,15 @@
 /** Size (in bytes) of sbi_trap_info */
 #define SBI_TRAP_INFO_SIZE SBI_TRAP_INFO_OFFSET(last)
 
+/** Size (in bytes) of sbi_trap_context */
+#define SBI_TRAP_CONTEXT_SIZE (SBI_TRAP_REGS_SIZE + \
+			       SBI_TRAP_INFO_SIZE + \
+			       __SIZEOF_POINTER__)
+
 #ifndef __ASSEMBLER__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_scratch.h>
 
 /** Representation of register state at time of trap/interrupt */
 struct sbi_trap_regs {
@@ -204,6 +210,16 @@ struct sbi_trap_info {
 	unsigned long gva;
 };
 
+/** Representation of trap context saved on stack */
+struct sbi_trap_context {
+	/** Register state */
+	struct sbi_trap_regs regs;
+	/** Trap details */
+	struct sbi_trap_info trap;
+	/** Pointer to previous trap context */
+	struct sbi_trap_context *prev_context;
+};
+
 static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
 {
 	/*
@@ -223,7 +239,18 @@ static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap);
 
-struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs);
+static inline struct sbi_trap_context *sbi_trap_get_context(struct sbi_scratch *scratch)
+{
+	return (scratch) ? (void *)scratch->trap_context : NULL;
+}
+
+static inline void sbi_trap_set_context(struct sbi_scratch *scratch,
+					struct sbi_trap_context *tcntx)
+{
+	scratch->trap_context = (unsigned long)tcntx;
+}
+
+struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx);
 
 #endif
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b059c4bfd33..4dbda063a9a 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -24,18 +24,18 @@
 #include <sbi/sbi_trap.h>
 
 static void __noreturn sbi_trap_error(const char *msg, int rc,
-				      ulong mcause, ulong mtval, ulong mtval2,
-				      ulong mtinst, struct sbi_trap_regs *regs)
+				      const struct sbi_trap_info *trap,
+				      const struct sbi_trap_regs *regs)
 {
 	u32 hartid = current_hartid();
 
 	sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc);
 	sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n",
-		   __func__, hartid, mcause, mtval);
+		   __func__, hartid, trap->cause, trap->tval);
 	if (misa_extension('H')) {
 		sbi_printf("%s: hart%d: mtval2=0x%" PRILX
 			   " mtinst=0x%" PRILX "\n",
-			   __func__, hartid, mtval2, mtinst);
+			   __func__, hartid, trap->tval2, trap->tinst);
 	}
 	sbi_printf("%s: hart%d: mepc=0x%" PRILX " mstatus=0x%" PRILX "\n",
 		   __func__, hartid, regs->mepc, regs->mstatus);
@@ -258,20 +258,20 @@ static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
  * 6. Stack pointer (SP) is setup for current HART
  * 7. Interrupts are disabled in MSTATUS CSR
  *
- * @param regs pointer to register state
+ * @param tcntx pointer to trap context
  */
-struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
+struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 {
 	int rc = SBI_ENOTSUPP;
 	const char *msg = "trap handler failed";
-	ulong mcause = csr_read(CSR_MCAUSE);
-	ulong mtval = csr_read(CSR_MTVAL), mtval2 = 0, mtinst = 0;
-	struct sbi_trap_info trap;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_trap_info *trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
+	ulong mcause = tcntx->trap.cause;
 
-	if (misa_extension('H')) {
-		mtval2 = csr_read(CSR_MTVAL2);
-		mtinst = csr_read(CSR_MTINST);
-	}
+	/* Update trap context pointer */
+	tcntx->prev_context = sbi_trap_get_context(scratch);
+	sbi_trap_set_context(scratch, tcntx);
 
 	if (mcause & (1UL << (__riscv_xlen - 1))) {
 		if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
@@ -279,32 +279,23 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 			rc = sbi_trap_aia_irq(regs, mcause);
 		else
 			rc = sbi_trap_nonaia_irq(regs, mcause);
-		if (rc) {
-			msg = "unhandled local interrupt";
-			goto trap_error;
-		}
-		return regs;
+		msg = "unhandled local interrupt";
+		goto trap_done;
 	}
-	/* Original trap_info */
-	trap.cause = mcause;
-	trap.tval  = mtval;
-	trap.tval2 = mtval2;
-	trap.tinst = mtinst;
-	trap.gva   = sbi_regs_gva(regs);
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
-		rc  = sbi_illegal_insn_handler(mtval, regs);
+		rc  = sbi_illegal_insn_handler(tcntx->trap.tval, regs);
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
-		rc  = sbi_misaligned_load_handler(regs, &trap);
+		rc  = sbi_misaligned_load_handler(regs, trap);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
-		rc  = sbi_misaligned_store_handler(regs, &trap);
+		rc  = sbi_misaligned_store_handler(regs, trap);
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
@@ -314,23 +305,24 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
 		break;
 	case CAUSE_LOAD_ACCESS:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
-		rc  = sbi_load_access_handler(regs, &trap);
+		rc  = sbi_load_access_handler(regs, trap);
 		msg = "load fault handler failed";
 		break;
 	case CAUSE_STORE_ACCESS:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
-		rc  = sbi_store_access_handler(regs, &trap);
+		rc  = sbi_store_access_handler(regs, trap);
 		msg = "store fault handler failed";
 		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		msg = "trap redirect failed";
-		rc  = sbi_trap_redirect(regs, &trap);
+		rc  = sbi_trap_redirect(regs, trap);
 		break;
 	}
 
-trap_error:
+trap_done:
 	if (rc)
-		sbi_trap_error(msg, rc, mcause, mtval, mtval2, mtinst, regs);
-	return regs;
+		sbi_trap_error(msg, rc, trap, regs);
+	sbi_trap_set_context(scratch, tcntx->prev_context);
+	return tcntx;
 }

From fea33a933498a34f2375d6ac53d9d932d373eefa Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 15:21:53 +0530
Subject: [PATCH 1526/1765] lib: sbi: Simplify parameters of misaligned and
 access fault handlers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The struct sbi_trap_context already has the information needed by
misaligned load/store and access fault load/store handlers so directly
pass struct sbi_trap_context pointer to these functions.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
---
 include/sbi/sbi_trap_ldst.h | 12 +++----
 lib/sbi/sbi_trap.c          |  8 ++---
 lib/sbi/sbi_trap_ldst.c     | 67 ++++++++++++++++++-------------------
 3 files changed, 40 insertions(+), 47 deletions(-)

diff --git a/include/sbi/sbi_trap_ldst.h b/include/sbi/sbi_trap_ldst.h
index 9cab4e424e6..8aee31643f7 100644
--- a/include/sbi/sbi_trap_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -20,16 +20,12 @@ union sbi_ldst_data {
 	ulong data_ulong;
 };
 
-int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
-				const struct sbi_trap_info *orig_trap);
+int sbi_misaligned_load_handler(struct sbi_trap_context *tcntx);
 
-int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
-				 const struct sbi_trap_info *orig_trap);
+int sbi_misaligned_store_handler(struct sbi_trap_context *tcntx);
 
-int sbi_load_access_handler(struct sbi_trap_regs *regs,
-			    const struct sbi_trap_info *orig_trap);
+int sbi_load_access_handler(struct sbi_trap_context *tcntx);
 
-int sbi_store_access_handler(struct sbi_trap_regs *regs,
-			     const struct sbi_trap_info *orig_trap);
+int sbi_store_access_handler(struct sbi_trap_context *tcntx);
 
 #endif
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 4dbda063a9a..a2afb0ac611 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -290,12 +290,12 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 		break;
 	case CAUSE_MISALIGNED_LOAD:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
-		rc  = sbi_misaligned_load_handler(regs, trap);
+		rc  = sbi_misaligned_load_handler(tcntx);
 		msg = "misaligned load handler failed";
 		break;
 	case CAUSE_MISALIGNED_STORE:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
-		rc  = sbi_misaligned_store_handler(regs, trap);
+		rc  = sbi_misaligned_store_handler(tcntx);
 		msg = "misaligned store handler failed";
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
@@ -305,12 +305,12 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 		break;
 	case CAUSE_LOAD_ACCESS:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
-		rc  = sbi_load_access_handler(regs, trap);
+		rc  = sbi_load_access_handler(tcntx);
 		msg = "load fault handler failed";
 		break;
 	case CAUSE_STORE_ACCESS:
 		sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
-		rc  = sbi_store_access_handler(regs, trap);
+		rc  = sbi_store_access_handler(tcntx);
 		msg = "store fault handler failed";
 		break;
 	default:
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index 5a0537b1be1..f9c0241c900 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -12,7 +12,6 @@
 #include <sbi/riscv_fp.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_trap_ldst.h>
-#include <sbi/sbi_pmu.h>
 #include <sbi/sbi_trap.h>
 #include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_platform.h>
@@ -23,8 +22,7 @@
  * @return rlen=success, 0=success w/o regs modification, or negative error
  */
 typedef int (*sbi_trap_ld_emulator)(int rlen, union sbi_ldst_data *out_val,
-				    struct sbi_trap_regs *regs,
-				    const struct sbi_trap_info *orig_trap);
+				    struct sbi_trap_context *tcntx);
 
 /**
  * Store emulator callback:
@@ -32,8 +30,7 @@ typedef int (*sbi_trap_ld_emulator)(int rlen, union sbi_ldst_data *out_val,
  * @return wlen=success, 0=success w/o regs modification, or negative error
  */
 typedef int (*sbi_trap_st_emulator)(int wlen, union sbi_ldst_data in_val,
-				    struct sbi_trap_regs *regs,
-				    const struct sbi_trap_info *orig_trap);
+				    struct sbi_trap_context *tcntx);
 
 static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 					ulong addr_offset)
@@ -47,10 +44,11 @@ static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 		return orig_tinst | (addr_offset << SH_RS1);
 }
 
-static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
-				 const struct sbi_trap_info *orig_trap,
+static int sbi_trap_emulate_load(struct sbi_trap_context *tcntx,
 				 sbi_trap_ld_emulator emu)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
 	ulong insn, insn_len;
 	union sbi_ldst_data val = { 0 };
 	struct sbi_trap_info uptrap;
@@ -150,8 +148,7 @@ static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
 		return sbi_trap_redirect(regs, orig_trap);
 	}
 
-	rc = emu(len, &val, regs, orig_trap);
-
+	rc = emu(len, &val, tcntx);
 	if (rc <= 0)
 		return rc;
 
@@ -169,10 +166,11 @@ static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
 	return 0;
 }
 
-static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
-				  const struct sbi_trap_info *orig_trap,
+static int sbi_trap_emulate_store(struct sbi_trap_context *tcntx,
 				  sbi_trap_st_emulator emu)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
 	ulong insn, insn_len;
 	union sbi_ldst_data val;
 	struct sbi_trap_info uptrap;
@@ -254,8 +252,7 @@ static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
 		return sbi_trap_redirect(regs, orig_trap);
 	}
 
-	rc = emu(len, val, regs, orig_trap);
-
+	rc = emu(len, val, tcntx);
 	if (rc <= 0)
 		return rc;
 
@@ -265,9 +262,10 @@ static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
 }
 
 static int sbi_misaligned_ld_emulator(int rlen, union sbi_ldst_data *out_val,
-				      struct sbi_trap_regs *regs,
-				      const struct sbi_trap_info *orig_trap)
+				      struct sbi_trap_context *tcntx)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
 	struct sbi_trap_info uptrap;
 	int i;
 
@@ -283,17 +281,16 @@ static int sbi_misaligned_ld_emulator(int rlen, union sbi_ldst_data *out_val,
 	return rlen;
 }
 
-int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
-				const struct sbi_trap_info *orig_trap)
+int sbi_misaligned_load_handler(struct sbi_trap_context *tcntx)
 {
-	return sbi_trap_emulate_load(regs, orig_trap,
-				     sbi_misaligned_ld_emulator);
+	return sbi_trap_emulate_load(tcntx, sbi_misaligned_ld_emulator);
 }
 
 static int sbi_misaligned_st_emulator(int wlen, union sbi_ldst_data in_val,
-				      struct sbi_trap_regs *regs,
-				      const struct sbi_trap_info *orig_trap)
+				      struct sbi_trap_context *tcntx)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
 	struct sbi_trap_info uptrap;
 	int i;
 
@@ -309,17 +306,17 @@ static int sbi_misaligned_st_emulator(int wlen, union sbi_ldst_data in_val,
 	return wlen;
 }
 
-int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
-				 const struct sbi_trap_info *orig_trap)
+int sbi_misaligned_store_handler(struct sbi_trap_context *tcntx)
 {
-	return sbi_trap_emulate_store(regs, orig_trap,
-				      sbi_misaligned_st_emulator);
+	return sbi_trap_emulate_store(tcntx, sbi_misaligned_st_emulator);
 }
 
 static int sbi_ld_access_emulator(int rlen, union sbi_ldst_data *out_val,
-				  struct sbi_trap_regs *regs,
-				  const struct sbi_trap_info *orig_trap)
+				  struct sbi_trap_context *tcntx)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
+
 	/* If fault came from M mode, just fail */
 	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
 		return SBI_EINVAL;
@@ -332,16 +329,17 @@ static int sbi_ld_access_emulator(int rlen, union sbi_ldst_data *out_val,
 	return rlen;
 }
 
-int sbi_load_access_handler(struct sbi_trap_regs *regs,
-			    const struct sbi_trap_info *orig_trap)
+int sbi_load_access_handler(struct sbi_trap_context *tcntx)
 {
-	return sbi_trap_emulate_load(regs, orig_trap, sbi_ld_access_emulator);
+	return sbi_trap_emulate_load(tcntx, sbi_ld_access_emulator);
 }
 
 static int sbi_st_access_emulator(int wlen, union sbi_ldst_data in_val,
-				  struct sbi_trap_regs *regs,
-				  const struct sbi_trap_info *orig_trap)
+				  struct sbi_trap_context *tcntx)
 {
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
+
 	/* If fault came from M mode, just fail */
 	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
 		return SBI_EINVAL;
@@ -354,8 +352,7 @@ static int sbi_st_access_emulator(int wlen, union sbi_ldst_data in_val,
 	return wlen;
 }
 
-int sbi_store_access_handler(struct sbi_trap_regs *regs,
-			     const struct sbi_trap_info *orig_trap)
+int sbi_store_access_handler(struct sbi_trap_context *tcntx)
 {
-	return sbi_trap_emulate_store(regs, orig_trap, sbi_st_access_emulator);
+	return sbi_trap_emulate_store(tcntx, sbi_st_access_emulator);
 }

From f414cf931eaf41c28d2750928108321d5006b178 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 15:54:56 +0530
Subject: [PATCH 1527/1765] lib: sbi: Simplify parameters of
 sbi_illegal_insn_handler()

The struct sbi_trap_context already has the information needed by
sbi_illegal_insn_handler() so directly pass struct sbi_trap_context
pointer to this function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_illegal_insn.h | 4 ++--
 lib/sbi/sbi_illegal_insn.c     | 7 ++++---
 lib/sbi/sbi_trap.c             | 2 +-
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_illegal_insn.h b/include/sbi/sbi_illegal_insn.h
index 0397935e20e..7be72ac0843 100644
--- a/include/sbi/sbi_illegal_insn.h
+++ b/include/sbi/sbi_illegal_insn.h
@@ -12,8 +12,8 @@
 
 #include <sbi/sbi_types.h>
 
-struct sbi_trap_regs;
+struct sbi_trap_context;
 
-int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs);
+int sbi_illegal_insn_handler(struct sbi_trap_context *tcntx);
 
 #endif
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index dd0b3c126ce..ed6f111362c 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -136,8 +136,10 @@ static const illegal_insn_func illegal_insn_table[32] = {
 	truly_illegal_insn  /* 31 */
 };
 
-int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
+int sbi_illegal_insn_handler(struct sbi_trap_context *tcntx)
 {
+	struct sbi_trap_regs *regs = &tcntx->regs;
+	ulong insn = tcntx->trap.tval;
 	struct sbi_trap_info uptrap;
 
 	/*
@@ -154,9 +156,8 @@ int sbi_illegal_insn_handler(ulong insn, struct sbi_trap_regs *regs)
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ILLEGAL_INSN);
 	if (unlikely((insn & 3) != 3)) {
 		insn = sbi_get_insn(regs->mepc, &uptrap);
-		if (uptrap.cause) {
+		if (uptrap.cause)
 			return sbi_trap_redirect(regs, &uptrap);
-		}
 		if ((insn & 3) != 3)
 			return truly_illegal_insn(insn, regs);
 	}
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index a2afb0ac611..4e691dfc5c3 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -285,7 +285,7 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 
 	switch (mcause) {
 	case CAUSE_ILLEGAL_INSTRUCTION:
-		rc  = sbi_illegal_insn_handler(tcntx->trap.tval, regs);
+		rc  = sbi_illegal_insn_handler(tcntx);
 		msg = "illegal instruction handler failed";
 		break;
 	case CAUSE_MISALIGNED_LOAD:

From d84e7eb7f0848225e10131ca4b9e1571d78cdabd Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 17:53:41 +0530
Subject: [PATCH 1528/1765] lib: sbi: Remove regs paramter of
 sbi_irqchip_process()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The irqchip handlers will typically not need pointer to trap registers
so remove regs parameter of sbi_irqchip_process().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
---
 include/sbi/sbi_irqchip.h |  5 ++---
 lib/sbi/sbi_irqchip.c     | 10 +++++-----
 lib/sbi/sbi_trap.c        |  4 ++--
 lib/utils/irqchip/imsic.c |  2 +-
 4 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
index 6acc6e3f5a5..0ed02eb4ac9 100644
--- a/include/sbi/sbi_irqchip.h
+++ b/include/sbi/sbi_irqchip.h
@@ -13,7 +13,6 @@
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch;
-struct sbi_trap_regs;
 
 /**
  * Set external interrupt handling function
@@ -23,7 +22,7 @@ struct sbi_trap_regs;
  *
  * @param fn function pointer for handling external irqs
  */
-void sbi_irqchip_set_irqfn(int (*fn)(struct sbi_trap_regs *regs));
+void sbi_irqchip_set_irqfn(int (*fn)(void));
 
 /**
  * Process external interrupts
@@ -33,7 +32,7 @@ void sbi_irqchip_set_irqfn(int (*fn)(struct sbi_trap_regs *regs));
  *
  * @param regs pointer for trap registers
  */
-int sbi_irqchip_process(struct sbi_trap_regs *regs);
+int sbi_irqchip_process(void);
 
 /** Initialize interrupt controllers */
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index 24128bece5a..0ae604aa672 100644
--- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c
@@ -10,22 +10,22 @@
 #include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_platform.h>
 
-static int default_irqfn(struct sbi_trap_regs *regs)
+static int default_irqfn(void)
 {
 	return SBI_ENODEV;
 }
 
-static int (*ext_irqfn)(struct sbi_trap_regs *regs) = default_irqfn;
+static int (*ext_irqfn)(void) = default_irqfn;
 
-void sbi_irqchip_set_irqfn(int (*fn)(struct sbi_trap_regs *regs))
+void sbi_irqchip_set_irqfn(int (*fn)(void))
 {
 	if (fn)
 		ext_irqfn = fn;
 }
 
-int sbi_irqchip_process(struct sbi_trap_regs *regs)
+int sbi_irqchip_process(void)
 {
-	return ext_irqfn(regs);
+	return ext_irqfn();
 }
 
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 4e691dfc5c3..72b1788153b 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -209,7 +209,7 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 		sbi_ipi_process();
 		break;
 	case IRQ_M_EXT:
-		return sbi_irqchip_process(regs);
+		return sbi_irqchip_process();
 	default:
 		return SBI_ENOENT;
 	}
@@ -232,7 +232,7 @@ static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
 			sbi_ipi_process();
 			break;
 		case IRQ_M_EXT:
-			rc = sbi_irqchip_process(regs);
+			rc = sbi_irqchip_process();
 			if (rc)
 				return rc;
 			break;
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 36ef66cf1eb..f2a35c6302b 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -140,7 +140,7 @@ int imsic_get_target_file(u32 hartid)
 	return imsic_get_hart_file(scratch);
 }
 
-static int imsic_external_irqfn(struct sbi_trap_regs *regs)
+static int imsic_external_irqfn(void)
 {
 	ulong mirq;
 

From 43d346c0c1d3817d863741c3c523ab6e0c87cc6f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 18:00:50 +0530
Subject: [PATCH 1529/1765] lib: sbi: Remove regs parameter from trap irq
 handling functions

The trap irq handling functions no longer require regs parameter
so remove it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/riscv_encoding.h |  2 ++
 lib/sbi/sbi_trap.c           | 13 ++++++-------
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 46bbeed04f4..d914828e13a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -80,6 +80,8 @@
 #define HSTATUS_GVA			_UL(0x00000040)
 #define HSTATUS_VSBE			_UL(0x00000020)
 
+#define MCAUSE_IRQ_MASK			(_UL(1) << (__riscv_xlen - 1))
+
 #define IRQ_S_SOFT			1
 #define IRQ_VS_SOFT			2
 #define IRQ_M_SOFT			3
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 72b1788153b..2462763699f 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -198,10 +198,9 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	return 0;
 }
 
-static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
+static int sbi_trap_nonaia_irq(unsigned long irq)
 {
-	mcause &= ~(1UL << (__riscv_xlen - 1));
-	switch (mcause) {
+	switch (irq) {
 	case IRQ_M_TIMER:
 		sbi_timer_process();
 		break;
@@ -217,7 +216,7 @@ static int sbi_trap_nonaia_irq(struct sbi_trap_regs *regs, ulong mcause)
 	return 0;
 }
 
-static int sbi_trap_aia_irq(struct sbi_trap_regs *regs, ulong mcause)
+static int sbi_trap_aia_irq(void)
 {
 	int rc;
 	unsigned long mtopi;
@@ -273,12 +272,12 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 	tcntx->prev_context = sbi_trap_get_context(scratch);
 	sbi_trap_set_context(scratch, tcntx);
 
-	if (mcause & (1UL << (__riscv_xlen - 1))) {
+	if (mcause & MCAUSE_IRQ_MASK) {
 		if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
 					   SBI_HART_EXT_SMAIA))
-			rc = sbi_trap_aia_irq(regs, mcause);
+			rc = sbi_trap_aia_irq();
 		else
-			rc = sbi_trap_nonaia_irq(regs, mcause);
+			rc = sbi_trap_nonaia_irq(mcause & ~MCAUSE_IRQ_MASK);
 		msg = "unhandled local interrupt";
 		goto trap_done;
 	}

From 5b11f16c3c65feb065ba6a703d69a3c56ccca688 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 11 Mar 2024 18:15:20 +0530
Subject: [PATCH 1530/1765] lib: sbi: Pass trap context pointer to
 sbi_ecall_handler()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

To be consistent with other trap handlers, pass trap context pointer
to sbi_ecall_handler().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
---
 include/sbi/sbi_ecall.h | 4 ++--
 lib/sbi/sbi_ecall.c     | 3 ++-
 lib/sbi/sbi_trap.c      | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/include/sbi/sbi_ecall.h b/include/sbi/sbi_ecall.h
index 0bf42d16e27..0b35eff76a1 100644
--- a/include/sbi/sbi_ecall.h
+++ b/include/sbi/sbi_ecall.h
@@ -18,7 +18,7 @@
 #define SBI_OPENSBI_IMPID		1
 
 struct sbi_trap_regs;
-struct sbi_trap_info;
+struct sbi_trap_context;
 
 struct sbi_ecall_return {
 	/* Return flag to skip register update */
@@ -87,7 +87,7 @@ int sbi_ecall_register_extension(struct sbi_ecall_extension *ext);
 
 void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext);
 
-int sbi_ecall_handler(struct sbi_trap_regs *regs);
+int sbi_ecall_handler(struct sbi_trap_context *tcntx);
 
 int sbi_ecall_init(void);
 
diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index 631c5dd168d..d4fc58c59d7 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -95,9 +95,10 @@ void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext)
 		sbi_list_del_init(&ext->head);
 }
 
-int sbi_ecall_handler(struct sbi_trap_regs *regs)
+int sbi_ecall_handler(struct sbi_trap_context *tcntx)
 {
 	int ret = 0;
+	struct sbi_trap_regs *regs = &tcntx->regs;
 	struct sbi_ecall_extension *ext;
 	unsigned long extension_id = regs->a7;
 	unsigned long func_id = regs->a6;
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 2462763699f..060cec613b0 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -299,7 +299,7 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 		break;
 	case CAUSE_SUPERVISOR_ECALL:
 	case CAUSE_MACHINE_ECALL:
-		rc  = sbi_ecall_handler(regs);
+		rc  = sbi_ecall_handler(tcntx);
 		msg = "ecall handler failed";
 		break;
 	case CAUSE_LOAD_ACCESS:

From f7d00507552e9edac13f740f48479c2172849a4f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 12 Mar 2024 13:52:53 +0530
Subject: [PATCH 1531/1765] lib: sbi: Extend sbi_trap_error() to dump state in
 a nested trap

The sbi_trap_error() should dump state of all in-flight traps upon
failure in a nested trap so extend it accordingly.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/sbi/sbi_trap.c | 105 ++++++++++++++++++++++++++-------------------
 1 file changed, 60 insertions(+), 45 deletions(-)

diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 060cec613b0..175560f7185 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -23,54 +23,69 @@
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
-static void __noreturn sbi_trap_error(const char *msg, int rc,
-				      const struct sbi_trap_info *trap,
-				      const struct sbi_trap_regs *regs)
+static void sbi_trap_error_one(const struct sbi_trap_context *tcntx,
+			       const char *prefix, u32 hartid, u32 depth)
 {
-	u32 hartid = current_hartid();
+	const struct sbi_trap_info *trap = &tcntx->trap;
+	const struct sbi_trap_regs *regs = &tcntx->regs;
 
-	sbi_printf("%s: hart%d: %s (error %d)\n", __func__, hartid, msg, rc);
-	sbi_printf("%s: hart%d: mcause=0x%" PRILX " mtval=0x%" PRILX "\n",
-		   __func__, hartid, trap->cause, trap->tval);
+	sbi_printf("\n");
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "mcause", trap->cause, "mtval", trap->tval);
 	if (misa_extension('H')) {
-		sbi_printf("%s: hart%d: mtval2=0x%" PRILX
-			   " mtinst=0x%" PRILX "\n",
-			   __func__, hartid, trap->tval2, trap->tinst);
+		sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+			   hartid, depth, "mtval2", trap->tval2, "mtinst", trap->tinst);
 	}
-	sbi_printf("%s: hart%d: mepc=0x%" PRILX " mstatus=0x%" PRILX "\n",
-		   __func__, hartid, regs->mepc, regs->mstatus);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "ra", regs->ra, "sp", regs->sp);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "gp", regs->gp, "tp", regs->tp);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s0", regs->s0, "s1", regs->s1);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "a0", regs->a0, "a1", regs->a1);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "a2", regs->a2, "a3", regs->a3);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "a4", regs->a4, "a5", regs->a5);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "a6", regs->a6, "a7", regs->a7);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s2", regs->s2, "s3", regs->s3);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s4", regs->s4, "s5", regs->s5);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s6", regs->s6, "s7", regs->s7);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s8", regs->s8, "s9", regs->s9);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "s10", regs->s10, "s11", regs->s11);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "t0", regs->t0, "t1", regs->t1);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "t2", regs->t2, "t3", regs->t3);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", __func__,
-		   hartid, "t4", regs->t4, "t5", regs->t5);
-	sbi_printf("%s: hart%d: %s=0x%" PRILX "\n", __func__, hartid, "t6",
-		   regs->t6);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "mepc", regs->mepc, "mstatus", regs->mstatus);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "ra", regs->ra, "sp", regs->sp);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "gp", regs->gp, "tp", regs->tp);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s0", regs->s0, "s1", regs->s1);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "a0", regs->a0, "a1", regs->a1);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "a2", regs->a2, "a3", regs->a3);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "a4", regs->a4, "a5", regs->a5);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "a6", regs->a6, "a7", regs->a7);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s2", regs->s2, "s3", regs->s3);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s4", regs->s4, "s5", regs->s5);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s6", regs->s6, "s7", regs->s7);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s8", regs->s8, "s9", regs->s9);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "s10", regs->s10, "s11", regs->s11);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "t0", regs->t0, "t1", regs->t1);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "t2", regs->t2, "t3", regs->t3);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX " %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "t4", regs->t4, "t5", regs->t5);
+	sbi_printf("%s: hart%d: trap%d: %s=0x%" PRILX "\n", prefix,
+		   hartid, depth, "t6", regs->t6);
+}
+
+static void __noreturn sbi_trap_error(const char *msg, int rc,
+				      const struct sbi_trap_context *tcntx)
+{
+	u32 depth = 0, hartid = current_hartid();
+	const struct sbi_trap_context *tc;
+
+	for (tc = tcntx; tc; tc = tc->prev_context)
+		depth++;
+
+	sbi_printf("\n");
+	sbi_printf("%s: hart%d: trap%d: %s (error %d)\n", __func__,
+		   hartid, depth - 1, msg, rc);
+	for (tc = tcntx; tc; tc = tc->prev_context)
+		sbi_trap_error_one(tc, __func__, hartid, --depth);
 
 	sbi_hart_hang();
 }
@@ -321,7 +336,7 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 
 trap_done:
 	if (rc)
-		sbi_trap_error(msg, rc, trap, regs);
+		sbi_trap_error(msg, rc, tcntx);
 	sbi_trap_set_context(scratch, tcntx->prev_context);
 	return tcntx;
 }

From 3b2f89e3d64571ad7af17f036b5ed98a0aee105e Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Tue, 19 Mar 2024 16:02:39 +0000
Subject: [PATCH 1532/1765] docs: writing_tests: Make docs correspond the
 latest changes

We should store test object files list in the `libsbi-objs-y` Makefile
variable, not in `libsbitests-objs-y`. Update the documentation
correspondingly.

Since we don't use the `console_dev` static variable directly in the
`sbi_console_test` unit test anymore, remove the paragraph which says
that we do.

Fixes: 86224ec36aed ("docs/writing_tests: Update tests paths")
Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/writing_tests.md | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/docs/writing_tests.md b/docs/writing_tests.md
index 816adbae500..0fd15d67616 100644
--- a/docs/writing_tests.md
+++ b/docs/writing_tests.md
@@ -53,8 +53,8 @@ SBIUNIT_TEST_SUITE(string_test_suite, string_test_cases);
 Then, add the corresponding Makefile entries to `lib/sbi/tests/objects.mk`:
 ```lang-makefile
 ...
-libsbitests-objs-$(CONFIG_SBIUNIT) += sbi_string_test.o
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_string_test.o
 ```
 
 If you compiled OpenSBI with CONFIG_SBIUNIT enabled before, you may need to
@@ -113,9 +113,6 @@ carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
 You don't have to compile the `sbi_string_test.o` separately, because the
 test code will be included into the `sbi_string` object file.
 
-See example in `lib/sbi/tests/sbi_console_test.c`, where statically declared
-`console_dev` variable is used to mock the `sbi_console_device` structure.
-
 "Mocking" the structures
 ------------------------
 See the example of structure "mocking" in `lib/sbi/tests/sbi_console_test.c`,

From 5186da687debaab5c4a81ec351e56d145d88c79c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christoph=20M=C3=BCllner?= <christoph.muellner@vrull.eu>
Date: Tue, 19 Mar 2024 10:26:42 +0100
Subject: [PATCH 1533/1765] platform: generic: allwinner: sun20i-d1: Remove
 duplicated CSR definitions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

All T-Head CSRs are already defined in thead/c9xx_encoding.h.
Let's reuse the values from there instead of redefining them with
a slightly different name.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 27 +++++++++-----------------
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index e9388dba76b..ed19d5d427c 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -33,15 +33,6 @@
 #define RISCV_CFG_BGR_REG		0xd0c
 #define PPU_BGR_REG			0x1ac
 
-/*
- * CSRs
- */
-
-#define CSR_MXSTATUS			0x7c0
-#define CSR_MHCR			0x7c1
-#define CSR_MCOR			0x7c2
-#define CSR_MHINT			0x7c5
-
 static unsigned long csr_mxstatus;
 static unsigned long csr_mhcr;
 static unsigned long csr_mhint;
@@ -49,24 +40,24 @@ static unsigned long csr_mhint;
 static void sun20i_d1_csr_save(void)
 {
 	/* Save custom CSRs. */
-	csr_mxstatus	= csr_read(CSR_MXSTATUS);
-	csr_mhcr	= csr_read(CSR_MHCR);
-	csr_mhint	= csr_read(CSR_MHINT);
+	csr_mxstatus	= csr_read(THEAD_C9XX_CSR_MXSTATUS);
+	csr_mhcr	= csr_read(THEAD_C9XX_CSR_MHCR);
+	csr_mhint	= csr_read(THEAD_C9XX_CSR_MHINT);
 
 	/* Flush and disable caches. */
-	csr_write(CSR_MCOR, 0x22);
-	csr_write(CSR_MHCR, 0x0);
+	csr_write(THEAD_C9XX_CSR_MCOR, 0x22);
+	csr_write(THEAD_C9XX_CSR_MHCR, 0x0);
 }
 
 static void sun20i_d1_csr_restore(void)
 {
 	/* Invalidate caches and the branch predictor. */
-	csr_write(CSR_MCOR, 0x70013);
+	csr_write(THEAD_C9XX_CSR_MCOR, 0x70013);
 
 	/* Restore custom CSRs, including the cache state. */
-	csr_write(CSR_MXSTATUS,	csr_mxstatus);
-	csr_write(CSR_MHCR,	csr_mhcr);
-	csr_write(CSR_MHINT,	csr_mhint);
+	csr_write(THEAD_C9XX_CSR_MXSTATUS, csr_mxstatus);
+	csr_write(THEAD_C9XX_CSR_MHCR, csr_mhcr);
+	csr_write(THEAD_C9XX_CSR_MHINT, csr_mhint);
 }
 
 /*

From 76d7e9b8ee72c226cd8424d5483827bcf4c792fa Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 12 Mar 2024 16:24:59 +0800
Subject: [PATCH 1534/1765] firmware: remove copy-base relocation

Remove copy-base relocations that are no longer needed.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile            |  8 +++-
 README.md           |  3 +-
 docs/firmware/fw.md |  6 ---
 firmware/fw_base.S  | 98 ++-------------------------------------------
 firmware/objects.mk | 11 -----
 5 files changed, 11 insertions(+), 115 deletions(-)

diff --git a/Makefile b/Makefile
index 680c19a4bb1..50f634e4445 100644
--- a/Makefile
+++ b/Makefile
@@ -179,6 +179,10 @@ CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
 CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
 
+ifneq ($(OPENSBI_LD_PIE),y)
+$(error Your linker does not support creating PIEs, opensbi requires this.)
+endif
+
 # Build Info:
 # OPENSBI_BUILD_TIME_STAMP -- the compilation time stamp
 # OPENSBI_BUILD_COMPILER_VERSION -- the compiler version info
@@ -356,7 +360,7 @@ CFLAGS		+=	-mcmodel=$(PLATFORM_RISCV_CODE_MODEL)
 CFLAGS		+=	$(RELAX_FLAG)
 CFLAGS		+=	$(GENFLAGS)
 CFLAGS		+=	$(platform-cflags-y)
-CFLAGS		+=	-fno-pie -no-pie
+CFLAGS		+=	-fPIE -pie
 CFLAGS		+=	$(firmware-cflags-y)
 
 CPPFLAGS	+=	$(GENFLAGS)
@@ -365,6 +369,7 @@ CPPFLAGS	+=	$(firmware-cppflags-y)
 
 ASFLAGS		=	-g -Wall -nostdlib
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+ASFLAGS		+=	-fPIE
 # Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 ASFLAGS		+=	-mno-save-restore
@@ -391,6 +396,7 @@ ifeq ($(OPENSBI_LD_EXCLUDE_LIBS),y)
 ELFFLAGS	+=	-Wl,--exclude-libs,ALL
 endif
 ELFFLAGS	+=	-Wl,--build-id=none
+ELFFLAGS	+=	-Wl,--no-dynamic-linker -Wl,-pie
 ELFFLAGS	+=	$(platform-ldflags-y)
 ELFFLAGS	+=	$(firmware-ldflags-y)
 
diff --git a/README.md b/README.md
index 73de8eaf84f..cbae73ae5e6 100644
--- a/README.md
+++ b/README.md
@@ -276,8 +276,7 @@ document.
 
 NOTE: Using Clang with a `riscv*-linux-gnu` GNU binutils linker has been seen
 to produce broken binaries with missing relocations; it is therefore currently
-recommended that this combination be avoided or *FW_PIC=n* be used to disable
-building OpenSBI as a position-independent binary.
+recommended that this combination be avoided.
 
 Building with timestamp and compiler info
 -----------------------------------------
diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 38351c84a54..2f4deb55fc3 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -69,12 +69,6 @@ parameters:
   argument by the prior booting stage.
 * **FW_FDT_PADDING** - Optional zero bytes padding to the embedded flattened
   device tree binary file specified by **FW_FDT_PATH** option.
-* **FW_PIC** - "FW_PIC=y" generates position independent executable firmware
-  images. OpenSBI can run at arbitrary address with appropriate alignment.
-  Therefore, the original relocation mechanism ("FW_PIC=n") will be skipped.
-  In other words, OpenSBI will directly run at the load address without any
-  code movement. This option requires a toolchain with PIE support, and it
-  is on by default.
 
 Additionally, each firmware type as a set of type specific configuration
 parameters. Detailed information for each firmware type can be found in the
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 629032221e0..b950c0b836c 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -15,8 +15,7 @@
 #include <sbi/sbi_trap.h>
 
 #define BOOT_STATUS_LOTTERY_DONE	1
-#define BOOT_STATUS_RELOCATE_DONE	2
-#define BOOT_STATUS_BOOT_HART_DONE	3
+#define BOOT_STATUS_BOOT_HART_DONE	2
 
 .macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
 	add	\__d0, \__s0, zero
@@ -32,17 +31,6 @@
 	add	\__d4, \__s4, zero
 .endm
 
-/*
- * If __start_reg <= __check_reg and __check_reg < __end_reg then
- *   jump to __pass
- */
-.macro BRANGE __start_reg, __end_reg, __check_reg, __jump_lable
-	blt	\__check_reg, \__start_reg, 999f
-	bge	\__check_reg, \__end_reg, 999f
-	j	\__jump_lable
-999:
-.endm
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _start
@@ -56,15 +44,14 @@ _start:
 	li	a7, -1
 	beq	a6, a7, _try_lottery
 	/* Jump to relocation wait loop if we are not boot hart */
-	bne	a0, a6, _wait_relocate_copy_done
+	bne	a0, a6, _wait_for_boot_hart
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
 	lla	a6, _boot_status
 	li	a7, BOOT_STATUS_LOTTERY_DONE
 	amoswap.w a6, a7, (a6)
-	bnez	a6, _wait_relocate_copy_done
+	bnez	a6, _wait_for_boot_hart
 
-#ifdef FW_PIC
 	/* relocate the global table content */
 	li	t0, FW_TEXT_START	/* link start */
 	lla	t1, _fw_start		/* load start */
@@ -85,86 +72,7 @@ _try_lottery:
 3:
 	addi	t0, t0, (REGBYTES * 3)
 	blt	t0, t1, 2b
-	j	_relocate_done
-_wait_relocate_copy_done:
-	j	_wait_for_boot_hart
-#else
-	/* Relocate if load address != link address */
-_relocate:
-	li	t0, FW_TEXT_START	/* link start */
-	lla	t2, _fw_start		/* load start */
-	lla	t3, _fw_reloc_end	/* load end */
-	sub	t6, t2, t0		/* load offset */
-	sub	t1, t3, t6		/* link end */
-	beq	t0, t2, _relocate_done
-	lla	t4, _relocate_done
-	sub	t4, t4, t6
-	blt	t2, t0, _relocate_copy_to_upper
-_relocate_copy_to_lower:
-	ble	t1, t2, _relocate_copy_to_lower_loop
-	lla	t3, _boot_status
-	BRANGE	t2, t1, t3, _start_hang
-	lla	t3, _relocate
-	lla	t5, _relocate_done
-	BRANGE	t2, t1, t3, _start_hang
-	BRANGE	t2, t1, t5, _start_hang
-	BRANGE  t3, t5, t2, _start_hang
-_relocate_copy_to_lower_loop:
-	REG_L	t3, 0(t2)
-	REG_S	t3, 0(t0)
-	add	t0, t0, __SIZEOF_POINTER__
-	add	t2, t2, __SIZEOF_POINTER__
-	blt	t0, t1, _relocate_copy_to_lower_loop
-	jr	t4
-_relocate_copy_to_upper:
-	ble	t3, t0, _relocate_copy_to_upper_loop
-	lla	t2, _boot_status
-	BRANGE	t0, t3, t2, _start_hang
-	lla	t2, _relocate
-	lla	t5, _relocate_done
-	BRANGE	t0, t3, t2, _start_hang
-	BRANGE	t0, t3, t5, _start_hang
-	BRANGE	t2, t5, t0, _start_hang
-_relocate_copy_to_upper_loop:
-	add	t3, t3, -__SIZEOF_POINTER__
-	add	t1, t1, -__SIZEOF_POINTER__
-	REG_L	t2, 0(t3)
-	REG_S	t2, 0(t1)
-	blt	t0, t1, _relocate_copy_to_upper_loop
-	jr	t4
-_wait_relocate_copy_done:
-	lla	t0, _fw_start
-	li	t1, FW_TEXT_START
-	beq	t0, t1, _wait_for_boot_hart
-	lla	t2, _boot_status
-	lla	t3, _wait_for_boot_hart
-	sub	t3, t3, t0
-	add	t3, t3, t1
-1:
-	/* waitting for relocate copy done (_boot_status == 1) */
-	li	t4, BOOT_STATUS_RELOCATE_DONE
-	REG_L	t5, 0(t2)
-	/* Reduce the bus traffic so that boot hart may proceed faster */
-	nop
-	nop
-	nop
-	bgt     t4, t5, 1b
-	jr	t3
-#endif
 _relocate_done:
-
-	/*
-	 * Mark relocate copy done
-	 * Use _boot_status copy relative to the load address
-	 */
-	lla	t0, _boot_status
-#ifndef FW_PIC
-	add	t0, t0, t6
-#endif
-	li	t1, BOOT_STATUS_RELOCATE_DONE
-	REG_S	t1, 0(t0)
-	fence	rw, rw
-
 	/* At this point we are running from link address */
 
 	/* Reset all registers except ra, a0, a1, a2, a3 and a4 for boot HART */
diff --git a/firmware/objects.mk b/firmware/objects.mk
index 3ae0a28f710..e6b364b8115 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -13,17 +13,6 @@ firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
-ifndef FW_PIC
-FW_PIC := $(OPENSBI_LD_PIE)
-endif
-
-ifeq ($(FW_PIC),y)
-firmware-genflags-y +=	-DFW_PIC
-firmware-asflags-y  +=	-fpic
-firmware-cflags-y   +=	-fPIE -pie
-firmware-ldflags-y  +=	-Wl,--no-dynamic-linker -Wl,-pie
-endif
-
 ifdef FW_TEXT_START
 firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
 endif

From c8cdf01d8f3a87a581c5b03d157dbf12913e9fb5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Thu, 21 Mar 2024 16:57:16 +0100
Subject: [PATCH 1535/1765] lib: sbi: Add support for Supervisor Software
 Events extension
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This extension [1] allows to deliver events from SBI to supervisor via
a software mechanism. This extension defines events (either local or
global) which are signaled by the SBI on specific signal sources (IRQ,
exceptions, etc) and are injected to be executed in supervisor mode.

[1] https://lists.riscv.org/g/tech-prs/message/798

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |   79 +-
 include/sbi/sbi_error.h           |    2 +
 include/sbi/sbi_sse.h             |   93 +++
 lib/sbi/objects.mk                |    1 +
 lib/sbi/sbi_init.c                |   13 +
 lib/sbi/sbi_sse.c                 | 1130 +++++++++++++++++++++++++++++
 lib/sbi/sbi_trap.c                |    5 +
 7 files changed, 1322 insertions(+), 1 deletion(-)
 create mode 100644 include/sbi/sbi_sse.h
 create mode 100644 lib/sbi/sbi_sse.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 690c31bc561..a511e0b7d12 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -33,6 +33,7 @@
 #define SBI_EXT_SUSP				0x53555350
 #define SBI_EXT_CPPC				0x43505043
 #define SBI_EXT_DBTR				0x44425452
+#define SBI_EXT_SSE				0x535345
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -304,6 +305,80 @@ enum sbi_cppc_reg_id {
 	SBI_CPPC_NON_ACPI_LAST		= SBI_CPPC_TRANSITION_LATENCY,
 };
 
+/* SBI Function IDs for SSE extension */
+#define SBI_EXT_SSE_READ_ATTR		0x00000000
+#define SBI_EXT_SSE_WRITE_ATTR		0x00000001
+#define SBI_EXT_SSE_REGISTER		0x00000002
+#define SBI_EXT_SSE_UNREGISTER		0x00000003
+#define SBI_EXT_SSE_ENABLE		0x00000004
+#define SBI_EXT_SSE_DISABLE		0x00000005
+#define SBI_EXT_SSE_COMPLETE		0x00000006
+#define SBI_EXT_SSE_INJECT		0x00000007
+
+/* SBI SSE Event Attributes. */
+enum sbi_sse_attr_id {
+	SBI_SSE_ATTR_STATUS		= 0x00000000,
+	SBI_SSE_ATTR_PRIO		= 0x00000001,
+	SBI_SSE_ATTR_CONFIG		= 0x00000002,
+	SBI_SSE_ATTR_PREFERRED_HART	= 0x00000003,
+	SBI_SSE_ATTR_ENTRY_PC		= 0x00000004,
+	SBI_SSE_ATTR_ENTRY_ARG		= 0x00000005,
+	SBI_SSE_ATTR_INTERRUPTED_SEPC	= 0x00000006,
+	SBI_SSE_ATTR_INTERRUPTED_FLAGS	= 0x00000007,
+	SBI_SSE_ATTR_INTERRUPTED_A6	= 0x00000008,
+	SBI_SSE_ATTR_INTERRUPTED_A7	= 0x00000009,
+
+	SBI_SSE_ATTR_MAX		= 0x0000000A
+};
+
+#define SBI_SSE_ATTR_STATUS_STATE_OFFSET	0
+#define SBI_SSE_ATTR_STATUS_STATE_MASK		0x3
+#define SBI_SSE_ATTR_STATUS_PENDING_OFFSET	2
+#define SBI_SSE_ATTR_STATUS_INJECT_OFFSET	3
+
+#define SBI_SSE_ATTR_CONFIG_ONESHOT	(1 << 0)
+
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPP	BIT(0)
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPIE	BIT(1)
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPV	BIT(2)
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP	BIT(3)
+
+enum sbi_sse_state {
+	SBI_SSE_STATE_UNUSED     = 0,
+	SBI_SSE_STATE_REGISTERED = 1,
+	SBI_SSE_STATE_ENABLED    = 2,
+	SBI_SSE_STATE_RUNNING    = 3,
+};
+
+/* SBI SSE Event IDs. */
+#define SBI_SSE_EVENT_LOCAL_RAS			0x00000000
+#define	SBI_SSE_EVENT_LOCAL_PLAT_0_START	0x00004000
+#define SBI_SSE_EVENT_LOCAL_PLAT_0_END		0x00007fff
+#define SBI_SSE_EVENT_GLOBAL_RAS		0x00008000
+#define	SBI_SSE_EVENT_GLOBAL_PLAT_0_START	0x00004000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_0_END		0x00007fff
+
+#define SBI_SSE_EVENT_LOCAL_PMU			0x00010000
+#define	SBI_SSE_EVENT_LOCAL_PLAT_1_START	0x00014000
+#define SBI_SSE_EVENT_LOCAL_PLAT_1_END		0x00017fff
+#define	SBI_SSE_EVENT_GLOBAL_PLAT_1_START	0x0001c000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_1_END		0x0001ffff
+
+#define	SBI_SSE_EVENT_LOCAL_PLAT_2_START	0x00024000
+#define SBI_SSE_EVENT_LOCAL_PLAT_2_END		0x00027fff
+#define	SBI_SSE_EVENT_GLOBAL_PLAT_2_START	0x0002c000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_2_END		0x0002ffff
+
+#define SBI_SSE_EVENT_LOCAL_SOFTWARE		0xffff0000
+#define	SBI_SSE_EVENT_LOCAL_PLAT_3_START	0xffff4000
+#define SBI_SSE_EVENT_LOCAL_PLAT_3_END		0xffff7fff
+#define SBI_SSE_EVENT_GLOBAL_SOFTWARE		0xffff8000
+#define	SBI_SSE_EVENT_GLOBAL_PLAT_3_START	0xffffc000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_3_END		0xffffffff
+
+#define SBI_SSE_EVENT_GLOBAL_BIT		(1 << 15)
+#define SBI_SSE_EVENT_PLATFORM_BIT		(1 << 14)
+
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
@@ -324,8 +399,10 @@ enum sbi_cppc_reg_id {
 #define SBI_ERR_ALREADY_STARTED			-7
 #define SBI_ERR_ALREADY_STOPPED			-8
 #define SBI_ERR_NO_SHMEM			-9
+#define SBI_ERR_INVALID_STATE			-10
+#define SBI_ERR_BAD_RANGE			-11
 
-#define SBI_LAST_ERR				SBI_ERR_NO_SHMEM
+#define SBI_LAST_ERR				SBI_ERR_BAD_RANGE
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index a77e3f8bb3c..fb78bf62237 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -24,6 +24,8 @@
 #define SBI_EALREADY_STARTED	SBI_ERR_ALREADY_STARTED
 #define SBI_EALREADY_STOPPED	SBI_ERR_ALREADY_STOPPED
 #define SBI_ENO_SHMEM		SBI_ERR_NO_SHMEM
+#define SBI_EINVALID_STATE	SBI_ERR_INVALID_STATE
+#define SBI_EBAD_RANGE		SBI_ERR_BAD_RANGE
 
 #define SBI_ENODEV		-1000
 #define SBI_ENOSYS		-1001
diff --git a/include/sbi/sbi_sse.h b/include/sbi/sbi_sse.h
new file mode 100644
index 00000000000..e5b0ad690fe
--- /dev/null
+++ b/include/sbi/sbi_sse.h
@@ -0,0 +1,93 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Rivos Systems.
+ */
+
+#ifndef __SBI_SSE_H__
+#define __SBI_SSE_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
+#include <sbi/riscv_locks.h>
+
+struct sbi_scratch;
+struct sbi_trap_regs;
+struct sbi_ecall_return;
+
+#define EXC_MODE_PP_SHIFT		0
+#define EXC_MODE_PP			BIT(EXC_MODE_PP_SHIFT)
+#define EXC_MODE_PV_SHIFT		1
+#define EXC_MODE_PV			BIT(EXC_MODE_PV_SHIFT)
+#define EXC_MODE_SSTATUS_SPIE_SHIFT	2
+#define EXC_MODE_SSTATUS_SPIE		BIT(EXC_MODE_SSTATUS_SPIE_SHIFT)
+
+struct sbi_sse_cb_ops {
+	/**
+	 * Called when hart_id is changed on the event.
+	 */
+	void (*set_hartid_cb)(uint32_t event_id, unsigned long hart_id);
+
+	/**
+	 * Called when the SBI_EXT_SSE_COMPLETE is invoked on the event.
+	 */
+	void (*complete_cb)(uint32_t event_id);
+
+	/**
+	 * Called when the SBI_EXT_SSE_REGISTER is invoked on the event.
+	 */
+	void (*register_cb)(uint32_t event_id);
+
+	/**
+	 * Called when the SBI_EXT_SSE_UNREGISTER is invoked on the event.
+	 */
+	void (*unregister_cb)(uint32_t event_id);
+
+	/**
+	 * Called when the SBI_EXT_SSE_ENABLE is invoked on the event.
+	 */
+	void (*enable_cb)(uint32_t event_id);
+
+	/**
+	 * Called when the SBI_EXT_SSE_DISABLE is invoked on the event.
+	 */
+	void (*disable_cb)(uint32_t event_id);
+};
+
+/* Set the callback operations for an event
+ * @param event_id Event identifier (SBI_SSE_EVENT_*)
+ * @param cb_ops Callback operations
+ * @return 0 on success, error otherwise
+ */
+int sbi_sse_set_cb_ops(uint32_t event_id, const struct sbi_sse_cb_ops *cb_ops);
+
+/* Inject an event to the current hard
+ * @param event_id Event identifier (SBI_SSE_EVENT_*)
+ * @param regs Registers that were used on SBI entry
+ * @return 0 on success, error otherwise
+ */
+int sbi_sse_inject_event(uint32_t event_id);
+
+void sbi_sse_process_pending_events(struct sbi_trap_regs *regs);
+
+
+int sbi_sse_init(struct sbi_scratch *scratch, bool cold_boot);
+void sbi_sse_exit(struct sbi_scratch *scratch);
+
+/* Interface called from sbi_ecall_sse.c */
+int sbi_sse_register(uint32_t event_id, unsigned long handler_entry_pc,
+		     unsigned long handler_entry_arg);
+int sbi_sse_unregister(uint32_t event_id);
+int sbi_sse_enable(uint32_t event_id);
+int sbi_sse_disable(uint32_t event_id);
+int sbi_sse_complete(struct sbi_trap_regs *regs, struct sbi_ecall_return *out);
+int sbi_sse_inject_from_ecall(uint32_t event_id, unsigned long hart_id,
+			      struct sbi_ecall_return *out);
+int sbi_sse_read_attrs(uint32_t event_id, uint32_t base_attr_id,
+		       uint32_t attr_count, unsigned long output_phys_lo,
+		       unsigned long output_phys_hi);
+int sbi_sse_write_attrs(uint32_t event_id, uint32_t base_attr_id,
+			uint32_t attr_count, unsigned long input_phys_lo,
+			unsigned long input_phys_hi);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 5d06d25d9cf..2b9ac1fa7d9 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -75,6 +75,7 @@ libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
 libsbi-objs-y += sbi_dbtr.o
 libsbi-objs-y += sbi_scratch.o
+libsbi-objs-y += sbi_sse.o
 libsbi-objs-y += sbi_string.o
 libsbi-objs-y += sbi_system.o
 libsbi-objs-y += sbi_timer.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 796cccceaaf..67ddfe19963 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -24,6 +24,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_dbtr.h>
+#include <sbi/sbi_sse.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_timer.h>
@@ -319,6 +320,12 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_sse_init(scratch, true);
+	if (rc) {
+		sbi_printf("%s: sse init failed (error %d)\n", __func__, rc);
+		sbi_hart_hang();
+	}
+
 	rc = sbi_pmu_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: pmu init failed (error %d)\n",
@@ -445,6 +452,10 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_sse_init(scratch, false);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_pmu_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
@@ -653,6 +664,8 @@ void __noreturn sbi_exit(struct sbi_scratch *scratch)
 
 	sbi_platform_early_exit(plat);
 
+	sbi_sse_exit(scratch);
+
 	sbi_pmu_exit(scratch);
 
 	sbi_timer_exit(scratch);
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
new file mode 100644
index 00000000000..a6866922da6
--- /dev/null
+++ b/lib/sbi/sbi_sse.c
@@ -0,0 +1,1130 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Rivos Systems Inc.
+ *
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/riscv_locks.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_fifo.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_ipi.h>
+#include <sbi/sbi_list.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_sse.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_trap.h>
+
+#include <sbi/sbi_console.h>
+
+#define sse_get_hart_state_ptr(__scratch) \
+	sbi_scratch_read_type((__scratch), void *, shs_ptr_off)
+
+#define sse_thishart_state_ptr() \
+	sse_get_hart_state_ptr(sbi_scratch_thishart_ptr())
+
+#define sse_set_hart_state_ptr(__scratch, __sse_state) \
+	sbi_scratch_write_type((__scratch), void *, shs_ptr_off, (__sse_state))
+
+#define EVENT_IS_GLOBAL(__event_id) ((__event_id) & SBI_SSE_EVENT_GLOBAL_BIT)
+
+static const uint32_t supported_events[] = {
+	SBI_SSE_EVENT_LOCAL_RAS,
+	SBI_SSE_EVENT_GLOBAL_RAS,
+	SBI_SSE_EVENT_LOCAL_PMU,
+	SBI_SSE_EVENT_LOCAL_SOFTWARE,
+	SBI_SSE_EVENT_GLOBAL_SOFTWARE,
+};
+
+#define EVENT_COUNT array_size(supported_events)
+
+#define sse_event_invoke_cb(_event, _cb, ...)                                 \
+	{                                                                     \
+		if (_event->cb_ops && _event->cb_ops->_cb)                    \
+			_event->cb_ops->_cb(_event->event_id, ##__VA_ARGS__); \
+	}
+
+struct sse_entry_state {
+	/** entry pc */
+	unsigned long pc;
+	/** a6 register state */
+	unsigned long arg;
+};
+
+struct sse_interrupted_state {
+	/** sepc register state */
+	unsigned long sepc;
+	/** flags register state */
+	unsigned long flags;
+	/** a6 register state */
+	unsigned long a6;
+	/** a7 register state */
+	unsigned long a7;
+};
+
+struct sse_ipi_inject_data {
+	uint32_t event_id;
+};
+
+struct sbi_sse_event_attrs {
+	unsigned long status;
+	unsigned long prio;
+	unsigned long config;
+	unsigned long hartid;
+	struct sse_entry_state entry;
+	struct sse_interrupted_state interrupted;
+};
+
+/* Make sure all attributes are packed for direct memcpy in ATTR_READ */
+#define assert_field_offset(field, attr_offset)                  \
+	_Static_assert(                                          \
+		((offsetof(struct sbi_sse_event_attrs, field)) / \
+		 sizeof(unsigned long)) == attr_offset,          \
+		"field " #field                                  \
+		" from struct sbi_sse_event_attrs invalid offset, expected " #attr_offset)
+
+assert_field_offset(status, SBI_SSE_ATTR_STATUS);
+assert_field_offset(prio, SBI_SSE_ATTR_PRIO);
+assert_field_offset(config, SBI_SSE_ATTR_CONFIG);
+assert_field_offset(hartid, SBI_SSE_ATTR_PREFERRED_HART);
+assert_field_offset(entry.pc, SBI_SSE_ATTR_ENTRY_PC);
+assert_field_offset(entry.arg, SBI_SSE_ATTR_ENTRY_ARG);
+assert_field_offset(interrupted.sepc, SBI_SSE_ATTR_INTERRUPTED_SEPC);
+assert_field_offset(interrupted.flags, SBI_SSE_ATTR_INTERRUPTED_FLAGS);
+assert_field_offset(interrupted.a6, SBI_SSE_ATTR_INTERRUPTED_A6);
+assert_field_offset(interrupted.a7, SBI_SSE_ATTR_INTERRUPTED_A7);
+
+struct sbi_sse_event {
+	struct sbi_sse_event_attrs attrs;
+	uint32_t event_id;
+	const struct sbi_sse_cb_ops *cb_ops;
+	struct sbi_dlist node;
+};
+
+/** Per-hart state */
+struct sse_hart_state {
+	/* Priority sorted list of enabled events (global and local in >=
+	 * ENABLED state). This list is protected by the enabled_event_lock.
+	 *
+	 * Global events can also be inserted in this list. Since these events
+	 * can be accessed by all harts, we actually need to lock independently
+	 * (see sse_global_event).
+	 *
+	 * Local events do not actually need to be locked since, we do
+	 * not have preemption and there are solely accessed by the current
+	 * hart. So when inserting a local event in this list, we just need to
+	 * lock the list at insertion/removal time.
+	 *
+	 * When an event is in a state >= ENABLED, then it is inserted in the
+	 * this enabled_event_list and thus can only be removed from this
+	 * list upon disable ecall or on complete with ONE_SHOT flag.
+	 */
+	struct sbi_dlist enabled_event_list;
+
+	/**
+	 * Lock that protects enabled_event_list
+	 */
+	spinlock_t enabled_event_lock;
+
+	/**
+	 * List of local events allocated at boot time.
+	 */
+	struct sbi_sse_event *local_events;
+};
+
+/**
+ * Global events are accessible by all harts
+ */
+struct sse_global_event {
+	/**
+	 * global event struct
+	 */
+	struct sbi_sse_event event;
+
+	/**
+	 * Global event lock protecting access from multiple harts from ecall to
+	 * the event.
+	 */
+	spinlock_t lock;
+};
+
+static unsigned int local_event_count;
+static unsigned int global_event_count;
+static struct sse_global_event *global_events;
+
+static unsigned long sse_inject_fifo_off;
+static unsigned long sse_inject_fifo_mem_off;
+/* Offset of pointer to SSE HART state in scratch space */
+static unsigned long shs_ptr_off;
+
+static u32 sse_ipi_inject_event = SBI_IPI_EVENT_MAX;
+
+static int sse_ipi_inject_send(unsigned long hartid, uint32_t event_id);
+
+static unsigned long sse_event_state(struct sbi_sse_event *e)
+{
+	return e->attrs.status & SBI_SSE_ATTR_STATUS_STATE_MASK;
+}
+
+static unsigned long sse_event_pending(struct sbi_sse_event *e)
+{
+	return !!(e->attrs.status & BIT(SBI_SSE_ATTR_STATUS_PENDING_OFFSET));
+}
+
+static bool sse_event_is_global(struct sbi_sse_event *e)
+{
+	return EVENT_IS_GLOBAL(e->event_id);
+}
+
+static bool sse_event_is_local(struct sbi_sse_event *e)
+{
+	return !sse_event_is_global(e);
+}
+
+/**
+ * If event is global, must be called under global event lock
+ */
+static struct sse_hart_state *sse_get_hart_state(struct sbi_sse_event *e)
+{
+	struct sbi_scratch *s = sbi_hartid_to_scratch(e->attrs.hartid);
+
+	return sse_get_hart_state_ptr(s);
+}
+
+static struct sse_global_event *sse_get_global_event(struct sbi_sse_event* e)
+{
+	return container_of(e, struct sse_global_event, event);
+}
+
+/**
+ * If event is global, must be called under global event lock
+ */
+static void sse_enabled_event_lock(struct sbi_sse_event *e)
+{
+	struct sse_hart_state *shs;
+
+	shs = sse_get_hart_state(e);
+	spin_lock(&shs->enabled_event_lock);
+}
+
+/**
+ * If event is global, must be called under global event lock
+ */
+static void sse_hart_unlock(struct sbi_sse_event *e)
+{
+	struct sse_hart_state *shs;
+
+	shs = sse_get_hart_state(e);
+	spin_unlock(&shs->enabled_event_lock);
+}
+
+static void sse_event_set_state(struct sbi_sse_event *e,
+				unsigned long new_state)
+{
+	e->attrs.status &= ~SBI_SSE_ATTR_STATUS_STATE_MASK;
+	e->attrs.status |= new_state;
+}
+
+static struct sbi_sse_event *sse_event_get(uint32_t event_id)
+{
+	unsigned int i;
+	struct sbi_sse_event *e;
+	struct sse_hart_state *shs;
+
+	if (EVENT_IS_GLOBAL(event_id)) {
+		for (i = 0; i < global_event_count; i++) {
+			e = &global_events[i].event;
+			if (e->event_id == event_id) {
+				spin_lock(&global_events[i].lock);
+				return e;
+			}
+		}
+	} else {
+		shs = sse_thishart_state_ptr();
+		for (i = 0; i < local_event_count; i++) {
+			e = &shs->local_events[i];
+			if (e->event_id == event_id)
+				return e;
+		}
+	}
+
+	return NULL;
+}
+
+static void sse_event_put(struct sbi_sse_event *e)
+{
+	struct sse_global_event *ge;
+
+	if (sse_event_is_local(e))
+		return;
+
+	ge = sse_get_global_event(e);
+	spin_unlock(&ge->lock);
+}
+
+static void sse_event_remove_from_list(struct sbi_sse_event *e)
+{
+	sbi_list_del(&e->node);
+}
+
+/**
+ * Must be called under owner hart lock
+ */
+static void sse_event_add_to_list(struct sbi_sse_event *e)
+{
+	struct sse_hart_state *state = sse_get_hart_state(e);
+	struct sbi_sse_event *tmp;
+
+	sbi_list_for_each_entry(tmp, &state->enabled_event_list, node) {
+		if (e->attrs.prio < tmp->attrs.prio)
+			break;
+		if (e->attrs.prio == tmp->attrs.prio &&
+		    e->event_id < tmp->event_id)
+			break;
+	}
+	sbi_list_add_tail(&e->node, &tmp->node);
+}
+
+/**
+ * Must be called under owner hart lock
+ */
+static int sse_event_disable(struct sbi_sse_event *e)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_ENABLED)
+		return SBI_EINVALID_STATE;
+
+	sse_event_invoke_cb(e, disable_cb);
+
+	sse_event_remove_from_list(e);
+	sse_event_set_state(e, SBI_SSE_STATE_REGISTERED);
+
+	return SBI_OK;
+}
+
+static int sse_event_set_hart_id_check(struct sbi_sse_event *e,
+				       unsigned long new_hartid)
+{
+	int hstate;
+	unsigned int hartid = (uint32_t)new_hartid;
+	struct sbi_domain *hd = sbi_domain_thishart_ptr();
+
+	if (!sse_event_is_global(e))
+		return SBI_EBAD_RANGE;
+
+	if (!sbi_domain_is_assigned_hart(hd, new_hartid))
+		return SBI_EINVAL;
+
+	hstate = sbi_hsm_hart_get_state(hd, hartid);
+	if (hstate != SBI_HSM_STATE_STARTED)
+		return SBI_EINVAL;
+
+	return SBI_OK;
+}
+
+static int sse_event_set_attr_check(struct sbi_sse_event *e, uint32_t attr_id,
+				    unsigned long val)
+{
+	int ret = SBI_OK;
+
+	switch (attr_id) {
+	case SBI_SSE_ATTR_CONFIG:
+		if (val & ~SBI_SSE_ATTR_CONFIG_ONESHOT)
+			ret = SBI_EINVAL;
+		break;
+	case SBI_SSE_ATTR_PRIO:
+#if __riscv_xlen > 32
+		if (val > 0xFFFFFFFFUL) {
+			ret = SBI_EINVAL;
+			break;
+		}
+#endif
+		break;
+	case SBI_SSE_ATTR_PREFERRED_HART:
+		ret = sse_event_set_hart_id_check(e, val);
+		break;
+	default:
+		ret = SBI_EBAD_RANGE;
+		break;
+	}
+
+	return ret;
+}
+
+static void sse_event_set_attr(struct sbi_sse_event *e, uint32_t attr_id,
+			       unsigned long val)
+{
+	switch (attr_id) {
+	case SBI_SSE_ATTR_CONFIG:
+		e->attrs.config = val;
+		break;
+	case SBI_SSE_ATTR_PRIO:
+		e->attrs.prio = (uint32_t)val;
+		break;
+	case SBI_SSE_ATTR_PREFERRED_HART:
+		e->attrs.hartid = val;
+		sse_event_invoke_cb(e, set_hartid_cb, val);
+		break;
+	}
+}
+
+static int sse_event_register(struct sbi_sse_event *e,
+			      unsigned long handler_entry_pc,
+			      unsigned long handler_entry_arg)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_UNUSED)
+		return SBI_EINVALID_STATE;
+
+	e->attrs.entry.pc = handler_entry_pc;
+	e->attrs.entry.arg = handler_entry_arg;
+
+	sse_event_set_state(e, SBI_SSE_STATE_REGISTERED);
+
+	sse_event_invoke_cb(e, register_cb);
+
+	return 0;
+}
+
+static int sse_event_unregister(struct sbi_sse_event *e)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_REGISTERED)
+		return SBI_EINVALID_STATE;
+
+	sse_event_invoke_cb(e, unregister_cb);
+
+	sse_event_set_state(e, SBI_SSE_STATE_UNUSED);
+
+	return 0;
+}
+
+static unsigned long sse_interrupted_flags(unsigned long mstatus)
+{
+	unsigned long hstatus, flags = 0;
+
+	if (mstatus & (MSTATUS_SPIE))
+		flags |= SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPIE;
+	if (mstatus & (MSTATUS_SPP))
+		flags |= SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPP;
+
+	if (misa_extension('H')) {
+		hstatus = csr_read(CSR_HSTATUS);
+		if (hstatus & HSTATUS_SPV)
+			flags |= SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPV;
+		if (hstatus & HSTATUS_SPVP)
+			flags |= SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP;
+	}
+
+	return flags;
+}
+
+static void sse_event_inject(struct sbi_sse_event *e,
+			     struct sbi_trap_regs *regs)
+{
+	struct sse_interrupted_state *i_ctx = &e->attrs.interrupted;
+
+	sse_event_set_state(e, SBI_SSE_STATE_RUNNING);
+
+	e->attrs.status = ~BIT(SBI_SSE_ATTR_STATUS_PENDING_OFFSET);
+
+	i_ctx->a6 = regs->a6;
+	i_ctx->a7 = regs->a7;
+	i_ctx->flags = sse_interrupted_flags(regs->mstatus);
+	i_ctx->sepc = csr_read(CSR_SEPC);
+
+	regs->mstatus &= ~(MSTATUS_SPP | SSTATUS_SPIE);
+	if (regs->mstatus & MSTATUS_MPP)
+		regs->mstatus |= MSTATUS_SPP;
+	if (regs->mstatus & MSTATUS_SIE)
+		regs->mstatus |= MSTATUS_SPIE;
+
+	if (misa_extension('H')) {
+		unsigned long hstatus = csr_read(CSR_HSTATUS);
+
+#if __riscv_xlen == 64
+		if (regs->mstatus & MSTATUS_MPV)
+#elif __riscv_xlen == 32
+		if (regs->mstatusH & MSTATUSH_MPV)
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+			hstatus |= HSTATUS_SPV;
+
+		hstatus &= ~HSTATUS_SPVP;
+		if (hstatus & HSTATUS_SPV && regs->mstatus & SSTATUS_SPP)
+				hstatus |= HSTATUS_SPVP;
+
+		csr_write(CSR_HSTATUS, hstatus);
+	}
+	csr_write(CSR_SEPC, regs->mepc);
+
+	/* Setup entry context */
+	regs->a6 = e->attrs.entry.arg;
+	regs->a7 = current_hartid();
+	regs->mepc = e->attrs.entry.pc;
+
+	/* Return to S-mode with virtualization disabled */
+	regs->mstatus &= ~(MSTATUS_MPP | MSTATUS_SIE);
+	regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
+
+#if __riscv_xlen == 64
+	regs->mstatus &= ~MSTATUS_MPV;
+#elif __riscv_xlen == 32
+	regs->mstatusH &= ~MSTATUSH_MPV;
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+}
+
+static void sse_event_resume(struct sbi_sse_event *e,
+			     struct sbi_trap_regs *regs)
+{
+	struct sse_interrupted_state *i_ctx = &e->attrs.interrupted;
+
+	regs->mepc = csr_read(CSR_SEPC);
+
+	regs->mstatus &= ~MSTATUS_MPP;
+	if (regs->mstatus & MSTATUS_SPP)
+		regs->mstatus |= (PRV_S << MSTATUS_MPP_SHIFT);
+
+	if (misa_extension('H')) {
+		unsigned long hstatus = csr_read(CSR_HSTATUS);
+#if __riscv_xlen == 64
+		regs->mstatus &= ~MSTATUS_MPV;
+		if (hstatus & HSTATUS_SPV)
+			regs->mstatus |= MSTATUS_MPV;
+#elif __riscv_xlen == 32
+		regs->mstatusH &= ~MSTATUSH_MPV;
+		if (hstatus & HSTATUS_SPV)
+			regs->mstatusH |= MSTATUSH_MPV;
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+		hstatus &= ~(HSTATUS_SPV | HSTATUS_SPVP);
+		if (i_ctx->flags & SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPV)
+			hstatus |= HSTATUS_SPV;
+
+		if (i_ctx->flags & SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP)
+			hstatus |= HSTATUS_SPVP;
+
+		csr_write(CSR_HSTATUS, hstatus);
+	}
+
+	regs->mstatus &= ~MSTATUS_SIE;
+	if (regs->mstatus & MSTATUS_SPIE)
+		regs->mstatus |= MSTATUS_SIE;
+
+	regs->mstatus &= ~MSTATUS_SPIE;
+	if (i_ctx->flags & SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPIE)
+		regs->mstatus |= MSTATUS_SPIE;
+
+	regs->mstatus &= ~MSTATUS_SPP;
+	if (i_ctx->flags & SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPP)
+		regs->mstatus |= MSTATUS_SPP;
+
+	regs->a7 = i_ctx->a7;
+	regs->a6 = i_ctx->a6;
+	csr_write(CSR_SEPC, i_ctx->sepc);
+}
+
+static bool sse_event_is_ready(struct sbi_sse_event *e)
+{
+	if (!sse_event_pending(e) ||
+	    sse_event_state(e) != SBI_SSE_STATE_ENABLED ||
+	    e->attrs.hartid != current_hartid()) {
+		return false;
+	}
+
+	return true;
+}
+
+static bool sse_event_check_inject(struct sbi_sse_event *e,
+				   struct sbi_trap_regs *regs)
+{
+	/*
+	* List of event is ordered by priority, stop at first running
+	* event since all other events after this one are of lower
+	* priority. This means an event of higher priority is already
+	* running.
+	*/
+	if (sse_event_state(e) == SBI_SSE_STATE_RUNNING) {
+		return true;
+	}
+
+	if (sse_event_is_ready(e)) {
+		sse_event_inject(e, regs);
+		return true;
+	}
+
+	return false;
+}
+
+/* Return true if an event has been injected, false otherwise */
+void sbi_sse_process_pending_events(struct sbi_trap_regs *regs)
+{
+	bool ret;
+	struct sbi_sse_event *e;
+	struct sse_hart_state *state = sse_thishart_state_ptr();
+
+	spin_lock(&state->enabled_event_lock);
+
+	if (sbi_list_empty(&state->enabled_event_list))
+		goto out;
+
+	sbi_list_for_each_entry(e, &state->enabled_event_list, node) {
+		ret = sse_event_check_inject(e, regs);
+		if (ret)
+			goto out;
+	}
+
+out:
+	spin_unlock(&state->enabled_event_lock);
+}
+
+static int sse_event_set_pending(struct sbi_sse_event *e)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_RUNNING &&
+	    sse_event_state(e) != SBI_SSE_STATE_ENABLED)
+		return SBI_EINVALID_STATE;
+
+	e->attrs.status |= BIT(SBI_SSE_ATTR_STATUS_PENDING_OFFSET);
+
+	return SBI_OK;
+}
+
+static void sse_ipi_inject_process(struct sbi_scratch *scratch)
+{
+	struct sbi_sse_event *e;
+	struct sse_ipi_inject_data evt;
+	struct sbi_fifo *sse_inject_fifo_r =
+		sbi_scratch_offset_ptr(scratch, sse_inject_fifo_off);
+
+	/* Mark all queued events as pending */
+	while (!sbi_fifo_dequeue(sse_inject_fifo_r, &evt)) {
+		e = sse_event_get(evt.event_id);
+		if (!e)
+			continue;
+
+		sse_event_set_pending(e);
+		sse_event_put(e);
+	}
+}
+
+static struct sbi_ipi_event_ops sse_ipi_inject_ops = {
+	.name	 = "IPI_SSE_INJECT",
+	.process = sse_ipi_inject_process,
+};
+
+static int sse_ipi_inject_send(unsigned long hartid, uint32_t event_id)
+{
+	int ret;
+	struct sbi_scratch *remote_scratch = NULL;
+	struct sse_ipi_inject_data evt = {event_id};
+	struct sbi_fifo *sse_inject_fifo_r;
+
+	remote_scratch = sbi_hartid_to_scratch(hartid);
+	if (!remote_scratch)
+		return SBI_EINVAL;
+	sse_inject_fifo_r =
+		sbi_scratch_offset_ptr(remote_scratch, sse_inject_fifo_off);
+
+	ret = sbi_fifo_enqueue(sse_inject_fifo_r, &evt);
+	if (ret)
+		return SBI_EFAIL;
+
+	ret = sbi_ipi_send_many(1, hartid, sse_ipi_inject_event, NULL);
+	if (ret)
+		return SBI_EFAIL;
+
+	return SBI_OK;
+}
+
+static int sse_inject_event(uint32_t event_id, unsigned long hartid,
+			    struct sbi_ecall_return *out)
+{
+	int ret;
+	struct sbi_sse_event *e;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+
+	/* In case of global event, provided hart_id is ignored */
+	if (sse_event_is_global(e))
+		hartid = e->attrs.hartid;
+
+	/* Event is for another hart, send it through IPI */
+	if (hartid != current_hartid()) {
+		sse_event_put(e);
+		return sse_ipi_inject_send(hartid, event_id);
+	}
+
+	ret = sse_event_set_pending(e);
+	sse_event_put(e);
+	if (ret)
+		return ret;
+
+	return SBI_OK;
+}
+
+/**
+ * Must be called under owner hart lock
+ */
+static int sse_event_enable(struct sbi_sse_event *e)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_REGISTERED)
+		return SBI_EINVALID_STATE;
+
+	sse_event_set_state(e, SBI_SSE_STATE_ENABLED);
+	sse_event_add_to_list(e);
+
+	if (sse_event_pending(e))
+		sbi_ipi_send_many(1, e->attrs.hartid, sse_ipi_inject_event,
+				  NULL);
+
+	sse_event_invoke_cb(e, enable_cb);
+
+	return SBI_OK;
+}
+
+static int sse_event_complete(struct sbi_sse_event *e,
+			      struct sbi_trap_regs *regs,
+			      struct sbi_ecall_return *out)
+{
+	if (sse_event_state(e) != SBI_SSE_STATE_RUNNING)
+		return SBI_EINVALID_STATE;
+
+	if (e->attrs.hartid != current_hartid())
+		return SBI_EINVAL;
+
+	sse_event_set_state(e, SBI_SSE_STATE_ENABLED);
+	if (e->attrs.config & SBI_SSE_ATTR_CONFIG_ONESHOT)
+		sse_event_disable(e);
+
+	sse_event_invoke_cb(e, complete_cb);
+
+	sse_event_resume(e, regs);
+	out->skip_regs_update = true;
+
+	return SBI_OK;
+}
+
+int sbi_sse_complete(struct sbi_trap_regs *regs, struct sbi_ecall_return *out)
+{
+	int ret = SBI_OK;
+	struct sbi_sse_event *tmp;
+	struct sse_hart_state *state = sse_thishart_state_ptr();
+
+	spin_lock(&state->enabled_event_lock);
+	sbi_list_for_each_entry(tmp, &state->enabled_event_list, node) {
+		/*
+		 * List of event is ordered by priority, first one running is
+		 * the one that needs to be completed
+		 */
+		if (sse_event_state(tmp) == SBI_SSE_STATE_RUNNING) {
+			ret = sse_event_complete(tmp, regs, out);
+			break;
+		}
+	}
+	spin_unlock(&state->enabled_event_lock);
+
+	return ret;
+}
+
+int sbi_sse_enable(uint32_t event_id)
+{
+	int ret;
+	struct sbi_sse_event *e;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	sse_enabled_event_lock(e);
+	ret = sse_event_enable(e);
+	sse_hart_unlock(e);
+	sse_event_put(e);
+
+	return ret;
+}
+
+int sbi_sse_disable(uint32_t event_id)
+{
+	int ret;
+	struct sbi_sse_event *e;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	sse_enabled_event_lock(e);
+	ret = sse_event_disable(e);
+	sse_hart_unlock(e);
+
+	sse_event_put(e);
+
+	return ret;
+}
+
+int sbi_sse_inject_from_ecall(uint32_t event_id, unsigned long hartid,
+			      struct sbi_ecall_return *out)
+{
+	if (!sbi_domain_is_assigned_hart(sbi_domain_thishart_ptr(), hartid))
+		return SBI_EINVAL;
+
+	return sse_inject_event(event_id, hartid, out);
+}
+
+int sbi_sse_inject_event(uint32_t event_id)
+{
+	/* We don't really care about return value here */
+	struct sbi_ecall_return out;
+
+	return sse_inject_event(event_id, current_hartid(), &out);
+}
+
+int sbi_sse_set_cb_ops(uint32_t event_id, const struct sbi_sse_cb_ops *cb_ops)
+{
+	struct sbi_sse_event *e;
+
+	if (cb_ops->set_hartid_cb && !EVENT_IS_GLOBAL(event_id))
+		return SBI_EINVAL;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	e->cb_ops = cb_ops;
+	sse_event_put(e);
+
+	return SBI_OK;
+}
+
+int sbi_sse_attr_check(uint32_t base_attr_id, uint32_t attr_count,
+		       unsigned long phys_lo, unsigned long phys_hi,
+		       unsigned long access)
+{
+	const unsigned align = __riscv_xlen >> 3;
+	uint64_t end_id = (uint64_t)base_attr_id + (attr_count - 1);
+
+	if (attr_count == 0)
+		return SBI_ERR_INVALID_PARAM;
+
+	if (end_id >= SBI_SSE_ATTR_MAX)
+		return SBI_EBAD_RANGE;
+
+	if (phys_lo & (align - 1))
+		return SBI_EINVALID_ADDR;
+
+	/*
+	 * On RV32, the M-mode can only access the first 4GB of
+	 * the physical address space because M-mode does not have
+	 * MMU to access full 34-bit physical address space.
+	 *
+	 * Based on above, we simply fail if the upper 32bits of
+	 * the physical address (i.e. a2 register) is non-zero on
+	 * RV32.
+	 */
+	if (phys_hi)
+		return SBI_EINVALID_ADDR;
+
+	if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(), phys_lo,
+					 sizeof(unsigned long) * attr_count, 1,
+					 access))
+		return SBI_EINVALID_ADDR;
+
+	return SBI_OK;
+}
+
+static void copy_attrs(unsigned long *out, const unsigned long *in,
+		       unsigned int long_count)
+{
+	int i = 0;
+
+	/*
+	 * sbi_memcpy() does byte-per-byte copy, using this yields long-per-long
+	 * copy
+	 */
+	for (i = 0; i < long_count; i++)
+		out[i] = in[i];
+}
+
+int sbi_sse_read_attrs(uint32_t event_id, uint32_t base_attr_id,
+		       uint32_t attr_count, unsigned long output_phys_lo,
+		       unsigned long output_phys_hi)
+{
+	int ret;
+	unsigned long *e_attrs;
+	struct sbi_sse_event *e;
+	unsigned long *attrs;
+
+	ret = sbi_sse_attr_check(base_attr_id, attr_count, output_phys_lo,
+				 output_phys_hi, SBI_DOMAIN_WRITE);
+	if (ret)
+		return ret;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	sbi_hart_map_saddr(output_phys_lo, sizeof(unsigned long) * attr_count);
+
+	/*
+	 * Copy all attributes at once since struct sse_event_attrs is matching
+	 * the SBI_SSE_ATTR_* attributes. While WRITE_ATTR attribute is not used
+	 * in s-mode sse handling path, READ_ATTR is used to retrieve the value
+	 * of registers when interrupted. Rather than doing multiple SBI calls,
+	 * a single one is done allowing to retrieve them all at once.
+	 */
+	e_attrs = (unsigned long *)&e->attrs;
+	attrs = (unsigned long *)output_phys_lo;
+	copy_attrs(attrs, &e_attrs[base_attr_id], attr_count);
+
+	sbi_hart_unmap_saddr();
+
+	sse_event_put(e);
+
+	return SBI_OK;
+}
+
+static int sse_write_attrs(struct sbi_sse_event *e, uint32_t base_attr_id,
+			   uint32_t attr_count, unsigned long input_phys)
+{
+	int ret = 0;
+	unsigned long attr = 0, val;
+	uint32_t id, end_id = base_attr_id + attr_count;
+	unsigned long *attrs = (unsigned long *)input_phys;
+
+	if (sse_event_state(e) >= SBI_SSE_STATE_ENABLED)
+		return SBI_EINVALID_STATE;
+
+	sbi_hart_map_saddr(input_phys, sizeof(unsigned long) * attr_count);
+
+	for (id = base_attr_id; id < end_id; id++) {
+		val = attrs[attr++];
+		ret = sse_event_set_attr_check(e, id, val);
+		if (ret)
+			goto out;
+	}
+
+	attr = 0;
+	for (id = base_attr_id; id < end_id; id++) {
+		val = attrs[attr++];
+		sse_event_set_attr(e, id, val);
+	}
+
+out:
+	sbi_hart_unmap_saddr();
+
+	return ret;
+}
+
+int sbi_sse_write_attrs(uint32_t event_id, uint32_t base_attr_id,
+			uint32_t attr_count, unsigned long input_phys_lo,
+			unsigned long input_phys_hi)
+{
+	int ret = 0;
+	struct sbi_sse_event *e;
+
+	ret = sbi_sse_attr_check(base_attr_id, attr_count, input_phys_lo,
+				 input_phys_hi, SBI_DOMAIN_READ);
+	if (ret)
+		return ret;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	ret = sse_write_attrs(e, base_attr_id, attr_count, input_phys_lo);
+
+	sse_event_put(e);
+
+	return ret;
+}
+
+int sbi_sse_register(uint32_t event_id, unsigned long handler_entry_pc,
+		     unsigned long handler_entry_arg)
+{
+	int ret;
+	struct sbi_sse_event *e;
+
+	if (handler_entry_pc & 0x1)
+		return SBI_EINVAL;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	ret = sse_event_register(e, handler_entry_pc, handler_entry_arg);
+	sse_event_put(e);
+
+	return ret;
+}
+
+int sbi_sse_unregister(uint32_t event_id)
+{
+	int ret;
+	struct sbi_sse_event *e;
+
+	e = sse_event_get(event_id);
+	if (!e)
+		return SBI_EINVAL;
+
+	ret = sse_event_unregister(e);
+	sse_event_put(e);
+
+	return ret;
+}
+
+static void sse_event_init(struct sbi_sse_event *e, uint32_t event_id)
+{
+	e->event_id = event_id;
+	e->attrs.hartid = current_hartid();
+	/* Declare all events as injectable */
+	e->attrs.status |= BIT(SBI_SSE_ATTR_STATUS_INJECT_OFFSET);
+}
+
+static void sse_event_count_init()
+{
+	unsigned int i;
+
+	for (i = 0; i < EVENT_COUNT; i++) {
+		if (EVENT_IS_GLOBAL(supported_events[i]))
+			global_event_count++;
+		else
+			local_event_count++;
+	}
+}
+
+static int sse_global_init()
+{
+	struct sbi_sse_event *e;
+	unsigned int i, ev = 0;
+
+	global_events = sbi_zalloc(sizeof(*global_events) * global_event_count);
+	if (!global_events)
+		return SBI_ENOMEM;
+
+	for (i = 0; i < EVENT_COUNT; i++) {
+		if (!EVENT_IS_GLOBAL(supported_events[i]))
+			continue;
+
+		e = &global_events[ev].event;
+		sse_event_init(e, supported_events[i]);
+		SPIN_LOCK_INIT(global_events[ev].lock);
+
+		ev++;
+	}
+
+	return 0;
+}
+
+static void sse_local_init(struct sse_hart_state *shs)
+{
+	unsigned int i, ev = 0;
+
+	SBI_INIT_LIST_HEAD(&shs->enabled_event_list);
+	SPIN_LOCK_INIT(shs->enabled_event_lock);
+
+	for (i = 0; i < EVENT_COUNT; i++) {
+		if (EVENT_IS_GLOBAL(supported_events[i]))
+			continue;
+
+		sse_event_init(&shs->local_events[ev++], supported_events[i]);
+	}
+}
+
+int sbi_sse_init(struct sbi_scratch *scratch, bool cold_boot)
+{
+	int ret;
+	void *sse_inject_mem;
+	struct sse_hart_state *shs;
+	struct sbi_fifo *sse_inject_q;
+
+	if (cold_boot) {
+		sse_event_count_init();
+
+		ret = sse_global_init();
+		if (ret)
+			return ret;
+
+		shs_ptr_off = sbi_scratch_alloc_offset(sizeof(void *));
+		if (!shs_ptr_off)
+			return SBI_ENOMEM;
+
+		sse_inject_fifo_off =
+			sbi_scratch_alloc_offset(sizeof(*sse_inject_q));
+		if (!sse_inject_fifo_off) {
+			sbi_scratch_free_offset(shs_ptr_off);
+			return SBI_ENOMEM;
+		}
+
+		sse_inject_fifo_mem_off = sbi_scratch_alloc_offset(
+			EVENT_COUNT * sizeof(struct sse_ipi_inject_data));
+		if (!sse_inject_fifo_mem_off) {
+			sbi_scratch_free_offset(sse_inject_fifo_off);
+			sbi_scratch_free_offset(shs_ptr_off);
+			return SBI_ENOMEM;
+		}
+
+		ret = sbi_ipi_event_create(&sse_ipi_inject_ops);
+		if (ret < 0) {
+			sbi_scratch_free_offset(shs_ptr_off);
+			return ret;
+		}
+		sse_ipi_inject_event = ret;
+	}
+
+	shs = sse_get_hart_state_ptr(scratch);
+	if (!shs) {
+		/* Allocate per hart state and local events at once */
+		shs = sbi_zalloc(sizeof(*shs) + sizeof(struct sbi_sse_event) *
+							local_event_count);
+		if (!shs)
+			return SBI_ENOMEM;
+
+		shs->local_events = (struct sbi_sse_event *)(shs + 1);
+
+		sse_set_hart_state_ptr(scratch, shs);
+	}
+
+	sse_local_init(shs);
+
+	sse_inject_q = sbi_scratch_offset_ptr(scratch, sse_inject_fifo_off);
+	sse_inject_mem =
+		sbi_scratch_offset_ptr(scratch, sse_inject_fifo_mem_off);
+
+	sbi_fifo_init(sse_inject_q, sse_inject_mem, EVENT_COUNT,
+		      sizeof(struct sse_ipi_inject_data));
+
+	return 0;
+}
+
+void sbi_sse_exit(struct sbi_scratch *scratch)
+{
+	int i;
+	struct sbi_sse_event *e;
+
+	for (i = 0; i < EVENT_COUNT; i++) {
+		e = sse_event_get(supported_events[i]);
+
+		if (e->attrs.hartid != current_hartid())
+			continue;
+
+		if (sse_event_state(e) > SBI_SSE_STATE_REGISTERED) {
+			sbi_printf("Event %d in invalid state at exit", i);
+			sse_event_set_state(e, SBI_SSE_STATE_UNUSED);
+		}
+	}
+}
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 175560f7185..624b45e0856 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -20,6 +20,7 @@
 #include <sbi/sbi_trap_ldst.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
+#include <sbi/sbi_sse.h>
 #include <sbi/sbi_timer.h>
 #include <sbi/sbi_trap.h>
 
@@ -337,6 +338,10 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 trap_done:
 	if (rc)
 		sbi_trap_error(msg, rc, tcntx);
+
+	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) != PRV_M)
+		sbi_sse_process_pending_events(regs);
+
 	sbi_trap_set_context(scratch, tcntx->prev_context);
 	return tcntx;
 }

From 09ad21445fe0a96452b4b3334f0ab0c412c62b3c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Thu, 21 Mar 2024 16:57:17 +0100
Subject: [PATCH 1536/1765] lib: sbi: Implement SBI SSE extension
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The SBI SSE extension defines a set of function that can be called to
register and handle supervisor sofwtare events. This patch implements
all of the functionality defined in the specification.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/Kconfig         |  4 +++
 lib/sbi/objects.mk      |  3 +++
 lib/sbi/sbi_ecall_sse.c | 57 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_sse.c

diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index e3038ee3d28..cc8e0318cb0 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -54,4 +54,8 @@ config SBIUNIT
 	bool "Enable SBIUNIT tests"
 	default n
 
+config SBI_ECALL_SSE
+	bool "SSE extension"
+	default y
+
 endmenu
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 2b9ac1fa7d9..b1c4a5033ee 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -55,6 +55,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_VENDOR) += sbi_ecall_vendor.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_DBTR) += ecall_dbtr
 libsbi-objs-$(CONFIG_SBI_ECALL_DBTR) += sbi_ecall_dbtr.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SSE) += ecall_sse
+libsbi-objs-$(CONFIG_SBI_ECALL_SSE) += sbi_ecall_sse.o
+
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
diff --git a/lib/sbi/sbi_ecall_sse.c b/lib/sbi/sbi_ecall_sse.c
new file mode 100644
index 00000000000..a28a033e2e0
--- /dev/null
+++ b/lib/sbi/sbi_ecall_sse.c
@@ -0,0 +1,57 @@
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_sse.h>
+
+static int sbi_ecall_sse_handler(unsigned long extid, unsigned long funcid,
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
+{
+	int ret;
+
+	switch (funcid) {
+	case SBI_EXT_SSE_READ_ATTR:
+		ret = sbi_sse_read_attrs(regs->a0, regs->a1, regs->a2,
+					 regs->a3, regs->a4);
+		break;
+	case SBI_EXT_SSE_WRITE_ATTR:
+		ret = sbi_sse_write_attrs(regs->a0, regs->a1, regs->a2,
+					 regs->a3, regs->a4);
+		break;
+	case SBI_EXT_SSE_REGISTER:
+		ret = sbi_sse_register(regs->a0, regs->a1, regs->a2);
+		break;
+	case SBI_EXT_SSE_UNREGISTER:
+		ret = sbi_sse_unregister(regs->a0);
+		break;
+	case SBI_EXT_SSE_ENABLE:
+		ret = sbi_sse_enable(regs->a0);
+		break;
+	case SBI_EXT_SSE_DISABLE:
+		ret = sbi_sse_disable(regs->a0);
+		break;
+	case SBI_EXT_SSE_COMPLETE:
+		ret = sbi_sse_complete(regs, out);
+		break;
+	case SBI_EXT_SSE_INJECT:
+		ret = sbi_sse_inject_from_ecall(regs->a0, regs->a1, out);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	}
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_sse;
+
+static int sbi_ecall_sse_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_sse);
+}
+
+struct sbi_ecall_extension ecall_sse = {
+	.extid_start		= SBI_EXT_SSE,
+	.extid_end		= SBI_EXT_SSE,
+	.register_extensions	= sbi_ecall_sse_register_extensions,
+	.handle			= sbi_ecall_sse_handler,
+};

From 06fc453ec13de75e156261e8fe4073334d0e00c2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Thu, 21 Mar 2024 16:57:18 +0100
Subject: [PATCH 1537/1765] lib: sbi: Add SSE support for PMU events
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add SSE callbacks registration to PMU driver in order to disable
interrupt delegation for PMU interrupts. When interrupts are
undelegated send the PMU SSE event upon LCOFIP IRQ.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h |  3 +++
 lib/sbi/sbi_pmu.c     | 51 +++++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_trap.c    |  6 +++++
 3 files changed, 60 insertions(+)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 7d32a4da31d..8b1e08c81f3 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -11,6 +11,7 @@
 #define __SBI_PMU_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_trap.h>
 
 struct sbi_scratch;
 
@@ -150,4 +151,6 @@ int sbi_pmu_ctr_cfg_match(unsigned long cidx_base, unsigned long cidx_mask,
 
 int sbi_pmu_ctr_incr_fw(enum sbi_pmu_fw_event_code_id fw_id);
 
+void sbi_pmu_ovf_irq();
+
 #endif
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 62a6465a1f1..b9e845430fc 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_sse.h>
 
 /** Information about hardware counters */
 struct sbi_pmu_hw_event {
@@ -62,6 +63,8 @@ struct sbi_pmu_hart_state {
 	uint32_t active_events[SBI_PMU_HW_CTR_MAX + SBI_PMU_FW_CTR_MAX];
 	/* Bitmap of firmware counters started */
 	unsigned long fw_counters_started;
+	/* if true, SSE is enabled */
+	bool sse_enabled;
 	/*
 	 * Counter values for SBI firmware events and event codes
 	 * for platform firmware events. Both are mutually exclusive
@@ -300,6 +303,16 @@ int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32
 				    SBI_PMU_EVENT_RAW_IDX, cmap, select, select_mask);
 }
 
+void sbi_pmu_ovf_irq()
+{
+	/*
+	 * We need to disable LCOFIP before returning to S-mode or we will loop
+	 * on LCOFIP being triggered
+	 */
+	csr_clear(CSR_MIE, MIP_LCOFIP);
+	sbi_sse_inject_event(SBI_SSE_EVENT_LOCAL_PMU);
+}
+
 static int pmu_ctr_enable_irq_hw(int ctr_idx)
 {
 	unsigned long mhpmevent_csr;
@@ -575,6 +588,10 @@ int sbi_pmu_ctr_stop(unsigned long cbase, unsigned long cmask,
 		}
 	}
 
+	/* Clear MIP_LCOFIP to avoid spurious interrupts */
+	if (phs->sse_enabled)
+		csr_clear(CSR_MIP, MIP_LCOFIP);
+
 	return ret;
 }
 
@@ -962,6 +979,7 @@ static void pmu_reset_event_map(struct sbi_pmu_hart_state *phs)
 	for (j = 0; j < SBI_PMU_FW_CTR_MAX; j++)
 		phs->fw_counters_data[j] = 0;
 	phs->fw_counters_started = 0;
+	phs->sse_enabled = 0;
 }
 
 const struct sbi_pmu_device *sbi_pmu_get_device(void)
@@ -993,6 +1011,37 @@ void sbi_pmu_exit(struct sbi_scratch *scratch)
 	pmu_reset_event_map(phs);
 }
 
+static void pmu_sse_enable(uint32_t event_id)
+{
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+
+	phs->sse_enabled = true;
+	csr_clear(CSR_MIDELEG, sbi_pmu_irq_bit());
+	csr_clear(CSR_MIP, MIP_LCOFIP);
+	csr_set(CSR_MIE, MIP_LCOFIP);
+}
+
+static void pmu_sse_disable(uint32_t event_id)
+{
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+
+	csr_clear(CSR_MIE, MIP_LCOFIP);
+	csr_clear(CSR_MIP, MIP_LCOFIP);
+	csr_set(CSR_MIDELEG, sbi_pmu_irq_bit());
+	phs->sse_enabled = false;
+}
+
+static void pmu_sse_complete(uint32_t event_id)
+{
+	csr_set(CSR_MIE, MIP_LCOFIP);
+}
+
+static const struct sbi_sse_cb_ops pmu_sse_cb_ops = {
+	.enable_cb = pmu_sse_enable,
+	.disable_cb = pmu_sse_disable,
+	.complete_cb = pmu_sse_complete,
+};
+
 int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int hpm_count = sbi_fls(sbi_hart_mhpm_mask(scratch));
@@ -1032,6 +1081,8 @@ int sbi_pmu_init(struct sbi_scratch *scratch, bool cold_boot)
 		total_ctrs = num_hw_ctrs + SBI_PMU_FW_CTR_MAX;
 	}
 
+	sbi_sse_set_cb_ops(SBI_SSE_EVENT_LOCAL_PMU, &pmu_sse_cb_ops);
+
 	phs = pmu_get_hart_state_ptr(scratch);
 	if (!phs) {
 		phs = sbi_zalloc(sizeof(*phs));
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 624b45e0856..b4f3a176d6b 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -223,6 +223,9 @@ static int sbi_trap_nonaia_irq(unsigned long irq)
 	case IRQ_M_SOFT:
 		sbi_ipi_process();
 		break;
+	case IRQ_PMU_OVF:
+		sbi_pmu_ovf_irq();
+		break;
 	case IRQ_M_EXT:
 		return sbi_irqchip_process();
 	default:
@@ -246,6 +249,9 @@ static int sbi_trap_aia_irq(void)
 		case IRQ_M_SOFT:
 			sbi_ipi_process();
 			break;
+		case IRQ_PMU_OVF:
+			sbi_pmu_ovf_irq();
+			break;
 		case IRQ_M_EXT:
 			rc = sbi_irqchip_process();
 			if (rc)

From 5c9a73565f5e6d07cf30ecd7fa511d872050bd2c Mon Sep 17 00:00:00 2001
From: Vivian Wang <dramforever@live.com>
Date: Sat, 16 Mar 2024 01:36:39 +0800
Subject: [PATCH 1538/1765] include: sbi: Support byteorder macros in assembly

Avoid using C types and casts if sbi/sbi_byteorder.h is included in
assembly code

Signed-off-by: Vivian Wang <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_byteorder.h | 55 ++++++++++++++++++++-----------------
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/include/sbi/sbi_byteorder.h b/include/sbi/sbi_byteorder.h
index db6eb2b967e..2b4981e0289 100644
--- a/include/sbi/sbi_byteorder.h
+++ b/include/sbi/sbi_byteorder.h
@@ -7,7 +7,12 @@
 #ifndef __SBI_BYTEORDER_H__
 #define __SBI_BYTEORDER_H__
 
-#include <sbi/sbi_types.h>
+#ifdef __ASSEMBLER__
+# define _conv_cast(type, val) (val)
+#else
+# include <sbi/sbi_types.h>
+# define _conv_cast(type, val) ((type)(val))
+#endif
 
 #define BSWAP16(x)	((((x) & 0x00ff) << 8) | \
 			 (((x) & 0xff00) >> 8))
@@ -25,37 +30,37 @@
 			 (((x) & 0xff00000000000000ULL) >> 56))
 
 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__  /* CPU(little-endian) */
-#define cpu_to_be16(x)		((uint16_t)BSWAP16(x))
-#define cpu_to_be32(x)		((uint32_t)BSWAP32(x))
-#define cpu_to_be64(x)		((uint64_t)BSWAP64(x))
+#define cpu_to_be16(x)		_conv_cast(uint16_t, BSWAP16(x))
+#define cpu_to_be32(x)		_conv_cast(uint32_t, BSWAP32(x))
+#define cpu_to_be64(x)		_conv_cast(uint64_t, BSWAP64(x))
 
-#define be16_to_cpu(x)		((uint16_t)BSWAP16(x))
-#define be32_to_cpu(x)		((uint32_t)BSWAP32(x))
-#define be64_to_cpu(x)		((uint64_t)BSWAP64(x))
+#define be16_to_cpu(x)		_conv_cast(uint16_t, BSWAP16(x))
+#define be32_to_cpu(x)		_conv_cast(uint32_t, BSWAP32(x))
+#define be64_to_cpu(x)		_conv_cast(uint64_t, BSWAP64(x))
 
-#define cpu_to_le16(x)		((uint16_t)(x))
-#define cpu_to_le32(x)		((uint32_t)(x))
-#define cpu_to_le64(x)		((uint64_t)(x))
+#define cpu_to_le16(x)		_conv_cast(uint16_t, (x))
+#define cpu_to_le32(x)		_conv_cast(uint32_t, (x))
+#define cpu_to_le64(x)		_conv_cast(uint64_t, (x))
 
-#define le16_to_cpu(x)		((uint16_t)(x))
-#define le32_to_cpu(x)		((uint32_t)(x))
-#define le64_to_cpu(x)		((uint64_t)(x))
+#define le16_to_cpu(x)		_conv_cast(uint16_t, (x))
+#define le32_to_cpu(x)		_conv_cast(uint32_t, (x))
+#define le64_to_cpu(x)		_conv_cast(uint64_t, (x))
 #else /* CPU(big-endian) */
-#define cpu_to_be16(x)		((uint16_t)(x))
-#define cpu_to_be32(x)		((uint32_t)(x))
-#define cpu_to_be64(x)		((uint64_t)(x))
+#define cpu_to_be16(x)		_conv_cast(uint16_t, (x))
+#define cpu_to_be32(x)		_conv_cast(uint32_t, (x))
+#define cpu_to_be64(x)		_conv_cast(uint64_t, (x))
 
-#define be16_to_cpu(x)		((uint16_t)(x))
-#define be32_to_cpu(x)		((uint32_t)(x))
-#define be64_to_cpu(x)		((uint64_t)(x))
+#define be16_to_cpu(x)		_conv_cast(uint16_t, (x))
+#define be32_to_cpu(x)		_conv_cast(uint32_t, (x))
+#define be64_to_cpu(x)		_conv_cast(uint64_t, (x))
 
-#define cpu_to_le16(x)		((uint16_t)BSWAP16(x))
-#define cpu_to_le32(x)		((uint32_t)BSWAP32(x))
-#define cpu_to_le64(x)		((uint64_t)BSWAP64(x))
+#define cpu_to_le16(x)		_conv_cast(uint16_t, BSWAP16(x))
+#define cpu_to_le32(x)		_conv_cast(uint32_t, BSWAP32(x))
+#define cpu_to_le64(x)		_conv_cast(uint64_t, BSWAP64(x))
 
-#define le16_to_cpu(x)		((uint16_t)BSWAP16(x))
-#define le32_to_cpu(x)		((uint32_t)BSWAP32(x))
-#define le64_to_cpu(x)		((uint64_t)BSWAP64(x))
+#define le16_to_cpu(x)		_conv_cast(uint16_t, BSWAP16(x))
+#define le32_to_cpu(x)		_conv_cast(uint32_t, BSWAP32(x))
+#define le64_to_cpu(x)		_conv_cast(uint64_t, BSWAP64(x))
 #endif
 
 #if __riscv_xlen == 64

From b94396c7dde699c17e81e087aadafda125f86856 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 18 Mar 2024 07:49:28 -0700
Subject: [PATCH 1539/1765] lib: utils/timer: Optimize current hart scratch
 access

The address of the local scratch area is stored in each hart's mscratch
CSR. It is more efficient to read the CSR than to compute the address
from the hart ID.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/aclint_mtimer.c | 18 +++---------------
 1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 271e6252fef..9acb26eb7cc 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -72,14 +72,10 @@ static u64 mtimer_value(void)
 static void mtimer_event_stop(void)
 {
 	u32 target_hart = current_hartid();
-	struct sbi_scratch *scratch;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct aclint_mtimer_data *mt;
 	u64 *time_cmp;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
-	if (!scratch)
-		return;
-
 	mt = mtimer_get_hart_data_ptr(scratch);
 	if (!mt)
 		return;
@@ -92,14 +88,10 @@ static void mtimer_event_stop(void)
 static void mtimer_event_start(u64 next_event)
 {
 	u32 target_hart = current_hartid();
-	struct sbi_scratch *scratch;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct aclint_mtimer_data *mt;
 	u64 *time_cmp;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
-	if (!scratch)
-		return;
-
 	mt = mtimer_get_hart_data_ptr(scratch);
 	if (!mt)
 		return;
@@ -155,13 +147,9 @@ int aclint_mtimer_warm_init(void)
 {
 	u64 *mt_time_cmp;
 	u32 target_hart = current_hartid();
-	struct sbi_scratch *scratch;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct aclint_mtimer_data *mt;
 
-	scratch = sbi_hartid_to_scratch(target_hart);
-	if (!scratch)
-		return SBI_ENOENT;
-
 	mt = mtimer_get_hart_data_ptr(scratch);
 	if (!mt)
 		return SBI_ENODEV;

From f5375bc15e9f3e577dfc24f9095a3e37246a3fa3 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 18 Mar 2024 07:49:29 -0700
Subject: [PATCH 1540/1765] platform: generic: allwinner: Optimize current hart
 scratch access

The address of the local scratch area is stored in each hart's mscratch
CSR. It is more efficient to read the CSR than to compute the address
from the hart ID.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index ed19d5d427c..ab2eee55864 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -142,7 +142,7 @@ static void sun20i_d1_riscv_cfg_restore(void)
 
 static void sun20i_d1_riscv_cfg_init(void)
 {
-	u64 entry = sbi_hartid_to_scratch(0)->warmboot_addr;
+	u64 entry = sbi_scratch_thishart_ptr()->warmboot_addr;
 
 	/* Enable MMIO access. */
 	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_CCU_BASE + RISCV_CFG_BGR_REG);

From beb0cd177f10a6bdafd73aac19059fecf6a07a91 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 15 Mar 2024 19:55:23 +0530
Subject: [PATCH 1541/1765] lib: sbi: Simplify wait_for_coldboot()
 implementation

On QEMU virt machine with large number of HARTs, some of the HARTs
randomly fail to come out of wait_for_coldboot() due to one of the
following race-conditions:

1) Failing HARTs are not able to acquire the coldboot_lock and
   update the coldboot_hartmask in wait_for_coldboot() before
   the coldboot HART acquires the coldboot_lock and sends IPI
   in wake_coldboot_harts() hence the failing HARTs never
   receive IPI from the coldboot HART.

2) Failing HARTs acquire the coldbood_lock and update the
   coldboot_hartmask before coldboot HART does sbi_scratch_init()
   so the sbi_hartmask_set_hartid() does not update the
   coldboot_hartmask on the failing HARTs hence they never
   receive IPI from the coldboot HART.

To address this, use a simple busy-loop in wait_for_coldboot() for
polling on coldboot_done flag.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/riscv_barrier.h |  6 +++-
 lib/sbi/sbi_init.c          | 70 ++-----------------------------------
 2 files changed, 8 insertions(+), 68 deletions(-)

diff --git a/include/sbi/riscv_barrier.h b/include/sbi/riscv_barrier.h
index 1fba8b82760..3d4a038c95e 100644
--- a/include/sbi/riscv_barrier.h
+++ b/include/sbi/riscv_barrier.h
@@ -40,7 +40,11 @@
 #define smp_wmb()		RISCV_FENCE(w,w)
 
 /* CPU relax for busy loop */
-#define cpu_relax()		asm volatile ("" : : : "memory")
+#define cpu_relax()						\
+do {								\
+	unsigned long __t;					\
+	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (__t));	\
+} while (0)
 
 /* clang-format on */
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 67ddfe19963..61664911087 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -10,7 +10,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
-#include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_cppc.h>
 #include <sbi/sbi_domain.h>
@@ -191,82 +190,19 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 	sbi_hart_delegation_dump(scratch, "Boot HART ", "         ");
 }
 
-static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
-static struct sbi_hartmask coldboot_wait_hmask = { 0 };
-
 static unsigned long coldboot_done;
 
 static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
 {
-	unsigned long saved_mie, cmip;
-
-	if (__smp_load_acquire(&coldboot_done))
-		return;
-
-	/* Save MIE CSR */
-	saved_mie = csr_read(CSR_MIE);
-
-	/* Set MSIE and MEIE bits to receive IPI */
-	csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
-
-	/* Acquire coldboot lock */
-	spin_lock(&coldboot_lock);
-
-	/* Mark current HART as waiting */
-	sbi_hartmask_set_hartid(hartid, &coldboot_wait_hmask);
-
-	/* Release coldboot lock */
-	spin_unlock(&coldboot_lock);
-
-	/* Wait for coldboot to finish using WFI */
-	while (!__smp_load_acquire(&coldboot_done)) {
-		do {
-			wfi();
-			cmip = csr_read(CSR_MIP);
-		 } while (!(cmip & (MIP_MSIP | MIP_MEIP)));
-	}
-
-	/* Acquire coldboot lock */
-	spin_lock(&coldboot_lock);
-
-	/* Unmark current HART as waiting */
-	sbi_hartmask_clear_hartid(hartid, &coldboot_wait_hmask);
-
-	/* Release coldboot lock */
-	spin_unlock(&coldboot_lock);
-
-	/* Restore MIE CSR */
-	csr_write(CSR_MIE, saved_mie);
-
-	/*
-	 * The wait for coldboot is common for both warm startup and
-	 * warm resume path so clearing IPI here would result in losing
-	 * an IPI in warm resume path.
-	 *
-	 * Also, the sbi_platform_ipi_init() called from sbi_ipi_init()
-	 * will automatically clear IPI for current HART.
-	 */
+	/* Wait for coldboot to finish */
+	while (!__smp_load_acquire(&coldboot_done))
+		cpu_relax();
 }
 
 static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
 {
-	u32 i, hartindex = sbi_hartid_to_hartindex(hartid);
-
 	/* Mark coldboot done */
 	__smp_store_release(&coldboot_done, 1);
-
-	/* Acquire coldboot lock */
-	spin_lock(&coldboot_lock);
-
-	/* Send an IPI to all HARTs waiting for coldboot */
-	sbi_hartmask_for_each_hartindex(i, &coldboot_wait_hmask) {
-		if (i == hartindex)
-			continue;
-		sbi_ipi_raw_send(i);
-	}
-
-	/* Release coldboot lock */
-	spin_unlock(&coldboot_lock);
 }
 
 static unsigned long entry_count_offset;

From 7862c244bce024e921705d7d2e19cf855557d481 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 19 Mar 2024 17:56:24 +0530
Subject: [PATCH 1542/1765] lib: sbi: Wakeup non-coldboot HARTs early in the
 coldboot path

Currently, all non-coldboot HARTs busy spin in wait_for_coldboot()
until the entire coldboot init sequence is completed.

This means:
1) On QEMU, all non-coldboot HARTs will eat host CPU time and
   also slow down the coldboot HART until the entire coldboot
   init sequence is completed.
2) On real HW, all non-coldboot HARTs will consume more CPU
   power until the entire coldboot init sequence is completed.

To address this, wake up all non-coldboot HARTs as early as
possible in the coldboot init sequence.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_init.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 61664911087..389172a9d0d 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -244,6 +244,14 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
+	/*
+	 * All non-coldboot HARTs do HSM initialization (i.e. enter HSM state
+	 * machine) at the start of the warmboot path so it is wasteful to
+	 * have these HARTs busy spin in wait_for_coldboot() until coldboot
+	 * path is completed.
+	 */
+	wake_coldboot_harts(scratch, hartid);
+
 	rc = sbi_platform_early_init(plat, true);
 	if (rc)
 		sbi_hart_hang();
@@ -355,8 +363,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
-	wake_coldboot_harts(scratch, hartid);
-
 	count = sbi_scratch_offset_ptr(scratch, init_count_offset);
 	(*count)++;
 
@@ -376,6 +382,7 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	count = sbi_scratch_offset_ptr(scratch, entry_count_offset);
 	(*count)++;
 
+	/* Note: This has to be first thing in warmboot init sequence */
 	rc = sbi_hsm_init(scratch, hartid, false);
 	if (rc)
 		sbi_hart_hang();

From 29ecda9c2065afd3fb2f8cc465bc096d545d825e Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 28 Mar 2024 11:33:02 +0800
Subject: [PATCH 1543/1765] sbi: sbi_domain_context: Check privilege spec
 version before accessing S-mode CSRs

SCOUNTEREN and SENVCFG may not be supported on certain RISC-V core,
so check the existence of these CSRs via privilege spec version to
prevent illegal instructions.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_domain_context.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index d6843a6a906..8daf629cd58 100755
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -55,8 +55,10 @@ static void switch_to_next_domain_context(struct sbi_context *ctx,
 	ctx->stval	= csr_swap(CSR_STVAL, dom_ctx->stval);
 	ctx->sip	= csr_swap(CSR_SIP, dom_ctx->sip);
 	ctx->satp	= csr_swap(CSR_SATP, dom_ctx->satp);
-	ctx->scounteren = csr_swap(CSR_SCOUNTEREN, dom_ctx->scounteren);
-	ctx->senvcfg	= csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
+		ctx->scounteren = csr_swap(CSR_SCOUNTEREN, dom_ctx->scounteren);
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12)
+		ctx->senvcfg	= csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
 
 	/* Save current trap state and restore target domain's trap state */
 	trap_regs = (struct sbi_trap_regs *)(csr_read(CSR_MSCRATCH) -

From 268feab2949a08743ffbb4afd9d40cdcafd78376 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 18 Mar 2024 13:49:40 -0700
Subject: [PATCH 1544/1765] Makefile: Respect manual changes to .config

The .config file may be manually edited or copied from another location.
Since genconfig.py is responsible for generating auto.conf (the Makefile
fragment) and autoconf.h (the C header) from .config, it must be run any
time .config changes, not just when running menuconfig.

Fixes: 662e631ccef2 ("Makefile: Add initial kconfig support for each platform")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 43 ++++++++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 19 deletions(-)

diff --git a/Makefile b/Makefile
index 50f634e4445..e3b3b52b4b4 100644
--- a/Makefile
+++ b/Makefile
@@ -79,6 +79,7 @@ export PYTHONDONTWRITEBYTECODE=1
 export KCONFIG_DIR=$(platform_build_dir)/kconfig
 export KCONFIG_AUTOLIST=$(KCONFIG_DIR)/auto.list
 export KCONFIG_AUTOHEADER=$(KCONFIG_DIR)/autoconf.h
+export KCONFIG_AUTOCONFIG=$(KCONFIG_DIR)/auto.conf
 export KCONFIG_AUTOCMD=$(KCONFIG_DIR)/auto.conf.cmd
 export KCONFIG_CONFIG=$(KCONFIG_DIR)/.config
 # Additional exports for include paths in Kconfig files
@@ -220,7 +221,6 @@ ifdef PLATFORM
 menuconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
 	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
 	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/menuconfig.py $(src_dir)/Kconfig
-	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/genconfig.py --header-path $(KCONFIG_AUTOHEADER) --sync-deps $(KCONFIG_DIR) --file-list $(KCONFIG_AUTOLIST) $(src_dir)/Kconfig
 
 .PHONY: savedefconfig
 savedefconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
@@ -230,14 +230,19 @@ savedefconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
 $(KCONFIG_CONFIG): $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG) $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
 	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
 	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/defconfig.py --kconfig $(src_dir)/Kconfig $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG)
+
+$(KCONFIG_AUTOCONFIG): $(KCONFIG_CONFIG)
 	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/genconfig.py --header-path $(KCONFIG_AUTOHEADER) --sync-deps $(KCONFIG_DIR) --file-list $(KCONFIG_AUTOLIST) $(src_dir)/Kconfig
 
-$(KCONFIG_AUTOCMD): $(KCONFIG_CONFIG)
-	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
+$(KCONFIG_AUTOHEADER): $(KCONFIG_AUTOCONFIG);
+
+$(KCONFIG_AUTOLIST): $(KCONFIG_AUTOCONFIG);
+
+$(KCONFIG_AUTOCMD): $(KCONFIG_AUTOLIST)
 	$(CMD_PREFIX)printf "%s: " $(KCONFIG_CONFIG) > $(KCONFIG_AUTOCMD)
 	$(CMD_PREFIX)cat $(KCONFIG_AUTOLIST) | tr '\n' ' ' >> $(KCONFIG_AUTOCMD)
 
-include $(KCONFIG_CONFIG)
+include $(KCONFIG_AUTOCONFIG)
 include $(KCONFIG_AUTOCMD)
 endif
 
@@ -510,14 +515,14 @@ $(build_dir)/lib/libsbi.a: $(libsbi-objs-path-y)
 $(platform_build_dir)/lib/libplatsbi.a: $(libsbi-objs-path-y) $(libsbiutils-objs-path-y) $(platform-objs-path-y)
 	$(call compile_ar,$@,$^)
 
-$(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
-	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
+$(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
 $(build_dir)/%.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
-$(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
+$(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
 	$(call compile_cc_dep,$@,$<)
 
 $(build_dir)/%.o: $(src_dir)/%.c
@@ -531,24 +536,24 @@ $(build_dir)/lib/sbi/sbi_init.o: $(libsbi_dir)/sbi_init.c FORCE
 	$(call compile_cc,$@,$<)
 endif
 
-$(build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_CONFIG)
+$(build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_AUTOHEADER)
 	$(call compile_as_dep,$@,$<)
 
 $(build_dir)/%.o: $(src_dir)/%.S
 	$(call compile_as,$@,$<)
 
 # Rules for platform sources
-$(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_CONFIG)
-	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_AUTOHEADER)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
 $(platform_build_dir)/%.c: $(platform_src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
-$(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_CONFIG)
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_AUTOHEADER)
 	$(call compile_cc_dep,$@,$<)
 
-$(platform_build_dir)/%.o: $(platform_src_dir)/%.c $(KCONFIG_CONFIG)
+$(platform_build_dir)/%.o: $(platform_src_dir)/%.c $(KCONFIG_AUTOHEADER)
 	$(call compile_cc,$@,$<)
 
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
@@ -557,8 +562,8 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.S
 $(platform_build_dir)/%.o: $(platform_src_dir)/%.S
 	$(call compile_as,$@,$<)
 
-$(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts $(KCONFIG_CONFIG)
-	$(call compile_gen_dep,$@,.dtb,$< $(KCONFIG_CONFIG))
+$(platform_build_dir)/%.dep: $(platform_src_dir)/%.dts $(KCONFIG_AUTOHEADER)
+	$(call compile_gen_dep,$@,.dtb,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.c,$(@:.dep=.dtb))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
@@ -575,26 +580,26 @@ $(platform_build_dir)/%.bin: $(platform_build_dir)/%.elf
 $(platform_build_dir)/%.elf: $(platform_build_dir)/%.o $(platform_build_dir)/%.elf.ld $(platform_build_dir)/lib/libplatsbi.a
 	$(call compile_elf,$@,$@.ld,$< $(platform_build_dir)/lib/libplatsbi.a)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.ldS $(KCONFIG_CONFIG)
+$(platform_build_dir)/%.dep: $(src_dir)/%.ldS $(KCONFIG_AUTOHEADER)
 	$(call compile_cpp_dep,$@,.ld,$<)
 
 $(platform_build_dir)/%.ld: $(src_dir)/%.ldS
 	$(call compile_cpp,$@,$<)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_CONFIG)
-	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_CONFIG))
+$(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
+	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
 $(platform_build_dir)/%.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_CONFIG)
+$(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
 	$(call compile_cc_dep,$@,$<)
 
 $(platform_build_dir)/%.o: $(src_dir)/%.c
 	$(call compile_cc,$@,$<)
 
-$(platform_build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_CONFIG)
+$(platform_build_dir)/%.dep: $(src_dir)/%.S $(KCONFIG_AUTOHEADER)
 	$(call compile_as_dep,$@,$<)
 
 $(platform_build_dir)/%.o: $(src_dir)/%.S

From a7c5c2cbd27af430e80d894944c479e5e4df71b3 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 18 Mar 2024 13:49:41 -0700
Subject: [PATCH 1545/1765] Makefile: Remove unnecessary dependencies

The rule included from auto.conf.cmd adds a dependency on every Kconfig
file, so these two Kconfig files do not need to be specified again here.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index e3b3b52b4b4..7df39b4e793 100644
--- a/Makefile
+++ b/Makefile
@@ -227,7 +227,7 @@ savedefconfig: $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
 	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
 	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/savedefconfig.py --kconfig $(src_dir)/Kconfig --out $(KCONFIG_DIR)/defconfig
 
-$(KCONFIG_CONFIG): $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG) $(platform_src_dir)/Kconfig $(src_dir)/Kconfig
+$(KCONFIG_CONFIG): $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG)
 	$(CMD_PREFIX)mkdir -p $(KCONFIG_DIR)
 	$(CMD_PREFIX)$(src_dir)/scripts/Kconfiglib/defconfig.py --kconfig $(src_dir)/Kconfig $(platform_src_dir)/configs/$(PLATFORM_DEFCONFIG)
 

From 68bc031a76f09e730b29dbc02d832605b4aab219 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Wed, 20 Mar 2024 15:50:43 +0100
Subject: [PATCH 1546/1765] lib: sbi: Add missing sscrind and sscfg extensions
 in sbi_hart_ext[]
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The sbi_hart_ext[] array is missing these two extensions ids. It is
expected that this array contains all the extensions declaration at the
same index of the SBI_HART_EXT_* define. Without this, when adding a new
extension, there is a mismatch between ids and extension names and it
can even display corrupted extension names.

Addresses-Coverity-ID: 1584994 Out-of-bounds read
Fixes: 6bb6b61c27eb ("lib: sbi: Add support for smcsrind and smcdeleg")
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 3d1369441c0..0e7b5d1d7cb 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -666,8 +666,13 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(sdtrig, SBI_HART_EXT_SDTRIG),
 	__SBI_HART_EXT_DATA(smcsrind, SBI_HART_EXT_SMCSRIND),
 	__SBI_HART_EXT_DATA(smcdeleg, SBI_HART_EXT_SMCDELEG),
+	__SBI_HART_EXT_DATA(sscsrind, SBI_HART_EXT_SSCSRIND),
+	__SBI_HART_EXT_DATA(ssccfg, SBI_HART_EXT_SSCCFG),
 };
 
+_Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),
+	       "sbi_hart_ext[]: wrong number of entries");
+
 /**
  * Get the hart extensions in string format
  *

From 37e1544a86135c8048af77a51486397209529fff Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 8 Apr 2024 09:29:04 +0200
Subject: [PATCH 1547/1765] lib: sbi: sse_event_get() may return NULL

sse_event_get() may return NULL. We should not dereference the return value
in sbi_sse_exit() without checking.

Fixes: c8cdf01d8f3a ("lib: sbi: Add support for Supervisor Software Events extension")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index a6866922da6..f0729f944d1 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -1119,7 +1119,7 @@ void sbi_sse_exit(struct sbi_scratch *scratch)
 	for (i = 0; i < EVENT_COUNT; i++) {
 		e = sse_event_get(supported_events[i]);
 
-		if (e->attrs.hartid != current_hartid())
+		if (!e || e->attrs.hartid != current_hartid())
 			continue;
 
 		if (sse_event_state(e) > SBI_SSE_STATE_REGISTERED) {

From 73344d4724d89ab5591311b9badfad875dddbb92 Mon Sep 17 00:00:00 2001
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Date: Mon, 8 Apr 2024 09:37:32 +0200
Subject: [PATCH 1548/1765] lib: utils: check correct value in
 fdt_node_offset_by_compatible

After calling fdt_node_offset_by_compatible() we must check its return
value and not an unrelated value.

Addresses-Coverity-ID: 1584993 Logically dead code
Fixes: 67ce5a763cfb ("platform: generic: Add support for specify coldboot harts in DT")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_fixup.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 194e55b3a82..974b1b883eb 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -394,7 +394,7 @@ void fdt_config_fixup(void *fdt)
 		return;
 
 	config_offset = fdt_node_offset_by_compatible(fdt, chosen_offset, "opensbi,config");
-	if (chosen_offset < 0)
+	if (config_offset < 0)
 		return;
 
 	fdt_nop_node(fdt, config_offset);

From d4d2582eef7aac442076f955e4024403f8ff3d96 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 8 Apr 2024 23:27:42 +0800
Subject: [PATCH 1549/1765] firmware: remove FW_TEXT_START

Now opensbi can run at any address via dynamic relocation. We can
remove FW_TEXT_START.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw.md                |  2 --
 docs/firmware/fw_jump.md           |  4 ++--
 docs/firmware/fw_payload.md        |  6 +++---
 docs/platform/generic.md           | 11 +++--------
 firmware/fw_base.S                 |  4 +---
 firmware/fw_base.ldS               |  3 +--
 firmware/fw_payload.elf.ldS        |  2 +-
 firmware/objects.mk                |  4 ----
 firmware/payloads/test.elf.ldS     |  2 +-
 platform/fpga/ariane/objects.mk    |  1 -
 platform/fpga/openpiton/objects.mk |  1 -
 platform/generic/objects.mk        |  3 +--
 platform/kendryte/k210/objects.mk  |  1 -
 platform/nuclei/ux600/objects.mk   |  1 -
 platform/template/objects.mk       |  9 ++-------
 15 files changed, 15 insertions(+), 39 deletions(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 2f4deb55fc3..3cc0262afa9 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -61,8 +61,6 @@ Firmware Configuration and Compilation
 All firmware types support the following common compile time configuration
 parameters:
 
-* **FW_TEXT_START** - Defines the execution address of the OpenSBI firmware.
-  This configuration parameter is mandatory.
 * **FW_FDT_PATH** - Path to an external flattened device tree binary file to
   be embedded in the *.rodata* section of the final firmware. If this option
   is not provided then the firmware will expect the FDT to be passed as an
diff --git a/docs/firmware/fw_jump.md b/docs/firmware/fw_jump.md
index 2ee6b291fa0..66be016902c 100644
--- a/docs/firmware/fw_jump.md
+++ b/docs/firmware/fw_jump.md
@@ -35,7 +35,7 @@ follows:
   At least one of *FW_JUMP_ADDR* and *FW_JUMP_OFFSET* (see below) should be
   defined. Compilation errors will result from not defining one of them.
 
-* **FW_JUMP_OFFSET** - Address offset from the *FW_TEXT_START* where the
+* **FW_JUMP_OFFSET** - Address offset from the opensbi load address where the
   entry point of the next booting stage is located. This offset is used as
   relocatable address of the next booting stage entry point. If *FW_JUMP_ADDR*
   is also defined, the firmware will prefer *FW_JUMP_ADDR*.
@@ -62,7 +62,7 @@ follows:
   echo fdt overlaps kernel, increase FW_JUMP_FDT_ADDR
   ```
 
-* **FW_JUMP_FDT_OFFSET** - Address offset from the *FW_TEXT_START* where
+* **FW_JUMP_FDT_OFFSET** - Address offset from the opensbi load address where
   the FDT will be passed to the next booting stage. This offset is used
   as relocatable address of the FDT passed to the next booting stage. If
   *FW_JUMP_FDT_ADDR* is also defined, the firmware will prefer
diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index a67fc50b868..d25be600c6a 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -36,8 +36,8 @@ options. These configuration parameters can be defined using either the top
 level `make` command line or the target platform *objects.mk* configuration
 file. The parameters currently defined are as follows:
 
-* **FW_PAYLOAD_OFFSET** - Offset from *FW_TEXT_START* where the payload binary
-  will be linked in the final *FW_PAYLOAD* firmware binary image. This
+* **FW_PAYLOAD_OFFSET** - Offset from the opensbi load address where the payload
+  binary will be linked in the final *FW_PAYLOAD* firmware binary image. This
   configuration parameter is mandatory if *FW_PAYLOAD_ALIGN* is not defined.
   Compilation errors will result from an incorrect definition of
   *FW_PAYLOAD_OFFSET* or of *FW_PAYLOAD_ALIGN*, or if neither of these
@@ -62,7 +62,7 @@ file. The parameters currently defined are as follows:
   firmware will pass the FDT address passed by the previous booting stage
   to the next booting stage.
 
-* **FW_PAYLOAD_FDT_OFFSET** - Address offset from the *FW_TEXT_START* where
+* **FW_PAYLOAD_FDT_OFFSET** - Address offset from the opensbi load address where
   the FDT will be passed to the next booting stage. This offset is used as
   relocatable address of the FDT passed to the next booting stage. If
   *FW_PAYLOAD_FDT_ADDR* is also defined, the firmware will prefer *FW_PAYLOAD_FDT_ADDR*.
diff --git a/docs/platform/generic.md b/docs/platform/generic.md
index c29eb047607..709b436e7e4 100644
--- a/docs/platform/generic.md
+++ b/docs/platform/generic.md
@@ -9,10 +9,9 @@ boards.
 
 By default, the generic FDT platform makes following assumptions:
 
-1. platform FW_TEXT_START is 0x80000000
-2. platform features are default
-3. platform stack size is default
-4. platform has no quirks or work-arounds
+1. platform features are default
+2. platform stack size is default
+3. platform has no quirks or work-arounds
 
 The above assumptions (except 1) can be overridden by adding special platform
 callbacks which will be called based on FDT root node compatible string.
@@ -33,10 +32,6 @@ Users of the generic FDT platform will have to ensure that:
 To build the platform-specific library and firmware images, provide the
 *PLATFORM=generic* parameter to the top level `make` command.
 
-For custom FW_TEXT_START, we can build the platform-specific library and
-firmware images by passing *PLATFORM=generic FW_TEXT_START=<custom_text_start>*
-parameter to the top level `make` command.
-
 Platform Options
 ----------------
 
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b950c0b836c..9f995a2283b 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -53,9 +53,7 @@ _try_lottery:
 	bnez	a6, _wait_for_boot_hart
 
 	/* relocate the global table content */
-	li	t0, FW_TEXT_START	/* link start */
-	lla	t1, _fw_start		/* load start */
-	sub	t2, t1, t0		/* load offset */
+	lla	t2, _fw_start
 	lla	t0, __rel_dyn_start
 	lla	t1, __rel_dyn_end
 	beq	t0, t1, _relocate_done
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index fb47984878f..9d11db56df7 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -7,8 +7,7 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-	. = FW_TEXT_START;
-	/* Don't add any section between FW_TEXT_START and _fw_start */
+	/* Don't add any section before _fw_start */
 	PROVIDE(_fw_start = .);
 
 	. = ALIGN(0x1000); /* Need this to create proper sections */
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index f1a544b80dc..94e1ac69591 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -15,7 +15,7 @@ SECTIONS
 	#include "fw_base.ldS"
 
 #ifdef FW_PAYLOAD_OFFSET
-	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
+	. = FW_PAYLOAD_OFFSET;
 #else
 	. = ALIGN(FW_PAYLOAD_ALIGN);
 #endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index e6b364b8115..a51ff657ea4 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -13,10 +13,6 @@ firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
-ifdef FW_TEXT_START
-firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
-endif
-
 ifdef FW_FDT_PATH
 firmware-genflags-y += -DFW_FDT_PATH=\"$(FW_FDT_PATH)\"
 ifdef FW_FDT_PADDING
diff --git a/firmware/payloads/test.elf.ldS b/firmware/payloads/test.elf.ldS
index 2328a1b782d..08e008f4e33 100644
--- a/firmware/payloads/test.elf.ldS
+++ b/firmware/payloads/test.elf.ldS
@@ -13,7 +13,7 @@ ENTRY(_start)
 SECTIONS
 {
 #ifdef FW_PAYLOAD_OFFSET
-	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
+	. = FW_PAYLOAD_OFFSET;
 #else
 	. = ALIGN(FW_PAYLOAD_ALIGN);
 #endif
diff --git a/platform/fpga/ariane/objects.mk b/platform/fpga/ariane/objects.mk
index 83581ac9d8c..d1177f41b80 100644
--- a/platform/fpga/ariane/objects.mk
+++ b/platform/fpga/ariane/objects.mk
@@ -17,7 +17,6 @@ platform-objs-y += platform.o
 PLATFORM_RISCV_XLEN = 64
 
 # Blobs to build
-FW_TEXT_START=0x80000000
 FW_JUMP=n
 
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
diff --git a/platform/fpga/openpiton/objects.mk b/platform/fpga/openpiton/objects.mk
index c8c345abfd6..1a0ce0c7771 100644
--- a/platform/fpga/openpiton/objects.mk
+++ b/platform/fpga/openpiton/objects.mk
@@ -16,7 +16,6 @@ platform-objs-y += platform.o
 PLATFORM_RISCV_XLEN = 64
 
 # Blobs to build
-FW_TEXT_START=0x80000000
 FW_JUMP=n
 
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index 85aa723a548..c215935e11a 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -15,14 +15,13 @@ platform-ldflags-y =
 
 # Command for platform specific "make run"
 platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
-  -nographic -bios $(build_dir)/platform/generic/firmware/fw_payload.elf
+  -nographic -bios $(build_dir)/platform/generic/firmware/fw_payload.bin
 
 # Objects to build
 platform-objs-y += platform.o
 platform-objs-y += platform_override_modules.o
 
 # Blobs to build
-FW_TEXT_START=0x80000000
 FW_DYNAMIC=y
 FW_JUMP=y
 ifeq ($(PLATFORM_RISCV_XLEN), 32)
diff --git a/platform/kendryte/k210/objects.mk b/platform/kendryte/k210/objects.mk
index 1bfb89861ec..efac3d2f95e 100644
--- a/platform/kendryte/k210/objects.mk
+++ b/platform/kendryte/k210/objects.mk
@@ -21,6 +21,5 @@ platform-varprefix-k210.o = dt_k210
 platform-padding-k210.o = 2048
 
 # Blobs to build
-FW_TEXT_START=0x80000000
 FW_PAYLOAD=y
 FW_PAYLOAD_ALIGN=0x1000
diff --git a/platform/nuclei/ux600/objects.mk b/platform/nuclei/ux600/objects.mk
index 7c429e0be8f..2753a7f9ab8 100644
--- a/platform/nuclei/ux600/objects.mk
+++ b/platform/nuclei/ux600/objects.mk
@@ -22,7 +22,6 @@ platform-runcmd = xl_spike \
 platform-objs-y += platform.o
 
 # Blobs to build
-FW_TEXT_START=0xA0000000
 FW_DYNAMIC=y
 FW_JUMP=y
 
diff --git a/platform/template/objects.mk b/platform/template/objects.mk
index b143cbc4ebc..f240a5576eb 100644
--- a/platform/template/objects.mk
+++ b/platform/template/objects.mk
@@ -41,9 +41,6 @@ platform-objs-y += platform.o
 #
 # platform-objs-y += <dt file name>.o
 
-# Firmware load address configuration. This is mandatory.
-FW_TEXT_START=0x80000000
-
 # Optional parameter for path to external FDT
 # FW_FDT_PATH="path to platform flattened device tree file"
 
@@ -69,8 +66,7 @@ FW_JUMP=<y|n>
 # endif
 # FW_JUMP_FDT_OFFSET=0x2200000
 #
-# You can use fixed address for jump firmware as an alternative option,
-# but this may fail when setting wrong FW_TEXT_START. Use with caution.
+# You can use fixed address for jump firmware as an alternative option.
 # SBI will prefer "<X>_ADDR" if both "<X>_ADDR" and "<X>_OFFSET" are
 # defined
 # ifeq ($(PLATFORM_RISCV_XLEN), 32)
@@ -97,8 +93,7 @@ endif
 # FW_PAYLOAD_PATH="path to next boot stage binary image file"
 # FW_PAYLOAD_FDT_OFFSET=0x2200000
 #
-# You can use fixed address for payload firmware as an alternative option,
-# but this may fail when setting wrong FW_TEXT_START. Use with caution.
+# You can use fixed address for payload firmware as an alternative option.
 # SBI will prefer "FW_PAYLOAD_FDT_ADDR" if both "FW_PAYLOAD_FDT_OFFSET"
 # and "FW_PAYLOAD_FDT_ADDR" are defined.
 # FW_PAYLOAD_FDT_ADDR=0x82200000

From f6243d9ce591b3a2085feff23ab2fbe1a6d51a14 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Tue, 23 Apr 2024 16:52:43 +0100
Subject: [PATCH 1550/1765] lib: tests: Add test suite init function

Allow to define an init function for the test suite. It could help us
to initialize global variable once, and use them in multiple test cases
after the initialization.

For instance, if multiple test cases use the same atomic_t var, it
could be helpful to call ATOMIC_INIT once during the suite
initialization.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_unit_test.h   | 2 ++
 lib/sbi/tests/sbi_unit_test.c | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/sbi/sbi_unit_test.h b/include/sbi/sbi_unit_test.h
index c63d900cbf3..448c04864db 100644
--- a/include/sbi/sbi_unit_test.h
+++ b/include/sbi/sbi_unit_test.h
@@ -19,6 +19,7 @@ struct sbiunit_test_case {
 
 struct sbiunit_test_suite {
 	const char *name;
+	void (*init)(void);
 	struct sbiunit_test_case *cases;
 };
 
@@ -34,6 +35,7 @@ struct sbiunit_test_suite {
 #define SBIUNIT_TEST_SUITE(suite_name, cases_arr)		\
 	struct sbiunit_test_suite suite_name = {		\
 		.name = #suite_name,				\
+		.init = NULL,					\
 		.cases = cases_arr				\
 	}
 
diff --git a/lib/sbi/tests/sbi_unit_test.c b/lib/sbi/tests/sbi_unit_test.c
index 1987838c52b..c2a0be683a7 100644
--- a/lib/sbi/tests/sbi_unit_test.c
+++ b/lib/sbi/tests/sbi_unit_test.c
@@ -17,6 +17,9 @@ static void run_test_suite(struct sbiunit_test_suite *suite)
 
 	sbi_printf("## Running test suite: %s\n", suite->name);
 
+	if (suite->init)
+		suite->init();
+
 	s_case = suite->cases;
 	while (s_case->test_func) {
 		s_case->test_func(s_case);

From 7bdf41ad1eb189820507c7699ee6a44df086ca70 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Tue, 23 Apr 2024 16:52:44 +0100
Subject: [PATCH 1551/1765] lib: tests: Add test for atomic_t

Implement the test which covers some of the functions from the
`riscv_atomic.h` header file. The test contains 9 test cases:

1) atomic read/write test
2) add/return test
3) sub/return test
4) cmpxchg test
5) atomic_xchg test
6) atomic_raw_set_bit test
7) atomic_raw_clear_bit test
8) atomic_set_bit test
9) atomic_clear_bit test

Some of the test cases operate on the `test_atomic` variable. It gets
initialized in the suite init function.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/tests/objects.mk          |   3 +
 lib/sbi/tests/riscv_atomic_test.c | 143 ++++++++++++++++++++++++++++++
 2 files changed, 146 insertions(+)
 create mode 100644 lib/sbi/tests/riscv_atomic_test.c

diff --git a/lib/sbi/tests/objects.mk b/lib/sbi/tests/objects.mk
index 5ce188ada02..ba588dce318 100644
--- a/lib/sbi/tests/objects.mk
+++ b/lib/sbi/tests/objects.mk
@@ -6,3 +6,6 @@ libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_bitmap_test.o
 
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += console_test_suite
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_console_test.o
+
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += atomic_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/riscv_atomic_test.o
diff --git a/lib/sbi/tests/riscv_atomic_test.c b/lib/sbi/tests/riscv_atomic_test.c
new file mode 100644
index 00000000000..8a17a5fdc4c
--- /dev/null
+++ b/lib/sbi/tests/riscv_atomic_test.c
@@ -0,0 +1,143 @@
+#include <sbi/sbi_unit_test.h>
+#include <sbi/riscv_atomic.h>
+#include <sbi/sbi_bitops.h>
+
+#define ATOMIC_TEST_VAL1 239l
+#define ATOMIC_TEST_VAL2 30l
+#define ATOMIC_TEST_VAL3 2024l
+
+#define ATOMIC_TEST_BIT_NUM 3
+
+#define ATOMIC_TEST_RAW_BIT_CELL 1
+#define ATOMIC_TEST_RAW_BIT_NUM 15
+
+static atomic_t test_atomic;
+
+static void atomic_test_suite_init(void)
+{
+	ATOMIC_INIT(&test_atomic, 0);
+}
+
+static void atomic_rw_test(struct sbiunit_test_case *test)
+{
+	/* We should read the same value as we've written */
+	atomic_write(&test_atomic, ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL1);
+	/* Negative value should also work */
+	atomic_write(&test_atomic, -ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), -ATOMIC_TEST_VAL1);
+}
+
+static void add_return_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_add_return(&test_atomic, ATOMIC_TEST_VAL2),
+			  ATOMIC_TEST_VAL1 + ATOMIC_TEST_VAL2);
+	/* The atomic value should be updated as well */
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL1 + ATOMIC_TEST_VAL2);
+}
+
+static void sub_return_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_sub_return(&test_atomic, ATOMIC_TEST_VAL2),
+			  ATOMIC_TEST_VAL1 - ATOMIC_TEST_VAL2);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL1 - ATOMIC_TEST_VAL2);
+}
+
+static void cmpxchg_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, ATOMIC_TEST_VAL1);
+	/* if current value != expected, it stays the same */
+	SBIUNIT_EXPECT_EQ(test, atomic_cmpxchg(&test_atomic, ATOMIC_TEST_VAL2, ATOMIC_TEST_VAL3),
+			  ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL1);
+	/* if current value == expected, it gets updated */
+	SBIUNIT_EXPECT_EQ(test, atomic_cmpxchg(&test_atomic, ATOMIC_TEST_VAL1, ATOMIC_TEST_VAL2),
+			  ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL2);
+}
+
+static void atomic_xchg_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_xchg(&test_atomic, ATOMIC_TEST_VAL2), ATOMIC_TEST_VAL1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), ATOMIC_TEST_VAL2);
+}
+
+static void atomic_raw_set_bit_test(struct sbiunit_test_case *test)
+{
+	unsigned long data[] = {0, 0, 0};
+	/* the bitpos points to the bit of one of the elements of the `data` array */
+	size_t bitpos = ATOMIC_TEST_RAW_BIT_CELL * BITS_PER_LONG + ATOMIC_TEST_RAW_BIT_NUM;
+
+	/* check if the bit we set actually gets set */
+	SBIUNIT_EXPECT_EQ(test, atomic_raw_set_bit(bitpos, data), 0);
+	SBIUNIT_EXPECT_EQ(test, data[ATOMIC_TEST_RAW_BIT_CELL], 1 << ATOMIC_TEST_RAW_BIT_NUM);
+
+	/* Other elements of the `data` array should stay untouched */
+	SBIUNIT_EXPECT_EQ(test, data[0], 0);
+	SBIUNIT_EXPECT_EQ(test, data[2], 0);
+
+	/* check that if we set the bit twice it stays set */
+	SBIUNIT_EXPECT_EQ(test, atomic_raw_set_bit(bitpos, data), 1);
+	SBIUNIT_EXPECT_EQ(test, data[ATOMIC_TEST_RAW_BIT_CELL], 1 << ATOMIC_TEST_RAW_BIT_NUM);
+}
+
+static void atomic_raw_clear_bit_test(struct sbiunit_test_case *test)
+{
+	unsigned long data[] = {~1UL, 1 << ATOMIC_TEST_RAW_BIT_NUM, ~1UL};
+	/* the bitpos points to the bit of one of the elements of the `data` array */
+	size_t bitpos = ATOMIC_TEST_RAW_BIT_CELL * BITS_PER_LONG + ATOMIC_TEST_RAW_BIT_NUM;
+
+	/* check if the bit we clear actually gets cleared */
+	SBIUNIT_EXPECT_EQ(test, atomic_raw_clear_bit(bitpos, data), 1);
+	SBIUNIT_EXPECT_EQ(test, data[ATOMIC_TEST_RAW_BIT_CELL], 0);
+
+	/* Other elements of the `data` array should stay untouched */
+	SBIUNIT_EXPECT_EQ(test, data[0], ~1UL);
+	SBIUNIT_EXPECT_EQ(test, data[2], ~1UL);
+
+	/* check that if we clear the bit twice it stays cleared */
+	SBIUNIT_EXPECT_EQ(test, atomic_raw_clear_bit(bitpos, data), 0);
+	SBIUNIT_EXPECT_EQ(test, data[ATOMIC_TEST_RAW_BIT_CELL], 0);
+}
+
+static void atomic_set_bit_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, 0);
+	SBIUNIT_EXPECT_EQ(test, atomic_set_bit(ATOMIC_TEST_BIT_NUM, &test_atomic), 0);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), 1 << ATOMIC_TEST_BIT_NUM);
+	/* If we set the bit twice, it stays 1 */
+	SBIUNIT_EXPECT_EQ(test, atomic_set_bit(ATOMIC_TEST_BIT_NUM, &test_atomic), 1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), 1 << ATOMIC_TEST_BIT_NUM);
+}
+
+static void atomic_clear_bit_test(struct sbiunit_test_case *test)
+{
+	atomic_write(&test_atomic, 1 << ATOMIC_TEST_BIT_NUM);
+	SBIUNIT_EXPECT_EQ(test, atomic_clear_bit(ATOMIC_TEST_BIT_NUM, &test_atomic), 1);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), 0);
+	/* if we clear the bit twice, it stays 0 */
+	SBIUNIT_EXPECT_EQ(test, atomic_clear_bit(ATOMIC_TEST_BIT_NUM, &test_atomic), 0);
+	SBIUNIT_EXPECT_EQ(test, atomic_read(&test_atomic), 0);
+}
+
+static struct sbiunit_test_case atomic_test_cases[] = {
+	SBIUNIT_TEST_CASE(atomic_rw_test),
+	SBIUNIT_TEST_CASE(add_return_test),
+	SBIUNIT_TEST_CASE(sub_return_test),
+	SBIUNIT_TEST_CASE(cmpxchg_test),
+	SBIUNIT_TEST_CASE(atomic_xchg_test),
+	SBIUNIT_TEST_CASE(atomic_raw_set_bit_test),
+	SBIUNIT_TEST_CASE(atomic_raw_clear_bit_test),
+	SBIUNIT_TEST_CASE(atomic_set_bit_test),
+	SBIUNIT_TEST_CASE(atomic_clear_bit_test),
+	SBIUNIT_END_CASE,
+};
+
+const struct sbiunit_test_suite atomic_test_suite = {
+	.name = "atomic_test_suite",
+	.cases = atomic_test_cases,
+	.init = atomic_test_suite_init
+};

From 7b1ed968e4afc63d2ca54f6bdf1b42ef2b6576fa Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Tue, 23 Apr 2024 16:52:45 +0100
Subject: [PATCH 1552/1765] lib: tests: Add test for spinlocks

Implement the test which covers some of the functions from the
`riscv_locks.h` file. This test consists of 3 test cases:

1) For lock/unlock functions
2) Unsuccessful trylock (the lock was previously taken)
3) Successful trylock (the lock is free and can be taken)

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/tests/objects.mk         |  3 +++
 lib/sbi/tests/riscv_locks_test.c | 41 ++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)
 create mode 100644 lib/sbi/tests/riscv_locks_test.c

diff --git a/lib/sbi/tests/objects.mk b/lib/sbi/tests/objects.mk
index ba588dce318..8f272897ade 100644
--- a/lib/sbi/tests/objects.mk
+++ b/lib/sbi/tests/objects.mk
@@ -9,3 +9,6 @@ libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_console_test.o
 
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += atomic_test_suite
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/riscv_atomic_test.o
+
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += locks_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/riscv_locks_test.o
diff --git a/lib/sbi/tests/riscv_locks_test.c b/lib/sbi/tests/riscv_locks_test.c
new file mode 100644
index 00000000000..7894c4e9873
--- /dev/null
+++ b/lib/sbi/tests/riscv_locks_test.c
@@ -0,0 +1,41 @@
+#include <sbi/sbi_unit_test.h>
+#include <sbi/riscv_locks.h>
+
+static spinlock_t test_lock = SPIN_LOCK_INITIALIZER;
+
+static void spin_lock_test(struct sbiunit_test_case *test)
+{
+	/* We don't want to accidentally get locked */
+	SBIUNIT_ASSERT(test, !spin_lock_check(&test_lock));
+
+	spin_lock(&test_lock);
+	SBIUNIT_EXPECT(test, spin_lock_check(&test_lock));
+	spin_unlock(&test_lock);
+
+	SBIUNIT_ASSERT(test, !spin_lock_check(&test_lock));
+}
+
+static void spin_trylock_fail(struct sbiunit_test_case *test)
+{
+	/* We don't want to accidentally get locked */
+	SBIUNIT_ASSERT(test, !spin_lock_check(&test_lock));
+
+	spin_lock(&test_lock);
+	SBIUNIT_EXPECT(test, !spin_trylock(&test_lock));
+	spin_unlock(&test_lock);
+}
+
+static void spin_trylock_success(struct sbiunit_test_case *test)
+{
+	SBIUNIT_EXPECT(test, spin_trylock(&test_lock));
+	spin_unlock(&test_lock);
+}
+
+static struct sbiunit_test_case locks_test_cases[] = {
+	SBIUNIT_TEST_CASE(spin_lock_test),
+	SBIUNIT_TEST_CASE(spin_trylock_fail),
+	SBIUNIT_TEST_CASE(spin_trylock_success),
+	SBIUNIT_END_CASE,
+};
+
+SBIUNIT_TEST_SUITE(locks_test_suite, locks_test_cases);

From c21c99db6acf14fdf420271ce670b6a648fc3a9a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:02 +0200
Subject: [PATCH 1553/1765] lib: sbi: sse: fix typos, comments and spacing
 errors
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Fix some errors spotted by Samuel while reviewing the SSE implementation.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reported-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 24 ++++++++++++------------
 lib/sbi/sbi_sse.c                 | 22 +++++++++++-----------
 2 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index a511e0b7d12..2600b662f38 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -344,36 +344,36 @@ enum sbi_sse_attr_id {
 #define SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP	BIT(3)
 
 enum sbi_sse_state {
-	SBI_SSE_STATE_UNUSED     = 0,
-	SBI_SSE_STATE_REGISTERED = 1,
-	SBI_SSE_STATE_ENABLED    = 2,
-	SBI_SSE_STATE_RUNNING    = 3,
+	SBI_SSE_STATE_UNUSED		= 0,
+	SBI_SSE_STATE_REGISTERED	= 1,
+	SBI_SSE_STATE_ENABLED		= 2,
+	SBI_SSE_STATE_RUNNING		= 3,
 };
 
 /* SBI SSE Event IDs. */
 #define SBI_SSE_EVENT_LOCAL_RAS			0x00000000
-#define	SBI_SSE_EVENT_LOCAL_PLAT_0_START	0x00004000
+#define SBI_SSE_EVENT_LOCAL_PLAT_0_START	0x00004000
 #define SBI_SSE_EVENT_LOCAL_PLAT_0_END		0x00007fff
 #define SBI_SSE_EVENT_GLOBAL_RAS		0x00008000
-#define	SBI_SSE_EVENT_GLOBAL_PLAT_0_START	0x00004000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_0_START	0x00004000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_0_END		0x00007fff
 
 #define SBI_SSE_EVENT_LOCAL_PMU			0x00010000
-#define	SBI_SSE_EVENT_LOCAL_PLAT_1_START	0x00014000
+#define SBI_SSE_EVENT_LOCAL_PLAT_1_START	0x00014000
 #define SBI_SSE_EVENT_LOCAL_PLAT_1_END		0x00017fff
-#define	SBI_SSE_EVENT_GLOBAL_PLAT_1_START	0x0001c000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_1_START	0x0001c000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_1_END		0x0001ffff
 
-#define	SBI_SSE_EVENT_LOCAL_PLAT_2_START	0x00024000
+#define SBI_SSE_EVENT_LOCAL_PLAT_2_START	0x00024000
 #define SBI_SSE_EVENT_LOCAL_PLAT_2_END		0x00027fff
-#define	SBI_SSE_EVENT_GLOBAL_PLAT_2_START	0x0002c000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_2_START	0x0002c000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_2_END		0x0002ffff
 
 #define SBI_SSE_EVENT_LOCAL_SOFTWARE		0xffff0000
-#define	SBI_SSE_EVENT_LOCAL_PLAT_3_START	0xffff4000
+#define SBI_SSE_EVENT_LOCAL_PLAT_3_START	0xffff4000
 #define SBI_SSE_EVENT_LOCAL_PLAT_3_END		0xffff7fff
 #define SBI_SSE_EVENT_GLOBAL_SOFTWARE		0xffff8000
-#define	SBI_SSE_EVENT_GLOBAL_PLAT_3_START	0xffffc000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_3_START	0xffffc000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_3_END		0xffffffff
 
 #define SBI_SSE_EVENT_GLOBAL_BIT		(1 << 15)
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index f0729f944d1..a5fed3489cf 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -128,7 +128,7 @@ struct sse_hart_state {
 	 *
 	 * When an event is in a state >= ENABLED, then it is inserted in the
 	 * this enabled_event_list and thus can only be removed from this
-	 * list upon disable ecall or on complete with ONE_SHOT flag.
+	 * list upon disable ecall or on complete with ONESHOT flag.
 	 */
 	struct sbi_dlist enabled_event_list;
 
@@ -202,7 +202,7 @@ static struct sse_hart_state *sse_get_hart_state(struct sbi_sse_event *e)
 	return sse_get_hart_state_ptr(s);
 }
 
-static struct sse_global_event *sse_get_global_event(struct sbi_sse_event* e)
+static struct sse_global_event *sse_get_global_event(struct sbi_sse_event *e)
 {
 	return container_of(e, struct sse_global_event, event);
 }
@@ -552,11 +552,11 @@ static bool sse_event_check_inject(struct sbi_sse_event *e,
 				   struct sbi_trap_regs *regs)
 {
 	/*
-	* List of event is ordered by priority, stop at first running
-	* event since all other events after this one are of lower
-	* priority. This means an event of higher priority is already
-	* running.
-	*/
+	 * List of event is ordered by priority, stop at first running
+	 * event since all other events after this one are of lower
+	 * priority. This means an event of higher priority is already
+	 * running.
+	 */
 	if (sse_event_state(e) == SBI_SSE_STATE_RUNNING) {
 		return true;
 	}
@@ -882,10 +882,10 @@ int sbi_sse_read_attrs(uint32_t event_id, uint32_t base_attr_id,
 
 	/*
 	 * Copy all attributes at once since struct sse_event_attrs is matching
-	 * the SBI_SSE_ATTR_* attributes. While WRITE_ATTR attribute is not used
-	 * in s-mode sse handling path, READ_ATTR is used to retrieve the value
-	 * of registers when interrupted. Rather than doing multiple SBI calls,
-	 * a single one is done allowing to retrieve them all at once.
+	 * the SBI_SSE_ATTR_* attributes. READ_ATTR is used in SSE handling path
+	 * to retrieve the value of registers when interrupted. Rather than
+	 * doing multiple SBI calls a single one is done allowing to retrieve
+	 * them all at once.
 	 */
 	e_attrs = (unsigned long *)&e->attrs;
 	attrs = (unsigned long *)output_phys_lo;

From 7aa80ea4954ea369dba8f5864a1386342c44d806 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:03 +0200
Subject: [PATCH 1554/1765] lib: sbi: sse: rename sse_hart_unlock() to
 sse_enabled_event_unlock()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

There was a naming incoherency between enabled events list lock/unlock.
Rename sse_hart_unlock() to sse_enabled_event_unlock() to be coherent
and reword comments above lock()/unlock() functions.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index a5fed3489cf..0f8b34767b8 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -208,7 +208,7 @@ static struct sse_global_event *sse_get_global_event(struct sbi_sse_event *e)
 }
 
 /**
- * If event is global, must be called under global event lock
+ * If event is global, must be called under enabled event lock
  */
 static void sse_enabled_event_lock(struct sbi_sse_event *e)
 {
@@ -219,9 +219,9 @@ static void sse_enabled_event_lock(struct sbi_sse_event *e)
 }
 
 /**
- * If event is global, must be called under global event lock
+ * If event is global, must be called under enabled event lock
  */
-static void sse_hart_unlock(struct sbi_sse_event *e)
+static void sse_enabled_event_unlock(struct sbi_sse_event *e)
 {
 	struct sse_hart_state *shs;
 
@@ -753,7 +753,7 @@ int sbi_sse_enable(uint32_t event_id)
 
 	sse_enabled_event_lock(e);
 	ret = sse_event_enable(e);
-	sse_hart_unlock(e);
+	sse_enabled_event_unlock(e);
 	sse_event_put(e);
 
 	return ret;
@@ -770,7 +770,7 @@ int sbi_sse_disable(uint32_t event_id)
 
 	sse_enabled_event_lock(e);
 	ret = sse_event_disable(e);
-	sse_hart_unlock(e);
+	sse_enabled_event_unlock(e);
 
 	sse_event_put(e);
 

From 22ff75099c53a4bac72abc3fa10157aabeb3ce49 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:04 +0200
Subject: [PATCH 1555/1765] lib: sbi: sse: simplify 32bits overflow check
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Rather than checking 32bits overflow with some absolute value, check the
value to be different from the cast itself.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reported-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 0f8b34767b8..1b6048d8526 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -344,7 +344,7 @@ static int sse_event_set_attr_check(struct sbi_sse_event *e, uint32_t attr_id,
 		break;
 	case SBI_SSE_ATTR_PRIO:
 #if __riscv_xlen > 32
-		if (val > 0xFFFFFFFFUL) {
+		if (val != (uint32_t)val) {
 			ret = SBI_EINVAL;
 			break;
 		}

From d528dbfd4ba674dabb0a7b4466112e64c6ada3c6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:05 +0200
Subject: [PATCH 1556/1765] lib: sbi: sse: remove superfluous sbi_list_empty()
 check
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The list loop below that check is actually not looping if the list is
empty so there was no need for this check.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reported-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 1b6048d8526..2c7f78d255a 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -578,9 +578,6 @@ void sbi_sse_process_pending_events(struct sbi_trap_regs *regs)
 
 	spin_lock(&state->enabled_event_lock);
 
-	if (sbi_list_empty(&state->enabled_event_list))
-		goto out;
-
 	sbi_list_for_each_entry(e, &state->enabled_event_list, node) {
 		ret = sse_event_check_inject(e, regs);
 		if (ret)

From ce3c82cb2e2d6e41912b97c4f99e8567fadf445e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:06 +0200
Subject: [PATCH 1557/1765] lib: sbi: sse: call enable callback before sending
 IPI
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Move the enable callback call before sending the IPI. Even though the
event is locked and no race condition can happen, this is more logical.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reported-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 2c7f78d255a..fb327f02656 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -686,12 +686,12 @@ static int sse_event_enable(struct sbi_sse_event *e)
 	sse_event_set_state(e, SBI_SSE_STATE_ENABLED);
 	sse_event_add_to_list(e);
 
-	if (sse_event_pending(e))
+	sse_event_invoke_cb(e, enable_cb);
+
+	if (sse_event_is_global(e) && sse_event_pending(e))
 		sbi_ipi_send_many(1, e->attrs.hartid, sse_ipi_inject_event,
 				  NULL);
 
-	sse_event_invoke_cb(e, enable_cb);
-
 	return SBI_OK;
 }
 

From bd007658f8f36e2846ea3f420afe2d0891bd1110 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:07 +0200
Subject: [PATCH 1558/1765] lib: sbi: sse: use PRV_S instead of hardcoded value
 for mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Rather then passing 1 to sbi_domain_check_addr_range() for supervisor
mode, use PRV_S.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index fb327f02656..76fbee457fc 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -837,8 +837,8 @@ int sbi_sse_attr_check(uint32_t base_attr_id, uint32_t attr_count,
 		return SBI_EINVALID_ADDR;
 
 	if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(), phys_lo,
-					 sizeof(unsigned long) * attr_count, 1,
-					 access))
+					 sizeof(unsigned long) * attr_count,
+					 PRV_S, access))
 		return SBI_EINVALID_ADDR;
 
 	return SBI_OK;

From 033104da08baf52c8b65b56a03363ea238c9ca31 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Tue, 9 Apr 2024 12:02:08 +0200
Subject: [PATCH 1559/1765] lib: sbi: sse: check handler entry to belong to
 supervisor mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

When registering an SSE event, check for the handler_entry_pc to belong
to supervisor mode domain using sbi_domain_check_addr_range().

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reported-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 76fbee457fc..18dfdb6dc95 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -959,6 +959,12 @@ int sbi_sse_register(uint32_t event_id, unsigned long handler_entry_pc,
 	if (handler_entry_pc & 0x1)
 		return SBI_EINVAL;
 
+	if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(),
+					 handler_entry_pc,
+					 sizeof(unsigned long), PRV_S,
+					 SBI_DOMAIN_EXECUTE))
+		return SBI_EINVALID_ADDR;
+
 	e = sse_event_get(event_id);
 	if (!e)
 		return SBI_EINVAL;

From 1d89a9da64e4b4f51c59c44eba2f65b037bc4d95 Mon Sep 17 00:00:00 2001
From: "Pope B.Lei" <popeblei@gmail.com>
Date: Wed, 10 Apr 2024 10:05:20 +0800
Subject: [PATCH 1560/1765] lib: sbi: Refine the settings for switching to
 Virtual Supervisor Mode.

Although Mstatus.MPV is set, before executing mret, access to VS mode
registers should use the actual register addresses, not the pseudonyms
of S registers.

Signed-off-by: Pope B.Lei <popeblei@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 0e7b5d1d7cb..cd974cc1a8d 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -1046,10 +1046,17 @@ sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
 	csr_write(CSR_MEPC, next_addr);
 
 	if (next_mode == PRV_S) {
-		csr_write(CSR_STVEC, next_addr);
-		csr_write(CSR_SSCRATCH, 0);
-		csr_write(CSR_SIE, 0);
-		csr_write(CSR_SATP, 0);
+		if (next_virt) {
+			csr_write(CSR_VSTVEC, next_addr);
+			csr_write(CSR_VSSCRATCH, 0);
+			csr_write(CSR_VSIE, 0);
+			csr_write(CSR_VSATP, 0);
+		} else {
+			csr_write(CSR_STVEC, next_addr);
+			csr_write(CSR_SSCRATCH, 0);
+			csr_write(CSR_SIE, 0);
+			csr_write(CSR_SATP, 0);
+		}
 	} else if (next_mode == PRV_U) {
 		if (misa_extension('N')) {
 			csr_write(CSR_UTVEC, next_addr);

From 17e829129d60d7d178d47ecbd8990e705690d352 Mon Sep 17 00:00:00 2001
From: Alvin Chang <alvinga@andestech.com>
Date: Tue, 16 Apr 2024 13:02:13 +0800
Subject: [PATCH 1561/1765] sbi: sbi_domain_context: Add spinlock for updating
 domain assigned_harts

Add spinlock protection to avoid race condition on assigned_harts
during domain context switching. Also, rename/add variables for
accessing the corresponding domain of target/current context.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h     |  3 +++
 lib/sbi/sbi_domain.c         | 35 +++++++++++++++++++++++++++++------
 lib/sbi/sbi_domain_context.c | 27 +++++++++++++++++----------
 lib/sbi/sbi_system.c         |  8 ++++++--
 4 files changed, 55 insertions(+), 18 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 4706cfca726..a6e99c63d81 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -10,6 +10,7 @@
 #ifndef __SBI_DOMAIN_H__
 #define __SBI_DOMAIN_H__
 
+#include <sbi/riscv_locks.h>
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_domain_context.h>
@@ -173,6 +174,8 @@ struct sbi_domain {
 	 * in the coldboot path
 	 */
 	struct sbi_hartmask assigned_harts;
+	/** Spinlock for accessing assigned_harts */
+	spinlock_t assigned_harts_lock;
 	/** Name of this domain */
 	char name[64];
 	/** Possible HARTs in this domain */
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 50749f15dc9..374ac36b2f3 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -64,20 +64,34 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
 
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 {
-	if (dom)
-		return sbi_hartmask_test_hartid(hartid, &dom->assigned_harts);
+	bool ret;
+	struct sbi_domain *tdom = (struct sbi_domain *)dom;
 
-	return false;
+	if (!dom)
+		return false;
+
+	spin_lock(&tdom->assigned_harts_lock);
+	ret = sbi_hartmask_test_hartid(hartid, &tdom->assigned_harts);
+	spin_unlock(&tdom->assigned_harts_lock);
+
+	return ret;
 }
 
 ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
 				       ulong hbase)
 {
 	ulong ret = 0;
+	struct sbi_domain *tdom = (struct sbi_domain *)dom;
+
+	if (!dom)
+		return 0;
+
+	spin_lock(&tdom->assigned_harts_lock);
 	for (int i = 0; i < 8 * sizeof(ret); i++) {
-		if (sbi_domain_is_assigned_hart(dom, hbase + i))
+		if (sbi_hartmask_test_hartid(hbase + i, &tdom->assigned_harts))
 			ret |= 1UL << i;
 	}
+	spin_unlock(&tdom->assigned_harts_lock);
 
 	return ret;
 }
@@ -555,6 +569,9 @@ int sbi_domain_register(struct sbi_domain *dom,
 	dom->index = domain_count++;
 	domidx_to_domain_table[dom->index] = dom;
 
+	/* Initialize spinlock for dom->assigned_harts */
+	SPIN_LOCK_INIT(dom->assigned_harts_lock);
+
 	/* Clear assigned HARTs of domain */
 	sbi_hartmask_clear_all(&dom->assigned_harts);
 
@@ -701,8 +718,14 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 			continue;
 
 		/* Ignore if boot HART assigned different domain */
-		if (sbi_hartindex_to_domain(dhart) != dom ||
-		    !sbi_hartmask_test_hartindex(dhart, &dom->assigned_harts))
+		if (sbi_hartindex_to_domain(dhart) != dom)
+			continue;
+
+		/* Ignore if boot HART is not part of the assigned HARTs */
+		spin_lock(&dom->assigned_harts_lock);
+		rc = sbi_hartmask_test_hartindex(dhart, &dom->assigned_harts);
+		spin_unlock(&dom->assigned_harts_lock);
+		if (!rc)
 			continue;
 
 		/* Startup boot HART of domain */
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 8daf629cd58..7528591805d 100755
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -26,18 +26,23 @@
 static void switch_to_next_domain_context(struct sbi_context *ctx,
 					  struct sbi_context *dom_ctx)
 {
-	u32 hartindex;
+	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
 	struct sbi_trap_regs *trap_regs;
-	struct sbi_domain *dom = dom_ctx->dom;
+	struct sbi_domain *current_dom = ctx->dom;
+	struct sbi_domain *target_dom = dom_ctx->dom;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	unsigned int pmp_count = sbi_hart_pmp_count(scratch);
 
 	/* Assign current hart to target domain */
-	hartindex = sbi_hartid_to_hartindex(current_hartid());
-	sbi_hartmask_clear_hartindex(
-		hartindex, &sbi_domain_thishart_ptr()->assigned_harts);
-	sbi_update_hartindex_to_domain(hartindex, dom);
-	sbi_hartmask_set_hartindex(hartindex, &dom->assigned_harts);
+	spin_lock(&current_dom->assigned_harts_lock);
+	sbi_hartmask_clear_hartindex(hartindex, &current_dom->assigned_harts);
+	spin_unlock(&current_dom->assigned_harts_lock);
+
+	sbi_update_hartindex_to_domain(hartindex, target_dom);
+
+	spin_lock(&target_dom->assigned_harts_lock);
+	sbi_hartmask_set_hartindex(hartindex, &target_dom->assigned_harts);
+	spin_unlock(&target_dom->assigned_harts_lock);
 
 	/* Reconfigure PMP settings for the new domain */
 	for (int i = 0; i < pmp_count; i++) {
@@ -72,9 +77,11 @@ static void switch_to_next_domain_context(struct sbi_context *ctx,
 	/* If target domain context is not initialized or runnable */
 	if (!dom_ctx->initialized) {
 		/* Startup boot HART of target domain */
-		if (current_hartid() == dom->boot_hartid)
-			sbi_hart_switch_mode(dom->boot_hartid, dom->next_arg1,
-					     dom->next_addr, dom->next_mode,
+		if (current_hartid() == target_dom->boot_hartid)
+			sbi_hart_switch_mode(target_dom->boot_hartid,
+					     target_dom->next_arg1,
+					     target_dom->next_addr,
+					     target_dom->next_mode,
 					     false);
 		else
 			sbi_hsm_hart_stop(scratch, true);
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index e930272152f..c068b725128 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -148,7 +148,7 @@ bool sbi_system_suspend_supported(u32 sleep_type)
 
 int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 {
-	const struct sbi_domain *dom = sbi_domain_thishart_ptr();
+	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
 	unsigned int hartid = current_hartid();
@@ -171,13 +171,17 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_EFAIL;
 
+	spin_lock(&dom->assigned_harts_lock);
 	sbi_hartmask_for_each_hartindex(j, &dom->assigned_harts) {
 		i = sbi_hartindex_to_hartid(j);
 		if (i == hartid)
 			continue;
-		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED)
+		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED) {
+			spin_unlock(&dom->assigned_harts_lock);
 			return SBI_ERR_DENIED;
+		}
 	}
+	spin_unlock(&dom->assigned_harts_lock);
 
 	if (!sbi_domain_check_addr(dom, resume_addr, prev_mode,
 				   SBI_DOMAIN_EXECUTE))

From f68b3aed9d7bc74f61deb817feeb982809655c51 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Fri, 19 Apr 2024 11:58:23 +0800
Subject: [PATCH 1562/1765] platform: andes: Rename files with the prefix
 andes45

Rename files with the prefix andes45 to andes.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/{andes45-pma.c => andes_pma.c}         | 0
 platform/generic/include/andes/{andes45.h => andes.h}         | 0
 platform/generic/include/andes/{andes45_pma.h => andes_pma.h} | 0
 3 files changed, 0 insertions(+), 0 deletions(-)
 rename platform/generic/andes/{andes45-pma.c => andes_pma.c} (100%)
 rename platform/generic/include/andes/{andes45.h => andes.h} (100%)
 rename platform/generic/include/andes/{andes45_pma.h => andes_pma.h} (100%)

diff --git a/platform/generic/andes/andes45-pma.c b/platform/generic/andes/andes_pma.c
similarity index 100%
rename from platform/generic/andes/andes45-pma.c
rename to platform/generic/andes/andes_pma.c
diff --git a/platform/generic/include/andes/andes45.h b/platform/generic/include/andes/andes.h
similarity index 100%
rename from platform/generic/include/andes/andes45.h
rename to platform/generic/include/andes/andes.h
diff --git a/platform/generic/include/andes/andes45_pma.h b/platform/generic/include/andes/andes_pma.h
similarity index 100%
rename from platform/generic/include/andes/andes45_pma.h
rename to platform/generic/include/andes/andes_pma.h

From 2b93ce0954d594a1c4919f02187bbf7177ed412d Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Fri, 19 Apr 2024 11:58:24 +0800
Subject: [PATCH 1563/1765] platform: andes: Change all occurrences of andes45
 to andes

To make the framework suit all Andes CPUs, change all occurrences of
andes45 to andes.

In addition, we fix some coding style problems and remove an unused
macro in andes.h.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig                   |  2 +-
 platform/generic/andes/Kconfig             |  2 +-
 platform/generic/andes/ae350.c             |  7 +-
 platform/generic/andes/andes_pma.c         | 80 ++++++++++------------
 platform/generic/andes/andes_pmu.c         |  2 +-
 platform/generic/andes/andes_sbi.c         | 12 ++--
 platform/generic/andes/objects.mk          |  2 +-
 platform/generic/andes/sleep.S             |  2 +-
 platform/generic/include/andes/andes.h     | 29 +++++---
 platform/generic/include/andes/andes_pma.h | 20 +++---
 platform/generic/renesas/rzfive/rzfive.c   | 12 ++--
 11 files changed, 86 insertions(+), 84 deletions(-)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index c9b601171a4..6642a6eeaa1 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -37,7 +37,7 @@ config PLATFORM_ANDES_AE350
 
 config PLATFORM_RENESAS_RZFIVE
 	bool "Renesas RZ/Five support"
-	select ANDES45_PMA
+	select ANDES_PMA
 	select ANDES_SBI
 	select ANDES_PMU
 	default n
diff --git a/platform/generic/andes/Kconfig b/platform/generic/andes/Kconfig
index 3665b337343..138710be598 100644
--- a/platform/generic/andes/Kconfig
+++ b/platform/generic/andes/Kconfig
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: BSD-2-Clause
 
-config ANDES45_PMA
+config ANDES_PMA
 	bool "Andes PMA support"
 	default n
 
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 088ec077b58..63c10bc465c 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -18,7 +18,7 @@
 #include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
-#include <andes/andes45.h>
+#include <andes/andes.h>
 
 static struct smu_data smu = { 0 };
 extern void __ae350_enable_coherency_warmboot(void);
@@ -65,8 +65,9 @@ static int ae350_hart_stop(void)
 	smu_set_wakeup_events(&smu, 0x0, hartid);
 	smu_set_command(&smu, DEEP_SLEEP_CMD, hartid);
 
-	rc = smu_set_reset_vector(&smu, (ulong)__ae350_enable_coherency_warmboot,
-			       hartid);
+	rc = smu_set_reset_vector(&smu,
+				  (ulong)__ae350_enable_coherency_warmboot,
+				  hartid);
 	if (rc)
 		goto fail;
 
diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index 2745bc3a998..d5ea594a6e2 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -10,7 +10,8 @@
  *      Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
  */
 
-#include <andes/andes45_pma.h>
+#include <andes/andes.h>
+#include <andes/andes_pma.h>
 #include <libfdt.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
@@ -18,15 +19,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-/* Configuration Registers */
-#define ANDES45_CSR_MMSC_CFG		0xFC2
-#define ANDES45_CSR_MMSC_PPMA_OFFSET	(1 << 30)
-
-#define ANDES45_PMAADDR_0		0xBD0
-
-#define ANDES45_PMACFG_0		0xBC0
-
-static inline unsigned long andes45_pma_read_cfg(unsigned int pma_cfg_off)
+static inline unsigned long andes_pma_read_cfg(unsigned int pma_cfg_off)
 {
 #define switchcase_pma_cfg_read(__pma_cfg_off, __val)		\
 	case __pma_cfg_off:					\
@@ -39,7 +32,7 @@ static inline unsigned long andes45_pma_read_cfg(unsigned int pma_cfg_off)
 	unsigned long ret = 0;
 
 	switch (pma_cfg_off) {
-	switchcase_pma_cfg_read_2(ANDES45_PMACFG_0, ret)
+	switchcase_pma_cfg_read_2(CSR_PMACFG0, ret)
 
 	default:
 		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
@@ -52,7 +45,7 @@ static inline unsigned long andes45_pma_read_cfg(unsigned int pma_cfg_off)
 #undef switchcase_pma_cfg_read
 }
 
-static inline void andes45_pma_write_cfg(unsigned int pma_cfg_off, unsigned long val)
+static inline void andes_pma_write_cfg(unsigned int pma_cfg_off, unsigned long val)
 {
 #define switchcase_pma_cfg_write(__pma_cfg_off, __val)		\
 	case __pma_cfg_off:					\
@@ -63,7 +56,7 @@ static inline void andes45_pma_write_cfg(unsigned int pma_cfg_off, unsigned long
 	switchcase_pma_cfg_write(__pma_cfg_off + 2, __val)
 
 	switch (pma_cfg_off) {
-	switchcase_pma_cfg_write_2(ANDES45_PMACFG_0, val)
+	switchcase_pma_cfg_write_2(CSR_PMACFG0, val)
 
 	default:
 		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
@@ -74,7 +67,7 @@ static inline void andes45_pma_write_cfg(unsigned int pma_cfg_off, unsigned long
 #undef switchcase_pma_cfg_write
 }
 
-static inline void andes45_pma_write_addr(unsigned int pma_addr_off, unsigned long val)
+static inline void andes_pma_write_addr(unsigned int pma_addr_off, unsigned long val)
 {
 #define switchcase_pma_write(__pma_addr_off, __val)		\
 	case __pma_addr_off:					\
@@ -94,7 +87,7 @@ static inline void andes45_pma_write_addr(unsigned int pma_addr_off, unsigned lo
 	switchcase_pma_write_8(__pma_addr_off + 8, __val)
 
 	switch (pma_addr_off) {
-	switchcase_pma_write_16(ANDES45_PMAADDR_0, val)
+	switchcase_pma_write_16(CSR_PMAADDR0, val)
 
 	default:
 		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
@@ -108,7 +101,7 @@ static inline void andes45_pma_write_addr(unsigned int pma_addr_off, unsigned lo
 #undef switchcase_pma_write
 }
 
-static inline unsigned long andes45_pma_read_addr(unsigned int pma_addr_off)
+static inline unsigned long andes_pma_read_addr(unsigned int pma_addr_off)
 {
 #define switchcase_pma_read(__pma_addr_off, __val)		\
 	case __pma_addr_off:					\
@@ -130,7 +123,7 @@ static inline unsigned long andes45_pma_read_addr(unsigned int pma_addr_off)
 	unsigned long ret = 0;
 
 	switch (pma_addr_off) {
-	switchcase_pma_read_16(ANDES45_PMAADDR_0, ret)
+	switchcase_pma_read_16(CSR_PMAADDR0, ret)
 
 	default:
 		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
@@ -146,9 +139,8 @@ static inline unsigned long andes45_pma_read_addr(unsigned int pma_addr_off)
 #undef switchcase_pma_read
 }
 
-static unsigned long
-andes45_pma_setup(const struct andes45_pma_region *pma_region,
-		  unsigned int entry_id)
+static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
+				     unsigned int entry_id)
 {
 	unsigned long size = pma_region->size;
 	unsigned long addr = pma_region->pa;
@@ -168,30 +160,30 @@ andes45_pma_setup(const struct andes45_pma_region *pma_region,
 	if (entry_id > 15)
 		return SBI_EINVAL;
 
-	if (!(pma_region->flags & ANDES45_PMACFG_ETYP_NAPOT))
+	if (!(pma_region->flags & ANDES_PMACFG_ETYP_NAPOT))
 		return SBI_EINVAL;
 
 	if ((addr & (size - 1)) != 0)
 		return SBI_EINVAL;
 
-	pma_cfg_addr = entry_id / 8 ? ANDES45_PMACFG_0 + 2 : ANDES45_PMACFG_0;
-	pmacfg_val = andes45_pma_read_cfg(pma_cfg_addr);
+	pma_cfg_addr = entry_id / 8 ? CSR_PMACFG0 + 2 : CSR_PMACFG0;
+	pmacfg_val = andes_pma_read_cfg(pma_cfg_addr);
 	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
 	*pmaxcfg = 0;
 	*pmaxcfg = pma_region->flags;
 
-	andes45_pma_write_cfg(pma_cfg_addr, pmacfg_val);
+	andes_pma_write_cfg(pma_cfg_addr, pmacfg_val);
 
 	pmaaddr = (addr >> 2) + (size >> 3) - 1;
 
-	andes45_pma_write_addr(ANDES45_PMAADDR_0 + entry_id, pmaaddr);
+	andes_pma_write_addr(CSR_PMAADDR0 + entry_id, pmaaddr);
 
-	return andes45_pma_read_addr(ANDES45_PMAADDR_0 + entry_id) == pmaaddr ?
-			pmaaddr : SBI_EINVAL;
+	return andes_pma_read_addr(CSR_PMAADDR0 + entry_id) == pmaaddr ?
+	       pmaaddr : SBI_EINVAL;
 }
 
-static int andes45_fdt_pma_resv(void *fdt, const struct andes45_pma_region *pma,
-				unsigned int index, int parent)
+static int andes_fdt_pma_resv(void *fdt, const struct andes_pma_region *pma,
+			      unsigned int index, int parent)
 {
 	int na = fdt_address_cells(fdt, 0);
 	int ns = fdt_size_cells(fdt, 0);
@@ -208,15 +200,15 @@ static int andes45_fdt_pma_resv(void *fdt, const struct andes45_pma_region *pma,
 	size_high = (u64)pma->size >> 32;
 	size_low = pma->size;
 
-	if (na > 1 && addr_high)
+	if (na > 1 && addr_high) {
 		sbi_snprintf(name, sizeof(name),
 			     "pma_resv%d@%x,%x", index,
 			     addr_high, addr_low);
-	else
+	} else {
 		sbi_snprintf(name, sizeof(name),
 			     "pma_resv%d@%x", index,
 			     addr_low);
-
+	}
 	subnode = fdt_add_subnode(fdt, parent, name);
 	if (subnode < 0)
 		return subnode;
@@ -244,7 +236,7 @@ static int andes45_fdt_pma_resv(void *fdt, const struct andes45_pma_region *pma,
 		dma_default = true;
 	}
 
-	/* encode the <reg> property value */
+	/* Encode the <reg> property value */
 	val = reg;
 	if (na > 1)
 		*val++ = cpu_to_fdt32(addr_high);
@@ -261,9 +253,9 @@ static int andes45_fdt_pma_resv(void *fdt, const struct andes45_pma_region *pma,
 	return 0;
 }
 
-static int andes45_fdt_reserved_memory_fixup(void *fdt,
-					     const struct andes45_pma_region *pma,
-					     unsigned int entry)
+static int andes_fdt_reserved_memory_fixup(void *fdt,
+					   const struct andes_pma_region *pma,
+					   unsigned int entry)
 {
 	int parent;
 
@@ -292,13 +284,13 @@ static int andes45_fdt_reserved_memory_fixup(void *fdt,
 			return err;
 	}
 
-	return andes45_fdt_pma_resv(fdt, pma, entry, parent);
+	return andes_fdt_pma_resv(fdt, pma, entry, parent);
 }
 
-int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
-			      unsigned int pma_regions_count)
+int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
+			    unsigned int pma_regions_count)
 {
-	unsigned long mmsc = csr_read(ANDES45_CSR_MMSC_CFG);
+	unsigned long mmsc = csr_read(CSR_MMSC_CFG);
 	unsigned int dt_populate_cnt;
 	unsigned int i, j;
 	unsigned long pa;
@@ -308,15 +300,15 @@ int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
 	if (!pma_regions || !pma_regions_count)
 		return 0;
 
-	if (pma_regions_count > ANDES45_MAX_PMA_REGIONS)
+	if (pma_regions_count > ANDES_MAX_PMA_REGIONS)
 		return SBI_EINVAL;
 
-	if ((mmsc & ANDES45_CSR_MMSC_PPMA_OFFSET) == 0)
+	if ((mmsc & MMSC_CFG_PPMA_MASK) == 0)
 		return SBI_ENOTSUPP;
 
 	/* Configure the PMA regions */
 	for (i = 0; i < pma_regions_count; i++) {
-		pa = andes45_pma_setup(&pma_regions[i], i);
+		pa = andes_pma_setup(&pma_regions[i], i);
 		if (pa == SBI_EINVAL)
 			return SBI_EINVAL;
 	}
@@ -341,7 +333,7 @@ int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
 		if (!pma_regions[i].dt_populate)
 			continue;
 
-		ret = andes45_fdt_reserved_memory_fixup(fdt, &pma_regions[i], j++);
+		ret = andes_fdt_reserved_memory_fixup(fdt, &pma_regions[i], j++);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/generic/andes/andes_pmu.c b/platform/generic/andes/andes_pmu.c
index 479fb9a6cd2..a075e0e5b5d 100644
--- a/platform/generic/andes/andes_pmu.c
+++ b/platform/generic/andes/andes_pmu.c
@@ -5,7 +5,7 @@
  * Copyright (C) 2023 Andes Technology Corporation
  */
 
-#include <andes/andes45.h>
+#include <andes/andes.h>
 #include <andes/andes_pmu.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_error.h>
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
index 267c663899d..43bafdc76ac 100644
--- a/platform/generic/andes/andes_sbi.c
+++ b/platform/generic/andes/andes_sbi.c
@@ -3,7 +3,7 @@
  * Copyright (C) 2023 Renesas Electronics Corp.
  *
  */
-#include <andes/andes45.h>
+#include <andes/andes.h>
 #include <andes/andes_sbi.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_error.h>
@@ -13,7 +13,7 @@ enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
 };
 
-static bool andes45_cache_controllable(void)
+static bool andes_cache_controllable(void)
 {
 	return (((csr_read(CSR_MICM_CFG) & MICM_CFG_ISZ_MASK) ||
 		 (csr_read(CSR_MDCM_CFG) & MDCM_CFG_DSZ_MASK)) &&
@@ -22,14 +22,14 @@ static bool andes45_cache_controllable(void)
 		misa_extension('U'));
 }
 
-static bool andes45_iocp_disabled(void)
+static bool andes_iocp_disabled(void)
 {
 	return (csr_read(CSR_MMSC_CFG) & MMSC_IOCP_MASK) ? false : true;
 }
 
-static bool andes45_apply_iocp_sw_workaround(void)
+static bool andes_apply_iocp_sw_workaround(void)
 {
-	return andes45_cache_controllable() & andes45_iocp_disabled();
+	return andes_cache_controllable() & andes_iocp_disabled();
 }
 
 int andes_sbi_vendor_ext_provider(long funcid,
@@ -39,7 +39,7 @@ int andes_sbi_vendor_ext_provider(long funcid,
 {
 	switch (funcid) {
 	case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
-		out->value = andes45_apply_iocp_sw_workaround();
+		out->value = andes_apply_iocp_sw_workaround();
 		break;
 
 	default:
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index 6a8c66c2422..15e618529c4 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -5,6 +5,6 @@
 carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
 platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
 
-platform-objs-$(CONFIG_ANDES45_PMA) += andes/andes45-pma.o
+platform-objs-$(CONFIG_ANDES_PMA) += andes/andes_pma.o
 platform-objs-$(CONFIG_ANDES_SBI) += andes/andes_sbi.o
 platform-objs-$(CONFIG_ANDES_PMU) += andes/andes_pmu.o
diff --git a/platform/generic/andes/sleep.S b/platform/generic/andes/sleep.S
index 59a5597d6d8..361aff3a602 100644
--- a/platform/generic/andes/sleep.S
+++ b/platform/generic/andes/sleep.S
@@ -9,7 +9,7 @@
 
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_asm.h>
-#include <andes/andes45.h>
+#include <andes/andes.h>
 
 	.section .text, "ax", %progbits
 	.align 3
diff --git a/platform/generic/include/andes/andes.h b/platform/generic/include/andes/andes.h
index 01f63d444ea..3403a58b8fc 100644
--- a/platform/generic/include/andes/andes.h
+++ b/platform/generic/include/andes/andes.h
@@ -1,7 +1,10 @@
-#ifndef _RISCV_ANDES45_H
-#define _RISCV_ANDES45_H
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 Andes Technology Corporation
+ */
 
-#define CSR_MARCHID_MICROID 0xfff
+#ifndef _RISCV_ANDES_H
+#define _RISCV_ANDES_H
 
 /* Memory and Miscellaneous Registers */
 #define CSR_MCACHE_CTL		0x7ca
@@ -23,19 +26,25 @@
 #define CSR_MCOUNTERMASK_U	0x7d3
 #define CSR_MCOUNTEROVF		0x7d4
 
+/* PMA Related Registers */
+#define CSR_PMACFG0		0xbc0
+#define CSR_PMAADDR0		0xbd0
+
 #define MICM_CFG_ISZ_OFFSET		6
-#define MICM_CFG_ISZ_MASK		(0x7  << MICM_CFG_ISZ_OFFSET)
+#define MICM_CFG_ISZ_MASK		(7 << MICM_CFG_ISZ_OFFSET)
 
 #define MDCM_CFG_DSZ_OFFSET		6
-#define MDCM_CFG_DSZ_MASK		(0x7  << MDCM_CFG_DSZ_OFFSET)
+#define MDCM_CFG_DSZ_MASK		(7 << MDCM_CFG_DSZ_OFFSET)
 
 #define MMSC_CFG_CCTLCSR_OFFSET		16
-#define MMSC_CFG_CCTLCSR_MASK		(0x1 << MMSC_CFG_CCTLCSR_OFFSET)
-#define MMSC_IOCP_OFFSET			47
-#define MMSC_IOCP_MASK			(0x1ULL << MMSC_IOCP_OFFSET)
+#define MMSC_CFG_CCTLCSR_MASK		(1 << MMSC_CFG_CCTLCSR_OFFSET)
+#define MMSC_CFG_PPMA_OFFSET		30
+#define MMSC_CFG_PPMA_MASK		(1 << MMSC_CFG_PPMA_OFFSET)
+#define MMSC_IOCP_OFFSET		47
+#define MMSC_IOCP_MASK			(1ULL << MMSC_IOCP_OFFSET)
 
 #define MCACHE_CTL_CCTL_SUEN_OFFSET	8
-#define MCACHE_CTL_CCTL_SUEN_MASK	(0x1 << MCACHE_CTL_CCTL_SUEN_OFFSET)
+#define MCACHE_CTL_CCTL_SUEN_MASK	(1 << MCACHE_CTL_CCTL_SUEN_OFFSET)
 
 /* Performance monitor */
 #define MMSC_CFG_PMNDS_MASK		(1 << 15)
@@ -58,4 +67,4 @@
 
 #endif /* __ASSEMBLER__ */
 
-#endif /* _RISCV_ANDES45_H */
+#endif /* _RISCV_ANDES_H */
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index 37ec77cf670..bbc09cdd774 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -3,21 +3,21 @@
  * Copyright (C) 2023 Renesas Electronics Corp.
  */
 
-#ifndef _ANDES45_PMA_H_
-#define _ANDES45_PMA_H_
+#ifndef _ANDES_PMA_H_
+#define _ANDES_PMA_H_
 
 #include <sbi/sbi_types.h>
 
-#define ANDES45_MAX_PMA_REGIONS			16
+#define ANDES_MAX_PMA_REGIONS			16
 
 /* Naturally aligned power of 2 region */
-#define ANDES45_PMACFG_ETYP_NAPOT		3
+#define ANDES_PMACFG_ETYP_NAPOT			3
 
 /* Memory, Non-cacheable, Bufferable */
-#define ANDES45_PMACFG_MTYP_MEM_NON_CACHE_BUF	(3 << 2)
+#define ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF	(3 << 2)
 
 /**
- * struct andes45_pma_region - Describes PMA regions
+ * struct andes_pma_region - Describes PMA regions
  *
  * @pa: Address to be configured in the PMA
  * @size: Size of the region
@@ -32,7 +32,7 @@
  *              be set in the DT node. Note Linux expects single node
  *              with this property set.
  */
-struct andes45_pma_region {
+struct andes_pma_region {
 	unsigned long pa;
 	unsigned long size;
 	u8 flags:7;
@@ -42,7 +42,7 @@ struct andes45_pma_region {
 	bool dma_default;
 };
 
-int andes45_pma_setup_regions(const struct andes45_pma_region *pma_regions,
-			      unsigned int pma_regions_count);
+int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
+			    unsigned int pma_regions_count);
 
-#endif /* _ANDES45_PMA_H_ */
+#endif /* _ANDES_PMA_H_ */
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index b5b5e6516a9..515bcd76473 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -4,19 +4,19 @@
  *
  */
 
-#include <andes/andes45_pma.h>
+#include <andes/andes_pma.h>
 #include <andes/andes_pmu.h>
 #include <andes/andes_sbi.h>
 #include <platform_override.h>
 #include <sbi/sbi_domain.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-static const struct andes45_pma_region renesas_rzfive_pma_regions[] = {
+static const struct andes_pma_region renesas_rzfive_pma_regions[] = {
 	{
 		.pa = 0x58000000,
 		.size = 0x8000000,
-		.flags = ANDES45_PMACFG_ETYP_NAPOT |
-			 ANDES45_PMACFG_MTYP_MEM_NON_CACHE_BUF,
+		.flags = ANDES_PMACFG_ETYP_NAPOT |
+			 ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF,
 		.dt_populate = true,
 		.shared_dma = true,
 		.no_map = true,
@@ -26,8 +26,8 @@ static const struct andes45_pma_region renesas_rzfive_pma_regions[] = {
 
 static int renesas_rzfive_final_init(bool cold_boot, const struct fdt_match *match)
 {
-	return andes45_pma_setup_regions(renesas_rzfive_pma_regions,
-					 array_size(renesas_rzfive_pma_regions));
+	return andes_pma_setup_regions(renesas_rzfive_pma_regions,
+				       array_size(renesas_rzfive_pma_regions));
 }
 
 static int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)

From 33e21c9476e225064464ad045ce11cf58c2c3204 Mon Sep 17 00:00:00 2001
From: Yangyu Chen <cyy@cyyself.name>
Date: Sun, 21 Apr 2024 23:52:08 +0800
Subject: [PATCH 1564/1765] platform: generic: thead: separate T-Head PMU
 Errata

As Guo Ren said from the kernel mailing list [1], future T-Head CPUs,
including the newer versions of T-Head C908, will feature standard
Sscofpmf extension. For these CPUs, T-Head's implementation of PMU
Overflow Interrupts may not needed anymore. In this case, we shouldn't
apply T-Head PMU for all T-Head CPUs. Thus, this patch separated T-Head PMU
errata.

[1] https://lore.kernel.org/linux-riscv/Zh9sUUUT09LZb0MO@gmail.com/

Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/include/thead/c9xx_errata.h | 1 +
 platform/generic/thead/thead-generic.c       | 8 ++++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/platform/generic/include/thead/c9xx_errata.h b/platform/generic/include/thead/c9xx_errata.h
index bf979384048..40c1587bcf7 100644
--- a/platform/generic/include/thead/c9xx_errata.h
+++ b/platform/generic/include/thead/c9xx_errata.h
@@ -7,6 +7,7 @@
  * stale entrie avoid incorrect memory access.
  */
 #define THEAD_QUIRK_ERRATA_TLB_FLUSH		BIT(0)
+#define THEAD_QUIRK_ERRATA_THEAD_PMU		BIT(1)
 
 void thead_register_tlb_flush_trap_handler(void);
 
diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index 72f4aaacce7..da55e054c57 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -33,12 +33,16 @@ static int thead_generic_early_init(bool cold_boot,
 static int thead_generic_extensions_init(const struct fdt_match *match,
 					 struct sbi_hart_features *hfeatures)
 {
-	thead_c9xx_register_pmu_device();
+	struct thead_generic_quirks *quirks = (void *)match->data;
+
+	if (quirks->errata & THEAD_QUIRK_ERRATA_THEAD_PMU)
+		thead_c9xx_register_pmu_device();
+
 	return 0;
 }
 
 static struct thead_generic_quirks thead_th1520_quirks = {
-	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH,
+	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH | THEAD_QUIRK_ERRATA_THEAD_PMU,
 };
 
 static const struct fdt_match thead_generic_match[] = {

From 019a8e69a1dc0c0f011fabd0372e1ba80e40dd7c Mon Sep 17 00:00:00 2001
From: Yangyu Chen <cyy@cyyself.name>
Date: Sun, 21 Apr 2024 23:52:09 +0800
Subject: [PATCH 1565/1765] platform: generic: thead: add Canaan Kendryte K230

Canaan Kendryte K230 SoC has T-Head C908 cores inside. The dt-binding has
been merged into the linux kernel [1]. However, it has early version of
C908 core which does not have Sscofpmf and need to use T-Head PMU
extension. Thus, we add a K230 compatible string to thead_generic_match
and set quirk for T-Head PMU.

[1] https://lore.kernel.org/linux-riscv/tencent_4D85743622F39109466913393EE2F6C5980A@qq.com/

Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/thead/thead-generic.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index da55e054c57..3b59a0d21c0 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -45,8 +45,13 @@ static struct thead_generic_quirks thead_th1520_quirks = {
 	.errata = THEAD_QUIRK_ERRATA_TLB_FLUSH | THEAD_QUIRK_ERRATA_THEAD_PMU,
 };
 
+static struct thead_generic_quirks canaan_k230_quirks = {
+	.errata = THEAD_QUIRK_ERRATA_THEAD_PMU,
+};
+
 static const struct fdt_match thead_generic_match[] = {
 	{ .compatible = "thead,th1520", .data = &thead_th1520_quirks },
+	{ .compatible = "canaan,kendryte-k230", .data = &canaan_k230_quirks },
 	{ },
 };
 

From 4953bd721a917768ce11a35961ff74f75d83afe7 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:33 +0800
Subject: [PATCH 1566/1765] lib: sbi: fix hart_shmem_base

When only phys_hi is equal to SBI_DBTR_SHMEM_INVALID_ADDR, it may be
a legal address. The old code would modify the legal address.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_dbtr.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 7142fedb5a8..5b072853fac 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -84,21 +84,18 @@ static inline void sbi_dbtr_disable_shmem(void)
 
 static inline void *hart_shmem_base(void)
 {
-	struct sbi_dbtr_shmem* shmem;
 	unsigned long phys_hi, phys_lo;
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
 	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
-
 	if (!hs)
 		return NULL;
 
-	shmem = &hs->shmem;
+	phys_hi = hs->shmem.phys_hi;
+	phys_lo = hs->shmem.phys_lo;
 
-	phys_hi = (shmem->phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR
-		   ? shmem->phys_hi : 0);
-	phys_lo = (shmem->phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR
-		   ? 0 : shmem->phys_lo);
+	if (phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR && phys_hi == phys_lo)
+		return NULL;
 
 	return ((void *)(unsigned long)DBTR_SHMEM_MAKE_PHYS(phys_hi, phys_lo));
 }

From 744f4956534d5fba2f42c1361139099d574347ff Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:34 +0800
Subject: [PATCH 1567/1765] lib: sbi: Removal unnecessary check
 dbtr_thishart_state_ptr

After getting hart_shmem_base, dbtr_thishart_state_ptr cannot be
empty. So remove check code.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_dbtr.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 5b072853fac..3cc1ef86baa 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -684,8 +684,6 @@ int sbi_dbtr_update_trig(unsigned long smode,
 
 	shmem_base = hart_shmem_base();
 	hs = dbtr_thishart_state_ptr();
-	if (!hs)
-		return SBI_ERR_FAILED;
 
 	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
 		trig = INDEX_TO_TRIGGER(idx);

From 7f54527029d0b6c52dc22dade9e9de37831b1ef0 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:35 +0800
Subject: [PATCH 1568/1765] lib: sbi: fix DBTR_SHMEM_MAKE_PHYS for RV64

Obtaining a 64-bit address under rv64 does not require combining
32-bit registers

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_dbtr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 3cc1ef86baa..94fd049004a 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -48,7 +48,7 @@ static unsigned long hart_state_ptr_offset;
 	     _idx++, _entry = ((_etype *)_base + _idx))
 
 #if __riscv_xlen == 64
-#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
+#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (_p_lo)
 #elif __riscv_xlen == 32
 #define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
 #else

From e065c3cd5d31314e50f4dca21f181b6a93fe0d45 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:36 +0800
Subject: [PATCH 1569/1765] lib: sbi: Fixed memory permission check in
 sbi_dbtr_setup_shmem

The previous code detected shmem_phys_hi and shmem_phys_lo as two
addresses. fix this bug

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_dbtr.c | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 94fd049004a..a95f087f101 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -293,17 +293,11 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 	if (shmem_phys_lo & SBI_DBTR_SHMEM_ALIGN_MASK)
 		return SBI_ERR_INVALID_PARAM;
 
-	if (dom && !sbi_domain_check_addr(dom, shmem_phys_lo, smode,
-					  SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
+	if (dom && !sbi_domain_check_addr(dom,
+		  DBTR_SHMEM_MAKE_PHYS(shmem_phys_hi, shmem_phys_lo), smode,
+		  SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
 		return SBI_ERR_INVALID_ADDRESS;
 
-	if (shmem_phys_hi != SBI_DBTR_SHMEM_INVALID_ADDR) {
-		if (dom &&
-		    !sbi_domain_check_addr(dom, shmem_phys_hi, smode,
-					   SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
-			return SBI_ERR_INVALID_ADDRESS;
-	}
-
 	hart_state = dbtr_thishart_state_ptr();
 	if (!hart_state)
 		return SBI_ERR_FAILED;

From 7b37da3cb03e7f75e5834947016aab592498fc9a Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:37 +0800
Subject: [PATCH 1570/1765] lib: sbi: fix return type of
 sbi_dbtr_shmem_disabled

Modify the return value of the sbi_dbtr_shmem_disabled function to
bool to make the semantics clearer.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_dbtr.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index a95f087f101..6950378bd34 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -55,18 +55,18 @@ static unsigned long hart_state_ptr_offset;
 #error "Undefined XLEN"
 #endif
 
-static inline int sbi_dbtr_shmem_disabled(void)
+static inline bool sbi_dbtr_shmem_disabled(void)
 {
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
 	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
 
 	if (!hs)
-		return 1;
+		return true;
 
 	return (hs->shmem.phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR &&
 		hs->shmem.phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR
-		? 1 : 0);
+		? true : false);
 }
 
 static inline void sbi_dbtr_disable_shmem(void)

From 1cb792d606d99fb9574160da1815d6b8b4e366ac Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Fri, 3 May 2024 21:53:38 +0800
Subject: [PATCH 1571/1765] lib: sbi: simplify inline function in sbi_dtbr.c

The inline function can simplify the code by setting some call
restrictions. This ensures logical smoothness

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_dbtr.c | 78 +++++++++++++++++++---------------------------
 1 file changed, 32 insertions(+), 46 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 6950378bd34..9c92af6a59f 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -55,49 +55,29 @@ static unsigned long hart_state_ptr_offset;
 #error "Undefined XLEN"
 #endif
 
-static inline bool sbi_dbtr_shmem_disabled(void)
+/* must call with hs != NULL */
+static inline bool sbi_dbtr_shmem_disabled(
+	struct sbi_dbtr_hart_triggers_state *hs)
 {
-	struct sbi_dbtr_hart_triggers_state *hs = NULL;
-
-	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
-
-	if (!hs)
-		return true;
-
 	return (hs->shmem.phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR &&
 		hs->shmem.phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR
 		? true : false);
 }
 
-static inline void sbi_dbtr_disable_shmem(void)
+/* must call with hs != NULL */
+static inline void sbi_dbtr_disable_shmem(
+	struct sbi_dbtr_hart_triggers_state *hs)
 {
-	struct sbi_dbtr_hart_triggers_state *hs = NULL;
-
-	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
-
-	if (!hs)
-		return;
-
 	hs->shmem.phys_lo = SBI_DBTR_SHMEM_INVALID_ADDR;
 	hs->shmem.phys_hi = SBI_DBTR_SHMEM_INVALID_ADDR;
 }
 
-static inline void *hart_shmem_base(void)
+/* must call with hs which is not disabled */
+static inline void *hart_shmem_base(
+	struct sbi_dbtr_hart_triggers_state *hs)
 {
-	unsigned long phys_hi, phys_lo;
-	struct sbi_dbtr_hart_triggers_state *hs = NULL;
-
-	hs = dbtr_get_hart_state_ptr(sbi_scratch_thishart_ptr());
-	if (!hs)
-		return NULL;
-
-	phys_hi = hs->shmem.phys_hi;
-	phys_lo = hs->shmem.phys_lo;
-
-	if (phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR && phys_hi == phys_lo)
-		return NULL;
-
-	return ((void *)(unsigned long)DBTR_SHMEM_MAKE_PHYS(phys_hi, phys_lo));
+	return ((void *)(unsigned long)DBTR_SHMEM_MAKE_PHYS(
+			hs->shmem.phys_hi, hs->shmem.phys_lo));
 }
 
 static void sbi_trigger_init(struct sbi_dbtr_trigger *trig,
@@ -186,7 +166,7 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 	}
 
 	/* disable the shared memory */
-	sbi_dbtr_disable_shmem();
+	sbi_dbtr_disable_shmem(hart_state);
 
 	/* Skip probing triggers if already probed */
 	if (hart_state->probed)
@@ -278,15 +258,19 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 		return SBI_ERR_DENIED;
 	}
 
+	hart_state = dbtr_thishart_state_ptr();
+	if (!hart_state)
+		return SBI_ERR_FAILED;
+
 	/* call is to disable shared memory */
 	if (shmem_phys_lo == SBI_DBTR_SHMEM_INVALID_ADDR
 	    && shmem_phys_hi == SBI_DBTR_SHMEM_INVALID_ADDR) {
-		sbi_dbtr_disable_shmem();
+		sbi_dbtr_disable_shmem(hart_state);
 		return SBI_SUCCESS;
 	}
 
 	/* the shared memory must be disabled on this hart */
-	if (!sbi_dbtr_shmem_disabled())
+	if (!sbi_dbtr_shmem_disabled(hart_state))
 		return SBI_ERR_ALREADY_AVAILABLE;
 
 	/* lower physical address must be XLEN/8 bytes aligned */
@@ -298,10 +282,6 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 		  SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
 		return SBI_ERR_INVALID_ADDRESS;
 
-	hart_state = dbtr_thishart_state_ptr();
-	if (!hart_state)
-		return SBI_ERR_FAILED;
-
 	hart_state->shmem.phys_lo = shmem_phys_lo;
 	hart_state->shmem.phys_hi = shmem_phys_hi;
 
@@ -531,10 +511,10 @@ int sbi_dbtr_read_trig(unsigned long smode,
 	    trig_idx_base + trig_count >= hs->total_trigs)
 		return SBI_ERR_INVALID_PARAM;
 
-	if (sbi_dbtr_shmem_disabled())
+	if (sbi_dbtr_shmem_disabled(hs))
 		return SBI_ERR_NO_SHMEM;
 
-	shmem_base = hart_shmem_base();
+	shmem_base = hart_shmem_base(hs);
 
 	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
 		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
@@ -561,11 +541,14 @@ int sbi_dbtr_install_trig(unsigned long smode,
 	struct sbi_dbtr_trigger *trig;
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
-	if (sbi_dbtr_shmem_disabled())
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	if (sbi_dbtr_shmem_disabled(hs))
 		return SBI_ERR_NO_SHMEM;
 
-	shmem_base = hart_shmem_base();
-	hs = dbtr_thishart_state_ptr();
+	shmem_base = hart_shmem_base(hs);
 
 	/* Check requested triggers configuration */
 	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
@@ -673,11 +656,14 @@ int sbi_dbtr_update_trig(unsigned long smode,
 	void *shmem_base = NULL;
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
-	if (sbi_dbtr_shmem_disabled())
+	hs = dbtr_thishart_state_ptr();
+	if (!hs)
+		return SBI_ERR_FAILED;
+
+	if (sbi_dbtr_shmem_disabled(hs))
 		return SBI_ERR_NO_SHMEM;
 
-	shmem_base = hart_shmem_base();
-	hs = dbtr_thishart_state_ptr();
+	shmem_base = hart_shmem_base(hs);
 
 	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
 		trig = INDEX_TO_TRIGGER(idx);

From ea9cf6aa28ca308f6a2561da5b570ed9f6148978 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Sun, 28 Apr 2024 09:24:10 +0800
Subject: [PATCH 1572/1765] utils/reset: Add SG2042 hwmon MCU support.

SG2042 uses an onboard MCU to provide reset function.
Add reset driver to support this onboard MCU.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/Kconfig                      |   4 +
 lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c | 114 +++++++++++++++++++
 lib/utils/reset/objects.mk                   |   3 +
 platform/generic/configs/defconfig           |   1 +
 4 files changed, 122 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c

diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index b26260db167..6c077fe7a2c 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -24,6 +24,10 @@ config FDT_RESET_HTIF
 	select SYS_HTIF
 	default n
 
+config FDT_RESET_SG2042_HWMON_MCU
+	bool "Sophgo SG2042 hwmon MCU FDT reset driver"
+	default n
+
 config FDT_RESET_SUNXI_WDT
 	bool "Sunxi WDT FDT reset driver"
 	default n
diff --git a/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
new file mode 100644
index 00000000000..51bd74ab2e1
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
@@ -0,0 +1,114 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Lin Chunzhi <chunzhi.lin@sophgo.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/i2c/fdt_i2c.h>
+
+#define MANGO_BOARD_TYPE_MASK		0x80
+
+#define REG_BOARD_TYPE			0x00
+#define REG_CMD				0x03
+
+#define CMD_POWEROFF			0x02
+#define CMD_RESET			0x03
+#define CMD_REBOOT			0x07
+
+static struct i2c_adapter *mcu_adapter = NULL;
+static uint32_t mcu_reg = 0;
+
+static int sg2042_mcu_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		return 1;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return 255;
+	}
+
+	return 0;
+}
+
+static void sg2042_mcu_reset(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		i2c_adapter_reg_write(mcu_adapter, mcu_reg,
+				      REG_CMD, CMD_POWEROFF);
+		break;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		i2c_adapter_reg_write(mcu_adapter, mcu_reg,
+				      REG_CMD, CMD_REBOOT);
+		break;
+	}
+}
+
+static struct sbi_system_reset_device sg2042_mcu_reset_device = {
+	.name = "sg2042-mcu-reset",
+	.system_reset_check = sg2042_mcu_reset_check,
+	.system_reset = sg2042_mcu_reset
+};
+
+static int sg2042_mcu_reset_check_board(struct i2c_adapter *adap, uint32_t reg)
+{
+	static uint8_t val;
+	int ret;
+
+	/* check board type */
+	ret = i2c_adapter_reg_read(adap, reg, REG_BOARD_TYPE, &val);
+	if (ret)
+		return ret;
+
+	if (!(val & MANGO_BOARD_TYPE_MASK))
+		return SBI_ENODEV;
+
+	return 0;
+}
+
+static int sg2042_mcu_reset_init(void *fdt, int nodeoff,
+				 const struct fdt_match *match)
+{
+	int ret, i2c_bus;
+	uint64_t addr;
+
+	ret = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL);
+	if (ret)
+		return ret;
+
+	mcu_reg = addr;
+
+	i2c_bus = fdt_parent_offset(fdt, nodeoff);
+	if (i2c_bus < 0)
+		return i2c_bus;
+
+	ret = fdt_i2c_adapter_get(fdt, i2c_bus, &mcu_adapter);
+	if (ret)
+		return ret;
+
+	ret = sg2042_mcu_reset_check_board(mcu_adapter, mcu_reg);
+
+	sbi_system_reset_add_device(&sg2042_mcu_reset_device);
+
+	return 0;
+}
+
+static const struct fdt_match sg2042_mcu_reset_match[] = {
+	{ .compatible = "sophgo,sg2042-hwmon-mcu", .data = (void *)true},
+	{ },
+};
+
+struct fdt_reset fdt_reset_sg2042_mcu = {
+	.match_table = sg2042_mcu_reset_match,
+	.init = sg2042_mcu_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index b5222347b21..44944ca8279 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -20,6 +20,9 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_GPIO) += reset/fdt_reset_gpio.o
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_HTIF) += fdt_reset_htif
 libsbiutils-objs-$(CONFIG_FDT_RESET_HTIF) += reset/fdt_reset_htif.o
 
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SG2042_HWMON_MCU) += fdt_reset_sg2042_mcu
+libsbiutils-objs-$(CONFIG_FDT_RESET_SG2042_HWMON_MCU) += reset/fdt_reset_sg2042_hwmon_mcu.o
+
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SUNXI_WDT) += fdt_reset_sunxi_wdt
 libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 1ce6a1204cf..079bc4fef82 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -27,6 +27,7 @@ CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
+CONFIG_FDT_RESET_SG2042_HWMON_MCU=y
 CONFIG_FDT_RESET_SYSCON=y
 CONFIG_FDT_SERIAL=y
 CONFIG_FDT_SERIAL_CADENCE=y

From 533067d182af540ff13e6e03abd0c0f1ab844178 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 8 May 2024 17:02:39 +0530
Subject: [PATCH 1573/1765] lib: sbi: Put event after use in sbi_sse_exit()
 loop

Currently, the sbi_sse_exit() gets event in a loop but does not put
it back after use. This results in global events remaining locked
causing hangs on sub-sequent calls to sse_event_get() for global
events.

Fixes: c8cdf01d8f3a ("lib: sbi: Add support for Supervisor Software Events extension")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_sse.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 18dfdb6dc95..0cd6ba6b9e2 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -1121,13 +1121,18 @@ void sbi_sse_exit(struct sbi_scratch *scratch)
 
 	for (i = 0; i < EVENT_COUNT; i++) {
 		e = sse_event_get(supported_events[i]);
-
-		if (!e || e->attrs.hartid != current_hartid())
+		if (!e)
 			continue;
 
+		if (e->attrs.hartid != current_hartid())
+			goto skip;
+
 		if (sse_event_state(e) > SBI_SSE_STATE_REGISTERED) {
 			sbi_printf("Event %d in invalid state at exit", i);
 			sse_event_set_state(e, SBI_SSE_STATE_UNUSED);
 		}
+
+skip:
+		sse_event_put(e);
 	}
 }

From 2bed4c1c57a7775bcef534934cab5c83b45b954f Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Tue, 14 May 2024 12:53:40 +0800
Subject: [PATCH 1574/1765] platform: generic: thead: add Sophgo CV18XX/SG200X
 series

The Sophgo CV18XX/SG200X series SoCs have a standard C906
core. Add support for it.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/thead/thead-generic.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index 3b59a0d21c0..c82e0c1b414 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -49,7 +49,15 @@ static struct thead_generic_quirks canaan_k230_quirks = {
 	.errata = THEAD_QUIRK_ERRATA_THEAD_PMU,
 };
 
+static struct thead_generic_quirks sophgo_cv1800_quirks = {
+	.errata = THEAD_QUIRK_ERRATA_THEAD_PMU,
+};
+
 static const struct fdt_match thead_generic_match[] = {
+	{ .compatible = "sophgo,cv1800b", .data = &sophgo_cv1800_quirks },
+	{ .compatible = "sophgo,cv1812h", .data = &sophgo_cv1800_quirks },
+	{ .compatible = "sophgo,sg2000", .data = &sophgo_cv1800_quirks },
+	{ .compatible = "sophgo,sg2002", .data = &sophgo_cv1800_quirks },
 	{ .compatible = "thead,th1520", .data = &thead_th1520_quirks },
 	{ .compatible = "canaan,kendryte-k230", .data = &canaan_k230_quirks },
 	{ },

From e3a30a2c918aae79d4cc403d474c3d2872a9063c Mon Sep 17 00:00:00 2001
From: Cheng Yang <yangcheng.work@foxmail.com>
Date: Wed, 15 May 2024 14:15:14 +0800
Subject: [PATCH 1575/1765] lib: utils/irqchip: Check before initializing imsic

The current mlevel imsic check is only for the platform, which
may cause hart without imsic in the platform to trigger an
illegal instruction exception when initializing imsic. For
example, the platform contains a management hart that only
supports wired interrupts.

This patch will check if each hart supports Smaia extension
before doing imsic initialization to avoid triggering illegal
instruction exceptions.

Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/irqchip/imsic.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index f2a35c6302b..02e3a334912 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_csr_detect.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_irqchip.h>
@@ -222,6 +223,8 @@ static void imsic_local_eix_update(unsigned long base_id,
 
 void imsic_local_irqchip_init(void)
 {
+	struct sbi_trap_info trap = { 0 };
+
 	/*
 	 * This function is expected to be called from:
 	 * 1) nascent_init() platform callback which is called
@@ -231,6 +234,11 @@ void imsic_local_irqchip_init(void)
 	 *    in boot-up path.
 	 */
 
+	/* If Smaia not available then do nothing */
+	csr_read_allowed(CSR_MTOPI, (ulong)&trap);
+	if (trap.cause)
+		return;
+
 	/* Setup threshold to allow all enabled interrupts */
 	imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
 

From 96f0a2e3ea6dc8c337ad1b927d6bda8f5ac151be Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 15 May 2024 09:55:50 +0530
Subject: [PATCH 1576/1765] firmware: Bring back FW_TEXT_START as an optional
 parameter
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Bring back FW_TEXT_START as an optional parameter to allow users
explicitly specify compile time address for loading debug symbols.
When not specified, the FW_TEXT_START is assumed to be 0.

Fixes: d4d2582eef7a ("firmware: remove FW_TEXT_START")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Clément Léger <cleger@rivosinc.com>
---
 docs/firmware/fw.md            | 3 +++
 firmware/fw_base.S             | 4 +++-
 firmware/fw_base.ldS           | 3 ++-
 firmware/fw_payload.elf.ldS    | 2 +-
 firmware/objects.mk            | 6 ++++++
 firmware/payloads/test.elf.ldS | 2 +-
 6 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/docs/firmware/fw.md b/docs/firmware/fw.md
index 3cc0262afa9..d2980967ede 100644
--- a/docs/firmware/fw.md
+++ b/docs/firmware/fw.md
@@ -61,6 +61,9 @@ Firmware Configuration and Compilation
 All firmware types support the following common compile time configuration
 parameters:
 
+* **FW_TEXT_START** - Defines the compile time address of the OpenSBI
+  firmware. This configuration parameter is optional and assumed to be
+  `0` if not specified.
 * **FW_FDT_PATH** - Path to an external flattened device tree binary file to
   be embedded in the *.rodata* section of the final firmware. If this option
   is not provided then the firmware will expect the FDT to be passed as an
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 9f995a2283b..b950c0b836c 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -53,7 +53,9 @@ _try_lottery:
 	bnez	a6, _wait_for_boot_hart
 
 	/* relocate the global table content */
-	lla	t2, _fw_start
+	li	t0, FW_TEXT_START	/* link start */
+	lla	t1, _fw_start		/* load start */
+	sub	t2, t1, t0		/* load offset */
 	lla	t0, __rel_dyn_start
 	lla	t1, __rel_dyn_end
 	beq	t0, t1, _relocate_done
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index 9d11db56df7..fb47984878f 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -7,7 +7,8 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-	/* Don't add any section before _fw_start */
+	. = FW_TEXT_START;
+	/* Don't add any section between FW_TEXT_START and _fw_start */
 	PROVIDE(_fw_start = .);
 
 	. = ALIGN(0x1000); /* Need this to create proper sections */
diff --git a/firmware/fw_payload.elf.ldS b/firmware/fw_payload.elf.ldS
index 94e1ac69591..f1a544b80dc 100644
--- a/firmware/fw_payload.elf.ldS
+++ b/firmware/fw_payload.elf.ldS
@@ -15,7 +15,7 @@ SECTIONS
 	#include "fw_base.ldS"
 
 #ifdef FW_PAYLOAD_OFFSET
-	. = FW_PAYLOAD_OFFSET;
+	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
 #else
 	. = ALIGN(FW_PAYLOAD_ALIGN);
 #endif
diff --git a/firmware/objects.mk b/firmware/objects.mk
index a51ff657ea4..a90485d004d 100644
--- a/firmware/objects.mk
+++ b/firmware/objects.mk
@@ -13,6 +13,12 @@ firmware-cflags-y +=
 firmware-asflags-y +=
 firmware-ldflags-y +=
 
+ifdef FW_TEXT_START
+firmware-genflags-y += -DFW_TEXT_START=$(FW_TEXT_START)
+else
+firmware-genflags-y += -DFW_TEXT_START=0x0
+endif
+
 ifdef FW_FDT_PATH
 firmware-genflags-y += -DFW_FDT_PATH=\"$(FW_FDT_PATH)\"
 ifdef FW_FDT_PADDING
diff --git a/firmware/payloads/test.elf.ldS b/firmware/payloads/test.elf.ldS
index 08e008f4e33..2328a1b782d 100644
--- a/firmware/payloads/test.elf.ldS
+++ b/firmware/payloads/test.elf.ldS
@@ -13,7 +13,7 @@ ENTRY(_start)
 SECTIONS
 {
 #ifdef FW_PAYLOAD_OFFSET
-	. = FW_PAYLOAD_OFFSET;
+	. = FW_TEXT_START + FW_PAYLOAD_OFFSET;
 #else
 	. = ALIGN(FW_PAYLOAD_ALIGN);
 #endif

From 858754a54470ad0dbbced7838b17054ccd3b96de Mon Sep 17 00:00:00 2001
From: Cyan Yang <cyan.yang@sifive.com>
Date: Thu, 16 May 2024 16:32:43 +0800
Subject: [PATCH 1577/1765] lib: utils/irqchip: Add sanity checks in
 imsic_get_data() and imsic_get_target_file()

Add extra sanity checks to prevent the caller getting the invalid result from
imsic_get_data() or imsic_get_target_file() when imsic is not initialized
correctly.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/irqchip/imsic.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 02e3a334912..7d6993eabe6 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -123,6 +123,9 @@ struct imsic_data *imsic_get_data(u32 hartid)
 {
 	struct sbi_scratch *scratch;
 
+	if (!imsic_ptr_offset)
+		return NULL;
+
 	scratch = sbi_hartid_to_scratch(hartid);
 	if (!scratch)
 		return NULL;
@@ -134,6 +137,9 @@ int imsic_get_target_file(u32 hartid)
 {
 	struct sbi_scratch *scratch;
 
+	if (!imsic_file_offset)
+		return SBI_ENOENT;
+
 	scratch = sbi_hartid_to_scratch(hartid);
 	if (!scratch)
 		return SBI_ENOENT;

From ae5ef1848d8404e1acdaed5dc460dd1bf2d33140 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Thu, 16 May 2024 14:30:28 +0200
Subject: [PATCH 1578/1765] lib: sbi: sse: handle missing writable attributes
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The spec states that a6, a7, flags and sepc are writable but the
implementation was not allowing that. Add support for these 4 writable
attributes.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 66 +++++++++++++++++++++++++++++++++--------------
 1 file changed, 47 insertions(+), 19 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 0cd6ba6b9e2..e39963f13b7 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -335,30 +335,49 @@ static int sse_event_set_hart_id_check(struct sbi_sse_event *e,
 static int sse_event_set_attr_check(struct sbi_sse_event *e, uint32_t attr_id,
 				    unsigned long val)
 {
-	int ret = SBI_OK;
-
 	switch (attr_id) {
 	case SBI_SSE_ATTR_CONFIG:
+		if (sse_event_state(e) >= SBI_SSE_STATE_ENABLED)
+			return SBI_EINVALID_STATE;
+
 		if (val & ~SBI_SSE_ATTR_CONFIG_ONESHOT)
-			ret = SBI_EINVAL;
-		break;
+			return SBI_EINVAL;
+
+		return SBI_OK;
 	case SBI_SSE_ATTR_PRIO:
+		if (sse_event_state(e) >= SBI_SSE_STATE_ENABLED)
+			return SBI_EINVALID_STATE;
+
 #if __riscv_xlen > 32
-		if (val != (uint32_t)val) {
-			ret = SBI_EINVAL;
-			break;
-		}
+		if (val != (uint32_t)val)
+			return SBI_EINVAL;
 #endif
-		break;
+		return SBI_OK;
 	case SBI_SSE_ATTR_PREFERRED_HART:
-		ret = sse_event_set_hart_id_check(e, val);
-		break;
+		if (sse_event_state(e) >= SBI_SSE_STATE_ENABLED)
+			return SBI_EINVALID_STATE;
+
+		return sse_event_set_hart_id_check(e, val);
+	case SBI_SSE_ATTR_INTERRUPTED_FLAGS:
+		if (val & ~(SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPP |
+			    SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPIE |
+			    SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPV |
+			    SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP))
+			return SBI_EINVAL;
+		__attribute__((__fallthrough__));
+	case SBI_SSE_ATTR_INTERRUPTED_SEPC:
+	case SBI_SSE_ATTR_INTERRUPTED_A6:
+	case SBI_SSE_ATTR_INTERRUPTED_A7:
+		if (sse_event_state(e) != SBI_SSE_STATE_RUNNING)
+			return SBI_EINVALID_STATE;
+
+		if (current_hartid() != e->attrs.hartid)
+			return SBI_EINVAL;
+
+		return SBI_OK;
 	default:
-		ret = SBI_EBAD_RANGE;
-		break;
+		return SBI_EBAD_RANGE;
 	}
-
-	return ret;
 }
 
 static void sse_event_set_attr(struct sbi_sse_event *e, uint32_t attr_id,
@@ -375,6 +394,19 @@ static void sse_event_set_attr(struct sbi_sse_event *e, uint32_t attr_id,
 		e->attrs.hartid = val;
 		sse_event_invoke_cb(e, set_hartid_cb, val);
 		break;
+
+	case SBI_SSE_ATTR_INTERRUPTED_SEPC:
+		e->attrs.interrupted.sepc = val;
+		break;
+	case SBI_SSE_ATTR_INTERRUPTED_FLAGS:
+		e->attrs.interrupted.flags = val;
+		break;
+	case SBI_SSE_ATTR_INTERRUPTED_A6:
+		e->attrs.interrupted.a6 = val;
+		break;
+	case SBI_SSE_ATTR_INTERRUPTED_A7:
+		e->attrs.interrupted.a7 = val;
+		break;
 	}
 }
 
@@ -903,9 +935,6 @@ static int sse_write_attrs(struct sbi_sse_event *e, uint32_t base_attr_id,
 	uint32_t id, end_id = base_attr_id + attr_count;
 	unsigned long *attrs = (unsigned long *)input_phys;
 
-	if (sse_event_state(e) >= SBI_SSE_STATE_ENABLED)
-		return SBI_EINVALID_STATE;
-
 	sbi_hart_map_saddr(input_phys, sizeof(unsigned long) * attr_count);
 
 	for (id = base_attr_id; id < end_id; id++) {
@@ -944,7 +973,6 @@ int sbi_sse_write_attrs(uint32_t event_id, uint32_t base_attr_id,
 		return SBI_EINVAL;
 
 	ret = sse_write_attrs(e, base_attr_id, attr_count, input_phys_lo);
-
 	sse_event_put(e);
 
 	return ret;

From d962db280725b03a0340e05a07e4c85c93f35bc5 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@outlook.com>
Date: Thu, 23 May 2024 13:07:45 +0800
Subject: [PATCH 1579/1765] lib: utils/gpio: respect flag GPIO_FLAG_ACTIVE_LOW

"gpio-poweroff" and "gpio-restart" always set gpio to high to
active the function, but some chips need a low signal to active.
Fortunately, it can be achieved by setting GPIO_FLAG_ACTIVE_LOW
for the gpio. Implement this flag support for the gpio library
so the gpio reset can function well.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/gpio.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/lib/utils/gpio/gpio.c b/lib/utils/gpio/gpio.c
index 3a3a6b24a7b..6ffe9290878 100644
--- a/lib/utils/gpio/gpio.c
+++ b/lib/utils/gpio/gpio.c
@@ -73,17 +73,26 @@ int gpio_direction_output(struct gpio_pin *gp, int value)
 	if (!gp->chip->direction_output)
 		return SBI_ENOSYS;
 
+	if (gp->flags & GPIO_FLAG_ACTIVE_LOW)
+		value = value == 0 ? 1 : 0;
+
 	return gp->chip->direction_output(gp, value);
 }
 
 int gpio_get(struct gpio_pin *gp)
 {
+	int value;
+
 	if (!gp || !gp->chip || (gp->chip->ngpio <= gp->offset))
 		return SBI_EINVAL;
 	if (!gp->chip->get)
 		return SBI_ENOSYS;
 
-	return gp->chip->get(gp);
+	value = gp->chip->get(gp);
+
+	if (gp->flags & GPIO_FLAG_ACTIVE_LOW)
+		value = value == 0 ? 1 : 0;
+	return value;
 }
 
 int gpio_set(struct gpio_pin *gp, int value)
@@ -93,6 +102,9 @@ int gpio_set(struct gpio_pin *gp, int value)
 	if (!gp->chip->set)
 		return SBI_ENOSYS;
 
+	if (gp->flags & GPIO_FLAG_ACTIVE_LOW)
+		value = value == 0 ? 1 : 0;
+
 	gp->chip->set(gp, value);
 	return 0;
 }

From df3db6a9012916c44bcab221e6d6a264d9621b30 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 5 Jun 2024 10:48:46 +0530
Subject: [PATCH 1580/1765] lib: utils/fdt: Fix DT property for APLIC
 delegation

During Linux AIA driver review, the APLIC DT property for interrupt
delegation was renamed to "riscv,delegation" so let's use the new DT
property name and fallback to old DT property name if the new DT
property name is not available.

Fixes: 34612193af92 ("lib: utils/irqchip: Add FDT based driver for APLIC")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/utils/fdt/fdt_helper.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index a0e93b92266..9a945af4213 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -720,7 +720,9 @@ int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
 		deleg->child_index = 0;
 	}
 
-	del = fdt_getprop(fdt, nodeoff, "riscv,delegate", &len);
+	del = fdt_getprop(fdt, nodeoff, "riscv,delegation", &len);
+	if (!del)
+		del = fdt_getprop(fdt, nodeoff, "riscv,delegate", &len);
 	if (!del || len < (3 * sizeof(fdt32_t)))
 		goto skip_delegate_parse;
 	d = 0;

From c5be0e1ed1fa17b9f9abb49e80db014e067523e4 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:28 +0800
Subject: [PATCH 1581/1765] lib: utils/ipi: Skip initialize ipi when dt is not
 enabled

When the dt node has a status property and the value is not ok or
okay, skip initializing ipi.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/fdt_ipi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 7762ababe59..0b75093ebcd 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -44,6 +44,9 @@ static int fdt_ipi_cold_init(void)
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
+			if (!fdt_node_is_enabled(fdt, noff))
+				continue;
+
 			/* drv->cold_init must not be NULL */
 			if (drv->cold_init == NULL)
 				return SBI_EFAIL;

From 5e3ad7d577573e158bb2ca90ae647d64db3f4a32 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:29 +0800
Subject: [PATCH 1582/1765] lib: utils/timer: Skip initialize timer when dt is
 not enabled

When the dt node has a status property and the value is not ok or
okay, skip initializing timer.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/timer/fdt_timer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 62426a70fb0..f4687304d65 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -44,6 +44,9 @@ static int fdt_timer_cold_init(void)
 		noff = -1;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
+			if (!fdt_node_is_enabled(fdt, noff))
+				continue;
+
 			/* drv->cold_init must not be NULL */
 			if (drv->cold_init == NULL)
 				return SBI_EFAIL;

From b1c7c750f75dc027602688e4cb192d7b883c71d3 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:30 +0800
Subject: [PATCH 1583/1765] lib: utils/irqchip: Skip initialize irqchip when dt
 is not enabled

When the dt node has a status property and the value is not ok or
okay, skip initializing irqchip.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/irqchip/fdt_irqchip.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 1b6b6748523..c38b1d85498 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -62,6 +62,9 @@ static int fdt_irqchip_cold_init(void)
 		drv_added = false;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
+			if (!fdt_node_is_enabled(fdt,noff))
+				continue;
+
 			if (drv->cold_init) {
 				rc = drv->cold_init(fdt, noff, match);
 				if (rc == SBI_ENODEV)

From 179e00a320df905f22cf2788880d5e1455795bf7 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:31 +0800
Subject: [PATCH 1584/1765] lib: utils/serial: Skip initialize serial when dt
 is not enabled

When the dt node has a status property and the value is not ok or
okay, skip initializing serial.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/fdt_serial.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 0baa7228117..8b6e6b97742 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -40,6 +40,10 @@ int fdt_serial_init(void)
 			else
 				noff = fdt_path_offset(fdt, prop);
 		}
+		if (-1 < noff) {
+			if (!fdt_node_is_enabled(fdt, noff))
+				noff = -1;
+		}
 	}
 
 	/* First check DT node pointed by stdout-path */
@@ -68,6 +72,9 @@ int fdt_serial_init(void)
 		if (noff < 0)
 			continue;
 
+		if (!fdt_node_is_enabled(fdt, noff))
+			continue;
+
 		/* drv->init must not be NULL */
 		if (drv->init == NULL)
 			return SBI_EFAIL;

From 86bbe6c52faf48a5bcca2e3073d47d501408bee0 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:32 +0800
Subject: [PATCH 1585/1765] lib: utils/serial: Fix fdt_serial to match more dt
 nodes

If there are multiple dt nodes, the previous code only tries to match
the first one, which may lose initialization.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/fdt_serial.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 8b6e6b97742..798ac749e86 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -68,21 +68,21 @@ int fdt_serial_init(void)
 	for (pos = 0; pos < fdt_serial_drivers_size; pos++) {
 		drv = fdt_serial_drivers[pos];
 
-		noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-		if (noff < 0)
-			continue;
-
-		if (!fdt_node_is_enabled(fdt, noff))
-			continue;
+		noff = -1;
+		while ((noff = fdt_find_match(fdt, noff,
+					drv->match_table, &match)) >= 0) {
+			if (!fdt_node_is_enabled(fdt, noff))
+				continue;
 
-		/* drv->init must not be NULL */
-		if (drv->init == NULL)
-			return SBI_EFAIL;
+			/* drv->init must not be NULL */
+			if (drv->init == NULL)
+				return SBI_EFAIL;
 
-		rc = drv->init(fdt, noff, match);
-		if (rc == SBI_ENODEV)
-			continue;
-		return rc;
+			rc = drv->init(fdt, noff, match);
+			if (rc == SBI_ENODEV)
+				continue;
+			return rc;
+		}
 	}
 
 	return SBI_ENODEV;

From b5c984bd089510cc6c7ad7a5646ead1cf8ea676a Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:33 +0800
Subject: [PATCH 1586/1765] lib: utils/reset: Skip initialize reset when dt is
 not enabled

When the dt node has a status property and the value is not ok or
okay, skip initializing reset.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/fdt_reset.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 4334586d39f..327fb991d4e 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -26,6 +26,9 @@ int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 	if (noff < 0)
 		return SBI_ENODEV;
 
+	if (!fdt_node_is_enabled(fdt, noff))
+		return SBI_ENODEV;
+
 	if (drv->init) {
 		rc = drv->init(fdt, noff, match);
 		if (rc && rc != SBI_ENODEV) {

From a73ff043e99122be9f50215f04d0a8e93d69a978 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Tue, 11 Jun 2024 19:19:34 +0800
Subject: [PATCH 1587/1765] lib: utils/reset: Fix fdt_reset to search for more
 dt nodes

If there are multiple dt nodes, the previous code only tries to match
the first one, which may lose initialization.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/fdt_reset.c | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 327fb991d4e..c41b838708b 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -22,22 +22,24 @@ int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 	int noff, rc = SBI_ENODEV;
 	const struct fdt_match *match;
 
-	noff = fdt_find_match(fdt, -1, drv->match_table, &match);
-	if (noff < 0)
-		return SBI_ENODEV;
-
-	if (!fdt_node_is_enabled(fdt, noff))
-		return SBI_ENODEV;
-
-	if (drv->init) {
-		rc = drv->init(fdt, noff, match);
-		if (rc && rc != SBI_ENODEV) {
-			sbi_printf("%s: %s init failed, %d\n",
-				   __func__, match->compatible, rc);
+	noff = -1;
+	while ((noff = fdt_find_match(fdt, noff,
+				drv->match_table, &match)) >= 0) {
+		if (!fdt_node_is_enabled(fdt, noff))
+			continue;
+
+		if (drv->init) {
+			rc = drv->init(fdt, noff, match);
+			if (rc && rc != SBI_ENODEV) {
+				sbi_printf("%s: %s init failed, %d\n",
+					__func__, match->compatible, rc);
+			}
 		}
+
+		return rc;
 	}
 
-	return rc;
+	return SBI_ENODEV;
 }
 
 void fdt_reset_init(void)

From 3a94a3258039f225d068cb575844062c3f86bc03 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Fri, 7 Jun 2024 19:39:28 +0800
Subject: [PATCH 1588/1765] sbi: sbi_domain_context: Fix trap context for
 domain context switching

Save/restore sbi_trap_context during domain context switching to
ensure proper trap handling and isolation. This maintains correct
domain-specific state, avoiding context corruption.

Fixes: abea949721bc ("lib: sbi: Introduce trap context")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yong Li <yong.li@intel.com>
Tested-by: Yong Li <yong.li@intel.com>
---
 include/sbi/sbi_domain_context.h | 2 +-
 lib/sbi/sbi_domain_context.c     | 9 ++++-----
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
index edba764fa21..0d25884acfe 100755
--- a/include/sbi/sbi_domain_context.h
+++ b/include/sbi/sbi_domain_context.h
@@ -14,7 +14,7 @@
 /** Context representation for a hart within a domain */
 struct sbi_context {
 	/** Trap-related states such as GPRs, mepc, and mstatus */
-	struct sbi_trap_regs regs;
+	struct sbi_trap_context trap_ctx;
 
 	/** Supervisor status register */
 	unsigned long sstatus;
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 7528591805d..49a2f769737 100755
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -27,7 +27,7 @@ static void switch_to_next_domain_context(struct sbi_context *ctx,
 					  struct sbi_context *dom_ctx)
 {
 	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
-	struct sbi_trap_regs *trap_regs;
+	struct sbi_trap_context *trap_ctx;
 	struct sbi_domain *current_dom = ctx->dom;
 	struct sbi_domain *target_dom = dom_ctx->dom;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -66,10 +66,9 @@ static void switch_to_next_domain_context(struct sbi_context *ctx,
 		ctx->senvcfg	= csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
 
 	/* Save current trap state and restore target domain's trap state */
-	trap_regs = (struct sbi_trap_regs *)(csr_read(CSR_MSCRATCH) -
-					     SBI_TRAP_REGS_SIZE);
-	sbi_memcpy(&ctx->regs, trap_regs, sizeof(*trap_regs));
-	sbi_memcpy(trap_regs, &dom_ctx->regs, sizeof(*trap_regs));
+	trap_ctx = sbi_trap_get_context(scratch);
+	sbi_memcpy(&ctx->trap_ctx, trap_ctx, sizeof(*trap_ctx));
+	sbi_memcpy(trap_ctx, &dom_ctx->trap_ctx, sizeof(*trap_ctx));
 
 	/* Mark current context structure initialized because context saved */
 	ctx->initialized = true;

From 62e178a0a7b989d7cab9b2d4e33b291bc9a58c65 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Thu, 13 Jun 2024 23:03:07 +0800
Subject: [PATCH 1589/1765] lib: utils/reset: Try initializing all reset
 devices in dt

In DT, multiple reset devices may use the same driver, and they
may have different priorities. If rc is returned after the first
initialization, the highest priority device may be lost.

Fixes: a73ff043e991 (lib: utils/reset: Fix fdt_reset to search for more dt nodes)
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/reset/fdt_reset.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index c41b838708b..ee4e29a331b 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -19,7 +19,7 @@ extern unsigned long fdt_reset_drivers_size;
 
 int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 {
-	int noff, rc = SBI_ENODEV;
+	int noff, rc, cnt = 0;
 	const struct fdt_match *match;
 
 	noff = -1;
@@ -30,16 +30,16 @@ int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 
 		if (drv->init) {
 			rc = drv->init(fdt, noff, match);
-			if (rc && rc != SBI_ENODEV) {
+			if (!rc)
+				cnt++;
+			else if (rc != SBI_ENODEV) {
 				sbi_printf("%s: %s init failed, %d\n",
 					__func__, match->compatible, rc);
 			}
 		}
-
-		return rc;
 	}
 
-	return SBI_ENODEV;
+	return cnt > 0 ? 0 : SBI_ENODEV;
 }
 
 void fdt_reset_init(void)

From 7830e987856eb1319c82664702892b6d50a93e7a Mon Sep 17 00:00:00 2001
From: Gabriel Somlo <gsomlo@gmail.com>
Date: Fri, 7 Jun 2024 14:23:42 -0400
Subject: [PATCH 1590/1765] lib: serial: fix RX path in litex-uart

When used to read characters from the terminal (e.g., when the SBI
console is used via ecall from linux with `console=hvc0`), we must
acknowledge receipt of each character to "pop" it off the LiteUART
hardware queue, and allow the next character to be made available.

Fixes: 52af6e4b ("lib: utils: Add LiteX UART support")
Suggested-by: Dolu1990 <charles.papon.90@gmail.com>
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/serial/litex-uart.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/lib/utils/serial/litex-uart.c b/lib/utils/serial/litex-uart.c
index f843bf3836d..caf869905a8 100644
--- a/lib/utils/serial/litex-uart.c
+++ b/lib/utils/serial/litex-uart.c
@@ -20,6 +20,8 @@
 #define UART_REG_EV_PENDING	4
 #define UART_REG_EV_ENABLE	5
 
+#define UART_EV_RX		0x2
+
 /* clang-format on */
 
 static volatile u32 *uart_base;
@@ -42,10 +44,14 @@ static void litex_uart_putc(char ch)
 
 static int litex_uart_getc(void)
 {
+	int ret;
+
 	if (get_reg(UART_REG_RXEMPTY))
 		return -1;
-	else
-		return get_reg(UART_REG_RXTX);
+
+	ret = get_reg(UART_REG_RXTX);
+	set_reg(UART_REG_EV_PENDING, UART_EV_RX); /* ack. char read */
+	return ret;
 }
 
 static struct sbi_console_device litex_console = {

From f09f16430ae7b3543616a38df4411fea8f026759 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Fri, 31 May 2024 13:19:04 +0800
Subject: [PATCH 1591/1765] platform: generic: andes: Refine Andes PMA related
 code

This patch refines the Andes PMA related code. The main change is
refactor andes_pma_[read|write]_cfg() and andes_pma_[read|write]_addr()
into new functions andes_pma_[read|write]_num().

Also, fix some coding style problems.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/andes_pma.c         | 215 ++++++++-------------
 platform/generic/include/andes/andes_pma.h |   2 +
 2 files changed, 81 insertions(+), 136 deletions(-)

diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index d5ea594a6e2..321074ace36 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -1,12 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (C) 2023 Renesas Electronics Corp.
- *
- * Copyright (c) 2020 Andes Technology Corporation
+ * Copyright (c) 2024 Andes Technology Corporation
  *
  * Authors:
- *      Nick Hu <nickhu@andestech.com>
- *      Nylon Chen <nylon7@andestech.com>
+ *      Ben Zong-You Xie <ben717@andestech.com>
  *      Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
  */
 
@@ -19,124 +17,81 @@
 #include <sbi/sbi_error.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 
-static inline unsigned long andes_pma_read_cfg(unsigned int pma_cfg_off)
+static unsigned long andes_pma_read_num(unsigned int csr_num)
 {
-#define switchcase_pma_cfg_read(__pma_cfg_off, __val)		\
-	case __pma_cfg_off:					\
-		__val = csr_read(__pma_cfg_off);		\
+#define switchcase_csr_read(__csr_num, __val)		\
+	case __csr_num:					\
+		__val = csr_read(__csr_num);		\
 		break;
-#define switchcase_pma_cfg_read_2(__pma_cfg_off, __val)		\
-	switchcase_pma_cfg_read(__pma_cfg_off + 0, __val)	\
-	switchcase_pma_cfg_read(__pma_cfg_off + 2, __val)
+#define switchcase_csr_read_2(__csr_num, __val)		\
+	switchcase_csr_read(__csr_num + 0, __val)	\
+	switchcase_csr_read(__csr_num + 1, __val)
+#define switchcase_csr_read_4(__csr_num, __val)		\
+	switchcase_csr_read_2(__csr_num + 0, __val)	\
+	switchcase_csr_read_2(__csr_num + 2, __val)
+#define switchcase_csr_read_8(__csr_num, __val)		\
+	switchcase_csr_read_4(__csr_num + 0, __val)	\
+	switchcase_csr_read_4(__csr_num + 4, __val)
+#define switchcase_csr_read_16(__csr_num, __val)	\
+	switchcase_csr_read_8(__csr_num + 0, __val)	\
+	switchcase_csr_read_8(__csr_num + 8, __val)
 
 	unsigned long ret = 0;
 
-	switch (pma_cfg_off) {
-	switchcase_pma_cfg_read_2(CSR_PMACFG0, ret)
-
+	switch (csr_num) {
+	switchcase_csr_read_4(CSR_PMACFG0, ret)
+	switchcase_csr_read_16(CSR_PMAADDR0, ret)
 	default:
-		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
+		sbi_panic("%s: Unknown Andes PMA CSR %#x", __func__, csr_num);
 		break;
 	}
 
 	return ret;
 
-#undef switchcase_pma_cfg_read_2
-#undef switchcase_pma_cfg_read
+#undef switchcase_csr_read_16
+#undef switchcase_csr_read_8
+#undef switchcase_csr_read_4
+#undef switchcase_csr_read_2
+#undef switchcase_csr_read
 }
 
-static inline void andes_pma_write_cfg(unsigned int pma_cfg_off, unsigned long val)
+static void andes_pma_write_num(unsigned int csr_num, unsigned long val)
 {
-#define switchcase_pma_cfg_write(__pma_cfg_off, __val)		\
-	case __pma_cfg_off:					\
-		csr_write(__pma_cfg_off, __val);		\
+#define switchcase_csr_write(__csr_num, __val)		\
+	case __csr_num:					\
+		csr_write(__csr_num, __val);		\
 		break;
-#define switchcase_pma_cfg_write_2(__pma_cfg_off, __val)	\
-	switchcase_pma_cfg_write(__pma_cfg_off + 0, __val)	\
-	switchcase_pma_cfg_write(__pma_cfg_off + 2, __val)
-
-	switch (pma_cfg_off) {
-	switchcase_pma_cfg_write_2(CSR_PMACFG0, val)
-
+#define switchcase_csr_write_2(__csr_num, __val)	\
+	switchcase_csr_write(__csr_num + 0, __val)	\
+	switchcase_csr_write(__csr_num + 1, __val)
+#define switchcase_csr_write_4(__csr_num, __val)	\
+	switchcase_csr_write_2(__csr_num + 0, __val)	\
+	switchcase_csr_write_2(__csr_num + 2, __val)
+#define switchcase_csr_write_8(__csr_num, __val)	\
+	switchcase_csr_write_4(__csr_num + 0, __val)	\
+	switchcase_csr_write_4(__csr_num + 4, __val)
+#define switchcase_csr_write_16(__csr_num, __val)	\
+	switchcase_csr_write_8(__csr_num + 0, __val)	\
+	switchcase_csr_write_8(__csr_num + 8, __val)
+
+	switch (csr_num) {
+	switchcase_csr_write_4(CSR_PMACFG0, val)
+	switchcase_csr_write_16(CSR_PMAADDR0, val)
 	default:
-		sbi_panic("%s: Unknown PMA CFG offset %#x", __func__, pma_cfg_off);
+		sbi_panic("%s: Unknown Andes PMA CSR %#x", __func__, csr_num);
 		break;
 	}
 
-#undef switchcase_pma_cfg_write_2
-#undef switchcase_pma_cfg_write
+#undef switchcase_csr_write_16
+#undef switchcase_csr_write_8
+#undef switchcase_csr_write_4
+#undef switchcase_csr_write_2
+#undef switchcase_csr_write
 }
 
-static inline void andes_pma_write_addr(unsigned int pma_addr_off, unsigned long val)
+static inline bool not_napot(unsigned long addr, unsigned long size)
 {
-#define switchcase_pma_write(__pma_addr_off, __val)		\
-	case __pma_addr_off:					\
-		csr_write(__pma_addr_off, __val);		\
-		break;
-#define switchcase_pma_write_2(__pma_addr_off, __val)		\
-	switchcase_pma_write(__pma_addr_off + 0, __val)		\
-	switchcase_pma_write(__pma_addr_off + 1, __val)
-#define switchcase_pma_write_4(__pma_addr_off, __val)		\
-	switchcase_pma_write_2(__pma_addr_off + 0, __val)	\
-	switchcase_pma_write_2(__pma_addr_off + 2, __val)
-#define switchcase_pma_write_8(__pma_addr_off, __val)		\
-	switchcase_pma_write_4(__pma_addr_off + 0, __val)	\
-	switchcase_pma_write_4(__pma_addr_off + 4, __val)
-#define switchcase_pma_write_16(__pma_addr_off, __val)		\
-	switchcase_pma_write_8(__pma_addr_off + 0, __val)	\
-	switchcase_pma_write_8(__pma_addr_off + 8, __val)
-
-	switch (pma_addr_off) {
-	switchcase_pma_write_16(CSR_PMAADDR0, val)
-
-	default:
-		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
-		break;
-	}
-
-#undef switchcase_pma_write_16
-#undef switchcase_pma_write_8
-#undef switchcase_pma_write_4
-#undef switchcase_pma_write_2
-#undef switchcase_pma_write
-}
-
-static inline unsigned long andes_pma_read_addr(unsigned int pma_addr_off)
-{
-#define switchcase_pma_read(__pma_addr_off, __val)		\
-	case __pma_addr_off:					\
-		__val = csr_read(__pma_addr_off);		\
-		break;
-#define switchcase_pma_read_2(__pma_addr_off, __val)		\
-	switchcase_pma_read(__pma_addr_off + 0, __val)		\
-	switchcase_pma_read(__pma_addr_off + 1, __val)
-#define switchcase_pma_read_4(__pma_addr_off, __val)		\
-	switchcase_pma_read_2(__pma_addr_off + 0, __val)	\
-	switchcase_pma_read_2(__pma_addr_off + 2, __val)
-#define switchcase_pma_read_8(__pma_addr_off, __val)		\
-	switchcase_pma_read_4(__pma_addr_off + 0, __val)	\
-	switchcase_pma_read_4(__pma_addr_off + 4, __val)
-#define switchcase_pma_read_16(__pma_addr_off, __val)		\
-	switchcase_pma_read_8(__pma_addr_off + 0, __val)	\
-	switchcase_pma_read_8(__pma_addr_off + 8, __val)
-
-	unsigned long ret = 0;
-
-	switch (pma_addr_off) {
-	switchcase_pma_read_16(CSR_PMAADDR0, ret)
-
-	default:
-		sbi_panic("%s: Unknown PMA ADDR offset %#x", __func__, pma_addr_off);
-		break;
-	}
-
-	return ret;
-
-#undef switchcase_pma_read_16
-#undef switchcase_pma_read_8
-#undef switchcase_pma_read_4
-#undef switchcase_pma_read_2
-#undef switchcase_pma_read
+	return ((size & (size - 1)) || (addr & (size - 1)));
 }
 
 static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
@@ -149,36 +104,24 @@ static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
 	unsigned long pmaaddr;
 	char *pmaxcfg;
 
-	/* Check for 4KiB granularity */
-	if (size < (1 << 12))
-		return SBI_EINVAL;
-
-	/* Check size is power of 2 */
-	if (size & (size - 1))
-		return SBI_EINVAL;
-
-	if (entry_id > 15)
-		return SBI_EINVAL;
-
-	if (!(pma_region->flags & ANDES_PMACFG_ETYP_NAPOT))
+	/* Check for a 4KiB granularity NAPOT region*/
+	if (size < ANDES_PMA_GRANULARITY || not_napot(addr, size) ||
+	    !(pma_region->flags & ANDES_PMACFG_ETYP_NAPOT))
 		return SBI_EINVAL;
 
-	if ((addr & (size - 1)) != 0)
-		return SBI_EINVAL;
-
-	pma_cfg_addr = entry_id / 8 ? CSR_PMACFG0 + 2 : CSR_PMACFG0;
-	pmacfg_val = andes_pma_read_cfg(pma_cfg_addr);
+	pma_cfg_addr = CSR_PMACFG0 + ((entry_id / 8) ? 2 : 0);
+	pmacfg_val = andes_pma_read_num(pma_cfg_addr);
 	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
 	*pmaxcfg = 0;
 	*pmaxcfg = pma_region->flags;
 
-	andes_pma_write_cfg(pma_cfg_addr, pmacfg_val);
+	andes_pma_write_num(pma_cfg_addr, pmacfg_val);
 
 	pmaaddr = (addr >> 2) + (size >> 3) - 1;
 
-	andes_pma_write_addr(CSR_PMAADDR0 + entry_id, pmaaddr);
+	andes_pma_write_num(CSR_PMAADDR0 + entry_id, pmaaddr);
 
-	return andes_pma_read_addr(CSR_PMAADDR0 + entry_id) == pmaaddr ?
+	return andes_pma_read_num(CSR_PMAADDR0 + entry_id) == pmaaddr ?
 	       pmaaddr : SBI_EINVAL;
 }
 
@@ -202,19 +145,20 @@ static int andes_fdt_pma_resv(void *fdt, const struct andes_pma_region *pma,
 
 	if (na > 1 && addr_high) {
 		sbi_snprintf(name, sizeof(name),
-			     "pma_resv%d@%x,%x", index,
-			     addr_high, addr_low);
+			     "pma_resv%d@%x,%x",
+			     index, addr_high, addr_low);
 	} else {
 		sbi_snprintf(name, sizeof(name),
-			     "pma_resv%d@%x", index,
-			     addr_low);
+			     "pma_resv%d@%x",
+			     index, addr_low);
 	}
 	subnode = fdt_add_subnode(fdt, parent, name);
 	if (subnode < 0)
 		return subnode;
 
 	if (pma->shared_dma) {
-		err = fdt_setprop_string(fdt, subnode, "compatible", "shared-dma-pool");
+		err = fdt_setprop_string(fdt, subnode, "compatible",
+					 "shared-dma-pool");
 		if (err < 0)
 			return err;
 	}
@@ -259,14 +203,14 @@ static int andes_fdt_reserved_memory_fixup(void *fdt,
 {
 	int parent;
 
-	/* try to locate the reserved memory node */
+	/* Try to locate the reserved memory node */
 	parent = fdt_path_offset(fdt, "/reserved-memory");
 	if (parent < 0) {
 		int na = fdt_address_cells(fdt, 0);
 		int ns = fdt_size_cells(fdt, 0);
 		int err;
 
-		/* if such node does not exist, create one */
+		/* If such node does not exist, create one */
 		parent = fdt_add_subnode(fdt, 0, "reserved-memory");
 		if (parent < 0)
 			return parent;
@@ -307,17 +251,13 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 		return SBI_ENOTSUPP;
 
 	/* Configure the PMA regions */
+	dt_populate_cnt = 0;
 	for (i = 0; i < pma_regions_count; i++) {
 		pa = andes_pma_setup(&pma_regions[i], i);
 		if (pa == SBI_EINVAL)
 			return SBI_EINVAL;
-	}
-
-	dt_populate_cnt = 0;
-	for (i = 0; i < pma_regions_count; i++) {
-		if (!pma_regions[i].dt_populate)
-			continue;
-		dt_populate_cnt++;
+		else if (pma_regions[i].dt_populate)
+			dt_populate_cnt++;
 	}
 
 	if (!dt_populate_cnt)
@@ -325,7 +265,8 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 
 	fdt = fdt_get_address();
 
-	ret = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + (64 * dt_populate_cnt));
+	ret = fdt_open_into(fdt, fdt,
+			    fdt_totalsize(fdt) + (64 * dt_populate_cnt));
 	if (ret < 0)
 		return ret;
 
@@ -333,7 +274,9 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 		if (!pma_regions[i].dt_populate)
 			continue;
 
-		ret = andes_fdt_reserved_memory_fixup(fdt, &pma_regions[i], j++);
+		ret = andes_fdt_reserved_memory_fixup(fdt,
+						      &pma_regions[i],
+						      j++);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index bbc09cdd774..5ea12475ee9 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -10,6 +10,8 @@
 
 #define ANDES_MAX_PMA_REGIONS			16
 
+#define ANDES_PMA_GRANULARITY			(1 << 12)
+
 /* Naturally aligned power of 2 region */
 #define ANDES_PMACFG_ETYP_NAPOT			3
 

From 52dcf351cddf12081acc921c135df265f9d2f243 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Fri, 31 May 2024 13:21:08 +0800
Subject: [PATCH 1592/1765] platform: generic: andes: Add support for RV32 to
 set up PMA

Like PMP, the behaviors to configure PMA will be different from
RV64 and RV32. RV64 uses two Andes custom CSRs, pmacfg0 and pmacfg2,
but RV32 uses four Andes custom CSRs, pmacfg0 ~ pmacfg3. This patch
adds support to PMA for RV32.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/andes_pma.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index 321074ace36..9c37720b41f 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -109,10 +109,17 @@ static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
 	    !(pma_region->flags & ANDES_PMACFG_ETYP_NAPOT))
 		return SBI_EINVAL;
 
+#if __riscv_xlen == 64
 	pma_cfg_addr = CSR_PMACFG0 + ((entry_id / 8) ? 2 : 0);
 	pmacfg_val = andes_pma_read_num(pma_cfg_addr);
 	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
-	*pmaxcfg = 0;
+#elif __riscv_xlen == 32
+	pma_cfg_addr = CSR_PMACFG0 + (entry_id / 4);
+	pmacfg_val = andes_pma_read_num(pma_cfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 4);
+#else
+#error "Unexpected __riscv_xlen"
+#endif
 	*pmaxcfg = pma_region->flags;
 
 	andes_pma_write_num(pma_cfg_addr, pmacfg_val);

From 53844c98d082cbba29a6e568196add6de95e858f Mon Sep 17 00:00:00 2001
From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Date: Wed, 5 Jun 2024 20:11:09 +0800
Subject: [PATCH 1593/1765] lib: sbi: Add support for Svade and Svadu
 extensions

Add support for Svade and Svadu extensions. When both are present in the
device tree, the M-mode firmware should select the Svade extension
to comply with the RVA23 profile, which mandates Svade and lists Svadu as
an optional extension.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h |  1 +
 include/sbi/sbi_hart.h       |  4 ++++
 lib/sbi/sbi_hart.c           | 12 ++++++++++++
 3 files changed, 17 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index d914828e13a..477fa3a1ad8 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -211,6 +211,7 @@
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
+#define ENVCFG_ADUE			(_ULL(1) << 61)
 #define ENVCFG_CDE			(_ULL(1) << 60)
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index cc78eec6f65..81ec061d36a 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -63,6 +63,10 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SSCSRIND,
 	/** Hart has Ssccfg extension */
 	SBI_HART_EXT_SSCCFG,
+	/** Hart has Svade extension */
+	SBI_HART_EXT_SVADE,
+	/** Hart has Svadu extension */
+	SBI_HART_EXT_SVADU,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index cd974cc1a8d..c3667019b9a 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -135,9 +135,19 @@ static void mstatus_init(struct sbi_scratch *scratch)
 #endif
 		__set_menvcfg_ext(SBI_HART_EXT_SSTC, ENVCFG_STCE)
 		__set_menvcfg_ext(SBI_HART_EXT_SMCDELEG, ENVCFG_CDE);
+		__set_menvcfg_ext(SBI_HART_EXT_SVADU, ENVCFG_ADUE);
 
 #undef __set_menvcfg_ext
 
+		/*
+		 * When both Svade and Svadu are present in DT, the default scheme for managing
+		 * the PTE A/D bits should use Svade. Check Svadu before Svade extension to ensure
+		 * that the ADUE bit is cleared when the Svade support are specified.
+		 */
+
+		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SVADE))
+			menvcfg_val &= ~ENVCFG_ADUE;
+
 		csr_write(CSR_MENVCFG, menvcfg_val);
 #if __riscv_xlen == 32
 		csr_write(CSR_MENVCFGH, menvcfg_val >> 32);
@@ -668,6 +678,8 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(smcdeleg, SBI_HART_EXT_SMCDELEG),
 	__SBI_HART_EXT_DATA(sscsrind, SBI_HART_EXT_SSCSRIND),
 	__SBI_HART_EXT_DATA(ssccfg, SBI_HART_EXT_SSCCFG),
+	__SBI_HART_EXT_DATA(svade, SBI_HART_EXT_SVADE),
+	__SBI_HART_EXT_DATA(svadu, SBI_HART_EXT_SVADU),
 };
 
 _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),

From aa5a8593696b39059832d12455c31dcfeb4d9259 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Wed, 19 Jun 2024 11:42:39 +0200
Subject: [PATCH 1594/1765] lib: sbi: add support for firmware features
 extension
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This extension allows the software running in supervisor mode to control
the behavior of various features of the SBI [1]. Implement the support
for such extension.

Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |  27 +++++
 include/sbi/sbi_fwft.h            |  23 ++++
 lib/sbi/objects.mk                |   1 +
 lib/sbi/sbi_fwft.c                | 178 ++++++++++++++++++++++++++++++
 lib/sbi/sbi_init.c                |  11 ++
 5 files changed, 240 insertions(+)
 create mode 100644 include/sbi/sbi_fwft.h
 create mode 100644 lib/sbi/sbi_fwft.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 2600b662f38..e9a8167760a 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -34,6 +34,7 @@
 #define SBI_EXT_CPPC				0x43505043
 #define SBI_EXT_DBTR				0x44425452
 #define SBI_EXT_SSE				0x535345
+#define SBI_EXT_FWFT				0x46574654
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -117,6 +118,32 @@
 #define SBI_EXT_DBTR_TRIGGER_ENABLE	0x6
 #define SBI_EXT_DBTR_TRIGGER_DISABLE	0x7
 
+/* SBI function IDs for FW feature extension */
+#define SBI_EXT_FWFT_SET		0x0
+#define SBI_EXT_FWFT_GET		0x1
+
+enum sbi_fwft_feature_t {
+	SBI_FWFT_MISALIGNED_EXC_DELEG		= 0x0,
+	SBI_FWFT_LANDING_PAD			= 0x1,
+	SBI_FWFT_SHADOW_STACK			= 0x2,
+	SBI_FWFT_DOUBLE_TRAP			= 0x3,
+	SBI_FWFT_PTE_AD_HW_UPDATING		= 0x4,
+	SBI_FWFT_LOCAL_RESERVED_START		= 0x5,
+	SBI_FWFT_LOCAL_RESERVED_END		= 0x3fffffff,
+	SBI_FWFT_LOCAL_PLATFORM_START		= 0x40000000,
+	SBI_FWFT_LOCAL_PLATFORM_END		= 0x7fffffff,
+
+	SBI_FWFT_GLOBAL_RESERVED_START		= 0x80000000,
+	SBI_FWFT_GLOBAL_RESERVED_END		= 0xbfffffff,
+	SBI_FWFT_GLOBAL_PLATFORM_START		= 0xc0000000,
+	SBI_FWFT_GLOBAL_PLATFORM_END		= 0xffffffff,
+};
+
+#define SBI_FWFT_GLOBAL_FEATURE_BIT		(1 << 31)
+#define SBI_FWFT_PLATFORM_FEATURE_BIT		(1 << 30)
+
+#define SBI_FWFT_SET_FLAG_LOCK			(1 << 0)
+
 /** General pmu event codes specified in SBI PMU extension */
 enum sbi_pmu_hw_generic_events_t {
 	SBI_PMU_HW_NO_EVENT			= 0,
diff --git a/include/sbi/sbi_fwft.h b/include/sbi/sbi_fwft.h
new file mode 100644
index 00000000000..2148820e93f
--- /dev/null
+++ b/include/sbi/sbi_fwft.h
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Rivos Inc.
+ *
+ * Authors:
+ *   Clément Léger <cleger@rivosinc.com>
+ */
+
+#ifndef __SBI_FW_FEATURE_H__
+#define __SBI_FW_FEATURE_H__
+
+#include <sbi/sbi_ecall_interface.h>
+
+struct sbi_scratch;
+
+int sbi_fwft_set(enum sbi_fwft_feature_t feature, unsigned long value,
+		 unsigned long flags);
+int sbi_fwft_get(enum sbi_fwft_feature_t feature, unsigned long *out_val);
+
+int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index b1c4a5033ee..221e72cdfb7 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -65,6 +65,7 @@ libsbi-objs-y += sbi_domain_context.o
 libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
+libsbi-objs-y += sbi_fwft.o
 libsbi-objs-y += sbi_hart.o
 libsbi-objs-y += sbi_heap.o
 libsbi-objs-y += sbi_math.o
diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
new file mode 100644
index 00000000000..b302b5d74da
--- /dev/null
+++ b/lib/sbi/sbi_fwft.c
@@ -0,0 +1,178 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Rivos Inc.
+ *
+ * Authors:
+ *   Clément Léger <cleger@rivosinc.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_bitmap.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_types.h>
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+
+/** Offset of pointer to FWFT HART state in scratch space */
+static unsigned long fwft_ptr_offset;
+
+#define fwft_get_hart_state_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, fwft_ptr_offset)
+
+#define fwft_thishart_state_ptr()					\
+	fwft_get_hart_state_ptr(sbi_scratch_thishart_ptr())
+
+#define fwft_set_hart_state_ptr(__scratch, __phs)			\
+	sbi_scratch_write_type((__scratch), void *, fwft_ptr_offset, (__phs))
+
+struct fwft_config;
+
+struct fwft_feature {
+	enum sbi_fwft_feature_t id;
+	int (*supported)(struct fwft_config *conf);
+	int (*set)(struct fwft_config *conf, unsigned long value);
+	int (*get)(struct fwft_config *conf, unsigned long *value);
+};
+
+struct fwft_config {
+	const struct fwft_feature *feature;
+	unsigned long flags;
+};
+
+struct fwft_hart_state {
+	unsigned int config_count;
+	struct fwft_config configs[];
+};
+
+static const unsigned long fwft_defined_features[] = {
+	SBI_FWFT_MISALIGNED_EXC_DELEG,
+	SBI_FWFT_LANDING_PAD,
+	SBI_FWFT_SHADOW_STACK,
+	SBI_FWFT_DOUBLE_TRAP,
+	SBI_FWFT_PTE_AD_HW_UPDATING,
+};
+
+static bool fwft_is_defined_feature(enum sbi_fwft_feature_t feature)
+{
+	int i;
+
+	for (i = 0; i < array_size(fwft_defined_features); i++) {
+		if (fwft_defined_features[i] == feature)
+			return true;
+	}
+
+	return false;
+}
+
+static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature)
+{
+	int i;
+	struct fwft_hart_state *fhs = fwft_thishart_state_ptr();
+
+	if (feature & SBI_FWFT_GLOBAL_FEATURE_BIT)
+		return NULL;
+
+	for (i = 0; i < fhs->config_count; i++){
+		if (feature == fhs->configs[i].feature->id)
+			return &fhs->configs[i];
+	}
+
+	return NULL;
+}
+
+static int fwft_get_feature(enum sbi_fwft_feature_t feature,
+			    struct fwft_config **conf)
+{
+	int ret;
+	struct fwft_config *tconf;
+
+	tconf = get_feature_config(feature);
+	if (!tconf) {
+		if (fwft_is_defined_feature(feature))
+			return SBI_ENOTSUPP;
+
+		return SBI_EDENIED;
+	}
+
+	if (tconf->feature->supported) {
+		ret = tconf->feature->supported(tconf);
+		if (ret)
+			return ret;
+	}
+	*conf = tconf;
+
+	return SBI_SUCCESS;
+}
+
+int sbi_fwft_set(enum sbi_fwft_feature_t feature, unsigned long value,
+		 unsigned long flags)
+{
+	int ret;
+	struct fwft_config *conf;
+
+	ret = fwft_get_feature(feature, &conf);
+	if (ret)
+		return ret;
+
+	if ((flags & ~SBI_FWFT_SET_FLAG_LOCK) != 0)
+		return SBI_ERR_INVALID_PARAM;
+
+	if (conf->flags & SBI_FWFT_SET_FLAG_LOCK)
+		return SBI_EDENIED;
+
+	ret = conf->feature->set(conf, value);
+	if (ret)
+		return ret;
+
+	conf->flags = flags;
+
+	return SBI_OK;
+}
+
+int sbi_fwft_get(enum sbi_fwft_feature_t feature, unsigned long *out_val)
+{
+	int ret;
+	struct fwft_config *conf;
+
+	ret = fwft_get_feature(feature, &conf);
+	if (ret)
+		return ret;
+
+	return conf->feature->get(conf, out_val);
+}
+
+static const struct fwft_feature features[] = {};
+
+int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
+{
+	int i;
+	struct fwft_hart_state *fhs;
+
+	if (cold_boot) {
+		fwft_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!fwft_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
+	fhs = fwft_get_hart_state_ptr(scratch);
+	if (!fhs) {
+		fhs = sbi_zalloc(sizeof(fhs) + array_size(features) * sizeof(struct fwft_config));
+		if (!fhs)
+			return SBI_ENOMEM;
+
+		fhs->config_count = array_size(features);
+		for (i = 0; i < array_size(features); i++)
+			fhs->configs[i].feature = &features[i];
+
+		fwft_set_hart_state_ptr(scratch, fhs);
+	}
+
+	return 0;
+}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 389172a9d0d..0f9e14cc390 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_cppc.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall.h>
+#include <sbi/sbi_fwft.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_heap.h>
@@ -308,6 +309,12 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
+	rc = sbi_fwft_init(scratch, true);
+	if (rc) {
+		sbi_printf("%s: fwft init failed (error %d)\n", __func__, rc);
+		sbi_hart_hang();
+	}
+
 	/*
 	 * Note: Finalize domains after HSM initialization so that we
 	 * can startup non-root domains.
@@ -423,6 +430,10 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	if (rc)
 		sbi_hart_hang();
 
+	rc = sbi_fwft_init(scratch, false);
+	if (rc)
+		sbi_hart_hang();
+
 	rc = sbi_platform_final_init(plat, false);
 	if (rc)
 		sbi_hart_hang();

From c97a1d58918bcdbbb5dbabaf869b09be2b877577 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Wed, 19 Jun 2024 11:42:40 +0200
Subject: [PATCH 1595/1765] lib: sbi: fwft: add support for
 SBI_FWFT_MISALIGNED_EXC_DELEG
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add support for SBI_FWFT_MISALIGNED_EXC_DELEG withing FWFT support. This
support allows to delegate misaligned accesses traps.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 39 ++++++++++++++++++++++++++++++++++++++-
 lib/sbi/sbi_hsm.c  |  3 +++
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index b302b5d74da..289a344f97b 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -32,6 +32,8 @@ static unsigned long fwft_ptr_offset;
 #define fwft_set_hart_state_ptr(__scratch, __phs)			\
 	sbi_scratch_write_type((__scratch), void *, fwft_ptr_offset, (__phs))
 
+#define MIS_DELEG (1UL << CAUSE_MISALIGNED_LOAD | 1UL << CAUSE_MISALIGNED_STORE)
+
 struct fwft_config;
 
 struct fwft_feature {
@@ -71,6 +73,33 @@ static bool fwft_is_defined_feature(enum sbi_fwft_feature_t feature)
 	return false;
 }
 
+static int fwft_misaligned_delegation_supported(struct fwft_config *conf)
+{
+	if (!misa_extension('S'))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static int fwft_set_misaligned_delegation(struct fwft_config *conf,
+					 unsigned long value)
+{
+	if (value)
+		csr_set(CSR_MEDELEG, MIS_DELEG);
+	else
+		csr_clear(CSR_MEDELEG, MIS_DELEG);
+
+	return SBI_OK;
+}
+
+static int fwft_get_misaligned_delegation(struct fwft_config *conf,
+					 unsigned long *value)
+{
+	*value = (csr_read(CSR_MEDELEG) & MIS_DELEG) != 0;
+
+	return SBI_OK;
+}
+
 static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature)
 {
 	int i;
@@ -148,7 +177,15 @@ int sbi_fwft_get(enum sbi_fwft_feature_t feature, unsigned long *out_val)
 	return conf->feature->get(conf, out_val);
 }
 
-static const struct fwft_feature features[] = {};
+static const struct fwft_feature features[] =
+{
+	{
+		.id = SBI_FWFT_MISALIGNED_EXC_DELEG,
+		.supported = fwft_misaligned_delegation_supported,
+		.set = fwft_set_misaligned_delegation,
+		.get = fwft_get_misaligned_delegation,
+	},
+};
 
 int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
 {
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index be48d64eb78..2b23e1398de 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -44,6 +44,7 @@ struct sbi_hsm_data {
 	unsigned long suspend_type;
 	unsigned long saved_mie;
 	unsigned long saved_mip;
+	unsigned long saved_medeleg;
 	atomic_t start_ticket;
 };
 
@@ -417,6 +418,7 @@ void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
 
 	hdata->saved_mie = csr_read(CSR_MIE);
 	hdata->saved_mip = csr_read(CSR_MIP) & (MIP_SSIP | MIP_STIP);
+	hdata->saved_medeleg = csr_read(CSR_MEDELEG);
 }
 
 static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
@@ -424,6 +426,7 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
+	csr_write(CSR_MEDELEG, hdata->saved_medeleg);
 	csr_write(CSR_MIE, hdata->saved_mie);
 	csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));
 }

From e9ee9678ba509f42a93c8de518710c225c0499f5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Wed, 19 Jun 2024 11:42:41 +0200
Subject: [PATCH 1596/1765] lib: sbi: fwft: add support for
 SBI_FWFT_PTE_AD_HW_UPDATING
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add support for SBI_FWFT_PTE_AD_HW_UPDATING based on SVADU presence.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 47 ++++++++++++++++++++++++++++++++++++++++++++++
 lib/sbi/sbi_hsm.c  | 12 ++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index 289a344f97b..aff087fbc62 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -100,6 +100,47 @@ static int fwft_get_misaligned_delegation(struct fwft_config *conf,
 	return SBI_OK;
 }
 
+static int fwft_adue_supported(struct fwft_config *conf)
+{
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				    SBI_HART_EXT_SVADU))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static int fwft_set_adue(struct fwft_config *conf, unsigned long value)
+{
+	if (value)
+#if __riscv_xlen == 32
+		csr_set(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
+#else
+		csr_set(CSR_MENVCFG, ENVCFG_ADUE);
+#endif
+	else
+#if __riscv_xlen == 32
+		csr_clear(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
+#else
+		csr_clear(CSR_MENVCFG, ENVCFG_ADUE);
+#endif
+
+	return SBI_OK;
+}
+
+static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)
+{
+	unsigned long cfg;
+
+#if __riscv_xlen == 32
+	cfg = csr_read(CSR_MENVCFGH) & (ENVCFG_ADUE >> 32);
+#else
+	cfg = csr_read(CSR_MENVCFG) & ENVCFG_ADUE;
+#endif
+	*value = cfg != 0;
+
+	return SBI_OK;
+}
+
 static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature)
 {
 	int i;
@@ -185,6 +226,12 @@ static const struct fwft_feature features[] =
 		.set = fwft_set_misaligned_delegation,
 		.get = fwft_get_misaligned_delegation,
 	},
+	{
+		.id = SBI_FWFT_PTE_AD_HW_UPDATING,
+		.supported = fwft_adue_supported,
+		.set = fwft_set_adue,
+		.get = fwft_get_adue,
+	},
 };
 
 int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 2b23e1398de..7e32af371b7 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -45,6 +45,10 @@ struct sbi_hsm_data {
 	unsigned long saved_mie;
 	unsigned long saved_mip;
 	unsigned long saved_medeleg;
+	unsigned long saved_menvcfg;
+#if __riscv_xlen == 32
+	unsigned long saved_menvcfgh;
+#endif
 	atomic_t start_ticket;
 };
 
@@ -419,6 +423,10 @@ void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
 	hdata->saved_mie = csr_read(CSR_MIE);
 	hdata->saved_mip = csr_read(CSR_MIP) & (MIP_SSIP | MIP_STIP);
 	hdata->saved_medeleg = csr_read(CSR_MEDELEG);
+#if __riscv_xlen == 32
+	hdata->saved_menvcfgh = csr_read(CSR_MENVCFGH);
+#endif
+	hdata->saved_menvcfg = csr_read(CSR_MENVCFG);
 }
 
 static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
@@ -426,6 +434,10 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
+	csr_write(CSR_MENVCFG, hdata->saved_menvcfg);
+#if __riscv_xlen == 32
+	csr_write(CSR_MENVCFGH, hdata->saved_menvcfgh);
+#endif
 	csr_write(CSR_MEDELEG, hdata->saved_medeleg);
 	csr_write(CSR_MIE, hdata->saved_mie);
 	csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));

From ecef14d5732f837cbfa4a8cefa8fed7953e7abfb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Wed, 19 Jun 2024 11:42:42 +0200
Subject: [PATCH 1597/1765] lib: sbi: implement SBI FWFT extension
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The SBI FWFT extension defines a set of function that can be called
to control the configuration of some platform features (misaligned
trap delegation, etc). This patch implements sbi_fwft_set() and
sbi_fwft_get() as defined in the specification [1].

Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/Kconfig          |  4 ++++
 lib/sbi/objects.mk       |  3 +++
 lib/sbi/sbi_ecall_fwft.c | 49 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 56 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_fwft.c

diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index cc8e0318cb0..6cf54ce4d38 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -38,6 +38,10 @@ config SBI_ECALL_CPPC
 	bool "CPPC extension"
 	default y
 
+config SBI_ECALL_FWFT
+	bool "Firmware Feature extension"
+	default y
+
 config SBI_ECALL_LEGACY
 	bool "SBI v0.1 legacy extensions"
 	default y
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 221e72cdfb7..211abad60fc 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -46,6 +46,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_DBCN) += sbi_ecall_dbcn.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_CPPC) += ecall_cppc
 libsbi-objs-$(CONFIG_SBI_ECALL_CPPC) += sbi_ecall_cppc.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_FWFT) += ecall_fwft
+libsbi-objs-$(CONFIG_SBI_ECALL_FWFT) += sbi_ecall_fwft.o
+
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_LEGACY) += ecall_legacy
 libsbi-objs-$(CONFIG_SBI_ECALL_LEGACY) += sbi_ecall_legacy.o
 
diff --git a/lib/sbi/sbi_ecall_fwft.c b/lib/sbi/sbi_ecall_fwft.c
new file mode 100644
index 00000000000..267cbab23fa
--- /dev/null
+++ b/lib/sbi/sbi_ecall_fwft.c
@@ -0,0 +1,49 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Rivos Inc.
+ *
+ * Authors:
+ *   Clément Léger <cleger@rivosinc.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_fwft.h>
+#include <sbi/sbi_trap.h>
+
+static int sbi_ecall_fwft_handler(unsigned long extid, unsigned long funcid,
+				 struct sbi_trap_regs *regs,
+				 struct sbi_ecall_return *out)
+{
+	int ret = 0;
+
+	switch (funcid) {
+	case SBI_EXT_FWFT_SET:
+		ret = sbi_fwft_set(regs->a0, regs->a1, regs->a2);
+		break;
+	case SBI_EXT_FWFT_GET:
+		ret = sbi_fwft_get(regs->a0, &out->value);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+		break;
+	}
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_fwft;
+
+static int sbi_ecall_fwft_register_extensions(void)
+{
+	return sbi_ecall_register_extension(&ecall_fwft);
+}
+
+struct sbi_ecall_extension ecall_fwft = {
+	.extid_start = SBI_EXT_FWFT,
+	.extid_end = SBI_EXT_FWFT,
+	.register_extensions = sbi_ecall_fwft_register_extensions,
+	.handle = sbi_ecall_fwft_handler,
+};

From e8717d126401435896b0e96c18e187f0b2431d5e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Mon, 24 Jun 2024 12:29:08 +0200
Subject: [PATCH 1598/1765] lib: sbi: fwft: check feature value to be exactly 1
 or 0
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

As stated by the spec and pointed out by Andrew Jones, the value passed
for MISALIGNED_EXC_DELEG and PTE_AD_HW_UPDATING should be either 0 or 1.
Add check for these values and return SBI_EINVAL if not.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index aff087fbc62..595819b6877 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -84,10 +84,12 @@ static int fwft_misaligned_delegation_supported(struct fwft_config *conf)
 static int fwft_set_misaligned_delegation(struct fwft_config *conf,
 					 unsigned long value)
 {
-	if (value)
+	if (value == 1)
 		csr_set(CSR_MEDELEG, MIS_DELEG);
-	else
+	else if (value == 0)
 		csr_clear(CSR_MEDELEG, MIS_DELEG);
+	else
+		return SBI_EINVAL;
 
 	return SBI_OK;
 }
@@ -111,18 +113,20 @@ static int fwft_adue_supported(struct fwft_config *conf)
 
 static int fwft_set_adue(struct fwft_config *conf, unsigned long value)
 {
-	if (value)
+	if (value == 1)
 #if __riscv_xlen == 32
 		csr_set(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
 #else
 		csr_set(CSR_MENVCFG, ENVCFG_ADUE);
 #endif
-	else
+	else if (value == 0)
 #if __riscv_xlen == 32
 		csr_clear(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
 #else
 		csr_clear(CSR_MENVCFG, ENVCFG_ADUE);
 #endif
+	else
+		return SBI_EINVAL;
 
 	return SBI_OK;
 }

From caae2f7d455c78c509782e1eb8d47dfdd874b903 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Mon, 24 Jun 2024 12:29:09 +0200
Subject: [PATCH 1599/1765] lib: sbi: fwft: return SBI_EINVAL rather than
 SBI_ERR_INVALID_PARAM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Error code returned by the ecall handles should use the defines from
sbi_ecall_interface.h rather than sbi_error.h.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index 595819b6877..f1ae91592fb 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -196,7 +196,7 @@ int sbi_fwft_set(enum sbi_fwft_feature_t feature, unsigned long value,
 		return ret;
 
 	if ((flags & ~SBI_FWFT_SET_FLAG_LOCK) != 0)
-		return SBI_ERR_INVALID_PARAM;
+		return SBI_EINVAL;
 
 	if (conf->flags & SBI_FWFT_SET_FLAG_LOCK)
 		return SBI_EDENIED;

From 0e45b634713d8a67d8a905e8970e93682c1db64f Mon Sep 17 00:00:00 2001
From: Jacob Lin <lovetaeyeon507@gmail.com>
Date: Thu, 27 Jun 2024 11:21:37 +0800
Subject: [PATCH 1600/1765] docs: Fix wrong filename

Correct the compiled FW_PAYLOAD firmware ELF filename.

Signed-off-by: Jacob Lin <lovetaeyeon507@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/firmware/fw_payload.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/firmware/fw_payload.md b/docs/firmware/fw_payload.md
index d25be600c6a..9b00e322674 100644
--- a/docs/firmware/fw_payload.md
+++ b/docs/firmware/fw_payload.md
@@ -23,7 +23,7 @@ The *FW_PAYLOAD* firmware can be enabled by any of the following methods:
 2. Specifying `FW_PAYLOAD=y` in the target platform *objects.mk* configuration
    file.
 
-The compiled *FW_PAYLOAD* firmware ELF file is named *fw_jump.elf*. Its
+The compiled *FW_PAYLOAD* firmware ELF file is named *fw_payload.elf*. Its
 expanded image file is *fw_payload.bin*. Both files are created in the
 platform-specific build directory under the
 *build/platform/<platform_subdir>/firmware* directory.

From 23b7badeee3caa1445784273ba5dc8dbcbba7c34 Mon Sep 17 00:00:00 2001
From: Sergey Matyukevich <geomatsi@gmail.com>
Date: Thu, 27 Jun 2024 15:04:09 +0300
Subject: [PATCH 1601/1765] lib: sbi: check incoming dbtr shmem address

Current Debug Trigger SBI extension proposal suggests to activate
shmem area and obtain its physical address from S-mode software
in the following way:

: If both `shmem_phys_lo` and `shmem_phys_hi` parameters are not
: all-ones bitwise then `shmem_phys_lo` specifies the lower XLEN
: bits and `shmem_phys_hi` specifies the upper XLEN bits of the
: shared memory physical base address. The `shmem_phys_lo` MUST
: be `(XLEN / 8)` byte aligned and the size of shared memory is
: assumed to be `trig_max * (XLEN / 2)` bytes.

For more details see the current version of the proposal:
- https://lists.riscv.org/g/tech-debug/message/1302

On the other hand, on RV32, the M-mode can only access the first 4GB of
the physical address space because M-mode does not have MMU to access
full 34-bit physical address space. Similarly, on RV64, the M-mode can
only access memory addressed by 64 bits.

This commit checks shmem address in function sbi_dbtr_setup_shmem
to make sure that shmem_phys_hi part of the valid address is zero.
Besides, the macro DBTR_SHMEM_MAKE_PHYS is updated to take into
account only low XLEN part.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_dbtr.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 9c92af6a59f..6e2083edf7d 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -47,13 +47,7 @@ static unsigned long hart_state_ptr_offset;
 	     _idx < _max;						\
 	     _idx++, _entry = ((_etype *)_base + _idx))
 
-#if __riscv_xlen == 64
 #define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (_p_lo)
-#elif __riscv_xlen == 32
-#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
-#else
-#error "Undefined XLEN"
-#endif
 
 /* must call with hs != NULL */
 static inline bool sbi_dbtr_shmem_disabled(
@@ -277,6 +271,20 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 	if (shmem_phys_lo & SBI_DBTR_SHMEM_ALIGN_MASK)
 		return SBI_ERR_INVALID_PARAM;
 
+	/*
+	* On RV32, the M-mode can only access the first 4GB of
+	* the physical address space because M-mode does not have
+	* MMU to access full 34-bit physical address space.
+	* So fail if the upper 32 bits of the physical address
+	* is non-zero on RV32.
+	*
+	* On RV64, kernel sets upper 64bit address part to zero.
+	* So fail if the upper 64bit of the physical address
+	* is non-zero on RV64.
+	*/
+	if (shmem_phys_hi)
+		return SBI_EINVALID_ADDR;
+
 	if (dom && !sbi_domain_check_addr(dom,
 		  DBTR_SHMEM_MAKE_PHYS(shmem_phys_hi, shmem_phys_lo), smode,
 		  SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))

From 455de672dd7c2aa1992df54dfb08dc11abbc1b1a Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sun, 30 Jun 2024 14:03:26 +0530
Subject: [PATCH 1602/1765] include: Bump-up version to 1.5

This patch updates OpenSBI version to 1.5 as part of
release preparation.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_version.h b/include/sbi/sbi_version.h
index 8d9e395bd8f..d876aa5038a 100644
--- a/include/sbi/sbi_version.h
+++ b/include/sbi/sbi_version.h
@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 4
+#define OPENSBI_VERSION_MINOR 5
 
 /**
  * OpenSBI 32-bit version with:

From c531adbf08cf9cd4cad0bc0c1fbf6e8333955e44 Mon Sep 17 00:00:00 2001
From: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Date: Mon, 24 Jun 2024 16:42:01 +0800
Subject: [PATCH 1603/1765] .github: Add repo lockdown GitHub workflow and
 update .gitignore

This commit adds a new GitHub Actions workflow for repository
lockdown. The workflow triggers when a pull request is opened, and it
notifies the contributor to use the OpenSBI mailing list for patch
reviews.

Additionally, the .gitignore file is updated to include the .github
directory.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Anup Patel <anup@branifault.org>
---
 .github/workflows/repo-lockdown.yml | 26 ++++++++++++++++++++++++++
 .gitignore                          |  1 +
 2 files changed, 27 insertions(+)
 create mode 100644 .github/workflows/repo-lockdown.yml

diff --git a/.github/workflows/repo-lockdown.yml b/.github/workflows/repo-lockdown.yml
new file mode 100644
index 00000000000..d74a7599751
--- /dev/null
+++ b/.github/workflows/repo-lockdown.yml
@@ -0,0 +1,26 @@
+name: 'Repo Lockdown'
+
+on:
+  pull_request_target:
+    types: opened
+
+permissions:
+  pull-requests: write
+
+jobs:
+  action:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: dessant/repo-lockdown@v4
+        with:
+          pr-comment: |
+            We have mailing list based patch review so it would be great if you can send these patchs to OpenSBI mailing list.
+
+            You need to join OpenSBI mailing list using following link
+            http://lists.infradead.org/mailman/listinfo/opensbi
+
+            Make sure you use "git send-email" to send the patches.
+
+            Thanks for your contribution to OpenSBI project.
+          lock-pr: true
+          close-pr: true
diff --git a/.gitignore b/.gitignore
index fbba52e1e33..a519d67f5c5 100644
--- a/.gitignore
+++ b/.gitignore
@@ -4,6 +4,7 @@
 # exceptions we need even begin with dot
 !.clang-format
 !.gitignore
+!.github
 
 # Object files
 *.o

From d8608e615fae150ddb54e9b54d0e1fb5f16a9d9c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 1 Jul 2024 07:54:58 -0700
Subject: [PATCH 1604/1765] lib: sbi_emulate_csr: Do not log illegal CSR
 accesses

Illegal CSR accesses from lower privilege modes are delegated to S-mode
and do not necessarily indicate a bug. Supervisor software may want to
emulate some CSRs, or may intentionally disable access to certain
existing CSRs, and thus will expect traps when those CSRs are accessed.

For example, Linux disables sstatus.VS by default in order to detect
when userspace first accesses vector register state; this includes the
CSRs defined by the V extesion. As a result, if the first vector
instruction in a process is a CSR access, OpenSBI will log the illegal
instruction exception, even though there is no unexpected or erroneous
behavior occurring.

Since the illegal instruction exception is delegated to S-mode, S-mode
software should be responsible for reporting the exception, not OpenSBI.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_emulate_csr.c | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 5f3b111d69f..869c81f4ed8 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -10,7 +10,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/sbi_bitops.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_emulate_csr.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_hart.h>
@@ -151,10 +150,6 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 		break;
 	}
 
-	if (ret)
-		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
-			    __func__, current_hartid(), csr_num);
-
 	return ret;
 }
 
@@ -189,9 +184,5 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 		break;
 	}
 
-	if (ret)
-		sbi_dprintf("%s: hartid%d: invalid csr_num=0x%x\n",
-			    __func__, current_hartid(), csr_num);
-
 	return ret;
 }

From 75ad25ab59fdb7d00cfab6f3646c635e51de07e0 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 1 Jul 2024 15:10:58 +0100
Subject: [PATCH 1605/1765] scripts/carray.sh: Add comment to generated files

Add a comment about where auto-generated file came from to the carray.sh
output. This should help avoiding confusion for the developers looking
at the build artifacts and finding .c files there.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 scripts/carray.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/carray.sh b/scripts/carray.sh
index 13f9d360fb8..1fa2366ac40 100755
--- a/scripts/carray.sh
+++ b/scripts/carray.sh
@@ -61,6 +61,7 @@ if [ -z "${ARRAY_NAME}" ]; then
 	usage
 fi
 
+printf "// Generated with $(basename $0) from $(basename ${CONFIG_FILE})\n"
 printf "#include <%s>\n\n" "${TYPE_HEADER}"
 
 for VAR in ${VAR_LIST}; do

From fd9e8b17ed5017d2914f5fc7eb42ff24ff5c097b Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@codethink.co.uk>
Date: Mon, 1 Jul 2024 15:10:59 +0100
Subject: [PATCH 1606/1765] Makefile: change to using .carray.c for carray
 files

We would like to clean any files generated by the carray
scripts by just searching for the filename as the current
make system turns f.carray into f.o. Change to make the
make system turn f.carray into f.carray.o

note, command to go through .mk files changing the .o
in the .mk files is:
find . -type f -name "*.carray" | xargs -t -I fname /bin/bash -x -c ' fn=`basename -s .carray fname`; echo "$fn"; sed -i `dirname fname `/objects.mk -e s/"$fn".o/"$fn".carray.o/g'

Link: https://patchwork.ozlabs.org/project/opensbi/patch/20240401213438.590209-2-ivan.orlov0322@gmail.com/
Reported-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile                     | 8 ++++----
 lib/sbi/objects.mk           | 2 +-
 lib/sbi/tests/objects.mk     | 2 +-
 lib/utils/gpio/objects.mk    | 2 +-
 lib/utils/i2c/objects.mk     | 2 +-
 lib/utils/ipi/objects.mk     | 2 +-
 lib/utils/irqchip/objects.mk | 2 +-
 lib/utils/regmap/objects.mk  | 2 +-
 lib/utils/reset/objects.mk   | 2 +-
 lib/utils/serial/objects.mk  | 2 +-
 lib/utils/timer/objects.mk   | 2 +-
 platform/generic/objects.mk  | 2 +-
 12 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/Makefile b/Makefile
index 7df39b4e793..55523b11225 100644
--- a/Makefile
+++ b/Makefile
@@ -489,7 +489,7 @@ compile_d2c = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     $(src_dir)/scripts/d2c.sh -i $(6) -a $(D2C_ALIGN_BYTES) -p $(D2C_NAME_PREFIX) -t $(D2C_PADDING_BYTES) > $(1)
 compile_carray = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CARRAY    $(subst $(build_dir)/,,$(1))"; \
-	     $(eval CARRAY_VAR_LIST := $(carray-$(subst .c,,$(shell basename $(1)))-y)) \
+	     $(eval CARRAY_VAR_LIST := $(carray-$(subst .carray.c,,$(shell basename $(1)))-y)) \
 	     $(src_dir)/scripts/carray.sh -i $(2) -l "$(CARRAY_VAR_LIST)" > $(1)
 compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " GEN-DEP   $(subst $(build_dir)/,,$(1))"; \
@@ -519,7 +519,7 @@ $(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(build_dir)/%.c: $(src_dir)/%.carray
+$(build_dir)/%.carray.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -547,7 +547,7 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.c: $(platform_src_dir)/%.carray
+$(platform_build_dir)/%.carray.c: $(platform_src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -590,7 +590,7 @@ $(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.c: $(src_dir)/%.carray
+$(platform_build_dir)/%.carray.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 211abad60fc..535aa709743 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -13,7 +13,7 @@ libsbi-objs-y += riscv_hardfp.o
 libsbi-objs-y += riscv_locks.o
 
 libsbi-objs-y += sbi_ecall.o
-libsbi-objs-y += sbi_ecall_exts.o
+libsbi-objs-y += sbi_ecall_exts.carray.o
 
 # The order of below extensions is performance optimized
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_TIME) += ecall_time
diff --git a/lib/sbi/tests/objects.mk b/lib/sbi/tests/objects.mk
index 8f272897ade..369b2829fc9 100644
--- a/lib/sbi/tests/objects.mk
+++ b/lib/sbi/tests/objects.mk
@@ -1,5 +1,5 @@
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_unit_test.o
-libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_unit_tests.o
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_unit_tests.carray.o
 
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += bitmap_test_suite
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_bitmap_test.o
diff --git a/lib/utils/gpio/objects.mk b/lib/utils/gpio/objects.mk
index 76647a591d5..521068388db 100644
--- a/lib/utils/gpio/objects.mk
+++ b/lib/utils/gpio/objects.mk
@@ -8,7 +8,7 @@
 #
 
 libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio.o
-libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_GPIO) += gpio/fdt_gpio_drivers.carray.o
 
 carray-fdt_gpio_drivers-$(CONFIG_FDT_GPIO_DESIGNWARE) += fdt_gpio_designware
 libsbiutils-objs-$(CONFIG_FDT_GPIO_DESIGNWARE) += gpio/fdt_gpio_designware.o
diff --git a/lib/utils/i2c/objects.mk b/lib/utils/i2c/objects.mk
index 5f7a79ff3d3..d34d6648ae0 100644
--- a/lib/utils/i2c/objects.mk
+++ b/lib/utils/i2c/objects.mk
@@ -10,7 +10,7 @@
 libsbiutils-objs-$(CONFIG_I2C) += i2c/i2c.o
 
 libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c.o
-libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c_adapter_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_I2C) += i2c/fdt_i2c_adapter_drivers.carray.o
 
 carray-fdt_i2c_adapter_drivers-$(CONFIG_FDT_I2C_SIFIVE) += fdt_i2c_adapter_sifive
 libsbiutils-objs-$(CONFIG_FDT_I2C_SIFIVE) += i2c/fdt_i2c_sifive.o
diff --git a/lib/utils/ipi/objects.mk b/lib/utils/ipi/objects.mk
index 999e7bd9c24..d1c94af29d9 100644
--- a/lib/utils/ipi/objects.mk
+++ b/lib/utils/ipi/objects.mk
@@ -11,7 +11,7 @@ libsbiutils-objs-$(CONFIG_IPI_MSWI) += ipi/aclint_mswi.o
 libsbiutils-objs-$(CONFIG_IPI_PLICSW) += ipi/andes_plicsw.o
 
 libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi.o
-libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_IPI) += ipi/fdt_ipi_drivers.carray.o
 
 carray-fdt_ipi_drivers-$(CONFIG_FDT_IPI_MSWI) += fdt_ipi_mswi
 libsbiutils-objs-$(CONFIG_FDT_IPI_MSWI) += ipi/fdt_ipi_mswi.o
diff --git a/lib/utils/irqchip/objects.mk b/lib/utils/irqchip/objects.mk
index e45889177f0..a13b384e016 100644
--- a/lib/utils/irqchip/objects.mk
+++ b/lib/utils/irqchip/objects.mk
@@ -8,7 +8,7 @@
 #
 
 libsbiutils-objs-$(CONFIG_FDT_IRQCHIP) += irqchip/fdt_irqchip.o
-libsbiutils-objs-$(CONFIG_FDT_IRQCHIP) += irqchip/fdt_irqchip_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_IRQCHIP) += irqchip/fdt_irqchip_drivers.carray.o
 
 carray-fdt_irqchip_drivers-$(CONFIG_FDT_IRQCHIP_APLIC) += fdt_irqchip_aplic
 libsbiutils-objs-$(CONFIG_FDT_IRQCHIP_APLIC) += irqchip/fdt_irqchip_aplic.o
diff --git a/lib/utils/regmap/objects.mk b/lib/utils/regmap/objects.mk
index 5bd139f5d55..43487a5bc40 100644
--- a/lib/utils/regmap/objects.mk
+++ b/lib/utils/regmap/objects.mk
@@ -8,7 +8,7 @@
 #
 
 libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap.o
-libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_REGMAP) += regmap/fdt_regmap_drivers.carray.o
 
 carray-fdt_regmap_drivers-$(CONFIG_FDT_REGMAP_SYSCON) += fdt_regmap_syscon
 libsbiutils-objs-$(CONFIG_FDT_REGMAP_SYSCON) += regmap/fdt_regmap_syscon.o
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index 44944ca8279..a84336cf9c9 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -8,7 +8,7 @@
 #
 
 libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset.o
-libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_RESET) += reset/fdt_reset_drivers.carray.o
 
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_ATCWDT200) += fdt_reset_atcwdt200
 libsbiutils-objs-$(CONFIG_FDT_RESET_ATCWDT200) += reset/fdt_reset_atcwdt200.o
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 1e6bd2e6777..7c973c8385b 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -8,7 +8,7 @@
 #
 
 libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial.o
-libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_SERIAL) += serial/fdt_serial_drivers.carray.o
 
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_CADENCE) += fdt_serial_cadence
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_CADENCE) += serial/fdt_serial_cadence.o
diff --git a/lib/utils/timer/objects.mk b/lib/utils/timer/objects.mk
index 9360a76271b..92e0927e11c 100644
--- a/lib/utils/timer/objects.mk
+++ b/lib/utils/timer/objects.mk
@@ -11,7 +11,7 @@ libsbiutils-objs-$(CONFIG_TIMER_MTIMER) += timer/aclint_mtimer.o
 libsbiutils-objs-$(CONFIG_TIMER_PLMT) += timer/andes_plmt.o
 
 libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer.o
-libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer_drivers.o
+libsbiutils-objs-$(CONFIG_FDT_TIMER) += timer/fdt_timer_drivers.carray.o
 
 carray-fdt_timer_drivers-$(CONFIG_FDT_TIMER_MTIMER) += fdt_timer_mtimer
 libsbiutils-objs-$(CONFIG_FDT_TIMER_MTIMER) += timer/fdt_timer_mtimer.o
diff --git a/platform/generic/objects.mk b/platform/generic/objects.mk
index c215935e11a..c4a8fee2d2f 100644
--- a/platform/generic/objects.mk
+++ b/platform/generic/objects.mk
@@ -19,7 +19,7 @@ platform-runcmd = qemu-system-riscv$(PLATFORM_RISCV_XLEN) -M virt -m 256M \
 
 # Objects to build
 platform-objs-y += platform.o
-platform-objs-y += platform_override_modules.o
+platform-objs-y += platform_override_modules.carray.o
 
 # Blobs to build
 FW_DYNAMIC=y

From 1ede0cab0e12920068546a84b3f3f3a2750815d7 Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben.dooks@codethink.co.uk>
Date: Mon, 1 Jul 2024 15:11:00 +0100
Subject: [PATCH 1607/1765] Makefile: remove any .carray.c during clean

Now we've renamed the carray output files to .carray.c
we can now use find to remove them.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Makefile b/Makefile
index 55523b11225..9c7fd4d7450 100644
--- a/Makefile
+++ b/Makefile
@@ -687,6 +687,8 @@ clean:
 	$(CMD_PREFIX)mkdir -p $(build_dir)
 	$(if $(V), @echo " RM        $(build_dir)/*.o")
 	$(CMD_PREFIX)find $(build_dir) -type f -name "*.o" -exec rm -rf {} +
+	$(if $(V), @echo " RM        $(build_dir)/*.carray.c")
+	$(CMD_PREFIX)find $(build_dir) -type f -name "*.carray.c" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.a")
 	$(CMD_PREFIX)find $(build_dir) -type f -name "*.a" -exec rm -rf {} +
 	$(if $(V), @echo " RM        $(build_dir)/*.elf")

From 0a667542950ac108e609c2bdfed4c0df87363717 Mon Sep 17 00:00:00 2001
From: Ivan Orlov <ivan.orlov0322@gmail.com>
Date: Mon, 1 Jul 2024 15:11:01 +0100
Subject: [PATCH 1608/1765] docs: writing tests: update cleaning instructions

After the changes introduced by the previous patches are applied, there
is no need of the manual removal of the `build/` directory every time
new test is added. Running `make clean` should be enough to regenerate
the carray-related files.

Update the documentation correspondingly.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/writing_tests.md | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/docs/writing_tests.md b/docs/writing_tests.md
index 0fd15d67616..cee4c4d96e1 100644
--- a/docs/writing_tests.md
+++ b/docs/writing_tests.md
@@ -57,9 +57,7 @@ carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += string_test_suite
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_string_test.o
 ```
 
-If you compiled OpenSBI with CONFIG_SBIUNIT enabled before, you may need to
-manually remove the build folder in order to regenerate the carray files:
-`rm -rf build/`.
+Now, run `make clean` in order to regenerate the carray-related files.
 
 Recompile OpenSBI with the CONFIG_SBIUNIT option enabled and run it in QEMU.
 You will see something like this:

From c5c1d04346f759f16ca58e918fd394b5b4d4b176 Mon Sep 17 00:00:00 2001
From: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Date: Mon, 1 Jul 2024 10:17:28 +0800
Subject: [PATCH 1609/1765] lib: tests: enhance test output with colored
 pass/fail messages

This patch improves the readability of the SBI unit test
output by adding color-coded status messages.

Adding ANSI color codes for green (pass) and red (fail)
in sbi_unit_test.c.

Now, the test results will be displayed in green for passed
tests and red for failed tests, making it easier to quickly
distinguish between them.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/tests/sbi_unit_test.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/lib/sbi/tests/sbi_unit_test.c b/lib/sbi/tests/sbi_unit_test.c
index c2a0be683a7..cd091663090 100644
--- a/lib/sbi/tests/sbi_unit_test.c
+++ b/lib/sbi/tests/sbi_unit_test.c
@@ -7,6 +7,10 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_console.h>
 
+#define ANSI_COLOR_GREEN "\x1b[32m"
+#define ANSI_COLOR_RED "\x1b[31m"
+#define ANSI_COLOR_RESET "\x1b[0m"
+
 extern struct sbiunit_test_suite *sbi_unit_tests[];
 extern unsigned long sbi_unit_tests_size;
 
@@ -27,10 +31,13 @@ static void run_test_suite(struct sbiunit_test_suite *suite)
 			count_fail++;
 		else
 			count_pass++;
-		sbi_printf("[%s] %s\n", s_case->failed ? "FAILED" : "PASSED",
-			   s_case->name);
+		sbi_printf("%s[%s]%s %s\n",
+			   s_case->failed ? ANSI_COLOR_RED : ANSI_COLOR_GREEN,
+			   s_case->failed ? "FAILED" : "PASSED",
+			   ANSI_COLOR_RESET, s_case->name);
 		s_case++;
 	}
+
 	sbi_printf("%u PASSED / %u FAILED / %u TOTAL\n", count_pass, count_fail,
 		   count_pass + count_fail);
 }

From b7e7e660269106f0c56061c770704a5e5504a98c Mon Sep 17 00:00:00 2001
From: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Date: Mon, 1 Jul 2024 10:30:06 +0800
Subject: [PATCH 1610/1765] lib: tests: add math test suite

This patch introduces a new math test suite to the SBI unit
tests. The changes include:

* Updating lib/sbi/tests/objects.mk to include
  math_test_suite and sbi_math_test.o.
* Adding a new file lib/sbi/tests/sbi_math_test.c which
  contains tests for log2roundup function using various cases.

The addition of this test suite ensures that mathematical
functions are verified and work as expected.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/tests/objects.mk      |  3 +++
 lib/sbi/tests/sbi_math_test.c | 46 +++++++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)
 create mode 100644 lib/sbi/tests/sbi_math_test.c

diff --git a/lib/sbi/tests/objects.mk b/lib/sbi/tests/objects.mk
index 369b2829fc9..16608faef6a 100644
--- a/lib/sbi/tests/objects.mk
+++ b/lib/sbi/tests/objects.mk
@@ -12,3 +12,6 @@ libsbi-objs-$(CONFIG_SBIUNIT) += tests/riscv_atomic_test.o
 
 carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += locks_test_suite
 libsbi-objs-$(CONFIG_SBIUNIT) += tests/riscv_locks_test.o
+
+carray-sbi_unit_tests-$(CONFIG_SBIUNIT) += math_test_suite
+libsbi-objs-$(CONFIG_SBIUNIT) += tests/sbi_math_test.o
\ No newline at end of file
diff --git a/lib/sbi/tests/sbi_math_test.c b/lib/sbi/tests/sbi_math_test.c
new file mode 100644
index 00000000000..81ed832450a
--- /dev/null
+++ b/lib/sbi/tests/sbi_math_test.c
@@ -0,0 +1,46 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright  2024  Beijing ESWIN Computing Technology Co., Ltd.
+ *
+ * Author: Dongdong Zhang <zhangdongdong@eswincomputing.com>
+ */
+#include <sbi/sbi_math.h>
+#include <sbi/sbi_unit_test.h>
+
+static void log2roundup_test(struct sbiunit_test_case *test)
+{
+    struct {
+        unsigned long input;
+        unsigned long expected;
+    } cases[] = {
+        {1, 0},
+        {2, 1},
+        {3, 2},
+        {4, 2},
+        {5, 3},
+        {8, 3},
+        {9, 4},
+        {15, 4},
+        {16, 4},
+        {17, 5},
+        {31, 5},
+        {32, 5},
+        {33, 6},
+        {63, 6},
+        {64, 6},
+        {65, 7},
+    };
+
+    for (int i = 0; i < sizeof(cases)/sizeof(cases[0]); i++) {
+        unsigned long result = log2roundup(cases[i].input);
+        SBIUNIT_EXPECT_EQ(test, result, cases[i].expected);
+    }
+}
+
+static struct sbiunit_test_case math_test_cases[] = {
+    SBIUNIT_TEST_CASE(log2roundup_test),
+    SBIUNIT_END_CASE,
+};
+
+SBIUNIT_TEST_SUITE(math_test_suite, math_test_cases);

From f7a92f6b67bda221e96eb8dfa54e1eb162fa984f Mon Sep 17 00:00:00 2001
From: Conor Dooley <conor.dooley@microchip.com>
Date: Tue, 2 Jul 2024 11:59:11 +0100
Subject: [PATCH 1611/1765] lib: utils/fdt: Add support for parsing
 riscv,isa-extensions

A new property has been added, with an extensive rationale at [1], that
can be used in place of "riscv,isa" to indicate what extensions are
supported by a given platform that is a list of strings rather than a
single string. There are some differences between the new property,
"riscv,isa-extensions" and the incumbent "riscv,isa" - chief among them
for the sake of parsing being the list of strings, as opposed to a
string. Another advantage is strictly defined meanings for each string
in a dt-binding, rather than deriving meaning from RVI standards. This
may likely to some divergence over time, but, at least for now, there's
no relevant differences between the two for an M-Mode program.

Add support for the new property in OpenSBI, prioritising it, before
falling back to the, now deprecated, "riscv,isa" property if it is not
present.

Link: https://lore.kernel.org/all/20230702-eats-scorebook-c951f170d29f@spud/ [1]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_helper.c | 27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index 9a945af4213..b7f7e075c45 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -411,6 +411,18 @@ static int fdt_parse_isa_one_hart(const char *isa, unsigned long *extensions)
 	return 0;
 }
 
+static void fdt_parse_isa_extensions_one_hart(const char *isa,
+					      unsigned long *extensions,
+					      int len)
+{
+	size_t i;
+
+	for (i = 0; i < SBI_HART_EXT_MAX; i++) {
+		if (fdt_stringlist_contains(isa, len, sbi_hart_ext[i].name))
+			__set_bit(sbi_hart_ext[i].id, extensions);
+	}
+}
+
 static int fdt_parse_isa_all_harts(void *fdt)
 {
 	u32 hartid;
@@ -434,10 +446,6 @@ static int fdt_parse_isa_all_harts(void *fdt)
 		if (!fdt_node_is_enabled(fdt, cpu_offset))
 			continue;
 
-		val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len);
-		if (!val || len <= 0)
-			return SBI_ENOENT;
-
 		scratch = sbi_hartid_to_scratch(hartid);
 		if (!scratch)
 			return SBI_ENOENT;
@@ -445,6 +453,17 @@ static int fdt_parse_isa_all_harts(void *fdt)
 		hart_exts = sbi_scratch_offset_ptr(scratch,
 						   fdt_isa_bitmap_offset);
 
+		val = fdt_getprop(fdt, cpu_offset, "riscv,isa-extensions", &len);
+		if (val && len > 0) {
+			fdt_parse_isa_extensions_one_hart((const char *)val,
+							  hart_exts, len);
+			continue;
+		}
+
+		val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len);
+		if (!val || len <= 0)
+			return SBI_ENOENT;
+
 		err = fdt_parse_isa_one_hart((const char *)val, hart_exts);
 		if (err)
 			return err;

From 4afb57c9ebe27e29ce3777024bfc186991a8b4fe Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Wed, 10 Jul 2024 07:26:06 -0700
Subject: [PATCH 1612/1765] lib: sbi_hsm: Save/restore menvcfg only when it
 exists

Attempting to access the menvcfg CSR raises an illegal instruction
exception on hardware which implements Sm1p11 or older.

Fixes: e9ee9678ba50 ("lib: sbi: fwft: add support for SBI_FWFT_PTE_AD_HW_UPDATING")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hsm.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 7e32af371b7..3706acfb199 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -423,10 +423,12 @@ void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch)
 	hdata->saved_mie = csr_read(CSR_MIE);
 	hdata->saved_mip = csr_read(CSR_MIP) & (MIP_SSIP | MIP_STIP);
 	hdata->saved_medeleg = csr_read(CSR_MEDELEG);
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
 #if __riscv_xlen == 32
-	hdata->saved_menvcfgh = csr_read(CSR_MENVCFGH);
+		hdata->saved_menvcfgh = csr_read(CSR_MENVCFGH);
 #endif
-	hdata->saved_menvcfg = csr_read(CSR_MENVCFG);
+		hdata->saved_menvcfg = csr_read(CSR_MENVCFG);
+	}
 }
 
 static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
@@ -434,10 +436,12 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch)
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
 							    hart_data_offset);
 
-	csr_write(CSR_MENVCFG, hdata->saved_menvcfg);
+	if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
+		csr_write(CSR_MENVCFG, hdata->saved_menvcfg);
 #if __riscv_xlen == 32
-	csr_write(CSR_MENVCFGH, hdata->saved_menvcfgh);
+		csr_write(CSR_MENVCFGH, hdata->saved_menvcfgh);
 #endif
+	}
 	csr_write(CSR_MEDELEG, hdata->saved_medeleg);
 	csr_write(CSR_MIE, hdata->saved_mie);
 	csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));

From 9e8a18fd0dd72de8cda71f7278cafa7033ae2d34 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 4 Jul 2024 12:15:58 +0530
Subject: [PATCH 1613/1765] platform: Setup serial console device in
 early_init()

The sbi_console_init() does not do any special initialization so
setup serial console device in early_init() so that console prints
work as early as possible.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 platform/fpga/ariane/platform.c    | 26 +++++++++-----------------
 platform/fpga/openpiton/platform.c | 20 ++++----------------
 platform/generic/platform.c        | 21 +++++++++++----------
 platform/kendryte/k210/platform.c  | 18 ++++++------------
 platform/nuclei/ux600/platform.c   | 18 +++++++-----------
 platform/template/platform.c       | 18 ++++++------------
 6 files changed, 43 insertions(+), 78 deletions(-)

diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 8be5e6ca385..8d46d8880fd 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -7,7 +7,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_io.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
@@ -67,8 +66,15 @@ static struct aclint_mtimer_data mtimer = {
  */
 static int ariane_early_init(bool cold_boot)
 {
-	/* For now nothing to do. */
-	return 0;
+	if (!cold_boot)
+		return 0;
+
+	return uart8250_init(ARIANE_UART_ADDR,
+			     ARIANE_UART_FREQ,
+			     ARIANE_UART_BAUDRATE,
+			     ARIANE_UART_REG_SHIFT,
+			     ARIANE_UART_REG_WIDTH,
+			     ARIANE_UART_REG_OFFSET);
 }
 
 /*
@@ -87,19 +93,6 @@ static int ariane_final_init(bool cold_boot)
 	return 0;
 }
 
-/*
- * Initialize the ariane console.
- */
-static int ariane_console_init(void)
-{
-	return uart8250_init(ARIANE_UART_ADDR,
-			     ARIANE_UART_FREQ,
-			     ARIANE_UART_BAUDRATE,
-			     ARIANE_UART_REG_SHIFT,
-			     ARIANE_UART_REG_WIDTH,
-			     ARIANE_UART_REG_OFFSET);
-}
-
 static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
 	int ret;
@@ -175,7 +168,6 @@ static int ariane_timer_init(bool cold_boot)
 const struct sbi_platform_operations platform_ops = {
 	.early_init = ariane_early_init,
 	.final_init = ariane_final_init,
-	.console_init = ariane_console_init,
 	.irqchip_init = ariane_irqchip_init,
 	.ipi_init = ariane_ipi_init,
 	.timer_init = ariane_timer_init,
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 2317a899e8d..dd74a0c23c8 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -6,7 +6,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
 #include <sbi/riscv_io.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
@@ -103,7 +102,10 @@ static int openpiton_early_init(bool cold_boot)
 				    ACLINT_DEFAULT_MTIMECMP_OFFSET;
 	}
 
-	return 0;
+	return uart8250_init(uart.addr, uart.freq, uart.baud,
+			     OPENPITON_DEFAULT_UART_REG_SHIFT,
+			     OPENPITON_DEFAULT_UART_REG_WIDTH,
+			     OPENPITON_DEFAULT_UART_REG_OFFSET);
 }
 
 /*
@@ -122,19 +124,6 @@ static int openpiton_final_init(bool cold_boot)
 	return 0;
 }
 
-/*
- * Initialize the openpiton console.
- */
-static int openpiton_console_init(void)
-{
-	return uart8250_init(uart.addr,
-			     uart.freq,
-			     uart.baud,
-			     OPENPITON_DEFAULT_UART_REG_SHIFT,
-			     OPENPITON_DEFAULT_UART_REG_WIDTH,
-			     OPENPITON_DEFAULT_UART_REG_OFFSET);
-}
-
 static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
 {
 	int ret;
@@ -210,7 +199,6 @@ static int openpiton_timer_init(bool cold_boot)
 const struct sbi_platform_operations platform_ops = {
 	.early_init = openpiton_early_init,
 	.final_init = openpiton_final_init,
-	.console_init = openpiton_console_init,
 	.irqchip_init = openpiton_irqchip_init,
 	.ipi_init = openpiton_ipi_init,
 	.timer_init = openpiton_timer_init,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 1f46b76c4d7..3470474a225 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -221,9 +221,19 @@ static int generic_nascent_init(void)
 
 static int generic_early_init(bool cold_boot)
 {
-	if (cold_boot)
+	int rc;
+
+	if (cold_boot) {
 		fdt_reset_init();
 
+		if (semihosting_enabled())
+			rc = semihosting_init();
+		else
+			rc = fdt_serial_init();
+		if (rc)
+			return rc;
+	}
+
 	if (!generic_plat || !generic_plat->early_init)
 		return 0;
 
@@ -378,14 +388,6 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
 	return evt_val;
 }
 
-static int generic_console_init(void)
-{
-	if (semihosting_enabled())
-		return semihosting_init();
-	else
-		return fdt_serial_init();
-}
-
 const struct sbi_platform_operations platform_ops = {
 	.cold_boot_allowed	= generic_cold_boot_allowed,
 	.nascent_init		= generic_nascent_init,
@@ -395,7 +397,6 @@ const struct sbi_platform_operations platform_ops = {
 	.final_exit		= generic_final_exit,
 	.extensions_init	= generic_extensions_init,
 	.domains_init		= generic_domains_init,
-	.console_init		= generic_console_init,
 	.irqchip_init		= fdt_irqchip_init,
 	.irqchip_exit		= fdt_irqchip_exit,
 	.ipi_init		= fdt_ipi_init,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 27b23f7326d..531adcd51fc 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -9,7 +9,6 @@
 
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
@@ -109,10 +108,13 @@ static struct sbi_system_reset_device k210_reset = {
 
 static int k210_early_init(bool cold_boot)
 {
-	if (cold_boot)
-		sbi_system_reset_add_device(&k210_reset);
+	if (!cold_boot)
+		return 0;
 
-	return 0;
+	sbi_system_reset_add_device(&k210_reset);
+
+	return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
+				K210_UART_BAUDRATE);
 }
 
 static int k210_final_init(bool cold_boot)
@@ -130,12 +132,6 @@ static int k210_final_init(bool cold_boot)
 	return 0;
 }
 
-static int k210_console_init(void)
-{
-	return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
-				K210_UART_BAUDRATE);
-}
-
 static int k210_irqchip_init(bool cold_boot)
 {
 	int rc;
@@ -181,8 +177,6 @@ const struct sbi_platform_operations platform_ops = {
 
 	.final_init	= k210_final_init,
 
-	.console_init	= k210_console_init,
-
 	.irqchip_init = k210_irqchip_init,
 
 	.ipi_init  = k210_ipi_init,
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index f688b50a68d..2289366cd31 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -11,7 +11,6 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/riscv_io.h>
 #include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
@@ -150,8 +149,10 @@ static int ux600_early_init(bool cold_boot)
 {
 	u32 regval;
 
-	if (cold_boot)
-		sbi_system_reset_add_device(&ux600_reset);
+	if (!cold_boot)
+		return 0;
+
+	sbi_system_reset_add_device(&ux600_reset);
 
 	/* Measure CPU Frequency using Timer */
 	ux600_clk_freq = ux600_get_clk_freq();
@@ -163,7 +164,9 @@ static int ux600_early_init(bool cold_boot)
 	regval = readl((void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS)) |
 		UX600_GPIO_IOF_UART0_MASK;
 	writel(regval, (void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS));
-	return 0;
+
+	return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
+				UX600_UART_BAUDRATE);
 }
 
 static void ux600_modify_dt(void *fdt)
@@ -184,12 +187,6 @@ static int ux600_final_init(bool cold_boot)
 	return 0;
 }
 
-static int ux600_console_init(void)
-{
-	return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
-				UX600_UART_BAUDRATE);
-}
-
 static int ux600_irqchip_init(bool cold_boot)
 {
 	int rc;
@@ -234,7 +231,6 @@ static int ux600_timer_init(bool cold_boot)
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= ux600_early_init,
 	.final_init		= ux600_final_init,
-	.console_init		= ux600_console_init,
 	.irqchip_init		= ux600_irqchip_init,
 	.ipi_init		= ux600_ipi_init,
 	.timer_init		= ux600_timer_init,
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 4b3f2acff97..b4d30a57a39 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -64,7 +64,12 @@ static struct aclint_mtimer_data mtimer = {
  */
 static int platform_early_init(bool cold_boot)
 {
-	return 0;
+	if (!cold_boot)
+		return 0;
+
+	/* Example if the generic UART8250 driver is used */
+	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
+			     PLATFORM_UART_BAUDRATE, 0, 1, 0);
 }
 
 /*
@@ -75,16 +80,6 @@ static int platform_final_init(bool cold_boot)
 	return 0;
 }
 
-/*
- * Initialize the platform console.
- */
-static int platform_console_init(void)
-{
-	/* Example if the generic UART8250 driver is used */
-	return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
-			     PLATFORM_UART_BAUDRATE, 0, 1, 0);
-}
-
 /*
  * Initialize the platform interrupt controller for current HART.
  */
@@ -143,7 +138,6 @@ static int platform_timer_init(bool cold_boot)
 const struct sbi_platform_operations platform_ops = {
 	.early_init		= platform_early_init,
 	.final_init		= platform_final_init,
-	.console_init		= platform_console_init,
 	.irqchip_init		= platform_irqchip_init,
 	.ipi_init		= platform_ipi_init,
 	.timer_init		= platform_timer_init

From 119b15a5535bc6f466a7f89857fcce820fe2b290 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 4 Jul 2024 21:09:17 +0530
Subject: [PATCH 1614/1765] lib: sbi: Remove sbi_console_init() and
 console_init() platform callback

Now that all platforms have been updated to initialize serial console
device in early_init(), the sbi_console_init() and console_init()
platform callback are redundant hence remove them.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 include/sbi/sbi_console.h  |  2 --
 include/sbi/sbi_platform.h | 17 -----------------
 lib/sbi/sbi_console.c      | 11 -----------
 lib/sbi/sbi_init.c         |  4 ----
 4 files changed, 34 deletions(-)

diff --git a/include/sbi/sbi_console.h b/include/sbi/sbi_console.h
index 0979765240c..3097db1e5f6 100644
--- a/include/sbi/sbi_console.h
+++ b/include/sbi/sbi_console.h
@@ -58,8 +58,6 @@ void sbi_console_set_device(const struct sbi_console_device *dev);
 
 struct sbi_scratch;
 
-int sbi_console_init(struct sbi_scratch *scratch);
-
 #define SBI_ASSERT(cond, args) do { \
 	if (unlikely(!(cond))) \
 		sbi_panic args; \
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 581935abcea..7b3ac4bf077 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -111,9 +111,6 @@ struct sbi_platform_operations {
 	/** Get platform specific mhpmevent value */
 	uint64_t (*pmu_xlate_to_mhpmevent)(uint32_t event_idx, uint64_t data);
 
-	/** Initialize the platform console */
-	int (*console_init)(void);
-
 	/** Initialize the platform interrupt controller for current HART */
 	int (*irqchip_init)(bool cold_boot);
 	/** Exit the platform interrupt controller for current HART */
@@ -549,20 +546,6 @@ static inline uint64_t sbi_platform_pmu_xlate_to_mhpmevent(const struct sbi_plat
 	return 0;
 }
 
-/**
- * Initialize the platform console
- *
- * @param plat pointer to struct sbi_platform
- *
- * @return 0 on success and negative error code on failure
- */
-static inline int sbi_platform_console_init(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->console_init)
-		return sbi_platform_ops(plat)->console_init();
-	return 0;
-}
-
 /**
  * Initialize the platform interrupt controller for current HART
  *
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index d3ec4616f03..194529dc99f 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -477,14 +477,3 @@ void sbi_console_set_device(const struct sbi_console_device *dev)
 
 	console_dev = dev;
 }
-
-int sbi_console_init(struct sbi_scratch *scratch)
-{
-	int rc = sbi_platform_console_init(sbi_platform_ptr(scratch));
-
-	/* console is not a necessary device */
-	if (rc == SBI_ENODEV)
-		return 0;
-
-	return rc;
-}
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 0f9e14cc390..d80efe970fe 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -261,10 +261,6 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	if (rc)
 		sbi_hart_hang();
 
-	rc = sbi_console_init(scratch);
-	if (rc)
-		sbi_hart_hang();
-
 	rc = sbi_sse_init(scratch, true);
 	if (rc) {
 		sbi_printf("%s: sse init failed (error %d)\n", __func__, rc);

From 9a275fc153a304329b23cce67c7a1bb91d126438 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 4 Jul 2024 21:38:23 +0530
Subject: [PATCH 1615/1765] lib: sbi: Optimize fifo enqueue/dequeue for basic
 data types

Don't use sbi_memcpy() for basic data types in fifo enqueue/dequeue
instead use direct type-cast and assignment.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/sbi_fifo.c | 43 ++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 40 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 72c6d398f18..9199a30b4f1 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -66,7 +66,26 @@ static inline void  __sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 	if (head >= fifo->num_entries)
 		head = head - fifo->num_entries;
 
-	sbi_memcpy((char *)fifo->queue + head * fifo->entry_size, data, fifo->entry_size);
+	switch (fifo->entry_size) {
+	case 1:
+		*(char *)(fifo->queue + head * fifo->entry_size) = *(char *)data;
+		break;
+	case 2:
+		*(u16 *)(fifo->queue + head * fifo->entry_size) = *(u16 *)data;
+		break;
+	case 4:
+		*(u32 *)(fifo->queue + head * fifo->entry_size) = *(u32 *)data;
+		break;
+#if __riscv_xlen > 32
+	case 8:
+		*(u64 *)(fifo->queue + head * fifo->entry_size) = *(u64 *)data;
+		break;
+#endif
+	default:
+		sbi_memcpy(fifo->queue + head * fifo->entry_size,
+			   data, fifo->entry_size);
+		break;
+	}
 
 	fifo->avail++;
 }
@@ -184,8 +203,26 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOENT;
 	}
 
-	sbi_memcpy(data, (char *)fifo->queue + (u32)fifo->tail * fifo->entry_size,
-	       fifo->entry_size);
+	switch (fifo->entry_size) {
+	case 1:
+		*(char *)data = *(char *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+	case 2:
+		*(u16 *)data = *(u16 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+	case 4:
+		*(u32 *)data = *(u32 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+#if __riscv_xlen > 32
+	case 8:
+		*(u64 *)data = *(u64 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+#endif
+	default:
+		sbi_memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
+			   fifo->entry_size);
+		break;
+	}
 
 	fifo->avail--;
 	fifo->tail++;

From 94c3c53a56d32d1d6bf4e015c6266fcb4a80aaad Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 4 Jul 2024 22:37:44 +0530
Subject: [PATCH 1616/1765] lib: sbi: Allow forceful queueing of data in
 sbi_fifo_enqueue()

Extend sbi_fifo_enqueue() to allow forceful queueing by droping
data from the tail.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 include/sbi/sbi_fifo.h |  2 +-
 lib/sbi/sbi_fifo.c     | 69 +++++++++++++++++++++++++-----------------
 lib/sbi/sbi_sse.c      |  2 +-
 lib/sbi/sbi_tlb.c      |  3 +-
 4 files changed, 45 insertions(+), 31 deletions(-)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index 1a85f07e2a6..af1632a3f7d 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -30,7 +30,7 @@ enum sbi_fifo_inplace_update_types {
 };
 
 int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data);
-int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data);
+int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data, bool force);
 void sbi_fifo_init(struct sbi_fifo *fifo, void *queue_mem, u16 entries,
 		   u16 entry_size);
 int sbi_fifo_is_empty(struct sbi_fifo *fifo);
diff --git a/lib/sbi/sbi_fifo.c b/lib/sbi/sbi_fifo.c
index 9199a30b4f1..d07ebff4955 100644
--- a/lib/sbi/sbi_fifo.c
+++ b/lib/sbi/sbi_fifo.c
@@ -90,6 +90,39 @@ static inline void  __sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 	fifo->avail++;
 }
 
+/* Note: must be called with fifo->qlock held */
+static inline void  __sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
+{
+	if (!data)
+		goto skip_data_copy;
+
+	switch (fifo->entry_size) {
+	case 1:
+		*(char *)data = *(char *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+	case 2:
+		*(u16 *)data = *(u16 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+	case 4:
+		*(u32 *)data = *(u32 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+#if __riscv_xlen > 32
+	case 8:
+		*(u64 *)data = *(u64 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
+		break;
+#endif
+	default:
+		sbi_memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
+			   fifo->entry_size);
+		break;
+	}
+
+skip_data_copy:
+	fifo->avail--;
+	fifo->tail++;
+	if (fifo->tail >= fifo->num_entries)
+		fifo->tail = 0;
+}
 
 /* Note: must be called with fifo->qlock held */
 static inline bool __sbi_fifo_is_empty(struct sbi_fifo *fifo)
@@ -173,7 +206,7 @@ int sbi_fifo_inplace_update(struct sbi_fifo *fifo, void *in,
 	return ret;
 }
 
-int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
+int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data, bool force)
 {
 	if (!fifo || !data)
 		return SBI_EINVAL;
@@ -181,9 +214,13 @@ int sbi_fifo_enqueue(struct sbi_fifo *fifo, void *data)
 	spin_lock(&fifo->qlock);
 
 	if (__sbi_fifo_is_full(fifo)) {
-		spin_unlock(&fifo->qlock);
-		return SBI_ENOSPC;
+		if (!force) {
+			spin_unlock(&fifo->qlock);
+			return SBI_ENOSPC;
+		}
+		__sbi_fifo_dequeue(fifo, NULL);
 	}
+
 	__sbi_fifo_enqueue(fifo, data);
 
 	spin_unlock(&fifo->qlock);
@@ -203,31 +240,7 @@ int sbi_fifo_dequeue(struct sbi_fifo *fifo, void *data)
 		return SBI_ENOENT;
 	}
 
-	switch (fifo->entry_size) {
-	case 1:
-		*(char *)data = *(char *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
-		break;
-	case 2:
-		*(u16 *)data = *(u16 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
-		break;
-	case 4:
-		*(u32 *)data = *(u32 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
-		break;
-#if __riscv_xlen > 32
-	case 8:
-		*(u64 *)data = *(u64 *)(fifo->queue + (u32)fifo->tail * fifo->entry_size);
-		break;
-#endif
-	default:
-		sbi_memcpy(data, fifo->queue + (u32)fifo->tail * fifo->entry_size,
-			   fifo->entry_size);
-		break;
-	}
-
-	fifo->avail--;
-	fifo->tail++;
-	if (fifo->tail >= fifo->num_entries)
-		fifo->tail = 0;
+	__sbi_fifo_dequeue(fifo, data);
 
 	spin_unlock(&fifo->qlock);
 
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index e39963f13b7..fe36a643c94 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -667,7 +667,7 @@ static int sse_ipi_inject_send(unsigned long hartid, uint32_t event_id)
 	sse_inject_fifo_r =
 		sbi_scratch_offset_ptr(remote_scratch, sse_inject_fifo_off);
 
-	ret = sbi_fifo_enqueue(sse_inject_fifo_r, &evt);
+	ret = sbi_fifo_enqueue(sse_inject_fifo_r, &evt, false);
 	if (ret)
 		return SBI_EFAIL;
 
diff --git a/lib/sbi/sbi_tlb.c b/lib/sbi/sbi_tlb.c
index cca319f9cbb..01b31f4e76d 100644
--- a/lib/sbi/sbi_tlb.c
+++ b/lib/sbi/sbi_tlb.c
@@ -351,7 +351,8 @@ static int tlb_update(struct sbi_scratch *scratch,
 
 	ret = sbi_fifo_inplace_update(tlb_fifo_r, data, tlb_update_cb);
 
-	if (ret == SBI_FIFO_UNCHANGED && sbi_fifo_enqueue(tlb_fifo_r, data) < 0) {
+	if (ret == SBI_FIFO_UNCHANGED &&
+	    sbi_fifo_enqueue(tlb_fifo_r, data, false) < 0) {
 		/**
 		 * For now, Busy loop until there is space in the fifo.
 		 * There may be case where target hart is also

From d35c76a7666b5c9681cdac3a48016a74b71c34fd Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 5 Jul 2024 08:51:43 +0530
Subject: [PATCH 1617/1765] include: sbi: Add macros to create FIFO as local or
 global variable

The FIFO data structure is quite handy of variety of use-case so add
SBI_FIFO_INITIALIZER() and SBI_FIFO_DEFINE() helper macros to create
FIFO as local or global variable.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 include/sbi/sbi_fifo.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/sbi/sbi_fifo.h b/include/sbi/sbi_fifo.h
index af1632a3f7d..89a2ea26a25 100644
--- a/include/sbi/sbi_fifo.h
+++ b/include/sbi/sbi_fifo.h
@@ -23,6 +23,18 @@ struct sbi_fifo {
 	u16 tail;
 };
 
+#define SBI_FIFO_INITIALIZER(__queue_mem, __entries, __entry_size)	\
+{	.queue = __queue_mem,						\
+	.qlock = SPIN_LOCK_INITIALIZER,					\
+	.num_entries = __entries,					\
+	.entry_size = __entry_size,					\
+	.avail = 0,							\
+	.tail = 0,							\
+}
+
+#define SBI_FIFO_DEFINE(__name, __queue_mem, __entries, __entry_size)	\
+struct sbi_fifo __name = SBI_FIFO_INITIALIZER(__queue_mem, __entries, __entry_size)
+
 enum sbi_fifo_inplace_update_types {
 	SBI_FIFO_SKIP,
 	SBI_FIFO_UPDATED,

From bb7267a07f8f93b30355c66538f0752c4766b309 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 5 Jul 2024 10:04:12 +0530
Subject: [PATCH 1618/1765] lib: sbi: Introduce an early console buffer for
 caching early prints

The console device is registered by platform only in early_init()
callback so any prints before this point will be lost. Introduce an
early console buffer for caching prints before platform early_init().

For crashes before platform early_init(), users can simply dump the
contents of the console_early_buffer[] string using a debugger. The
relative address of the console_early_buffer[] string can be found
using following two commands:

CONSOLE_EARLY_FIFO_ADDR=`${CROSS_COMPILE}objdump -D \
build/platform/generic/firmware/fw_dynamic.elf | \
grep "<console_early_fifo>:" | awk '{print $1}'`

${CROSS_COMPILE}objdump -R build/platform/generic/firmware/fw_dynamic.elf | \
grep $CONSOLE_EARLY_FIFO_ADDR | awk '{print $3}'

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 lib/sbi/Kconfig       |  6 +++++-
 lib/sbi/sbi_console.c | 27 +++++++++++++++++++++++++++
 2 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index 6cf54ce4d38..bd8ba2b6bf0 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -1,6 +1,10 @@
 # SPDX-License-Identifier: BSD-2-Clause
 
-menu "SBI Extension Support"
+menu "Generic SBI Support"
+
+config CONSOLE_EARLY_BUFFER_SIZE
+	int "Early console buffer size (bytes)"
+	default 256
 
 config SBI_ECALL_TIME
 	bool "Timer extension"
diff --git a/lib/sbi/sbi_console.c b/lib/sbi/sbi_console.c
index 194529dc99f..d760885e969 100644
--- a/lib/sbi/sbi_console.c
+++ b/lib/sbi/sbi_console.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_locks.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_fifo.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
@@ -21,6 +22,15 @@ static char console_tbuf[CONSOLE_TBUF_MAX];
 static u32 console_tbuf_len;
 static spinlock_t console_out_lock	       = SPIN_LOCK_INITIALIZER;
 
+#ifdef CONFIG_CONSOLE_EARLY_BUFFER_SIZE
+#define CONSOLE_EARLY_BUFFER_SIZE	CONFIG_CONSOLE_EARLY_BUFFER_SIZE
+#else
+#define CONSOLE_EARLY_BUFFER_SIZE	256
+#endif
+static char console_early_buffer[CONSOLE_EARLY_BUFFER_SIZE] = { 0 };
+static SBI_FIFO_DEFINE(console_early_fifo, console_early_buffer, \
+		       CONSOLE_EARLY_BUFFER_SIZE, sizeof(char));
+
 bool sbi_isprintable(char c)
 {
 	if (((31 < c) && (c < 127)) || (c == '\f') || (c == '\r') ||
@@ -39,6 +49,7 @@ int sbi_getc(void)
 
 static unsigned long nputs(const char *str, unsigned long len)
 {
+	char ch;
 	unsigned long i;
 
 	if (console_dev) {
@@ -51,6 +62,11 @@ static unsigned long nputs(const char *str, unsigned long len)
 				console_dev->console_putc(str[i]);
 			}
 		}
+	} else {
+		for (i = 0; i < len; i++) {
+			ch = str[i];
+			sbi_fifo_enqueue(&console_early_fifo, &ch, true);
+		}
 	}
 	return len;
 }
@@ -472,8 +488,19 @@ const struct sbi_console_device *sbi_console_get_device(void)
 
 void sbi_console_set_device(const struct sbi_console_device *dev)
 {
+	char ch;
+	bool flush_early_fifo = false;
+
 	if (!dev)
 		return;
 
+	if (!console_dev)
+		flush_early_fifo = true;
+
 	console_dev = dev;
+
+	if (flush_early_fifo) {
+		while (!sbi_fifo_dequeue(&console_early_fifo, &ch))
+			sbi_putc(ch);
+	}
 }

From df997c6e55fe5940fd035097e6ecb5612aa95b4b Mon Sep 17 00:00:00 2001
From: Eric Lin <eric.lin@sifive.com>
Date: Tue, 30 Jul 2024 17:30:22 +0800
Subject: [PATCH 1619/1765] include: Adjust Sscofpmf mhpmevent mask for upper 8
 bits

Currently, OpenSBI reserves the upper 16 bits in mhpmevent for
the Sscofpmf extension.

However, according to the Sscofpmf extension specification[1],
it only defines the upper 8 bits in mhpmevent for privilege mode
inhibit and counter overflow disable. Other bits are defined by
the platform for event selection.

Since vendors might define raw event encoding exceeding 48 bits in
mhpmevent, we should adjust the MHPMEVENT_SSCOF_MASK to support it.

Link: https://github.com/riscvarchive/riscv-count-overflow [1]
Signed-off-by: Eric Lin <eric.lin@sifive.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 477fa3a1ad8..2ed05f242de 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -207,7 +207,7 @@
 
 #endif
 
-#define MHPMEVENT_SSCOF_MASK		_ULL(0xFFFF000000000000)
+#define MHPMEVENT_SSCOF_MASK		_ULL(0xFF00000000000000)
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)

From d2353c9e227a3dfedc0f46b0006ded35846d7171 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Carlos=20L=C3=B3pez?= <carlos.lopezr4096@gmail.com>
Date: Thu, 1 Aug 2024 14:27:42 +0200
Subject: [PATCH 1620/1765] lib: sbi: dbtr: fix potential NULL pointer
 dereferences
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

In several dbtr functions, we first check that the dbtr trigger is not
NULL and that its state is what we expect. However, it only makes
sense to perform the second check if the dbtr trigger is not NULL.
Othwerwise we will dereference a NULL pointer. Thus, change the
condition so that it shortcuts to the first check if necessary.

Signed-off-by: Carlos López <carlos.lopezr4096@gmail.com>
Reviewed-By: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_dbtr.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 6e2083edf7d..27a8b918bff 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -357,7 +357,7 @@ static void dbtr_trigger_enable(struct sbi_dbtr_trigger *trig)
 	unsigned long state;
 	unsigned long tdata1;
 
-	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+	if (!trig || !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
 		return;
 
 	state = trig->state;
@@ -403,7 +403,7 @@ static void dbtr_trigger_disable(struct sbi_dbtr_trigger *trig)
 {
 	unsigned long tdata1;
 
-	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+	if (!trig || !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
 		return;
 
 	tdata1 = trig->tdata1;
@@ -429,7 +429,7 @@ static void dbtr_trigger_disable(struct sbi_dbtr_trigger *trig)
 
 static void dbtr_trigger_clear(struct sbi_dbtr_trigger *trig)
 {
-	if (!trig && !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
+	if (!trig || !(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
 		return;
 
 	csr_write(CSR_TSELECT, trig->index);

From 41bb668315331e133fafe90d333a3806a777cf49 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Carlos=20L=C3=B3pez?= <carlos.lopezr4096@gmail.com>
Date: Thu, 1 Aug 2024 14:48:11 +0200
Subject: [PATCH 1621/1765] lib: sbi: fwft: fix incorrect size passed to
 sbi_zalloc()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The fwt_hart_state struct inciludes a flexible array member, so its
allocation size will be that of the struct itself, plus that of each
of the members in the array. When calculating this size, instead of
taking the size of the struct, the size of a pointer to it was taken,
which is incorrect. Luckily, this happenned to not produce memory
corruption because the size of the non-flexible members of the struct
is the same as the size of a pointer.

Signed-off-by: Carlos López <carlos.lopezr4096@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index f1ae91592fb..ef881ef57e7 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -251,7 +251,7 @@ int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
 
 	fhs = fwft_get_hart_state_ptr(scratch);
 	if (!fhs) {
-		fhs = sbi_zalloc(sizeof(fhs) + array_size(features) * sizeof(struct fwft_config));
+		fhs = sbi_zalloc(sizeof(*fhs) + array_size(features) * sizeof(struct fwft_config));
 		if (!fhs)
 			return SBI_ENOMEM;
 

From 6a090ee9dc687bb4f39c56a6fd77898257c0f6d7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Carlos=20L=C3=B3pez?= <carlos.lopezr4096@gmail.com>
Date: Thu, 1 Aug 2024 14:58:52 +0200
Subject: [PATCH 1622/1765] lib: sbi: check result of pmp_get() in
 is_pmp_entry_mapped()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

pmp_get() may return an error if the given entry, given by the caller
of is_pmp_entry_mapped(), is invalid. This results in the output
parameters for pmp_get() being uninitialized. To avoid using garbage
values, check the result and return early if necessary.

This issue is not being hit because at the moment
is_pmp_entry_mapped() is only being called from a single site with a
valid hardcoded value.

Signed-off-by: Carlos López <carlos.lopezr4096@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/riscv_asm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/riscv_asm.c b/lib/sbi/riscv_asm.c
index 05b8c7ce6e3..c7d75ac0155 100644
--- a/lib/sbi/riscv_asm.c
+++ b/lib/sbi/riscv_asm.c
@@ -291,7 +291,8 @@ int is_pmp_entry_mapped(unsigned long entry)
 	unsigned long addr;
 	unsigned long log2len;
 
-	pmp_get(entry, &prot, &addr, &log2len);
+	if (pmp_get(entry, &prot, &addr, &log2len) != 0)
+		return false;
 
 	/* If address matching bits are non-zero, the entry is enable */
 	if (prot & PMP_A)

From 8b898c4e50d841d5d84d7d3f8240a35e78d25fb8 Mon Sep 17 00:00:00 2001
From: Gregor Haas <gregorhaas1997@gmail.com>
Date: Thu, 8 Aug 2024 20:16:36 -0700
Subject: [PATCH 1623/1765] lib: sbi: Support multiple heaps

The upcoming SMMTT implementation will require some larger contiguous memory
regions for the memory tracking tables. We plan to specify the memory region
for these tables as a reserved-memory node in the device tree, and then
dynamically allocate individual tables out of this region. These changes to the
SBI heap allocator will allow us to explicitly create and allocate from a
dedicated heap tied to the table memory region.

Signed-off-by: Gregor Haas <gregorhaas1997@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_heap.h |  57 +++++++++++++++++--
 lib/sbi/sbi_heap.c     | 122 +++++++++++++++++++++++------------------
 2 files changed, 119 insertions(+), 60 deletions(-)

diff --git a/include/sbi/sbi_heap.h b/include/sbi/sbi_heap.h
index 16755ec9b56..9a670905204 100644
--- a/include/sbi/sbi_heap.h
+++ b/include/sbi/sbi_heap.h
@@ -12,16 +12,32 @@
 
 #include <sbi/sbi_types.h>
 
+/* Opaque declaration of heap control struct */
+struct sbi_heap_control;
+
+/* Global heap control structure */
+extern struct sbi_heap_control global_hpctrl;
+
 /* Alignment of heap base address and size */
 #define HEAP_BASE_ALIGN			1024
 
 struct sbi_scratch;
 
 /** Allocate from heap area */
-void *sbi_malloc(size_t size);
+void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size);
+
+static inline void *sbi_malloc(size_t size)
+{
+	return sbi_malloc_from(&global_hpctrl, size);
+}
 
 /** Zero allocate from heap area */
-void *sbi_zalloc(size_t size);
+void *sbi_zalloc_from(struct sbi_heap_control *hpctrl, size_t size);
+
+static inline void *sbi_zalloc(size_t size)
+{
+	return sbi_zalloc_from(&global_hpctrl, size);
+}
 
 /** Allocate array from heap area */
 static inline void *sbi_calloc(size_t nitems, size_t size)
@@ -29,19 +45,48 @@ static inline void *sbi_calloc(size_t nitems, size_t size)
 	return sbi_zalloc(nitems * size);
 }
 
+static inline void *sbi_calloc_from(struct sbi_heap_control *hpctrl,
+				    size_t nitems, size_t size)
+{
+	return sbi_zalloc_from(hpctrl, nitems * size);
+}
+
 /** Free-up to heap area */
-void sbi_free(void *ptr);
+void sbi_free_from(struct sbi_heap_control *hpctrl, void *ptr);
+
+static inline void sbi_free(void *ptr)
+{
+	return sbi_free_from(&global_hpctrl, ptr);
+}
 
 /** Amount (in bytes) of free space in the heap area */
-unsigned long sbi_heap_free_space(void);
+unsigned long sbi_heap_free_space_from(struct sbi_heap_control *hpctrl);
+
+static inline unsigned long sbi_heap_free_space(void)
+{
+	return sbi_heap_free_space_from(&global_hpctrl);
+}
 
 /** Amount (in bytes) of used space in the heap area */
-unsigned long sbi_heap_used_space(void);
+unsigned long sbi_heap_used_space_from(struct sbi_heap_control *hpctrl);
+
+static inline unsigned long sbi_heap_used_space(void)
+{
+	return sbi_heap_used_space_from(&global_hpctrl);
+}
 
 /** Amount (in bytes) of reserved space in the heap area */
-unsigned long sbi_heap_reserved_space(void);
+unsigned long sbi_heap_reserved_space_from(struct sbi_heap_control *hpctrl);
+
+static inline unsigned long sbi_heap_reserved_space(void)
+{
+	return sbi_heap_reserved_space_from(&global_hpctrl);
+}
 
 /** Initialize heap area */
 int sbi_heap_init(struct sbi_scratch *scratch);
+int sbi_heap_init_new(struct sbi_heap_control *hpctrl, unsigned long base,
+		       unsigned long size);
+int sbi_heap_alloc_new(struct sbi_heap_control **hpctrl);
 
 #endif
diff --git a/lib/sbi/sbi_heap.c b/lib/sbi/sbi_heap.c
index bcd404bb222..e43d77c0d27 100644
--- a/lib/sbi/sbi_heap.c
+++ b/lib/sbi/sbi_heap.c
@@ -24,7 +24,7 @@ struct heap_node {
 	unsigned long size;
 };
 
-struct heap_control {
+struct sbi_heap_control {
 	spinlock_t lock;
 	unsigned long base;
 	unsigned long size;
@@ -35,9 +35,9 @@ struct heap_control {
 	struct sbi_dlist used_space_list;
 };
 
-static struct heap_control hpctrl;
+struct sbi_heap_control global_hpctrl;
 
-void *sbi_malloc(size_t size)
+void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size)
 {
 	void *ret = NULL;
 	struct heap_node *n, *np;
@@ -48,10 +48,10 @@ void *sbi_malloc(size_t size)
 	size += HEAP_ALLOC_ALIGN - 1;
 	size &= ~((unsigned long)HEAP_ALLOC_ALIGN - 1);
 
-	spin_lock(&hpctrl.lock);
+	spin_lock(&hpctrl->lock);
 
 	np = NULL;
-	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head) {
+	sbi_list_for_each_entry(n, &hpctrl->free_space_list, head) {
 		if (size <= n->size) {
 			np = n;
 			break;
@@ -59,47 +59,47 @@ void *sbi_malloc(size_t size)
 	}
 	if (np) {
 		if ((size < np->size) &&
-		    !sbi_list_empty(&hpctrl.free_node_list)) {
-			n = sbi_list_first_entry(&hpctrl.free_node_list,
+		    !sbi_list_empty(&hpctrl->free_node_list)) {
+			n = sbi_list_first_entry(&hpctrl->free_node_list,
 						 struct heap_node, head);
 			sbi_list_del(&n->head);
 			n->addr = np->addr + np->size - size;
 			n->size = size;
 			np->size -= size;
-			sbi_list_add_tail(&n->head, &hpctrl.used_space_list);
+			sbi_list_add_tail(&n->head, &hpctrl->used_space_list);
 			ret = (void *)n->addr;
 		} else if (size == np->size) {
 			sbi_list_del(&np->head);
-			sbi_list_add_tail(&np->head, &hpctrl.used_space_list);
+			sbi_list_add_tail(&np->head, &hpctrl->used_space_list);
 			ret = (void *)np->addr;
 		}
 	}
 
-	spin_unlock(&hpctrl.lock);
+	spin_unlock(&hpctrl->lock);
 
 	return ret;
 }
 
-void *sbi_zalloc(size_t size)
+void *sbi_zalloc_from(struct sbi_heap_control *hpctrl, size_t size)
 {
-	void *ret = sbi_malloc(size);
+	void *ret = sbi_malloc_from(hpctrl, size);
 
 	if (ret)
 		sbi_memset(ret, 0, size);
 	return ret;
 }
 
-void sbi_free(void *ptr)
+void sbi_free_from(struct sbi_heap_control *hpctrl, void *ptr)
 {
 	struct heap_node *n, *np;
 
 	if (!ptr)
 		return;
 
-	spin_lock(&hpctrl.lock);
+	spin_lock(&hpctrl->lock);
 
 	np = NULL;
-	sbi_list_for_each_entry(n, &hpctrl.used_space_list, head) {
+	sbi_list_for_each_entry(n, &hpctrl->used_space_list, head) {
 		if ((n->addr <= (unsigned long)ptr) &&
 		    ((unsigned long)ptr < (n->addr + n->size))) {
 			np = n;
@@ -107,22 +107,22 @@ void sbi_free(void *ptr)
 		}
 	}
 	if (!np) {
-		spin_unlock(&hpctrl.lock);
+		spin_unlock(&hpctrl->lock);
 		return;
 	}
 
 	sbi_list_del(&np->head);
 
-	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head) {
+	sbi_list_for_each_entry(n, &hpctrl->free_space_list, head) {
 		if ((np->addr + np->size) == n->addr) {
 			n->addr = np->addr;
 			n->size += np->size;
-			sbi_list_add_tail(&np->head, &hpctrl.free_node_list);
+			sbi_list_add_tail(&np->head, &hpctrl->free_node_list);
 			np = NULL;
 			break;
 		} else if (np->addr == (n->addr + n->size)) {
 			n->size += np->size;
-			sbi_list_add_tail(&np->head, &hpctrl.free_node_list);
+			sbi_list_add_tail(&np->head, &hpctrl->free_node_list);
 			np = NULL;
 			break;
 		} else if ((n->addr + n->size) < np->addr) {
@@ -132,73 +132,87 @@ void sbi_free(void *ptr)
 		}
 	}
 	if (np)
-		sbi_list_add_tail(&np->head, &hpctrl.free_space_list);
+		sbi_list_add_tail(&np->head, &hpctrl->free_space_list);
 
-	spin_unlock(&hpctrl.lock);
+	spin_unlock(&hpctrl->lock);
 }
 
-unsigned long sbi_heap_free_space(void)
+unsigned long sbi_heap_free_space_from(struct sbi_heap_control *hpctrl)
 {
 	struct heap_node *n;
 	unsigned long ret = 0;
 
-	spin_lock(&hpctrl.lock);
-	sbi_list_for_each_entry(n, &hpctrl.free_space_list, head)
+	spin_lock(&hpctrl->lock);
+	sbi_list_for_each_entry(n, &hpctrl->free_space_list, head)
 		ret += n->size;
-	spin_unlock(&hpctrl.lock);
+	spin_unlock(&hpctrl->lock);
 
 	return ret;
 }
 
-unsigned long sbi_heap_used_space(void)
+unsigned long sbi_heap_used_space_from(struct sbi_heap_control *hpctrl)
 {
-	return hpctrl.size - hpctrl.hksize - sbi_heap_free_space();
+	return hpctrl->size - hpctrl->hksize - sbi_heap_free_space();
 }
 
-unsigned long sbi_heap_reserved_space(void)
+unsigned long sbi_heap_reserved_space_from(struct sbi_heap_control *hpctrl)
 {
-	return hpctrl.hksize;
+	return hpctrl->hksize;
 }
 
-int sbi_heap_init(struct sbi_scratch *scratch)
+int sbi_heap_init_new(struct sbi_heap_control *hpctrl, unsigned long base,
+		       unsigned long size)
 {
 	unsigned long i;
 	struct heap_node *n;
 
-	/* Sanity checks on heap offset and size */
-	if (!scratch->fw_heap_size ||
-	    (scratch->fw_heap_size & (HEAP_BASE_ALIGN - 1)) ||
-	    (scratch->fw_heap_offset < scratch->fw_rw_offset) ||
-	    (scratch->fw_size < (scratch->fw_heap_offset + scratch->fw_heap_size)) ||
-	    (scratch->fw_heap_offset & (HEAP_BASE_ALIGN - 1)))
-		return SBI_EINVAL;
-
 	/* Initialize heap control */
-	SPIN_LOCK_INIT(hpctrl.lock);
-	hpctrl.base = scratch->fw_start + scratch->fw_heap_offset;
-	hpctrl.size = scratch->fw_heap_size;
-	hpctrl.hkbase = hpctrl.base;
-	hpctrl.hksize = hpctrl.size / HEAP_HOUSEKEEPING_FACTOR;
-	hpctrl.hksize &= ~((unsigned long)HEAP_BASE_ALIGN - 1);
-	SBI_INIT_LIST_HEAD(&hpctrl.free_node_list);
-	SBI_INIT_LIST_HEAD(&hpctrl.free_space_list);
-	SBI_INIT_LIST_HEAD(&hpctrl.used_space_list);
+	SPIN_LOCK_INIT(hpctrl->lock);
+	hpctrl->base = base;
+	hpctrl->size = size;
+	hpctrl->hkbase = hpctrl->base;
+	hpctrl->hksize = hpctrl->size / HEAP_HOUSEKEEPING_FACTOR;
+	hpctrl->hksize &= ~((unsigned long)HEAP_BASE_ALIGN - 1);
+	SBI_INIT_LIST_HEAD(&hpctrl->free_node_list);
+	SBI_INIT_LIST_HEAD(&hpctrl->free_space_list);
+	SBI_INIT_LIST_HEAD(&hpctrl->used_space_list);
 
 	/* Prepare free node list */
-	for (i = 0; i < (hpctrl.hksize / sizeof(*n)); i++) {
-		n = (struct heap_node *)(hpctrl.hkbase + (sizeof(*n) * i));
+	for (i = 0; i < (hpctrl->hksize / sizeof(*n)); i++) {
+		n = (struct heap_node *)(hpctrl->hkbase + (sizeof(*n) * i));
 		SBI_INIT_LIST_HEAD(&n->head);
 		n->addr = n->size = 0;
-		sbi_list_add_tail(&n->head, &hpctrl.free_node_list);
+		sbi_list_add_tail(&n->head, &hpctrl->free_node_list);
 	}
 
 	/* Prepare free space list */
-	n = sbi_list_first_entry(&hpctrl.free_node_list,
+	n = sbi_list_first_entry(&hpctrl->free_node_list,
 				 struct heap_node, head);
 	sbi_list_del(&n->head);
-	n->addr = hpctrl.hkbase + hpctrl.hksize;
-	n->size = hpctrl.size - hpctrl.hksize;
-	sbi_list_add_tail(&n->head, &hpctrl.free_space_list);
+	n->addr = hpctrl->hkbase + hpctrl->hksize;
+	n->size = hpctrl->size - hpctrl->hksize;
+	sbi_list_add_tail(&n->head, &hpctrl->free_space_list);
+
+	return 0;
+}
 
+int sbi_heap_init(struct sbi_scratch *scratch)
+{
+	/* Sanity checks on heap offset and size */
+	if (!scratch->fw_heap_size ||
+	    (scratch->fw_heap_size & (HEAP_BASE_ALIGN - 1)) ||
+	    (scratch->fw_heap_offset < scratch->fw_rw_offset) ||
+	    (scratch->fw_size < (scratch->fw_heap_offset + scratch->fw_heap_size)) ||
+	    (scratch->fw_heap_offset & (HEAP_BASE_ALIGN - 1)))
+		return SBI_EINVAL;
+
+	return sbi_heap_init_new(&global_hpctrl,
+				  scratch->fw_start + scratch->fw_heap_offset,
+				  scratch->fw_heap_size);
+}
+
+int sbi_heap_alloc_new(struct sbi_heap_control **hpctrl)
+{
+	*hpctrl = sbi_calloc(1, sizeof(struct sbi_heap_control));
 	return 0;
 }

From cda001479555e08dfb8d952093fa843021a39930 Mon Sep 17 00:00:00 2001
From: Gregor Haas <gregorhaas1997@gmail.com>
Date: Thu, 8 Aug 2024 20:16:37 -0700
Subject: [PATCH 1624/1765] lib: sbi: Allocate from beginning of heap blocks

In the next commit, we'll add a new sbi_memalign() function. In order to
allocate aligned memory, we'll sometimes need to allocate from the middle of a
heap block, effectively splitting it in two. Allocating from the beginning of a
heap block in the nonaligned case more closely matches this behavior, reducing
the complexity of understanding the heap implementation.

Signed-off-by: Gregor Haas <gregorhaas1997@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_heap.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_heap.c b/lib/sbi/sbi_heap.c
index e43d77c0d27..cc4893da0e1 100644
--- a/lib/sbi/sbi_heap.c
+++ b/lib/sbi/sbi_heap.c
@@ -63,8 +63,9 @@ void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size)
 			n = sbi_list_first_entry(&hpctrl->free_node_list,
 						 struct heap_node, head);
 			sbi_list_del(&n->head);
-			n->addr = np->addr + np->size - size;
+			n->addr = np->addr;
 			n->size = size;
+			np->addr += size;
 			np->size -= size;
 			sbi_list_add_tail(&n->head, &hpctrl->used_space_list);
 			ret = (void *)n->addr;

From b9c091ed890224dc83a152d897965c7a332c1504 Mon Sep 17 00:00:00 2001
From: Gregor Haas <gregorhaas1997@gmail.com>
Date: Thu, 8 Aug 2024 20:16:38 -0700
Subject: [PATCH 1625/1765] lib: sbi: Implement aligned memory allocators

This change adds a simple implementation of sbi_aligned_alloc(), for future use
in allocating aligned memory for SMMTT tables.

Signed-off-by: Gregor Haas <gregorhaas1997@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_heap.h |  9 +++++
 lib/sbi/sbi_heap.c     | 75 ++++++++++++++++++++++++++++++++++++++----
 2 files changed, 78 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_heap.h b/include/sbi/sbi_heap.h
index 9a670905204..a4b3f0c6aba 100644
--- a/include/sbi/sbi_heap.h
+++ b/include/sbi/sbi_heap.h
@@ -31,6 +31,15 @@ static inline void *sbi_malloc(size_t size)
 	return sbi_malloc_from(&global_hpctrl, size);
 }
 
+/** Allocate aligned from heap area */
+void *sbi_aligned_alloc_from(struct sbi_heap_control *hpctrl,
+			     size_t alignment,size_t size);
+
+static inline void *sbi_aligned_alloc(size_t alignment, size_t size)
+{
+	return sbi_aligned_alloc_from(&global_hpctrl, alignment, size);
+}
+
 /** Zero allocate from heap area */
 void *sbi_zalloc_from(struct sbi_heap_control *hpctrl, size_t size);
 
diff --git a/lib/sbi/sbi_heap.c b/lib/sbi/sbi_heap.c
index cc4893da0e1..6d08e44867a 100644
--- a/lib/sbi/sbi_heap.c
+++ b/lib/sbi/sbi_heap.c
@@ -37,27 +37,67 @@ struct sbi_heap_control {
 
 struct sbi_heap_control global_hpctrl;
 
-void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size)
+static void *alloc_with_align(struct sbi_heap_control *hpctrl,
+			      size_t align, size_t size)
 {
 	void *ret = NULL;
-	struct heap_node *n, *np;
+	struct heap_node *n, *np, *rem;
+	unsigned long lowest_aligned;
+	size_t pad;
 
 	if (!size)
 		return NULL;
 
-	size += HEAP_ALLOC_ALIGN - 1;
-	size &= ~((unsigned long)HEAP_ALLOC_ALIGN - 1);
+	size += align - 1;
+	size &= ~((unsigned long)align - 1);
 
 	spin_lock(&hpctrl->lock);
 
 	np = NULL;
 	sbi_list_for_each_entry(n, &hpctrl->free_space_list, head) {
-		if (size <= n->size) {
+		lowest_aligned = ROUNDUP(n->addr, align);
+		pad = lowest_aligned - n->addr;
+
+		if (size + pad <= n->size) {
 			np = n;
 			break;
 		}
 	}
-	if (np) {
+	if (!np)
+		goto out;
+
+	if (pad) {
+		if (sbi_list_empty(&hpctrl->free_node_list)) {
+			goto out;
+		}
+
+		n = sbi_list_first_entry(&hpctrl->free_node_list,
+					 struct heap_node, head);
+		sbi_list_del(&n->head);
+
+		if ((size + pad < np->size) &&
+		    !sbi_list_empty(&hpctrl->free_node_list)) {
+			rem = sbi_list_first_entry(&hpctrl->free_node_list,
+						   struct heap_node, head);
+			sbi_list_del(&rem->head);
+			rem->addr = np->addr + (size + pad);
+			rem->size = np->size - (size + pad);
+			sbi_list_add_tail(&rem->head,
+					  &hpctrl->free_space_list);
+		} else if (size + pad != np->size) {
+			/* Can't allocate, return n */
+			sbi_list_add(&n->head, &hpctrl->free_node_list);
+			ret = NULL;
+			goto out;
+		}
+
+		n->addr = lowest_aligned;
+		n->size = size;
+		sbi_list_add_tail(&n->head, &hpctrl->used_space_list);
+
+		np->size = pad;
+		ret = (void *)n->addr;
+	} else {
 		if ((size < np->size) &&
 		    !sbi_list_empty(&hpctrl->free_node_list)) {
 			n = sbi_list_first_entry(&hpctrl->free_node_list,
@@ -76,11 +116,34 @@ void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size)
 		}
 	}
 
+out:
 	spin_unlock(&hpctrl->lock);
 
 	return ret;
 }
 
+void *sbi_malloc_from(struct sbi_heap_control *hpctrl, size_t size)
+{
+	return alloc_with_align(hpctrl, HEAP_ALLOC_ALIGN, size);
+}
+
+void *sbi_aligned_alloc_from(struct sbi_heap_control *hpctrl,
+			     size_t alignment, size_t size)
+{
+	if (alignment < HEAP_ALLOC_ALIGN)
+		alignment = HEAP_ALLOC_ALIGN;
+
+	/* Make sure alignment is power of two */
+	if ((alignment & (alignment - 1)) != 0)
+		return NULL;
+
+	/* Make sure size is multiple of alignment */
+	if (size % alignment != 0)
+		return NULL;
+
+	return alloc_with_align(hpctrl, alignment, size);
+}
+
 void *sbi_zalloc_from(struct sbi_heap_control *hpctrl, size_t size)
 {
 	void *ret = sbi_malloc_from(hpctrl, size);

From d4322eebd0ce129c3230fd150bc802b19ff0c0f8 Mon Sep 17 00:00:00 2001
From: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Date: Thu, 18 Jul 2024 13:43:57 +0800
Subject: [PATCH 1626/1765] lib: sbi: Enhance CSR Handling in
 system_opcode_insn

- Completed TODO in `system_opcode_insn` to ensure CSR read/write
  instruction handling.
- Refactored to use new macros `GET_RS1_NUM` and `GET_CSR_NUM`.
- Updated `GET_RM` macro and replaced hardcoded funct3 values with
  constants (`CSRRW`, `CSRRS`, `CSRRC`, etc.).
- Removed redundant `GET_RM` from `riscv_fp.h`.
- Improved validation and error handling for CSR instructions.

This patch enhances the clarity and correctness of CSR handling
in `system_opcode_insn`.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h | 18 ++++++++++++++++-
 include/sbi/riscv_fp.h       |  1 -
 lib/sbi/sbi_illegal_insn.c   | 38 +++++++++++++++++++++++-------------
 3 files changed, 41 insertions(+), 16 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 2ed05f242de..2e4391fedf7 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -947,7 +947,10 @@
 #define REG_PTR(insn, pos, regs)	\
 	(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
 
-#define GET_RM(insn)			(((insn) >> 12) & 7)
+#define GET_RM(insn)			((insn & MASK_FUNCT3) >> SHIFT_FUNCT3)
+
+#define GET_RS1_NUM(insn)		((insn & MASK_RS1) >> 15)
+#define GET_CSR_NUM(insn)		((insn & MASK_CSR) >> SHIFT_CSR)
 
 #define GET_RS1(insn, regs)		(*REG_PTR(insn, SH_RS1, regs))
 #define GET_RS2(insn, regs)		(*REG_PTR(insn, SH_RS2, regs))
@@ -959,7 +962,20 @@
 #define IMM_I(insn)			((s32)(insn) >> 20)
 #define IMM_S(insn)			(((s32)(insn) >> 25 << 5) | \
 					 (s32)(((insn) >> 7) & 0x1f))
+
 #define MASK_FUNCT3			0x7000
+#define MASK_RS1			0xf8000
+#define MASK_CSR			0xfff00000
+
+#define SHIFT_FUNCT3			12
+#define SHIFT_CSR			20
+
+#define CSRRW 1
+#define CSRRS 2
+#define CSRRC 3
+#define CSRRWI 5
+#define CSRRSI 6
+#define CSRRCI 7
 
 /* clang-format on */
 
diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
index 3141c1c5b82..f523c56ef7b 100644
--- a/include/sbi/riscv_fp.h
+++ b/include/sbi/riscv_fp.h
@@ -15,7 +15,6 @@
 #include <sbi/sbi_types.h>
 
 #define GET_PRECISION(insn) (((insn) >> 25) & 3)
-#define GET_RM(insn) (((insn) >> 12) & 7)
 #define PRECISION_S 0
 #define PRECISION_D 1
 
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index ed6f111362c..e1d2cd362c5 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -48,9 +48,10 @@ static int misc_mem_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 
 static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 {
-	int do_write, rs1_num = (insn >> 15) & 0x1f;
-	ulong rs1_val = GET_RS1(insn, regs);
-	int csr_num   = (u32)insn >> 20;
+	bool do_write	= false;
+	int rs1_num	= GET_RS1_NUM(insn);
+	ulong rs1_val	= GET_RS1(insn, regs);
+	int csr_num	= GET_CSR_NUM((u32)insn);
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 	ulong csr_val, new_csr_val;
 
@@ -60,32 +61,41 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 		return SBI_EFAIL;
 	}
 
-	/* TODO: Ensure that we got CSR read/write instruction */
+	/* Ensure that we got CSR read/write instruction */
+	int funct3 = GET_RM(insn);
+	if (funct3 == 0 || funct3 == 4) {
+		sbi_printf("%s: Invalid opcode for CSR read/write instruction",
+			   __func__);
+		return truly_illegal_insn(insn, regs);
+	}
 
 	if (sbi_emulate_csr_read(csr_num, regs, &csr_val))
 		return truly_illegal_insn(insn, regs);
 
-	do_write = rs1_num;
-	switch (GET_RM(insn)) {
-	case 1:
+	switch (funct3) {
+	case CSRRW:
 		new_csr_val = rs1_val;
-		do_write    = 1;
+		do_write    = true;
 		break;
-	case 2:
+	case CSRRS:
 		new_csr_val = csr_val | rs1_val;
+		do_write    = (rs1_num != 0);
 		break;
-	case 3:
+	case CSRRC:
 		new_csr_val = csr_val & ~rs1_val;
+		do_write    = (rs1_num != 0);
 		break;
-	case 5:
+	case CSRRWI:
 		new_csr_val = rs1_num;
-		do_write    = 1;
+		do_write    = true;
 		break;
-	case 6:
+	case CSRRSI:
 		new_csr_val = csr_val | rs1_num;
+		do_write    = (rs1_num != 0);
 		break;
-	case 7:
+	case CSRRCI:
 		new_csr_val = csr_val & ~rs1_num;
+		do_write    = (rs1_num != 0);
 		break;
 	default:
 		return truly_illegal_insn(insn, regs);

From 17100394f9d7f035df75f1656e9ac36dd396acc4 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Tue, 23 Jul 2024 15:57:25 +0800
Subject: [PATCH 1627/1765] platform: generic: Kconfig: add the description for
 Andes PMA feature

Describe Andes PPMA in the config option, and select it for AE350
platform.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/Kconfig       | 1 +
 platform/generic/andes/Kconfig | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 6642a6eeaa1..688da3f4acf 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -33,6 +33,7 @@ config PLATFORM_ANDES_AE350
 	bool "Andes AE350 support"
 	select SYS_ATCSMU
 	select ANDES_PMU
+	select ANDES_PMA
 	default n
 
 config PLATFORM_RENESAS_RZFIVE
diff --git a/platform/generic/andes/Kconfig b/platform/generic/andes/Kconfig
index 138710be598..6edd67de07d 100644
--- a/platform/generic/andes/Kconfig
+++ b/platform/generic/andes/Kconfig
@@ -3,6 +3,11 @@
 config ANDES_PMA
 	bool "Andes PMA support"
 	default n
+	help
+	  Programmable PMA(PPMA) is a feature for Andes. PPMA allows
+	  dynamic adjustment of memory attributes in the runtime.
+	  It contains a configurable amount of PMA entries implemented
+	  as CSRs to control the attributes of memory locations in interest.
 
 config ANDES_SBI
 	bool "Andes SBI support"

From 4a72abb5f490c01a5a4dd24930ccae9c42d15c74 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Tue, 23 Jul 2024 15:57:26 +0800
Subject: [PATCH 1628/1765] platform: generic: andes: add Andes SBI call to
 probe Andes PMA feature

Add a new Andes SBI call to check whether PPMA is supported by hardware
or not.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/ae350.c             |  2 ++
 platform/generic/andes/andes_pma.c         |  8 ++++++--
 platform/generic/andes/andes_sbi.c         |  5 +++++
 platform/generic/include/andes/andes_pma.h | 12 ++++++++++++
 4 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 63c10bc465c..a1ab6b93a1f 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -19,6 +19,7 @@
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_init.h>
 #include <andes/andes.h>
+#include <andes/andes_sbi.h>
 
 static struct smu_data smu = { 0 };
 extern void __ae350_enable_coherency_warmboot(void);
@@ -120,4 +121,5 @@ const struct platform_override andes_ae350 = {
 	.final_init  = ae350_final_init,
 	.extensions_init = andes_pmu_extensions_init,
 	.pmu_init = andes_pmu_init,
+	.vendor_ext_provider = andes_sbi_vendor_ext_provider,
 };
diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index 9c37720b41f..a884bf75c82 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -241,7 +241,6 @@ static int andes_fdt_reserved_memory_fixup(void *fdt,
 int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 			    unsigned int pma_regions_count)
 {
-	unsigned long mmsc = csr_read(CSR_MMSC_CFG);
 	unsigned int dt_populate_cnt;
 	unsigned int i, j;
 	unsigned long pa;
@@ -254,7 +253,7 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 	if (pma_regions_count > ANDES_MAX_PMA_REGIONS)
 		return SBI_EINVAL;
 
-	if ((mmsc & MMSC_CFG_PPMA_MASK) == 0)
+	if (!andes_sbi_probe_pma())
 		return SBI_ENOTSUPP;
 
 	/* Configure the PMA regions */
@@ -290,3 +289,8 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 
 	return 0;
 }
+
+bool andes_sbi_probe_pma(void)
+{
+	return (csr_read(CSR_MMSC_CFG) & MMSC_CFG_PPMA_MASK) ? true : false;
+}
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
index 43bafdc76ac..a7ca4a59fa0 100644
--- a/platform/generic/andes/andes_sbi.c
+++ b/platform/generic/andes/andes_sbi.c
@@ -5,12 +5,14 @@
  */
 #include <andes/andes.h>
 #include <andes/andes_sbi.h>
+#include <andes/andes_pma.h>
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_error.h>
 
 enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_FID0 = 0, /* Reserved for future use */
 	SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
+	SBI_EXT_ANDES_PMA_PROBE,
 };
 
 static bool andes_cache_controllable(void)
@@ -41,6 +43,9 @@ int andes_sbi_vendor_ext_provider(long funcid,
 	case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
 		out->value = andes_apply_iocp_sw_workaround();
 		break;
+	case SBI_EXT_ANDES_PMA_PROBE:
+		out->value = andes_sbi_probe_pma();
+		break;
 
 	default:
 		return SBI_EINVAL;
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index 5ea12475ee9..147dca1e97d 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -47,4 +47,16 @@ struct andes_pma_region {
 int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 			    unsigned int pma_regions_count);
 
+/**
+ * Programmable PMA(PPMA) is a feature for Andes. PPMA allows dynamic adjustment
+ * of memory attributes in the runtime. It contains a configurable amount of PMA
+ * entries implemented as CSRs to control the attributes of memory locations.
+ *
+ * Check if hardware supports PPMA
+ *
+ * @return true if PPMA is supported
+ * @return false if PPMA is not supported
+ */
+bool andes_sbi_probe_pma(void);
+
 #endif /* _ANDES_PMA_H_ */

From aa56084c4dfb19b4009cd4d1080b88b509c28528 Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Tue, 23 Jul 2024 15:57:27 +0800
Subject: [PATCH 1629/1765] platform: generic: andes: add a new Andes SBI call
 to set up a PMA entry

Implement a new Andes SBI call, which is to set up a NAPOT region
with given memory attributes.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/andes_pma.c         | 110 +++++++++++++++++++++
 platform/generic/andes/andes_sbi.c         |  11 ++-
 platform/generic/include/andes/andes_pma.h |  22 ++++-
 3 files changed, 138 insertions(+), 5 deletions(-)

diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index a884bf75c82..70039cadf46 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -94,6 +94,74 @@ static inline bool not_napot(unsigned long addr, unsigned long size)
 	return ((size & (size - 1)) || (addr & (size - 1)));
 }
 
+static inline bool is_pma_entry_disable(char pmaxcfg)
+{
+	return (pmaxcfg & ANDES_PMACFG_ETYP_MASK) == ANDES_PMACFG_ETYP_OFF ?
+	       true : false;
+}
+
+static char get_pmaxcfg(int entry_id)
+{
+	unsigned int pmacfg_addr;
+	unsigned long pmacfg_val;
+	char *pmaxcfg;
+
+#if __riscv_xlen == 64
+	pmacfg_addr = CSR_PMACFG0 + ((entry_id / 8) ? 2 : 0);
+	pmacfg_val = andes_pma_read_num(pmacfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
+#elif __riscv_xlen == 32
+	pmacfg_addr = CSR_PMACFG0 + (entry_id / 4);
+	pmacfg_val = andes_pma_read_num(pmacfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 4);
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+	return *pmaxcfg;
+}
+
+static void decode_pmaaddrx(int entry_id, unsigned long *start,
+			    unsigned long *size)
+{
+	unsigned long pmaaddr;
+	int k;
+
+	/**
+	 * Given $pmaaddr, let k = # of trailing 1s of $pmaaddr
+	 * size = 2 ^ (k + 3)
+	 * start = 4 * ($pmaaddr - (size / 8) + 1)
+	 */
+	pmaaddr = andes_pma_read_num(CSR_PMAADDR0 + entry_id);
+	k = sbi_ffz(pmaaddr);
+	*size = 1 << (k + 3);
+	*start = (pmaaddr - (1 << k) + 1) << 2;
+}
+
+static bool has_pma_region_overlap(unsigned long start, unsigned long size)
+{
+	unsigned long _start, _size, _end, end;
+	char pmaxcfg;
+
+	end = start + size - 1;
+	for (int i = 0; i < ANDES_MAX_PMA_REGIONS; i++) {
+		pmaxcfg = get_pmaxcfg(i);
+		if (is_pma_entry_disable(pmaxcfg))
+			continue;
+
+		decode_pmaaddrx(i, &_start, &_size);
+		_end = _start + _size - 1;
+
+		if (MAX(start, _start) <= MIN(end, _end)) {
+			sbi_printf(
+				"ERROR %s(): %#lx ~ %#lx overlaps with PMA%d: %#lx ~ %#lx\n",
+				__func__, start, end, i, _start, _end);
+			return true;
+		}
+	}
+
+	return false;
+}
+
 static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
 				     unsigned int entry_id)
 {
@@ -294,3 +362,45 @@ bool andes_sbi_probe_pma(void)
 {
 	return (csr_read(CSR_MMSC_CFG) & MMSC_CFG_PPMA_MASK) ? true : false;
 }
+
+int andes_sbi_set_pma(unsigned long pa, unsigned long size, u8 flags)
+{
+	unsigned int entry_id;
+	unsigned long rc;
+	char pmaxcfg;
+	struct andes_pma_region region;
+
+	if (!andes_sbi_probe_pma()) {
+		sbi_printf("ERROR %s(): Platform does not support PPMA.\n",
+			   __func__);
+		return SBI_ERR_NOT_SUPPORTED;
+	}
+
+	if (has_pma_region_overlap(pa, size))
+		return SBI_ERR_INVALID_PARAM;
+
+	for (entry_id = 0; entry_id < ANDES_MAX_PMA_REGIONS; entry_id++) {
+		pmaxcfg = get_pmaxcfg(entry_id);
+		if (is_pma_entry_disable(pmaxcfg)) {
+			region.pa = pa;
+			region.size = size;
+			region.flags = flags;
+			break;
+		}
+	}
+
+	if (entry_id == ANDES_MAX_PMA_REGIONS) {
+		sbi_printf("ERROR %s(): All PMA entries have run out\n",
+			   __func__);
+		return SBI_ERR_FAILED;
+	}
+
+	rc = andes_pma_setup(&region, entry_id);
+	if (rc == SBI_EINVAL) {
+		sbi_printf("ERROR %s(): Failed to set PMAADDR%d\n",
+			   __func__, entry_id);
+		return SBI_ERR_FAILED;
+	}
+
+	return SBI_SUCCESS;
+}
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
index a7ca4a59fa0..f27a07c48eb 100644
--- a/platform/generic/andes/andes_sbi.c
+++ b/platform/generic/andes/andes_sbi.c
@@ -13,6 +13,7 @@ enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_FID0 = 0, /* Reserved for future use */
 	SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
 	SBI_EXT_ANDES_PMA_PROBE,
+	SBI_EXT_ANDES_PMA_SET,
 };
 
 static bool andes_cache_controllable(void)
@@ -39,6 +40,8 @@ int andes_sbi_vendor_ext_provider(long funcid,
 				  struct sbi_ecall_return *out,
 				  const struct fdt_match *match)
 {
+	int ret = 0;
+
 	switch (funcid) {
 	case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
 		out->value = andes_apply_iocp_sw_workaround();
@@ -46,10 +49,12 @@ int andes_sbi_vendor_ext_provider(long funcid,
 	case SBI_EXT_ANDES_PMA_PROBE:
 		out->value = andes_sbi_probe_pma();
 		break;
-
+	case SBI_EXT_ANDES_PMA_SET:
+		ret = andes_sbi_set_pma(regs->a0, regs->a1, regs->a2);
+		break;
 	default:
-		return SBI_EINVAL;
+		ret = SBI_ENOTSUPP;
 	}
 
-	return 0;
+	return ret;
 }
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index 147dca1e97d..487d9bf4248 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -12,11 +12,15 @@
 
 #define ANDES_PMA_GRANULARITY			(1 << 12)
 
+#define ANDES_PMACFG_ETYP_OFFSET		0
+#define ANDES_PMACFG_ETYP_MASK			(3 << ANDES_PMACFG_ETYP_OFFSET)
+#define ANDES_PMACFG_ETYP_OFF			(0 << ANDES_PMACFG_ETYP_OFFSET)
 /* Naturally aligned power of 2 region */
-#define ANDES_PMACFG_ETYP_NAPOT			3
+#define ANDES_PMACFG_ETYP_NAPOT			(3 << ANDES_PMACFG_ETYP_OFFSET)
 
+#define ANDES_PMACFG_MTYP_OFFSET		2
 /* Memory, Non-cacheable, Bufferable */
-#define ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF	(3 << 2)
+#define ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF	(3 << ANDES_PMACFG_MTYP_OFFSET)
 
 /**
  * struct andes_pma_region - Describes PMA regions
@@ -59,4 +63,18 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
  */
 bool andes_sbi_probe_pma(void);
 
+/**
+ * Set a NAPOT region with given memory attributes
+ * @param pa: Start address of the NAPOT region
+ * @param size: Size of the NAPOT region
+ * @param flags: Memory attributes set to the NAPOT region
+ *
+ * @return SBI_SUCCESS on success
+ * @return SBI_ERR_NOT_SUPPORTED if hardware does not support PPMA features
+ * @return SBI_ERR_INVALID_PARAM if the given region is overlapped with the
+ *	   region that has been set already
+ * @return SBI_ERR_FAILED if available entries have run out or setup fails
+ */
+int andes_sbi_set_pma(unsigned long pa, unsigned long size, u8 flags);
+
 #endif /* _ANDES_PMA_H_ */

From 3d1f53b1732dee047bef053fd25aa7b57051b47c Mon Sep 17 00:00:00 2001
From: Ben Zong-You Xie <ben717@andestech.com>
Date: Tue, 23 Jul 2024 15:57:28 +0800
Subject: [PATCH 1630/1765] platform: generic: andes: add a new Andes SBI call
 to free a PMA entry

Add a new Andes SBI call to free a PMA entry, and reset the memory
attributes for the corresponding NAPOT region.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/andes/andes_pma.c         | 71 ++++++++++++++++------
 platform/generic/andes/andes_sbi.c         |  4 ++
 platform/generic/include/andes/andes_pma.h |  9 +++
 3 files changed, 67 insertions(+), 17 deletions(-)

diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index 70039cadf46..c28091476cc 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -120,6 +120,27 @@ static char get_pmaxcfg(int entry_id)
 	return *pmaxcfg;
 }
 
+static void set_pmaxcfg(int entry_id, char flags)
+{
+	unsigned int pmacfg_addr;
+	unsigned long pmacfg_val;
+	char *pmaxcfg;
+
+#if __riscv_xlen == 64
+	pmacfg_addr = CSR_PMACFG0 + ((entry_id / 8) ? 2 : 0);
+	pmacfg_val = andes_pma_read_num(pmacfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
+#elif __riscv_xlen == 32
+	pmacfg_addr = CSR_PMACFG0 + (entry_id / 4);
+	pmacfg_val = andes_pma_read_num(pmacfg_addr);
+	pmaxcfg = (char *)&pmacfg_val + (entry_id % 4);
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+	*pmaxcfg = flags;
+	andes_pma_write_num(pmacfg_addr, pmacfg_val);
+}
+
 static void decode_pmaaddrx(int entry_id, unsigned long *start,
 			    unsigned long *size)
 {
@@ -167,30 +188,14 @@ static unsigned long andes_pma_setup(const struct andes_pma_region *pma_region,
 {
 	unsigned long size = pma_region->size;
 	unsigned long addr = pma_region->pa;
-	unsigned int pma_cfg_addr;
-	unsigned long pmacfg_val;
 	unsigned long pmaaddr;
-	char *pmaxcfg;
 
 	/* Check for a 4KiB granularity NAPOT region*/
 	if (size < ANDES_PMA_GRANULARITY || not_napot(addr, size) ||
 	    !(pma_region->flags & ANDES_PMACFG_ETYP_NAPOT))
 		return SBI_EINVAL;
 
-#if __riscv_xlen == 64
-	pma_cfg_addr = CSR_PMACFG0 + ((entry_id / 8) ? 2 : 0);
-	pmacfg_val = andes_pma_read_num(pma_cfg_addr);
-	pmaxcfg = (char *)&pmacfg_val + (entry_id % 8);
-#elif __riscv_xlen == 32
-	pma_cfg_addr = CSR_PMACFG0 + (entry_id / 4);
-	pmacfg_val = andes_pma_read_num(pma_cfg_addr);
-	pmaxcfg = (char *)&pmacfg_val + (entry_id % 4);
-#else
-#error "Unexpected __riscv_xlen"
-#endif
-	*pmaxcfg = pma_region->flags;
-
-	andes_pma_write_num(pma_cfg_addr, pmacfg_val);
+	set_pmaxcfg(entry_id, pma_region->flags);
 
 	pmaaddr = (addr >> 2) + (size >> 3) - 1;
 
@@ -404,3 +409,35 @@ int andes_sbi_set_pma(unsigned long pa, unsigned long size, u8 flags)
 
 	return SBI_SUCCESS;
 }
+
+int andes_sbi_free_pma(unsigned long pa)
+{
+	unsigned long start, size;
+	char pmaxcfg;
+
+	if (!andes_sbi_probe_pma()) {
+		sbi_printf("ERROR %s(): Platform does not support PPMA.\n",
+			   __func__);
+		return SBI_ERR_NOT_SUPPORTED;
+	}
+
+	for (int i = 0; i < ANDES_MAX_PMA_REGIONS; i++) {
+		pmaxcfg = get_pmaxcfg(i);
+		if (is_pma_entry_disable(pmaxcfg))
+			continue;
+
+		decode_pmaaddrx(i, &start, &size);
+		if (start != pa)
+			continue;
+
+		set_pmaxcfg(i, ANDES_PMACFG_ETYP_OFF);
+		andes_pma_write_num(CSR_PMAADDR0 + i, 0);
+
+		return SBI_SUCCESS;
+	}
+
+	sbi_printf("ERROR %s(): Failed to find the entry with PA %#lx\n",
+		   __func__, pa);
+
+	return SBI_ERR_FAILED;
+}
diff --git a/platform/generic/andes/andes_sbi.c b/platform/generic/andes/andes_sbi.c
index f27a07c48eb..01a3c1ac0e6 100644
--- a/platform/generic/andes/andes_sbi.c
+++ b/platform/generic/andes/andes_sbi.c
@@ -14,6 +14,7 @@ enum sbi_ext_andes_fid {
 	SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
 	SBI_EXT_ANDES_PMA_PROBE,
 	SBI_EXT_ANDES_PMA_SET,
+	SBI_EXT_ANDES_PMA_FREE,
 };
 
 static bool andes_cache_controllable(void)
@@ -52,6 +53,9 @@ int andes_sbi_vendor_ext_provider(long funcid,
 	case SBI_EXT_ANDES_PMA_SET:
 		ret = andes_sbi_set_pma(regs->a0, regs->a1, regs->a2);
 		break;
+	case SBI_EXT_ANDES_PMA_FREE:
+		ret = andes_sbi_free_pma(regs->a0);
+		break;
 	default:
 		ret = SBI_ENOTSUPP;
 	}
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index 487d9bf4248..e2d52791544 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -77,4 +77,13 @@ bool andes_sbi_probe_pma(void);
  */
 int andes_sbi_set_pma(unsigned long pa, unsigned long size, u8 flags);
 
+/**
+ * Reset the memory attribute of a NAPOT region
+ * @param pa Start address of the NAPOT region
+ *
+ * @return SBI_SUCCESS on success
+ * @return SBI_ERR_FAILED if the given region is not set before
+ */
+int andes_sbi_free_pma(unsigned long pa);
+
 #endif /* _ANDES_PMA_H_ */

From 56183ca609aa72a075d96d23eebe3df7fbaf53cd Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Wed, 24 Jul 2024 23:00:54 +0800
Subject: [PATCH 1631/1765] lib: utils: fdt_domain: Use consistent device-tree
 address when next-arg1 is missing

The diagram shown below illustrates the boot-flow involving OP-TEE OS
initialization.

    (1)-----------+
     | U-Boot SPL |
     +------------+
         |
         v
    (2)-------------------------------------------------------------+
     | OpenSBI (fw_dynamic)                                         |
     |                (4)------------------------+                  |
     |                 | optee dispatcher driver |                  |
     +-----------------+-------^---------|-------+------------------+
M-mode   |                     |         |
---------+--[trusted domain]---+----.----+--[untrusted domain]-------
S-mode   |  (coldboot domain)  |    |    |
         v                     |    |    v
    (3)---------------------------+ |(5)----------------------------+
     | OP-TEE OS                  | | | U-Boot                      |
     +----------------------------+ | +-----------------------------+
                                    |    |
                                    |    v
                                    |(6)----------------------------+
                                    | | Linux                       |
                                    | +-----------------------------+

As OP-TEE OS has device-tree node fixups that need to be passed
through to the next boot stages, e.g. the reserved memory node:

  reserved-memory {
    #address-cells = <2>;
    #size-cells = <2>;
    ranges;
    optee_core@f1000000 {
      no-map;
      reg = <0x0 0xf1000000   // OP-TEE OS base address
             0x0 0x01000000>;
    };
    <...>
  };

Instead of using 0x0 as the default value, allow identical next-arg1
to be used by non-coldboot domain (i.e., untrusted domain) when the
property is not provided.

Also, update the description of next-arg1 property in the document.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/domain_support.md     | 4 +---
 lib/utils/fdt/fdt_domain.c | 3 +--
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index b34e43aa8da..1a4006851d2 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -180,9 +180,7 @@ The DT properties of a domain instance DT node are as follows:
   boot HART of the domain instance.
 * **next-arg1** (Optional) - The 64 bit next booting stage arg1 for the
   domain instance. If this DT property is not available and coldboot HART
-  is not assigned to the domain instance then **0x0** is used as default
-  value. If this DT property is not available and coldboot HART is assigned
-  to the domain instance then **next booting stage arg1 of coldboot HART**
+  is not assigned to the domain instance then **next booting stage arg1 of coldboot HART**
   is used as default value.
 * **next-addr** (Optional) - The 64 bit next booting stage address for the
   domain instance. If this DT property is not available and coldboot HART
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index fa1c35759ba..a13daa61417 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -395,8 +395,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 		val64 = fdt32_to_cpu(val[0]);
 		val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
 	} else {
-		if (domain_offset == *cold_domain_offset)
-			val64 = sbi_scratch_thishart_ptr()->next_arg1;
+		val64 = sbi_scratch_thishart_ptr()->next_arg1;
 	}
 	dom->next_arg1 = val64;
 

From bcb81f0cbe55fee86bd1d123d5fefc4848af4f8e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:42 -0700
Subject: [PATCH 1632/1765] lib: utils/fdt: Fix fdt_add_cpu_idle_states()
 prototype

The function prototype should use the same parameter name as the
documentation and the function definition.

Fixes: 33bf9174602c ("lib: utils: Add fdt_add_cpu_idle_states() helper function")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_fixup.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index ecd55a724a8..21a530113ad 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -30,7 +30,7 @@ struct sbi_cpu_idle_state {
  * @param states: array of idle state descriptions, ending with empty element
  * @return zero on success and -ve on failure
  */
-int fdt_add_cpu_idle_states(void *dtb, const struct sbi_cpu_idle_state *state);
+int fdt_add_cpu_idle_states(void *fdt, const struct sbi_cpu_idle_state *state);
 
 /**
  * Fix up the CPU node in the device tree

From f229a32828fee1ac9508f3c19f49ea7584c7c446 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:43 -0700
Subject: [PATCH 1633/1765] lib: utils/regmap: Fix typo in comment

Balance the quotation marks; double quotes are idiomatic here.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/regmap/fdt_regmap.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi_utils/regmap/fdt_regmap.h b/include/sbi_utils/regmap/fdt_regmap.h
index 0672162c02f..403dd7d4f66 100644
--- a/include/sbi_utils/regmap/fdt_regmap.h
+++ b/include/sbi_utils/regmap/fdt_regmap.h
@@ -25,7 +25,7 @@ struct fdt_regmap {
 int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
 			      struct regmap **out_rmap);
 
-/** Get regmap instance based on "regmap' property of the specified DT node */
+/** Get regmap instance based on "regmap" property of the specified DT node */
 int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap);
 
 #endif

From 33ba4e05673a8c8f538b4b1c0c5908a73e5ed6d7 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:44 -0700
Subject: [PATCH 1634/1765] lib: utils/fdt: Constify FDT parsing functions

Distinguish between functions which modify the devicetree and those
which only extract information from it. Other than the iterators in
fdt_domain.c, this is a mechanical conversion.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_domain.h |  4 +-
 include/sbi_utils/fdt/fdt_helper.h | 54 +++++++++++++-------------
 include/sbi_utils/fdt/fdt_pmu.h    |  4 +-
 lib/utils/fdt/fdt_domain.c         | 31 +++++++++++----
 lib/utils/fdt/fdt_helper.c         | 62 +++++++++++++++---------------
 lib/utils/fdt/fdt_pmu.c            |  2 +-
 6 files changed, 87 insertions(+), 70 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_domain.h b/include/sbi_utils/fdt/fdt_domain.h
index ee09d1bfa52..8c2dee09564 100644
--- a/include/sbi_utils/fdt/fdt_domain.h
+++ b/include/sbi_utils/fdt/fdt_domain.h
@@ -70,12 +70,12 @@ void fdt_domain_fixup(void *fdt);
  *
  * @return 0 on success and negative error code on failure
  */
-int fdt_domains_populate(void *fdt);
+int fdt_domains_populate(const void *fdt);
 
 #else
 
 static inline void fdt_domain_fixup(void *fdt) { }
-static inline int fdt_domains_populate(void *fdt) { return 0; }
+static inline int fdt_domains_populate(const void *fdt) { return 0; }
 
 #endif
 
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index ab4a80fa6f4..28ae76773d9 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -34,84 +34,84 @@ struct platform_uart_data {
 	unsigned long reg_offset;
 };
 
-const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
+const struct fdt_match *fdt_match_node(const void *fdt, int nodeoff,
 				       const struct fdt_match *match_table);
 
-int fdt_find_match(void *fdt, int startoff,
+int fdt_find_match(const void *fdt, int startoff,
 		   const struct fdt_match *match_table,
 		   const struct fdt_match **out_match);
 
-int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
+int fdt_parse_phandle_with_args(const void *fdt, int nodeoff,
 				const char *prop, const char *cells_prop,
 				int index, struct fdt_phandle_args *out_args);
 
-int fdt_get_node_addr_size(void *fdt, int node, int index,
+int fdt_get_node_addr_size(const void *fdt, int node, int index,
 			   uint64_t *addr, uint64_t *size);
 
-int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
+int fdt_get_node_addr_size_by_name(const void *fdt, int node, const char *name,
 				   uint64_t *addr, uint64_t *size);
 
-bool fdt_node_is_enabled(void *fdt, int nodeoff);
+bool fdt_node_is_enabled(const void *fdt, int nodeoff);
 
-int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
+int fdt_parse_hart_id(const void *fdt, int cpu_offset, u32 *hartid);
 
-int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid);
+int fdt_parse_max_enabled_hart_id(const void *fdt, u32 *max_hartid);
 
-int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
+int fdt_parse_timebase_frequency(const void *fdt, unsigned long *freq);
 
-int fdt_parse_isa_extensions(void *fdt, unsigned int hard_id,
+int fdt_parse_isa_extensions(const void *fdt, unsigned int hard_id,
 			     unsigned long *extensions);
 
-int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_gaisler_uart_node(const void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
-int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
+int fdt_parse_renesas_scif_node(const void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
-int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_shakti_uart_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
-int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_sifive_uart_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
-int fdt_parse_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_uart_node(const void *fdt, int nodeoffset,
 			struct platform_uart_data *uart);
 
-int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
+int fdt_parse_uart8250(const void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
-int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
+int fdt_parse_xlnx_uartlite_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
 struct aplic_data;
 
-int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic);
+int fdt_parse_aplic_node(const void *fdt, int nodeoff, struct aplic_data *aplic);
 
 struct imsic_data;
 
-bool fdt_check_imsic_mlevel(void *fdt);
+bool fdt_check_imsic_mlevel(const void *fdt);
 
-int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic);
+int fdt_parse_imsic_node(const void *fdt, int nodeoff, struct imsic_data *imsic);
 
 struct plic_data;
 
-int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
+int fdt_parse_plic_node(const void *fdt, int nodeoffset, struct plic_data *plic);
 
-int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
+int fdt_parse_plic(const void *fdt, struct plic_data *plic, const char *compat);
 
-int fdt_parse_aclint_node(void *fdt, int nodeoffset,
+int fdt_parse_aclint_node(const void *fdt, int nodeoffset,
 			  bool for_timer, bool allow_regname,
 			  unsigned long *out_addr1, unsigned long *out_size1,
 			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count);
 
-int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
-			  unsigned long *plmt_size, u32 *hart_count);
+int fdt_parse_plmt_node(const void *fdt, int nodeoffset, unsigned long *plmt_base,
+			unsigned long *plmt_size, u32 *hart_count);
 
-int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
+int fdt_parse_plicsw_node(const void *fdt, int nodeoffset, unsigned long *plicsw_base,
 			  unsigned long *size, u32 *hart_count);
 
-int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
+int fdt_parse_compat_addr(const void *fdt, uint64_t *addr,
 			  const char *compatible);
 
 static inline void *fdt_get_address(void)
diff --git a/include/sbi_utils/fdt/fdt_pmu.h b/include/sbi_utils/fdt/fdt_pmu.h
index b10ae270971..b31d835129b 100644
--- a/include/sbi_utils/fdt/fdt_pmu.h
+++ b/include/sbi_utils/fdt/fdt_pmu.h
@@ -52,7 +52,7 @@ int fdt_pmu_fixup(void *fdt);
  *
  * @return 0 on success and negative error code on failure
  */
-int fdt_pmu_setup(void *fdt);
+int fdt_pmu_setup(const void *fdt);
 
 /**
  * Get the mhpmevent select value read from DT for a given event
@@ -70,7 +70,7 @@ extern uint32_t hw_event_count;
 #else
 
 static inline void fdt_pmu_fixup(void *fdt) { }
-static inline int fdt_pmu_setup(void *fdt) { return 0; }
+static inline int fdt_pmu_setup(const void *fdt) { return 0; }
 static inline uint64_t fdt_pmu_get_select_value(uint32_t event_idx) { return 0; }
 
 #endif
diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index a13daa61417..8683bb3ea72 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -48,6 +48,14 @@ int fdt_iterate_each_domain(void *fdt, void *opaque,
 	return 0;
 }
 
+static int fdt_iterate_each_domain_ro(const void *fdt, void *opaque,
+				      int (*fn)(const void *fdt, int domain_offset,
+						void *opaque))
+{
+	return fdt_iterate_each_domain((void *)fdt, opaque,
+				       (int (*)(void *, int,  void *))fn);
+}
+
 int fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
 			       int (*fn)(void *fdt, int domain_offset,
 					 int region_offset, u32 region_access,
@@ -88,6 +96,15 @@ int fdt_iterate_each_memregion(void *fdt, int domain_offset, void *opaque,
 	return 0;
 }
 
+static int fdt_iterate_each_memregion_ro(const void *fdt, int domain_offset, void *opaque,
+					 int (*fn)(const void *fdt, int domain_offset,
+						   int region_offset, u32 region_access,
+						   void *opaque))
+{
+	return fdt_iterate_each_memregion((void *)fdt, domain_offset, opaque,
+					  (int (*)(void *, int, int, u32, void *))fn);
+}
+
 struct __fixup_find_domain_offset_info {
 	const char *name;
 	int *doffset;
@@ -228,7 +245,7 @@ struct parse_region_data {
 	u32 max_regions;
 };
 
-static int __fdt_parse_region(void *fdt, int domain_offset,
+static int __fdt_parse_region(const void *fdt, int domain_offset,
 			      int region_offset, u32 region_access,
 			      void *opaque)
 {
@@ -283,7 +300,7 @@ static int __fdt_parse_region(void *fdt, int domain_offset,
 	return 0;
 }
 
-static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
+static int __fdt_parse_domain(const void *fdt, int domain_offset, void *opaque)
 {
 	u32 val32;
 	u64 val64;
@@ -347,8 +364,8 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	}
 
 	/* Setup memregions from DT */
-	err = fdt_iterate_each_memregion(fdt, domain_offset, &preg,
-					 __fdt_parse_region);
+	err = fdt_iterate_each_memregion_ro(fdt, domain_offset, &preg,
+					    __fdt_parse_region);
 	if (err)
 		goto fail_free_all;
 
@@ -490,7 +507,7 @@ static int __fdt_parse_domain(void *fdt, int domain_offset, void *opaque)
 	return err;
 }
 
-int fdt_domains_populate(void *fdt)
+int fdt_domains_populate(const void *fdt)
 {
 	const u32 *val;
 	int cold_domain_offset;
@@ -529,6 +546,6 @@ int fdt_domains_populate(void *fdt)
 	}
 
 	/* Iterate over each domain in FDT and populate details */
-	return fdt_iterate_each_domain(fdt, &cold_domain_offset,
-				       __fdt_parse_domain);
+	return fdt_iterate_each_domain_ro(fdt, &cold_domain_offset,
+					  __fdt_parse_domain);
 }
diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
index b7f7e075c45..cb350e5a499 100644
--- a/lib/utils/fdt/fdt_helper.c
+++ b/lib/utils/fdt/fdt_helper.c
@@ -33,7 +33,7 @@
 #define DEFAULT_SHAKTI_UART_FREQ		50000000
 #define DEFAULT_SHAKTI_UART_BAUD		115200
 
-const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
+const struct fdt_match *fdt_match_node(const void *fdt, int nodeoff,
 				       const struct fdt_match *match_table)
 {
 	int ret;
@@ -52,7 +52,7 @@ const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
 	return NULL;
 }
 
-int fdt_find_match(void *fdt, int startoff,
+int fdt_find_match(const void *fdt, int startoff,
 		   const struct fdt_match *match_table,
 		   const struct fdt_match **out_match)
 {
@@ -75,7 +75,7 @@ int fdt_find_match(void *fdt, int startoff,
 	return SBI_ENODEV;
 }
 
-int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
+int fdt_parse_phandle_with_args(const void *fdt, int nodeoff,
 				const char *prop, const char *cells_prop,
 				int index, struct fdt_phandle_args *out_args)
 {
@@ -122,7 +122,7 @@ int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 	return SBI_ENOENT;
 }
 
-static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
+static int fdt_translate_address(const void *fdt, uint64_t reg, int parent,
 				 uint64_t *addr)
 {
 	int i, rlen;
@@ -160,7 +160,7 @@ static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
 	return 0;
 }
 
-int fdt_get_node_addr_size(void *fdt, int node, int index,
+int fdt_get_node_addr_size(const void *fdt, int node, int index,
 			   uint64_t *addr, uint64_t *size)
 {
 	int parent, len, i, rc;
@@ -216,7 +216,7 @@ int fdt_get_node_addr_size(void *fdt, int node, int index,
 	return 0;
 }
 
-int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
+int fdt_get_node_addr_size_by_name(const void *fdt, int node, const char *name,
 				   uint64_t *addr, uint64_t *size)
 {
 	int i, j, count;
@@ -242,7 +242,7 @@ int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
 	return SBI_ENODEV;
 }
 
-bool fdt_node_is_enabled(void *fdt, int nodeoff)
+bool fdt_node_is_enabled(const void *fdt, int nodeoff)
 {
 	int len;
 	const void *prop;
@@ -260,7 +260,7 @@ bool fdt_node_is_enabled(void *fdt, int nodeoff)
 	return false;
 }
 
-int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
+int fdt_parse_hart_id(const void *fdt, int cpu_offset, u32 *hartid)
 {
 	int len;
 	const void *prop;
@@ -288,7 +288,7 @@ int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid)
 	return 0;
 }
 
-int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid)
+int fdt_parse_max_enabled_hart_id(const void *fdt, u32 *max_hartid)
 {
 	u32 hartid;
 	int err, cpu_offset, cpus_offset;
@@ -319,7 +319,7 @@ int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid)
 	return 0;
 }
 
-int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq)
+int fdt_parse_timebase_frequency(const void *fdt, unsigned long *freq)
 {
 	const fdt32_t *val;
 	int len, cpus_offset;
@@ -423,7 +423,7 @@ static void fdt_parse_isa_extensions_one_hart(const char *isa,
 	}
 }
 
-static int fdt_parse_isa_all_harts(void *fdt)
+static int fdt_parse_isa_all_harts(const void *fdt)
 {
 	u32 hartid;
 	const fdt32_t *val;
@@ -472,7 +472,7 @@ static int fdt_parse_isa_all_harts(void *fdt)
 	return 0;
 }
 
-int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
+int fdt_parse_isa_extensions(const void *fdt, unsigned int hartid,
 			unsigned long *extensions)
 {
 	int rc, i;
@@ -502,7 +502,7 @@ int fdt_parse_isa_extensions(void *fdt, unsigned int hartid,
 	return 0;
 }
 
-static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
+static int fdt_parse_uart_node_common(const void *fdt, int nodeoffset,
 				      struct platform_uart_data *uart,
 				      unsigned long default_freq,
 				      unsigned long default_baud)
@@ -539,7 +539,7 @@ static int fdt_parse_uart_node_common(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_gaisler_uart_node(const void *fdt, int nodeoffset,
 				struct platform_uart_data *uart)
 {
 	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
@@ -547,7 +547,7 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 					DEFAULT_UART_BAUD);
 }
 
-int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
+int fdt_parse_renesas_scif_node(const void *fdt, int nodeoffset,
 				struct platform_uart_data *uart)
 {
 	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
@@ -555,7 +555,7 @@ int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
 					  DEFAULT_RENESAS_SCIF_BAUD);
 }
 
-int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_shakti_uart_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
 	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
@@ -563,7 +563,7 @@ int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 					DEFAULT_SHAKTI_UART_BAUD);
 }
 
-int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_sifive_uart_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
 	return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
@@ -571,7 +571,7 @@ int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 					DEFAULT_SIFIVE_UART_BAUD);
 }
 
-int fdt_parse_uart_node(void *fdt, int nodeoffset,
+int fdt_parse_uart_node(const void *fdt, int nodeoffset,
 			struct platform_uart_data *uart)
 {
 	int len, rc;
@@ -604,7 +604,7 @@ int fdt_parse_uart_node(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
+int fdt_parse_uart8250(const void *fdt, struct platform_uart_data *uart,
 		   const char *compatible)
 {
 	int nodeoffset;
@@ -619,13 +619,13 @@ int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 	return fdt_parse_uart_node(fdt, nodeoffset, uart);
 }
 
-int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
+int fdt_parse_xlnx_uartlite_node(const void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart)
 {
 	return fdt_parse_uart_node_common(fdt, nodeoffset, uart, 0, 0);
 }
 
-int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
+int fdt_parse_aplic_node(const void *fdt, int nodeoff, struct aplic_data *aplic)
 {
 	bool child_found;
 	const fdt32_t *val;
@@ -785,7 +785,7 @@ int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic)
 	return 0;
 }
 
-bool fdt_check_imsic_mlevel(void *fdt)
+bool fdt_check_imsic_mlevel(const void *fdt)
 {
 	const fdt32_t *val;
 	int i, len, noff = 0;
@@ -808,7 +808,7 @@ bool fdt_check_imsic_mlevel(void *fdt)
 	return false;
 }
 
-int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic)
+int fdt_parse_imsic_node(const void *fdt, int nodeoff, struct imsic_data *imsic)
 {
 	const fdt32_t *val;
 	struct imsic_regs *regs;
@@ -887,7 +887,7 @@ int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic)
 	return 0;
 }
 
-int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
+int fdt_parse_plic_node(const void *fdt, int nodeoffset, struct plic_data *plic)
 {
 	int len, rc;
 	const fdt32_t *val;
@@ -910,7 +910,7 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
 	return 0;
 }
 
-int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
+int fdt_parse_plic(const void *fdt, struct plic_data *plic, const char *compat)
 {
 	int nodeoffset;
 
@@ -924,7 +924,7 @@ int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat)
 	return fdt_parse_plic_node(fdt, nodeoffset, plic);
 }
 
-static int fdt_get_aclint_addr_size_by_name(void *fdt, int nodeoffset,
+static int fdt_get_aclint_addr_size_by_name(const void *fdt, int nodeoffset,
 					    unsigned long *out_addr1,
 					    unsigned long *out_size1,
 					    unsigned long *out_addr2,
@@ -950,7 +950,7 @@ static int fdt_get_aclint_addr_size_by_name(void *fdt, int nodeoffset,
 	return 0;
 }
 
-static int fdt_get_aclint_addr_size(void *fdt, int nodeoffset,
+static int fdt_get_aclint_addr_size(const void *fdt, int nodeoffset,
 				    unsigned long *out_addr1,
 				    unsigned long *out_size1,
 				    unsigned long *out_addr2,
@@ -978,7 +978,7 @@ static int fdt_get_aclint_addr_size(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_aclint_node(void *fdt, int nodeoffset,
+int fdt_parse_aclint_node(const void *fdt, int nodeoffset,
 			  bool for_timer, bool allow_regname,
 			  unsigned long *out_addr1, unsigned long *out_size1,
 			  unsigned long *out_addr2, unsigned long *out_size2,
@@ -1053,7 +1053,7 @@ int fdt_parse_aclint_node(void *fdt, int nodeoffset,
 	return 0;
 }
 
-int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
+int fdt_parse_plmt_node(const void *fdt, int nodeoffset, unsigned long *plmt_base,
 			  unsigned long *plmt_size, u32 *hart_count)
 {
 	const fdt32_t *val;
@@ -1109,7 +1109,7 @@ int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
 	return 0;
 }
 
-int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
+int fdt_parse_plicsw_node(const void *fdt, int nodeoffset, unsigned long *plicsw_base,
 			  unsigned long *size, u32 *hart_count)
 {
 	const fdt32_t *val;
@@ -1165,7 +1165,7 @@ int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 	return 0;
 }
 
-int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
+int fdt_parse_compat_addr(const void *fdt, uint64_t *addr,
 			  const char *compatible)
 {
 	int nodeoffset, rc;
diff --git a/lib/utils/fdt/fdt_pmu.c b/lib/utils/fdt/fdt_pmu.c
index e23e8223e6f..64de569e0f0 100644
--- a/lib/utils/fdt/fdt_pmu.c
+++ b/lib/utils/fdt/fdt_pmu.c
@@ -56,7 +56,7 @@ int fdt_pmu_fixup(void *fdt)
 	return 0;
 }
 
-int fdt_pmu_setup(void *fdt)
+int fdt_pmu_setup(const void *fdt)
 {
 	int i, pmu_offset, len, result;
 	const u32 *event_val;

From c585354380b134b1552e30946a7cc95c2f0a3a95 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:45 -0700
Subject: [PATCH 1635/1765] lib: utils/gpio: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/gpio/fdt_gpio.h    | 4 ++--
 lib/utils/gpio/fdt_gpio.c            | 6 +++---
 lib/utils/gpio/fdt_gpio_designware.c | 2 +-
 lib/utils/gpio/fdt_gpio_sifive.c     | 2 +-
 lib/utils/gpio/fdt_gpio_starfive.c   | 2 +-
 5 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/sbi_utils/gpio/fdt_gpio.h b/include/sbi_utils/gpio/fdt_gpio.h
index ccbf2a11e42..303ef6328a6 100644
--- a/include/sbi_utils/gpio/fdt_gpio.h
+++ b/include/sbi_utils/gpio/fdt_gpio.h
@@ -20,12 +20,12 @@ struct fdt_gpio {
 	int (*xlate)(struct gpio_chip *chip,
 		     const struct fdt_phandle_args *pargs,
 		     struct gpio_pin *out_pin);
-	int (*init)(void *fdt, int nodeoff, u32 phandle,
+	int (*init)(const void *fdt, int nodeoff, u32 phandle,
 		    const struct fdt_match *match);
 };
 
 /** Get a GPIO pin using "gpios" DT property of client DT node */
-int fdt_gpio_pin_get(void *fdt, int nodeoff, int index,
+int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 		     struct gpio_pin *out_pin);
 
 /** Simple xlate function to convert two GPIO FDT cells into GPIO pin */
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index 7258128debd..d8d847f1d1c 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -31,7 +31,7 @@ static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
 	return NULL;
 }
 
-static int fdt_gpio_init(void *fdt, u32 phandle)
+static int fdt_gpio_init(const void *fdt, u32 phandle)
 {
 	int pos, nodeoff, rc;
 	struct fdt_gpio *drv;
@@ -64,7 +64,7 @@ static int fdt_gpio_init(void *fdt, u32 phandle)
 	return SBI_ENOSYS;
 }
 
-static int fdt_gpio_chip_find(void *fdt, u32 phandle,
+static int fdt_gpio_chip_find(const void *fdt, u32 phandle,
 			      struct gpio_chip **out_chip)
 {
 	int rc;
@@ -88,7 +88,7 @@ static int fdt_gpio_chip_find(void *fdt, u32 phandle,
 	return 0;
 }
 
-int fdt_gpio_pin_get(void *fdt, int nodeoff, int index,
+int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 		     struct gpio_pin *out_pin)
 {
 	int rc;
diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
index 018e2d54035..20701a151c9 100644
--- a/lib/utils/gpio/fdt_gpio_designware.c
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -78,7 +78,7 @@ static void dw_gpio_set(struct gpio_pin *gp, int value)
  * bank A is the only one with irq support but we're not using it here
 */
 
-static int dw_gpio_init_bank(void *fdt, int nodeoff, u32 phandle,
+static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
 			     const struct fdt_match *match)
 {
 	struct dw_gpio_chip *chip;
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index 5e3f39d77b9..e5dbe2bec4a 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -62,7 +62,7 @@ static void sifive_gpio_set(struct gpio_pin *gp, int value)
 
 extern struct fdt_gpio fdt_gpio_sifive;
 
-static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
+static int sifive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
 			    const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
index bd2a9f214aa..d84ff1fee76 100644
--- a/lib/utils/gpio/fdt_gpio_starfive.c
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -71,7 +71,7 @@ static void starfive_gpio_set(struct gpio_pin *gp, int value)
 
 extern struct fdt_gpio fdt_gpio_starfive;
 
-static int starfive_gpio_init(void *fdt, int nodeoff, u32 phandle,
+static int starfive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
 			      const struct fdt_match *match)
 {
 	int rc;

From 039e810437d3fbf96505454cce17c8f90e51996d Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:46 -0700
Subject: [PATCH 1636/1765] lib: utils/i2c: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/i2c/fdt_i2c.h | 4 ++--
 lib/utils/i2c/fdt_i2c.c         | 6 +++---
 lib/utils/i2c/fdt_i2c_dw.c      | 4 ++--
 lib/utils/i2c/fdt_i2c_sifive.c  | 4 ++--
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/sbi_utils/i2c/fdt_i2c.h b/include/sbi_utils/i2c/fdt_i2c.h
index c6e3339906a..65758ec2a77 100644
--- a/include/sbi_utils/i2c/fdt_i2c.h
+++ b/include/sbi_utils/i2c/fdt_i2c.h
@@ -15,12 +15,12 @@
 /** FDT based I2C adapter driver */
 struct fdt_i2c_adapter {
 	const struct fdt_match *match_table;
-	int (*init)(void *fdt, int nodeoff,
+	int (*init)(const void *fdt, int nodeoff,
 		    const struct fdt_match *match);
 };
 
 /** Get I2C adapter identified by nodeoff */
-int fdt_i2c_adapter_get(void *fdt, int nodeoff,
+int fdt_i2c_adapter_get(const void *fdt, int nodeoff,
 			struct i2c_adapter **out_adapter);
 
 #endif
diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
index 6fd35dd0255..d23b40dbcf6 100644
--- a/lib/utils/i2c/fdt_i2c.c
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -20,7 +20,7 @@
 extern struct fdt_i2c_adapter *fdt_i2c_adapter_drivers[];
 extern unsigned long fdt_i2c_adapter_drivers_size;
 
-static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
+static int fdt_i2c_adapter_init(const void *fdt, int nodeoff)
 {
 	int pos, rc;
 	struct fdt_i2c_adapter *drv;
@@ -43,7 +43,7 @@ static int fdt_i2c_adapter_init(void *fdt, int nodeoff)
 	return SBI_ENOSYS;
 }
 
-static int fdt_i2c_adapter_find(void *fdt, int nodeoff,
+static int fdt_i2c_adapter_find(const void *fdt, int nodeoff,
 				struct i2c_adapter **out_adapter)
 {
 	int rc;
@@ -67,7 +67,7 @@ static int fdt_i2c_adapter_find(void *fdt, int nodeoff,
 	return 0;
 }
 
-int fdt_i2c_adapter_get(void *fdt, int nodeoff,
+int fdt_i2c_adapter_get(const void *fdt, int nodeoff,
 			struct i2c_adapter **out_adapter)
 {
 	int rc;
diff --git a/lib/utils/i2c/fdt_i2c_dw.c b/lib/utils/i2c/fdt_i2c_dw.c
index 358ad3c7743..7d14ea0d7b9 100644
--- a/lib/utils/i2c/fdt_i2c_dw.c
+++ b/lib/utils/i2c/fdt_i2c_dw.c
@@ -15,8 +15,8 @@
 #include <sbi_utils/i2c/dw_i2c.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
-static int fdt_dw_i2c_init(void *fdt, int nodeoff,
-			     const struct fdt_match *match)
+static int fdt_dw_i2c_init(const void *fdt, int nodeoff,
+			   const struct fdt_match *match)
 {
 	int rc;
 	struct dw_i2c_adapter *adapter;
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
index 11740624b40..b420a7da526 100644
--- a/lib/utils/i2c/fdt_i2c_sifive.c
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -230,8 +230,8 @@ static int sifive_i2c_adapter_read(struct i2c_adapter *ia, uint8_t addr,
 	return 0;
 }
 
-static int sifive_i2c_init(void *fdt, int nodeoff,
-			    const struct fdt_match *match)
+static int sifive_i2c_init(const void *fdt, int nodeoff,
+			   const struct fdt_match *match)
 {
 	int rc;
 	struct sifive_i2c_adapter *adapter;

From d561418f22f28b1eaedd5a51c338099c359743cf Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:47 -0700
Subject: [PATCH 1637/1765] lib: utils/ipi: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/ipi/fdt_ipi.h | 2 +-
 lib/utils/ipi/fdt_ipi.c         | 2 +-
 lib/utils/ipi/fdt_ipi_mswi.c    | 2 +-
 lib/utils/ipi/fdt_ipi_plicsw.c  | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
index 1dd9062d750..c62452012ad 100644
--- a/include/sbi_utils/ipi/fdt_ipi.h
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -16,7 +16,7 @@
 
 struct fdt_ipi {
 	const struct fdt_match *match_table;
-	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 	int (*warm_init)(void);
 	void (*exit)(void);
 };
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 0b75093ebcd..959cf57dc07 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -36,7 +36,7 @@ static int fdt_ipi_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_ipi *drv;
 	const struct fdt_match *match;
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < fdt_ipi_drivers_size; pos++) {
 		drv = fdt_ipi_drivers[pos];
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index a709abe150d..c78dead1bac 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -13,7 +13,7 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/ipi/aclint_mswi.h>
 
-static int ipi_mswi_cold_init(void *fdt, int nodeoff,
+static int ipi_mswi_cold_init(const void *fdt, int nodeoff,
 			      const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/ipi/fdt_ipi_plicsw.c b/lib/utils/ipi/fdt_ipi_plicsw.c
index bf29bfc19d8..3288574563b 100644
--- a/lib/utils/ipi/fdt_ipi_plicsw.c
+++ b/lib/utils/ipi/fdt_ipi_plicsw.c
@@ -17,8 +17,8 @@
 
 extern struct plicsw_data plicsw;
 
-int fdt_plicsw_cold_ipi_init(void *fdt, int nodeoff,
-				const struct fdt_match *match)
+int fdt_plicsw_cold_ipi_init(const void *fdt, int nodeoff,
+			     const struct fdt_match *match)
 {
 	int rc;
 

From 7df1c8126fd1027af0c9b09ea806e1f50d8a0785 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:48 -0700
Subject: [PATCH 1638/1765] lib: utils/irqchip: Constify FDT pointers in
 parsing functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip.h | 2 +-
 lib/utils/irqchip/fdt_irqchip.c         | 2 +-
 lib/utils/irqchip/fdt_irqchip_aplic.c   | 4 ++--
 lib/utils/irqchip/fdt_irqchip_imsic.c   | 6 +++---
 lib/utils/irqchip/fdt_irqchip_plic.c    | 4 ++--
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/sbi_utils/irqchip/fdt_irqchip.h b/include/sbi_utils/irqchip/fdt_irqchip.h
index 63e9fd9ee77..bc02c0c81fd 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip.h
@@ -16,7 +16,7 @@
 
 struct fdt_irqchip {
 	const struct fdt_match *match_table;
-	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 	int (*warm_init)(void);
 	void (*exit)(void);
 };
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index c38b1d85498..b4f054ae734 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -53,7 +53,7 @@ static int fdt_irqchip_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_irqchip *drv;
 	const struct fdt_match *match;
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < fdt_irqchip_drivers_size; pos++) {
 		drv = fdt_irqchip_drivers[pos];
diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c
index 583a3e30fa5..6eb6e085cbe 100644
--- a/lib/utils/irqchip/fdt_irqchip_aplic.c
+++ b/lib/utils/irqchip/fdt_irqchip_aplic.c
@@ -22,8 +22,8 @@ static int irqchip_aplic_warm_init(void)
 	return 0;
 }
 
-static int irqchip_aplic_cold_init(void *fdt, int nodeoff,
-				  const struct fdt_match *match)
+static int irqchip_aplic_cold_init(const void *fdt, int nodeoff,
+				   const struct fdt_match *match)
 {
 	int rc;
 	struct aplic_data *pd;
diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index 4eb1854556b..ca62b42799f 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -16,7 +16,7 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/imsic.h>
 
-static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
+static int irqchip_imsic_update_hartid_table(const void *fdt, int nodeoff,
 					     struct imsic_data *id)
 {
 	const fdt32_t *val;
@@ -58,8 +58,8 @@ static int irqchip_imsic_update_hartid_table(void *fdt, int nodeoff,
 	return 0;
 }
 
-static int irqchip_imsic_cold_init(void *fdt, int nodeoff,
-				    const struct fdt_match *match)
+static int irqchip_imsic_cold_init(const void *fdt, int nodeoff,
+				   const struct fdt_match *match)
 {
 	int rc;
 	struct imsic_data *id;
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 829c5ee2034..a8aa4fcdbec 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -85,7 +85,7 @@ static int irqchip_plic_warm_init(void)
 				      plic_get_hart_scontext(scratch));
 }
 
-static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
+static int irqchip_plic_update_hartid_table(const void *fdt, int nodeoff,
 					    struct plic_data *pd)
 {
 	const fdt32_t *val;
@@ -132,7 +132,7 @@ static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
 	return 0;
 }
 
-static int irqchip_plic_cold_init(void *fdt, int nodeoff,
+static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;

From 1bbda9b26fd4246c76beceeabe9893acea9e3ee9 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:49 -0700
Subject: [PATCH 1639/1765] lib: utils/regmap: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/regmap/fdt_regmap.h | 6 +++---
 lib/utils/regmap/fdt_regmap.c         | 8 ++++----
 lib/utils/regmap/fdt_regmap_syscon.c  | 2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/sbi_utils/regmap/fdt_regmap.h b/include/sbi_utils/regmap/fdt_regmap.h
index 403dd7d4f66..86e72442810 100644
--- a/include/sbi_utils/regmap/fdt_regmap.h
+++ b/include/sbi_utils/regmap/fdt_regmap.h
@@ -17,15 +17,15 @@ struct fdt_phandle_args;
 /** FDT based regmap driver */
 struct fdt_regmap {
 	const struct fdt_match *match_table;
-	int (*init)(void *fdt, int nodeoff, u32 phandle,
+	int (*init)(const void *fdt, int nodeoff, u32 phandle,
 		    const struct fdt_match *match);
 };
 
 /** Get regmap instance based on phandle */
-int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
+int fdt_regmap_get_by_phandle(const void *fdt, u32 phandle,
 			      struct regmap **out_rmap);
 
 /** Get regmap instance based on "regmap" property of the specified DT node */
-int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap);
+int fdt_regmap_get(const void *fdt, int nodeoff, struct regmap **out_rmap);
 
 #endif
diff --git a/lib/utils/regmap/fdt_regmap.c b/lib/utils/regmap/fdt_regmap.c
index fffac1de7e6..f02d2f0706a 100644
--- a/lib/utils/regmap/fdt_regmap.c
+++ b/lib/utils/regmap/fdt_regmap.c
@@ -16,7 +16,7 @@
 extern struct fdt_regmap *fdt_regmap_drivers[];
 extern unsigned long fdt_regmap_drivers_size;
 
-static int fdt_regmap_init(void *fdt, int nodeoff, u32 phandle)
+static int fdt_regmap_init(const void *fdt, int nodeoff, u32 phandle)
 {
 	int pos, rc;
 	struct fdt_regmap *drv;
@@ -39,7 +39,7 @@ static int fdt_regmap_init(void *fdt, int nodeoff, u32 phandle)
 	return SBI_ENOSYS;
 }
 
-static int fdt_regmap_find(void *fdt, int nodeoff, u32 phandle,
+static int fdt_regmap_find(const void *fdt, int nodeoff, u32 phandle,
 			   struct regmap **out_rmap)
 {
 	int rc;
@@ -63,7 +63,7 @@ static int fdt_regmap_find(void *fdt, int nodeoff, u32 phandle,
 	return 0;
 }
 
-int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
+int fdt_regmap_get_by_phandle(const void *fdt, u32 phandle,
 			      struct regmap **out_rmap)
 {
 	int pnodeoff;
@@ -78,7 +78,7 @@ int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
 	return fdt_regmap_find(fdt, pnodeoff, phandle, out_rmap);
 }
 
-int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap)
+int fdt_regmap_get(const void *fdt, int nodeoff, struct regmap **out_rmap)
 {
 	int len;
 	const fdt32_t *val;
diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c
index d87b6e0926e..a95f251594a 100644
--- a/lib/utils/regmap/fdt_regmap_syscon.c
+++ b/lib/utils/regmap/fdt_regmap_syscon.c
@@ -159,7 +159,7 @@ static int regmap_syscon_write_be32(struct regmap *rmap, unsigned int reg,
 	return 0;
 }
 
-static int regmap_syscon_init(void *fdt, int nodeoff, u32 phandle,
+static int regmap_syscon_init(const void *fdt, int nodeoff, u32 phandle,
 			      const struct fdt_match *match)
 {
 	struct syscon_regmap *srm;

From 57a047930219f0599a0aa27a72de681efa2856aa Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:50 -0700
Subject: [PATCH 1640/1765] lib: utils/reset: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/reset/fdt_reset.h          | 6 +++---
 lib/utils/reset/fdt_reset.c                  | 4 ++--
 lib/utils/reset/fdt_reset_atcwdt200.c        | 2 +-
 lib/utils/reset/fdt_reset_gpio.c             | 2 +-
 lib/utils/reset/fdt_reset_htif.c             | 2 +-
 lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c | 2 +-
 lib/utils/reset/fdt_reset_sunxi_wdt.c        | 2 +-
 lib/utils/reset/fdt_reset_syscon.c           | 4 ++--
 platform/generic/sifive/fu740.c              | 2 +-
 platform/generic/starfive/jh7110.c           | 6 +++---
 10 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index ea8063b8a90..80179873674 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -14,7 +14,7 @@
 
 struct fdt_reset {
 	const struct fdt_match *match_table;
-	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
 #ifdef CONFIG_FDT_RESET
@@ -22,7 +22,7 @@ struct fdt_reset {
 /**
  * fdt_reset_driver_init() - initialize reset driver based on the device-tree
  */
-int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv);
+int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv);
 
 /**
  * fdt_reset_init() - initialize reset drivers based on the device-tree
@@ -33,7 +33,7 @@ void fdt_reset_init(void);
 
 #else
 
-static inline int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
+static inline int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
 {
 	return 0;
 }
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index ee4e29a331b..960c08d024c 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -17,7 +17,7 @@
 extern struct fdt_reset *fdt_reset_drivers[];
 extern unsigned long fdt_reset_drivers_size;
 
-int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
+int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
 {
 	int noff, rc, cnt = 0;
 	const struct fdt_match *match;
@@ -45,7 +45,7 @@ int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
 void fdt_reset_init(void)
 {
 	int pos;
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < fdt_reset_drivers_size; pos++)
 		fdt_reset_driver_init(fdt, fdt_reset_drivers[pos]);
diff --git a/lib/utils/reset/fdt_reset_atcwdt200.c b/lib/utils/reset/fdt_reset_atcwdt200.c
index 03d547b9dd7..6ef3b134989 100644
--- a/lib/utils/reset/fdt_reset_atcwdt200.c
+++ b/lib/utils/reset/fdt_reset_atcwdt200.c
@@ -80,7 +80,7 @@ static struct sbi_system_reset_device atcwdt200_reset = {
 	.system_reset	    = ae350_system_reset,
 };
 
-static int atcwdt200_reset_init(void *fdt, int nodeoff,
+static int atcwdt200_reset_init(const void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	uint64_t reg_addr;
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index 6a908dd7f1a..de81e2eb22a 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -113,7 +113,7 @@ static struct sbi_system_reset_device gpio_restart = {
 	.system_reset = gpio_system_restart
 };
 
-static int gpio_reset_init(void *fdt, int nodeoff,
+static int gpio_reset_init(const void *fdt, int nodeoff,
 			   const struct fdt_match *match)
 {
 	int rc, len;
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
index 2cc52dda538..7c04c81c2ec 100644
--- a/lib/utils/reset/fdt_reset_htif.c
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -11,7 +11,7 @@
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/sys/htif.h>
 
-static int htif_reset_init(void *fdt, int nodeoff,
+static int htif_reset_init(const void *fdt, int nodeoff,
 			   const struct fdt_match *match)
 {
 	bool custom = false;
diff --git a/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
index 51bd74ab2e1..368cd108d62 100644
--- a/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
+++ b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
@@ -76,7 +76,7 @@ static int sg2042_mcu_reset_check_board(struct i2c_adapter *adap, uint32_t reg)
 	return 0;
 }
 
-static int sg2042_mcu_reset_init(void *fdt, int nodeoff,
+static int sg2042_mcu_reset_init(const void *fdt, int nodeoff,
 				 const struct fdt_match *match)
 {
 	int ret, i2c_bus;
diff --git a/lib/utils/reset/fdt_reset_sunxi_wdt.c b/lib/utils/reset/fdt_reset_sunxi_wdt.c
index 446d32b43f9..f4b06d23047 100644
--- a/lib/utils/reset/fdt_reset_sunxi_wdt.c
+++ b/lib/utils/reset/fdt_reset_sunxi_wdt.c
@@ -49,7 +49,7 @@ static struct sbi_system_reset_device sunxi_wdt_reset = {
 	.system_reset = sunxi_wdt_system_reset,
 };
 
-static int sunxi_wdt_reset_init(void *fdt, int nodeoff,
+static int sunxi_wdt_reset_init(const void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	uint64_t reg_addr;
diff --git a/lib/utils/reset/fdt_reset_syscon.c b/lib/utils/reset/fdt_reset_syscon.c
index bae9ec58f29..0dd76acb895 100644
--- a/lib/utils/reset/fdt_reset_syscon.c
+++ b/lib/utils/reset/fdt_reset_syscon.c
@@ -96,8 +96,8 @@ static struct sbi_system_reset_device syscon_reboot = {
 	.system_reset = syscon_do_reboot
 };
 
-static int syscon_reset_init(void *fdt, int nodeoff,
-			   const struct fdt_match *match)
+static int syscon_reset_init(const void *fdt, int nodeoff,
+			     const struct fdt_match *match)
 {
 	int rc, len;
 	const fdt32_t *val, *mask;
diff --git a/platform/generic/sifive/fu740.c b/platform/generic/sifive/fu740.c
index fe71ce6a9ea..ce83a0501d1 100644
--- a/platform/generic/sifive/fu740.c
+++ b/platform/generic/sifive/fu740.c
@@ -173,7 +173,7 @@ static struct sbi_system_reset_device da9063_reset_i2c = {
 	.system_reset = da9063_system_reset
 };
 
-static int da9063_reset_init(void *fdt, int nodeoff,
+static int da9063_reset_init(const void *fdt, int nodeoff,
 			     const struct fdt_match *match)
 {
 	int rc, i2c_bus;
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 62dcd25613e..560fe1d7b4b 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -186,9 +186,9 @@ static struct sbi_system_reset_device pm_reset = {
 	.system_reset = pm_system_reset
 };
 
-static int starfive_jh7110_inst_init(void *fdt);
+static int starfive_jh7110_inst_init(const void *fdt);
 
-static int pm_reset_init(void *fdt, int nodeoff,
+static int pm_reset_init(const void *fdt, int nodeoff,
 			 const struct fdt_match *match)
 {
 	int rc;
@@ -232,7 +232,7 @@ static struct fdt_reset fdt_reset_pmic = {
 	.init = pm_reset_init,
 };
 
-static int starfive_jh7110_inst_init(void *fdt)
+static int starfive_jh7110_inst_init(const void *fdt)
 {
 	int noff, rc = 0;
 	const fdt32_t *val;

From bd76eb49502c25d3553da4aaeff846e8762a612d Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:51 -0700
Subject: [PATCH 1641/1765] lib: utils/serial: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/serial/fdt_serial.h       | 2 +-
 lib/utils/serial/fdt_serial.c               | 2 +-
 lib/utils/serial/fdt_serial_cadence.c       | 2 +-
 lib/utils/serial/fdt_serial_gaisler.c       | 2 +-
 lib/utils/serial/fdt_serial_htif.c          | 2 +-
 lib/utils/serial/fdt_serial_litex.c         | 2 +-
 lib/utils/serial/fdt_serial_renesas_scif.c  | 2 +-
 lib/utils/serial/fdt_serial_shakti.c        | 4 ++--
 lib/utils/serial/fdt_serial_sifive.c        | 4 ++--
 lib/utils/serial/fdt_serial_uart8250.c      | 2 +-
 lib/utils/serial/fdt_serial_xlnx_uartlite.c | 4 ++--
 11 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
index daa2e4f539c..a0053a16120 100644
--- a/include/sbi_utils/serial/fdt_serial.h
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -16,7 +16,7 @@
 
 struct fdt_serial {
 	const struct fdt_match *match_table;
-	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
 int fdt_serial_init(void);
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 798ac749e86..6f995cf7d14 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -23,7 +23,7 @@ int fdt_serial_init(void)
 	struct fdt_serial *drv;
 	const struct fdt_match *match;
 	int pos, noff = -1, len, coff, rc;
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 
 	/* Find offset of node pointed to by stdout-path */
 	coff = fdt_path_offset(fdt, "/chosen");
diff --git a/lib/utils/serial/fdt_serial_cadence.c b/lib/utils/serial/fdt_serial_cadence.c
index ae59e4c1e9c..ee7d7797112 100644
--- a/lib/utils/serial/fdt_serial_cadence.c
+++ b/lib/utils/serial/fdt_serial_cadence.c
@@ -10,7 +10,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/cadence-uart.h>
 
-static int serial_cadence_init(void *fdt, int nodeoff,
+static int serial_cadence_init(const void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/serial/fdt_serial_gaisler.c b/lib/utils/serial/fdt_serial_gaisler.c
index 74988e34bcd..cae1727d93f 100644
--- a/lib/utils/serial/fdt_serial_gaisler.c
+++ b/lib/utils/serial/fdt_serial_gaisler.c
@@ -11,7 +11,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/gaisler-uart.h>
 
-static int serial_gaisler_init(void *fdt, int nodeoff,
+static int serial_gaisler_init(const void *fdt, int nodeoff,
 			       const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
index 7d88e7a16b8..43557f6cca0 100644
--- a/lib/utils/serial/fdt_serial_htif.c
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -18,7 +18,7 @@ static const struct fdt_match serial_htif_match[] = {
 	{ },
 };
 
-static int serial_htif_init(void *fdt, int nodeoff,
+static int serial_htif_init(const void *fdt, int nodeoff,
 			    const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/serial/fdt_serial_litex.c b/lib/utils/serial/fdt_serial_litex.c
index 3b3b306bed9..9aed719fe66 100644
--- a/lib/utils/serial/fdt_serial_litex.c
+++ b/lib/utils/serial/fdt_serial_litex.c
@@ -12,7 +12,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/litex-uart.h>
 
-static int serial_litex_init(void *fdt, int nodeoff,
+static int serial_litex_init(const void *fdt, int nodeoff,
 			     const struct fdt_match *match)
 {
 	uint64_t reg_addr, reg_size;
diff --git a/lib/utils/serial/fdt_serial_renesas_scif.c b/lib/utils/serial/fdt_serial_renesas_scif.c
index c331ca1ad69..41356d1d647 100644
--- a/lib/utils/serial/fdt_serial_renesas_scif.c
+++ b/lib/utils/serial/fdt_serial_renesas_scif.c
@@ -7,7 +7,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/renesas-scif.h>
 
-static int serial_renesas_scif_init(void *fdt, int nodeoff,
+static int serial_renesas_scif_init(const void *fdt, int nodeoff,
 				    const struct fdt_match *match)
 {
 	struct platform_uart_data uart = { 0 };
diff --git a/lib/utils/serial/fdt_serial_shakti.c b/lib/utils/serial/fdt_serial_shakti.c
index 0e056303dbb..2bafc99b579 100644
--- a/lib/utils/serial/fdt_serial_shakti.c
+++ b/lib/utils/serial/fdt_serial_shakti.c
@@ -9,8 +9,8 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/shakti-uart.h>
 
-static int serial_shakti_init(void *fdt, int nodeoff,
-				const struct fdt_match *match)
+static int serial_shakti_init(const void *fdt, int nodeoff,
+			      const struct fdt_match *match)
 {
 	int rc;
 	struct platform_uart_data uart = { 0 };
diff --git a/lib/utils/serial/fdt_serial_sifive.c b/lib/utils/serial/fdt_serial_sifive.c
index 3ca10913eee..f551b78cb22 100644
--- a/lib/utils/serial/fdt_serial_sifive.c
+++ b/lib/utils/serial/fdt_serial_sifive.c
@@ -11,8 +11,8 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/sifive-uart.h>
 
-static int serial_sifive_init(void *fdt, int nodeoff,
-				const struct fdt_match *match)
+static int serial_sifive_init(const void *fdt, int nodeoff,
+			      const struct fdt_match *match)
 {
 	int rc;
 	struct platform_uart_data uart = { 0 };
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 7b5d6a4c2f1..10d201cc49e 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -11,7 +11,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/uart8250.h>
 
-static int serial_uart8250_init(void *fdt, int nodeoff,
+static int serial_uart8250_init(const void *fdt, int nodeoff,
 				const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/serial/fdt_serial_xlnx_uartlite.c b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
index 9f04aea3673..0a829ad2288 100644
--- a/lib/utils/serial/fdt_serial_xlnx_uartlite.c
+++ b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
@@ -11,8 +11,8 @@
 #include <sbi_utils/serial/fdt_serial.h>
 #include <sbi_utils/serial/xlnx_uartlite.h>
 
-static int serial_xlnx_uartlite_init(void *fdt, int nodeoff,
-				const struct fdt_match *match)
+static int serial_xlnx_uartlite_init(const void *fdt, int nodeoff,
+				     const struct fdt_match *match)
 {
 	int rc;
 	struct platform_uart_data uart = { 0 };

From b15cc7715a02b269b7789159401d428c20e23c03 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:52 -0700
Subject: [PATCH 1642/1765] lib: utils/timer: Constify FDT pointers in parsing
 functions

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/timer/fdt_timer.h | 2 +-
 lib/utils/timer/fdt_timer.c         | 2 +-
 lib/utils/timer/fdt_timer_mtimer.c  | 2 +-
 lib/utils/timer/fdt_timer_plmt.c    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
index cf105fed84c..555ebcba9ee 100644
--- a/include/sbi_utils/timer/fdt_timer.h
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -16,7 +16,7 @@
 
 struct fdt_timer {
 	const struct fdt_match *match_table;
-	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 	int (*warm_init)(void);
 	void (*exit)(void);
 };
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index f4687304d65..aa0494e4375 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -36,7 +36,7 @@ static int fdt_timer_cold_init(void)
 	int pos, noff, rc;
 	struct fdt_timer *drv;
 	const struct fdt_match *match;
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < fdt_timer_drivers_size; pos++) {
 		drv = fdt_timer_drivers[pos];
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 9e27e3ab92a..458e8881a1e 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -30,7 +30,7 @@ static SBI_LIST_HEAD(mtn_list);
 
 static struct aclint_mtimer_data *mt_reference = NULL;
 
-static int timer_mtimer_cold_init(void *fdt, int nodeoff,
+static int timer_mtimer_cold_init(const void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
 	int rc;
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c
index e8be91b902c..88a42e2aa8d 100644
--- a/lib/utils/timer/fdt_timer_plmt.c
+++ b/lib/utils/timer/fdt_timer_plmt.c
@@ -13,7 +13,7 @@
 
 extern struct plmt_data plmt;
 
-static int fdt_plmt_cold_timer_init(void *fdt, int nodeoff,
+static int fdt_plmt_cold_timer_init(const void *fdt, int nodeoff,
 				    const struct fdt_match *match)
 {
 	int rc;

From 3f964652d9236bcd5a7111bace3fd8bdb5dec7b1 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:53 -0700
Subject: [PATCH 1643/1765] platform: generic: Constify FDT pointers in
 fw_platform_init()

Indicate that none of these functions modify the devicetree by
constifying the parameter type.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/include/platform_override.h | 2 +-
 platform/generic/platform.c                  | 6 +++---
 platform/generic/starfive/jh7110.c           | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index b0585c2101c..bd6fdaccfbf 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -29,7 +29,7 @@ struct platform_override {
 	int (*extensions_init)(const struct fdt_match *match,
 			       struct sbi_hart_features *hfeatures);
 	int (*pmu_init)(const struct fdt_match *match);
-	void (*fw_init)(void *fdt, const struct fdt_match *match);
+	void (*fw_init)(const void *fdt, const struct fdt_match *match);
 	int (*vendor_ext_provider)(long funcid,
 				   struct sbi_trap_regs *regs,
 				   struct sbi_ecall_return *out,
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 3470474a225..4d26ae7c757 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -36,7 +36,7 @@ extern unsigned long platform_override_modules_size;
 static const struct platform_override *generic_plat = NULL;
 static const struct fdt_match *generic_plat_match = NULL;
 
-static void fw_platform_lookup_special(void *fdt, int root_offset)
+static void fw_platform_lookup_special(const void *fdt, int root_offset)
 {
 	const struct platform_override *plat;
 	const struct fdt_match *match;
@@ -81,7 +81,7 @@ static DECLARE_BITMAP(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS);
  * according to the DT property "cold-boot-harts" in "/chosen/opensbi-config" 
  * DT node. If there is no "cold-boot-harts" in DT, all harts will be allowed.
  */
-static void fw_platform_coldboot_harts_init(void *fdt)
+static void fw_platform_coldboot_harts_init(const void *fdt)
 {
 	int chosen_offset, config_offset, cpu_offset, len, err;
 	u32 val32;
@@ -146,7 +146,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 				unsigned long arg4)
 {
 	const char *model;
-	void *fdt = (void *)arg1;
+	const void *fdt = (void *)arg1;
 	u32 hartid, hart_count = 0;
 	int rc, root_offset, cpus_offset, cpu_offset, len;
 
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 560fe1d7b4b..484518958d5 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -298,7 +298,7 @@ static bool starfive_jh7110_cold_boot_allowed(u32 hartid,
 	return true;
 }
 
-static void starfive_jh7110_fw_init(void *fdt, const struct fdt_match *match)
+static void starfive_jh7110_fw_init(const void *fdt, const struct fdt_match *match)
 {
 	const fdt32_t *val;
 	int len, coff;

From 6e5db7b09c6c25be59900a3470923727a4e14033 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:54 -0700
Subject: [PATCH 1644/1765] platform: generic: Pass FDT to early/final_init
 overrides

Several of these override functions access the FDT blob. Explicitly
indicate which callbacks are allowed to modify the FDT blob by passing
the parameter as a possibly-const pointer. This also reduces code size
by deduplicating the call to fdt_get_address().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 platform/generic/allwinner/sun20i-d1.c       |  3 ++-
 platform/generic/andes/ae350.c               | 10 ++++------
 platform/generic/andes/andes_pma.c           |  6 ++----
 platform/generic/include/andes/andes_pma.h   |  3 ++-
 platform/generic/include/platform_override.h |  4 ++--
 platform/generic/platform.c                  |  9 ++++-----
 platform/generic/renesas/rzfive/rzfive.c     |  8 +++++---
 platform/generic/sifive/fu740.c              |  3 +--
 platform/generic/sophgo/sg2042.c             |  2 +-
 platform/generic/starfive/jh7110.c           |  4 +---
 platform/generic/thead/thead-generic.c       |  2 +-
 11 files changed, 25 insertions(+), 29 deletions(-)

diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index ab2eee55864..9b1d5559ce8 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -187,7 +187,8 @@ static const struct sbi_hsm_device sun20i_d1_ppu = {
 	.hart_resume	= sun20i_d1_hart_resume,
 };
 
-static int sun20i_d1_final_init(bool cold_boot, const struct fdt_match *match)
+static int sun20i_d1_final_init(bool cold_boot, void *fdt,
+				const struct fdt_match *match)
 {
 	if (cold_boot) {
 		sun20i_d1_riscv_cfg_init();
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index a1ab6b93a1f..3ad6c856268 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -88,12 +88,9 @@ static const struct sbi_hsm_device andes_smu = {
 	.hart_stop    = ae350_hart_stop,
 };
 
-static void ae350_hsm_device_init(void)
+static void ae350_hsm_device_init(const void *fdt)
 {
 	int rc;
-	void *fdt;
-
-	fdt = fdt_get_address();
 
 	rc = fdt_parse_compat_addr(fdt, (uint64_t *)&smu.addr,
 				   "andestech,atcsmu");
@@ -103,10 +100,11 @@ static void ae350_hsm_device_init(void)
 	}
 }
 
-static int ae350_final_init(bool cold_boot, const struct fdt_match *match)
+static int ae350_final_init(bool cold_boot, void *fdt,
+			    const struct fdt_match *match)
 {
 	if (cold_boot)
-		ae350_hsm_device_init();
+		ae350_hsm_device_init(fdt);
 
 	return 0;
 }
diff --git a/platform/generic/andes/andes_pma.c b/platform/generic/andes/andes_pma.c
index c28091476cc..09e5a30cc87 100644
--- a/platform/generic/andes/andes_pma.c
+++ b/platform/generic/andes/andes_pma.c
@@ -311,13 +311,13 @@ static int andes_fdt_reserved_memory_fixup(void *fdt,
 	return andes_fdt_pma_resv(fdt, pma, entry, parent);
 }
 
-int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
+int andes_pma_setup_regions(void *fdt,
+			    const struct andes_pma_region *pma_regions,
 			    unsigned int pma_regions_count)
 {
 	unsigned int dt_populate_cnt;
 	unsigned int i, j;
 	unsigned long pa;
-	void *fdt;
 	int ret;
 
 	if (!pma_regions || !pma_regions_count)
@@ -342,8 +342,6 @@ int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
 	if (!dt_populate_cnt)
 		return 0;
 
-	fdt = fdt_get_address();
-
 	ret = fdt_open_into(fdt, fdt,
 			    fdt_totalsize(fdt) + (64 * dt_populate_cnt));
 	if (ret < 0)
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index e2d52791544..be6149640c0 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -48,7 +48,8 @@ struct andes_pma_region {
 	bool dma_default;
 };
 
-int andes_pma_setup_regions(const struct andes_pma_region *pma_regions,
+int andes_pma_setup_regions(void *fdt,
+			    const struct andes_pma_region *pma_regions,
 			    unsigned int pma_regions_count);
 
 /**
diff --git a/platform/generic/include/platform_override.h b/platform/generic/include/platform_override.h
index bd6fdaccfbf..946fb8f7bdf 100644
--- a/platform/generic/include/platform_override.h
+++ b/platform/generic/include/platform_override.h
@@ -21,8 +21,8 @@ struct platform_override {
 	u64 (*tlbr_flush_limit)(const struct fdt_match *match);
 	u32 (*tlb_num_entries)(const struct fdt_match *match);
 	bool (*cold_boot_allowed)(u32 hartid, const struct fdt_match *match);
-	int (*early_init)(bool cold_boot, const struct fdt_match *match);
-	int (*final_init)(bool cold_boot, const struct fdt_match *match);
+	int (*early_init)(bool cold_boot, const void *fdt, const struct fdt_match *match);
+	int (*final_init)(bool cold_boot, void *fdt, const struct fdt_match *match);
 	void (*early_exit)(const struct fdt_match *match);
 	void (*final_exit)(const struct fdt_match *match);
 	int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 4d26ae7c757..6f9fb4db1fa 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -221,6 +221,7 @@ static int generic_nascent_init(void)
 
 static int generic_early_init(bool cold_boot)
 {
+	const void *fdt = fdt_get_address();
 	int rc;
 
 	if (cold_boot) {
@@ -237,16 +238,16 @@ static int generic_early_init(bool cold_boot)
 	if (!generic_plat || !generic_plat->early_init)
 		return 0;
 
-	return generic_plat->early_init(cold_boot, generic_plat_match);
+	return generic_plat->early_init(cold_boot, fdt, generic_plat_match);
 }
 
 static int generic_final_init(bool cold_boot)
 {
-	void *fdt;
+	void *fdt = fdt_get_address();
 	int rc;
 
 	if (generic_plat && generic_plat->final_init) {
-		rc = generic_plat->final_init(cold_boot, generic_plat_match);
+		rc = generic_plat->final_init(cold_boot, fdt, generic_plat_match);
 		if (rc)
 			return rc;
 	}
@@ -254,8 +255,6 @@ static int generic_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = fdt_get_address();
-
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
 	fdt_domain_fixup(fdt);
diff --git a/platform/generic/renesas/rzfive/rzfive.c b/platform/generic/renesas/rzfive/rzfive.c
index 515bcd76473..59084c41372 100644
--- a/platform/generic/renesas/rzfive/rzfive.c
+++ b/platform/generic/renesas/rzfive/rzfive.c
@@ -24,13 +24,15 @@ static const struct andes_pma_region renesas_rzfive_pma_regions[] = {
 	},
 };
 
-static int renesas_rzfive_final_init(bool cold_boot, const struct fdt_match *match)
+static int renesas_rzfive_final_init(bool cold_boot, void *fdt,
+				     const struct fdt_match *match)
 {
-	return andes_pma_setup_regions(renesas_rzfive_pma_regions,
+	return andes_pma_setup_regions(fdt, renesas_rzfive_pma_regions,
 				       array_size(renesas_rzfive_pma_regions));
 }
 
-static int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
+static int renesas_rzfive_early_init(bool cold_boot, const void *fdt,
+				     const struct fdt_match *match)
 {
 	/*
 	 * Renesas RZ/Five RISC-V SoC has Instruction local memory and
diff --git a/platform/generic/sifive/fu740.c b/platform/generic/sifive/fu740.c
index ce83a0501d1..46dc02ae536 100644
--- a/platform/generic/sifive/fu740.c
+++ b/platform/generic/sifive/fu740.c
@@ -226,11 +226,10 @@ static u64 sifive_fu740_tlbr_flush_limit(const struct fdt_match *match)
 	return 0;
 }
 
-static int sifive_fu740_final_init(bool cold_boot,
+static int sifive_fu740_final_init(bool cold_boot, void *fdt,
 				   const struct fdt_match *match)
 {
 	int rc;
-	void *fdt = fdt_get_address();
 
 	if (cold_boot) {
 		rc = fdt_reset_driver_init(fdt, &fdt_reset_da9063);
diff --git a/platform/generic/sophgo/sg2042.c b/platform/generic/sophgo/sg2042.c
index ae2d702e765..eca9afb7a3a 100644
--- a/platform/generic/sophgo/sg2042.c
+++ b/platform/generic/sophgo/sg2042.c
@@ -21,7 +21,7 @@
 #define SOPHGO_SG2042_TIMER_SIZE	0x10000UL
 #define SOPHGO_SG2042_TIMER_NUM		16
 
-static int sophgo_sg2042_early_init(bool cold_boot,
+static int sophgo_sg2042_early_init(bool cold_boot, const void *fdt,
 				    const struct fdt_match *match)
 {
 	thead_register_tlb_flush_trap_handler();
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 484518958d5..264fe99cc50 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -277,11 +277,9 @@ static int starfive_jh7110_inst_init(const void *fdt)
 	return rc;
 }
 
-static int starfive_jh7110_final_init(bool cold_boot,
+static int starfive_jh7110_final_init(bool cold_boot, void *fdt,
 				      const struct fdt_match *match)
 {
-	void *fdt = fdt_get_address();
-
 	if (cold_boot) {
 		fdt_reset_driver_init(fdt, &fdt_reset_pmic);
 	}
diff --git a/platform/generic/thead/thead-generic.c b/platform/generic/thead/thead-generic.c
index c82e0c1b414..be64831c56b 100644
--- a/platform/generic/thead/thead-generic.c
+++ b/platform/generic/thead/thead-generic.c
@@ -19,7 +19,7 @@ struct thead_generic_quirks {
 	u64	errata;
 };
 
-static int thead_generic_early_init(bool cold_boot,
+static int thead_generic_early_init(bool cold_boot, const void *fdt,
 				    const struct fdt_match *match)
 {
 	struct thead_generic_quirks *quirks = (void *)match->data;

From fa6dfce017eed32cbae2581bc285bafd52929d42 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:55 -0700
Subject: [PATCH 1645/1765] lib: utils/reset: Pass the FDT to fdt_reset_init()

Indicate that this function does not modify the FDT blob, and
deduplicate the call to fdt_get_address().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/reset/fdt_reset.h | 4 ++--
 lib/utils/reset/fdt_reset.c         | 3 +--
 platform/generic/platform.c         | 2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index 80179873674..f126fd33ca6 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -29,7 +29,7 @@ int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv);
  *
  * This function shall be invoked in final init.
  */
-void fdt_reset_init(void);
+void fdt_reset_init(const void *fdt);
 
 #else
 
@@ -37,7 +37,7 @@ static inline int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
 {
 	return 0;
 }
-static inline void fdt_reset_init(void) { }
+static inline void fdt_reset_init(const void *fdt) { }
 
 #endif
 
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 960c08d024c..05deb75e317 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -42,10 +42,9 @@ int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
 	return cnt > 0 ? 0 : SBI_ENODEV;
 }
 
-void fdt_reset_init(void)
+void fdt_reset_init(const void *fdt)
 {
 	int pos;
-	const void *fdt = fdt_get_address();
 
 	for (pos = 0; pos < fdt_reset_drivers_size; pos++)
 		fdt_reset_driver_init(fdt, fdt_reset_drivers[pos]);
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 6f9fb4db1fa..2850d55d107 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -225,7 +225,7 @@ static int generic_early_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		fdt_reset_init();
+		fdt_reset_init(fdt);
 
 		if (semihosting_enabled())
 			rc = semihosting_init();

From c36801841e366fa3ddeb7d7888b8691006c0b552 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:56 -0700
Subject: [PATCH 1646/1765] lib: utils/serial: Pass the FDT to
 fdt_serial_init()

Indicate that this function does not modify the FDT blob, and
deduplicate the call to fdt_get_address().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/serial/fdt_serial.h | 4 ++--
 lib/utils/serial/fdt_serial.c         | 3 +--
 platform/generic/platform.c           | 2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
index a0053a16120..572475c9635 100644
--- a/include/sbi_utils/serial/fdt_serial.h
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -19,11 +19,11 @@ struct fdt_serial {
 	int (*init)(const void *fdt, int nodeoff, const struct fdt_match *match);
 };
 
-int fdt_serial_init(void);
+int fdt_serial_init(const void *fdt);
 
 #else
 
-static inline int fdt_serial_init(void) { return 0; }
+static inline int fdt_serial_init(const void *fdt) { return 0; }
 
 #endif
 
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index 6f995cf7d14..a2a96cb2630 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -17,13 +17,12 @@
 extern struct fdt_serial *fdt_serial_drivers[];
 extern unsigned long fdt_serial_drivers_size;
 
-int fdt_serial_init(void)
+int fdt_serial_init(const void *fdt)
 {
 	const void *prop;
 	struct fdt_serial *drv;
 	const struct fdt_match *match;
 	int pos, noff = -1, len, coff, rc;
-	const void *fdt = fdt_get_address();
 
 	/* Find offset of node pointed to by stdout-path */
 	coff = fdt_path_offset(fdt, "/chosen");
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 2850d55d107..7c809b0044e 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -230,7 +230,7 @@ static int generic_early_init(bool cold_boot)
 		if (semihosting_enabled())
 			rc = semihosting_init();
 		else
-			rc = fdt_serial_init();
+			rc = fdt_serial_init(fdt);
 		if (rc)
 			return rc;
 	}

From 8cb7f89d7c6a8506597e7a60078928b86874ed7c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 30 Jul 2024 21:58:57 -0700
Subject: [PATCH 1647/1765] lib: utils/fdt: Add fdt_get_address_rw() helper

Help tracking the lifecycle of the FDT blob by indicating which parts of
the firmware modify it, and thus invalidate any previously-obtained
offsets or pointers to data inside the blob.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_helper.h | 7 ++++++-
 platform/fpga/ariane/platform.c    | 2 +-
 platform/fpga/openpiton/platform.c | 4 ++--
 platform/generic/platform.c        | 4 ++--
 platform/kendryte/k210/platform.c  | 2 +-
 platform/nuclei/ux600/platform.c   | 2 +-
 6 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 28ae76773d9..7329b84cddd 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -114,7 +114,12 @@ int fdt_parse_plicsw_node(const void *fdt, int nodeoffset, unsigned long *plicsw
 int fdt_parse_compat_addr(const void *fdt, uint64_t *addr,
 			  const char *compatible);
 
-static inline void *fdt_get_address(void)
+static inline const void *fdt_get_address(void)
+{
+	return (const void *)root.next_arg1;
+}
+
+static inline void *fdt_get_address_rw(void)
 {
 	return (void *)root.next_arg1;
 }
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 8d46d8880fd..ec0584ab45d 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -87,7 +87,7 @@ static int ariane_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = fdt_get_address();
+	fdt = fdt_get_address_rw();
 	fdt_fixups(fdt);
 
 	return 0;
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index dd74a0c23c8..81cc48f4a3a 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -70,7 +70,7 @@ static struct aclint_mtimer_data mtimer = {
  */
 static int openpiton_early_init(bool cold_boot)
 {
-	void *fdt;
+	const void *fdt;
 	struct platform_uart_data uart_data = { 0 };
 	struct plic_data plic_data;
 	unsigned long aclint_freq;
@@ -118,7 +118,7 @@ static int openpiton_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = fdt_get_address();
+	fdt = fdt_get_address_rw();
 	fdt_fixups(fdt);
 
 	return 0;
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 7c809b0044e..52dd6e62853 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -243,7 +243,7 @@ static int generic_early_init(bool cold_boot)
 
 static int generic_final_init(bool cold_boot)
 {
-	void *fdt = fdt_get_address();
+	void *fdt = fdt_get_address_rw();
 	int rc;
 
 	if (generic_plat && generic_plat->final_init) {
@@ -314,7 +314,7 @@ static int generic_extensions_init(struct sbi_hart_features *hfeatures)
 
 static int generic_domains_init(void)
 {
-	void *fdt = fdt_get_address();
+	const void *fdt = fdt_get_address();
 	int offset, ret;
 
 	ret = fdt_domains_populate(fdt);
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 531adcd51fc..2f3f70792a0 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -124,7 +124,7 @@ static int k210_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = fdt_get_address();
+	fdt = fdt_get_address_rw();
 
 	fdt_cpu_fixup(fdt);
 	fdt_fixups(fdt);
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 2289366cd31..5610e7c7f29 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -181,7 +181,7 @@ static int ux600_final_init(bool cold_boot)
 	if (!cold_boot)
 		return 0;
 
-	fdt = fdt_get_address();
+	fdt = fdt_get_address_rw();
 	ux600_modify_dt(fdt);
 
 	return 0;

From f7a625884c7d5bed046bcdb5cfec9a4e6b7e6641 Mon Sep 17 00:00:00 2001
From: Leo Yu-Chi Liang <ycliang@andestech.com>
Date: Thu, 1 Aug 2024 15:26:31 +0800
Subject: [PATCH 1648/1765] util: atcsmu.c: fix typo "%s/hard/hart/"

%s/hard/hart

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/sys/atcsmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/utils/sys/atcsmu.c b/lib/utils/sys/atcsmu.c
index 8ddd88d5f52..676c91f46cf 100644
--- a/lib/utils/sys/atcsmu.c
+++ b/lib/utils/sys/atcsmu.c
@@ -84,7 +84,7 @@ inline int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr,
 
 	if (reset_vector != (u64)wakeup_addr) {
 		sbi_printf(
-			"hard%d (PCS%d): Failed to program the reset vector.\n",
+			"hart%d (PCS%d): Failed to program the reset vector.\n",
 			hartid, hartid + 3);
 		return SBI_EFAIL;
 	} else

From a44df8024b36dfd0ef7ccd77261f52d8d3a666e4 Mon Sep 17 00:00:00 2001
From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Thu, 1 Aug 2024 15:26:32 +0800
Subject: [PATCH 1649/1765] util: atcsmu.c: modify sbi_printf() formatting

Beautify multi-line printing.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/sys/atcsmu.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/lib/utils/sys/atcsmu.c b/lib/utils/sys/atcsmu.c
index 676c91f46cf..2cba0eb73e7 100644
--- a/lib/utils/sys/atcsmu.c
+++ b/lib/utils/sys/atcsmu.c
@@ -37,17 +37,15 @@ inline bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode,
 	switch (sleep_mode) {
 	case LIGHTSLEEP_MODE:
 		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_LIGHT_SLEEP) == 0) {
-			sbi_printf(
-				"SMU: hart%d (PCS%d) does not support light sleep mode\n",
-				hartid, hartid + 3);
+			sbi_printf("SMU: hart%d (PCS%d) does not support light sleep mode\n",
+				   hartid, hartid + 3);
 			return false;
 		}
 		break;
 	case DEEPSLEEP_MODE:
 		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_DEEP_SLEEP) == 0) {
-			sbi_printf(
-				"SMU: hart%d (PCS%d) does not support deep sleep mode\n",
-				hartid, hartid + 3);
+			sbi_printf("SMU: hart%d (PCS%d) does not support deep sleep mode\n",
+				   hartid, hartid + 3);
 			return false;
 		}
 		break;
@@ -83,9 +81,8 @@ inline int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr,
 	reset_vector = ((u64)vec_hi << 32) | vec_lo;
 
 	if (reset_vector != (u64)wakeup_addr) {
-		sbi_printf(
-			"hart%d (PCS%d): Failed to program the reset vector.\n",
-			hartid, hartid + 3);
+		sbi_printf("hart%d (PCS%d): Failed to program the reset vector.\n",
+			   hartid, hartid + 3);
 		return SBI_EFAIL;
 	} else
 		return 0;

From 70f3441452ea470fb01be660abdd05495e3b19fd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 2 Aug 2024 16:52:54 +0200
Subject: [PATCH 1650/1765] lib: sse: remove unused sse_inject_out() parameter
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This parameters was a remnant of a previous version, remove it now that
it is unused.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index fe36a643c94..52172fcdc09 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -678,8 +678,7 @@ static int sse_ipi_inject_send(unsigned long hartid, uint32_t event_id)
 	return SBI_OK;
 }
 
-static int sse_inject_event(uint32_t event_id, unsigned long hartid,
-			    struct sbi_ecall_return *out)
+static int sse_inject_event(uint32_t event_id, unsigned long hartid)
 {
 	int ret;
 	struct sbi_sse_event *e;
@@ -812,15 +811,12 @@ int sbi_sse_inject_from_ecall(uint32_t event_id, unsigned long hartid,
 	if (!sbi_domain_is_assigned_hart(sbi_domain_thishart_ptr(), hartid))
 		return SBI_EINVAL;
 
-	return sse_inject_event(event_id, hartid, out);
+	return sse_inject_event(event_id, hartid);
 }
 
 int sbi_sse_inject_event(uint32_t event_id)
 {
-	/* We don't really care about return value here */
-	struct sbi_ecall_return out;
-
-	return sse_inject_event(event_id, current_hartid(), &out);
+	return sse_inject_event(event_id, current_hartid());
 }
 
 int sbi_sse_set_cb_ops(uint32_t event_id, const struct sbi_sse_cb_ops *cb_ops)

From c5b6ebd141ee33a6280f77bd84be8d0603ef7f77 Mon Sep 17 00:00:00 2001
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Date: Mon, 5 Aug 2024 09:46:32 -0300
Subject: [PATCH 1651/1765] Makefile: fix OPENSBI_VERSION_GIT build with
 submodules

When building OpenSBI via a submodule, OPENSBI_VERSION_GIT can be left
unset in case '.git' isn't a dir. This is the case when building OpenSBI
as a QEMU submodule:

$ cat .git
gitdir: ../../.git/modules/roms/opensbi

As a result, building OpenSBI tag v1.5.1 in QEMU will result in a binary
that will have "OpenSBI v1.5" as a banner.

Use "git rev-parse --git-dir" instead of checking if '.git' is a dir to
detect if the current dir is a git repo.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 9c7fd4d7450..e5a0f19ea92 100644
--- a/Makefile
+++ b/Makefile
@@ -91,7 +91,16 @@ endif
 # Find library version
 OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
 OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
-OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe 2> /dev/null; fi)
+OPENSBI_VERSION_GIT=
+
+# Detect 'git' presence before issuing 'git' commands
+GIT_AVAIL=$(shell command -v git 2> /dev/null)
+ifneq ($(GIT_AVAIL),)
+GIT_DIR=$(shell git rev-parse --git-dir 2> /dev/null)
+ifneq ($(GIT_DIR),)
+OPENSBI_VERSION_GIT=$(shell if [ -d $(GIT_DIR) ]; then git describe 2> /dev/null; fi)
+endif
+endif
 
 # Setup compilation commands
 ifneq ($(LLVM),)

From b0ad9e0bdd7804fad76dac4228b8a79e3c953310 Mon Sep 17 00:00:00 2001
From: Gregor Haas <gregorhaas1997@gmail.com>
Date: Thu, 8 Aug 2024 20:47:12 -0700
Subject: [PATCH 1652/1765] lib: utils: fdt_domain: Make opensbi-domain
 optional in CPU node

The domain_support.md documentation states that "the HART to domain instance
assignment can be parsed from the device tree using *optional* DT property
opensbi-domain in each CPU DT node". However, the current implementation does
not treat this parameter as optional when determining which HARTs to assign to
a freshly discovered domain from the device tree, causing an effect where every
HART in the system must be explicitly assigned to a domain only if a domain is
specified in the device tree. Instead, this patch simply ignores CPUs that do
not specify a domain, and does not attempt to assign them into the recently
discovered domain.

Signed-off-by: Gregor Haas <gregorhaas1997@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/fdt/fdt_domain.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 8683bb3ea72..4fde50f5b86 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -475,12 +475,12 @@ static int __fdt_parse_domain(const void *fdt, int domain_offset, void *opaque)
 		if (!fdt_node_is_enabled(fdt, cpu_offset))
 			continue;
 
+		/* This is an optional property */
 		val = fdt_getprop(fdt, cpu_offset, "opensbi-domain", &len);
-		if (!val || len < 4) {
-			err = SBI_EINVAL;
-			goto fail_free_all;
-		}
+		if (!val || len < 4)
+			continue;
 
+		/* However, it should be valid if specified */
 		doffset = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
 		if (doffset < 0) {
 			err = doffset;

From ef4520b1c63fc2770b10d952a800f9734f861b0a Mon Sep 17 00:00:00 2001
From: Zhang RunMin <runmin.zhang@ingenic.com>
Date: Wed, 14 Aug 2024 21:23:01 +0800
Subject: [PATCH 1653/1765] lib: Delete redundant `ulong`

In `csr_read_allowed` and `csr_write_allowed` macros, has already
converted second param to `ulong`. So delete redundant `ulong`
where uses csr_read/write_allowed macros.

Signed-off-by: Zhang RunMin <runmin.zhang@ingenic.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_dbtr.c        |  8 ++++----
 lib/sbi/sbi_hart.c        | 28 ++++++++++++++--------------
 lib/utils/irqchip/imsic.c |  2 +-
 3 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 27a8b918bff..5ca29c70bf9 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -167,11 +167,11 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 		goto _probed;
 
 	for (i = 0; i < RV_MAX_TRIGGERS; i++) {
-		csr_write_allowed(CSR_TSELECT, (ulong)&trap, i);
+		csr_write_allowed(CSR_TSELECT, &trap, i);
 		if (trap.cause)
 			break;
 
-		val = csr_read_allowed(CSR_TSELECT, (ulong)&trap);
+		val = csr_read_allowed(CSR_TSELECT, &trap);
 		if (trap.cause)
 			break;
 
@@ -182,7 +182,7 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 		if (val != i)
 			break;
 
-		val = csr_read_allowed(CSR_TINFO, (ulong)&trap);
+		val = csr_read_allowed(CSR_TINFO, &trap);
 		if (trap.cause) {
 			/*
 			 * If reading tinfo caused an exception, the
@@ -190,7 +190,7 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 			 * type.
 			 */
 			tdata1 = csr_read_allowed(CSR_TDATA1,
-						  (ulong)&trap);
+						  &trap);
 			if (trap.cause)
 				break;
 
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index c3667019b9a..cc364fac2cc 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -723,13 +723,13 @@ static unsigned long hart_pmp_get_allowed_addr(void)
 	unsigned long val = 0;
 	struct sbi_trap_info trap = {0};
 
-	csr_write_allowed(CSR_PMPCFG0, (ulong)&trap, 0);
+	csr_write_allowed(CSR_PMPCFG0, &trap, 0);
 	if (trap.cause)
 		return 0;
 
-	csr_write_allowed(CSR_PMPADDR0, (ulong)&trap, PMP_ADDR_MASK);
+	csr_write_allowed(CSR_PMPADDR0, &trap, PMP_ADDR_MASK);
 	if (!trap.cause) {
-		val = csr_read_allowed(CSR_PMPADDR0, (ulong)&trap);
+		val = csr_read_allowed(CSR_PMPADDR0, &trap);
 		if (trap.cause)
 			val = 0;
 	}
@@ -747,17 +747,17 @@ static int hart_mhpm_get_allowed_bits(void)
 	 * It is assumed that platforms will implement same number of bits for
 	 * all the performance counters including mcycle/minstret.
 	 */
-	csr_write_allowed(CSR_MHPMCOUNTER3, (ulong)&trap, val);
+	csr_write_allowed(CSR_MHPMCOUNTER3, &trap, val);
 	if (!trap.cause) {
-		val = csr_read_allowed(CSR_MHPMCOUNTER3, (ulong)&trap);
+		val = csr_read_allowed(CSR_MHPMCOUNTER3, &trap);
 		if (trap.cause)
 			return 0;
 	}
 	num_bits = sbi_fls(val) + 1;
 #if __riscv_xlen == 32
-	csr_write_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap, val);
+	csr_write_allowed(CSR_MHPMCOUNTER3H, &trap, val);
 	if (!trap.cause) {
-		val = csr_read_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap);
+		val = csr_read_allowed(CSR_MHPMCOUNTER3H, &trap);
 		if (trap.cause)
 			return num_bits;
 	}
@@ -788,9 +788,9 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	hfeatures->priv_version = SBI_HART_PRIV_VER_UNKNOWN;
 
 #define __check_hpm_csr(__csr, __mask) 					  \
-	oldval = csr_read_allowed(__csr, (ulong)&trap);			  \
+	oldval = csr_read_allowed(__csr, &trap);			  \
 	if (!trap.cause) {						  \
-		csr_write_allowed(__csr, (ulong)&trap, 1UL);		  \
+		csr_write_allowed(__csr, &trap, 1UL);			  \
 		if (!trap.cause && csr_swap(__csr, oldval) == 1UL) {	  \
 			(hfeatures->__mask) |= 1 << (__csr - CSR_MCYCLE); \
 		}							  \
@@ -809,13 +809,13 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 	__check_hpm_csr_8(__csr + 0, __mask) 			  \
 	__check_hpm_csr_8(__csr + 8, __mask)
 
-#define __check_csr(__csr, __rdonly, __wrval, __field, __skip)	\
-	oldval = csr_read_allowed(__csr, (ulong)&trap);			\
+#define __check_csr(__csr, __rdonly, __wrval, __field, __skip)		\
+	oldval = csr_read_allowed(__csr, &trap);			\
 	if (!trap.cause) {						\
 		if (__rdonly) {						\
 			(hfeatures->__field)++;				\
 		} else {						\
-			csr_write_allowed(__csr, (ulong)&trap, __wrval);\
+			csr_write_allowed(__csr, &trap, __wrval);	\
 			if (!trap.cause) {				\
 				if (csr_swap(__csr, oldval) == __wrval)	\
 					(hfeatures->__field)++;		\
@@ -880,7 +880,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 
 
 #define __check_priv(__csr, __base_priv, __priv)			\
-	val = csr_read_allowed(__csr, (ulong)&trap);			\
+	val = csr_read_allowed(__csr, &trap);				\
 	if (!trap.cause && (hfeatures->priv_version >= __base_priv)) {	\
 		hfeatures->priv_version = __priv;			\
 	}
@@ -899,7 +899,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 
 #define __check_ext_csr(__base_priv, __csr, __ext)			\
 	if (hfeatures->priv_version >= __base_priv) {			\
-		csr_read_allowed(__csr, (ulong)&trap);			\
+		csr_read_allowed(__csr, &trap);				\
 		if (!trap.cause)					\
 			__sbi_hart_update_extension(hfeatures,		\
 						    __ext, true);	\
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index 7d6993eabe6..bac72d212e1 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -241,7 +241,7 @@ void imsic_local_irqchip_init(void)
 	 */
 
 	/* If Smaia not available then do nothing */
-	csr_read_allowed(CSR_MTOPI, (ulong)&trap);
+	csr_read_allowed(CSR_MTOPI, &trap);
 	if (trap.cause)
 		return;
 

From c4940a9517486413cd676fc8032bb55f9d4e2778 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sun, 25 Aug 2024 09:20:15 +0530
Subject: [PATCH 1654/1765] platform: generic: Fix
 fw_platform_coldboot_harts_init() function

It is possible that the OpenSBI config DT node is present but
the "cold-boot-harts" DT property is not present. In this case,
the fw_platform_coldboot_harts_init() will do nothing which
in-turn causes OpenSBI firmware hang at boot time.

To address the above issue, fallback to the default approach
when the "cold-boot-harts" DT property is not present.

Fixes: 67ce5a763cfb ("platform: generic: Add support for specify coldboot harts in DT")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 platform/generic/platform.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 52dd6e62853..49d877d0da0 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -98,26 +98,26 @@ static void fw_platform_coldboot_harts_init(const void *fdt)
 		goto default_config;
 
 	val = fdt_getprop(fdt, config_offset, "cold-boot-harts", &len);
-	len = len / sizeof(u32);
-	if (val && len) {
-		for (int i = 0; i < len; i++) {
-			cpu_offset = fdt_node_offset_by_phandle(fdt,
-							fdt32_to_cpu(val[i]));
-			if (cpu_offset < 0)
-				goto default_config;
+	if (!val || !len)
+		goto default_config;
 
-			err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
-			if (err)
-				goto default_config;
+	len = len / sizeof(u32);
+	for (int i = 0; i < len; i++) {
+		cpu_offset = fdt_node_offset_by_phandle(fdt,
+						fdt32_to_cpu(val[i]));
+		if (cpu_offset < 0)
+			goto default_config;
 
-			if (!fdt_node_is_enabled(fdt, cpu_offset))
-				continue;
+		err = fdt_parse_hart_id(fdt, cpu_offset, &val32);
+		if (err)
+			goto default_config;
 
-			for (int i = 0; i < platform.hart_count; i++) {
-				if (val32 == generic_hart_index2id[i])
-					bitmap_set(generic_coldboot_harts, i, 1);
-			}
+		if (!fdt_node_is_enabled(fdt, cpu_offset))
+			continue;
 
+		for (int i = 0; i < platform.hart_count; i++) {
+			if (val32 == generic_hart_index2id[i])
+				bitmap_set(generic_coldboot_harts, i, 1);
 		}
 	}
 

From 792715e4f3125bfae3a3b4744ea2624c0a452ad0 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Thu, 29 Aug 2024 12:46:23 -0700
Subject: [PATCH 1655/1765] include: sbi_domain: Fix incorrect comments

These comments are inaccurate as of commit db56341dfa1f ("lib: sbi:
Allow platforms to provide root domain memory regions"), which modified
root domain registration to go through sbi_domain_register() like other
domains.

Fixes: db56341dfa1f ("lib: sbi: Allow platforms to provide root domain memory regions")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index a6e99c63d81..34ebd39d173 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -163,16 +163,9 @@ struct sbi_domain_memregion {
 
 /** Representation of OpenSBI domain */
 struct sbi_domain {
-	/**
-	 * Logical index of this domain
-	 * Note: This set by sbi_domain_finalize() in the coldboot path
-	 */
+	/** Logical index of this domain */
 	u32 index;
-	/**
-	 * HARTs assigned to this domain
-	 * Note: This set by sbi_domain_init() and sbi_domain_finalize()
-	 * in the coldboot path
-	 */
+	/** HARTs assigned to this domain */
 	struct sbi_hartmask assigned_harts;
 	/** Spinlock for accessing assigned_harts */
 	spinlock_t assigned_harts_lock;

From 65f04badf73a70dcab15cc8101b5f5927375fbdd Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Thu, 29 Aug 2024 12:46:24 -0700
Subject: [PATCH 1656/1765] lib: sbi: Use a linked list to track domains

This removes the compile-time limit on the number of domains. It also
reduces firmware size by about 200 bytes by removing the lookup table.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h     | 18 +++++++-----------
 lib/sbi/sbi_domain.c         | 30 +++++++++---------------------
 lib/sbi/sbi_domain_context.c |  6 +++---
 3 files changed, 19 insertions(+), 35 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 34ebd39d173..313ae1565cc 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -11,6 +11,7 @@
 #define __SBI_DOMAIN_H__
 
 #include <sbi/riscv_locks.h>
+#include <sbi/sbi_list.h>
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_domain_context.h>
@@ -158,11 +159,10 @@ struct sbi_domain_memregion {
 	unsigned long flags;
 };
 
-/** Maximum number of domains */
-#define SBI_DOMAIN_MAX_INDEX			32
-
 /** Representation of OpenSBI domain */
 struct sbi_domain {
+	/** Node in linked list of domains */
+	struct sbi_dlist node;
 	/** Logical index of this domain */
 	u32 index;
 	/** HARTs assigned to this domain */
@@ -206,16 +206,12 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom);
 #define sbi_domain_thishart_ptr() \
 	sbi_hartindex_to_domain(sbi_hartid_to_hartindex(current_hartid()))
 
-/** Index to domain table */
-extern struct sbi_domain *domidx_to_domain_table[];
-
-/** Get pointer to sbi_domain from index */
-#define sbi_index_to_domain(__index) \
-	domidx_to_domain_table[__index]
+/** Head of linked list of domains */
+extern struct sbi_dlist domain_list;
 
 /** Iterate over each domain */
-#define sbi_domain_for_each(__i, __d) \
-	for ((__i) = 0; ((__d) = sbi_index_to_domain(__i)); (__i)++)
+#define sbi_domain_for_each(__d) \
+	sbi_list_for_each_entry(__d, &domain_list, node)
 
 /** Iterate over each memory region of a domain */
 #define sbi_domain_for_each_memregion(__d, __r) \
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 374ac36b2f3..7198e27e9a8 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -13,16 +13,14 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_heap.h>
 #include <sbi/sbi_hsm.h>
+#include <sbi/sbi_list.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
-/*
- * We allocate an extra element because sbi_domain_for_each() expects
- * the array to be null-terminated.
- */
-struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX + 1] = { 0 };
+SBI_LIST_HEAD(domain_list);
+
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 
@@ -519,10 +517,9 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 
 void sbi_domain_dump_all(const char *suffix)
 {
-	u32 i;
 	const struct sbi_domain *dom;
 
-	sbi_domain_for_each(i, dom) {
+	sbi_domain_for_each(dom) {
 		sbi_domain_dump(dom, suffix);
 		sbi_printf("\n");
 	}
@@ -541,21 +538,11 @@ int sbi_domain_register(struct sbi_domain *dom,
 		return SBI_EINVAL;
 
 	/* Check if domain already discovered */
-	sbi_domain_for_each(i, tdom) {
+	sbi_domain_for_each(tdom) {
 		if (tdom == dom)
 			return SBI_EALREADY;
 	}
 
-	/*
-	 * Ensure that we have room for Domain Index to
-	 * HART ID mapping
-	 */
-	if (SBI_DOMAIN_MAX_INDEX <= domain_count) {
-		sbi_printf("%s: No room for %s\n",
-			   __func__, dom->name);
-		return SBI_ENOSPC;
-	}
-
 	/* Sanitize discovered domain */
 	rc = sanitize_domain(dom);
 	if (rc) {
@@ -565,9 +552,10 @@ int sbi_domain_register(struct sbi_domain *dom,
 		return rc;
 	}
 
+	sbi_list_add_tail(&dom->node, &domain_list);
+
 	/* Assign index to domain */
 	dom->index = domain_count++;
-	domidx_to_domain_table[dom->index] = dom;
 
 	/* Initialize spinlock for dom->assigned_harts */
 	SPIN_LOCK_INIT(dom->assigned_harts_lock);
@@ -692,7 +680,7 @@ int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
 int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
-	u32 i, dhart;
+	u32 dhart;
 	struct sbi_domain *dom;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
@@ -705,7 +693,7 @@ int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 	}
 
 	/* Startup boot HART of domains */
-	sbi_domain_for_each(i, dom) {
+	sbi_domain_for_each(dom) {
 		/* Domain boot HART index */
 		dhart = sbi_hartid_to_hartindex(dom->boot_hartid);
 
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 49a2f769737..1432e3a869d 100755
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -107,7 +107,7 @@ int sbi_domain_context_enter(struct sbi_domain *dom)
 
 int sbi_domain_context_exit(void)
 {
-	u32 i, hartindex = sbi_hartid_to_hartindex(current_hartid());
+	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
 	struct sbi_domain *dom;
 	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
 	struct sbi_context *dom_ctx, *tmp;
@@ -118,7 +118,7 @@ int sbi_domain_context_exit(void)
 	 * its context on the current hart if valid.
 	 */
 	if (!ctx) {
-		sbi_domain_for_each(i, dom) {
+		sbi_domain_for_each(dom) {
 			if (!sbi_hartmask_test_hartindex(hartindex,
 							 dom->possible_harts))
 				continue;
@@ -140,7 +140,7 @@ int sbi_domain_context_exit(void)
 	/* If no previous caller context */
 	if (!dom_ctx) {
 		/* Try to find next uninitialized user-defined domain's context */
-		sbi_domain_for_each(i, dom) {
+		sbi_domain_for_each(dom) {
 			if (dom == &root || dom == sbi_domain_thishart_ptr())
 				continue;
 

From ebfaf1974e5bb172343ed42a9836e0d5048e3677 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Thu, 29 Aug 2024 13:08:10 -0700
Subject: [PATCH 1657/1765] lib: sbi: Fix writes to emulated 32-bit htimedelta
 CSR

Writes to the low half CSR should not affect the high half of the value.
Make this separation explicit by writing to the delta in memory as two
adjacent XLEN-sized values.

Fixes: 1e9f88889f8b ("lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_timer.h |  2 ++
 lib/sbi/sbi_timer.c     | 15 ++++++++-------
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index ac48e2b805f..ac2c7be59f6 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -78,8 +78,10 @@ u64 sbi_timer_get_delta(void);
 /** Set timer delta value for current HART */
 void sbi_timer_set_delta(ulong delta);
 
+#if __riscv_xlen == 32
 /** Set upper 32-bits of timer delta value for current HART */
 void sbi_timer_set_delta_upper(ulong delta_upper);
+#endif
 
 /** Start timer event for current HART */
 void sbi_timer_event_start(u64 next_event);
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 7b618de1e7f..32955183fab 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -114,20 +114,21 @@ u64 sbi_timer_get_delta(void)
 
 void sbi_timer_set_delta(ulong delta)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
-						 time_delta_off);
+	ulong *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						   time_delta_off);
 
-	*time_delta = (u64)delta;
+	*time_delta = delta;
 }
 
+#if __riscv_xlen == 32
 void sbi_timer_set_delta_upper(ulong delta_upper)
 {
-	u64 *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
-						 time_delta_off);
+	ulong *time_delta = sbi_scratch_offset_ptr(sbi_scratch_thishart_ptr(),
+						   time_delta_off);
 
-	*time_delta &= 0xffffffffULL;
-	*time_delta |= ((u64)delta_upper << 32);
+	*(time_delta + 1) = delta_upper;
 }
+#endif
 
 void sbi_timer_event_start(u64 next_event)
 {

From 1cb234b1c9ed8d3cfcc226728c126c695ccea679 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Wed, 14 Aug 2024 01:40:30 -0700
Subject: [PATCH 1658/1765] lib: sbi: fwft: add support for
 SBI_FWFT_POINTER_MASKING_PMLEN

Add support for controlling the pointer masking mode on harts which
support the Smnpm extension. This extension can only exist on harts
where XLEN >= 64 bits. This implementation selects the mode with the
smallest PMLEN that satisfies the caller's requested lower bound.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_encoding.h      |  4 ++
 include/sbi/sbi_ecall_interface.h |  3 +-
 include/sbi/sbi_hart.h            |  2 +
 lib/sbi/sbi_fwft.c                | 67 +++++++++++++++++++++++++++++++
 lib/sbi/sbi_hart.c                |  1 +
 5 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 2e4391fedf7..56e1783979a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -213,6 +213,10 @@
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
 #define ENVCFG_ADUE			(_ULL(1) << 61)
 #define ENVCFG_CDE			(_ULL(1) << 60)
+#define ENVCFG_PMM			(_ULL(0x3) << 32)
+#define ENVCFG_PMM_PMLEN_0		(_ULL(0x0) << 32)
+#define ENVCFG_PMM_PMLEN_7		(_ULL(0x2) << 32)
+#define ENVCFG_PMM_PMLEN_16		(_ULL(0x3) << 32)
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
 #define ENVCFG_CBIE_SHIFT		4
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index e9a8167760a..2958b41863d 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -128,7 +128,8 @@ enum sbi_fwft_feature_t {
 	SBI_FWFT_SHADOW_STACK			= 0x2,
 	SBI_FWFT_DOUBLE_TRAP			= 0x3,
 	SBI_FWFT_PTE_AD_HW_UPDATING		= 0x4,
-	SBI_FWFT_LOCAL_RESERVED_START		= 0x5,
+	SBI_FWFT_POINTER_MASKING_PMLEN		= 0x5,
+	SBI_FWFT_LOCAL_RESERVED_START		= 0x6,
 	SBI_FWFT_LOCAL_RESERVED_END		= 0x3fffffff,
 	SBI_FWFT_LOCAL_PLATFORM_START		= 0x40000000,
 	SBI_FWFT_LOCAL_PLATFORM_END		= 0x7fffffff,
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 81ec061d36a..32545f41e41 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -67,6 +67,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SVADE,
 	/** Hart has Svadu extension */
 	SBI_HART_EXT_SVADU,
+	/** Hart has Smnpm extension */
+	SBI_HART_EXT_SMNPM,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index ef881ef57e7..c58033000bc 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -59,6 +59,7 @@ static const unsigned long fwft_defined_features[] = {
 	SBI_FWFT_SHADOW_STACK,
 	SBI_FWFT_DOUBLE_TRAP,
 	SBI_FWFT_PTE_AD_HW_UPDATING,
+	SBI_FWFT_POINTER_MASKING_PMLEN,
 };
 
 static bool fwft_is_defined_feature(enum sbi_fwft_feature_t feature)
@@ -145,6 +146,64 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)
 	return SBI_OK;
 }
 
+#if __riscv_xlen > 32
+static int fwft_pmlen_supported(struct fwft_config *conf)
+{
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				    SBI_HART_EXT_SMNPM))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static bool fwft_try_to_set_pmm(unsigned long pmm)
+{
+	csr_set(CSR_MENVCFG, pmm);
+	return (csr_read(CSR_MENVCFG) & ENVCFG_PMM) == pmm;
+}
+
+static int fwft_set_pmlen(struct fwft_config *conf, unsigned long value)
+{
+	unsigned long prev;
+
+	if (value > 16)
+		return SBI_EINVAL;
+
+	prev = csr_read_clear(CSR_MENVCFG, ENVCFG_PMM);
+	if (value == 0)
+		return SBI_OK;
+	if (value <= 7) {
+		if (fwft_try_to_set_pmm(ENVCFG_PMM_PMLEN_7))
+			return SBI_OK;
+		csr_clear(CSR_MENVCFG, ENVCFG_PMM);
+	}
+	if (fwft_try_to_set_pmm(ENVCFG_PMM_PMLEN_16))
+		return SBI_OK;
+	csr_write(CSR_MENVCFG, prev);
+
+	return SBI_EINVAL;
+}
+
+static int fwft_get_pmlen(struct fwft_config *conf, unsigned long *value)
+{
+	switch (csr_read(CSR_MENVCFG) & ENVCFG_PMM) {
+	case ENVCFG_PMM_PMLEN_0:
+		*value = 0;
+		break;
+	case ENVCFG_PMM_PMLEN_7:
+		*value = 7;
+		break;
+	case ENVCFG_PMM_PMLEN_16:
+		*value = 16;
+		break;
+	default:
+		return SBI_EFAIL;
+	}
+
+	return SBI_OK;
+}
+#endif
+
 static struct fwft_config* get_feature_config(enum sbi_fwft_feature_t feature)
 {
 	int i;
@@ -236,6 +295,14 @@ static const struct fwft_feature features[] =
 		.set = fwft_set_adue,
 		.get = fwft_get_adue,
 	},
+#if __riscv_xlen > 32
+	{
+		.id = SBI_FWFT_POINTER_MASKING_PMLEN,
+		.supported = fwft_pmlen_supported,
+		.set = fwft_set_pmlen,
+		.get = fwft_get_pmlen,
+	},
+#endif
 };
 
 int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index cc364fac2cc..f7aed739849 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -680,6 +680,7 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(ssccfg, SBI_HART_EXT_SSCCFG),
 	__SBI_HART_EXT_DATA(svade, SBI_HART_EXT_SVADE),
 	__SBI_HART_EXT_DATA(svadu, SBI_HART_EXT_SVADU),
+	__SBI_HART_EXT_DATA(smnpm, SBI_HART_EXT_SMNPM),
 };
 
 _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),

From 00093a20004baf6826d843ac3ff6e8e7c5d06b13 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 29 Aug 2024 18:03:55 -0700
Subject: [PATCH 1659/1765] docs: Remove github PR as an option

OpenSBI development workflow is mailing list based from the
beginning. Initially, github PRs were added as an option but it turned
out that it is not feasible to support both github PR and mailing list
based workflows. Hence, all the PRs has been redirected to use the
mailing list from a long time. In fact, it is source of confusion to
have both options.

Update the documentation to reflect the reality.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/contributing.md | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/docs/contributing.md b/docs/contributing.md
index 78d909e474c..4d08c647385 100644
--- a/docs/contributing.md
+++ b/docs/contributing.md
@@ -1,17 +1,15 @@
 OpenSBI Contribution Guideline
 ==============================
 
-All contributions to OpenSBI can be sent in the following ways:
-1. Email patches to the OpenSBI mailing list at `opensbi@lists.infradead.org`
-2. GitHub Pull Requests (PRs) to the [OpenSBI main repository]
+All contributions to OpenSBI must be sent via email patches to the OpenSBI
+mailing list at `opensbi@lists.infradead.org`
 
 To join the OpenSBI mailing list, please visit the [OpenSBI infradead page].
 
-The OpenSBI maintainers prefer patches via the OpenSBI mailing list
-(option 1 above) so that they are visible to a wider audience. All
-accepted patches on the OpenSBI mailing list will be taken by any of
-the OpenSBI maintainers and merged into the [OpenSBI main repository]
-using GitHub PRs.
+The mailing list based patch approach is preferred over github PRs so that they
+are visible to a wider audience. All accepted patches on the OpenSBI mailing
+list will be taken by one of the OpenSBI maintainers and merged into the
+[OpenSBI main repository].
 
 All contributed work must follow the following rules:
 1. OpenSBI code should be written in accordance to the [Linux coding style].
@@ -33,9 +31,6 @@ riscv/opensbi repository. Instead, prefer using a fork of the riscv/opensbi main
 repository and branches within that fork to create pull requests.
 7. A maintainer cannot merge his own pull requests in the riscv/opensbi main
 repository.
-8. A pull request must get at least one review from a maintainer.
-9. A pull request must spend at least 24 hours in review to allow for other
-developers to review.
 
 -----------------------------------------------------------------------
 

From beef2f693785499153b00f330d0205f91c3add4e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Thu, 29 Aug 2024 13:22:36 -0700
Subject: [PATCH 1660/1765] lib: sbi: Respect scounteren when emulating the
 time CSR

This optimization creates a correctness issue, as it prevents supervisor
software from restricting VS-mode or U-mode access to the time CSR for
its own purposes.

Closes: https://github.com/riscv-software-src/opensbi/issues/370
Fixes: ebc8ebc0f846 ("lib: sbi: Improve HPM CSR read/write emulation")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_emulate_csr.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 869c81f4ed8..3adec78dc89 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -66,12 +66,11 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 		*csr_val = csr_read(CSR_MCYCLE);
 		break;
 	case CSR_TIME:
+		if (!hpm_allowed(csr_num - CSR_CYCLE, prev_mode, virt))
+			return SBI_ENOTSUPP;
 		/*
 		 * We emulate TIME CSR for both Host (HS/U-mode) and
 		 * Guest (VS/VU-mode).
-		 *
-		 * Faster TIME CSR reads are critical for good performance
-		 * in S-mode software so we don't check CSR permissions.
 		 */
 		*csr_val = (virt) ? sbi_timer_virt_value():
 				    sbi_timer_value();

From 040fcf49ab9d428018eb3e04640df123594d2165 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:56:56 -0700
Subject: [PATCH 1661/1765] lib: sbi_domain_context: Fix file permissions

These C source files should not be marked as executable.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain_context.h | 0
 lib/sbi/sbi_domain_context.c     | 0
 2 files changed, 0 insertions(+), 0 deletions(-)
 mode change 100755 => 100644 include/sbi/sbi_domain_context.h
 mode change 100755 => 100644 lib/sbi/sbi_domain_context.c

diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
old mode 100755
new mode 100644
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
old mode 100755
new mode 100644

From 570b9ae89a23ac80a21cd2240b0dd667246a2d4d Mon Sep 17 00:00:00 2001
From: Zong Li <zong.li@sifive.com>
Date: Fri, 30 Aug 2024 11:16:10 +0800
Subject: [PATCH 1662/1765] include: sbi_bitops: add ULL version for BIT and
 GENMASK

Add BIT_ULL and GENMASK_ULL for dealing with 64-bits data on
32-bits CPU, then we don't need to separate the operation to
low part and high part. For instance, the MMIO register is
64 bits wide.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_bitops.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/sbi/sbi_bitops.h b/include/sbi/sbi_bitops.h
index 7d90334d778..3ddac777d88 100644
--- a/include/sbi/sbi_bitops.h
+++ b/include/sbi/sbi_bitops.h
@@ -14,6 +14,8 @@
 
 #define BITS_PER_LONG		(8 * __SIZEOF_LONG__)
 
+#define BITS_PER_LONG_LONG	64
+
 #define EXTRACT_FIELD(val, which) \
 	(((val) & (which)) / ((which) & ~((which)-1)))
 #define INSERT_FIELD(val, which, fieldval) \
@@ -28,9 +30,13 @@
 #define BIT_WORD_OFFSET(bit)	((bit) & (BITS_PER_LONG - 1))
 #define BIT_ALIGN(bit, align)	(((bit) + ((align) - 1)) & ~((align) - 1))
 
+#define BIT_ULL(nr)		(1ULL << (nr))
+
 #define GENMASK(h, l) \
 	(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 
+#define GENMASK_ULL(h, l) \
+	(((~0ULL) - (1ULL << (l)) + 1) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 /**
  * sbi_ffs - find first (less-significant) set bit in a long word.
  * @word: The word to search

From 6758a756c4185d821611db58b3e839ac70eaba12 Mon Sep 17 00:00:00 2001
From: Deepak Gupta <debug@rivosinc.com>
Date: Mon, 16 Sep 2024 11:23:54 -0700
Subject: [PATCH 1663/1765] include: adding support for Zicfilp / Zicfiss
 encodings

Zicfilp / Zicfiss extension (see link) introduces b2 (LPE) in menvcfg CSR to
enable landing pads and b3 (SSE) in menvcfg CSR to enable shadow stack and
landing pad for privilege less than M. Additionally extension introduces new
bits in *status for recording landing pad state and a new exception type
`software check exception` with cause=0x12.

Link: https://github.com/riscv/riscv-cfi

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/riscv_encoding.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 56e1783979a..980abdbed6c 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -32,6 +32,7 @@
 #define MSTATUS_TVM			_UL(0x00100000)
 #define MSTATUS_TW			_UL(0x00200000)
 #define MSTATUS_TSR			_UL(0x00400000)
+#define MSTATUS_SPELP		_UL(0x00800000)
 #define MSTATUS32_SD			_UL(0x80000000)
 #if __riscv_xlen == 64
 #define MSTATUS_UXL			_ULL(0x0000000300000000)
@@ -41,12 +42,14 @@
 #define MSTATUS_GVA			_ULL(0x0000004000000000)
 #define MSTATUS_GVA_SHIFT		38
 #define MSTATUS_MPV			_ULL(0x0000008000000000)
+#define MSTATUS_MPELP		_ULL(0x0000020000000000)
 #else
 #define MSTATUSH_SBE			_UL(0x00000010)
 #define MSTATUSH_MBE			_UL(0x00000020)
 #define MSTATUSH_GVA			_UL(0x00000040)
 #define MSTATUSH_GVA_SHIFT		6
 #define MSTATUSH_MPV			_UL(0x00000080)
+#define MSTATUSH_MPELP			_UL(0x00000200)
 #endif
 #define MSTATUS32_SD			_UL(0x80000000)
 #define MSTATUS64_SD			_ULL(0x8000000000000000)
@@ -224,6 +227,8 @@
 #define ENVCFG_CBIE_ILL			_UL(0x0)
 #define ENVCFG_CBIE_FLUSH		_UL(0x1)
 #define ENVCFG_CBIE_INV			_UL(0x3)
+#define ENVCFG_SSE			(_UL(1) << 3)
+#define ENVCFG_LPE			(_UL(1) << 2)
 #define ENVCFG_FIOM			_UL(0x1)
 
 /* ===== User-level CSRs ===== */
@@ -232,6 +237,7 @@
 #define CSR_USTATUS			0x000
 #define CSR_UIE				0x004
 #define CSR_UTVEC			0x005
+#define CSR_SSP				0x011
 
 /* User Trap Handling (N-extension) */
 #define CSR_USCRATCH			0x040
@@ -767,6 +773,7 @@
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd
 #define CAUSE_STORE_PAGE_FAULT		0xf
+#define CAUSE_SW_CHECK_EXCP			0x12
 #define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
 #define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
 #define CAUSE_VIRTUAL_INST_FAULT	0x16

From c0804ed49a6ef1d2b757a97baf3f802fd98ae517 Mon Sep 17 00:00:00 2001
From: Deepak Gupta <debug@rivosinc.com>
Date: Mon, 16 Sep 2024 11:23:55 -0700
Subject: [PATCH 1664/1765] lib: sbi: add zicfilp/zicfiss and elp cfi state
 reflect back in status

This patch adds support to check for zicfilp / zicfiss extension.

zicfilp record status of hart's ELP state in *status csr. Missing landing
pad sets MPELP in mstatus. When SBI is redirecting back to S/VS/HS, SPELP
is set in sstatus/vsstatus.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_hart.h |  4 ++++
 lib/sbi/sbi_hart.c     |  2 ++
 lib/sbi/sbi_trap.c     | 20 ++++++++++++++++++++
 3 files changed, 26 insertions(+)

diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 32545f41e41..22d83275fc0 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -69,6 +69,10 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SVADU,
 	/** Hart has Smnpm extension */
 	SBI_HART_EXT_SMNPM,
+	/** HART has zicfilp extension */
+	SBI_HART_EXT_ZICFILP,
+	/** HART has zicfiss extension */
+	SBI_HART_EXT_ZICFISS,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index f7aed739849..73f2c7b1ad1 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -681,6 +681,8 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(svade, SBI_HART_EXT_SVADE),
 	__SBI_HART_EXT_DATA(svadu, SBI_HART_EXT_SVADU),
 	__SBI_HART_EXT_DATA(smnpm, SBI_HART_EXT_SMNPM),
+	__SBI_HART_EXT_DATA(zicfilp, SBI_HART_EXT_ZICFILP),
+	__SBI_HART_EXT_DATA(zicfiss, SBI_HART_EXT_ZICFISS),
 };
 
 _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index b4f3a176d6b..176e17401b8 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -103,6 +103,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap)
 {
 	ulong hstatus, vsstatus, prev_mode;
+	bool elp = false;
 #if __riscv_xlen == 32
 	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
 #else
@@ -116,6 +117,17 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_ENOTSUPP;
 
+	/* If hart support for zicfilp, clear MPELP because redirecting to VS or (H)S */
+	if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(), SBI_HART_EXT_ZICFILP)) {
+#if __riscv_xlen == 32
+		elp = regs->mstatusH & MSTATUSH_MPELP;
+		regs->mstatusH &= ~MSTATUSH_MPELP;
+#else
+		elp = regs->mstatus & MSTATUS_MPELP;
+		regs->mstatus &= ~MSTATUS_MPELP;
+#endif
+	}
+
 	/* If exceptions came from VS/VU-mode, redirect to VS-mode if
 	 * delegated in hedeleg
 	 */
@@ -169,6 +181,10 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		/* Get VS-mode SSTATUS CSR */
 		vsstatus = csr_read(CSR_VSSTATUS);
 
+		/* If elp was set, set it back in vsstatus */
+		if (elp)
+			vsstatus |= MSTATUS_SPELP;
+
 		/* Set SPP for VS-mode */
 		vsstatus &= ~SSTATUS_SPP;
 		if (prev_mode == PRV_S)
@@ -209,6 +225,10 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 
 		/* Clear SIE for S-mode */
 		regs->mstatus &= ~MSTATUS_SIE;
+
+		/* If elp was set, set it back in mstatus */
+		if (elp)
+			regs->mstatus |= MSTATUS_SPELP;
 	}
 
 	return 0;

From 110524441a827e026db3547ed03c5723b9c9e211 Mon Sep 17 00:00:00 2001
From: Deepak Gupta <debug@rivosinc.com>
Date: Mon, 16 Sep 2024 11:23:56 -0700
Subject: [PATCH 1665/1765] lib: sbi: sw check exception delegation

zicfiss and zicfilp introduces new exception (cause=18). Delegate this
exception to S mode because cfi violations in U / S will be reported
via this exception.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 lib/sbi/sbi_hart.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 73f2c7b1ad1..d9aef31a696 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -207,7 +207,8 @@ static int delegate_traps(struct sbi_scratch *scratch)
 	if (sbi_platform_has_mfaults_delegation(plat))
 		exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
 			      (1U << CAUSE_LOAD_PAGE_FAULT) |
-			      (1U << CAUSE_STORE_PAGE_FAULT);
+			      (1U << CAUSE_STORE_PAGE_FAULT) |
+			      (1U << CAUSE_SW_CHECK_EXCP);
 
 	/*
 	 * If hypervisor extension available then we only handle hypervisor

From 7179e36ce76379e717fe32f2228600cd80366daa Mon Sep 17 00:00:00 2001
From: Deepak Gupta <debug@rivosinc.com>
Date: Mon, 16 Sep 2024 11:23:57 -0700
Subject: [PATCH 1666/1765] lib: sbi: fwft: implement landing pad and shadow
 stack fwft interface
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Supervisor software can enable control flow integrity features for itself
using fwft feature `SBI_FWFT_LANDING_PAD` and `SBI_FWFT_SHADOW_STACK`.
This patch implements the mechanism to enable both these fwft.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
---
 lib/sbi/sbi_fwft.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index c58033000bc..124a043acff 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -146,6 +146,68 @@ static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)
 	return SBI_OK;
 }
 
+static int fwft_lpad_supported(struct fwft_config *conf)
+{
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				    SBI_HART_EXT_ZICFILP))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static int fwft_enable_lpad(struct fwft_config *conf, unsigned long value)
+{
+	if (value == 1)
+		csr_set(CSR_MENVCFG, ENVCFG_LPE);
+	else if (value == 0)
+		csr_clear(CSR_MENVCFG, ENVCFG_LPE);
+	else
+		return SBI_EINVAL;
+
+	return SBI_OK;
+}
+
+static int fwft_get_lpad(struct fwft_config *conf, unsigned long *value)
+{
+	unsigned long cfg;
+
+	cfg = csr_read(CSR_MENVCFG) & ENVCFG_LPE;
+	*value = cfg != 0;
+
+	return SBI_OK;
+}
+
+static int fwft_sstack_supported(struct fwft_config *conf)
+{
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				    SBI_HART_EXT_ZICFISS))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static int fwft_enable_sstack(struct fwft_config *conf, unsigned long value)
+{
+	if (value == 1)
+		csr_set(CSR_MENVCFG, ENVCFG_SSE);
+	else if (value == 0)
+		csr_clear(CSR_MENVCFG, ENVCFG_SSE);
+	else
+		return SBI_EINVAL;
+
+	return SBI_OK;
+}
+
+static int fwft_get_sstack(struct fwft_config *conf, unsigned long *value)
+{
+	unsigned long cfg;
+
+	cfg = csr_read(CSR_MENVCFG) & ENVCFG_SSE;
+	*value = cfg != 0;
+
+	return SBI_OK;
+}
+
 #if __riscv_xlen > 32
 static int fwft_pmlen_supported(struct fwft_config *conf)
 {
@@ -289,6 +351,18 @@ static const struct fwft_feature features[] =
 		.set = fwft_set_misaligned_delegation,
 		.get = fwft_get_misaligned_delegation,
 	},
+	{
+		.id = SBI_FWFT_LANDING_PAD,
+		.supported = fwft_lpad_supported,
+		.set = fwft_enable_lpad,
+		.get = fwft_get_lpad,
+	},
+	{
+		.id = SBI_FWFT_SHADOW_STACK,
+		.supported = fwft_sstack_supported,
+		.set = fwft_enable_sstack,
+		.get = fwft_get_sstack,
+	},
 	{
 		.id = SBI_FWFT_PTE_AD_HW_UPDATING,
 		.supported = fwft_adue_supported,

From 7c409091592780284fa99992e225126732f7aae5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Thu, 29 Aug 2024 13:13:52 -0700
Subject: [PATCH 1667/1765] firmware: Simplify FDT header endianness conversion

Reduce the code size by using single-byte loads instead of bit
manipulation. This method also does the right thing on (hypothetical)
big-endian systems.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 26 +++++---------------------
 1 file changed, 5 insertions(+), 21 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index b950c0b836c..0b58cc42ac1 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -242,30 +242,14 @@ _scratch_init:
 	beq	t1, a1, _fdt_reloc_done
 	/* t0 = source FDT start address */
 	add	t0, a1, zero
-	/* t2 = source FDT size in big-endian */
-#if __riscv_xlen > 32
-	lwu	t2, 4(t0)
-#else
-	lw	t2, 4(t0)
-#endif
-	/* t3 = bit[15:8] of FDT size */
-	add	t3, t2, zero
-	srli	t3, t3, 16
-	and	t3, t3, a4
+	/* t2 = source FDT size (convert from big-endian) */
+	lbu	t2, 7(t0)
+	lbu	t3, 6(t0)
+	lbu	t4, 5(t0)
+	lbu	t5, 4(t0)
 	slli	t3, t3, 8
-	/* t4 = bit[23:16] of FDT size */
-	add	t4, t2, zero
-	srli	t4, t4, 8
-	and	t4, t4, a4
 	slli	t4, t4, 16
-	/* t5 = bit[31:24] of FDT size */
-	add	t5, t2, zero
-	and	t5, t5, a4
 	slli	t5, t5, 24
-	/* t2 = bit[7:0] of FDT size */
-	srli	t2, t2, 24
-	and	t2, t2, a4
-	/* t2 = FDT size in little-endian */
 	or	t2, t2, t3
 	or	t2, t2, t4
 	or	t2, t2, t5

From 4ac18181974c353bebc894362e7e9c69890a978a Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:05 -0700
Subject: [PATCH 1668/1765] lib: sbi_init: Remove obsolete hartid check

This check has been obsolete since commit c51f02cf143b ("include:
sbi_platform: Introduce HART index to HART id table"). It originally
filtered out harts that were disabled in the FDT, but those harts are
omitted from the hart_index2id table, so they will hang in fw_base.S
after the "Find HART index" loop and never enter sbi_init().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_init.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index d80efe970fe..7443010e0ab 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -500,21 +500,11 @@ static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
  */
 void __noreturn sbi_init(struct sbi_scratch *scratch)
 {
-	u32 i, h;
-	bool hartid_valid		= false;
 	bool next_mode_supported	= false;
 	bool coldboot			= false;
 	u32 hartid			= current_hartid();
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	for (i = 0; i < plat->hart_count; i++) {
-		h = (plat->hart_index2id) ? plat->hart_index2id[i] : i;
-		if (h == hartid)
-			hartid_valid = true;
-	}
-	if (!hartid_valid)
-		sbi_hart_hang();
-
 	switch (scratch->next_mode) {
 	case PRV_M:
 		next_mode_supported = true;

From 9d7a983060dc379ae788ed1879371211a1005c6f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:06 -0700
Subject: [PATCH 1669/1765] include: sbi: Store the hart index in struct
 sbi_scratch

This is a more efficient way to get the index of the current hart than
calling a function to loop through the hartindex -> hartid lookup table.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S        |  2 ++
 include/sbi/sbi_scratch.h | 10 +++++++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 0b58cc42ac1..41ae46f21f1 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -218,6 +218,8 @@ _scratch_init:
 #endif
 	REG_S	a0, SBI_SCRATCH_OPTIONS_OFFSET(tp)
 	MOV_3R	a0, s0, a1, s1, a2, s2
+	/* Store hart index in scratch space */
+	REG_S	t1, SBI_SCRATCH_HARTINDEX_OFFSET(tp)
 	/* Move to next scratch space */
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 12e6a983889..9ae4f891387 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -42,8 +42,10 @@
 #define SBI_SCRATCH_TMP0_OFFSET			(12 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
 #define SBI_SCRATCH_OPTIONS_OFFSET		(13 * __SIZEOF_POINTER__)
+/** Offset of hartindex member in sbi_scratch */
+#define SBI_SCRATCH_HARTINDEX_OFFSET		(14 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(14 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(15 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -83,6 +85,8 @@ struct sbi_scratch {
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
 	unsigned long options;
+	/** Index of the hart */
+	unsigned long hartindex;
 };
 
 /**
@@ -202,6 +206,10 @@ do {									\
 					= (__type)(__ptr);		\
 } while (0)
 
+/** Get the hart index of the current hart */
+#define current_hartindex() \
+	(sbi_scratch_thishart_ptr()->hartindex)
+
 /** Last HART index having a sbi_scratch pointer */
 extern u32 last_hartindex_having_scratch;
 

From 15c4e285db3fe09bf96bddb7c15acb8d8827e1fe Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:07 -0700
Subject: [PATCH 1670/1765] lib: sbi: Use current_hartindex() where possible

This avoids calls to the expensive sbi_hartid_to_hartindex() function
and also makes the firmware smaller.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h         | 2 +-
 include/sbi/sbi_domain_context.h | 7 +++----
 lib/sbi/sbi_domain_context.c     | 6 +++---
 lib/sbi/sbi_hsm.c                | 2 +-
 lib/sbi/sbi_ipi.c                | 2 +-
 5 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 313ae1565cc..c1a1717f587 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -204,7 +204,7 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom);
 
 /** Get pointer to sbi_domain for current HART */
 #define sbi_domain_thishart_ptr() \
-	sbi_hartindex_to_domain(sbi_hartid_to_hartindex(current_hartid()))
+	sbi_hartindex_to_domain(current_hartindex())
 
 /** Head of linked list of domains */
 extern struct sbi_dlist domain_list;
diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
index 0d25884acfe..a92f338b224 100644
--- a/include/sbi/sbi_domain_context.h
+++ b/include/sbi/sbi_domain_context.h
@@ -52,10 +52,9 @@ struct sbi_context {
 	(__d)->hartindex_to_context_table[__hartindex]
 
 /** Macro to obtain the current hart's context pointer */
-#define sbi_domain_context_thishart_ptr()                  \
-	sbi_hartindex_to_domain_context(                   \
-		sbi_hartid_to_hartindex(current_hartid()), \
-		sbi_domain_thishart_ptr())
+#define sbi_domain_context_thishart_ptr() \
+	sbi_hartindex_to_domain_context(current_hartindex(), \
+					sbi_domain_thishart_ptr())
 
 /**
  * Enter a specific domain context synchronously
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 1432e3a869d..bafb6c3ef9b 100644
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -26,7 +26,7 @@
 static void switch_to_next_domain_context(struct sbi_context *ctx,
 					  struct sbi_context *dom_ctx)
 {
-	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
+	u32 hartindex = current_hartindex();
 	struct sbi_trap_context *trap_ctx;
 	struct sbi_domain *current_dom = ctx->dom;
 	struct sbi_domain *target_dom = dom_ctx->dom;
@@ -91,7 +91,7 @@ int sbi_domain_context_enter(struct sbi_domain *dom)
 {
 	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
 	struct sbi_context *dom_ctx = sbi_hartindex_to_domain_context(
-		sbi_hartid_to_hartindex(current_hartid()), dom);
+		current_hartindex(), dom);
 
 	/* Validate the domain context existence */
 	if (!dom_ctx)
@@ -107,7 +107,7 @@ int sbi_domain_context_enter(struct sbi_domain *dom)
 
 int sbi_domain_context_exit(void)
 {
-	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
+	u32 hartindex = current_hartindex();
 	struct sbi_domain *dom;
 	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
 	struct sbi_context *dom_ctx, *tmp;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 3706acfb199..ab11b119e09 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -261,7 +261,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 			hdata = sbi_scratch_offset_ptr(rscratch,
 						       hart_data_offset);
 			ATOMIC_INIT(&hdata->state,
-				    (sbi_hartindex_to_hartid(i) == hartid) ?
+				    (i == current_hartindex()) ?
 				    SBI_HSM_STATE_START_PENDING :
 				    SBI_HSM_STATE_STOPPED);
 			ATOMIC_INIT(&hdata->start_ticket, 0);
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 048aaa6687e..505aafd8ccd 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -233,7 +233,7 @@ void sbi_ipi_process(void)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
-	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
+	u32 hartindex = current_hartindex();
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
 	sbi_ipi_raw_clear(hartindex);

From d73a4c741c79b1ed390f33d59b2621ca4421c57e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:08 -0700
Subject: [PATCH 1671/1765] lib: sbi_sse: Cache the event's target hart index

This avoids needing to map the target hartid to a hart index when
enabling or disabling an event, and provides a net code size reduction.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_sse.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 52172fcdc09..365a878f6e2 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -108,6 +108,7 @@ assert_field_offset(interrupted.a7, SBI_SSE_ATTR_INTERRUPTED_A7);
 struct sbi_sse_event {
 	struct sbi_sse_event_attrs attrs;
 	uint32_t event_id;
+	u32 hartindex;
 	const struct sbi_sse_cb_ops *cb_ops;
 	struct sbi_dlist node;
 };
@@ -197,7 +198,7 @@ static bool sse_event_is_local(struct sbi_sse_event *e)
  */
 static struct sse_hart_state *sse_get_hart_state(struct sbi_sse_event *e)
 {
-	struct sbi_scratch *s = sbi_hartid_to_scratch(e->attrs.hartid);
+	struct sbi_scratch *s = sbi_hartindex_to_scratch(e->hartindex);
 
 	return sse_get_hart_state_ptr(s);
 }
@@ -392,6 +393,7 @@ static void sse_event_set_attr(struct sbi_sse_event *e, uint32_t attr_id,
 		break;
 	case SBI_SSE_ATTR_PREFERRED_HART:
 		e->attrs.hartid = val;
+		e->hartindex = sbi_hartid_to_hartindex(val);
 		sse_event_invoke_cb(e, set_hartid_cb, val);
 		break;
 
@@ -1017,6 +1019,7 @@ int sbi_sse_unregister(uint32_t event_id)
 static void sse_event_init(struct sbi_sse_event *e, uint32_t event_id)
 {
 	e->event_id = event_id;
+	e->hartindex = current_hartindex();
 	e->attrs.hartid = current_hartid();
 	/* Declare all events as injectable */
 	e->attrs.status |= BIT(SBI_SSE_ATTR_STATUS_INJECT_OFFSET);

From 7f5fa9f9a48d3d4f6379ce207f50e8347cad3a14 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:09 -0700
Subject: [PATCH 1672/1765] lib: utils/irqchip: Look up IMSIC data by hart
 index

This avoids needing to map a hartid to a hart index.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/imsic.h |  4 ++--
 lib/utils/irqchip/imsic.c         | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/sbi_utils/irqchip/imsic.h b/include/sbi_utils/irqchip/imsic.h
index e295771e49f..bc9292d36ac 100644
--- a/include/sbi_utils/irqchip/imsic.h
+++ b/include/sbi_utils/irqchip/imsic.h
@@ -37,9 +37,9 @@ struct imsic_data {
 
 int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file);
 
-struct imsic_data *imsic_get_data(u32 hartid);
+struct imsic_data *imsic_get_data(u32 hartindex);
 
-int imsic_get_target_file(u32 hartid);
+int imsic_get_target_file(u32 hartindex);
 
 void imsic_local_irqchip_init(void);
 
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index bac72d212e1..ee532bb462f 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -119,28 +119,28 @@ int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file)
 	return 0;
 }
 
-struct imsic_data *imsic_get_data(u32 hartid)
+struct imsic_data *imsic_get_data(u32 hartindex)
 {
 	struct sbi_scratch *scratch;
 
 	if (!imsic_ptr_offset)
 		return NULL;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return NULL;
 
 	return imsic_get_hart_data_ptr(scratch);
 }
 
-int imsic_get_target_file(u32 hartid)
+int imsic_get_target_file(u32 hartindex)
 {
 	struct sbi_scratch *scratch;
 
 	if (!imsic_file_offset)
 		return SBI_ENOENT;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return SBI_ENOENT;
 
@@ -257,7 +257,7 @@ void imsic_local_irqchip_init(void)
 
 int imsic_warm_irqchip_init(void)
 {
-	struct imsic_data *imsic = imsic_get_data(current_hartid());
+	struct imsic_data *imsic = imsic_get_data(current_hartindex());
 
 	/* Sanity checks */
 	if (!imsic || !imsic->targets_mmode)

From 633e7cbd506f557a2455c57264535ec66e567099 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:10 -0700
Subject: [PATCH 1673/1765] lib: sbi_ecall_legacy: Use SBI v0.2 encoding for
 "all harts"

This simplifies the logic so that sbi_hsm_hart_interruptible_mask() is
only called from one place (sbi_ipi_send_many()). A minor functional
change is that the legacy functions can now affect more than XLEN harts
when targeting all harts.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_legacy.c | 25 ++++++++++++-------------
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/lib/sbi/sbi_ecall_legacy.c b/lib/sbi/sbi_ecall_legacy.c
index 9a1ae1e481a..25e9a1e8362 100644
--- a/lib/sbi/sbi_ecall_legacy.c
+++ b/lib/sbi/sbi_ecall_legacy.c
@@ -14,7 +14,6 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
@@ -24,7 +23,7 @@
 #include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 
-static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
+static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask, ulong *hbase,
 				      struct sbi_trap_info *uptrap)
 {
 	ulong mask = 0;
@@ -33,9 +32,9 @@ static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 		mask = sbi_load_ulong(pmask, uptrap);
 		if (uptrap->cause)
 			return false;
+		*hbase = 0;
 	} else {
-		sbi_hsm_hart_interruptible_mask(sbi_domain_thishart_ptr(),
-						0, &mask);
+		*hbase = -1UL;
 	}
 	*hmask = mask;
 
@@ -50,7 +49,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
 	struct sbi_trap_info trap = {0};
-	ulong hmask = 0;
+	ulong hmask, hbase;
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
@@ -71,8 +70,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap)) {
-			ret = sbi_ipi_send_smode(hmask, 0);
+					      &hmask, &hbase, &trap)) {
+			ret = sbi_ipi_send_smode(hmask, hbase);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -80,10 +79,10 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap)) {
+					      &hmask, &hbase, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 					  SBI_TLB_FENCE_I, source_hart);
-			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -91,10 +90,10 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap)) {
+					      &hmask, &hbase, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
 					  SBI_TLB_SFENCE_VMA, source_hart);
-			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -102,12 +101,12 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-						&hmask, &trap)) {
+					      &hmask, &hbase, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
 					  SBI_TLB_SFENCE_VMA_ASID,
 					  source_hart);
-			ret = sbi_tlb_request(hmask, 0, &tlb_info);
+			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;

From 97b8038916d6e9c1e2cbed80926e297a4d9d7d98 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:11 -0700
Subject: [PATCH 1674/1765] lib: sbi: Simplify halt broadcast logic

Use the IPI .update callback to exclude the local hart. This allows
reusing the normal logic for broadcasting an IPI to all active harts.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ipi.c    | 10 ++++++++++
 lib/sbi/sbi_system.c | 11 +----------
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 505aafd8ccd..0cffa0af5f3 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -208,6 +208,15 @@ void sbi_ipi_clear_smode(void)
 	csr_clear(CSR_MIP, MIP_SSIP);
 }
 
+static int sbi_ipi_update_halt(struct sbi_scratch *scratch,
+			       struct sbi_scratch *remote_scratch,
+			       u32 remote_hartindex, void *data)
+{
+	/* Never send a halt IPI to the local hart. */
+	return scratch == remote_scratch ?
+		SBI_IPI_UPDATE_BREAK : SBI_IPI_UPDATE_SUCCESS;
+}
+
 static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
 {
 	sbi_hsm_hart_stop(scratch, true);
@@ -215,6 +224,7 @@ static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
 
 static struct sbi_ipi_event_ops ipi_halt_ops = {
 	.name = "IPI_HALT",
+	.update = sbi_ipi_update_halt,
 	.process = sbi_ipi_process_halt,
 };
 
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index c068b725128..f3c49bbdfb3 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -65,20 +65,11 @@ bool sbi_system_reset_supported(u32 reset_type, u32 reset_reason)
 
 void __noreturn sbi_system_reset(u32 reset_type, u32 reset_reason)
 {
-	ulong hbase = 0, hmask;
-	u32 cur_hartid = current_hartid();
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Send HALT IPI to every hart other than the current hart */
-	while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &hmask)) {
-		if ((hbase <= cur_hartid)
-			  && (cur_hartid < hbase + BITS_PER_LONG))
-			hmask &= ~(1UL << (cur_hartid - hbase));
-		if (hmask)
-			sbi_ipi_send_halt(hmask, hbase);
-		hbase += BITS_PER_LONG;
-	}
+	sbi_ipi_send_halt(0, -1UL);
 
 	/* Stop current HART */
 	sbi_hsm_hart_stop(scratch, false);

From ebe0f31446c577a15bd0a72689d6a93f6e355623 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:12 -0700
Subject: [PATCH 1675/1765] lib: sbi: Update __sbi_hsm_hart_get_state() to take
 a hart index

This removes some hartindex conversions in sbi_system_suspend(), but is
mostly intended to support refactoring sbi_hsm_hart_interruptible_mask()
to work exclusively with struct sbi_hartmask.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h |  2 +-
 lib/sbi/sbi_hsm.c     | 12 ++++++++----
 lib/sbi/sbi_system.c  |  9 ++++-----
 3 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index 4b5601ba40c..d8ca459d3e3 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -72,7 +72,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 			 ulong raddr, ulong rmode, ulong arg1);
 bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
 			       long newstate);
-int __sbi_hsm_hart_get_state(u32 hartid);
+int __sbi_hsm_hart_get_state(u32 hartindex);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 				    ulong hbase, ulong *out_hmask);
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index ab11b119e09..5af3c4afad6 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -60,12 +60,12 @@ bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
 	return __sbi_hsm_hart_change_state(hdata, oldstate, newstate);
 }
 
-int __sbi_hsm_hart_get_state(u32 hartid)
+int __sbi_hsm_hart_get_state(u32 hartindex)
 {
 	struct sbi_hsm_data *hdata;
 	struct sbi_scratch *scratch;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return SBI_EINVAL;
 
@@ -75,10 +75,12 @@ int __sbi_hsm_hart_get_state(u32 hartid)
 
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 {
+	u32 hartindex = sbi_hartid_to_hartindex(hartid);
+
 	if (!sbi_domain_is_assigned_hart(dom, hartid))
 		return SBI_EINVAL;
 
-	return __sbi_hsm_hart_get_state(hartid);
+	return __sbi_hsm_hart_get_state(hartindex);
 }
 
 /*
@@ -120,6 +122,7 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 {
 	int hstate;
 	ulong i, hmask, dmask;
+	u32 hartindex;
 
 	*out_hmask = 0;
 	if (!sbi_hartid_valid(hbase))
@@ -131,7 +134,8 @@ int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
 		if (!(dmask & hmask))
 			continue;
 
-		hstate = __sbi_hsm_hart_get_state(hbase + i);
+		hartindex = sbi_hartid_to_hartindex(hbase + i);
+		hstate = __sbi_hsm_hart_get_state(hartindex);
 		if (hstate == SBI_HSM_STATE_STARTED ||
 		    hstate == SBI_HSM_STATE_SUSPENDED ||
 		    hstate == SBI_HSM_STATE_RESUME_PENDING)
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index f3c49bbdfb3..8e624fdda3f 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -142,9 +142,9 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	void (*jump_warmboot)(void) = (void (*)(void))scratch->warmboot_addr;
-	unsigned int hartid = current_hartid();
+	unsigned int hartindex = current_hartindex();
 	unsigned long prev_mode;
-	unsigned long i, j;
+	unsigned long i;
 	int ret;
 
 	if (!dom || !dom->system_suspend_allowed)
@@ -163,9 +163,8 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 		return SBI_EFAIL;
 
 	spin_lock(&dom->assigned_harts_lock);
-	sbi_hartmask_for_each_hartindex(j, &dom->assigned_harts) {
-		i = sbi_hartindex_to_hartid(j);
-		if (i == hartid)
+	sbi_hartmask_for_each_hartindex(i, &dom->assigned_harts) {
+		if (i == hartindex)
 			continue;
 		if (__sbi_hsm_hart_get_state(i) != SBI_HSM_STATE_STOPPED) {
 			spin_unlock(&dom->assigned_harts_lock);

From fe153c55164a9a9bc297717185db392342e4d9e6 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:13 -0700
Subject: [PATCH 1676/1765] lib: sbi: Use sbi_hartmask in
 sbi_hsm_hart_interruptible_mask()

This removes several hartid/hartindex conversions, as well as two loops
through the mask for broadcast IPIs.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h   | 11 +++++------
 include/sbi/sbi_hartmask.h | 12 ++++++++++++
 include/sbi/sbi_hsm.h      |  3 ++-
 lib/sbi/sbi_domain.c       | 13 ++++++-------
 lib/sbi/sbi_hsm.c          | 37 ++++++++++++++-----------------------
 lib/sbi/sbi_ipi.c          | 32 +++++++++++++-------------------
 6 files changed, 52 insertions(+), 56 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index c1a1717f587..731c30591e2 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -226,14 +226,13 @@ extern struct sbi_dlist domain_list;
 bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
 
 /**
- * Get ulong assigned HART mask for given domain and HART base ID
+ * Get the assigned HART mask for given domain
  * @param dom pointer to domain
- * @param hbase the HART base ID
- * @return ulong possible HART mask
- * Note: the return ulong mask will be set to zero on failure.
+ * @param mask the output hartmask to fill
+ * @return 0 on success and SBI_Exxx (< 0) on failure
  */
-ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
-				       ulong hbase);
+int sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				     struct sbi_hartmask *mask);
 
 /**
  * Initialize a domain memory region based on it's physical
diff --git a/include/sbi/sbi_hartmask.h b/include/sbi/sbi_hartmask.h
index bcfa50db12e..07a8c076bd0 100644
--- a/include/sbi/sbi_hartmask.h
+++ b/include/sbi/sbi_hartmask.h
@@ -127,6 +127,18 @@ static inline void sbi_hartmask_clear_all(struct sbi_hartmask *dstp)
 	bitmap_zero(sbi_hartmask_bits(dstp), SBI_HARTMASK_MAX_BITS);
 }
 
+/**
+ * *dstp = *srcp
+ * @param dstp the hartmask destination
+ * @param srcp the hartmask source
+ */
+static inline void sbi_hartmask_copy(struct sbi_hartmask *dstp,
+				     const struct sbi_hartmask *srcp)
+{
+	bitmap_copy(sbi_hartmask_bits(dstp), sbi_hartmask_bits(srcp),
+		    SBI_HARTMASK_MAX_BITS);
+}
+
 /**
  * *dstp = *src1p & *src2p
  * @param dstp the hartmask result
diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index d8ca459d3e3..e4b92c80229 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -10,6 +10,7 @@
 #ifndef __SBI_HSM_H__
 #define __SBI_HSM_H__
 
+#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_types.h>
 
 /** Hart state managment device */
@@ -75,7 +76,7 @@ bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
 int __sbi_hsm_hart_get_state(u32 hartindex);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
-				    ulong hbase, ulong *out_hmask);
+				    struct sbi_hartmask *mask);
 void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch);
 void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
 					  u32 hartid);
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 7198e27e9a8..a4a189c9fc3 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -75,20 +75,19 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 	return ret;
 }
 
-ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
-				       ulong hbase)
+int sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				     struct sbi_hartmask *mask)
 {
 	ulong ret = 0;
 	struct sbi_domain *tdom = (struct sbi_domain *)dom;
 
-	if (!dom)
+	if (!dom) {
+		sbi_hartmask_clear_all(mask);
 		return 0;
+	}
 
 	spin_lock(&tdom->assigned_harts_lock);
-	for (int i = 0; i < 8 * sizeof(ret); i++) {
-		if (sbi_hartmask_test_hartid(hbase + i, &tdom->assigned_harts))
-			ret |= 1UL << i;
-	}
+	sbi_hartmask_copy(mask, &tdom->assigned_harts);
 	spin_unlock(&tdom->assigned_harts_lock);
 
 	return ret;
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 5af3c4afad6..e25dd161df2 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -110,36 +110,27 @@ static void hsm_start_ticket_release(struct sbi_hsm_data *hdata)
 }
 
 /**
- * Get ulong HART mask for given HART base ID
+ * Get the mask of harts which are valid IPI targets
  * @param dom the domain to be used for output HART mask
- * @param hbase the HART base ID
- * @param out_hmask the output ulong HART mask
+ * @param mask the output hartmask to fill
  * @return 0 on success and SBI_Exxx (< 0) on failure
- * Note: the output HART mask will be set to zero on failure as well.
  */
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
-				    ulong hbase, ulong *out_hmask)
+				    struct sbi_hartmask *mask)
 {
-	int hstate;
-	ulong i, hmask, dmask;
-	u32 hartindex;
+	int hstate, ret;
+	u32 i;
 
-	*out_hmask = 0;
-	if (!sbi_hartid_valid(hbase))
-		return SBI_EINVAL;
+	ret = sbi_domain_get_assigned_hartmask(dom, mask);
+	if (ret)
+		return ret;
 
-	dmask = sbi_domain_get_assigned_hartmask(dom, hbase);
-	for (i = 0; i < BITS_PER_LONG; i++) {
-		hmask = 1UL << i;
-		if (!(dmask & hmask))
-			continue;
-
-		hartindex = sbi_hartid_to_hartindex(hbase + i);
-		hstate = __sbi_hsm_hart_get_state(hartindex);
-		if (hstate == SBI_HSM_STATE_STARTED ||
-		    hstate == SBI_HSM_STATE_SUSPENDED ||
-		    hstate == SBI_HSM_STATE_RESUME_PENDING)
-			*out_hmask |= hmask;
+	sbi_hartmask_for_each_hartindex(i, mask) {
+		hstate = __sbi_hsm_hart_get_state(i);
+		if (hstate != SBI_HSM_STATE_STARTED &&
+		    hstate != SBI_HSM_STATE_SUSPENDED &&
+		    hstate != SBI_HSM_STATE_RESUME_PENDING)
+			sbi_hartmask_clear_hartindex(i, mask);
 	}
 
 	return 0;
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 0cffa0af5f3..337ed175e3a 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -111,31 +111,25 @@ int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
 {
 	int rc = 0;
 	bool retry_needed;
-	ulong i, m;
-	struct sbi_hartmask target_mask = {0};
+	ulong i;
+	struct sbi_hartmask target_mask;
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
 	/* Find the target harts */
+	rc = sbi_hsm_hart_interruptible_mask(dom, &target_mask);
+	if (rc)
+		return rc;
+
 	if (hbase != -1UL) {
-		rc = sbi_hsm_hart_interruptible_mask(dom, hbase, &m);
-		if (rc)
-			return rc;
-		m &= hmask;
-
-		for (i = hbase; m; i++, m >>= 1) {
-			if (m & 1UL)
-				sbi_hartmask_set_hartid(i, &target_mask);
-		}
-	} else {
-		hbase = 0;
-		while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
-			for (i = hbase; m; i++, m >>= 1) {
-				if (m & 1UL)
-					sbi_hartmask_set_hartid(i, &target_mask);
-			}
-			hbase += BITS_PER_LONG;
+		struct sbi_hartmask tmp_mask = { 0 };
+
+		for (i = hbase; hmask; i++, hmask >>= 1) {
+			if (hmask & 1UL)
+				sbi_hartmask_set_hartid(i, &tmp_mask);
 		}
+
+		sbi_hartmask_and(&target_mask, &target_mask, &tmp_mask);
 	}
 
 	/* Send IPIs */

From 9f86524b589531ecacd818ed2c6ea725eee3c89b Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:14 -0700
Subject: [PATCH 1677/1765] lib: sbi: Update sbi_domain_is_assigned_hart() to
 take a hart index

This removes redundant hartid to hartindex conversions from four call
sites and provides a net reduction in code size.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_domain.h  | 4 ++--
 lib/sbi/sbi_dbtr.c        | 3 +--
 lib/sbi/sbi_domain.c      | 6 +++---
 lib/sbi/sbi_hsm.c         | 9 +++++----
 lib/sbi/sbi_sse.c         | 5 +++--
 lib/utils/fdt/fdt_fixup.c | 5 +++--
 6 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index 731c30591e2..d92f309a045 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -220,10 +220,10 @@ extern struct sbi_dlist domain_list;
 /**
  * Check whether given HART is assigned to specified domain
  * @param dom pointer to domain
- * @param hartid the HART ID
+ * @param hartindex the HART index
  * @return true if HART is assigned to domain otherwise false
  */
-bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartindex);
 
 /**
  * Get the assigned HART mask for given domain
diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c
index 5ca29c70bf9..f0e91285dca 100644
--- a/lib/sbi/sbi_dbtr.c
+++ b/lib/sbi/sbi_dbtr.c
@@ -243,10 +243,9 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 			 unsigned long shmem_phys_lo,
 			 unsigned long shmem_phys_hi)
 {
-	u32 hartid = current_hartid();
 	struct sbi_dbtr_hart_triggers_state *hart_state;
 
-	if (dom && !sbi_domain_is_assigned_hart(dom, hartid)) {
+	if (dom && !sbi_domain_is_assigned_hart(dom, current_hartindex())) {
 		sbi_dprintf("%s: calling hart not assigned to this domain\n",
 			   __func__);
 		return SBI_ERR_DENIED;
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index a4a189c9fc3..feb239219df 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -60,7 +60,7 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
 	sbi_scratch_write_type(scratch, void *, domain_hart_ptr_offset, dom);
 }
 
-bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartindex)
 {
 	bool ret;
 	struct sbi_domain *tdom = (struct sbi_domain *)dom;
@@ -69,7 +69,7 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 		return false;
 
 	spin_lock(&tdom->assigned_harts_lock);
-	ret = sbi_hartmask_test_hartid(hartid, &tdom->assigned_harts);
+	ret = sbi_hartmask_test_hartindex(hartindex, &tdom->assigned_harts);
 	spin_unlock(&tdom->assigned_harts_lock);
 
 	return ret;
@@ -446,7 +446,7 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 	sbi_hartmask_for_each_hartindex(i, dom->possible_harts) {
 		j = sbi_hartindex_to_hartid(i);
 		sbi_printf("%s%d%s", (k++) ? "," : "",
-			   j, sbi_domain_is_assigned_hart(dom, j) ? "*" : "");
+			   j, sbi_domain_is_assigned_hart(dom, i) ? "*" : "");
 	}
 	sbi_printf("\n");
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index e25dd161df2..e7e31ad533d 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -77,7 +77,7 @@ int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid)
 {
 	u32 hartindex = sbi_hartid_to_hartindex(hartid);
 
-	if (!sbi_domain_is_assigned_hart(dom, hartid))
+	if (!sbi_domain_is_assigned_hart(dom, hartindex))
 		return SBI_EINVAL;
 
 	return __sbi_hsm_hart_get_state(hartindex);
@@ -300,6 +300,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 		       const struct sbi_domain *dom,
 		       u32 hartid, ulong saddr, ulong smode, ulong arg1)
 {
+	u32 hartindex = sbi_hartid_to_hartindex(hartid);
 	unsigned long init_count, entry_count;
 	unsigned int hstate;
 	struct sbi_scratch *rscratch;
@@ -309,13 +310,13 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	/* For now, we only allow start mode to be S-mode or U-mode. */
 	if (smode != PRV_S && smode != PRV_U)
 		return SBI_EINVAL;
-	if (dom && !sbi_domain_is_assigned_hart(dom, hartid))
+	if (dom && !sbi_domain_is_assigned_hart(dom, hartindex))
 		return SBI_EINVAL;
 	if (dom && !sbi_domain_check_addr(dom, saddr, smode,
 					  SBI_DOMAIN_EXECUTE))
 		return SBI_EINVALID_ADDR;
 
-	rscratch = sbi_hartid_to_scratch(hartid);
+	rscratch = sbi_hartindex_to_scratch(hartindex);
 	if (!rscratch)
 		return SBI_EINVAL;
 
@@ -355,7 +356,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
 		rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
-		rc = sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
+		rc = sbi_ipi_raw_send(hartindex);
 	}
 
 	if (!rc)
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 365a878f6e2..ab03b9c753b 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -323,7 +323,7 @@ static int sse_event_set_hart_id_check(struct sbi_sse_event *e,
 	if (!sse_event_is_global(e))
 		return SBI_EBAD_RANGE;
 
-	if (!sbi_domain_is_assigned_hart(hd, new_hartid))
+	if (!sbi_domain_is_assigned_hart(hd, sbi_hartid_to_hartindex(hartid)))
 		return SBI_EINVAL;
 
 	hstate = sbi_hsm_hart_get_state(hd, hartid);
@@ -810,7 +810,8 @@ int sbi_sse_disable(uint32_t event_id)
 int sbi_sse_inject_from_ecall(uint32_t event_id, unsigned long hartid,
 			      struct sbi_ecall_return *out)
 {
-	if (!sbi_domain_is_assigned_hart(sbi_domain_thishart_ptr(), hartid))
+	if (!sbi_domain_is_assigned_hart(sbi_domain_thishart_ptr(),
+					 sbi_hartid_to_hartindex(hartid)))
 		return SBI_EINVAL;
 
 	return sse_inject_event(event_id, hartid);
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 974b1b883eb..9e013dfaafa 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -110,7 +110,7 @@ void fdt_cpu_fixup(void *fdt)
 	struct sbi_domain *dom = sbi_domain_thishart_ptr();
 	int err, cpu_offset, cpus_offset, len;
 	const char *mmu_type;
-	u32 hartid;
+	u32 hartid, hartindex;
 
 	err = fdt_open_into(fdt, fdt, fdt_totalsize(fdt) + 32);
 	if (err < 0)
@@ -134,8 +134,9 @@ void fdt_cpu_fixup(void *fdt)
 		 * 2. MMU is not available for the HART
 		 */
 
+		hartindex = sbi_hartid_to_hartindex(hartid);
 		mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
-		if (!sbi_domain_is_assigned_hart(dom, hartid) ||
+		if (!sbi_domain_is_assigned_hart(dom, hartindex) ||
 		    !mmu_type || !len)
 			fdt_setprop_string(fdt, cpu_offset, "status",
 					   "disabled");

From 3962be84d4e3997beaf739475d9d504d274517d8 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:15 -0700
Subject: [PATCH 1678/1765] lib: sbi: Update sbi_{entry,init}_count() to take a
 hart index

All callers already have the hartindex available, so this removes a
hartid to hartindex conversion.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_init.h         | 4 ++--
 lib/sbi/sbi_hsm.c              | 4 ++--
 lib/sbi/sbi_init.c             | 8 ++++----
 platform/generic/andes/ae350.c | 6 ++++--
 4 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_init.h b/include/sbi/sbi_init.h
index 9640fee9143..c9013ea4081 100644
--- a/include/sbi/sbi_init.h
+++ b/include/sbi/sbi_init.h
@@ -16,9 +16,9 @@ struct sbi_scratch;
 
 void __noreturn sbi_init(struct sbi_scratch *scratch);
 
-unsigned long sbi_entry_count(u32 hartid);
+unsigned long sbi_entry_count(u32 hartindex);
 
-unsigned long sbi_init_count(u32 hartid);
+unsigned long sbi_init_count(u32 hartindex);
 
 void __noreturn sbi_exit(struct sbi_scratch *scratch);
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index e7e31ad533d..5679819c017 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -324,8 +324,8 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	if (!hsm_start_ticket_acquire(hdata))
 		return SBI_EINVAL;
 
-	init_count = sbi_init_count(hartid);
-	entry_count = sbi_entry_count(hartid);
+	init_count = sbi_init_count(hartindex);
+	entry_count = sbi_entry_count(hartindex);
 
 	rscratch->next_arg1 = arg1;
 	rscratch->next_addr = saddr;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 7443010e0ab..18d33088072 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -551,7 +551,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch)
 		init_warmboot(scratch, hartid);
 }
 
-unsigned long sbi_entry_count(u32 hartid)
+unsigned long sbi_entry_count(u32 hartindex)
 {
 	struct sbi_scratch *scratch;
 	unsigned long *entry_count;
@@ -559,7 +559,7 @@ unsigned long sbi_entry_count(u32 hartid)
 	if (!entry_count_offset)
 		return 0;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return 0;
 
@@ -568,7 +568,7 @@ unsigned long sbi_entry_count(u32 hartid)
 	return *entry_count;
 }
 
-unsigned long sbi_init_count(u32 hartid)
+unsigned long sbi_init_count(u32 hartindex)
 {
 	struct sbi_scratch *scratch;
 	unsigned long *init_count;
@@ -576,7 +576,7 @@ unsigned long sbi_init_count(u32 hartid)
 	if (!init_count_offset)
 		return 0;
 
-	scratch = sbi_hartid_to_scratch(hartid);
+	scratch = sbi_hartindex_to_scratch(hartindex);
 	if (!scratch)
 		return 0;
 
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index 3ad6c856268..0da3ae5160e 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -27,13 +27,15 @@ extern void __ae350_disable_coherency(void);
 
 static int ae350_hart_start(u32 hartid, ulong saddr)
 {
+	u32 hartindex = sbi_hartid_to_hartindex(hartid);
+
 	/*
 	 * Don't send wakeup command when:
 	 * 1) boot-time
 	 * 2) the target hart is non-sleepable 25-series hart0
 	 */
-	if (!sbi_init_count(hartid) || (is_andes(25) && hartid == 0))
-		return sbi_ipi_raw_send(sbi_hartid_to_hartindex(hartid));
+	if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0))
+		return sbi_ipi_raw_send(hartindex);
 
 	/* Write wakeup command to the sleep hart */
 	smu_set_command(&smu, WAKEUP_CMD, hartid);

From 91550249726ddd0d90116977abbe71b0390a9a89 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 08:49:16 -0700
Subject: [PATCH 1679/1765] lib: sbi: Remove unused hartid parameters

None of these functions use their hartid parameter.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_hsm.h |  2 +-
 lib/sbi/sbi_hsm.c     |  6 +++---
 lib/sbi/sbi_init.c    | 12 ++++++------
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index e4b92c80229..ae098f453f4 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -59,7 +59,7 @@ const struct sbi_hsm_device *sbi_hsm_get_device(void);
 
 void sbi_hsm_set_device(const struct sbi_hsm_device *dev);
 
-int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
+int sbi_hsm_init(struct sbi_scratch *scratch, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch,
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 5679819c017..58a33798831 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -157,7 +157,7 @@ void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
 	sbi_hart_switch_mode(hartid, next_arg1, next_addr, next_mode, false);
 }
 
-static void sbi_hsm_hart_wait(struct sbi_scratch *scratch, u32 hartid)
+static void sbi_hsm_hart_wait(struct sbi_scratch *scratch)
 {
 	unsigned long saved_mie;
 	struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch,
@@ -236,7 +236,7 @@ static void hsm_device_hart_resume(void)
 		hsm_dev->hart_resume();
 }
 
-int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
+int sbi_hsm_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	u32 i;
 	struct sbi_scratch *rscratch;
@@ -262,7 +262,7 @@ int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
 			ATOMIC_INIT(&hdata->start_ticket, 0);
 		}
 	} else {
-		sbi_hsm_hart_wait(scratch, hartid);
+		sbi_hsm_hart_wait(scratch);
 	}
 
 	return 0;
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 18d33088072..cccd723d4f8 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -193,14 +193,14 @@ static void sbi_boot_print_hart(struct sbi_scratch *scratch, u32 hartid)
 
 static unsigned long coldboot_done;
 
-static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
+static void wait_for_coldboot(struct sbi_scratch *scratch)
 {
 	/* Wait for coldboot to finish */
 	while (!__smp_load_acquire(&coldboot_done))
 		cpu_relax();
 }
 
-static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
+static void wake_coldboot_harts(struct sbi_scratch *scratch)
 {
 	/* Mark coldboot done */
 	__smp_store_release(&coldboot_done, 1);
@@ -241,7 +241,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	count = sbi_scratch_offset_ptr(scratch, entry_count_offset);
 	(*count)++;
 
-	rc = sbi_hsm_init(scratch, hartid, true);
+	rc = sbi_hsm_init(scratch, true);
 	if (rc)
 		sbi_hart_hang();
 
@@ -251,7 +251,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 	 * have these HARTs busy spin in wait_for_coldboot() until coldboot
 	 * path is completed.
 	 */
-	wake_coldboot_harts(scratch, hartid);
+	wake_coldboot_harts(scratch);
 
 	rc = sbi_platform_early_init(plat, true);
 	if (rc)
@@ -386,7 +386,7 @@ static void __noreturn init_warm_startup(struct sbi_scratch *scratch,
 	(*count)++;
 
 	/* Note: This has to be first thing in warmboot init sequence */
-	rc = sbi_hsm_init(scratch, hartid, false);
+	rc = sbi_hsm_init(scratch, false);
 	if (rc)
 		sbi_hart_hang();
 
@@ -470,7 +470,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 {
 	int hstate;
 
-	wait_for_coldboot(scratch, hartid);
+	wait_for_coldboot(scratch);
 
 	hstate = sbi_hsm_hart_get_state(sbi_domain_thishart_ptr(), hartid);
 	if (hstate < 0)

From cae230c93556517c50ba8541303d022f28e8e4ff Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 30 Aug 2024 19:27:43 -0700
Subject: [PATCH 1680/1765] lib: utils/ipi: Fix hartid wrongly used as hart
 index

Since commit 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in
IPI framework"), The .ipi_clear callback functions take a hart index,
not a hartid. However, these warm_init functions were never updated.

Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/ipi/aclint_mswi.c  | 2 +-
 lib/utils/ipi/andes_plicsw.c | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 4ae6bb1c322..c8ebb7ace3e 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -74,7 +74,7 @@ static struct sbi_ipi_device aclint_mswi = {
 int aclint_mswi_warm_init(void)
 {
 	/* Clear IPI for current HART */
-	mswi_ipi_clear(current_hartid());
+	mswi_ipi_clear(current_hartindex());
 
 	return 0;
 }
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index 413ac20e491..18c79e2b075 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -67,10 +67,8 @@ static struct sbi_ipi_device plicsw_ipi = {
 
 int plicsw_warm_ipi_init(void)
 {
-	u32 hartid = current_hartid();
-
 	/* Clear PLICSW IPI */
-	plicsw_ipi_clear(hartid);
+	plicsw_ipi_clear(current_hartindex());
 
 	return 0;
 }

From bfa9f9aee7bb905f3996d1e4877fe61405fbc271 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Sun, 1 Sep 2024 09:36:58 -0700
Subject: [PATCH 1681/1765] Makefile: Make .carray.c files depend on carray.sh

Force carray C source files to be regenerated when the script changes,
since their contents depend on the script's output.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index e5a0f19ea92..f0012f6daec 100644
--- a/Makefile
+++ b/Makefile
@@ -528,7 +528,7 @@ $(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(build_dir)/%.carray.c: $(src_dir)/%.carray
+$(build_dir)/%.carray.c: $(src_dir)/%.carray $(src_dir)/scripts/carray.sh
 	$(call compile_carray,$@,$<)
 
 $(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -556,7 +556,7 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.carray.c: $(platform_src_dir)/%.carray
+$(platform_build_dir)/%.carray.c: $(platform_src_dir)/%.carray $(src_dir)/scripts/carray.sh
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -599,7 +599,7 @@ $(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.carray.c: $(src_dir)/%.carray
+$(platform_build_dir)/%.carray.c: $(src_dir)/%.carray $(src_dir)/scripts/carray.sh
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)

From 7b3de48cd583dbd8c0b9efa65f417c4e5d5a6b79 Mon Sep 17 00:00:00 2001
From: Elyes Haouas <ehaouas@noos.fr>
Date: Sun, 15 Sep 2024 21:34:26 +0530
Subject: [PATCH 1682/1765] include: sbi: Don't unconditionally define
 '__always_inline'

Update __always_inline macro define to fix opensbi upstream
build for coreboot.
Refer, https://qa.coreboot.org/job/coreboot-gerrit/257449/testReport/junit/(root)/clang/EMULATION_QEMU_RISCV_RV64_/

Closes: https://github.com/riscv-software-src/opensbi/issues/366
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_types.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/sbi/sbi_types.h b/include/sbi/sbi_types.h
index def88bbad2c..a9943d299cd 100644
--- a/include/sbi/sbi_types.h
+++ b/include/sbi/sbi_types.h
@@ -69,7 +69,10 @@ typedef uint64_t		be64_t;
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 #define __aligned(x)		__attribute__((aligned(x)))
+
+#ifndef __always_inline
 #define __always_inline	inline __attribute__((always_inline))
+#endif
 
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)

From 3e141a6950a276632439b202b220e49f3ae6969b Mon Sep 17 00:00:00 2001
From: "dong.yang" <dong.yang@sophgo.com>
Date: Fri, 13 Sep 2024 12:36:39 +0800
Subject: [PATCH 1683/1765] firmware: fw_base.S: fix multi-core boot bug.

In a multi-core startup scenario, if both _try_lottery and
_wait_for_boot_hart use the data in the _boot_status address, when
a CPU enters OpenSBI later than boot hart set the _boot_status to
BOOT_STATUS_BOOT_HART_DONE, the CPU will modify _boot_status to 1
by amoswap.w and will never be awakened in _wait_for_boot_hart.
So let _try_lottery and _boot_status use data from two addresses.

Fixes: 8151105af5e4 ("firmware: fw_base.S: Remove _relocate_lottery")
Signed-off-by: dong.yang <dong.yang@sophgo.com>
Reviewed-by: Xing Xiaoguang <xiaoguang.xing@sophgo.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 firmware/fw_base.S | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 41ae46f21f1..4a2652e9ba4 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -14,8 +14,8 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
 
-#define BOOT_STATUS_LOTTERY_DONE	1
-#define BOOT_STATUS_BOOT_HART_DONE	2
+#define BOOT_LOTTERY_ACQUIRED		1
+#define BOOT_STATUS_BOOT_HART_DONE	1
 
 .macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
 	add	\__d0, \__s0, zero
@@ -47,8 +47,8 @@ _start:
 	bne	a0, a6, _wait_for_boot_hart
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
-	lla	a6, _boot_status
-	li	a7, BOOT_STATUS_LOTTERY_DONE
+	lla	a6, _boot_lottery
+	li	a7, BOOT_LOTTERY_ACQUIRED
 	amoswap.w a6, a7, (a6)
 	bnez	a6, _wait_for_boot_hart
 
@@ -357,6 +357,8 @@ _skip_trap_handler_hyp:
 
 	.data
 	.align 3
+_boot_lottery:
+	RISCV_PTR	0
 _boot_status:
 	RISCV_PTR	0
 

From 2ffa0a153d804910c20b82974bfe2dedcf35a777 Mon Sep 17 00:00:00 2001
From: Xiang W <wxjstz@126.com>
Date: Mon, 23 Sep 2024 09:37:53 +0800
Subject: [PATCH 1684/1765] lib: sbi: fix missing high 32bits when
 sbi_cppc_write on rv32

sbi_cppc_write was writing to the a1 register only, which under rv32
would cause the high 32 bits to always be 0. This patch fixes that.

Closes: https://github.com/riscv-software-src/opensbi/issues/334

Signed-off-by: Xiang W <wxjstz@126.com>
Reported-by: Wesley Norris <repnop@outlook.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall_cppc.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index c26bb401796..dab78299add 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -32,7 +32,13 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
 #endif
 		break;
 	case SBI_EXT_CPPC_WRITE:
-		ret = sbi_cppc_write(regs->a0, regs->a1);
+#if __riscv_xlen == 32
+		temp = regs->a2;
+		temp = (temp << 32) | regs->a1;
+#else
+		temp = regs->a1;
+#endif
+		ret = sbi_cppc_write(regs->a0, temp);
 		break;
 	case SBI_EXT_CPPC_PROBE:
 		ret = sbi_cppc_probe(regs->a0);

From 8576ca423403cdff66424d8f360542aafe71c901 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 20 Sep 2024 10:14:46 +0530
Subject: [PATCH 1685/1765] lib: utils/ipi: Use sbi_domain_root_add_memrange()
 for ACLINT mswi

The sbi_domain_root_add_memrange() should be preferred for creating
multiple memregions over a range. Update ACLINT mswi driver to use
sbi_domain_root_add_memrange() instead of explicitly registering
memregions.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/utils/ipi/aclint_mswi.c | 20 ++++++--------------
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index c8ebb7ace3e..0ef3d0038d4 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -84,8 +84,6 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 	u32 i;
 	int rc;
 	struct sbi_scratch *scratch;
-	unsigned long pos, region_size;
-	struct sbi_domain_memregion reg;
 
 	/* Sanity checks */
 	if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
@@ -114,18 +112,12 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 	}
 
 	/* Add MSWI regions to the root domain */
-	for (pos = 0; pos < mswi->size; pos += ACLINT_MSWI_ALIGN) {
-		region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ?
-			      (mswi->size - pos) : ACLINT_MSWI_ALIGN;
-		sbi_domain_memregion_init(mswi->addr + pos, region_size,
-					  (SBI_DOMAIN_MEMREGION_MMIO |
-					   SBI_DOMAIN_MEMREGION_M_READABLE |
-					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
-					  &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
-		if (rc)
-			return rc;
-	}
+	rc = sbi_domain_root_add_memrange(mswi->addr, mswi->size, ACLINT_MSWI_ALIGN,
+					  SBI_DOMAIN_MEMREGION_MMIO |
+					  SBI_DOMAIN_MEMREGION_M_READABLE |
+					  SBI_DOMAIN_MEMREGION_M_WRITABLE);
+	if (rc)
+		return rc;
 
 	sbi_ipi_set_device(&aclint_mswi);
 

From abc68e881da1f4168c698d35643e139ea51ac2e9 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 20 Sep 2024 14:15:55 +0530
Subject: [PATCH 1686/1765] lib: utils/irqchip: Use
 sbi_domain_root_add_memrange() for IMSIC

The sbi_domain_root_add_memrange() should be preferred for creating
multiple memregions over a range. Update IMSIC driver to use
sbi_domain_root_add_memrange() instead of explicitly registering
memregions.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/utils/irqchip/imsic.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index ee532bb462f..ae8b31e0bf0 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -348,7 +348,6 @@ int imsic_data_check(struct imsic_data *imsic)
 int imsic_cold_irqchip_init(struct imsic_data *imsic)
 {
 	int i, rc;
-	struct sbi_domain_memregion reg;
 
 	/* Sanity checks */
 	rc = imsic_data_check(imsic);
@@ -378,13 +377,12 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 
 	/* Add IMSIC regions to the root domain */
 	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
-		sbi_domain_memregion_init(imsic->regs[i].addr,
-					  imsic->regs[i].size,
-					  (SBI_DOMAIN_MEMREGION_MMIO |
-					   SBI_DOMAIN_MEMREGION_M_READABLE |
-					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
-					  &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
+		rc = sbi_domain_root_add_memrange(imsic->regs[i].addr,
+						  imsic->regs[i].size,
+						  IMSIC_MMIO_PAGE_SZ,
+						  SBI_DOMAIN_MEMREGION_MMIO |
+						  SBI_DOMAIN_MEMREGION_M_READABLE |
+						  SBI_DOMAIN_MEMREGION_M_WRITABLE);
 		if (rc)
 			return rc;
 	}

From dc5d747af809c562ab63994e0f06091b9ea25141 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 20 Sep 2024 14:28:43 +0530
Subject: [PATCH 1687/1765] lib: utils/irqchip: Use
 sbi_domain_root_add_memrange() for APLIC

The sbi_domain_root_add_memrange() should be preferred for creating
multiple memregions over a range. Update APLIC driver to use
sbi_domain_root_add_memrange() instead of explicitly registering
memregions.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/utils/irqchip/aplic.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
index 10236e7ad16..28f2f26d76c 100644
--- a/lib/utils/irqchip/aplic.c
+++ b/lib/utils/irqchip/aplic.c
@@ -169,7 +169,6 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
 {
 	int rc;
 	u32 i, j, tmp;
-	struct sbi_domain_memregion reg;
 	struct aplic_delegate_data *deleg;
 	u32 first_deleg_irq, last_deleg_irq;
 
@@ -268,12 +267,10 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
 	    ((first_deleg_irq < last_deleg_irq) &&
 	    (last_deleg_irq == aplic->num_source) &&
 	    (first_deleg_irq == 1))) {
-		sbi_domain_memregion_init(aplic->addr, aplic->size,
-					  (SBI_DOMAIN_MEMREGION_MMIO |
-					   SBI_DOMAIN_MEMREGION_M_READABLE |
-					   SBI_DOMAIN_MEMREGION_M_WRITABLE),
-					  &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
+		rc = sbi_domain_root_add_memrange(aplic->addr, aplic->size, PAGE_SIZE,
+						  SBI_DOMAIN_MEMREGION_MMIO |
+						  SBI_DOMAIN_MEMREGION_M_READABLE |
+						  SBI_DOMAIN_MEMREGION_M_WRITABLE);
 		if (rc)
 			return rc;
 	}

From 36c1e4064ff234563e9b0f7ee1e59db2ca1f96e7 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 20 Sep 2024 16:18:47 +0530
Subject: [PATCH 1688/1765] lib: sbi_domain: Make
 sbi_domain_root_add_memregion() as local function

The sbi_domain_root_add_memregion() is only used within sbi_domain
implementation so rename and make it a local function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_domain.h | 10 ----------
 lib/sbi/sbi_domain.c     |  4 ++--
 2 files changed, 2 insertions(+), 12 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index d92f309a045..fc349820420 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -292,16 +292,6 @@ void sbi_domain_dump_all(const char *suffix);
 int sbi_domain_register(struct sbi_domain *dom,
 			const struct sbi_hartmask *assign_mask);
 
-/**
- * Add a memory region to the root domain
- * @param reg pointer to the memory region to be added
- *
- * @return 0 on success
- * @return SBI_EALREADY if memory region conflicts with the existing one
- * @return SBI_EINVAL otherwise
- */
-int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
-
 /**
  * Add a memory range with its flags to the root domain
  * @param addr start physical address of memory range
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index feb239219df..a1db13105bd 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -589,7 +589,7 @@ int sbi_domain_register(struct sbi_domain *dom,
 	return 0;
 }
 
-int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
+static int root_add_memregion(const struct sbi_domain_memregion *reg)
 {
 	int rc;
 	bool reg_merged;
@@ -667,7 +667,7 @@ int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
 				(end - pos) : align;
 
 		sbi_domain_memregion_init(pos, rsize, region_flags, &reg);
-		rc = sbi_domain_root_add_memregion(&reg);
+		rc = root_add_memregion(&reg);
 		if (rc)
 			return rc;
 		pos += rsize;

From 2d517fce9bd783f06a92d957a688890c894240cd Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Fri, 20 Sep 2024 17:44:13 +0530
Subject: [PATCH 1689/1765] lib: utils/fdt: Use sbi_domain_memregion_init()
 when parsing domains

Use sbi_domain_memregion_init() at the time of parsing domains from
FDT so that sbi_domain_memregion_init() is always used for setting
up all memregions.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 lib/utils/fdt/fdt_domain.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/lib/utils/fdt/fdt_domain.c b/lib/utils/fdt/fdt_domain.c
index 4fde50f5b86..4bc7ed860c2 100644
--- a/lib/utils/fdt/fdt_domain.c
+++ b/lib/utils/fdt/fdt_domain.c
@@ -253,8 +253,8 @@ static int __fdt_parse_region(const void *fdt, int domain_offset,
 	u32 val32;
 	u64 val64;
 	const u32 *val;
+	unsigned long base, order, flags;
 	struct parse_region_data *preg = opaque;
-	struct sbi_domain_memregion *region;
 
 	/*
 	 * Non-root domains cannot add a region with only M-mode
@@ -271,7 +271,6 @@ static int __fdt_parse_region(const void *fdt, int domain_offset,
 	/* Find next region of the domain */
 	if (preg->max_regions <= preg->region_count)
 		return SBI_ENOSPC;
-	region = &preg->dom->regions[preg->region_count];
 
 	/* Read "base" DT property */
 	val = fdt_getprop(fdt, region_offset, "base", &len);
@@ -279,7 +278,7 @@ static int __fdt_parse_region(const void *fdt, int domain_offset,
 		return SBI_EINVAL;
 	val64 = fdt32_to_cpu(val[0]);
 	val64 = (val64 << 32) | fdt32_to_cpu(val[1]);
-	region->base = val64;
+	base = val64;
 
 	/* Read "order" DT property */
 	val = fdt_getprop(fdt, region_offset, "order", &len);
@@ -288,12 +287,15 @@ static int __fdt_parse_region(const void *fdt, int domain_offset,
 	val32 = fdt32_to_cpu(*val);
 	if (val32 < 3 || __riscv_xlen < val32)
 		return SBI_EINVAL;
-	region->order = val32;
+	order = val32;
 
 	/* Read "mmio" DT property */
-	region->flags = region_access & SBI_DOMAIN_MEMREGION_ACCESS_MASK;
+	flags = region_access & SBI_DOMAIN_MEMREGION_ACCESS_MASK;
 	if (fdt_get_property(fdt, region_offset, "mmio", NULL))
-		region->flags |= SBI_DOMAIN_MEMREGION_MMIO;
+		flags |= SBI_DOMAIN_MEMREGION_MMIO;
+
+	sbi_domain_memregion_init(base, (order == __riscv_xlen) ? ~0UL : BIT(order),
+				  flags, &preg->dom->regions[preg->region_count]);
 
 	preg->region_count++;
 

From 65d4e9be95294c04a9a6b1be9215e9d571aba479 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Sat, 21 Sep 2024 21:46:15 +0530
Subject: [PATCH 1690/1765] include: sbi: Remove cyclic include in
 sbi_domain_context.h

The sbi_domain_context.h includes sbi_domain.h and the sbi_domain.h
also includes sbi_domain_context.h. Remove this cyclic include in
sbi_domain_context.h.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_domain_context.h | 3 ++-
 lib/sbi/sbi_domain_context.c     | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
index a92f338b224..1f5a4f56809 100644
--- a/include/sbi/sbi_domain_context.h
+++ b/include/sbi/sbi_domain_context.h
@@ -9,7 +9,8 @@
 
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_trap.h>
-#include <sbi/sbi_domain.h>
+
+struct sbi_domain;
 
 /** Context representation for a hart within a domain */
 struct sbi_context {
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index bafb6c3ef9b..7cad4656472 100644
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -13,6 +13,7 @@
 #include <sbi/sbi_heap.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_domain_context.h>
 
 /**

From 81d79913a0c23d7acc38ade7e8d8e3d48a388a3f Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 23 Sep 2024 10:00:51 +0530
Subject: [PATCH 1691/1765] lib: sbi: Introduce domain data

Different parts of OpenSBI require their own per-domain data so
introduce domain data (or sbi_domain_data) which can be registered
by any part of OpenSBI. Using the domain data, the domain framework
will create a data pointer for every domain which can be used to
maintain some per-domain state.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
 include/sbi/sbi_domain.h      |   3 +
 include/sbi/sbi_domain_data.h |  93 +++++++++++++++++++++++
 lib/sbi/objects.mk            |   1 +
 lib/sbi/sbi_domain.c          |  11 +++
 lib/sbi/sbi_domain_data.c     | 138 ++++++++++++++++++++++++++++++++++
 5 files changed, 246 insertions(+)
 create mode 100644 include/sbi/sbi_domain_data.h
 create mode 100644 lib/sbi/sbi_domain_data.c

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index fc349820420..cf09344f28b 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -15,6 +15,7 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_domain_context.h>
+#include <sbi/sbi_domain_data.h>
 
 struct sbi_scratch;
 
@@ -163,6 +164,8 @@ struct sbi_domain_memregion {
 struct sbi_domain {
 	/** Node in linked list of domains */
 	struct sbi_dlist node;
+	/** Internal state of per-domain data */
+	struct sbi_domain_data_priv data_priv;
 	/** Logical index of this domain */
 	u32 index;
 	/** HARTs assigned to this domain */
diff --git a/include/sbi/sbi_domain_data.h b/include/sbi/sbi_domain_data.h
new file mode 100644
index 00000000000..7eeafdcea58
--- /dev/null
+++ b/include/sbi/sbi_domain_data.h
@@ -0,0 +1,93 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ */
+
+#ifndef __SBI_DOMAIN_DATA_H__
+#define __SBI_DOMAIN_DATA_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
+
+struct sbi_domain;
+
+/** Maximum domain data per-domain */
+#define SBI_DOMAIN_MAX_DATA_PTRS		32
+
+/** Representation of per-domain data */
+struct sbi_domain_data_priv {
+	/** Array of domain data pointers indexed by domain data identifier */
+	void *idx_to_data_ptr[SBI_DOMAIN_MAX_DATA_PTRS];
+};
+
+/** Representation of a domain data */
+struct sbi_domain_data {
+	/**
+	 * Head is used for maintaining data list
+	 *
+	 * Note: initialized by domain framework
+	 */
+	struct sbi_dlist head;
+	/**
+	 * Identifier which used to locate per-domain data
+	 *
+	 * Note: initialized by domain framework
+	 */
+	unsigned long data_idx;
+	/** Size of per-domain data */
+	unsigned long data_size;
+	/** Optional callback to setup domain data */
+	int (*data_setup)(struct sbi_domain *dom,
+			  struct sbi_domain_data *data, void *data_ptr);
+	/** Optional callback to cleanup domain data */
+	void (*data_cleanup)(struct sbi_domain *dom,
+			     struct sbi_domain_data *data, void *data_ptr);
+};
+
+/**
+ * Get per-domain data pointer for a given domain
+ * @param dom pointer to domain
+ * @param data pointer to domain data
+ *
+ * @return per-domain data pointer
+ */
+void *sbi_domain_data_ptr(struct sbi_domain *dom, struct sbi_domain_data *data);
+
+/**
+ * Setup all domain data for a domain
+ * @param dom pointer to domain
+ *
+ * @return 0 on success and negative error code on failure
+ *
+ * Note: This function is used internally within domain framework.
+ */
+int sbi_domain_setup_data(struct sbi_domain *dom);
+
+/**
+ * Cleanup all domain data for a domain
+ * @param dom pointer to domain
+ *
+ * Note: This function is used internally within domain framework.
+ */
+void sbi_domain_cleanup_data(struct sbi_domain *dom);
+
+/**
+ * Register a domain data
+ * @param hndl pointer to domain data
+ *
+ * @return 0 on success and negative error code on failure
+ *
+ * Note: This function must be used only in cold boot path.
+ */
+int sbi_domain_register_data(struct sbi_domain_data *data);
+
+/**
+ * Unregister a domain data
+ * @param hndl pointer to domain data
+ *
+ * Note: This function must be used only in cold boot path.
+ */
+void sbi_domain_unregister_data(struct sbi_domain_data *data);
+
+#endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 535aa709743..0b114bbddea 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -65,6 +65,7 @@ libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_domain_context.o
+libsbi-objs-y += sbi_domain_data.o
 libsbi-objs-y += sbi_domain.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index a1db13105bd..30eb88fc912 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -586,6 +586,15 @@ int sbi_domain_register(struct sbi_domain *dom,
 		}
 	}
 
+	/* Setup data for the discovered domain */
+	rc = sbi_domain_setup_data(dom);
+	if (rc) {
+		sbi_printf("%s: domain data setup failed for %s (error %d)\n",
+			   __func__, dom->name, rc);
+		sbi_list_del(&dom->node);
+		return rc;
+	}
+
 	return 0;
 }
 
@@ -752,6 +761,8 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	struct sbi_domain_memregion *root_memregs;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
+	SBI_INIT_LIST_HEAD(&domain_list);
+
 	if (scratch->fw_rw_offset == 0 ||
 	    (scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
 		sbi_printf("%s: fw_rw_offset is not a power of 2 (0x%lx)\n",
diff --git a/lib/sbi/sbi_domain_data.c b/lib/sbi/sbi_domain_data.c
new file mode 100644
index 00000000000..04f0edf9ef6
--- /dev/null
+++ b/lib/sbi/sbi_domain_data.c
@@ -0,0 +1,138 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ */
+
+#include <sbi/sbi_bitmap.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+
+static SBI_LIST_HEAD(data_list);
+static DECLARE_BITMAP(data_idx_bmap, SBI_DOMAIN_MAX_DATA_PTRS);
+
+void *sbi_domain_data_ptr(struct sbi_domain *dom, struct sbi_domain_data *data)
+{
+	if (dom && data && data->data_idx < SBI_DOMAIN_MAX_DATA_PTRS)
+		return dom->data_priv.idx_to_data_ptr[data->data_idx];
+
+	return NULL;
+}
+
+static int domain_setup_data_one(struct sbi_domain *dom,
+				 struct sbi_domain_data *data)
+{
+	struct sbi_domain_data_priv *priv = &dom->data_priv;
+	void *data_ptr;
+	int rc;
+
+	if (priv->idx_to_data_ptr[data->data_idx])
+		return SBI_EALREADY;
+
+	data_ptr = sbi_zalloc(data->data_size);
+	if (!data_ptr) {
+		sbi_domain_cleanup_data(dom);
+		return SBI_ENOMEM;
+	}
+
+	if (data->data_setup) {
+		rc = data->data_setup(dom, data, data_ptr);
+		if (rc) {
+			sbi_free(data_ptr);
+			return rc;
+		}
+	}
+
+	priv->idx_to_data_ptr[data->data_idx] = data_ptr;
+	return 0;
+}
+
+static void domain_cleanup_data_one(struct sbi_domain *dom,
+				    struct sbi_domain_data *data)
+{
+	struct sbi_domain_data_priv *priv = &dom->data_priv;
+	void *data_ptr;
+
+	data_ptr = priv->idx_to_data_ptr[data->data_idx];
+	if (!data_ptr)
+		return;
+
+	if (data->data_cleanup)
+		data->data_cleanup(dom, data, data_ptr);
+
+	sbi_free(data_ptr);
+	priv->idx_to_data_ptr[data->data_idx] = NULL;
+}
+
+int sbi_domain_setup_data(struct sbi_domain *dom)
+{
+	struct sbi_domain_data *data;
+	int rc;
+
+	if (!dom)
+		return SBI_EINVAL;
+
+	sbi_list_for_each_entry(data, &data_list, head) {
+		rc = domain_setup_data_one(dom, data);
+		if (rc) {
+			sbi_domain_cleanup_data(dom);
+			return rc;
+		}
+	}
+
+	return 0;
+}
+
+void sbi_domain_cleanup_data(struct sbi_domain *dom)
+{
+	struct sbi_domain_data *data;
+
+	if (!dom)
+		return;
+
+	sbi_list_for_each_entry(data, &data_list, head)
+		domain_cleanup_data_one(dom, data);
+}
+
+int sbi_domain_register_data(struct sbi_domain_data *data)
+{
+	struct sbi_domain *dom;
+	u32 data_idx;
+	int rc;
+
+	if (!data || !data->data_size)
+		return SBI_EINVAL;
+
+	for (data_idx = 0; data_idx < SBI_DOMAIN_MAX_DATA_PTRS; data_idx++) {
+		if (!bitmap_test(data_idx_bmap, data_idx))
+			break;
+	}
+	if (SBI_DOMAIN_MAX_DATA_PTRS <= data_idx)
+		return SBI_ENOSPC;
+	bitmap_set(data_idx_bmap, data_idx, 1);
+
+	data->data_idx = data_idx;
+	sbi_list_add_tail(&data->head, &data_list);
+
+	sbi_domain_for_each(dom) {
+		rc = domain_setup_data_one(dom, data);
+		if (rc) {
+			sbi_domain_unregister_data(data);
+			return rc;
+		}
+	}
+
+	return 0;
+}
+
+void sbi_domain_unregister_data(struct sbi_domain_data *data)
+{
+	struct sbi_domain *dom;
+
+	sbi_domain_for_each(dom)
+		domain_cleanup_data_one(dom, data);
+
+	sbi_list_del(&data->head);
+	bitmap_clear(data_idx_bmap, data->data_idx, 1);
+}

From f609fd85846ac35e2780df50ba0ad801622e13d8 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 23 Sep 2024 13:46:12 +0530
Subject: [PATCH 1692/1765] lib: sbi_domain: Use domain data support for
 per-domain hart context

The per-domain hartindex_to_context_table[] is yet another per-domain
data required for implementing hart entry into (or exit from) domain.

Use the recently added domain data support for per-domain hart context
so that a dedicated hartindex_to_context_table[] in struct sbi_domain
is not needed.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
 include/sbi/sbi_domain.h         |   2 -
 include/sbi/sbi_domain_context.h |  56 +++--------------
 lib/sbi/sbi_domain.c             |   9 ++-
 lib/sbi/sbi_domain_context.c     | 104 +++++++++++++++++++++++++++----
 4 files changed, 109 insertions(+), 62 deletions(-)

diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h
index cf09344f28b..8a2b123de36 100644
--- a/include/sbi/sbi_domain.h
+++ b/include/sbi/sbi_domain.h
@@ -176,8 +176,6 @@ struct sbi_domain {
 	char name[64];
 	/** Possible HARTs in this domain */
 	const struct sbi_hartmask *possible_harts;
-	/** Contexts for possible HARTs indexed by hartindex */
-	struct sbi_context *hartindex_to_context_table[SBI_HARTMASK_MAX_BITS];
 	/** Array of memory regions terminated by a region with order zero */
 	struct sbi_domain_memregion *regions;
 	/** HART id of the HART booting this domain */
diff --git a/include/sbi/sbi_domain_context.h b/include/sbi/sbi_domain_context.h
index 1f5a4f56809..31a3a7f81fd 100644
--- a/include/sbi/sbi_domain_context.h
+++ b/include/sbi/sbi_domain_context.h
@@ -8,55 +8,9 @@
 #define __SBI_DOMAIN_CONTEXT_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_trap.h>
 
 struct sbi_domain;
 
-/** Context representation for a hart within a domain */
-struct sbi_context {
-	/** Trap-related states such as GPRs, mepc, and mstatus */
-	struct sbi_trap_context trap_ctx;
-
-	/** Supervisor status register */
-	unsigned long sstatus;
-	/** Supervisor interrupt enable register */
-	unsigned long sie;
-	/** Supervisor trap vector base address register */
-	unsigned long stvec;
-	/** Supervisor scratch register for temporary storage */
-	unsigned long sscratch;
-	/** Supervisor exception program counter register */
-	unsigned long sepc;
-	/** Supervisor cause register */
-	unsigned long scause;
-	/** Supervisor trap value register */
-	unsigned long stval;
-	/** Supervisor interrupt pending register */
-	unsigned long sip;
-	/** Supervisor address translation and protection register */
-	unsigned long satp;
-	/** Counter-enable register */
-	unsigned long scounteren;
-	/** Supervisor environment configuration register */
-	unsigned long senvcfg;
-
-	/** Reference to the owning domain */
-	struct sbi_domain *dom;
-	/** Previous context (caller) to jump to during context exits */
-	struct sbi_context *prev_ctx;
-	/** Is context initialized and runnable */
-	bool initialized;
-};
-
-/** Get the context pointer for a given hart index and domain */
-#define sbi_hartindex_to_domain_context(__hartindex, __d) \
-	(__d)->hartindex_to_context_table[__hartindex]
-
-/** Macro to obtain the current hart's context pointer */
-#define sbi_domain_context_thishart_ptr() \
-	sbi_hartindex_to_domain_context(current_hartindex(), \
-					sbi_domain_thishart_ptr())
-
 /**
  * Enter a specific domain context synchronously
  * @param dom pointer to domain
@@ -74,4 +28,14 @@ int sbi_domain_context_enter(struct sbi_domain *dom);
  */
 int sbi_domain_context_exit(void);
 
+/**
+ * Initialize domain context support
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_domain_context_init(void);
+
+/* Deinitialize domain context support */
+void sbi_domain_context_deinit(void);
+
 #endif // __SBI_DOMAIN_CONTEXT_H__
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 30eb88fc912..7fdcf9d3289 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -780,11 +780,16 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	if (!domain_hart_ptr_offset)
 		return SBI_ENOMEM;
 
+	/* Initialize domain context support */
+	rc = sbi_domain_context_init();
+	if (rc)
+		goto fail_free_domain_hart_ptr_offset;
+
 	root_memregs = sbi_calloc(sizeof(*root_memregs), ROOT_REGION_MAX + 1);
 	if (!root_memregs) {
 		sbi_printf("%s: no memory for root regions\n", __func__);
 		rc = SBI_ENOMEM;
-		goto fail_free_domain_hart_ptr_offset;
+		goto fail_deinit_context;
 	}
 	root.regions = root_memregs;
 
@@ -849,6 +854,8 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	sbi_free(root_hmask);
 fail_free_root_memregs:
 	sbi_free(root_memregs);
+fail_deinit_context:
+	sbi_domain_context_deinit();
 fail_free_domain_hart_ptr_offset:
 	sbi_scratch_free_offset(domain_hart_ptr_offset);
 	return rc;
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 7cad4656472..407c0d5cec1 100644
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -15,6 +15,75 @@
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_domain_context.h>
+#include <sbi/sbi_trap.h>
+
+/** Context representation for a hart within a domain */
+struct hart_context {
+	/** Trap-related states such as GPRs, mepc, and mstatus */
+	struct sbi_trap_context trap_ctx;
+
+	/** Supervisor status register */
+	unsigned long sstatus;
+	/** Supervisor interrupt enable register */
+	unsigned long sie;
+	/** Supervisor trap vector base address register */
+	unsigned long stvec;
+	/** Supervisor scratch register for temporary storage */
+	unsigned long sscratch;
+	/** Supervisor exception program counter register */
+	unsigned long sepc;
+	/** Supervisor cause register */
+	unsigned long scause;
+	/** Supervisor trap value register */
+	unsigned long stval;
+	/** Supervisor interrupt pending register */
+	unsigned long sip;
+	/** Supervisor address translation and protection register */
+	unsigned long satp;
+	/** Counter-enable register */
+	unsigned long scounteren;
+	/** Supervisor environment configuration register */
+	unsigned long senvcfg;
+
+	/** Reference to the owning domain */
+	struct sbi_domain *dom;
+	/** Previous context (caller) to jump to during context exits */
+	struct hart_context *prev_ctx;
+	/** Is context initialized and runnable */
+	bool initialized;
+};
+
+struct domain_context_priv {
+	/** Contexts for possible HARTs indexed by hartindex */
+	struct hart_context *hartindex_to_context_table[SBI_HARTMASK_MAX_BITS];
+};
+
+static struct sbi_domain_data dcpriv = {
+	.data_size = sizeof(struct domain_context_priv),
+};
+
+static inline struct hart_context *hart_context_get(struct sbi_domain *dom,
+						    u32 hartindex)
+{
+	struct domain_context_priv *dcp = sbi_domain_data_ptr(dom, &dcpriv);
+
+	return (dcp && hartindex < SBI_HARTMASK_MAX_BITS) ?
+		dcp->hartindex_to_context_table[hartindex] : NULL;
+}
+
+static void hart_context_set(struct sbi_domain *dom, u32 hartindex,
+			     struct hart_context *hc)
+{
+	struct domain_context_priv *dcp = sbi_domain_data_ptr(dom, &dcpriv);
+
+	if (dcp && hartindex < SBI_HARTMASK_MAX_BITS)
+		dcp->hartindex_to_context_table[hartindex] = hc;
+}
+
+/** Macro to obtain the current hart's context pointer */
+#define hart_context_thishart_get()					\
+	hart_context_get(sbi_domain_thishart_ptr(),			\
+			 current_hartindex())
 
 /**
  * Switches the HART context from the current domain to the target domain.
@@ -24,8 +93,8 @@
  * @param ctx pointer to the current HART context
  * @param dom_ctx pointer to the target domain context
  */
-static void switch_to_next_domain_context(struct sbi_context *ctx,
-					  struct sbi_context *dom_ctx)
+static void switch_to_next_domain_context(struct hart_context *ctx,
+					  struct hart_context *dom_ctx)
 {
 	u32 hartindex = current_hartindex();
 	struct sbi_trap_context *trap_ctx;
@@ -90,9 +159,8 @@ static void switch_to_next_domain_context(struct sbi_context *ctx,
 
 int sbi_domain_context_enter(struct sbi_domain *dom)
 {
-	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
-	struct sbi_context *dom_ctx = sbi_hartindex_to_domain_context(
-		current_hartindex(), dom);
+	struct hart_context *ctx = hart_context_thishart_get();
+	struct hart_context *dom_ctx = hart_context_get(dom, current_hartindex());
 
 	/* Validate the domain context existence */
 	if (!dom_ctx)
@@ -110,8 +178,8 @@ int sbi_domain_context_exit(void)
 {
 	u32 hartindex = current_hartindex();
 	struct sbi_domain *dom;
-	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
-	struct sbi_context *dom_ctx, *tmp;
+	struct hart_context *ctx = hart_context_thishart_get();
+	struct hart_context *dom_ctx, *tmp;
 
 	/*
 	 * If it's first time to call `exit` on the current hart, no
@@ -124,16 +192,16 @@ int sbi_domain_context_exit(void)
 							 dom->possible_harts))
 				continue;
 
-			dom_ctx = sbi_zalloc(sizeof(struct sbi_context));
+			dom_ctx = sbi_zalloc(sizeof(struct hart_context));
 			if (!dom_ctx)
 				return SBI_ENOMEM;
 
 			/* Bind context and domain */
-			dom_ctx->dom				   = dom;
-			dom->hartindex_to_context_table[hartindex] = dom_ctx;
+			dom_ctx->dom = dom;
+			hart_context_set(dom, hartindex, dom_ctx);
 		}
 
-		ctx = sbi_domain_context_thishart_ptr();
+		ctx = hart_context_thishart_get();
 	}
 
 	dom_ctx = ctx->prev_ctx;
@@ -145,7 +213,7 @@ int sbi_domain_context_exit(void)
 			if (dom == &root || dom == sbi_domain_thishart_ptr())
 				continue;
 
-			tmp = sbi_hartindex_to_domain_context(hartindex, dom);
+			tmp = hart_context_get(dom, hartindex);
 			if (tmp && !tmp->initialized) {
 				dom_ctx = tmp;
 				break;
@@ -155,9 +223,19 @@ int sbi_domain_context_exit(void)
 
 	/* Take the root domain context if fail to find */
 	if (!dom_ctx)
-		dom_ctx = sbi_hartindex_to_domain_context(hartindex, &root);
+		dom_ctx = hart_context_get(&root, hartindex);
 
 	switch_to_next_domain_context(ctx, dom_ctx);
 
 	return 0;
 }
+
+int sbi_domain_context_init(void)
+{
+	return sbi_domain_register_data(&dcpriv);
+}
+
+void sbi_domain_context_deinit(void)
+{
+	sbi_domain_unregister_data(&dcpriv);
+}

From ebbd2761464e5e59b67a1bd8022c223b80f7169e Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Mon, 23 Sep 2024 14:32:23 +0530
Subject: [PATCH 1693/1765] docs: Remove hartindex_to_context_table from
 domain_support.md

The hartindex_to_context_table field is no longer part of sbi_domain
so remove related documentation from domain_support.md.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 docs/domain_support.md | 2 --
 1 file changed, 2 deletions(-)

diff --git a/docs/domain_support.md b/docs/domain_support.md
index 1a4006851d2..93186c4a97d 100644
--- a/docs/domain_support.md
+++ b/docs/domain_support.md
@@ -41,7 +41,6 @@ has following details:
 * **name** - Name of this domain
 * **assigned_harts** - HARTs assigned to this domain
 * **possible_harts** - HARTs possible in this domain
-* **hartindex_to_context_table** - Contexts corresponding to possible HARTs
 * **regions** - Array of memory regions terminated by a memory region
   with order zero
 * **boot_hartid** - HART id of the HART booting this domain. The domain
@@ -81,7 +80,6 @@ following manner:
   platform support
 * **possible_harts** - All valid HARTs of a RISC-V platform are possible
   HARTs of the ROOT domain
-* **hartindex_to_context_table** - Contexts corresponding to ROOT domain's possible HARTs
 * **regions** - Two memory regions available to the ROOT domain:
   **A)** A memory region to protect OpenSBI firmware from S-mode and U-mode
   **B)** A memory region of **order=__riscv_xlen** allowing S-mode and

From b919daf4958281b94fd2e03e23874b97b4908fc5 Mon Sep 17 00:00:00 2001
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
Date: Mon, 23 Sep 2024 11:26:26 +0530
Subject: [PATCH 1694/1765] lib: sbi: Add support to mask/unmask SSE events

Add functions to globally mask/unmask supervisor software events
on the calling hart.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |  2 ++
 include/sbi/sbi_sse.h             |  2 ++
 lib/sbi/sbi_ecall_sse.c           |  6 +++++
 lib/sbi/sbi_sse.c                 | 43 +++++++++++++++++++++++++++++++
 4 files changed, 53 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 2958b41863d..321039f85f8 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -342,6 +342,8 @@ enum sbi_cppc_reg_id {
 #define SBI_EXT_SSE_DISABLE		0x00000005
 #define SBI_EXT_SSE_COMPLETE		0x00000006
 #define SBI_EXT_SSE_INJECT		0x00000007
+#define SBI_EXT_SSE_HART_UNMASK		0x00000008
+#define SBI_EXT_SSE_HART_MASK		0x00000009
 
 /* SBI SSE Event Attributes. */
 enum sbi_sse_attr_id {
diff --git a/include/sbi/sbi_sse.h b/include/sbi/sbi_sse.h
index e5b0ad690fe..7419698a451 100644
--- a/include/sbi/sbi_sse.h
+++ b/include/sbi/sbi_sse.h
@@ -78,6 +78,8 @@ void sbi_sse_exit(struct sbi_scratch *scratch);
 int sbi_sse_register(uint32_t event_id, unsigned long handler_entry_pc,
 		     unsigned long handler_entry_arg);
 int sbi_sse_unregister(uint32_t event_id);
+int sbi_sse_hart_mask(void);
+int sbi_sse_hart_unmask(void);
 int sbi_sse_enable(uint32_t event_id);
 int sbi_sse_disable(uint32_t event_id);
 int sbi_sse_complete(struct sbi_trap_regs *regs, struct sbi_ecall_return *out);
diff --git a/lib/sbi/sbi_ecall_sse.c b/lib/sbi/sbi_ecall_sse.c
index a28a033e2e0..beddc2cd24f 100644
--- a/lib/sbi/sbi_ecall_sse.c
+++ b/lib/sbi/sbi_ecall_sse.c
@@ -36,6 +36,12 @@ static int sbi_ecall_sse_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_SSE_INJECT:
 		ret = sbi_sse_inject_from_ecall(regs->a0, regs->a1, out);
 		break;
+	case SBI_EXT_SSE_HART_MASK:
+		ret = sbi_sse_hart_mask();
+		break;
+	case SBI_EXT_SSE_HART_UNMASK:
+		ret = sbi_sse_hart_unmask();
+		break;
 	default:
 		ret = SBI_ENOTSUPP;
 	}
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index ab03b9c753b..94071f998b9 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -142,6 +142,12 @@ struct sse_hart_state {
 	 * List of local events allocated at boot time.
 	 */
 	struct sbi_sse_event *local_events;
+
+	/**
+	 * State to track if the hart is ready to take sse events.
+	 * One hart cannot modify this state of another hart.
+	 */
+	bool masked;
 };
 
 /**
@@ -610,6 +616,10 @@ void sbi_sse_process_pending_events(struct sbi_trap_regs *regs)
 	struct sbi_sse_event *e;
 	struct sse_hart_state *state = sse_thishart_state_ptr();
 
+	/* if sse is masked on this hart, do nothing */
+	if (state->masked)
+		return;
+
 	spin_lock(&state->enabled_event_lock);
 
 	sbi_list_for_each_entry(e, &state->enabled_event_list, node) {
@@ -807,6 +817,36 @@ int sbi_sse_disable(uint32_t event_id)
 	return ret;
 }
 
+int sbi_sse_hart_mask(void)
+{
+	struct sse_hart_state *state = sse_thishart_state_ptr();
+
+	if (!state)
+		return SBI_EFAIL;
+
+	if (state->masked)
+		return SBI_EALREADY_STARTED;
+
+	state->masked = true;
+
+	return SBI_SUCCESS;
+}
+
+int sbi_sse_hart_unmask(void)
+{
+	struct sse_hart_state *state = sse_thishart_state_ptr();
+
+	if (!state)
+		return SBI_EFAIL;
+
+	if (!state->masked)
+		return SBI_EALREADY_STOPPED;
+
+	state->masked = false;
+
+	return SBI_SUCCESS;
+}
+
 int sbi_sse_inject_from_ecall(uint32_t event_id, unsigned long hartid,
 			      struct sbi_ecall_return *out)
 {
@@ -1127,6 +1167,9 @@ int sbi_sse_init(struct sbi_scratch *scratch, bool cold_boot)
 
 		shs->local_events = (struct sbi_sse_event *)(shs + 1);
 
+		/* SSE events are masked until hart unmasks them */
+		shs->masked = true;
+
 		sse_set_hart_state_ptr(scratch, shs);
 	}
 

From daa282573ffac0f295de7631c98840668f20a568 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:02 +0200
Subject: [PATCH 1695/1765] lib: sbi: factorize previous virtualization mode
 read from regs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The same pattern is used at multiple places to verify in which mode
the exception was actually taken. Factorize it.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_trap.h    |  9 +++++++++
 lib/sbi/sbi_emulate_csr.c | 12 ++----------
 lib/sbi/sbi_trap.c        |  6 +-----
 3 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index f7c170e6491..b0c47ce52cd 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -236,6 +236,15 @@ static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
 #endif
 }
 
+static inline bool sbi_regs_from_virt(const struct sbi_trap_regs *regs)
+{
+#if __riscv_xlen == 32
+	return (regs->mstatusH & MSTATUSH_MPV) ? true : false;
+#else
+	return (regs->mstatus & MSTATUS_MPV) ? true : false;
+#endif
+}
+
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap);
 
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index 3adec78dc89..a5a04cd5c27 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -47,11 +47,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 	int ret = 0;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
-#if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
-#else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
-#endif
+	bool virt = sbi_regs_from_virt(regs);
 
 	switch (csr_num) {
 	case CSR_HTIMEDELTA:
@@ -157,11 +153,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 {
 	int ret = 0;
 	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
-#if __riscv_xlen == 32
-	bool virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
-#else
-	bool virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
-#endif
+	bool virt = sbi_regs_from_virt(regs);
 
 	switch (csr_num) {
 	case CSR_HTIMEDELTA:
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index 176e17401b8..ff0668e1fab 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -104,11 +104,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 {
 	ulong hstatus, vsstatus, prev_mode;
 	bool elp = false;
-#if __riscv_xlen == 32
-	bool prev_virt = (regs->mstatusH & MSTATUSH_MPV) ? true : false;
-#else
-	bool prev_virt = (regs->mstatus & MSTATUS_MPV) ? true : false;
-#endif
+	bool prev_virt = sbi_regs_from_virt(regs);
 	/* By default, we redirect to HS-mode */
 	bool next_virt = false;
 

From 80656bdb1daf380b5562cba11f43754fe916d631 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:03 +0200
Subject: [PATCH 1696/1765] lib: sbi: factorize previous mode computation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Previous privilege mode retrieval from mstatus is done at different
places, factorize it rather than copy/pasting it again.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_trap.h     | 5 +++++
 lib/sbi/sbi_emulate_csr.c  | 4 ++--
 lib/sbi/sbi_illegal_insn.c | 2 +-
 lib/sbi/sbi_system.c       | 2 +-
 lib/sbi/sbi_trap.c         | 4 ++--
 lib/sbi/sbi_trap_ldst.c    | 4 ++--
 6 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index b0c47ce52cd..d5182bf5cf1 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -245,6 +245,11 @@ static inline bool sbi_regs_from_virt(const struct sbi_trap_regs *regs)
 #endif
 }
 
+static inline int sbi_mstatus_prev_mode(unsigned long mstatus)
+{
+	return (mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+}
+
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap);
 
diff --git a/lib/sbi/sbi_emulate_csr.c b/lib/sbi/sbi_emulate_csr.c
index a5a04cd5c27..c2253c82c52 100644
--- a/lib/sbi/sbi_emulate_csr.c
+++ b/lib/sbi/sbi_emulate_csr.c
@@ -46,7 +46,7 @@ int sbi_emulate_csr_read(int csr_num, struct sbi_trap_regs *regs,
 {
 	int ret = 0;
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	ulong prev_mode = sbi_mstatus_prev_mode(regs->mstatus);
 	bool virt = sbi_regs_from_virt(regs);
 
 	switch (csr_num) {
@@ -152,7 +152,7 @@ int sbi_emulate_csr_write(int csr_num, struct sbi_trap_regs *regs,
 			  ulong csr_val)
 {
 	int ret = 0;
-	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	ulong prev_mode = sbi_mstatus_prev_mode(regs->mstatus);
 	bool virt = sbi_regs_from_virt(regs);
 
 	switch (csr_num) {
diff --git a/lib/sbi/sbi_illegal_insn.c b/lib/sbi/sbi_illegal_insn.c
index e1d2cd362c5..784bc4c0007 100644
--- a/lib/sbi/sbi_illegal_insn.c
+++ b/lib/sbi/sbi_illegal_insn.c
@@ -52,7 +52,7 @@ static int system_opcode_insn(ulong insn, struct sbi_trap_regs *regs)
 	int rs1_num	= GET_RS1_NUM(insn);
 	ulong rs1_val	= GET_RS1(insn, regs);
 	int csr_num	= GET_CSR_NUM((u32)insn);
-	ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	ulong prev_mode = sbi_mstatus_prev_mode(regs->mstatus);
 	ulong csr_val, new_csr_val;
 
 	if (prev_mode == PRV_M) {
diff --git a/lib/sbi/sbi_system.c b/lib/sbi/sbi_system.c
index 8e624fdda3f..cd0f4ba42bb 100644
--- a/lib/sbi/sbi_system.c
+++ b/lib/sbi/sbi_system.c
@@ -158,7 +158,7 @@ int sbi_system_suspend(u32 sleep_type, ulong resume_addr, ulong opaque)
 	if (ret != SBI_OK)
 		return ret;
 
-	prev_mode = (csr_read(CSR_MSTATUS) & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	prev_mode = sbi_mstatus_prev_mode(csr_read(CSR_MSTATUS));
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_EFAIL;
 
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index ff0668e1fab..fd70e67a411 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -109,7 +109,7 @@ int sbi_trap_redirect(struct sbi_trap_regs *regs,
 	bool next_virt = false;
 
 	/* Sanity check on previous mode */
-	prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
+	prev_mode = sbi_mstatus_prev_mode(regs->mstatus);
 	if (prev_mode != PRV_S && prev_mode != PRV_U)
 		return SBI_ENOTSUPP;
 
@@ -361,7 +361,7 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 	if (rc)
 		sbi_trap_error(msg, rc, tcntx);
 
-	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) != PRV_M)
+	if (sbi_mstatus_prev_mode(regs->mstatus) != PRV_M)
 		sbi_sse_process_pending_events(regs);
 
 	sbi_trap_set_context(scratch, tcntx->prev_context);
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index f9c0241c900..ebc4a924de0 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -318,7 +318,7 @@ static int sbi_ld_access_emulator(int rlen, union sbi_ldst_data *out_val,
 	struct sbi_trap_regs *regs = &tcntx->regs;
 
 	/* If fault came from M mode, just fail */
-	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
+	if (sbi_mstatus_prev_mode(regs->mstatus) == PRV_M)
 		return SBI_EINVAL;
 
 	/* If platform emulator failed, we redirect instead of fail */
@@ -341,7 +341,7 @@ static int sbi_st_access_emulator(int wlen, union sbi_ldst_data in_val,
 	struct sbi_trap_regs *regs = &tcntx->regs;
 
 	/* If fault came from M mode, just fail */
-	if (((regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT) == PRV_M)
+	if (sbi_mstatus_prev_mode(regs->mstatus) == PRV_M)
 		return SBI_EINVAL;
 
 	/* If platform emulator failed, we redirect instead of fail */

From 9c7859326909c8025bf23909f1952ee963a1cdd4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:04 +0200
Subject: [PATCH 1697/1765] lib: sbi: add Ssdbltrp ISA extension support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add Ssdbltrp trap handler support for S-mode double trap handling. If
the trap is received while in VS-mode, then the trap is redirected to
S-mode. If caught while in HS-mode, then an error is returned to the top
trap handler which will panic.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/riscv_encoding.h |  4 +++-
 include/sbi/sbi_hart.h       |  2 ++
 include/sbi/sbi_trap_ldst.h  |  2 ++
 lib/sbi/objects.mk           |  1 +
 lib/sbi/sbi_double_trap.c    | 30 ++++++++++++++++++++++++++++++
 lib/sbi/sbi_hart.c           |  4 ++++
 lib/sbi/sbi_trap.c           |  4 ++++
 7 files changed, 46 insertions(+), 1 deletion(-)
 create mode 100644 lib/sbi/sbi_double_trap.c

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 980abdbed6c..22644274555 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -216,6 +216,7 @@
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
 #define ENVCFG_ADUE			(_ULL(1) << 61)
 #define ENVCFG_CDE			(_ULL(1) << 60)
+#define ENVCFG_DTE			(_ULL(1) << 59)
 #define ENVCFG_PMM			(_ULL(0x3) << 32)
 #define ENVCFG_PMM_PMLEN_0		(_ULL(0x0) << 32)
 #define ENVCFG_PMM_PMLEN_7		(_ULL(0x2) << 32)
@@ -773,7 +774,8 @@
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd
 #define CAUSE_STORE_PAGE_FAULT		0xf
-#define CAUSE_SW_CHECK_EXCP			0x12
+#define CAUSE_DOUBLE_TRAP		0x10
+#define CAUSE_SW_CHECK_EXCP		0x12
 #define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
 #define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
 #define CAUSE_VIRTUAL_INST_FAULT	0x16
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index 22d83275fc0..4c36c7785aa 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -73,6 +73,8 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_ZICFILP,
 	/** HART has zicfiss extension */
 	SBI_HART_EXT_ZICFISS,
+	/** Hart has Ssdbltrp extension */
+	SBI_HART_EXT_SSDBLTRP,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
diff --git a/include/sbi/sbi_trap_ldst.h b/include/sbi/sbi_trap_ldst.h
index 8aee31643f7..4c5cc375f53 100644
--- a/include/sbi/sbi_trap_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -28,4 +28,6 @@ int sbi_load_access_handler(struct sbi_trap_context *tcntx);
 
 int sbi_store_access_handler(struct sbi_trap_context *tcntx);
 
+int sbi_double_trap_handler(struct sbi_trap_context *tcntx);
+
 #endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 0b114bbddea..a6f7c5fa7b8 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -67,6 +67,7 @@ libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_domain_context.o
 libsbi-objs-y += sbi_domain_data.o
 libsbi-objs-y += sbi_domain.o
+libsbi-objs-y += sbi_double_trap.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_fwft.o
diff --git a/lib/sbi/sbi_double_trap.c b/lib/sbi/sbi_double_trap.c
new file mode 100644
index 00000000000..96f2fa55338
--- /dev/null
+++ b/lib/sbi/sbi_double_trap.c
@@ -0,0 +1,30 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Rivos Inc.
+ *
+ * Authors:
+ *   Clément Léger <clement.leger@rivosinc.com>
+ */
+
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_sse.h>
+#include <sbi/sbi_trap.h>
+
+int sbi_double_trap_handler(struct sbi_trap_context *tcntx)
+{
+	struct sbi_trap_regs *regs = &tcntx->regs;
+	const struct sbi_trap_info *trap = &tcntx->trap;
+	bool prev_virt = sbi_regs_from_virt(regs);
+
+	if (sbi_mstatus_prev_mode(regs->mstatus) != PRV_S)
+		return SBI_ERR_INVALID_PARAM;
+
+	/* Exception was taken in VS-mode, redirect it to S-mode */
+	if (prev_virt)
+		return sbi_trap_redirect(regs, trap);
+
+	return SBI_ENOTSUPP;
+}
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d9aef31a696..dc0863a3aee 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -117,6 +117,9 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		menvcfg_val |= ((uint64_t)csr_read(CSR_MENVCFGH)) << 32;
 #endif
 
+		/* Disable double trap by default */
+		menvcfg_val &= ~ENVCFG_DTE;
+
 #define __set_menvcfg_ext(__ext, __bits)				\
 		if (sbi_hart_has_extension(scratch, __ext))		\
 			menvcfg_val |= __bits;
@@ -684,6 +687,7 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
 	__SBI_HART_EXT_DATA(smnpm, SBI_HART_EXT_SMNPM),
 	__SBI_HART_EXT_DATA(zicfilp, SBI_HART_EXT_ZICFILP),
 	__SBI_HART_EXT_DATA(zicfiss, SBI_HART_EXT_ZICFISS),
+	__SBI_HART_EXT_DATA(ssdbltrp, SBI_HART_EXT_SSDBLTRP),
 };
 
 _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),
diff --git a/lib/sbi/sbi_trap.c b/lib/sbi/sbi_trap.c
index fd70e67a411..d2de0c8fc7d 100644
--- a/lib/sbi/sbi_trap.c
+++ b/lib/sbi/sbi_trap.c
@@ -350,6 +350,10 @@ struct sbi_trap_context *sbi_trap_handler(struct sbi_trap_context *tcntx)
 		rc  = sbi_store_access_handler(tcntx);
 		msg = "store fault handler failed";
 		break;
+	case CAUSE_DOUBLE_TRAP:
+		rc  = sbi_double_trap_handler(tcntx);
+		msg = "double trap handler failed";
+		break;
 	default:
 		/* If the trap came from S or U mode, redirect it there */
 		msg = "trap redirect failed";

From b0a7e4b85301a59f717cb420e3db1006b6fdfb6b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:05 +0200
Subject: [PATCH 1698/1765] lib: sbi: send a double trap SSE event to
 supervisor
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

In case the double trap handler is called and the double trap happened
in supervisor mode, send a double trap SSE event.

NOTE: this commit depends on the ratification of the new SSE event
id for double trap [1].

Link: https://lists.riscv.org/g/tech-prs/message/985 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/sbi_ecall_interface.h | 1 +
 lib/sbi/sbi_double_trap.c         | 2 +-
 lib/sbi/sbi_sse.c                 | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 321039f85f8..3aa574669e7 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -382,6 +382,7 @@ enum sbi_sse_state {
 
 /* SBI SSE Event IDs. */
 #define SBI_SSE_EVENT_LOCAL_RAS			0x00000000
+#define SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP		0x00000001
 #define SBI_SSE_EVENT_LOCAL_PLAT_0_START	0x00004000
 #define SBI_SSE_EVENT_LOCAL_PLAT_0_END		0x00007fff
 #define SBI_SSE_EVENT_GLOBAL_RAS		0x00008000
diff --git a/lib/sbi/sbi_double_trap.c b/lib/sbi/sbi_double_trap.c
index 96f2fa55338..bab96fb737f 100644
--- a/lib/sbi/sbi_double_trap.c
+++ b/lib/sbi/sbi_double_trap.c
@@ -26,5 +26,5 @@ int sbi_double_trap_handler(struct sbi_trap_context *tcntx)
 	if (prev_virt)
 		return sbi_trap_redirect(regs, trap);
 
-	return SBI_ENOTSUPP;
+	return sbi_sse_inject_event(SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP);
 }
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index 94071f998b9..bf5620e8d89 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -41,6 +41,7 @@
 
 static const uint32_t supported_events[] = {
 	SBI_SSE_EVENT_LOCAL_RAS,
+	SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP,
 	SBI_SSE_EVENT_GLOBAL_RAS,
 	SBI_SSE_EVENT_LOCAL_PMU,
 	SBI_SSE_EVENT_LOCAL_SOFTWARE,

From b2f77f5fa839ab8d55be295b5681848299c9e758 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:06 +0200
Subject: [PATCH 1699/1765] lib: sbi: fwft: factorize menvcfg read/write
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

MENVCFG access will be used as well for double trap, landing pad and
shadow stack fwft support. Factorize that in a common function.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/riscv_encoding.h |  9 ++--
 lib/sbi/sbi_fwft.c           | 94 +++++++++++++++---------------------
 2 files changed, 46 insertions(+), 57 deletions(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 22644274555..fd34ba7627f 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -214,7 +214,8 @@
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
-#define ENVCFG_ADUE			(_ULL(1) << 61)
+#define ENVCFG_ADUE_SHIFT		61
+#define ENVCFG_ADUE			(_ULL(1) << ENVCFG_ADUE_SHIFT)
 #define ENVCFG_CDE			(_ULL(1) << 60)
 #define ENVCFG_DTE			(_ULL(1) << 59)
 #define ENVCFG_PMM			(_ULL(0x3) << 32)
@@ -228,8 +229,10 @@
 #define ENVCFG_CBIE_ILL			_UL(0x0)
 #define ENVCFG_CBIE_FLUSH		_UL(0x1)
 #define ENVCFG_CBIE_INV			_UL(0x3)
-#define ENVCFG_SSE			(_UL(1) << 3)
-#define ENVCFG_LPE			(_UL(1) << 2)
+#define ENVCFG_SSE_SHIFT		3
+#define ENVCFG_SSE			(_UL(1) << ENVCFG_SSE_SHIFT)
+#define ENVCFG_LPE_SHIFT		2
+#define ENVCFG_LPE			(_UL(1) << ENVCFG_LPE_SHIFT)
 #define ENVCFG_FIOM			_UL(0x1)
 
 /* ===== User-level CSRs ===== */
diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index 124a043acff..9ee0d074beb 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -74,6 +74,40 @@ static bool fwft_is_defined_feature(enum sbi_fwft_feature_t feature)
 	return false;
 }
 
+static int fwft_menvcfg_set_bit(unsigned long value, unsigned long bit)
+{
+	if (value == 1) {
+		if (bit >= 32 && __riscv_xlen == 32)
+			csr_set(CSR_MENVCFGH, _ULL(1) << (bit - 32));
+		else
+			csr_set(CSR_MENVCFG, _ULL(1) << bit);
+
+	} else if (value == 0) {
+		if (bit >= 32 && __riscv_xlen == 32)
+			csr_clear(CSR_MENVCFGH, _ULL(1) << (bit - 32));
+		else
+			csr_clear(CSR_MENVCFG, _ULL(1) << bit);
+	} else {
+		return SBI_EINVAL;
+	}
+
+	return SBI_OK;
+}
+
+static int fwft_menvcfg_read_bit(unsigned long *value, unsigned long bit)
+{
+	unsigned long cfg;
+
+	if (bit >= 32 && __riscv_xlen == 32)
+		cfg = csr_read(CSR_MENVCFGH) & (_ULL(1) << (bit - 32));
+	else
+		cfg = csr_read(CSR_MENVCFG) & (_ULL(1) << bit);
+
+	*value = cfg != 0;
+
+	return SBI_OK;
+}
+
 static int fwft_misaligned_delegation_supported(struct fwft_config *conf)
 {
 	if (!misa_extension('S'))
@@ -114,36 +148,12 @@ static int fwft_adue_supported(struct fwft_config *conf)
 
 static int fwft_set_adue(struct fwft_config *conf, unsigned long value)
 {
-	if (value == 1)
-#if __riscv_xlen == 32
-		csr_set(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
-#else
-		csr_set(CSR_MENVCFG, ENVCFG_ADUE);
-#endif
-	else if (value == 0)
-#if __riscv_xlen == 32
-		csr_clear(CSR_MENVCFGH, ENVCFG_ADUE >> 32);
-#else
-		csr_clear(CSR_MENVCFG, ENVCFG_ADUE);
-#endif
-	else
-		return SBI_EINVAL;
-
-	return SBI_OK;
+	return fwft_menvcfg_set_bit(value, ENVCFG_ADUE_SHIFT);
 }
 
 static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)
 {
-	unsigned long cfg;
-
-#if __riscv_xlen == 32
-	cfg = csr_read(CSR_MENVCFGH) & (ENVCFG_ADUE >> 32);
-#else
-	cfg = csr_read(CSR_MENVCFG) & ENVCFG_ADUE;
-#endif
-	*value = cfg != 0;
-
-	return SBI_OK;
+	return fwft_menvcfg_read_bit(value, ENVCFG_ADUE_SHIFT);
 }
 
 static int fwft_lpad_supported(struct fwft_config *conf)
@@ -157,24 +167,12 @@ static int fwft_lpad_supported(struct fwft_config *conf)
 
 static int fwft_enable_lpad(struct fwft_config *conf, unsigned long value)
 {
-	if (value == 1)
-		csr_set(CSR_MENVCFG, ENVCFG_LPE);
-	else if (value == 0)
-		csr_clear(CSR_MENVCFG, ENVCFG_LPE);
-	else
-		return SBI_EINVAL;
-
-	return SBI_OK;
+	return fwft_menvcfg_set_bit(value, ENVCFG_LPE_SHIFT);
 }
 
 static int fwft_get_lpad(struct fwft_config *conf, unsigned long *value)
 {
-	unsigned long cfg;
-
-	cfg = csr_read(CSR_MENVCFG) & ENVCFG_LPE;
-	*value = cfg != 0;
-
-	return SBI_OK;
+	return fwft_menvcfg_read_bit(value, ENVCFG_LPE_SHIFT);
 }
 
 static int fwft_sstack_supported(struct fwft_config *conf)
@@ -188,24 +186,12 @@ static int fwft_sstack_supported(struct fwft_config *conf)
 
 static int fwft_enable_sstack(struct fwft_config *conf, unsigned long value)
 {
-	if (value == 1)
-		csr_set(CSR_MENVCFG, ENVCFG_SSE);
-	else if (value == 0)
-		csr_clear(CSR_MENVCFG, ENVCFG_SSE);
-	else
-		return SBI_EINVAL;
-
-	return SBI_OK;
+	return fwft_menvcfg_set_bit(value, ENVCFG_SSE_SHIFT);
 }
 
 static int fwft_get_sstack(struct fwft_config *conf, unsigned long *value)
 {
-	unsigned long cfg;
-
-	cfg = csr_read(CSR_MENVCFG) & ENVCFG_SSE;
-	*value = cfg != 0;
-
-	return SBI_OK;
+	return fwft_menvcfg_read_bit(value, ENVCFG_SSE_SHIFT);
 }
 
 #if __riscv_xlen > 32

From 3bc86854ab5e26de580433cf67ed47bae148d777 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:07 +0200
Subject: [PATCH 1700/1765] lib: sbi: implement firmware feature
 SBI_FWFT_DOUBLE_TRAP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add support for double trap firmware feature.

Link: https://lists.riscv.org/g/tech-prs/message/985 [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 include/sbi/riscv_encoding.h |  3 ++-
 lib/sbi/sbi_fwft.c           | 25 +++++++++++++++++++++++++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index fd34ba7627f..174cc9c1654 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -217,7 +217,8 @@
 #define ENVCFG_ADUE_SHIFT		61
 #define ENVCFG_ADUE			(_ULL(1) << ENVCFG_ADUE_SHIFT)
 #define ENVCFG_CDE			(_ULL(1) << 60)
-#define ENVCFG_DTE			(_ULL(1) << 59)
+#define ENVCFG_DTE_SHIFT		59
+#define ENVCFG_DTE			(_ULL(1) << ENVCFG_DTE_SHIFT)
 #define ENVCFG_PMM			(_ULL(0x3) << 32)
 #define ENVCFG_PMM_PMLEN_0		(_ULL(0x0) << 32)
 #define ENVCFG_PMM_PMLEN_7		(_ULL(0x2) << 32)
diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index 9ee0d074beb..9cf14c16663 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -137,6 +137,25 @@ static int fwft_get_misaligned_delegation(struct fwft_config *conf,
 	return SBI_OK;
 }
 
+static int fwft_double_trap_supported(struct fwft_config *conf)
+{
+	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
+				    SBI_HART_EXT_SSDBLTRP))
+		return SBI_ENOTSUPP;
+
+	return SBI_OK;
+}
+
+static int fwft_set_double_trap(struct fwft_config *conf, unsigned long value)
+{
+	return fwft_menvcfg_set_bit(value, ENVCFG_DTE_SHIFT);
+}
+
+static int fwft_get_double_trap(struct fwft_config *conf, unsigned long *value)
+{
+	return fwft_menvcfg_read_bit(value, ENVCFG_DTE_SHIFT);
+}
+
 static int fwft_adue_supported(struct fwft_config *conf)
 {
 	if (!sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
@@ -349,6 +368,12 @@ static const struct fwft_feature features[] =
 		.set = fwft_enable_sstack,
 		.get = fwft_get_sstack,
 	},
+	{
+		.id = SBI_FWFT_DOUBLE_TRAP,
+		.supported = fwft_double_trap_supported,
+		.set = fwft_set_double_trap,
+		.get = fwft_get_double_trap,
+	},
 	{
 		.id = SBI_FWFT_PTE_AD_HW_UPDATING,
 		.supported = fwft_adue_supported,

From c46a937fd9071660979ff68e5c6310e62c9d1770 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= <cleger@rivosinc.com>
Date: Fri, 18 Oct 2024 10:40:08 +0200
Subject: [PATCH 1701/1765] lib: sbi: add Smdbltrp ISA extension support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add support for the Smdbltrp[1] ISA extension. First thing to do is
clearing MDT on entry after setting the first MTVEC (since MDT is
reset to 1). Additionally, during trap handling, clear MDT once all
critical CSRs have been saved and in return path, restore MSTATUS/H
before restoring MEPC to avoid taking another trap which would clobber
it.

Link: https://github.com/riscv/riscv-double-trap/releases/download/v0.56/riscv-double-trap.pdf [1]
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
---
 firmware/fw_base.S           | 37 +++++++++++++++++++++++++++++++-----
 include/sbi/riscv_encoding.h |  4 +++-
 2 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index 4a2652e9ba4..d027e5e2244 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -31,6 +31,16 @@
 	add	\__d4, \__s4, zero
 .endm
 
+.macro CLEAR_MDT tmp
+#if __riscv_xlen == 32
+	li 	\tmp, MSTATUSH_MDT
+	csrc	CSR_MSTATUSH, \tmp
+#else
+	li 	\tmp, MSTATUS_MDT
+	csrc	CSR_MSTATUS, \tmp
+#endif
+.endm
+
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _start
@@ -91,6 +101,14 @@ _bss_zero:
 	lla	s4, _start_hang
 	csrw	CSR_MTVEC, s4
 
+	/*
+	 * While at this point, trap handling is rudimentary, if a trap happens,
+	 * it will end up in _start_hang which is enough to hook up a GDB. Clear
+	 * MDT to avoid generating a double trap and thus entering a
+	 * critical-error state.
+	 */
+	CLEAR_MDT t0
+
 	/* Setup temporary stack */
 	lla	s4, _fw_end
 	li	s5, (SBI_SCRATCH_SIZE * 2)
@@ -348,6 +366,9 @@ _start_warm:
 _skip_trap_handler_hyp:
 	csrw	CSR_MTVEC, a4
 
+	/* Clear MDT here again for all harts */
+	CLEAR_MDT t0
+
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH
 	call	sbi_init
@@ -545,6 +566,9 @@ memcmp:
 	li	t0, 0
 .endif
 	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(gva))(sp)
+
+	/* We are ready to take another trap, clear MDT */
+	CLEAR_MDT t0
 .endm
 
 .macro	TRAP_CALL_C_ROUTINE
@@ -587,15 +611,18 @@ memcmp:
 .endm
 
 .macro	TRAP_RESTORE_MEPC_MSTATUS have_mstatush
-	/* Restore MEPC and MSTATUS CSRs */
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(a0)
-	csrw	CSR_MEPC, t0
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)
-	csrw	CSR_MSTATUS, t0
+	/*
+	 * Restore MSTATUS and MEPC CSRs starting with MSTATUS/H to set MDT
+	 * flags since we can not take a trap now or MEPC would be cloberred
+	 */
 	.if \have_mstatush
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(a0)
 	csrw	CSR_MSTATUSH, t0
 	.endif
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)
+	csrw	CSR_MSTATUS, t0
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(a0)
+	csrw	CSR_MEPC, t0
 .endm
 
 .macro TRAP_RESTORE_A0_T0
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 174cc9c1654..38997ef486a 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -42,7 +42,8 @@
 #define MSTATUS_GVA			_ULL(0x0000004000000000)
 #define MSTATUS_GVA_SHIFT		38
 #define MSTATUS_MPV			_ULL(0x0000008000000000)
-#define MSTATUS_MPELP		_ULL(0x0000020000000000)
+#define MSTATUS_MPELP			_ULL(0x0000020000000000)
+#define MSTATUS_MDT			_ULL(0x0000040000000000)
 #else
 #define MSTATUSH_SBE			_UL(0x00000010)
 #define MSTATUSH_MBE			_UL(0x00000020)
@@ -50,6 +51,7 @@
 #define MSTATUSH_GVA_SHIFT		6
 #define MSTATUSH_MPV			_UL(0x00000080)
 #define MSTATUSH_MPELP			_UL(0x00000200)
+#define MSTATUSH_MDT			_UL(0x00000400)
 #endif
 #define MSTATUS32_SD			_UL(0x80000000)
 #define MSTATUS64_SD			_ULL(0x8000000000000000)

From 3e0c170397074c32f733ac2681e8a077f8d7a814 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 25 Oct 2024 11:36:22 -0700
Subject: [PATCH 1702/1765] lib: utils/gpio: designware: Allocate chips on the
 heap

This reduces firmware size for SoCs which do not use this driver.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/fdt_gpio_designware.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
index 20701a151c9..b5baf1c13d4 100644
--- a/lib/utils/gpio/fdt_gpio_designware.c
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -13,11 +13,11 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/gpio/fdt_gpio.h>
 
-#define DW_GPIO_CHIP_MAX	4	/* need 1 per bank in use */
 #define DW_GPIO_PINS_MAX	32
 
 #define DW_GPIO_DDR	0x4
@@ -32,9 +32,6 @@ struct dw_gpio_chip {
 
 extern struct fdt_gpio fdt_gpio_designware;
 
-static unsigned int dw_gpio_chip_count;
-static struct dw_gpio_chip dw_gpio_chip_array[DW_GPIO_CHIP_MAX];
-
 #define pin_to_chip(__p) container_of((__p)->chip, struct dw_gpio_chip, chip);
 
 static int dw_gpio_direction_output(struct gpio_pin *gp, int value)
@@ -86,9 +83,6 @@ static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
 	uint64_t addr;
 	int rc, poff, nr_pins, bank, len;
 
-	if (dw_gpio_chip_count >= DW_GPIO_CHIP_MAX)
-		return SBI_ENOSPC;
-
 	/* need to get parent for the address property  */
 	poff = fdt_parent_offset(fdt, nodeoff);
 	if (poff < 0)
@@ -110,7 +104,9 @@ static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
 		return SBI_EINVAL;
 	nr_pins = fdt32_to_cpu(*val);
 
-	chip = &dw_gpio_chip_array[dw_gpio_chip_count];
+	chip = sbi_zalloc(sizeof(*chip));
+	if (!chip)
+		return SBI_ENOMEM;
 
 	chip->dr = (void *)(uintptr_t)addr + (bank * 0xc);
 	chip->ext = (void *)(uintptr_t)addr + (bank * 4) + 0x50;
@@ -121,10 +117,13 @@ static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
 	chip->chip.direction_output = dw_gpio_direction_output;
 	rc = gpio_chip_add(&chip->chip);
 	if (rc)
-		return rc;
+		goto err_free_chip;
 
-	dw_gpio_chip_count++;
 	return 0;
+
+err_free_chip:
+	sbi_free(chip);
+	return rc;
 }
 
 /* since we're only probed when used, match on port not main controller node */

From 62447cd7aa17097cefdb0d7a2f1312ff55fcda27 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 25 Oct 2024 11:45:47 -0700
Subject: [PATCH 1703/1765] include: sbi: Optimize reads of mhartid and
 mscratch

csr_read() is marked as volatile and clobbering memory, which is
generally the safe thing to do. However, these two CSRs do not have any
side effects, and the values returned do not change between calls. The
compiler can generate better code if we allow it to reorder calls to
these functions and cache the return value. Introduce csr_read_relaxed()
for this use case.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/riscv_asm.h   | 10 +++++++++-
 include/sbi/sbi_scratch.h |  2 +-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 2c34635a393..4605db20bd7 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -101,6 +101,14 @@
 		__v;                                            \
 	})
 
+/* Variant of csr_read() that allows the compiler to cache the value. */
+#define csr_read_relaxed(csr)                                     \
+	({                                                        \
+		register unsigned long __v;                       \
+		__asm__ ("csrr %0, " __ASM_STR(csr) : "=r"(__v)); \
+		__v;                                              \
+	})
+
 #define csr_write(csr, val)                                        \
 	({                                                         \
 		unsigned long __v = (unsigned long)(val);          \
@@ -163,7 +171,7 @@ void csr_write_num(int csr_num, unsigned long val);
 	} while (0)
 
 /* Get current HART id */
-#define current_hartid()	((unsigned int)csr_read(CSR_MHARTID))
+#define current_hartid()	((unsigned int)csr_read_relaxed(CSR_MHARTID))
 
 /* determine CPU extension, return non-zero support */
 int misa_extension_imp(char ext);
diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 9ae4f891387..9cd7b0d6535 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -159,7 +159,7 @@ enum sbi_scratch_options {
 
 /** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr() \
-	((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
+	((struct sbi_scratch *)csr_read_relaxed(CSR_MSCRATCH))
 
 /** Get Arg1 of next booting stage for current HART */
 #define sbi_scratch_thishart_arg1_ptr() \

From 1a2e507d2347500e6c994e005fb9725b2a9a8e8f Mon Sep 17 00:00:00 2001
From: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Date: Mon, 2 Sep 2024 13:21:10 +0300
Subject: [PATCH 1704/1765] lib: sbi: fix number of PMP entries detection

CSR_PMPADDRn lower bits may read all-0 or all-1, depending on
the configuration. For TOR it is all-0, for NAPOT - all-1.

Thus if PMP entry was pre-configured as NAPOT, original code would
stop scanning because value read back not equal to the written one.

Mask lower bits before comparison to fix this

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_hart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index dc0863a3aee..0451fcb5936 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -825,7 +825,7 @@ static int hart_detect_features(struct sbi_scratch *scratch)
 		} else {						\
 			csr_write_allowed(__csr, &trap, __wrval);	\
 			if (!trap.cause) {				\
-				if (csr_swap(__csr, oldval) == __wrval)	\
+				if ((csr_swap(__csr, oldval) & __wrval) == __wrval)	\
 					(hfeatures->__field)++;		\
 				else					\
 					goto __skip;			\

From 450082874346bb25109877b7ac6a1754f089f538 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 2 Sep 2024 21:06:49 -0700
Subject: [PATCH 1705/1765] lib: sbi_timer: Call driver warm_init from SBI core

Currently, the platform's timer device is tracked in two places: the
core SBI implementation has `timer_dev`, and the FDT timer layer has
`current_driver`. The latter is used for warm initialization of the
timer device. However, this warm init is not specific to FDT-based
platforms; other platforms call exactly the same functions from the
same point in the boot sequence.

The code is simplified and made common across platforms by treating warm
init and exit as properties of the driver, not the platform. Then the
platform's only role is to select and prepare a driver during cold boot.

For now, only add a .warm_init hook, since none of the existing drivers
need an .exit hook. It could be added in the future if needed.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_timer.h                 |  3 +++
 include/sbi_utils/timer/aclint_mtimer.h |  2 --
 include/sbi_utils/timer/andes_plmt.h    |  1 -
 lib/sbi/sbi_timer.c                     | 13 ++++++++++++-
 lib/utils/timer/aclint_mtimer.c         |  3 ++-
 lib/utils/timer/andes_plmt.c            | 23 ++++++++++++-----------
 lib/utils/timer/fdt_timer_mtimer.c      |  2 +-
 lib/utils/timer/fdt_timer_plmt.c        |  2 +-
 platform/fpga/ariane/platform.c         |  2 +-
 platform/fpga/openpiton/platform.c      |  2 +-
 platform/kendryte/k210/platform.c       |  2 +-
 platform/nuclei/ux600/platform.c        |  2 +-
 platform/template/platform.c            |  2 +-
 13 files changed, 36 insertions(+), 23 deletions(-)

diff --git a/include/sbi/sbi_timer.h b/include/sbi/sbi_timer.h
index ac2c7be59f6..2e1a78791e3 100644
--- a/include/sbi/sbi_timer.h
+++ b/include/sbi/sbi_timer.h
@@ -28,6 +28,9 @@ struct sbi_timer_device {
 
 	/** Stop timer event for current HART */
 	void (*timer_event_stop)(void);
+
+	/** Initialize timer device for current HART */
+	int (*warm_init)(void);
 };
 
 struct sbi_scratch;
diff --git a/include/sbi_utils/timer/aclint_mtimer.h b/include/sbi_utils/timer/aclint_mtimer.h
index 6ab8799c9bf..a245e13e285 100644
--- a/include/sbi_utils/timer/aclint_mtimer.h
+++ b/include/sbi_utils/timer/aclint_mtimer.h
@@ -47,8 +47,6 @@ void aclint_mtimer_sync(struct aclint_mtimer_data *mt);
 void aclint_mtimer_set_reference(struct aclint_mtimer_data *mt,
 				 struct aclint_mtimer_data *ref);
 
-int aclint_mtimer_warm_init(void);
-
 int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 			    struct aclint_mtimer_data *reference);
 
diff --git a/include/sbi_utils/timer/andes_plmt.h b/include/sbi_utils/timer/andes_plmt.h
index 08bce33296a..119f1b44555 100644
--- a/include/sbi_utils/timer/andes_plmt.h
+++ b/include/sbi_utils/timer/andes_plmt.h
@@ -24,6 +24,5 @@ struct plmt_data {
 };
 
 int plmt_cold_timer_init(struct plmt_data *plmt);
-int plmt_warm_timer_init(void);
 
 #endif /* __TIMER_ANDES_PLMT_H__ */
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index 32955183fab..dee1ff19334 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -183,6 +183,7 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	u64 *time_delta;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	int ret;
 
 	if (cold_boot) {
 		time_delta_off = sbi_scratch_alloc_offset(sizeof(*time_delta));
@@ -199,7 +200,17 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
 	*time_delta = 0;
 
-	return sbi_platform_timer_init(plat, cold_boot);
+	ret = sbi_platform_timer_init(plat, cold_boot);
+	if (ret)
+		return ret;
+
+	if (timer_dev && timer_dev->warm_init) {
+		ret = timer_dev->warm_init();
+		if (ret)
+			return ret;
+	}
+
+	return 0;
 }
 
 void sbi_timer_exit(struct sbi_scratch *scratch)
diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c
index 9acb26eb7cc..3db3c3be257 100644
--- a/lib/utils/timer/aclint_mtimer.c
+++ b/lib/utils/timer/aclint_mtimer.c
@@ -143,7 +143,7 @@ void aclint_mtimer_set_reference(struct aclint_mtimer_data *mt,
 	mt->time_delta_computed = 0;
 }
 
-int aclint_mtimer_warm_init(void)
+static int aclint_mtimer_warm_init(void)
 {
 	u64 *mt_time_cmp;
 	u32 target_hart = current_hartid();
@@ -260,6 +260,7 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 	}
 
 	mtimer.timer_freq = mt->mtime_freq;
+	mtimer.warm_init = aclint_mtimer_warm_init;
 	sbi_timer_set_device(&mtimer);
 
 	return 0;
diff --git a/lib/utils/timer/andes_plmt.c b/lib/utils/timer/andes_plmt.c
index 6e4bfafe9e5..d034feb947b 100644
--- a/lib/utils/timer/andes_plmt.c
+++ b/lib/utils/timer/andes_plmt.c
@@ -67,12 +67,23 @@ static void plmt_timer_event_start(u64 next_event)
 #endif
 }
 
+static int plmt_warm_timer_init(void)
+{
+	if (!plmt.time_val)
+		return SBI_ENODEV;
+
+	plmt_timer_event_stop();
+
+	return 0;
+}
+
 static struct sbi_timer_device plmt_timer = {
 	.name		   = "andes_plmt",
 	.timer_freq	   = DEFAULT_AE350_PLMT_FREQ,
 	.timer_value	   = plmt_timer_value,
 	.timer_event_start = plmt_timer_event_start,
-	.timer_event_stop  = plmt_timer_event_stop
+	.timer_event_stop  = plmt_timer_event_stop,
+	.warm_init	   = plmt_warm_timer_init,
 };
 
 int plmt_cold_timer_init(struct plmt_data *plmt)
@@ -95,13 +106,3 @@ int plmt_cold_timer_init(struct plmt_data *plmt)
 
 	return 0;
 }
-
-int plmt_warm_timer_init(void)
-{
-	if (!plmt.time_val)
-		return SBI_ENODEV;
-
-	plmt_timer_event_stop();
-
-	return 0;
-}
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index 458e8881a1e..eff50417a7e 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -165,6 +165,6 @@ static const struct fdt_match timer_mtimer_match[] = {
 struct fdt_timer fdt_timer_mtimer = {
 	.match_table = timer_mtimer_match,
 	.cold_init = timer_mtimer_cold_init,
-	.warm_init = aclint_mtimer_warm_init,
+	.warm_init = NULL,
 	.exit = NULL,
 };
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c
index 88a42e2aa8d..87e634bd2a8 100644
--- a/lib/utils/timer/fdt_timer_plmt.c
+++ b/lib/utils/timer/fdt_timer_plmt.c
@@ -46,6 +46,6 @@ static const struct fdt_match timer_plmt_match[] = {
 struct fdt_timer fdt_timer_plmt = {
 	.match_table = timer_plmt_match,
 	.cold_init   = fdt_plmt_cold_timer_init,
-	.warm_init   = plmt_warm_timer_init,
+	.warm_init   = NULL,
 	.exit	     = NULL,
 };
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index ec0584ab45d..c895cb47da8 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -159,7 +159,7 @@ static int ariane_timer_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mtimer_warm_init();
+	return 0;
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 81cc48f4a3a..ea0a47992a6 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -190,7 +190,7 @@ static int openpiton_timer_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mtimer_warm_init();
+	return 0;
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 2f3f70792a0..82dd08098da 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -169,7 +169,7 @@ static int k210_timer_init(bool cold_boot)
 			return rc;
 	}
 
-	return aclint_mtimer_warm_init();
+	return 0;
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 5610e7c7f29..b17c1df2fae 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -225,7 +225,7 @@ static int ux600_timer_init(bool cold_boot)
 			return rc;
 	}
 
-	return aclint_mtimer_warm_init();
+	return 0;
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/template/platform.c b/platform/template/platform.c
index b4d30a57a39..1238a8d64dc 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -129,7 +129,7 @@ static int platform_timer_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mtimer_warm_init();
+	return 0;
 }
 
 /*

From 99b01ab610acf6ff7c3d0199f13f5b41322a22e2 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 2 Sep 2024 21:06:50 -0700
Subject: [PATCH 1706/1765] platform: Drop timer warm init and exit hooks

Now that driver lifecycle is managed from within the SBI timer core,
platforms need only to initialize the driver once during cold init.
Remove the remaining platform hooks that are no longer used.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h          | 25 +++++------------------
 include/sbi_utils/timer/fdt_timer.h |  9 ++-------
 lib/sbi/sbi_timer.c                 | 10 ++++------
 lib/utils/timer/fdt_timer.c         | 31 +----------------------------
 lib/utils/timer/fdt_timer_mtimer.c  |  2 --
 lib/utils/timer/fdt_timer_plmt.c    |  2 --
 platform/fpga/ariane/platform.c     | 14 +++----------
 platform/fpga/openpiton/platform.c  | 14 +++----------
 platform/generic/platform.c         |  1 -
 platform/kendryte/k210/platform.c   | 12 ++---------
 platform/nuclei/ux600/platform.c    | 12 ++---------
 platform/template/platform.c        | 14 +++----------
 12 files changed, 25 insertions(+), 121 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 7b3ac4bf077..d7af3093440 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -127,10 +127,8 @@ struct sbi_platform_operations {
 	/** Get tlb fifo num entries*/
 	u32 (*get_tlb_num_entries)(void);
 
-	/** Initialize platform timer for current HART */
-	int (*timer_init)(bool cold_boot);
-	/** Exit platform timer for current HART */
-	void (*timer_exit)(void);
+	/** Initialize platform timer during cold boot */
+	int (*timer_init)(void);
 
 	/** Check if SBI vendor extension is implemented or not */
 	bool (*vendor_ext_check)(void);
@@ -601,32 +599,19 @@ static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
 }
 
 /**
- * Initialize the platform timer for current HART
+ * Initialize the platform timer during cold boot
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
-					  bool cold_boot)
+static inline int sbi_platform_timer_init(const struct sbi_platform *plat)
 {
 	if (plat && sbi_platform_ops(plat)->timer_init)
-		return sbi_platform_ops(plat)->timer_init(cold_boot);
+		return sbi_platform_ops(plat)->timer_init();
 	return 0;
 }
 
-/**
- * Exit the platform timer for current HART
- *
- * @param plat pointer to struct sbi_platform
- */
-static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->timer_exit)
-		sbi_platform_ops(plat)->timer_exit();
-}
-
 /**
  * Check if SBI vendor extension is implemented or not.
  *
diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
index 555ebcba9ee..8f0469dac5e 100644
--- a/include/sbi_utils/timer/fdt_timer.h
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -17,18 +17,13 @@
 struct fdt_timer {
 	const struct fdt_match *match_table;
 	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-	int (*warm_init)(void);
-	void (*exit)(void);
 };
 
-void fdt_timer_exit(void);
-
-int fdt_timer_init(bool cold_boot);
+int fdt_timer_init(void);
 
 #else
 
-static inline void fdt_timer_exit(void) { }
-static inline int fdt_timer_init(bool cold_boot) { return 0; }
+static inline int fdt_timer_init(void) { return 0; }
 
 #endif
 
diff --git a/lib/sbi/sbi_timer.c b/lib/sbi/sbi_timer.c
index dee1ff19334..86e0db5ab39 100644
--- a/lib/sbi/sbi_timer.c
+++ b/lib/sbi/sbi_timer.c
@@ -192,6 +192,10 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 
 		if (sbi_hart_has_extension(scratch, SBI_HART_EXT_ZICNTR))
 			get_time_val = get_ticks;
+
+		ret = sbi_platform_timer_init(plat);
+		if (ret)
+			return ret;
 	} else {
 		if (!time_delta_off)
 			return SBI_ENOMEM;
@@ -200,10 +204,6 @@ int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
 	time_delta = sbi_scratch_offset_ptr(scratch, time_delta_off);
 	*time_delta = 0;
 
-	ret = sbi_platform_timer_init(plat, cold_boot);
-	if (ret)
-		return ret;
-
 	if (timer_dev && timer_dev->warm_init) {
 		ret = timer_dev->warm_init();
 		if (ret)
@@ -220,6 +220,4 @@ void sbi_timer_exit(struct sbi_scratch *scratch)
 
 	csr_clear(CSR_MIP, MIP_STIP);
 	csr_clear(CSR_MIE, MIP_MTIP);
-
-	sbi_platform_timer_exit(sbi_platform_ptr(scratch));
 }
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index aa0494e4375..37965f5ef86 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -16,22 +16,7 @@
 extern struct fdt_timer *fdt_timer_drivers[];
 extern unsigned long fdt_timer_drivers_size;
 
-static struct fdt_timer *current_driver = NULL;
-
-void fdt_timer_exit(void)
-{
-	if (current_driver && current_driver->exit)
-		current_driver->exit();
-}
-
-static int fdt_timer_warm_init(void)
-{
-	if (current_driver && current_driver->warm_init)
-		return current_driver->warm_init();
-	return 0;
-}
-
-static int fdt_timer_cold_init(void)
+int fdt_timer_init(void)
 {
 	int pos, noff, rc;
 	struct fdt_timer *drv;
@@ -56,7 +41,6 @@ static int fdt_timer_cold_init(void)
 				continue;
 			if (rc)
 				return rc;
-			current_driver = drv;
 
 			/*
 			 * We will have multiple timer devices on multi-die or
@@ -71,16 +55,3 @@ static int fdt_timer_cold_init(void)
 	 */
 	return 0;
 }
-
-int fdt_timer_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = fdt_timer_cold_init();
-		if (rc)
-			return rc;
-	}
-
-	return fdt_timer_warm_init();
-}
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index eff50417a7e..e752ddc59d1 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -165,6 +165,4 @@ static const struct fdt_match timer_mtimer_match[] = {
 struct fdt_timer fdt_timer_mtimer = {
 	.match_table = timer_mtimer_match,
 	.cold_init = timer_mtimer_cold_init,
-	.warm_init = NULL,
-	.exit = NULL,
 };
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c
index 87e634bd2a8..459a11902c5 100644
--- a/lib/utils/timer/fdt_timer_plmt.c
+++ b/lib/utils/timer/fdt_timer_plmt.c
@@ -46,6 +46,4 @@ static const struct fdt_match timer_plmt_match[] = {
 struct fdt_timer fdt_timer_plmt = {
 	.match_table = timer_plmt_match,
 	.cold_init   = fdt_plmt_cold_timer_init,
-	.warm_init   = NULL,
-	.exit	     = NULL,
 };
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index c895cb47da8..dfe170f9fe0 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -147,19 +147,11 @@ static int ariane_ipi_init(bool cold_boot)
 }
 
 /*
- * Initialize ariane timer for current HART.
+ * Initialize ariane timer during cold boot.
  */
-static int ariane_timer_init(bool cold_boot)
+static int ariane_timer_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = aclint_mtimer_cold_init(&mtimer, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mtimer_cold_init(&mtimer, NULL);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index ea0a47992a6..2bfc15ce7b7 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -178,19 +178,11 @@ static int openpiton_ipi_init(bool cold_boot)
 }
 
 /*
- * Initialize openpiton timer for current HART.
+ * Initialize openpiton timer during cold boot.
  */
-static int openpiton_timer_init(bool cold_boot)
+static int openpiton_timer_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = aclint_mtimer_cold_init(&mtimer, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mtimer_cold_init(&mtimer, NULL);
 }
 
 /*
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 49d877d0da0..921c494cd31 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -405,7 +405,6 @@ const struct sbi_platform_operations platform_ops = {
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
 	.get_tlb_num_entries	= generic_tlb_num_entries,
 	.timer_init		= fdt_timer_init,
-	.timer_exit		= fdt_timer_exit,
 	.vendor_ext_check	= generic_vendor_ext_check,
 	.vendor_ext_provider	= generic_vendor_ext_provider,
 };
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 82dd08098da..06b7eb74f7e 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -159,17 +159,9 @@ static int k210_ipi_init(bool cold_boot)
 	return aclint_mswi_warm_init();
 }
 
-static int k210_timer_init(bool cold_boot)
+static int k210_timer_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = aclint_mtimer_cold_init(&mtimer, NULL);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return aclint_mtimer_cold_init(&mtimer, NULL);
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index b17c1df2fae..d4f309aa096 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -215,17 +215,9 @@ static int ux600_ipi_init(bool cold_boot)
 	return aclint_mswi_warm_init();
 }
 
-static int ux600_timer_init(bool cold_boot)
+static int ux600_timer_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = aclint_mtimer_cold_init(&mtimer, NULL);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return aclint_mtimer_cold_init(&mtimer, NULL);
 }
 
 const struct sbi_platform_operations platform_ops = {
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 1238a8d64dc..1fc7b7bbe5e 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -116,20 +116,12 @@ static int platform_ipi_init(bool cold_boot)
 }
 
 /*
- * Initialize platform timer for current HART.
+ * Initialize platform timer during cold boot.
  */
-static int platform_timer_init(bool cold_boot)
+static int platform_timer_init(void)
 {
-	int ret;
-
 	/* Example if the generic ACLINT driver is used */
-	if (cold_boot) {
-		ret = aclint_mtimer_cold_init(&mtimer, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mtimer_cold_init(&mtimer, NULL);
 }
 
 /*

From 598cf961d82a12afa3ccbed9645edae2275b76f3 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 3 Sep 2024 19:09:37 -0700
Subject: [PATCH 1707/1765] lib: utils/gpio: Remove fdt_gpio_driver() function

This function looks up a chip's driver by matching known drivers against
chip->driver, but that is equivalent to using chip->driver directly.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/utils/gpio/fdt_gpio.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index d8d847f1d1c..6422c45f562 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -16,21 +16,6 @@
 extern struct fdt_gpio *fdt_gpio_drivers[];
 extern unsigned long fdt_gpio_drivers_size;
 
-static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)
-{
-	int pos;
-
-	if (!chip)
-		return NULL;
-
-	for (pos = 0; pos < fdt_gpio_drivers_size; pos++) {
-		if (chip->driver == fdt_gpio_drivers[pos])
-			return fdt_gpio_drivers[pos];
-	}
-
-	return NULL;
-}
-
 static int fdt_gpio_init(const void *fdt, u32 phandle)
 {
 	int pos, nodeoff, rc;
@@ -112,7 +97,7 @@ int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 	if (rc)
 		return rc;
 
-	drv = fdt_gpio_driver(chip);
+	drv = chip->driver;
 	if (!drv || !drv->xlate)
 		return SBI_ENOSYS;
 

From d71150ee7047c4d7ad67525731cc6271939d782c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 3 Sep 2024 19:09:38 -0700
Subject: [PATCH 1708/1765] lib: utils/gpio: Use FDT node offset as GPIO chip
 ID

Since the FDT is not modified during driver initialization, node offsets
are just as suitable as phandles for use as identifiers: they are stable
and unique. With this change, it is no longer necessary to pass the
phandle to the driver init functions, so these init functions now use
the same prototype as other kinds of drivers.

This matches what is already done for I2C adapters.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/gpio/fdt_gpio.h    |  2 +-
 lib/utils/gpio/fdt_gpio.c            | 23 ++++++++---------------
 lib/utils/gpio/fdt_gpio_designware.c |  4 ++--
 lib/utils/gpio/fdt_gpio_sifive.c     |  4 ++--
 lib/utils/gpio/fdt_gpio_starfive.c   |  4 ++--
 5 files changed, 15 insertions(+), 22 deletions(-)

diff --git a/include/sbi_utils/gpio/fdt_gpio.h b/include/sbi_utils/gpio/fdt_gpio.h
index 303ef6328a6..ab9304bf869 100644
--- a/include/sbi_utils/gpio/fdt_gpio.h
+++ b/include/sbi_utils/gpio/fdt_gpio.h
@@ -20,7 +20,7 @@ struct fdt_gpio {
 	int (*xlate)(struct gpio_chip *chip,
 		     const struct fdt_phandle_args *pargs,
 		     struct gpio_pin *out_pin);
-	int (*init)(const void *fdt, int nodeoff, u32 phandle,
+	int (*init)(const void *fdt, int nodeoff,
 		    const struct fdt_match *match);
 };
 
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index 6422c45f562..953fa13a24d 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -16,17 +16,12 @@
 extern struct fdt_gpio *fdt_gpio_drivers[];
 extern unsigned long fdt_gpio_drivers_size;
 
-static int fdt_gpio_init(const void *fdt, u32 phandle)
+static int fdt_gpio_init(const void *fdt, int nodeoff)
 {
-	int pos, nodeoff, rc;
+	int pos, rc;
 	struct fdt_gpio *drv;
 	const struct fdt_match *match;
 
-	/* Find node offset */
-	nodeoff = fdt_node_offset_by_phandle(fdt, phandle);
-	if (nodeoff < 0)
-		return nodeoff;
-
 	/* Check "gpio-controller" property */
 	if (!fdt_getprop(fdt, nodeoff, "gpio-controller", &rc))
 		return SBI_EINVAL;
@@ -37,7 +32,7 @@ static int fdt_gpio_init(const void *fdt, u32 phandle)
 
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
-			rc = drv->init(fdt, nodeoff, phandle, match);
+			rc = drv->init(fdt, nodeoff, match);
 			if (rc == SBI_ENODEV)
 				continue;
 			if (rc)
@@ -49,20 +44,20 @@ static int fdt_gpio_init(const void *fdt, u32 phandle)
 	return SBI_ENOSYS;
 }
 
-static int fdt_gpio_chip_find(const void *fdt, u32 phandle,
+static int fdt_gpio_chip_find(const void *fdt, int nodeoff,
 			      struct gpio_chip **out_chip)
 {
 	int rc;
-	struct gpio_chip *chip = gpio_chip_find(phandle);
+	struct gpio_chip *chip = gpio_chip_find(nodeoff);
 
 	if (!chip) {
 		/* GPIO chip not found so initialize matching driver */
-		rc = fdt_gpio_init(fdt, phandle);
+		rc = fdt_gpio_init(fdt, nodeoff);
 		if (rc)
 			return rc;
 
 		/* Try to find GPIO chip again */
-		chip = gpio_chip_find(phandle);
+		chip = gpio_chip_find(nodeoff);
 		if (!chip)
 			return SBI_ENOSYS;
 	}
@@ -77,7 +72,6 @@ int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 		     struct gpio_pin *out_pin)
 {
 	int rc;
-	u32 phandle;
 	struct fdt_gpio *drv;
 	struct gpio_chip *chip = NULL;
 	struct fdt_phandle_args pargs;
@@ -92,8 +86,7 @@ int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 	if (rc)
 		return rc;
 
-	phandle = fdt_get_phandle(fdt, pargs.node_offset);
-	rc = fdt_gpio_chip_find(fdt, phandle, &chip);
+	rc = fdt_gpio_chip_find(fdt, pargs.node_offset, &chip);
 	if (rc)
 		return rc;
 
diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
index b5baf1c13d4..26e0a7ce49f 100644
--- a/lib/utils/gpio/fdt_gpio_designware.c
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -75,7 +75,7 @@ static void dw_gpio_set(struct gpio_pin *gp, int value)
  * bank A is the only one with irq support but we're not using it here
 */
 
-static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
+static int dw_gpio_init_bank(const void *fdt, int nodeoff,
 			     const struct fdt_match *match)
 {
 	struct dw_gpio_chip *chip;
@@ -111,7 +111,7 @@ static int dw_gpio_init_bank(const void *fdt, int nodeoff, u32 phandle,
 	chip->dr = (void *)(uintptr_t)addr + (bank * 0xc);
 	chip->ext = (void *)(uintptr_t)addr + (bank * 4) + 0x50;
 	chip->chip.driver = &fdt_gpio_designware;
-	chip->chip.id = phandle;
+	chip->chip.id = nodeoff;
 	chip->chip.ngpio = nr_pins;
 	chip->chip.set = dw_gpio_set;
 	chip->chip.direction_output = dw_gpio_direction_output;
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index e5dbe2bec4a..d96bf7753e4 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -62,7 +62,7 @@ static void sifive_gpio_set(struct gpio_pin *gp, int value)
 
 extern struct fdt_gpio fdt_gpio_sifive;
 
-static int sifive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
+static int sifive_gpio_init(const void *fdt, int nodeoff,
 			    const struct fdt_match *match)
 {
 	int rc;
@@ -81,7 +81,7 @@ static int sifive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
 
 	chip->addr = addr;
 	chip->chip.driver = &fdt_gpio_sifive;
-	chip->chip.id = phandle;
+	chip->chip.id = nodeoff;
 	chip->chip.ngpio = SIFIVE_GPIO_PINS_DEF;
 	chip->chip.direction_output = sifive_gpio_direction_output;
 	chip->chip.set = sifive_gpio_set;
diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
index d84ff1fee76..55752425392 100644
--- a/lib/utils/gpio/fdt_gpio_starfive.c
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -71,7 +71,7 @@ static void starfive_gpio_set(struct gpio_pin *gp, int value)
 
 extern struct fdt_gpio fdt_gpio_starfive;
 
-static int starfive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
+static int starfive_gpio_init(const void *fdt, int nodeoff,
 			      const struct fdt_match *match)
 {
 	int rc;
@@ -90,7 +90,7 @@ static int starfive_gpio_init(const void *fdt, int nodeoff, u32 phandle,
 
 	chip->addr = addr;
 	chip->chip.driver = &fdt_gpio_starfive;
-	chip->chip.id = phandle;
+	chip->chip.id = nodeoff;
 	chip->chip.ngpio = STARFIVE_GPIO_PINS_DEF;
 	chip->chip.direction_output = starfive_gpio_direction_output;
 	chip->chip.set = starfive_gpio_set;

From 9782b8847dabe910d1584d79a6e1701111951354 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Tue, 3 Sep 2024 19:09:39 -0700
Subject: [PATCH 1709/1765] lib: utils/regmap: Use FDT node offset as regmap ID

Since the FDT is not modified during driver initialization, node offsets
are just as suitable as phandles for use as identifiers: they are stable
and unique. With this change, it is no longer necessary to pass the
phandle to the driver init functions, so these init functions now use
the same prototype as other kinds of drivers.

This matches what is already done for I2C adapters.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/regmap/fdt_regmap.h |  2 +-
 lib/utils/regmap/fdt_regmap.c         | 14 +++++++-------
 lib/utils/regmap/fdt_regmap_syscon.c  |  4 ++--
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/sbi_utils/regmap/fdt_regmap.h b/include/sbi_utils/regmap/fdt_regmap.h
index 86e72442810..de946f271b8 100644
--- a/include/sbi_utils/regmap/fdt_regmap.h
+++ b/include/sbi_utils/regmap/fdt_regmap.h
@@ -17,7 +17,7 @@ struct fdt_phandle_args;
 /** FDT based regmap driver */
 struct fdt_regmap {
 	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff, u32 phandle,
+	int (*init)(const void *fdt, int nodeoff,
 		    const struct fdt_match *match);
 };
 
diff --git a/lib/utils/regmap/fdt_regmap.c b/lib/utils/regmap/fdt_regmap.c
index f02d2f0706a..933938fbc1c 100644
--- a/lib/utils/regmap/fdt_regmap.c
+++ b/lib/utils/regmap/fdt_regmap.c
@@ -16,7 +16,7 @@
 extern struct fdt_regmap *fdt_regmap_drivers[];
 extern unsigned long fdt_regmap_drivers_size;
 
-static int fdt_regmap_init(const void *fdt, int nodeoff, u32 phandle)
+static int fdt_regmap_init(const void *fdt, int nodeoff)
 {
 	int pos, rc;
 	struct fdt_regmap *drv;
@@ -27,7 +27,7 @@ static int fdt_regmap_init(const void *fdt, int nodeoff, u32 phandle)
 		drv = fdt_regmap_drivers[pos];
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
-			rc = drv->init(fdt, nodeoff, phandle, match);
+			rc = drv->init(fdt, nodeoff, match);
 			if (rc == SBI_ENODEV)
 				continue;
 			if (rc)
@@ -39,20 +39,20 @@ static int fdt_regmap_init(const void *fdt, int nodeoff, u32 phandle)
 	return SBI_ENOSYS;
 }
 
-static int fdt_regmap_find(const void *fdt, int nodeoff, u32 phandle,
+static int fdt_regmap_find(const void *fdt, int nodeoff,
 			   struct regmap **out_rmap)
 {
 	int rc;
-	struct regmap *rmap = regmap_find(phandle);
+	struct regmap *rmap = regmap_find(nodeoff);
 
 	if (!rmap) {
 		/* Regmap not found so initialize matching driver */
-		rc = fdt_regmap_init(fdt, nodeoff, phandle);
+		rc = fdt_regmap_init(fdt, nodeoff);
 		if (rc)
 			return rc;
 
 		/* Try to find regmap again */
-		rmap = regmap_find(phandle);
+		rmap = regmap_find(nodeoff);
 		if (!rmap)
 			return SBI_ENOSYS;
 	}
@@ -75,7 +75,7 @@ int fdt_regmap_get_by_phandle(const void *fdt, u32 phandle,
 	if (pnodeoff < 0)
 		return pnodeoff;
 
-	return fdt_regmap_find(fdt, pnodeoff, phandle, out_rmap);
+	return fdt_regmap_find(fdt, pnodeoff, out_rmap);
 }
 
 int fdt_regmap_get(const void *fdt, int nodeoff, struct regmap **out_rmap)
diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c
index a95f251594a..ba559086869 100644
--- a/lib/utils/regmap/fdt_regmap_syscon.c
+++ b/lib/utils/regmap/fdt_regmap_syscon.c
@@ -159,7 +159,7 @@ static int regmap_syscon_write_be32(struct regmap *rmap, unsigned int reg,
 	return 0;
 }
 
-static int regmap_syscon_init(const void *fdt, int nodeoff, u32 phandle,
+static int regmap_syscon_init(const void *fdt, int nodeoff,
 			      const struct fdt_match *match)
 {
 	struct syscon_regmap *srm;
@@ -188,7 +188,7 @@ static int regmap_syscon_init(const void *fdt, int nodeoff, u32 phandle,
 		goto fail_free_syscon;
 	srm->addr = addr;
 
-	srm->rmap.id = phandle;
+	srm->rmap.id = nodeoff;
 	srm->rmap.reg_shift = 0;
 	srm->rmap.reg_stride = srm->reg_io_width * 8;
 	srm->rmap.reg_base = 0;

From 369c64517ee5c2753a33a5ff7695b4d2b6066e7b Mon Sep 17 00:00:00 2001
From: Hui Min Mina Chou <minachou@andestech.com>
Date: Mon, 16 Sep 2024 17:56:36 +0800
Subject: [PATCH 1710/1765] top: Add .editorconfig to set basic coding styles

EditorConfig [1] ensures consistent coding styles for developers
collaborating on the same project across various editors and IDEs. By
adopting the Linux project's .editorconfig settings [2] and applying
them to OpenSBI, it helps users maintain uniform indentation across
different IDEs and version control systems, improving development
efficiency.

The main difference from Linux project is the addition of
'trim_trailing_whitespace = true', which removes trailing whitespace
before newlines. This change affects only three files in OpenSBI, but
it improves overall code consistency.

 $ grep -nr "\s$" --include={*.{c,dts,h,lds,ldS,mk,s,S.py},Kconfig,Makefile,Makefile.*} .
 ./include/sbi_utils/fdt/fdt_fixup.h:4: * Implement platform specific DT fixups on top of libfdt.
 ./platform/generic/platform.c:79: * The fw_platform_coldboot_harts_init() function is called by fw_platform_init()
 ./platform/generic/platform.c:81: * according to the DT property "cold-boot-harts" in "/chosen/opensbi-config"

Link: https://editorconfig.org/ [1]
Link: https://lore.kernel.org/lkml/ZbAbmchIO8Cd5hNd@surfacebook.localdomain/T/ [2]
Signed-off-by: Hui Min Mina Chou <minachou@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 .editorconfig | 21 +++++++++++++++++++++
 .gitignore    |  1 +
 2 files changed, 22 insertions(+)
 create mode 100644 .editorconfig

diff --git a/.editorconfig b/.editorconfig
new file mode 100644
index 00000000000..e66b1ca3d6e
--- /dev/null
+++ b/.editorconfig
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# See here for more information about the format and editor support:
+# https://editorconfig.org/
+
+root = true
+
+[{*.{c,dts,h,lds,ldS,mk,s,S},Kconfig,Makefile,Makefile.*}]
+charset = utf-8
+end_of_line = lf
+trim_trailing_whitespace = true
+insert_final_newline = true
+indent_style = tab
+indent_size = 8
+
+[*.py]
+charset = utf-8
+end_of_line = lf
+trim_trailing_whitespace = true
+insert_final_newline = true
+indent_style = space
+indent_size = 4
diff --git a/.gitignore b/.gitignore
index a519d67f5c5..424302b3833 100644
--- a/.gitignore
+++ b/.gitignore
@@ -5,6 +5,7 @@
 !.clang-format
 !.gitignore
 !.github
+!.editorconfig
 
 # Object files
 *.o

From 0171cfcc7010bcd75277a2c452e9702d934230f9 Mon Sep 17 00:00:00 2001
From: Kele Zhang <zhangcola2003@gmail.com>
Date: Tue, 1 Oct 2024 23:05:51 +0000
Subject: [PATCH 1711/1765] Makefile: enable --gc-sections

The --gc-sections option enables the linker to perform garbage
collection of unreferenced code and data, thereby reducing the binary
size.

The -ffunction-sections option will place each function into a separate
section, so it is necessary to add .text.* to the linker script.

Signed-off-by: Kele Zhang <zhangcola2003@gmail.com>
Signed-off-by: Yuan Tan <tanyuan@tinylab.org>
Signed-off-by: Zhangjin Wu <falcon@tinylab.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile             | 15 +++++++++------
 firmware/fw_base.ldS |  1 +
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index f0012f6daec..dae282cc156 100644
--- a/Makefile
+++ b/Makefile
@@ -355,12 +355,7 @@ GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing
-ifneq ($(DEBUG),)
-CFLAGS		+=	-O0
-else
-CFLAGS		+=	-O2
-endif
+CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -ffunction-sections -fdata-sections
 CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 # Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
@@ -406,6 +401,7 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
+ELFFLAGS	+=	-Wl,--gc-sections
 ifeq ($(OPENSBI_LD_EXCLUDE_LIBS),y)
 ELFFLAGS	+=	-Wl,--exclude-libs,ALL
 endif
@@ -424,6 +420,13 @@ MERGEFLAGS	+=	-m elf$(PLATFORM_RISCV_XLEN)lriscv
 
 DTSCPPFLAGS	=	$(CPPFLAGS) -nostdinc -nostdlib -fno-builtin -D__DTS__ -x assembler-with-cpp
 
+ifneq ($(DEBUG),)
+CFLAGS		+=	-O0
+ELFFLAGS	+=	-Wl,--print-gc-sections
+else
+CFLAGS		+=	-O2
+endif
+
 # Setup functions for compilation
 define dynamic_flags
 -I$(shell dirname $(2)) -D__OBJNAME__=$(subst -,_,$(shell basename $(1) .o))
diff --git a/firmware/fw_base.ldS b/firmware/fw_base.ldS
index fb47984878f..a33746a06cf 100644
--- a/firmware/fw_base.ldS
+++ b/firmware/fw_base.ldS
@@ -20,6 +20,7 @@
 		PROVIDE(_text_start = .);
 		*(.entry)
 		*(.text)
+		*(.text.*)
 		. = ALIGN(8);
 		PROVIDE(_text_end = .);
 	}

From 701948bdec90e2908517e260d06e0e5e5d0f4419 Mon Sep 17 00:00:00 2001
From: Tim Hutt <tdhutt@gmail.com>
Date: Tue, 8 Oct 2024 10:49:19 +0100
Subject: [PATCH 1712/1765] docs: add example of building the Linux kernel

Slightly expand the QEMU docs to explain how to build the flat Linux kernel image.

Signed-off-by: Tim Hutt <tdhutt@gmail.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/platform/qemu_virt.md | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
index 0783be4a1f4..fd87ee5af96 100644
--- a/docs/platform/qemu_virt.md
+++ b/docs/platform/qemu_virt.md
@@ -56,7 +56,14 @@ qemu-system-riscv64 -M virt -m 256M -nographic \
 **Linux Kernel Payload**
 
 Note: We assume that the Linux kernel is compiled using
-*arch/riscv/configs/defconfig*.
+*arch/riscv/configs/defconfig*. The kernel must be a flattened image (a file
+called `Image`) rather than an ELF (`vmlinux`).
+
+Example of building a Linux kernel:
+```
+make ARCH=riscv CROSS_COMPILE=riscv64-linux- defconfig
+make ARCH=riscv CROSS_COMPILE=riscv64-linux- Image
+```
 
 Build:
 ```

From dcb68dd17d21c80cbd340610c7eb16c33e83bf20 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@gmail.com>
Date: Mon, 11 Nov 2024 10:27:33 +0800
Subject: [PATCH 1713/1765] platform: ensure enough heap size with debug
 triggers extension

DBTR introduce a big heap allocation to store hart state, this is
allocated percpu and needs big space when CPU number is high.

Increase the percpu part to fix this problem, and decrease the
fixed part to avoid too big heap size.

Fixes: 97f234f (lib: sbi: Introduce the SBI debug triggers extension support)
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index d7af3093440..3e21a6281e7 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -150,7 +150,7 @@ struct sbi_platform_operations {
 
 /** Platform default heap size */
 #define SBI_PLATFORM_DEFAULT_HEAP_SIZE(__num_hart)	\
-					(0x8000 + 0x800 * (__num_hart))
+					(0x8000 + 0x1000 * (__num_hart))
 
 /** Representation of a platform */
 struct sbi_platform {

From 5d4e3fb2ee03b9894d9cb03ddac0cda83d7ccc71 Mon Sep 17 00:00:00 2001
From: Inochi Amaoto <inochiama@gmail.com>
Date: Mon, 11 Nov 2024 10:27:34 +0800
Subject: [PATCH 1714/1765] platform: introduce DT-based configurable heap size

The default heap size will work for most platforms, but for some
special platforms, the heap is too small to hold all the information
or is too big so that it take too much ram. Introduce configurable
heap should solve this problem and make all generic platforms happy.

Add DT-based heap-size for the generic platform.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 docs/opensbi_config.md      |  4 ++++
 platform/generic/platform.c | 28 +++++++++++++++++++++++++---
 2 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/docs/opensbi_config.md b/docs/opensbi_config.md
index 1b710f1a105..104d82c9a33 100644
--- a/docs/opensbi_config.md
+++ b/docs/opensbi_config.md
@@ -23,6 +23,9 @@ The DT properties of a domain configuration DT node are as follows:
   set of harts is permitted to perform a cold boot. Otherwise, all
   harts are allowed to cold boot.
 
+* **heap-size** (Optional) - When present, the specified value is used
+  as the size of the heap in bytes.
+
 * **system-suspend-test** (Optional) - When present, enable a system
   suspend test implementation which simply waits five seconds and issues a WFI.
 
@@ -36,6 +39,7 @@ The OpenSBI Configuration Node will be deleted at the end of cold boot
         opensbi-config {
             compatible = "opensbi,config";
             cold-boot-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
+            heap-size = <0x400000>;
             system-suspend-test;
         };
     };
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 921c494cd31..a22db4970eb 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -69,6 +69,28 @@ static u32 fw_platform_calculate_heap_size(u32 hart_count)
 	return BIT_ALIGN(heap_size, HEAP_BASE_ALIGN);
 }
 
+static u32 fw_platform_get_heap_size(const void *fdt, u32 hart_count)
+{
+	int chosen_offset, config_offset, len;
+	const fdt32_t *val;
+
+	/* Get the heap size from device tree */
+	chosen_offset = fdt_path_offset(fdt, "/chosen");
+	if (chosen_offset < 0)
+		goto default_config;
+
+	config_offset = fdt_node_offset_by_compatible(fdt, chosen_offset, "opensbi,config");
+	if (config_offset < 0)
+		goto default_config;
+
+	val = (fdt32_t *)fdt_getprop(fdt, config_offset, "heap-size", &len);
+	if (len > 0 && val)
+		return BIT_ALIGN(fdt32_to_cpu(*val), HEAP_BASE_ALIGN);
+
+default_config:
+	return fw_platform_calculate_heap_size(hart_count);
+}
+
 extern struct sbi_platform platform;
 static bool platform_has_mlevel_imsic = false;
 static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
@@ -76,9 +98,9 @@ static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
 static DECLARE_BITMAP(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS);
 
 /*
- * The fw_platform_coldboot_harts_init() function is called by fw_platform_init() 
+ * The fw_platform_coldboot_harts_init() function is called by fw_platform_init()
  * function to initialize the cold boot harts allowed by the generic platform
- * according to the DT property "cold-boot-harts" in "/chosen/opensbi-config" 
+ * according to the DT property "cold-boot-harts" in "/chosen/opensbi-config"
  * DT node. If there is no "cold-boot-harts" in DT, all harts will be allowed.
  */
 static void fw_platform_coldboot_harts_init(const void *fdt)
@@ -185,7 +207,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
 	}
 
 	platform.hart_count = hart_count;
-	platform.heap_size = fw_platform_calculate_heap_size(hart_count);
+	platform.heap_size = fw_platform_get_heap_size(fdt, hart_count);
 	platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt);
 
 	fw_platform_coldboot_harts_init(fdt);

From db8f03e51237168c7fcff3d6aaa9058d6675b017 Mon Sep 17 00:00:00 2001
From: Zhang RunMin <runmin.zhang@ingenic.com>
Date: Wed, 23 Oct 2024 15:20:49 +0800
Subject: [PATCH 1715/1765] include: sbi: Fix typo error

Fix typo in comments describing SBI_SCRATCH_FW_HEAP_SIZE_OFFSET.

Signed-off-by: Zhang RunMin <runmin.zhang@ingenic.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_scratch.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sbi/sbi_scratch.h b/include/sbi/sbi_scratch.h
index 9cd7b0d6535..0d188d121dd 100644
--- a/include/sbi/sbi_scratch.h
+++ b/include/sbi/sbi_scratch.h
@@ -22,7 +22,7 @@
 #define SBI_SCRATCH_FW_RW_OFFSET		(2 * __SIZEOF_POINTER__)
 /** Offset of fw_heap_offset member in sbi_scratch */
 #define SBI_SCRATCH_FW_HEAP_OFFSET		(3 * __SIZEOF_POINTER__)
-/** Offset of fw_heap_size_offset member in sbi_scratch */
+/** Offset of fw_heap_size member in sbi_scratch */
 #define SBI_SCRATCH_FW_HEAP_SIZE_OFFSET		(4 * __SIZEOF_POINTER__)
 /** Offset of next_arg1 member in sbi_scratch */
 #define SBI_SCRATCH_NEXT_ARG1_OFFSET		(5 * __SIZEOF_POINTER__)

From be9752a071475ae1d9e58a2dfcb8e83185fb7ae5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 25 Oct 2024 11:59:46 -0700
Subject: [PATCH 1716/1765] lib: sbi_ipi: Make .ipi_clear always target the
 current hart

All existing users of this operation target the current hart, and it
seems unlikely that a future user will need to clear the pending IPI
status of a remote hart. Simplify the logic by changing .ipi_clear (and
its wrapper sbi_ipi_raw_clear()) to always operate on the current hart.

This incidentally fixes a bug introduced in commit 78c667b6fc07 ("lib:
sbi: Prefer hartindex over hartid in IPI framework"), which changed the
.ipi_clear parameter from a hartid to a hart index, but failed to update
the warm_init functions to match.

Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ipi.h        |  6 +++---
 lib/sbi/sbi_init.c           |  2 +-
 lib/sbi/sbi_ipi.c            |  7 +++----
 lib/utils/ipi/aclint_mswi.c  | 13 ++++---------
 lib/utils/ipi/andes_plicsw.c |  6 +++---
 5 files changed, 14 insertions(+), 20 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index d396233487e..62d61304df9 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -26,8 +26,8 @@ struct sbi_ipi_device {
 	/** Send IPI to a target HART index */
 	void (*ipi_send)(u32 hart_index);
 
-	/** Clear IPI for a target HART index */
-	void (*ipi_clear)(u32 hart_index);
+	/** Clear IPI for the current hart */
+	void (*ipi_clear)(void);
 };
 
 enum sbi_ipi_update_type {
@@ -87,7 +87,7 @@ void sbi_ipi_process(void);
 
 int sbi_ipi_raw_send(u32 hartindex);
 
-void sbi_ipi_raw_clear(u32 hartindex);
+void sbi_ipi_raw_clear(void);
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void);
 
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index cccd723d4f8..8a2cfaef748 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -479,7 +479,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
 	if (hstate == SBI_HSM_STATE_SUSPENDED) {
 		init_warm_resume(scratch, hartid);
 	} else {
-		sbi_ipi_raw_clear(sbi_hartid_to_hartindex(hartid));
+		sbi_ipi_raw_clear();
 		init_warm_startup(scratch, hartid);
 	}
 }
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 337ed175e3a..33b4d9b38fd 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -237,10 +237,9 @@ void sbi_ipi_process(void)
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct sbi_ipi_data *ipi_data =
 			sbi_scratch_offset_ptr(scratch, ipi_data_off);
-	u32 hartindex = current_hartindex();
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
-	sbi_ipi_raw_clear(hartindex);
+	sbi_ipi_raw_clear();
 
 	ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
 	ipi_event = 0;
@@ -275,10 +274,10 @@ int sbi_ipi_raw_send(u32 hartindex)
 	return 0;
 }
 
-void sbi_ipi_raw_clear(u32 hartindex)
+void sbi_ipi_raw_clear(void)
 {
 	if (ipi_dev && ipi_dev->ipi_clear)
-		ipi_dev->ipi_clear(hartindex);
+		ipi_dev->ipi_clear();
 
 	/*
 	 * Ensure that memory or MMIO writes after this
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 0ef3d0038d4..2cd7a530002 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -45,24 +45,19 @@ static void mswi_ipi_send(u32 hart_index)
 			mswi->first_hartid]);
 }
 
-static void mswi_ipi_clear(u32 hart_index)
+static void mswi_ipi_clear(void)
 {
 	u32 *msip;
-	struct sbi_scratch *scratch;
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct aclint_mswi_data *mswi;
 
-	scratch = sbi_hartindex_to_scratch(hart_index);
-	if (!scratch)
-		return;
-
 	mswi = mswi_get_hart_data_ptr(scratch);
 	if (!mswi)
 		return;
 
 	/* Clear ACLINT IPI */
 	msip = (void *)mswi->addr;
-	writel_relaxed(0, &msip[sbi_hartindex_to_hartid(hart_index) -
-			mswi->first_hartid]);
+	writel_relaxed(0, &msip[current_hartid() - mswi->first_hartid]);
 }
 
 static struct sbi_ipi_device aclint_mswi = {
@@ -74,7 +69,7 @@ static struct sbi_ipi_device aclint_mswi = {
 int aclint_mswi_warm_init(void)
 {
 	/* Clear IPI for current HART */
-	mswi_ipi_clear(current_hartindex());
+	mswi_ipi_clear();
 
 	return 0;
 }
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index 18c79e2b075..626699f9320 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -41,9 +41,9 @@ static void plicsw_ipi_send(u32 hart_index)
 	writel_relaxed(BIT(pending_bit), (void *)pending_reg);
 }
 
-static void plicsw_ipi_clear(u32 hart_index)
+static void plicsw_ipi_clear(void)
 {
-	u32 target_hart = sbi_hartindex_to_hartid(hart_index);
+	u32 target_hart = current_hartid();
 	ulong reg = plicsw.addr + PLICSW_CONTEXT_BASE + PLICSW_CONTEXT_CLAIM +
 		    PLICSW_CONTEXT_STRIDE * target_hart;
 
@@ -68,7 +68,7 @@ static struct sbi_ipi_device plicsw_ipi = {
 int plicsw_warm_ipi_init(void)
 {
 	/* Clear PLICSW IPI */
-	plicsw_ipi_clear(current_hartindex());
+	plicsw_ipi_clear();
 
 	return 0;
 }

From 693afc818feecdbddb75f5c9ec4b436d56f64208 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 25 Oct 2024 11:59:47 -0700
Subject: [PATCH 1717/1765] lib: sbi_ipi: Move initial IPI clear to
 sbi_ipi_init()

sbi_ipi_init() expects the platform warm init function to clear IPIs
on the local hart, but there is already a generic function to do this.
After this change, none of the existing drivers need a warm init
callback.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/ipi/aclint_mswi.h  | 2 --
 include/sbi_utils/ipi/andes_plicsw.h | 2 --
 lib/sbi/sbi_hsm.c                    | 2 +-
 lib/sbi/sbi_ipi.c                    | 8 ++++----
 lib/utils/ipi/aclint_mswi.c          | 8 --------
 lib/utils/ipi/andes_plicsw.c         | 8 --------
 lib/utils/ipi/fdt_ipi_mswi.c         | 2 +-
 lib/utils/ipi/fdt_ipi_plicsw.c       | 2 +-
 platform/fpga/ariane/platform.c      | 2 +-
 platform/fpga/openpiton/platform.c   | 2 +-
 platform/kendryte/k210/platform.c    | 2 +-
 platform/nuclei/ux600/platform.c     | 2 +-
 platform/template/platform.c         | 2 +-
 13 files changed, 12 insertions(+), 32 deletions(-)

diff --git a/include/sbi_utils/ipi/aclint_mswi.h b/include/sbi_utils/ipi/aclint_mswi.h
index e373a8cbc51..4b8249f25e7 100644
--- a/include/sbi_utils/ipi/aclint_mswi.h
+++ b/include/sbi_utils/ipi/aclint_mswi.h
@@ -26,8 +26,6 @@ struct aclint_mswi_data {
 	u32 hart_count;
 };
 
-int aclint_mswi_warm_init(void);
-
 int aclint_mswi_cold_init(struct aclint_mswi_data *mswi);
 
 #endif
diff --git a/include/sbi_utils/ipi/andes_plicsw.h b/include/sbi_utils/ipi/andes_plicsw.h
index 0d184449d8f..f6e1cae52ad 100644
--- a/include/sbi_utils/ipi/andes_plicsw.h
+++ b/include/sbi_utils/ipi/andes_plicsw.h
@@ -32,8 +32,6 @@ struct plicsw_data {
 	uint32_t hart_count;
 };
 
-int plicsw_warm_ipi_init(void);
-
 int plicsw_cold_ipi_init(struct plicsw_data *plicsw);
 
 #endif /* _IPI_ANDES_PLICSW_H_ */
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index 58a33798831..a3d6947a4fe 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -178,7 +178,7 @@ static void sbi_hsm_hart_wait(struct sbi_scratch *scratch)
 
 	/*
 	 * No need to clear IPI here because the sbi_ipi_init() will
-	 * clear it for current HART via sbi_platform_ipi_init().
+	 * clear it for current HART.
 	 */
 }
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index 33b4d9b38fd..b39f03e075f 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -332,14 +332,14 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	ipi_data->ipi_type = 0x00;
 
-	/*
-	 * Initialize platform IPI support. This will also clear any
-	 * pending IPIs for current/calling HART.
-	 */
+	/* Initialize platform IPI support */
 	ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
 	if (ret)
 		return ret;
 
+	/* Clear any pending IPIs for the current hart */
+	sbi_ipi_raw_clear();
+
 	/* Enable software interrupts */
 	csr_set(CSR_MIE, MIP_MSIP);
 
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c
index 2cd7a530002..9e55078a0b9 100644
--- a/lib/utils/ipi/aclint_mswi.c
+++ b/lib/utils/ipi/aclint_mswi.c
@@ -66,14 +66,6 @@ static struct sbi_ipi_device aclint_mswi = {
 	.ipi_clear = mswi_ipi_clear
 };
 
-int aclint_mswi_warm_init(void)
-{
-	/* Clear IPI for current HART */
-	mswi_ipi_clear();
-
-	return 0;
-}
-
 int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
 {
 	u32 i;
diff --git a/lib/utils/ipi/andes_plicsw.c b/lib/utils/ipi/andes_plicsw.c
index 626699f9320..5d085d859ae 100644
--- a/lib/utils/ipi/andes_plicsw.c
+++ b/lib/utils/ipi/andes_plicsw.c
@@ -65,14 +65,6 @@ static struct sbi_ipi_device plicsw_ipi = {
 	.ipi_clear = plicsw_ipi_clear
 };
 
-int plicsw_warm_ipi_init(void)
-{
-	/* Clear PLICSW IPI */
-	plicsw_ipi_clear();
-
-	return 0;
-}
-
 int plicsw_cold_ipi_init(struct plicsw_data *plicsw)
 {
 	int rc;
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index c78dead1bac..01331970bda 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -64,6 +64,6 @@ static const struct fdt_match ipi_mswi_match[] = {
 struct fdt_ipi fdt_ipi_mswi = {
 	.match_table = ipi_mswi_match,
 	.cold_init = ipi_mswi_cold_init,
-	.warm_init = aclint_mswi_warm_init,
+	.warm_init = NULL,
 	.exit = NULL,
 };
diff --git a/lib/utils/ipi/fdt_ipi_plicsw.c b/lib/utils/ipi/fdt_ipi_plicsw.c
index 3288574563b..1fd6ba1dd45 100644
--- a/lib/utils/ipi/fdt_ipi_plicsw.c
+++ b/lib/utils/ipi/fdt_ipi_plicsw.c
@@ -42,6 +42,6 @@ static const struct fdt_match ipi_plicsw_match[] = {
 struct fdt_ipi fdt_ipi_plicsw = {
 	.match_table = ipi_plicsw_match,
 	.cold_init   = fdt_plicsw_cold_ipi_init,
-	.warm_init   = plicsw_warm_ipi_init,
+	.warm_init   = NULL,
 	.exit	     = NULL,
 };
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index dfe170f9fe0..fb98aadea93 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -143,7 +143,7 @@ static int ariane_ipi_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mswi_warm_init();
+	return 0;
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 2bfc15ce7b7..6c658be524f 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -174,7 +174,7 @@ static int openpiton_ipi_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mswi_warm_init();
+	return 0;
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 06b7eb74f7e..1c7bd110e84 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -156,7 +156,7 @@ static int k210_ipi_init(bool cold_boot)
 			return rc;
 	}
 
-	return aclint_mswi_warm_init();
+	return 0;
 }
 
 static int k210_timer_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index d4f309aa096..f3b7f98cfeb 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -212,7 +212,7 @@ static int ux600_ipi_init(bool cold_boot)
 			return rc;
 	}
 
-	return aclint_mswi_warm_init();
+	return 0;
 }
 
 static int ux600_timer_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 1fc7b7bbe5e..d0f9f32c2c8 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -112,7 +112,7 @@ static int platform_ipi_init(bool cold_boot)
 			return ret;
 	}
 
-	return aclint_mswi_warm_init();
+	return 0;
 }
 
 /*

From 86d2c1797a44975e628bcf77e30e687fd6738e81 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Fri, 25 Oct 2024 11:59:48 -0700
Subject: [PATCH 1718/1765] platform: Drop IPI warm init and exit hooks

Now that the SBI IPI core clears IPIs at warm boot in a generic way,
none of the drivers or platforms use these hooks, and we can remove
them. Platforms need only to initialize the driver once during cold
init. If other hooks are needed in the future, they can be added to
struct sbi_ipi_device.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h         | 25 +++++-------------------
 include/sbi_utils/ipi/fdt_ipi.h    |  9 ++-------
 lib/sbi/sbi_ipi.c                  | 13 +++++--------
 lib/utils/ipi/fdt_ipi.c            | 31 +-----------------------------
 lib/utils/ipi/fdt_ipi_mswi.c       |  2 --
 lib/utils/ipi/fdt_ipi_plicsw.c     |  2 --
 platform/fpga/ariane/platform.c    | 14 +++-----------
 platform/fpga/openpiton/platform.c | 14 +++-----------
 platform/generic/platform.c        |  1 -
 platform/kendryte/k210/platform.c  | 12 ++----------
 platform/nuclei/ux600/platform.c   | 12 ++----------
 platform/template/platform.c       | 14 +++-----------
 12 files changed, 26 insertions(+), 123 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index 3e21a6281e7..e94ab37cc38 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -116,10 +116,8 @@ struct sbi_platform_operations {
 	/** Exit the platform interrupt controller for current HART */
 	void (*irqchip_exit)(void);
 
-	/** Initialize IPI for current HART */
-	int (*ipi_init)(bool cold_boot);
-	/** Exit IPI for current HART */
-	void (*ipi_exit)(void);
+	/** Initialize IPI during cold boot */
+	int (*ipi_init)(void);
 
 	/** Get tlb flush limit value **/
 	u64 (*get_tlbr_flush_limit)(void);
@@ -572,32 +570,19 @@ static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
 }
 
 /**
- * Initialize the platform IPI support for current HART
+ * Initialize the platform IPI support during cold boot
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
-					bool cold_boot)
+static inline int sbi_platform_ipi_init(const struct sbi_platform *plat)
 {
 	if (plat && sbi_platform_ops(plat)->ipi_init)
-		return sbi_platform_ops(plat)->ipi_init(cold_boot);
+		return sbi_platform_ops(plat)->ipi_init();
 	return 0;
 }
 
-/**
- * Exit the platform IPI support for current HART
- *
- * @param plat pointer to struct sbi_platform
- */
-static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->ipi_exit)
-		sbi_platform_ops(plat)->ipi_exit();
-}
-
 /**
  * Initialize the platform timer during cold boot
  *
diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
index c62452012ad..161f7a2e840 100644
--- a/include/sbi_utils/ipi/fdt_ipi.h
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -17,18 +17,13 @@
 struct fdt_ipi {
 	const struct fdt_match *match_table;
 	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-	int (*warm_init)(void);
-	void (*exit)(void);
 };
 
-void fdt_ipi_exit(void);
-
-int fdt_ipi_init(bool cold_boot);
+int fdt_ipi_init(void);
 
 #else
 
-static inline void fdt_ipi_exit(void) { }
-static inline int fdt_ipi_init(bool cold_boot) { return 0; }
+static inline int fdt_ipi_init(void) { return 0; }
 
 #endif
 
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index b39f03e075f..52898d30237 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -321,6 +321,11 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 		if (ret < 0)
 			return ret;
 		ipi_halt_event = ret;
+
+		/* Initialize platform IPI support */
+		ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch));
+		if (ret)
+			return ret;
 	} else {
 		if (!ipi_data_off)
 			return SBI_ENOMEM;
@@ -332,11 +337,6 @@ int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
 	ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
 	ipi_data->ipi_type = 0x00;
 
-	/* Initialize platform IPI support */
-	ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
-	if (ret)
-		return ret;
-
 	/* Clear any pending IPIs for the current hart */
 	sbi_ipi_raw_clear();
 
@@ -353,7 +353,4 @@ void sbi_ipi_exit(struct sbi_scratch *scratch)
 
 	/* Process pending IPIs */
 	sbi_ipi_process();
-
-	/* Platform exit */
-	sbi_platform_ipi_exit(sbi_platform_ptr(scratch));
 }
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 959cf57dc07..c2ff9cfaf70 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -16,22 +16,7 @@
 extern struct fdt_ipi *fdt_ipi_drivers[];
 extern unsigned long fdt_ipi_drivers_size;
 
-static struct fdt_ipi *current_driver = NULL;
-
-void fdt_ipi_exit(void)
-{
-	if (current_driver && current_driver->exit)
-		current_driver->exit();
-}
-
-static int fdt_ipi_warm_init(void)
-{
-	if (current_driver && current_driver->warm_init)
-		return current_driver->warm_init();
-	return 0;
-}
-
-static int fdt_ipi_cold_init(void)
+int fdt_ipi_init(void)
 {
 	int pos, noff, rc;
 	struct fdt_ipi *drv;
@@ -56,7 +41,6 @@ static int fdt_ipi_cold_init(void)
 				continue;
 			if (rc)
 				return rc;
-			current_driver = drv;
 
 			/*
 			 * We will have multiple IPI devices on multi-die or
@@ -71,16 +55,3 @@ static int fdt_ipi_cold_init(void)
 	 */
 	return 0;
 }
-
-int fdt_ipi_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = fdt_ipi_cold_init();
-		if (rc)
-			return rc;
-	}
-
-	return fdt_ipi_warm_init();
-}
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index 01331970bda..c58d7722faa 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -64,6 +64,4 @@ static const struct fdt_match ipi_mswi_match[] = {
 struct fdt_ipi fdt_ipi_mswi = {
 	.match_table = ipi_mswi_match,
 	.cold_init = ipi_mswi_cold_init,
-	.warm_init = NULL,
-	.exit = NULL,
 };
diff --git a/lib/utils/ipi/fdt_ipi_plicsw.c b/lib/utils/ipi/fdt_ipi_plicsw.c
index 1fd6ba1dd45..a178db1b4f4 100644
--- a/lib/utils/ipi/fdt_ipi_plicsw.c
+++ b/lib/utils/ipi/fdt_ipi_plicsw.c
@@ -42,6 +42,4 @@ static const struct fdt_match ipi_plicsw_match[] = {
 struct fdt_ipi fdt_ipi_plicsw = {
 	.match_table = ipi_plicsw_match,
 	.cold_init   = fdt_plicsw_cold_ipi_init,
-	.warm_init   = NULL,
-	.exit	     = NULL,
 };
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index fb98aadea93..d25506a4c21 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -131,19 +131,11 @@ static int ariane_irqchip_init(bool cold_boot)
 }
 
 /*
- * Initialize IPI for current HART.
+ * Initialize IPI during cold boot.
  */
-static int ariane_ipi_init(bool cold_boot)
+static int ariane_ipi_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = aclint_mswi_cold_init(&mswi);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mswi_cold_init(&mswi);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 6c658be524f..1ed42836a40 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -162,19 +162,11 @@ static int openpiton_irqchip_init(bool cold_boot)
 }
 
 /*
- * Initialize IPI for current HART.
+ * Initialize IPI during cold boot.
  */
-static int openpiton_ipi_init(bool cold_boot)
+static int openpiton_ipi_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = aclint_mswi_cold_init(&mswi);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mswi_cold_init(&mswi);
 }
 
 /*
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index a22db4970eb..3b20ffbe780 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -421,7 +421,6 @@ const struct sbi_platform_operations platform_ops = {
 	.irqchip_init		= fdt_irqchip_init,
 	.irqchip_exit		= fdt_irqchip_exit,
 	.ipi_init		= fdt_ipi_init,
-	.ipi_exit		= fdt_ipi_exit,
 	.pmu_init		= generic_pmu_init,
 	.pmu_xlate_to_mhpmevent = generic_pmu_xlate_to_mhpmevent,
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 1c7bd110e84..338120f1605 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -146,17 +146,9 @@ static int k210_irqchip_init(bool cold_boot)
 	return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
 }
 
-static int k210_ipi_init(bool cold_boot)
+static int k210_ipi_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = aclint_mswi_cold_init(&mswi);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return aclint_mswi_cold_init(&mswi);
 }
 
 static int k210_timer_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index f3b7f98cfeb..8d1cc676909 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -202,17 +202,9 @@ static int ux600_irqchip_init(bool cold_boot)
 				      (hartid) ? (2 * hartid) : -1);
 }
 
-static int ux600_ipi_init(bool cold_boot)
+static int ux600_ipi_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = aclint_mswi_cold_init(&mswi);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return aclint_mswi_cold_init(&mswi);
 }
 
 static int ux600_timer_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index d0f9f32c2c8..9f1b3b0f68b 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -99,20 +99,12 @@ static int platform_irqchip_init(bool cold_boot)
 }
 
 /*
- * Initialize IPI for current HART.
+ * Initialize IPI during cold boot.
  */
-static int platform_ipi_init(bool cold_boot)
+static int platform_ipi_init(void)
 {
-	int ret;
-
 	/* Example if the generic ACLINT driver is used */
-	if (cold_boot) {
-		ret = aclint_mswi_cold_init(&mswi);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return aclint_mswi_cold_init(&mswi);
 }
 
 /*

From a786aed08dbc20368426970eaf393867ec88b940 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:02 -0800
Subject: [PATCH 1719/1765] lib: utils/irqchip: plic: Allow enabling IRQs by
 default

Unlike other platforms, Ariane and OpenPiton enable all IRQs by default.
This was described in commit b44e844880d0 ("Add support for Ariane FPGA
SoC") as "due to some issue of the design." Add this workaround behind a
flag in plic_warm_irqchip_init(), so every platform can use the same
warm init function.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/plic.h   |  7 ++++---
 lib/utils/irqchip/plic.c           | 17 +++++++++++------
 platform/fpga/ariane/platform.c    | 25 +++----------------------
 platform/fpga/openpiton/platform.c | 25 +++----------------------
 4 files changed, 21 insertions(+), 53 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 2eda6310df8..5da09055002 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -16,8 +16,12 @@ struct plic_data {
 	unsigned long addr;
 	unsigned long size;
 	unsigned long num_src;
+	unsigned long flags;
 };
 
+/** Work around a bug on Ariane that requires enabling interrupts at boot */
+#define PLIC_FLAG_ARIANE_BUG		BIT(0)
+
 /* So far, priorities on all consumers of these functions fit in 8 bits. */
 void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
 
@@ -30,9 +34,6 @@ void plic_context_save(const struct plic_data *plic, int context_id,
 void plic_context_restore(const struct plic_data *plic, int context_id,
 			  const u32 *enable, u32 threshold, u32 num);
 
-int plic_context_init(const struct plic_data *plic, int context_id,
-		      bool enable, u32 threshold);
-
 int plic_warm_irqchip_init(const struct plic_data *plic,
 			   int m_cntx_id, int s_cntx_id);
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index 193e3201dbc..c66a6886291 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -121,8 +121,8 @@ void plic_context_restore(const struct plic_data *plic, int context_id,
 	plic_set_thresh(plic, context_id, threshold);
 }
 
-int plic_context_init(const struct plic_data *plic, int context_id,
-		      bool enable, u32 threshold)
+static int plic_context_init(const struct plic_data *plic, int context_id,
+			     bool enable, u32 threshold)
 {
 	u32 ie_words, ie_value;
 
@@ -143,18 +143,23 @@ int plic_context_init(const struct plic_data *plic, int context_id,
 int plic_warm_irqchip_init(const struct plic_data *plic,
 			   int m_cntx_id, int s_cntx_id)
 {
+	bool enable;
 	int ret;
 
-	/* By default, disable all IRQs for M-mode of target HART */
+	/*
+	 * By default, disable all IRQs for the target HART. Ariane
+	 * has a bug which requires enabling all interrupts at boot.
+	 */
+	enable = plic->flags & PLIC_FLAG_ARIANE_BUG;
+
 	if (m_cntx_id > -1) {
-		ret = plic_context_init(plic, m_cntx_id, false, 0x7);
+		ret = plic_context_init(plic, m_cntx_id, enable, 0x7);
 		if (ret)
 			return ret;
 	}
 
-	/* By default, disable all IRQs for S-mode of target HART */
 	if (s_cntx_id > -1) {
-		ret = plic_context_init(plic, s_cntx_id, false, 0x7);
+		ret = plic_context_init(plic, s_cntx_id, enable, 0x7);
 		if (ret)
 			return ret;
 	}
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index d25506a4c21..0d019df17b1 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -39,6 +39,7 @@ static struct plic_data plic = {
 	.addr = ARIANE_PLIC_ADDR,
 	.size = ARIANE_PLIC_SIZE,
 	.num_src = ARIANE_PLIC_NUM_SOURCES,
+	.flags = PLIC_FLAG_ARIANE_BUG,
 };
 
 static struct aclint_mswi_data mswi = {
@@ -93,27 +94,6 @@ static int ariane_final_init(bool cold_boot)
 	return 0;
 }
 
-static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
-{
-	int ret;
-
-	/* By default, enable all IRQs for M-mode of target HART */
-	if (m_cntx_id > -1) {
-		ret = plic_context_init(&plic, m_cntx_id, true, 0x1);
-		if (ret)
-			return ret;
-	}
-
-	/* Enable all IRQs for S-mode of target HART */
-	if (s_cntx_id > -1) {
-		ret = plic_context_init(&plic, s_cntx_id, true, 0x0);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
 /*
  * Initialize the ariane interrupt controller for current HART.
  */
@@ -127,7 +107,8 @@ static int ariane_irqchip_init(bool cold_boot)
 		if (ret)
 			return ret;
 	}
-	return plic_ariane_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
+
+	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 1ed42836a40..9f59f5f7936 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -43,6 +43,7 @@ static struct plic_data plic = {
 	.addr = OPENPITON_DEFAULT_PLIC_ADDR,
 	.size = OPENPITON_DEFAULT_PLIC_SIZE,
 	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
+	.flags = PLIC_FLAG_ARIANE_BUG,
 };
 
 static struct aclint_mswi_data mswi = {
@@ -124,27 +125,6 @@ static int openpiton_final_init(bool cold_boot)
 	return 0;
 }
 
-static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
-{
-	int ret;
-
-	/* By default, enable all IRQs for M-mode of target HART */
-	if (m_cntx_id > -1) {
-		ret = plic_context_init(&plic, m_cntx_id, true, 0x1);
-		if (ret)
-			return ret;
-	}
-
-	/* Enable all IRQs for S-mode of target HART */
-	if (s_cntx_id > -1) {
-		ret = plic_context_init(&plic, s_cntx_id, true, 0x0);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
 /*
  * Initialize the openpiton interrupt controller for current HART.
  */
@@ -158,7 +138,8 @@ static int openpiton_irqchip_init(bool cold_boot)
 		if (ret)
 			return ret;
 	}
-	return plic_openpiton_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
+
+	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
 }
 
 /*

From c26e3fd2ed655c1ae6efd1fd0cfc70360c1b967b Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:03 -0800
Subject: [PATCH 1720/1765] lib: utils/irqchip: plic: Move delegation to base
 PLIC driver

This needs to be in the base PLIC driver as part of the power management
save/restore flow.

This is also in preparation for moving the PLIC information in the
scratch area to the base PLIC driver. After that change, the FDT PLIC
layer will be unable to look up the `struct plic_data` after cold boot.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/plic.h     |  4 ++++
 lib/utils/irqchip/fdt_irqchip_plic.c | 16 +++-------------
 lib/utils/irqchip/plic.c             | 11 +++++++++++
 3 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 5da09055002..cbe667616c3 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -21,6 +21,8 @@ struct plic_data {
 
 /** Work around a bug on Ariane that requires enabling interrupts at boot */
 #define PLIC_FLAG_ARIANE_BUG		BIT(0)
+/** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
+#define PLIC_FLAG_THEAD_DELEGATION	BIT(1)
 
 /* So far, priorities on all consumers of these functions fit in 8 bits. */
 void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
@@ -28,6 +30,8 @@ void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
 void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
 			   u32 num);
 
+void plic_delegate(const struct plic_data *plic);
+
 void plic_context_save(const struct plic_data *plic, int context_id,
 		       u32 *enable, u32 *threshold, u32 num);
 
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index a8aa4fcdbec..3c57a0f5d0c 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -164,10 +164,7 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 	if (rc)
 		goto fail_free_data;
 
-	if (match->data) {
-		void (*plic_plat_init)(struct plic_data *) = match->data;
-		plic_plat_init(pd);
-	}
+	pd->flags = (unsigned long)match->data;
 
 	rc = plic_cold_irqchip_init(pd);
 	if (rc)
@@ -184,19 +181,12 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 	return rc;
 }
 
-#define THEAD_PLIC_CTRL_REG 0x1ffffc
-
-static void thead_plic_plat_init(struct plic_data *pd)
-{
-	writel_relaxed(BIT(0), (char *)pd->addr + THEAD_PLIC_CTRL_REG);
-}
-
 void thead_plic_restore(void)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	struct plic_data *plic = plic_get_hart_data_ptr(scratch);
 
-	thead_plic_plat_init(plic);
+	plic_delegate(plic);
 }
 
 static const struct fdt_match irqchip_plic_match[] = {
@@ -204,7 +194,7 @@ static const struct fdt_match irqchip_plic_match[] = {
 	{ .compatible = "riscv,plic0" },
 	{ .compatible = "sifive,plic-1.0.0" },
 	{ .compatible = "thead,c900-plic",
-	  .data = thead_plic_plat_init },
+	  .data = (void *)PLIC_FLAG_THEAD_DELEGATION },
 	{ /* sentinel */ }
 };
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index c66a6886291..a432a8c42e6 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -24,6 +24,8 @@
 #define PLIC_CONTEXT_BASE 0x200000
 #define PLIC_CONTEXT_STRIDE 0x1000
 
+#define THEAD_PLIC_CTRL_REG 0x1ffffc
+
 static u32 plic_get_priority(const struct plic_data *plic, u32 source)
 {
 	volatile void *plic_priority = (char *)plic->addr +
@@ -93,6 +95,13 @@ static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
 	writel(val, plic_ie);
 }
 
+void plic_delegate(const struct plic_data *plic)
+{
+	/* If this is a T-HEAD PLIC, delegate access to S-mode */
+	if (plic->flags & PLIC_FLAG_THEAD_DELEGATION)
+		writel_relaxed(BIT(0), (char *)plic->addr + THEAD_PLIC_CTRL_REG);
+}
+
 void plic_context_save(const struct plic_data *plic, int context_id,
 		       u32 *enable, u32 *threshold, u32 num)
 {
@@ -178,6 +187,8 @@ int plic_cold_irqchip_init(const struct plic_data *plic)
 	for (i = 1; i <= plic->num_src; i++)
 		plic_set_priority(plic, i, 0);
 
+	plic_delegate(plic);
+
 	return sbi_domain_root_add_memrange(plic->addr, plic->size, BIT(20),
 					(SBI_DOMAIN_MEMREGION_MMIO |
 					 SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));

From 69448a07906523c9c798c8f1d02a7be52e96b38e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:04 -0800
Subject: [PATCH 1721/1765] lib: utils/irqchip: plic: Provide a hartindex to
 context map

This removes platform-specific arguments to plic_warm_irqchip_init(),
which makes the driver independent from the platform after cold init,
and allows for further refactoring.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/plic.h     | 14 +++++--
 lib/utils/irqchip/fdt_irqchip_plic.c | 62 +++++++---------------------
 lib/utils/irqchip/plic.c             | 14 +++++--
 platform/fpga/ariane/platform.c      |  6 ++-
 platform/fpga/openpiton/platform.c   |  8 +++-
 platform/kendryte/k210/platform.c    |  7 +++-
 platform/nuclei/ux600/platform.c     |  7 ++--
 platform/template/platform.c         |  9 +++-
 8 files changed, 62 insertions(+), 65 deletions(-)

diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index cbe667616c3..e6b6f823092 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,6 +17,7 @@ struct plic_data {
 	unsigned long size;
 	unsigned long num_src;
 	unsigned long flags;
+	s16 context_map[][2];
 };
 
 /** Work around a bug on Ariane that requires enabling interrupts at boot */
@@ -24,6 +25,12 @@ struct plic_data {
 /** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
 #define PLIC_FLAG_THEAD_DELEGATION	BIT(1)
 
+#define PLIC_M_CONTEXT			0
+#define PLIC_S_CONTEXT			1
+
+#define PLIC_DATA_SIZE(__hart_count)	(sizeof(struct plic_data) + \
+					 (__hart_count) * 2 * sizeof(s16))
+
 /* So far, priorities on all consumers of these functions fit in 8 bits. */
 void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
 
@@ -32,14 +39,13 @@ void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
 
 void plic_delegate(const struct plic_data *plic);
 
-void plic_context_save(const struct plic_data *plic, int context_id,
+void plic_context_save(const struct plic_data *plic, bool smode,
 		       u32 *enable, u32 *threshold, u32 num);
 
-void plic_context_restore(const struct plic_data *plic, int context_id,
+void plic_context_restore(const struct plic_data *plic, bool smode,
 			  const u32 *enable, u32 threshold, u32 num);
 
-int plic_warm_irqchip_init(const struct plic_data *plic,
-			   int m_cntx_id, int s_cntx_id);
+int plic_warm_irqchip_init(const struct plic_data *plic);
 
 int plic_cold_irqchip_init(const struct plic_data *plic);
 
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 3c57a0f5d0c..2ba56748a62 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -12,6 +12,7 @@
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_heap.h>
+#include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
@@ -25,22 +26,6 @@ static unsigned long plic_ptr_offset;
 #define plic_set_hart_data_ptr(__scratch, __plic)			\
 	sbi_scratch_write_type((__scratch), void *, plic_ptr_offset, (__plic))
 
-static unsigned long plic_mcontext_offset;
-
-#define plic_get_hart_mcontext(__scratch)				\
-	(sbi_scratch_read_type((__scratch), long, plic_mcontext_offset) - 1)
-
-#define plic_set_hart_mcontext(__scratch, __mctx)			\
-	sbi_scratch_write_type((__scratch), long, plic_mcontext_offset, (__mctx) + 1)
-
-static unsigned long plic_scontext_offset;
-
-#define plic_get_hart_scontext(__scratch)				\
-	(sbi_scratch_read_type((__scratch), long, plic_scontext_offset) - 1)
-
-#define plic_set_hart_scontext(__scratch, __sctx)			\
-	sbi_scratch_write_type((__scratch), long, plic_scontext_offset, (__sctx) + 1)
-
 void fdt_plic_priority_save(u8 *priority, u32 num)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -59,9 +44,7 @@ void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_context_save(plic_get_hart_data_ptr(scratch),
-			  smode ? plic_get_hart_scontext(scratch) :
-				  plic_get_hart_mcontext(scratch),
+	plic_context_save(plic_get_hart_data_ptr(scratch), smode,
 			  enable, threshold, num);
 }
 
@@ -70,9 +53,7 @@ void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_context_restore(plic_get_hart_data_ptr(scratch),
-			     smode ? plic_get_hart_scontext(scratch) :
-				     plic_get_hart_mcontext(scratch),
+	plic_context_restore(plic_get_hart_data_ptr(scratch), smode,
 			     enable, threshold, num);
 }
 
@@ -80,16 +61,14 @@ static int irqchip_plic_warm_init(void)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	return plic_warm_irqchip_init(plic_get_hart_data_ptr(scratch),
-				      plic_get_hart_mcontext(scratch),
-				      plic_get_hart_scontext(scratch));
+	return plic_warm_irqchip_init(plic_get_hart_data_ptr(scratch));
 }
 
-static int irqchip_plic_update_hartid_table(const void *fdt, int nodeoff,
-					    struct plic_data *pd)
+static int irqchip_plic_update_context_map(const void *fdt, int nodeoff,
+					   struct plic_data *pd)
 {
 	const fdt32_t *val;
-	u32 phandle, hwirq, hartid;
+	u32 phandle, hwirq, hartid, hartindex;
 	struct sbi_scratch *scratch;
 	int i, err, count, cpu_offset, cpu_intc_offset;
 
@@ -114,17 +93,18 @@ static int irqchip_plic_update_hartid_table(const void *fdt, int nodeoff,
 		if (err)
 			continue;
 
-		scratch = sbi_hartid_to_scratch(hartid);
+		hartindex = sbi_hartid_to_hartindex(hartid);
+		scratch = sbi_hartindex_to_scratch(hartindex);
 		if (!scratch)
 			continue;
 
 		plic_set_hart_data_ptr(scratch, pd);
 		switch (hwirq) {
 		case IRQ_M_EXT:
-			plic_set_hart_mcontext(scratch, i / 2);
+			pd->context_map[hartindex][PLIC_M_CONTEXT] = i / 2;
 			break;
 		case IRQ_S_EXT:
-			plic_set_hart_scontext(scratch, i / 2);
+			pd->context_map[hartindex][PLIC_S_CONTEXT] = i / 2;
 			break;
 		}
 	}
@@ -135,6 +115,8 @@ static int irqchip_plic_update_hartid_table(const void *fdt, int nodeoff,
 static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 				  const struct fdt_match *match)
 {
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	int rc;
 	struct plic_data *pd;
 
@@ -144,19 +126,7 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 			return SBI_ENOMEM;
 	}
 
-	if (!plic_mcontext_offset) {
-		plic_mcontext_offset = sbi_scratch_alloc_type_offset(long);
-		if (!plic_mcontext_offset)
-			return SBI_ENOMEM;
-	}
-
-	if (!plic_scontext_offset) {
-		plic_scontext_offset = sbi_scratch_alloc_type_offset(long);
-		if (!plic_scontext_offset)
-			return SBI_ENOMEM;
-	}
-
-	pd = sbi_zalloc(sizeof(*pd));
+	pd = sbi_zalloc(PLIC_DATA_SIZE(plat->hart_count));
 	if (!pd)
 		return SBI_ENOMEM;
 
@@ -166,11 +136,11 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 
 	pd->flags = (unsigned long)match->data;
 
-	rc = plic_cold_irqchip_init(pd);
+	rc = irqchip_plic_update_context_map(fdt, nodeoff, pd);
 	if (rc)
 		goto fail_free_data;
 
-	rc = irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
+	rc = plic_cold_irqchip_init(pd);
 	if (rc)
 		goto fail_free_data;
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index a432a8c42e6..c8ea88405e4 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -102,9 +102,11 @@ void plic_delegate(const struct plic_data *plic)
 		writel_relaxed(BIT(0), (char *)plic->addr + THEAD_PLIC_CTRL_REG);
 }
 
-void plic_context_save(const struct plic_data *plic, int context_id,
+void plic_context_save(const struct plic_data *plic, bool smode,
 		       u32 *enable, u32 *threshold, u32 num)
 {
+	u32 hartindex = current_hartindex();
+	s16 context_id = plic->context_map[hartindex][smode];
 	u32 ie_words = plic->num_src / 32 + 1;
 
 	if (num > ie_words)
@@ -116,9 +118,11 @@ void plic_context_save(const struct plic_data *plic, int context_id,
 	*threshold = plic_get_thresh(plic, context_id);
 }
 
-void plic_context_restore(const struct plic_data *plic, int context_id,
+void plic_context_restore(const struct plic_data *plic, bool smode,
 			  const u32 *enable, u32 threshold, u32 num)
 {
+	u32 hartindex = current_hartindex();
+	s16 context_id = plic->context_map[hartindex][smode];
 	u32 ie_words = plic->num_src / 32 + 1;
 
 	if (num > ie_words)
@@ -149,9 +153,11 @@ static int plic_context_init(const struct plic_data *plic, int context_id,
 	return 0;
 }
 
-int plic_warm_irqchip_init(const struct plic_data *plic,
-			   int m_cntx_id, int s_cntx_id)
+int plic_warm_irqchip_init(const struct plic_data *plic)
 {
+	u32 hartindex = current_hartindex();
+	s16 m_cntx_id = plic->context_map[hartindex][PLIC_M_CONTEXT];
+	s16 s_cntx_id = plic->context_map[hartindex][PLIC_S_CONTEXT];
 	bool enable;
 	int ret;
 
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 0d019df17b1..7a9283b34f4 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -40,6 +40,9 @@ static struct plic_data plic = {
 	.size = ARIANE_PLIC_SIZE,
 	.num_src = ARIANE_PLIC_NUM_SOURCES,
 	.flags = PLIC_FLAG_ARIANE_BUG,
+	.context_map = {
+		[0] = { 0, 1 },
+	},
 };
 
 static struct aclint_mswi_data mswi = {
@@ -99,7 +102,6 @@ static int ariane_final_init(bool cold_boot)
  */
 static int ariane_irqchip_init(bool cold_boot)
 {
-	u32 hartid = current_hartid();
 	int ret;
 
 	if (cold_boot) {
@@ -108,7 +110,7 @@ static int ariane_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(&plic);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 9f59f5f7936..0822c9fdb3d 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -44,6 +44,11 @@ static struct plic_data plic = {
 	.size = OPENPITON_DEFAULT_PLIC_SIZE,
 	.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
 	.flags = PLIC_FLAG_ARIANE_BUG,
+	.context_map = {
+		[0] = { 0, 1 },
+		[1] = { 2, 3 },
+		[2] = { 4, 5 },
+	},
 };
 
 static struct aclint_mswi_data mswi = {
@@ -130,7 +135,6 @@ static int openpiton_final_init(bool cold_boot)
  */
 static int openpiton_irqchip_init(bool cold_boot)
 {
-	u32 hartid = current_hartid();
 	int ret;
 
 	if (cold_boot) {
@@ -139,7 +143,7 @@ static int openpiton_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(&plic);
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 338120f1605..d5e4622afb8 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -33,6 +33,10 @@ static struct plic_data plic = {
 	.addr = K210_PLIC_BASE_ADDR,
 	.size = K210_PLIC_BASE_SIZE,
 	.num_src = K210_PLIC_NUM_SOURCES,
+	.context_map = {
+		[0] = { 0, 1 },
+		[1] = { 2, 3 },
+	},
 };
 
 static struct aclint_mswi_data mswi = {
@@ -135,7 +139,6 @@ static int k210_final_init(bool cold_boot)
 static int k210_irqchip_init(bool cold_boot)
 {
 	int rc;
-	u32 hartid = current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(&plic);
@@ -143,7 +146,7 @@ static int k210_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(&plic, hartid * 2, hartid * 2 + 1);
+	return plic_warm_irqchip_init(&plic);
 }
 
 static int k210_ipi_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 8d1cc676909..ea68aa4baed 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -66,6 +66,9 @@ static struct plic_data plic = {
 	.addr = UX600_PLIC_ADDR,
 	.size = UX600_PLIC_SIZE,
 	.num_src = UX600_PLIC_NUM_SOURCES,
+	.context_map = {
+		[0] = { 0, -1 },
+	},
 };
 
 static struct aclint_mswi_data mswi = {
@@ -190,7 +193,6 @@ static int ux600_final_init(bool cold_boot)
 static int ux600_irqchip_init(bool cold_boot)
 {
 	int rc;
-	u32 hartid = current_hartid();
 
 	if (cold_boot) {
 		rc = plic_cold_irqchip_init(&plic);
@@ -198,8 +200,7 @@ static int ux600_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
-				      (hartid) ? (2 * hartid) : -1);
+	return plic_warm_irqchip_init(&plic);
 }
 
 static int ux600_ipi_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index 9f1b3b0f68b..fadd1bb1ff7 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -37,6 +37,12 @@ static struct plic_data plic = {
 	.addr = PLATFORM_PLIC_ADDR,
 	.size = PLATFORM_PLIC_SIZE,
 	.num_src = PLATFORM_PLIC_NUM_SOURCES,
+	.context_map = {
+		[0] = { 0, 1 },
+		[1] = { 2, 3 },
+		[2] = { 4, 5 },
+		[3] = { 6, 7 },
+	},
 };
 
 static struct aclint_mswi_data mswi = {
@@ -85,7 +91,6 @@ static int platform_final_init(bool cold_boot)
  */
 static int platform_irqchip_init(bool cold_boot)
 {
-	u32 hartid = current_hartid();
 	int ret;
 
 	/* Example if the generic PLIC driver is used */
@@ -95,7 +100,7 @@ static int platform_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
+	return plic_warm_irqchip_init(&plic);
 }
 
 /*

From c6c22f00f457264560ca05414e9f9e0c5c3438db Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:05 -0800
Subject: [PATCH 1722/1765] lib: utils/irqchip: plic: Common PM save/restore

Move the PLIC save/restore functions inside the driver, so they can be
reused on any platform that needs them. The memory needed to store the
PLIC context is also allocated by the driver. The PM data cannot be
completely encapsulated, as some platforms (including Allwinner D1) need
to program the IRQ enable status to a sideband interrupt controller for
wakeup capability.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h |  22 +--
 include/sbi_utils/irqchip/plic.h             |  19 +--
 lib/utils/irqchip/fdt_irqchip_plic.c         |  32 +----
 lib/utils/irqchip/plic.c                     | 134 ++++++++++++-------
 platform/generic/allwinner/sun20i-d1.c       |  34 +----
 5 files changed, 112 insertions(+), 129 deletions(-)

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
index df645dd00ee..fe7699936d6 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip_plic.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
@@ -8,26 +8,12 @@
 #define __IRQCHIP_FDT_IRQCHIP_PLIC_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi_utils/irqchip/plic.h>
 
-/**
- * Save the PLIC priority state
- * @param priority pointer to the memory region for the saved priority
- * @param num size of the memory region including interrupt source 0
- */
-void fdt_plic_priority_save(u8 *priority, u32 num);
-
-/**
- * Restore the PLIC priority state
- * @param priority pointer to the memory region for the saved priority
- * @param num size of the memory region including interrupt source 0
- */
-void fdt_plic_priority_restore(const u8 *priority, u32 num);
-
-void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num);
+struct plic_data *fdt_plic_get(void);
 
-void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
-			      u32 num);
+void fdt_plic_suspend(void);
 
-void thead_plic_restore(void);
+void fdt_plic_resume(void);
 
 #endif
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index e6b6f823092..29fe60c1166 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -17,6 +17,7 @@ struct plic_data {
 	unsigned long size;
 	unsigned long num_src;
 	unsigned long flags;
+	void *pm_data;
 	s16 context_map[][2];
 };
 
@@ -24,6 +25,8 @@ struct plic_data {
 #define PLIC_FLAG_ARIANE_BUG		BIT(0)
 /** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
 #define PLIC_FLAG_THEAD_DELEGATION	BIT(1)
+/** Allocate space for power management save/restore operations */
+#define PLIC_FLAG_ENABLE_PM		BIT(2)
 
 #define PLIC_M_CONTEXT			0
 #define PLIC_S_CONTEXT			1
@@ -31,22 +34,14 @@ struct plic_data {
 #define PLIC_DATA_SIZE(__hart_count)	(sizeof(struct plic_data) + \
 					 (__hart_count) * 2 * sizeof(s16))
 
-/* So far, priorities on all consumers of these functions fit in 8 bits. */
-void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
+#define PLIC_IE_WORDS(__p)		((__p)->num_src / 32 + 1)
 
-void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
-			   u32 num);
+void plic_suspend(const struct plic_data *plic);
 
-void plic_delegate(const struct plic_data *plic);
-
-void plic_context_save(const struct plic_data *plic, bool smode,
-		       u32 *enable, u32 *threshold, u32 num);
-
-void plic_context_restore(const struct plic_data *plic, bool smode,
-			  const u32 *enable, u32 threshold, u32 num);
+void plic_resume(const struct plic_data *plic);
 
 int plic_warm_irqchip_init(const struct plic_data *plic);
 
-int plic_cold_irqchip_init(const struct plic_data *plic);
+int plic_cold_irqchip_init(struct plic_data *plic);
 
 #endif
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 2ba56748a62..3826d2ae655 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -26,35 +26,25 @@ static unsigned long plic_ptr_offset;
 #define plic_set_hart_data_ptr(__scratch, __plic)			\
 	sbi_scratch_write_type((__scratch), void *, plic_ptr_offset, (__plic))
 
-void fdt_plic_priority_save(u8 *priority, u32 num)
+struct plic_data *fdt_plic_get(void)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_priority_save(plic_get_hart_data_ptr(scratch), priority, num);
+	return plic_get_hart_data_ptr(scratch);
 }
 
-void fdt_plic_priority_restore(const u8 *priority, u32 num)
+void fdt_plic_suspend(void)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_priority_restore(plic_get_hart_data_ptr(scratch), priority, num);
+	plic_suspend(plic_get_hart_data_ptr(scratch));
 }
 
-void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num)
+void fdt_plic_resume(void)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 
-	plic_context_save(plic_get_hart_data_ptr(scratch), smode,
-			  enable, threshold, num);
-}
-
-void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
-			      u32 num)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	plic_context_restore(plic_get_hart_data_ptr(scratch), smode,
-			     enable, threshold, num);
+	plic_resume(plic_get_hart_data_ptr(scratch));
 }
 
 static int irqchip_plic_warm_init(void)
@@ -151,20 +141,12 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 	return rc;
 }
 
-void thead_plic_restore(void)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-	struct plic_data *plic = plic_get_hart_data_ptr(scratch);
-
-	plic_delegate(plic);
-}
-
 static const struct fdt_match irqchip_plic_match[] = {
 	{ .compatible = "andestech,nceplic100" },
 	{ .compatible = "riscv,plic0" },
 	{ .compatible = "sifive,plic-1.0.0" },
 	{ .compatible = "thead,c900-plic",
-	  .data = (void *)PLIC_FLAG_THEAD_DELEGATION },
+	  .data = (void *)(PLIC_FLAG_THEAD_DELEGATION | PLIC_FLAG_ENABLE_PM) },
 	{ /* sentinel */ }
 };
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index c8ea88405e4..ab58e390622 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -14,6 +14,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/irqchip/plic.h>
 
@@ -40,19 +41,6 @@ static void plic_set_priority(const struct plic_data *plic, u32 source, u32 val)
 	writel(val, plic_priority);
 }
 
-void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num)
-{
-	for (u32 i = 1; i <= num; i++)
-		priority[i] = plic_get_priority(plic, i);
-}
-
-void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
-			   u32 num)
-{
-	for (u32 i = 1; i <= num; i++)
-		plic_set_priority(plic, i, priority[i]);
-}
-
 static u32 plic_get_thresh(const struct plic_data *plic, u32 cntxid)
 {
 	volatile void *plic_thresh;
@@ -95,62 +83,91 @@ static void plic_set_ie(const struct plic_data *plic, u32 cntxid,
 	writel(val, plic_ie);
 }
 
-void plic_delegate(const struct plic_data *plic)
+static void plic_delegate(const struct plic_data *plic)
 {
 	/* If this is a T-HEAD PLIC, delegate access to S-mode */
 	if (plic->flags & PLIC_FLAG_THEAD_DELEGATION)
 		writel_relaxed(BIT(0), (char *)plic->addr + THEAD_PLIC_CTRL_REG);
 }
 
-void plic_context_save(const struct plic_data *plic, bool smode,
-		       u32 *enable, u32 *threshold, u32 num)
+static int plic_context_init(const struct plic_data *plic, int context_id,
+			     bool enable, u32 threshold)
 {
-	u32 hartindex = current_hartindex();
-	s16 context_id = plic->context_map[hartindex][smode];
-	u32 ie_words = plic->num_src / 32 + 1;
+	u32 ie_words, ie_value;
 
-	if (num > ie_words)
-		num = ie_words;
+	if (!plic || context_id < 0)
+		return SBI_EINVAL;
 
-	for (u32 i = 0; i < num; i++)
-		enable[i] = plic_get_ie(plic, context_id, i);
+	ie_words = PLIC_IE_WORDS(plic);
+	ie_value = enable ? 0xffffffffU : 0U;
+
+	for (u32 i = 0; i < ie_words; i++)
+		plic_set_ie(plic, context_id, i, ie_value);
+
+	plic_set_thresh(plic, context_id, threshold);
 
-	*threshold = plic_get_thresh(plic, context_id);
+	return 0;
 }
 
-void plic_context_restore(const struct plic_data *plic, bool smode,
-			  const u32 *enable, u32 threshold, u32 num)
+void plic_suspend(const struct plic_data *plic)
 {
-	u32 hartindex = current_hartindex();
-	s16 context_id = plic->context_map[hartindex][smode];
-	u32 ie_words = plic->num_src / 32 + 1;
+	u32 ie_words = PLIC_IE_WORDS(plic);
+	u32 *data_word = plic->pm_data;
+	u8 *data_byte;
 
-	if (num > ie_words)
-		num = ie_words;
+	if (!data_word)
+		return;
 
-	for (u32 i = 0; i < num; i++)
-		plic_set_ie(plic, context_id, i, enable[i]);
+	for (u32 h = 0; h <= sbi_scratch_last_hartindex(); h++) {
+		u32 context_id = plic->context_map[h][PLIC_S_CONTEXT];
 
-	plic_set_thresh(plic, context_id, threshold);
+		if (context_id < 0)
+			continue;
+
+		/* Save the enable bits */
+		for (u32 i = 0; i < ie_words; i++)
+			*data_word++ = plic_get_ie(plic, context_id, i);
+
+		/* Save the context threshold */
+		*data_word++ = plic_get_thresh(plic, context_id);
+	}
+
+	/* Restore the input priorities */
+	data_byte = (u8 *)data_word;
+	for (u32 i = 1; i <= plic->num_src; i++)
+		*data_byte++ = plic_get_priority(plic, i);
 }
 
-static int plic_context_init(const struct plic_data *plic, int context_id,
-			     bool enable, u32 threshold)
+void plic_resume(const struct plic_data *plic)
 {
-	u32 ie_words, ie_value;
+	u32 ie_words = PLIC_IE_WORDS(plic);
+	u32 *data_word = plic->pm_data;
+	u8 *data_byte;
 
-	if (!plic || context_id < 0)
-		return SBI_EINVAL;
+	if (!data_word)
+		return;
 
-	ie_words = plic->num_src / 32 + 1;
-	ie_value = enable ? 0xffffffffU : 0U;
+	for (u32 h = 0; h <= sbi_scratch_last_hartindex(); h++) {
+		u32 context_id = plic->context_map[h][PLIC_S_CONTEXT];
 
-	for (u32 i = 0; i < ie_words; i++)
-		plic_set_ie(plic, context_id, i, ie_value);
+		if (context_id < 0)
+			continue;
 
-	plic_set_thresh(plic, context_id, threshold);
+		/* Restore the enable bits */
+		for (u32 i = 0; i < ie_words; i++)
+			plic_set_ie(plic, context_id, i, *data_word++);
 
-	return 0;
+		/* Restore the context threshold */
+		plic_set_thresh(plic, context_id, *data_word++);
+	}
+
+	/* Restore the input priorities */
+	data_byte = (u8 *)data_word;
+	for (u32 i = 1; i <= plic->num_src; i++)
+		plic_set_priority(plic, i, *data_byte++);
+
+	/* Restore the delegation */
+	plic_delegate(plic);
 }
 
 int plic_warm_irqchip_init(const struct plic_data *plic)
@@ -182,13 +199,38 @@ int plic_warm_irqchip_init(const struct plic_data *plic)
 	return 0;
 }
 
-int plic_cold_irqchip_init(const struct plic_data *plic)
+int plic_cold_irqchip_init(struct plic_data *plic)
 {
 	int i;
 
 	if (!plic)
 		return SBI_EINVAL;
 
+	if (plic->flags & PLIC_FLAG_ENABLE_PM) {
+		unsigned long data_size = 0;
+
+		for (u32 i = 0; i <= sbi_scratch_last_hartindex(); i++) {
+			if (plic->context_map[i][PLIC_S_CONTEXT] < 0)
+				continue;
+
+			/* Allocate space for enable bits */
+			data_size += (plic->num_src / 32 + 1) * sizeof(u32);
+
+			/* Allocate space for the context threshold */
+			data_size += sizeof(u32);
+		}
+
+		/*
+		 * Allocate space for the input priorities. So far,
+		 * priorities on all known implementations fit in 8 bits.
+		 */
+		data_size += plic->num_src * sizeof(u8);
+
+		plic->pm_data = sbi_malloc(data_size);
+		if (!plic->pm_data)
+			return SBI_ENOMEM;
+	}
+
 	/* Configure default priorities of all IRQs */
 	for (i = 1; i <= plic->num_src; i++)
 		plic_set_priority(plic, i, 0);
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index 9b1d5559ce8..c4b06d1ae84 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -60,31 +60,6 @@ static void sun20i_d1_csr_restore(void)
 	csr_write(THEAD_C9XX_CSR_MHINT, csr_mhint);
 }
 
-/*
- * PLIC
- */
-
-#define PLIC_SOURCES			175
-#define PLIC_IE_WORDS			(PLIC_SOURCES / 32 + 1)
-
-static u8 plic_priority[1 + PLIC_SOURCES];
-static u32 plic_sie[PLIC_IE_WORDS];
-static u32 plic_threshold;
-
-static void sun20i_d1_plic_save(void)
-{
-	fdt_plic_context_save(true, plic_sie, &plic_threshold, PLIC_IE_WORDS);
-	fdt_plic_priority_save(plic_priority, PLIC_SOURCES);
-}
-
-static void sun20i_d1_plic_restore(void)
-{
-	thead_plic_restore();
-	fdt_plic_priority_restore(plic_priority, PLIC_SOURCES);
-	fdt_plic_context_restore(true, plic_sie, plic_threshold,
-				 PLIC_IE_WORDS);
-}
-
 /*
  * PPU
  */
@@ -117,6 +92,9 @@ static void sun20i_d1_ppu_restore(void)
 
 static void sun20i_d1_riscv_cfg_save(void)
 {
+	struct plic_data *plic = fdt_plic_get();
+	u32 *plic_sie = plic->pm_data;
+
 	/* Enable MMIO access. Do not assume S-mode leaves the clock enabled. */
 	writel_relaxed(CCU_BGR_ENABLE, SUN20I_D1_CCU_BASE + RISCV_CFG_BGR_REG);
 
@@ -126,7 +104,7 @@ static void sun20i_d1_riscv_cfg_save(void)
 	 * the wakeup mask registers (the offset is for GIC compatibility). So
 	 * copying SIE to the wakeup mask needs some bit manipulation.
 	 */
-	for (int i = 0; i < PLIC_IE_WORDS - 1; i++)
+	for (int i = 0; i < PLIC_IE_WORDS(plic) - 1; i++)
 		writel_relaxed(plic_sie[i] >> 16 | plic_sie[i + 1] << 16,
 			       SUN20I_D1_RISCV_CFG_BASE + WAKEUP_MASK_REG(i));
 
@@ -158,7 +136,7 @@ static int sun20i_d1_hart_suspend(u32 suspend_type)
 	if (!(suspend_type & SBI_HSM_SUSP_NON_RET_BIT))
 		return SBI_ENOTSUPP;
 
-	sun20i_d1_plic_save();
+	fdt_plic_suspend();
 	sun20i_d1_ppu_save();
 	sun20i_d1_riscv_cfg_save();
 	sun20i_d1_csr_save();
@@ -178,7 +156,7 @@ static void sun20i_d1_hart_resume(void)
 	sun20i_d1_csr_restore();
 	sun20i_d1_riscv_cfg_restore();
 	sun20i_d1_ppu_restore();
-	sun20i_d1_plic_restore();
+	fdt_plic_resume();
 }
 
 static const struct sbi_hsm_device sun20i_d1_ppu = {

From 56fddce83f163e5e90ea82bf78a8df3d990b0572 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:06 -0800
Subject: [PATCH 1723/1765] lib: utils/irqchip: Move per-hart data from
 fdt_plic to plic

The per-hart PLIC pointer is not really specific to FDT platforms. Move
it into the main driver and drop the extra wrapper functions.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/irqchip/fdt_irqchip_plic.h | 19 --------
 include/sbi_utils/irqchip/plic.h             |  8 ++--
 lib/utils/irqchip/fdt_irqchip_plic.c         | 49 +-------------------
 lib/utils/irqchip/plic.c                     | 49 ++++++++++++++++++--
 platform/fpga/ariane/platform.c              |  2 +-
 platform/fpga/openpiton/platform.c           |  2 +-
 platform/generic/allwinner/sun20i-d1.c       |  8 ++--
 platform/kendryte/k210/platform.c            |  2 +-
 platform/nuclei/ux600/platform.c             |  2 +-
 platform/template/platform.c                 |  2 +-
 10 files changed, 60 insertions(+), 83 deletions(-)
 delete mode 100644 include/sbi_utils/irqchip/fdt_irqchip_plic.h

diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
deleted file mode 100644
index fe7699936d6..00000000000
--- a/include/sbi_utils/irqchip/fdt_irqchip_plic.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2022 Samuel Holland <samuel@sholland.org>
- */
-
-#ifndef __IRQCHIP_FDT_IRQCHIP_PLIC_H__
-#define __IRQCHIP_FDT_IRQCHIP_PLIC_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi_utils/irqchip/plic.h>
-
-struct plic_data *fdt_plic_get(void);
-
-void fdt_plic_suspend(void);
-
-void fdt_plic_resume(void);
-
-#endif
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 29fe60c1166..5c638e149a4 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -36,11 +36,13 @@ struct plic_data {
 
 #define PLIC_IE_WORDS(__p)		((__p)->num_src / 32 + 1)
 
-void plic_suspend(const struct plic_data *plic);
+struct plic_data *plic_get(void);
 
-void plic_resume(const struct plic_data *plic);
+void plic_suspend(void);
 
-int plic_warm_irqchip_init(const struct plic_data *plic);
+void plic_resume(void);
+
+int plic_warm_irqchip_init(void);
 
 int plic_cold_irqchip_init(struct plic_data *plic);
 
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 3826d2ae655..ebde7eec1dd 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -18,48 +18,11 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/plic.h>
 
-static unsigned long plic_ptr_offset;
-
-#define plic_get_hart_data_ptr(__scratch)				\
-	sbi_scratch_read_type((__scratch), void *, plic_ptr_offset)
-
-#define plic_set_hart_data_ptr(__scratch, __plic)			\
-	sbi_scratch_write_type((__scratch), void *, plic_ptr_offset, (__plic))
-
-struct plic_data *fdt_plic_get(void)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	return plic_get_hart_data_ptr(scratch);
-}
-
-void fdt_plic_suspend(void)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	plic_suspend(plic_get_hart_data_ptr(scratch));
-}
-
-void fdt_plic_resume(void)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	plic_resume(plic_get_hart_data_ptr(scratch));
-}
-
-static int irqchip_plic_warm_init(void)
-{
-	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
-
-	return plic_warm_irqchip_init(plic_get_hart_data_ptr(scratch));
-}
-
 static int irqchip_plic_update_context_map(const void *fdt, int nodeoff,
 					   struct plic_data *pd)
 {
 	const fdt32_t *val;
 	u32 phandle, hwirq, hartid, hartindex;
-	struct sbi_scratch *scratch;
 	int i, err, count, cpu_offset, cpu_intc_offset;
 
 	val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
@@ -84,11 +47,9 @@ static int irqchip_plic_update_context_map(const void *fdt, int nodeoff,
 			continue;
 
 		hartindex = sbi_hartid_to_hartindex(hartid);
-		scratch = sbi_hartindex_to_scratch(hartindex);
-		if (!scratch)
+		if (hartindex == -1U)
 			continue;
 
-		plic_set_hart_data_ptr(scratch, pd);
 		switch (hwirq) {
 		case IRQ_M_EXT:
 			pd->context_map[hartindex][PLIC_M_CONTEXT] = i / 2;
@@ -110,12 +71,6 @@ static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
 	int rc;
 	struct plic_data *pd;
 
-	if (!plic_ptr_offset) {
-		plic_ptr_offset = sbi_scratch_alloc_type_offset(void *);
-		if (!plic_ptr_offset)
-			return SBI_ENOMEM;
-	}
-
 	pd = sbi_zalloc(PLIC_DATA_SIZE(plat->hart_count));
 	if (!pd)
 		return SBI_ENOMEM;
@@ -153,6 +108,6 @@ static const struct fdt_match irqchip_plic_match[] = {
 struct fdt_irqchip fdt_irqchip_plic = {
 	.match_table = irqchip_plic_match,
 	.cold_init = irqchip_plic_cold_init,
-	.warm_init = irqchip_plic_warm_init,
+	.warm_init = plic_warm_irqchip_init,
 	.exit = NULL,
 };
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index ab58e390622..ca506c4ca36 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -27,6 +27,21 @@
 
 #define THEAD_PLIC_CTRL_REG 0x1ffffc
 
+static unsigned long plic_ptr_offset;
+
+#define plic_get_hart_data_ptr(__scratch)				\
+	sbi_scratch_read_type((__scratch), void *, plic_ptr_offset)
+
+#define plic_set_hart_data_ptr(__scratch, __plic)			\
+	sbi_scratch_write_type((__scratch), void *, plic_ptr_offset, (__plic))
+
+struct plic_data *plic_get(void)
+{
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+
+	return plic_get_hart_data_ptr(scratch);
+}
+
 static u32 plic_get_priority(const struct plic_data *plic, u32 source)
 {
 	volatile void *plic_priority = (char *)plic->addr +
@@ -109,8 +124,10 @@ static int plic_context_init(const struct plic_data *plic, int context_id,
 	return 0;
 }
 
-void plic_suspend(const struct plic_data *plic)
+void plic_suspend(void)
 {
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct plic_data *plic = plic_get_hart_data_ptr(scratch);
 	u32 ie_words = PLIC_IE_WORDS(plic);
 	u32 *data_word = plic->pm_data;
 	u8 *data_byte;
@@ -138,8 +155,10 @@ void plic_suspend(const struct plic_data *plic)
 		*data_byte++ = plic_get_priority(plic, i);
 }
 
-void plic_resume(const struct plic_data *plic)
+void plic_resume(void)
 {
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct plic_data *plic = plic_get_hart_data_ptr(scratch);
 	u32 ie_words = PLIC_IE_WORDS(plic);
 	u32 *data_word = plic->pm_data;
 	u8 *data_byte;
@@ -170,8 +189,10 @@ void plic_resume(const struct plic_data *plic)
 	plic_delegate(plic);
 }
 
-int plic_warm_irqchip_init(const struct plic_data *plic)
+int plic_warm_irqchip_init(void)
 {
+	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+	const struct plic_data *plic = plic_get_hart_data_ptr(scratch);
 	u32 hartindex = current_hartindex();
 	s16 m_cntx_id = plic->context_map[hartindex][PLIC_M_CONTEXT];
 	s16 s_cntx_id = plic->context_map[hartindex][PLIC_S_CONTEXT];
@@ -201,11 +222,17 @@ int plic_warm_irqchip_init(const struct plic_data *plic)
 
 int plic_cold_irqchip_init(struct plic_data *plic)
 {
-	int i;
+	int i, ret;
 
 	if (!plic)
 		return SBI_EINVAL;
 
+	if (!plic_ptr_offset) {
+		plic_ptr_offset = sbi_scratch_alloc_type_offset(void *);
+		if (!plic_ptr_offset)
+			return SBI_ENOMEM;
+	}
+
 	if (plic->flags & PLIC_FLAG_ENABLE_PM) {
 		unsigned long data_size = 0;
 
@@ -237,7 +264,19 @@ int plic_cold_irqchip_init(struct plic_data *plic)
 
 	plic_delegate(plic);
 
-	return sbi_domain_root_add_memrange(plic->addr, plic->size, BIT(20),
+	ret = sbi_domain_root_add_memrange(plic->addr, plic->size, BIT(20),
 					(SBI_DOMAIN_MEMREGION_MMIO |
 					 SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
+	if (ret)
+		return ret;
+
+	for (u32 i = 0; i <= sbi_scratch_last_hartindex(); i++) {
+		if (plic->context_map[i][PLIC_M_CONTEXT] < 0 &&
+		    plic->context_map[i][PLIC_S_CONTEXT] < 0)
+			continue;
+
+		plic_set_hart_data_ptr(sbi_hartindex_to_scratch(i), plic);
+	}
+
+	return 0;
 }
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 7a9283b34f4..8cc4dadb928 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -110,7 +110,7 @@ static int ariane_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic);
+	return plic_warm_irqchip_init();
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 0822c9fdb3d..175751db8a9 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -143,7 +143,7 @@ static int openpiton_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic);
+	return plic_warm_irqchip_init();
 }
 
 /*
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index c4b06d1ae84..b65013c29ab 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -17,7 +17,7 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/irqchip/fdt_irqchip_plic.h>
+#include <sbi_utils/irqchip/plic.h>
 
 #define SUN20I_D1_CCU_BASE		((void *)0x02001000)
 #define SUN20I_D1_RISCV_CFG_BASE	((void *)0x06010000)
@@ -92,7 +92,7 @@ static void sun20i_d1_ppu_restore(void)
 
 static void sun20i_d1_riscv_cfg_save(void)
 {
-	struct plic_data *plic = fdt_plic_get();
+	struct plic_data *plic = plic_get();
 	u32 *plic_sie = plic->pm_data;
 
 	/* Enable MMIO access. Do not assume S-mode leaves the clock enabled. */
@@ -136,7 +136,7 @@ static int sun20i_d1_hart_suspend(u32 suspend_type)
 	if (!(suspend_type & SBI_HSM_SUSP_NON_RET_BIT))
 		return SBI_ENOTSUPP;
 
-	fdt_plic_suspend();
+	plic_suspend();
 	sun20i_d1_ppu_save();
 	sun20i_d1_riscv_cfg_save();
 	sun20i_d1_csr_save();
@@ -156,7 +156,7 @@ static void sun20i_d1_hart_resume(void)
 	sun20i_d1_csr_restore();
 	sun20i_d1_riscv_cfg_restore();
 	sun20i_d1_ppu_restore();
-	fdt_plic_resume();
+	plic_resume();
 }
 
 static const struct sbi_hsm_device sun20i_d1_ppu = {
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index d5e4622afb8..5a0f62ae8ce 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -146,7 +146,7 @@ static int k210_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(&plic);
+	return plic_warm_irqchip_init();
 }
 
 static int k210_ipi_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index ea68aa4baed..bafaf6787d3 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -200,7 +200,7 @@ static int ux600_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init(&plic);
+	return plic_warm_irqchip_init();
 }
 
 static int ux600_ipi_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index fadd1bb1ff7..c8375d89a19 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -100,7 +100,7 @@ static int platform_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init(&plic);
+	return plic_warm_irqchip_init();
 }
 
 /*

From e3e5686ef903d037c6b5835a6752481a07faf99f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:07 -0800
Subject: [PATCH 1724/1765] lib: sbi_irqchip: Register devices during cold init

Have the SBI irqchip core keep track of registered irqchip devices. This
is useful for any callbacks the irqchip driver may have, such as for
warm initialization, the external interrupt handler function, and any
future support for handling external interrupts (beyond IPIs) in M-mode.

This improves on the tracking done in fdt_irqchip.c, as it tracks device
instances, not just drivers, so callbacks can target a specific device.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_irqchip.h | 10 ++++++++++
 lib/sbi/sbi_irqchip.c     |  8 ++++++++
 lib/utils/irqchip/aplic.c |  7 +++++++
 lib/utils/irqchip/imsic.c |  6 ++++++
 lib/utils/irqchip/plic.c  |  7 +++++++
 5 files changed, 38 insertions(+)

diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
index 0ed02eb4ac9..c88b760a369 100644
--- a/include/sbi/sbi_irqchip.h
+++ b/include/sbi/sbi_irqchip.h
@@ -10,10 +10,17 @@
 #ifndef __SBI_IRQCHIP_H__
 #define __SBI_IRQCHIP_H__
 
+#include <sbi/sbi_list.h>
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch;
 
+/** irqchip hardware device */
+struct sbi_irqchip_device {
+	/** Node in the list of irqchip devices */
+	struct sbi_dlist node;
+};
+
 /**
  * Set external interrupt handling function
  *
@@ -34,6 +41,9 @@ void sbi_irqchip_set_irqfn(int (*fn)(void));
  */
 int sbi_irqchip_process(void);
 
+/** Register an irqchip device to receive callbacks */
+void sbi_irqchip_add_device(struct sbi_irqchip_device *dev);
+
 /** Initialize interrupt controllers */
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
 
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index 0ae604aa672..2ab9d1ffd60 100644
--- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c
@@ -8,8 +8,11 @@
  */
 
 #include <sbi/sbi_irqchip.h>
+#include <sbi/sbi_list.h>
 #include <sbi/sbi_platform.h>
 
+static SBI_LIST_HEAD(irqchip_list);
+
 static int default_irqfn(void)
 {
 	return SBI_ENODEV;
@@ -28,6 +31,11 @@ int sbi_irqchip_process(void)
 	return ext_irqfn();
 }
 
+void sbi_irqchip_add_device(struct sbi_irqchip_device *dev)
+{
+	sbi_list_add_tail(&dev->node, &irqchip_list);
+}
+
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int rc;
diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
index 28f2f26d76c..273718494d0 100644
--- a/lib/utils/irqchip/aplic.c
+++ b/lib/utils/irqchip/aplic.c
@@ -12,6 +12,7 @@
 #include <sbi/sbi_console.h>
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_irqchip.h>
 #include <sbi_utils/irqchip/aplic.h>
 
 #define APLIC_MAX_IDC			(1UL << 14)
@@ -165,6 +166,9 @@ static int aplic_check_msicfg(struct aplic_msicfg_data *msicfg)
 	return 0;
 }
 
+static struct sbi_irqchip_device aplic_device = {
+};
+
 int aplic_cold_irqchip_init(struct aplic_data *aplic)
 {
 	int rc;
@@ -275,5 +279,8 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
 			return rc;
 	}
 
+	/* Register irqchip device */
+	sbi_irqchip_add_device(&aplic_device);
+
 	return 0;
 }
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index ae8b31e0bf0..a3b2cf09f02 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -345,6 +345,9 @@ int imsic_data_check(struct imsic_data *imsic)
 	return 0;
 }
 
+static struct sbi_irqchip_device imsic_device = {
+};
+
 int imsic_cold_irqchip_init(struct imsic_data *imsic)
 {
 	int i, rc;
@@ -387,6 +390,9 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 			return rc;
 	}
 
+	/* Register irqchip device */
+	sbi_irqchip_add_device(&imsic_device);
+
 	/* Register IPI device */
 	sbi_ipi_set_device(&imsic_ipi_device);
 
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index ca506c4ca36..f9eb741105b 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -15,6 +15,7 @@
 #include <sbi/sbi_domain.h>
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_heap.h>
+#include <sbi/sbi_irqchip.h>
 #include <sbi/sbi_string.h>
 #include <sbi_utils/irqchip/plic.h>
 
@@ -220,6 +221,9 @@ int plic_warm_irqchip_init(void)
 	return 0;
 }
 
+static struct sbi_irqchip_device plic_device = {
+};
+
 int plic_cold_irqchip_init(struct plic_data *plic)
 {
 	int i, ret;
@@ -278,5 +282,8 @@ int plic_cold_irqchip_init(struct plic_data *plic)
 		plic_set_hart_data_ptr(sbi_hartindex_to_scratch(i), plic);
 	}
 
+	/* Register irqchip device */
+	sbi_irqchip_add_device(&plic_device);
+
 	return 0;
 }

From 2dd6eaf680556e763a85b0b4ae180391e2671854 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:08 -0800
Subject: [PATCH 1725/1765] lib: sbi_irqchip: Call driver warm_init from SBI
 core

Currently, each platform keeps track of which irqchip driver is in use
and calls its warm init function. Since the generic platform may use
multiple irqchip drivers, it has logic to track an array of drivers.

The code is simplified and made common across platforms by treating warm
init and exit as properties of the driver, not the platform. Then the
platform's only role is to select and prepare a driver during cold boot.

For now, only add a .warm_init hook, since none of the existing drivers
need an .exit hook. It could be added in the future if needed.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_irqchip.h             | 3 +++
 include/sbi_utils/irqchip/imsic.h     | 2 --
 include/sbi_utils/irqchip/plic.h      | 2 --
 lib/sbi/sbi_irqchip.c                 | 9 +++++++++
 lib/utils/irqchip/fdt_irqchip_aplic.c | 8 +-------
 lib/utils/irqchip/fdt_irqchip_imsic.c | 2 +-
 lib/utils/irqchip/fdt_irqchip_plic.c  | 2 +-
 lib/utils/irqchip/imsic.c             | 3 ++-
 lib/utils/irqchip/plic.c              | 3 ++-
 platform/fpga/ariane/platform.c       | 2 +-
 platform/fpga/openpiton/platform.c    | 2 +-
 platform/kendryte/k210/platform.c     | 2 +-
 platform/nuclei/ux600/platform.c      | 2 +-
 platform/template/platform.c          | 2 +-
 14 files changed, 24 insertions(+), 20 deletions(-)

diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
index c88b760a369..9d26067f23c 100644
--- a/include/sbi/sbi_irqchip.h
+++ b/include/sbi/sbi_irqchip.h
@@ -19,6 +19,9 @@ struct sbi_scratch;
 struct sbi_irqchip_device {
 	/** Node in the list of irqchip devices */
 	struct sbi_dlist node;
+
+	/** Initialize per-hart state for the current hart */
+	int (*warm_init)(struct sbi_irqchip_device *dev);
 };
 
 /**
diff --git a/include/sbi_utils/irqchip/imsic.h b/include/sbi_utils/irqchip/imsic.h
index bc9292d36ac..353cefec663 100644
--- a/include/sbi_utils/irqchip/imsic.h
+++ b/include/sbi_utils/irqchip/imsic.h
@@ -43,8 +43,6 @@ int imsic_get_target_file(u32 hartindex);
 
 void imsic_local_irqchip_init(void);
 
-int imsic_warm_irqchip_init(void);
-
 int imsic_data_check(struct imsic_data *imsic);
 
 int imsic_cold_irqchip_init(struct imsic_data *imsic);
diff --git a/include/sbi_utils/irqchip/plic.h b/include/sbi_utils/irqchip/plic.h
index 5c638e149a4..a173871ed4d 100644
--- a/include/sbi_utils/irqchip/plic.h
+++ b/include/sbi_utils/irqchip/plic.h
@@ -42,8 +42,6 @@ void plic_suspend(void);
 
 void plic_resume(void);
 
-int plic_warm_irqchip_init(void);
-
 int plic_cold_irqchip_init(struct plic_data *plic);
 
 #endif
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index 2ab9d1ffd60..1aa18b8b79d 100644
--- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c
@@ -40,11 +40,20 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int rc;
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
+	struct sbi_irqchip_device *dev;
 
 	rc = sbi_platform_irqchip_init(plat, cold_boot);
 	if (rc)
 		return rc;
 
+	sbi_list_for_each_entry(dev, &irqchip_list, node) {
+		if (!dev->warm_init)
+			continue;
+		rc = dev->warm_init(dev);
+		if (rc)
+			return rc;
+	}
+
 	if (ext_irqfn != default_irqfn)
 		csr_set(CSR_MIE, MIP_MEIP);
 
diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c
index 6eb6e085cbe..ed6ccf12929 100644
--- a/lib/utils/irqchip/fdt_irqchip_aplic.c
+++ b/lib/utils/irqchip/fdt_irqchip_aplic.c
@@ -16,12 +16,6 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/aplic.h>
 
-static int irqchip_aplic_warm_init(void)
-{
-	/* Nothing to do here. */
-	return 0;
-}
-
 static int irqchip_aplic_cold_init(const void *fdt, int nodeoff,
 				   const struct fdt_match *match)
 {
@@ -55,6 +49,6 @@ static const struct fdt_match irqchip_aplic_match[] = {
 struct fdt_irqchip fdt_irqchip_aplic = {
 	.match_table = irqchip_aplic_match,
 	.cold_init = irqchip_aplic_cold_init,
-	.warm_init = irqchip_aplic_warm_init,
+	.warm_init = NULL,
 	.exit = NULL,
 };
diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index ca62b42799f..63be6007fb3 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -95,5 +95,5 @@ static const struct fdt_match irqchip_imsic_match[] = {
 struct fdt_irqchip fdt_irqchip_imsic = {
 	.match_table = irqchip_imsic_match,
 	.cold_init = irqchip_imsic_cold_init,
-	.warm_init = imsic_warm_irqchip_init,
+	.warm_init = NULL,
 };
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index ebde7eec1dd..9066d7454d8 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -108,6 +108,6 @@ static const struct fdt_match irqchip_plic_match[] = {
 struct fdt_irqchip fdt_irqchip_plic = {
 	.match_table = irqchip_plic_match,
 	.cold_init = irqchip_plic_cold_init,
-	.warm_init = plic_warm_irqchip_init,
+	.warm_init = NULL,
 	.exit = NULL,
 };
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index a3b2cf09f02..b5198b43185 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -255,7 +255,7 @@ void imsic_local_irqchip_init(void)
 	imsic_local_eix_update(IMSIC_IPI_ID, 1, false, true);
 }
 
-int imsic_warm_irqchip_init(void)
+static int imsic_warm_irqchip_init(struct sbi_irqchip_device *dev)
 {
 	struct imsic_data *imsic = imsic_get_data(current_hartindex());
 
@@ -346,6 +346,7 @@ int imsic_data_check(struct imsic_data *imsic)
 }
 
 static struct sbi_irqchip_device imsic_device = {
+	.warm_init	= imsic_warm_irqchip_init,
 };
 
 int imsic_cold_irqchip_init(struct imsic_data *imsic)
diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
index f9eb741105b..7761ae98ec0 100644
--- a/lib/utils/irqchip/plic.c
+++ b/lib/utils/irqchip/plic.c
@@ -190,7 +190,7 @@ void plic_resume(void)
 	plic_delegate(plic);
 }
 
-int plic_warm_irqchip_init(void)
+static int plic_warm_irqchip_init(struct sbi_irqchip_device *dev)
 {
 	struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
 	const struct plic_data *plic = plic_get_hart_data_ptr(scratch);
@@ -222,6 +222,7 @@ int plic_warm_irqchip_init(void)
 }
 
 static struct sbi_irqchip_device plic_device = {
+	.warm_init	= plic_warm_irqchip_init,
 };
 
 int plic_cold_irqchip_init(struct plic_data *plic)
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 8cc4dadb928..720895ef40e 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -110,7 +110,7 @@ static int ariane_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init();
+	return 0;
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 175751db8a9..1c14c101259 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -143,7 +143,7 @@ static int openpiton_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init();
+	return 0;
 }
 
 /*
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index 5a0f62ae8ce..f654325f49c 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -146,7 +146,7 @@ static int k210_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init();
+	return 0;
 }
 
 static int k210_ipi_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index bafaf6787d3..7b85f1f2c32 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -200,7 +200,7 @@ static int ux600_irqchip_init(bool cold_boot)
 			return rc;
 	}
 
-	return plic_warm_irqchip_init();
+	return 0;
 }
 
 static int ux600_ipi_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index c8375d89a19..c7af31abafa 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -100,7 +100,7 @@ static int platform_irqchip_init(bool cold_boot)
 			return ret;
 	}
 
-	return plic_warm_irqchip_init();
+	return 0;
 }
 
 /*

From 678f5909a3fe54d528276f9afce5dd3148e42cbf Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:09 -0800
Subject: [PATCH 1726/1765] platform: Drop irqchip warm init and exit hooks

Now that driver lifecycle is managed from within the SBI irqchip core,
platforms need only to initialize the driver once during cold init.
Remove the remaining platform hooks that are no longer used.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_platform.h              | 25 +++--------
 include/sbi_utils/irqchip/fdt_irqchip.h | 10 +----
 lib/sbi/sbi_irqchip.c                   | 12 +++---
 lib/utils/irqchip/fdt_irqchip.c         | 57 +------------------------
 lib/utils/irqchip/fdt_irqchip_aplic.c   |  2 -
 lib/utils/irqchip/fdt_irqchip_imsic.c   |  1 -
 lib/utils/irqchip/fdt_irqchip_plic.c    |  2 -
 platform/fpga/ariane/platform.c         | 14 ++----
 platform/fpga/openpiton/platform.c      | 14 ++----
 platform/generic/platform.c             |  1 -
 platform/kendryte/k210/platform.c       | 12 +-----
 platform/nuclei/ux600/platform.c        | 12 +-----
 platform/template/platform.c            | 14 ++----
 13 files changed, 26 insertions(+), 150 deletions(-)

diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index e94ab37cc38..dc852a5c016 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -111,10 +111,8 @@ struct sbi_platform_operations {
 	/** Get platform specific mhpmevent value */
 	uint64_t (*pmu_xlate_to_mhpmevent)(uint32_t event_idx, uint64_t data);
 
-	/** Initialize the platform interrupt controller for current HART */
-	int (*irqchip_init)(bool cold_boot);
-	/** Exit the platform interrupt controller for current HART */
-	void (*irqchip_exit)(void);
+	/** Initialize the platform interrupt controller during cold boot */
+	int (*irqchip_init)(void);
 
 	/** Initialize IPI during cold boot */
 	int (*ipi_init)(void);
@@ -543,32 +541,19 @@ static inline uint64_t sbi_platform_pmu_xlate_to_mhpmevent(const struct sbi_plat
 }
 
 /**
- * Initialize the platform interrupt controller for current HART
+ * Initialize the platform interrupt controller during cold boot
  *
  * @param plat pointer to struct sbi_platform
- * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
-					    bool cold_boot)
+static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat)
 {
 	if (plat && sbi_platform_ops(plat)->irqchip_init)
-		return sbi_platform_ops(plat)->irqchip_init(cold_boot);
+		return sbi_platform_ops(plat)->irqchip_init();
 	return 0;
 }
 
-/**
- * Exit the platform interrupt controller for current HART
- *
- * @param plat pointer to struct sbi_platform
- */
-static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
-{
-	if (plat && sbi_platform_ops(plat)->irqchip_exit)
-		sbi_platform_ops(plat)->irqchip_exit();
-}
-
 /**
  * Initialize the platform IPI support during cold boot
  *
diff --git a/include/sbi_utils/irqchip/fdt_irqchip.h b/include/sbi_utils/irqchip/fdt_irqchip.h
index bc02c0c81fd..0ad0048909f 100644
--- a/include/sbi_utils/irqchip/fdt_irqchip.h
+++ b/include/sbi_utils/irqchip/fdt_irqchip.h
@@ -17,19 +17,13 @@
 struct fdt_irqchip {
 	const struct fdt_match *match_table;
 	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-	int (*warm_init)(void);
-	void (*exit)(void);
 };
 
-void fdt_irqchip_exit(void);
-
-int fdt_irqchip_init(bool cold_boot);
+int fdt_irqchip_init(void);
 
 #else
 
-static inline void fdt_irqchip_exit(void) { }
-
-static inline int fdt_irqchip_init(bool cold_boot) { return 0; }
+static inline int fdt_irqchip_init(void) { return 0; }
 
 #endif
 
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index 1aa18b8b79d..ab487d16087 100644
--- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c
@@ -42,9 +42,11 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
 	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 	struct sbi_irqchip_device *dev;
 
-	rc = sbi_platform_irqchip_init(plat, cold_boot);
-	if (rc)
-		return rc;
+	if (cold_boot) {
+		rc = sbi_platform_irqchip_init(plat);
+		if (rc)
+			return rc;
+	}
 
 	sbi_list_for_each_entry(dev, &irqchip_list, node) {
 		if (!dev->warm_init)
@@ -62,10 +64,6 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
 
 void sbi_irqchip_exit(struct sbi_scratch *scratch)
 {
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-
 	if (ext_irqfn != default_irqfn)
 		csr_clear(CSR_MIE, MIP_MEIP);
-
-	sbi_platform_irqchip_exit(plat);
 }
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index b4f054ae734..2819540a9c7 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -16,40 +16,8 @@
 extern struct fdt_irqchip *fdt_irqchip_drivers[];
 extern unsigned long fdt_irqchip_drivers_size;
 
-#define FDT_IRQCHIP_MAX_DRIVERS	8
-
-static struct fdt_irqchip *current_drivers[FDT_IRQCHIP_MAX_DRIVERS] = {0};
-static int current_drivers_count;
-
-void fdt_irqchip_exit(void)
-{
-	int i;
-
-	for (i = 0; i < current_drivers_count; i++) {
-		if (!current_drivers[i] || !current_drivers[i]->exit)
-			continue;
-		current_drivers[i]->exit();
-	}
-}
-
-static int fdt_irqchip_warm_init(void)
-{
-	int i, rc;
-
-	for (i = 0; i < current_drivers_count; i++) {
-		if (!current_drivers[i] || !current_drivers[i]->warm_init)
-			continue;
-		rc = current_drivers[i]->warm_init();
-		if (rc)
-			return rc;
-	}
-
-	return 0;
-}
-
-static int fdt_irqchip_cold_init(void)
+int fdt_irqchip_init(void)
 {
-	bool drv_added;
 	int pos, noff, rc;
 	struct fdt_irqchip *drv;
 	const struct fdt_match *match;
@@ -59,7 +27,6 @@ static int fdt_irqchip_cold_init(void)
 		drv = fdt_irqchip_drivers[pos];
 
 		noff = -1;
-		drv_added = false;
 		while ((noff = fdt_find_match(fdt, noff,
 					drv->match_table, &match)) >= 0) {
 			if (!fdt_node_is_enabled(fdt,noff))
@@ -72,30 +39,8 @@ static int fdt_irqchip_cold_init(void)
 				if (rc)
 					return rc;
 			}
-
-			if (drv_added)
-				continue;
-
-			current_drivers[current_drivers_count++] = drv;
-			drv_added = true;
 		}
-
-		if (FDT_IRQCHIP_MAX_DRIVERS <= current_drivers_count)
-			break;
 	}
 
 	return 0;
 }
-
-int fdt_irqchip_init(bool cold_boot)
-{
-	int rc;
-
-	if (cold_boot) {
-		rc = fdt_irqchip_cold_init();
-		if (rc)
-			return rc;
-	}
-
-	return fdt_irqchip_warm_init();
-}
diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c
index ed6ccf12929..532d8c48e98 100644
--- a/lib/utils/irqchip/fdt_irqchip_aplic.c
+++ b/lib/utils/irqchip/fdt_irqchip_aplic.c
@@ -49,6 +49,4 @@ static const struct fdt_match irqchip_aplic_match[] = {
 struct fdt_irqchip fdt_irqchip_aplic = {
 	.match_table = irqchip_aplic_match,
 	.cold_init = irqchip_aplic_cold_init,
-	.warm_init = NULL,
-	.exit = NULL,
 };
diff --git a/lib/utils/irqchip/fdt_irqchip_imsic.c b/lib/utils/irqchip/fdt_irqchip_imsic.c
index 63be6007fb3..40d63eb0679 100644
--- a/lib/utils/irqchip/fdt_irqchip_imsic.c
+++ b/lib/utils/irqchip/fdt_irqchip_imsic.c
@@ -95,5 +95,4 @@ static const struct fdt_match irqchip_imsic_match[] = {
 struct fdt_irqchip fdt_irqchip_imsic = {
 	.match_table = irqchip_imsic_match,
 	.cold_init = irqchip_imsic_cold_init,
-	.warm_init = NULL,
 };
diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
index 9066d7454d8..a7388dcc853 100644
--- a/lib/utils/irqchip/fdt_irqchip_plic.c
+++ b/lib/utils/irqchip/fdt_irqchip_plic.c
@@ -108,6 +108,4 @@ static const struct fdt_match irqchip_plic_match[] = {
 struct fdt_irqchip fdt_irqchip_plic = {
 	.match_table = irqchip_plic_match,
 	.cold_init = irqchip_plic_cold_init,
-	.warm_init = NULL,
-	.exit = NULL,
 };
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c
index 720895ef40e..0b4455f1ddb 100644
--- a/platform/fpga/ariane/platform.c
+++ b/platform/fpga/ariane/platform.c
@@ -98,19 +98,11 @@ static int ariane_final_init(bool cold_boot)
 }
 
 /*
- * Initialize the ariane interrupt controller for current HART.
+ * Initialize the ariane interrupt controller during cold boot.
  */
-static int ariane_irqchip_init(bool cold_boot)
+static int ariane_irqchip_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = plic_cold_irqchip_init(&plic);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return plic_cold_irqchip_init(&plic);
 }
 
 /*
diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 1c14c101259..9f4378a4d3a 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -131,19 +131,11 @@ static int openpiton_final_init(bool cold_boot)
 }
 
 /*
- * Initialize the openpiton interrupt controller for current HART.
+ * Initialize the openpiton interrupt controller during cold boot.
  */
-static int openpiton_irqchip_init(bool cold_boot)
+static int openpiton_irqchip_init(void)
 {
-	int ret;
-
-	if (cold_boot) {
-		ret = plic_cold_irqchip_init(&plic);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return plic_cold_irqchip_init(&plic);
 }
 
 /*
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 3b20ffbe780..768b9b68adb 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -419,7 +419,6 @@ const struct sbi_platform_operations platform_ops = {
 	.extensions_init	= generic_extensions_init,
 	.domains_init		= generic_domains_init,
 	.irqchip_init		= fdt_irqchip_init,
-	.irqchip_exit		= fdt_irqchip_exit,
 	.ipi_init		= fdt_ipi_init,
 	.pmu_init		= generic_pmu_init,
 	.pmu_xlate_to_mhpmevent = generic_pmu_xlate_to_mhpmevent,
diff --git a/platform/kendryte/k210/platform.c b/platform/kendryte/k210/platform.c
index f654325f49c..aff133c62ae 100644
--- a/platform/kendryte/k210/platform.c
+++ b/platform/kendryte/k210/platform.c
@@ -136,17 +136,9 @@ static int k210_final_init(bool cold_boot)
 	return 0;
 }
 
-static int k210_irqchip_init(bool cold_boot)
+static int k210_irqchip_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(&plic);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return plic_cold_irqchip_init(&plic);
 }
 
 static int k210_ipi_init(void)
diff --git a/platform/nuclei/ux600/platform.c b/platform/nuclei/ux600/platform.c
index 7b85f1f2c32..1b67b644283 100644
--- a/platform/nuclei/ux600/platform.c
+++ b/platform/nuclei/ux600/platform.c
@@ -190,17 +190,9 @@ static int ux600_final_init(bool cold_boot)
 	return 0;
 }
 
-static int ux600_irqchip_init(bool cold_boot)
+static int ux600_irqchip_init(void)
 {
-	int rc;
-
-	if (cold_boot) {
-		rc = plic_cold_irqchip_init(&plic);
-		if (rc)
-			return rc;
-	}
-
-	return 0;
+	return plic_cold_irqchip_init(&plic);
 }
 
 static int ux600_ipi_init(void)
diff --git a/platform/template/platform.c b/platform/template/platform.c
index c7af31abafa..bc351bc9937 100644
--- a/platform/template/platform.c
+++ b/platform/template/platform.c
@@ -87,20 +87,12 @@ static int platform_final_init(bool cold_boot)
 }
 
 /*
- * Initialize the platform interrupt controller for current HART.
+ * Initialize the platform interrupt controller during cold boot.
  */
-static int platform_irqchip_init(bool cold_boot)
+static int platform_irqchip_init(void)
 {
-	int ret;
-
 	/* Example if the generic PLIC driver is used */
-	if (cold_boot) {
-		ret = plic_cold_irqchip_init(&plic);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
+	return plic_cold_irqchip_init(&plic);
 }
 
 /*

From 111772353f4a334dfc4a94a17ebbec8e3edc0b5e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 4 Nov 2024 20:10:10 -0800
Subject: [PATCH 1727/1765] lib: sbi_irqchip: Set the IRQ handler when
 registering a chip

In addition to saving some code size, this moves the decision about
setting the top-level external interrupt handler to the irqchip core,
not the specific driver, which would be needed to support chained
interrupt handlers.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_irqchip.h | 13 +++----------
 lib/sbi/sbi_irqchip.c     |  9 +++------
 lib/utils/irqchip/imsic.c |  4 +---
 3 files changed, 7 insertions(+), 19 deletions(-)

diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
index 9d26067f23c..e0ae12f5821 100644
--- a/include/sbi/sbi_irqchip.h
+++ b/include/sbi/sbi_irqchip.h
@@ -22,17 +22,10 @@ struct sbi_irqchip_device {
 
 	/** Initialize per-hart state for the current hart */
 	int (*warm_init)(struct sbi_irqchip_device *dev);
-};
 
-/**
- * Set external interrupt handling function
- *
- * This function is called by OpenSBI platform code to set a handler for
- * external interrupts
- *
- * @param fn function pointer for handling external irqs
- */
-void sbi_irqchip_set_irqfn(int (*fn)(void));
+	/** Handle an IRQ from this irqchip */
+	int (*irq_handle)(void);
+};
 
 /**
  * Process external interrupts
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index ab487d16087..0594e05a3f0 100644
--- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c
@@ -20,12 +20,6 @@ static int default_irqfn(void)
 
 static int (*ext_irqfn)(void) = default_irqfn;
 
-void sbi_irqchip_set_irqfn(int (*fn)(void))
-{
-	if (fn)
-		ext_irqfn = fn;
-}
-
 int sbi_irqchip_process(void)
 {
 	return ext_irqfn();
@@ -34,6 +28,9 @@ int sbi_irqchip_process(void)
 void sbi_irqchip_add_device(struct sbi_irqchip_device *dev)
 {
 	sbi_list_add_tail(&dev->node, &irqchip_list);
+
+	if (dev->irq_handle)
+		ext_irqfn = dev->irq_handle;
 }
 
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
index b5198b43185..057b9fa7d9c 100644
--- a/lib/utils/irqchip/imsic.c
+++ b/lib/utils/irqchip/imsic.c
@@ -347,6 +347,7 @@ int imsic_data_check(struct imsic_data *imsic)
 
 static struct sbi_irqchip_device imsic_device = {
 	.warm_init	= imsic_warm_irqchip_init,
+	.irq_handle	= imsic_external_irqfn,
 };
 
 int imsic_cold_irqchip_init(struct imsic_data *imsic)
@@ -376,9 +377,6 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
 			return SBI_ENOMEM;
 	}
 
-	/* Setup external interrupt function for IMSIC */
-	sbi_irqchip_set_irqfn(imsic_external_irqfn);
-
 	/* Add IMSIC regions to the root domain */
 	for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) {
 		rc = sbi_domain_root_add_memrange(imsic->regs[i].addr,

From 23ef9c5f00b81cffbbf7ff6894f241fad07ee4b7 Mon Sep 17 00:00:00 2001
From: Nick Hu <nick.hu@sifive.com>
Date: Fri, 15 Nov 2024 15:33:08 +0800
Subject: [PATCH 1728/1765] sbi: fwft: clear the config lock when warm boot

The hotplug cpu should clear the fwft config's SBI_FWFT_SET_FLAG_LOCK
in the warm boot flow otherwise the cpu can't set the menvcfg.sse by
SBI_EXT_FWFT_SET sbi call and cause the illegal instruction when
accessing the CSR_SSP in kernel.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_fwft.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/lib/sbi/sbi_fwft.c b/lib/sbi/sbi_fwft.c
index 9cf14c16663..0cb165b4e16 100644
--- a/lib/sbi/sbi_fwft.c
+++ b/lib/sbi/sbi_fwft.c
@@ -311,6 +311,18 @@ static int fwft_get_feature(enum sbi_fwft_feature_t feature,
 	return SBI_SUCCESS;
 }
 
+static void fwft_clear_config_lock(enum sbi_fwft_feature_t feature)
+{
+	int ret;
+	struct fwft_config *conf;
+
+	ret = fwft_get_feature(feature, &conf);
+	if (ret)
+		return;
+
+	conf->flags &= ~SBI_FWFT_SET_FLAG_LOCK;
+}
+
 int sbi_fwft_set(enum sbi_fwft_feature_t feature, unsigned long value,
 		 unsigned long flags)
 {
@@ -414,5 +426,8 @@ int sbi_fwft_init(struct sbi_scratch *scratch, bool cold_boot)
 		fwft_set_hart_state_ptr(scratch, fhs);
 	}
 
+	for (i = 0; i < array_size(features); i++)
+		fwft_clear_config_lock(features[i].id);
+
 	return 0;
 }

From df1c1000014049d95d65de831f9015a2dcf9fa34 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:45 -0800
Subject: [PATCH 1729/1765] treewide: Make carray arrays const and
 NULL-terminated

This allows the compiler to generate significantly better code, because
it does not have to maintain either the loop counter or loop limit. Plus
there are half as many symbols to relocate. This also simplifies passing
carray arrays to helper functions.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_ecall.c             | 5 ++---
 lib/sbi/tests/sbi_unit_test.c   | 5 ++---
 lib/utils/gpio/fdt_gpio.c       | 5 ++---
 lib/utils/i2c/fdt_i2c.c         | 5 ++---
 lib/utils/ipi/fdt_ipi.c         | 5 ++---
 lib/utils/irqchip/fdt_irqchip.c | 5 ++---
 lib/utils/regmap/fdt_regmap.c   | 5 ++---
 lib/utils/reset/fdt_reset.c     | 5 ++---
 lib/utils/serial/fdt_serial.c   | 7 +++----
 lib/utils/timer/fdt_timer.c     | 5 ++---
 platform/generic/platform.c     | 5 ++---
 scripts/carray.sh               | 7 +++----
 12 files changed, 26 insertions(+), 38 deletions(-)

diff --git a/lib/sbi/sbi_ecall.c b/lib/sbi/sbi_ecall.c
index d4fc58c59d7..be0b67e1c11 100644
--- a/lib/sbi/sbi_ecall.c
+++ b/lib/sbi/sbi_ecall.c
@@ -13,8 +13,7 @@
 #include <sbi/sbi_error.h>
 #include <sbi/sbi_trap.h>
 
-extern struct sbi_ecall_extension *sbi_ecall_exts[];
-extern unsigned long sbi_ecall_exts_size;
+extern struct sbi_ecall_extension *const sbi_ecall_exts[];
 
 u16 sbi_ecall_version_major(void)
 {
@@ -148,7 +147,7 @@ int sbi_ecall_init(void)
 	struct sbi_ecall_extension *ext;
 	unsigned long i;
 
-	for (i = 0; i < sbi_ecall_exts_size; i++) {
+	for (i = 0; sbi_ecall_exts[i]; i++) {
 		ext = sbi_ecall_exts[i];
 		ret = SBI_ENODEV;
 
diff --git a/lib/sbi/tests/sbi_unit_test.c b/lib/sbi/tests/sbi_unit_test.c
index cd091663090..d5e81568a9b 100644
--- a/lib/sbi/tests/sbi_unit_test.c
+++ b/lib/sbi/tests/sbi_unit_test.c
@@ -11,8 +11,7 @@
 #define ANSI_COLOR_RED "\x1b[31m"
 #define ANSI_COLOR_RESET "\x1b[0m"
 
-extern struct sbiunit_test_suite *sbi_unit_tests[];
-extern unsigned long sbi_unit_tests_size;
+extern struct sbiunit_test_suite *const sbi_unit_tests[];
 
 static void run_test_suite(struct sbiunit_test_suite *suite)
 {
@@ -48,6 +47,6 @@ void run_all_tests(void)
 
 	sbi_printf("\n# Running SBIUNIT tests #\n");
 
-	for (i = 0; i < sbi_unit_tests_size; i++)
+	for (i = 0; sbi_unit_tests[i]; i++)
 		run_test_suite(sbi_unit_tests[i]);
 }
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index 953fa13a24d..eac2b8637b0 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -13,8 +13,7 @@
 #include <sbi_utils/gpio/fdt_gpio.h>
 
 /* List of FDT gpio drivers generated at compile time */
-extern struct fdt_gpio *fdt_gpio_drivers[];
-extern unsigned long fdt_gpio_drivers_size;
+extern struct fdt_gpio *const fdt_gpio_drivers[];
 
 static int fdt_gpio_init(const void *fdt, int nodeoff)
 {
@@ -27,7 +26,7 @@ static int fdt_gpio_init(const void *fdt, int nodeoff)
 		return SBI_EINVAL;
 
 	/* Try all GPIO drivers one-by-one */
-	for (pos = 0; pos < fdt_gpio_drivers_size; pos++) {
+	for (pos = 0; fdt_gpio_drivers[pos]; pos++) {
 		drv = fdt_gpio_drivers[pos];
 
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
index d23b40dbcf6..56891a0adb8 100644
--- a/lib/utils/i2c/fdt_i2c.c
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -17,8 +17,7 @@
 #include <sbi_utils/i2c/fdt_i2c.h>
 
 /* List of FDT i2c adapter drivers generated at compile time */
-extern struct fdt_i2c_adapter *fdt_i2c_adapter_drivers[];
-extern unsigned long fdt_i2c_adapter_drivers_size;
+extern struct fdt_i2c_adapter *const fdt_i2c_adapter_drivers[];
 
 static int fdt_i2c_adapter_init(const void *fdt, int nodeoff)
 {
@@ -27,7 +26,7 @@ static int fdt_i2c_adapter_init(const void *fdt, int nodeoff)
 	const struct fdt_match *match;
 
 	/* Try all I2C drivers one-by-one */
-	for (pos = 0; pos < fdt_i2c_adapter_drivers_size; pos++) {
+	for (pos = 0; fdt_i2c_adapter_drivers[pos]; pos++) {
 		drv = fdt_i2c_adapter_drivers[pos];
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index c2ff9cfaf70..6c2feafb5b8 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -13,8 +13,7 @@
 #include <sbi_utils/ipi/fdt_ipi.h>
 
 /* List of FDT ipi drivers generated at compile time */
-extern struct fdt_ipi *fdt_ipi_drivers[];
-extern unsigned long fdt_ipi_drivers_size;
+extern struct fdt_ipi *const fdt_ipi_drivers[];
 
 int fdt_ipi_init(void)
 {
@@ -23,7 +22,7 @@ int fdt_ipi_init(void)
 	const struct fdt_match *match;
 	const void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < fdt_ipi_drivers_size; pos++) {
+	for (pos = 0; fdt_ipi_drivers[pos]; pos++) {
 		drv = fdt_ipi_drivers[pos];
 
 		noff = -1;
diff --git a/lib/utils/irqchip/fdt_irqchip.c b/lib/utils/irqchip/fdt_irqchip.c
index 2819540a9c7..6ed7711ba91 100644
--- a/lib/utils/irqchip/fdt_irqchip.c
+++ b/lib/utils/irqchip/fdt_irqchip.c
@@ -13,8 +13,7 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 
 /* List of FDT irqchip drivers generated at compile time */
-extern struct fdt_irqchip *fdt_irqchip_drivers[];
-extern unsigned long fdt_irqchip_drivers_size;
+extern struct fdt_irqchip *const fdt_irqchip_drivers[];
 
 int fdt_irqchip_init(void)
 {
@@ -23,7 +22,7 @@ int fdt_irqchip_init(void)
 	const struct fdt_match *match;
 	const void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < fdt_irqchip_drivers_size; pos++) {
+	for (pos = 0; fdt_irqchip_drivers[pos]; pos++) {
 		drv = fdt_irqchip_drivers[pos];
 
 		noff = -1;
diff --git a/lib/utils/regmap/fdt_regmap.c b/lib/utils/regmap/fdt_regmap.c
index 933938fbc1c..ab991c45c6e 100644
--- a/lib/utils/regmap/fdt_regmap.c
+++ b/lib/utils/regmap/fdt_regmap.c
@@ -13,8 +13,7 @@
 #include <sbi_utils/regmap/fdt_regmap.h>
 
 /* List of FDT regmap drivers generated at compile time */
-extern struct fdt_regmap *fdt_regmap_drivers[];
-extern unsigned long fdt_regmap_drivers_size;
+extern struct fdt_regmap *const fdt_regmap_drivers[];
 
 static int fdt_regmap_init(const void *fdt, int nodeoff)
 {
@@ -23,7 +22,7 @@ static int fdt_regmap_init(const void *fdt, int nodeoff)
 	const struct fdt_match *match;
 
 	/* Try all I2C drivers one-by-one */
-	for (pos = 0; pos < fdt_regmap_drivers_size; pos++) {
+	for (pos = 0; fdt_regmap_drivers[pos]; pos++) {
 		drv = fdt_regmap_drivers[pos];
 		match = fdt_match_node(fdt, nodeoff, drv->match_table);
 		if (match && drv->init) {
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 05deb75e317..4b20c3e3d9f 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -14,8 +14,7 @@
 #include <sbi_utils/reset/fdt_reset.h>
 
 /* List of FDT reset drivers generated at compile time */
-extern struct fdt_reset *fdt_reset_drivers[];
-extern unsigned long fdt_reset_drivers_size;
+extern struct fdt_reset *const fdt_reset_drivers[];
 
 int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
 {
@@ -46,6 +45,6 @@ void fdt_reset_init(const void *fdt)
 {
 	int pos;
 
-	for (pos = 0; pos < fdt_reset_drivers_size; pos++)
+	for (pos = 0; fdt_reset_drivers[pos]; pos++)
 		fdt_reset_driver_init(fdt, fdt_reset_drivers[pos]);
 }
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index a2a96cb2630..a7129bdd543 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -14,8 +14,7 @@
 #include <sbi_utils/serial/fdt_serial.h>
 
 /* List of FDT serial drivers generated at compile time */
-extern struct fdt_serial *fdt_serial_drivers[];
-extern unsigned long fdt_serial_drivers_size;
+extern struct fdt_serial *const fdt_serial_drivers[];
 
 int fdt_serial_init(const void *fdt)
 {
@@ -46,7 +45,7 @@ int fdt_serial_init(const void *fdt)
 	}
 
 	/* First check DT node pointed by stdout-path */
-	for (pos = 0; pos < fdt_serial_drivers_size && -1 < noff; pos++) {
+	for (pos = 0; fdt_serial_drivers[pos] && -1 < noff; pos++) {
 		drv = fdt_serial_drivers[pos];
 
 		match = fdt_match_node(fdt, noff, drv->match_table);
@@ -64,7 +63,7 @@ int fdt_serial_init(const void *fdt)
 	}
 
 	/* Lastly check all DT nodes */
-	for (pos = 0; pos < fdt_serial_drivers_size; pos++) {
+	for (pos = 0; fdt_serial_drivers[pos]; pos++) {
 		drv = fdt_serial_drivers[pos];
 
 		noff = -1;
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index 37965f5ef86..a2412409554 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -13,8 +13,7 @@
 #include <sbi_utils/timer/fdt_timer.h>
 
 /* List of FDT timer drivers generated at compile time */
-extern struct fdt_timer *fdt_timer_drivers[];
-extern unsigned long fdt_timer_drivers_size;
+extern struct fdt_timer *const fdt_timer_drivers[];
 
 int fdt_timer_init(void)
 {
@@ -23,7 +22,7 @@ int fdt_timer_init(void)
 	const struct fdt_match *match;
 	const void *fdt = fdt_get_address();
 
-	for (pos = 0; pos < fdt_timer_drivers_size; pos++) {
+	for (pos = 0; fdt_timer_drivers[pos]; pos++) {
 		drv = fdt_timer_drivers[pos];
 
 		noff = -1;
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 768b9b68adb..fb074d4bd32 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -30,8 +30,7 @@
 #include <sbi_utils/serial/semihosting.h>
 
 /* List of platform override modules generated at compile time */
-extern const struct platform_override *platform_override_modules[];
-extern unsigned long platform_override_modules_size;
+extern const struct platform_override *const platform_override_modules[];
 
 static const struct platform_override *generic_plat = NULL;
 static const struct fdt_match *generic_plat_match = NULL;
@@ -42,7 +41,7 @@ static void fw_platform_lookup_special(const void *fdt, int root_offset)
 	const struct fdt_match *match;
 	int pos;
 
-	for (pos = 0; pos < platform_override_modules_size; pos++) {
+	for (pos = 0; platform_override_modules[pos]; pos++) {
 		plat = platform_override_modules[pos];
 		if (!plat->match_table)
 			continue;
diff --git a/scripts/carray.sh b/scripts/carray.sh
index 1fa2366ac40..72808697d84 100755
--- a/scripts/carray.sh
+++ b/scripts/carray.sh
@@ -69,10 +69,9 @@ for VAR in ${VAR_LIST}; do
 done
 printf "\n"
 
-printf "%s *%s[] = {\n" "${TYPE_NAME}" "${ARRAY_NAME}"
+printf "%s *const %s[] = {\n" "${TYPE_NAME}" "${ARRAY_NAME}"
 for VAR in ${VAR_LIST}; do
 	printf "\t&%s,\n" "${VAR}"
 done
-printf "};\n\n"
-
-printf "unsigned long %s_size = sizeof(%s) / sizeof(%s *);\n" "${ARRAY_NAME}" "${ARRAY_NAME}" "${TYPE_NAME}"
+	printf "\tNULL\n"
+printf "};\n"

From 1ccc52c427f3f3b2244798cb1895d32a23abe36c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:46 -0800
Subject: [PATCH 1730/1765] lib: utils/fdt: Add helpers for generic driver
 initialization

Currently, each driver subsystem contains its own code for matching
drivers against the platform's devicetree blob. This bloats firmware
size because the several FDT scanning loops are almost exact copies of
each other, and is confusing because the loops do have some subtle
differences. Furthermore, the existing match algorithm is inefficient:
it scans the FDT structure separately for each driver in the list. A
faster algorithm scans the FDT blob only once, matching all drivers in
the list for each `compatible` property seen.

Add new helpers implementing this faster algorithm. Since they must
iterate through the list of drivers, the driver structure cannot be
opaque. However, since the driver list is an array of pointers, the
`struct fdt_driver` can be embedded in a subsystem-specific driver
structure if needed. These three helpers cover all existing use cases
for driver initialization within OpenSBI.

An additional benefit of centralized driver initialization is the
consistent use of fdt_node_is_enabled().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/fdt/fdt_driver.h | 59 ++++++++++++++++++++++
 lib/utils/fdt/fdt_driver.c         | 80 ++++++++++++++++++++++++++++++
 lib/utils/fdt/objects.mk           |  1 +
 3 files changed, 140 insertions(+)
 create mode 100644 include/sbi_utils/fdt/fdt_driver.h
 create mode 100644 lib/utils/fdt/fdt_driver.c

diff --git a/include/sbi_utils/fdt/fdt_driver.h b/include/sbi_utils/fdt/fdt_driver.h
new file mode 100644
index 00000000000..f6fd26f9835
--- /dev/null
+++ b/include/sbi_utils/fdt/fdt_driver.h
@@ -0,0 +1,59 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * fdt_driver.h - Generic support for initializing drivers from DT nodes.
+ *
+ * Copyright (c) 2024 SiFive
+ */
+
+#ifndef __FDT_DRIVER_H__
+#define __FDT_DRIVER_H__
+
+#include <sbi_utils/fdt/fdt_helper.h>
+
+struct fdt_driver {
+	const struct fdt_match *match_table;
+	int (*init)(const void *fdt, int nodeoff,
+		    const struct fdt_match *match);
+};
+
+/**
+ * Initialize a driver instance for a specific DT node
+ *
+ * @param fdt devicetree blob
+ * @param nodeoff offset of a node in the devicetree blob
+ * @param drivers NULL-terminated array of drivers to match against this node
+ *
+ * @return 0 if a driver was matched and successfully initialized or a negative
+ * error code on failure
+ */
+int fdt_driver_init_by_offset(const void *fdt, int nodeoff,
+			      const struct fdt_driver *const *drivers);
+
+/**
+ * Initialize a driver instance for each DT node that matches any of the
+ * provided drivers
+ *
+ * @param fdt devicetree blob
+ * @param drivers NULL-terminated array of drivers to match against each node
+ *
+ * @return 0 if drivers for all matches (if any) were successfully initialized
+ * or a negative error code on failure
+ */
+int fdt_driver_init_all(const void *fdt,
+			const struct fdt_driver *const *drivers);
+
+/**
+ * Initialize a driver instance for the first DT node that matches any of the
+ * provided drivers
+ *
+ * @param fdt devicetree blob
+ * @param drivers NULL-terminated array of drivers to match against each node
+ *
+ * @return 0 if a driver was matched and successfully initialized or a negative
+ * error code on failure
+ */
+int fdt_driver_init_one(const void *fdt,
+			const struct fdt_driver *const *drivers);
+
+#endif /* __FDT_DRIVER_H__ */
diff --git a/lib/utils/fdt/fdt_driver.c b/lib/utils/fdt/fdt_driver.c
new file mode 100644
index 00000000000..586ea8aa817
--- /dev/null
+++ b/lib/utils/fdt/fdt_driver.c
@@ -0,0 +1,80 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 SiFive
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+int fdt_driver_init_by_offset(const void *fdt, int nodeoff,
+			      const struct fdt_driver *const *drivers)
+{
+	const struct fdt_driver *driver;
+	const struct fdt_match *match;
+	const void *prop;
+	int len, rc;
+
+	if (!fdt_node_is_enabled(fdt, nodeoff))
+		return SBI_ENODEV;
+
+	prop = fdt_getprop(fdt, nodeoff, "compatible", &len);
+	if (!prop)
+		return SBI_ENODEV;
+
+	while ((driver = *drivers++)) {
+		for (match = driver->match_table; match->compatible; match++) {
+			if (!fdt_stringlist_contains(prop, len, match->compatible))
+				continue;
+
+			rc = driver->init(fdt, nodeoff, match);
+			if (rc < 0) {
+				const char *name;
+
+				name = fdt_get_name(fdt, nodeoff, NULL);
+				sbi_printf("%s: %s (%s) init failed: %d\n",
+					   __func__, name, match->compatible, rc);
+			}
+
+			return rc;
+		}
+	}
+
+	return SBI_ENODEV;
+}
+
+static int fdt_driver_init_scan(const void *fdt,
+				const struct fdt_driver *const *drivers,
+				bool one)
+{
+	int nodeoff, rc;
+
+	for (nodeoff = fdt_next_node(fdt, -1, NULL);
+	     nodeoff >= 0;
+	     nodeoff = fdt_next_node(fdt, nodeoff, NULL)) {
+		rc = fdt_driver_init_by_offset(fdt, nodeoff, drivers);
+		if (rc == SBI_ENODEV)
+			continue;
+		if (rc < 0)
+			return rc;
+		if (one)
+			return 0;
+	}
+
+	return one ? SBI_ENODEV : 0;
+}
+
+int fdt_driver_init_all(const void *fdt,
+			const struct fdt_driver *const *drivers)
+{
+	return fdt_driver_init_scan(fdt, drivers, false);
+}
+
+int fdt_driver_init_one(const void *fdt,
+			const struct fdt_driver *const *drivers)
+{
+	return fdt_driver_init_scan(fdt, drivers, true);
+}
diff --git a/lib/utils/fdt/objects.mk b/lib/utils/fdt/objects.mk
index 5cede81197c..1a2298be8a1 100644
--- a/lib/utils/fdt/objects.mk
+++ b/lib/utils/fdt/objects.mk
@@ -7,4 +7,5 @@
 libsbiutils-objs-$(CONFIG_FDT_DOMAIN) += fdt/fdt_domain.o
 libsbiutils-objs-$(CONFIG_FDT_PMU) += fdt/fdt_pmu.o
 libsbiutils-objs-$(CONFIG_FDT) += fdt/fdt_helper.o
+libsbiutils-objs-$(CONFIG_FDT) += fdt/fdt_driver.o
 libsbiutils-objs-$(CONFIG_FDT) += fdt/fdt_fixup.o

From bb008e5d27069925adf88a6af1e6fdcddf93a36f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:47 -0800
Subject: [PATCH 1731/1765] scripts/carray.sh: Avoid useless use of cat

awk(1) takes input files as positional arguments, so there is no need
to read the file with cat(1).

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 scripts/carray.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/scripts/carray.sh b/scripts/carray.sh
index 72808697d84..16c6c13602d 100755
--- a/scripts/carray.sh
+++ b/scripts/carray.sh
@@ -43,19 +43,19 @@ if [ ! -f "${CONFIG_FILE}" ]; then
 	usage
 fi
 
-TYPE_HEADER=`cat ${CONFIG_FILE} | awk '{ if ($1 == "HEADER:") { printf $2; exit 0; } }'`
+TYPE_HEADER=$(awk '{ if ($1 == "HEADER:") { printf $2; exit 0; } }' "${CONFIG_FILE}")
 if [ -z "${TYPE_HEADER}" ]; then
 	echo "Must specify HEADER: in input config file"
 	usage
 fi
 
-TYPE_NAME=`cat ${CONFIG_FILE} | awk '{ if ($1 == "TYPE:") { printf $2; for (i=3; i<=NF; i++) printf " %s", $i; exit 0; } }'`
+TYPE_NAME=$(awk '{ if ($1 == "TYPE:") { printf $2; for (i=3; i<=NF; i++) printf " %s", $i; exit 0; } }' "${CONFIG_FILE}")
 if [ -z "${TYPE_NAME}" ]; then
 	echo "Must specify TYPE: in input config file"
 	usage
 fi
 
-ARRAY_NAME=`cat ${CONFIG_FILE} | awk '{ if ($1 == "NAME:") { printf $2; exit 0; } }'`
+ARRAY_NAME=$(awk '{ if ($1 == "NAME:") { printf $2; exit 0; } }' "${CONFIG_FILE}")
 if [ -z "${ARRAY_NAME}" ]; then
 	echo "Must specify NAME: in input config file"
 	usage

From 10df2d6fb5dba486a74cb47bbc062f3383bba80d Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:48 -0800
Subject: [PATCH 1732/1765] scripts/carray.sh: Allow referencing a struct
 member

It can be useful to embed the objects referenced by a carray inside
another struct. To avoid type punning, the generated carray code must
use the correct type for the enclosing struct and member access to
compute the desired object address.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 scripts/carray.sh | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/scripts/carray.sh b/scripts/carray.sh
index 16c6c13602d..fb985c86c9a 100755
--- a/scripts/carray.sh
+++ b/scripts/carray.sh
@@ -61,6 +61,13 @@ if [ -z "${ARRAY_NAME}" ]; then
 	usage
 fi
 
+MEMBER_NAME=$(awk '{ if ($1 == "MEMBER-NAME:") { printf $2; exit 0; } }' "${CONFIG_FILE}")
+MEMBER_TYPE=$(awk '{ if ($1 == "MEMBER-TYPE:") { printf $2; for (i=3; i<=NF; i++) printf " %s", $i; exit 0; } }' "${CONFIG_FILE}")
+if [ -n "${MEMBER_NAME}" ] && [ -z "${MEMBER_TYPE}" ]; then
+	echo "Must specify MEMBER-TYPE: when using MEMBER-NAME:"
+	usage
+fi
+
 printf "// Generated with $(basename $0) from $(basename ${CONFIG_FILE})\n"
 printf "#include <%s>\n\n" "${TYPE_HEADER}"
 
@@ -69,9 +76,9 @@ for VAR in ${VAR_LIST}; do
 done
 printf "\n"
 
-printf "%s *const %s[] = {\n" "${TYPE_NAME}" "${ARRAY_NAME}"
+printf "%s *const %s[] = {\n" "${MEMBER_TYPE:-${TYPE_NAME}}" "${ARRAY_NAME}"
 for VAR in ${VAR_LIST}; do
-	printf "\t&%s,\n" "${VAR}"
+	printf "\t&%s,\n" "${VAR}${MEMBER_NAME:+.}${MEMBER_NAME}"
 done
 	printf "\tNULL\n"
 printf "};\n"

From bef8f9b8068c6e5e0bb706f90eee30674910a47f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:49 -0800
Subject: [PATCH 1733/1765] lib: utils/gpio: Use fdt_driver for initialization

FDT gpio drivers have an extra .xlate operation, so they need to embed
the `struct fdt_driver` inside the subsystem-specific type. The gpio
subsystem always initializes the driver for a specific DT node.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/gpio/fdt_gpio.h      |  5 ++---
 include/sbi_utils/gpio/gpio.h          |  2 +-
 lib/utils/gpio/fdt_gpio.c              | 27 ++++----------------------
 lib/utils/gpio/fdt_gpio_designware.c   | 10 ++++++----
 lib/utils/gpio/fdt_gpio_drivers.carray |  4 +++-
 lib/utils/gpio/fdt_gpio_sifive.c       | 10 ++++++----
 lib/utils/gpio/fdt_gpio_starfive.c     | 10 ++++++----
 7 files changed, 28 insertions(+), 40 deletions(-)

diff --git a/include/sbi_utils/gpio/fdt_gpio.h b/include/sbi_utils/gpio/fdt_gpio.h
index ab9304bf869..fde667e017f 100644
--- a/include/sbi_utils/gpio/fdt_gpio.h
+++ b/include/sbi_utils/gpio/fdt_gpio.h
@@ -10,18 +10,17 @@
 #ifndef __FDT_GPIO_H__
 #define __FDT_GPIO_H__
 
+#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/gpio/gpio.h>
 
 struct fdt_phandle_args;
 
 /** FDT based GPIO driver */
 struct fdt_gpio {
-	const struct fdt_match *match_table;
+	struct fdt_driver driver;
 	int (*xlate)(struct gpio_chip *chip,
 		     const struct fdt_phandle_args *pargs,
 		     struct gpio_pin *out_pin);
-	int (*init)(const void *fdt, int nodeoff,
-		    const struct fdt_match *match);
 };
 
 /** Get a GPIO pin using "gpios" DT property of client DT node */
diff --git a/include/sbi_utils/gpio/gpio.h b/include/sbi_utils/gpio/gpio.h
index 7a3d8bbe1b1..7027fd195cd 100644
--- a/include/sbi_utils/gpio/gpio.h
+++ b/include/sbi_utils/gpio/gpio.h
@@ -40,7 +40,7 @@ struct gpio_pin {
 /** Representation of a GPIO chip */
 struct gpio_chip {
 	/** Pointer to GPIO driver owning this GPIO chip */
-	void *driver;
+	const void *driver;
 	/** Uniquie ID of the GPIO chip assigned by the driver */
 	unsigned int id;
 	/** Number of GPIOs supported by the GPIO chip */
diff --git a/lib/utils/gpio/fdt_gpio.c b/lib/utils/gpio/fdt_gpio.c
index eac2b8637b0..88ba282d66c 100644
--- a/lib/utils/gpio/fdt_gpio.c
+++ b/lib/utils/gpio/fdt_gpio.c
@@ -13,34 +13,15 @@
 #include <sbi_utils/gpio/fdt_gpio.h>
 
 /* List of FDT gpio drivers generated at compile time */
-extern struct fdt_gpio *const fdt_gpio_drivers[];
+extern const struct fdt_driver *const fdt_gpio_drivers[];
 
 static int fdt_gpio_init(const void *fdt, int nodeoff)
 {
-	int pos, rc;
-	struct fdt_gpio *drv;
-	const struct fdt_match *match;
-
 	/* Check "gpio-controller" property */
-	if (!fdt_getprop(fdt, nodeoff, "gpio-controller", &rc))
+	if (!fdt_getprop(fdt, nodeoff, "gpio-controller", NULL))
 		return SBI_EINVAL;
 
-	/* Try all GPIO drivers one-by-one */
-	for (pos = 0; fdt_gpio_drivers[pos]; pos++) {
-		drv = fdt_gpio_drivers[pos];
-
-		match = fdt_match_node(fdt, nodeoff, drv->match_table);
-		if (match && drv->init) {
-			rc = drv->init(fdt, nodeoff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-			return 0;
-		}
-	}
-
-	return SBI_ENOSYS;
+	return fdt_driver_init_by_offset(fdt, nodeoff, fdt_gpio_drivers);
 }
 
 static int fdt_gpio_chip_find(const void *fdt, int nodeoff,
@@ -71,7 +52,7 @@ int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
 		     struct gpio_pin *out_pin)
 {
 	int rc;
-	struct fdt_gpio *drv;
+	const struct fdt_gpio *drv;
 	struct gpio_chip *chip = NULL;
 	struct fdt_phandle_args pargs;
 
diff --git a/lib/utils/gpio/fdt_gpio_designware.c b/lib/utils/gpio/fdt_gpio_designware.c
index 26e0a7ce49f..8c19b4f1a20 100644
--- a/lib/utils/gpio/fdt_gpio_designware.c
+++ b/lib/utils/gpio/fdt_gpio_designware.c
@@ -30,7 +30,7 @@ struct dw_gpio_chip {
 	struct gpio_chip chip;
 };
 
-extern struct fdt_gpio fdt_gpio_designware;
+const struct fdt_gpio fdt_gpio_designware;
 
 #define pin_to_chip(__p) container_of((__p)->chip, struct dw_gpio_chip, chip);
 
@@ -132,8 +132,10 @@ static const struct fdt_match dw_gpio_match[] = {
 	{ },
 };
 
-struct fdt_gpio fdt_gpio_designware = {
-	.match_table = dw_gpio_match,
+const struct fdt_gpio fdt_gpio_designware = {
+	.driver = {
+		.match_table = dw_gpio_match,
+		.init = dw_gpio_init_bank,
+	},
 	.xlate = fdt_gpio_simple_xlate,
-	.init = dw_gpio_init_bank,
 };
diff --git a/lib/utils/gpio/fdt_gpio_drivers.carray b/lib/utils/gpio/fdt_gpio_drivers.carray
index e863f1c59b1..7807777e77c 100644
--- a/lib/utils/gpio/fdt_gpio_drivers.carray
+++ b/lib/utils/gpio/fdt_gpio_drivers.carray
@@ -1,3 +1,5 @@
 HEADER: sbi_utils/gpio/fdt_gpio.h
-TYPE: struct fdt_gpio
+TYPE: const struct fdt_gpio
 NAME: fdt_gpio_drivers
+MEMBER-NAME: driver
+MEMBER-TYPE: const struct fdt_driver
diff --git a/lib/utils/gpio/fdt_gpio_sifive.c b/lib/utils/gpio/fdt_gpio_sifive.c
index d96bf7753e4..0ebc2a4f517 100644
--- a/lib/utils/gpio/fdt_gpio_sifive.c
+++ b/lib/utils/gpio/fdt_gpio_sifive.c
@@ -60,7 +60,7 @@ static void sifive_gpio_set(struct gpio_pin *gp, int value)
 	writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
 }
 
-extern struct fdt_gpio fdt_gpio_sifive;
+const struct fdt_gpio fdt_gpio_sifive;
 
 static int sifive_gpio_init(const void *fdt, int nodeoff,
 			    const struct fdt_match *match)
@@ -99,8 +99,10 @@ static const struct fdt_match sifive_gpio_match[] = {
 	{ },
 };
 
-struct fdt_gpio fdt_gpio_sifive = {
-	.match_table = sifive_gpio_match,
+const struct fdt_gpio fdt_gpio_sifive = {
+	.driver = {
+		.match_table = sifive_gpio_match,
+		.init = sifive_gpio_init,
+	},
 	.xlate = fdt_gpio_simple_xlate,
-	.init = sifive_gpio_init,
 };
diff --git a/lib/utils/gpio/fdt_gpio_starfive.c b/lib/utils/gpio/fdt_gpio_starfive.c
index 55752425392..4d09b65cf07 100644
--- a/lib/utils/gpio/fdt_gpio_starfive.c
+++ b/lib/utils/gpio/fdt_gpio_starfive.c
@@ -69,7 +69,7 @@ static void starfive_gpio_set(struct gpio_pin *gp, int value)
 	writel(val, (void *)(reg_addr + STARFIVE_GPIO_OUTVAL));
 }
 
-extern struct fdt_gpio fdt_gpio_starfive;
+const struct fdt_gpio fdt_gpio_starfive;
 
 static int starfive_gpio_init(const void *fdt, int nodeoff,
 			      const struct fdt_match *match)
@@ -109,8 +109,10 @@ static const struct fdt_match starfive_gpio_match[] = {
 	{ },
 };
 
-struct fdt_gpio fdt_gpio_starfive = {
-	.match_table = starfive_gpio_match,
+const struct fdt_gpio fdt_gpio_starfive = {
+	.driver = {
+		.match_table = starfive_gpio_match,
+		.init = starfive_gpio_init,
+	},
 	.xlate = fdt_gpio_simple_xlate,
-	.init = starfive_gpio_init,
 };

From 333133edaa8bfe0bf467b58844b569608b84522f Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:50 -0800
Subject: [PATCH 1734/1765] lib: utils/i2c: Use fdt_driver for initialization

The i2c driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. It always initializes the driver for a
specific DT node.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/i2c/fdt_i2c.h              |  8 +-----
 lib/utils/i2c/fdt_i2c.c                      | 30 ++------------------
 lib/utils/i2c/fdt_i2c_adapter_drivers.carray |  2 +-
 lib/utils/i2c/fdt_i2c_dw.c                   |  2 +-
 lib/utils/i2c/fdt_i2c_sifive.c               |  2 +-
 5 files changed, 7 insertions(+), 37 deletions(-)

diff --git a/include/sbi_utils/i2c/fdt_i2c.h b/include/sbi_utils/i2c/fdt_i2c.h
index 65758ec2a77..8cae4c2aee7 100644
--- a/include/sbi_utils/i2c/fdt_i2c.h
+++ b/include/sbi_utils/i2c/fdt_i2c.h
@@ -10,15 +10,9 @@
 #ifndef __FDT_I2C_H__
 #define __FDT_I2C_H__
 
+#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/i2c/i2c.h>
 
-/** FDT based I2C adapter driver */
-struct fdt_i2c_adapter {
-	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff,
-		    const struct fdt_match *match);
-};
-
 /** Get I2C adapter identified by nodeoff */
 int fdt_i2c_adapter_get(const void *fdt, int nodeoff,
 			struct i2c_adapter **out_adapter);
diff --git a/lib/utils/i2c/fdt_i2c.c b/lib/utils/i2c/fdt_i2c.c
index 56891a0adb8..d5d36c21479 100644
--- a/lib/utils/i2c/fdt_i2c.c
+++ b/lib/utils/i2c/fdt_i2c.c
@@ -11,36 +11,11 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <libfdt.h>
 #include <sbi/sbi_error.h>
-#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/i2c/fdt_i2c.h>
 
 /* List of FDT i2c adapter drivers generated at compile time */
-extern struct fdt_i2c_adapter *const fdt_i2c_adapter_drivers[];
-
-static int fdt_i2c_adapter_init(const void *fdt, int nodeoff)
-{
-	int pos, rc;
-	struct fdt_i2c_adapter *drv;
-	const struct fdt_match *match;
-
-	/* Try all I2C drivers one-by-one */
-	for (pos = 0; fdt_i2c_adapter_drivers[pos]; pos++) {
-		drv = fdt_i2c_adapter_drivers[pos];
-		match = fdt_match_node(fdt, nodeoff, drv->match_table);
-		if (match && drv->init) {
-			rc = drv->init(fdt, nodeoff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-			return 0;
-		}
-	}
-
-	return SBI_ENOSYS;
-}
+extern const struct fdt_driver *const fdt_i2c_adapter_drivers[];
 
 static int fdt_i2c_adapter_find(const void *fdt, int nodeoff,
 				struct i2c_adapter **out_adapter)
@@ -50,7 +25,8 @@ static int fdt_i2c_adapter_find(const void *fdt, int nodeoff,
 
 	if (!adapter) {
 		/* I2C adapter not found so initialize matching driver */
-		rc = fdt_i2c_adapter_init(fdt, nodeoff);
+		rc = fdt_driver_init_by_offset(fdt, nodeoff,
+					       fdt_i2c_adapter_drivers);
 		if (rc)
 			return rc;
 
diff --git a/lib/utils/i2c/fdt_i2c_adapter_drivers.carray b/lib/utils/i2c/fdt_i2c_adapter_drivers.carray
index fd51ae1a89c..0e8c73a4012 100644
--- a/lib/utils/i2c/fdt_i2c_adapter_drivers.carray
+++ b/lib/utils/i2c/fdt_i2c_adapter_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/i2c/fdt_i2c.h
-TYPE: struct fdt_i2c_adapter
+TYPE: const struct fdt_driver
 NAME: fdt_i2c_adapter_drivers
diff --git a/lib/utils/i2c/fdt_i2c_dw.c b/lib/utils/i2c/fdt_i2c_dw.c
index 7d14ea0d7b9..b0905e7ba82 100644
--- a/lib/utils/i2c/fdt_i2c_dw.c
+++ b/lib/utils/i2c/fdt_i2c_dw.c
@@ -49,7 +49,7 @@ static const struct fdt_match fdt_dw_i2c_match[] = {
 	{ },
 };
 
-struct fdt_i2c_adapter fdt_i2c_adapter_dw = {
+const struct fdt_driver fdt_i2c_adapter_dw = {
 	.match_table = fdt_dw_i2c_match,
 	.init = fdt_dw_i2c_init,
 };
diff --git a/lib/utils/i2c/fdt_i2c_sifive.c b/lib/utils/i2c/fdt_i2c_sifive.c
index b420a7da526..40811cb408c 100644
--- a/lib/utils/i2c/fdt_i2c_sifive.c
+++ b/lib/utils/i2c/fdt_i2c_sifive.c
@@ -265,7 +265,7 @@ static const struct fdt_match sifive_i2c_match[] = {
 	{ },
 };
 
-struct fdt_i2c_adapter fdt_i2c_adapter_sifive = {
+const struct fdt_driver fdt_i2c_adapter_sifive = {
 	.match_table = sifive_i2c_match,
 	.init = sifive_i2c_init,
 };

From 5fa510c5f69f42d3b700e86c0db9e5bcebd3921c Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:51 -0800
Subject: [PATCH 1735/1765] lib: utils/ipi: Use fdt_driver for initialization

The ipi driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_ipi_init() performs a
best-effort initialization of all matching DT nodes.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/ipi/fdt_ipi.h      |  6 +---
 lib/utils/ipi/fdt_ipi.c              | 42 +++-------------------------
 lib/utils/ipi/fdt_ipi_drivers.carray |  2 +-
 lib/utils/ipi/fdt_ipi_mswi.c         |  4 +--
 lib/utils/ipi/fdt_ipi_plicsw.c       |  4 +--
 5 files changed, 10 insertions(+), 48 deletions(-)

diff --git a/include/sbi_utils/ipi/fdt_ipi.h b/include/sbi_utils/ipi/fdt_ipi.h
index 161f7a2e840..9b014470b7b 100644
--- a/include/sbi_utils/ipi/fdt_ipi.h
+++ b/include/sbi_utils/ipi/fdt_ipi.h
@@ -11,14 +11,10 @@
 #define __FDT_IPI_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_IPI
 
-struct fdt_ipi {
-	const struct fdt_match *match_table;
-	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-};
-
 int fdt_ipi_init(void);
 
 #else
diff --git a/lib/utils/ipi/fdt_ipi.c b/lib/utils/ipi/fdt_ipi.c
index 6c2feafb5b8..644c9c1ce6c 100644
--- a/lib/utils/ipi/fdt_ipi.c
+++ b/lib/utils/ipi/fdt_ipi.c
@@ -7,50 +7,16 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_scratch.h>
-#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 
 /* List of FDT ipi drivers generated at compile time */
-extern struct fdt_ipi *const fdt_ipi_drivers[];
+extern const struct fdt_driver *const fdt_ipi_drivers[];
 
 int fdt_ipi_init(void)
 {
-	int pos, noff, rc;
-	struct fdt_ipi *drv;
-	const struct fdt_match *match;
-	const void *fdt = fdt_get_address();
-
-	for (pos = 0; fdt_ipi_drivers[pos]; pos++) {
-		drv = fdt_ipi_drivers[pos];
-
-		noff = -1;
-		while ((noff = fdt_find_match(fdt, noff,
-					drv->match_table, &match)) >= 0) {
-			if (!fdt_node_is_enabled(fdt, noff))
-				continue;
-
-			/* drv->cold_init must not be NULL */
-			if (drv->cold_init == NULL)
-				return SBI_EFAIL;
-
-			rc = drv->cold_init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-
-			/*
-			 * We will have multiple IPI devices on multi-die or
-			 * multi-socket systems so we cannot break here.
-			 */
-		}
-	}
-
 	/*
-	 * On some single-hart system there is no need for ipi,
-	 * so we cannot return a failure here
+	 * On some single-hart system there is no need for IPIs,
+	 * so do not return a failure if no device is found.
 	 */
-	return 0;
+	return fdt_driver_init_all(fdt_get_address(), fdt_ipi_drivers);
 }
diff --git a/lib/utils/ipi/fdt_ipi_drivers.carray b/lib/utils/ipi/fdt_ipi_drivers.carray
index 275fa9cfa1f..006b0fd933a 100644
--- a/lib/utils/ipi/fdt_ipi_drivers.carray
+++ b/lib/utils/ipi/fdt_ipi_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/ipi/fdt_ipi.h
-TYPE: struct fdt_ipi
+TYPE: const struct fdt_driver
 NAME: fdt_ipi_drivers
diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c
index c58d7722faa..aa37d0d0447 100644
--- a/lib/utils/ipi/fdt_ipi_mswi.c
+++ b/lib/utils/ipi/fdt_ipi_mswi.c
@@ -61,7 +61,7 @@ static const struct fdt_match ipi_mswi_match[] = {
 	{ },
 };
 
-struct fdt_ipi fdt_ipi_mswi = {
+const struct fdt_driver fdt_ipi_mswi = {
 	.match_table = ipi_mswi_match,
-	.cold_init = ipi_mswi_cold_init,
+	.init = ipi_mswi_cold_init,
 };
diff --git a/lib/utils/ipi/fdt_ipi_plicsw.c b/lib/utils/ipi/fdt_ipi_plicsw.c
index a178db1b4f4..be669980ac5 100644
--- a/lib/utils/ipi/fdt_ipi_plicsw.c
+++ b/lib/utils/ipi/fdt_ipi_plicsw.c
@@ -39,7 +39,7 @@ static const struct fdt_match ipi_plicsw_match[] = {
 	{},
 };
 
-struct fdt_ipi fdt_ipi_plicsw = {
+const struct fdt_driver fdt_ipi_plicsw = {
 	.match_table = ipi_plicsw_match,
-	.cold_init   = fdt_plicsw_cold_ipi_init,
+	.init = fdt_plicsw_cold_ipi_init,
 };

From 1f8db2f18ffb4babb27c2070419b7100f998c7f4 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:52 -0800
Subject: [PATCH 1736/1765] lib: utils/regmap: Use fdt_driver for
 initialization

The regmap driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. It always initializes the driver for a
specific DT node.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/regmap/fdt_regmap.h      |  8 +------
 lib/utils/regmap/fdt_regmap.c              | 28 +++-------------------
 lib/utils/regmap/fdt_regmap_drivers.carray |  2 +-
 lib/utils/regmap/fdt_regmap_syscon.c       |  2 +-
 4 files changed, 6 insertions(+), 34 deletions(-)

diff --git a/include/sbi_utils/regmap/fdt_regmap.h b/include/sbi_utils/regmap/fdt_regmap.h
index de946f271b8..a24f7a985ee 100644
--- a/include/sbi_utils/regmap/fdt_regmap.h
+++ b/include/sbi_utils/regmap/fdt_regmap.h
@@ -10,17 +10,11 @@
 #ifndef __FDT_REGMAP_H__
 #define __FDT_REGMAP_H__
 
+#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/regmap/regmap.h>
 
 struct fdt_phandle_args;
 
-/** FDT based regmap driver */
-struct fdt_regmap {
-	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff,
-		    const struct fdt_match *match);
-};
-
 /** Get regmap instance based on phandle */
 int fdt_regmap_get_by_phandle(const void *fdt, u32 phandle,
 			      struct regmap **out_rmap);
diff --git a/lib/utils/regmap/fdt_regmap.c b/lib/utils/regmap/fdt_regmap.c
index ab991c45c6e..2e8c21435ea 100644
--- a/lib/utils/regmap/fdt_regmap.c
+++ b/lib/utils/regmap/fdt_regmap.c
@@ -13,30 +13,7 @@
 #include <sbi_utils/regmap/fdt_regmap.h>
 
 /* List of FDT regmap drivers generated at compile time */
-extern struct fdt_regmap *const fdt_regmap_drivers[];
-
-static int fdt_regmap_init(const void *fdt, int nodeoff)
-{
-	int pos, rc;
-	struct fdt_regmap *drv;
-	const struct fdt_match *match;
-
-	/* Try all I2C drivers one-by-one */
-	for (pos = 0; fdt_regmap_drivers[pos]; pos++) {
-		drv = fdt_regmap_drivers[pos];
-		match = fdt_match_node(fdt, nodeoff, drv->match_table);
-		if (match && drv->init) {
-			rc = drv->init(fdt, nodeoff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-			return 0;
-		}
-	}
-
-	return SBI_ENOSYS;
-}
+extern const struct fdt_driver *const fdt_regmap_drivers[];
 
 static int fdt_regmap_find(const void *fdt, int nodeoff,
 			   struct regmap **out_rmap)
@@ -46,7 +23,8 @@ static int fdt_regmap_find(const void *fdt, int nodeoff,
 
 	if (!rmap) {
 		/* Regmap not found so initialize matching driver */
-		rc = fdt_regmap_init(fdt, nodeoff);
+		rc = fdt_driver_init_by_offset(fdt, nodeoff,
+					       fdt_regmap_drivers);
 		if (rc)
 			return rc;
 
diff --git a/lib/utils/regmap/fdt_regmap_drivers.carray b/lib/utils/regmap/fdt_regmap_drivers.carray
index c2f1c9d0856..d19a932b96a 100644
--- a/lib/utils/regmap/fdt_regmap_drivers.carray
+++ b/lib/utils/regmap/fdt_regmap_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/regmap/fdt_regmap.h
-TYPE: struct fdt_regmap
+TYPE: const struct fdt_driver
 NAME: fdt_regmap_drivers
diff --git a/lib/utils/regmap/fdt_regmap_syscon.c b/lib/utils/regmap/fdt_regmap_syscon.c
index ba559086869..1309a55cd9c 100644
--- a/lib/utils/regmap/fdt_regmap_syscon.c
+++ b/lib/utils/regmap/fdt_regmap_syscon.c
@@ -263,7 +263,7 @@ static const struct fdt_match regmap_syscon_match[] = {
 	{ },
 };
 
-struct fdt_regmap fdt_regmap_syscon = {
+const struct fdt_driver fdt_regmap_syscon = {
 	.match_table = regmap_syscon_match,
 	.init = regmap_syscon_init,
 };

From 6d9ad492dbfdda00add7ff15a8599736f46d040a Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:53 -0800
Subject: [PATCH 1737/1765] lib: utils/reset: Use fdt_driver for initialization

The reset driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_reset_init() performs a
best-effort initialization of all matching DT nodes. Platform-specific
logic expects exactly one DT node to match a single driver. This is
accomplished by using fdt_driver_init_one() with a local list containing
that one driver.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/reset/fdt_reset.h          | 15 +-------
 lib/utils/reset/fdt_reset.c                  | 36 ++------------------
 lib/utils/reset/fdt_reset_atcwdt200.c        |  2 +-
 lib/utils/reset/fdt_reset_drivers.carray     |  2 +-
 lib/utils/reset/fdt_reset_gpio.c             |  4 +--
 lib/utils/reset/fdt_reset_htif.c             |  2 +-
 lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c |  2 +-
 lib/utils/reset/fdt_reset_sunxi_wdt.c        |  2 +-
 lib/utils/reset/fdt_reset_syscon.c           |  4 +--
 platform/generic/sifive/fu740.c              |  9 +++--
 platform/generic/starfive/jh7110.c           |  9 +++--
 11 files changed, 26 insertions(+), 61 deletions(-)

diff --git a/include/sbi_utils/reset/fdt_reset.h b/include/sbi_utils/reset/fdt_reset.h
index f126fd33ca6..5fba3886967 100644
--- a/include/sbi_utils/reset/fdt_reset.h
+++ b/include/sbi_utils/reset/fdt_reset.h
@@ -11,19 +11,10 @@
 #define __FDT_RESET_H__
 
 #include <sbi/sbi_types.h>
-
-struct fdt_reset {
-	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-};
+#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_RESET
 
-/**
- * fdt_reset_driver_init() - initialize reset driver based on the device-tree
- */
-int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv);
-
 /**
  * fdt_reset_init() - initialize reset drivers based on the device-tree
  *
@@ -33,10 +24,6 @@ void fdt_reset_init(const void *fdt);
 
 #else
 
-static inline int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
-{
-	return 0;
-}
 static inline void fdt_reset_init(const void *fdt) { }
 
 #endif
diff --git a/lib/utils/reset/fdt_reset.c b/lib/utils/reset/fdt_reset.c
index 4b20c3e3d9f..633a25cdf34 100644
--- a/lib/utils/reset/fdt_reset.c
+++ b/lib/utils/reset/fdt_reset.c
@@ -7,44 +7,12 @@
  *   Anup Patel <anup.patel@wdc.com>
  */
 
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_scratch.h>
-#include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/reset/fdt_reset.h>
 
 /* List of FDT reset drivers generated at compile time */
-extern struct fdt_reset *const fdt_reset_drivers[];
-
-int fdt_reset_driver_init(const void *fdt, struct fdt_reset *drv)
-{
-	int noff, rc, cnt = 0;
-	const struct fdt_match *match;
-
-	noff = -1;
-	while ((noff = fdt_find_match(fdt, noff,
-				drv->match_table, &match)) >= 0) {
-		if (!fdt_node_is_enabled(fdt, noff))
-			continue;
-
-		if (drv->init) {
-			rc = drv->init(fdt, noff, match);
-			if (!rc)
-				cnt++;
-			else if (rc != SBI_ENODEV) {
-				sbi_printf("%s: %s init failed, %d\n",
-					__func__, match->compatible, rc);
-			}
-		}
-	}
-
-	return cnt > 0 ? 0 : SBI_ENODEV;
-}
+extern const struct fdt_driver *const fdt_reset_drivers[];
 
 void fdt_reset_init(const void *fdt)
 {
-	int pos;
-
-	for (pos = 0; fdt_reset_drivers[pos]; pos++)
-		fdt_reset_driver_init(fdt, fdt_reset_drivers[pos]);
+	fdt_driver_init_all(fdt, fdt_reset_drivers);
 }
diff --git a/lib/utils/reset/fdt_reset_atcwdt200.c b/lib/utils/reset/fdt_reset_atcwdt200.c
index 6ef3b134989..d3e38e61484 100644
--- a/lib/utils/reset/fdt_reset_atcwdt200.c
+++ b/lib/utils/reset/fdt_reset_atcwdt200.c
@@ -111,7 +111,7 @@ static const struct fdt_match atcwdt200_reset_match[] = {
 	{},
 };
 
-struct fdt_reset fdt_reset_atcwdt200 = {
+const struct fdt_driver fdt_reset_atcwdt200 = {
 	.match_table = atcwdt200_reset_match,
 	.init	     = atcwdt200_reset_init,
 };
diff --git a/lib/utils/reset/fdt_reset_drivers.carray b/lib/utils/reset/fdt_reset_drivers.carray
index 6ff799cc4c3..2e9e86af9c8 100644
--- a/lib/utils/reset/fdt_reset_drivers.carray
+++ b/lib/utils/reset/fdt_reset_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/reset/fdt_reset.h
-TYPE: struct fdt_reset
+TYPE: const struct fdt_driver
 NAME: fdt_reset_drivers
diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c
index de81e2eb22a..cf751254299 100644
--- a/lib/utils/reset/fdt_reset_gpio.c
+++ b/lib/utils/reset/fdt_reset_gpio.c
@@ -153,7 +153,7 @@ static const struct fdt_match gpio_poweroff_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_poweroff_gpio = {
+const struct fdt_driver fdt_poweroff_gpio = {
 	.match_table = gpio_poweroff_match,
 	.init = gpio_reset_init,
 };
@@ -163,7 +163,7 @@ static const struct fdt_match gpio_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_gpio = {
+const struct fdt_driver fdt_reset_gpio = {
 	.match_table = gpio_reset_match,
 	.init = gpio_reset_init,
 };
diff --git a/lib/utils/reset/fdt_reset_htif.c b/lib/utils/reset/fdt_reset_htif.c
index 7c04c81c2ec..61c907faa9e 100644
--- a/lib/utils/reset/fdt_reset_htif.c
+++ b/lib/utils/reset/fdt_reset_htif.c
@@ -32,7 +32,7 @@ static const struct fdt_match htif_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_htif = {
+const struct fdt_driver fdt_reset_htif = {
 	.match_table = htif_reset_match,
 	.init = htif_reset_init
 };
diff --git a/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
index 368cd108d62..66826830eaa 100644
--- a/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
+++ b/lib/utils/reset/fdt_reset_sg2042_hwmon_mcu.c
@@ -108,7 +108,7 @@ static const struct fdt_match sg2042_mcu_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_sg2042_mcu = {
+const struct fdt_driver fdt_reset_sg2042_mcu = {
 	.match_table = sg2042_mcu_reset_match,
 	.init = sg2042_mcu_reset_init,
 };
diff --git a/lib/utils/reset/fdt_reset_sunxi_wdt.c b/lib/utils/reset/fdt_reset_sunxi_wdt.c
index f4b06d23047..708bf25cf38 100644
--- a/lib/utils/reset/fdt_reset_sunxi_wdt.c
+++ b/lib/utils/reset/fdt_reset_sunxi_wdt.c
@@ -71,7 +71,7 @@ static const struct fdt_match sunxi_wdt_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_sunxi_wdt = {
+const struct fdt_driver fdt_reset_sunxi_wdt = {
 	.match_table = sunxi_wdt_reset_match,
 	.init = sunxi_wdt_reset_init,
 };
diff --git a/lib/utils/reset/fdt_reset_syscon.c b/lib/utils/reset/fdt_reset_syscon.c
index 0dd76acb895..d1a3bc0e88f 100644
--- a/lib/utils/reset/fdt_reset_syscon.c
+++ b/lib/utils/reset/fdt_reset_syscon.c
@@ -151,7 +151,7 @@ static const struct fdt_match syscon_poweroff_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_syscon_poweroff = {
+const struct fdt_driver fdt_syscon_poweroff = {
 	.match_table = syscon_poweroff_match,
 	.init = syscon_reset_init,
 };
@@ -161,7 +161,7 @@ static const struct fdt_match syscon_reboot_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_syscon_reboot = {
+const struct fdt_driver fdt_syscon_reboot = {
 	.match_table = syscon_reboot_match,
 	.init = syscon_reset_init,
 };
diff --git a/platform/generic/sifive/fu740.c b/platform/generic/sifive/fu740.c
index 46dc02ae536..52ca12ffa64 100644
--- a/platform/generic/sifive/fu740.c
+++ b/platform/generic/sifive/fu740.c
@@ -209,11 +209,16 @@ static const struct fdt_match da9063_reset_match[] = {
 	{ },
 };
 
-struct fdt_reset fdt_reset_da9063 = {
+const struct fdt_driver fdt_reset_da9063 = {
 	.match_table = da9063_reset_match,
 	.init = da9063_reset_init,
 };
 
+static const struct fdt_driver *const sifive_fu740_reset_drivers[] = {
+	&fdt_reset_da9063,
+	NULL
+};
+
 static u64 sifive_fu740_tlbr_flush_limit(const struct fdt_match *match)
 {
 	/*
@@ -232,7 +237,7 @@ static int sifive_fu740_final_init(bool cold_boot, void *fdt,
 	int rc;
 
 	if (cold_boot) {
-		rc = fdt_reset_driver_init(fdt, &fdt_reset_da9063);
+		rc = fdt_driver_init_one(fdt, sifive_fu740_reset_drivers);
 		if (rc)
 			sbi_printf("%s: failed to find da9063 for reset\n",
 				   __func__);
diff --git a/platform/generic/starfive/jh7110.c b/platform/generic/starfive/jh7110.c
index 264fe99cc50..6d95758feb1 100644
--- a/platform/generic/starfive/jh7110.c
+++ b/platform/generic/starfive/jh7110.c
@@ -227,11 +227,16 @@ static const struct fdt_match pm_reset_match[] = {
 	{ },
 };
 
-static struct fdt_reset fdt_reset_pmic = {
+static const struct fdt_driver fdt_reset_pmic = {
 	.match_table = pm_reset_match,
 	.init = pm_reset_init,
 };
 
+static const struct fdt_driver *const starfive_jh7110_reset_drivers[] = {
+	&fdt_reset_pmic,
+	NULL
+};
+
 static int starfive_jh7110_inst_init(const void *fdt)
 {
 	int noff, rc = 0;
@@ -281,7 +286,7 @@ static int starfive_jh7110_final_init(bool cold_boot, void *fdt,
 				      const struct fdt_match *match)
 {
 	if (cold_boot) {
-		fdt_reset_driver_init(fdt, &fdt_reset_pmic);
+		fdt_driver_init_one(fdt, starfive_jh7110_reset_drivers);
 	}
 
 	return 0;

From a524f0a507de18f150ea33ac923117291c6d1d81 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:54 -0800
Subject: [PATCH 1738/1765] lib: utils/serial: Use fdt_driver for
 initialization

The serial driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_serial_init() first
attempts to match the chosen stdout device, and upon failure matches the
first available serial device in the DT. It is a fatal error if no such
device is found. This matches the behavior of fdt_driver_init_one().

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/serial/fdt_serial.h       |  6 +--
 lib/utils/serial/fdt_serial.c               | 52 +++------------------
 lib/utils/serial/fdt_serial_cadence.c       |  2 +-
 lib/utils/serial/fdt_serial_drivers.carray  |  2 +-
 lib/utils/serial/fdt_serial_gaisler.c       |  2 +-
 lib/utils/serial/fdt_serial_htif.c          |  2 +-
 lib/utils/serial/fdt_serial_litex.c         |  2 +-
 lib/utils/serial/fdt_serial_renesas_scif.c  |  2 +-
 lib/utils/serial/fdt_serial_shakti.c        |  2 +-
 lib/utils/serial/fdt_serial_sifive.c        |  2 +-
 lib/utils/serial/fdt_serial_uart8250.c      |  2 +-
 lib/utils/serial/fdt_serial_xlnx_uartlite.c |  2 +-
 12 files changed, 18 insertions(+), 60 deletions(-)

diff --git a/include/sbi_utils/serial/fdt_serial.h b/include/sbi_utils/serial/fdt_serial.h
index 572475c9635..57776105e28 100644
--- a/include/sbi_utils/serial/fdt_serial.h
+++ b/include/sbi_utils/serial/fdt_serial.h
@@ -11,14 +11,10 @@
 #define __FDT_SERIAL_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_SERIAL
 
-struct fdt_serial {
-	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-};
-
 int fdt_serial_init(const void *fdt);
 
 #else
diff --git a/lib/utils/serial/fdt_serial.c b/lib/utils/serial/fdt_serial.c
index a7129bdd543..b0fa82bcec3 100644
--- a/lib/utils/serial/fdt_serial.c
+++ b/lib/utils/serial/fdt_serial.c
@@ -9,19 +9,16 @@
 
 #include <libfdt.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_scratch.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/serial/fdt_serial.h>
 
 /* List of FDT serial drivers generated at compile time */
-extern struct fdt_serial *const fdt_serial_drivers[];
+extern const struct fdt_driver *const fdt_serial_drivers[];
 
 int fdt_serial_init(const void *fdt)
 {
 	const void *prop;
-	struct fdt_serial *drv;
-	const struct fdt_match *match;
-	int pos, noff = -1, len, coff, rc;
+	int noff = -1, len, coff, rc;
 
 	/* Find offset of node pointed to by stdout-path */
 	coff = fdt_path_offset(fdt, "/chosen");
@@ -38,50 +35,15 @@ int fdt_serial_init(const void *fdt)
 			else
 				noff = fdt_path_offset(fdt, prop);
 		}
-		if (-1 < noff) {
-			if (!fdt_node_is_enabled(fdt, noff))
-				noff = -1;
-		}
 	}
 
 	/* First check DT node pointed by stdout-path */
-	for (pos = 0; fdt_serial_drivers[pos] && -1 < noff; pos++) {
-		drv = fdt_serial_drivers[pos];
-
-		match = fdt_match_node(fdt, noff, drv->match_table);
-		if (!match)
-			continue;
-
-		/* drv->init must not be NULL */
-		if (drv->init == NULL)
-			return SBI_EFAIL;
-
-		rc = drv->init(fdt, noff, match);
-		if (rc == SBI_ENODEV)
-			continue;
-		return rc;
-	}
-
-	/* Lastly check all DT nodes */
-	for (pos = 0; fdt_serial_drivers[pos]; pos++) {
-		drv = fdt_serial_drivers[pos];
-
-		noff = -1;
-		while ((noff = fdt_find_match(fdt, noff,
-					drv->match_table, &match)) >= 0) {
-			if (!fdt_node_is_enabled(fdt, noff))
-				continue;
-
-			/* drv->init must not be NULL */
-			if (drv->init == NULL)
-				return SBI_EFAIL;
-
-			rc = drv->init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
+	if (-1 < noff) {
+		rc = fdt_driver_init_by_offset(fdt, noff, fdt_serial_drivers);
+		if (rc != SBI_ENODEV)
 			return rc;
-		}
 	}
 
-	return SBI_ENODEV;
+	/* Lastly check all DT nodes */
+	return fdt_driver_init_one(fdt, fdt_serial_drivers);
 }
diff --git a/lib/utils/serial/fdt_serial_cadence.c b/lib/utils/serial/fdt_serial_cadence.c
index ee7d7797112..0a497a41f6a 100644
--- a/lib/utils/serial/fdt_serial_cadence.c
+++ b/lib/utils/serial/fdt_serial_cadence.c
@@ -30,7 +30,7 @@ static const struct fdt_match serial_cadence_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_cadence = {
+const struct fdt_driver fdt_serial_cadence = {
 	.match_table = serial_cadence_match,
 	.init = serial_cadence_init
 };
diff --git a/lib/utils/serial/fdt_serial_drivers.carray b/lib/utils/serial/fdt_serial_drivers.carray
index 3517b2c8529..4336f4e17a3 100644
--- a/lib/utils/serial/fdt_serial_drivers.carray
+++ b/lib/utils/serial/fdt_serial_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/serial/fdt_serial.h
-TYPE: struct fdt_serial
+TYPE: const struct fdt_driver
 NAME: fdt_serial_drivers
diff --git a/lib/utils/serial/fdt_serial_gaisler.c b/lib/utils/serial/fdt_serial_gaisler.c
index cae1727d93f..bf2ee284058 100644
--- a/lib/utils/serial/fdt_serial_gaisler.c
+++ b/lib/utils/serial/fdt_serial_gaisler.c
@@ -29,7 +29,7 @@ static const struct fdt_match serial_gaisler_match[] = {
 	{},
 };
 
-struct fdt_serial fdt_serial_gaisler = {
+const struct fdt_driver fdt_serial_gaisler = {
 	.match_table = serial_gaisler_match,
 	.init = serial_gaisler_init
 };
diff --git a/lib/utils/serial/fdt_serial_htif.c b/lib/utils/serial/fdt_serial_htif.c
index 43557f6cca0..b95caf1e747 100644
--- a/lib/utils/serial/fdt_serial_htif.c
+++ b/lib/utils/serial/fdt_serial_htif.c
@@ -41,7 +41,7 @@ static int serial_htif_init(const void *fdt, int nodeoff,
 	return htif_serial_init(custom, fromhost_addr, tohost_addr);
 }
 
-struct fdt_serial fdt_serial_htif = {
+const struct fdt_driver fdt_serial_htif = {
 	.match_table = serial_htif_match,
 	.init = serial_htif_init
 };
diff --git a/lib/utils/serial/fdt_serial_litex.c b/lib/utils/serial/fdt_serial_litex.c
index 9aed719fe66..7c47911923f 100644
--- a/lib/utils/serial/fdt_serial_litex.c
+++ b/lib/utils/serial/fdt_serial_litex.c
@@ -33,7 +33,7 @@ static const struct fdt_match serial_litex_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_litex = {
+const struct fdt_driver fdt_serial_litex = {
 	.match_table = serial_litex_match,
 	.init = serial_litex_init
 };
diff --git a/lib/utils/serial/fdt_serial_renesas_scif.c b/lib/utils/serial/fdt_serial_renesas_scif.c
index 41356d1d647..b42e1c458f9 100644
--- a/lib/utils/serial/fdt_serial_renesas_scif.c
+++ b/lib/utils/serial/fdt_serial_renesas_scif.c
@@ -25,7 +25,7 @@ static const struct fdt_match serial_renesas_scif_match[] = {
 	{ /* sentinel */ }
 };
 
-struct fdt_serial fdt_serial_renesas_scif = {
+const struct fdt_driver fdt_serial_renesas_scif = {
 	.match_table = serial_renesas_scif_match,
 	.init = serial_renesas_scif_init
 };
diff --git a/lib/utils/serial/fdt_serial_shakti.c b/lib/utils/serial/fdt_serial_shakti.c
index 2bafc99b579..7a324643594 100644
--- a/lib/utils/serial/fdt_serial_shakti.c
+++ b/lib/utils/serial/fdt_serial_shakti.c
@@ -27,7 +27,7 @@ static const struct fdt_match serial_shakti_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_shakti = {
+const struct fdt_driver fdt_serial_shakti = {
 	.match_table = serial_shakti_match,
 	.init = serial_shakti_init
 };
diff --git a/lib/utils/serial/fdt_serial_sifive.c b/lib/utils/serial/fdt_serial_sifive.c
index f551b78cb22..b1811ee966d 100644
--- a/lib/utils/serial/fdt_serial_sifive.c
+++ b/lib/utils/serial/fdt_serial_sifive.c
@@ -30,7 +30,7 @@ static const struct fdt_match serial_sifive_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_sifive = {
+const struct fdt_driver fdt_serial_sifive = {
 	.match_table = serial_sifive_match,
 	.init = serial_sifive_init
 };
diff --git a/lib/utils/serial/fdt_serial_uart8250.c b/lib/utils/serial/fdt_serial_uart8250.c
index 10d201cc49e..af5ceac9248 100644
--- a/lib/utils/serial/fdt_serial_uart8250.c
+++ b/lib/utils/serial/fdt_serial_uart8250.c
@@ -33,7 +33,7 @@ static const struct fdt_match serial_uart8250_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_uart8250 = {
+const struct fdt_driver fdt_serial_uart8250 = {
 	.match_table = serial_uart8250_match,
 	.init = serial_uart8250_init,
 };
diff --git a/lib/utils/serial/fdt_serial_xlnx_uartlite.c b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
index 0a829ad2288..78e3ffe481c 100644
--- a/lib/utils/serial/fdt_serial_xlnx_uartlite.c
+++ b/lib/utils/serial/fdt_serial_xlnx_uartlite.c
@@ -29,7 +29,7 @@ static const struct fdt_match serial_xlnx_uartlite_match[] = {
 	{ },
 };
 
-struct fdt_serial fdt_serial_xlnx_uartlite = {
+const struct fdt_driver fdt_serial_xlnx_uartlite = {
 	.match_table = serial_xlnx_uartlite_match,
 	.init = serial_xlnx_uartlite_init,
 };

From a387a8dff05bd433c686b77dab13bab0221710e5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland@sifive.com>
Date: Mon, 11 Nov 2024 14:02:55 -0800
Subject: [PATCH 1739/1765] lib: utils/timer: Use fdt_driver for initialization

The timer driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_timer_init() performs a
best-effort initialization of all matching DT nodes.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi_utils/timer/fdt_timer.h      |  6 +---
 lib/utils/timer/fdt_timer.c              | 39 +++---------------------
 lib/utils/timer/fdt_timer_drivers.carray |  2 +-
 lib/utils/timer/fdt_timer_mtimer.c       |  4 +--
 lib/utils/timer/fdt_timer_plmt.c         |  4 +--
 5 files changed, 10 insertions(+), 45 deletions(-)

diff --git a/include/sbi_utils/timer/fdt_timer.h b/include/sbi_utils/timer/fdt_timer.h
index 8f0469dac5e..7bd2faf06dd 100644
--- a/include/sbi_utils/timer/fdt_timer.h
+++ b/include/sbi_utils/timer/fdt_timer.h
@@ -11,14 +11,10 @@
 #define __FDT_TIMER_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_TIMER
 
-struct fdt_timer {
-	const struct fdt_match *match_table;
-	int (*cold_init)(const void *fdt, int nodeoff, const struct fdt_match *match);
-};
-
 int fdt_timer_init(void);
 
 #else
diff --git a/lib/utils/timer/fdt_timer.c b/lib/utils/timer/fdt_timer.c
index a2412409554..d00aa310744 100644
--- a/lib/utils/timer/fdt_timer.c
+++ b/lib/utils/timer/fdt_timer.c
@@ -13,44 +13,13 @@
 #include <sbi_utils/timer/fdt_timer.h>
 
 /* List of FDT timer drivers generated at compile time */
-extern struct fdt_timer *const fdt_timer_drivers[];
+extern const struct fdt_driver *const fdt_timer_drivers[];
 
 int fdt_timer_init(void)
 {
-	int pos, noff, rc;
-	struct fdt_timer *drv;
-	const struct fdt_match *match;
-	const void *fdt = fdt_get_address();
-
-	for (pos = 0; fdt_timer_drivers[pos]; pos++) {
-		drv = fdt_timer_drivers[pos];
-
-		noff = -1;
-		while ((noff = fdt_find_match(fdt, noff,
-					drv->match_table, &match)) >= 0) {
-			if (!fdt_node_is_enabled(fdt, noff))
-				continue;
-
-			/* drv->cold_init must not be NULL */
-			if (drv->cold_init == NULL)
-				return SBI_EFAIL;
-
-			rc = drv->cold_init(fdt, noff, match);
-			if (rc == SBI_ENODEV)
-				continue;
-			if (rc)
-				return rc;
-
-			/*
-			 * We will have multiple timer devices on multi-die or
-			 * multi-socket systems so we cannot break here.
-			 */
-		}
-	}
-
 	/*
-	 * We can't fail here since systems with Sstc might not provide
-	 * mtimer/clint DT node in the device tree.
+	 * Systems with Sstc might not provide any node in the FDT,
+	 * so do not return a failure if no device is found.
 	 */
-	return 0;
+	return fdt_driver_init_all(fdt_get_address(), fdt_timer_drivers);
 }
diff --git a/lib/utils/timer/fdt_timer_drivers.carray b/lib/utils/timer/fdt_timer_drivers.carray
index c62ee733e13..1dd9fb1a433 100644
--- a/lib/utils/timer/fdt_timer_drivers.carray
+++ b/lib/utils/timer/fdt_timer_drivers.carray
@@ -1,3 +1,3 @@
 HEADER: sbi_utils/timer/fdt_timer.h
-TYPE: struct fdt_timer
+TYPE: const struct fdt_driver
 NAME: fdt_timer_drivers
diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c
index e752ddc59d1..224534d89c5 100644
--- a/lib/utils/timer/fdt_timer_mtimer.c
+++ b/lib/utils/timer/fdt_timer_mtimer.c
@@ -162,7 +162,7 @@ static const struct fdt_match timer_mtimer_match[] = {
 	{ },
 };
 
-struct fdt_timer fdt_timer_mtimer = {
+const struct fdt_driver fdt_timer_mtimer = {
 	.match_table = timer_mtimer_match,
-	.cold_init = timer_mtimer_cold_init,
+	.init = timer_mtimer_cold_init,
 };
diff --git a/lib/utils/timer/fdt_timer_plmt.c b/lib/utils/timer/fdt_timer_plmt.c
index 459a11902c5..1e146689971 100644
--- a/lib/utils/timer/fdt_timer_plmt.c
+++ b/lib/utils/timer/fdt_timer_plmt.c
@@ -43,7 +43,7 @@ static const struct fdt_match timer_plmt_match[] = {
 	{},
 };
 
-struct fdt_timer fdt_timer_plmt = {
+const struct fdt_driver fdt_timer_plmt = {
 	.match_table = timer_plmt_match,
-	.cold_init   = fdt_plmt_cold_timer_init,
+	.init = fdt_plmt_cold_timer_init,
 };

From 40e725da031ccdcc76492a7677e418ee5f6ef013 Mon Sep 17 00:00:00 2001
From: Igor Melnikov <imel@purelymail.com>
Date: Thu, 28 Nov 2024 23:15:02 +0100
Subject: [PATCH 1740/1765] Makefile: Fix POSIX grep for multiple patterns

grep -e "-mstrict-align\|-mno-unaligned-access" makes use of GNU grep's
backslash-escaped alternation operator \| which is available in basic
regular expression syntax (BRE) mode.

However, in POSIX grep's BRE mode | is an ordinary character which, when
backslash-escaped, matches itself. Therefore, the search pattern becomes
a plain string '-mstrict-align|-mno-unaligned-access' which obviously
never matches the expected error and CC_SUPPORT_STRICT_ALIGN is always set
to y.

When cross-compiling with LLVM on amd64-unknown-openbsd7.6 host for
riscv64-unknown-elf target this results in a compilation error:

clang: error: unsupported option '-mno-unaligned-access' for target
'riscv64-unknown-elf'

Using multiple -e options for this case maintains consistent behaviour
across different grep implementations and fixes the issue.

Signed-off-by: Igor Melnikov <imel@purelymail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index dae282cc156..d9cee497853 100644
--- a/Makefile
+++ b/Makefile
@@ -184,10 +184,10 @@ OPENSBI_LD_EXCLUDE_LIBS := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_
 CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep -e "-save-restore" >/dev/null && echo n || echo y)
 
 # Check whether the compiler supports -m(no-)strict-align
-CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mstrict-align -x c /dev/null -o /dev/null 2>&1 | grep -e "-mstrict-align\|-mno-unaligned-access" >/dev/null && echo n || echo y)
+CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mstrict-align -x c /dev/null -o /dev/null 2>&1 | grep -e "-mstrict-align" -e "-mno-unaligned-access" >/dev/null && echo n || echo y)
 
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
-CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
+CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep -e "zicsr" -e "zifencei" > /dev/null && echo n || echo y)
 
 ifneq ($(OPENSBI_LD_PIE),y)
 $(error Your linker does not support creating PIEs, opensbi requires this.)

From d8a483fc7fd05f7c72a1690e0db326bd4bcd5514 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Tue, 19 Nov 2024 11:34:35 -0800
Subject: [PATCH 1741/1765] lib: sbi_pmu: PMU raw event v2 support

As per the updated ISA specification and SBI PMU v3.0, lower 56
bits are available for the platform to implement mhpmeventX
encoding. Implement the PMU raw event V2 support defined in SBI
v3.0 which allows more bits for platforms to encode the raw events.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h |  2 ++
 lib/sbi/sbi_pmu.c                 | 13 ++++++++-----
 platform/generic/platform.c       |  3 ++-
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 3aa574669e7..bcb7359f20c 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -245,6 +245,7 @@ enum sbi_pmu_event_type_id {
 	SBI_PMU_EVENT_TYPE_HW				= 0x0,
 	SBI_PMU_EVENT_TYPE_HW_CACHE			= 0x1,
 	SBI_PMU_EVENT_TYPE_HW_RAW			= 0x2,
+	SBI_PMU_EVENT_TYPE_HW_RAW_V2			= 0x3,
 	SBI_PMU_EVENT_TYPE_FW				= 0xf,
 	SBI_PMU_EVENT_TYPE_MAX,
 };
@@ -261,6 +262,7 @@ enum sbi_pmu_ctr_type {
 #define SBI_PMU_EVENT_IDX_TYPE_MASK (0xF << SBI_PMU_EVENT_IDX_TYPE_OFFSET)
 #define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF
 #define SBI_PMU_EVENT_RAW_IDX 0x20000
+#define SBI_PMU_EVENT_RAW_V2_IDX 0x30000
 
 #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF
 
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index b9e845430fc..972b85f4d88 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -172,6 +172,7 @@ static int pmu_event_validate(struct sbi_pmu_hart_state *phs,
 			return SBI_EINVAL;
 		break;
 	case SBI_PMU_EVENT_TYPE_HW_RAW:
+	case SBI_PMU_EVENT_TYPE_HW_RAW_V2:
 		event_idx_code_max = 1; // event_idx.code should be zero
 		break;
 	default:
@@ -259,7 +260,8 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
 
 	/* Sanity check */
 	for (i = 0; i < num_hw_events; i++) {
-		if (eidx_start == SBI_PMU_EVENT_RAW_IDX)
+		if (eidx_start == SBI_PMU_EVENT_RAW_IDX ||
+			eidx_start == SBI_PMU_EVENT_RAW_V2_IDX)
 		/* All raw events have same event idx. Just do sanity check on select */
 			is_overlap = pmu_event_select_overlap(&hw_event_map[i],
 							      select, select_mask);
@@ -290,8 +292,8 @@ static int pmu_add_hw_event_map(u32 eidx_start, u32 eidx_end, u32 cmap,
  */
 int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap)
 {
-	if ((eidx_start > eidx_end) || eidx_start == SBI_PMU_EVENT_RAW_IDX ||
-	     eidx_end == SBI_PMU_EVENT_RAW_IDX)
+	if ((eidx_start > eidx_end) || eidx_start >= SBI_PMU_EVENT_RAW_V2_IDX ||
+	     eidx_end >= SBI_PMU_EVENT_RAW_V2_IDX)
 		return SBI_EINVAL;
 
 	return pmu_add_hw_event_map(eidx_start, eidx_end, cmap, 0, 0);
@@ -300,7 +302,7 @@ int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap)
 int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32 cmap)
 {
 	return pmu_add_hw_event_map(SBI_PMU_EVENT_RAW_IDX,
-				    SBI_PMU_EVENT_RAW_IDX, cmap, select, select_mask);
+				    SBI_PMU_EVENT_RAW_V2_IDX, cmap, select, select_mask);
 }
 
 void sbi_pmu_ovf_irq()
@@ -736,7 +738,8 @@ static int pmu_ctr_find_hw(struct sbi_pmu_hart_state *phs,
 			continue;
 
 		/* For raw events, event data is used as the select value */
-		if (event_idx == SBI_PMU_EVENT_RAW_IDX) {
+		if (event_idx == SBI_PMU_EVENT_RAW_IDX ||
+			event_idx == SBI_PMU_EVENT_RAW_V2_IDX) {
 			uint64_t select_mask = temp->select_mask;
 
 			/* The non-event map bits of data should match the selector */
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index fb074d4bd32..fefb08cfeb6 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -392,7 +392,8 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
 	uint64_t evt_val = 0;
 
 	/* data is valid only for raw events and is equal to event selector */
-	if (event_idx == SBI_PMU_EVENT_RAW_IDX)
+	if (event_idx == SBI_PMU_EVENT_RAW_IDX ||
+		event_idx == SBI_PMU_EVENT_RAW_V2_IDX)
 		evt_val = data;
 	else {
 		/**

From cf196d80aa0850cb9658a8e670fcbb72ed26dc71 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Tue, 19 Nov 2024 11:34:36 -0800
Subject: [PATCH 1742/1765] lib: sbi_pmu: Remove redundant check for fw events

The pmu_validate_event already has the same check for fw events.
The validate function is called prior to the current function
to find a counter for firmware. That's why, the redudant
check can be removed from the find counter function.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 lib/sbi/sbi_pmu.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 972b85f4d88..4fcacbe1ca7 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -795,11 +795,6 @@ static int pmu_ctr_find_fw(struct sbi_pmu_hart_state *phs,
 {
 	int i, cidx;
 
-	if ((event_code >= SBI_PMU_FW_MAX &&
-	    event_code <= SBI_PMU_FW_RESERVED_MAX) ||
-	    event_code > SBI_PMU_FW_PLATFORM)
-		return SBI_EINVAL;
-
 	for_each_set_bit(i, &cmask, BITS_PER_LONG) {
 		cidx = i + cbase;
 		if (cidx < num_hw_ctrs || total_ctrs <= cidx)

From 05970d273c609ff43b372f34150fba2855a94426 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Tue, 19 Nov 2024 11:34:37 -0800
Subject: [PATCH 1743/1765] lib: sbi_pmu: Add SBI PMU event info function
 details.

The SBI v3.0 introduced a new function to query about the events
without invoking CFG_MATCH. This allows supervisor software to
identify which events are supported on the platform with single
SBI call instead of a CFG_MATCH for each event.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_ecall_interface.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index bcb7359f20c..29b18f5fd00 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -12,6 +12,8 @@
 
 /* clang-format off */
 
+#include <sbi/sbi_types.h>
+
 /* SBI Extension IDs */
 #define SBI_EXT_0_1_SET_TIMER			0x0
 #define SBI_EXT_0_1_CONSOLE_PUTCHAR		0x1
@@ -107,6 +109,7 @@
 #define SBI_EXT_PMU_COUNTER_FW_READ	0x5
 #define SBI_EXT_PMU_COUNTER_FW_READ_HI	0x6
 #define SBI_EXT_PMU_SNAPSHOT_SET_SHMEM	0x7
+#define SBI_EXT_PMU_EVENT_GET_INFO		0x8
 
 /* SBI function IDs for DBTR extension */
 #define SBI_EXT_DBTR_NUM_TRIGGERS	0x0
@@ -256,6 +259,12 @@ enum sbi_pmu_ctr_type {
 	SBI_PMU_CTR_TYPE_FW,
 };
 
+struct sbi_pmu_event_info {
+	uint32_t event_idx;
+	uint32_t output;
+	uint64_t event_data;
+};
+
 /* Helper macros to decode event idx */
 #define SBI_PMU_EVENT_IDX_MASK 0xFFFFF
 #define SBI_PMU_EVENT_IDX_TYPE_OFFSET 16

From e4345842168b5725f56a81f1211d08f1a9d6c897 Mon Sep 17 00:00:00 2001
From: Atish Patra <atishp@rivosinc.com>
Date: Tue, 19 Nov 2024 11:34:38 -0800
Subject: [PATCH 1744/1765] lib: sbi_pmu: Implement SBI PMU event info function

Allow the supervisor software to query about the event using the
new function. This supports both firmware and hardware events.
The hardware event presence is verified hw_event_map which is populated
via PMU device tree node. The firmware event presence is checked through
event validation function which should take care of both standard and
platform firmware events.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 include/sbi/sbi_pmu.h   |  2 ++
 lib/sbi/sbi_ecall_pmu.c |  3 ++
 lib/sbi/sbi_pmu.c       | 76 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 81 insertions(+)

diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index 8b1e08c81f3..3649d476475 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -142,6 +142,8 @@ int sbi_pmu_ctr_start(unsigned long cidx_base, unsigned long cidx_mask,
 		      unsigned long flags, uint64_t ival);
 
 int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info);
+int sbi_pmu_event_get_info(unsigned long shmem_lo, unsigned long shmem_high,
+						   unsigned long num_events, unsigned long flags);
 
 unsigned long sbi_pmu_num_ctr(void);
 
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 40a63a626f6..ae7aeca9b8f 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -73,6 +73,9 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_PMU_COUNTER_STOP:
 		ret = sbi_pmu_ctr_stop(regs->a0, regs->a1, regs->a2);
 		break;
+	case SBI_EXT_PMU_EVENT_GET_INFO:
+		ret = sbi_pmu_event_get_info(regs->a0, regs->a1, regs->a2, regs->a3);
+		break;
 	case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM:
 		/* fallthrough as OpenSBI doesn't support snapshot yet */
 	default:
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 4fcacbe1ca7..0696ab5e568 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -10,6 +10,7 @@
 #include <sbi/riscv_asm.h>
 #include <sbi/sbi_bitops.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_heap.h>
@@ -967,6 +968,81 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
 	return 0;
 }
 
+int sbi_pmu_event_get_info(unsigned long shmem_phys_lo, unsigned long shmem_phys_hi,
+			   unsigned long num_events, unsigned long flags)
+{
+	unsigned long shmem_size = num_events * sizeof(struct sbi_pmu_event_info);
+	int i, j, event_type;
+	struct sbi_pmu_event_info *einfo;
+	struct sbi_pmu_hart_state *phs = pmu_thishart_state_ptr();
+	uint32_t event_idx;
+	struct sbi_pmu_hw_event *temp;
+	bool found = false;
+
+	if (flags != 0)
+		return SBI_ERR_INVALID_PARAM;
+
+	/** Check shared memory size and address aligned to 16 byte */
+	if (!num_events || (shmem_phys_lo & 0xF))
+		return SBI_ERR_INVALID_PARAM;
+
+	/*
+	 * On RV32, the M-mode can only access the first 4GB of
+	 * the physical address space because M-mode does not have
+	 * MMU to access full 34-bit physical address space.
+	 *
+	 * Based on above, we simply fail if the upper 32bits of
+	 * the physical address (i.e. a2 register) is non-zero on
+	 * RV32.
+	 */
+	if (shmem_phys_hi)
+		return SBI_EINVALID_ADDR;
+
+	if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(),
+					 shmem_phys_lo, shmem_size, PRV_S,
+					 SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
+		return SBI_ERR_INVALID_ADDRESS;
+
+	sbi_hart_map_saddr(shmem_phys_lo, shmem_size);
+
+	einfo = (struct sbi_pmu_event_info *)(shmem_phys_lo);
+	for (i = 0; i < num_events; i++) {
+		event_idx = einfo[i].event_idx;
+		event_type = pmu_event_validate(phs, event_idx, einfo[i].event_data);
+		if (event_type < 0) {
+			einfo[i].output = 0;
+		} else {
+			for (j = 0; j < num_hw_events; j++) {
+				temp = &hw_event_map[j];
+				if (temp->start_idx <= event_idx && event_idx <= temp->end_idx) {
+					found = true;
+					break;
+				}
+				/* For raw events, event data is used as the select value */
+				if (event_idx == SBI_PMU_EVENT_RAW_IDX ||
+					event_idx == SBI_PMU_EVENT_RAW_V2_IDX) {
+					uint64_t select_mask = temp->select_mask;
+
+					/* just match the selector */
+					if (temp->select == (einfo[i].event_data & select_mask)) {
+						found = true;
+						break;
+					}
+				}
+			}
+			if (found)
+				einfo[i].output = 1;
+			else
+				einfo[i].output = 0;
+			found = false;
+		}
+	}
+
+	sbi_hart_unmap_saddr();
+
+	return 0;
+}
+
 static void pmu_reset_event_map(struct sbi_pmu_hart_state *phs)
 {
 	int j;

From b49d67b70f09149016afbfa07c8f65df1626a157 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Tue, 6 Aug 2024 09:34:34 +0530
Subject: [PATCH 1745/1765] lib: Increase ROOT_REGION_MAX to accomodate more
 memregions

As more drivers adding memregions into root domain, the current static limit
of ROOT_REGION_MAX is not sufficient. Increase the limit to accomodate more
memregions.

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_domain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c
index 7fdcf9d3289..1cf7e2d8a42 100644
--- a/lib/sbi/sbi_domain.c
+++ b/lib/sbi/sbi_domain.c
@@ -24,7 +24,7 @@ SBI_LIST_HEAD(domain_list);
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 
-#define ROOT_REGION_MAX	16
+#define ROOT_REGION_MAX	32
 static u32 root_memregs_count = 0;
 
 struct sbi_domain root = {

From ad846a7cb8cdb98870e42539087f2bc4e786fd22 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Aug 2024 09:38:02 +0530
Subject: [PATCH 1746/1765] lib: utils/mailbox: Add generic mailbox library

Add generic mailbox library which is independent of hardware description
format. The OpenSBI platform support or mailbox drivers can register
mailbox controller instances which can be discovered and used by different
mailbox client drivers. Each mailbox controller instance has a unique ID
which can be used by mailbox client drivers for find the mailbox controller
instance. The mailbox client drivers will typically request a mailbox channel
from the mailbox controller and use it to do data transfer with the remote
end of mailbox channel.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/mailbox.h | 180 ++++++++++++++++++++++++++++
 lib/utils/Kconfig                   |   2 +
 lib/utils/mailbox/Kconfig           |   9 ++
 lib/utils/mailbox/mailbox.c         | 138 +++++++++++++++++++++
 lib/utils/mailbox/objects.mk        |  10 ++
 5 files changed, 339 insertions(+)
 create mode 100644 include/sbi_utils/mailbox/mailbox.h
 create mode 100644 lib/utils/mailbox/Kconfig
 create mode 100644 lib/utils/mailbox/mailbox.c
 create mode 100644 lib/utils/mailbox/objects.mk

diff --git a/include/sbi_utils/mailbox/mailbox.h b/include/sbi_utils/mailbox/mailbox.h
new file mode 100644
index 00000000000..46fd8770155
--- /dev/null
+++ b/include/sbi_utils/mailbox/mailbox.h
@@ -0,0 +1,180 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __MAILBOX_H__
+#define __MAILBOX_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_list.h>
+#include <sbi/riscv_atomic.h>
+
+/** Representation of a mailbox channel */
+struct mbox_chan {
+	/** List head */
+	struct sbi_dlist node;
+	/** Pointer to the mailbox controller */
+	struct mbox_controller *mbox;
+	/**
+	 * Arguments (or parameters) to identify a mailbox channel
+	 * within a mailbox controller.
+	 */
+#define MBOX_CHAN_MAX_ARGS	2
+	u32 chan_args[MBOX_CHAN_MAX_ARGS];
+};
+
+#define to_mbox_chan(__node)	\
+	container_of((__node), struct mbox_chan, node)
+
+/**
+ * Representation of a mailbox data transfer
+ *
+ * NOTE: If both "tx" and "rx" are non-NULL then Tx is done before Rx.
+ */
+struct mbox_xfer {
+#define MBOX_XFER_SEQ			(1UL << 0)
+	/** Transfer flags */
+	unsigned long flags;
+	/** Transfer arguments (or parameters) */
+	void *args;
+	/**
+	 * Sequence number
+	 *
+	 * If MBOX_XFER_SEQ is not set in flags then mbox_chan_xfer()
+	 * will generate a unique sequence number and update this field
+	 * else mbox_chan_xfer() will blindly use the sequence number
+	 * specified by this field.
+	 */
+	long seq;
+	/** Send data pointer */
+	void *tx;
+	/** Send data length (valid only if tx != NULL) */
+	unsigned long tx_len;
+	/**
+	 * Send timeout milliseconds (valid only if tx != NULL)
+	 *
+	 * If this field is non-zero along with tx != NULL then the
+	 * mailbox controller driver will wait specified milliseconds
+	 * for send data transfer to complete else the mailbox controller
+	 * driver will not wait.
+	 */
+	unsigned long tx_timeout;
+	/** Receive data pointer */
+	void *rx;
+	/** Receive data length (valid only if rx != NULL) */
+	unsigned long rx_len;
+	/**
+	 * Receive timeout milliseconds (valid only if rx != NULL)
+	 *
+	 * If this field is non-zero along with rx != NULL then the
+	 * mailbox controller driver will wait specified milliseconds
+	 * for receive data transfer to complete else the mailbox
+	 * controller driver will not wait.
+	 */
+	unsigned long rx_timeout;
+};
+
+#define mbox_xfer_init_tx(__p, __a, __t, __t_len, __t_tim)		\
+do {									\
+	(__p)->flags = 0;						\
+	(__p)->args = (__a);						\
+	(__p)->tx = (__t);						\
+	(__p)->tx_len = (__t_len);					\
+	(__p)->tx_timeout = (__t_tim);					\
+	(__p)->rx = NULL;						\
+	(__p)->rx_len = 0;						\
+	(__p)->rx_timeout = 0;						\
+} while (0)
+
+#define mbox_xfer_init_rx(__p, __a, __r, __r_len, __r_tim)		\
+do {									\
+	(__p)->flags = 0;						\
+	(__p)->args = (__a);						\
+	(__p)->tx = NULL;						\
+	(__p)->tx_len = 0;						\
+	(__p)->tx_timeout = 0;						\
+	(__p)->rx = (__r);						\
+	(__p)->rx_len = (__r_len);					\
+	(__p)->rx_timeout = (__r_tim);					\
+} while (0)
+
+#define mbox_xfer_init_txrx(__p, __a, __t, __t_len, __t_tim, __r, __r_len, __r_tim)\
+do {									\
+	(__p)->flags = 0;						\
+	(__p)->args = (__a);						\
+	(__p)->tx = (__t);						\
+	(__p)->tx_len = (__t_len);					\
+	(__p)->tx_timeout = (__t_tim);					\
+	(__p)->rx = (__r);						\
+	(__p)->rx_len = (__r_len);					\
+	(__p)->rx_timeout = (__r_tim);					\
+} while (0)
+
+#define mbox_xfer_set_sequence(__p, __seq)				\
+do {									\
+	(__p)->flags |= MBOX_XFER_SEQ;					\
+	(__p)->seq = (__seq);						\
+} while (0)
+
+/** Representation of a mailbox controller */
+struct mbox_controller {
+	/** List head */
+	struct sbi_dlist node;
+	/** Next sequence atomic counter */
+	atomic_t xfer_next_seq;
+	/* List of mailbox channels */
+	struct sbi_dlist chan_list;
+	/** Unique ID of the mailbox controller assigned by the driver */
+	unsigned int id;
+	/** Maximum length of transfer supported by the mailbox controller */
+	unsigned int max_xfer_len;
+	/** Pointer to mailbox driver owning this mailbox controller */
+	void *driver;
+	/** Request a mailbox channel from the mailbox controller */
+	struct mbox_chan *(*request_chan)(struct mbox_controller *mbox,
+					  u32 *chan_args);
+	/** Free a mailbox channel from the mailbox controller */
+	void (*free_chan)(struct mbox_controller *mbox,
+			  struct mbox_chan *chan);
+	/** Transfer data over mailbox channel */
+	int (*xfer)(struct mbox_chan *chan, struct mbox_xfer *xfer);
+	/** Get an attribute of mailbox channel */
+	int (*get_attribute)(struct mbox_chan *chan, int attr_id, void *out_value);
+	/** Set an attribute of mailbox channel */
+	int (*set_attribute)(struct mbox_chan *chan, int attr_id, void *new_value);
+};
+
+#define to_mbox_controller(__node)	\
+	container_of((__node), struct mbox_controller, node)
+
+/** Find a registered mailbox controller */
+struct mbox_controller *mbox_controller_find(unsigned int id);
+
+/** Register mailbox controller */
+int mbox_controller_add(struct mbox_controller *mbox);
+
+/** Un-register mailbox controller */
+void mbox_controller_remove(struct mbox_controller *mbox);
+
+/** Request a mailbox channel */
+struct mbox_chan *mbox_controller_request_chan(struct mbox_controller *mbox,
+					       u32 *chan_args);
+
+/** Free a mailbox channel */
+void mbox_controller_free_chan(struct mbox_chan *chan);
+
+/** Data transfer over mailbox channel */
+int mbox_chan_xfer(struct mbox_chan *chan, struct mbox_xfer *xfer);
+
+/** Get an attribute of mailbox channel */
+int mbox_chan_get_attribute(struct mbox_chan *chan, int attr_id, void *out_value);
+
+/** Set an attribute of mailbox channel */
+int mbox_chan_set_attribute(struct mbox_chan *chan, int attr_id, void *new_value);
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index de8b4eb919f..6aa7843cffa 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -14,6 +14,8 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/irqchip/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/libfdt/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/mailbox/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/regmap/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
diff --git a/lib/utils/mailbox/Kconfig b/lib/utils/mailbox/Kconfig
new file mode 100644
index 00000000000..f91a9bb923b
--- /dev/null
+++ b/lib/utils/mailbox/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "Mailbox Support"
+
+config MAILBOX
+	bool "Mailbox support"
+	default n
+
+endmenu
diff --git a/lib/utils/mailbox/mailbox.c b/lib/utils/mailbox/mailbox.c
new file mode 100644
index 00000000000..2ea7a0056a2
--- /dev/null
+++ b/lib/utils/mailbox/mailbox.c
@@ -0,0 +1,138 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_string.h>
+#include <sbi_utils/mailbox/mailbox.h>
+
+static SBI_LIST_HEAD(mbox_list);
+
+struct mbox_controller *mbox_controller_find(unsigned int id)
+{
+	struct sbi_dlist *pos;
+
+	sbi_list_for_each(pos, &mbox_list) {
+		struct mbox_controller *mbox = to_mbox_controller(pos);
+
+		if (mbox->id == id)
+			return mbox;
+	}
+
+	return NULL;
+}
+
+int mbox_controller_add(struct mbox_controller *mbox)
+{
+	if (!mbox || !mbox->max_xfer_len)
+		return SBI_EINVAL;
+	if (mbox_controller_find(mbox->id))
+		return SBI_EALREADY;
+
+	SBI_INIT_LIST_HEAD(&mbox->node);
+	ATOMIC_INIT(&mbox->xfer_next_seq, 0);
+	SBI_INIT_LIST_HEAD(&mbox->chan_list);
+	sbi_list_add(&mbox->node, &mbox_list);
+
+	return 0;
+}
+
+void mbox_controller_remove(struct mbox_controller *mbox)
+{
+	struct mbox_chan *chan;
+
+	if (!mbox)
+		return;
+
+	while (!sbi_list_empty(&mbox->chan_list)) {
+		chan = sbi_list_first_entry(&mbox->chan_list,
+					    struct mbox_chan, node);
+		if (mbox->free_chan)
+			mbox->free_chan(mbox, chan);
+		sbi_list_del(&chan->node);
+	}
+
+	sbi_list_del(&mbox->node);
+}
+
+struct mbox_chan *mbox_controller_request_chan(struct mbox_controller *mbox,
+					       u32 *chan_args)
+{
+	struct mbox_chan *ret;
+	struct sbi_dlist *pos;
+
+	if (!chan_args || !mbox || !mbox->request_chan)
+		return NULL;
+
+	sbi_list_for_each(pos, &mbox->chan_list) {
+		ret = to_mbox_chan(pos);
+		if (!sbi_memcmp(ret->chan_args, chan_args,
+				sizeof(ret->chan_args)))
+			return ret;
+	}
+
+	ret = mbox->request_chan(mbox, chan_args);
+	if (!ret)
+		return NULL;
+
+	SBI_INIT_LIST_HEAD(&ret->node);
+	ret->mbox = mbox;
+	sbi_memcpy(ret->chan_args, chan_args, sizeof(ret->chan_args));
+	sbi_list_add(&ret->node, &mbox->chan_list);
+	return ret;
+}
+
+void mbox_controller_free_chan(struct mbox_chan *chan)
+{
+	if (!chan || !chan->mbox)
+		return;
+
+	if (chan->mbox->free_chan)
+		chan->mbox->free_chan(chan->mbox, chan);
+	sbi_list_del(&chan->node);
+}
+
+int mbox_chan_xfer(struct mbox_chan *chan, struct mbox_xfer *xfer)
+{
+	if (!xfer || !chan || !chan->mbox || !chan->mbox->xfer)
+		return SBI_EINVAL;
+
+	if (xfer->tx && (xfer->tx_len > chan->mbox->max_xfer_len))
+		return SBI_EINVAL;
+
+	if (xfer->rx && (xfer->rx_len > chan->mbox->max_xfer_len))
+		return SBI_EINVAL;
+
+	if (!(xfer->flags & MBOX_XFER_SEQ))
+		mbox_xfer_set_sequence(xfer,
+			atomic_add_return(&chan->mbox->xfer_next_seq, 1));
+
+	return chan->mbox->xfer(chan, xfer);
+}
+
+int mbox_chan_get_attribute(struct mbox_chan *chan, int attr_id, void *out_value)
+{
+	if (!chan || !chan->mbox || !out_value)
+		return SBI_EINVAL;
+
+	if (!chan->mbox->get_attribute)
+		return SBI_ENOTSUPP;
+
+	return chan->mbox->get_attribute(chan, attr_id, out_value);
+}
+
+int mbox_chan_set_attribute(struct mbox_chan *chan, int attr_id, void *new_value)
+{
+	if (!chan || !chan->mbox || !new_value)
+		return SBI_EINVAL;
+
+	if (!chan->mbox->set_attribute)
+		return SBI_ENOTSUPP;
+
+	return chan->mbox->set_attribute(chan, attr_id, new_value);
+}
diff --git a/lib/utils/mailbox/objects.mk b/lib/utils/mailbox/objects.mk
new file mode 100644
index 00000000000..79b27e4c61e
--- /dev/null
+++ b/lib/utils/mailbox/objects.mk
@@ -0,0 +1,10 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2024 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_MAILBOX) += mailbox/mailbox.o

From 2244a34f0d618c6f18c161b6448af1eecc7f72ab Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:02:04 +0530
Subject: [PATCH 1747/1765] lib: utils/mailbox: Add simple FDT based mailbox
 framework

Add a simple FDT based mailbox framework which is built on top of the generic
mailbox library. The phandle of FDT mailbox DT node is treated as the unique
mailbox controller ID which is required by the generic mailbox library. The
FDT based mailbox drivers will be probed on-demand from fdt_mailbox_request_chan()
called by the mailbox client drivers.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/fdt_mailbox.h      | 35 +++++++
 lib/utils/mailbox/Kconfig                    |  6 ++
 lib/utils/mailbox/fdt_mailbox.c              | 96 ++++++++++++++++++++
 lib/utils/mailbox/fdt_mailbox_drivers.carray |  5 +
 lib/utils/mailbox/objects.mk                 |  3 +
 5 files changed, 145 insertions(+)
 create mode 100644 include/sbi_utils/mailbox/fdt_mailbox.h
 create mode 100644 lib/utils/mailbox/fdt_mailbox.c
 create mode 100644 lib/utils/mailbox/fdt_mailbox_drivers.carray

diff --git a/include/sbi_utils/mailbox/fdt_mailbox.h b/include/sbi_utils/mailbox/fdt_mailbox.h
new file mode 100644
index 00000000000..0d5df34085a
--- /dev/null
+++ b/include/sbi_utils/mailbox/fdt_mailbox.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_MAILBOX_H__
+#define __FDT_MAILBOX_H__
+
+#include <sbi_utils/fdt/fdt_driver.h>
+#include <sbi_utils/mailbox/mailbox.h>
+
+struct fdt_phandle_args;
+
+/** FDT based mailbox driver */
+struct fdt_mailbox {
+	struct fdt_driver driver;
+	int (*xlate)(struct mbox_controller *mbox,
+		     const struct fdt_phandle_args *pargs,
+		     u32 *out_chan_args);
+};
+
+/** Request a mailbox channel using "mboxes" DT property of client DT node */
+int fdt_mailbox_request_chan(const void *fdt, int nodeoff, int index,
+			     struct mbox_chan **out_chan);
+
+/** Simple xlate function to convert one mailbox FDT cell into channel args */
+int fdt_mailbox_simple_xlate(struct mbox_controller *mbox,
+			     const struct fdt_phandle_args *pargs,
+			     u32 *out_chan_args);
+
+#endif
diff --git a/lib/utils/mailbox/Kconfig b/lib/utils/mailbox/Kconfig
index f91a9bb923b..3957bfba988 100644
--- a/lib/utils/mailbox/Kconfig
+++ b/lib/utils/mailbox/Kconfig
@@ -2,6 +2,12 @@
 
 menu "Mailbox Support"
 
+config FDT_MAILBOX
+	bool "FDT based mailbox drivers"
+	depends on FDT
+	select MAILBOX
+	default n
+
 config MAILBOX
 	bool "Mailbox support"
 	default n
diff --git a/lib/utils/mailbox/fdt_mailbox.c b/lib/utils/mailbox/fdt_mailbox.c
new file mode 100644
index 00000000000..6378ab0d756
--- /dev/null
+++ b/lib/utils/mailbox/fdt_mailbox.c
@@ -0,0 +1,96 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+
+/* List of FDT mailbox drivers generated at compile time */
+extern const struct fdt_driver *const fdt_mailbox_drivers[];
+
+static int fdt_mbox_controller_find(const void *fdt, int nodeoff,
+				    struct mbox_controller **out_mbox)
+{
+	int rc;
+	struct mbox_controller *mbox = mbox_controller_find(nodeoff);
+
+	if (!mbox) {
+		/* mailbox not found so initialize matching driver */
+		rc = fdt_driver_init_by_offset(fdt, nodeoff, fdt_mailbox_drivers);
+		if (rc)
+			return rc;
+
+		/* Try to find mailbox controller again */
+		mbox = mbox_controller_find(nodeoff);
+		if (!mbox)
+			return SBI_ENOSYS;
+	}
+
+	if (out_mbox)
+		*out_mbox = mbox;
+
+	return 0;
+}
+
+int fdt_mailbox_request_chan(const void *fdt, int nodeoff, int index,
+			     struct mbox_chan **out_chan)
+{
+	int rc;
+	struct mbox_chan *chan;
+	struct fdt_mailbox *drv;
+	struct fdt_phandle_args pargs;
+	struct mbox_controller *mbox = NULL;
+	u32 chan_args[MBOX_CHAN_MAX_ARGS];
+
+	if (!fdt || (nodeoff < 0) || (index < 0) || !out_chan)
+		return SBI_EINVAL;
+
+	pargs.node_offset = pargs.args_count = 0;
+	rc = fdt_parse_phandle_with_args(fdt, nodeoff,
+					 "mboxes", "#mbox-cells",
+					 index, &pargs);
+	if (rc)
+		return rc;
+
+	rc = fdt_mbox_controller_find(fdt, pargs.node_offset, &mbox);
+	if (rc)
+		return rc;
+
+	drv = mbox->driver;
+	if (!drv || !drv->xlate)
+		return SBI_ENOSYS;
+
+	rc = drv->xlate(mbox, &pargs, chan_args);
+	if (rc)
+		return rc;
+
+	chan = mbox_controller_request_chan(mbox, chan_args);
+	if (!chan)
+		return SBI_ENOENT;
+
+	*out_chan = chan;
+	return 0;
+}
+
+int fdt_mailbox_simple_xlate(struct mbox_controller *mbox,
+			     const struct fdt_phandle_args *pargs,
+			     u32 *out_chan_args)
+{
+	int i;
+
+	if (pargs->args_count < 1)
+		return SBI_EINVAL;
+
+	out_chan_args[0] = pargs->args[0];
+	for (i = 1; i < MBOX_CHAN_MAX_ARGS; i++)
+		out_chan_args[i] = 0;
+
+	return 0;
+}
diff --git a/lib/utils/mailbox/fdt_mailbox_drivers.carray b/lib/utils/mailbox/fdt_mailbox_drivers.carray
new file mode 100644
index 00000000000..cf87d40c175
--- /dev/null
+++ b/lib/utils/mailbox/fdt_mailbox_drivers.carray
@@ -0,0 +1,5 @@
+HEADER: sbi_utils/mailbox/fdt_mailbox.h
+TYPE: const struct fdt_mailbox
+NAME: fdt_mailbox_drivers
+MEMBER-NAME: driver
+MEMBER-TYPE: const struct fdt_driver
diff --git a/lib/utils/mailbox/objects.mk b/lib/utils/mailbox/objects.mk
index 79b27e4c61e..2135898c625 100644
--- a/lib/utils/mailbox/objects.mk
+++ b/lib/utils/mailbox/objects.mk
@@ -7,4 +7,7 @@
 #   Anup Patel <apatel@ventanamicro.com>
 #
 
+libsbiutils-objs-$(CONFIG_FDT_MAILBOX) += mailbox/fdt_mailbox.o
+libsbiutils-objs-$(CONFIG_FDT_MAILBOX) += mailbox/fdt_mailbox_drivers.carray.o
+
 libsbiutils-objs-$(CONFIG_MAILBOX) += mailbox/mailbox.o

From 91f46fb47eefb872a7981935fbcc125226e93eca Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:07:33 +0530
Subject: [PATCH 1748/1765] lib/utils: Add RPMI messaging protocol and shared
 memory transport support

The RISC-V Platform Management Interface (RPMI) defines a messaging protocol
and shared memory based transport for bi-directional communication with an
on-chip or external microcontroller.

To support RPMI in OpenSBI, add:
1) The RPMI messaging protocol defines and helper macros
2) A FDT mailbox driver for the RPMI shared memory transport

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Co-developed-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Co-developed-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_mailbox.h   |  32 +
 include/sbi_utils/mailbox/rpmi_msgprot.h   | 255 +++++++
 lib/utils/mailbox/Kconfig                  |  14 +
 lib/utils/mailbox/fdt_mailbox_rpmi_shmem.c | 773 +++++++++++++++++++++
 lib/utils/mailbox/objects.mk               |   5 +
 lib/utils/mailbox/rpmi_mailbox.c           |  91 +++
 platform/generic/configs/defconfig         |   3 +
 7 files changed, 1173 insertions(+)
 create mode 100644 include/sbi_utils/mailbox/rpmi_mailbox.h
 create mode 100644 include/sbi_utils/mailbox/rpmi_msgprot.h
 create mode 100644 lib/utils/mailbox/fdt_mailbox_rpmi_shmem.c
 create mode 100644 lib/utils/mailbox/rpmi_mailbox.c

diff --git a/include/sbi_utils/mailbox/rpmi_mailbox.h b/include/sbi_utils/mailbox/rpmi_mailbox.h
new file mode 100644
index 00000000000..61af51a8de5
--- /dev/null
+++ b/include/sbi_utils/mailbox/rpmi_mailbox.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __RPMI_MAILBOX_H__
+#define __RPMI_MAILBOX_H__
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/mailbox/rpmi_msgprot.h>
+
+#define rpmi_u32_count(__var)	(sizeof(__var) / sizeof(u32))
+
+/** Convert RPMI error to SBI error */
+int rpmi_xlate_error(enum rpmi_error error);
+
+/** Typical RPMI normal request with at least status code in response */
+int rpmi_normal_request_with_status(
+			struct mbox_chan *chan, u32 service_id,
+			void *req, u32 req_words, u32 req_endian_words,
+			void *resp, u32 resp_words, u32 resp_endian_words);
+
+/* RPMI posted request which is without any response*/
+int rpmi_posted_request(
+		struct mbox_chan *chan, u32 service_id,
+		void *req, u32 req_words, u32 req_endian_words);
+
+#endif /* !__RPMI_MAILBOX_H__ */
diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
new file mode 100644
index 00000000000..f9f6544763e
--- /dev/null
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -0,0 +1,255 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ */
+
+#ifndef __RPMI_MSGPROT_H__
+#define __RPMI_MSGPROT_H__
+
+#include <sbi/sbi_byteorder.h>
+#include <sbi/sbi_error.h>
+
+/*
+ * 31                                            0
+ * +---------------------+-----------------------+
+ * | FLAGS | SERVICE_ID  |   SERVICEGROUP_ID     |
+ * +---------------------+-----------------------+
+ * |        TOKEN        |     DATA LENGTH       |
+ * +---------------------+-----------------------+
+ * |                 DATA/PAYLOAD                |
+ * +---------------------------------------------+
+ */
+
+/** Message Header byte offset */
+#define RPMI_MSG_HDR_OFFSET			(0x0)
+/** Message Header Size in bytes */
+#define RPMI_MSG_HDR_SIZE			(8)
+
+/** ServiceGroup ID field byte offset */
+#define RPMI_MSG_SERVICEGROUP_ID_OFFSET		(0x0)
+/** ServiceGroup ID field size in bytes */
+#define RPMI_MSG_SERVICEGROUP_ID_SIZE		(2)
+
+/** Service ID field byte offset */
+#define RPMI_MSG_SERVICE_ID_OFFSET		(0x2)
+/** Service ID field size in bytes */
+#define RPMI_MSG_SERVICE_ID_SIZE		(1)
+
+/** Flags field byte offset */
+#define RPMI_MSG_FLAGS_OFFSET			(0x3)
+/** Flags field size in bytes */
+#define RPMI_MSG_FLAGS_SIZE			(1)
+
+#define RPMI_MSG_FLAGS_TYPE_POS			(0U)
+#define RPMI_MSG_FLAGS_TYPE_MASK		0x7
+#define RPMI_MSG_FLAGS_TYPE			\
+	((0x7) << RPMI_MSG_FLAGS_TYPE_POS)
+
+#define RPMI_MSG_FLAGS_DOORBELL_POS		(3U)
+#define RPMI_MSG_FLAGS_DOORBELL_MASK		0x1
+#define RPMI_MSG_FLAGS_DOORBELL			\
+	((0x1) << RPMI_MSG_FLAGS_DOORBELL_POS)
+
+/** Data length field byte offset */
+#define RPMI_MSG_DATALEN_OFFSET			(0x4)
+/** Data length field size in bytes */
+#define RPMI_MSG_DATALEN_SIZE			(2)
+
+/** Token field byte offset */
+#define RPMI_MSG_TOKEN_OFFSET			(0x6)
+/** Token field size in bytes */
+#define RPMI_MSG_TOKEN_SIZE			(2)
+/** Token field mask */
+#define RPMI_MSG_TOKEN_MASK			(0xffffU)
+
+/** Data field byte offset */
+#define RPMI_MSG_DATA_OFFSET			(RPMI_MSG_HDR_SIZE)
+/** Data field size in bytes */
+#define RPMI_MSG_DATA_SIZE(__slot_size)		((__slot_size) - RPMI_MSG_HDR_SIZE)
+
+/** Minimum slot size in bytes */
+#define RPMI_SLOT_SIZE_MIN			(64)
+
+/** Name length of 16 characters */
+#define RPMI_NAME_CHARS_MAX			(16)
+
+/** Queue layout */
+#define RPMI_QUEUE_HEAD_SLOT		0
+#define RPMI_QUEUE_TAIL_SLOT		1
+#define RPMI_QUEUE_HEADER_SLOTS		2
+
+/** Default timeout values */
+#define RPMI_DEF_TX_TIMEOUT			20
+#define RPMI_DEF_RX_TIMEOUT			20
+
+/**
+ * Common macro to generate composite version from major
+ * and minor version numbers.
+ *
+ * RPMI has Specification version, Implementation version
+ * Service group versions which follow the same versioning
+ * encoding as below.
+ */
+#define RPMI_VERSION(__major, __minor) (((__major) << 16) | (__minor))
+
+/** RPMI Message Header */
+struct rpmi_message_header {
+	le16_t servicegroup_id;
+	uint8_t service_id;
+	uint8_t flags;
+	le16_t datalen;
+	le16_t token;
+} __packed;
+
+/** RPMI Message */
+struct rpmi_message {
+	struct rpmi_message_header header;
+	u8 data[0];
+} __packed;
+
+/** RPMI Messages Types */
+enum rpmi_message_type {
+	/* Normal request backed with ack */
+	RPMI_MSG_NORMAL_REQUEST = 0x0,
+	/* Request without any ack */
+	RPMI_MSG_POSTED_REQUEST = 0x1,
+	/* Acknowledgment for normal request message */
+	RPMI_MSG_ACKNOWLDGEMENT = 0x2,
+	/* Notification message */
+	RPMI_MSG_NOTIFICATION = 0x3,
+};
+
+/** RPMI Error Types */
+enum rpmi_error {
+	/* Success */
+	RPMI_SUCCESS		= 0,
+	/* General failure  */
+	RPMI_ERR_FAILED		= -1,
+	/* Service or feature not supported */
+	RPMI_ERR_NOTSUPP	= -2,
+	/* Invalid Parameter  */
+	RPMI_ERR_INVALID_PARAM    = -3,
+	/*
+	 * Denied to insufficient permissions
+	 * or due to unmet prerequisite
+	 */
+	RPMI_ERR_DENIED		= -4,
+	/* Invalid address or offset */
+	RPMI_ERR_INVALID_ADDR	= -5,
+	/*
+	 * Operation failed as it was already in
+	 * progress or the state has changed already
+	 * for which the operation was carried out.
+	 */
+	RPMI_ERR_ALREADY	= -6,
+	/*
+	 * Error in implementation which violates
+	 * the specification version
+	 */
+	RPMI_ERR_EXTENSION	= -7,
+	/* Operation failed due to hardware issues */
+	RPMI_ERR_HW_FAULT	= -8,
+	/* System, device or resource is busy */
+	RPMI_ERR_BUSY		= -9,
+	/* System or device or resource in invalid state */
+	RPMI_ERR_INVALID_STATE	= -10,
+	/* Index, offset or address is out of range */
+	RPMI_ERR_BAD_RANGE	= -11,
+	/* Operation timed out */
+	RPMI_ERR_TIMEOUT	= -12,
+	/*
+	 * Error in input or output or
+	 * error in sending or receiving data
+	 * through communication medium
+	 */
+	RPMI_ERR_IO		= -13,
+	/* No data available */
+	RPMI_ERR_NO_DATA	= -14,
+	RPMI_ERR_RESERVED_START	= -15,
+	RPMI_ERR_RESERVED_END	= -127,
+	RPMI_ERR_VENDOR_START	= -128,
+};
+
+/** RPMI Message Arguments */
+struct rpmi_message_args {
+	u32 flags;
+#define RPMI_MSG_FLAGS_NO_TX		(1U << 0)
+#define RPMI_MSG_FLAGS_NO_RX		(1U << 1)
+#define RPMI_MSG_FLAGS_NO_RX_TOKEN	(1U << 2)
+	enum rpmi_message_type type;
+	u8 service_id;
+	u32 tx_endian_words;
+	u32 rx_endian_words;
+	u16 rx_token;
+	u32 rx_data_len;
+};
+
+/*
+ * RPMI SERVICEGROUPS AND SERVICES
+ */
+
+/** RPMI ServiceGroups IDs */
+enum rpmi_servicegroup_id {
+	RPMI_SRVGRP_ID_MIN = 0,
+	RPMI_SRVGRP_BASE = 0x0001,
+	RPMI_SRVGRP_ID_MAX_COUNT,
+
+	/* Reserved range for service groups */
+	RPMI_SRVGRP_RESERVE_START = RPMI_SRVGRP_ID_MAX_COUNT,
+	RPMI_SRVGRP_RESERVE_END = 0x7FFF,
+
+	/* Vendor/Implementation-specific service groups range */
+	RPMI_SRVGRP_VENDOR_START = 0x8000,
+	RPMI_SRVGRP_VENDOR_END = 0xFFFF,
+};
+
+/** RPMI enable notification request */
+struct rpmi_enable_notification_req {
+	u32 eventid;
+};
+
+/** RPMI enable notification response */
+struct rpmi_enable_notification_resp {
+	s32 status;
+};
+
+/** RPMI Base ServiceGroup Service IDs */
+enum rpmi_base_service_id {
+	RPMI_BASE_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_BASE_SRV_GET_IMPLEMENTATION_VERSION = 0x02,
+	RPMI_BASE_SRV_GET_IMPLEMENTATION_IDN = 0x03,
+	RPMI_BASE_SRV_GET_SPEC_VERSION = 0x04,
+	RPMI_BASE_SRV_GET_PLATFORM_INFO = 0x05,
+	RPMI_BASE_SRV_PROBE_SERVICE_GROUP = 0x06,
+	RPMI_BASE_SRV_GET_ATTRIBUTES = 0x07,
+	RPMI_BASE_SRV_SET_MSI = 0x08,
+};
+
+#define RPMI_BASE_FLAGS_F0_PRIVILEGE		(1U << 2)
+#define RPMI_BASE_FLAGS_F0_EV_NOTIFY		(1U << 1)
+#define RPMI_BASE_FLAGS_F0_MSI_EN		(1U)
+
+enum rpmi_base_context_priv_level {
+	RPMI_BASE_CONTEXT_PRIV_S_MODE,
+	RPMI_BASE_CONTEXT_PRIV_M_MODE,
+};
+
+struct rpmi_base_get_attributes_resp {
+	s32 status_code;
+	u32 f0;
+	u32 f1;
+	u32 f2;
+	u32 f3;
+};
+
+struct rpmi_base_get_platform_info_resp {
+	s32 status;
+	u32 plat_info_len;
+	char plat_info[];
+};
+
+#endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/mailbox/Kconfig b/lib/utils/mailbox/Kconfig
index 3957bfba988..6e7f2cdd766 100644
--- a/lib/utils/mailbox/Kconfig
+++ b/lib/utils/mailbox/Kconfig
@@ -8,8 +8,22 @@ config FDT_MAILBOX
 	select MAILBOX
 	default n
 
+config RPMI_MAILBOX
+	bool "RPMI based mailbox drivers"
+	select MAILBOX
+	default n
+
 config MAILBOX
 	bool "Mailbox support"
 	default n
 
+if FDT_MAILBOX
+
+config FDT_MAILBOX_RPMI_SHMEM
+	bool "RPMI Shared Memory Mailbox Controller"
+	depends on RPMI_MAILBOX
+	default n
+
+endif
+
 endmenu
diff --git a/lib/utils/mailbox/fdt_mailbox_rpmi_shmem.c b/lib/utils/mailbox/fdt_mailbox_rpmi_shmem.c
new file mode 100644
index 00000000000..91db4e96407
--- /dev/null
+++ b/lib/utils/mailbox/fdt_mailbox_rpmi_shmem.c
@@ -0,0 +1,773 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_timer.h>
+#include <sbi/riscv_io.h>
+#include <sbi/riscv_locks.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_barrier.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/mailbox/mailbox.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+
+/** Minimum Base group version required */
+#define RPMI_BASE_VERSION_MIN		RPMI_VERSION(1, 0)
+
+/**************** RPMI Transport Structures and Macros ***********/
+
+#define GET_SERVICEGROUP_ID(msg)		\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	le16_to_cpu(mbuf->header.servicegroup_id);\
+})
+
+#define GET_SERVICE_ID(msg)			\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	mbuf->header.service_id;		\
+})
+
+#define GET_FLAGS(msg)				\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	mbuf->header.flags;			\
+})
+
+#define GET_MESSAGE_ID(msg)			\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	((u32)mbuf->header.flags << (RPMI_MSG_FLAGS_OFFSET * 8)) | \
+	((u32)mbuf->header.service_id << (RPMI_MSG_SERVICE_ID_OFFSET * 8)) | \
+	((u32)le16_to_cpu(mbuf->header.servicegroup_id)); \
+})
+
+#define MAKE_MESSAGE_ID(__group_id, __service_id, __flags)	\
+({						\
+	u32 __ret = 0;				\
+	__ret |= (u32)(__group_id) << (RPMI_MSG_SERVICEGROUP_ID_OFFSET * 8); \
+	__ret |= (u32)(__service_id) << (RPMI_MSG_SERVICE_ID_OFFSET * 8); \
+	__ret |= (u32)(__flags) << (RPMI_MSG_FLAGS_OFFSET * 8); \
+	__ret;					\
+})
+
+#define GET_DLEN(msg)				\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	le16_to_cpu(mbuf->header.datalen);	\
+})
+
+#define GET_TOKEN(msg)				\
+({						\
+	struct rpmi_message *mbuf = msg;	\
+	le16_to_cpu(mbuf->header.token);	\
+})
+
+#define GET_MESSAGE_TYPE(msg)						\
+({									\
+	uint8_t flags = *((uint8_t *)msg + RPMI_MSG_FLAGS_OFFSET);	\
+	((flags & RPMI_MSG_FLAGS_TYPE) >> RPMI_MSG_FLAGS_TYPE_POS));	\
+})
+
+enum rpmi_queue_type {
+	RPMI_QUEUE_TYPE_REQ = 0,
+	RPMI_QUEUE_TYPE_ACK = 1,
+};
+
+enum rpmi_queue_idx {
+	RPMI_QUEUE_IDX_A2P_REQ = 0,
+	RPMI_QUEUE_IDX_P2A_ACK = 1,
+	RPMI_QUEUE_IDX_P2A_REQ = 2,
+	RPMI_QUEUE_IDX_A2P_ACK = 3,
+	RPMI_QUEUE_IDX_MAX_COUNT,
+};
+
+enum rpmi_reg_idx {
+	RPMI_REG_IDX_DB_REG = 0, /* Doorbell register */
+	RPMI_REG_IDX_MAX_COUNT,
+};
+
+/** Mailbox registers */
+struct rpmi_mb_regs {
+	/* doorbell from AP -> PuC*/
+	volatile le32_t db_reg;
+} __packed;
+
+/** Single Queue Context Structure */
+struct smq_queue_ctx {
+	u32 queue_id;
+	u32 num_slots;
+	spinlock_t queue_lock;
+	/* Type of queue - REQ or ACK */
+	enum rpmi_queue_type queue_type;
+	/* Pointers to the queue shared memory */
+	volatile le32_t *headptr;
+	volatile le32_t *tailptr;
+	volatile uint8_t *buffer;
+	/* Name of the queue */
+	char name[RPMI_NAME_CHARS_MAX];
+};
+
+struct rpmi_srvgrp_chan {
+	u32 servicegroup_id;
+	u32 servicegroup_version;
+	struct mbox_chan chan;
+};
+
+#define to_srvgrp_chan(mbox_chan)	\
+		container_of(mbox_chan, struct rpmi_srvgrp_chan, chan);
+
+struct rpmi_shmem_mbox_controller {
+	/* Driver specific members */
+	u32 slot_size;
+	u32 queue_count;
+	struct rpmi_mb_regs *mb_regs;
+	struct smq_queue_ctx queue_ctx_tbl[RPMI_QUEUE_IDX_MAX_COUNT];
+	/* Mailbox framework related members */
+	struct mbox_controller controller;
+	struct mbox_chan *base_chan;
+	u32 impl_version;
+	u32 impl_id;
+	u32 spec_version;
+	u32 plat_info_len;
+	char *plat_info;
+	struct {
+		u8 f0_priv_level;
+		bool f0_ev_notif_en;
+		bool f0_msi_en;
+	} base_flags;
+};
+
+/**************** Shared Memory Queues Helpers **************/
+
+static bool __smq_queue_full(struct smq_queue_ctx *qctx)
+{
+	return ((le32_to_cpu(*qctx->tailptr) + 1) % qctx->num_slots ==
+			le32_to_cpu(*qctx->headptr)) ? true : false;
+}
+
+static bool __smq_queue_empty(struct smq_queue_ctx *qctx)
+{
+	return (le32_to_cpu(*qctx->headptr) ==
+		le32_to_cpu(*qctx->tailptr)) ? true : false;
+}
+
+static int __smq_rx(struct smq_queue_ctx *qctx, u32 slot_size,
+		    u32 service_group_id, struct mbox_xfer *xfer)
+{
+	void *dst, *src;
+	struct rpmi_message *msg;
+	u32 i, tmp, pos, dlen, msgidn, headidx, tailidx;
+	struct rpmi_message_args *args = xfer->args;
+	bool no_rx_token = (args->flags & RPMI_MSG_FLAGS_NO_RX_TOKEN) ?
+			   true : false;
+
+	/* Rx sanity checks */
+	if ((sizeof(u32) * args->rx_endian_words) >
+	    (slot_size - sizeof(struct rpmi_message_header)))
+		return SBI_EINVAL;
+	if ((sizeof(u32) * args->rx_endian_words) > xfer->rx_len)
+		return SBI_EINVAL;
+
+	/* There should be some message in the queue */
+	if (__smq_queue_empty(qctx))
+		return SBI_ENOENT;
+
+	/* Get the head/read index and tail/write index */
+	headidx = le32_to_cpu(*qctx->headptr);
+	tailidx = le32_to_cpu(*qctx->tailptr);
+
+	/*
+	 * Compute msgidn expected in the incoming message
+	 * NOTE: DOORBELL bit is not expected to be set.
+	 */
+	msgidn = MAKE_MESSAGE_ID(service_group_id, args->service_id, args->type);
+
+	/* Find the Rx message with matching token */
+	pos = headidx;
+	while (pos != tailidx) {
+		src = (void *)qctx->buffer + (pos * slot_size);
+		if ((no_rx_token && GET_MESSAGE_ID(src) == msgidn) ||
+		    (GET_TOKEN(src) == (xfer->seq & RPMI_MSG_TOKEN_MASK)))
+			break;
+		pos = (pos + 1) % qctx->num_slots;
+	}
+	if (pos == tailidx)
+		return SBI_ENOENT;
+
+	/* If Rx message is not first message then make it first message */
+	if (pos != headidx) {
+		src = (void *)qctx->buffer + (pos * slot_size);
+		dst = (void *)qctx->buffer + (headidx * slot_size);
+		for (i = 0; i < slot_size / sizeof(u32); i++) {
+			tmp = ((u32 *)dst)[i];
+			((u32 *)dst)[i] = ((u32 *)src)[i];
+			((u32 *)src)[i] = tmp;
+		}
+	}
+
+	/* Update rx_token if not available */
+	msg = (void *)qctx->buffer + (headidx * slot_size);
+	if (no_rx_token)
+		args->rx_token = GET_TOKEN(msg);
+
+	/* Extract data from the first message */
+	if (xfer->rx) {
+		args->rx_data_len = dlen = GET_DLEN(msg);
+		if (dlen > xfer->rx_len)
+			dlen = xfer->rx_len;
+		src = (void *)msg + sizeof(struct rpmi_message_header);
+		dst = xfer->rx;
+		for (i = 0; i < args->rx_endian_words; i++)
+			((u32 *)dst)[i] = le32_to_cpu(((u32 *)src)[i]);
+		dst += sizeof(u32) * args->rx_endian_words;
+		src += sizeof(u32) * args->rx_endian_words;
+		sbi_memcpy(dst, src,
+			xfer->rx_len - (sizeof(u32) * args->rx_endian_words));
+	}
+
+	/* Update the head/read index */
+	*qctx->headptr = cpu_to_le32(headidx + 1) % qctx->num_slots;
+
+	/* Make sure updates to head are immediately visible to PuC */
+	smp_wmb();
+
+	return SBI_OK;
+}
+
+static int __smq_tx(struct smq_queue_ctx *qctx, struct rpmi_mb_regs *mb_regs,
+		    u32 slot_size, u32 service_group_id, struct mbox_xfer *xfer)
+{
+	u32 i, tailidx;
+	void *dst, *src;
+	struct rpmi_message_header header = { 0 };
+	struct rpmi_message_args *args = xfer->args;
+
+	/* Tx sanity checks */
+	if ((sizeof(u32) * args->tx_endian_words) >
+	    (slot_size - sizeof(struct rpmi_message_header)))
+		return SBI_EINVAL;
+	if ((sizeof(u32) * args->tx_endian_words) > xfer->tx_len)
+		return SBI_EINVAL;
+
+	/* There should be some room in the queue */
+	if (__smq_queue_full(qctx))
+		return SBI_ENOMEM;
+
+	/* Get the tail/write index */
+	tailidx = le32_to_cpu(*qctx->tailptr);
+
+	/* Prepare the header to be written into the slot */
+	header.servicegroup_id = cpu_to_le16(service_group_id);
+	header.service_id = args->service_id;
+	header.flags = args->type;
+	header.datalen = cpu_to_le16((u16)xfer->tx_len);
+	header.token = cpu_to_le16((u16)xfer->seq);
+
+	/* Write header into the slot */
+	dst = (char *)qctx->buffer + (tailidx * slot_size);
+	sbi_memcpy(dst, &header, sizeof(header));
+	dst += sizeof(header);
+
+	/* Write data into the slot */
+	if (xfer->tx) {
+		src = xfer->tx;
+		for (i = 0; i < args->tx_endian_words; i++)
+			((u32 *)dst)[i] = cpu_to_le32(((u32 *)src)[i]);
+		dst += sizeof(u32) * args->tx_endian_words;
+		src += sizeof(u32) * args->tx_endian_words;
+		sbi_memcpy(dst, src,
+			xfer->tx_len - (sizeof(u32) * args->tx_endian_words));
+	}
+
+	/* Make sure queue chanages are visible to PuC before updating tail */
+	smp_wmb();
+
+	/* Update the tail/write index */
+	*qctx->tailptr = cpu_to_le32(tailidx + 1) % qctx->num_slots;
+
+	/* Ring the RPMI doorbell if present */
+	if (mb_regs)
+		writel(cpu_to_le32(1), &mb_regs->db_reg);
+
+	return SBI_OK;
+}
+
+static int smq_rx(struct rpmi_shmem_mbox_controller *mctl,
+		  u32 queue_id, u32 service_group_id, struct mbox_xfer *xfer)
+{
+	int ret, rxretry = 0;
+	struct smq_queue_ctx *qctx;
+
+	if (mctl->queue_count < queue_id) {
+		sbi_printf("%s: invalid queue_id or service_group_id\n",
+			   __func__);
+		return SBI_EINVAL;
+	}
+	qctx = &mctl->queue_ctx_tbl[queue_id];
+
+	/*
+	 * Once the timeout happens and call this function is returned
+	 * to the client then there is no way to deliver the response
+	 * message after that if it comes later.
+	 *
+	 * REVISIT: In complete timeout duration how much duration
+	 * it should wait(delay) before recv retry. udelay or mdelay
+	 */
+	do {
+		spin_lock(&qctx->queue_lock);
+		ret = __smq_rx(qctx, mctl->slot_size, service_group_id, xfer);
+		spin_unlock(&qctx->queue_lock);
+		if (!ret)
+			return 0;
+
+		sbi_timer_mdelay(1);
+		rxretry += 1;
+	} while (rxretry < xfer->rx_timeout);
+
+	return SBI_ETIMEDOUT;
+}
+
+static int smq_tx(struct rpmi_shmem_mbox_controller *mctl,
+		  u32 queue_id, u32 service_group_id, struct mbox_xfer *xfer)
+{
+	int ret, txretry = 0;
+	struct smq_queue_ctx *qctx;
+
+	if (mctl->queue_count < queue_id) {
+		sbi_printf("%s: invalid queue_id or service_group_id\n",
+			   __func__);
+		return SBI_EINVAL;
+	}
+	qctx = &mctl->queue_ctx_tbl[queue_id];
+
+	/*
+	 * Ignoring the tx timeout since in RPMI has no mechanism
+	 * with which other side can let know about the reception of
+	 * message which marks as tx complete. For RPMI tx complete is
+	 * marked as done when message in successfully copied in queue.
+	 *
+	 * REVISIT: In complete timeout duration how much duration
+	 * it should wait(delay) before send retry. udelay or mdelay
+	 */
+	do {
+		spin_lock(&qctx->queue_lock);
+		ret = __smq_tx(qctx, mctl->mb_regs, mctl->slot_size,
+				service_group_id, xfer);
+		spin_unlock(&qctx->queue_lock);
+		if (!ret)
+			return 0;
+
+		sbi_timer_mdelay(1);
+		txretry += 1;
+	} while (txretry < xfer->tx_timeout);
+
+	return SBI_ETIMEDOUT;
+}
+
+static int rpmi_get_platform_info(struct rpmi_shmem_mbox_controller *mctl)
+{
+	int ret = SBI_OK;
+
+	/**
+	 * platform string can occupy max possible size
+	 * max possible space in the message data as
+	 * per the format
+	 */
+	struct rpmi_base_get_platform_info_resp *resp =
+			sbi_zalloc(RPMI_MSG_DATA_SIZE(mctl->slot_size));
+	if (!resp)
+		return SBI_ENOMEM;
+
+	ret = rpmi_normal_request_with_status(mctl->base_chan,
+				 RPMI_BASE_SRV_GET_PLATFORM_INFO,
+				 NULL, 0, 0,
+				 resp,
+				 RPMI_MSG_DATA_SIZE(mctl->slot_size)/4,
+				 RPMI_MSG_DATA_SIZE(mctl->slot_size)/4);
+	if (ret)
+		goto fail_free_resp;
+
+	mctl->plat_info_len = resp->plat_info_len;
+	mctl->plat_info = sbi_zalloc(mctl->plat_info_len);
+	if (!mctl->plat_info) {
+		ret = SBI_ENOMEM;
+		goto fail_free_resp;
+	}
+
+	sbi_strncpy(mctl->plat_info, resp->plat_info, mctl->plat_info_len);
+
+fail_free_resp:
+	sbi_free(resp);
+	return ret;
+}
+
+static int smq_base_get_two_u32(struct rpmi_shmem_mbox_controller *mctl,
+				u32 service_id, u32 *inarg, u32 *outvals)
+{
+	return rpmi_normal_request_with_status(
+			mctl->base_chan, service_id,
+			inarg, (inarg) ? 1 : 0, (inarg) ? 1 : 0,
+			outvals, 2, 2);
+}
+
+/**************** Mailbox Controller Functions **************/
+
+static int rpmi_shmem_mbox_xfer(struct mbox_chan *chan, struct mbox_xfer *xfer)
+{
+	int ret;
+	u32 tx_qid = 0, rx_qid = 0;
+	struct rpmi_shmem_mbox_controller *mctl =
+			container_of(chan->mbox,
+				     struct rpmi_shmem_mbox_controller,
+				     controller);
+	struct rpmi_srvgrp_chan *srvgrp_chan = to_srvgrp_chan(chan);
+
+	struct rpmi_message_args *args = xfer->args;
+	bool do_tx = (args->flags & RPMI_MSG_FLAGS_NO_TX) ? false : true;
+	bool do_rx = (args->flags & RPMI_MSG_FLAGS_NO_RX) ? false : true;
+
+	if (!do_tx && !do_rx)
+		return SBI_EINVAL;
+
+	switch (args->type) {
+	case RPMI_MSG_NORMAL_REQUEST:
+		if (do_tx && do_rx) {
+			tx_qid = RPMI_QUEUE_IDX_A2P_REQ;
+			rx_qid = RPMI_QUEUE_IDX_P2A_ACK;
+		} else if (do_tx) {
+			tx_qid = RPMI_QUEUE_IDX_A2P_REQ;
+		} else if (do_rx) {
+			rx_qid = RPMI_QUEUE_IDX_P2A_REQ;
+		}
+		break;
+	case RPMI_MSG_POSTED_REQUEST:
+		if (do_tx && do_rx)
+			return SBI_EINVAL;
+		if (do_tx) {
+			tx_qid = RPMI_QUEUE_IDX_A2P_REQ;
+		} else {
+			rx_qid = RPMI_QUEUE_IDX_P2A_REQ;
+		}
+		break;
+	case RPMI_MSG_ACKNOWLDGEMENT:
+		if (do_tx && do_rx)
+			return SBI_EINVAL;
+		if (do_tx) {
+			tx_qid = RPMI_QUEUE_IDX_A2P_ACK;
+		} else {
+			rx_qid = RPMI_QUEUE_IDX_P2A_ACK;
+		}
+		break;
+	default:
+		return SBI_ENOTSUPP;
+	}
+
+	if (do_tx) {
+		ret = smq_tx(mctl, tx_qid, srvgrp_chan->servicegroup_id, xfer);
+		if (ret)
+			return ret;
+	}
+
+	if (do_rx) {
+		ret = smq_rx(mctl, rx_qid, srvgrp_chan->servicegroup_id, xfer);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+
+static struct mbox_chan *rpmi_shmem_mbox_request_chan(
+						struct mbox_controller *mbox,
+						u32 *chan_args)
+{
+	int ret;
+	u32 tval[2] = { 0 };
+	struct rpmi_srvgrp_chan *srvgrp_chan;
+	struct rpmi_shmem_mbox_controller *mctl =
+			container_of(mbox,
+				     struct rpmi_shmem_mbox_controller,
+				     controller);
+
+	/* Service group id not defined or in reserved range is invalid */
+	if (chan_args[0] >= RPMI_SRVGRP_ID_MAX_COUNT &&
+		chan_args[0] <= RPMI_SRVGRP_RESERVE_END)
+		return NULL;
+
+	/* Base serivce group is always present so probe other groups */
+	if (chan_args[0] != RPMI_SRVGRP_BASE) {
+		/* Probe service group */
+		ret = smq_base_get_two_u32(mctl,
+					   RPMI_BASE_SRV_PROBE_SERVICE_GROUP,
+					   chan_args, tval);
+		if (ret || !tval[1])
+			return NULL;
+	}
+
+	srvgrp_chan = sbi_zalloc(sizeof(*srvgrp_chan));
+	if (!srvgrp_chan)
+		return NULL;
+
+	srvgrp_chan->servicegroup_id = chan_args[0];
+	srvgrp_chan->servicegroup_version = tval[1];
+
+	return &srvgrp_chan->chan;
+}
+
+static void rpmi_shmem_mbox_free_chan(struct mbox_controller *mbox,
+				      struct mbox_chan *chan)
+{
+	struct rpmi_srvgrp_chan *srvgrp_chan = to_srvgrp_chan(chan);
+	sbi_free(srvgrp_chan);
+}
+
+extern struct fdt_mailbox fdt_mailbox_rpmi_shmem;
+
+static int rpmi_shmem_transport_init(struct rpmi_shmem_mbox_controller *mctl,
+				     const void *fdt, int nodeoff)
+{
+	const char *name;
+	int count, len, ret, qid;
+	uint64_t reg_addr, reg_size;
+	const fdt32_t *prop_slotsz;
+	struct smq_queue_ctx *qctx;
+
+	ret = fdt_node_check_compatible(fdt, nodeoff,
+					"riscv,rpmi-shmem-mbox");
+	if (ret)
+		return ret;
+
+	/* get queue slot size in bytes */
+	prop_slotsz = fdt_getprop(fdt, nodeoff, "riscv,slot-size", &len);
+	if (!prop_slotsz)
+		return SBI_ENOENT;
+
+	mctl->slot_size = fdt32_to_cpu(*prop_slotsz);
+	if (mctl->slot_size < RPMI_SLOT_SIZE_MIN) {
+		sbi_printf("%s: slot_size < mimnum required message size\n",
+			   __func__);
+		mctl->slot_size = RPMI_SLOT_SIZE_MIN;
+	}
+
+	/*
+	 * queue names count is taken as the number of queues
+	 * supported which make it mandatory to provide the
+	 * name of the queue.
+	 */
+	count = fdt_stringlist_count(fdt, nodeoff, "reg-names");
+	if (count < 0 ||
+	    count > (RPMI_QUEUE_IDX_MAX_COUNT + RPMI_REG_IDX_MAX_COUNT))
+		return SBI_EINVAL;
+
+	mctl->queue_count = count - RPMI_REG_IDX_MAX_COUNT;
+
+	/* parse all queues and populate queues context structure */
+	for (qid = 0; qid < mctl->queue_count; qid++) {
+		qctx = &mctl->queue_ctx_tbl[qid];
+
+		/* get each queue share-memory base address and size*/
+		ret = fdt_get_node_addr_size(fdt, nodeoff, qid,
+					     &reg_addr, &reg_size);
+		if (ret < 0 || !reg_addr || !reg_size)
+			return SBI_ENOENT;
+
+		ret = sbi_domain_root_add_memrange(reg_addr, reg_size, reg_size,
+						   (SBI_DOMAIN_MEMREGION_MMIO |
+						    SBI_DOMAIN_MEMREGION_M_READABLE |
+						    SBI_DOMAIN_MEMREGION_M_WRITABLE));
+		if (ret)
+			return ret;
+
+		/* calculate number of slots in each queue */
+		qctx->num_slots =
+			(reg_size - (mctl->slot_size * RPMI_QUEUE_HEADER_SLOTS)) / mctl->slot_size;
+
+		/* setup queue pointers */
+		qctx->headptr = ((void *)(unsigned long)reg_addr) +
+				RPMI_QUEUE_HEAD_SLOT * mctl->slot_size;
+		qctx->tailptr = ((void *)(unsigned long)reg_addr) +
+				RPMI_QUEUE_TAIL_SLOT * mctl->slot_size;
+		qctx->buffer = ((void *)(unsigned long)reg_addr) +
+				RPMI_QUEUE_HEADER_SLOTS * mctl->slot_size;
+
+		/* get the queue name */
+		name = fdt_stringlist_get(fdt, nodeoff, "reg-names",
+					  qid, &len);
+		if (!name || (name && len < 0))
+			return len;
+
+		sbi_memcpy(qctx->name, name, len);
+
+		/* store the index as queue_id */
+		qctx->queue_id = qid;
+
+		SPIN_LOCK_INIT(qctx->queue_lock);
+	}
+
+	/* get the db-reg property name */
+	name = fdt_stringlist_get(fdt, nodeoff, "reg-names", qid, &len);
+	if (!name || (name && len < 0))
+		return len;
+
+	/* fetch doorbell register address*/
+	ret = fdt_get_node_addr_size(fdt, nodeoff, qid, &reg_addr,
+				       &reg_size);
+	if (!ret && !(strncmp(name, "db-reg", strlen("db-reg")))) {
+		mctl->mb_regs = (void *)(unsigned long)reg_addr;
+		ret = sbi_domain_root_add_memrange(reg_addr, reg_size, reg_size,
+						   (SBI_DOMAIN_MEMREGION_MMIO |
+						    SBI_DOMAIN_MEMREGION_M_READABLE |
+						    SBI_DOMAIN_MEMREGION_M_WRITABLE));
+		if (ret)
+			return ret;
+	}
+
+	return SBI_SUCCESS;
+}
+
+static int rpmi_shmem_mbox_init(const void *fdt, int nodeoff,
+				const struct fdt_match *match)
+{
+	struct rpmi_base_get_attributes_resp resp;
+	struct rpmi_shmem_mbox_controller *mctl;
+	struct rpmi_srvgrp_chan *base_srvgrp;
+	u32 tval[2], args[1];
+	int ret = 0;
+
+	mctl = sbi_zalloc(sizeof(*mctl));
+	if (!mctl)
+		return SBI_ENOMEM;
+
+	/* Initialization transport from device tree */
+	ret = rpmi_shmem_transport_init(mctl, fdt, nodeoff);
+	if (ret)
+		goto fail_free_controller;
+
+	/* Register mailbox controller */
+	mctl->controller.id = nodeoff;
+	mctl->controller.max_xfer_len =
+			mctl->slot_size - sizeof(struct rpmi_message_header);
+	mctl->controller.driver = &fdt_mailbox_rpmi_shmem;
+	mctl->controller.request_chan = rpmi_shmem_mbox_request_chan;
+	mctl->controller.free_chan = rpmi_shmem_mbox_free_chan;
+	mctl->controller.xfer = rpmi_shmem_mbox_xfer;
+	ret = mbox_controller_add(&mctl->controller);
+	if (ret)
+		goto fail_free_controller;
+
+	/* Request base service group channel */
+	tval[0] = RPMI_SRVGRP_BASE;
+	mctl->base_chan = mbox_controller_request_chan(&mctl->controller,
+							tval);
+	if (!mctl->base_chan) {
+		ret = SBI_ENOENT;
+		goto fail_remove_controller;
+	}
+
+	/* Update base service group version */
+	base_srvgrp = to_srvgrp_chan(mctl->base_chan);
+	args[0] = RPMI_SRVGRP_BASE;
+	ret = smq_base_get_two_u32(mctl, RPMI_BASE_SRV_PROBE_SERVICE_GROUP,
+				   &args[0], tval);
+	if (ret)
+		goto fail_free_chan;
+	base_srvgrp->servicegroup_version = tval[1];
+	if (base_srvgrp->servicegroup_version < RPMI_BASE_VERSION_MIN) {
+		ret = SBI_EINVAL;
+		goto fail_free_chan;
+	}
+
+	/* Get implementation id */
+	ret = smq_base_get_two_u32(mctl,
+				   RPMI_BASE_SRV_GET_IMPLEMENTATION_VERSION,
+				   NULL, tval);
+	if (ret)
+		goto fail_free_chan;
+	mctl->impl_version = tval[1];
+
+	/* Get implementation version */
+	ret = smq_base_get_two_u32(mctl, RPMI_BASE_SRV_GET_IMPLEMENTATION_IDN,
+				   NULL, tval);
+	if (ret)
+		goto fail_free_chan;
+	mctl->impl_id = tval[1];
+
+	/* Get specification version */
+	ret = smq_base_get_two_u32(mctl, RPMI_BASE_SRV_GET_SPEC_VERSION,
+				   NULL, tval);
+	if (ret)
+		goto fail_free_chan;
+	mctl->spec_version = tval[1];
+	if (mctl->spec_version < RPMI_BASE_VERSION_MIN ||
+	    mctl->spec_version != base_srvgrp->servicegroup_version) {
+		ret = SBI_EINVAL;
+		goto fail_free_chan;
+	}
+
+	/* Get optional features implementation flags */
+	ret = rpmi_normal_request_with_status(
+			mctl->base_chan, RPMI_BASE_SRV_GET_ATTRIBUTES,
+			NULL, 0, 0,
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (ret)
+		goto fail_free_chan;
+
+	/* 1: M-mode, 0: S-mode */
+	mctl->base_flags.f0_priv_level =
+			resp.f0 & RPMI_BASE_FLAGS_F0_PRIVILEGE ? 1 : 0;
+	/* 1: Supported, 0: Not Supported */
+	mctl->base_flags.f0_ev_notif_en =
+			resp.f0 & RPMI_BASE_FLAGS_F0_EV_NOTIFY ? 1 : 0;
+	/* 1: Supported, 0: Not Supported */
+	mctl->base_flags.f0_msi_en =
+			resp.f0 & RPMI_BASE_FLAGS_F0_MSI_EN ? 1 : 0;
+
+	/* We only use M-mode RPMI context in OpenSBI */
+	if (!mctl->base_flags.f0_priv_level) {
+		ret = SBI_ENODEV;
+		goto fail_free_chan;
+	}
+
+	/*
+	 * Continue without platform information string if not
+	 * available or if an error is encountered while fetching
+	 */
+	rpmi_get_platform_info(mctl);
+
+	return 0;
+
+fail_free_chan:
+	mbox_controller_free_chan(mctl->base_chan);
+fail_remove_controller:
+	mbox_controller_remove(&mctl->controller);
+fail_free_controller:
+	sbi_free(mctl);
+	return ret;
+}
+
+static const struct fdt_match rpmi_shmem_mbox_match[] = {
+	{ .compatible = "riscv,rpmi-shmem-mbox" },
+	{ },
+};
+
+struct fdt_mailbox fdt_mailbox_rpmi_shmem = {
+	.driver = {
+		.match_table = rpmi_shmem_mbox_match,
+		.init = rpmi_shmem_mbox_init,
+	},
+	.xlate = fdt_mailbox_simple_xlate,
+};
diff --git a/lib/utils/mailbox/objects.mk b/lib/utils/mailbox/objects.mk
index 2135898c625..746b03139d5 100644
--- a/lib/utils/mailbox/objects.mk
+++ b/lib/utils/mailbox/objects.mk
@@ -11,3 +11,8 @@ libsbiutils-objs-$(CONFIG_FDT_MAILBOX) += mailbox/fdt_mailbox.o
 libsbiutils-objs-$(CONFIG_FDT_MAILBOX) += mailbox/fdt_mailbox_drivers.carray.o
 
 libsbiutils-objs-$(CONFIG_MAILBOX) += mailbox/mailbox.o
+
+libsbiutils-objs-$(CONFIG_RPMI_MAILBOX) += mailbox/rpmi_mailbox.o
+
+carray-fdt_mailbox_drivers-$(CONFIG_FDT_MAILBOX_RPMI_SHMEM) += fdt_mailbox_rpmi_shmem
+libsbiutils-objs-$(CONFIG_FDT_MAILBOX_RPMI_SHMEM) += mailbox/fdt_mailbox_rpmi_shmem.o
diff --git a/lib/utils/mailbox/rpmi_mailbox.c b/lib/utils/mailbox/rpmi_mailbox.c
new file mode 100644
index 00000000000..371c719bea8
--- /dev/null
+++ b/lib/utils/mailbox/rpmi_mailbox.c
@@ -0,0 +1,91 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2023 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi_utils/mailbox/mailbox.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+
+int rpmi_xlate_error(enum rpmi_error error)
+{
+	switch(error) {
+	case RPMI_SUCCESS:
+		return SBI_OK;
+	case RPMI_ERR_FAILED:
+		return SBI_EFAIL;
+	case RPMI_ERR_NOTSUPP:
+		return SBI_ENOTSUPP;
+	case RPMI_ERR_INVALID_PARAM:
+		return SBI_EINVAL;
+	case RPMI_ERR_DENIED:
+		return SBI_EDENIED;
+	case RPMI_ERR_INVALID_ADDR:
+		return SBI_EINVALID_ADDR;
+	case RPMI_ERR_ALREADY:
+		return SBI_EALREADY;
+	case RPMI_ERR_EXTENSION:
+		return SBI_EFAIL;
+	case RPMI_ERR_HW_FAULT:
+		return SBI_EIO;
+	case RPMI_ERR_BUSY:
+		return SBI_EFAIL;
+	case RPMI_ERR_INVALID_STATE:
+		return SBI_EINVALID_STATE;
+	case RPMI_ERR_BAD_RANGE:
+		return SBI_EBAD_RANGE;
+	case RPMI_ERR_TIMEOUT:
+		return SBI_ETIMEDOUT;
+	case RPMI_ERR_IO:
+		return SBI_EIO;
+	case RPMI_ERR_NO_DATA:
+		return SBI_EFAIL;
+	default:
+		return SBI_EUNKNOWN;
+	}
+}
+
+int rpmi_normal_request_with_status(
+			struct mbox_chan *chan, u32 service_id,
+			void *req, u32 req_words, u32 req_endian_words,
+			void *resp, u32 resp_words, u32 resp_endian_words)
+{
+	int ret;
+	struct mbox_xfer xfer;
+	struct rpmi_message_args args = { 0 };
+
+	args.type = RPMI_MSG_NORMAL_REQUEST;
+	args.service_id = service_id;
+	args.tx_endian_words = req_endian_words;
+	args.rx_endian_words = resp_endian_words;
+	mbox_xfer_init_txrx(&xfer, &args,
+			req, sizeof(u32) * req_words, RPMI_DEF_TX_TIMEOUT,
+			resp, sizeof(u32) * resp_words, RPMI_DEF_RX_TIMEOUT);
+
+	ret = mbox_chan_xfer(chan, &xfer);
+	if (ret)
+		return ret;
+
+	return rpmi_xlate_error(((u32 *)resp)[0]);
+}
+
+int rpmi_posted_request(
+		struct mbox_chan *chan, u32 service_id,
+		void *req, u32 req_words, u32 req_endian_words)
+{
+	struct mbox_xfer xfer;
+	struct rpmi_message_args args = { 0 };
+
+	args.type = RPMI_MSG_POSTED_REQUEST;
+	args.flags = RPMI_MSG_FLAGS_NO_RX;
+	args.service_id = service_id;
+	args.tx_endian_words = req_endian_words;
+	mbox_xfer_init_tx(&xfer, &args,
+			  req, sizeof(u32) * req_words, RPMI_DEF_TX_TIMEOUT);
+
+	return mbox_chan_xfer(chan, &xfer);
+}
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 079bc4fef82..233a9a899cc 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -20,6 +20,9 @@ CONFIG_FDT_IRQCHIP=y
 CONFIG_FDT_IRQCHIP_APLIC=y
 CONFIG_FDT_IRQCHIP_IMSIC=y
 CONFIG_FDT_IRQCHIP_PLIC=y
+CONFIG_FDT_MAILBOX=y
+CONFIG_RPMI_MAILBOX=y
+CONFIG_FDT_MAILBOX_RPMI_SHMEM=y
 CONFIG_FDT_REGMAP=y
 CONFIG_FDT_REGMAP_SYSCON=y
 CONFIG_FDT_RESET=y

From 6a26726e08e4d1e23b2e6cce073689ecdabf9291 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:24:19 +0530
Subject: [PATCH 1749/1765] lib/utils: reset: Add RPMI System Reset driver

Add RPMI based driver for system reset and enable it in the generic
platform defconfig

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h |  27 +++++
 lib/utils/reset/Kconfig                  |   5 +
 lib/utils/reset/fdt_reset_rpmi.c         | 141 +++++++++++++++++++++++
 lib/utils/reset/objects.mk               |   3 +
 platform/generic/configs/defconfig       |   1 +
 5 files changed, 177 insertions(+)
 create mode 100644 lib/utils/reset/fdt_reset_rpmi.c

diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
index f9f6544763e..31c3034badc 100644
--- a/include/sbi_utils/mailbox/rpmi_msgprot.h
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -196,6 +196,7 @@ struct rpmi_message_args {
 enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_ID_MIN = 0,
 	RPMI_SRVGRP_BASE = 0x0001,
+	RPMI_SRVGRP_SYSTEM_RESET = 0x0002,
 	RPMI_SRVGRP_ID_MAX_COUNT,
 
 	/* Reserved range for service groups */
@@ -252,4 +253,30 @@ struct rpmi_base_get_platform_info_resp {
 	char plat_info[];
 };
 
+/** RPMI System Reset ServiceGroup Service IDs */
+enum rpmi_system_reset_service_id {
+	RPMI_SYSRST_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_SYSRST_SRV_GET_ATTRIBUTES = 0x02,
+	RPMI_SYSRST_SRV_SYSTEM_RESET = 0x03,
+	RPMI_SYSRST_SRV_ID_MAX_COUNT,
+};
+
+/** RPMI System Reset types */
+enum rpmi_sysrst_reset_type {
+	RPMI_SYSRST_TYPE_SHUTDOWN = 0x0,
+	RPMI_SYSRST_TYPE_COLD_REBOOT = 0x1,
+	RPMI_SYSRST_TYPE_WARM_REBOOT = 0x2,
+	RPMI_SYSRST_TYPE_MAX,
+};
+
+#define RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_POS		(1)
+#define RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_MASK		\
+			(1U << RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_POS)
+
+/** Response for system reset attributes */
+struct rpmi_sysrst_get_reset_attributes_resp {
+	s32 status;
+	u32 flags;
+};
+
 #endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig
index 6c077fe7a2c..68e667163b5 100644
--- a/lib/utils/reset/Kconfig
+++ b/lib/utils/reset/Kconfig
@@ -24,6 +24,11 @@ config FDT_RESET_HTIF
 	select SYS_HTIF
 	default n
 
+config FDT_RESET_RPMI
+	bool "RPMI FDT reset driver"
+	depends on FDT_MAILBOX && RPMI_MAILBOX
+	default n
+
 config FDT_RESET_SG2042_HWMON_MCU
 	bool "Sophgo SG2042 hwmon MCU FDT reset driver"
 	default n
diff --git a/lib/utils/reset/fdt_reset_rpmi.c b/lib/utils/reset/fdt_reset_rpmi.c
new file mode 100644
index 00000000000..1ec4396bdc7
--- /dev/null
+++ b/lib/utils/reset/fdt_reset_rpmi.c
@@ -0,0 +1,141 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ */
+
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_system.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/reset/fdt_reset.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/rpmi_msgprot.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+
+/* struct rpmi_sysreset: RPMI System Reset Context */
+struct rpmi_sysreset {
+	int warm_reset_support;
+	struct mbox_chan *chan;
+};
+
+static struct rpmi_sysreset sysreset_ctx;
+
+static int rpmi_system_reset_type_check(u32 reset_type)
+{
+	int ret;
+	struct rpmi_sysrst_get_reset_attributes_resp resp;
+
+	ret = rpmi_normal_request_with_status(sysreset_ctx.chan,
+		RPMI_SYSRST_SRV_GET_ATTRIBUTES, &reset_type,
+		rpmi_u32_count(reset_type), rpmi_u32_count(reset_type),
+		&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (ret) {
+		return 0;
+	}
+
+	return (resp.flags & RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_MASK) ? 1 : 0;
+}
+
+/**
+ * rpmi_do_system_reset: Do system reset
+ *
+ * @reset_type: RPMI System Reset Type
+ */
+static void rpmi_do_system_reset(u32 reset_type)
+{
+	int ret;
+
+	ret = rpmi_posted_request(sysreset_ctx.chan,
+				  RPMI_SYSRST_SRV_SYSTEM_RESET,
+				  &reset_type, rpmi_u32_count(reset_type),
+				  rpmi_u32_count(reset_type));
+	if (ret)
+		sbi_printf("system reset failed [type: %d]: ret: %d\n",
+			   reset_type, ret);
+}
+
+/**
+ * rpmi_system_reset_check: Check the support for
+ * various reset types
+ *
+ * @type: SBI System Reset Type
+ * @reason: Reason for system reset
+ */
+static int rpmi_system_reset_check(u32 type, u32 reason)
+{
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		return 1;
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		return sysreset_ctx.warm_reset_support;
+	default:
+		return 0;
+	}
+}
+
+static void rpmi_system_reset(u32 type, u32 reason)
+{
+	u32 reset_type;
+
+	switch (type) {
+	case SBI_SRST_RESET_TYPE_SHUTDOWN:
+		reset_type = RPMI_SYSRST_TYPE_SHUTDOWN;
+		break;
+	case SBI_SRST_RESET_TYPE_COLD_REBOOT:
+		reset_type = RPMI_SYSRST_TYPE_COLD_REBOOT;
+		break;
+	case SBI_SRST_RESET_TYPE_WARM_REBOOT:
+		reset_type = RPMI_SYSRST_TYPE_WARM_REBOOT;
+		break;
+	default:
+		return;
+	}
+
+	rpmi_do_system_reset(reset_type);
+}
+
+static struct sbi_system_reset_device rpmi_reset_dev = {
+	.name = "rpmi-system-reset",
+	.system_reset_check = rpmi_system_reset_check,
+	.system_reset = rpmi_system_reset,
+};
+
+static int rpmi_reset_init(const void *fdt, int nodeoff,
+			   const struct fdt_match *match)
+{
+	int ret;
+
+	/* If channel already available then do nothing. */
+	if (sysreset_ctx.chan)
+		return 0;
+
+	/*
+	 * If channel request failed then other end does not support
+	 * system reset group so do nothing.
+	 */
+	ret = fdt_mailbox_request_chan(fdt, nodeoff, 0, &sysreset_ctx.chan);
+	if (ret)
+		return SBI_ENODEV;
+
+	sysreset_ctx.warm_reset_support =
+			rpmi_system_reset_type_check(RPMI_SYSRST_TYPE_WARM_REBOOT);
+
+	sbi_system_reset_add_device(&rpmi_reset_dev);
+
+	return SBI_OK;
+}
+
+static const struct fdt_match rpmi_reset_match[] = {
+	{ .compatible = "riscv,rpmi-system-reset" },
+	{},
+};
+
+struct fdt_driver fdt_reset_rpmi = {
+	.match_table = rpmi_reset_match,
+	.init = rpmi_reset_init,
+};
diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk
index a84336cf9c9..8f3774c58bc 100644
--- a/lib/utils/reset/objects.mk
+++ b/lib/utils/reset/objects.mk
@@ -29,3 +29,6 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_poweroff
 carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_SYSCON) += fdt_syscon_reboot
 libsbiutils-objs-$(CONFIG_FDT_RESET_SYSCON) += reset/fdt_reset_syscon.o
+
+carray-fdt_reset_drivers-$(CONFIG_FDT_RESET_RPMI) += fdt_reset_rpmi
+libsbiutils-objs-$(CONFIG_FDT_RESET_RPMI) += reset/fdt_reset_rpmi.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 233a9a899cc..48f8df4c0a3 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -29,6 +29,7 @@ CONFIG_FDT_RESET=y
 CONFIG_FDT_RESET_ATCWDT200=y
 CONFIG_FDT_RESET_GPIO=y
 CONFIG_FDT_RESET_HTIF=y
+CONFIG_FDT_RESET_RPMI=y
 CONFIG_FDT_RESET_SUNXI_WDT=y
 CONFIG_FDT_RESET_SG2042_HWMON_MCU=y
 CONFIG_FDT_RESET_SYSCON=y

From 3676324b0e13b97f2f56507434034833877afc08 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:27:42 +0530
Subject: [PATCH 1750/1765] lib: utils: Add simple FDT based system suspend
 driver framework

The generic platform can have multiple system suspend drivers so add a
simple FDT based system suspend driver framework.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/suspend/fdt_suspend.h      | 26 ++++++++++++++++++++
 lib/utils/Kconfig                            |  2 ++
 lib/utils/suspend/Kconfig                    | 10 ++++++++
 lib/utils/suspend/fdt_suspend.c              | 22 +++++++++++++++++
 lib/utils/suspend/fdt_suspend_drivers.carray |  3 +++
 lib/utils/suspend/objects.mk                 | 11 +++++++++
 platform/generic/configs/defconfig           |  1 +
 platform/generic/platform.c                  |  2 ++
 8 files changed, 77 insertions(+)
 create mode 100644 include/sbi_utils/suspend/fdt_suspend.h
 create mode 100644 lib/utils/suspend/Kconfig
 create mode 100644 lib/utils/suspend/fdt_suspend.c
 create mode 100644 lib/utils/suspend/fdt_suspend_drivers.carray
 create mode 100644 lib/utils/suspend/objects.mk

diff --git a/include/sbi_utils/suspend/fdt_suspend.h b/include/sbi_utils/suspend/fdt_suspend.h
new file mode 100644
index 00000000000..bfc6c69a2ec
--- /dev/null
+++ b/include/sbi_utils/suspend/fdt_suspend.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_SUSPEND_H__
+#define __FDT_SUSPEND_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+
+#ifdef CONFIG_FDT_SUSPEND
+
+void fdt_suspend_init(const void *fdt);
+
+#else
+
+static inline void fdt_suspend_init(const void *fdt) { }
+
+#endif
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 6aa7843cffa..3f32c1ca806 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -22,6 +22,8 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/reset/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/serial/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/suspend/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/sys/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/timer/Kconfig"
diff --git a/lib/utils/suspend/Kconfig b/lib/utils/suspend/Kconfig
new file mode 100644
index 00000000000..416ae795b6f
--- /dev/null
+++ b/lib/utils/suspend/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "System Suspend Support"
+
+config FDT_SUSPEND
+	bool "FDT based suspend drivers"
+	depends on FDT
+	default n
+
+endmenu
diff --git a/lib/utils/suspend/fdt_suspend.c b/lib/utils/suspend/fdt_suspend.c
new file mode 100644
index 00000000000..bd4691a07e7
--- /dev/null
+++ b/lib/utils/suspend/fdt_suspend.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi_utils/suspend/fdt_suspend.h>
+
+/* List of FDT suspend drivers generated at compile time */
+extern const struct fdt_driver *const fdt_suspend_drivers[];
+
+void fdt_suspend_init(const void *fdt)
+{
+	/*
+	 * Platforms might have multiple system suspend devices or
+	 * might not have any so probe all and don't fail.
+	 */
+	fdt_driver_init_all(fdt, fdt_suspend_drivers);
+}
diff --git a/lib/utils/suspend/fdt_suspend_drivers.carray b/lib/utils/suspend/fdt_suspend_drivers.carray
new file mode 100644
index 00000000000..a0c857fccad
--- /dev/null
+++ b/lib/utils/suspend/fdt_suspend_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/suspend/fdt_suspend.h
+TYPE: const struct fdt_driver
+NAME: fdt_suspend_drivers
diff --git a/lib/utils/suspend/objects.mk b/lib/utils/suspend/objects.mk
new file mode 100644
index 00000000000..30d897d1dc8
--- /dev/null
+++ b/lib/utils/suspend/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2024 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_FDT_SUSPEND) += suspend/fdt_suspend.o
+libsbiutils-objs-$(CONFIG_FDT_SUSPEND) += suspend/fdt_suspend_drivers.carray.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 48f8df4c0a3..ec439d748bd 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -44,6 +44,7 @@ CONFIG_FDT_SERIAL_LITEX=y
 CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
 CONFIG_SERIAL_SEMIHOSTING=y
+CONFIG_FDT_SUSPEND=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
 CONFIG_FDT_TIMER_PLMT=y
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index fefb08cfeb6..842e526ff3b 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -24,6 +24,7 @@
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/imsic.h>
 #include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/suspend/fdt_suspend.h>
 #include <sbi_utils/timer/fdt_timer.h>
 #include <sbi_utils/ipi/fdt_ipi.h>
 #include <sbi_utils/reset/fdt_reset.h>
@@ -247,6 +248,7 @@ static int generic_early_init(bool cold_boot)
 
 	if (cold_boot) {
 		fdt_reset_init(fdt);
+		fdt_suspend_init(fdt);
 
 		if (semihosting_enabled())
 			rc = semihosting_init();

From 13f55f33a1d361784fd250b9e3897918b7ae82d4 Mon Sep 17 00:00:00 2001
From: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:29:32 +0530
Subject: [PATCH 1751/1765] lib: utils/suspend: Add RPMI system suspend driver

Add RPMI based system suspend driver.

To test this, execute the follwoing in Linux:
 $ echo mem > /sys/power/state

To wake up, execute the following command on qemu monitor terminal:
 (qemu) system_wakeup

Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h |  35 ++++++
 lib/utils/suspend/Kconfig                |   9 ++
 lib/utils/suspend/fdt_suspend_rpmi.c     | 138 +++++++++++++++++++++++
 lib/utils/suspend/objects.mk             |   3 +
 platform/generic/configs/defconfig       |   1 +
 5 files changed, 186 insertions(+)
 create mode 100644 lib/utils/suspend/fdt_suspend_rpmi.c

diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
index 31c3034badc..4de86adfa0f 100644
--- a/include/sbi_utils/mailbox/rpmi_msgprot.h
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -5,6 +5,7 @@
  *
  * Authors:
  *   Rahul Pathak <rpathak@ventanamicro.com>
+ *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
  */
 
 #ifndef __RPMI_MSGPROT_H__
@@ -197,6 +198,7 @@ enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_ID_MIN = 0,
 	RPMI_SRVGRP_BASE = 0x0001,
 	RPMI_SRVGRP_SYSTEM_RESET = 0x0002,
+	RPMI_SRVGRP_SYSTEM_SUSPEND = 0x0003,
 	RPMI_SRVGRP_ID_MAX_COUNT,
 
 	/* Reserved range for service groups */
@@ -279,4 +281,37 @@ struct rpmi_sysrst_get_reset_attributes_resp {
 	u32 flags;
 };
 
+/** RPMI System Suspend ServiceGroup Service IDs */
+enum rpmi_system_suspend_service_id {
+	RPMI_SYSSUSP_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_SYSSUSP_SRV_GET_ATTRIBUTES = 0x02,
+	RPMI_SYSSUSP_SRV_SYSTEM_SUSPEND = 0x03,
+	RPMI_SYSSUSP_SRV_ID_MAX_COUNT,
+};
+
+/** Request for system suspend attributes */
+struct rpmi_syssusp_get_attr_req {
+	u32 susp_type;
+};
+
+#define RPMI_SYSSUSP_ATTRS_FLAGS_RESUMEADDR	(1U << 1)
+#define RPMI_SYSSUSP_ATTRS_FLAGS_SUSPENDTYPE	1U
+
+/** Response for system suspend attributes */
+struct rpmi_syssusp_get_attr_resp {
+	s32 status;
+	u32 flags;
+};
+
+struct rpmi_syssusp_suspend_req {
+	u32 hartid;
+	u32 suspend_type;
+	u32 resume_addr_lo;
+	u32 resume_addr_hi;
+};
+
+struct rpmi_syssusp_suspend_resp {
+	s32 status;
+};
+
 #endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/suspend/Kconfig b/lib/utils/suspend/Kconfig
index 416ae795b6f..2cbea75c265 100644
--- a/lib/utils/suspend/Kconfig
+++ b/lib/utils/suspend/Kconfig
@@ -7,4 +7,13 @@ config FDT_SUSPEND
 	depends on FDT
 	default n
 
+if FDT_SUSPEND
+
+config FDT_SUSPEND_RPMI
+	bool "FDT RPMI suspend driver"
+	depends on FDT_MAILBOX && RPMI_MAILBOX
+	default n
+
+endif
+
 endmenu
diff --git a/lib/utils/suspend/fdt_suspend_rpmi.c b/lib/utils/suspend/fdt_suspend_rpmi.c
new file mode 100644
index 00000000000..11696648758
--- /dev/null
+++ b/lib/utils/suspend/fdt_suspend_rpmi.c
@@ -0,0 +1,138 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_system.h>
+#include <sbi/riscv_asm.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/mailbox.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+#include <sbi_utils/suspend/fdt_suspend.h>
+
+struct rpmi_syssusp {
+	struct mbox_chan *chan;
+	bool cust_res_addr_supported;
+	bool suspend_supported;
+};
+
+static struct rpmi_syssusp syssusp_ctx;
+
+static int rpmi_syssusp_attrs(uint32_t *attrs)
+{
+	int rc;
+	struct rpmi_syssusp_get_attr_resp resp;
+	struct rpmi_syssusp_get_attr_req req;
+
+	req.susp_type = SBI_SUSP_SLEEP_TYPE_SUSPEND;
+
+	rc = rpmi_normal_request_with_status(
+		syssusp_ctx.chan, RPMI_SYSSUSP_SRV_GET_ATTRIBUTES,
+		&req, rpmi_u32_count(req), rpmi_u32_count(req),
+		&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	*attrs = resp.flags;
+
+	return 0;
+}
+
+static int rpmi_syssusp(uint32_t suspend_type, ulong resume_addr)
+{
+	int rc;
+	struct rpmi_syssusp_suspend_req req;
+	struct rpmi_syssusp_suspend_resp resp;
+
+	req.hartid = current_hartid();
+	req.suspend_type = suspend_type;
+	req.resume_addr_lo = resume_addr;
+	req.resume_addr_hi = (u64)resume_addr  >> 32;
+
+	rc = rpmi_normal_request_with_status(
+			syssusp_ctx.chan, RPMI_SYSSUSP_SRV_SYSTEM_SUSPEND,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	/* Wait for interrupt */
+	wfi();
+
+	return 0;
+}
+
+static int rpmi_system_suspend_check(u32 sleep_type)
+{
+	return ((sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND) &&
+		syssusp_ctx.suspend_supported) ? 0 : SBI_EINVAL;
+}
+
+static int rpmi_system_suspend(u32 sleep_type, ulong resume_addr)
+{
+	int rc;
+
+	if (sleep_type != SBI_SUSP_SLEEP_TYPE_SUSPEND)
+		return SBI_ENOTSUPP;
+
+	rc = rpmi_syssusp(sleep_type, resume_addr);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+static struct sbi_system_suspend_device rpmi_suspend_dev = {
+	.name = "rpmi-system-suspend",
+	.system_suspend_check = rpmi_system_suspend_check,
+	.system_suspend = rpmi_system_suspend,
+};
+
+static int rpmi_suspend_init(const void *fdt, int nodeoff,
+			     const struct fdt_match *match)
+{
+	int rc;
+	uint32_t attrs = 0;
+
+	/* If channel already available then do nothing. */
+	if (syssusp_ctx.chan)
+		return 0;
+
+	/*
+	 * If channel request failed then other end does not support
+	 * suspend service group so do nothing.
+	 */
+	rc = fdt_mailbox_request_chan(fdt, nodeoff, 0, &syssusp_ctx.chan);
+	if (rc)
+		return SBI_ENODEV;
+
+	/* Get suspend attributes */
+	rc = rpmi_syssusp_attrs(&attrs);
+	if (rc)
+		return rc;
+
+	syssusp_ctx.suspend_supported =
+			attrs & RPMI_SYSSUSP_ATTRS_FLAGS_SUSPENDTYPE;
+	syssusp_ctx.cust_res_addr_supported =
+			attrs & RPMI_SYSSUSP_ATTRS_FLAGS_RESUMEADDR;
+
+	sbi_system_suspend_set_device(&rpmi_suspend_dev);
+
+	return 0;
+}
+
+static const struct fdt_match rpmi_suspend_match[] = {
+	{ .compatible = "riscv,rpmi-system-suspend" },
+	{},
+};
+
+struct fdt_driver fdt_suspend_rpmi = {
+	.match_table = rpmi_suspend_match,
+	.init = rpmi_suspend_init,
+};
diff --git a/lib/utils/suspend/objects.mk b/lib/utils/suspend/objects.mk
index 30d897d1dc8..657670a8db6 100644
--- a/lib/utils/suspend/objects.mk
+++ b/lib/utils/suspend/objects.mk
@@ -9,3 +9,6 @@
 
 libsbiutils-objs-$(CONFIG_FDT_SUSPEND) += suspend/fdt_suspend.o
 libsbiutils-objs-$(CONFIG_FDT_SUSPEND) += suspend/fdt_suspend_drivers.carray.o
+
+carray-fdt_suspend_drivers-$(CONFIG_FDT_SUSPEND_RPMI) += fdt_suspend_rpmi
+libsbiutils-objs-$(CONFIG_FDT_SUSPEND_RPMI) += suspend/fdt_suspend_rpmi.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index ec439d748bd..54300fb5fb8 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -45,6 +45,7 @@ CONFIG_FDT_SERIAL_UART8250=y
 CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
 CONFIG_SERIAL_SEMIHOSTING=y
 CONFIG_FDT_SUSPEND=y
+CONFIG_FDT_SUSPEND_RPMI=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
 CONFIG_FDT_TIMER_PLMT=y

From fdd72635368beb5f9c85533b92abb31adee20406 Mon Sep 17 00:00:00 2001
From: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:38:46 +0530
Subject: [PATCH 1752/1765] lib: sbi: Add optional resume address to hart
 suspend

Add an optional resume address to the platform specific hart suspend call.

Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_hsm.h                  | 6 +++++-
 lib/sbi/sbi_hsm.c                      | 6 +++---
 platform/generic/allwinner/sun20i-d1.c | 2 +-
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/sbi/sbi_hsm.h b/include/sbi/sbi_hsm.h
index ae098f453f4..38f90516c31 100644
--- a/include/sbi/sbi_hsm.h
+++ b/include/sbi/sbi_hsm.h
@@ -40,8 +40,12 @@ struct sbi_hsm_device {
 	 *
 	 * For successful non-retentive suspend, the hart will resume from
 	 * the warm boot entry point.
+	 *
+	 * NOTE: mmode_resume_addr(resume address) is optional hence it
+	 * may or may not be honored by the platform. If its not honored
+	 * then platform must ensure to resume from the warmboot address.
 	 */
-	int (*hart_suspend)(u32 suspend_type);
+	int (*hart_suspend)(u32 suspend_type, ulong mmode_resume_addr);
 
 	/**
 	 * Perform platform-specific actions to resume from a suspended state.
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index a3d6947a4fe..cf0eb84bae1 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -223,10 +223,10 @@ static int hsm_device_hart_stop(void)
 	return SBI_ENOTSUPP;
 }
 
-static int hsm_device_hart_suspend(u32 suspend_type)
+static int hsm_device_hart_suspend(u32 suspend_type, ulong mmode_resume_addr)
 {
 	if (hsm_dev && hsm_dev->hart_suspend)
-		return hsm_dev->hart_suspend(suspend_type);
+		return hsm_dev->hart_suspend(suspend_type, mmode_resume_addr);
 	return SBI_ENOTSUPP;
 }
 
@@ -532,7 +532,7 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 		__sbi_hsm_suspend_non_ret_save(scratch);
 
 	/* Try platform specific suspend */
-	ret = hsm_device_hart_suspend(suspend_type);
+	ret = hsm_device_hart_suspend(suspend_type, scratch->warmboot_addr);
 	if (ret == SBI_ENOTSUPP) {
 		/* Try generic implementation of default suspend types */
 		if (suspend_type == SBI_HSM_SUSPEND_RET_DEFAULT ||
diff --git a/platform/generic/allwinner/sun20i-d1.c b/platform/generic/allwinner/sun20i-d1.c
index b65013c29ab..c31ebdb2fdb 100644
--- a/platform/generic/allwinner/sun20i-d1.c
+++ b/platform/generic/allwinner/sun20i-d1.c
@@ -130,7 +130,7 @@ static void sun20i_d1_riscv_cfg_init(void)
 	writel_relaxed(entry >> 32, SUN20I_D1_RISCV_CFG_BASE + RESET_ENTRY_HI_REG);
 }
 
-static int sun20i_d1_hart_suspend(u32 suspend_type)
+static int sun20i_d1_hart_suspend(u32 suspend_type, ulong mmode_resume_addr)
 {
 	/* Use the generic code for retentive suspend. */
 	if (!(suspend_type & SBI_HSM_SUSP_NON_RET_BIT))

From 9d760b810e184479c65c2537594beaf4657f02ed Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:40:46 +0530
Subject: [PATCH 1753/1765] lib: utils/fdt: Allow dynamic registration of FDT
 fixup callbacks

It should possible to fixup FDT from any part of OpenSBI so add
fdt_register_general_fixup() which allows dynamic registration of
FDT fixup callbacks.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/fdt/fdt_fixup.h | 15 ++++++++++++++
 lib/utils/fdt/fdt_fixup.c         | 33 +++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/include/sbi_utils/fdt/fdt_fixup.h b/include/sbi_utils/fdt/fdt_fixup.h
index 21a530113ad..9324996898d 100644
--- a/include/sbi_utils/fdt/fdt_fixup.h
+++ b/include/sbi_utils/fdt/fdt_fixup.h
@@ -9,6 +9,8 @@
 #ifndef __FDT_FIXUP_H__
 #define __FDT_FIXUP_H__
 
+#include <sbi/sbi_list.h>
+
 struct sbi_cpu_idle_state {
 	const char *name;
 	uint32_t suspend_param;
@@ -93,6 +95,19 @@ void fdt_plic_fixup(void *fdt);
  */
 int fdt_reserved_memory_fixup(void *fdt);
 
+/** Representation of a general fixup */
+struct fdt_general_fixup {
+	struct sbi_dlist head;
+	const char *name;
+	void (*do_fixup)(struct fdt_general_fixup *f, void *fdt);
+};
+
+/** Register a general fixup */
+int fdt_register_general_fixup(struct fdt_general_fixup *fixup);
+
+/** UnRegister a general fixup */
+void fdt_unregister_general_fixup(struct fdt_general_fixup *fixup);
+
 /**
  * General device tree fix-up
  *
diff --git a/lib/utils/fdt/fdt_fixup.c b/lib/utils/fdt/fdt_fixup.c
index 9e013dfaafa..192d6dd56bd 100644
--- a/lib/utils/fdt/fdt_fixup.c
+++ b/lib/utils/fdt/fdt_fixup.c
@@ -401,8 +401,38 @@ void fdt_config_fixup(void *fdt)
 	fdt_nop_node(fdt, config_offset);
 }
 
+static SBI_LIST_HEAD(fixup_list);
+
+int fdt_register_general_fixup(struct fdt_general_fixup *fixup)
+{
+	struct fdt_general_fixup *f;
+
+	if (!fixup || !fixup->name || !fixup->do_fixup)
+		return SBI_EINVAL;
+
+	sbi_list_for_each_entry(f, &fixup_list, head) {
+		if (f == fixup)
+			return SBI_EALREADY;
+	}
+
+	SBI_INIT_LIST_HEAD(&fixup->head);
+	sbi_list_add_tail(&fixup->head, &fixup_list);
+
+	return 0;
+}
+
+void fdt_unregister_general_fixup(struct fdt_general_fixup *fixup)
+{
+	if (!fixup)
+		return;
+
+	sbi_list_del(&fixup->head);
+}
+
 void fdt_fixups(void *fdt)
 {
+	struct fdt_general_fixup *f;
+
 	fdt_aplic_fixup(fdt);
 
 	fdt_imsic_fixup(fdt);
@@ -416,4 +446,7 @@ void fdt_fixups(void *fdt)
 #endif
 
 	fdt_config_fixup(fdt);
+
+	sbi_list_for_each_entry(f, &fixup_list, head)
+		f->do_fixup(f, fdt);
 }

From ff4769bf08b50c61bb48f37ea00a17737096e2b5 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:45:11 +0530
Subject: [PATCH 1754/1765] lib: utils: Add simple FDT based HSM driver
 framework

The generic platform can have multiple HSM drivers so add a simple
FDT based HSM driver framework.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/hsm/fdt_hsm.h      | 26 ++++++++++++++++++++++++++
 lib/utils/Kconfig                    |  2 ++
 lib/utils/hsm/Kconfig                | 10 ++++++++++
 lib/utils/hsm/fdt_hsm.c              | 22 ++++++++++++++++++++++
 lib/utils/hsm/fdt_hsm_drivers.carray |  3 +++
 lib/utils/hsm/objects.mk             | 11 +++++++++++
 platform/generic/configs/defconfig   |  1 +
 platform/generic/platform.c          |  2 ++
 8 files changed, 77 insertions(+)
 create mode 100644 include/sbi_utils/hsm/fdt_hsm.h
 create mode 100644 lib/utils/hsm/Kconfig
 create mode 100644 lib/utils/hsm/fdt_hsm.c
 create mode 100644 lib/utils/hsm/fdt_hsm_drivers.carray
 create mode 100644 lib/utils/hsm/objects.mk

diff --git a/include/sbi_utils/hsm/fdt_hsm.h b/include/sbi_utils/hsm/fdt_hsm.h
new file mode 100644
index 00000000000..58061afcc01
--- /dev/null
+++ b/include/sbi_utils/hsm/fdt_hsm.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_HSM_H__
+#define __FDT_HSM_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+
+#ifdef CONFIG_FDT_HSM
+
+void fdt_hsm_init(const void *fdt);
+
+#else
+
+static inline void fdt_hsm_init(const void *fdt) { }
+
+#endif
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 3f32c1ca806..c860a185bad 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -6,6 +6,8 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/fdt/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/gpio/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/hsm/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/i2c/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/ipi/Kconfig"
diff --git a/lib/utils/hsm/Kconfig b/lib/utils/hsm/Kconfig
new file mode 100644
index 00000000000..3150611651b
--- /dev/null
+++ b/lib/utils/hsm/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "HSM Device Support"
+
+config FDT_HSM
+	bool "FDT based HSM drivers"
+	depends on FDT
+	default n
+
+endmenu
diff --git a/lib/utils/hsm/fdt_hsm.c b/lib/utils/hsm/fdt_hsm.c
new file mode 100644
index 00000000000..162b98675c7
--- /dev/null
+++ b/lib/utils/hsm/fdt_hsm.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi_utils/hsm/fdt_hsm.h>
+
+/* List of FDT HSM drivers generated at compile time */
+extern const struct fdt_driver *const fdt_hsm_drivers[];
+
+void fdt_hsm_init(const void *fdt)
+{
+	/*
+	 * Platforms might have multiple HSM devices or might
+	 * not have any so probe all and don't fail.
+	 */
+	fdt_driver_init_all(fdt, fdt_hsm_drivers);
+}
diff --git a/lib/utils/hsm/fdt_hsm_drivers.carray b/lib/utils/hsm/fdt_hsm_drivers.carray
new file mode 100644
index 00000000000..73680a25519
--- /dev/null
+++ b/lib/utils/hsm/fdt_hsm_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/hsm/fdt_hsm.h
+TYPE: const struct fdt_driver
+NAME: fdt_hsm_drivers
diff --git a/lib/utils/hsm/objects.mk b/lib/utils/hsm/objects.mk
new file mode 100644
index 00000000000..49337bf5dbb
--- /dev/null
+++ b/lib/utils/hsm/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2024 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_FDT_HSM) += hsm/fdt_hsm.o
+libsbiutils-objs-$(CONFIG_FDT_HSM) += hsm/fdt_hsm_drivers.carray.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 54300fb5fb8..2efc7136216 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -10,6 +10,7 @@ CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_GPIO_STARFIVE=y
+CONFIG_FDT_HSM=y
 CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_I2C_DW=y
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 842e526ff3b..5f309a27fb2 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -21,6 +21,7 @@
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
 #include <sbi_utils/fdt/fdt_pmu.h>
+#include <sbi_utils/hsm/fdt_hsm.h>
 #include <sbi_utils/irqchip/fdt_irqchip.h>
 #include <sbi_utils/irqchip/imsic.h>
 #include <sbi_utils/serial/fdt_serial.h>
@@ -249,6 +250,7 @@ static int generic_early_init(bool cold_boot)
 	if (cold_boot) {
 		fdt_reset_init(fdt);
 		fdt_suspend_init(fdt);
+		fdt_hsm_init(fdt);
 
 		if (semihosting_enabled())
 			rc = semihosting_init();

From 33ee9b8240fee298ddd357a68096652286024670 Mon Sep 17 00:00:00 2001
From: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Date: Tue, 6 Aug 2024 10:55:01 +0530
Subject: [PATCH 1755/1765] lib: utils/hsm: Add RPMI HSM driver

The RPMI HSM service group provides set of routine to query and control
power states of a Hart. Add RPMI based Hart State Management (HSM) driver.

Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h |  92 ++++++
 lib/utils/hsm/Kconfig                    |   9 +
 lib/utils/hsm/fdt_hsm_rpmi.c             | 362 +++++++++++++++++++++++
 lib/utils/hsm/objects.mk                 |   3 +
 platform/generic/configs/defconfig       |   1 +
 5 files changed, 467 insertions(+)
 create mode 100644 lib/utils/hsm/fdt_hsm_rpmi.c

diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
index 4de86adfa0f..8e2b23e2d88 100644
--- a/include/sbi_utils/mailbox/rpmi_msgprot.h
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -199,6 +199,7 @@ enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_BASE = 0x0001,
 	RPMI_SRVGRP_SYSTEM_RESET = 0x0002,
 	RPMI_SRVGRP_SYSTEM_SUSPEND = 0x0003,
+	RPMI_SRVGRP_HSM = 0x0004,
 	RPMI_SRVGRP_ID_MAX_COUNT,
 
 	/* Reserved range for service groups */
@@ -314,4 +315,95 @@ struct rpmi_syssusp_suspend_resp {
 	s32 status;
 };
 
+/** RPMI HSM State Management ServiceGroup Service IDs */
+enum rpmi_hsm_service_id {
+	RPMI_HSM_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_HSM_SRV_GET_HART_STATUS = 0x02,
+	RPMI_HSM_SRV_GET_HART_LIST = 0x03,
+	RPMI_HSM_SRV_GET_SUSPEND_TYPES = 0x04,
+	RPMI_HSM_SRV_GET_SUSPEND_INFO = 0x05,
+	RPMI_HSM_SRV_HART_START = 0x06,
+	RPMI_HSM_SRV_HART_STOP = 0x07,
+	RPMI_HSM_SRV_HART_SUSPEND = 0x08,
+	RPMI_HSM_SRV_ID_MAX = 0x09,
+};
+
+/* HSM service group request and response structs */
+struct rpmi_hsm_hart_start_req {
+	u32 hartid;
+	u32 start_addr_lo;
+	u32 start_addr_hi;
+};
+
+struct rpmi_hsm_hart_start_resp {
+	s32 status;
+};
+
+struct rpmi_hsm_hart_stop_req {
+	u32 hartid;
+};
+
+struct rpmi_hsm_hart_stop_resp {
+	s32 status;
+};
+
+struct rpmi_hsm_hart_susp_req {
+	u32 hartid;
+	u32 suspend_type;
+	u32 resume_addr_lo;
+	u32 resume_addr_hi;
+};
+
+struct rpmi_hsm_hart_susp_resp {
+	s32 status;
+};
+
+struct rpmi_hsm_get_hart_status_req {
+	u32 hartid;
+};
+
+struct rpmi_hsm_get_hart_status_resp {
+	s32 status;
+	u32 hart_status;
+};
+
+struct rpmi_hsm_get_hart_list_req {
+	u32 start_index;
+};
+
+struct rpmi_hsm_get_hart_list_resp {
+	s32 status;
+	u32 remaining;
+	u32 returned;
+	/* remaining space need to be adjusted for the above 3 u32's */
+	u32 hartid[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
+};
+
+struct rpmi_hsm_get_susp_types_req {
+	u32 start_index;
+};
+
+struct rpmi_hsm_get_susp_types_resp {
+	s32 status;
+	u32 remaining;
+	u32 returned;
+	/* remaining space need to be adjusted for the above 3 u32's */
+	u32 types[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
+};
+
+struct rpmi_hsm_get_susp_info_req {
+	u32 suspend_type;
+};
+
+#define RPMI_HSM_SUSPEND_INFO_FLAGS_TIMER_STOP		1U
+
+struct rpmi_hsm_get_susp_info_resp {
+	s32 status;
+	u32 flags;
+	u32 entry_latency_us;
+	u32 exit_latency_us;
+	u32 wakeup_latency_us;
+	u32 min_residency_us;
+};
+
 #endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/hsm/Kconfig b/lib/utils/hsm/Kconfig
index 3150611651b..1ad7958fb58 100644
--- a/lib/utils/hsm/Kconfig
+++ b/lib/utils/hsm/Kconfig
@@ -7,4 +7,13 @@ config FDT_HSM
 	depends on FDT
 	default n
 
+if FDT_HSM
+
+config FDT_HSM_RPMI
+	bool "FDT RPMI HSM driver"
+	depends on FDT_MAILBOX && RPMI_MAILBOX
+	default n
+
+endif
+
 endmenu
diff --git a/lib/utils/hsm/fdt_hsm_rpmi.c b/lib/utils/hsm/fdt_hsm_rpmi.c
new file mode 100644
index 00000000000..975d348410d
--- /dev/null
+++ b/lib/utils/hsm/fdt_hsm_rpmi.c
@@ -0,0 +1,362 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_hsm.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/hsm/fdt_hsm.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/mailbox.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+
+#define MAX_HSM_SUPSEND_STATE_NAMELEN		16
+
+struct rpmi_hsm_suspend {
+	u32 num_states;
+	struct sbi_cpu_idle_state *states;
+};
+
+struct rpmi_hsm {
+	struct mbox_chan *chan;
+	struct rpmi_hsm_suspend *susp;
+};
+
+static unsigned long rpmi_hsm_offset;
+
+static struct rpmi_hsm *rpmi_hsm_get_pointer(u32 hartid)
+{
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch || !rpmi_hsm_offset)
+		return NULL;
+
+	return sbi_scratch_offset_ptr(scratch, rpmi_hsm_offset);
+}
+
+static int rpmi_hsm_start(u32 hartid, ulong resume_addr)
+{
+	struct rpmi_hsm_hart_start_req req;
+	struct rpmi_hsm_hart_start_resp resp;
+	struct rpmi_hsm *rpmi = rpmi_hsm_get_pointer(hartid);
+
+	if (!rpmi)
+		return SBI_ENOSYS;
+
+	req.hartid = hartid;
+	req.start_addr_lo = resume_addr;
+	req.start_addr_hi = (u64)resume_addr  >> 32;
+
+	return rpmi_normal_request_with_status(
+			rpmi->chan, RPMI_HSM_SRV_HART_START,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+}
+
+static int rpmi_hsm_stop(void)
+{
+	int rc;
+	struct rpmi_hsm_hart_stop_req req;
+	struct rpmi_hsm_hart_stop_resp resp;
+	void (*jump_warmboot)(void) =
+		(void (*)(void))sbi_scratch_thishart_ptr()->warmboot_addr;
+	struct rpmi_hsm *rpmi = rpmi_hsm_get_pointer(current_hartid());
+
+	if (!rpmi)
+		return SBI_ENOSYS;
+
+	req.hartid = current_hartid();
+
+	rc = rpmi_normal_request_with_status(
+			rpmi->chan, RPMI_HSM_SRV_HART_STOP,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	/* Wait for interrupt */
+	wfi();
+
+	jump_warmboot();
+
+	return 0;
+}
+
+static bool is_rpmi_hsm_susp_supported(struct rpmi_hsm_suspend *susp, u32 type)
+{
+	int i;
+
+	for (i = 0; i < susp->num_states; i++)
+		if (type == susp->states[i].suspend_param)
+			return true;
+
+	return false;
+}
+
+static int rpmi_hsm_suspend(u32 type, ulong resume_addr)
+{
+	int rc;
+	struct rpmi_hsm_hart_susp_req req;
+	struct rpmi_hsm_hart_susp_resp resp;
+	struct rpmi_hsm *rpmi = rpmi_hsm_get_pointer(current_hartid());
+
+	if (!rpmi)
+		return SBI_ENOSYS;
+
+	/* check if harts support this suspend type */
+	if (!is_rpmi_hsm_susp_supported(rpmi->susp, type))
+		return SBI_EINVAL;
+
+	req.hartid = current_hartid();
+	req.suspend_type = type;
+	req.resume_addr_lo = resume_addr;
+	req.resume_addr_hi = (u64)resume_addr  >> 32;
+
+	rc = rpmi_normal_request_with_status(
+			rpmi->chan, RPMI_HSM_SRV_HART_SUSPEND,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	/* Wait for interrupt */
+	wfi();
+
+	return 0;
+}
+
+static struct sbi_hsm_device sbi_hsm_rpmi = {
+	.name		= "rpmi-hsm",
+	.hart_start	= rpmi_hsm_start,
+	.hart_stop	= rpmi_hsm_stop,
+	.hart_suspend	= rpmi_hsm_suspend,
+};
+
+static void rpmi_hsm_do_fixup(struct fdt_general_fixup *f, void *fdt)
+{
+	struct rpmi_hsm *rpmi = rpmi_hsm_get_pointer(current_hartid());
+
+	if (!rpmi || !rpmi->susp || !rpmi->susp->num_states)
+		return;
+
+	fdt_add_cpu_idle_states(fdt, rpmi->susp->states);
+}
+
+static struct fdt_general_fixup rpmi_hsm_fixup = {
+	.name = "rpmi-hsm-fixup",
+	.do_fixup = rpmi_hsm_do_fixup,
+};
+
+static int rpmi_hsm_get_num_suspend_states(struct mbox_chan *chan,
+					   struct rpmi_hsm_suspend *susp)
+{
+	int rc;
+	struct rpmi_hsm_get_susp_types_req req;
+	struct rpmi_hsm_get_susp_types_resp resp;
+
+	req.start_index = 0;
+	rc = rpmi_normal_request_with_status(
+			chan, RPMI_HSM_SRV_GET_SUSPEND_TYPES,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	susp->num_states = resp.returned + resp.remaining;
+	return 0;
+}
+
+static int rpmi_hsm_get_suspend_states(struct mbox_chan *chan,
+					struct rpmi_hsm_suspend *susp)
+{
+	int rc, i, cnt = 0;
+	struct rpmi_hsm_get_susp_types_req req;
+	struct rpmi_hsm_get_susp_types_resp resp;
+	struct rpmi_hsm_get_susp_info_req dreq;
+	struct rpmi_hsm_get_susp_info_resp dresp;
+	struct sbi_cpu_idle_state *state;
+
+	if (!susp->num_states)
+		return 0;
+
+	req.start_index = 0;
+	do {
+		rc = rpmi_normal_request_with_status(
+			chan, RPMI_HSM_SRV_GET_SUSPEND_TYPES,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+		if (rc)
+			return rc;
+
+		for (i = 0; i < resp.returned && cnt < susp->num_states; i++)
+			susp->states[cnt++].suspend_param = resp.types[i];
+		req.start_index = i;
+	} while (resp.remaining);
+
+	for (i = 0; i < susp->num_states; i++) {
+		state = &susp->states[i];
+
+		dreq.suspend_type = state->suspend_param;
+		rc = rpmi_normal_request_with_status(
+			chan, RPMI_HSM_SRV_GET_SUSPEND_INFO,
+			&dreq, rpmi_u32_count(dreq), rpmi_u32_count(dreq),
+			&dresp, rpmi_u32_count(dresp), rpmi_u32_count(dresp));
+		if (rc)
+			return rc;
+
+		state->local_timer_stop =
+			(dresp.flags & RPMI_HSM_SUSPEND_INFO_FLAGS_TIMER_STOP) ? true : false;
+		state->entry_latency_us = dresp.entry_latency_us;
+		state->exit_latency_us = dresp.exit_latency_us;
+		state->wakeup_latency_us = dresp.wakeup_latency_us;
+		state->min_residency_us = dresp.min_residency_us;
+	}
+
+	return 0;
+}
+
+static int rpmi_hsm_update_hart_scratch(struct mbox_chan *chan,
+					struct rpmi_hsm_suspend *susp)
+{
+	int rc, i;
+	struct rpmi_hsm_get_hart_list_req req;
+	struct rpmi_hsm_get_hart_list_resp resp;
+	struct rpmi_hsm *rpmi = rpmi_hsm_get_pointer(current_hartid());
+
+	req.start_index = 0;
+	do {
+		rc = rpmi_normal_request_with_status(
+			chan, RPMI_HSM_SRV_GET_HART_LIST,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+		if (rc)
+			return rc;
+
+		for (i = 0; i < resp.returned; i++) {
+			rpmi = rpmi_hsm_get_pointer(resp.hartid[i]);
+			if (!rpmi)
+				return SBI_ENOSYS;
+
+			rpmi->chan = chan;
+			rpmi->susp = susp;
+		}
+
+		req.start_index += resp.returned;
+	} while (resp.remaining);
+
+	return 0;
+}
+
+static int rpmi_hsm_cold_init(const void *fdt, int nodeoff,
+			      const struct fdt_match *match)
+{
+	int rc, i;
+	struct mbox_chan *chan;
+	struct rpmi_hsm_suspend *susp;
+
+	if (!rpmi_hsm_offset) {
+		rpmi_hsm_offset =
+			sbi_scratch_alloc_type_offset(struct rpmi_hsm);
+		if (!rpmi_hsm_offset)
+			return SBI_ENOMEM;
+	}
+
+	/*
+	 * If channel request failed then other end does not support
+	 * HSM service group so do nothing.
+	 */
+	rc = fdt_mailbox_request_chan(fdt, nodeoff, 0, &chan);
+	if (rc)
+		return SBI_ENODEV;
+
+	/* Allocate context for HART suspend states */
+	susp = sbi_zalloc(sizeof(*susp));
+	if (!susp)
+		return SBI_ENOMEM;
+
+	/* Get number of HART suspend states */
+	rc = rpmi_hsm_get_num_suspend_states(chan, susp);
+	if (rc)
+		goto fail_free_susp;
+
+	/* Skip HART suspend state discovery for zero HART suspend states */
+	if (!susp->num_states)
+		goto skip_suspend_states;
+
+	/* Allocate array of HART suspend states */
+	susp->states = sbi_calloc(susp->num_states + 1, sizeof(*susp->states));
+	if (!susp->states) {
+		rc = SBI_ENOMEM;
+		goto fail_free_susp;
+	}
+
+	/* Allocate name of each HART suspend state */
+	for (i = 0; i < susp->num_states; i++) {
+		susp->states[i].name =
+			sbi_zalloc(MAX_HSM_SUPSEND_STATE_NAMELEN);
+		if (!susp->states[i].name) {
+			do {
+				i--;
+				sbi_free((void *)susp->states[i].name);
+			} while (i > 0);
+
+			rc = SBI_ENOMEM;
+			goto fail_free_susp_states;
+		}
+		sbi_snprintf((char *)susp->states[i].name,
+			     MAX_HSM_SUPSEND_STATE_NAMELEN, "cpu-susp%d", i);
+	}
+
+	/* Get details about each HART suspend state */
+	rc = rpmi_hsm_get_suspend_states(chan, susp);
+	if (rc)
+		goto fail_free_susp_state_names;
+
+skip_suspend_states:
+	/* Update per-HART scratch space */
+	rc = rpmi_hsm_update_hart_scratch(chan, susp);
+	if (rc)
+		goto fail_free_susp_state_names;
+
+	/* Register HSM fixup callback */
+	rc = fdt_register_general_fixup(&rpmi_hsm_fixup);
+	if (rc)
+		goto fail_free_susp_state_names;
+
+	/* Register HSM device */
+	if (!susp->num_states)
+		sbi_hsm_rpmi.hart_suspend = NULL;
+	sbi_hsm_set_device(&sbi_hsm_rpmi);
+
+	return 0;
+
+fail_free_susp_state_names:
+	for (i = 0; i < susp->num_states; i++)
+		sbi_free((void *)susp->states[i].name);
+fail_free_susp_states:
+	if (susp->num_states)
+		sbi_free(susp->states);
+fail_free_susp:
+	sbi_free(susp);
+	return rc;
+}
+
+static const struct fdt_match rpmi_hsm_match[] = {
+	{ .compatible = "riscv,rpmi-hsm" },
+	{},
+};
+
+struct fdt_driver fdt_hsm_rpmi = {
+	.match_table = rpmi_hsm_match,
+	.init = rpmi_hsm_cold_init,
+};
diff --git a/lib/utils/hsm/objects.mk b/lib/utils/hsm/objects.mk
index 49337bf5dbb..b54b6f6c3e9 100644
--- a/lib/utils/hsm/objects.mk
+++ b/lib/utils/hsm/objects.mk
@@ -9,3 +9,6 @@
 
 libsbiutils-objs-$(CONFIG_FDT_HSM) += hsm/fdt_hsm.o
 libsbiutils-objs-$(CONFIG_FDT_HSM) += hsm/fdt_hsm_drivers.carray.o
+
+carray-fdt_hsm_drivers-$(CONFIG_FDT_HSM_RPMI) += fdt_hsm_rpmi
+libsbiutils-objs-$(CONFIG_FDT_HSM_RPMI) += hsm/fdt_hsm_rpmi.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 2efc7136216..78fc96b6567 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -11,6 +11,7 @@ CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y
 CONFIG_FDT_GPIO_STARFIVE=y
 CONFIG_FDT_HSM=y
+CONFIG_FDT_HSM_RPMI=y
 CONFIG_FDT_I2C=y
 CONFIG_FDT_I2C_SIFIVE=y
 CONFIG_FDT_I2C_DW=y

From 54e632b72e80101cf733c47ad1c419d23a8b78e7 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Wed, 7 Aug 2024 10:47:18 +0530
Subject: [PATCH 1756/1765] lib: utils: Add simple FDT based CPPC driver
 framework

The generic platform can have multiple CPPC drivers so add a simple
FDT based CPPC driver framework.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/cppc/fdt_cppc.h      | 26 ++++++++++++++++++++++++++
 lib/utils/Kconfig                      |  2 ++
 lib/utils/cppc/Kconfig                 | 10 ++++++++++
 lib/utils/cppc/fdt_cppc.c              | 22 ++++++++++++++++++++++
 lib/utils/cppc/fdt_cppc_drivers.carray |  3 +++
 lib/utils/cppc/objects.mk              | 11 +++++++++++
 platform/generic/configs/defconfig     |  1 +
 platform/generic/platform.c            |  2 ++
 8 files changed, 77 insertions(+)
 create mode 100644 include/sbi_utils/cppc/fdt_cppc.h
 create mode 100644 lib/utils/cppc/Kconfig
 create mode 100644 lib/utils/cppc/fdt_cppc.c
 create mode 100644 lib/utils/cppc/fdt_cppc_drivers.carray
 create mode 100644 lib/utils/cppc/objects.mk

diff --git a/include/sbi_utils/cppc/fdt_cppc.h b/include/sbi_utils/cppc/fdt_cppc.h
new file mode 100644
index 00000000000..433c6d32a0a
--- /dev/null
+++ b/include/sbi_utils/cppc/fdt_cppc.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_CPPC_H__
+#define __FDT_CPPC_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+
+#ifdef CONFIG_FDT_CPPC
+
+void fdt_cppc_init(const void *fdt);
+
+#else
+
+static inline void fdt_cppc_init(const void *fdt) { }
+
+#endif
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index c860a185bad..002d6f8f9ca 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -2,6 +2,8 @@
 
 menu "Utils and Drivers Support"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/cppc/Kconfig"
+
 source "$(OPENSBI_SRC_DIR)/lib/utils/fdt/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/gpio/Kconfig"
diff --git a/lib/utils/cppc/Kconfig b/lib/utils/cppc/Kconfig
new file mode 100644
index 00000000000..08d1c97f601
--- /dev/null
+++ b/lib/utils/cppc/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "CPPC Device Support"
+
+config FDT_CPPC
+	bool "FDT based CPPC drivers"
+	depends on FDT
+	default n
+
+endmenu
diff --git a/lib/utils/cppc/fdt_cppc.c b/lib/utils/cppc/fdt_cppc.c
new file mode 100644
index 00000000000..0e1ecb24264
--- /dev/null
+++ b/lib/utils/cppc/fdt_cppc.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi_utils/cppc/fdt_cppc.h>
+
+/* List of FDT CPPC drivers generated at compile time */
+extern const struct fdt_driver *const fdt_cppc_drivers[];
+
+void fdt_cppc_init(const void *fdt)
+{
+	/*
+	 * Platforms might have multiple CPPC devices or might
+	 * not have any so probe all and don't fail.
+	 */
+	fdt_driver_init_all(fdt, fdt_cppc_drivers);
+}
diff --git a/lib/utils/cppc/fdt_cppc_drivers.carray b/lib/utils/cppc/fdt_cppc_drivers.carray
new file mode 100644
index 00000000000..b25c7888ed8
--- /dev/null
+++ b/lib/utils/cppc/fdt_cppc_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/cppc/fdt_cppc.h
+TYPE: const struct fdt_driver
+NAME: fdt_cppc_drivers
diff --git a/lib/utils/cppc/objects.mk b/lib/utils/cppc/objects.mk
new file mode 100644
index 00000000000..fb37478ada4
--- /dev/null
+++ b/lib/utils/cppc/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2024 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_FDT_CPPC) += cppc/fdt_cppc.o
+libsbiutils-objs-$(CONFIG_FDT_CPPC) += cppc/fdt_cppc_drivers.carray.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 78fc96b6567..bd18c3c1184 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -6,6 +6,7 @@ CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_PLATFORM_SOPHGO_SG2042=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_PLATFORM_THEAD=y
+CONFIG_FDT_CPPC=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 5f309a27fb2..34973a94bb5 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_tlb.h>
+#include <sbi_utils/cppc/fdt_cppc.h>
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
 #include <sbi_utils/fdt/fdt_helper.h>
@@ -251,6 +252,7 @@ static int generic_early_init(bool cold_boot)
 		fdt_reset_init(fdt);
 		fdt_suspend_init(fdt);
 		fdt_hsm_init(fdt);
+		fdt_cppc_init(fdt);
 
 		if (semihosting_enabled())
 			rc = semihosting_init();

From 591a98bdd549b20504ffda41a41346ad2248ea4d Mon Sep 17 00:00:00 2001
From: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Date: Wed, 7 Aug 2024 10:54:01 +0530
Subject: [PATCH 1757/1765] lib: utils/cppc: Add RPMI CPPC driver

Add RPMI based driver for CPPC register read, write and probe.

Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com>
Co-developed-by: Rahul Pathak <rpathak@ventanamicro.com>
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Co-developed-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h | 105 +++++++
 lib/utils/cppc/Kconfig                   |   9 +
 lib/utils/cppc/fdt_cppc_rpmi.c           | 377 +++++++++++++++++++++++
 lib/utils/cppc/objects.mk                |   3 +
 platform/generic/configs/defconfig       |   1 +
 5 files changed, 495 insertions(+)
 create mode 100644 lib/utils/cppc/fdt_cppc_rpmi.c

diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
index 8e2b23e2d88..f7c803607a4 100644
--- a/include/sbi_utils/mailbox/rpmi_msgprot.h
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -200,6 +200,7 @@ enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_SYSTEM_RESET = 0x0002,
 	RPMI_SRVGRP_SYSTEM_SUSPEND = 0x0003,
 	RPMI_SRVGRP_HSM = 0x0004,
+	RPMI_SRVGRP_CPPC = 0x0005,
 	RPMI_SRVGRP_ID_MAX_COUNT,
 
 	/* Reserved range for service groups */
@@ -406,4 +407,108 @@ struct rpmi_hsm_get_susp_info_resp {
 	u32 min_residency_us;
 };
 
+/** RPMI CPPC ServiceGroup Service IDs */
+enum rpmi_cppc_service_id {
+	RPMI_CPPC_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_CPPC_SRV_PROBE_REG = 0x02,
+	RPMI_CPPC_SRV_READ_REG = 0x03,
+	RPMI_CPPC_SRV_WRITE_REG = 0x04,
+	RPMI_CPPC_SRV_GET_FAST_CHANNEL_REGION = 0x05,
+	RPMI_CPPC_SRV_GET_FAST_CHANNEL_OFFSET = 0x06,
+	RPMI_CPPC_SRV_GET_HART_LIST = 0x07,
+	RPMI_CPPC_SRV_MAX_COUNT,
+};
+
+struct rpmi_cppc_probe_req {
+	u32 hart_id;
+	u32 reg_id;
+};
+
+struct rpmi_cppc_probe_resp {
+	s32 status;
+	u32 reg_len;
+};
+
+struct rpmi_cppc_read_reg_req {
+	u32 hart_id;
+	u32 reg_id;
+};
+
+struct rpmi_cppc_read_reg_resp {
+	s32 status;
+	u32 data_lo;
+	u32 data_hi;
+};
+
+struct rpmi_cppc_write_reg_req {
+	u32 hart_id;
+	u32 reg_id;
+	u32 data_lo;
+	u32 data_hi;
+};
+
+struct rpmi_cppc_write_reg_resp {
+	s32 status;
+};
+
+struct rpmi_cppc_get_fastchan_offset_req {
+	u32 hart_id;
+};
+
+struct rpmi_cppc_get_fastchan_offset_resp {
+	s32 status;
+	u32 fc_perf_request_offset_lo;
+	u32 fc_perf_request_offset_hi;
+	u32 fc_perf_feedback_offset_lo;
+	u32 fc_perf_feedback_offset_hi;
+};
+
+#define RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_POS		3
+#define RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_MASK		\
+			(3U << RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_POS)
+#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_POS	1
+#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_MASK	\
+			(3U << RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_POS)
+#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_SUPPORTED	(1U << 0)
+
+struct rpmi_cppc_get_fastchan_region_resp {
+	s32 status;
+	u32 flags;
+	u32 region_addr_lo;
+	u32 region_addr_hi;
+	u32 region_size_lo;
+	u32 region_size_hi;
+	u32 db_addr_lo;
+	u32 db_addr_hi;
+	u32 db_setmask_lo;
+	u32 db_setmask_hi;
+	u32 db_preservemask_lo;
+	u32 db_preservemask_hi;
+};
+
+enum rpmi_cppc_fast_channel_db_width {
+	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_8 = 0x0,
+	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_16 = 0x1,
+	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_32 = 0x2,
+	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_64 = 0x3,
+};
+
+enum rpmi_cppc_fast_channel_cppc_mode {
+	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_PASSIVE = 0x0,
+	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_ACTIVE = 0x1,
+	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_MAX_IDX,
+};
+
+struct rpmi_cppc_hart_list_req {
+	u32 start_index;
+};
+
+struct rpmi_cppc_hart_list_resp {
+	s32 status;
+	u32 remaining;
+	u32 returned;
+	/* remaining space need to be adjusted for the above 3 u32's */
+	u32 hartid[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
+};
+
 #endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/cppc/Kconfig b/lib/utils/cppc/Kconfig
index 08d1c97f601..494f68940d5 100644
--- a/lib/utils/cppc/Kconfig
+++ b/lib/utils/cppc/Kconfig
@@ -7,4 +7,13 @@ config FDT_CPPC
 	depends on FDT
 	default n
 
+if FDT_CPPC
+
+config FDT_CPPC_RPMI
+	bool "FDT RPMI CPPC driver"
+	depends on FDT_MAILBOX && RPMI_MAILBOX
+	default n
+
+endif
+
 endmenu
diff --git a/lib/utils/cppc/fdt_cppc_rpmi.c b/lib/utils/cppc/fdt_cppc_rpmi.c
new file mode 100644
index 00000000000..26e2d4f67b3
--- /dev/null
+++ b/lib/utils/cppc/fdt_cppc_rpmi.c
@@ -0,0 +1,377 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_cppc.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi_utils/cppc/fdt_cppc.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/rpmi_mailbox.h>
+
+/**
+ * Per hart RPMI CPPC fast channel size (bytes)
+ * PASSIVE MODE:
+ *	0x0: DESIRED_PERFORMANCE (4-byte)
+ *	0x4: __RESERVED	(4-byte)
+ * ACTIVE MODE: (not supported yet)
+ *	0x0: MINIMUM PERFORMANCE (4-byte)
+ *	0x4: MAXIMUM PERFORMANCE (4-byte)
+ */
+#define RPMI_CPPC_HART_FASTCHAN_SIZE		0x8
+
+struct rpmi_cppc {
+	struct mbox_chan *chan;
+	bool fc_supported;
+	bool fc_db_supported;
+	enum rpmi_cppc_fast_channel_db_width fc_db_width;
+	enum rpmi_cppc_fast_channel_cppc_mode mode;
+	ulong fc_perf_request_addr;
+	ulong fc_perf_feedback_addr;
+	ulong fc_db_addr;
+	u64 fc_db_setmask;
+	u64 fc_db_preservemask;
+};
+
+static unsigned long rpmi_cppc_offset;
+
+static struct rpmi_cppc *rpmi_cppc_get_pointer(u32 hartid)
+{
+	struct sbi_scratch *scratch;
+
+	scratch = sbi_hartid_to_scratch(hartid);
+	if (!scratch || !rpmi_cppc_offset)
+		return NULL;
+
+	return sbi_scratch_offset_ptr(scratch, rpmi_cppc_offset);
+}
+
+static void rpmi_cppc_fc_db_trigger(struct rpmi_cppc *cppc)
+{
+	u8 db_val_u8 = 0;
+	u16 db_val_u16 = 0;
+	u32 db_val_u32 = 0;
+
+	switch (cppc->fc_db_width) {
+	case RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_8:
+		db_val_u8 = readb((void *)cppc->fc_db_addr);
+		db_val_u8 = (u8)cppc->fc_db_setmask |
+				(db_val_u8 & (u8)cppc->fc_db_preservemask);
+
+		writeb(db_val_u8, (void *)cppc->fc_db_addr);
+		break;
+	case RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_16:
+		db_val_u16 = readw((void *)cppc->fc_db_addr);
+		db_val_u16 = (u16)cppc->fc_db_setmask |
+				(db_val_u16 & (u16)cppc->fc_db_preservemask);
+
+		writew(db_val_u16, (void *)cppc->fc_db_addr);
+		break;
+	case RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_32:
+		db_val_u32 = readl((void *)cppc->fc_db_addr);
+		db_val_u32 = (u32)cppc->fc_db_setmask |
+				(db_val_u32 & (u32)cppc->fc_db_preservemask);
+
+		writel(db_val_u32, (void *)cppc->fc_db_addr);
+		break;
+	case RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_64:
+#if __riscv_xlen != 32
+		u64 db_val_u64 = 0;
+		db_val_u64 = readq((void *)cppc->fc_db_addr);
+		db_val_u64 = cppc->fc_db_setmask |
+				(db_val_u64 & cppc->fc_db_preservemask);
+
+		writeq(db_val_u64, (void *)cppc->fc_db_addr);
+#else
+		u32 db_val_u32_hi = 0;
+		db_val_u32 = readl((void *)cppc->fc_db_addr);
+		db_val_u32_hi = readl((void *)(cppc->fc_db_addr + 4));
+
+		db_val_u32 = (u32)cppc->fc_db_setmask |
+				(db_val_u32 & (u32)cppc->fc_db_preservemask);
+		db_val_u32_hi = (u32)(cppc->fc_db_setmask >> 32) |
+				(db_val_u32 & (u32)(cppc->fc_db_preservemask >> 32));
+
+		writel(db_val_u32, (void *)cppc->fc_db_addr);
+		writel(db_val_u32_hi, (void *)(cppc->fc_db_addr + 4));
+#endif
+		break;
+	default:
+		break;
+	}
+}
+
+static int rpmi_cppc_read(unsigned long reg, u64 *val)
+{
+	int rc = SBI_SUCCESS;
+	struct rpmi_cppc_read_reg_req req;
+	struct rpmi_cppc_read_reg_resp resp;
+	struct rpmi_cppc *cppc;
+
+	req.hart_id = current_hartid();
+	req.reg_id = reg;
+	cppc = rpmi_cppc_get_pointer(req.hart_id);
+
+	rc = rpmi_normal_request_with_status(
+			cppc->chan, RPMI_CPPC_SRV_READ_REG,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+#if __riscv_xlen == 32
+	*val = resp.data_lo;
+#else
+	*val = (u64)resp.data_hi << 32 | resp.data_lo;
+#endif
+	return rc;
+}
+
+static int rpmi_cppc_write(unsigned long reg, u64 val)
+{
+	int rc = SBI_SUCCESS;
+	u32 hart_id = current_hartid();
+	struct rpmi_cppc_write_reg_req req;
+	struct rpmi_cppc_write_reg_resp resp;
+	struct rpmi_cppc *cppc = rpmi_cppc_get_pointer(hart_id);
+
+	if (reg != SBI_CPPC_DESIRED_PERF || !cppc->fc_supported) {
+		req.hart_id = hart_id;
+		req.reg_id = reg;
+		req.data_lo = val & 0xFFFFFFFF;
+		req.data_hi = val >> 32;
+
+		rc = rpmi_normal_request_with_status(
+			cppc->chan, RPMI_CPPC_SRV_WRITE_REG,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	} else {
+		/* use fast path writes for desired_perf in passive mode */
+		writel((u32)val, (void *)cppc->fc_perf_request_addr);
+
+		if (cppc->fc_db_supported)
+			rpmi_cppc_fc_db_trigger(cppc);
+	}
+
+	return rc;
+}
+
+static int rpmi_cppc_probe(unsigned long reg)
+{
+	int rc;
+	struct rpmi_cppc *cppc;
+	struct rpmi_cppc_probe_resp resp;
+	struct rpmi_cppc_probe_req req;
+
+	req.hart_id = current_hartid();
+	req.reg_id = reg;
+
+	cppc = rpmi_cppc_get_pointer(req.hart_id);
+	if (!cppc)
+		return SBI_ENOSYS;
+
+	rc = rpmi_normal_request_with_status(
+			cppc->chan, RPMI_CPPC_SRV_PROBE_REG,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+	if (rc)
+		return rc;
+
+	return resp.reg_len;
+}
+
+static struct sbi_cppc_device sbi_rpmi_cppc = {
+	.name		= "rpmi-cppc",
+	.cppc_read	= rpmi_cppc_read,
+	.cppc_write	= rpmi_cppc_write,
+	.cppc_probe	= rpmi_cppc_probe,
+};
+
+static int rpmi_cppc_update_hart_scratch(struct mbox_chan *chan)
+{
+	int rc, i;
+	bool fc_supported = false;
+	bool fc_db_supported = false;
+	struct rpmi_cppc_hart_list_req req;
+	struct rpmi_cppc_hart_list_resp resp;
+	struct rpmi_cppc_get_fastchan_offset_req hfreq;
+	struct rpmi_cppc_get_fastchan_offset_resp hfresp;
+	struct rpmi_cppc_get_fastchan_region_resp fresp;
+	enum rpmi_cppc_fast_channel_db_width fc_db_width = 0;
+	enum rpmi_cppc_fast_channel_cppc_mode cppc_mode = 0;
+	struct rpmi_cppc *cppc;
+	unsigned long fc_region_addr = 0;
+	unsigned long fc_region_size = 0;
+	unsigned long fc_db_addr = 0;
+	u64 fc_db_setmask = 0;
+	u64 fc_db_preservemask = 0;
+
+	rc = rpmi_normal_request_with_status(
+		chan, RPMI_CPPC_SRV_GET_FAST_CHANNEL_REGION,
+		NULL, 0, 0,
+		&fresp, rpmi_u32_count(fresp), rpmi_u32_count(fresp));
+	if (rc && rc != SBI_ENOTSUPP)
+		return rc;
+
+	/* At this point fast channel availability is confirmed */
+	fc_supported = (rc != SBI_ENOTSUPP)? true : false;
+
+	/* If fast channel is supported, add the fast channel
+	 * region in root domain as MMIO RW. And, get the doorbell
+	 * information from the response */
+	if (fc_supported) {
+#if __riscv_xlen == 32
+		fc_region_addr = fresp.region_addr_lo;
+		fc_region_size = fresp.region_size_lo;
+		fc_db_addr = fresp.db_addr_lo;
+#else
+		fc_region_addr = (ulong)fresp.region_addr_hi << 32 |
+							fresp.region_addr_lo;
+		fc_region_size = (ulong)fresp.region_size_hi << 32 |
+							fresp.region_size_lo;
+		fc_db_addr = (ulong)fresp.db_addr_hi << 32 | fresp.db_addr_lo;
+
+#endif
+		rc = sbi_domain_root_add_memrange(fc_region_addr,
+					fc_region_size,
+					RPMI_CPPC_HART_FASTCHAN_SIZE,
+					(SBI_DOMAIN_MEMREGION_MMIO |
+					SBI_DOMAIN_MEMREGION_M_READABLE |
+					SBI_DOMAIN_MEMREGION_M_WRITABLE));
+		if (rc)
+			return rc;
+
+		cppc_mode = (fresp.flags & RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_MASK) >>
+					RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_POS;
+		fc_db_supported = fresp.flags &
+				RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_SUPPORTED;
+		fc_db_width = (fresp.flags &
+				RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_MASK) >>
+				RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_POS;
+		fc_db_setmask = (u64)fresp.db_setmask_hi << 32 |
+						fresp.db_setmask_lo;
+		fc_db_preservemask = (u64)fresp.db_preservemask_hi << 32 |
+						fresp.db_preservemask_lo;
+	}
+
+	/* Get the hart list and depending on the fast channel support
+	 * initialize the per hart cppc structure */
+	req.start_index = 0;
+	do {
+		rc = rpmi_normal_request_with_status(
+			chan, RPMI_CPPC_SRV_GET_HART_LIST,
+			&req, rpmi_u32_count(req), rpmi_u32_count(req),
+			&resp, rpmi_u32_count(resp), rpmi_u32_count(resp));
+		if (rc)
+			return rc;
+
+		/* For each returned harts, get their fastchan offset and
+		 * complete the initialization of per hart cppc structure */
+		for (i = 0; i < resp.returned; i++) {
+			cppc = rpmi_cppc_get_pointer(resp.hartid[i]);
+			if (!cppc)
+				return SBI_ENOSYS;
+
+			cppc->chan = chan;
+			cppc->mode = cppc_mode;
+			cppc->fc_supported = fc_supported;
+
+			if (fc_supported) {
+				hfreq.hart_id = resp.hartid[i];
+				rc = rpmi_normal_request_with_status(
+						chan,
+						RPMI_CPPC_SRV_GET_FAST_CHANNEL_OFFSET,
+						&hfreq,
+						rpmi_u32_count(hfreq),
+						rpmi_u32_count(hfreq),
+						&hfresp,
+						rpmi_u32_count(hfresp),
+						rpmi_u32_count(hfresp));
+				if (rc)
+					continue;
+
+#if __riscv_xlen == 32
+				cppc->fc_perf_request_addr = fc_region_addr +
+							hfresp.fc_perf_request_offset_lo;
+				cppc->fc_perf_feedback_addr = fc_region_addr +
+							hfresp.fc_perf_feedback_offset_lo;
+#else
+				cppc->fc_perf_request_addr = fc_region_addr +
+					((ulong)hfresp.fc_perf_request_offset_hi << 32 |
+					hfresp.fc_perf_request_offset_lo);
+
+				cppc->fc_perf_feedback_addr = fc_region_addr +
+					((ulong)hfresp.fc_perf_feedback_offset_hi << 32 |
+					hfresp.fc_perf_feedback_offset_lo);
+#endif
+				cppc->fc_db_supported = fc_db_supported;
+				cppc->fc_db_addr = fc_db_addr;
+				cppc->fc_db_width = fc_db_width;
+
+				cppc->fc_db_setmask = fc_db_setmask;
+				cppc->fc_db_preservemask = fc_db_preservemask;
+			}
+			else {
+				cppc->fc_perf_request_addr = 0;
+				cppc->fc_perf_feedback_addr = 0;
+				cppc->fc_db_supported = 0;
+				cppc->fc_db_addr = 0;
+				cppc->fc_db_width = 0;
+				cppc->fc_db_setmask = 0;
+				cppc->fc_db_preservemask = 0;
+			}
+		}
+		req.start_index += resp.returned;
+	} while (resp.remaining);
+
+	return 0;
+}
+
+static int rpmi_cppc_cold_init(const void *fdt, int nodeoff,
+			       const struct fdt_match *match)
+{
+	int rc;
+	struct mbox_chan *chan;
+
+	if (!rpmi_cppc_offset) {
+		rpmi_cppc_offset =
+			sbi_scratch_alloc_type_offset(struct rpmi_cppc);
+		if (!rpmi_cppc_offset)
+			return SBI_ENOMEM;
+	}
+
+	/*
+	 * If channel request failed then other end does not support
+	 * CPPC service group so do nothing.
+	 */
+	rc = fdt_mailbox_request_chan(fdt, nodeoff, 0, &chan);
+	if (rc)
+		return SBI_ENODEV;
+
+	/* Update per-HART scratch space */
+	rc = rpmi_cppc_update_hart_scratch(chan);
+	if (rc)
+		return rc;
+
+	sbi_cppc_set_device(&sbi_rpmi_cppc);
+
+	return 0;
+}
+
+static const struct fdt_match rpmi_cppc_match[] = {
+	{ .compatible = "riscv,rpmi-cppc" },
+	{},
+};
+
+struct fdt_driver fdt_cppc_rpmi = {
+	.match_table = rpmi_cppc_match,
+	.init = rpmi_cppc_cold_init,
+};
diff --git a/lib/utils/cppc/objects.mk b/lib/utils/cppc/objects.mk
index fb37478ada4..07dc7d89983 100644
--- a/lib/utils/cppc/objects.mk
+++ b/lib/utils/cppc/objects.mk
@@ -9,3 +9,6 @@
 
 libsbiutils-objs-$(CONFIG_FDT_CPPC) += cppc/fdt_cppc.o
 libsbiutils-objs-$(CONFIG_FDT_CPPC) += cppc/fdt_cppc_drivers.carray.o
+
+carray-fdt_cppc_drivers-$(CONFIG_FDT_CPPC_RPMI) += fdt_cppc_rpmi
+libsbiutils-objs-$(CONFIG_FDT_CPPC_RPMI) += cppc/fdt_cppc_rpmi.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index bd18c3c1184..384918f9461 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -7,6 +7,7 @@ CONFIG_PLATFORM_SOPHGO_SG2042=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_PLATFORM_THEAD=y
 CONFIG_FDT_CPPC=y
+CONFIG_FDT_CPPC_RPMI=y
 CONFIG_FDT_GPIO=y
 CONFIG_FDT_GPIO_DESIGNWARE=y
 CONFIG_FDT_GPIO_SIFIVE=y

From 7939bf1329eb551845dbfa3ee06d92d30de70662 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 8 Aug 2024 11:03:04 +0530
Subject: [PATCH 1758/1765] lib: sbi: Add SBI Message Proxy (MPXY) framework

Introduce SBI Message Proxy (MPXY) framework which allows platform specific
code or drivers to register message protocol specific channels.

This framework enables the supervisor software to send messages belonging
to different message protocols via OpenSBI firmware.

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Co-developed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Co-developed-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_ecall_interface.h |   2 +
 include/sbi/sbi_error.h           |  15 +-
 include/sbi/sbi_mpxy.h            | 183 ++++++++
 include/sbi/sbi_platform.h        |  17 +
 lib/sbi/objects.mk                |   1 +
 lib/sbi/sbi_init.c                |   6 +
 lib/sbi/sbi_mpxy.c                | 698 ++++++++++++++++++++++++++++++
 7 files changed, 915 insertions(+), 7 deletions(-)
 create mode 100644 include/sbi/sbi_mpxy.h
 create mode 100644 lib/sbi/sbi_mpxy.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index 29b18f5fd00..ee578bdd45c 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -443,6 +443,8 @@ enum sbi_sse_state {
 #define SBI_ERR_NO_SHMEM			-9
 #define SBI_ERR_INVALID_STATE			-10
 #define SBI_ERR_BAD_RANGE			-11
+#define SBI_ERR_TIMEOUT				-12
+#define SBI_ERR_IO				-13
 
 #define SBI_LAST_ERR				SBI_ERR_BAD_RANGE
 
diff --git a/include/sbi/sbi_error.h b/include/sbi/sbi_error.h
index fb78bf62237..b40b3319242 100644
--- a/include/sbi/sbi_error.h
+++ b/include/sbi/sbi_error.h
@@ -26,16 +26,17 @@
 #define SBI_ENO_SHMEM		SBI_ERR_NO_SHMEM
 #define SBI_EINVALID_STATE	SBI_ERR_INVALID_STATE
 #define SBI_EBAD_RANGE		SBI_ERR_BAD_RANGE
+#define SBI_ETIMEOUT		SBI_ERR_TIMEOUT
+#define SBI_ETIMEDOUT		SBI_ERR_TIMEOUT
+#define SBI_EIO			SBI_ERR_IO
 
 #define SBI_ENODEV		-1000
 #define SBI_ENOSYS		-1001
-#define SBI_ETIMEDOUT		-1002
-#define SBI_EIO			-1003
-#define SBI_EILL		-1004
-#define SBI_ENOSPC		-1005
-#define SBI_ENOMEM		-1006
-#define SBI_EUNKNOWN		-1007
-#define SBI_ENOENT		-1008
+#define SBI_EILL		-1002
+#define SBI_ENOSPC		-1003
+#define SBI_ENOMEM		-1004
+#define SBI_EUNKNOWN		-1005
+#define SBI_ENOENT		-1006
 
 /* clang-format on */
 
diff --git a/include/sbi/sbi_mpxy.h b/include/sbi/sbi_mpxy.h
new file mode 100644
index 00000000000..e30a17d132b
--- /dev/null
+++ b/include/sbi/sbi_mpxy.h
@@ -0,0 +1,183 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ */
+
+#ifndef __SBI_MPXY_H__
+#define __SBI_MPXY_H__
+
+#include <sbi/sbi_list.h>
+
+struct sbi_scratch;
+
+#define SBI_MPXY_MSGPROTO_VERSION(Major, Minor) ((Major << 16) | Minor)
+
+enum sbi_mpxy_attr_id {
+	/* Standard channel attributes managed by MPXY framework */
+	SBI_MPXY_ATTR_MSG_PROT_ID		= 0x00000000,
+	SBI_MPXY_ATTR_MSG_PROT_VER		= 0x00000001,
+	SBI_MPXY_ATTR_MSG_MAX_LEN		= 0x00000002,
+	SBI_MPXY_ATTR_MSG_SEND_TIMEOUT		= 0x00000003,
+	SBI_MPXY_ATTR_MSG_COMPLETION_TIMEOUT	= 0x00000004,
+	SBI_MPXY_ATTR_CHANNEL_CAPABILITY	= 0x00000005,
+	SBI_MPXY_ATTR_SSE_EVENT_ID		= 0x00000006,
+	SBI_MPXY_ATTR_MSI_CONTROL		= 0x00000007,
+	SBI_MPXY_ATTR_MSI_ADDR_LO		= 0x00000008,
+	SBI_MPXY_ATTR_MSI_ADDR_HI		= 0x00000009,
+	SBI_MPXY_ATTR_MSI_DATA			= 0x0000000A,
+	SBI_MPXY_ATTR_EVENTS_STATE_CONTROL	= 0x0000000B,
+	SBI_MPXY_ATTR_STD_ATTR_MAX_IDX,
+	/* Message protocol specific attributes, managed by
+	 * message protocol driver */
+	SBI_MPXY_ATTR_MSGPROTO_ATTR_START	= 0x80000000,
+	SBI_MPXY_ATTR_MSGPROTO_ATTR_END		= 0xffffffff
+};
+
+/**
+ * SBI MPXY Message Protocol IDs
+ */
+enum sbi_mpxy_msgproto_id {
+	SBI_MPXY_MSGPROTO_RPMI_ID = 0x00000000,
+	SBI_MPXY_MSGPROTO_MAX_IDX,
+	/** Vendor specific message protocol IDs */
+	SBI_MPXY_MSGPROTO_VENDOR_START	= 0x80000000,
+	SBI_MPXY_MSGPROTO_VENDOR_END	= 0xffffffff
+};
+
+enum SBI_EXT_MPXY_SHMEM_FLAGS {
+	SBI_EXT_MPXY_SHMEM_FLAG_OVERWRITE		= 0b00,
+	SBI_EXT_MPXY_SHMEM_FLAG_OVERWRITE_RETURN	= 0b01,
+	SBI_EXT_MPXY_SHMEM_FLAG_MAX_IDX
+};
+
+struct sbi_mpxy_msi_info {
+	/* MSI target address low 32-bit */
+	u32 msi_addr_lo;
+	/* MSI target address high 32-bit */
+	u32 msi_addr_hi;
+	/* MSI data */
+	u32 msi_data;
+};
+
+/**
+ * Channel attributes.
+ * NOTE: The sequence of attribute fields are as per the
+ * defined sequence in the attribute table in spec(or as
+ * per the enum sbi_mpxy_attr_id).
+ */
+struct sbi_mpxy_channel_attrs {
+	/* Message protocol ID */
+	u32 msg_proto_id;
+	/* Message protocol Version */
+	u32 msg_proto_version;
+	/* Message protocol maximum message data length(bytes) */
+	u32 msg_data_maxlen;
+	/* Message protocol message send timeout
+	 * in microseconds */
+	u32 msg_send_timeout;
+	/* Message protocol message response timeout in
+	 * microseconds. Its the aggregate of msg_send_timeout
+	 * and the timeout in receiving the response */
+	u32 msg_completion_timeout;
+	/* Bit array for channel capabilities */
+	u32 capability;
+	u32 sse_event_id;
+	u32 msi_control;
+	struct sbi_mpxy_msi_info msi_info;
+	/* Events State Control */
+	u32 eventsstate_ctrl;
+};
+
+/** A Message proxy channel accessible through SBI interface */
+struct sbi_mpxy_channel {
+	/** List head to a set of channels */
+	struct sbi_dlist head;
+	u32 channel_id;
+	struct sbi_mpxy_channel_attrs attrs;
+
+	/**
+	 * Read message protocol attributes
+	 * NOTE: inmem requires little-endian byte-ordering
+	 */
+	int (*read_attributes)(struct sbi_mpxy_channel *channel,
+				u32 *outmem,
+				u32 base_attr_id,
+				u32 attr_count);
+
+	/**
+	 * Write message protocol attributes
+	 * NOTE: outmem requires little-endian byte-ordering
+	 */
+	int (*write_attributes)(struct sbi_mpxy_channel *channel,
+				u32 *inmem,
+				u32 base_attr_id,
+				u32 attr_count);
+	/**
+	 * Send a message and wait for response
+	 * NOTE: msgbuf requires little-endian byte-ordering
+	 */
+	int (*send_message_with_response)(struct sbi_mpxy_channel *channel,
+			    u32 msg_id, void *msgbuf, u32 msg_len,
+			    void *respbuf, u32 resp_max_len,
+			    unsigned long *resp_len);
+
+	/** Send message without response */
+	int (*send_message_without_response)(struct sbi_mpxy_channel *channel,
+			    u32 msg_id, void *msgbuf, u32 msg_len);
+
+	/**
+	 * Get notifications events if supported on a channel
+	 * NOTE: eventsbuf requires little-endian byte-ordering
+	 */
+	int (*get_notification_events)(struct sbi_mpxy_channel *channel,
+					void *eventsbuf, u32 bufsize,
+					unsigned long *events_len);
+
+	/**
+	 * Callback to enable the events state reporting
+	 * in the message protocol implementation
+	 */
+	void (*switch_eventsstate)(u32 enable);
+};
+
+/** Register a Message proxy channel */
+int sbi_mpxy_register_channel(struct sbi_mpxy_channel *channel);
+
+/** Initialize Message proxy subsystem */
+int sbi_mpxy_init(struct sbi_scratch *scratch);
+
+/** Check if some Message proxy channel is available */
+bool sbi_mpxy_channel_available(void);
+
+/** Set Message proxy shared memory on the calling HART */
+int sbi_mpxy_set_shmem(unsigned long shmem_size,
+			unsigned long shmem_phys_lo,
+			unsigned long shmem_phys_hi,
+			unsigned long flags);
+
+/** Get channel IDs list */
+int sbi_mpxy_get_channel_ids(u32 start_index);
+
+/** Read MPXY channel attributes */
+int sbi_mpxy_read_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count);
+
+/** Write MPXY channel attributes */
+int sbi_mpxy_write_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count);
+
+/**
+ * Send a message over a MPXY channel.
+ * In case if response is not expected, resp_data_len will be NULL.
+ */
+int sbi_mpxy_send_message(u32 channel_id, u8 msg_id,
+					unsigned long msg_data_len,
+					unsigned long *resp_data_len);
+
+/** Get Message proxy notification events */
+int sbi_mpxy_get_notification_events(u32 channel_id,
+					unsigned long *events_len);
+
+#endif
diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h
index dc852a5c016..6d5fbc7d00a 100644
--- a/include/sbi/sbi_platform.h
+++ b/include/sbi/sbi_platform.h
@@ -126,6 +126,9 @@ struct sbi_platform_operations {
 	/** Initialize platform timer during cold boot */
 	int (*timer_init)(void);
 
+	/** Initialize the platform Message Proxy(MPXY) driver */
+	int (*mpxy_init)(void);
+
 	/** Check if SBI vendor extension is implemented or not */
 	bool (*vendor_ext_check)(void);
 	/** platform specific SBI extension implementation provider */
@@ -582,6 +585,20 @@ static inline int sbi_platform_timer_init(const struct sbi_platform *plat)
 	return 0;
 }
 
+/**
+ * Initialize the platform Message Proxy drivers
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return 0 on success and negative error code on failure
+ */
+static inline int sbi_platform_mpxy_init(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->mpxy_init)
+		return sbi_platform_ops(plat)->mpxy_init();
+	return 0;
+}
+
 /**
  * Check if SBI vendor extension is implemented or not.
  *
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index a6f7c5fa7b8..80b82f8e8c5 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -83,6 +83,7 @@ libsbi-objs-y += sbi_irqchip.o
 libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
 libsbi-objs-y += sbi_dbtr.o
+libsbi-objs-y += sbi_mpxy.o
 libsbi-objs-y += sbi_scratch.o
 libsbi-objs-y += sbi_sse.o
 libsbi-objs-y += sbi_string.o
diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c
index 8a2cfaef748..0736345dd9f 100644
--- a/lib/sbi/sbi_init.c
+++ b/lib/sbi/sbi_init.c
@@ -24,6 +24,7 @@
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_pmu.h>
 #include <sbi/sbi_dbtr.h>
+#include <sbi/sbi_mpxy.h>
 #include <sbi/sbi_sse.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_string.h>
@@ -311,6 +312,11 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
 		sbi_hart_hang();
 	}
 
+	rc = sbi_mpxy_init(scratch);
+	if (rc) {
+		sbi_printf("%s: mpxy init failed (error %d)\n", __func__, rc);
+		sbi_hart_hang();
+	}
 	/*
 	 * Note: Finalize domains after HSM initialization so that we
 	 * can startup non-root domains.
diff --git a/lib/sbi/sbi_mpxy.c b/lib/sbi/sbi_mpxy.c
new file mode 100644
index 00000000000..639478bf5c2
--- /dev/null
+++ b/lib/sbi/sbi_mpxy.c
@@ -0,0 +1,698 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_mpxy.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_byteorder.h>
+
+/** Offset of pointer to MPXY state in scratch space */
+static unsigned long mpxy_state_offset;
+
+/** List of MPXY proxy channels */
+static SBI_LIST_HEAD(mpxy_channel_list);
+
+/** Invalid Physical Address(all bits 1) */
+#define INVALID_ADDR		(-1U)
+
+/** MPXY Attribute size in bytes */
+#define ATTR_SIZE		(4)
+
+/** Channel Capability - MSI */
+#define CAP_MSI_POS		0
+#define CAP_MSI_MASK		(1U << CAP_MSI_POS)
+
+/** Channel Capability - SSE */
+#define CAP_SSE_POS		1
+#define CAP_SSE_MASK		(1U << CAP_SSE_POS)
+
+/** Channel Capability - Events State */
+#define CAP_EVENTSSTATE_POS	2
+#define CAP_EVENTSSTATE_MASK	(1U << CAP_EVENTSSTATE_POS)
+
+/** Channel Capability - Get Notification function support */
+#define CAP_GET_NOTIFICATIONS_POS	3
+#define CAP_GET_NOTIFICATIONS_MASK	(1U << CAP_GET_NOTIFICATIONS_POS)
+
+/** Channel Capability - Send Message Without Response function support */
+#define CAP_SEND_MSG_WITHOUT_RESP_POS	4
+#define CAP_SEND_MSG_WITHOUT_RESP_MASK	(1U << CAP_SEND_MSG_WITHOUT_RESP_POS)
+
+/** Channel Capability - Send Message With Response function support */
+#define CAP_SEND_MSG_WITH_RESP_POS	5
+#define CAP_SEND_MSG_WITH_RESP_MASK	(1U << CAP_SEND_MSG_WITH_RESP_POS)
+
+/** Helpers to enable/disable channel capability bits
+ * _c: capability variable
+ * _m: capability mask
+ */
+#define CAP_ENABLE(_c, _m)	INSERT_FIELD(_c, _m, 1)
+#define CAP_DISABLE(_c, _m)	INSERT_FIELD(_c, _m, 0)
+#define CAP_GET(_c, _m)		EXTRACT_FIELD(_c, _m)
+
+#if __riscv_xlen == 64
+#define SHMEM_PHYS_ADDR(_hi, _lo) (_lo)
+#elif __riscv_xlen == 32
+#define SHMEM_PHYS_ADDR(_hi, _lo) (((u64)(_hi) << 32) | (_lo))
+#else
+#error "Undefined XLEN"
+#endif
+
+/** Per hart shared memory */
+struct mpxy_shmem {
+	unsigned long shmem_size;
+	unsigned long shmem_addr_lo;
+	unsigned long shmem_addr_hi;
+};
+
+struct mpxy_state {
+	/* MSI support in MPXY */
+	bool msi_avail;
+	/* SSE support in MPXY */
+	bool sse_avail;
+	/* MPXY Shared memory details */
+	struct mpxy_shmem shmem;
+};
+
+/** Disable hart shared memory */
+static inline void sbi_mpxy_shmem_disable(struct mpxy_state *ms)
+{
+	ms->shmem.shmem_size = 0;
+	ms->shmem.shmem_addr_lo = INVALID_ADDR;
+	ms->shmem.shmem_addr_hi = INVALID_ADDR;
+}
+
+/** Check if shared memory is already setup on hart */
+static inline bool mpxy_shmem_enabled(struct mpxy_state *ms)
+{
+	return (ms->shmem.shmem_addr_lo == INVALID_ADDR
+		&& ms->shmem.shmem_addr_hi == INVALID_ADDR) ?
+		false : true;
+}
+
+/** Get hart shared memory base address */
+static inline void *hart_shmem_base(struct mpxy_state *ms)
+{
+	return (void *)(unsigned long)SHMEM_PHYS_ADDR(ms->shmem.shmem_addr_hi,
+						ms->shmem.shmem_addr_lo);
+}
+
+/** Make sure all attributes are packed for direct memcpy in ATTR_READ */
+#define assert_field_offset(field, attr_offset)				\
+	_Static_assert(							\
+		((offsetof(struct sbi_mpxy_channel_attrs, field)) /	\
+		 sizeof(u32)) == attr_offset,				\
+		"field " #field						\
+		" from struct sbi_mpxy_channel_attrs invalid offset, expected " #attr_offset)
+
+assert_field_offset(msg_proto_id, SBI_MPXY_ATTR_MSG_PROT_ID);
+assert_field_offset(msg_proto_version, SBI_MPXY_ATTR_MSG_PROT_VER);
+assert_field_offset(msg_data_maxlen, SBI_MPXY_ATTR_MSG_MAX_LEN);
+assert_field_offset(msg_send_timeout, SBI_MPXY_ATTR_MSG_SEND_TIMEOUT);
+assert_field_offset(msg_completion_timeout, SBI_MPXY_ATTR_MSG_COMPLETION_TIMEOUT);
+assert_field_offset(capability, SBI_MPXY_ATTR_CHANNEL_CAPABILITY);
+assert_field_offset(sse_event_id, SBI_MPXY_ATTR_SSE_EVENT_ID);
+assert_field_offset(msi_control, SBI_MPXY_ATTR_MSI_CONTROL);
+assert_field_offset(msi_info.msi_addr_lo, SBI_MPXY_ATTR_MSI_ADDR_LO);
+assert_field_offset(msi_info.msi_addr_hi, SBI_MPXY_ATTR_MSI_ADDR_HI);
+assert_field_offset(msi_info.msi_data, SBI_MPXY_ATTR_MSI_DATA);
+assert_field_offset(eventsstate_ctrl, SBI_MPXY_ATTR_EVENTS_STATE_CONTROL);
+
+/**
+ * Check if the attribute is a standard attribute or
+ * a message protocol specific attribute
+ * attr_id[31] = 0 for standard
+ * attr_id[31] = 1 for message protocol specific
+ */
+static inline bool mpxy_is_std_attr(u32 attr_id)
+{
+	return (attr_id >> 31) ? false : true;
+}
+
+/** Find channel_id in registered channels list */
+static struct sbi_mpxy_channel *mpxy_find_channel(u32 channel_id)
+{
+	struct sbi_mpxy_channel *channel;
+
+	sbi_list_for_each_entry(channel, &mpxy_channel_list, head)
+		if (channel->channel_id == channel_id)
+			return channel;
+
+	return NULL;
+}
+
+/** Copy attributes word size */
+static void mpxy_copy_std_attrs(u32 *outmem, u32 *inmem, u32 count)
+{
+	int idx;
+	for (idx = 0; idx < count; idx++)
+		outmem[idx] = cpu_to_le32(inmem[idx]);
+}
+
+/** Check if any channel is registered with mpxy framework */
+bool sbi_mpxy_channel_available(void)
+{
+	return sbi_list_empty(&mpxy_channel_list) ? false : true;
+}
+
+static void mpxy_std_attrs_init(struct sbi_mpxy_channel *channel)
+{
+	u32 capability = 0;
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	/* Reset values */
+	channel->attrs.msi_control = 0;
+	channel->attrs.msi_info.msi_data = 0;
+	channel->attrs.msi_info.msi_addr_lo = 0;
+	channel->attrs.msi_info.msi_addr_hi = 0;
+	channel->attrs.capability = 0;
+	channel->attrs.eventsstate_ctrl = 0;
+
+	if (channel->send_message_with_response)
+		capability = CAP_ENABLE(capability, CAP_SEND_MSG_WITH_RESP_MASK);
+
+	if (channel->send_message_without_response)
+		capability = CAP_ENABLE(capability, CAP_SEND_MSG_WITHOUT_RESP_MASK);
+
+	if (channel->get_notification_events) {
+		capability = CAP_ENABLE(capability, CAP_GET_NOTIFICATIONS_MASK);
+		/**
+		 * Check if MSI or SSE available for notification interrrupt.
+		 * Priority given to MSI if both MSI and SSE are avaialble.
+		 */
+		if (ms->msi_avail)
+			capability = CAP_ENABLE(capability, CAP_MSI_MASK);
+		else if (ms->sse_avail) {
+			capability = CAP_ENABLE(capability, CAP_SSE_MASK);
+			/* TODO: Assign SSE EVENT_ID for the channel */
+		}
+
+		/**
+		 * switch_eventstate callback support means support for events
+		 * state reporting supoprt. Enable events state reporting in
+		 * channel capability.
+		 */
+		if (channel->switch_eventsstate)
+			capability = CAP_ENABLE(capability, CAP_EVENTSSTATE_MASK);
+	}
+
+	channel->attrs.capability = capability;
+}
+
+/**
+ * Register a channel with MPXY framework.
+ * Called by message protocol drivers
+ */
+int sbi_mpxy_register_channel(struct sbi_mpxy_channel *channel)
+{
+	if (!channel)
+		return SBI_EINVAL;
+
+	if (mpxy_find_channel(channel->channel_id))
+		return SBI_EALREADY;
+
+	/* Initialize channel specific attributes */
+	mpxy_std_attrs_init(channel);
+
+	SBI_INIT_LIST_HEAD(&channel->head);
+	sbi_list_add_tail(&channel->head, &mpxy_channel_list);
+
+	return SBI_OK;
+}
+
+int sbi_mpxy_init(struct sbi_scratch *scratch)
+{
+	mpxy_state_offset = sbi_scratch_alloc_type_offset(struct mpxy_state);
+	if (!mpxy_state_offset)
+		return SBI_ENOMEM;
+
+	/**
+	 * TODO: Proper support for checking msi support from platform.
+	 * Currently disable msi and sse and use polling
+	 */
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+	ms->msi_avail = false;
+	ms->sse_avail = false;
+
+	sbi_mpxy_shmem_disable(ms);
+
+	return sbi_platform_mpxy_init(sbi_platform_ptr(scratch));
+}
+
+int sbi_mpxy_set_shmem(unsigned long shmem_size, unsigned long shmem_phys_lo,
+		       unsigned long shmem_phys_hi, unsigned long flags)
+{
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+	unsigned long *ret_buf;
+
+	/** Disable shared memory if both hi and lo have all bit 1s */
+	if (shmem_phys_lo == INVALID_ADDR &&
+	    shmem_phys_hi == INVALID_ADDR) {
+		sbi_mpxy_shmem_disable(ms);
+		return SBI_SUCCESS;
+	}
+
+	if (flags >= SBI_EXT_MPXY_SHMEM_FLAG_MAX_IDX)
+		return SBI_ERR_INVALID_PARAM;
+
+	/** Check shared memory size and address aligned to 4K Page */
+	if (!shmem_size || (shmem_size & ~PAGE_MASK) ||
+	    (shmem_phys_lo & ~PAGE_MASK))
+		return SBI_ERR_INVALID_PARAM;
+
+	if (!sbi_domain_check_addr_range(sbi_domain_thishart_ptr(),
+				SHMEM_PHYS_ADDR(shmem_phys_hi, shmem_phys_lo),
+				shmem_size, PRV_S,
+				SBI_DOMAIN_READ | SBI_DOMAIN_WRITE))
+		return SBI_ERR_INVALID_ADDRESS;
+
+	/** Save the current shmem details in new shmem region */
+	if (flags == SBI_EXT_MPXY_SHMEM_FLAG_OVERWRITE_RETURN) {
+		ret_buf = (unsigned long *)(ulong)SHMEM_PHYS_ADDR(shmem_phys_hi,
+								  shmem_phys_lo);
+		sbi_hart_map_saddr((unsigned long)ret_buf, shmem_size);
+		ret_buf[0] = cpu_to_lle(ms->shmem.shmem_size);
+		ret_buf[1] = cpu_to_lle(ms->shmem.shmem_addr_lo);
+		ret_buf[2] = cpu_to_lle(ms->shmem.shmem_addr_hi);
+		sbi_hart_unmap_saddr();
+	}
+
+	/** Setup the new shared memory */
+	ms->shmem.shmem_size	= shmem_size;
+	ms->shmem.shmem_addr_lo = shmem_phys_lo;
+	ms->shmem.shmem_addr_hi = shmem_phys_hi;
+
+	return SBI_SUCCESS;
+}
+
+int sbi_mpxy_get_channel_ids(u32 start_index)
+{
+	u32 node_index = 0, node_ret = 0;
+	u32 remaining, returned, max_channelids;
+	u32 channels_count = 0;
+	u32 *shmem_base;
+	struct sbi_mpxy_channel *channel;
+
+	/* Check if the shared memory is being setup or not. */
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	if (!mpxy_shmem_enabled(ms))
+		return SBI_ERR_NO_SHMEM;
+
+	sbi_list_for_each_entry(channel, &mpxy_channel_list, head)
+		channels_count += 1;
+
+	if (start_index > channels_count)
+		return SBI_ERR_INVALID_PARAM;
+
+	shmem_base = hart_shmem_base(ms);
+	sbi_hart_map_saddr((unsigned long)hart_shmem_base(ms),
+				ms->shmem.shmem_size);
+
+	/** number of channel ids which can be stored in shmem adjusting
+	 * for remaining and returned fields */
+	max_channelids = (ms->shmem.shmem_size / sizeof(u32)) - 2;
+	/* total remaining from the start index */
+	remaining = channels_count - start_index;
+	/* how many can be returned */
+	returned = (remaining > max_channelids)? max_channelids : remaining;
+
+	// Iterate over the list of channels to get the channel ids.
+	sbi_list_for_each_entry(channel, &mpxy_channel_list, head) {
+		if (node_index >= start_index &&
+			node_index < (start_index + returned)) {
+			shmem_base[2 + node_ret] = cpu_to_le32(channel->channel_id);
+			node_ret += 1;
+		}
+
+		node_index += 1;
+	}
+
+	/* final remaininig channel ids */
+	remaining = channels_count - (start_index + returned);
+
+	shmem_base[0] = cpu_to_le32(remaining);
+	shmem_base[1] = cpu_to_le32(returned);
+
+	sbi_hart_unmap_saddr();
+
+	return SBI_SUCCESS;
+}
+
+int sbi_mpxy_read_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count)
+{
+	int ret = SBI_SUCCESS;
+	u32 *attr_ptr, end_id;
+	void *shmem_base;
+
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	if (!mpxy_shmem_enabled(ms))
+		return SBI_ERR_NO_SHMEM;
+
+	struct sbi_mpxy_channel *channel = mpxy_find_channel(channel_id);
+	if (!channel)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	/* base attribute id is not a defined std attribute or reserved */
+	if (base_attr_id >= SBI_MPXY_ATTR_STD_ATTR_MAX_IDX &&
+		base_attr_id < SBI_MPXY_ATTR_MSGPROTO_ATTR_START)
+		return SBI_ERR_INVALID_PARAM;
+
+	/* Sanity check for base_attr_id and attr_count */
+	if (!attr_count || (attr_count > (ms->shmem.shmem_size / ATTR_SIZE)))
+		return SBI_ERR_INVALID_PARAM;
+
+	shmem_base = hart_shmem_base(ms);
+	end_id = base_attr_id + attr_count - 1;
+
+	sbi_hart_map_saddr((unsigned long)hart_shmem_base(ms),
+				ms->shmem.shmem_size);
+
+	/* Standard attributes range check */
+	if (mpxy_is_std_attr(base_attr_id)) {
+		if (end_id >= SBI_MPXY_ATTR_STD_ATTR_MAX_IDX) {
+			ret = SBI_EBAD_RANGE;
+			goto out;
+		}
+
+		attr_ptr = (u32 *)&channel->attrs;
+		mpxy_copy_std_attrs((u32 *)shmem_base, &attr_ptr[base_attr_id],
+				    attr_count);
+	} else {
+		/**
+		 * Even if the message protocol driver does not provide
+		 * read attribute callback, return bad range error instead
+		 * of not supported to let client distinguish it from channel
+		 * id not supported.
+		 * Check the complate range supported for message protocol
+		 * attributes. Actual supported attributes will be checked
+		 * by the message protocol driver.
+		 */
+		if (!channel->read_attributes ||
+				end_id > SBI_MPXY_ATTR_MSGPROTO_ATTR_END) {
+			ret = SBI_ERR_BAD_RANGE;
+			goto out;
+		}
+
+		/**
+		 * Function expected to return the SBI supported errors
+		 * At this point both base attribute id and only the mpxy
+		 * supported range been verified. Platform callback must
+		 * check if the range requested is supported by message
+		 * protocol driver */
+		ret = channel->read_attributes(channel,
+					       (u32 *)shmem_base,
+					       base_attr_id, attr_count);
+	}
+out:
+	sbi_hart_unmap_saddr();
+	return ret;
+}
+
+/**
+ * Verify the channel standard attribute wrt to write permission
+ * and the value to be set if valid or not.
+ * Only attributes needs to be checked which are defined Read/Write
+ * permission. Other with Readonly permission will result in error.
+ *
+ * Attributes values to be written must also be checked because
+ * before writing a range of attributes, we need to make sure that
+ * either complete range of attributes is written successfully or not
+ * at all.
+ */
+static int mpxy_check_write_std_attr(struct sbi_mpxy_channel *channel,
+				     u32 attr_id, u32 attr_val)
+{
+	int ret = SBI_SUCCESS;
+	struct sbi_mpxy_channel_attrs *attrs = &channel->attrs;
+
+	switch(attr_id) {
+	case SBI_MPXY_ATTR_MSI_CONTROL:
+		if (attr_val > 1)
+			ret = SBI_ERR_INVALID_PARAM;
+		if (attr_val == 1 &&
+		    (attrs->msi_info.msi_addr_lo == INVALID_ADDR) &&
+		    (attrs->msi_info.msi_addr_hi == INVALID_ADDR))
+			ret = SBI_ERR_DENIED;
+		break;
+	case SBI_MPXY_ATTR_MSI_ADDR_LO:
+	case SBI_MPXY_ATTR_MSI_ADDR_HI:
+	case SBI_MPXY_ATTR_MSI_DATA:
+		ret = SBI_SUCCESS;
+		break;
+	case SBI_MPXY_ATTR_EVENTS_STATE_CONTROL:
+		if (attr_val > 1)
+			ret = SBI_ERR_INVALID_PARAM;
+		break;
+	default:
+		/** All RO access attributes falls under default */
+		ret = SBI_ERR_BAD_RANGE;
+	};
+
+	return ret;
+}
+
+/**
+ * Write the attribute value
+ */
+static void mpxy_write_std_attr(struct sbi_mpxy_channel *channel, u32 attr_id,
+			        u32 attr_val)
+{
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	struct sbi_mpxy_channel_attrs *attrs = &channel->attrs;
+
+	switch(attr_id) {
+	case SBI_MPXY_ATTR_MSI_CONTROL:
+		if (ms->msi_avail && attr_val <= 1)
+			attrs->msi_control = attr_val;
+		break;
+	case SBI_MPXY_ATTR_MSI_ADDR_LO:
+		if (ms->msi_avail)
+			attrs->msi_info.msi_addr_lo = attr_val;
+		break;
+	case SBI_MPXY_ATTR_MSI_ADDR_HI:
+		if (ms->msi_avail)
+			attrs->msi_info.msi_addr_hi = attr_val;
+		break;
+	case SBI_MPXY_ATTR_MSI_DATA:
+		if (ms->msi_avail)
+			attrs->msi_info.msi_data = attr_val;
+		break;
+	case SBI_MPXY_ATTR_EVENTS_STATE_CONTROL:
+		if (channel->switch_eventsstate && attr_val <= 1) {
+			attrs->eventsstate_ctrl = attr_val;
+			 /* message protocol callback to enable/disable
+			 * events state reporting. */
+			channel->switch_eventsstate(attr_val);
+		}
+
+		break;
+	};
+}
+
+int sbi_mpxy_write_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count)
+{
+	int ret, mem_idx;
+	void *shmem_base;
+	u32 *mem_ptr, attr_id, end_id, attr_val;
+
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	if (!mpxy_shmem_enabled(ms))
+		return SBI_ERR_NO_SHMEM;
+
+	struct sbi_mpxy_channel *channel = mpxy_find_channel(channel_id);
+	if (!channel)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	/* base attribute id is not a defined std attribute or reserved */
+	if (base_attr_id >= SBI_MPXY_ATTR_STD_ATTR_MAX_IDX &&
+		base_attr_id < SBI_MPXY_ATTR_MSGPROTO_ATTR_START)
+		return SBI_ERR_INVALID_PARAM;
+
+	/* Sanity check for base_attr_id and attr_count */
+	if (!attr_count || (attr_count > (ms->shmem.shmem_size / ATTR_SIZE)))
+		return SBI_ERR_INVALID_PARAM;
+
+	shmem_base = hart_shmem_base(ms);
+	end_id = base_attr_id + attr_count - 1;
+
+	sbi_hart_map_saddr((unsigned long)shmem_base, ms->shmem.shmem_size);
+
+	mem_ptr = (u32 *)shmem_base;
+
+	if (mpxy_is_std_attr(base_attr_id)) {
+		if (end_id >= SBI_MPXY_ATTR_STD_ATTR_MAX_IDX) {
+			ret = SBI_ERR_BAD_RANGE;
+			goto out;
+		}
+
+		/** Verify the attribute ids range and values */
+		mem_idx = 0;
+		for (attr_id = base_attr_id; attr_id <= end_id; attr_id++) {
+			attr_val = le32_to_cpu(mem_ptr[mem_idx++]);
+			ret = mpxy_check_write_std_attr(channel,
+							attr_id, attr_val);
+			if (ret)
+				goto out;
+		}
+
+		/* Write the attribute ids values */
+		mem_idx = 0;
+		for (attr_id = base_attr_id; attr_id <= end_id; attr_id++) {
+			attr_val = le32_to_cpu(mem_ptr[mem_idx++]);
+			mpxy_write_std_attr(channel, attr_id, attr_val);
+		}
+	} else {/**
+		 * Message protocol specific attributes:
+		 * If attributes belong to message protocol, they
+		 * are simply passed to the message protocol driver
+		 * callback after checking the valid range.
+		 * Attributes contiguous range & permission & other checks
+		 * are done by the mpxy and message protocol glue layer.
+		 */
+		/**
+		 * Even if the message protocol driver does not provide
+		 * write attribute callback, return bad range error instead
+		 * of not supported to let client distinguish it from channel
+		 * id not supported.
+		 */
+		if (!channel->write_attributes ||
+				end_id > SBI_MPXY_ATTR_MSGPROTO_ATTR_END) {
+			ret = SBI_ERR_BAD_RANGE;
+			goto out;
+		}
+
+		/**
+		 * Function expected to return the SBI supported errors
+		 * At this point both base attribute id and only the mpxy
+		 * supported range been verified. Platform callback must
+		 * check if the range requested is supported by message
+		 * protocol driver */
+		ret = channel->write_attributes(channel,
+					       (u32 *)shmem_base,
+					       base_attr_id, attr_count);
+	}
+out:
+	sbi_hart_unmap_saddr();
+	return ret;
+}
+
+int sbi_mpxy_send_message(u32 channel_id, u8 msg_id,
+			  unsigned long msg_data_len,
+			  unsigned long *resp_data_len)
+{
+	int ret;
+	void *shmem_base, *resp_buf;
+	u32 resp_bufsize;
+
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	if (!mpxy_shmem_enabled(ms))
+		return SBI_ERR_NO_SHMEM;
+
+	struct sbi_mpxy_channel *channel = mpxy_find_channel(channel_id);
+	if (!channel)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	if (resp_data_len && !channel->send_message_with_response)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	if (!resp_data_len && !channel->send_message_without_response)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	if (msg_data_len > ms->shmem.shmem_size ||
+		msg_data_len > channel->attrs.msg_data_maxlen)
+		return SBI_ERR_INVALID_PARAM;
+
+	shmem_base = hart_shmem_base(ms);
+	sbi_hart_map_saddr((unsigned long)shmem_base, ms->shmem.shmem_size);
+
+	if (resp_data_len) {
+		resp_buf = shmem_base;
+		resp_bufsize = ms->shmem.shmem_size;
+		ret = channel->send_message_with_response(channel, msg_id,
+							  shmem_base,
+							  msg_data_len,
+							  resp_buf,
+							  resp_bufsize,
+							  resp_data_len);
+	}
+	else {
+		ret = channel->send_message_without_response(channel, msg_id,
+							     shmem_base,
+							     msg_data_len);
+	}
+
+	sbi_hart_unmap_saddr();
+
+	if (ret == SBI_ERR_TIMEOUT || ret == SBI_ERR_IO)
+		return ret;
+	else if (ret)
+		return SBI_ERR_FAILED;
+
+	if (resp_data_len &&
+	    (*resp_data_len > ms->shmem.shmem_size ||
+	     *resp_data_len > channel->attrs.msg_data_maxlen))
+		return SBI_ERR_FAILED;
+
+	return SBI_SUCCESS;
+}
+
+int sbi_mpxy_get_notification_events(u32 channel_id, unsigned long *events_len)
+{
+	int ret;
+	void *eventsbuf, *shmem_base;
+
+	struct mpxy_state *ms =
+		sbi_scratch_thishart_offset_ptr(mpxy_state_offset);
+
+	if (!mpxy_shmem_enabled(ms))
+		return SBI_ERR_NO_SHMEM;
+
+	struct sbi_mpxy_channel *channel = mpxy_find_channel(channel_id);
+	if (!channel)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	if (!channel->get_notification_events)
+		return SBI_ERR_NOT_SUPPORTED;
+
+	shmem_base = hart_shmem_base(ms);
+	sbi_hart_map_saddr((unsigned long)shmem_base, ms->shmem.shmem_size);
+	eventsbuf = shmem_base;
+	ret = channel->get_notification_events(channel, eventsbuf,
+					       ms->shmem.shmem_size,
+					       events_len);
+	sbi_hart_unmap_saddr();
+
+	if (ret)
+		return ret;
+
+	if (*events_len > ms->shmem.shmem_size)
+		return SBI_ERR_FAILED;
+
+	return SBI_SUCCESS;
+}

From e67d91cdcc1cba32b08d104821558d8211596e16 Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 8 Aug 2024 11:04:55 +0530
Subject: [PATCH 1759/1765] lib: sbi: Implement SBI MPXY extension

Implement the SBI MPXY extension which provides an SBI interface to
the supervisor software for send messages via MPXY framework.

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Co-developed-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi/sbi_ecall_interface.h | 10 +++++
 lib/sbi/Kconfig                   |  3 ++
 lib/sbi/objects.mk                |  3 ++
 lib/sbi/sbi_ecall_mpxy.c          | 68 +++++++++++++++++++++++++++++++
 4 files changed, 84 insertions(+)
 create mode 100644 lib/sbi/sbi_ecall_mpxy.c

diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h
index ee578bdd45c..9cacd3ac038 100644
--- a/include/sbi/sbi_ecall_interface.h
+++ b/include/sbi/sbi_ecall_interface.h
@@ -37,6 +37,7 @@
 #define SBI_EXT_DBTR				0x44425452
 #define SBI_EXT_SSE				0x535345
 #define SBI_EXT_FWFT				0x46574654
+#define SBI_EXT_MPXY				0x4D505859
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -421,6 +422,15 @@ enum sbi_sse_state {
 #define SBI_SSE_EVENT_GLOBAL_BIT		(1 << 15)
 #define SBI_SSE_EVENT_PLATFORM_BIT		(1 << 14)
 
+/* SBI function IDs for MPXY extension */
+#define SBI_EXT_MPXY_SET_SHMEM			0x0
+#define SBI_EXT_MPXY_GET_CHANNEL_IDS		0x1
+#define SBI_EXT_MPXY_READ_ATTRS			0x2
+#define SBI_EXT_MPXY_WRITE_ATTRS		0x3
+#define SBI_EXT_MPXY_SEND_MSG_WITH_RESP		0x4
+#define SBI_EXT_MPXY_SEND_MSG_NO_RESP		0x5
+#define SBI_EXT_MPXY_GET_NOTIFICATION_EVENTS	0x6
+
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
diff --git a/lib/sbi/Kconfig b/lib/sbi/Kconfig
index bd8ba2b6bf0..c6cc04bc041 100644
--- a/lib/sbi/Kconfig
+++ b/lib/sbi/Kconfig
@@ -66,4 +66,7 @@ config SBI_ECALL_SSE
 	bool "SSE extension"
 	default y
 
+config SBI_ECALL_MPXY
+	bool "MPXY extension"
+	default y
 endmenu
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 80b82f8e8c5..12e9e2bd626 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -61,6 +61,9 @@ libsbi-objs-$(CONFIG_SBI_ECALL_DBTR) += sbi_ecall_dbtr.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SSE) += ecall_sse
 libsbi-objs-$(CONFIG_SBI_ECALL_SSE) += sbi_ecall_sse.o
 
+carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_MPXY) += ecall_mpxy
+libsbi-objs-$(CONFIG_SBI_ECALL_MPXY) += sbi_ecall_mpxy.o
+
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
diff --git a/lib/sbi/sbi_ecall_mpxy.c b/lib/sbi/sbi_ecall_mpxy.c
new file mode 100644
index 00000000000..5f717b76bea
--- /dev/null
+++ b/lib/sbi/sbi_ecall_mpxy.c
@@ -0,0 +1,68 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi/sbi_ecall.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_mpxy.h>
+
+static int sbi_ecall_mpxy_handler(unsigned long extid, unsigned long funcid,
+				  struct sbi_trap_regs *regs,
+				  struct sbi_ecall_return *out)
+{
+	int ret = 0;
+
+	switch (funcid) {
+	case SBI_EXT_MPXY_SET_SHMEM:
+		ret = sbi_mpxy_set_shmem(regs->a0, regs->a1, regs->a2, regs->a3);
+		break;
+	case SBI_EXT_MPXY_GET_CHANNEL_IDS:
+		ret = sbi_mpxy_get_channel_ids(regs->a0);
+		break;
+	case SBI_EXT_MPXY_READ_ATTRS:
+		ret = sbi_mpxy_read_attrs(regs->a0, regs->a1, regs->a2);
+		break;
+	case SBI_EXT_MPXY_WRITE_ATTRS:
+		ret = sbi_mpxy_write_attrs(regs->a0, regs->a1, regs->a2);
+		break;
+	case SBI_EXT_MPXY_SEND_MSG_WITH_RESP:
+		ret = sbi_mpxy_send_message(regs->a0, regs->a1,
+					    regs->a2, &out->value);
+		break;
+	case SBI_EXT_MPXY_SEND_MSG_NO_RESP:
+		ret = sbi_mpxy_send_message(regs->a0, regs->a1, regs->a2,
+					    NULL);
+		break;
+	case SBI_EXT_MPXY_GET_NOTIFICATION_EVENTS:
+		ret = sbi_mpxy_get_notification_events(regs->a0, &out->value);
+		break;
+	default:
+		ret = SBI_ENOTSUPP;
+	}
+
+	return ret;
+}
+
+struct sbi_ecall_extension ecall_mpxy;
+
+static int sbi_ecall_mpxy_register_extensions(void)
+{
+	if (!sbi_mpxy_channel_available())
+		return 0;
+
+	return sbi_ecall_register_extension(&ecall_mpxy);
+}
+
+struct sbi_ecall_extension ecall_mpxy = {
+	.extid_start		= SBI_EXT_MPXY,
+	.extid_end		= SBI_EXT_MPXY,
+	.register_extensions	= sbi_ecall_mpxy_register_extensions,
+	.handle			= sbi_ecall_mpxy_handler,
+};

From 32577ec3a1eea116145089f9264e7f27582c396c Mon Sep 17 00:00:00 2001
From: Anup Patel <apatel@ventanamicro.com>
Date: Thu, 8 Aug 2024 11:11:10 +0530
Subject: [PATCH 1760/1765] lib: utils: Add simple FDT based MPXY driver
 framework

The generic platform can have multiple MPXY drivers so add a simple
FDT based MPXY driver framework.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mpxy/fdt_mpxy.h      | 26 ++++++++++++++++++++++++++
 lib/utils/Kconfig                      |  2 ++
 lib/utils/mpxy/Kconfig                 | 10 ++++++++++
 lib/utils/mpxy/fdt_mpxy.c              | 22 ++++++++++++++++++++++
 lib/utils/mpxy/fdt_mpxy_drivers.carray |  3 +++
 lib/utils/mpxy/objects.mk              | 11 +++++++++++
 platform/generic/configs/defconfig     |  1 +
 platform/generic/platform.c            | 10 ++++++++++
 8 files changed, 85 insertions(+)
 create mode 100644 include/sbi_utils/mpxy/fdt_mpxy.h
 create mode 100644 lib/utils/mpxy/Kconfig
 create mode 100644 lib/utils/mpxy/fdt_mpxy.c
 create mode 100644 lib/utils/mpxy/fdt_mpxy_drivers.carray
 create mode 100644 lib/utils/mpxy/objects.mk

diff --git a/include/sbi_utils/mpxy/fdt_mpxy.h b/include/sbi_utils/mpxy/fdt_mpxy.h
new file mode 100644
index 00000000000..2ba9d28f7ad
--- /dev/null
+++ b/include/sbi_utils/mpxy/fdt_mpxy.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#ifndef __FDT_MPXY_H__
+#define __FDT_MPXY_H__
+
+#include <sbi/sbi_types.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+
+#ifdef CONFIG_FDT_MPXY
+
+void fdt_mpxy_init(const void *fdt);
+
+#else
+
+static inline void fdt_mpxy_init(const void *fdt) { }
+
+#endif
+
+#endif
diff --git a/lib/utils/Kconfig b/lib/utils/Kconfig
index 002d6f8f9ca..901ba564610 100644
--- a/lib/utils/Kconfig
+++ b/lib/utils/Kconfig
@@ -32,4 +32,6 @@ source "$(OPENSBI_SRC_DIR)/lib/utils/sys/Kconfig"
 
 source "$(OPENSBI_SRC_DIR)/lib/utils/timer/Kconfig"
 
+source "$(OPENSBI_SRC_DIR)/lib/utils/mpxy/Kconfig"
+
 endmenu
diff --git a/lib/utils/mpxy/Kconfig b/lib/utils/mpxy/Kconfig
new file mode 100644
index 00000000000..d084b09a810
--- /dev/null
+++ b/lib/utils/mpxy/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+menu "MPXY Device Support"
+
+config FDT_MPXY
+	bool "FDT based MPXY drivers"
+	depends on FDT
+	default n
+
+endmenu
diff --git a/lib/utils/mpxy/fdt_mpxy.c b/lib/utils/mpxy/fdt_mpxy.c
new file mode 100644
index 00000000000..6984ec748d5
--- /dev/null
+++ b/lib/utils/mpxy/fdt_mpxy.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <sbi_utils/mpxy/fdt_mpxy.h>
+
+/* List of FDT MPXY drivers generated at compile time */
+extern const struct fdt_driver *const fdt_mpxy_drivers[];
+
+void fdt_mpxy_init(const void *fdt)
+{
+	/*
+	 * Platforms might have multiple MPXY devices or might not
+	 * have any MPXY devices so don't fail.
+	 */
+	fdt_driver_init_all(fdt, fdt_mpxy_drivers);
+}
diff --git a/lib/utils/mpxy/fdt_mpxy_drivers.carray b/lib/utils/mpxy/fdt_mpxy_drivers.carray
new file mode 100644
index 00000000000..3cac01553e6
--- /dev/null
+++ b/lib/utils/mpxy/fdt_mpxy_drivers.carray
@@ -0,0 +1,3 @@
+HEADER: sbi_utils/mpxy/fdt_mpxy.h
+TYPE: const struct fdt_driver
+NAME: fdt_mpxy_drivers
diff --git a/lib/utils/mpxy/objects.mk b/lib/utils/mpxy/objects.mk
new file mode 100644
index 00000000000..43e73c94f07
--- /dev/null
+++ b/lib/utils/mpxy/objects.mk
@@ -0,0 +1,11 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2024 Ventana Micro Systems Inc.
+#
+# Authors:
+#   Anup Patel <apatel@ventanamicro.com>
+#
+
+libsbiutils-objs-$(CONFIG_FDT_MPXY) += mpxy/fdt_mpxy.o
+libsbiutils-objs-$(CONFIG_FDT_MPXY) += mpxy/fdt_mpxy_drivers.carray.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 384918f9461..1f0880ee60e 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -53,3 +53,4 @@ CONFIG_FDT_SUSPEND_RPMI=y
 CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
 CONFIG_FDT_TIMER_PLMT=y
+CONFIG_FDT_MPXY=y
diff --git a/platform/generic/platform.c b/platform/generic/platform.c
index 34973a94bb5..350d2517ec0 100644
--- a/platform/generic/platform.c
+++ b/platform/generic/platform.c
@@ -17,6 +17,7 @@
 #include <sbi/sbi_string.h>
 #include <sbi/sbi_system.h>
 #include <sbi/sbi_tlb.h>
+#include <sbi_utils/mpxy/fdt_mpxy.h>
 #include <sbi_utils/cppc/fdt_cppc.h>
 #include <sbi_utils/fdt/fdt_domain.h>
 #include <sbi_utils/fdt/fdt_fixup.h>
@@ -415,6 +416,14 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
 	return evt_val;
 }
 
+static int generic_mpxy_init(void)
+{
+	const void *fdt = fdt_get_address();
+
+	fdt_mpxy_init(fdt);
+	return 0;
+}
+
 const struct sbi_platform_operations platform_ops = {
 	.cold_boot_allowed	= generic_cold_boot_allowed,
 	.nascent_init		= generic_nascent_init,
@@ -431,6 +440,7 @@ const struct sbi_platform_operations platform_ops = {
 	.get_tlbr_flush_limit	= generic_tlbr_flush_limit,
 	.get_tlb_num_entries	= generic_tlb_num_entries,
 	.timer_init		= fdt_timer_init,
+	.mpxy_init		= generic_mpxy_init,
 	.vendor_ext_check	= generic_vendor_ext_check,
 	.vendor_ext_provider	= generic_vendor_ext_provider,
 };

From c5a8b15e398ad09e08a2be11d1f27c0fb6ba6328 Mon Sep 17 00:00:00 2001
From: Rahul Pathak <rpathak@ventanamicro.com>
Date: Thu, 8 Aug 2024 11:15:53 +0530
Subject: [PATCH 1761/1765] lib: utils/mpxy: Add RPMI client driver for MPXY

Add a generic RPMI mailbox client driver which provides a MPXY channel.
Initially, this driver only supports RPMI clock service group but can
be extended to support multiple RPMI service groups.

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Co-developed-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/sbi_utils/mailbox/rpmi_msgprot.h |  93 +++++
 lib/utils/mpxy/Kconfig                   |   9 +
 lib/utils/mpxy/fdt_mpxy_rpmi_mbox.c      | 442 +++++++++++++++++++++++
 lib/utils/mpxy/objects.mk                |   3 +
 platform/generic/configs/defconfig       |   1 +
 5 files changed, 548 insertions(+)
 create mode 100644 lib/utils/mpxy/fdt_mpxy_rpmi_mbox.c

diff --git a/include/sbi_utils/mailbox/rpmi_msgprot.h b/include/sbi_utils/mailbox/rpmi_msgprot.h
index f7c803607a4..9575dc7238b 100644
--- a/include/sbi_utils/mailbox/rpmi_msgprot.h
+++ b/include/sbi_utils/mailbox/rpmi_msgprot.h
@@ -201,6 +201,7 @@ enum rpmi_servicegroup_id {
 	RPMI_SRVGRP_SYSTEM_SUSPEND = 0x0003,
 	RPMI_SRVGRP_HSM = 0x0004,
 	RPMI_SRVGRP_CPPC = 0x0005,
+	RPMI_SRVGRP_CLOCK = 0x0007,
 	RPMI_SRVGRP_ID_MAX_COUNT,
 
 	/* Reserved range for service groups */
@@ -511,4 +512,96 @@ struct rpmi_cppc_hart_list_resp {
 	u32 hartid[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
 };
 
+/** RPMI Clock ServiceGroup Service IDs */
+enum rpmi_clock_service_id {
+	RPMI_CLOCK_SRV_ENABLE_NOTIFICATION = 0x01,
+	RPMI_CLOCK_SRV_GET_NUM_CLOCKS = 0x02,
+	RPMI_CLOCK_SRV_GET_ATTRIBUTES = 0x03,
+	RPMI_CLOCK_SRV_GET_SUPPORTED_RATES = 0x04,
+	RPMI_CLOCK_SRV_SET_CONFIG = 0x05,
+	RPMI_CLOCK_SRV_GET_CONFIG = 0x06,
+	RPMI_CLOCK_SRV_SET_RATE = 0x07,
+	RPMI_CLOCK_SRV_GET_RATE = 0x08,
+	RPMI_CLOCK_SRV_MAX_COUNT,
+};
+
+struct rpmi_clock_get_num_clocks_resp {
+	s32 status;
+	u32 num_clocks;
+};
+
+struct rpmi_clock_get_attributes_req {
+	u32 clock_id;
+};
+
+struct rpmi_clock_get_attributes_resp {
+	s32 status;
+#define RPMI_CLOCK_FLAGS_FORMAT_POS		30
+#define RPMI_CLOCK_FLAGS_FORMAT_MASK		\
+			(3U << RPMI_CLOCK_FLAGS_CLOCK_FORMAT_POS)
+#define RPMI_CLOCK_FLAGS_FORMAT_DISCRETE	0
+#define RPMI_CLOCK_FLAGS_FORMAT_LINEAR		1
+	u32 flags;
+	u32 num_rates;
+	u32 transition_latency;
+	u8 name[16];
+};
+
+struct rpmi_clock_get_supported_rates_req {
+	u32 clock_id;
+	u32 clock_rate_index;
+};
+
+struct rpmi_clock_get_supported_rates_resp {
+	s32 status;
+	u32 flags;
+	u32 remaining;
+	u32 returned;
+	u32 clock_rate[0];
+};
+
+struct rpmi_clock_set_config_req {
+	u32 clock_id;
+#define RPMI_CLOCK_CONFIG_ENABLE		(1U << 0)
+	u32 config;
+};
+
+struct rpmi_clock_set_config_resp {
+	s32 status;
+};
+
+struct rpmi_clock_get_config_req {
+	u32 clock_id;
+};
+
+struct rpmi_clock_get_config_resp {
+	s32 status;
+	u32 config;
+};
+
+struct rpmi_clock_set_rate_req {
+	u32 clock_id;
+#define RPMI_CLOCK_SET_RATE_FLAGS_MASK		(3U << 0)
+#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_DOWN	0
+#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_UP	1
+#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_PLAT	2
+	u32 flags;
+	u32 clock_rate_low;
+	u32 clock_rate_high;
+};
+
+struct rpmi_clock_set_rate_resp {
+	s32 status;
+};
+
+struct rpmi_clock_get_rate_req {
+	u32 clock_id;
+};
+
+struct rpmi_clock_get_rate_resp {
+	s32 status;
+	u32 clock_rate_low;
+	u32 clock_rate_high;
+};
+
 #endif /* !__RPMI_MSGPROT_H__ */
diff --git a/lib/utils/mpxy/Kconfig b/lib/utils/mpxy/Kconfig
index d084b09a810..131fb91a3f4 100644
--- a/lib/utils/mpxy/Kconfig
+++ b/lib/utils/mpxy/Kconfig
@@ -7,4 +7,13 @@ config FDT_MPXY
 	depends on FDT
 	default n
 
+if FDT_MPXY
+
+config FDT_MPXY_RPMI_MBOX
+	bool "FDT MPXY mailbox client driver"
+	depends on FDT_MAILBOX
+	default n
+
+endif
+
 endmenu
diff --git a/lib/utils/mpxy/fdt_mpxy_rpmi_mbox.c b/lib/utils/mpxy/fdt_mpxy_rpmi_mbox.c
new file mode 100644
index 00000000000..c09a4c5288b
--- /dev/null
+++ b/lib/utils/mpxy/fdt_mpxy_rpmi_mbox.c
@@ -0,0 +1,442 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 Ventana Micro Systems Inc.
+ *
+ * Authors:
+ *   Rahul Pathak <rpathak@ventanamicro.com>
+ *   Anup Patel <apatel@ventanamicro.com>
+ */
+
+#include <libfdt.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_heap.h>
+#include <sbi/sbi_mpxy.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/mpxy/fdt_mpxy.h>
+#include <sbi_utils/mailbox/fdt_mailbox.h>
+#include <sbi_utils/mailbox/rpmi_msgprot.h>
+#include <sbi/sbi_console.h>
+
+#define RPMI_MAJOR_VER		(1)
+#define RPMI_MINOR_VER		(0)
+
+/** Convert the mpxy attribute ID to attribute array index */
+#define attr_id2index(attr_id)	(attr_id - SBI_MPXY_ATTR_MSGPROTO_ATTR_START)
+
+enum mpxy_msgprot_rpmi_attr_id {
+	MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_ID = SBI_MPXY_ATTR_MSGPROTO_ATTR_START,
+	MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_VERSION,
+	MPXY_MSGPROT_RPMI_ATTR_MAX_ID,
+};
+
+/**
+ * MPXY message protocol attributes for RPMI
+ * Order of attribute fields must follow the
+ * attribute IDs in `enum mpxy_msgprot_rpmi_attr_id`
+ */
+struct mpxy_rpmi_channel_attrs {
+	u32 servicegrp_id;
+	u32 servicegrp_ver;
+};
+
+/* RPMI mbox data per service group */
+struct mpxy_mbox_data {
+	u32 servicegrp_id;
+	u32 num_services;
+	u32 notifications_support;
+	void *priv_data;
+};
+
+/* RPMI service data per service group */
+struct rpmi_service_data {
+	u8 id;
+	u32 min_tx_len;
+	u32 max_tx_len;
+	u32 min_rx_len;
+	u32 max_rx_len;
+};
+
+/**
+ * MPXY mbox instance per MPXY channel. This ties
+ * an MPXY channel with an RPMI Service group.
+ */
+struct mpxy_mbox {
+	struct mbox_chan *chan;
+	struct mpxy_mbox_data *mbox_data;
+	struct mpxy_rpmi_channel_attrs msgprot_attrs;
+	struct sbi_mpxy_channel channel;
+};
+
+/** Make sure all attributes are packed for direct memcpy */
+#define assert_field_offset(field, attr_offset)				\
+	_Static_assert(							\
+		((offsetof(struct mpxy_rpmi_channel_attrs, field)) /	\
+		 sizeof(u32)) == (attr_offset - SBI_MPXY_ATTR_MSGPROTO_ATTR_START),\
+		"field " #field						\
+		" from struct mpxy_rpmi_channel_attrs invalid offset, expected " #attr_offset)
+
+assert_field_offset(servicegrp_id, MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_ID);
+
+/**
+ * Discover the RPMI service data using message_id
+ * MPXY message_id == RPMI service_id
+ */
+static struct rpmi_service_data *mpxy_find_rpmi_srvid(u32 message_id,
+					struct mpxy_mbox_data *mbox_data)
+{
+	int mid = 0;
+	struct rpmi_service_data *srv = mbox_data->priv_data;
+	for (mid = 0; srv[mid].id < mbox_data->num_services; mid++) {
+		if (srv[mid].id == (u8)message_id)
+			return &srv[mid];
+	}
+
+	return NULL;
+}
+
+/** Copy attributes word size */
+static void mpxy_copy_attrs(u32 *outmem, u32 *inmem, u32 count)
+{
+	u32 idx;
+	for (idx = 0; idx < count; idx++)
+		outmem[idx] = cpu_to_le32(inmem[idx]);
+}
+
+static int mpxy_mbox_read_attributes(struct sbi_mpxy_channel *channel,
+				     u32 *outmem, u32 base_attr_id,
+				     u32 attr_count)
+{
+	u32 end_id;
+	struct mpxy_mbox *rmb =
+		container_of(channel, struct mpxy_mbox, channel);
+
+	u32 *attr_array = (u32 *)&rmb->msgprot_attrs;
+
+	end_id = base_attr_id + attr_count - 1;
+
+	if (end_id >= MPXY_MSGPROT_RPMI_ATTR_MAX_ID)
+		return SBI_EBAD_RANGE;
+
+	mpxy_copy_attrs(outmem, &attr_array[attr_id2index(base_attr_id)],
+			attr_count);
+
+	return SBI_OK;
+}
+
+/**
+ * Verify the channel standard attribute wrt to write permission
+ * and the value to be set if valid or not.
+ * Only attributes needs to be checked which are defined Read/Write
+ * permission. Other with Readonly permission will result in error.
+ *
+ * Attributes values to be written must also be checked because
+ * before writing a range of attributes, we need to make sure that
+ * either complete range of attributes is written successfully or not
+ * at all.
+ */
+static int mpxy_check_write_attr(u32 attr_id, u32 attr_val)
+{
+	int ret = SBI_OK;
+
+	switch(attr_id) {
+	/** All RO access attributes falls under default */
+	default:
+		ret = SBI_EBAD_RANGE;
+	};
+
+	return ret;
+}
+
+static void mpxy_write_attr(struct mpxy_rpmi_channel_attrs *attrs,
+			   u32 attr_id,
+			   u32 attr_val)
+{
+	/* No writable attributes in RPMI */
+}
+
+static int mpxy_mbox_write_attributes(struct sbi_mpxy_channel *channel,
+				     u32 *outmem, u32 base_attr_id,
+				     u32 attr_count)
+{
+	int ret, mem_idx;
+	u32 end_id, attr_val, idx;
+	struct mpxy_mbox *rmb =
+		container_of(channel, struct mpxy_mbox, channel);
+
+	end_id = base_attr_id + attr_count - 1;
+
+	if (end_id >= MPXY_MSGPROT_RPMI_ATTR_MAX_ID)
+		return SBI_EBAD_RANGE;
+
+	mem_idx = 0;
+	for (idx = base_attr_id; idx <= end_id; idx++) {
+		attr_val = le32_to_cpu(outmem[mem_idx++]);
+		ret = mpxy_check_write_attr(idx, attr_val);
+		if (ret)
+			return ret;
+	}
+
+	mem_idx = 0;
+	for (idx = base_attr_id; idx <= end_id; idx++) {
+		attr_val = le32_to_cpu(outmem[mem_idx++]);
+		mpxy_write_attr(&rmb->msgprot_attrs, idx, attr_val);
+	}
+
+	return SBI_OK;
+}
+
+static int __mpxy_mbox_send_message(struct sbi_mpxy_channel *channel,
+				  u32 message_id, void *tx, u32 tx_len,
+				  void *rx, u32 rx_max_len,
+				  unsigned long *ack_len)
+{
+	int ret;
+	u32 rx_len = 0;
+	struct mbox_xfer xfer;
+	struct rpmi_message_args args = {0};
+	struct mpxy_mbox *rmb =
+		container_of(channel, struct mpxy_mbox, channel);
+	struct rpmi_service_data *srv =
+			mpxy_find_rpmi_srvid(message_id, rmb->mbox_data);
+	if (!srv)
+		return SBI_ENOTSUPP;
+
+	/** message data size to be sent is in the
+	 * supported service data size range */
+	if (tx_len < srv->min_tx_len || tx_len > srv->max_tx_len)
+		return SBI_EFAIL;
+
+	if (ack_len) {
+		/** MPXY buffer cannnot hold service min response data */
+		if (rx_max_len < srv->min_rx_len)
+			return SBI_EFAIL;
+
+		/* Max rx data size it can expect */
+		if (srv->max_rx_len < channel->attrs.msg_data_maxlen)
+			rx_len = srv->max_rx_len;
+		else
+			rx_len = channel->attrs.msg_data_maxlen;
+
+		args.type = RPMI_MSG_NORMAL_REQUEST;
+		args.flags = (rx) ? 0 : RPMI_MSG_FLAGS_NO_RX;
+		args.service_id = srv->id;
+		mbox_xfer_init_txrx(&xfer, &args,
+				    tx, tx_len, RPMI_DEF_TX_TIMEOUT,
+				    rx, rx_len, RPMI_DEF_RX_TIMEOUT);
+	}
+	else {
+		args.type = RPMI_MSG_POSTED_REQUEST;
+		args.flags = RPMI_MSG_FLAGS_NO_RX;
+		args.service_id = srv->id;
+		mbox_xfer_init_tx(&xfer, &args,
+				  tx, tx_len, RPMI_DEF_TX_TIMEOUT);
+	}
+
+	ret = mbox_chan_xfer(rmb->chan, &xfer);
+	if (ret)
+		return ret;
+
+	if (ack_len)
+		*ack_len = args.rx_data_len;
+
+	return SBI_OK;
+}
+
+static int mpxy_mbox_send_message_withresp(struct sbi_mpxy_channel *channel,
+				  u32 message_id, void *tx, u32 tx_len,
+				  void *rx, u32 rx_max_len,
+				  unsigned long *ack_len)
+{
+	return __mpxy_mbox_send_message(channel, message_id, tx, tx_len,
+				 rx, rx_max_len, ack_len);
+}
+
+static int mpxy_mbox_send_message_withoutresp(struct sbi_mpxy_channel *channel,
+				  u32 message_id, void *tx, u32 tx_len)
+{
+	return __mpxy_mbox_send_message(channel, message_id, tx, tx_len,
+				 NULL, 0, NULL);
+}
+
+static int mpxy_mbox_get_notifications(struct sbi_mpxy_channel *channel,
+				       void *eventsbuf, u32 bufsize,
+				       unsigned long *events_len)
+{
+	return SBI_ENOTSUPP;
+}
+
+static int mpxy_mbox_init(const void *fdt, int nodeoff,
+			  const struct fdt_match *match)
+{
+	int rc, len;
+	const fdt32_t *val;
+	u32 channel_id;
+	struct mpxy_mbox *rmb;
+	struct mbox_chan *chan;
+	const struct mpxy_mbox_data *data = match->data;
+
+	/* Allocate context for RPXY mbox client */
+	rmb = sbi_zalloc(sizeof(*rmb));
+	if (!rmb)
+		return SBI_ENOMEM;
+
+	/*
+	 * If channel request failed then other end does not support
+	 * service group so do nothing.
+	 */
+	rc = fdt_mailbox_request_chan(fdt, nodeoff, 0, &chan);
+	if (rc) {
+		sbi_free(rmb);
+		return SBI_ENODEV;
+	}
+
+	/* Match channel service group id */
+	if (data->servicegrp_id != chan->chan_args[0]) {
+		mbox_controller_free_chan(chan);
+		sbi_free(rmb);
+		return SBI_EINVAL;
+	}
+
+	/*
+	 * The "riscv,sbi-mpxy-channel-id" DT property is mandatory
+	 * for MPXY RPMI mailbox client driver so if this is not
+	 * present then try other drivers.
+	 */
+	val = fdt_getprop(fdt, nodeoff, "riscv,sbi-mpxy-channel-id", &len);
+	if (len > 0 && val)
+		channel_id = fdt32_to_cpu(*val);
+	else {
+		mbox_controller_free_chan(chan);
+		sbi_free(rmb);
+		return SBI_ENODEV;
+	}
+
+	/* Setup MPXY mbox client */
+	/* Channel ID*/
+	rmb->channel.channel_id = channel_id;
+	/* Callback for read RPMI attributes */
+	rmb->channel.read_attributes = mpxy_mbox_read_attributes;
+	/* Callback for write RPMI attributes */
+	rmb->channel.write_attributes = mpxy_mbox_write_attributes;
+	/* Callback for sending RPMI message */
+	rmb->channel.send_message_with_response =
+					mpxy_mbox_send_message_withresp;
+	rmb->channel.send_message_without_response =
+					mpxy_mbox_send_message_withoutresp;
+	/* Callback to get RPMI notifications */
+	rmb->channel.get_notification_events = mpxy_mbox_get_notifications;
+
+	/* No callback to switch events state data */
+	rmb->channel.switch_eventsstate = NULL;
+
+	/* RPMI Message Protocol ID */
+	rmb->channel.attrs.msg_proto_id = SBI_MPXY_MSGPROTO_RPMI_ID;
+	/* RPMI Message Protocol Version */
+	rmb->channel.attrs.msg_proto_version =
+		SBI_MPXY_MSGPROTO_VERSION(RPMI_MAJOR_VER, RPMI_MINOR_VER);
+
+	/* RPMI supported max message data length(bytes), same for
+	 * all service groups */
+	rmb->channel.attrs.msg_data_maxlen =
+					RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN);
+	/* RPMI message send timeout(milliseconds)
+	 * same for all service groups */
+	rmb->channel.attrs.msg_send_timeout = RPMI_DEF_TX_TIMEOUT;
+	rmb->channel.attrs.msg_completion_timeout =
+				RPMI_DEF_TX_TIMEOUT + RPMI_DEF_RX_TIMEOUT;
+
+	/* RPMI message protocol attributes */
+	rmb->msgprot_attrs.servicegrp_id = data->servicegrp_id;
+	rmb->msgprot_attrs.servicegrp_ver =
+			SBI_MPXY_MSGPROTO_VERSION(RPMI_MAJOR_VER, RPMI_MINOR_VER);
+
+	rmb->mbox_data = (struct mpxy_mbox_data *)data;
+	rmb->chan = chan;
+
+	/* Register RPXY service group */
+	rc = sbi_mpxy_register_channel(&rmb->channel);
+	if (rc) {
+		mbox_controller_free_chan(chan);
+		sbi_free(rmb);
+		return rc;
+	}
+
+	return SBI_OK;
+}
+
+static struct rpmi_service_data clock_services[] = {
+{
+	.id = RPMI_CLOCK_SRV_ENABLE_NOTIFICATION,
+	.min_tx_len = sizeof(struct rpmi_enable_notification_req),
+	.max_tx_len = sizeof(struct rpmi_enable_notification_req),
+	.min_rx_len = sizeof(struct rpmi_enable_notification_resp),
+	.max_rx_len = sizeof(struct rpmi_enable_notification_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_GET_NUM_CLOCKS,
+	.min_tx_len = 0,
+	.max_tx_len = 0,
+	.min_rx_len = sizeof(struct rpmi_clock_get_num_clocks_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_get_num_clocks_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_GET_ATTRIBUTES,
+	.min_tx_len = sizeof(struct rpmi_clock_get_attributes_req),
+	.max_tx_len = sizeof(struct rpmi_clock_get_attributes_req),
+	.min_rx_len = sizeof(struct rpmi_clock_get_attributes_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_get_attributes_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_GET_SUPPORTED_RATES,
+	.min_tx_len = sizeof(struct rpmi_clock_get_supported_rates_req),
+	.max_tx_len = sizeof(struct rpmi_clock_get_supported_rates_req),
+	.min_rx_len = sizeof(struct rpmi_clock_get_supported_rates_resp),
+	.max_rx_len = -1U,
+},
+{
+	.id = RPMI_CLOCK_SRV_SET_CONFIG,
+	.min_tx_len = sizeof(struct rpmi_clock_set_config_req),
+	.max_tx_len = sizeof(struct rpmi_clock_set_config_req),
+	.min_rx_len = sizeof(struct rpmi_clock_set_config_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_set_config_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_GET_CONFIG,
+	.min_tx_len = sizeof(struct rpmi_clock_get_config_req),
+	.max_tx_len = sizeof(struct rpmi_clock_get_config_req),
+	.min_rx_len = sizeof(struct rpmi_clock_get_config_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_get_config_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_SET_RATE,
+	.min_tx_len = sizeof(struct rpmi_clock_set_rate_req),
+	.max_tx_len = sizeof(struct rpmi_clock_set_rate_req),
+	.min_rx_len = sizeof(struct rpmi_clock_set_rate_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_set_rate_resp),
+},
+{
+	.id = RPMI_CLOCK_SRV_GET_RATE,
+	.min_tx_len = sizeof(struct rpmi_clock_get_rate_req),
+	.max_tx_len = sizeof(struct rpmi_clock_get_rate_req),
+	.min_rx_len = sizeof(struct rpmi_clock_get_rate_resp),
+	.max_rx_len = sizeof(struct rpmi_clock_get_rate_resp),
+},
+};
+
+static struct mpxy_mbox_data clock_data = {
+	.servicegrp_id = RPMI_SRVGRP_CLOCK,
+	.num_services = RPMI_CLOCK_SRV_MAX_COUNT,
+	.notifications_support = 1,
+	.priv_data = clock_services,
+};
+
+static const struct fdt_match mpxy_mbox_match[] = {
+	{ .compatible = "riscv,rpmi-mpxy-clock", .data = &clock_data },
+	{ },
+};
+
+struct fdt_driver fdt_mpxy_rpmi_mbox = {
+	.match_table = mpxy_mbox_match,
+	.init = mpxy_mbox_init,
+};
diff --git a/lib/utils/mpxy/objects.mk b/lib/utils/mpxy/objects.mk
index 43e73c94f07..ccb28b554ac 100644
--- a/lib/utils/mpxy/objects.mk
+++ b/lib/utils/mpxy/objects.mk
@@ -9,3 +9,6 @@
 
 libsbiutils-objs-$(CONFIG_FDT_MPXY) += mpxy/fdt_mpxy.o
 libsbiutils-objs-$(CONFIG_FDT_MPXY) += mpxy/fdt_mpxy_drivers.carray.o
+
+carray-fdt_mpxy_drivers-$(CONFIG_FDT_MPXY_RPMI_MBOX) += fdt_mpxy_rpmi_mbox
+libsbiutils-objs-$(CONFIG_FDT_MPXY_RPMI_MBOX) += mpxy/fdt_mpxy_rpmi_mbox.o
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 1f0880ee60e..e23b38b2559 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -54,3 +54,4 @@ CONFIG_FDT_TIMER=y
 CONFIG_FDT_TIMER_MTIMER=y
 CONFIG_FDT_TIMER_PLMT=y
 CONFIG_FDT_MPXY=y
+CONFIG_FDT_MPXY_RPMI_MBOX=y

From c2acc5e5b0d85166153032eaea181021c73e9752 Mon Sep 17 00:00:00 2001
From: Nylon Chen <nylon.chen@sifive.com>
Date: Fri, 6 Dec 2024 11:21:49 +0800
Subject: [PATCH 1762/1765] lib: sbi_misaligned_ldst: Add handling of vector
 load/store

Add misaligned load/store handling for the vector extension
to the sbi_misaligned_ldst library.

This implementation is inspired from the misaligned_vec_ldst
implementation in the riscv-pk project.

Co-developed-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Reviewed-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
 Makefile                     |  11 +-
 include/sbi/riscv_encoding.h | 385 ++++++++++++++++++++++++++++++++++-
 include/sbi/sbi_trap_ldst.h  |   9 +
 lib/sbi/objects.mk           |   1 +
 lib/sbi/sbi_trap_ldst.c      |  23 ++-
 lib/sbi/sbi_trap_v_ldst.c    | 343 +++++++++++++++++++++++++++++++
 6 files changed, 760 insertions(+), 12 deletions(-)
 create mode 100644 lib/sbi/sbi_trap_v_ldst.c

diff --git a/Makefile b/Makefile
index d9cee497853..5ac95a0f216 100644
--- a/Makefile
+++ b/Makefile
@@ -189,6 +189,9 @@ CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
 CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep -e "zicsr" -e "zifencei" > /dev/null && echo n || echo y)
 
+# Check whether the assembler and the compiler support the Vector extension
+CC_SUPPORT_VECT := $(shell echo | $(CC) -dM -E -march=rv$(OPENSBI_CC_XLEN)gv - | grep -q riscv.*vector && echo y || echo n)
+
 ifneq ($(OPENSBI_LD_PIE),y)
 $(error Your linker does not support creating PIEs, opensbi requires this.)
 endif
@@ -294,10 +297,12 @@ ifndef PLATFORM_RISCV_ABI
 endif
 ifndef PLATFORM_RISCV_ISA
   ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
+    PLATFORM_RISCV_ISA := rv$(PLATFORM_RISCV_XLEN)imafdc
+    ifeq ($(CC_SUPPORT_VECT), y)
+      PLATFORM_RISCV_ISA := $(PLATFORM_RISCV_ISA)v
+    endif
     ifeq ($(CC_SUPPORT_ZICSR_ZIFENCEI), y)
-      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc_zicsr_zifencei
-    else
-      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
+      PLATFORM_RISCV_ISA := $(PLATFORM_RISCV_ISA)_zicsr_zifencei
     endif
   else
     PLATFORM_RISCV_ISA = $(OPENSBI_CC_ISA)
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 38997ef486a..03c68a5767c 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -763,6 +763,12 @@
 #define CSR_MVIPH			0x319
 #define CSR_MIPH			0x354
 
+/* Vector extension registers */
+#define CSR_VSTART			0x8
+#define CSR_VL				0xc20
+#define CSR_VTYPE			0xc21
+#define CSR_VLENB			0xc22
+
 /* ===== Trap/Exception Causes ===== */
 
 #define CAUSE_MISALIGNED_FETCH		0x0
@@ -891,11 +897,364 @@
 #define INSN_MASK_FENCE_TSO		0xffffffff
 #define INSN_MATCH_FENCE_TSO		0x8330000f
 
+#define INSN_MASK_VECTOR_UNIT_STRIDE		0xfdf0707f
+#define INSN_MASK_VECTOR_FAULT_ONLY_FIRST	0xfdf0707f
+#define INSN_MASK_VECTOR_STRIDE			0xfc00707f
+#define INSN_MASK_VECTOR_WHOLE_REG		0xfff0707f
+#define INSN_MASK_VECTOR_INDEXED		0xfc00707f
+
+#define INSN_MATCH_VLUXSEG(n, bits) ((((n) - 1) << 29) | 0x04000007 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VSUXSEG(n, bits) ((((n) - 1) << 29) | 0x04000027 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VLOXSEG(n, bits) ((((n) - 1) << 29) | 0x0c000007 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VSOXSEG(n, bits) ((((n) - 1) << 29) | 0x0c000027 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VLSSEG(n, bits)  ((((n) - 1) << 29) | 0x08000007 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VSSSEG(n, bits)  ((((n) - 1) << 29) | 0x08000027 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VSSEG(n, bits)   ((((n) - 1) << 29) | 0x00004027 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VLSEG(n, bits)   ((((n) - 1) << 29) | 0x00004007 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+#define INSN_MATCH_VLSEGFF(n, bits) ((((n) - 1) << 29) | 0x1000007 | \
+		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
+
+#define INSN_MATCH_VLE16V		0x00005007
+#define INSN_MATCH_VLE32V		0x00006007
+#define INSN_MATCH_VLE64V		0x00007007
+#define INSN_MATCH_VSE16V		0x00005027
+#define INSN_MATCH_VSE32V		0x00006027
+#define INSN_MATCH_VSE64V		0x00007027
+#define INSN_MATCH_VLSE16V		0x08005007
+#define INSN_MATCH_VLSE32V		0x08006007
+#define INSN_MATCH_VLSE64V		0x08007007
+#define INSN_MATCH_VSSE16V		0x08005027
+#define INSN_MATCH_VSSE32V		0x08006027
+#define INSN_MATCH_VSSE64V		0x08007027
+#define INSN_MATCH_VLOXEI16V		0x0c005007
+#define INSN_MATCH_VLOXEI32V		0x0c006007
+#define INSN_MATCH_VLOXEI64V		0x0c007007
+#define INSN_MATCH_VSOXEI16V		0x0c005027
+#define INSN_MATCH_VSOXEI32V		0x0c006027
+#define INSN_MATCH_VSOXEI64V		0x0c007027
+#define INSN_MATCH_VLUXEI16V		0x04005007
+#define INSN_MATCH_VLUXEI32V		0x04006007
+#define INSN_MATCH_VLUXEI64V		0x04007007
+#define INSN_MATCH_VSUXEI16V		0x04005027
+#define INSN_MATCH_VSUXEI32V		0x04006027
+#define INSN_MATCH_VSUXEI64V		0x04007027
+#define INSN_MATCH_VLE16FFV		0x01005007
+#define INSN_MATCH_VLE32FFV		0x01006007
+#define INSN_MATCH_VLE64FFV		0x01007007
+#define INSN_MATCH_VL1RE8V		0x02800007
+#define INSN_MATCH_VL1RE16V		0x02805007
+#define INSN_MATCH_VL1RE32V		0x02806007
+#define INSN_MATCH_VL1RE64V		0x02807007
+#define INSN_MATCH_VL2RE8V		0x22800007
+#define INSN_MATCH_VL2RE16V		0x22805007
+#define INSN_MATCH_VL2RE32V		0x22806007
+#define INSN_MATCH_VL2RE64V		0x22807007
+#define INSN_MATCH_VL4RE8V		0x62800007
+#define INSN_MATCH_VL4RE16V		0x62805007
+#define INSN_MATCH_VL4RE32V		0x62806007
+#define INSN_MATCH_VL4RE64V		0x62807007
+#define INSN_MATCH_VL8RE8V		0xe2800007
+#define INSN_MATCH_VL8RE16V		0xe2805007
+#define INSN_MATCH_VL8RE32V		0xe2806007
+#define INSN_MATCH_VL8RE64V		0xe2807007
+#define INSN_MATCH_VS1RV		0x02800027
+#define INSN_MATCH_VS2RV		0x22800027
+#define INSN_MATCH_VS4RV		0x62800027
+#define INSN_MATCH_VS8RV		0xe2800027
+
+#define INSN_MASK_VECTOR_LOAD_STORE	0x7f
+#define INSN_MATCH_VECTOR_LOAD		0x07
+#define INSN_MATCH_VECTOR_STORE		0x27
+
+#define IS_VECTOR_LOAD_STORE(insn) \
+	((((insn) & INSN_MASK_VECTOR_LOAD_STORE) == INSN_MATCH_VECTOR_LOAD) || \
+	(((insn) & INSN_MASK_VECTOR_LOAD_STORE) == INSN_MATCH_VECTOR_STORE))
+
+#define IS_VECTOR_INSN_MATCH(insn, match, mask) \
+	(((insn) & (mask)) == ((match) & (mask)))
+
+#define IS_UNIT_STRIDE_MATCH(insn, match) \
+	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_UNIT_STRIDE)
+
+#define IS_STRIDE_MATCH(insn, match) \
+	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_STRIDE)
+
+#define IS_INDEXED_MATCH(insn, match) \
+	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_INDEXED)
+
+#define IS_FAULT_ONLY_FIRST_MATCH(insn, match) \
+	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_FAULT_ONLY_FIRST)
+
+#define IS_WHOLE_REG_MATCH(insn, match) \
+	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_WHOLE_REG)
+
+#define IS_UNIT_STRIDE_LOAD(insn) ( \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE16V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE32V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE64V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 64)))
+
+#define IS_UNIT_STRIDE_STORE(insn) ( \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE16V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE32V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE64V) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 16)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 32)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 64)) || \
+	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 64)))
+
+#define IS_STRIDE_LOAD(insn) ( \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE16V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE32V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE64V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 64)))
+
+#define IS_STRIDE_STORE(insn) ( \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE16V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE32V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE64V) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 16)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 32)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 64)) || \
+	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 64)))
+
+#define IS_INDEXED_LOAD(insn) ( \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI16V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI32V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI64V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI16V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI32V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI64V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 64)))
+
+#define IS_INDEXED_STORE(insn) ( \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI16V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI32V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI64V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI16V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI32V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI64V) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 16)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 32)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 64)) || \
+	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 64)))
+
+#define IS_FAULT_ONLY_FIRST_LOAD(insn) ( \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE16FFV) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE32FFV) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE64FFV) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 16)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 32)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 64)) || \
+	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 64)))
+
+	#define IS_WHOLE_REG_LOAD(insn) ( \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE8V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE16V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE32V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE64V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE8V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE16V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE32V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE64V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE8V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE16V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE32V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE64V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE8V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE16V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE32V) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE64V))
+
+#define IS_WHOLE_REG_STORE(insn) ( \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS1RV) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS2RV) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS4RV) || \
+	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS8RV))
+
+
 #if __riscv_xlen == 64
 
 /* 64-bit read for VS-stage address translation (RV64) */
 #define INSN_PSEUDO_VS_LOAD		0x00003000
-
 /* 64-bit write for VS-stage address translation (RV64) */
 #define INSN_PSEUDO_VS_STORE	0x00003020
 
@@ -911,6 +1270,12 @@
 #error "Unexpected __riscv_xlen"
 #endif
 
+#define VM_MASK				0x1
+#define VIEW_MASK				0x3
+#define VSEW_MASK				0x3
+#define VLMUL_MASK				0x7
+#define VD_MASK				0x1f
+#define VS2_MASK				0x1f
 #define INSN_16BIT_MASK			0x3
 #define INSN_32BIT_MASK			0x1c
 
@@ -929,6 +1294,12 @@
 #endif
 #define REGBYTES			(1 << LOG_REGBYTES)
 
+#define SH_VSEW			3
+#define SH_VIEW			12
+#define SH_VD				7
+#define SH_VS2				20
+#define SH_VM				25
+#define SH_MEW				28
 #define SH_RD				7
 #define SH_RS1				15
 #define SH_RS2				20
@@ -982,6 +1353,18 @@
 #define IMM_S(insn)			(((s32)(insn) >> 25 << 5) | \
 					 (s32)(((insn) >> 7) & 0x1f))
 
+#define IS_MASKED(insn)		(((insn >> SH_VM) & VM_MASK) == 0)
+#define GET_VD(insn)			((insn >> SH_VD) & VD_MASK)
+#define GET_VS2(insn)			((insn >> SH_VS2) & VS2_MASK)
+#define GET_VIEW(insn)			(((insn) >> SH_VIEW) & VIEW_MASK)
+#define GET_MEW(insn)			(((insn) >> SH_MEW) & 1)
+#define GET_VSEW(vtype)		(((vtype) >> SH_VSEW) & VSEW_MASK)
+#define GET_VLMUL(vtype)		((vtype) & VLMUL_MASK)
+#define GET_LEN(view)			(1UL << (view))
+#define GET_NF(insn)			(1 + ((insn >> 29) & 7))
+#define GET_VEMUL(vlmul, view, vsew)	((vlmul + view - vsew) & 7)
+#define GET_EMUL(vemul)		(1UL << ((vemul) >= 4 ? 0 : (vemul)))
+
 #define MASK_FUNCT3			0x7000
 #define MASK_RS1			0xf8000
 #define MASK_CSR			0xfff00000
diff --git a/include/sbi/sbi_trap_ldst.h b/include/sbi/sbi_trap_ldst.h
index 4c5cc375f53..34877ccc570 100644
--- a/include/sbi/sbi_trap_ldst.h
+++ b/include/sbi/sbi_trap_ldst.h
@@ -30,4 +30,13 @@ int sbi_store_access_handler(struct sbi_trap_context *tcntx);
 
 int sbi_double_trap_handler(struct sbi_trap_context *tcntx);
 
+ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
+				 ulong addr_offset);
+
+int sbi_misaligned_v_ld_emulator(int rlen, union sbi_ldst_data *out_val,
+				 struct sbi_trap_context *tcntx);
+
+int sbi_misaligned_v_st_emulator(int wlen, union sbi_ldst_data in_val,
+				 struct sbi_trap_context *tcntx);
+
 #endif
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 12e9e2bd626..9cb28422c03 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -95,6 +95,7 @@ libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_trap_ldst.o
+libsbi-objs-y += sbi_trap_v_ldst.o
 libsbi-objs-y += sbi_unpriv.o
 libsbi-objs-y += sbi_expected_trap.o
 libsbi-objs-y += sbi_cppc.o
diff --git a/lib/sbi/sbi_trap_ldst.c b/lib/sbi/sbi_trap_ldst.c
index ebc4a924de0..448406b150c 100644
--- a/lib/sbi/sbi_trap_ldst.c
+++ b/lib/sbi/sbi_trap_ldst.c
@@ -32,7 +32,7 @@ typedef int (*sbi_trap_ld_emulator)(int rlen, union sbi_ldst_data *out_val,
 typedef int (*sbi_trap_st_emulator)(int wlen, union sbi_ldst_data in_val,
 				    struct sbi_trap_context *tcntx);
 
-static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
+ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
 					ulong addr_offset)
 {
 	if (new_tinst == INSN_PSEUDO_VS_LOAD ||
@@ -52,7 +52,7 @@ static int sbi_trap_emulate_load(struct sbi_trap_context *tcntx,
 	ulong insn, insn_len;
 	union sbi_ldst_data val = { 0 };
 	struct sbi_trap_info uptrap;
-	int rc, fp = 0, shift = 0, len = 0;
+	int rc, fp = 0, shift = 0, len = 0, vector = 0;
 
 	if (orig_trap->tinst & 0x1) {
 		/*
@@ -144,6 +144,9 @@ static int sbi_trap_emulate_load(struct sbi_trap_context *tcntx,
 		len = 2;
 		shift = 8 * (sizeof(ulong) - len);
 		insn = RVC_RS2S(insn) << SH_RD;
+	} else if (IS_VECTOR_LOAD_STORE(insn)) {
+		vector = 1;
+		emu = sbi_misaligned_v_ld_emulator;
 	} else {
 		return sbi_trap_redirect(regs, orig_trap);
 	}
@@ -152,14 +155,16 @@ static int sbi_trap_emulate_load(struct sbi_trap_context *tcntx,
 	if (rc <= 0)
 		return rc;
 
-	if (!fp)
-		SET_RD(insn, regs, ((long)(val.data_ulong << shift)) >> shift);
+	if (!vector) {
+		if (!fp)
+			SET_RD(insn, regs, ((long)(val.data_ulong << shift)) >> shift);
 #ifdef __riscv_flen
-	else if (len == 8)
-		SET_F64_RD(insn, regs, val.data_u64);
-	else
-		SET_F32_RD(insn, regs, val.data_ulong);
+		else if (len == 8)
+			SET_F64_RD(insn, regs, val.data_u64);
+		else
+			SET_F32_RD(insn, regs, val.data_ulong);
 #endif
+	}
 
 	regs->mepc += insn_len;
 
@@ -248,6 +253,8 @@ static int sbi_trap_emulate_store(struct sbi_trap_context *tcntx,
 	} else if ((insn & INSN_MASK_C_SH) == INSN_MATCH_C_SH) {
 		len		= 2;
 		val.data_ulong = GET_RS2S(insn, regs);
+	} else if (IS_VECTOR_LOAD_STORE(insn)) {
+		emu = sbi_misaligned_v_st_emulator;
 	} else {
 		return sbi_trap_redirect(regs, orig_trap);
 	}
diff --git a/lib/sbi/sbi_trap_v_ldst.c b/lib/sbi/sbi_trap_v_ldst.c
new file mode 100644
index 00000000000..9929215c493
--- /dev/null
+++ b/lib/sbi/sbi_trap_v_ldst.c
@@ -0,0 +1,343 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2024 SiFive Inc.
+ *
+ * Authors:
+ *   Andrew Waterman <andrew@sifive.com>
+ *   Nylon Chen <nylon.chen@sifive.com>
+ *   Zong Li <nylon.chen@sifive.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_trap_ldst.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_unpriv.h>
+#include <sbi/sbi_trap.h>
+
+#ifdef __riscv_vector
+#define VLEN_MAX 65536
+
+static inline void set_vreg(ulong vlenb, ulong which,
+			    ulong pos, ulong size, const uint8_t *bytes)
+{
+	pos += (which % 8) * vlenb;
+	bytes -= pos;
+
+	asm volatile (
+		"	.option push\n\t"
+		"	.option arch, +v\n\t"
+		"	vsetvli x0, %0, e8, m8, tu, ma\n\t"
+		"	.option pop\n\t"
+		:: "r" (pos + size));
+
+	csr_write(CSR_VSTART, pos);
+
+	switch (which / 8) {
+	case 0:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vle8.v v0,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 1:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vle8.v v8,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 2:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vle8.v v16,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 3:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vle8.v v24,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	default:
+		break;
+	}
+}
+
+static inline void get_vreg(ulong vlenb, ulong which,
+			    ulong pos, ulong size, uint8_t *bytes)
+{
+	pos += (which % 8) * vlenb;
+	bytes -= pos;
+
+	asm volatile (
+		"	.option push\n\t"
+		"	.option arch, +v\n\t"
+		"	vsetvli x0, %0, e8, m8, tu, ma\n\t"
+		"	.option pop\n\t"
+		:: "r" (pos + size));
+
+	csr_write(CSR_VSTART, pos);
+
+	switch (which / 8) {
+	case 0:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vse8.v v0,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 1:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vse8.v v8,  (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 2:
+		asm volatile (
+			"	.option push\n\t"
+			"	.option arch, +v\n\t"
+			"	vse8.v v16, (%0)\n\t"
+			"	.option pop\n\t"
+			:: "r" (bytes) : "memory");
+		break;
+	case 3:
+		asm volatile (
+				".option push\n\t"
+				".option arch, +v\n\t"
+				"vse8.v v24, (%0)\n\t"
+				".option pop\n\t"
+				:: "r" (bytes) : "memory");
+		break;
+	default:
+		break;
+	}
+}
+
+static inline void vsetvl(ulong vl, ulong vtype)
+{
+	asm volatile (
+		"	.option push\n\t"
+		"	.option arch, +v\n\t"
+		"	vsetvl x0, %0, %1\n\t"
+		"	.option pop\n\t"
+			:: "r" (vl), "r" (vtype));
+}
+
+int sbi_misaligned_v_ld_emulator(int rlen, union sbi_ldst_data *out_val,
+				 struct sbi_trap_context *tcntx)
+{
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
+	struct sbi_trap_info uptrap;
+	ulong insn = sbi_get_insn(regs->mepc, &uptrap);
+	ulong vl = csr_read(CSR_VL);
+	ulong vtype = csr_read(CSR_VTYPE);
+	ulong vlenb = csr_read(CSR_VLENB);
+	ulong vstart = csr_read(CSR_VSTART);
+	ulong base = GET_RS1(insn, regs);
+	ulong stride = GET_RS2(insn, regs);
+	ulong vd = GET_VD(insn);
+	ulong vs2 = GET_VS2(insn);
+	ulong view = GET_VIEW(insn);
+	ulong vsew = GET_VSEW(vtype);
+	ulong vlmul = GET_VLMUL(vtype);
+	bool illegal = GET_MEW(insn);
+	bool masked = IS_MASKED(insn);
+	uint8_t mask[VLEN_MAX / 8];
+	uint8_t bytes[8 * sizeof(uint64_t)];
+	ulong len = GET_LEN(view);
+	ulong nf = GET_NF(insn);
+	ulong vemul = GET_VEMUL(vlmul, view, vsew);
+	ulong emul = GET_EMUL(vemul);
+
+	if (IS_UNIT_STRIDE_LOAD(insn) || IS_FAULT_ONLY_FIRST_LOAD(insn)) {
+		stride = nf * len;
+	} else if (IS_WHOLE_REG_LOAD(insn)) {
+		vl = (nf * vlenb) >> view;
+		nf = 1;
+		vemul = 0;
+		emul = 1;
+		stride = nf * len;
+	} else if (IS_INDEXED_LOAD(insn)) {
+		len = 1 << vsew;
+		vemul = (vlmul + vsew - vsew) & 7;
+		emul = 1 << ((vemul & 4) ? 0 : vemul);
+		stride = nf * len;
+	}
+
+	if (illegal || vlenb > VLEN_MAX / 8) {
+		struct sbi_trap_info trap = {
+			uptrap.cause = CAUSE_ILLEGAL_INSTRUCTION,
+			uptrap.tval = insn,
+		};
+		return sbi_trap_redirect(regs, &trap);
+	}
+
+	if (masked)
+		get_vreg(vlenb, 0, 0, vlenb, mask);
+
+	do {
+		if (!masked || ((mask[vstart / 8] >> (vstart % 8)) & 1)) {
+			/* compute element address */
+			ulong addr = base + vstart * stride;
+
+			if (IS_INDEXED_LOAD(insn)) {
+				ulong offset = 0;
+
+				get_vreg(vlenb, vs2, vstart << view, 1 << view, (uint8_t *)&offset);
+				addr = base + offset;
+			}
+
+			csr_write(CSR_VSTART, vstart);
+
+			/* obtain load data from memory */
+			for (ulong seg = 0; seg < nf; seg++) {
+				for (ulong i = 0; i < len; i++) {
+					bytes[seg * len + i] =
+						sbi_load_u8((void *)(addr + seg * len + i),
+							    &uptrap);
+
+					if (uptrap.cause) {
+						if (IS_FAULT_ONLY_FIRST_LOAD(insn) && vstart != 0) {
+							vl = vstart;
+							break;
+						}
+						vsetvl(vl, vtype);
+						uptrap.tinst = sbi_misaligned_tinst_fixup(
+							orig_trap->tinst, uptrap.tinst, i);
+						return sbi_trap_redirect(regs, &uptrap);
+					}
+				}
+			}
+
+			/* write load data to regfile */
+			for (ulong seg = 0; seg < nf; seg++)
+				set_vreg(vlenb, vd + seg * emul, vstart * len,
+					 len, &bytes[seg * len]);
+		}
+	} while (++vstart < vl);
+
+	/* restore clobbered vl/vtype */
+	vsetvl(vl, vtype);
+
+	return vl;
+}
+
+int sbi_misaligned_v_st_emulator(int wlen, union sbi_ldst_data in_val,
+				 struct sbi_trap_context *tcntx)
+{
+	const struct sbi_trap_info *orig_trap = &tcntx->trap;
+	struct sbi_trap_regs *regs = &tcntx->regs;
+	struct sbi_trap_info uptrap;
+	ulong insn = sbi_get_insn(regs->mepc, &uptrap);
+	ulong vl = csr_read(CSR_VL);
+	ulong vtype = csr_read(CSR_VTYPE);
+	ulong vlenb = csr_read(CSR_VLENB);
+	ulong vstart = csr_read(CSR_VSTART);
+	ulong base = GET_RS1(insn, regs);
+	ulong stride = GET_RS2(insn, regs);
+	ulong vd = GET_VD(insn);
+	ulong vs2 = GET_VS2(insn);
+	ulong view = GET_VIEW(insn);
+	ulong vsew = GET_VSEW(vtype);
+	ulong vlmul = GET_VLMUL(vtype);
+	bool illegal = GET_MEW(insn);
+	bool masked = IS_MASKED(insn);
+	uint8_t mask[VLEN_MAX / 8];
+	uint8_t bytes[8 * sizeof(uint64_t)];
+	ulong len = GET_LEN(view);
+	ulong nf = GET_NF(insn);
+	ulong vemul = GET_VEMUL(vlmul, view, vsew);
+	ulong emul = GET_EMUL(vemul);
+
+	if (IS_UNIT_STRIDE_STORE(insn)) {
+		stride = nf * len;
+	} else if (IS_WHOLE_REG_STORE(insn)) {
+		vl = (nf * vlenb) >> view;
+		nf = 1;
+		vemul = 0;
+		emul = 1;
+		stride = nf * len;
+	} else if (IS_INDEXED_STORE(insn)) {
+		len = 1 << vsew;
+		vemul = (vlmul + vsew - vsew) & 7;
+		emul = 1 << ((vemul & 4) ? 0 : vemul);
+		stride = nf * len;
+	}
+
+	if (illegal || vlenb > VLEN_MAX / 8) {
+		struct sbi_trap_info trap = {
+			uptrap.cause = CAUSE_ILLEGAL_INSTRUCTION,
+			uptrap.tval = insn,
+		};
+		return sbi_trap_redirect(regs, &trap);
+	}
+
+	if (masked)
+		get_vreg(vlenb, 0, 0, vlenb, mask);
+
+	do {
+		if (!masked || ((mask[vstart / 8] >> (vstart % 8)) & 1)) {
+			/* compute element address */
+			ulong addr = base + vstart * stride;
+
+			if (IS_INDEXED_STORE(insn)) {
+				ulong offset = 0;
+
+				get_vreg(vlenb, vs2, vstart << view, 1 << view, (uint8_t *)&offset);
+				addr = base + offset;
+			}
+
+			/* obtain store data from regfile */
+			for (ulong seg = 0; seg < nf; seg++)
+				get_vreg(vlenb, vd + seg * emul, vstart * len,
+					 len, &bytes[seg * len]);
+
+			csr_write(CSR_VSTART, vstart);
+
+			/* write store data to memory */
+			for (ulong seg = 0; seg < nf; seg++) {
+				for (ulong i = 0; i < len; i++) {
+					sbi_store_u8((void *)(addr + seg * len + i),
+						     bytes[seg * len + i], &uptrap);
+					if (uptrap.cause) {
+						vsetvl(vl, vtype);
+						uptrap.tinst = sbi_misaligned_tinst_fixup(
+							orig_trap->tinst, uptrap.tinst, i);
+						return sbi_trap_redirect(regs, &uptrap);
+					}
+				}
+			}
+		}
+	} while (++vstart < vl);
+
+	/* restore clobbered vl/vtype */
+	vsetvl(vl, vtype);
+
+	return vl;
+}
+#else
+int sbi_misaligned_v_ld_emulator(int rlen, union sbi_ldst_data *out_val,
+				 struct sbi_trap_context *tcntx)
+{
+	return 0;
+}
+int sbi_misaligned_v_st_emulator(int wlen, union sbi_ldst_data in_val,
+				 struct sbi_trap_context *tcntx)
+{
+	return 0;
+}
+#endif /* __riscv_vector  */

From c02fff6f329c41768fed8724d6862ff00c2524f3 Mon Sep 17 00:00:00 2001
From: shmknrk <shimooka@arch.cs.titech.ac.jp>
Date: Sat, 7 Dec 2024 19:47:32 +0900
Subject: [PATCH 1763/1765] Add rvcpu config

---
 Makefile                              |  14 +++
 include/sbi_utils/serial/rvcpu-uart.h |   8 ++
 lib/utils/serial/Kconfig              |   9 ++
 lib/utils/serial/fdt_serial_rvcpu.c   |  30 +++++++
 lib/utils/serial/objects.mk           |   4 +
 lib/utils/serial/rvcpu-uart.c         |  45 ++++++++++
 platform/rvcpu/Kconfig                |  16 ++++
 platform/rvcpu/configs/defconfig      |   0
 platform/rvcpu/objects.mk             |  99 ++++++++++++++++++++
 platform/rvcpu/platform.c             | 124 ++++++++++++++++++++++++++
 10 files changed, 349 insertions(+)
 create mode 100644 include/sbi_utils/serial/rvcpu-uart.h
 create mode 100644 lib/utils/serial/fdt_serial_rvcpu.c
 create mode 100644 lib/utils/serial/rvcpu-uart.c
 create mode 100644 platform/rvcpu/Kconfig
 create mode 100644 platform/rvcpu/configs/defconfig
 create mode 100644 platform/rvcpu/objects.mk
 create mode 100644 platform/rvcpu/platform.c

diff --git a/Makefile b/Makefile
index 5ac95a0f216..68a9b93c50d 100644
--- a/Makefile
+++ b/Makefile
@@ -734,3 +734,17 @@ endif
 
 .PHONY: FORCE
 FORCE:
+
+rvcpu_firmware_build_dir      := build/platform/rvcpu/firmware
+.PHONY: hex
+hex:
+	make $(addprefix $(rvcpu_firmware_build_dir)/fw_payload,.32.hex .64.hex .128.hex) --no-print-directory
+
+%.32.hex: %.bin
+	hexdump -v -e '1/4 "%08x\n"' $< > $@
+
+%.64.hex: %.bin
+	hexdump -v -e '1/8 "%016x\n"' $< > $@
+
+%.128.hex: %.64.hex
+	awk '{if(NR%2){buf=$$0}else{print $$0 buf; buf=""}}' $< > $@
diff --git a/include/sbi_utils/serial/rvcpu-uart.h b/include/sbi_utils/serial/rvcpu-uart.h
new file mode 100644
index 00000000000..104d465fd2d
--- /dev/null
+++ b/include/sbi_utils/serial/rvcpu-uart.h
@@ -0,0 +1,8 @@
+#ifndef __SERIAL_RVCPU_UART_H__
+#define __SERIAL_RVCPU_UART_H__
+
+#include <sbi/sbi_types.h>
+
+int rvcpu_uart_init(unsigned long base);
+
+#endif
diff --git a/lib/utils/serial/Kconfig b/lib/utils/serial/Kconfig
index e3589cac103..9085279fc8b 100644
--- a/lib/utils/serial/Kconfig
+++ b/lib/utils/serial/Kconfig
@@ -54,6 +54,11 @@ config FDT_SERIAL_XILINX_UARTLITE
 	select SERIAL_XILINX_UARTLITE
 	default n
 
+config FDT_SERIAL_RVCPU
+	bool "Rvcpu UART FDT driver"
+	select SERIAL_RVCPU
+	default n
+
 endif
 
 config SERIAL_CADENCE
@@ -92,4 +97,8 @@ config SERIAL_SEMIHOSTING
 	bool "Semihosting support"
 	default n
 
+config SERIAL_RVCPU
+	bool "Rvcpu UART support"
+	default n
+
 endmenu
diff --git a/lib/utils/serial/fdt_serial_rvcpu.c b/lib/utils/serial/fdt_serial_rvcpu.c
new file mode 100644
index 00000000000..23d8bec53a8
--- /dev/null
+++ b/lib/utils/serial/fdt_serial_rvcpu.c
@@ -0,0 +1,30 @@
+#include <sbi/sbi_error.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/serial/rvcpu-uart.h>
+
+static int serial_rvcpu_init(const void *fdt, int nodeoff,
+			     const struct fdt_match *match)
+{
+	uint64_t reg_addr, reg_size;
+	int rc;
+
+	if (nodeoff < 0 || !fdt)
+		return SBI_ENODEV;
+
+	rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &reg_addr, &reg_size);
+	if (rc < 0 || !reg_addr || !reg_size)
+		return SBI_ENODEV;
+
+	return rvcpu_uart_init(reg_addr);
+}
+
+static const struct fdt_match serial_rvcpu_match[] = {
+	{ .compatible = "isct,rvcpu-uart" },
+	{ },
+};
+
+const struct fdt_serial fdt_serial_rvcpu = {
+	.match_table = serial_rvcpu_match,
+	.init = serial_rvcpu_init
+};
diff --git a/lib/utils/serial/objects.mk b/lib/utils/serial/objects.mk
index 7c973c8385b..b8c6b2364be 100644
--- a/lib/utils/serial/objects.mk
+++ b/lib/utils/serial/objects.mk
@@ -37,6 +37,9 @@ libsbiutils-objs-$(CONFIG_FDT_SERIAL_UART8250) += serial/fdt_serial_uart8250.o
 carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += fdt_serial_xlnx_uartlite
 libsbiutils-objs-$(CONFIG_FDT_SERIAL_XILINX_UARTLITE) += serial/fdt_serial_xlnx_uartlite.o
 
+carray-fdt_serial_drivers-$(CONFIG_FDT_SERIAL_RVCPU) += fdt_serial_rvcpu
+libsbiutils-objs-$(CONFIG_FDT_SERIAL_RVCPU) += serial/fdt_serial_rvcpu.o
+
 libsbiutils-objs-$(CONFIG_SERIAL_CADENCE) += serial/cadence-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_GAISLER) += serial/gaisler-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_RENESAS_SCIF) += serial/renesas_scif.o
@@ -46,3 +49,4 @@ libsbiutils-objs-$(CONFIG_SERIAL_LITEX) += serial/litex-uart.o
 libsbiutils-objs-$(CONFIG_SERIAL_UART8250) += serial/uart8250.o
 libsbiutils-objs-$(CONFIG_SERIAL_XILINX_UARTLITE) += serial/xlnx-uartlite.o
 libsbiutils-objs-$(CONFIG_SERIAL_SEMIHOSTING) += serial/semihosting.o
+libsbiutils-objs-$(CONFIG_SERIAL_RVCPU) += serial/rvcpu-uart.o
diff --git a/lib/utils/serial/rvcpu-uart.c b/lib/utils/serial/rvcpu-uart.c
new file mode 100644
index 00000000000..bf28103c969
--- /dev/null
+++ b/lib/utils/serial/rvcpu-uart.c
@@ -0,0 +1,45 @@
+#include <sbi/riscv_io.h>
+#include <sbi/sbi_console.h>
+#include <sbi_utils/serial/rvcpu-uart.h>
+
+#define UART_REG_RXTX		0
+#define UART_REG_TXFULL		1
+#define UART_REG_RXEMPTY	2
+
+static volatile u32 *uart_base;
+
+static u8 get_reg(u8 reg)
+{
+	return readb(uart_base + reg);
+}
+
+static void set_reg(u8 reg, u8 val)
+{
+	writeb(val, uart_base + reg);
+}
+
+static void rvcpu_uart_putc(char ch)
+{
+	while (get_reg(UART_REG_TXFULL));
+	set_reg(UART_REG_RXTX, ch);
+}
+
+static int rvcpu_uart_getc(void)
+{
+	if (get_reg(UART_REG_RXEMPTY))
+		return -1;
+	return get_reg(UART_REG_RXTX);
+}
+
+static struct sbi_console_device rvcpu_console = {
+	.name = "rvcpu_uart",
+	.console_putc = rvcpu_uart_putc,
+	.console_getc = rvcpu_uart_getc
+};
+
+int rvcpu_uart_init(unsigned long base)
+{
+	uart_base = (volatile u32 *)base;
+	sbi_console_set_device(&rvcpu_console);
+	return 0;
+}
diff --git a/platform/rvcpu/Kconfig b/platform/rvcpu/Kconfig
new file mode 100644
index 00000000000..82caf72aea1
--- /dev/null
+++ b/platform/rvcpu/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+#
+# All mandatory drivers or libraries for this platform should
+# be directly selected by the PLATFORM_xyz kconfig symbol.
+#
+# All optional drivers or libraries for this platform should
+# be enabled via configs/defconfig of this platform.
+#
+config PLATFORM_RVCPU
+	bool
+	select IPI_MSWI
+	select IRQCHIP_PLIC
+	select SERIAL_RVCPU
+	select TIMER_MTIMER
+	default y
diff --git a/platform/rvcpu/configs/defconfig b/platform/rvcpu/configs/defconfig
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/rvcpu/objects.mk b/platform/rvcpu/objects.mk
new file mode 100644
index 00000000000..88eb1beaeca
--- /dev/null
+++ b/platform/rvcpu/objects.mk
@@ -0,0 +1,99 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+#
+
+# Compiler pre-processor flags
+platform-cppflags-y =
+
+# C Compiler and assembler flags.
+platform-cflags-y =
+platform-asflags-y =
+
+# Linker flags: additional libraries and object files that the platform
+# code needs can be added here
+platform-ldflags-y =
+
+#
+# Command for platform specific "make run"
+# Useful for development and debugging on plaftform simulator (such as QEMU)
+#
+# platform-runcmd = your_platform_run.sh
+
+#
+# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
+# These are optional parameters but platforms can optionaly provide it.
+# Some of these are guessed based on GCC compiler capabilities
+#
+PLATFORM_RISCV_XLEN = 32
+PLATFORM_RISCV_ABI = ilp32
+PLATFORM_RISCV_ISA = rv32ima_zicsr_zifencei_zicntr
+PLATFORM_RISCV_CODE_MODEL = medany
+
+# Space separated list of object file names to be compiled for the platform
+platform-objs-y += platform.o
+
+#
+# If the platform support requires a builtin device tree file, the name of
+# the device tree compiled file should be specified here. The device tree
+# source file be in the form <dt file name>.dts
+#
+# platform-objs-y += <dt file name>.o
+
+# Optional parameter for path to external FDT
+# FW_FDT_PATH="path to platform flattened device tree file"
+
+#
+# Dynamic firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_DYNAMIC=n
+
+#
+# Jump firmware configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_JUMP=n
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+# ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# FW_JUMP_OFFSET=0x400000
+# else
+# FW_JUMP_OFFSET=0x200000
+# endif
+# FW_JUMP_FDT_OFFSET=0x2200000
+#
+# You can use fixed address for jump firmware as an alternative option.
+# SBI will prefer "<X>_ADDR" if both "<X>_ADDR" and "<X>_OFFSET" are
+# defined
+# ifeq ($(PLATFORM_RISCV_XLEN), 32)
+# FW_JUMP_ADDR=0x80400000
+# else
+# FW_JUMP_ADDR=0x80200000
+# endif
+# FW_JUMP_FDT_ADDR=0x82200000
+
+#
+# Firmware with payload configuration.
+# Optional parameters are commented out. Uncomment and define these parameters
+# as needed.
+#
+FW_PAYLOAD=y
+# This needs to be 4MB aligned for 32-bit support
+# This needs to be 2MB aligned for 64-bit support
+ifeq ($(PLATFORM_RISCV_XLEN), 32)
+FW_PAYLOAD_OFFSET=0x400000
+else
+FW_PAYLOAD_OFFSET=0x200000
+endif
+# FW_PAYLOAD_ALIGN=0x1000
+# FW_PAYLOAD_PATH="path to next boot stage binary image file"
+# FW_PAYLOAD_FDT_OFFSET=0x2200000
+#
+# You can use fixed address for payload firmware as an alternative option.
+# SBI will prefer "FW_PAYLOAD_FDT_ADDR" if both "FW_PAYLOAD_FDT_OFFSET"
+# and "FW_PAYLOAD_FDT_ADDR" are defined.
+# FW_PAYLOAD_FDT_ADDR=0x82200000
diff --git a/platform/rvcpu/platform.c b/platform/rvcpu/platform.c
new file mode 100644
index 00000000000..e22b715d645
--- /dev/null
+++ b/platform/rvcpu/platform.c
@@ -0,0 +1,124 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_platform.h>
+
+/*
+ * Include these files as needed.
+ * See objects.mk PLATFORM_xxx configuration parameters.
+ */
+#include <sbi_utils/ipi/aclint_mswi.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/rvcpu-uart.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
+
+#define PLATFORM_PLIC_ADDR          0xc000000
+#define PLATFORM_PLIC_SIZE          (0x200000 + (PLATFORM_HART_COUNT * 0x1000))
+#define PLATFORM_PLIC_NUM_SOURCES   1
+#define PLATFORM_HART_COUNT         1
+#define PLATFORM_CLINT_ADDR         0x2000000
+#define PLATFORM_ACLINT_MTIMER_FREQ 10000000
+#define PLATFORM_ACLINT_MSWI_ADDR   (PLATFORM_CLINT_ADDR + CLINT_MSWI_OFFSET)
+#define PLATFORM_ACLINT_MTIMER_ADDR (PLATFORM_CLINT_ADDR + CLINT_MTIMER_OFFSET)
+#define PLATFORM_UART_ADDR          0x10000000
+
+static struct plic_data plic = {
+    .addr = PLATFORM_PLIC_ADDR,
+    .size = PLATFORM_PLIC_SIZE,
+    .num_src = PLATFORM_PLIC_NUM_SOURCES,
+	.context_map = {
+		[0] = { 0, 1 },
+	},
+};
+
+static struct aclint_mswi_data mswi = {
+    .addr = PLATFORM_ACLINT_MSWI_ADDR,
+    .size = ACLINT_MSWI_SIZE,
+    .first_hartid = 0,
+    .hart_count = PLATFORM_HART_COUNT,
+};
+
+static struct aclint_mtimer_data mtimer = {
+    .mtime_freq = PLATFORM_ACLINT_MTIMER_FREQ,
+    .mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR + ACLINT_DEFAULT_MTIME_OFFSET,
+    .mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+    .mtimecmp_addr = PLATFORM_ACLINT_MTIMER_ADDR + ACLINT_DEFAULT_MTIMECMP_OFFSET,
+    .mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
+    .first_hartid = 0,
+    .hart_count = PLATFORM_HART_COUNT,
+    .has_64bit_mmio = false,
+};
+
+/*
+ * Platform early initialization.
+ */
+static int platform_early_init(bool cold_boot)
+{
+    if (!cold_boot)
+        return 0;
+
+    return rvcpu_uart_init(PLATFORM_UART_ADDR);
+}
+
+/*
+ * Platform final initialization.
+ */
+static int platform_final_init(bool cold_boot)
+{
+    return 0;
+}
+
+/*
+ * Initialize the platform interrupt controller during cold boot.
+ */
+static int platform_irqchip_init(void)
+{
+    /* Example if the generic PLIC driver is used */
+    return plic_cold_irqchip_init(&plic);
+}
+
+/*
+ * Initialize IPI during cold boot.
+ */
+static int platform_ipi_init(void)
+{
+    /* Example if the generic ACLINT driver is used */
+    return aclint_mswi_cold_init(&mswi);
+}
+
+/*
+ * Initialize platform timer during cold boot.
+ */
+static int platform_timer_init(void)
+{
+    /* Example if the generic ACLINT driver is used */
+    return aclint_mtimer_cold_init(&mtimer, NULL);
+}
+
+/*
+ * Platform descriptor.
+ */
+const struct sbi_platform_operations platform_ops = {
+    .early_init         = platform_early_init,
+    .final_init         = platform_final_init,
+    .irqchip_init       = platform_irqchip_init,
+    .ipi_init           = platform_ipi_init,
+    .timer_init         = platform_timer_init
+};
+
+const struct sbi_platform platform = {
+    .opensbi_version    = OPENSBI_VERSION,
+    .platform_version   = SBI_PLATFORM_VERSION(0x0, 0x00),
+    .name               = "isct,rvcpu",
+    .features           = SBI_PLATFORM_DEFAULT_FEATURES,
+    .hart_count         = 1,
+    .hart_stack_size    = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+    .heap_size          = SBI_PLATFORM_DEFAULT_HEAP_SIZE(1),
+    .platform_ops_addr  = (unsigned long)&platform_ops
+};

From 16a4214f6cb36a83d52847d1e5b2d9183d57a15d Mon Sep 17 00:00:00 2001
From: offnaria <yamada@arch.cs.titech.ac.jp>
Date: Sun, 8 Dec 2024 00:19:22 +0900
Subject: [PATCH 1764/1765] Increase the max number of harts.

---
 platform/rvcpu/platform.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/rvcpu/platform.c b/platform/rvcpu/platform.c
index e22b715d645..38f41188730 100644
--- a/platform/rvcpu/platform.c
+++ b/platform/rvcpu/platform.c
@@ -21,7 +21,7 @@
 #define PLATFORM_PLIC_ADDR          0xc000000
 #define PLATFORM_PLIC_SIZE          (0x200000 + (PLATFORM_HART_COUNT * 0x1000))
 #define PLATFORM_PLIC_NUM_SOURCES   1
-#define PLATFORM_HART_COUNT         1
+#define PLATFORM_HART_COUNT         8
 #define PLATFORM_CLINT_ADDR         0x2000000
 #define PLATFORM_ACLINT_MTIMER_FREQ 10000000
 #define PLATFORM_ACLINT_MSWI_ADDR   (PLATFORM_CLINT_ADDR + CLINT_MSWI_OFFSET)
@@ -117,8 +117,8 @@ const struct sbi_platform platform = {
     .platform_version   = SBI_PLATFORM_VERSION(0x0, 0x00),
     .name               = "isct,rvcpu",
     .features           = SBI_PLATFORM_DEFAULT_FEATURES,
-    .hart_count         = 1,
+    .hart_count         = PLATFORM_HART_COUNT,
     .hart_stack_size    = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
-    .heap_size          = SBI_PLATFORM_DEFAULT_HEAP_SIZE(1),
+    .heap_size          = SBI_PLATFORM_DEFAULT_HEAP_SIZE(PLATFORM_HART_COUNT),
     .platform_ops_addr  = (unsigned long)&platform_ops
 };

From 9a070de5b866d8aab3f3e994bc980a39e3858ab1 Mon Sep 17 00:00:00 2001
From: offnaria <yamada@arch.cs.titech.ac.jp>
Date: Sun, 8 Dec 2024 02:05:19 +0900
Subject: [PATCH 1765/1765] Add context maps for multicore.

---
 platform/rvcpu/platform.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/platform/rvcpu/platform.c b/platform/rvcpu/platform.c
index 38f41188730..d5a1d0da531 100644
--- a/platform/rvcpu/platform.c
+++ b/platform/rvcpu/platform.c
@@ -33,7 +33,14 @@ static struct plic_data plic = {
     .size = PLATFORM_PLIC_SIZE,
     .num_src = PLATFORM_PLIC_NUM_SOURCES,
 	.context_map = {
-		[0] = { 0, 1 },
+		[0] = {  0,  1 },
+		[1] = {  2,  3 },
+		[2] = {  4,  5 },
+		[3] = {  6,  7 },
+		[4] = {  8,  9 },
+		[5] = { 10, 11 },
+		[6] = { 12, 13 },
+		[7] = { 14, 15 },
 	},
 };