sched/signal: Add support to disable signals

arch/arm/src/arm/CMakeLists.txt

@@ -29,8 +29,6 @@ list(
   arm_doirq.c
   arm_initialstate.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
@@ -39,6 +37,10 @@ list(
   arm_vectortab.S
   arm_saveusercontext.S)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_PAGING)
   list(APPEND SRCS arm_pginitialize.c arm_checkmapping.c arm_allocpage.c
        arm_va2pte.c)

arch/arm/src/arm/Make.defs

@@ -27,8 +27,8 @@ include common/Make.defs
 HEAD_ASRC  = arm_head.S
 
 CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_initialstate.c
-CMN_CSRCS += arm_prefetchabort.c arm_schedulesigaction.c
-CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_tcbinfo.c
+CMN_CSRCS += arm_prefetchabort.c
+CMN_CSRCS += arm_syscall.c arm_tcbinfo.c
 CMN_CSRCS += arm_undefinedinsn.c
 
 CMN_ASRCS += arm_cache.S arm_vectors.S arm_vectortab.S
@@ -37,3 +37,7 @@ CMN_ASRCS += arm_saveusercontext.S
 ifeq ($(CONFIG_LEGACY_PAGING),y)
   CMN_CSRCS += arm_pginitialize.c arm_checkmapping.c arm_allocpage.c arm_va2pte.c
 endif
+
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif

arch/arm/src/armv6-m/CMakeLists.txt

@@ -27,14 +27,16 @@ set(SRCS
     arm_doirq.c
     arm_hardfault.c
     arm_initialstate.c
-    arm_schedulesigaction.c
-    arm_sigdeliver.c
     arm_svcall.c
     arm_systemreset.c
     arm_tcbinfo.c
     arm_trigger_irq.c
     arm_vectors.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if((DEFINED CONFIG_DEBUG_FEATURES AND CONFIG_DEBUG_FEATURES)
    OR (DEFINED CONFIG_ARM_COREDUMP_REGION AND CONFIG_ARM_COREDUMP_REGION))
   list(APPEND SRCS arm_dumpnvic.c)

arch/arm/src/armv6-m/Make.defs

@@ -27,10 +27,14 @@ include common/Make.defs
 CMN_ASRCS += arm_exception.S arm_saveusercontext.S
 
 CMN_CSRCS += arm_cpuinfo.c arm_doirq.c arm_hardfault.c arm_initialstate.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_svcall.c
+CMN_CSRCS += arm_svcall.c
 CMN_CSRCS += arm_systemreset.c arm_tcbinfo.c
 CMN_CSRCS += arm_trigger_irq.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
   CMN_CSRCS += arm_vectors.c
 endif

arch/arm/src/armv6-m/arm_doirq.c

@@ -86,12 +86,14 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
       irq_dispatch(irq, regs);
 #endif
+#ifndef CONFIG_DISABLE_SIGNALS
       if (tcb->sigdeliver)
         {
           /* Pendsv able to access running tcb with no critical section */
 
           up_schedule_sigaction(tcb);
         }
+#endif
 
       up_irq_save();
     }

arch/arm/src/armv7-a/CMakeLists.txt

@@ -43,14 +43,16 @@ list(
   arm_initialstate.c
   arm_mmu.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
   arm_perf.c
   cp15_cacheops.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_ARMV7A_GICv2M)
   list(APPEND SRCS arm_gicv2m.c)
 endif()

arch/arm/src/armv7-a/Make.defs

@@ -38,10 +38,13 @@ CMN_ASRCS += arm_cpuhead.S arm_vectors.S arm_saveusercontext.S
 CMN_CSRCS += arm_cache.c arm_cpuinfo.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c
 CMN_CSRCS += arm_initialstate.c arm_mmu.c arm_prefetchabort.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
 CMN_CSRCS += arm_perf.c cp15_cacheops.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_ARMV7A_GICv2M),y)
   CMN_CSRCS += arm_gicv2m.c
 endif

arch/arm/src/armv7-m/CMakeLists.txt

@@ -35,8 +35,6 @@ set(SRCS
     arm_itm.c
     arm_memfault.c
     arm_perf.c
-    arm_schedulesigaction.c
-    arm_sigdeliver.c
     arm_svcall.c
     arm_systemreset.c
     arm_tcbinfo.c
@@ -45,6 +43,10 @@ set(SRCS
     arm_vectors.c
     arm_dbgmonitor.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_ARMV7M_SYSTICK)
   list(APPEND SRCS arm_systick.c)
 endif()

arch/arm/src/armv7-m/Make.defs

@@ -29,10 +29,13 @@ CMN_ASRCS += arm_exception.S arm_saveusercontext.S
 CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c
 CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c
 CMN_CSRCS += arm_memfault.c arm_perf.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_tcbinfo.c
 CMN_CSRCS += arm_trigger_irq.c arm_usagefault.c arm_dbgmonitor.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
   CMN_CSRCS += arm_vectors.c
 endif

arch/arm/src/armv7-m/arm_doirq.c

@@ -86,12 +86,15 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
       irq_dispatch(irq, regs);
 #endif
+
+#ifndef CONFIG_DISABLE_SIGNALS
       if (tcb->sigdeliver)
         {
           /* Pendsv able to access running tcb with no critical section */
 
           up_schedule_sigaction(tcb);
         }
+#endif
 
       up_irq_save();
     }

arch/arm/src/armv7-r/CMakeLists.txt

@@ -39,14 +39,16 @@ list(
   arm_doirq.c
   arm_initialstate.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
   arm_perf.c
   cp15_cacheops.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(NOT CONFIG_ARCH_CHIP STREQUAL tms570)
   list(APPEND SRCS arm_gicv2.c arm_gicv2_dump.c)
 endif()

arch/arm/src/armv7-r/Make.defs

@@ -34,14 +34,17 @@ HEAD_ASRC += arm_vectortab.S
 CMN_CSRCS += arm_cache.c arm_cpuinfo.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c
 CMN_CSRCS += arm_initialstate.c arm_prefetchabort.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
 CMN_CSRCS += arm_perf.c cp15_cacheops.c
 
 # Common C source files
 
 CMN_ASRCS += arm_head.S arm_vectors.S arm_saveusercontext.S
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_ARMV7R_HAVE_PTM), y)
   CMN_CSRCS += arm_timer.c
 endif

arch/arm/src/armv8-m/CMakeLists.txt

@@ -34,17 +34,19 @@ set(SRCS
     arm_memfault.c
     arm_perf.c
     arm_sau.c
-    arm_schedulesigaction.c
     arm_securefault.c
     arm_secure_irq.c
-    arm_sigdeliver.c
     arm_svcall.c
     arm_systemreset.c
     arm_tcbinfo.c
     arm_trigger_irq.c
     arm_usagefault.c
     arm_vectors.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_ARMV8M_SYSTICK)
   list(APPEND SRCS arm_systick.c)
 endif()

arch/arm/src/armv8-m/Make.defs

@@ -29,11 +29,15 @@ CMN_ASRCS += arm_exception.S arm_saveusercontext.S
 CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c
 CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c
 CMN_CSRCS += arm_memfault.c arm_perf.c arm_sau.c
-CMN_CSRCS += arm_schedulesigaction.c arm_securefault.c arm_secure_irq.c
-CMN_CSRCS += arm_sigdeliver.c arm_svcall.c
+CMN_CSRCS += arm_securefault.c arm_secure_irq.c
+CMN_CSRCS += arm_svcall.c
 CMN_CSRCS += arm_systemreset.c arm_tcbinfo.c
 CMN_CSRCS += arm_trigger_irq.c arm_usagefault.c arm_dbgmonitor.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_HAVE_CUSTOM_VECTORS),y)
   CMN_CSRCS += arm_vectors.c
 endif

arch/arm/src/armv8-m/arm_doirq.c

@@ -97,12 +97,15 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
       irq_dispatch(irq, regs);
 #endif
+
+#ifndef CONFIG_DISABLE_SIGNALS
       if (tcb->sigdeliver)
         {
           /* Pendsv able to access running tcb with no critical section */
 
           up_schedule_sigaction(tcb);
         }
+#endif
 
       up_irq_save();
     }

arch/arm/src/armv8-r/CMakeLists.txt

@@ -41,14 +41,16 @@ list(
   arm_gicv3.c
   arm_initialstate.c
   arm_prefetchabort.c
-  arm_schedulesigaction.c
-  arm_sigdeliver.c
   arm_syscall.c
   arm_tcbinfo.c
   arm_undefinedinsn.c
   arm_perf.c
   cp15_cacheops.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm_schedulesigaction.c arm_sigdeliver.c)
+endif()
+
 if(CONFIG_ARCH_FPU)
   list(APPEND SRCS arm_fpucmp.c arm_fpuconfig.S)
 endif()

arch/arm/src/armv8-r/Make.defs

@@ -34,7 +34,6 @@ HEAD_ASRC += arm_vectortab.S
 CMN_CSRCS += arm_timer.c arm_cache.c arm_cpuinfo.c arm_dataabort.c
 CMN_CSRCS += arm_doirq.c arm_gicv3.c
 CMN_CSRCS += arm_initialstate.c arm_prefetchabort.c
-CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
 CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
 CMN_CSRCS += arm_perf.c cp15_cacheops.c
 
@@ -46,6 +45,10 @@ CMN_ASRCS += arm_head.S arm_vectors.S arm_saveusercontext.S
 #   CMN_CSRCS += arm_mpu.c
 # endif
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_ARCH_FPU),y)
   CMN_CSRCS += arm_fpucmp.c
   CMN_ASRCS += arm_fpuconfig.S

arch/arm/src/tlsr82/tc32/Make.defs

@@ -48,8 +48,6 @@ CMN_ASRCS := $(filter-out $(TC32_ASRCS_FILTER), $(CMN_ASRCS))
 
 # Common files in arch/arm/src/armv6-m
 
-CMN_CSRCS += arm_sigdeliver.c
-
 # Common files in arch/arm/src/tlsr82/tc32
 
 CMN_ASRCS += tc32_fullcontextrestore.S tc32_switchcontext.S
@@ -58,6 +56,10 @@ CMN_ASRCS += tc32_saveusercontext.S tc32_exception.S
 CMN_CSRCS += tc32_doirq.c tc32_initialstate.c tc32_schedulesigaction.c
 CMN_CSRCS += tc32_syscall.c tc32_udelay.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=tc32_schedulesigaction.c arm_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
   CMN_CSRCS += tc32_backtrace.c
 endif

arch/arm64/src/common/CMakeLists.txt

@@ -32,7 +32,6 @@ list(APPEND SRCS arm64_initialize.c arm64_initialstate.c arm64_boot.c)
 list(APPEND SRCS arm64_nputs.c arm64_createstack.c)
 list(APPEND SRCS arm64_releasestack.c arm64_stackframe.c arm64_usestack.c)
 list(APPEND SRCS arm64_exit.c arm64_fork.c)
-list(APPEND SRCS arm64_schedulesigaction.c arm64_sigdeliver.c)
 list(APPEND SRCS arm64_getintstack.c arm64_registerdump.c)
 list(APPEND SRCS arm64_perf.c arm64_tcbinfo.c)
 
@@ -44,6 +43,10 @@ list(APPEND SRCS arm64_syscall.c)
 # Use common heap allocation for now (may need to be customized later)
 list(APPEND SRCS arm64_allocateheap.c)
 
+if(NOT CONFIG_DISABLE_SIGNALS)
+  list(APPEND SRCS arm64_schedulesigaction.c arm64_sigdeliver.c)
+endif()
+
 if(NOT CONFIG_ARCH_IDLE_CUSTOM)
   list(APPEND SRCS arm64_idle.c)
 endif()

arch/arm64/src/common/Make.defs

@@ -39,7 +39,6 @@ CMN_CSRCS =  arm64_initialize.c arm64_initialstate.c arm64_boot.c
 CMN_CSRCS += arm64_nputs.c arm64_createstack.c
 CMN_CSRCS += arm64_releasestack.c arm64_stackframe.c arm64_usestack.c
 CMN_CSRCS += arm64_exit.c arm64_fork.c
-CMN_CSRCS += arm64_schedulesigaction.c arm64_sigdeliver.c
 CMN_CSRCS += arm64_getintstack.c arm64_registerdump.c
 CMN_CSRCS += arm64_perf.c arm64_tcbinfo.c
 
@@ -53,6 +52,10 @@ CMN_CSRCS += arm64_hwdebug.c
 # Use common heap allocation for now (may need to be customized later)
 CMN_CSRCS += arm64_allocateheap.c
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=arm64_schedulesigaction.c arm64_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
   CMN_CSRCS += arm64_idle.c
 endif

arch/avr/src/at32uc3/Make.defs

@@ -30,7 +30,7 @@ CMN_ASRCS  = avr_exceptions.S avr_fullcontextrestore.S avr_doswitch.S avr_saveus
 CMN_CSRCS  = avr_allocateheap.c avr_copystate.c avr_createstack.c avr_exit.c
 CMN_CSRCS += avr_initialize.c avr_initialstate.c avr_idle.c
 CMN_CSRCS += avr_modifyreg8.c avr_modifyreg16.c avr_modifyreg32.c avr_releasestack.c
-CMN_CSRCS += avr_schedulesigaction.c avr_sigdeliver.c avr_stackframe.c avr_switchcontext.c
+CMN_CSRCS += avr_stackframe.c avr_switchcontext.c
 CMN_CSRCS += avr_usestack.c avr_doirq.c avr_nputs.c avr_registerdump.c avr_getintstack.c
 
 # Required AT32UC3 files
@@ -40,6 +40,10 @@ CHIP_CSRCS += at32uc3_lowconsole.c at32uc3_lowinit.c at32uc3_serial.c
 
 # Configuration-dependent AT32UC3 files
 
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+  CMN_CSRCS +=avr_schedulesigaction.c avr_sigdeliver.c
+endif
+
 ifneq ($(CONFIG_SCHED_TICKLESS),y)
 CHIP_CSRCS += at32uc3_timerisr.c
 endif