From 1bcaacd5cc5413352bd5b7a89ff8bfe1469f0781 Mon Sep 17 00:00:00 2001 From: jerryslhao Date: Wed, 8 Jan 2025 09:50:22 +0800 Subject: [PATCH] arch/arm/stm32: fix stm32g4 enable pll code. In the file stm32g474xxxx_rcc.c, the enable PLL code, according to the intent of the comment, wants to keep the reserved bit, but the code clears the reserved bit. Signed-off-by: jerryslhao --- arch/arm/src/stm32/stm32g4xxxx_rcc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32g4xxxx_rcc.c b/arch/arm/src/stm32/stm32g4xxxx_rcc.c index bc1b6303b533e..ed213cb0c1f97 100644 --- a/arch/arm/src/stm32/stm32g4xxxx_rcc.c +++ b/arch/arm/src/stm32/stm32g4xxxx_rcc.c @@ -702,7 +702,7 @@ static inline bool stm32_rcc_enablepll(void) /* Preserve reserved bits when altering the PLLCFGR register */ regval = getreg32(STM32_RCC_PLLCFGR); - regval &= ~(RCC_PLLCFGR_RESERVED_MASK); + regval &= RCC_PLLCFGR_RESERVED_MASK; /* Configure PLL source and enables */