diff --git a/doc/changelog.d/1636.added.md b/doc/changelog.d/1636.added.md new file mode 100644 index 0000000000..3770a362b5 --- /dev/null +++ b/doc/changelog.d/1636.added.md @@ -0,0 +1 @@ +Siwave valcheck diff --git a/src/pyedb/generic/process.py b/src/pyedb/generic/process.py index cf07ec72a0..1b539f96c7 100644 --- a/src/pyedb/generic/process.py +++ b/src/pyedb/generic/process.py @@ -45,6 +45,13 @@ def __siwave_ng_exe_path(self): full_path = Path(self._pedb.ansys_em_path) / executable return str(full_path) + @property + def __siwave_valcheck_exe_path(self): + executable = "siwavevalchk" + executable = executable if is_linux else executable + ".exe" + full_path = Path(self._pedb.ansys_em_path) / executable + return str(full_path) + def __create_exec(self, type): base = os.path.splitext(self._pedb.edbpath)[0] txt_path = base + ".txt" @@ -52,21 +59,56 @@ def __create_exec(self, type): with open(txt_path, "w") as file: if type: if type == "DCIR": - file.write("ExecDcSim") + file.write("ExecDcSim\n") elif type == "SYZ": - file.write("ExecSyzSim") + file.write("ExecSyzSim\n") elif type == "CPA": - file.write("ExecSentinelCpaSim") + file.write("ExecSentinelCpaSim\n") elif type == "TimeCrosstalk": - file.write("ExecTimeDomainCrosstalkSim") + file.write("ExecTimeDomainCrosstalkSim\n") elif type == "FreqCrosstalk": - file.write("ExecCrosstalkSim") + file.write("ExecCrosstalkSim\n") elif type == "Impedance": - file.write("ExecZ0Sim") + file.write("ExecZ0Sim\n") os.rename(txt_path, exec_path) return exec_path + def __create_valcheck_exec(self, type, num_core): + base = os.path.splitext(self._pedb.edbpath)[0] + txt_path = base + ".txt" + exec_path = base + ".exec" + with open(txt_path, "w") as file: + file.write(f"ValidationMode {type}\n") + file.write("FixSelfIntersections\n") + file.write("FixDisjointNets\n") + file.write("CheckForShortedNets\n") + file.write("FixOverlappingVias\n") + file.write("CheckForBondwireErrors\n") + file.write("FixMisalignments\n") + file.write("FixFloatingPlanes") + file.write("CheckForUnreferencedTraces\n") + file.write("IgnoreNonFunctionalPads\n") + file.write(f"SetNumCpus {num_core}\n") + file.write("CorrectAllFixableIssues\n") + file.write("StrictDisjointNetCheck\n") + file.write("SaveSiw\n D:\\Temp\\test_valcheck\\test.siw\n") + os.rename(txt_path, exec_path) + return exec_path + + def run_siwave_validation(self, edbpath: str, validation_type: str = "SYZ", num_core=4): + command = [ + self.__siwave_valcheck_exe_path, + edbpath, + self.__create_valcheck_exec(type=validation_type, num_core=num_core), + "-formatOutput", + "-useSubdir", + ] + try: + subprocess.run(command, check=True) # nosec + except subprocess.CalledProcessError as e: # nosec + raise RuntimeError(f"An error occurred when launching the solver. Please check input paths") from e + def solve_siwave(self, edbpath, analysis_type): """Solve an SIWave setup. Only non-graphical batch mode is supported.