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ports: mimxrt: Restructure nxp_sdk to match official mcux-sdk.
The official mcux-sdk follows a slightly different structure to the current nxp_sdk submodule, with many drivers moved to a common location. To ease updating the newer versions of the SDK and/or add new families the nxp_sdk submodule has been updated to follow the structure of mcux-sdk, just trimmed down to families used here to considerably reduce the size. Signed-off-by: Andrew Leech <[email protected]>
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13 files changed

+280
-199
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13 files changed

+280
-199
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‎.gitmodules‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@
3535
url = https://github.com/bluekitchen/btstack.git
3636
[submodule "lib/nxp_driver"]
3737
path = lib/nxp_driver
38-
url = https://github.com/hathach/nxp_driver.git
38+
url = https://github.com/andrewleech/nxp_driver.git
3939
[submodule "lib/libhydrogen"]
4040
path = lib/libhydrogen
4141
url = https://github.com/jedisct1/libhydrogen.git

‎lib/nxp_driver‎

Submodule nxp_driver updated 3170 files

‎ports/mimxrt/Makefile‎

Lines changed: 81 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,8 @@ include $(TOP)/py/py.mk
5151
include $(TOP)/extmod/extmod.mk
5252

5353
# Set SDK directory based on MCU_SERIES
54-
MCU_DIR = lib/nxp_driver/sdk/devices/$(MCU_SERIES)
54+
MCUX_SDK_DIR = lib/nxp_driver/sdk
55+
MCU_DIR = $(MCUX_SDK_DIR)/devices/$(MCU_SERIES)
5556

5657
# Select linker scripts based on MCU_SERIES
5758
LD_FILES = boards/$(MCU_SERIES).ld boards/common.ld
@@ -71,8 +72,6 @@ GEN_PINS_SRC = $(BUILD)/pins_gen.c
7172
INC += -I$(BOARD_DIR)
7273
INC += -I$(BUILD)
7374
INC += -I$(TOP)
74-
INC += -I$(TOP)/$(MCU_DIR)
75-
INC += -I$(TOP)/$(MCU_DIR)/drivers
7675
INC += -I$(TOP)/lib/cmsis/inc
7776
INC += -I$(TOP)/lib/oofatfs
7877
INC += -I$(TOP)/lib/tinyusb/hw
@@ -109,36 +108,39 @@ SRC_TINYUSB_C += \
109108
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
110109
ifeq ($(MICROPY_PY_LWIP),1)
111110
SRC_ETH_C += \
112-
$(MCU_DIR)/drivers/fsl_enet.c \
111+
$(MCUX_SDK_DIR)/drivers/enet/fsl_enet.c \
113112
hal/phy/device/phydp83825/fsl_phydp83825.c \
114113
hal/phy/device/phydp83848/fsl_phydp83848.c \
115114
hal/phy/device/phyksz8081/fsl_phyksz8081.c \
116115
hal/phy/device/phylan8720/fsl_phylan8720.c \
117116
hal/phy/device/phyrtl8211f/fsl_phyrtl8211f.c \
118117
hal/phy/mdio/enet/fsl_enet_mdio.c
118+
119+
INC_HAL_IMX += \
120+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/enet
119121
endif
120122

121123
# NXP SDK sources
122124
SRC_HAL_IMX_C += \
123125
$(MCU_DIR)/drivers/fsl_clock.c \
124-
$(MCU_DIR)/drivers/fsl_common.c \
125-
$(MCU_DIR)/drivers/fsl_dmamux.c \
126-
$(MCU_DIR)/drivers/fsl_edma.c \
127-
$(MCU_DIR)/drivers/fsl_flexram.c \
128-
$(MCU_DIR)/drivers/fsl_flexspi.c \
129-
$(MCU_DIR)/drivers/fsl_gpc.c \
130-
$(MCU_DIR)/drivers/fsl_gpio.c \
131-
$(MCU_DIR)/drivers/fsl_gpt.c \
132-
$(MCU_DIR)/drivers/fsl_lpi2c.c \
133-
$(MCU_DIR)/drivers/fsl_lpspi.c \
134-
$(MCU_DIR)/drivers/fsl_lpspi_edma.c \
135-
$(MCU_DIR)/drivers/fsl_lpuart.c \
136-
$(MCU_DIR)/drivers/fsl_pit.c \
137-
$(MCU_DIR)/drivers/fsl_pwm.c \
138-
$(MCU_DIR)/drivers/fsl_sai.c \
139-
$(MCU_DIR)/drivers/fsl_snvs_hp.c \
140-
$(MCU_DIR)/drivers/fsl_snvs_lp.c \
141-
$(MCU_DIR)/drivers/fsl_wdog.c \
126+
$(MCUX_SDK_DIR)/drivers/common/fsl_common.c \
127+
$(MCUX_SDK_DIR)/drivers/common/fsl_common_arm.c \
128+
$(MCUX_SDK_DIR)/drivers/dmamux/fsl_dmamux.c \
129+
$(MCUX_SDK_DIR)/drivers/edma/fsl_edma.c \
130+
$(MCUX_SDK_DIR)/drivers/flexram/fsl_flexram.c \
131+
$(MCUX_SDK_DIR)/drivers/flexspi/fsl_flexspi.c \
132+
$(MCUX_SDK_DIR)/drivers/igpio/fsl_gpio.c \
133+
$(MCUX_SDK_DIR)/drivers/gpt/fsl_gpt.c \
134+
$(MCUX_SDK_DIR)/drivers/lpi2c/fsl_lpi2c.c \
135+
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi.c \
136+
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi_edma.c \
137+
$(MCUX_SDK_DIR)/drivers/lpuart/fsl_lpuart.c \
138+
$(MCUX_SDK_DIR)/drivers/pit/fsl_pit.c \
139+
$(MCUX_SDK_DIR)/drivers/pwm/fsl_pwm.c \
140+
$(MCUX_SDK_DIR)/drivers/sai/fsl_sai.c \
141+
$(MCUX_SDK_DIR)/drivers/snvs_hp/fsl_snvs_hp.c \
142+
$(MCUX_SDK_DIR)/drivers/snvs_lp/fsl_snvs_lp.c \
143+
$(MCUX_SDK_DIR)/drivers/wdog01/fsl_wdog.c \
142144
$(MCU_DIR)/system_$(MCU_SERIES)$(MCU_CORE).c \
143145

144146
# Use a specific boot header for 1062 so the Teensy loader doesn't erase the filesystem.
@@ -148,39 +150,81 @@ else
148150
SRC_HAL_IMX_C += $(MCU_DIR)/xip/fsl_flexspi_nor_boot.c
149151
endif
150152

153+
INC_HAL_IMX += \
154+
-I$(TOP)/$(MCU_DIR) \
155+
-I$(TOP)/$(MCU_DIR)/drivers \
156+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/common \
157+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/dmamux \
158+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/edma \
159+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexram \
160+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexspi \
161+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/igpio \
162+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpt \
163+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpi2c \
164+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpspi \
165+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpuart \
166+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pit \
167+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pwm \
168+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/sai \
169+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_hp \
170+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_lp \
171+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/wdog01 \
172+
151173
ifeq ($(MICROPY_HW_SDRAM_AVAIL),1)
152-
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_semc.c
174+
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/semc/fsl_semc.c
175+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/semc
153176
endif
154177

155178
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
156-
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_usdhc.c
179+
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/usdhc/fsl_usdhc.c
180+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/usdhc
157181
endif
158182

159183
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1015 MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
160184
SRC_HAL_IMX_C += \
161-
$(MCU_DIR)/drivers/fsl_qtmr.c \
185+
$(MCUX_SDK_DIR)/drivers/qtmr_1/fsl_qtmr.c \
162186
$(MCU_DIR)/drivers/fsl_romapi.c
187+
188+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/qtmr_1
163189
endif
164190

165191
ifeq ($(MCU_SERIES), MIMXRT1176)
166-
INC += -I$(TOP)/$(MCU_DIR)/drivers/cm7
167-
168192
SRC_HAL_IMX_C += \
169193
$(MCU_DIR)/drivers/cm7/fsl_cache.c \
170194
$(MCU_DIR)/drivers/fsl_dcdc.c \
171195
$(MCU_DIR)/drivers/fsl_pmu.c \
172-
$(MCU_DIR)/drivers/fsl_common_arm.c \
173196
$(MCU_DIR)/drivers/fsl_anatop_ai.c \
174-
$(MCU_DIR)/drivers/fsl_caam.c \
175-
$(MCU_DIR)/drivers/fsl_lpadc.c \
176-
$(MCU_DIR)/drivers/fsl_mu.c
197+
$(MCU_DIR)/drivers/fsl_soc_src.c \
198+
$(MCU_DIR)/drivers/fsl_gpc.c \
199+
$(MCUX_SDK_DIR)/drivers/caam/fsl_caam.c \
200+
$(MCUX_SDK_DIR)/drivers/lpadc/fsl_lpadc.c \
201+
$(MCUX_SDK_DIR)/drivers/mu/fsl_mu.c
202+
203+
INC_HAL_IMX += \
204+
-I$(TOP)/$(MCU_DIR)/drivers/cm7 \
205+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/caam \
206+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpadc \
207+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/mu
208+
209+
CFLAGS += -DCACHE_MODE_WRITE_THROUGH=1
177210
else
178211
SRC_HAL_IMX_C += \
179-
$(MCU_DIR)/drivers/fsl_adc.c \
180-
$(MCU_DIR)/drivers/fsl_cache.c \
181-
$(MCU_DIR)/drivers/fsl_trng.c
212+
$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar/fsl_adc.c \
213+
$(MCUX_SDK_DIR)/drivers/cache/armv7-m7/fsl_cache.c \
214+
$(MCUX_SDK_DIR)/drivers/gpc_1/fsl_gpc.c \
215+
$(MCUX_SDK_DIR)/drivers/src/fsl_src.c \
216+
$(MCUX_SDK_DIR)/drivers/trng/fsl_trng.c
217+
218+
INC_HAL_IMX += \
219+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar \
220+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/cache/armv7-m7 \
221+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpc_1 \
222+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/src \
223+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/trng
182224
endif
183225

226+
INC += $(INC_HAL_IMX)
227+
184228
# C source files
185229
SRC_C += \
186230
board_init.c \
@@ -350,8 +394,6 @@ CFLAGS += \
350394
-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
351395
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
352396
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE) \
353-
-DSPI_RETRY_TIMES=1000000 \
354-
-DUART_RETRY_TIMES=1000000 \
355397
-DXIP_BOOT_HEADER_ENABLE=1 \
356398
-DXIP_EXTERNAL_FLASH=1 \
357399
-fdata-sections \
@@ -495,15 +537,15 @@ $(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
495537

496538
$(GEN_FLEXRAM_CONFIG_SRC):
497539
$(ECHO) "Create $@"
498-
$(Q)$(PYTHON) $(MAKE_FLEXRAM_LD) -d $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE).h \
499-
-f $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE)_features.h -l boards/$(MCU_SERIES).ld -c $(MCU_SERIES) > $(GEN_FLEXRAM_CONFIG_SRC)
540+
$(Q)$(PYTHON) $(MAKE_FLEXRAM_LD) -d $(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE).h \
541+
-f $(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE)_features.h -l boards/$(MCU_SERIES).ld -c $(MCU_SERIES) > $(GEN_FLEXRAM_CONFIG_SRC)
500542

501543
# Use a pattern rule here so that make will only call make-pins.py once to make
502544
# both pins_gen.c and pins.h
503545
$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h: $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
504546
$(ECHO) "Create $@"
505547
$(Q)$(PYTHON) $(MAKE_PINS) --board-csv $(BOARD_PINS) --af-csv $(AF_FILE) \
506-
--prefix $(PREFIX_FILE) --iomux "$(abspath $(TOP)/$(MCU_DIR)/drivers/fsl_iomuxc.h)" \
548+
--prefix $(PREFIX_FILE) --iomux "$(abspath $(MCU_DIR)/drivers/fsl_iomuxc.h)" \
507549
--output-source $(GEN_PINS_SRC) --output-header $(GEN_PINS_HDR)
508550

509551
include $(TOP)/py/mkrules.mk

‎ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -21,14 +21,14 @@
2121
#define MICROPY_HW_UART_INDEX { 1, 3, 2, 6, 8 }
2222

2323
#define IOMUX_TABLE_UART \
24-
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RX }, \
25-
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
26-
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
24+
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TXD }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RXD }, \
25+
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TXD }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RXD }, \
26+
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TXD }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RXD }, \
2727
{ 0 }, { 0 }, \
2828
{ 0 }, { 0 }, \
29-
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
29+
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TXD }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RXD }, \
3030
{ 0 }, { 0 }, \
31-
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
31+
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TXD }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RXD },
3232

3333
#define IOMUX_TABLE_UART_CTS_RTS \
3434
{ IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B }, { IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B }, \
@@ -111,22 +111,22 @@
111111
}
112112

113113
// --- SEMC --- //
114-
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DATA00
115-
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DATA01
116-
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DATA02
117-
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DATA03
118-
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DATA04
119-
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DATA05
120-
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DATA06
121-
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DATA07
122-
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DATA08
123-
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DATA09
124-
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DATA10
125-
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DATA11
126-
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DATA12
127-
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DATA13
128-
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DATA14
129-
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DATA15
114+
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DA00
115+
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DA01
116+
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DA02
117+
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DA03
118+
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DA04
119+
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DA05
120+
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DA06
121+
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DA07
122+
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DA08
123+
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DA09
124+
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DA10
125+
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DA11
126+
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DA12
127+
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DA13
128+
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DA14
129+
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DA15
130130

131131
#define MIMXRT_IOMUXC_SEMC_ADDR00 IOMUXC_GPIO_EMC_09_SEMC_ADDR00
132132
#define MIMXRT_IOMUXC_SEMC_ADDR01 IOMUXC_GPIO_EMC_10_SEMC_ADDR01

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