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ports/stm32: Fix SysTick priority for Zephyr threading.
When MICROPY_ZEPHYR_THREADING is enabled, SysTick must be maskable by BASEPRI (priority >= 2) to allow Zephyr's arch_irq_lock() to protect critical sections. The STM32 HAL in system_stm32.c was overwriting the correct priority set in main.c with TICK_INT_PRIORITY (0x00), making SysTick non-maskable. This caused race conditions where SysTick could fire during critical sections in the scheduler, corrupting thread state. Make SysTick priority conditional on MICROPY_ZEPHYR_THREADING to preserve the correct maskable priority (IRQ_PRI_SYSTICK = 2). Signed-off-by: Andrew Leech <[email protected]>
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ports/stm32/system_stm32.c

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@@ -585,8 +585,14 @@ MP_WEAK void SystemClock_Config(void) {
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HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
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HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
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// For Zephyr threading, maintain IRQ_PRI_SYSTICK priority set in main.c (priority 2, maskable)
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// For normal mode, use TICK_INT_PRIORITY (priority 0, non-maskable)
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#if MICROPY_ZEPHYR_THREADING
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NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTICK);
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#else
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NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, TICK_INT_PRIORITY, 0));
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#endif
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#endif
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#if defined(STM32H7) && !defined(NDEBUG)
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// Enable the Debug Module in low-power modes.

ports/stm32/zephyr_arch_stm32.c

Lines changed: 2 additions & 1 deletion
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@@ -180,7 +180,8 @@ void mp_zephyr_arch_init(void) {
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// Enable SysTick interrupt - must be called AFTER kernel is fully initialized
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// This should be called from micropython_main_thread_entry() after z_cstart() completes
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void mp_zephyr_arch_enable_systick_interrupt(void) {
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// Set SysTick priority to maskable level (SystemClock_Config resets it to 0x00)
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// Verify SysTick priority is still at maskable level
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// (system_stm32.c now preserves IRQ_PRI_SYSTICK for Zephyr threading)
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NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTICK);
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// Enable SysTick interrupt (add TICKINT bit to existing configuration)
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*SYST_CSR_ADDR = SYST_CSR_ENABLE | SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT;

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