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2 files changed +24
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lines changed Original file line number Diff line number Diff line change @@ -39,6 +39,16 @@ MEMORY
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/** Location in UICR where mbr params page address is stored. */
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UICR_MBR_PARAM_PAGE (r) : ORIGIN = 0x10001018, LENGTH = 0x04
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+
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+ /** Location in UICR of REGOUT0 (used to set voltage levels for VCC at boot)
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+ *
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+ * IMPORTANT NOTE : This controls the voltage provided on the VCC output of the CPU. Changing this value from the default
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+ * can physically damage parts on your board. If using a SWD debugger you should consider connecting the Vref input
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+ * for that debugger to the VCC rail. Think carefully before using this feature.
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+ * Example usage :
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+ * __attribute__ ((section(".uicrREGOUT0"))) volatile uint32_t m_uicr_regout0 = 0xfffffff4;
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+ */
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+ UICR_REGOUT0 (r) : ORIGIN = 0x10001304, LENGTH = 0x04
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}
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SECTIONS
@@ -74,6 +84,12 @@ SECTIONS
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KEEP(*(.uicrMbrParamsPageAddress))
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} > UICR_MBR_PARAM_PAGE
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+ /* Write REGOUT0 in UICR. */
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+ .uicrREGOUT0 :
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+ {
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+ KEEP(*(.uicrREGOUT0))
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+ } > UICR_REGOUT0
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+
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.dbl_reset (NOLOAD) :
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{
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Original file line number Diff line number Diff line change @@ -42,7 +42,14 @@ MEMORY
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/** Location in UICR where mbr params page address is stored. */
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UICR_MBR_PARAM_PAGE (r) : ORIGIN = 0x10001018, LENGTH = 0x04
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- /** Location in UICR of REGOUT0 (used to set voltage levels for VCC at boot) */
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+ /** Location in UICR of REGOUT0 (used to set voltage levels for VCC at boot)
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+ *
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+ * IMPORTANT NOTE : This controls the voltage provided on the VCC output of the CPU. Changing this value from the default
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+ * can physically damage parts on your board. If using a SWD debugger you should consider connecting the Vref input
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+ * for that debugger to the VCC rail. Think carefully before using this feature.
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+ * Example usage :
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+ * __attribute__ ((section(".uicrREGOUT0"))) volatile uint32_t m_uicr_regout0 = 0xfffffff4;
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+ */
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UICR_REGOUT0 (r) : ORIGIN = 0x10001304, LENGTH = 0x04
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}
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