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IODELAY

Pepijn de Vos edited this page Nov 17, 2024 · 5 revisions

The IODELAY primitive is a programmable delay unit in the IO module, providing a total of 256 (0255) delays with a single-step delay time of about 12.5ps in some devices, or 128 (0127) delays with a single-step delay time of about 30ps and 18ps in other devices. The IODELAY can be used for input or output of I/O logic, but not both at the same time, and has three setting modes: static mode, dynamic mode, and adaptive mode.

This device is not yet supported in Apicula

Ports

Port Size Direction
DF 1 output
DI 1 input
DLYSTEP 8 input
DO 1 output
SDTAP 1 input
VALUE 1 input

Parameters

Parameter Default Value
ADAPT_EN FALSE
C_STATIC_DLY 0 (0b00000000000000000000000000000000)
DYN_DLY_EN FALSE

Verilog Instantiation

IODELAY #(
    .ADAPT_EN(ADAPT_EN),
    .C_STATIC_DLY(C_STATIC_DLY),
    .DYN_DLY_EN(DYN_DLY_EN)
) iodelay_inst (
    .DF(DF),
    .DI(DI),
    .DLYSTEP(DLYSTEP),
    .DO(DO),
    .SDTAP(SDTAP),
    .VALUE(VALUE)
);
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