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lines changed Original file line number Diff line number Diff line change @@ -1163,7 +1163,7 @@ def predicate(edge: Edge) -> bool:
11631163 e ["kind" ] = DependencyGraphEdgeKind .CompileOrder
11641164
11651165 def IterateDocumentsInCompileOrder (self ) -> Generator ['Document' , None , None ]:
1166- if self ._compileOrderGraph .EdgeCount == 0 :
1166+ if self ._compileOrderGraph .EdgeCount < self . _compileOrderGraph . VertexCount - 1 :
11671167 raise VHDLModelException (f"Compile order is not yet computed from dependency graph." )
11681168
11691169 for compileOrderNode in self ._compileOrderGraph .IterateTopologically ():
Original file line number Diff line number Diff line change 5050
5151class VHDLLibrary (TestCase ):
5252 def CreateDesign (self ) -> Design :
53- design = Design ()
53+ design = Design ("example" )
5454 library = design .GetLibrary ("lib_1" )
5555
5656 path = Path ("tests.vhdl" )
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