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feat: update project tt_um_hpdl1414_uart_atudoroi from ADDTDR/tt10-hpdl1414-uart
Commit: f3d960e50d9d29163136351e65d57fa33f025bc4 Workflow: https://github.com/ADDTDR/tt10-hpdl1414-uart/actions/runs/13486463391
1 parent db46b8b commit acd29cd

7 files changed

+3833
-3918
lines changed

Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/commit_id.json

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
{
22
"app": "Tiny Tapeout tt10 022164a0",
33
"repo": "https://github.com/ADDTDR/tt10-hpdl1414-uart",
4-
"commit": "eaa07fd677259a1c4ba0768422c93b5d8dffc870",
5-
"workflow_url": "https://github.com/ADDTDR/tt10-hpdl1414-uart/actions/runs/13445290715",
4+
"commit": "f3d960e50d9d29163136351e65d57fa33f025bc4",
5+
"workflow_url": "https://github.com/ADDTDR/tt10-hpdl1414-uart/actions/runs/13486463391",
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"sort_id": 1740088478927,
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"openlane_version": "OpenLane2 2.2.9",
88
"pdk_version": "open_pdks 0fe599b2afb6708d281543108caf8310912f54af"

Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/stats/metrics.csv

+121-121
Large diffs are not rendered by default.

Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/stats/synthesis-stats.txt

+33-37
Original file line numberDiff line numberDiff line change
@@ -2,65 +2,61 @@
22

33
=== tt_um_hpdl1414_uart_atudoroi ===
44

5-
Number of wires: 705
6-
Number of wire bits: 740
5+
Number of wires: 708
6+
Number of wire bits: 743
77
Number of public wires: 211
88
Number of public wire bits: 246
99
Number of ports: 8
1010
Number of port bits: 43
1111
Number of memories: 0
1212
Number of memory bits: 0
1313
Number of processes: 0
14-
Number of cells: 721
14+
Number of cells: 724
1515
sky130_fd_sc_hd__a2111o_2 1
16-
sky130_fd_sc_hd__a211o_2 4
17-
sky130_fd_sc_hd__a211oi_2 1
16+
sky130_fd_sc_hd__a211o_2 2
1817
sky130_fd_sc_hd__a21boi_2 1
19-
sky130_fd_sc_hd__a21o_2 13
20-
sky130_fd_sc_hd__a21oi_2 8
21-
sky130_fd_sc_hd__a221o_2 2
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sky130_fd_sc_hd__a22o_2 27
18+
sky130_fd_sc_hd__a21o_2 18
19+
sky130_fd_sc_hd__a21oi_2 7
20+
sky130_fd_sc_hd__a221o_2 8
21+
sky130_fd_sc_hd__a22o_2 26
2322
sky130_fd_sc_hd__a2bb2o_2 1
24-
sky130_fd_sc_hd__a31o_2 31
23+
sky130_fd_sc_hd__a31o_2 20
24+
sky130_fd_sc_hd__a31oi_2 1
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sky130_fd_sc_hd__a32o_2 1
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sky130_fd_sc_hd__a41o_2 1
26-
sky130_fd_sc_hd__and2_2 20
27-
sky130_fd_sc_hd__and2b_2 6
28-
sky130_fd_sc_hd__and3_2 13
27+
sky130_fd_sc_hd__and2_2 26
28+
sky130_fd_sc_hd__and2b_2 5
29+
sky130_fd_sc_hd__and3_2 19
2930
sky130_fd_sc_hd__and3b_2 2
30-
sky130_fd_sc_hd__and4_2 6
31-
sky130_fd_sc_hd__and4b_2 1
31+
sky130_fd_sc_hd__and4_2 7
3232
sky130_fd_sc_hd__and4bb_2 1
3333
sky130_fd_sc_hd__buf_2 13
3434
sky130_fd_sc_hd__conb_1 11
3535
sky130_fd_sc_hd__dfxtp_2 197
36-
sky130_fd_sc_hd__inv_2 16
37-
sky130_fd_sc_hd__mux2_1 39
36+
sky130_fd_sc_hd__inv_2 18
37+
sky130_fd_sc_hd__mux2_1 49
3838
sky130_fd_sc_hd__mux4_2 28
39-
sky130_fd_sc_hd__nand2_2 36
40-
sky130_fd_sc_hd__nand2b_2 1
39+
sky130_fd_sc_hd__nand2_2 34
40+
sky130_fd_sc_hd__nand2b_2 2
4141
sky130_fd_sc_hd__nand3_2 4
42-
sky130_fd_sc_hd__nand3b_2 1
43-
sky130_fd_sc_hd__nand4_2 2
44-
sky130_fd_sc_hd__nor2_2 19
42+
sky130_fd_sc_hd__nand4_2 1
43+
sky130_fd_sc_hd__nor2_2 20
4544
sky130_fd_sc_hd__nor3_2 1
46-
sky130_fd_sc_hd__nor4_2 2
45+
sky130_fd_sc_hd__nor4_2 1
4746
sky130_fd_sc_hd__nor4b_2 1
48-
sky130_fd_sc_hd__o211a_2 1
49-
sky130_fd_sc_hd__o21a_2 4
47+
sky130_fd_sc_hd__o21a_2 3
5048
sky130_fd_sc_hd__o21ai_2 5
51-
sky130_fd_sc_hd__o21ba_2 3
52-
sky130_fd_sc_hd__o21bai_2 1
53-
sky130_fd_sc_hd__o221a_2 78
49+
sky130_fd_sc_hd__o21ba_2 2
50+
sky130_fd_sc_hd__o221a_2 71
5451
sky130_fd_sc_hd__o22a_2 1
5552
sky130_fd_sc_hd__o31a_2 1
56-
sky130_fd_sc_hd__or2_2 86
57-
sky130_fd_sc_hd__or3_2 4
58-
sky130_fd_sc_hd__or3b_2 5
59-
sky130_fd_sc_hd__or4_2 2
60-
sky130_fd_sc_hd__or4b_2 2
61-
sky130_fd_sc_hd__xnor2_2 7
62-
sky130_fd_sc_hd__xor2_2 11
53+
sky130_fd_sc_hd__or2_2 82
54+
sky130_fd_sc_hd__or3_2 8
55+
sky130_fd_sc_hd__or3b_2 2
56+
sky130_fd_sc_hd__or4_2 3
57+
sky130_fd_sc_hd__xnor2_2 10
58+
sky130_fd_sc_hd__xor2_2 9
6359

64-
Chip area for module '\tt_um_hpdl1414_uart_atudoroi': 9127.504000
65-
of which used for sequential elements: 4190.268800 (45.91%)
60+
Chip area for module '\tt_um_hpdl1414_uart_atudoroi': 9146.272000
61+
of which used for sequential elements: 4190.268800 (45.81%)
6662

Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/tt_um_hpdl1414_uart_atudoroi.gds

-99.3 KB
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Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/tt_um_hpdl1414_uart_atudoroi.lef

+53-53
Original file line numberDiff line numberDiff line change
@@ -163,6 +163,7 @@ MACRO tt_um_hpdl1414_uart_atudoroi
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PIN uio_in[3]
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DIRECTION INPUT ;
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USE SIGNAL ;
166+
ANTENNAGATEAREA 0.196500 ;
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PORT
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LAYER met4 ;
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RECT 107.950 110.520 108.250 111.520 ;
@@ -195,7 +196,6 @@ MACRO tt_um_hpdl1414_uart_atudoroi
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PIN uio_in[7]
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DIRECTION INPUT ;
197198
USE SIGNAL ;
198-
ANTENNAGATEAREA 0.196500 ;
199199
PORT
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LAYER met4 ;
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RECT 96.910 110.520 97.210 111.520 ;
@@ -412,61 +412,61 @@ MACRO tt_um_hpdl1414_uart_atudoroi
412412
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END
471471
END tt_um_hpdl1414_uart_atudoroi
472472
END LIBRARY

Diff for: ‎projects/tt_um_hpdl1414_uart_atudoroi/tt_um_hpdl1414_uart_atudoroi.oas

-9.6 KB
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