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Merge pull request #867 from lifehackerhansol/libnds-v2
Minor fixes for libnds v2.0.0 release
2 parents 1192bf6 + ee39a36 commit b022181

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2 files changed

+44
-1
lines changed

2 files changed

+44
-1
lines changed

desmume/src/MMU.cpp

+30-1
Original file line numberDiff line numberDiff line change
@@ -3754,7 +3754,21 @@ void FASTCALL _MMU_ARM9_write08(u32 adr, u8 val)
37543754
case eng_3D_GXSTAT:
37553755
MMU_new.gxstat.write(8,adr,val);
37563756
break;
3757-
3757+
3758+
case REG_IPCSYNC:
3759+
{
3760+
u16 ipcsync = T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x180);
3761+
ipcsync &= 0xFF00;
3762+
ipcsync |= (val & 0xFF);
3763+
MMU_IPCSync(ARMCPU_ARM9, ipcsync);
3764+
}
3765+
case REG_IPCSYNC+1:
3766+
{
3767+
u16 ipcsync = T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x180);
3768+
ipcsync &= 0x00FF;
3769+
ipcsync |= ((val & 0xFF) << 8);
3770+
MMU_IPCSync(ARMCPU_ARM9, ipcsync);
3771+
}
37583772
case REG_AUXSPICNT:
37593773
case REG_AUXSPICNT+1:
37603774
write_auxspicnt(ARMCPU_ARM9, 8, adr & 1, val);
@@ -5596,6 +5610,21 @@ void FASTCALL _MMU_ARM7_write08(u32 adr, u8 val)
55965610
printf("Unsupported 8bit write to timer registers");
55975611
return;
55985612

5613+
case REG_IPCSYNC:
5614+
{
5615+
u16 ipcsync = T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x180);
5616+
ipcsync &= 0xFF00;
5617+
ipcsync |= (val & 0xFF);
5618+
MMU_IPCSync(ARMCPU_ARM7, ipcsync);
5619+
}
5620+
case REG_IPCSYNC+1:
5621+
{
5622+
u16 ipcsync = T1ReadWord(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x180);
5623+
ipcsync &= 0x00FF;
5624+
ipcsync |= ((val & 0xFF) << 8);
5625+
MMU_IPCSync(ARMCPU_ARM7, ipcsync);
5626+
}
5627+
55995628
case REG_AUXSPIDATA:
56005629
{
56015630
//if(val!=0) MMU.AUX_SPI_CMD = val & 0xFF; //zero 20-aug-2013 - this seems pointless

desmume/src/cp15.cpp

+14
Original file line numberDiff line numberDiff line change
@@ -366,6 +366,13 @@ BOOL armcp15_moveCP2ARM(armcp15_t *armcp15, u32 * R, u8 CRn, u8 CRm, u8 opcode1,
366366
}
367367
}
368368
return FALSE;
369+
case 13:
370+
if(opcode1 == 0 && opcode2 == 1)
371+
{
372+
*R = armcp15->processID;
373+
return TRUE;
374+
}
375+
return FALSE;
369376
default:
370377
LOG("Unsupported CP15 operation : MRC\n");
371378
return FALSE;
@@ -488,6 +495,13 @@ BOOL armcp15_moveARM2CP(armcp15_t *armcp15, u32 val, u8 CRn, u8 CRm, u8 opcode1,
488495
}
489496
}
490497
return FALSE;
498+
case 13:
499+
if(opcode1 == 0 && opcode2 == 1)
500+
{
501+
armcp15->processID = val;
502+
return TRUE;
503+
}
504+
return FALSE;
491505
default:
492506
return FALSE;
493507
}

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