changelog: add entry for #4145 fix

0xllx0 · 0xllx0 · commit 7e5d59cc6e35 · 2025-09-12T18:00:22.000Z
Signed-off-by: Elle Rhumsaa &lt;elle@weathered-steel.dev&gt;
diff --git a/ChangeLog b/ChangeLog
@@ -1,3 +1,8 @@
+2025-09-12  Elle Rhumsaa  <elle@weathered-steel.dev>
+
+	* gcc/rust/ast/rust-ast.cc: early return for empty module file
+	* gcc/testsuite/rust/issue-4145.rs: add regression test
+
 2025-09-04  Wilco Dijkstra  <wilco.dijkstra@arm.com>
 
 	* MAINTAINERS (Reviewers): Add myself for the aarch64 port.

-Original file line number
+Diff line change
@@ @@ -1,3 +1,8 @@ @@
 +2025-09-12  Elle Rhumsaa  <[email protected]>
++
 +	* gcc/rust/ast/rust-ast.cc: early return for empty module file
 +	* gcc/testsuite/rust/issue-4145.rs: add regression test
++
 -09-04  Wilco Dijkstra  <[email protected]>
 	* MAINTAINERS (Reviewers): Add myself for the aarch64 port.