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@systems-assistant systems-assistant bot commented Aug 19, 2025

This can occur on platforms that operates in WGP (work group processor) mode in which the CUs are grouped in pairs so there are effectively half as many multiprocessing units.

Associated JIRA ticket number/Github issue number

Fixes SWDEV-537865

What type of PR is this? (check all applicable)

  • Refactor
  • Feature
  • Bug Fix
  • Optimization
  • Documentation Update
  • Continuous Integration

What were the changes?

Clamp the results from GenerateThreadDimensions, GenerateBlockDimensions, GenerateThreadDimensionsForShuffle and GenerateBlockDimensionsForShuffle to prevent invalid zero values when multiProcessorCount returns 1.

Why are these changes needed?

Fixes divide by zero errors and invalid parameter errors.

Updated CHANGELOG?

  • Yes
  • No, Does not apply to this PR.

Added/Updated documentation?

  • Yes
  • No, Does not apply to this PR.

Additional Checks

  • I have added tests relevant to the introduced functionality, and the unit tests are passing locally.
  • Any dependent changes have been merged.

🔁 Imported from ROCm/hip-tests#477
🧑‍💻 Originally authored by @gnifAMD

ammallya pushed a commit that referenced this pull request Nov 17, 2025
…625)

Increased the AMDSMI_MAX_DEVICES to 64 to accomodate all
devices in CPX mode. The link type has been modified in
amd-smi to match with rocm-smi types, updated the same
for drm tests.

---------

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
ammallya pushed a commit that referenced this pull request Nov 18, 2025
…625)

Increased the AMDSMI_MAX_DEVICES to 64 to accomodate all
devices in CPX mode. The link type has been modified in
amd-smi to match with rocm-smi types, updated the same
for drm tests.

---------

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>

[ROCm/amdsmi commit: 6715c5a]
ammallya pushed a commit that referenced this pull request Nov 21, 2025
…625)

Increased the AMDSMI_MAX_DEVICES to 64 to accomodate all
devices in CPX mode. The link type has been modified in
amd-smi to match with rocm-smi types, updated the same
for drm tests.

---------

Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>

[ROCm/amdsmi commit: 6715c5a]
@sruscica sruscica force-pushed the import/develop/gnifAMD_hip-tests/SWDEV-537865 branch from 432bb47 to 6cb93ce Compare January 20, 2026 16:12
@sruscica sruscica requested a review from a team as a code owner January 20, 2026 16:12
@sruscica sruscica force-pushed the import/develop/gnifAMD_hip-tests/SWDEV-537865 branch 2 times, most recently from e38f057 to 30632df Compare January 22, 2026 18:19
This can occur on platforms that operates in WGP (work group processor) mode in
which the CUs are grouped in pairs so there are effectively half as many
multiprocessing units.
@sruscica sruscica force-pushed the import/develop/gnifAMD_hip-tests/SWDEV-537865 branch from 30632df to d73f82e Compare January 23, 2026 16:42
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3 participants