hipcc -g pureHip.cpp -o pureHip && ./pureHip
Results:
Thread 0: 1000000000
Thread 1: 1000000001
Thread 2: 1000000002
Thread 3: 1000000003
Thread 4: 1000000004
Thread 5: 1000000005
Thread 6: 1000000006
Thread 7: 1000000007
Thread 8: 1000000008
Thread 9: 1000000009
Thread 10: 1000000010
Thread 11: 1000000011
Thread 12: 1000000012
Thread 13: 1000000013
Thread 14: 1000000014
Thread 15: 1000000015
Thread 16: 1000000016
Thread 17: 1000000017
Thread 18: 1000000018
Thread 19: 1000000019
Thread 20: 1000000020
Thread 21: 1000000021
Thread 22: 1000000022
Thread 23: 1000000023
Thread 24: 1000000024
Thread 25: 1000000025
Thread 26: 1000000026
Thread 27: 1000000027
Thread 28: 1000000028
Thread 29: 1000000029
Thread 30: 1000000030
Thread 31: 1000000031
Thread 32: 1000000032
Thread 33: 1000000033
Thread 34: 1000000034
Thread 35: 1000000035
Thread 36: 1000000036
Thread 37: 1000000037
Thread 38: 1000000038
Thread 39: 1000000039
Thread 40: 1000000040
Thread 41: 1000000041
Thread 42: 1000000042
Thread 43: 1000000043
Thread 44: 1000000044
Thread 45: 1000000045
Thread 46: 1000000046
Thread 47: 1000000047
Thread 48: 1000000048
Thread 49: 1000000049
Thread 50: 1000000050
Thread 51: 1000000051
Thread 52: 1000000052
Thread 53: 1000000053
Thread 54: 1000000054
Thread 55: 1000000055
Thread 56: 1000000056
Thread 57: 1000000057
Thread 58: 1000000058
Thread 59: 1000000059
Thread 60: 1000000060
Thread 61: 1000000061
Thread 62: 1000000062
Thread 63: 1000000063
╭─pvelesko@cupcake ~/chipStar/openmm-fixes/testPermute ‹master●›
╰─$
╭─pvelesko@cupcake ~/chipStar/openmm-fixes/testPermute ‹master●›
╰─$ hipcc -g -O0 pureHip.cpp -o pureHip && ./pureHip 130 ↵
HIP error: the operation cannot be performed in the present state at pureHip.cpp:54
#include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
#include <fstream>
#define HIP_CHECK(cmd) \
do { \
hipError_t error = cmd; \
if (error != hipSuccess) { \
std::cerr << "HIP error: " << hipGetErrorString(error) << " at " << __FILE__ << ":" << __LINE__ << "\n"; \
exit(1); \
} \
} while(0)
__global__ void hip_bpermute(const int* inData, int* outData) {
int tid = threadIdx.x;
int lane = tid & 63; // Get lane ID within wavefront
// Load the value this thread will share
int src_data = inData[tid];
// The byte offset is lane * 4 (each int is 4 bytes)
int src_lane = lane * 4;
// Call the builtin with byte offset and source data
int result = __builtin_amdgcn_ds_bpermute(src_lane, src_data);
outData[tid] = result;
}
int main() {
const int globalSize = 64;
// Prepare input data
std::vector<int> inData(globalSize);
for (int i = 0; i < globalSize; ++i) {
inData[i] = 1000000000 + i; // Fill with some pattern
}
// Array for results
std::vector<int> outData(globalSize);
int *d_inData, *d_outData;
HIP_CHECK(hipMalloc(&d_inData, globalSize * sizeof(int)));
HIP_CHECK(hipMalloc(&d_outData, globalSize * sizeof(int)));
HIP_CHECK(hipMemcpy(d_inData, inData.data(), globalSize * sizeof(int), hipMemcpyHostToDevice));
HIP_CHECK(hipDeviceSynchronize());
hipLaunchKernelGGL(hip_bpermute,
dim3(1),
dim3(globalSize),
0, 0,
d_inData, d_outData);
HIP_CHECK(hipGetLastError());
HIP_CHECK(hipDeviceSynchronize());
HIP_CHECK(hipMemcpy(outData.data(), d_outData, globalSize * sizeof(int), hipMemcpyDeviceToHost));
HIP_CHECK(hipFree(d_inData));
HIP_CHECK(hipFree(d_outData));
// Print results
std::cout << "Results:\n\n";
for (int i = 0; i < globalSize; ++i) {
std::cout << "Thread " << i << ": " << outData[i] << "\n";
}
return 0;
}
╰─$ rocminfo 130 ↵
ROCk module version 6.8.5 is loaded
=====================
HSA System Attributes
=====================
Runtime Version: 1.14
Runtime Ext Version: 1.6
System Timestamp Freq.: 1000.000000MHz
Sig. Max Wait Duration: 18446744073709551615 (0xFFFFFFFFFFFFFFFF) (timestamp count)
Machine Model: LARGE
System Endianness: LITTLE
Mwaitx: DISABLED
DMAbuf Support: YES
==========
HSA Agents
==========
*******
Agent 1
*******
Name: 13th Gen Intel(R) Core(TM) i9-13900K
Uuid: CPU-XX
Marketing Name: 13th Gen Intel(R) Core(TM) i9-13900K
Vendor Name: CPU
Feature: None specified
Profile: FULL_PROFILE
Float Round Mode: NEAR
Max Queue Number: 0(0x0)
Queue Min Size: 0(0x0)
Queue Max Size: 0(0x0)
Queue Type: MULTI
Node: 0
Device Type: CPU
Cache Info:
L1: 32768(0x8000) KB
Chip ID: 0(0x0)
ASIC Revision: 0(0x0)
Cacheline Size: 64(0x40)
Max Clock Freq. (MHz): 3000
BDFID: 0
Internal Node ID: 0
Compute Unit: 32
SIMDs per CU: 0
Shader Engines: 0
Shader Arrs. per Eng.: 0
WatchPts on Addr. Ranges:1
Memory Properties:
Features: None
Pool Info:
Pool 1
Segment: GLOBAL; FLAGS: FINE GRAINED
Size: 65597496(0x3e8f038) KB
Allocatable: TRUE
Alloc Granule: 4KB
Alloc Recommended Granule:4KB
Alloc Alignment: 4KB
Accessible by all: TRUE
Pool 2
Segment: GLOBAL; FLAGS: KERNARG, FINE GRAINED
Size: 65597496(0x3e8f038) KB
Allocatable: TRUE
Alloc Granule: 4KB
Alloc Recommended Granule:4KB
Alloc Alignment: 4KB
Accessible by all: TRUE
Pool 3
Segment: GLOBAL; FLAGS: COARSE GRAINED
Size: 65597496(0x3e8f038) KB
Allocatable: TRUE
Alloc Granule: 4KB
Alloc Recommended Granule:4KB
Alloc Alignment: 4KB
Accessible by all: TRUE
ISA Info:
*******
Agent 2
*******
Name: gfx906
Uuid: GPU-a5de794172dc768b
Marketing Name: AMD Radeon VII
Vendor Name: AMD
Feature: KERNEL_DISPATCH
Profile: BASE_PROFILE
Float Round Mode: NEAR
Max Queue Number: 128(0x80)
Queue Min Size: 64(0x40)
Queue Max Size: 131072(0x20000)
Queue Type: MULTI
Node: 1
Device Type: GPU
Cache Info:
L1: 16(0x10) KB
L2: 8192(0x2000) KB
Chip ID: 26287(0x66af)
ASIC Revision: 1(0x1)
Cacheline Size: 64(0x40)
Max Clock Freq. (MHz): 1801
BDFID: 2560
Internal Node ID: 1
Compute Unit: 60
SIMDs per CU: 4
Shader Engines: 4
Shader Arrs. per Eng.: 1
WatchPts on Addr. Ranges:4
Coherent Host Access: FALSE
Memory Properties:
Features: KERNEL_DISPATCH
Fast F16 Operation: TRUE
Wavefront Size: 64(0x40)
Workgroup Max Size: 1024(0x400)
Workgroup Max Size per Dimension:
x 1024(0x400)
y 1024(0x400)
z 1024(0x400)
Max Waves Per CU: 40(0x28)
Max Work-item Per CU: 2560(0xa00)
Grid Max Size: 4294967295(0xffffffff)
Grid Max Size per Dimension:
x 4294967295(0xffffffff)
y 4294967295(0xffffffff)
z 4294967295(0xffffffff)
Max fbarriers/Workgrp: 32
Packet Processor uCode:: 472
SDMA engine uCode:: 145
IOMMU Support:: None
Pool Info:
Pool 1
Segment: GLOBAL; FLAGS: COARSE GRAINED
Size: 16760832(0xffc000) KB
Allocatable: TRUE
Alloc Granule: 4KB
Alloc Recommended Granule:2048KB
Alloc Alignment: 4KB
Accessible by all: FALSE
Pool 2
Segment: GLOBAL; FLAGS: EXTENDED FINE GRAINED
Size: 16760832(0xffc000) KB
Allocatable: TRUE
Alloc Granule: 4KB
Alloc Recommended Granule:2048KB
Alloc Alignment: 4KB
Accessible by all: FALSE
Pool 3
Segment: GROUP
Size: 64(0x40) KB
Allocatable: FALSE
Alloc Granule: 0KB
Alloc Recommended Granule:0KB
Alloc Alignment: 0KB
Accessible by all: FALSE
ISA Info:
ISA 1
Name: amdgcn-amd-amdhsa--gfx906:sramecc+:xnack-
Machine Models: HSA_MACHINE_MODEL_LARGE
Profiles: HSA_PROFILE_BASE
Default Rounding Mode: NEAR
Default Rounding Mode: NEAR
Fast f16: TRUE
Workgroup Max Size: 1024(0x400)
Workgroup Max Size per Dimension:
x 1024(0x400)
y 1024(0x400)
z 1024(0x400)
Grid Max Size: 4294967295(0xffffffff)
Grid Max Size per Dimension:
x 4294967295(0xffffffff)
y 4294967295(0xffffffff)
z 4294967295(0xffffffff)
FBarrier Max Size: 32
*** Done ***
[Migrated from original issue] ROCm/clr#126
Original issue author: @pvelesko
Problem Description
Source code:
Operating System
Ubuntu 22.04
CPU
Intel i9
GPU
Vega 20
ROCm Version
ROCm 6.3.0
ROCm Component
No response
Steps to Reproduce
No response
(Optional for Linux users) Output of /opt/rocm/bin/rocminfo --support
No response
Additional Information
No response