diff --git a/PySpice/Spice/BasicElement.py b/PySpice/Spice/BasicElement.py
index 53e062383..d06a883aa 100644
--- a/PySpice/Spice/BasicElement.py
+++ b/PySpice/Spice/BasicElement.py
@@ -952,7 +952,7 @@ def __str__(self):
if self.table is not None:
# TABLE {expression} = (x0, y0) (x1, y1) ...
table = ['({}, {})'.format(x, y) for x, y in self.table]
- spice_element += ' TABLE {%s} = %s' % (self.expression, join_list(table))
+ spice_element += ' TABLE {%s} = %s' % (self.expression, join_list(table))
return spice_element
####################################################################################################
@@ -1420,6 +1420,68 @@ def source(self):
def substrate(self):
return self.pins[3]
+####################################################################################################
+
+class TransmissionLine(TwoPortElement):
+
+ """This class implements a lossless transmission line.
+
+ Spice syntax::
+
+ TXXXXXXX N1 N2 N3 N4 Z0=VALUE
>
+
+ where TD or F,NL must be specified.
+
+ Keyword Parameters:
+
+ :attr:`impedance`
+ alias:`Z0`
+
+ :attr:`time_delay`
+ alias:`TD`
+
+ :attr:`frequency`
+ alias:`F`
+
+ :attr:`normalized_length`
+ alias:`NL`
+
+ Attributes:
+
+ :attr:`impedance`
+
+ :attr:`time_delay`
+
+ :attr:`frequency`
+
+ :attr:`normalized_length`
+
+ Note: Either time_delay or frequency must be given.
+
+ """
+
+ alias = 'TransmissionLine'
+ prefix = 'T'
+
+ def __init__(self, name,
+ input_node_plus, input_node_minus,
+ output_node_plus, output_node_minus,
+ *args, **kwargs):
+
+ if not (('time_delay' in kwargs) ^
+ (('frequency' in kwargs) & ('normalized_length' in kwargs))):
+ raise NameError('Either TD or F,NL must be specified')
+
+ super().__init__(name,
+ output_node_plus, output_node_minus,
+ input_node_plus, input_node_minus, # Fixme: inverted inputs
+ *args, **kwargs)
+
+ impedance = FloatKeyParameter('Z0', default=50)
+ time_delay = FloatKeyParameter('TD')
+ frequency = FloatKeyParameter('F')
+ normalized_length = FloatKeyParameter('NL')
+
####################################################################################################
#
# End
diff --git a/doc/sphinx/source/examples/index.rst b/doc/sphinx/source/examples/index.rst
index 286c853c4..b1f1281bb 100644
--- a/doc/sphinx/source/examples/index.rst
+++ b/doc/sphinx/source/examples/index.rst
@@ -19,3 +19,4 @@ This section has 13 sub-topics and 25 examples.
spice-parser/index.rst
transformer/index.rst
transistor/index.rst
+ transmission-lines/index.rst
diff --git a/doc/sphinx/source/examples/transmission-lines/index.rst b/doc/sphinx/source/examples/transmission-lines/index.rst
new file mode 100644
index 000000000..4bc1a289a
--- /dev/null
+++ b/doc/sphinx/source/examples/transmission-lines/index.rst
@@ -0,0 +1,11 @@
+
+====================
+ Transmission Lines
+====================
+This section has 1 example.
+
+
+.. toctree::
+ :maxdepth: 1
+
+ time_delay.rst
diff --git a/doc/sphinx/source/examples/transmission-lines/time_delay.png b/doc/sphinx/source/examples/transmission-lines/time_delay.png
new file mode 100644
index 000000000..884cb260d
Binary files /dev/null and b/doc/sphinx/source/examples/transmission-lines/time_delay.png differ
diff --git a/doc/sphinx/source/examples/transmission-lines/time_delay.rst b/doc/sphinx/source/examples/transmission-lines/time_delay.rst
new file mode 100644
index 000000000..60b80f545
--- /dev/null
+++ b/doc/sphinx/source/examples/transmission-lines/time_delay.rst
@@ -0,0 +1,43 @@
+
+.. include:: /project-links.txt
+.. include:: /abbreviation.txt
+
+===============================================
+True-time Delay with Lossless Transmission Line
+===============================================
+
+.. getthecode:: time_delay.py
+ :language: python
+
+.. code-block:: python
+
+ import PySpice.Logging.Logging as Logging
+ from PySpice.Spice.Netlist import Circuit
+ import matplotlib.pyplot as plt
+ from PySpice.Probe.Plot import plot
+
+ logger = Logging.setup_logging()
+
+ ####################################################################################################
+
+ circuit = Circuit('Transmission Line')
+ circuit.Pulse('pulse', 'input', circuit.gnd, 0, 1, 1e-9, 1e-6)
+ circuit.R('load', 'output', circuit.gnd, 50)
+ circuit.TransmissionLine('delay', 'input', circuit.gnd, 'output', circuit.gnd, impedance=50, time_delay=40e-9)
+
+ simulator = circuit.simulator(temperature=25, nominal_temperature=25)
+ analysis = simulator.transient(step_time=1e-11, end_time=100e-9)
+
+ ####################################################################################################
+
+ plt.figure(None, (20, 6))
+ plot(analysis['input'])
+ plot(analysis['output'])
+ plt.xlabel('Time [s]')
+ plt.ylabel('Voltage (V)')
+ plt.grid()
+ plt.legend(['input', 'output'], loc='upper right')
+ plt.show()
+
+.. image:: time_delay.png
+ :align: center
diff --git a/examples/transmission-lines/time_delay.py b/examples/transmission-lines/time_delay.py
new file mode 100644
index 000000000..af5c46cdc
--- /dev/null
+++ b/examples/transmission-lines/time_delay.py
@@ -0,0 +1,27 @@
+import PySpice.Logging.Logging as Logging
+from PySpice.Spice.Netlist import Circuit
+import matplotlib.pyplot as plt
+from PySpice.Probe.Plot import plot
+
+logger = Logging.setup_logging()
+
+####################################################################################################
+
+circuit = Circuit('Transmission Line')
+circuit.Pulse('pulse', 'input', circuit.gnd, 0, 1, 1e-9, 1e-6)
+circuit.R('load', 'output', circuit.gnd, 50)
+circuit.TransmissionLine('delay', 'input', circuit.gnd, 'output', circuit.gnd, impedance=50, time_delay=40e-9)
+
+simulator = circuit.simulator(temperature=25, nominal_temperature=25)
+analysis = simulator.transient(step_time=1e-11, end_time=100e-9)
+
+####################################################################################################
+
+plt.figure(None, (20, 6))
+plot(analysis['input'])
+plot(analysis['output'])
+plt.xlabel('Time [s]')
+plt.ylabel('Voltage (V)')
+plt.grid()
+plt.legend(['input', 'output'], loc='upper right')
+plt.show()
|