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[fix] Remove Metric handling rules and passes
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8 files changed

+11
-70
lines changed

8 files changed

+11
-70
lines changed

src/oqd_core/compiler/analog/passes/__init__.py

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,11 @@
1313
# limitations under the License.
1414

1515
from .analysis import analysis_canonical_hamiltonian_dim, analysis_term_index
16-
from .assign import assign_analog_circuit_dim, verify_analog_args_dim
16+
from .assign import assign_analog_circuit_dim
1717
from .canonicalize import analog_operator_canonicalization
1818

1919
__all__ = [
2020
"assign_analog_circuit_dim",
21-
"verify_analog_args_dim",
2221
"analog_operator_canonicalization",
2322
"analysis_canonical_hamiltonian_dim",
2423
"analysis_term_index",

src/oqd_core/compiler/analog/passes/assign.py

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -17,15 +17,13 @@
1717
########################################################################################
1818
from oqd_core.compiler.analog.rewrite.assign import AssignAnalogIRDim
1919
from oqd_core.compiler.analog.verify.task import (
20-
VerifyAnalogArgsDim,
2120
VerifyAnalogCircuitDim,
2221
)
2322

2423
########################################################################################
2524

2625
__all__ = [
2726
"assign_analog_circuit_dim",
28-
"verify_analog_args_dim",
2927
]
3028

3129
########################################################################################
@@ -51,20 +49,3 @@ def assign_analog_circuit_dim(model):
5149
)
5250
)(assigned_model)
5351
return assigned_model
54-
55-
56-
def verify_analog_args_dim(model, n_qreg, n_qmode):
57-
"""
58-
This pass checks whether the assigned n_qreg and n_qmode in AnalogCircuit match the n_qreg and n_qmode
59-
in any Operators (like the Operator inside Expectation) in TaskArgsAnalog
60-
61-
Args:
62-
model (TaskArgsAnalog):
63-
64-
Returns:
65-
model (TaskArgsAnalog):
66-
67-
Assumptions:
68-
All [`Operator`][oqd_core.interface.analog.operator.Operator] inside TaskArgsAnalog must be canonicalized
69-
"""
70-
Post(VerifyAnalogArgsDim(n_qreg=n_qreg, n_qmode=n_qmode))(model)

src/oqd_core/compiler/analog/rewrite/canonicalize.py

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -386,9 +386,6 @@ def __init__(self):
386386
def map_AnalogGate(self, model):
387387
self.op_add_root = False
388388

389-
def map_Expectation(self, model):
390-
self.op_add_root = False
391-
392389
def map_Operator(self, model: Operator):
393390
if not self.op_add_root:
394391
self.op_add_root = True

src/oqd_core/compiler/analog/verify/__init__.py

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@
2525
)
2626
from .operator import VerifyHilberSpaceDim
2727
from .task import (
28-
VerifyAnalogArgsDim,
2928
VerifyAnalogCircuitDim,
3029
)
3130

@@ -40,6 +39,5 @@
4039
"CanVerSortedOrder",
4140
"CanVerScaleTerm",
4241
"VerifyAnalogCircuitDim",
43-
"VerifyAnalogArgsDim",
4442
"VerifyHilberSpaceDim",
4543
]

src/oqd_core/compiler/analog/verify/canonicalize.py

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -385,9 +385,6 @@ def __init__(self):
385385
def map_AnalogGate(self, model):
386386
self._single_term_scaling_needed = False
387387

388-
def map_Expectation(self, model):
389-
self._single_term_scaling_needed = False
390-
391388
def map_OperatorScalarMul(self, model: OperatorScalarMul):
392389
self._single_term_scaling_needed = True
393390
pass

src/oqd_core/compiler/analog/verify/operator.py

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -71,9 +71,6 @@ def _reset(self):
7171
def map_AnalogGate(self, model):
7272
self._reset()
7373

74-
def map_Expectation(self, model):
75-
self._reset()
76-
7774
def _get_dim(self, model):
7875
if isinstance(model, Pauli):
7976
return (1, 0)
@@ -103,14 +100,14 @@ def map_OperatorAdd(self, model):
103100
assert self._term_dim == new, "Incorrect Hilbert space dimension"
104101

105102
if isinstance(model.op1, Union[OperatorTerminal, OperatorMul]):
106-
assert self._term_dim == self._get_dim(model.op1), (
107-
"Incorrect Hilbert space dimension"
108-
)
103+
assert self._term_dim == self._get_dim(
104+
model.op1
105+
), "Incorrect Hilbert space dimension"
109106
elif isinstance(model.op1, OperatorScalarMul):
110107
if isinstance(model.op1.op, Union[OperatorTerminal, OperatorMul]):
111-
assert self._term_dim == self._get_dim(model.op1.op), (
112-
"Incorrect Hilbert space dimension"
113-
)
108+
assert self._term_dim == self._get_dim(
109+
model.op1.op
110+
), "Incorrect Hilbert space dimension"
114111

115112
if not isinstance(model.op1, OperatorAdd):
116113
self._final_add_term = True

src/oqd_core/compiler/analog/verify/task.py

Lines changed: 3 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@
1414

1515
from oqd_compiler_infrastructure import RewriteRule
1616

17-
from oqd_core.backend.metric import Expectation
1817
from oqd_core.compiler.analog.passes.analysis import analysis_canonical_hamiltonian_dim
1918

2019
########################################################################################
@@ -24,7 +23,6 @@
2423

2524
__all__ = [
2625
"VerifyAnalogCircuitDim",
27-
"VerifyAnalogArgsDim",
2826
]
2927

3028
########################################################################################
@@ -51,32 +49,6 @@ def __init__(self, n_qreg, n_qmode):
5149
self._dim: tuple = (n_qreg, n_qmode)
5250

5351
def map_AnalogGate(self, model: AnalogGate):
54-
assert self._dim == analysis_canonical_hamiltonian_dim(model.hamiltonian), (
55-
"Inconsistent Hilbert space dimension between Analog Gates"
56-
)
57-
58-
59-
class VerifyAnalogArgsDim(RewriteRule):
60-
"""
61-
Checks whether hilbert space dimensions are consistent between Expectation in args
62-
and whether they match the n_qreg and n_qmode given as input.
63-
64-
Args:
65-
model (VisitableBaseModel):
66-
The rule only verfies Expectation inside TaskArgsAnalog in Analog layer
67-
68-
Returns:
69-
model (VisitableBaseModel): unchanged
70-
71-
Assumptions:
72-
All [`Operator`][oqd_core.interface.analog.operator.Operator] inside [`AnalogCircuit`][oqd_core.interface.analog.operations.AnalogCircuit] are canonicalized
73-
"""
74-
75-
def __init__(self, n_qreg, n_qmode):
76-
super().__init__()
77-
self._dim: tuple = (n_qreg, n_qmode)
78-
79-
def map_Expectation(self, model: Expectation):
80-
assert self._dim == analysis_canonical_hamiltonian_dim(model.operator), (
81-
"Inconsistent Hilbert space dimension in Expectation metric"
82-
)
52+
assert self._dim == analysis_canonical_hamiltonian_dim(
53+
model.hamiltonian
54+
), "Inconsistent Hilbert space dimension between Analog Gates"

uv.lock

Lines changed: 1 addition & 1 deletion
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