NanoMips: Two-step stack setup

Adjust stack pointer in two steps if offset is larger than 4096.
In the first step adjust stack pointer for the size necessary to
spill CSR onto the stack. In the second step adjust stack pointer
for the size necessary to spill local objects.

Author: Nikola Peric

llvm/lib/Target/Mips/MipsMachineFunction.cpp

@@ -201,3 +201,19 @@ int MipsFunctionInfo::getMoveF64ViaSpillFI(MachineFunction &MF,
 }
 
 void MipsFunctionInfo::anchor() {}
+
+unsigned MipsFunctionInfo::getCalleeSavedStackSize() {
+  return CalleeSavedStackSize;
+}
+
+void MipsFunctionInfo::setCalleeSavedStackSize(unsigned Size) {
+  CalleeSavedStackSize = Size;
+}
+
+bool MipsFunctionInfo::isTwoStepStackSetup(MachineFunction &MF) {
+
+  const MipsSubtarget &STI =
+      *static_cast<const MipsSubtarget *>(&MF.getSubtarget());
+
+  return (MF.getFrameInfo().getStackSize() > 4096) && STI.hasNanoMips();
+}

llvm/lib/Target/Mips/MipsMachineFunction.h

@@ -108,6 +108,9 @@ class MipsFunctionInfo : public MachineFunctionInfo {
       JumpTableEntryInfo[Idx]->Signed = Sign;
     }
   }
+  unsigned getCalleeSavedStackSize();
+  void setCalleeSavedStackSize(unsigned Size);
+  bool isTwoStepStackSetup(MachineFunction &MF);
 
 private:
   virtual void anchor();
@@ -168,6 +171,7 @@ class MipsFunctionInfo : public MachineFunctionInfo {
   };
 
   SmallVector<NanoMipsJumpTableInfo *, 2> JumpTableEntryInfo;
+  unsigned CalleeSavedStackSize = 0;
 };
 
 } // end namespace llvm

llvm/lib/Target/Mips/MipsSEFrameLowering.cpp

@@ -432,19 +432,61 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
   MachineModuleInfo &MMI = MF.getMMI();
   const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
 
-  // Adjust stack.
-  TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
+  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
+
+  int64_t CalleeSavedStackSize;
+  int64_t LoaclStackSize;
+  // If we have two-step stack setup MBBI_2 will point to the
+  // first instruction after calle-saves store sequence
+  MachineBasicBlock::iterator MBBI_2 = MBBI;
+
+  if (MipsFI->isTwoStepStackSetup(MF)) {
+
+    CalleeSavedStackSize = MipsFI->getCalleeSavedStackSize();
+    unsigned NumOfCSI = MFI.getCalleeSavedInfo().size();
+
+    // Move MBBI_2 to point to the first instruction after
+    // calle-saves store sequence. That's the place for the second
+    // steck pointer adjustment.
+    std::advance(MBBI_2, NumOfCSI);
+
+    // The first stack pointer adjustment to cover space needed
+    // to spill callee-saved registers on stack.
+    TII.adjustStackPtr(SP, -CalleeSavedStackSize, MBB, MBBI);
+
+    LoaclStackSize = StackSize - CalleeSavedStackSize;
 
-  // emit ".cfi_def_cfa_offset StackSize"
-  unsigned CFIIndex =
-      MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
-  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
-      .addCFIIndex(CFIIndex);
+    // The second stack pointer adjustment to cover space needed
+    // to spill local objects on stack.
+    TII.adjustStackPtr(SP, -LoaclStackSize, MBB, MBBI_2);
+
+  } else
+    // Adjust stack.
+    TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
+
+  if (MipsFI->isTwoStepStackSetup(MF)) {
+    // emit ".cfi_def_cfa_offset CalleeSavedStackSize"
+    // emit ".cfi_def_cfa_offset StackSize = CalleeSavedStackSize +
+    // LoaclStackSize"
+    unsigned CFIIndex_1 = MF.addFrameInst(
+        MCCFIInstruction::cfiDefCfaOffset(nullptr, CalleeSavedStackSize));
+    unsigned CFIIndex_2 =
+        MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
+    BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
+        .addCFIIndex(CFIIndex_1);
+    BuildMI(MBB, MBBI_2, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
+        .addCFIIndex(CFIIndex_2);
+  } else {
+    // emit ".cfi_def_cfa_offset StackSize"
+    unsigned CFIIndex =
+        MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
+    BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
+        .addCFIIndex(CFIIndex);
+  }
 
   if (MF.getFunction().hasFnAttribute("interrupt"))
     emitInterruptPrologueStub(MF, MBB);
 
-  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
 
   if (!CSI.empty()) {
     // Find the instruction past the last instruction that saves a callee-saved
@@ -531,6 +573,14 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
     BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
       .setMIFlag(MachineInstr::FrameSetup);
 
+    if (MipsFI->isTwoStepStackSetup(MF))
+      // If we have two-step stack setup insert instruction "move $fp, $sp"
+      // after the second stack setup also
+      BuildMI(MBB, MBBI_2, dl, TII.get(MOVE), FP)
+          .addReg(SP)
+          .addReg(ZERO)
+          .setMIFlag(MachineInstr::FrameSetup);
+
     // emit ".cfi_def_cfa_register $fp"
     unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(
         nullptr, MRI->getDwarfRegNum(FP, true)));
@@ -747,8 +797,26 @@ void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF,
   if (!StackSize)
     return;
 
-  // Adjust stack.
-  TII.adjustStackPtr(SP, StackSize, MBB, MBBI);
+  if (MipsFI->isTwoStepStackSetup(MF)) {
+
+    int64_t CalleeSavedStackSize = MipsFI->getCalleeSavedStackSize();
+    int64_t LoaclStackSize = StackSize - CalleeSavedStackSize;
+
+    int64_t NumOfCSI = MFI.getCalleeSavedInfo().size();
+
+    MachineBasicBlock::iterator MBBI_2 = MBBI;
+    // Move MBBI_2 to point to the first instruction in
+    // calle-saved load sequence. That's the place where we
+    // need to undo the second stack adjustment
+    std::advance(MBBI_2, (-1) * NumOfCSI);
+
+    // Undo the second stack pointer adjustment
+    TII.adjustStackPtr(SP, LoaclStackSize, MBB, MBBI_2);
+    // Undo the first stack pointer adjustment
+    TII.adjustStackPtr(SP, CalleeSavedStackSize, MBB, MBBI);
+  } else
+    // Adjust stack.
+    TII.adjustStackPtr(SP, StackSize, MBB, MBBI);
 }
 
 void MipsSEFrameLowering::emitInterruptEpilogueStub(
@@ -957,25 +1025,38 @@ bool MipsSEFrameLowering::assignCalleeSavedSpillSlots(
     return Regs.at(First.getReg()) < Regs.at(Second.getReg());
   };
 
-  // If CSI list has less than two callee-saved registers we can
-  // return from method since no insertions nor sorting is needed
-  if(CSI.size() < 2)
-    return false;
+  // If CSI list has less than two callee-saved registers
+  // no insertions nor sorting is needed
+  if (CSI.size() >= 2) {
+
+    SmallBitVector CSNumBitVector(11);
+    for (CalleeSavedInfo &CS : CSI)
+      CSNumBitVector.set(Regs.at(CS.getReg()));
 
-  SmallBitVector CSNumBitVector(11);
-  for (CalleeSavedInfo &CS : CSI)
-    CSNumBitVector.set(Regs.at(CS.getReg()));
+    int MinCSNum = CSNumBitVector.find_first();
+    int MaxCSNum = CSNumBitVector.find_last();
 
-  int MinCSNum = CSNumBitVector.find_first();
-  int MaxCSNum = CSNumBitVector.find_last();
+    // Inserting all of the missing callee-saved registers between min and max
+    // in order to allow further load-store optimizations
+    for (int i = MinCSNum + 1; i < MaxCSNum; ++i)
+      if (!CSNumBitVector.test(i))
+        CSI.push_back(CalleeSavedInfo(CSNumToReg.at(i)));
+
+    std::sort(CSI.begin(), CSI.end(), CompareCalleeSaves);
+  }
 
-  // Inserting all of the missing callee-saved registers between min and max
-  // in order to allow further load-store optimizations
-  for (int i = MinCSNum + 1; i < MaxCSNum; ++i)
-    if (!CSNumBitVector.test(i))
-      CSI.push_back(CalleeSavedInfo(CSNumToReg.at(i)));
+  MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
+  const MachineRegisterInfo &MRI = MF.getRegInfo();
+
+  unsigned CalleeSavedOffsetSize = 0;
+  for (CalleeSavedInfo &CS : CSI) {
+    Register Reg = CS.getReg();
+    auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8;
+    CalleeSavedOffsetSize += RegSize;
+  }
+  uint64_t AlignedCSStackSize = alignTo(CalleeSavedOffsetSize, 16);
+  MipsFI->setCalleeSavedStackSize(AlignedCSStackSize);
 
-  std::sort(CSI.begin(), CSI.end(), CompareCalleeSaves);
   return false;
 }
 

llvm/lib/Target/Mips/MipsSERegisterInfo.cpp

@@ -220,7 +220,18 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
   bool IsKill = false;
   int64_t Offset;
 
-  Offset = SPOffset + (int64_t)StackSize;
+  if (MipsFI->isTwoStepStackSetup(MF)) {
+
+    int64_t CalleeSavedStackSize = MipsFI->getCalleeSavedStackSize();
+
+    if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
+      Offset = SPOffset + (int64_t)CalleeSavedStackSize;
+    else
+      Offset = SPOffset + StackSize;
+
+  } else
+    Offset = SPOffset + (int64_t)StackSize;
+
   Offset += MI.getOperand(OpNo + 1).getImm();
 
   LLVM_DEBUG(errs() << "Offset     : " << Offset << "\n"

llvm/test/CodeGen/Mips/nanomips/saverestore.ll

@@ -7,17 +7,6 @@ define void @test() {
 ; CHECK: restore.jrc 32, $s0, $s1, $s2, $s3, $s4, $s5, $s6, $s7
 }
 
-; Make sure that SAVE/RESTORE instructions are not used when the offset is larger than 4092.
-define void @test2() {
-; CHECK-NOT: save
-  %foo = alloca [4096 x i8], align 1
-  %1 = getelementptr inbounds [4096 x i8], [4096 x i8]* %foo, i32 0, i32 0
-  call void asm sideeffect "", "r,~{$16},~{$17},~{$18},~{$19},~{$20},~{$21},~{$23},~{$22},~{$1}"(i8* %1)
-  ret void
-; CHECK-NOT: restore.jrc
-; CHECK-NOT: restore
-}
-
 ; Make sure that SAVE/SAVE combination is used when incoming arguments need to
 ; be stored on the stack. First SAVE to move the stack pointer to where s-regs
 ; need to be stored and second SAVE to actually save the registers. Same logic

llvm/test/CodeGen/Mips/nanomips/two-step-stack-setup.ll

@@ -0,0 +1,36 @@
+; RUN: llc -mtriple=nanomips -asm-show-inst -verify-machineinstrs < %s | FileCheck %s
+
+; Check if stack setup is splitted into two-step setup when sp
+; offset is larger than 4096
+define void @test1() {
+  ; CHECK: save	32, $s0, $s1, $s2, $s3, $s4
+  ; CHECK: addiu $sp, $sp, -4096  
+  %foo = alloca [4096 x i8], align 1
+  %1 = getelementptr inbounds [4096 x i8], [4096 x i8]* %foo, i32 0, i32 0
+  call void asm sideeffect "", "r,~{$16},~{$17},~{$18},~{$19},~{$20},~{$1}"(i8* %1)
+  ret void
+  ; CHECK: addiu $sp, $sp, 4096
+  ; CHECK: restore.jrc	32, $s0, $s1, $s2, $s3, $s4
+}
+
+; Check if there are two instructions for storing sp in fp
+; if function uses fp and two-step stack setup is present
+define void @test2() #0 {
+  ; CHECK: save	32, $fp, $ra, $s0, $s1, $s2, $s3, $s4  
+  ; CHECK: or $fp, $sp, $zero
+  ; CHECK: addiu $sp, $sp, -4096
+  ; CHECK: or $fp, $sp, $zero
+  %foo = alloca [4096 x i8], align 1
+  %1 = getelementptr inbounds [4096 x i8], [4096 x i8]* %foo, i32 0, i32 0
+  call void asm sideeffect "", "r,~{$16},~{$17},~{$18},~{$19},~{$20},~{$1}"(i8* %1)
+  ret void
+  ; CHECK: addiu $sp, $sp, 4096
+  ; CHECK: restore.jrc	32, $fp, $ra, $s0, $s1, $s2, $s3, $s4
+}
+
+attributes #0 = { "frame-pointer"="all"}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 7, !"frame-pointer", i32 2}
+