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Djordje TodorovicAndrijaSyrmia
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NanoMips: Add option to disable BALC opt in linker
Added an option to disable BALC stubs optimization from llc. Added a test case for this change, changed addr.ll test as it was failing due to this change.
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3 files changed

+63
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llvm/lib/Target/Mips/MipsAsmPrinter.cpp

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,11 @@ using namespace llvm;
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extern cl::opt<bool> EmitJalrReloc;
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static cl::opt<bool> DisableNanoMipsBalcStubs(
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"disable-nanomips-balc-stubs", cl::Hidden,
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cl::desc("NANOMIPS: Disable balc stubs optimization in the linker"),
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cl::init(false));
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void MipsAsmPrinter::emitJumpTableInfo() {
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if (!Subtarget->hasNanoMips() || Subtarget->useAbsoluteJumpTables() ) {
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AsmPrinter::emitJumpTableInfo();
@@ -409,6 +414,18 @@ void MipsAsmPrinter::emitLoadAddressNM(MCStreamer &OutStreamer,
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LA.addOperand(Addr);
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EmitToStreamer(OutStreamer, LA);
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}
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// NOTE: This is being used to control optimization of BALC in the linker.
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static void emitDirectivesToDisableBalcStubs(const MachineInstr &MI,
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MCContext &OutContext,
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TargetMachine &TM,
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MCStreamer &OutStreamer) {
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assert(DisableNanoMipsBalcStubs || !MI.getMF()->getFunction().hasOptSize());
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MCSymbol *OffsetLabel = OutContext.createTempSymbol();
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const MCExpr *OffsetExpr = MCSymbolRefExpr::create(OffsetLabel, OutContext);
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OutStreamer.emitRelocDirective(*OffsetExpr, "R_NANOMIPS_NOTRAMP", nullptr,
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SMLoc(), *TM.getMCSubtargetInfo());
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OutStreamer.emitLabel(OffsetLabel);
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}
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void MipsAsmPrinter::emitInstruction(const MachineInstr *MI) {
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// FIXME: Enable feature predicate checks once all the test pass.
@@ -525,6 +542,11 @@ void MipsAsmPrinter::emitInstruction(const MachineInstr *MI) {
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continue;
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}
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if (Subtarget->hasNanoMips() && I->getOpcode() == Mips::BALC_NM &&
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(!I->getMF()->getFunction().hasOptSize() || DisableNanoMipsBalcStubs)) {
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emitDirectivesToDisableBalcStubs(*I, OutContext, TM, *OutStreamer);
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}
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// The inMips16Mode() test is not permanent.
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// Some instructions are marked as pseudo right now which
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// would make the test fail for the wrong reason but

llvm/test/CodeGen/Mips/nanomips/addr.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
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@b = external dso_local local_unnamed_addr global [0 x i32], align 4
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6-
define dso_local void @foo(i32* nocapture readonly %a) local_unnamed_addr {
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define dso_local void @foo(i32* nocapture readonly %a) local_unnamed_addr optsize {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: save 16, $ra
@@ -25,7 +25,7 @@ entry:
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declare dso_local void @sink(i32 signext, i32 signext) local_unnamed_addr
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define dso_local void @bar() local_unnamed_addr {
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define dso_local void @bar() local_unnamed_addr optsize {
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; CHECK-LABEL: bar:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: save 16, $ra
Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
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; Should enable REQUIRES: nanomips
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; ModuleID = 'disable-balc-stubs.c'
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source_filename = "disable-balc-stubs.c"
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target datalayout = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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target triple = "nanomips"
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; RUN: llc %s -o - | FileCheck %s
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; RUN: llc %s --disable-nanomips-balc-stubs -o - | FileCheck %s --check-prefix=CHECK-DISABLED
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; Function Attrs: noinline nounwind optnone
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define dso_local void @y() #0 {
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entry:
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ret void
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}
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; Function Attrs: noinline nounwind optsize
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; CHECK: f:
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; CHECK-DISABLED: f:
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define dso_local void @f() #1 {
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entry:
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; CHECK-NOT: R_NANOMIPS_NOTRAMP
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; CHECK-DISABLED: R_NANOMIPS_NOTRAMP
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call void @y()
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ret void
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}
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; Function Attrs: noinline nounwind optnone
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; CHECK: g:
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; CHECK-DISABLED: g:
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define dso_local void @g() #0 {
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entry:
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; CHECK: R_NANOMIPS_NOTRAMP
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call void @y()
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ret void
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}
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attributes #0 = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="i7200" "target-features"="+i7200,+pcrel,+relax,+soft-float,-noabicalls" "use-soft-float"="true" }
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attributes #1 = { noinline nounwind optsize "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="i7200" "target-features"="+i7200,+pcrel,+relax,+soft-float,-noabicalls" "use-soft-float"="true" }

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