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| 1 | +[target.riscv32imc-unknown-none-elf] |
| 2 | +runner = "espflash flash --monitor" |
| 3 | + |
| 4 | +[build] |
| 5 | +rustflags = [ |
| 6 | + "-C", "link-arg=-Tlinkall.x", |
| 7 | + "-C", "link-arg=-Trom_functions.x", |
| 8 | + # Required to obtain backtraces (e.g. when using the "esp-backtrace" crate.) |
| 9 | + # NOTE: May negatively impact performance of produced code |
| 10 | + "-C", "force-frame-pointers", |
| 11 | + |
| 12 | + # comment the cfgs below if you do _not_ wish to emulate atomics. |
| 13 | + # enable the atomic codegen option for RISCV |
| 14 | + "-C", "target-feature=+a", |
| 15 | + # tell the core library have atomics even though it's not specified in the target definition |
| 16 | + "--cfg", "target_has_atomic_load_store", |
| 17 | + "--cfg", 'target_has_atomic_load_store="8"', |
| 18 | + "--cfg", 'target_has_atomic_load_store="16"', |
| 19 | + "--cfg", 'target_has_atomic_load_store="32"', |
| 20 | + "--cfg", 'target_has_atomic_load_store="ptr"', |
| 21 | + # enable cas |
| 22 | + "--cfg", "target_has_atomic", |
| 23 | + "--cfg", 'target_has_atomic="8"', |
| 24 | + "--cfg", 'target_has_atomic="16"', |
| 25 | + "--cfg", 'target_has_atomic="32"', |
| 26 | + "--cfg", 'target_has_atomic="ptr"', |
| 27 | +] |
| 28 | + |
| 29 | +target = "riscv32imc-unknown-none-elf" |
| 30 | + |
| 31 | +[unstable] |
| 32 | +build-std = ["core"] |
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