From 3902713b299e0b743eb2a3e9b95e7b12f515ddd2 Mon Sep 17 00:00:00 2001 From: bsdevlin Date: Sat, 28 Sep 2019 13:44:09 +0800 Subject: [PATCH] Update testbench so with RAM code, passing. --- zcash_fpga/src/tb/bls12_381_top_tb.sv | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/zcash_fpga/src/tb/bls12_381_top_tb.sv b/zcash_fpga/src/tb/bls12_381_top_tb.sv index c3f634d..281457c 100644 --- a/zcash_fpga/src/tb/bls12_381_top_tb.sv +++ b/zcash_fpga/src/tb/bls12_381_top_tb.sv @@ -844,15 +844,16 @@ task init_ram(); $fclose(fd); end - // Now shift in data - for (int j = ((max_rams*381+31)/32); j >= 0; j--) begin - axi_lite_if.poke(.addr(32'h18), .data(dat_flat[j*32 +: 32])); - axi_lite_if.poke(.addr(32'h1c), .data(32'h02)); + if (eod == 0) begin + // Now shift in data + for (int j = ((max_rams*381+31)/32); j >= 0; j--) begin + axi_lite_if.poke(.addr(32'h18), .data(dat_flat[j*32 +: 32])); + axi_lite_if.poke(.addr(32'h1c), .data(32'h02)); + end + axi_lite_if.poke(.addr(32'h1c), .data(32'h01)); + nxt_line++; end - axi_lite_if.poke(.addr(32'h1c), .data(32'h01)); - nxt_line++; - end $display("INFO: Finished writing all RAMS", dat);