From 142be15d8d041527df328dc475dc2de94f9f037c Mon Sep 17 00:00:00 2001 From: bsdevlin Date: Thu, 26 Sep 2019 21:28:56 +0800 Subject: [PATCH] Update to fix bug with building on AWS with the new RAM lookup multiplier, files were not getting copied properly in AWS encrypt script. --- aws/cl_zcash/build/scripts/encrypt.tcl | 11 ++++ aws/cl_zcash/verif/tests/test_zcash.sv | 2 +- .../accum_mult_mod/scripts/generate_files.py | 2 +- .../accum_mult_mod/src/rtl/accum_mult_mod.sv | 2 +- zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv | 61 ++++++++++++------- zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv | 4 +- zcash_fpga/src/rtl/top/zcash_fpga_top.sv | 5 +- 7 files changed, 60 insertions(+), 27 deletions(-) diff --git a/aws/cl_zcash/build/scripts/encrypt.tcl b/aws/cl_zcash/build/scripts/encrypt.tcl index f2afc65..ad1b092 100644 --- a/aws/cl_zcash/build/scripts/encrypt.tcl +++ b/aws/cl_zcash/build/scripts/encrypt.tcl @@ -44,6 +44,17 @@ foreach ele $splitCont { } } +# Copy BRAM init files if they exist +foreach f [glob -directory "${ZCASH_DIR}/ip_cores/accum_mult_mod/data/" -nocomplain *] { + file copy -force $f $TARGET_DIR +} + +# Copy generated file if it exists +set filep "${ZCASH_DIR}/ip_cores/accum_mult_mod/src/rtl/accum_mult_mod_generated.inc" +if { [file exists $filep] } { + file copy -force $filep $TARGET_DIR +} + ## Change file names and paths below to reflect your CL area. DO NOT include AWS RTL files. file copy -force $CL_DIR/design/cl_zcash_defines.vh $TARGET_DIR file copy -force $CL_DIR/design/cl_id_defines.vh $TARGET_DIR diff --git a/aws/cl_zcash/verif/tests/test_zcash.sv b/aws/cl_zcash/verif/tests/test_zcash.sv index b70cdad..1be5038 100644 --- a/aws/cl_zcash/verif/tests/test_zcash.sv +++ b/aws/cl_zcash/verif/tests/test_zcash.sv @@ -279,7 +279,7 @@ task test_bls12_381(); for(int i = 0; i < 48; i = i + 4) write_ocl_reg(.addr(`ZCASH_OFFSET + bls12_381_pkg::DATA_AXIL_START + 3*64 + i), .data(slot_data[i*8 +: 32])); - inst = '{code:FP2_FPOINT_MULT, a:16'd3, b:16'd0, c:16'd0}; + inst = '{code:POINT_MULT, a:16'd3, b:16'd0, c:16'd0}; for(int i = 0; i < 8; i = i + 4) write_ocl_reg(.addr(`ZCASH_OFFSET + bls12_381_pkg::INST_AXIL_START + 1*8 + i), .data(inst[i*8 +: 32])); diff --git a/ip_cores/accum_mult_mod/scripts/generate_files.py b/ip_cores/accum_mult_mod/scripts/generate_files.py index 62bfd4d..40ee5f1 100644 --- a/ip_cores/accum_mult_mod/scripts/generate_files.py +++ b/ip_cores/accum_mult_mod/scripts/generate_files.py @@ -300,7 +300,7 @@ def get_accum_gen(): -f = open('../src/rtl/accum_mult_mod_generated.sv', 'w') +f = open('../src/rtl/accum_mult_mod_generated.inc', 'w') f.write(get_accum_gen()) f.close() diff --git a/ip_cores/accum_mult_mod/src/rtl/accum_mult_mod.sv b/ip_cores/accum_mult_mod/src/rtl/accum_mult_mod.sv index 3b222ab..1c44a4b 100644 --- a/ip_cores/accum_mult_mod/src/rtl/accum_mult_mod.sv +++ b/ip_cores/accum_mult_mod/src/rtl/accum_mult_mod.sv @@ -53,7 +53,7 @@ logic [2*DAT_BITS:0] res0_c, res0_r, res0_rr; logic [DAT_BITS:0] res1_c, res1_m_c, res1_m_c_; // Most of the code is generated -`include "accum_mult_mod_generated.sv" +`include "accum_mult_mod_generated.inc" logic [PIPE-1:0] val, sop, eop; logic [PIPE-1:0][CTL_BITS-1:0] ctl; diff --git a/zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv b/zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv index 180599b..f7c5d49 100644 --- a/zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv +++ b/zcash_fpga/src/rtl/bls12_381/bls12_381_top.sv @@ -21,6 +21,7 @@ module bls12_381_top import bls12_381_pkg::*; #( + parameter USE_KARATSUBA = "YES" )( input i_clk, i_rst, // Only tx interface is used to send messages to SW on a SEND-INTERRUPT instruction @@ -345,25 +346,41 @@ resource_share_mul ( .o_axi ( mul_out_if[1:0] ) ); -accum_mult_mod #( - .DAT_BITS ( $bits(FE_TYPE) ), - .MODULUS ( P ), - .CTL_BITS ( CTL_BITS ), - .A_DSP_W ( 26 ), - .B_DSP_W ( 17 ), - .GRID_BIT ( 64 ), - .RAM_A_W ( 8 ), - .RAM_D_W ( 32 ) -) -accum_mult_mod ( - .i_clk ( i_clk ), - .i_rst ( i_rst ), - .i_mul ( mul_in_if[2] ), - .o_mul ( mul_out_if[2] ), - .i_ram_d ( mult_ram_d ), - .i_ram_we ( mult_ram_we ), - .i_ram_se ( mult_ram_se ) -); +generate + if (USE_KARATSUBA == "YES") begin: GEN_KARATSUBA + ec_fp_mult_mod #( + .P ( P ), + .KARATSUBA_LVL ( 3 ), + .CTL_BITS ( CTL_BITS ) + ) + ec_fp_mult_mod ( + .i_clk( i_clk ), + .i_rst( i_rst ), + .i_mul ( mul_in_if[2] ), + .o_mul ( mul_out_if[2] ) + ); + end else begin + accum_mult_mod #( + .DAT_BITS ( $bits(FE_TYPE) ), + .MODULUS ( P ), + .CTL_BITS ( CTL_BITS ), + .A_DSP_W ( 26 ), + .B_DSP_W ( 17 ), + .GRID_BIT ( 64 ), + .RAM_A_W ( 8 ), + .RAM_D_W ( 32 ) + ) + accum_mult_mod ( + .i_clk ( i_clk ), + .i_rst ( i_rst ), + .i_mul ( mul_in_if[2] ), + .o_mul ( mul_out_if[2] ), + .i_ram_d ( mult_ram_d ), + .i_ram_we ( mult_ram_we ), + .i_ram_se ( mult_ram_se ) + ); + end +endgenerate adder_pipe # ( .P ( P ), @@ -646,7 +663,7 @@ task task_mul_element(); 8,9,10,11,12,13,14,15,16,17,18,19, 20,21,22,23,24,25,26,27,28,29,30,31: begin mul_fe12_i_if.rdy <= 0; - + if (|data_ram_read[READ_CYCLE:1]== 0 && (~mul_fe12_o_if.val || (mul_fe12_o_if.val && mul_fe12_o_if.rdy))) begin if (data_ram_read[0]) begin data_ram_read[0] <= 1; @@ -950,8 +967,8 @@ task task_pairing(); new_data.dat <= pair_o_res_if.val ? pair_o_res_if.dat : mult_pt_if.dat; data_ram_sys_if.we <= 1; if ((pair_o_res_if.val && ~pair_o_res_if.sop) || - (mult_pt_if.val && ~mult_pt_if.sop)) - data_ram_sys_if.a <= data_ram_sys_if.a + 1; + (mult_pt_if.val && ~mult_pt_if.sop)) + data_ram_sys_if.a <= data_ram_sys_if.a + 1; if (pair_o_res_if.eop || mult_pt_if.eop) begin mult_pt_if.rdy <= 0; pair_o_res_if.rdy <= 0; diff --git a/zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv b/zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv index 4ff0bb9..d5c7d6b 100644 --- a/zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv +++ b/zcash_fpga/src/rtl/top/zcash_fpga_pkg.sv @@ -27,7 +27,7 @@ package zcash_fpga_pkg; import bls12_381_pkg::point_type_t; - parameter FPGA_VERSION = 32'h01_04_00; //v1.4.0 + parameter FPGA_VERSION = 32'h01_04_01; //v1.4.1 // What features are enabled in this build parameter bit ENB_VERIFY_SECP256K1_SIG = 1; @@ -40,6 +40,8 @@ package zcash_fpga_pkg; (ENB_VERIFY_EQUIHASH && equihash_pkg::N == 144 && equihash_pkg::K == 5), // N = 144, K = 5 for VERIFY_EQUIHASH command (ENB_VERIFY_EQUIHASH && equihash_pkg::N == 200 && equihash_pkg::K == 9)}; // N = 200, K = 9 for VERIFY_EQUIHASH command + localparam BLS12_381_USE_KARATSUBA = "NO"; // ["YES" | "NO"], defines to use Karatsuba multiplier ("YES"), otherwise accum_mod with RAM reduction + // These are all the command types the FPGA supports // Reply messages from the FPGA to host all have the last // bit set (start at 0x80000000). Messages with bits [31:16] == 0 are processed by a different state machine diff --git a/zcash_fpga/src/rtl/top/zcash_fpga_top.sv b/zcash_fpga/src/rtl/top/zcash_fpga_top.sv index 8ace6de..37f719f 100644 --- a/zcash_fpga/src/rtl/top/zcash_fpga_top.sv +++ b/zcash_fpga/src/rtl/top/zcash_fpga_top.sv @@ -224,7 +224,10 @@ secp256k1_top secp256k1_top ( .if_cmd_tx ( secp256k1_in_if_s_r ) ); -bls12_381_top bls12_381_top ( +bls12_381_top #( + .USE_KARATSUBA ( BLS12_381_USE_KARATSUBA ) +) +bls12_381_top ( .i_clk ( i_clk_if ), .i_rst ( i_rst_if || ENB_BLS12_381 == 0 ), .tx_if ( tx_int_if[1] ),