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gbs-control.ino
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#include <Wire.h>
#include "ntsc_240p.h"
#include "pal_240p.h"
#include "ntsc_feedbackclock.h"
#include "pal_feedbackclock.h"
#include "ntsc_1280x720.h"
#include "ntsc_1280x1024.h"
#include "ntsc_1920x1080.h"
#include "pal_1280x720.h"
#include "pal_1280x1024.h"
#include "pal_1920x1080.h"
#include "presetMdSection.h"
#include "presetDeinterlacerSection.h"
#include "presetHdBypassSection.h"
#include "ofw_RGBS.h"
#include "tv5725.h"
#include "framesync.h"
#include "osd.h"
typedef TV5725<GBS_ADDR> GBS;
#if defined(ESP8266) // select WeMos D1 R2 & mini in IDE for NodeMCU! (otherwise LED_BUILTIN is mapped to D0 / does not work)
#include <ESP8266WiFi.h>
#include "FS.h"
#include <DNSServer.h>
#include <ESP8266WebServer.h>
#include <WiFiUdp.h>
#include <ArduinoOTA.h>
#include "PersWiFiManager.h"
#include <ESP8266mDNS.h> // mDNS library for finding gbscontrol.local on the local network
//#define HAVE_PINGER_LIBRARY // ESP8266-ping library to aid debugging WiFi issues, install via Arduino library manager
#ifdef HAVE_PINGER_LIBRARY
#include <Pinger.h>
#include <PingerResponse.h>
unsigned long pingLastTime;
#endif
// WebSockets library by Markus Sattler
// to install: "Sketch" > "Include Library" > "Manage Libraries ..." > search for "websockets" and install "WebSockets for Arduino (Server + Client)"
#include <WebSocketsServer.h>
const char* ap_ssid = "gbscontrol";
const char* ap_password = "qqqqqqqq";
// change device_hostname_full and device_hostname_partial to rename the device
// (allows 2 or more on the same network)
const char* device_hostname_full = "gbscontrol.local";
const char* device_hostname_partial = "gbscontrol"; // for MDNS
//
const char* ap_info_string = "(WiFi) AP mode (SSID: gbscontrol, pass 'qqqqqqqq'): Access 'gbscontrol.local' in your browser";
ESP8266WebServer server(80);
DNSServer dnsServer;
WebSocketsServer webSocket(81);
PersWiFiManager persWM(server, dnsServer);
#ifdef HAVE_PINGER_LIBRARY
Pinger pinger; // pinger global object to aid debugging WiFi issues
#endif
#define DEBUG_IN_PIN D6 // marked "D12/MISO/D6" (Wemos D1) or D6 (Lolin NodeMCU)
// SCL = D1 (Lolin), D15 (Wemos D1) // ESP8266 Arduino default map: SCL
// SDA = D2 (Lolin), D14 (Wemos D1) // ESP8266 Arduino default map: SDA
#define LEDON \
pinMode(LED_BUILTIN, OUTPUT); \
digitalWrite(LED_BUILTIN, LOW)
#define LEDOFF \
digitalWrite(LED_BUILTIN, HIGH); \
pinMode(LED_BUILTIN, INPUT)
// fast ESP8266 digitalRead (21 cycles vs 77), *should* work with all possible input pins
// but only "D7" and "D6" have been tested so far
#define digitalRead(x) ((GPIO_REG_READ(GPIO_IN_ADDRESS) >> x) & 1)
#else // Arduino
#define LEDON \
pinMode(LED_BUILTIN, OUTPUT); \
digitalWrite(LED_BUILTIN, HIGH)
#define LEDOFF \
digitalWrite(LED_BUILTIN, LOW); \
pinMode(LED_BUILTIN, INPUT)
#define DEBUG_IN_PIN 11
// fastest, but non portable (Uno pin 11 = PB3, Mega2560 pin 11 = PB5)
//#define digitalRead(x) bitRead(PINB, 3)
#include "fastpin.h"
#define digitalRead(x) fastRead<x>()
//#define HAVE_BUTTONS
#define INPUT_PIN 9
#define DOWN_PIN 8
#define UP_PIN 7
#define MENU_PIN 6
#endif
// feed the current measurement, get back the moving average
uint8_t getMovingAverage(uint8_t item)
{
static const uint8_t sz = 16;
static uint8_t arr[sz] = { 0 };
static uint8_t pos = 0;
arr[pos] = item;
if (pos < (sz - 1)) {
pos++;
}
else {
pos = 0;
}
uint16_t sum = 0;
for (uint8_t i = 0; i < sz; i++) {
sum += arr[i];
}
return sum >> 4; // for array size 16
}
//
// Sync locking tunables/magic numbers
//
struct FrameSyncAttrs {
static const uint8_t debugInPin = DEBUG_IN_PIN;
static const uint32_t lockInterval = 60 * 16; // every 60 frames. good range for this: 30 to 90 (milliseconds)
static const int16_t syncCorrection = 2; // Sync correction in scanlines to apply when phase lags target
static const int32_t syncTargetPhase = 90; // Target vsync phase offset (output trails input) in degrees
};
typedef FrameSyncManager<GBS, FrameSyncAttrs> FrameSync;
struct MenuAttrs {
static const int8_t shiftDelta = 4;
static const int8_t scaleDelta = 4;
static const int16_t vertShiftRange = 300;
static const int16_t horizShiftRange = 400;
static const int16_t vertScaleRange = 100;
static const int16_t horizScaleRange = 130;
static const int16_t barLength = 100;
};
typedef MenuManager<GBS, MenuAttrs> Menu;
// runTimeOptions holds system variables
struct runTimeOptions {
uint8_t presetVlineShift;
uint8_t videoStandardInput; // 0 - unknown, 1 - NTSC like, 2 - PAL like, 3 480p NTSC, 4 576p PAL
uint8_t phaseSP;
uint8_t phaseADC;
uint8_t currentLevelSOG;
uint8_t thisSourceMaxLevelSOG;
uint8_t syncLockFailIgnore;
uint8_t applyPresetDoneStage;
uint8_t continousStableCounter;
uint8_t failRetryAttempts;
uint8_t presetID;
uint8_t HPLLState;
boolean isInLowPowerMode;
boolean clampPositionIsSet;
boolean coastPositionIsSet;
boolean inputIsYpBpR;
boolean syncWatcherEnabled;
boolean outModePassThroughWithIf;
boolean printInfos;
boolean sourceDisconnected;
boolean webServerEnabled;
boolean webServerStarted;
boolean allowUpdatesOTA;
boolean enableDebugPings;
boolean autoBestHtotalEnabled;
boolean videoIsFrozen;
boolean forceRetime;
boolean motionAdaptiveDeinterlaceActive;
boolean deinterlaceAutoEnabled;
boolean scanlinesEnabled;
boolean boardHasPower;
boolean blockModeDetectVSkew;
boolean presetIsPalForce60;
boolean RGBHVsyncTypeCsync;
} rtos;
struct runTimeOptions *rto = &rtos;
// userOptions holds user preferences / customizations
struct userOptions {
uint8_t presetPreference; // 0 - normal, 1 - feedback clock, 2 - customized, 3 - 1280x720, 4 - 1280x1024, 5 - 1920x1080, 10 - bypass
uint8_t presetSlot;
uint8_t enableFrameTimeLock;
uint8_t frameTimeLockMethod;
uint8_t enableAutoGain;
uint8_t wantScanlines;
uint8_t wantOutputComponent;
uint8_t deintMode;
uint8_t wantVdsLineFilter;
uint8_t wantPeaking;
uint8_t preferScalingRgbhv;
uint8_t PalForce60;
uint8_t overscan;
} uopts;
struct userOptions *uopt = &uopts;
// remember adc options across presets
struct adcOptions {
uint8_t r_gain;
uint8_t g_gain;
uint8_t b_gain;
} adcopts;
struct adcOptions *adco = &adcopts;
char globalCommand; // Serial / Web Server commands
//uint8_t globalDelay; // used for dev / debug
#if defined(ESP8266)
// serial mirror class for websocket logs
class SerialMirror : public Stream {
size_t write(const uint8_t *data, size_t size) {
#if defined(ESP8266)
webSocket.broadcastTXT(data, size);
#endif
Serial.write(data, size);
return size;
}
size_t write(uint8_t data) {
#if defined(ESP8266)
webSocket.broadcastTXT(&data);
#endif
Serial.write(data);
return 1;
}
int available() {
return 0;
}
int read() {
return -1;
}
int peek() {
return -1;
}
void flush() { }
};
SerialMirror SerialM;
#else
#define SerialM Serial
#endif
static uint8_t lastSegment = 0xFF;
static inline void writeOneByte(uint8_t slaveRegister, uint8_t value)
{
writeBytes(slaveRegister, &value, 1);
}
static inline void writeBytes(uint8_t slaveRegister, uint8_t* values, uint8_t numValues)
{
if (slaveRegister == 0xF0 && numValues == 1) {
lastSegment = *values;
}
else
GBS::write(lastSegment, slaveRegister, values, numValues);
}
void copyBank(uint8_t* bank, const uint8_t* programArray, uint16_t* index)
{
for (uint8_t x = 0; x < 16; ++x) {
bank[x] = pgm_read_byte(programArray + *index);
(*index)++;
}
}
void zeroAll()
{
// turn processing units off first
writeOneByte(0xF0, 0);
writeOneByte(0x46, 0x00); // reset controls 1
writeOneByte(0x47, 0x00); // reset controls 2
// zero out entire register space
for (int y = 0; y < 6; y++)
{
writeOneByte(0xF0, (uint8_t)y);
for (int z = 0; z < 16; z++)
{
uint8_t bank[16];
for (int w = 0; w < 16; w++)
{
bank[w] = 0;
}
writeBytes(z * 16, bank, 16);
}
}
}
void loadHdBypassSection() {
uint16_t index = 0;
uint8_t bank[16];
writeOneByte(0xF0, 1);
for (int j = 3; j <= 5; j++) { // start at 0x30
copyBank(bank, presetHdBypassSection, &index);
writeBytes(j * 16, bank, 16);
}
}
void loadPresetDeinterlacerSection() {
uint16_t index = 0;
uint8_t bank[16];
writeOneByte(0xF0, 2);
for (int j = 0; j <= 3; j++) { // start at 0x00
copyBank(bank, presetDeinterlacerSection, &index);
writeBytes(j * 16, bank, 16);
}
}
void loadPresetMdSection() {
uint16_t index = 0;
uint8_t bank[16];
writeOneByte(0xF0, 1);
for (int j = 6; j <= 7; j++) { // start at 0x60
copyBank(bank, presetMdSection, &index);
writeBytes(j * 16, bank, 16);
}
bank[0] = pgm_read_byte(presetMdSection + index);
bank[1] = pgm_read_byte(presetMdSection + index + 1);
bank[2] = pgm_read_byte(presetMdSection + index + 2);
bank[3] = pgm_read_byte(presetMdSection + index + 3);
writeBytes(8 * 16, bank, 4); // MD section ends at 0x83, not 0x90
}
// programs all valid registers (the register map has holes in it, so it's not straight forward)
// 'index' keeps track of the current preset data location.
void writeProgramArrayNew(const uint8_t* programArray, boolean skipMDSection)
{
uint16_t index = 0;
uint8_t bank[16];
uint8_t y = 0;
GBS::PAD_SYNC_OUT_ENZ::write(1);
GBS::DAC_RGBS_PWDNZ::write(0); // direct disableDAC()
// should only be possible if previously was in RGBHV bypass, then hit a manual preset switch
if (rto->videoStandardInput == 15) {
rto->videoStandardInput = 0;
}
rto->outModePassThroughWithIf = 0; // the default at this stage
for (; y < 6; y++)
{
writeOneByte(0xF0, (uint8_t)y);
switch (y) {
case 0:
for (int j = 0; j <= 1; j++) { // 2 times
for (int x = 0; x <= 15; x++) {
if (j == 0 && x == 4) {
// keep DAC off
bank[x] = pgm_read_byte(programArray + index) & ~(1 << 0);
}
//else if (j == 0 && (x == 6 || x == 7)) {
// // keep reset controls active
// bank[x] = 0;
//}
else if (j == 0 && x == 9) {
// // keep sync output off
bank[x] = pgm_read_byte(programArray + index) | (1 << 2);
}
else {
// use preset values
bank[x] = pgm_read_byte(programArray + index);
}
index++;
}
writeBytes(0x40 + (j * 16), bank, 16);
}
copyBank(bank, programArray, &index);
writeBytes(0x90, bank, 16);
break;
case 1:
for (int j = 0; j <= 2; j++) { // 3 times
copyBank(bank, programArray, &index);
writeBytes(j * 16, bank, 16);
}
if (!skipMDSection) {
loadPresetMdSection();
}
break;
case 2:
loadPresetDeinterlacerSection();
break;
case 3:
for (int j = 0; j <= 7; j++) { // 8 times
copyBank(bank, programArray, &index);
writeBytes(j * 16, bank, 16);
}
// blank out VDS PIP registers, otherwise they can end up uninitialized
for (int x = 0; x <= 15; x++) {
writeOneByte(0x80 + x, 0x00);
}
break;
case 4:
for (int j = 0; j <= 5; j++) { // 6 times
copyBank(bank, programArray, &index);
writeBytes(j * 16, bank, 16);
}
break;
case 5:
for (int j = 0; j <= 6; j++) { // 7 times
for (int x = 0; x <= 15; x++) {
bank[x] = pgm_read_byte(programArray + index);
if (index == 322) { // s5_02 bit 6+7 = input selector (only bit 6 is relevant)
if (rto->inputIsYpBpR)bitClear(bank[x], 6);
else bitSet(bank[x], 6);
}
if (index == 324) { // s5_04 reset for ADC REF init
bank[x] = 0x00;
}
if (index == 382) { // s5_3e
bitSet(bank[x], 5); // SP_DIS_SUB_COAST = 1
}
if (index == 407) { // s5_57
bitSet(bank[x], 0); // SP_NO_CLAMP_REG = 1
}
index++;
}
writeBytes(j * 16, bank, 16);
}
break;
}
}
// 640x480 RGBHV scaling mode
if (rto->videoStandardInput == 14) {
GBS::GBS_OPTION_SCALING_RGBHV::write(1);
rto->videoStandardInput = 3;
}
}
void setResetParameters() {
SerialM.println("<reset>");
rto->videoStandardInput = 0;
rto->videoIsFrozen = false;
rto->applyPresetDoneStage = 0;
rto->presetVlineShift = 0;
rto->sourceDisconnected = true;
rto->outModePassThroughWithIf = 0; // forget passthrough mode (could be option)
rto->clampPositionIsSet = 0;
rto->coastPositionIsSet = 0;
rto->continousStableCounter = 0;
rto->isInLowPowerMode = false;
rto->currentLevelSOG = 11;
rto->thisSourceMaxLevelSOG = 31; // 31 = auto sog has not (yet) run
rto->failRetryAttempts = 0;
rto->HPLLState = 0;
rto->motionAdaptiveDeinterlaceActive = false;
rto->scanlinesEnabled = false;
rto->blockModeDetectVSkew = false;
rto->RGBHVsyncTypeCsync = false;
adco->r_gain = 0;
adco->g_gain = 0;
adco->b_gain = 0;
GBS::OUT_SYNC_CNTRL::write(0); // no H / V sync out to PAD
setAndUpdateSogLevel(rto->currentLevelSOG);
GBS::RESET_CONTROL_0x46::write(0x00); // all units off
GBS::RESET_CONTROL_0x47::write(0x00);
GBS::GPIO_CONTROL_00::write(0x67); // most GPIO pins regular GPIO
GBS::GPIO_CONTROL_01::write(0x00); // all GPIO outputs disabled
GBS::DAC_RGBS_PWDNZ::write(0); // disable DAC (output)
GBS::PLL648_CONTROL_01::write(0x00); // VCLK(1/2/4) display clock // needs valid for debug bus
GBS::IF_SEL_ADC_SYNC::write(1); // ! 1_28
GBS::PLLAD_VCORST::write(1); // reset = 1
GBS::PLL_ADS::write(1); // When = 1, input clock is from ADC ( otherwise, from unconnected clock at pin 40 )
GBS::PLL_CKIS::write(0); // PLL use OSC clock
GBS::PLL_MS::write(2); // fb memory clock can go lower power
GBS::PAD_CONTROL_00_0x48::write(0x2b); //disable digital inputs, enable debug out pin
GBS::PAD_CONTROL_01_0x49::write(0x1f); //pad control pull down/up transistors on
loadHdBypassSection(); // 1_30 to 1_55
// adc for sog detection
GBS::ADC_INPUT_SEL::write(1); // 1 = RGBS / RGBHV adc data input
GBS::SP_EXT_SYNC_SEL::write(0); // connect HV input ( 5_20 bit 3 )
GBS::ADC_TR_RSEL::write(2); // 5_04 // ADC_TR_RSEL = 2 test
//GBS::ADC_TR_ISEL::write(0); // leave current at default
GBS::ADC_TEST::write(2); // 5_0c bit 2 // should work now
GBS::SP_NO_CLAMP_REG::write(1);
GBS::ADC_SOGEN::write(1);
GBS::ADC_POWDZ::write(1); // ADC on
GBS::PLLAD_ICP::write(0); // lowest charge pump current
GBS::PLLAD_FS::write(0); // low gain (have to deal with cold and warm startups)
GBS::PLLAD_5_16::write(0x1f); // this maybe needs to be the sog detection default
GBS::PLLAD_MD::write(0x700);
resetPLL(); // cycles PLL648
delay(2);
resetPLLAD(); // same for PLLAD
GBS::PLL_VCORST::write(1); // reset on
GBS::PLLAD_CONTROL_00_5x11::write(0x01); // reset on
resetDebugPort();
GBS::RESET_CONTROL_0x47::write(0x16);
GBS::INTERRUPT_CONTROL_01::write(0xf5); // enable interrupts (leave out source mode switch bits)
GBS::INTERRUPT_CONTROL_00::write(0xff); // reset irq status
GBS::INTERRUPT_CONTROL_00::write(0x00);
GBS::RESET_CONTROL_0x47::write(0x16); // decimation off
GBS::PAD_SYNC_OUT_ENZ::write(0); // sync output enabled, will be low (HC125 fix)
}
void OutputComponentOrVGA() {
boolean isCustomPreset = GBS::ADC_0X00_RESERVED_5::read();
if (uopt->wantOutputComponent) {
SerialM.println("Output Format: Component");
GBS::VDS_SYNC_LEV::write(0x80); // 0.25Vpp sync (leave more room for Y)
GBS::VDS_CONVT_BYPS::write(1); // output YUV
GBS::OUT_SYNC_CNTRL::write(0); // no H / V sync out to PAD
// patch up some presets
uint8_t id = GBS::GBS_PRESET_ID::read();
if (!isCustomPreset) {
if (id == 0x02 || id == 0x12 || id == 0x01 || id == 0x11) { // 1280x1024, 1280x960 presets
set_vtotal(1090); // 1080 is enough lines to trick my tv into "1080p" mode
if (id == 0x02 || id == 0x01) { // 60
GBS::IF_VB_SP::write(2); // GBS::IF_VB_SP::read() - 16 // better fix this
GBS::IF_VB_ST::write(0); // GBS::IF_VB_ST::read() - 16
GBS::VDS_HS_SP::write(10);
}
else { // 50
GBS::VDS_DIS_HB_ST::write(GBS::VDS_DIS_HB_ST::read() - 70);
GBS::VDS_HSCALE::write(724);
GBS::IF_VB_SP::write(2); // GBS::IF_VB_SP::read() - 18
GBS::IF_VB_ST::write(0); // GBS::IF_VB_ST::read() - 18
}
rto->forceRetime = true;
}
}
}
else {
GBS::VDS_SYNC_LEV::write(0);
GBS::VDS_CONVT_BYPS::write(0); // output RGB
GBS::OUT_SYNC_CNTRL::write(1); // H / V sync out enable
}
if (!isCustomPreset) {
if (rto->inputIsYpBpR == true) {
applyYuvPatches();
}
else {
applyRGBPatches();
}
}
}
void applyComponentColorMixing() {
GBS::VDS_Y_GAIN::write(0x64); // 3_35
GBS::VDS_UCOS_GAIN::write(0x19); // 3_36
GBS::VDS_VCOS_GAIN::write(0x19); // 3_37
GBS::VDS_Y_OFST::write(0xfe); // 3_3a
GBS::VDS_U_OFST::write(0x01); // 3_3b
}
void applyYuvPatches() {
GBS::ADC_RYSEL_R::write(1); // midlevel clamp red
GBS::ADC_RYSEL_B::write(1); // midlevel clamp blue
GBS::IF_MATRIX_BYPS::write(1);
// auto offset
GBS::DEC_MATRIX_BYPS::write(1); // ADC
GBS::IF_AUTO_OFST_U_RANGE::write(1);
GBS::IF_AUTO_OFST_V_RANGE::write(1);
GBS::IF_AUTO_OFST_PRD::write(0); // 0 = by line, 1 = by frame
GBS::IF_AUTO_OFST_EN::write(0); // not too reliable yet
// colors
GBS::VDS_Y_GAIN::write(0x80); // 0x80 = 0
GBS::VDS_VCOS_GAIN::write(0x28); // red
GBS::VDS_UCOS_GAIN::write(0x1c); // blue
GBS::VDS_Y_OFST::write(0xFE); // 0 3_3a
GBS::VDS_U_OFST::write(0x01); // 0 3_3b
GBS::VDS_V_OFST::write(0x01); // 0 3_3c
if (uopt->wantOutputComponent) {
applyComponentColorMixing();
}
}
void applyRGBPatches() {
GBS::ADC_RYSEL_R::write(0); // gnd clamp red
GBS::ADC_RYSEL_B::write(0); // gnd clamp blue
// auto offset
GBS::DEC_MATRIX_BYPS::write(0); // ADC
GBS::IF_AUTO_OFST_U_RANGE::write(1);
GBS::IF_AUTO_OFST_V_RANGE::write(1);
GBS::IF_AUTO_OFST_PRD::write(0); // 0 = by line, 1 = by frame
GBS::IF_AUTO_OFST_EN::write(0); // not too reliable yet
GBS::IF_MATRIX_BYPS::write(1);
// colors
GBS::VDS_Y_GAIN::write(0x80); // 0x80 = 0
GBS::VDS_VCOS_GAIN::write(0x28); // red
GBS::VDS_UCOS_GAIN::write(0x1c); // blue
GBS::VDS_USIN_GAIN::write(0x00); // 3_38
GBS::VDS_VSIN_GAIN::write(0x00); // 3_39
GBS::VDS_Y_OFST::write(0xFF); // 3_3a
GBS::VDS_U_OFST::write(0x00); // 3_3b
GBS::VDS_V_OFST::write(0x00); // 3_3c
if (uopt->wantOutputComponent) {
applyComponentColorMixing();
}
}
void setAdcParametersGainAndOffset() {
GBS::ADC_ROFCTRL::write(0x3f); // R and B ADC channels seem to be offset from G in hardware
GBS::ADC_GOFCTRL::write(0x3f);
GBS::ADC_BOFCTRL::write(0x3f);
GBS::ADC_RGCTRL::write(0x7b); // ADC_TR_RSEL = 2 test
GBS::ADC_GGCTRL::write(0x7b);
GBS::ADC_BGCTRL::write(0x7b);
}
void updateHSyncEdge() {
static uint8_t printHS = 0, printVS = 0;
uint8_t syncStatus = GBS::STATUS_16::read();
if ((syncStatus & 0x02) != 0x02) // if !hs active
{
//SerialM.println("(SP) can't detect sync edge");
}
else
{
if ((syncStatus & 0x01) == 0x00)
{
if (printHS != 1) { SerialM.println("(SP) HS active low"); }
printHS = 1;
if (rto->videoStandardInput == 15) {
GBS::SP_CS_P_SWAP::write(1); // 5_3e 0 // bad in Component input mode, good in RGBHV
}
GBS::SP_HS_PROC_INV_REG::write(0); // 5_56 5
//GBS::SP_HS2PLL_INV_REG::write(1); //5_56 1
}
else
{
if (printHS != 2) { SerialM.println("(SP) HS active high"); }
printHS = 2;
if (rto->videoStandardInput == 15) {
GBS::SP_CS_P_SWAP::write(0); // 5_3e 0
}
GBS::SP_HS_PROC_INV_REG::write(1); // 5_56 5
//GBS::SP_HS2PLL_INV_REG::write(0); //5_56 1
}
if (rto->RGBHVsyncTypeCsync == false)
{
if ((syncStatus & 0x04) == 0x00)
{
if (printVS != 1) { SerialM.println("(SP) VS active low"); }
printVS = 1;
GBS::SP_VS_PROC_INV_REG::write(0); // 5_56 6
}
else
{
if (printVS != 2) { SerialM.println("(SP) VS active high"); }
printVS = 2;
GBS::SP_VS_PROC_INV_REG::write(1); // 5_56 6
}
}
}
}
void setSpParameters() {
writeOneByte(0xF0, 5);
GBS::SP_SOG_P_ATO::write(0); // 5_20 disable sog auto polarity // hpw can be > ht, but auto is worse
GBS::SP_JITTER_SYNC::write(0);
// H active detect control
writeOneByte(0x21, 0x20); // SP_SYNC_TGL_THD // 5_21 H Sync toggle times threshold 0x20 // ! lower than 5_33, 4 ticks (ie 20 < 24) !
writeOneByte(0x22, 0x10); // SP_L_DLT_REG Sync pulse width different threshold (little than this as equal). // 7
writeOneByte(0x23, 0x00); // UNDOCUMENTED range from 0x00 to at least 0x1d
writeOneByte(0x24, 0x0b); // SP_T_DLT_REG H total width different threshold rgbhv: b // range from 0x02 upwards
writeOneByte(0x25, 0x00); // SP_T_DLT_REG
writeOneByte(0x26, 0x08); // SP_SYNC_PD_THD H sync pulse width threshold // from 0(?) to 0x50 // in yuv 720p range only to 0x0a!
if (rto->videoStandardInput == 7) {
writeOneByte(0x26, 0x04);
}
writeOneByte(0x27, 0x00); // SP_SYNC_PD_THD
writeOneByte(0x2a, 0x06); // SP_PRD_EQ_THD How many legal lines as valid // effect on MD recovery after sync loss // 0x0f
// V active detect control
// these 4 have no effect currently test string: s5s2ds34 s5s2es24 s5s2fs16 s5s31s84 | s5s2ds02 s5s2es04 s5s2fs02 s5s31s04
writeOneByte(0x2d, 0x02); // SP_VSYNC_TGL_THD V sync toggle times threshold // at 5 starts to drop many 0_16 vsync events
writeOneByte(0x2e, 0x00); // SP_SYNC_WIDTH_DTHD V sync pulse width threshod
writeOneByte(0x2f, 0x02); // SP_V_PRD_EQ_THD How many continue legal v sync as valid // at 4 starts to drop 0_16 vsync events
writeOneByte(0x31, 0x2f); // SP_VT_DLT_REG V total different threshold
// Timer value control
writeOneByte(0x33, 0x2e); // SP_H_TIMER_VAL H timer value for h detect (was 0x28) // 0_16 hsactive // coupled with 5_2a and 5_21
writeOneByte(0x34, 0x05); // SP_V_TIMER_VAL V timer for V detect // 0_16 vsactive
// Sync separation control
writeOneByte(0x35, 0x25); // SP_DLT_REG [7:0] start at higher value, update later // SP test: a0
writeOneByte(0x36, 0x00); // SP_DLT_REG [11:8]
if (rto->videoStandardInput <= 2 && rto->videoStandardInput != 0) {
writeOneByte(0x37, 0x10); // SP_H_PULSE_IGNOR // SP test (snes needs 2+, MD in MS mode needs 0x0e)
}
else {
writeOneByte(0x37, 0x02);
}
if (rto->RGBHVsyncTypeCsync == false)
{
if (GBS::GBS_OPTION_SCALING_RGBHV::read() != 1) { // seems fishy ..
GBS::SP_PRE_COAST::write(7); // SP test: 9
GBS::SP_POST_COAST::write(16); // SP test: 9
if (rto->videoStandardInput == 7) {
// override early for 1080p. depending on code flow, this may not trigger.
// it should trigger in passThroughModeSwitch then
GBS::SP_POST_COAST::write(0x16);
}
}
}
GBS::SP_H_TOTAL_EQ_THD::write(7); // was 0x0a // range depends on source vtiming, from 0x03 to xxx, some good effect at lower levels
// this needs to be runtime, and based on current line count (vt:321 for PAL)
//if (rto->videoStandardInput == 1)
//{
// // NTSC: s5s3bs11 s5s3fs09 s5s40s0b
// GBS::SP_SDCS_VSST_REG_H::write(1);
// GBS::SP_SDCS_VSSP_REG_H::write(1);
// GBS::SP_SDCS_VSST_REG_L::write(0x09); // 5_3f // should be 08 for NTSC, ~24 for PAL (test with bypass mode: t0t4ft7 t0t4bt2)
// GBS::SP_SDCS_VSSP_REG_L::write(0x0b); // 5_40 // should be 0b for NTSC, ~28 for PAL
//}
//else if (rto->videoStandardInput == 2)
//{
// // PAL: s5s3bs11 s5s3fs38 s5s40s3c
// GBS::SP_SDCS_VSST_REG_H::write(1);
// GBS::SP_SDCS_VSSP_REG_H::write(1);
// GBS::SP_SDCS_VSST_REG_L::write(0x38); // test with bypass mode: t0t4ft7 t0t4bt2
// GBS::SP_SDCS_VSSP_REG_L::write(0x3c);
//}
//else
{
GBS::SP_SDCS_VSST_REG_H::write(0);
GBS::SP_SDCS_VSSP_REG_H::write(0);
GBS::SP_SDCS_VSST_REG_L::write(0); // 5_3f // should be 08 for NTSC, ~24 for PAL (test with bypass mode: t0t4ft7 t0t4bt2)
GBS::SP_SDCS_VSSP_REG_L::write(11); // 5_40 // should be 0b=11 for NTSC, ~28 for PAL
}
GBS::SP_CS_HS_ST::write(0); // 5_45
GBS::SP_CS_HS_SP::write(0x40); // 5_47 720p source needs ~20 range, may be necessary to adjust at runtime, based on source res
writeOneByte(0x49, 0x00); // retime HS start for RGB+HV rgbhv: 20
writeOneByte(0x4a, 0x00); //
writeOneByte(0x4b, 0x44); // retime HS stop rgbhv: 50
writeOneByte(0x4c, 0x00); //
writeOneByte(0x51, 0x02); // 0x00 rgbhv: 2
writeOneByte(0x52, 0x00); // 0xc0
writeOneByte(0x53, 0x06); // 0x05 rgbhv: 6
writeOneByte(0x54, 0x00); // 0xc0
if (rto->videoStandardInput != 15 && (GBS::GBS_OPTION_SCALING_RGBHV::read() != 1)) {
GBS::SP_CLAMP_MANUAL::write(0); // 0 = automatic on/off possible
GBS::SP_CLP_SRC_SEL::write(1); // clamp source 1: pixel clock, 0: 27mhz
GBS::SP_SOG_MODE::write(1);
GBS::SP_H_CST_ST::write(0x6a); // low but not near 0 (typical: 0x6a)
GBS::SP_H_CST_SP::write(0x100); // some arbitrary higher than ST position
GBS::SP_DIS_SUB_COAST::write(1); // auto coast initially off (vsync H pulse coast)
GBS::SP_HCST_AUTO_EN::write(0);
}
GBS::SP_HS_PROC_INV_REG::write(0); // no SP sync inversion
GBS::SP_VS_PROC_INV_REG::write(0); //
writeOneByte(0x58, 0x05); //rgbhv: 0
writeOneByte(0x59, 0x00); //rgbhv: 0
writeOneByte(0x5a, 0x01); //rgbhv: 0 // was 0x05 but 480p ps2 doesnt like it
writeOneByte(0x5b, 0x00); //rgbhv: 0
writeOneByte(0x5c, 0x03); //rgbhv: 0
writeOneByte(0x5d, 0x02); //rgbhv: 0 // range: 0 - 0x20 (how long should clamp stay off)
}
// Sync detect resolution: 5bits; comparator voltage range 10mv~320mv.
// -> 10mV per step; if cables and source are to standard (level 6 = 60mV)
void setAndUpdateSogLevel(uint8_t level) {
GBS::ADC_SOGCTRL::write(level);
rto->currentLevelSOG = level;
GBS::INTERRUPT_CONTROL_00::write(0xf5); // reset irq status, leave out 1 and 3 (mode switches)
GBS::INTERRUPT_CONTROL_00::write(0x00);
//SerialM.print("sog: "); SerialM.println(rto->currentLevelSOG);
}
// in operation: t5t04t1 for 10% lower power on ADC
// also: s0s40s1c for 5% (lower memclock of 108mhz)
// for some reason: t0t45t2 t0t45t4 (enable SDAC, output max voltage) 5% lower done in presets
// t0t4ft4 clock out should be off
// s4s01s20 (was 30) faster latency // unstable at 108mhz
// both phase controls off saves some power 506ma > 493ma
// oversample ratio can save 10% at 1x
// t3t24t3 VDS_TAP6_BYPS on can save 2%
// Generally, the ADC has to stay enabled to perform SOG separation and thus "see" a source.
// It is possible to run in low power mode.
// Function should not further nest, so it can be called in syncwatcher
void goLowPowerWithInputDetection() {
GBS::OUT_SYNC_CNTRL::write(0); // no H / V sync out to PAD
GBS::DAC_RGBS_PWDNZ::write(0); // direct disableDAC()
zeroAll();
setResetParameters(); // includes rto->videoStandardInput = 0
loadPresetMdSection(); // fills 1_60 to 1_83
setAdcParametersGainAndOffset();
setSpParameters();
delay(300);
rto->isInLowPowerMode = true;
SerialM.println("Scanning inputs for sources ...");
LEDOFF;
}
void optimizeSogLevel() {
if (/*!checkBoardPower()*/ rto->boardHasPower == false) // checkBoardPower is too invasive now
{
return;
}
if (rto->videoStandardInput == 15 || GBS::SP_SOG_MODE::read() != 1) {
return;
}
if (rto->thisSourceMaxLevelSOG == 31) { rto->currentLevelSOG = 11; }
else { rto->currentLevelSOG = rto->thisSourceMaxLevelSOG; }
setAndUpdateSogLevel(rto->currentLevelSOG);
uint8_t retryAttempts = 0;
boolean clampWasOn = 0;
if (rto->inputIsYpBpR) {
clampWasOn = GBS::SP_NO_CLAMP_REG::read();
if (clampWasOn) {
GBS::SP_NO_CLAMP_REG::write(1);
rto->clampPositionIsSet = false;
}
}
uint8_t unlockH = GBS::MD_HPERIOD_UNLOCK_VALUE::read();
uint8_t unlockV = GBS::MD_VPERIOD_UNLOCK_VALUE::read();
uint8_t lockH = GBS::MD_HPERIOD_LOCK_VALUE::read();
uint8_t lockV = GBS::MD_VPERIOD_LOCK_VALUE::read();
GBS::MD_HPERIOD_UNLOCK_VALUE::write(1);
GBS::MD_VPERIOD_UNLOCK_VALUE::write(1);
GBS::MD_HPERIOD_LOCK_VALUE::write(20);
GBS::MD_VPERIOD_LOCK_VALUE::write(1);
resetSyncProcessor();
resetModeDetect();
delay(300); // let it see sync is unstable
while (retryAttempts < 3) {
uint8_t syncGoodCounter = 0;
unsigned long timeout = millis();
while ((syncGoodCounter < 31) && ((millis() - timeout) < 150)) {
delay(1);
if (getStatusHVSyncStable() == 1) {
syncGoodCounter++;
}
else {
syncGoodCounter = 0;
}
}
if (syncGoodCounter >= 30) {
/*Serial.print(" @SOG "); Serial.print(rto->currentLevelSOG);
Serial.print(" STATUS_00: ");
uint8_t status00 = GBS::STATUS_00::read();
Serial.println(status00, HEX); */
if ((getStatusHVSyncStable() == 1)) {
delay(20);
if (getVideoMode() != 0) {
//SerialM.println("getVideoMode good");
break;
}
else {
if (rto->currentLevelSOG > 3) {
rto->currentLevelSOG--;
setAndUpdateSogLevel(rto->currentLevelSOG);
}
else {
retryAttempts++;
SerialM.print("Auto SOG: retry #"); SerialM.println(retryAttempts);
if (rto->thisSourceMaxLevelSOG == 31) {
rto->currentLevelSOG = 11;
}
else {
rto->currentLevelSOG = rto->thisSourceMaxLevelSOG;
}
setAndUpdateSogLevel(rto->currentLevelSOG);
}
//resetSyncProcessor(); // too slow and not necessary
delay(80); // let new sog level settle
}
}
}
else if (rto->currentLevelSOG > 3) {
rto->currentLevelSOG--;
delay(80); // let new sog level settle
}
else {
retryAttempts++;
SerialM.print("Auto SOG: retry #"); SerialM.println(retryAttempts);
if (rto->thisSourceMaxLevelSOG == 31) {
rto->currentLevelSOG = 11;
}
else {
rto->currentLevelSOG = rto->thisSourceMaxLevelSOG;
}
setAndUpdateSogLevel(rto->currentLevelSOG);
resetSyncProcessor();
}
setAndUpdateSogLevel(rto->currentLevelSOG);
}
if (retryAttempts >= 3) {
rto->currentLevelSOG = 1; // failed
}
rto->thisSourceMaxLevelSOG = rto->currentLevelSOG;
SerialM.print("SOG level: "); SerialM.println(rto->currentLevelSOG);
setAndUpdateSogLevel(rto->currentLevelSOG);
GBS::MD_HPERIOD_UNLOCK_VALUE::write(unlockH);
GBS::MD_VPERIOD_UNLOCK_VALUE::write(unlockV);
GBS::MD_HPERIOD_LOCK_VALUE::write(lockH);
GBS::MD_VPERIOD_LOCK_VALUE::write(lockV);
}
void switchSyncProcessingMode(uint8_t mode) {
if (mode) {
GBS::SP_PRE_COAST::write(0);
GBS::SP_POST_COAST::write(0);
GBS::ADC_SOGEN::write(0);
GBS::SP_SOG_MODE::write(0);
GBS::SP_CLAMP_MANUAL::write(1);
GBS::SP_NO_COAST_REG::write(1);
}
else {
SerialM.println("todo..");
}
}
// GBS boards have 2 potential sync sources:
// - RCA connectors
// - VGA input / 5 pin RGBS header / 8 pin VGA header (all 3 are shared electrically)
// This routine looks for sync on the currently active input. If it finds it, the input is returned.
// If it doesn't find sync, it switches the input and returns 0, so that an active input will be found eventually.
// This is done this way to not block the control MCU with active searching for sync.
uint8_t detectAndSwitchToActiveInput() { // if any
uint8_t currentInput = GBS::ADC_INPUT_SEL::read();
unsigned long timeout = millis();
while (millis() - timeout < 450) {
delay(10);
handleWiFi();
uint8_t videoMode = getVideoMode();
if (GBS::TEST_BUS_2F::read() != 0 || videoMode > 0)
{
currentInput = GBS::ADC_INPUT_SEL::read();
SerialM.print("Activity detected, input: ");
if(currentInput == 1) SerialM.println("RGB");
else SerialM.println("Component");
if (currentInput == 1) { // RGBS or RGBHV
boolean vsyncActive = 0;
unsigned long timeOutStart = millis();
while (!vsyncActive && ((millis() - timeOutStart) < 250)) { // short vsync test
vsyncActive = GBS::STATUS_SYNC_PROC_VSACT::read();
handleWiFi(); // wifi stack
delay(1);
}
if (!vsyncActive) {
optimizeSogLevel(); // test: placing it here okay?
delay(50);
timeOutStart = millis();
while ((millis() - timeOutStart) < 300) {
delay(8);
if (getVideoMode() > 0) {
return 1;
}
}
}
// VSync is active > it's RGBHV or RGBHV with CSync on HS pin
//GBS::SP_SOG_MODE::write(0);
vsyncActive = 0;
timeOutStart = millis();
while (!vsyncActive && millis() - timeOutStart < 400) { // check again to make sure
vsyncActive = GBS::STATUS_SYNC_PROC_VSACT::read();
handleWiFi(); // wifi stack
delay(1);
}
if (vsyncActive) {
SerialM.println("VSync: present");
boolean hsyncActive = 0;
timeOutStart = millis();
while (!hsyncActive && millis() - timeOutStart < 400) {
hsyncActive = GBS::STATUS_SYNC_PROC_HSACT::read();
handleWiFi(); // wifi stack
delay(1);
}
if (hsyncActive) {
SerialM.println("HSync: present");
// The HSync pin is setup to detect CSync, if present (SOG mode on, coasting setup, debug bus setup, etc)
GBS::SP_SOG_SRC_SEL::write(1); // but this may be needed (HS pin as SOG source)
short decodeSuccess = 0;
for (int i = 0; i < 2; i++)
{
// no success if: no signal at all (returns 0.0f), no embedded VSync (returns ~18.5f)
if (getSourceFieldRate(1) > 40.0f) decodeSuccess++; // properly decoded vsync from 40 to xx Hz
}