WAR dependency is not respected

[zero9178]

Given the following C code:

#include <stdint.h>
#include "dynamatic/Integration.h"
#ifdef __cplusplus
constexpr
#endif
uint32_t test25(int32_t var1, uint8_t var3, int16_t var5, int8_t var6, int32_t var0[8], uint8_t var2[8]) {
  var2[0] = ((var1 )) ? (0) : (var5 <= ((var6 ) == var3 ));
  var2[0] = var0[0];
  var0[0] = 1;
  return 0;
}
#if (__cplusplus) && !(HLS_VERIFICATION)
constexpr
#endif
void test_bench() {
  int32_t var1 = 00;
  uint8_t var3 = 0;
  int16_t var5 = (int8_t)0;
  int8_t var6 = 0;
  int32_t var0[8] = {(int32_t)((1169673337u)), 0, 00};
  uint8_t var2[8] = {};
  CALL_KERNEL(test25, var1, var3, var5, var6, var0, var2);
}
int main() {
  test_bench();
}

Dynamatic produces an incorrect result for var2.
After execution, var2 should have the value 0x79 (value of var0[0] truncated to 8 bits), but simulation instead returns the value 1.
It appears as though the assignment to var0[0] has been illegal reordered prior to the last assignment of var2[0].
Script:

dynamatic> set-dynamatic-path /home/mboeck/dynamatic
dynamatic> set-src test25.c
dynamatic> compile
[INFO] Compiled to LLVM IR
[INFO] Optimized LLVM IR
[INFO] Applied memory dependency analysis to LLVM IR
[INFO] Converted to std dialect
[INFO] Applied CF transformations
[INFO] Marked memory accesses with the corresponding interfaces in cf
[INFO] Compiled cf to handshake
[INFO] Applied transformations to handshake
[INFO] Running simple buffer placement (on-merges).
[INFO] Placed simple buffers
[INFO] Canonicalized handshake
[INFO] Created test25 DOT
[INFO] Converted test25 DOT to PNG
[INFO] Created test25_CFG DOT
[INFO] Converted test25_CFG DOT to PNG
[INFO] Lowered to HW
[INFO] Compilation succeeded
dynamatic> write-hdl
[INFO] Exported RTL (vhdl)
[INFO] HDL generation succeeded
dynamatic> simulate --timeout 20000
[INFO] Built kernel for IO gen.
[INFO] Ran kernel for IO gen.
[INFO] Launching simulation (vsim)
[FATAL] Simulation failed

Simulation output:

# ** Failure: NORMAL EXIT (note: failure is to force the simulator to stop)
#    Time: 70 ns  Iteration: 1  Process: /tb/generate_sim_done_proc File: /home/mboeck/dynamatic/build/bin/bug69/out/sim/HDL_SRC/tb_test25.vhd
# Break in Process generate_sim_done_proc at /home/mboeck/dynamatic/build/bin/bug69/out/sim/HDL_SRC/tb_test25.vhd line 538
# Stopped at /home/mboeck/dynamatic/build/bin/bug69/out/sim/HDL_SRC/tb_test25.vhd line 538
# End time: 13:30:50 on May 06,2026, Elapsed time: 0:00:02
# Errors: 1, Warnings: 130
===-------------------------------------------------------------------------===
                         Miscellaneous Ungrouped Timers
===-------------------------------------------------------------------------===

   ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
   0.0001 (100.0%)   0.0002 (100.0%)   0.0002 (100.0%)  12.7710 (100.0%)  Simulator runtime
   0.0001 (100.0%)   0.0002 (100.0%)   0.0002 (100.0%)  12.7710 (100.0%)  Total

Comparison of [var1] : Pass
Comparison of [var3] : Pass
Comparison of [var5] : Pass
Comparison of [var6] : Pass
Comparison of [var0] : Pass
[ERROR COMPARE] Token mismatch: [0x79] and [0x01] are not equal (at transaction id 0).
Comparison of [var2] : Fail
[ERROR HLS_VERIFIER] C and VHDL outputs do not match

Commit tested: 6a891fa