Failure to generate LSQ component

[zero9178]

Given the following C code:

#include <stdint.h>
float bug(uint32_t var1, int8_t var2, int16_t var6, int16_t var18,
            double var0[2], double var23[2]) {
  var23[0] = var0[0] * var0[var18];
  var0[0] = var0[0] + var0[1] + var0[1];
  var0[var2] = var0[var1] + var0[1] - var0[0];
  var0[0] = var0[0] * var0[var6 & 1] + 0 - var0[0];
  var0[0] = var0[var6] - var0[var6] - var0[0];
  var0[0] = var0[var2 * 5 > var1] + var0[0];
  return var0[0 >= 0];
}

compiling it with dynamatic and outputting VHDL fails with an exception:

================================================================================
============== Dynamatic | Dynamic High-Level Synthesis Compiler ===============
======================== EPFL-LAP - v2.0.0 | March 2024 ========================
================================================================================


dynamatic> set-dynamatic-path /home/markus/CLionProjects/dynamatic-fuzzing-wt
dynamatic> set-src bug.c
dynamatic> compile
[INFO] Compiled to LLVM IR
[INFO] Optimized LLVM IR
[INFO] Applied memory dependency analysis to LLVM IR
[INFO] Converted to std dialect
[INFO] Applied CF transformations
[INFO] Marked memory accesses with the corresponding interfaces in cf
[INFO] Compiled cf to handshake
[INFO] Applied transformations to handshake
[INFO] Running simple buffer placement (on-merges).
[INFO] Placed simple buffers
[INFO] Canonicalized handshake
[INFO] Created bug DOT
[INFO] Converted bug DOT to PNG
[INFO] Created bug_CFG DOT
[INFO] Converted bug_CFG DOT to PNG
[INFO] Lowered to HW
[INFO] Compilation succeeded
dynamatic> write-hdl
Traceback (most recent call last):
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/lsq-generator.py", line 1131, in <module>
    main()
    ~~~~^^
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/lsq-generator.py", line 1118, in main
    codeGen(args.output_path, lsqConfig)
    ~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/vhdl_gen/codegen.py", line 22, in codeGen
    ga.generate(path_rtl)
    ~~~~~~~~~~~^^^^^^^^^^
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/vhdl_gen/generators/group_allocator.py", line 200, in generate
    arch += Mux1HROM(ctx, num_loads,
            ~~~~~~~~^^^^^^^^^^^^^^^^
                     self.configs.gaNumLoads, group_init_hs)
                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/vhdl_gen/operators/mux.py", line 155, in Mux1HROM
    str_value = func(din[j], size)
  File "/home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/vhdl_gen/utils.py", line 437, in IntToBits
    raise ValueError("Unknown value!")
ValueError: Unknown value!
loc("/home/markus/CLionProjects/dynamatic-fuzzing-wt/build/bin/bug1/out/comp/hw.mlir":88:3): error: Failed to generate component, generator failed with status 256: /usr/bin/env python3 /home/markus/CLionProjects/dynamatic-fuzzing-wt/tools/backend/lsq-generator-python/lsq-generator.py -o /home/markus/CLionProjects/dynamatic-fuzzing-wt/build/bin/bug1/out/hdl -c /home/markus/CLionProjects/dynamatic-fuzzing-wt/build/bin/bug1/out/hdl/handshake_lsq_lsq1.json

[FATAL] Failed to export RTL (vhdl)