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Fixed issue with EXINT no longer working when we disable/enable it

dc42pushed 1 commit to 3.6-dev • b0ca291…b39d405 • 
17 days ago

Added class BasePriorityBooster

dc42pushed 1 commit to 3.6-dev • d9e7264…b0ca291 • 
21 days ago

SetPinMode now takes a Boolean debounce parameter, default false

dc42pushed 1 commit to 3.6-dev • 474b7d0…d9e7264 • 
on Feb 26

Use 120us debouncing on SAME4E/4S/E70 inputs by default

dc42pushed 1 commit to 3.6-dev • a4c3d11…474b7d0 • 
on Feb 24

Fix to SAMC21 EIC interrupt handler

dc42pushed 1 commit to 3.5-dev • fe4c1c7…1f00673 • 
on Jan 29

Fix to SAMC21 EIC interrupt handler

dc42pushed 1 commit to 3.6-dev • b883bf6…a4c3d11 • 
on Jan 29

Changed RP2040 CAN implementation to support two transmit FIFOs

dc42pushed 1 commit to 3.6-dev • ef39b3e…b883bf6 • 
on Jan 28

Event system interrupts are now declared noexcept

dc42pushed 1 commit to 3.6-dev • 4954ee6…ef39b3e • 
on Jan 10

Added more atomic functions for Arm Cortex M0

dc42pushed 1 commit to 3.6-dev • fbfca8c…4954ee6 • 
on Jan 10

Replaced attach/detachInterrupt etc. for RP2040 configuration

dc42pushed 1 commit to 3.6-dev • 67f9fe7…fbfca8c • 
on Jan 10

Renamed attach/detachInterrupt, enabled Enable/DisablePinInterrupt

dc42pushed 1 commit to 3.6-dev • bbd113b…67f9fe7 • 
on Jan 10

Corrected memsetf and memseti32

dc42pushed 1 commit to 3.6-dev • f58ee1b…bbd113b • 
on Dec 20, 2024

Type annotations for eCv, also removed an unused function

dc42pushed 1 commit to 3.6-dev • 18d1a9d…f58ee1b • 
on Dec 17, 2024

Minor corrections and eCv annotations

dc42pushed 1 commit to 3.6-dev • 7265578…18d1a9d • 
on Dec 16, 2024

Added memsetf and memseti32

dc42pushed 1 commit to 3.6-dev • 4e3e96a…7265578 • 
on Dec 16, 2024

Added eCv type annotations

dc42pushed 1 commit to 3.6-dev • db39258…4e3e96a • 
on Dec 15, 2024

Added missing noexcept

dc42pushed 1 commit to 3.6-dev • 0bec587…db39258 • 
on Dec 11, 2024

Changed type name of flags returned by IrqSave in CoreN2G

dc42pushed 1 commit to 3.6-dev • d78954c…0bec587 • 
on Dec 11, 2024

Added eCv annotations

dc42pushed 1 commit to 3.6-dev • 0862ed4…d78954c • 
on Dec 2, 2024

Reduced optimisation level of startup code to fix SAMC21 ADC issue

dc42pushed 1 commit to 3.6-dev • ee5b9e5…0862ed4 • 
on Nov 18, 2024

Changed DMA priority 0 QoS from 0 to 1

dc42pushed 1 commit to 3.6-dev • 40645aa…ee5b9e5 • 
on Nov 6, 2024

Fix to avoid clent SAME5x projects needing to define SUPPORT_SDHC

dc42pushed 1 commit to 3.6-dev • 971d087…40645aa • 
on Nov 5, 2024

Fix to avoid clent SAME5x projects needing to define SUPPORT_SDHC

dc42pushed 1 commit to 3.5-dev • 1cb8484…fe4c1c7 • 
on Nov 5, 2024

Added SAME5x function SetCpuQos

dc42pushed 4 commits to 3.6-dev • 49801a6…971d087 • 
on Nov 5, 2024

Added SAME5x function SetCpuQos

dc42pushed 1 commit to 3.5-dev • d18e0e8…1cb8484 • 
on Nov 5, 2024

update tusb_config for pico sdk build

AndyEverittpushed 1 commit to 3.6-dev-rp2350 • 2b188d9…5ad49a3 • 
on Nov 5, 2024

Added option to use Sdhc 95MHz clock instead of 60MHz clock for SERCOMs

dc42pushed 1 commit to 3.5-dev • a84e22b…d18e0e8 • 
on Nov 4, 2024

Added comments to SAME5x startup code

dc42pushed 1 commit to 3.5-dev • 62b64b7…a84e22b • 
on Nov 4, 2024

Changed DMA channel 2 and 3 QOS on SAME5x, added DMA suspend/resume

dc42pushed 1 commit to 3.5-dev • 1c2bd82…62b64b7 • 
on Nov 4, 2024

Renamed segment DmaState to DmaBuffers

dc42pushed 1 commit to 3.6-dev • 35fdec6…49801a6 • 
on Oct 28, 2024