@@ -2362,17 +2362,34 @@ int Matcher::max_vector_size(const BasicType bt) {
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}
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int Matcher::min_vector_size(const BasicType bt) {
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- int max_size = max_vector_size(bt);
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- // Limit the min vector size to 8 bytes.
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- int size = 8 / type2aelembytes(bt);
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- if (bt == T_BYTE) {
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- // To support vector api shuffle/rearrange.
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- size = 4;
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- } else if (bt == T_BOOLEAN) {
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- // To support vector api load/store mask.
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- size = 2;
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+ // Usually, the shortest vector length supported by AArch64 ISA and
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+ // Vector API species is 64 bits. However, we allow 32-bit or 16-bit
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+ // vectors in a few special cases.
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+ int size;
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+ switch(bt) {
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+ case T_BOOLEAN:
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+ // Load/store a vector mask with only 2 elements for vector types
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+ // such as "2I/2F/2L/2D".
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+ size = 2;
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+ break;
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+ case T_BYTE:
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+ // Generate a "4B" vector, to support vector cast between "8B/16B"
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+ // and "4S/4I/4L/4F/4D".
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+ size = 4;
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+ break;
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+ case T_SHORT:
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+ // Generate a "2S" vector, to support vector cast between "4S/8S"
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+ // and "2I/2L/2F/2D".
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+ size = 2;
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+ break;
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+ default:
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+ // Limit the min vector length to 64-bit.
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+ size = 8 / type2aelembytes(bt);
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+ // The number of elements in a vector should be at least 2.
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+ size = MAX2(size, 2);
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}
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- if (size < 2) size = 2;
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+
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+ int max_size = max_vector_size(bt);
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return MIN2(size, max_size);
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}
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@@ -3450,10 +3467,6 @@ encode %{
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__ mov(dst_reg, (uint64_t)1);
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%}
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- enc_class aarch64_enc_mov_byte_map_base(iRegP dst, immByteMapBase src) %{
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- __ load_byte_map_base($dst$$Register);
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- %}
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-
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enc_class aarch64_enc_mov_n(iRegN dst, immN src) %{
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Register dst_reg = as_Register($dst$$reg);
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address con = (address)$src$$constant;
@@ -4554,20 +4567,6 @@ operand immP_1()
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interface(CONST_INTER);
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%}
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- // Card Table Byte Map Base
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- operand immByteMapBase()
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- %{
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- // Get base of card map
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- predicate(BarrierSet::barrier_set()->is_a(BarrierSet::CardTableBarrierSet) &&
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- SHENANDOAHGC_ONLY(!BarrierSet::barrier_set()->is_a(BarrierSet::ShenandoahBarrierSet) &&)
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- (CardTable::CardValue*)n->get_ptr() == ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base());
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- match(ConP);
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-
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- op_cost(0);
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- format %{ %}
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- interface(CONST_INTER);
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- %}
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-
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// Float and Double operands
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// Double Immediate
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operand immD()
@@ -6854,20 +6853,6 @@ instruct loadConP1(iRegPNoSp dst, immP_1 con)
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ins_pipe(ialu_imm);
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%}
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- // Load Byte Map Base Constant
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-
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- instruct loadByteMapBase(iRegPNoSp dst, immByteMapBase con)
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- %{
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- match(Set dst con);
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-
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- ins_cost(INSN_COST);
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- format %{ "adr $dst, $con\t# Byte Map Base" %}
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-
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- ins_encode(aarch64_enc_mov_byte_map_base(dst, con));
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-
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- ins_pipe(ialu_imm);
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- %}
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-
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// Load Narrow Pointer Constant
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instruct loadConN(iRegNNoSp dst, immN con)
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