arch/x86/smbios.c: fix incorrect L3 cache size in SMBIOS Type 7

L3 cache is typically unified and shared across all logical CPUs.
The CPUID leaf 0x4 already reports the total cache size for such shared caches.

Multiplying L3 size by the number of cores sharing it results in an
inflated value that may exceed SMBIOS limits or be misinterpreted,
leading Windows and other OSes to report the L3 cache size as zero.

Upstream-Status: Pending
Signed-off-by: Filip Lewiński <[email protected]>

Author: filipleple

src/arch/x86/smbios.c

@@ -240,7 +240,20 @@ int smbios_write_type7_cache_parameters(unsigned long *current,
 		const u8 level = info.level;
 		const size_t assoc = info.num_ways;
 		const size_t cache_share = info.num_cores_shared;
-		const size_t cache_size = info.size * get_number_of_caches(cache_share);
+
+		/*
+		 * In the case of unified L3 cache, the info_size is already the correct
+		 * total size. Multiplying by number of cores is unnecessary and might result
+		 * in the cache displaying as zero.
+		 */
+		size_t tmp_cache_size;
+		if (level < 3) {
+			tmp_cache_size = info.size * get_number_of_caches(cache_share);
+		}
+		else {
+			tmp_cache_size = info.size;
+		}
+		const size_t cache_size = tmp_cache_size;
 
 		if (!cache_type)
 			/* No more caches in the system */