diff --git a/.github/ISSUE_TEMPLATE/issue-template.md b/.github/ISSUE_TEMPLATE/issue-template.md index 82a98d2fe..d84beea54 100644 --- a/.github/ISSUE_TEMPLATE/issue-template.md +++ b/.github/ISSUE_TEMPLATE/issue-template.md @@ -7,10 +7,15 @@ assignees: '' --- -Describe in detail how to reproduce the bug you're reporting. Preferably with a short code example to reproduce the bug. +Describe in detail how to reproduce the bug you're reporting. Preferably with a short code example to reproduce the bug like this: +```python +>>> from pyboy import PyBoy +>>> p = PyBoy(..., window="SDL2") +>>> p.memory[0,0x1234] # Example: I expected an int, but it throws exception +``` Please make sure you've already checked the documentation: https://docs.pyboy.dk -If you're seeking help for a project, then Discord is a better place to go https://discord.gg/wUbag3KNqQ +If this is not a bug report, and you're seeking help for a project, then Discord is a better place to go https://discord.gg/wUbag3KNqQ If you used ChatGPT to produce 6 pages of word soup, your issue will be closed without an answer. \ No newline at end of file diff --git a/.github/workflows/pr-test.yml b/.github/workflows/pr-test.yml index cf64ae0c9..1b8e6d882 100644 --- a/.github/workflows/pr-test.yml +++ b/.github/workflows/pr-test.yml @@ -16,7 +16,7 @@ jobs: fail-fast: false matrix: os: [macos-latest, ubuntu-latest, windows-latest, ubuntu-24.04-arm] - python-version: [3.9, "3.10", 3.11, 3.12, 3.13] + python-version: ["3.10", 3.11, 3.12, 3.13, 3.14] steps: - uses: actions/checkout@v4 @@ -151,7 +151,7 @@ jobs: fail-fast: false matrix: os: [ubuntu-latest, ubuntu-24.04-arm] - python-version: ['cp39-cp39', 'cp310-cp310', 'cp311-cp311', 'cp312-cp312', 'cp313-cp313'] + python-version: ['cp310-cp310', 'cp311-cp311', 'cp312-cp312', 'cp313-cp313', 'cp314-cp314'] manylinux-version: ['manylinux_2_28_x86_64', 'musllinux_1_2_x86_64', 'manylinux_2_28_aarch64', 'musllinux_1_2_aarch64'] exclude: - os: ubuntu-24.04-arm diff --git a/extras/bootrom/bootrom_cgb.sym b/extras/bootrom/bootrom_cgb.sym index f1cf16d3a..021adf391 100644 --- a/extras/bootrom/bootrom_cgb.sym +++ b/extras/bootrom/bootrom_cgb.sym @@ -10,8 +10,8 @@ 00:0087 main.wave_table 00:0097 main.effect 00:00a5 main.exit_vblank -00:00bb main.logo 00:00bb main.P1 +00:00bb main.logo 00:00c3 main.P2 00:00cb main.Y1 00:00d3 main.B2 diff --git a/extras/bootrom/bootrom_dmg.sym b/extras/bootrom/bootrom_dmg.sym index f1cf16d3a..021adf391 100644 --- a/extras/bootrom/bootrom_dmg.sym +++ b/extras/bootrom/bootrom_dmg.sym @@ -10,8 +10,8 @@ 00:0087 main.wave_table 00:0097 main.effect 00:00a5 main.exit_vblank -00:00bb main.logo 00:00bb main.P1 +00:00bb main.logo 00:00c3 main.P2 00:00cb main.Y1 00:00d3 main.B2 diff --git a/pyboy/api/tile.py b/pyboy/api/tile.py index 3e2d2e193..6a261d678 100644 --- a/pyboy/api/tile.py +++ b/pyboy/api/tile.py @@ -120,7 +120,8 @@ def image(self): utils.PillowImportError()._raise_import_error() if utils.cython_compiled: - return Image.fromarray(self._image_data().base, mode=self.raw_buffer_format) + # Image.fromarray(..., mode=...) is now deprecated. No good alternative. + return Image.fromarray(self._image_data().base).convert(self.raw_buffer_format) else: return Image.frombytes(self.raw_buffer_format, (8, 8), self._image_data()) diff --git a/pyboy/core/bootrom.pxd b/pyboy/core/bootrom.pxd index 1bec0156f..f24f8b9e8 100644 --- a/pyboy/core/bootrom.pxd +++ b/pyboy/core/bootrom.pxd @@ -13,4 +13,4 @@ cdef Logger logger cdef class BootROM: cdef uint8_t[:] bootrom cdef bint cgb - cdef uint8_t getitem(self, uint16_t) noexcept nogil + # cdef uint8_t getitem(self, uint16_t) noexcept nogil diff --git a/pyboy/core/bootrom.py b/pyboy/core/bootrom.py index dd9e90f94..1f814e464 100644 --- a/pyboy/core/bootrom.py +++ b/pyboy/core/bootrom.py @@ -21,5 +21,5 @@ def __init__(self, bootrom_file, cartridge_cgb): self.bootrom = array.array("B", struct.unpack("%iB" % len(rom), rom)) self.cgb = len(rom) > 0x100 - def getitem(self, addr): - return self.bootrom[addr] + # def getitem(self, addr): + # return diff --git a/pyboy/core/cartridge/base_mbc.pxd b/pyboy/core/cartridge/base_mbc.pxd index 3ae64a299..18695a3b5 100644 --- a/pyboy/core/cartridge/base_mbc.pxd +++ b/pyboy/core/cartridge/base_mbc.pxd @@ -13,7 +13,6 @@ from pyboy.utils cimport IntIOInterface cdef Logger logger cdef class BaseMBC: - cdef str filename cdef str gamename cdef uint8_t[:, :] rombanks cdef uint8_t[:,:] rambanks @@ -31,6 +30,7 @@ cdef class BaseMBC: cdef uint16_t rombank_selected_low cdef bint cgb + cdef void stop(self, object, object) noexcept cdef int save_state(self, IntIOInterface) except -1 cdef int load_state(self, IntIOInterface, int) except -1 cdef int save_ram(self, IntIOInterface) except -1 diff --git a/pyboy/core/cartridge/base_mbc.py b/pyboy/core/cartridge/base_mbc.py index 7d349f6ab..15eee5952 100644 --- a/pyboy/core/cartridge/base_mbc.py +++ b/pyboy/core/cartridge/base_mbc.py @@ -4,7 +4,6 @@ # import array -import os import pyboy from pyboy.utils import IntIOWrapper, PyBoyException, PyBoyInvalidInputException @@ -15,8 +14,7 @@ class BaseMBC: - def __init__(self, filename, rombanks, external_ram_count, carttype, sram, battery, rtc_enabled): - self.filename = filename + ".ram" + def __init__(self, rombanks, ram_file, rtc_file, external_ram_count, carttype, sram, battery, rtc_enabled): self.rombanks = rombanks self.carttype = carttype @@ -24,7 +22,7 @@ def __init__(self, filename, rombanks, external_ram_count, carttype, sram, batte self.rtc_enabled = rtc_enabled if self.rtc_enabled: - self.rtc = RTC(filename) + self.rtc = RTC(rtc_file) else: self.rtc = None @@ -43,18 +41,17 @@ def __init__(self, filename, rombanks, external_ram_count, carttype, sram, batte self.rombank_selected = 1 self.rombank_selected_low = 0 - if not os.path.exists(self.filename): - logger.debug("No RAM file found. Skipping.") + if ram_file is not None and self.battery: + self.load_ram(IntIOWrapper(ram_file)) else: - with open(self.filename, "rb") as f: - self.load_ram(IntIOWrapper(f)) + logger.debug("No RAM file found. Skipping.") - def stop(self): - with open(self.filename, "wb") as f: - self.save_ram(IntIOWrapper(f)) + def stop(self, ram_file, rtc_file): + if ram_file is not None and self.battery: + self.save_ram(IntIOWrapper(ram_file)) if self.rtc_enabled: - self.rtc.stop() + self.rtc.stop(rtc_file) def save_state(self, f): f.write(self.rombank_selected) @@ -147,7 +144,6 @@ def __repr__(self): return "\n".join( [ "MBC class: %s" % self.__class__.__name__, - "Filename: %s" % self.filename, "Game name: %s" % self.gamename, "GB Color: %s" % str(self.rombanks[0, 0x143] == 0x80), "Cartridge type: %s" % hex(self.carttype), diff --git a/pyboy/core/cartridge/cartridge.pxd b/pyboy/core/cartridge/cartridge.pxd index 04b92f01a..8e4714c18 100644 --- a/pyboy/core/cartridge/cartridge.pxd +++ b/pyboy/core/cartridge/cartridge.pxd @@ -16,11 +16,11 @@ from .base_mbc cimport BaseMBC cdef Logger logger @cython.locals(carttype=uint8_t, cart_name=basestring, cart_line=basestring) -cpdef BaseMBC load_cartridge(str) +cpdef BaseMBC load_cartridge(object, object, object) cdef bint validate_checksum(uint8_t[:,:]) noexcept @cython.locals(romdata=array, banksize=int) -cdef uint8_t[:, :] load_romfile(str) noexcept +cdef uint8_t[:, :] load_romfile(object) noexcept cdef dict CARTRIDGE_TABLE cdef dict EXTERNAL_RAM_TABLE diff --git a/pyboy/core/cartridge/cartridge.py b/pyboy/core/cartridge/cartridge.py index 39e823dfc..9cc490787 100644 --- a/pyboy/core/cartridge/cartridge.py +++ b/pyboy/core/cartridge/cartridge.py @@ -17,8 +17,8 @@ logger = pyboy.logging.get_logger(__name__) -def load_cartridge(filename): - rombanks = load_romfile(filename) +def load_cartridge(gamerom_file, ram_file, rtc_file): + rombanks = load_romfile(gamerom_file) if not validate_checksum(rombanks): raise PyBoyException("Cartridge header checksum mismatch!") @@ -36,7 +36,7 @@ def load_cartridge(filename): logger.debug("Cartridge size: %d ROM banks of 16KB, %s RAM banks of 8KB", len(rombanks), external_ram_count) cartmeta = CARTRIDGE_TABLE[carttype] - return cartmeta[0](filename, rombanks, external_ram_count, carttype, *cartmeta[1:]) + return cartmeta[0](rombanks, ram_file, rtc_file, external_ram_count, carttype, *cartmeta[1:]) def validate_checksum(rombanks): @@ -47,9 +47,8 @@ def validate_checksum(rombanks): return rombanks[0, 0x14D] == x -def load_romfile(filename): - with open(filename, "rb") as romfile: - romdata = array("B", romfile.read()) +def load_romfile(gamerom_file): + romdata = array("B", gamerom_file.read()) logger.debug("Loading ROM file: %d bytes", len(romdata)) if len(romdata) == 0: diff --git a/pyboy/core/cartridge/rtc.pxd b/pyboy/core/cartridge/rtc.pxd index 1535b9c08..e607cc36c 100644 --- a/pyboy/core/cartridge/rtc.pxd +++ b/pyboy/core/cartridge/rtc.pxd @@ -16,7 +16,6 @@ from pyboy.utils cimport IntIOInterface cdef Logger logger cdef class RTC: - cdef str filename cdef bint latch_enabled cdef cython.double timezero cdef bint timelock @@ -28,7 +27,7 @@ cdef class RTC: cdef uint64_t day_carry cdef uint64_t halt - cdef void stop(self) noexcept + cdef void stop(self, object) noexcept cdef int save_state(self, IntIOInterface) except -1 cdef int load_state(self, IntIOInterface, int) except -1 @cython.locals(days=uint64_t) diff --git a/pyboy/core/cartridge/rtc.py b/pyboy/core/cartridge/rtc.py index eb613128a..ad0352e6b 100644 --- a/pyboy/core/cartridge/rtc.py +++ b/pyboy/core/cartridge/rtc.py @@ -2,7 +2,6 @@ # License: See LICENSE.md file # GitHub: https://github.com/Baekalfen/PyBoy -import os import struct import time @@ -13,20 +12,12 @@ class RTC: - def __init__(self, filename): - self.filename = filename + ".rtc" - + def __init__(self, rtc_file): self.timezero = time.time() self.timelock = False self.day_carry = 0 self.halt = 0 - if not os.path.exists(self.filename): - logger.info("No RTC file found. Skipping.") - else: - with open(self.filename, "rb") as f: - self.load_state(IntIOWrapper(f), STATE_VERSION) - self.latch_enabled = False self.sec_latch = 0 self.min_latch = 0 @@ -34,9 +25,14 @@ def __init__(self, filename): self.day_latch_low = 0 self.day_latch_high = 0 - def stop(self): - with open(self.filename, "wb") as f: - self.save_state(IntIOWrapper(f)) + if rtc_file is not None: + self.load_state(IntIOWrapper(rtc_file), STATE_VERSION) + else: + logger.info("No RTC file found. Skipping.") + + def stop(self, rtc_file): + if rtc_file is not None: + self.save_state(IntIOWrapper(rtc_file)) def save_state(self, f): for b in struct.pack("d", self.timezero): diff --git a/pyboy/core/cpu.pxd b/pyboy/core/cpu.pxd index ebcb89a68..28cf65545 100644 --- a/pyboy/core/cpu.pxd +++ b/pyboy/core/cpu.pxd @@ -36,7 +36,7 @@ cdef class CPU: cdef void set_interruptflag(self, int) noexcept nogil cdef bint handle_interrupt(self, uint8_t, uint16_t) noexcept nogil - @cython.locals(opcode=uint16_t) + @cython.locals(pc1=uint16_t,pc2=uint16_t,pc3=uint16_t, opcode=uint16_t, v=cython.int, a=cython.int, b=cython.int) cdef inline uint8_t fetch_and_execute(self) noexcept nogil @cython.locals(_cycles0=int64_t) cdef int tick(self, int64_t) noexcept nogil diff --git a/pyboy/core/cpu.py b/pyboy/core/cpu.py index edb1349e8..dca9243a5 100644 --- a/pyboy/core/cpu.py +++ b/pyboy/core/cpu.py @@ -178,12 +178,44 @@ def handle_interrupt(self, flag, addr): self.SP &= 0xFFFF self.PC = addr + + # https://gbdev.io/pandocs/Interrupts.html#interrupt-handling + # "The entire process lasts 5 M-cycles." + self.cycles += 20 + self.interrupt_master_enable = False def fetch_and_execute(self): - opcode = self.mb.getitem(self.PC) + # HACK: Shortcut the mb.getitem() calls + if (not self.mb.bootrom_enabled) and self.PC + 2 < 0x4000: + pc1 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected_low, self.PC] + pc2 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected_low, self.PC + 1] + pc3 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected_low, self.PC + 2] + elif (not self.mb.bootrom_enabled) and self.PC + 2 < 0x8000: # 16kB switchable ROM bank + pc1 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected, self.PC - 0x4000] + pc2 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected, self.PC + 1 - 0x4000] + pc3 = self.mb.cartridge.rombanks[self.mb.cartridge.rombank_selected, self.PC + 2 - 0x4000] + else: + pc1 = self.mb.getitem(self.PC) + pc2 = self.mb.getitem((self.PC + 1) & 0xFFFF) + pc3 = self.mb.getitem((self.PC + 2) & 0xFFFF) + + v = 0 + opcode = pc1 if opcode == 0xCB: # Extension code - opcode = self.mb.getitem(self.PC + 1) + opcode = pc2 opcode += 0x100 # Internally shifting look-up table - - return opcodes.execute_opcode(self, opcode) + else: + # CB opcodes do not have immediates + oplen = opcodes.OPCODE_LENGTHS[opcode] + if oplen == 2: + # 8-bit immediate + v = pc2 + elif oplen == 3: + # 16-bit immediate + # Flips order of values due to big-endian + a = pc3 + b = pc2 + v = (a << 8) + b + + return opcodes.execute_opcode(self, opcode, v) diff --git a/pyboy/core/lcd.pxd b/pyboy/core/lcd.pxd index dbcfe8f9b..65a626296 100644 --- a/pyboy/core/lcd.pxd +++ b/pyboy/core/lcd.pxd @@ -114,7 +114,7 @@ cdef class LCDCRegister: cdef uint16_t windowmap_offset cdef class Renderer: - cdef uint8_t[:] _tilecache0_state, _tilecache1_state, _spritecache0_state, _spritecache1_state + cdef uint8_t[:] _tilecache_state, _spritecache_state cdef str color_format cdef tuple buffer_dims cdef bint cgb @@ -122,11 +122,11 @@ cdef class Renderer: cdef array _screenbuffer_raw cdef array _screenbuffer_attributes_raw cdef object _screenbuffer_ptr - cdef array _tilecache0_raw, _spritecache0_raw, _spritecache1_raw + cdef array _tilecache_raw, _spritecache_raw cdef uint32_t[:,:] _screenbuffer cdef uint8_t[:,:] _screenbuffer_attributes - cdef uint8_t[:,:] _tilecache0, _spritecache0, _spritecache1 - cdef uint64_t[:] _tilecache0_64, _tilecache1_64, _spritecache0_64, _spritecache1_64 + cdef uint8_t[:,:,:] _tilecache, _spritecache + cdef uint64_t[:, :] _tilecache_64, _spritecache_64 cdef uint32_t[:] colorcode_table cdef int[10] sprites_to_render @@ -135,10 +135,6 @@ cdef class Renderer: cdef void blank_screen(self, LCD) noexcept nogil - # CGB - cdef array _tilecache1_raw - cdef uint8_t[:,:] _tilecache1 - @cython.locals( bx=int, by=int, @@ -161,8 +157,10 @@ cdef class Renderer: @cython.locals(tile_addr=uint64_t, tile=int) cdef inline (int, int, uint16_t) _get_tile(self, uint8_t, uint8_t, uint16_t, LCD) noexcept nogil @cython.locals(col0=uint8_t) - cdef inline void _pixel(self, uint8_t[:,:], uint32_t, int, int, int, int, uint32_t) noexcept nogil + cdef inline void _pixel(self, int, uint32_t, int, int, int, int, uint32_t) noexcept nogil + @cython.locals(tilecache=uint8_t[:,:]) cdef int scanline_background(self, int, int, int, int, int, LCD) noexcept nogil + @cython.locals(tilecache=uint8_t[:,:]) cdef int scanline_window(self, int, int, int, int, int, LCD) noexcept nogil cdef int scanline_blank(self, int, int, int, LCD) noexcept nogil @@ -187,37 +185,14 @@ cdef class Renderer: color_code=uint8_t, pixel=uint32_t, bgmappriority=bint, + sprite_cache_no=int, ) cdef void scanline_sprites(self, LCD, int, uint32_t[:,:], uint8_t[:,:], bint) noexcept nogil cdef void sort_sprites(self, int) noexcept nogil cdef void clear_cache(self) noexcept nogil - cdef void clear_tilecache0(self) noexcept nogil - cdef void clear_tilecache1(self) noexcept nogil # CGB Only - cdef void clear_spritecache0(self) noexcept nogil - cdef void clear_spritecache1(self) noexcept nogil - @cython.locals( - x=int, - t=int, - k=int, - y=int, - byte1=uint8_t, - byte2=uint8_t, - colorcode_low=uint64_t, - colorcode_high=uint64_t, - ) - cdef void update_tilecache0(self, LCD, int, int) noexcept nogil - @cython.locals( - x=int, - t=int, - k=int, - y=int, - byte1=uint8_t, - byte2=uint8_t, - colorcode_low=uint64_t, - colorcode_high=uint64_t, - ) - cdef void update_tilecache1(self, LCD, int, int) noexcept nogil # CGB Only + cdef void clear_tilecache(self, int) noexcept nogil + cdef void clear_spritecache(self, int) noexcept nogil @cython.locals( x=int, t=int, @@ -228,7 +203,7 @@ cdef class Renderer: colorcode_low=uint64_t, colorcode_high=uint64_t, ) - cdef void update_spritecache0(self, LCD, int, int) noexcept nogil + cdef void update_tilecache(self, int, LCD, int, int) noexcept nogil @cython.locals( x=int, t=int, @@ -239,7 +214,7 @@ cdef class Renderer: colorcode_low=uint64_t, colorcode_high=uint64_t, ) - cdef void update_spritecache1(self, LCD, int, int) noexcept nogil + cdef void update_spritecache(self, int, LCD, int, int) noexcept nogil @cython.locals(colorcode_low=uint64_t, colorcode_high=uint64_t) cdef inline uint64_t colorcode(self, uint64_t, uint64_t) noexcept nogil diff --git a/pyboy/core/lcd.py b/pyboy/core/lcd.py index c41f1f242..fd61c287a 100644 --- a/pyboy/core/lcd.py +++ b/pyboy/core/lcd.py @@ -467,20 +467,25 @@ def __init__(self, cgb): # Init buffers as white self._screenbuffer_raw = array("B", [0x00] * (ROWS * COLS * 4)) self._screenbuffer_attributes_raw = array("B", [0x00] * (ROWS * COLS)) - self._tilecache0_raw = array("B", [0x00] * (TILES * 8 * 8)) - self._spritecache0_raw = array("B", [0x00] * (TILES * 8 * 8)) - self._spritecache1_raw = array("B", [0x00] * (TILES * 8 * 8)) + self._tilecache_raw = array("B", [0x00] * (TILES * 8 * 8 * 2)) + self._spritecache_raw = array("B", [0x00] * (TILES * 8 * 8 * 2)) self.sprites_to_render = array("i", [0] * 10) - self._tilecache0_state = array("B", [0] * TILES) - self._spritecache0_state = array("B", [0] * TILES) - self._spritecache1_state = array("B", [0] * TILES) + # Allocate both cache 0 and 1. Even on DMG, where tilecache[0] is only used. + self._tilecache_state = array("B", [0] * TILES * 2) + self._spritecache_state = array("B", [0] * TILES * 2) self.clear_cache() self._screenbuffer = memoryview(self._screenbuffer_raw).cast("I", shape=(ROWS, COLS)) self._screenbuffer_attributes = memoryview(self._screenbuffer_attributes_raw).cast("B", shape=(ROWS, COLS)) - self._tilecache0 = memoryview(self._tilecache0_raw).cast("B", shape=(TILES * 8, 8)) - self._tilecache0_64 = memoryview(self._tilecache0_raw).cast("Q", shape=(TILES * 8,)) + self._tilecache = memoryview(self._tilecache_raw).cast("B", shape=(2, TILES * 8, 8)) + self._tilecache_64 = memoryview(self._tilecache_raw).cast( + "Q", + shape=( + 2, + TILES * 8, + ), + ) # The look-up table only stored 4 bits from each byte, packed into a single byte self.colorcode_table = array("I", [0x00000000] * (0x100)) # Should be "L"!? @@ -504,12 +509,9 @@ def __init__(self, cgb): v |= t << (8 * (3 - offset)) # Store them in little-endian self.colorcode_table[byte] = v - # OBP0 palette - self._spritecache0 = memoryview(self._spritecache0_raw).cast("B", shape=(TILES * 8, 8)) - self._spritecache0_64 = memoryview(self._spritecache0_raw).cast("Q", shape=(TILES * 8,)) - # OBP1 palette - self._spritecache1 = memoryview(self._spritecache1_raw).cast("B", shape=(TILES * 8, 8)) - self._spritecache1_64 = memoryview(self._spritecache1_raw).cast("Q", shape=(TILES * 8,)) + # OBP0 and OBP1 palette + self._spritecache = memoryview(self._spritecache_raw).cast("B", shape=(2, TILES * 8, 8)) + self._spritecache_64 = memoryview(self._spritecache_raw).cast("Q", shape=(2, TILES * 8)) self._screenbuffer_ptr = c_void_p(self._screenbuffer_raw.buffer_info()[0]) @@ -556,8 +558,8 @@ def _get_tile(self, y, x, offset, lcd): yy = 8 * tile + y % 8 return tile, yy, tile_addr - def _pixel(self, tilecache, pixel, x, y, xx, yy, bg_priority_apply): - col0 = (tilecache[yy, xx] == 0) & 1 + def _pixel(self, cache_index, pixel, x, y, xx, yy, bg_priority_apply): + col0 = (self._tilecache[cache_index, yy, xx] == 0) & 1 self._screenbuffer[y, x] = pixel # COL0_FLAG is 1 self._screenbuffer_attributes[y, x] = bg_priority_apply | col0 @@ -567,10 +569,10 @@ def scanline_window(self, y, _x, wx, wy, cols, lcd): xx = (x - wx) % 8 if xx == 0 or x == _x: wt, yy, _ = self._get_tile(self.ly_window, x - wx, lcd._LCDC.windowmap_offset, lcd) - self.update_tilecache0(lcd, wt, 0) + self.update_tilecache(0, lcd, wt, 0) - pixel = lcd.BGP.getcolor(self._tilecache0[yy, xx]) - self._pixel(self._tilecache0, pixel, x, y, xx, yy, 0) + pixel = lcd.BGP.getcolor(self._tilecache[0, yy, xx]) + self._pixel(0, pixel, x, y, xx, yy, 0) return cols def scanline_background(self, y, _x, bx, by, cols, lcd): @@ -579,13 +581,13 @@ def scanline_background(self, y, _x, bx, by, cols, lcd): b_xx = (x + (bx & 0b111)) % 8 if b_xx == 0 or x == 0: bt, b_yy, _ = self._get_tile(y + by, x + bx, lcd._LCDC.backgroundmap_offset, lcd) - self.update_tilecache0(lcd, bt, 0) + self.update_tilecache(0, lcd, bt, 0) xx = b_xx yy = b_yy - pixel = lcd.BGP.getcolor(self._tilecache0[yy, xx]) - self._pixel(self._tilecache0, pixel, x, y, xx, yy, 0) + pixel = lcd.BGP.getcolor(self._tilecache[0, yy, xx]) + self._pixel(0, pixel, x, y, xx, yy, 0) return cols def scanline_blank(self, y, _x, cols, lcd): @@ -657,38 +659,27 @@ def scanline_sprites(self, lcd, ly, buffer, buffer_attributes, ignore_priority): xflip = attributes & 0b00100000 yflip = attributes & 0b01000000 spritepriority = (attributes & 0b10000000) and not ignore_priority + sprite_cache_no = 0 if self.cgb: palette = attributes & 0b111 if attributes & 0b1000: - self.update_spritecache1(lcd, tileindex, 1) - if lcd._LCDC.sprite_height: - self.update_spritecache1(lcd, tileindex + 1, 1) - spritecache = self._spritecache1 - else: - self.update_spritecache0(lcd, tileindex, 0) - if lcd._LCDC.sprite_height: - self.update_spritecache0(lcd, tileindex + 1, 0) - spritecache = self._spritecache0 + sprite_cache_no = 1 else: # Fake palette index palette = 0 if attributes & 0b10000: - self.update_spritecache1(lcd, tileindex, 0) - if lcd._LCDC.sprite_height: - self.update_spritecache1(lcd, tileindex + 1, 0) - spritecache = self._spritecache1 - else: - self.update_spritecache0(lcd, tileindex, 0) - if lcd._LCDC.sprite_height: - self.update_spritecache0(lcd, tileindex + 1, 0) - spritecache = self._spritecache0 + sprite_cache_no = 1 + + self.update_spritecache(sprite_cache_no, lcd, tileindex, sprite_cache_no if self.cgb else 0) + if lcd._LCDC.sprite_height: + self.update_spritecache(sprite_cache_no, lcd, tileindex + 1, sprite_cache_no if self.cgb else 0) dy = ly - y yy = spriteheight - dy - 1 if yflip else dy for dx in range(8): xx = 7 - dx if xflip else dx - color_code = spritecache[8 * tileindex + yy, xx] + color_code = self._spritecache[sprite_cache_no, 8 * tileindex + yy, xx] if 0 <= x < COLS and not color_code == 0: # If pixel is not transparent if self.cgb: pixel = lcd.ocpd.getcolor(palette, color_code) @@ -723,40 +714,34 @@ def scanline_sprites(self, lcd, ly, buffer, buffer_attributes, ignore_priority): x -= 8 def clear_cache(self): - self.clear_tilecache0() - self.clear_spritecache0() - self.clear_spritecache1() + self.clear_tilecache(0) + self.clear_spritecache(0) + self.clear_spritecache(1) def invalidate_tile(self, tile, vbank): + # TODO: Is this right? if vbank and self.cgb: - self._tilecache0_state[tile] = 0 - self._tilecache1_state[tile] = 0 - self._spritecache0_state[tile] = 0 - self._spritecache1_state[tile] = 0 + self._tilecache_state[tile] = 0 + self._tilecache_state[tile + TILES] = 0 + self._spritecache_state[tile] = 0 + self._spritecache_state[tile + TILES] = 0 else: - self._tilecache0_state[tile] = 0 + self._tilecache_state[tile] = 0 if self.cgb: - self._tilecache1_state[tile] = 0 - self._spritecache0_state[tile] = 0 - self._spritecache1_state[tile] = 0 + self._tilecache_state[tile + TILES] = 0 + self._spritecache_state[tile] = 0 + self._spritecache_state[tile + TILES] = 0 - def clear_tilecache0(self): + def clear_tilecache(self, cache_no): for i in range(TILES): - self._tilecache0_state[i] = 0 - - def clear_tilecache1(self): - pass + self._tilecache_state[i + (TILES if cache_no else 0)] = 0 - def clear_spritecache0(self): + def clear_spritecache(self, cache_no): for i in range(TILES): - self._spritecache0_state[i] = 0 + self._spritecache_state[i + (TILES if cache_no else 0)] = 0 - def clear_spritecache1(self): - for i in range(TILES): - self._spritecache1_state[i] = 0 - - def update_tilecache0(self, lcd, t, bank): - if self._tilecache0_state[t]: + def update_tilecache(self, cache_no, lcd, t, bank): + if self._tilecache_state[t + (TILES if cache_no else 0)]: return # for t in self.tiles_changed0: for k in range(0, 16, 2): # 2 bytes for each line @@ -764,15 +749,12 @@ def update_tilecache0(self, lcd, t, bank): byte2 = lcd.VRAM0[t * 16 + k + 1] y = (t * 16 + k) // 2 - self._tilecache0_64[y] = self.colorcode(byte1, byte2) - - self._tilecache0_state[t] = 1 + self._tilecache_64[cache_no, y] = self.colorcode(byte1, byte2) - def update_tilecache1(self, lcd, t, bank): - pass + self._tilecache_state[t + (TILES if cache_no else 0)] = 1 - def update_spritecache0(self, lcd, t, bank): - if self._spritecache0_state[t]: + def update_spritecache(self, cache_no, lcd, t, bank): + if self._spritecache_state[t + (TILES if cache_no else 0)]: return # for t in self.tiles_changed0: for k in range(0, 16, 2): # 2 bytes for each line @@ -780,22 +762,9 @@ def update_spritecache0(self, lcd, t, bank): byte2 = lcd.VRAM0[t * 16 + k + 1] y = (t * 16 + k) // 2 - self._spritecache0_64[y] = self.colorcode(byte1, byte2) + self._spritecache_64[cache_no, y] = self.colorcode(byte1, byte2) - self._spritecache0_state[t] = 1 - - def update_spritecache1(self, lcd, t, bank): - if self._spritecache1_state[t]: - return - # for t in self.tiles_changed0: - for k in range(0, 16, 2): # 2 bytes for each line - byte1 = lcd.VRAM0[t * 16 + k] - byte2 = lcd.VRAM0[t * 16 + k + 1] - y = (t * 16 + k) // 2 - - self._spritecache1_64[y] = self.colorcode(byte1, byte2) - - self._spritecache1_state[t] = 1 + self._spritecache_state[t + (TILES if cache_no else 0)] = 1 def colorcode(self, byte1, byte2): colorcode_low = self.colorcode_table[(byte1 & 0xF) | ((byte2 & 0xF) << 4)] @@ -860,16 +829,8 @@ def __init__(self, cgb, cartridge_cgb, color_palette, cgb_color_palette, randomi class CGBRenderer(Renderer): def __init__(self): - self._tilecache1_state = array("B", [0] * TILES) Renderer.__init__(self, True) - self._tilecache1_raw = array("B", [0xFF] * (TILES * 8 * 8)) - - self._tilecache1 = memoryview(self._tilecache1_raw).cast("B", shape=(TILES * 8, 8)) - self._tilecache1_64 = memoryview(self._tilecache1_raw).cast("Q", shape=(TILES * 8,)) - self._tilecache1_state = array("B", [0] * TILES) - self.clear_cache() - def _cgb_get_background_map_attributes(self, lcd, i): tile_num = lcd.VRAM1[i] palette = tile_num & 0b111 @@ -903,19 +864,13 @@ def scanline_window(self, y, _x, wx, wy, cols, lcd): wt, yy, w_palette, w_horiflip, bg_priority_apply, vbank = self._get_tile_cgb( self.ly_window, x - wx, lcd._LCDC.windowmap_offset, lcd ) - # NOTE: Not allowed to return memoryview in Cython tuple - if vbank: - self.update_tilecache1(lcd, wt, vbank) - tilecache = self._tilecache1 - else: - self.update_tilecache0(lcd, wt, vbank) - tilecache = self._tilecache0 + self.update_tilecache(vbank, lcd, wt, vbank) if w_horiflip: xx = 7 - xx - pixel = lcd.bcpd.getcolor(w_palette, tilecache[yy, xx]) - self._pixel(tilecache, pixel, x, y, xx, yy, bg_priority_apply) + pixel = lcd.bcpd.getcolor(w_palette, self._tilecache[vbank, yy, xx]) + self._pixel(vbank, pixel, x, y, xx, yy, bg_priority_apply) return cols def scanline_background(self, y, _x, bx, by, cols, lcd): @@ -926,19 +881,13 @@ def scanline_background(self, y, _x, bx, by, cols, lcd): bt, yy, b_palette, b_horiflip, bg_priority_apply, vbank = self._get_tile_cgb( y + by, x + bx, lcd._LCDC.backgroundmap_offset, lcd ) - # NOTE: Not allowed to return memoryview in Cython tuple - if vbank: - self.update_tilecache1(lcd, bt, vbank) - tilecache = self._tilecache1 - else: - self.update_tilecache0(lcd, bt, vbank) - tilecache = self._tilecache0 + self.update_tilecache(vbank, lcd, bt, vbank) if b_horiflip: xx = 7 - xx - pixel = lcd.bcpd.getcolor(b_palette, tilecache[yy, xx]) - self._pixel(tilecache, pixel, x, y, xx, yy, bg_priority_apply) + pixel = lcd.bcpd.getcolor(b_palette, self._tilecache[vbank, yy, xx]) + self._pixel(vbank, pixel, x, y, xx, yy, bg_priority_apply) return cols def scanline(self, lcd, y): @@ -969,17 +918,13 @@ def scanline(self, lcd, y): self.ly_window = -1 def clear_cache(self): - self.clear_tilecache0() - self.clear_tilecache1() - self.clear_spritecache0() - self.clear_spritecache1() - - def clear_tilecache1(self): - for i in range(TILES): - self._tilecache1_state[i] = 0 + self.clear_tilecache(0) + self.clear_tilecache(1) + self.clear_spritecache(0) + self.clear_spritecache(1) - def update_tilecache0(self, lcd, t, bank): - if self._tilecache0_state[t]: + def update_tilecache(self, cache_no, lcd, t, bank): + if self._tilecache_state[t + (TILES if cache_no else 0)]: return if bank: @@ -993,46 +938,12 @@ def update_tilecache0(self, lcd, t, bank): byte2 = vram_bank[t * 16 + k + 1] y = (t * 16 + k) // 2 - self._tilecache0_64[y] = self.colorcode(byte1, byte2) - - self._tilecache0_state[t] = 1 - - def update_tilecache1(self, lcd, t, bank): - if self._tilecache1_state[t]: - return - if bank: - vram_bank = lcd.VRAM1 - else: - vram_bank = lcd.VRAM0 - # for t in self.tiles_changed0: - for k in range(0, 16, 2): # 2 bytes for each line - byte1 = vram_bank[t * 16 + k] - byte2 = vram_bank[t * 16 + k + 1] - y = (t * 16 + k) // 2 - - self._tilecache1_64[y] = self.colorcode(byte1, byte2) - - self._tilecache1_state[t] = 1 - - def update_spritecache0(self, lcd, t, bank): - if self._spritecache0_state[t]: - return - if bank: - vram_bank = lcd.VRAM1 - else: - vram_bank = lcd.VRAM0 - # for t in self.tiles_changed0: - for k in range(0, 16, 2): # 2 bytes for each line - byte1 = vram_bank[t * 16 + k] - byte2 = vram_bank[t * 16 + k + 1] - y = (t * 16 + k) // 2 - - self._spritecache0_64[y] = self.colorcode(byte1, byte2) + self._tilecache_64[cache_no, y] = self.colorcode(byte1, byte2) - self._spritecache0_state[t] = 1 + self._tilecache_state[t + (TILES if cache_no else 0)] = 1 - def update_spritecache1(self, lcd, t, bank): - if self._spritecache1_state[t]: + def update_spritecache(self, cache_no, lcd, t, bank): + if self._spritecache_state[t + (TILES if cache_no else 0)]: return if bank: vram_bank = lcd.VRAM1 @@ -1044,9 +955,9 @@ def update_spritecache1(self, lcd, t, bank): byte2 = vram_bank[t * 16 + k + 1] y = (t * 16 + k) // 2 - self._spritecache1_64[y] = self.colorcode(byte1, byte2) + self._spritecache_64[cache_no, y] = self.colorcode(byte1, byte2) - self._spritecache1_state[t] = 1 + self._spritecache_state[t + (TILES if cache_no else 0)] = 1 class VBKregister: diff --git a/pyboy/core/mb.pxd b/pyboy/core/mb.pxd index 01f610b2d..966dacfd7 100644 --- a/pyboy/core/mb.pxd +++ b/pyboy/core/mb.pxd @@ -59,7 +59,7 @@ cdef class Motherboard: cdef inline void breakpoint_reinject(self) noexcept nogil cdef void buttonevent(self, WindowEvent) noexcept - cdef void stop(self, bint) noexcept + cdef void stop(self, bint, object, object) noexcept @cython.locals(cycles=int64_t, cycles_target=int64_t, mode0_cycles=int64_t, breakpoint_index=int64_t) cdef bint tick(self) noexcept nogil @@ -67,6 +67,8 @@ cdef class Motherboard: cdef uint8_t getitem(self, uint16_t) noexcept nogil cdef void setitem(self, uint16_t, uint8_t) noexcept nogil + cdef uint8_t getitem_io_ports(self, uint16_t) noexcept nogil + cdef void setitem_io_ports(self, uint16_t, uint8_t) noexcept nogil @cython.locals(offset=cython.int, dst=cython.int, n=cython.int) cdef void transfer_DMA(self, uint8_t) noexcept nogil diff --git a/pyboy/core/mb.py b/pyboy/core/mb.py index 32f81953c..440fd3ffe 100644 --- a/pyboy/core/mb.py +++ b/pyboy/core/mb.py @@ -23,7 +23,9 @@ class Motherboard: def __init__( self, - gamerom, + gamerom_file, + ram_file, + rtc_file, bootrom_file, color_palette, cgb_color_palette, @@ -36,7 +38,7 @@ def __init__( if bootrom_file is not None: logger.info("Boot-ROM file provided") - self.cartridge = cartridge.load_cartridge(gamerom) + self.cartridge = cartridge.load_cartridge(gamerom_file, ram_file, rtc_file) logger.debug("Cartridge started:\n%s", str(self.cartridge)) self.bootrom = bootrom.BootROM(bootrom_file, self.cartridge.cgb) @@ -226,10 +228,9 @@ def buttonevent(self, key): if self.interaction.key_event(key): self.cpu.set_interruptflag(INTR_HIGHTOLOW) - def stop(self, save): - self.sound.stop() + def stop(self, save, ram_file, rtc_file): if save: - self.cartridge.stop() + self.cartridge.stop(ram_file, rtc_file) def save_state(self, f): logger.debug("Saving state...") @@ -361,7 +362,7 @@ def tick(self): def getitem(self, i): if 0x0000 <= i < 0x4000: # 16kB ROM bank #0 if self.bootrom_enabled and (i <= 0xFF or (self.bootrom.cgb and 0x200 <= i < 0x900)): - return self.bootrom.getitem(i) + return self.bootrom.bootrom[i] else: return self.cartridge.rombanks[self.cartridge.rombank_selected_low, i] elif 0x4000 <= i < 0x8000: # 16kB switchable ROM bank @@ -389,7 +390,11 @@ def getitem(self, i): return self.lcd.OAM[i - 0xFE00] elif 0xFEA0 <= i < 0xFF00: # Empty but unusable for I/O return self.ram.non_io_internal_ram0[i - 0xFEA0] - elif 0xFF00 <= i < 0xFF4C: # I/O ports + else: + return self.getitem_io_ports(i) + + def getitem_io_ports(self, i): + if 0xFF00 <= i < 0xFF4C: # I/O ports if 0xFF01 <= i <= 0xFF02: if self.serial.tick(self.cpu.cycles): self.cpu.set_interruptflag(INTR_SERIAL) @@ -409,6 +414,7 @@ def getitem(self, i): return self.timer.TMA elif i == 0xFF07: return self.timer.TAC + elif i == 0xFF0F: return self.cpu.interrupts_flag_register elif 0xFF10 <= i < 0xFF40: @@ -483,8 +489,6 @@ def getitem(self, i): return self.ram.internal_ram1[i - 0xFF80] elif i == 0xFFFF: # Interrupt Enable Register return self.cpu.interrupts_enabled_register - # else: - # logger.critical("Memory access violation. Tried to read: %0.4x", i) def setitem(self, i, value): if 0x0000 <= i < 0x4000: # 16kB ROM bank #0 @@ -524,7 +528,11 @@ def setitem(self, i, value): self.lcd.OAM[i - 0xFE00] = value elif 0xFEA0 <= i < 0xFF00: # Empty but unusable for I/O self.ram.non_io_internal_ram0[i - 0xFEA0] = value - elif 0xFF00 <= i < 0xFF4C: # I/O ports + else: + self.setitem_io_ports(i, value) + + def setitem_io_ports(self, i, value): + if 0xFF00 <= i < 0xFF4C: # I/O ports if i == 0xFF00: self.ram.io_ports[i - 0xFF00] = self.interaction.pull(value) elif 0xFF01 <= i <= 0xFF02: @@ -585,15 +593,15 @@ def setitem(self, i, value): elif i == 0xFF47: if self.lcd.BGP.set(value): # TODO: Move out of MB - self.lcd.renderer.clear_tilecache0() + self.lcd.renderer.clear_tilecache(0) elif i == 0xFF48: if self.lcd.OBP0.set(value): # TODO: Move out of MB - self.lcd.renderer.clear_spritecache0() + self.lcd.renderer.clear_spritecache(0) elif i == 0xFF49: if self.lcd.OBP1.set(value): # TODO: Move out of MB - self.lcd.renderer.clear_spritecache1() + self.lcd.renderer.clear_spritecache(1) elif i == 0xFF4A: self.lcd.WY = value elif i == 0xFF4B: @@ -627,14 +635,14 @@ def setitem(self, i, value): self.lcd.bcps.set(value) elif self.cgb and i == 0xFF69: self.lcd.bcpd.set(value) - self.lcd.renderer.clear_tilecache0() - self.lcd.renderer.clear_tilecache1() + self.lcd.renderer.clear_tilecache(0) + self.lcd.renderer.clear_tilecache(1) elif self.cgb and i == 0xFF6A: self.lcd.ocps.set(value) elif self.cgb and i == 0xFF6B: self.lcd.ocpd.set(value) - self.lcd.renderer.clear_spritecache0() - self.lcd.renderer.clear_spritecache1() + self.lcd.renderer.clear_spritecache(0) + self.lcd.renderer.clear_spritecache(1) else: self.ram.non_io_internal_ram1[i - 0xFF4C] = value elif 0xFF80 <= i < 0xFFFF: # Internal RAM @@ -642,8 +650,6 @@ def setitem(self, i, value): elif i == 0xFFFF: # Interrupt Enable Register self.cpu.interrupts_enabled_register = value self.cpu.bail = True - # else: - # logger.critical("Memory access violation. Tried to write: 0x%0.2x to 0x%0.4x", value, i) def transfer_DMA(self, src): # http://problemkaputt.de/pandocs.htm#lcdoamdmatransfers diff --git a/pyboy/core/opcodes.pxd b/pyboy/core/opcodes.pxd index e14b47bea..740f68018 100644 --- a/pyboy/core/opcodes.pxd +++ b/pyboy/core/opcodes.pxd @@ -4,7 +4,7 @@ # CHANGES TO THE CODE SHOULD BE MADE IN 'opcodes_gen.py'. cimport cython -from libc.stdint cimport uint8_t, uint16_t, uint32_t +from libc.stdint cimport uint8_t, uint16_t, uint32_t, int32_t from pyboy.logging.logging cimport Logger @@ -15,1010 +15,1009 @@ cdef Logger logger cdef uint16_t FLAGC, FLAGH, FLAGN, FLAGZ cdef uint8_t[512] OPCODE_LENGTHS -@cython.locals(v=cython.int, a=cython.int, b=cython.int, pc=cython.ushort) -cdef int execute_opcode(cpu.CPU, uint16_t) noexcept nogil +cdef int execute_opcode(cpu.CPU, uint16_t, uint16_t) noexcept nogil cdef uint8_t no_opcode(cpu.CPU) noexcept nogil cdef uint8_t BRK(cpu.CPU) noexcept nogil -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t NOP_00(cpu.CPU) noexcept nogil # 00 NOP -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_01(cpu.CPU, int v) noexcept nogil # 01 LD BC,d16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_02(cpu.CPU) noexcept nogil # 02 LD (BC),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_03(cpu.CPU) noexcept nogil # 03 INC BC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_04(cpu.CPU) noexcept nogil # 04 INC B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_05(cpu.CPU) noexcept nogil # 05 DEC B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_06(cpu.CPU, int v) noexcept nogil # 06 LD B,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLCA_07(cpu.CPU) noexcept nogil # 07 RLCA -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_08(cpu.CPU, int v) noexcept nogil # 08 LD (a16),SP -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_09(cpu.CPU) noexcept nogil # 09 ADD HL,BC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_0A(cpu.CPU) noexcept nogil # 0A LD A,(BC) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_0B(cpu.CPU) noexcept nogil # 0B DEC BC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_0C(cpu.CPU) noexcept nogil # 0C INC C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_0D(cpu.CPU) noexcept nogil # 0D DEC C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_0E(cpu.CPU, int v) noexcept nogil # 0E LD C,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRCA_0F(cpu.CPU) noexcept nogil # 0F RRCA -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t STOP_10(cpu.CPU, int v) noexcept nogil # 10 STOP 0 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_11(cpu.CPU, int v) noexcept nogil # 11 LD DE,d16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_12(cpu.CPU) noexcept nogil # 12 LD (DE),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_13(cpu.CPU) noexcept nogil # 13 INC DE -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_14(cpu.CPU) noexcept nogil # 14 INC D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_15(cpu.CPU) noexcept nogil # 15 DEC D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_16(cpu.CPU, int v) noexcept nogil # 16 LD D,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLA_17(cpu.CPU) noexcept nogil # 17 RLA -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JR_18(cpu.CPU, int v) noexcept nogil # 18 JR r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_19(cpu.CPU) noexcept nogil # 19 ADD HL,DE -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_1A(cpu.CPU) noexcept nogil # 1A LD A,(DE) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_1B(cpu.CPU) noexcept nogil # 1B DEC DE -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_1C(cpu.CPU) noexcept nogil # 1C INC E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_1D(cpu.CPU) noexcept nogil # 1D DEC E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_1E(cpu.CPU, int v) noexcept nogil # 1E LD E,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRA_1F(cpu.CPU) noexcept nogil # 1F RRA -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JR_20(cpu.CPU, int v) noexcept nogil # 20 JR NZ,r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_21(cpu.CPU, int v) noexcept nogil # 21 LD HL,d16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_22(cpu.CPU) noexcept nogil # 22 LD (HL+),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_23(cpu.CPU) noexcept nogil # 23 INC HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_24(cpu.CPU) noexcept nogil # 24 INC H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_25(cpu.CPU) noexcept nogil # 25 DEC H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_26(cpu.CPU, int v) noexcept nogil # 26 LD H,d8 -@cython.locals(v=int, flag=uint8_t, t=int, corr=ushort) +@cython.locals(flag=uint8_t, t=int, corr=uint16_t) cdef uint8_t DAA_27(cpu.CPU) noexcept nogil # 27 DAA -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JR_28(cpu.CPU, int v) noexcept nogil # 28 JR Z,r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_29(cpu.CPU) noexcept nogil # 29 ADD HL,HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_2A(cpu.CPU) noexcept nogil # 2A LD A,(HL+) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_2B(cpu.CPU) noexcept nogil # 2B DEC HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_2C(cpu.CPU) noexcept nogil # 2C INC L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_2D(cpu.CPU) noexcept nogil # 2D DEC L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_2E(cpu.CPU, int v) noexcept nogil # 2E LD L,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CPL_2F(cpu.CPU) noexcept nogil # 2F CPL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JR_30(cpu.CPU, int v) noexcept nogil # 30 JR NC,r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_31(cpu.CPU, int v) noexcept nogil # 31 LD SP,d16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_32(cpu.CPU) noexcept nogil # 32 LD (HL-),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_33(cpu.CPU) noexcept nogil # 33 INC SP -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_34(cpu.CPU) noexcept nogil # 34 INC (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_35(cpu.CPU) noexcept nogil # 35 DEC (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_36(cpu.CPU, int v) noexcept nogil # 36 LD (HL),d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SCF_37(cpu.CPU) noexcept nogil # 37 SCF -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JR_38(cpu.CPU, int v) noexcept nogil # 38 JR C,r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_39(cpu.CPU) noexcept nogil # 39 ADD HL,SP -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_3A(cpu.CPU) noexcept nogil # 3A LD A,(HL-) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_3B(cpu.CPU) noexcept nogil # 3B DEC SP -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t INC_3C(cpu.CPU) noexcept nogil # 3C INC A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DEC_3D(cpu.CPU) noexcept nogil # 3D DEC A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_3E(cpu.CPU, int v) noexcept nogil # 3E LD A,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CCF_3F(cpu.CPU) noexcept nogil # 3F CCF -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_40(cpu.CPU) noexcept nogil # 40 LD B,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_41(cpu.CPU) noexcept nogil # 41 LD B,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_42(cpu.CPU) noexcept nogil # 42 LD B,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_43(cpu.CPU) noexcept nogil # 43 LD B,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_44(cpu.CPU) noexcept nogil # 44 LD B,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_45(cpu.CPU) noexcept nogil # 45 LD B,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_46(cpu.CPU) noexcept nogil # 46 LD B,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_47(cpu.CPU) noexcept nogil # 47 LD B,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_48(cpu.CPU) noexcept nogil # 48 LD C,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_49(cpu.CPU) noexcept nogil # 49 LD C,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4A(cpu.CPU) noexcept nogil # 4A LD C,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4B(cpu.CPU) noexcept nogil # 4B LD C,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4C(cpu.CPU) noexcept nogil # 4C LD C,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4D(cpu.CPU) noexcept nogil # 4D LD C,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4E(cpu.CPU) noexcept nogil # 4E LD C,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_4F(cpu.CPU) noexcept nogil # 4F LD C,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_50(cpu.CPU) noexcept nogil # 50 LD D,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_51(cpu.CPU) noexcept nogil # 51 LD D,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_52(cpu.CPU) noexcept nogil # 52 LD D,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_53(cpu.CPU) noexcept nogil # 53 LD D,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_54(cpu.CPU) noexcept nogil # 54 LD D,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_55(cpu.CPU) noexcept nogil # 55 LD D,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_56(cpu.CPU) noexcept nogil # 56 LD D,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_57(cpu.CPU) noexcept nogil # 57 LD D,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_58(cpu.CPU) noexcept nogil # 58 LD E,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_59(cpu.CPU) noexcept nogil # 59 LD E,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5A(cpu.CPU) noexcept nogil # 5A LD E,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5B(cpu.CPU) noexcept nogil # 5B LD E,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5C(cpu.CPU) noexcept nogil # 5C LD E,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5D(cpu.CPU) noexcept nogil # 5D LD E,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5E(cpu.CPU) noexcept nogil # 5E LD E,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_5F(cpu.CPU) noexcept nogil # 5F LD E,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_60(cpu.CPU) noexcept nogil # 60 LD H,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_61(cpu.CPU) noexcept nogil # 61 LD H,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_62(cpu.CPU) noexcept nogil # 62 LD H,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_63(cpu.CPU) noexcept nogil # 63 LD H,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_64(cpu.CPU) noexcept nogil # 64 LD H,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_65(cpu.CPU) noexcept nogil # 65 LD H,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_66(cpu.CPU) noexcept nogil # 66 LD H,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_67(cpu.CPU) noexcept nogil # 67 LD H,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_68(cpu.CPU) noexcept nogil # 68 LD L,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_69(cpu.CPU) noexcept nogil # 69 LD L,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6A(cpu.CPU) noexcept nogil # 6A LD L,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6B(cpu.CPU) noexcept nogil # 6B LD L,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6C(cpu.CPU) noexcept nogil # 6C LD L,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6D(cpu.CPU) noexcept nogil # 6D LD L,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6E(cpu.CPU) noexcept nogil # 6E LD L,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_6F(cpu.CPU) noexcept nogil # 6F LD L,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_70(cpu.CPU) noexcept nogil # 70 LD (HL),B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_71(cpu.CPU) noexcept nogil # 71 LD (HL),C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_72(cpu.CPU) noexcept nogil # 72 LD (HL),D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_73(cpu.CPU) noexcept nogil # 73 LD (HL),E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_74(cpu.CPU) noexcept nogil # 74 LD (HL),H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_75(cpu.CPU) noexcept nogil # 75 LD (HL),L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t HALT_76(cpu.CPU) noexcept nogil # 76 HALT -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_77(cpu.CPU) noexcept nogil # 77 LD (HL),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_78(cpu.CPU) noexcept nogil # 78 LD A,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_79(cpu.CPU) noexcept nogil # 79 LD A,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7A(cpu.CPU) noexcept nogil # 7A LD A,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7B(cpu.CPU) noexcept nogil # 7B LD A,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7C(cpu.CPU) noexcept nogil # 7C LD A,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7D(cpu.CPU) noexcept nogil # 7D LD A,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7E(cpu.CPU) noexcept nogil # 7E LD A,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_7F(cpu.CPU) noexcept nogil # 7F LD A,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_80(cpu.CPU) noexcept nogil # 80 ADD A,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_81(cpu.CPU) noexcept nogil # 81 ADD A,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_82(cpu.CPU) noexcept nogil # 82 ADD A,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_83(cpu.CPU) noexcept nogil # 83 ADD A,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_84(cpu.CPU) noexcept nogil # 84 ADD A,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_85(cpu.CPU) noexcept nogil # 85 ADD A,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_86(cpu.CPU) noexcept nogil # 86 ADD A,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_87(cpu.CPU) noexcept nogil # 87 ADD A,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_88(cpu.CPU) noexcept nogil # 88 ADC A,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_89(cpu.CPU) noexcept nogil # 89 ADC A,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8A(cpu.CPU) noexcept nogil # 8A ADC A,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8B(cpu.CPU) noexcept nogil # 8B ADC A,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8C(cpu.CPU) noexcept nogil # 8C ADC A,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8D(cpu.CPU) noexcept nogil # 8D ADC A,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8E(cpu.CPU) noexcept nogil # 8E ADC A,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_8F(cpu.CPU) noexcept nogil # 8F ADC A,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_90(cpu.CPU) noexcept nogil # 90 SUB B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_91(cpu.CPU) noexcept nogil # 91 SUB C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_92(cpu.CPU) noexcept nogil # 92 SUB D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_93(cpu.CPU) noexcept nogil # 93 SUB E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_94(cpu.CPU) noexcept nogil # 94 SUB H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_95(cpu.CPU) noexcept nogil # 95 SUB L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_96(cpu.CPU) noexcept nogil # 96 SUB (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_97(cpu.CPU) noexcept nogil # 97 SUB A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_98(cpu.CPU) noexcept nogil # 98 SBC A,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_99(cpu.CPU) noexcept nogil # 99 SBC A,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9A(cpu.CPU) noexcept nogil # 9A SBC A,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9B(cpu.CPU) noexcept nogil # 9B SBC A,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9C(cpu.CPU) noexcept nogil # 9C SBC A,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9D(cpu.CPU) noexcept nogil # 9D SBC A,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9E(cpu.CPU) noexcept nogil # 9E SBC A,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_9F(cpu.CPU) noexcept nogil # 9F SBC A,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A0(cpu.CPU) noexcept nogil # A0 AND B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A1(cpu.CPU) noexcept nogil # A1 AND C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A2(cpu.CPU) noexcept nogil # A2 AND D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A3(cpu.CPU) noexcept nogil # A3 AND E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A4(cpu.CPU) noexcept nogil # A4 AND H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A5(cpu.CPU) noexcept nogil # A5 AND L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A6(cpu.CPU) noexcept nogil # A6 AND (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_A7(cpu.CPU) noexcept nogil # A7 AND A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_A8(cpu.CPU) noexcept nogil # A8 XOR B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_A9(cpu.CPU) noexcept nogil # A9 XOR C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AA(cpu.CPU) noexcept nogil # AA XOR D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AB(cpu.CPU) noexcept nogil # AB XOR E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AC(cpu.CPU) noexcept nogil # AC XOR H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AD(cpu.CPU) noexcept nogil # AD XOR L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AE(cpu.CPU) noexcept nogil # AE XOR (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_AF(cpu.CPU) noexcept nogil # AF XOR A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B0(cpu.CPU) noexcept nogil # B0 OR B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B1(cpu.CPU) noexcept nogil # B1 OR C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B2(cpu.CPU) noexcept nogil # B2 OR D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B3(cpu.CPU) noexcept nogil # B3 OR E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B4(cpu.CPU) noexcept nogil # B4 OR H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B5(cpu.CPU) noexcept nogil # B5 OR L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B6(cpu.CPU) noexcept nogil # B6 OR (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_B7(cpu.CPU) noexcept nogil # B7 OR A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_B8(cpu.CPU) noexcept nogil # B8 CP B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_B9(cpu.CPU) noexcept nogil # B9 CP C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BA(cpu.CPU) noexcept nogil # BA CP D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BB(cpu.CPU) noexcept nogil # BB CP E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BC(cpu.CPU) noexcept nogil # BC CP H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BD(cpu.CPU) noexcept nogil # BD CP L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BE(cpu.CPU) noexcept nogil # BE CP (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_BF(cpu.CPU) noexcept nogil # BF CP A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RET_C0(cpu.CPU) noexcept nogil # C0 RET NZ -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t POP_C1(cpu.CPU) noexcept nogil # C1 POP BC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_C2(cpu.CPU, int v) noexcept nogil # C2 JP NZ,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_C3(cpu.CPU, int v) noexcept nogil # C3 JP a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CALL_C4(cpu.CPU, int v) noexcept nogil # C4 CALL NZ,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t PUSH_C5(cpu.CPU) noexcept nogil # C5 PUSH BC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_C6(cpu.CPU, int v) noexcept nogil # C6 ADD A,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_C7(cpu.CPU) noexcept nogil # C7 RST 00H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RET_C8(cpu.CPU) noexcept nogil # C8 RET Z -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RET_C9(cpu.CPU) noexcept nogil # C9 RET -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_CA(cpu.CPU, int v) noexcept nogil # CA JP Z,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t PREFIX_CB(cpu.CPU) noexcept nogil # CB PREFIX CB -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CALL_CC(cpu.CPU, int v) noexcept nogil # CC CALL Z,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CALL_CD(cpu.CPU, int v) noexcept nogil # CD CALL a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADC_CE(cpu.CPU, int v) noexcept nogil # CE ADC A,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_CF(cpu.CPU) noexcept nogil # CF RST 08H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RET_D0(cpu.CPU) noexcept nogil # D0 RET NC -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t POP_D1(cpu.CPU) noexcept nogil # D1 POP DE -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_D2(cpu.CPU, int v) noexcept nogil # D2 JP NC,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CALL_D4(cpu.CPU, int v) noexcept nogil # D4 CALL NC,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t PUSH_D5(cpu.CPU) noexcept nogil # D5 PUSH DE -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SUB_D6(cpu.CPU, int v) noexcept nogil # D6 SUB d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_D7(cpu.CPU) noexcept nogil # D7 RST 10H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RET_D8(cpu.CPU) noexcept nogil # D8 RET C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RETI_D9(cpu.CPU) noexcept nogil # D9 RETI -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_DA(cpu.CPU, int v) noexcept nogil # DA JP C,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CALL_DC(cpu.CPU, int v) noexcept nogil # DC CALL C,a16 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SBC_DE(cpu.CPU, int v) noexcept nogil # DE SBC A,d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_DF(cpu.CPU) noexcept nogil # DF RST 18H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LDH_E0(cpu.CPU, int v) noexcept nogil # E0 LDH (a8),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t POP_E1(cpu.CPU) noexcept nogil # E1 POP HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_E2(cpu.CPU) noexcept nogil # E2 LD (C),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t PUSH_E5(cpu.CPU) noexcept nogil # E5 PUSH HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t AND_E6(cpu.CPU, int v) noexcept nogil # E6 AND d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_E7(cpu.CPU) noexcept nogil # E7 RST 20H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t ADD_E8(cpu.CPU, int v) noexcept nogil # E8 ADD SP,r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t JP_E9(cpu.CPU) noexcept nogil # E9 JP (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_EA(cpu.CPU, int v) noexcept nogil # EA LD (a16),A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t XOR_EE(cpu.CPU, int v) noexcept nogil # EE XOR d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_EF(cpu.CPU) noexcept nogil # EF RST 28H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LDH_F0(cpu.CPU, int v) noexcept nogil # F0 LDH A,(a8) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t POP_F1(cpu.CPU) noexcept nogil # F1 POP AF -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_F2(cpu.CPU) noexcept nogil # F2 LD A,(C) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t DI_F3(cpu.CPU) noexcept nogil # F3 DI -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t PUSH_F5(cpu.CPU) noexcept nogil # F5 PUSH AF -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t OR_F6(cpu.CPU, int v) noexcept nogil # F6 OR d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_F7(cpu.CPU) noexcept nogil # F7 RST 30H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_F8(cpu.CPU, int v) noexcept nogil # F8 LD HL,SP+r8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_F9(cpu.CPU) noexcept nogil # F9 LD SP,HL -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t LD_FA(cpu.CPU, int v) noexcept nogil # FA LD A,(a16) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t EI_FB(cpu.CPU) noexcept nogil # FB EI -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t CP_FE(cpu.CPU, int v) noexcept nogil # FE CP d8 -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RST_FF(cpu.CPU) noexcept nogil # FF RST 38H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_100(cpu.CPU) noexcept nogil # 100 RLC B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_101(cpu.CPU) noexcept nogil # 101 RLC C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_102(cpu.CPU) noexcept nogil # 102 RLC D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_103(cpu.CPU) noexcept nogil # 103 RLC E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_104(cpu.CPU) noexcept nogil # 104 RLC H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_105(cpu.CPU) noexcept nogil # 105 RLC L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_106(cpu.CPU) noexcept nogil # 106 RLC (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RLC_107(cpu.CPU) noexcept nogil # 107 RLC A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_108(cpu.CPU) noexcept nogil # 108 RRC B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_109(cpu.CPU) noexcept nogil # 109 RRC C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10A(cpu.CPU) noexcept nogil # 10A RRC D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10B(cpu.CPU) noexcept nogil # 10B RRC E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10C(cpu.CPU) noexcept nogil # 10C RRC H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10D(cpu.CPU) noexcept nogil # 10D RRC L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10E(cpu.CPU) noexcept nogil # 10E RRC (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RRC_10F(cpu.CPU) noexcept nogil # 10F RRC A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_110(cpu.CPU) noexcept nogil # 110 RL B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_111(cpu.CPU) noexcept nogil # 111 RL C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_112(cpu.CPU) noexcept nogil # 112 RL D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_113(cpu.CPU) noexcept nogil # 113 RL E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_114(cpu.CPU) noexcept nogil # 114 RL H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_115(cpu.CPU) noexcept nogil # 115 RL L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_116(cpu.CPU) noexcept nogil # 116 RL (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RL_117(cpu.CPU) noexcept nogil # 117 RL A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_118(cpu.CPU) noexcept nogil # 118 RR B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_119(cpu.CPU) noexcept nogil # 119 RR C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11A(cpu.CPU) noexcept nogil # 11A RR D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11B(cpu.CPU) noexcept nogil # 11B RR E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11C(cpu.CPU) noexcept nogil # 11C RR H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11D(cpu.CPU) noexcept nogil # 11D RR L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11E(cpu.CPU) noexcept nogil # 11E RR (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RR_11F(cpu.CPU) noexcept nogil # 11F RR A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_120(cpu.CPU) noexcept nogil # 120 SLA B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_121(cpu.CPU) noexcept nogil # 121 SLA C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_122(cpu.CPU) noexcept nogil # 122 SLA D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_123(cpu.CPU) noexcept nogil # 123 SLA E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_124(cpu.CPU) noexcept nogil # 124 SLA H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_125(cpu.CPU) noexcept nogil # 125 SLA L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_126(cpu.CPU) noexcept nogil # 126 SLA (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SLA_127(cpu.CPU) noexcept nogil # 127 SLA A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_128(cpu.CPU) noexcept nogil # 128 SRA B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_129(cpu.CPU) noexcept nogil # 129 SRA C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12A(cpu.CPU) noexcept nogil # 12A SRA D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12B(cpu.CPU) noexcept nogil # 12B SRA E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12C(cpu.CPU) noexcept nogil # 12C SRA H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12D(cpu.CPU) noexcept nogil # 12D SRA L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12E(cpu.CPU) noexcept nogil # 12E SRA (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRA_12F(cpu.CPU) noexcept nogil # 12F SRA A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_130(cpu.CPU) noexcept nogil # 130 SWAP B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_131(cpu.CPU) noexcept nogil # 131 SWAP C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_132(cpu.CPU) noexcept nogil # 132 SWAP D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_133(cpu.CPU) noexcept nogil # 133 SWAP E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_134(cpu.CPU) noexcept nogil # 134 SWAP H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_135(cpu.CPU) noexcept nogil # 135 SWAP L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_136(cpu.CPU) noexcept nogil # 136 SWAP (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SWAP_137(cpu.CPU) noexcept nogil # 137 SWAP A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_138(cpu.CPU) noexcept nogil # 138 SRL B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_139(cpu.CPU) noexcept nogil # 139 SRL C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13A(cpu.CPU) noexcept nogil # 13A SRL D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13B(cpu.CPU) noexcept nogil # 13B SRL E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13C(cpu.CPU) noexcept nogil # 13C SRL H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13D(cpu.CPU) noexcept nogil # 13D SRL L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13E(cpu.CPU) noexcept nogil # 13E SRL (HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SRL_13F(cpu.CPU) noexcept nogil # 13F SRL A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_140(cpu.CPU) noexcept nogil # 140 BIT 0,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_141(cpu.CPU) noexcept nogil # 141 BIT 0,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_142(cpu.CPU) noexcept nogil # 142 BIT 0,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_143(cpu.CPU) noexcept nogil # 143 BIT 0,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_144(cpu.CPU) noexcept nogil # 144 BIT 0,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_145(cpu.CPU) noexcept nogil # 145 BIT 0,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_146(cpu.CPU) noexcept nogil # 146 BIT 0,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_147(cpu.CPU) noexcept nogil # 147 BIT 0,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_148(cpu.CPU) noexcept nogil # 148 BIT 1,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_149(cpu.CPU) noexcept nogil # 149 BIT 1,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14A(cpu.CPU) noexcept nogil # 14A BIT 1,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14B(cpu.CPU) noexcept nogil # 14B BIT 1,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14C(cpu.CPU) noexcept nogil # 14C BIT 1,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14D(cpu.CPU) noexcept nogil # 14D BIT 1,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14E(cpu.CPU) noexcept nogil # 14E BIT 1,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_14F(cpu.CPU) noexcept nogil # 14F BIT 1,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_150(cpu.CPU) noexcept nogil # 150 BIT 2,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_151(cpu.CPU) noexcept nogil # 151 BIT 2,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_152(cpu.CPU) noexcept nogil # 152 BIT 2,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_153(cpu.CPU) noexcept nogil # 153 BIT 2,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_154(cpu.CPU) noexcept nogil # 154 BIT 2,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_155(cpu.CPU) noexcept nogil # 155 BIT 2,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_156(cpu.CPU) noexcept nogil # 156 BIT 2,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_157(cpu.CPU) noexcept nogil # 157 BIT 2,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_158(cpu.CPU) noexcept nogil # 158 BIT 3,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_159(cpu.CPU) noexcept nogil # 159 BIT 3,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15A(cpu.CPU) noexcept nogil # 15A BIT 3,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15B(cpu.CPU) noexcept nogil # 15B BIT 3,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15C(cpu.CPU) noexcept nogil # 15C BIT 3,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15D(cpu.CPU) noexcept nogil # 15D BIT 3,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15E(cpu.CPU) noexcept nogil # 15E BIT 3,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_15F(cpu.CPU) noexcept nogil # 15F BIT 3,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_160(cpu.CPU) noexcept nogil # 160 BIT 4,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_161(cpu.CPU) noexcept nogil # 161 BIT 4,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_162(cpu.CPU) noexcept nogil # 162 BIT 4,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_163(cpu.CPU) noexcept nogil # 163 BIT 4,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_164(cpu.CPU) noexcept nogil # 164 BIT 4,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_165(cpu.CPU) noexcept nogil # 165 BIT 4,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_166(cpu.CPU) noexcept nogil # 166 BIT 4,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_167(cpu.CPU) noexcept nogil # 167 BIT 4,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_168(cpu.CPU) noexcept nogil # 168 BIT 5,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_169(cpu.CPU) noexcept nogil # 169 BIT 5,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16A(cpu.CPU) noexcept nogil # 16A BIT 5,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16B(cpu.CPU) noexcept nogil # 16B BIT 5,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16C(cpu.CPU) noexcept nogil # 16C BIT 5,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16D(cpu.CPU) noexcept nogil # 16D BIT 5,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16E(cpu.CPU) noexcept nogil # 16E BIT 5,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_16F(cpu.CPU) noexcept nogil # 16F BIT 5,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_170(cpu.CPU) noexcept nogil # 170 BIT 6,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_171(cpu.CPU) noexcept nogil # 171 BIT 6,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_172(cpu.CPU) noexcept nogil # 172 BIT 6,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_173(cpu.CPU) noexcept nogil # 173 BIT 6,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_174(cpu.CPU) noexcept nogil # 174 BIT 6,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_175(cpu.CPU) noexcept nogil # 175 BIT 6,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_176(cpu.CPU) noexcept nogil # 176 BIT 6,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_177(cpu.CPU) noexcept nogil # 177 BIT 6,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_178(cpu.CPU) noexcept nogil # 178 BIT 7,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_179(cpu.CPU) noexcept nogil # 179 BIT 7,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17A(cpu.CPU) noexcept nogil # 17A BIT 7,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17B(cpu.CPU) noexcept nogil # 17B BIT 7,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17C(cpu.CPU) noexcept nogil # 17C BIT 7,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17D(cpu.CPU) noexcept nogil # 17D BIT 7,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17E(cpu.CPU) noexcept nogil # 17E BIT 7,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t BIT_17F(cpu.CPU) noexcept nogil # 17F BIT 7,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_180(cpu.CPU) noexcept nogil # 180 RES 0,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_181(cpu.CPU) noexcept nogil # 181 RES 0,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_182(cpu.CPU) noexcept nogil # 182 RES 0,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_183(cpu.CPU) noexcept nogil # 183 RES 0,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_184(cpu.CPU) noexcept nogil # 184 RES 0,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_185(cpu.CPU) noexcept nogil # 185 RES 0,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_186(cpu.CPU) noexcept nogil # 186 RES 0,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_187(cpu.CPU) noexcept nogil # 187 RES 0,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_188(cpu.CPU) noexcept nogil # 188 RES 1,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_189(cpu.CPU) noexcept nogil # 189 RES 1,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18A(cpu.CPU) noexcept nogil # 18A RES 1,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18B(cpu.CPU) noexcept nogil # 18B RES 1,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18C(cpu.CPU) noexcept nogil # 18C RES 1,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18D(cpu.CPU) noexcept nogil # 18D RES 1,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18E(cpu.CPU) noexcept nogil # 18E RES 1,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_18F(cpu.CPU) noexcept nogil # 18F RES 1,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_190(cpu.CPU) noexcept nogil # 190 RES 2,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_191(cpu.CPU) noexcept nogil # 191 RES 2,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_192(cpu.CPU) noexcept nogil # 192 RES 2,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_193(cpu.CPU) noexcept nogil # 193 RES 2,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_194(cpu.CPU) noexcept nogil # 194 RES 2,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_195(cpu.CPU) noexcept nogil # 195 RES 2,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_196(cpu.CPU) noexcept nogil # 196 RES 2,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_197(cpu.CPU) noexcept nogil # 197 RES 2,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_198(cpu.CPU) noexcept nogil # 198 RES 3,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_199(cpu.CPU) noexcept nogil # 199 RES 3,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19A(cpu.CPU) noexcept nogil # 19A RES 3,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19B(cpu.CPU) noexcept nogil # 19B RES 3,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19C(cpu.CPU) noexcept nogil # 19C RES 3,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19D(cpu.CPU) noexcept nogil # 19D RES 3,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19E(cpu.CPU) noexcept nogil # 19E RES 3,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_19F(cpu.CPU) noexcept nogil # 19F RES 3,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A0(cpu.CPU) noexcept nogil # 1A0 RES 4,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A1(cpu.CPU) noexcept nogil # 1A1 RES 4,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A2(cpu.CPU) noexcept nogil # 1A2 RES 4,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A3(cpu.CPU) noexcept nogil # 1A3 RES 4,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A4(cpu.CPU) noexcept nogil # 1A4 RES 4,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A5(cpu.CPU) noexcept nogil # 1A5 RES 4,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A6(cpu.CPU) noexcept nogil # 1A6 RES 4,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A7(cpu.CPU) noexcept nogil # 1A7 RES 4,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A8(cpu.CPU) noexcept nogil # 1A8 RES 5,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1A9(cpu.CPU) noexcept nogil # 1A9 RES 5,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AA(cpu.CPU) noexcept nogil # 1AA RES 5,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AB(cpu.CPU) noexcept nogil # 1AB RES 5,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AC(cpu.CPU) noexcept nogil # 1AC RES 5,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AD(cpu.CPU) noexcept nogil # 1AD RES 5,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AE(cpu.CPU) noexcept nogil # 1AE RES 5,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1AF(cpu.CPU) noexcept nogil # 1AF RES 5,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B0(cpu.CPU) noexcept nogil # 1B0 RES 6,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B1(cpu.CPU) noexcept nogil # 1B1 RES 6,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B2(cpu.CPU) noexcept nogil # 1B2 RES 6,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B3(cpu.CPU) noexcept nogil # 1B3 RES 6,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B4(cpu.CPU) noexcept nogil # 1B4 RES 6,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B5(cpu.CPU) noexcept nogil # 1B5 RES 6,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B6(cpu.CPU) noexcept nogil # 1B6 RES 6,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B7(cpu.CPU) noexcept nogil # 1B7 RES 6,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B8(cpu.CPU) noexcept nogil # 1B8 RES 7,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1B9(cpu.CPU) noexcept nogil # 1B9 RES 7,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BA(cpu.CPU) noexcept nogil # 1BA RES 7,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BB(cpu.CPU) noexcept nogil # 1BB RES 7,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BC(cpu.CPU) noexcept nogil # 1BC RES 7,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BD(cpu.CPU) noexcept nogil # 1BD RES 7,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BE(cpu.CPU) noexcept nogil # 1BE RES 7,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t RES_1BF(cpu.CPU) noexcept nogil # 1BF RES 7,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C0(cpu.CPU) noexcept nogil # 1C0 SET 0,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C1(cpu.CPU) noexcept nogil # 1C1 SET 0,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C2(cpu.CPU) noexcept nogil # 1C2 SET 0,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C3(cpu.CPU) noexcept nogil # 1C3 SET 0,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C4(cpu.CPU) noexcept nogil # 1C4 SET 0,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C5(cpu.CPU) noexcept nogil # 1C5 SET 0,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C6(cpu.CPU) noexcept nogil # 1C6 SET 0,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C7(cpu.CPU) noexcept nogil # 1C7 SET 0,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C8(cpu.CPU) noexcept nogil # 1C8 SET 1,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1C9(cpu.CPU) noexcept nogil # 1C9 SET 1,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CA(cpu.CPU) noexcept nogil # 1CA SET 1,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CB(cpu.CPU) noexcept nogil # 1CB SET 1,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CC(cpu.CPU) noexcept nogil # 1CC SET 1,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CD(cpu.CPU) noexcept nogil # 1CD SET 1,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CE(cpu.CPU) noexcept nogil # 1CE SET 1,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1CF(cpu.CPU) noexcept nogil # 1CF SET 1,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D0(cpu.CPU) noexcept nogil # 1D0 SET 2,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D1(cpu.CPU) noexcept nogil # 1D1 SET 2,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D2(cpu.CPU) noexcept nogil # 1D2 SET 2,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D3(cpu.CPU) noexcept nogil # 1D3 SET 2,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D4(cpu.CPU) noexcept nogil # 1D4 SET 2,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D5(cpu.CPU) noexcept nogil # 1D5 SET 2,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D6(cpu.CPU) noexcept nogil # 1D6 SET 2,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D7(cpu.CPU) noexcept nogil # 1D7 SET 2,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D8(cpu.CPU) noexcept nogil # 1D8 SET 3,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1D9(cpu.CPU) noexcept nogil # 1D9 SET 3,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DA(cpu.CPU) noexcept nogil # 1DA SET 3,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DB(cpu.CPU) noexcept nogil # 1DB SET 3,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DC(cpu.CPU) noexcept nogil # 1DC SET 3,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DD(cpu.CPU) noexcept nogil # 1DD SET 3,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DE(cpu.CPU) noexcept nogil # 1DE SET 3,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1DF(cpu.CPU) noexcept nogil # 1DF SET 3,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E0(cpu.CPU) noexcept nogil # 1E0 SET 4,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E1(cpu.CPU) noexcept nogil # 1E1 SET 4,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E2(cpu.CPU) noexcept nogil # 1E2 SET 4,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E3(cpu.CPU) noexcept nogil # 1E3 SET 4,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E4(cpu.CPU) noexcept nogil # 1E4 SET 4,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E5(cpu.CPU) noexcept nogil # 1E5 SET 4,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E6(cpu.CPU) noexcept nogil # 1E6 SET 4,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E7(cpu.CPU) noexcept nogil # 1E7 SET 4,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E8(cpu.CPU) noexcept nogil # 1E8 SET 5,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1E9(cpu.CPU) noexcept nogil # 1E9 SET 5,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1EA(cpu.CPU) noexcept nogil # 1EA SET 5,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1EB(cpu.CPU) noexcept nogil # 1EB SET 5,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1EC(cpu.CPU) noexcept nogil # 1EC SET 5,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1ED(cpu.CPU) noexcept nogil # 1ED SET 5,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1EE(cpu.CPU) noexcept nogil # 1EE SET 5,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1EF(cpu.CPU) noexcept nogil # 1EF SET 5,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F0(cpu.CPU) noexcept nogil # 1F0 SET 6,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F1(cpu.CPU) noexcept nogil # 1F1 SET 6,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F2(cpu.CPU) noexcept nogil # 1F2 SET 6,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F3(cpu.CPU) noexcept nogil # 1F3 SET 6,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F4(cpu.CPU) noexcept nogil # 1F4 SET 6,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F5(cpu.CPU) noexcept nogil # 1F5 SET 6,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F6(cpu.CPU) noexcept nogil # 1F6 SET 6,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F7(cpu.CPU) noexcept nogil # 1F7 SET 6,A -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F8(cpu.CPU) noexcept nogil # 1F8 SET 7,B -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1F9(cpu.CPU) noexcept nogil # 1F9 SET 7,C -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FA(cpu.CPU) noexcept nogil # 1FA SET 7,D -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FB(cpu.CPU) noexcept nogil # 1FB SET 7,E -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FC(cpu.CPU) noexcept nogil # 1FC SET 7,H -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FD(cpu.CPU) noexcept nogil # 1FD SET 7,L -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FE(cpu.CPU) noexcept nogil # 1FE SET 7,(HL) -@cython.locals(v=int, flag=uint8_t, t=int) +@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t) cdef uint8_t SET_1FF(cpu.CPU) noexcept nogil # 1FF SET 7,A diff --git a/pyboy/core/opcodes.py b/pyboy/core/opcodes.py index dc1475412..83a393862 100644 --- a/pyboy/core/opcodes.py +++ b/pyboy/core/opcodes.py @@ -39,7 +39,9 @@ def LD_02(cpu): # 02 LD (BC),A def INC_03(cpu): # 03 INC BC - t = ((cpu.B << 8) + cpu.C) + 1 + a = ((cpu.B << 8) + cpu.C) + b = 1 + t = a + b # No flag operations t &= 0xFFFF cpu.B = t >> 8 @@ -50,10 +52,12 @@ def INC_03(cpu): # 03 INC BC def INC_04(cpu): # 04 INC B - t = cpu.B + 1 + a = cpu.B + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.B & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -64,10 +68,12 @@ def INC_04(cpu): # 04 INC B def DEC_05(cpu): # 05 DEC B - t = cpu.B - 1 + a = cpu.B + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.B & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -85,9 +91,10 @@ def LD_06(cpu, v): # 06 LD B,d8 def RLCA_07(cpu): # 07 RLCA - t = (cpu.A << 1) + (cpu.A >> 7) + a = cpu.A + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += (t > 0xFF) << FLAGC + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -106,10 +113,12 @@ def LD_08(cpu, v): # 08 LD (a16),SP def ADD_09(cpu): # 09 ADD HL,BC - t = cpu.HL + ((cpu.B << 8) + cpu.C) + a = cpu.HL + b = ((cpu.B << 8) + cpu.C) + t = a + b flag = 0b00000000 - flag += (((cpu.HL & 0xFFF) + (((cpu.B << 8) + cpu.C) & 0xFFF)) > 0xFFF) << FLAGH - flag += (t > 0xFFFF) << FLAGC + flag |= (((a & 0xFFF) + (b & 0xFFF)) > 0xFFF) << FLAGH + flag |= (t > 0xFFFF) << FLAGC cpu.F &= 0b10000000 cpu.F |= flag t &= 0xFFFF @@ -127,7 +136,9 @@ def LD_0A(cpu): # 0A LD A,(BC) def DEC_0B(cpu): # 0B DEC BC - t = ((cpu.B << 8) + cpu.C) - 1 + a = ((cpu.B << 8) + cpu.C) + b = 1 + t = a - b # No flag operations t &= 0xFFFF cpu.B = t >> 8 @@ -138,10 +149,12 @@ def DEC_0B(cpu): # 0B DEC BC def INC_0C(cpu): # 0C INC C - t = cpu.C + 1 + a = cpu.C + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.C & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -152,10 +165,12 @@ def INC_0C(cpu): # 0C INC C def DEC_0D(cpu): # 0D DEC C - t = cpu.C - 1 + a = cpu.C + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.C & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -173,9 +188,10 @@ def LD_0E(cpu, v): # 0E LD C,d8 def RRCA_0F(cpu): # 0F RRCA - t = (cpu.A >> 1) + ((cpu.A & 1) << 7) + ((cpu.A & 1) << 8) + a = cpu.A + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += (t > 0xFF) << FLAGC + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -210,7 +226,9 @@ def LD_12(cpu): # 12 LD (DE),A def INC_13(cpu): # 13 INC DE - t = ((cpu.D << 8) + cpu.E) + 1 + a = ((cpu.D << 8) + cpu.E) + b = 1 + t = a + b # No flag operations t &= 0xFFFF cpu.D = t >> 8 @@ -221,10 +239,12 @@ def INC_13(cpu): # 13 INC DE def INC_14(cpu): # 14 INC D - t = cpu.D + 1 + a = cpu.D + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.D & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -235,10 +255,12 @@ def INC_14(cpu): # 14 INC D def DEC_15(cpu): # 15 DEC D - t = cpu.D - 1 + a = cpu.D + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.D & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -256,9 +278,10 @@ def LD_16(cpu, v): # 16 LD D,d8 def RLA_17(cpu): # 17 RLA - t = (cpu.A << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += (t > 0xFF) << FLAGC + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -275,10 +298,12 @@ def JR_18(cpu, v): # 18 JR r8 def ADD_19(cpu): # 19 ADD HL,DE - t = cpu.HL + ((cpu.D << 8) + cpu.E) + a = cpu.HL + b = ((cpu.D << 8) + cpu.E) + t = a + b flag = 0b00000000 - flag += (((cpu.HL & 0xFFF) + (((cpu.D << 8) + cpu.E) & 0xFFF)) > 0xFFF) << FLAGH - flag += (t > 0xFFFF) << FLAGC + flag |= (((a & 0xFFF) + (b & 0xFFF)) > 0xFFF) << FLAGH + flag |= (t > 0xFFFF) << FLAGC cpu.F &= 0b10000000 cpu.F |= flag t &= 0xFFFF @@ -296,7 +321,9 @@ def LD_1A(cpu): # 1A LD A,(DE) def DEC_1B(cpu): # 1B DEC DE - t = ((cpu.D << 8) + cpu.E) - 1 + a = ((cpu.D << 8) + cpu.E) + b = 1 + t = a - b # No flag operations t &= 0xFFFF cpu.D = t >> 8 @@ -307,10 +334,12 @@ def DEC_1B(cpu): # 1B DEC DE def INC_1C(cpu): # 1C INC E - t = cpu.E + 1 + a = cpu.E + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.E & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -321,10 +350,12 @@ def INC_1C(cpu): # 1C INC E def DEC_1D(cpu): # 1D DEC E - t = cpu.E - 1 + a = cpu.E + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.E & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -342,9 +373,10 @@ def LD_1E(cpu, v): # 1E LD E,d8 def RRA_1F(cpu): # 1F RRA - t = (cpu.A >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.A & 1) << 8) + a = cpu.A + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += (t > 0xFF) << FLAGC + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -382,7 +414,9 @@ def LD_22(cpu): # 22 LD (HL+),A def INC_23(cpu): # 23 INC HL - t = cpu.HL + 1 + a = cpu.HL + b = 1 + t = a + b # No flag operations t &= 0xFFFF cpu.HL = t @@ -392,10 +426,12 @@ def INC_23(cpu): # 23 INC HL def INC_24(cpu): # 24 INC H - t = (cpu.HL >> 8) + 1 + a = (cpu.HL >> 8) + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += ((((cpu.HL >> 8) & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -406,10 +442,12 @@ def INC_24(cpu): # 24 INC H def DEC_25(cpu): # 25 DEC H - t = (cpu.HL >> 8) - 1 + a = (cpu.HL >> 8) + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += ((((cpu.HL >> 8) & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -438,8 +476,8 @@ def DAA_27(cpu): # 27 DAA corr |= 0x60 if t > 0x99 else 0x00 t += corr flag = 0 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (corr & 0x60 != 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (corr & 0x60 != 0) << FLAGC cpu.F &= 0b01000000 cpu.F |= flag t &= 0xFF @@ -461,10 +499,12 @@ def JR_28(cpu, v): # 28 JR Z,r8 def ADD_29(cpu): # 29 ADD HL,HL - t = cpu.HL + cpu.HL + a = cpu.HL + b = cpu.HL + t = a + b flag = 0b00000000 - flag += (((cpu.HL & 0xFFF) + (cpu.HL & 0xFFF)) > 0xFFF) << FLAGH - flag += (t > 0xFFFF) << FLAGC + flag |= (((a & 0xFFF) + (b & 0xFFF)) > 0xFFF) << FLAGH + flag |= (t > 0xFFFF) << FLAGC cpu.F &= 0b10000000 cpu.F |= flag t &= 0xFFFF @@ -484,7 +524,9 @@ def LD_2A(cpu): # 2A LD A,(HL+) def DEC_2B(cpu): # 2B DEC HL - t = cpu.HL - 1 + a = cpu.HL + b = 1 + t = a - b # No flag operations t &= 0xFFFF cpu.HL = t @@ -494,10 +536,12 @@ def DEC_2B(cpu): # 2B DEC HL def INC_2C(cpu): # 2C INC L - t = (cpu.HL & 0xFF) + 1 + a = (cpu.HL & 0xFF) + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += ((((cpu.HL & 0xFF) & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -508,10 +552,12 @@ def INC_2C(cpu): # 2C INC L def DEC_2D(cpu): # 2D DEC L - t = (cpu.HL & 0xFF) - 1 + a = (cpu.HL & 0xFF) + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += ((((cpu.HL & 0xFF) & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -566,7 +612,9 @@ def LD_32(cpu): # 32 LD (HL-),A def INC_33(cpu): # 33 INC SP - t = cpu.SP + 1 + a = cpu.SP + b = 1 + t = a + b # No flag operations t &= 0xFFFF cpu.SP = t @@ -576,10 +624,12 @@ def INC_33(cpu): # 33 INC SP def INC_34(cpu): # 34 INC (HL) - t = cpu.mb.getitem(cpu.HL) + 1 + a = cpu.mb.getitem(cpu.HL) + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.mb.getitem(cpu.HL) & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -591,10 +641,12 @@ def INC_34(cpu): # 34 INC (HL) def DEC_35(cpu): # 35 DEC (HL) - t = cpu.mb.getitem(cpu.HL) - 1 + a = cpu.mb.getitem(cpu.HL) + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.mb.getitem(cpu.HL) & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -634,10 +686,12 @@ def JR_38(cpu, v): # 38 JR C,r8 def ADD_39(cpu): # 39 ADD HL,SP - t = cpu.HL + cpu.SP + a = cpu.HL + b = cpu.SP + t = a + b flag = 0b00000000 - flag += (((cpu.HL & 0xFFF) + (cpu.SP & 0xFFF)) > 0xFFF) << FLAGH - flag += (t > 0xFFFF) << FLAGC + flag |= (((a & 0xFFF) + (b & 0xFFF)) > 0xFFF) << FLAGH + flag |= (t > 0xFFFF) << FLAGC cpu.F &= 0b10000000 cpu.F |= flag t &= 0xFFFF @@ -657,7 +711,9 @@ def LD_3A(cpu): # 3A LD A,(HL-) def DEC_3B(cpu): # 3B DEC SP - t = cpu.SP - 1 + a = cpu.SP + b = 1 + t = a - b # No flag operations t &= 0xFFFF cpu.SP = t @@ -667,10 +723,12 @@ def DEC_3B(cpu): # 3B DEC SP def INC_3C(cpu): # 3C INC A - t = cpu.A + 1 + a = cpu.A + b = 1 + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (1 & 0xF)) > 0xF) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -681,10 +739,12 @@ def INC_3C(cpu): # 3C INC A def DEC_3D(cpu): # 3D DEC A - t = cpu.A - 1 + a = cpu.A + b = 1 + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (1 & 0xF)) < 0) << FLAGH + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH cpu.F &= 0b00010000 cpu.F |= flag t &= 0xFF @@ -1158,11 +1218,13 @@ def LD_7F(cpu): # 7F LD A,A def ADD_80(cpu): # 80 ADD A,B - t = cpu.A + cpu.B + a = cpu.A + b = cpu.B + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.B & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1173,11 +1235,13 @@ def ADD_80(cpu): # 80 ADD A,B def ADD_81(cpu): # 81 ADD A,C - t = cpu.A + cpu.C + a = cpu.A + b = cpu.C + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.C & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1188,11 +1252,13 @@ def ADD_81(cpu): # 81 ADD A,C def ADD_82(cpu): # 82 ADD A,D - t = cpu.A + cpu.D + a = cpu.A + b = cpu.D + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.D & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1203,11 +1269,13 @@ def ADD_82(cpu): # 82 ADD A,D def ADD_83(cpu): # 83 ADD A,E - t = cpu.A + cpu.E + a = cpu.A + b = cpu.E + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.E & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1218,11 +1286,13 @@ def ADD_83(cpu): # 83 ADD A,E def ADD_84(cpu): # 84 ADD A,H - t = cpu.A + (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + ((cpu.HL >> 8) & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1233,11 +1303,13 @@ def ADD_84(cpu): # 84 ADD A,H def ADD_85(cpu): # 85 ADD A,L - t = cpu.A + (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + ((cpu.HL & 0xFF) & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1248,11 +1320,13 @@ def ADD_85(cpu): # 85 ADD A,L def ADD_86(cpu): # 86 ADD A,(HL) - t = cpu.A + cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.mb.getitem(cpu.HL) & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1263,11 +1337,13 @@ def ADD_86(cpu): # 86 ADD A,(HL) def ADD_87(cpu): # 87 ADD A,A - t = cpu.A + cpu.A + a = cpu.A + b = cpu.A + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.A & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1278,11 +1354,14 @@ def ADD_87(cpu): # 87 ADD A,A def ADC_88(cpu): # 88 ADC A,B - t = cpu.A + cpu.B + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.B + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.B & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1293,11 +1372,14 @@ def ADC_88(cpu): # 88 ADC A,B def ADC_89(cpu): # 89 ADC A,C - t = cpu.A + cpu.C + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.C + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.C & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1308,11 +1390,14 @@ def ADC_89(cpu): # 89 ADC A,C def ADC_8A(cpu): # 8A ADC A,D - t = cpu.A + cpu.D + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.D + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.D & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1323,11 +1408,14 @@ def ADC_8A(cpu): # 8A ADC A,D def ADC_8B(cpu): # 8B ADC A,E - t = cpu.A + cpu.E + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.E + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.E & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1338,11 +1426,14 @@ def ADC_8B(cpu): # 8B ADC A,E def ADC_8C(cpu): # 8C ADC A,H - t = cpu.A + (cpu.HL >> 8) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = (cpu.HL >> 8) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + ((cpu.HL >> 8) & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1353,11 +1444,14 @@ def ADC_8C(cpu): # 8C ADC A,H def ADC_8D(cpu): # 8D ADC A,L - t = cpu.A + (cpu.HL & 0xFF) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = (cpu.HL & 0xFF) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + ((cpu.HL & 0xFF) & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1368,11 +1462,14 @@ def ADC_8D(cpu): # 8D ADC A,L def ADC_8E(cpu): # 8E ADC A,(HL) - t = cpu.A + cpu.mb.getitem(cpu.HL) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.mb.getitem(cpu.HL) & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1383,11 +1480,14 @@ def ADC_8E(cpu): # 8E ADC A,(HL) def ADC_8F(cpu): # 8F ADC A,A - t = cpu.A + cpu.A + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.A + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (cpu.A & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1398,11 +1498,13 @@ def ADC_8F(cpu): # 8F ADC A,A def SUB_90(cpu): # 90 SUB B - t = cpu.A - cpu.B + a = cpu.A + b = cpu.B + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.B & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1413,11 +1515,13 @@ def SUB_90(cpu): # 90 SUB B def SUB_91(cpu): # 91 SUB C - t = cpu.A - cpu.C + a = cpu.A + b = cpu.C + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.C & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1428,11 +1532,13 @@ def SUB_91(cpu): # 91 SUB C def SUB_92(cpu): # 92 SUB D - t = cpu.A - cpu.D + a = cpu.A + b = cpu.D + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.D & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1443,11 +1549,13 @@ def SUB_92(cpu): # 92 SUB D def SUB_93(cpu): # 93 SUB E - t = cpu.A - cpu.E + a = cpu.A + b = cpu.E + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.E & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1458,11 +1566,13 @@ def SUB_93(cpu): # 93 SUB E def SUB_94(cpu): # 94 SUB H - t = cpu.A - (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL >> 8) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1473,11 +1583,13 @@ def SUB_94(cpu): # 94 SUB H def SUB_95(cpu): # 95 SUB L - t = cpu.A - (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL & 0xFF) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1488,11 +1600,13 @@ def SUB_95(cpu): # 95 SUB L def SUB_96(cpu): # 96 SUB (HL) - t = cpu.A - cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.mb.getitem(cpu.HL) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1503,11 +1617,13 @@ def SUB_96(cpu): # 96 SUB (HL) def SUB_97(cpu): # 97 SUB A - t = cpu.A - cpu.A + a = cpu.A + b = cpu.A + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.A & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1518,11 +1634,14 @@ def SUB_97(cpu): # 97 SUB A def SBC_98(cpu): # 98 SBC A,B - t = cpu.A - cpu.B - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.B + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.B & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1533,11 +1652,14 @@ def SBC_98(cpu): # 98 SBC A,B def SBC_99(cpu): # 99 SBC A,C - t = cpu.A - cpu.C - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.C + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.C & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1548,11 +1670,14 @@ def SBC_99(cpu): # 99 SBC A,C def SBC_9A(cpu): # 9A SBC A,D - t = cpu.A - cpu.D - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.D + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.D & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1563,11 +1688,14 @@ def SBC_9A(cpu): # 9A SBC A,D def SBC_9B(cpu): # 9B SBC A,E - t = cpu.A - cpu.E - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.E + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.E & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1578,11 +1706,14 @@ def SBC_9B(cpu): # 9B SBC A,E def SBC_9C(cpu): # 9C SBC A,H - t = cpu.A - (cpu.HL >> 8) - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = (cpu.HL >> 8) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL >> 8) & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1593,11 +1724,14 @@ def SBC_9C(cpu): # 9C SBC A,H def SBC_9D(cpu): # 9D SBC A,L - t = cpu.A - (cpu.HL & 0xFF) - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = (cpu.HL & 0xFF) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL & 0xFF) & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1608,11 +1742,14 @@ def SBC_9D(cpu): # 9D SBC A,L def SBC_9E(cpu): # 9E SBC A,(HL) - t = cpu.A - cpu.mb.getitem(cpu.HL) - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.mb.getitem(cpu.HL) & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1623,11 +1760,14 @@ def SBC_9E(cpu): # 9E SBC A,(HL) def SBC_9F(cpu): # 9F SBC A,A - t = cpu.A - cpu.A - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = cpu.A + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.A & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1638,9 +1778,11 @@ def SBC_9F(cpu): # 9F SBC A,A def AND_A0(cpu): # A0 AND B - t = cpu.A & cpu.B + a = cpu.A + b = cpu.B + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1651,9 +1793,11 @@ def AND_A0(cpu): # A0 AND B def AND_A1(cpu): # A1 AND C - t = cpu.A & cpu.C + a = cpu.A + b = cpu.C + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1664,9 +1808,11 @@ def AND_A1(cpu): # A1 AND C def AND_A2(cpu): # A2 AND D - t = cpu.A & cpu.D + a = cpu.A + b = cpu.D + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1677,9 +1823,11 @@ def AND_A2(cpu): # A2 AND D def AND_A3(cpu): # A3 AND E - t = cpu.A & cpu.E + a = cpu.A + b = cpu.E + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1690,9 +1838,11 @@ def AND_A3(cpu): # A3 AND E def AND_A4(cpu): # A4 AND H - t = cpu.A & (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1703,9 +1853,11 @@ def AND_A4(cpu): # A4 AND H def AND_A5(cpu): # A5 AND L - t = cpu.A & (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1716,9 +1868,11 @@ def AND_A5(cpu): # A5 AND L def AND_A6(cpu): # A6 AND (HL) - t = cpu.A & cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1729,9 +1883,11 @@ def AND_A6(cpu): # A6 AND (HL) def AND_A7(cpu): # A7 AND A - t = cpu.A & cpu.A + a = cpu.A + b = cpu.A + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1742,9 +1898,11 @@ def AND_A7(cpu): # A7 AND A def XOR_A8(cpu): # A8 XOR B - t = cpu.A ^ cpu.B + a = cpu.A + b = cpu.B + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1755,9 +1913,11 @@ def XOR_A8(cpu): # A8 XOR B def XOR_A9(cpu): # A9 XOR C - t = cpu.A ^ cpu.C + a = cpu.A + b = cpu.C + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1768,9 +1928,11 @@ def XOR_A9(cpu): # A9 XOR C def XOR_AA(cpu): # AA XOR D - t = cpu.A ^ cpu.D + a = cpu.A + b = cpu.D + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1781,9 +1943,11 @@ def XOR_AA(cpu): # AA XOR D def XOR_AB(cpu): # AB XOR E - t = cpu.A ^ cpu.E + a = cpu.A + b = cpu.E + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1794,9 +1958,11 @@ def XOR_AB(cpu): # AB XOR E def XOR_AC(cpu): # AC XOR H - t = cpu.A ^ (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1807,9 +1973,11 @@ def XOR_AC(cpu): # AC XOR H def XOR_AD(cpu): # AD XOR L - t = cpu.A ^ (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1820,9 +1988,11 @@ def XOR_AD(cpu): # AD XOR L def XOR_AE(cpu): # AE XOR (HL) - t = cpu.A ^ cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1833,9 +2003,11 @@ def XOR_AE(cpu): # AE XOR (HL) def XOR_AF(cpu): # AF XOR A - t = cpu.A ^ cpu.A + a = cpu.A + b = cpu.A + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1846,9 +2018,11 @@ def XOR_AF(cpu): # AF XOR A def OR_B0(cpu): # B0 OR B - t = cpu.A | cpu.B + a = cpu.A + b = cpu.B + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1859,9 +2033,11 @@ def OR_B0(cpu): # B0 OR B def OR_B1(cpu): # B1 OR C - t = cpu.A | cpu.C + a = cpu.A + b = cpu.C + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1872,9 +2048,11 @@ def OR_B1(cpu): # B1 OR C def OR_B2(cpu): # B2 OR D - t = cpu.A | cpu.D + a = cpu.A + b = cpu.D + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1885,9 +2063,11 @@ def OR_B2(cpu): # B2 OR D def OR_B3(cpu): # B3 OR E - t = cpu.A | cpu.E + a = cpu.A + b = cpu.E + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1898,9 +2078,11 @@ def OR_B3(cpu): # B3 OR E def OR_B4(cpu): # B4 OR H - t = cpu.A | (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1911,9 +2093,11 @@ def OR_B4(cpu): # B4 OR H def OR_B5(cpu): # B5 OR L - t = cpu.A | (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1924,9 +2108,11 @@ def OR_B5(cpu): # B5 OR L def OR_B6(cpu): # B6 OR (HL) - t = cpu.A | cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1937,9 +2123,11 @@ def OR_B6(cpu): # B6 OR (HL) def OR_B7(cpu): # B7 OR A - t = cpu.A | cpu.A + a = cpu.A + b = cpu.A + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1950,11 +2138,13 @@ def OR_B7(cpu): # B7 OR A def CP_B8(cpu): # B8 CP B - t = cpu.A - cpu.B + a = cpu.A + b = cpu.B + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.B & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1964,11 +2154,13 @@ def CP_B8(cpu): # B8 CP B def CP_B9(cpu): # B9 CP C - t = cpu.A - cpu.C + a = cpu.A + b = cpu.C + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.C & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1978,11 +2170,13 @@ def CP_B9(cpu): # B9 CP C def CP_BA(cpu): # BA CP D - t = cpu.A - cpu.D + a = cpu.A + b = cpu.D + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.D & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -1992,11 +2186,13 @@ def CP_BA(cpu): # BA CP D def CP_BB(cpu): # BB CP E - t = cpu.A - cpu.E + a = cpu.A + b = cpu.E + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.E & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2006,11 +2202,13 @@ def CP_BB(cpu): # BB CP E def CP_BC(cpu): # BC CP H - t = cpu.A - (cpu.HL >> 8) + a = cpu.A + b = (cpu.HL >> 8) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL >> 8) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2020,11 +2218,13 @@ def CP_BC(cpu): # BC CP H def CP_BD(cpu): # BD CP L - t = cpu.A - (cpu.HL & 0xFF) + a = cpu.A + b = (cpu.HL & 0xFF) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - ((cpu.HL & 0xFF) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2034,11 +2234,13 @@ def CP_BD(cpu): # BD CP L def CP_BE(cpu): # BE CP (HL) - t = cpu.A - cpu.mb.getitem(cpu.HL) + a = cpu.A + b = cpu.mb.getitem(cpu.HL) + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.mb.getitem(cpu.HL) & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2048,11 +2250,13 @@ def CP_BE(cpu): # BE CP (HL) def CP_BF(cpu): # BF CP A - t = cpu.A - cpu.A + a = cpu.A + b = cpu.A + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (cpu.A & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2124,11 +2328,13 @@ def PUSH_C5(cpu): # C5 PUSH BC def ADD_C6(cpu, v): # C6 ADD A,d8 - t = cpu.A + v + a = cpu.A + b = v + t = a + b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (v & 0xF)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2213,11 +2419,14 @@ def CALL_CD(cpu, v): # CD CALL a16 def ADC_CE(cpu, v): # CE ADC A,d8 - t = cpu.A + v + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = v + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a + b + c flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) + (v & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) + (b & 0xF) + ((cpu.F & (1 << FLAGC)) != 0)) > 0xF) << FLAGH + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2296,11 +2505,13 @@ def PUSH_D5(cpu): # D5 PUSH DE def SUB_D6(cpu, v): # D6 SUB d8 - t = cpu.A - v + a = cpu.A + b = v + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (v & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2369,11 +2580,14 @@ def CALL_DC(cpu, v): # DC CALL C,a16 def SBC_DE(cpu, v): # DE SBC A,d8 - t = cpu.A - v - ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + b = v + c = ((cpu.F & (1 << FLAGC)) != 0) + t = a - b - c flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (v & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF) - ((cpu.F & (1 << FLAGC)) != 0)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2396,7 +2610,7 @@ def RST_DF(cpu): # DF RST 18H def LDH_E0(cpu, v): # E0 LDH (a8),A cpu.cycles += 4 - cpu.mb.setitem(v + 0xFF00, cpu.A) + cpu.mb.setitem_io_ports(v | 0xFF00, cpu.A) cpu.PC += 2 cpu.PC &= 0xFFFF cpu.cycles += 8 @@ -2412,7 +2626,7 @@ def POP_E1(cpu): # E1 POP HL def LD_E2(cpu): # E2 LD (C),A - cpu.mb.setitem(0xFF00 + cpu.C, cpu.A) + cpu.mb.setitem_io_ports(0xFF00 | cpu.C, cpu.A) cpu.PC += 1 cpu.PC &= 0xFFFF cpu.cycles += 8 @@ -2429,9 +2643,11 @@ def PUSH_E5(cpu): # E5 PUSH HL def AND_E6(cpu, v): # E6 AND d8 - t = cpu.A & v + a = cpu.A + b = v + t = a & b flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2453,11 +2669,13 @@ def RST_E7(cpu): # E7 RST 20H def ADD_E8(cpu, v): # E8 ADD SP,r8 - t = cpu.SP + ((v ^ 0x80) - 0x80) + a = cpu.SP + b = ((v ^ 0x80) - 0x80) + t = a + b flag = 0b00000000 - flag += (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH - flag += (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC - cpu.F &= 0b00000000 + flag |= (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH + flag |= (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC + cpu.F = 0b00000000 cpu.F |= flag t &= 0xFFFF cpu.SP = t @@ -2480,9 +2698,11 @@ def LD_EA(cpu, v): # EA LD (a16),A def XOR_EE(cpu, v): # EE XOR d8 - t = cpu.A ^ v + a = cpu.A + b = v + t = a ^ b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2505,7 +2725,7 @@ def RST_EF(cpu): # EF RST 28H def LDH_F0(cpu, v): # F0 LDH A,(a8) cpu.cycles += 4 - cpu.A = cpu.mb.getitem(v + 0xFF00) + cpu.A = cpu.mb.getitem_io_ports(v | 0xFF00) cpu.PC += 2 cpu.PC &= 0xFFFF cpu.cycles += 8 @@ -2522,7 +2742,7 @@ def POP_F1(cpu): # F1 POP AF def LD_F2(cpu): # F2 LD A,(C) - cpu.A = cpu.mb.getitem(0xFF00 + cpu.C) + cpu.A = cpu.mb.getitem_io_ports(0xFF00 | cpu.C) cpu.PC += 1 cpu.PC &= 0xFFFF cpu.cycles += 8 @@ -2546,9 +2766,11 @@ def PUSH_F5(cpu): # F5 PUSH AF def OR_F6(cpu, v): # F6 OR d8 - t = cpu.A | v + a = cpu.A + b = v + t = a | b flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2573,9 +2795,9 @@ def LD_F8(cpu, v): # F8 LD HL,SP+r8 cpu.HL = cpu.SP + ((v ^ 0x80) - 0x80) t = cpu.HL flag = 0b00000000 - flag += (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH - flag += (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC - cpu.F &= 0b00000000 + flag |= (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH + flag |= (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC + cpu.F = 0b00000000 cpu.F |= flag cpu.HL &= 0xFFFF cpu.PC += 2 @@ -2607,11 +2829,13 @@ def EI_FB(cpu): # FB EI def CP_FE(cpu, v): # FE CP d8 - t = cpu.A - v + a = cpu.A + b = v + t = a - b flag = 0b01000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (((cpu.A & 0xF) - (v & 0xF)) < 0) << FLAGH - flag += (t < 0) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (((a & 0xF) - (b & 0xF)) < 0) << FLAGH + flag |= (t < 0) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2632,10 +2856,11 @@ def RST_FF(cpu): # FF RST 38H def RLC_100(cpu): # 100 RLC B - t = (cpu.B << 1) + (cpu.B >> 7) + a = cpu.B + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2646,10 +2871,11 @@ def RLC_100(cpu): # 100 RLC B def RLC_101(cpu): # 101 RLC C - t = (cpu.C << 1) + (cpu.C >> 7) + a = cpu.C + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2660,10 +2886,11 @@ def RLC_101(cpu): # 101 RLC C def RLC_102(cpu): # 102 RLC D - t = (cpu.D << 1) + (cpu.D >> 7) + a = cpu.D + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2674,10 +2901,11 @@ def RLC_102(cpu): # 102 RLC D def RLC_103(cpu): # 103 RLC E - t = (cpu.E << 1) + (cpu.E >> 7) + a = cpu.E + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2688,10 +2916,11 @@ def RLC_103(cpu): # 103 RLC E def RLC_104(cpu): # 104 RLC H - t = ((cpu.HL >> 8) << 1) + ((cpu.HL >> 8) >> 7) + a = (cpu.HL >> 8) + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2702,10 +2931,11 @@ def RLC_104(cpu): # 104 RLC H def RLC_105(cpu): # 105 RLC L - t = ((cpu.HL & 0xFF) << 1) + ((cpu.HL & 0xFF) >> 7) + a = (cpu.HL & 0xFF) + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2717,10 +2947,11 @@ def RLC_105(cpu): # 105 RLC L def RLC_106(cpu): # 106 RLC (HL) cpu.cycles += 4 - t = (cpu.mb.getitem(cpu.HL) << 1) + (cpu.mb.getitem(cpu.HL) >> 7) + a = cpu.mb.getitem(cpu.HL) + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2732,10 +2963,11 @@ def RLC_106(cpu): # 106 RLC (HL) def RLC_107(cpu): # 107 RLC A - t = (cpu.A << 1) + (cpu.A >> 7) + a = cpu.A + t = (a << 1) | (a >> 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2746,10 +2978,11 @@ def RLC_107(cpu): # 107 RLC A def RRC_108(cpu): # 108 RRC B - t = (cpu.B >> 1) + ((cpu.B & 1) << 7) + ((cpu.B & 1) << 8) + a = cpu.B + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2760,10 +2993,11 @@ def RRC_108(cpu): # 108 RRC B def RRC_109(cpu): # 109 RRC C - t = (cpu.C >> 1) + ((cpu.C & 1) << 7) + ((cpu.C & 1) << 8) + a = cpu.C + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2774,10 +3008,11 @@ def RRC_109(cpu): # 109 RRC C def RRC_10A(cpu): # 10A RRC D - t = (cpu.D >> 1) + ((cpu.D & 1) << 7) + ((cpu.D & 1) << 8) + a = cpu.D + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2788,10 +3023,11 @@ def RRC_10A(cpu): # 10A RRC D def RRC_10B(cpu): # 10B RRC E - t = (cpu.E >> 1) + ((cpu.E & 1) << 7) + ((cpu.E & 1) << 8) + a = cpu.E + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2802,10 +3038,11 @@ def RRC_10B(cpu): # 10B RRC E def RRC_10C(cpu): # 10C RRC H - t = ((cpu.HL >> 8) >> 1) + (((cpu.HL >> 8) & 1) << 7) + (((cpu.HL >> 8) & 1) << 8) + a = (cpu.HL >> 8) + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2816,10 +3053,11 @@ def RRC_10C(cpu): # 10C RRC H def RRC_10D(cpu): # 10D RRC L - t = ((cpu.HL & 0xFF) >> 1) + (((cpu.HL & 0xFF) & 1) << 7) + (((cpu.HL & 0xFF) & 1) << 8) + a = (cpu.HL & 0xFF) + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2831,10 +3069,11 @@ def RRC_10D(cpu): # 10D RRC L def RRC_10E(cpu): # 10E RRC (HL) cpu.cycles += 4 - t = (cpu.mb.getitem(cpu.HL) >> 1) + ((cpu.mb.getitem(cpu.HL) & 1) << 7) + ((cpu.mb.getitem(cpu.HL) & 1) << 8) + a = cpu.mb.getitem(cpu.HL) + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2846,10 +3085,11 @@ def RRC_10E(cpu): # 10E RRC (HL) def RRC_10F(cpu): # 10F RRC A - t = (cpu.A >> 1) + ((cpu.A & 1) << 7) + ((cpu.A & 1) << 8) + a = cpu.A + t = (a >> 1) | ((a & 1) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2860,10 +3100,11 @@ def RRC_10F(cpu): # 10F RRC A def RL_110(cpu): # 110 RL B - t = (cpu.B << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.B + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2874,10 +3115,11 @@ def RL_110(cpu): # 110 RL B def RL_111(cpu): # 111 RL C - t = (cpu.C << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.C + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2888,10 +3130,11 @@ def RL_111(cpu): # 111 RL C def RL_112(cpu): # 112 RL D - t = (cpu.D << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.D + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2902,10 +3145,11 @@ def RL_112(cpu): # 112 RL D def RL_113(cpu): # 113 RL E - t = (cpu.E << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.E + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2916,10 +3160,11 @@ def RL_113(cpu): # 113 RL E def RL_114(cpu): # 114 RL H - t = ((cpu.HL >> 8) << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = (cpu.HL >> 8) + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2930,10 +3175,11 @@ def RL_114(cpu): # 114 RL H def RL_115(cpu): # 115 RL L - t = ((cpu.HL & 0xFF) << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = (cpu.HL & 0xFF) + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2945,10 +3191,11 @@ def RL_115(cpu): # 115 RL L def RL_116(cpu): # 116 RL (HL) cpu.cycles += 4 - t = (cpu.mb.getitem(cpu.HL) << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.mb.getitem(cpu.HL) + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2960,10 +3207,11 @@ def RL_116(cpu): # 116 RL (HL) def RL_117(cpu): # 117 RL A - t = (cpu.A << 1) + ((cpu.F & (1 << FLAGC)) != 0) + a = cpu.A + t = (a << 1) | ((cpu.F & (1 << FLAGC)) != 0) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2974,10 +3222,11 @@ def RL_117(cpu): # 117 RL A def RR_118(cpu): # 118 RR B - t = (cpu.B >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.B & 1) << 8) + a = cpu.B + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -2988,10 +3237,11 @@ def RR_118(cpu): # 118 RR B def RR_119(cpu): # 119 RR C - t = (cpu.C >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.C & 1) << 8) + a = cpu.C + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3002,10 +3252,11 @@ def RR_119(cpu): # 119 RR C def RR_11A(cpu): # 11A RR D - t = (cpu.D >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.D & 1) << 8) + a = cpu.D + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3016,10 +3267,11 @@ def RR_11A(cpu): # 11A RR D def RR_11B(cpu): # 11B RR E - t = (cpu.E >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.E & 1) << 8) + a = cpu.E + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3030,10 +3282,11 @@ def RR_11B(cpu): # 11B RR E def RR_11C(cpu): # 11C RR H - t = ((cpu.HL >> 8) >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + (((cpu.HL >> 8) & 1) << 8) + a = (cpu.HL >> 8) + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3044,10 +3297,11 @@ def RR_11C(cpu): # 11C RR H def RR_11D(cpu): # 11D RR L - t = ((cpu.HL & 0xFF) >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + (((cpu.HL & 0xFF) & 1) << 8) + a = (cpu.HL & 0xFF) + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3059,10 +3313,11 @@ def RR_11D(cpu): # 11D RR L def RR_11E(cpu): # 11E RR (HL) cpu.cycles += 4 - t = (cpu.mb.getitem(cpu.HL) >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.mb.getitem(cpu.HL) & 1) << 8) + a = cpu.mb.getitem(cpu.HL) + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3074,10 +3329,11 @@ def RR_11E(cpu): # 11E RR (HL) def RR_11F(cpu): # 11F RR A - t = (cpu.A >> 1) + (((cpu.F & (1 << FLAGC)) != 0) << 7) + ((cpu.A & 1) << 8) + a = cpu.A + t = (a >> 1) | (((cpu.F & (1 << FLAGC)) != 0) << 7) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (a & 1) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3090,8 +3346,8 @@ def RR_11F(cpu): # 11F RR A def SLA_120(cpu): # 120 SLA B t = (cpu.B << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3104,8 +3360,8 @@ def SLA_120(cpu): # 120 SLA B def SLA_121(cpu): # 121 SLA C t = (cpu.C << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3118,8 +3374,8 @@ def SLA_121(cpu): # 121 SLA C def SLA_122(cpu): # 122 SLA D t = (cpu.D << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3132,8 +3388,8 @@ def SLA_122(cpu): # 122 SLA D def SLA_123(cpu): # 123 SLA E t = (cpu.E << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3146,8 +3402,8 @@ def SLA_123(cpu): # 123 SLA E def SLA_124(cpu): # 124 SLA H t = ((cpu.HL >> 8) << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3160,8 +3416,8 @@ def SLA_124(cpu): # 124 SLA H def SLA_125(cpu): # 125 SLA L t = ((cpu.HL & 0xFF) << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3175,8 +3431,8 @@ def SLA_126(cpu): # 126 SLA (HL) cpu.cycles += 4 t = (cpu.mb.getitem(cpu.HL) << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3190,8 +3446,8 @@ def SLA_126(cpu): # 126 SLA (HL) def SLA_127(cpu): # 127 SLA A t = (cpu.A << 1) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3202,10 +3458,11 @@ def SLA_127(cpu): # 127 SLA A def SRA_128(cpu): # 128 SRA B - t = ((cpu.B >> 1) | (cpu.B & 0x80)) + ((cpu.B & 1) << 8) + a = cpu.B + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3216,10 +3473,11 @@ def SRA_128(cpu): # 128 SRA B def SRA_129(cpu): # 129 SRA C - t = ((cpu.C >> 1) | (cpu.C & 0x80)) + ((cpu.C & 1) << 8) + a = cpu.C + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3230,10 +3488,11 @@ def SRA_129(cpu): # 129 SRA C def SRA_12A(cpu): # 12A SRA D - t = ((cpu.D >> 1) | (cpu.D & 0x80)) + ((cpu.D & 1) << 8) + a = cpu.D + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3244,10 +3503,11 @@ def SRA_12A(cpu): # 12A SRA D def SRA_12B(cpu): # 12B SRA E - t = ((cpu.E >> 1) | (cpu.E & 0x80)) + ((cpu.E & 1) << 8) + a = cpu.E + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3258,10 +3518,11 @@ def SRA_12B(cpu): # 12B SRA E def SRA_12C(cpu): # 12C SRA H - t = (((cpu.HL >> 8) >> 1) | ((cpu.HL >> 8) & 0x80)) + (((cpu.HL >> 8) & 1) << 8) + a = (cpu.HL >> 8) + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3272,10 +3533,11 @@ def SRA_12C(cpu): # 12C SRA H def SRA_12D(cpu): # 12D SRA L - t = (((cpu.HL & 0xFF) >> 1) | ((cpu.HL & 0xFF) & 0x80)) + (((cpu.HL & 0xFF) & 1) << 8) + a = (cpu.HL & 0xFF) + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3287,10 +3549,11 @@ def SRA_12D(cpu): # 12D SRA L def SRA_12E(cpu): # 12E SRA (HL) cpu.cycles += 4 - t = ((cpu.mb.getitem(cpu.HL) >> 1) | (cpu.mb.getitem(cpu.HL) & 0x80)) + ((cpu.mb.getitem(cpu.HL) & 1) << 8) + a = cpu.mb.getitem(cpu.HL) + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3302,10 +3565,11 @@ def SRA_12E(cpu): # 12E SRA (HL) def SRA_12F(cpu): # 12F SRA A - t = ((cpu.A >> 1) | (cpu.A & 0x80)) + ((cpu.A & 1) << 8) + a = cpu.A + t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3316,9 +3580,10 @@ def SRA_12F(cpu): # 12F SRA A def SWAP_130(cpu): # 130 SWAP B - t = ((cpu.B & 0xF0) >> 4) | ((cpu.B & 0x0F) << 4) + a = cpu.B + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3329,9 +3594,10 @@ def SWAP_130(cpu): # 130 SWAP B def SWAP_131(cpu): # 131 SWAP C - t = ((cpu.C & 0xF0) >> 4) | ((cpu.C & 0x0F) << 4) + a = cpu.C + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3342,9 +3608,10 @@ def SWAP_131(cpu): # 131 SWAP C def SWAP_132(cpu): # 132 SWAP D - t = ((cpu.D & 0xF0) >> 4) | ((cpu.D & 0x0F) << 4) + a = cpu.D + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3355,9 +3622,10 @@ def SWAP_132(cpu): # 132 SWAP D def SWAP_133(cpu): # 133 SWAP E - t = ((cpu.E & 0xF0) >> 4) | ((cpu.E & 0x0F) << 4) + a = cpu.E + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3368,9 +3636,10 @@ def SWAP_133(cpu): # 133 SWAP E def SWAP_134(cpu): # 134 SWAP H - t = (((cpu.HL >> 8) & 0xF0) >> 4) | (((cpu.HL >> 8) & 0x0F) << 4) + a = (cpu.HL >> 8) + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3381,9 +3650,10 @@ def SWAP_134(cpu): # 134 SWAP H def SWAP_135(cpu): # 135 SWAP L - t = (((cpu.HL & 0xFF) & 0xF0) >> 4) | (((cpu.HL & 0xFF) & 0x0F) << 4) + a = (cpu.HL & 0xFF) + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3395,9 +3665,10 @@ def SWAP_135(cpu): # 135 SWAP L def SWAP_136(cpu): # 136 SWAP (HL) cpu.cycles += 4 - t = ((cpu.mb.getitem(cpu.HL) & 0xF0) >> 4) | ((cpu.mb.getitem(cpu.HL) & 0x0F) << 4) + a = cpu.mb.getitem(cpu.HL) + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3409,9 +3680,10 @@ def SWAP_136(cpu): # 136 SWAP (HL) def SWAP_137(cpu): # 137 SWAP A - t = ((cpu.A & 0xF0) >> 4) | ((cpu.A & 0x0F) << 4) + a = cpu.A + t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3422,10 +3694,11 @@ def SWAP_137(cpu): # 137 SWAP A def SRL_138(cpu): # 138 SRL B - t = (cpu.B >> 1) + ((cpu.B & 1) << 8) + a = cpu.B + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3436,10 +3709,11 @@ def SRL_138(cpu): # 138 SRL B def SRL_139(cpu): # 139 SRL C - t = (cpu.C >> 1) + ((cpu.C & 1) << 8) + a = cpu.C + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3450,10 +3724,11 @@ def SRL_139(cpu): # 139 SRL C def SRL_13A(cpu): # 13A SRL D - t = (cpu.D >> 1) + ((cpu.D & 1) << 8) + a = cpu.D + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3464,10 +3739,11 @@ def SRL_13A(cpu): # 13A SRL D def SRL_13B(cpu): # 13B SRL E - t = (cpu.E >> 1) + ((cpu.E & 1) << 8) + a = cpu.E + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3478,10 +3754,11 @@ def SRL_13B(cpu): # 13B SRL E def SRL_13C(cpu): # 13C SRL H - t = ((cpu.HL >> 8) >> 1) + (((cpu.HL >> 8) & 1) << 8) + a = (cpu.HL >> 8) + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3492,10 +3769,11 @@ def SRL_13C(cpu): # 13C SRL H def SRL_13D(cpu): # 13D SRL L - t = ((cpu.HL & 0xFF) >> 1) + (((cpu.HL & 0xFF) & 1) << 8) + a = (cpu.HL & 0xFF) + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3507,10 +3785,11 @@ def SRL_13D(cpu): # 13D SRL L def SRL_13E(cpu): # 13E SRL (HL) cpu.cycles += 4 - t = (cpu.mb.getitem(cpu.HL) >> 1) + ((cpu.mb.getitem(cpu.HL) & 1) << 8) + a = cpu.mb.getitem(cpu.HL) + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3522,10 +3801,11 @@ def SRL_13E(cpu): # 13E SRL (HL) def SRL_13F(cpu): # 13F SRL A - t = (cpu.A >> 1) + ((cpu.A & 1) << 8) + a = cpu.A + t = (a >> 1) + ((a & 1) << 8) flag = 0b00000000 - flag += ((t & 0xFF) == 0) << FLAGZ - flag += (t > 0xFF) << FLAGC + flag |= ((t & 0xFF) == 0) << FLAGZ + flag |= (t > 0xFF) << FLAGC cpu.F &= 0b00000000 cpu.F |= flag t &= 0xFF @@ -3538,7 +3818,7 @@ def SRL_13F(cpu): # 13F SRL A def BIT_140(cpu): # 140 BIT 0,B t = cpu.B & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3549,7 +3829,7 @@ def BIT_140(cpu): # 140 BIT 0,B def BIT_141(cpu): # 141 BIT 0,C t = cpu.C & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3560,7 +3840,7 @@ def BIT_141(cpu): # 141 BIT 0,C def BIT_142(cpu): # 142 BIT 0,D t = cpu.D & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3571,7 +3851,7 @@ def BIT_142(cpu): # 142 BIT 0,D def BIT_143(cpu): # 143 BIT 0,E t = cpu.E & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3582,7 +3862,7 @@ def BIT_143(cpu): # 143 BIT 0,E def BIT_144(cpu): # 144 BIT 0,H t = (cpu.HL >> 8) & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3593,7 +3873,7 @@ def BIT_144(cpu): # 144 BIT 0,H def BIT_145(cpu): # 145 BIT 0,L t = (cpu.HL & 0xFF) & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3605,7 +3885,7 @@ def BIT_146(cpu): # 146 BIT 0,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3616,7 +3896,7 @@ def BIT_146(cpu): # 146 BIT 0,(HL) def BIT_147(cpu): # 147 BIT 0,A t = cpu.A & (1 << 0) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3627,7 +3907,7 @@ def BIT_147(cpu): # 147 BIT 0,A def BIT_148(cpu): # 148 BIT 1,B t = cpu.B & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3638,7 +3918,7 @@ def BIT_148(cpu): # 148 BIT 1,B def BIT_149(cpu): # 149 BIT 1,C t = cpu.C & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3649,7 +3929,7 @@ def BIT_149(cpu): # 149 BIT 1,C def BIT_14A(cpu): # 14A BIT 1,D t = cpu.D & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3660,7 +3940,7 @@ def BIT_14A(cpu): # 14A BIT 1,D def BIT_14B(cpu): # 14B BIT 1,E t = cpu.E & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3671,7 +3951,7 @@ def BIT_14B(cpu): # 14B BIT 1,E def BIT_14C(cpu): # 14C BIT 1,H t = (cpu.HL >> 8) & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3682,7 +3962,7 @@ def BIT_14C(cpu): # 14C BIT 1,H def BIT_14D(cpu): # 14D BIT 1,L t = (cpu.HL & 0xFF) & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3694,7 +3974,7 @@ def BIT_14E(cpu): # 14E BIT 1,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3705,7 +3985,7 @@ def BIT_14E(cpu): # 14E BIT 1,(HL) def BIT_14F(cpu): # 14F BIT 1,A t = cpu.A & (1 << 1) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3716,7 +3996,7 @@ def BIT_14F(cpu): # 14F BIT 1,A def BIT_150(cpu): # 150 BIT 2,B t = cpu.B & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3727,7 +4007,7 @@ def BIT_150(cpu): # 150 BIT 2,B def BIT_151(cpu): # 151 BIT 2,C t = cpu.C & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3738,7 +4018,7 @@ def BIT_151(cpu): # 151 BIT 2,C def BIT_152(cpu): # 152 BIT 2,D t = cpu.D & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3749,7 +4029,7 @@ def BIT_152(cpu): # 152 BIT 2,D def BIT_153(cpu): # 153 BIT 2,E t = cpu.E & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3760,7 +4040,7 @@ def BIT_153(cpu): # 153 BIT 2,E def BIT_154(cpu): # 154 BIT 2,H t = (cpu.HL >> 8) & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3771,7 +4051,7 @@ def BIT_154(cpu): # 154 BIT 2,H def BIT_155(cpu): # 155 BIT 2,L t = (cpu.HL & 0xFF) & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3783,7 +4063,7 @@ def BIT_156(cpu): # 156 BIT 2,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3794,7 +4074,7 @@ def BIT_156(cpu): # 156 BIT 2,(HL) def BIT_157(cpu): # 157 BIT 2,A t = cpu.A & (1 << 2) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3805,7 +4085,7 @@ def BIT_157(cpu): # 157 BIT 2,A def BIT_158(cpu): # 158 BIT 3,B t = cpu.B & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3816,7 +4096,7 @@ def BIT_158(cpu): # 158 BIT 3,B def BIT_159(cpu): # 159 BIT 3,C t = cpu.C & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3827,7 +4107,7 @@ def BIT_159(cpu): # 159 BIT 3,C def BIT_15A(cpu): # 15A BIT 3,D t = cpu.D & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3838,7 +4118,7 @@ def BIT_15A(cpu): # 15A BIT 3,D def BIT_15B(cpu): # 15B BIT 3,E t = cpu.E & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3849,7 +4129,7 @@ def BIT_15B(cpu): # 15B BIT 3,E def BIT_15C(cpu): # 15C BIT 3,H t = (cpu.HL >> 8) & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3860,7 +4140,7 @@ def BIT_15C(cpu): # 15C BIT 3,H def BIT_15D(cpu): # 15D BIT 3,L t = (cpu.HL & 0xFF) & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3872,7 +4152,7 @@ def BIT_15E(cpu): # 15E BIT 3,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3883,7 +4163,7 @@ def BIT_15E(cpu): # 15E BIT 3,(HL) def BIT_15F(cpu): # 15F BIT 3,A t = cpu.A & (1 << 3) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3894,7 +4174,7 @@ def BIT_15F(cpu): # 15F BIT 3,A def BIT_160(cpu): # 160 BIT 4,B t = cpu.B & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3905,7 +4185,7 @@ def BIT_160(cpu): # 160 BIT 4,B def BIT_161(cpu): # 161 BIT 4,C t = cpu.C & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3916,7 +4196,7 @@ def BIT_161(cpu): # 161 BIT 4,C def BIT_162(cpu): # 162 BIT 4,D t = cpu.D & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3927,7 +4207,7 @@ def BIT_162(cpu): # 162 BIT 4,D def BIT_163(cpu): # 163 BIT 4,E t = cpu.E & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3938,7 +4218,7 @@ def BIT_163(cpu): # 163 BIT 4,E def BIT_164(cpu): # 164 BIT 4,H t = (cpu.HL >> 8) & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3949,7 +4229,7 @@ def BIT_164(cpu): # 164 BIT 4,H def BIT_165(cpu): # 165 BIT 4,L t = (cpu.HL & 0xFF) & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3961,7 +4241,7 @@ def BIT_166(cpu): # 166 BIT 4,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3972,7 +4252,7 @@ def BIT_166(cpu): # 166 BIT 4,(HL) def BIT_167(cpu): # 167 BIT 4,A t = cpu.A & (1 << 4) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3983,7 +4263,7 @@ def BIT_167(cpu): # 167 BIT 4,A def BIT_168(cpu): # 168 BIT 5,B t = cpu.B & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -3994,7 +4274,7 @@ def BIT_168(cpu): # 168 BIT 5,B def BIT_169(cpu): # 169 BIT 5,C t = cpu.C & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4005,7 +4285,7 @@ def BIT_169(cpu): # 169 BIT 5,C def BIT_16A(cpu): # 16A BIT 5,D t = cpu.D & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4016,7 +4296,7 @@ def BIT_16A(cpu): # 16A BIT 5,D def BIT_16B(cpu): # 16B BIT 5,E t = cpu.E & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4027,7 +4307,7 @@ def BIT_16B(cpu): # 16B BIT 5,E def BIT_16C(cpu): # 16C BIT 5,H t = (cpu.HL >> 8) & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4038,7 +4318,7 @@ def BIT_16C(cpu): # 16C BIT 5,H def BIT_16D(cpu): # 16D BIT 5,L t = (cpu.HL & 0xFF) & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4050,7 +4330,7 @@ def BIT_16E(cpu): # 16E BIT 5,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4061,7 +4341,7 @@ def BIT_16E(cpu): # 16E BIT 5,(HL) def BIT_16F(cpu): # 16F BIT 5,A t = cpu.A & (1 << 5) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4072,7 +4352,7 @@ def BIT_16F(cpu): # 16F BIT 5,A def BIT_170(cpu): # 170 BIT 6,B t = cpu.B & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4083,7 +4363,7 @@ def BIT_170(cpu): # 170 BIT 6,B def BIT_171(cpu): # 171 BIT 6,C t = cpu.C & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4094,7 +4374,7 @@ def BIT_171(cpu): # 171 BIT 6,C def BIT_172(cpu): # 172 BIT 6,D t = cpu.D & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4105,7 +4385,7 @@ def BIT_172(cpu): # 172 BIT 6,D def BIT_173(cpu): # 173 BIT 6,E t = cpu.E & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4116,7 +4396,7 @@ def BIT_173(cpu): # 173 BIT 6,E def BIT_174(cpu): # 174 BIT 6,H t = (cpu.HL >> 8) & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4127,7 +4407,7 @@ def BIT_174(cpu): # 174 BIT 6,H def BIT_175(cpu): # 175 BIT 6,L t = (cpu.HL & 0xFF) & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4139,7 +4419,7 @@ def BIT_176(cpu): # 176 BIT 6,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4150,7 +4430,7 @@ def BIT_176(cpu): # 176 BIT 6,(HL) def BIT_177(cpu): # 177 BIT 6,A t = cpu.A & (1 << 6) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4161,7 +4441,7 @@ def BIT_177(cpu): # 177 BIT 6,A def BIT_178(cpu): # 178 BIT 7,B t = cpu.B & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4172,7 +4452,7 @@ def BIT_178(cpu): # 178 BIT 7,B def BIT_179(cpu): # 179 BIT 7,C t = cpu.C & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4183,7 +4463,7 @@ def BIT_179(cpu): # 179 BIT 7,C def BIT_17A(cpu): # 17A BIT 7,D t = cpu.D & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4194,7 +4474,7 @@ def BIT_17A(cpu): # 17A BIT 7,D def BIT_17B(cpu): # 17B BIT 7,E t = cpu.E & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4205,7 +4485,7 @@ def BIT_17B(cpu): # 17B BIT 7,E def BIT_17C(cpu): # 17C BIT 7,H t = (cpu.HL >> 8) & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4216,7 +4496,7 @@ def BIT_17C(cpu): # 17C BIT 7,H def BIT_17D(cpu): # 17D BIT 7,L t = (cpu.HL & 0xFF) & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4228,7 +4508,7 @@ def BIT_17E(cpu): # 17E BIT 7,(HL) cpu.cycles += 4 t = cpu.mb.getitem(cpu.HL) & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -4239,7 +4519,7 @@ def BIT_17E(cpu): # 17E BIT 7,(HL) def BIT_17F(cpu): # 17F BIT 7,A t = cpu.A & (1 << 7) flag = 0b00100000 - flag += ((t & 0xFF) == 0) << FLAGZ + flag |= ((t & 0xFF) == 0) << FLAGZ cpu.F &= 0b00010000 cpu.F |= flag cpu.PC += 2 @@ -5308,19 +5588,7 @@ def no_opcode(cpu): -def execute_opcode(cpu, opcode): - oplen = OPCODE_LENGTHS[opcode] - v = 0 - pc = cpu.PC - if oplen == 2: - # 8-bit immediate - v = cpu.mb.getitem(pc+1) - elif oplen == 3: - # 16-bit immediate - # Flips order of values due to big-endian - a = cpu.mb.getitem(pc+2) - b = cpu.mb.getitem(pc+1) - v = (a << 8) + b +def execute_opcode(cpu, opcode, v): if opcode == 0x00: return NOP_00(cpu) diff --git a/pyboy/core/opcodes_gen.py b/pyboy/core/opcodes_gen.py index 0e5fef3af..840ecf6ae 100644 --- a/pyboy/core/opcodes_gen.py +++ b/pyboy/core/opcodes_gen.py @@ -17,7 +17,6 @@ """ imports = """ -from pyboy import utils import array import pyboy @@ -36,7 +35,7 @@ def BRK(cpu): cimports = """ cimport cython -from libc.stdint cimport uint8_t, uint16_t, uint32_t +from libc.stdint cimport uint8_t, uint16_t, uint32_t, int32_t from pyboy.logging.logging cimport Logger @@ -47,8 +46,7 @@ def BRK(cpu): cdef uint16_t FLAGC, FLAGH, FLAGN, FLAGZ cdef uint8_t[512] OPCODE_LENGTHS -@cython.locals(v=cython.int, a=cython.int, b=cython.int, pc=cython.ushort) -cdef int execute_opcode(cpu.CPU, uint16_t) noexcept nogil +cdef int execute_opcode(cpu.CPU, uint16_t, uint16_t) noexcept nogil cdef uint8_t no_opcode(cpu.CPU) noexcept nogil cdef uint8_t BRK(cpu.CPU) noexcept nogil @@ -144,9 +142,9 @@ def codegen(self, assign, operand=None): if operand == "(C)": self.highpointer = True if assign: - return "cpu.mb.setitem(0xFF00 + cpu.C, %s)" + return "cpu.mb.setitem_io_ports(0xFF00 | cpu.C, %s)" else: - return "cpu.mb.getitem(0xFF00 + cpu.C)" + return "cpu.mb.getitem_io_ports(0xFF00 | cpu.C)" elif operand == "SP+r8": self.immediate = True @@ -156,17 +154,14 @@ def codegen(self, assign, operand=None): return "cpu.SP + " + inline_signed_int8("v") elif operand.startswith("(") and operand.endswith(")"): + _operand = re.search(r"\(([a-zA-Z]+\d*)[\+-]?\)", operand).group(1) self.pointer = True if assign: - code = ( - "cpu.mb.setitem(%s" - % self.codegen(False, operand=re.search(r"\(([a-zA-Z]+\d*)[\+-]?\)", operand).group(1)) - + ", %s)" - ) + code = "cpu.mb.setitem_io_ports" if self.highpointer else "cpu.mb.setitem" + code += "(%s" % self.codegen(False, operand=_operand) + ", %s)" else: - code = "cpu.mb.getitem(%s)" % self.codegen( - False, operand=re.search(r"\(([a-zA-Z]+\d*)[\+-]?\)", operand).group(1) - ) + code = "cpu.mb.getitem_io_ports" if self.highpointer else "cpu.mb.getitem" + code += "(%s)" % self.codegen(False, operand=_operand) if "-" in operand or "+" in operand: # TODO: Replace with opcode 23 (INC HL)? @@ -219,7 +214,7 @@ def codegen(self, assign, operand=None): code = inline_signed_int8(code) self.signed = True elif operand == "a8": - code += " + 0xFF00" + code += " | 0xFF00" self.highpointer = True return code @@ -284,9 +279,9 @@ def getcode(self): ][self.takes_immediate] if self.opcode == 0x27: - pxd = "@cython.locals(v=int, flag=uint8_t, t=int, corr=ushort)\n" + pxd + pxd = "@cython.locals(flag=uint8_t, t=int, corr=uint16_t)\n" + pxd else: - pxd = "@cython.locals(v=int, flag=uint8_t, t=int)\n" + pxd + pxd = "@cython.locals(a=int32_t, b=int32_t, c=int32_t, flag=uint8_t, t=int32_t)\n" + pxd return (pxd, code) @@ -379,17 +374,17 @@ def handleflags16bit_E8_F8(self, r0, r1, op, carry=False): # Sets the flags that always get set by operation lines.append("flag = " + format(sum(map(lambda nf: (nf[1] == "1") << (nf[0] + 4), self.flags)), "#010b")) - # flag += (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH + # flag |= (((cpu.SP & 0xF) + (v & 0xF)) > 0xF) << FLAGH if self.flag_h == "H": c = " %s ((cpu.F & (1 << FLAGC)) != 0)" % op if carry else "" - lines.append("flag += (((%s & 0xF) %s (%s & 0xF)%s) > 0xF) << FLAGH" % (r0, op, r1, c)) + lines.append("flag |= (((%s & 0xF) %s (%s & 0xF)%s) > 0xF) << FLAGH" % (r0, op, r1, c)) - # flag += (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC + # flag |= (((cpu.SP & 0xFF) + (v & 0xFF)) > 0xFF) << FLAGC if self.flag_c == "C": - lines.append("flag += (((%s & 0xFF) %s (%s & 0xFF)%s) > 0xFF) << FLAGC" % (r0, op, r1, c)) + lines.append("flag |= (((%s & 0xFF) %s (%s & 0xFF)%s) > 0xFF) << FLAGC" % (r0, op, r1, c)) # Clears all flags affected by the operation - lines.append("cpu.F &= " + format(flagmask, "#010b")) + lines.append("cpu.F = 0b00000000") # E8 and F8 clears N and Z. The rest are dynamic lines.append("cpu.F |= flag") return lines @@ -407,10 +402,10 @@ def handleflags16bit(self, r0, r1, op, carry=False): if self.flag_h == "H": c = " %s ((cpu.F & (1 << FLAGC)) != 0)" % op if carry else "" - lines.append("flag += (((%s & 0xFFF) %s (%s & 0xFFF)%s) > 0xFFF) << FLAGH" % (r0, op, r1, c)) + lines.append("flag |= (((%s & 0xFFF) %s (%s & 0xFFF)%s) > 0xFFF) << FLAGH" % (r0, op, r1, c)) if self.flag_c == "C": - lines.append("flag += (t > 0xFFFF) << FLAGC") + lines.append("flag |= (t > 0xFFFF) << FLAGC") # Clears all flags affected by the operation lines.append("cpu.F &= " + format(flagmask, "#010b")) @@ -430,19 +425,42 @@ def handleflags8bit(self, r0, r1, op, carry=False): lines.append("flag = " + format(sum(map(lambda nf: (nf[1] == "1") << (nf[0] + 4), self.flags)), "#010b")) if self.flag_z == "Z": - lines.append("flag += ((t & 0xFF) == 0) << FLAGZ") + lines.append("flag |= ((t & 0xFF) == 0) << FLAGZ") if self.flag_h == "H" and op == "-": c = " %s ((cpu.F & (1 << FLAGC)) != 0)" % op if carry else "" - lines.append("flag += (((%s & 0xF) %s (%s & 0xF)%s) < 0) << FLAGH" % (r0, op, r1, c)) + lines.append("flag |= (((%s & 0xF) %s (%s & 0xF)%s) < 0) << FLAGH" % (r0, op, r1, c)) elif self.flag_h == "H": c = " %s ((cpu.F & (1 << FLAGC)) != 0)" % op if carry else "" - lines.append("flag += (((%s & 0xF) %s (%s & 0xF)%s) > 0xF) << FLAGH" % (r0, op, r1, c)) + lines.append("flag |= (((%s & 0xF) %s (%s & 0xF)%s) > 0xF) << FLAGH" % (r0, op, r1, c)) if self.flag_c == "C" and op == "-": - lines.append("flag += (t < 0) << FLAGC") + lines.append("flag |= (t < 0) << FLAGC") elif self.flag_c == "C": - lines.append("flag += (t > 0xFF) << FLAGC") + lines.append("flag |= (t > 0xFF) << FLAGC") + + # Clears all flags affected by the operation + lines.append("cpu.F &= " + format(flagmask, "#010b")) + lines.append("cpu.F |= flag") + return lines + + def handleflagsrotateshift(self, r0, r1, op, carry=False): + flagmask = sum(map(lambda nf: (nf[1] == "-") << (nf[0] + 4), self.flags)) + + # Only in case we do a dynamic operation, do we include the + # following calculations + if flagmask == 0b11110000: + return ["# No flag operations"] + + lines = [] + + assert all(f != "1" for pos, f in self.flags) # Assert no unconditional flags set + lines.append("flag = 0b00000000") + + if self.flag_z == "Z": + lines.append("flag |= ((t & 0xFF) == 0) << FLAGZ") + if self.flag_c == "C": + lines.append(f"flag |= ({r0} & 1) << FLAGC") # Clears all flags affected by the operation lines.append("cpu.F &= " + format(flagmask, "#010b")) @@ -521,8 +539,8 @@ def DAA(self): "\tcorr |= 0x60 if t > 0x99 else 0x00", "\tt += corr", "flag = 0", - "flag += ((t & 0xFF) == 0) << FLAGZ", - "flag += (corr & 0x60 != 0) << FLAGC", + "flag |= ((t & 0xFF) == 0) << FLAGZ", + "flag |= (corr & 0x60 != 0) << FLAGC", "cpu.F &= 0b01000000", "cpu.F |= flag", "t &= 0xFF", @@ -627,10 +645,14 @@ def ALU(self, left, right, op, carry=False): left.assign = False right.assign = False - calc = " ".join(["t", "=", left.get, op, right.get]) + lines.append(f"a = {left.get}") + lines.append(f"b = {right.get}") + + calc = " ".join(["t", "=", "a", op, "b"]) if carry: - calc += " " + op + " ((cpu.F & (1 << FLAGC)) != 0)" + lines.append("c = ((cpu.F & (1 << FLAGC)) != 0)") + calc += " " + op + " c" lines.append(calc) @@ -639,10 +661,10 @@ def ALU(self, left, right, op, carry=False): lines.extend(self.handleflags16bit_E8_F8(left.get, "v", op, carry)) lines.append("t &= 0xFFFF") elif self.is16bit: - lines.extend(self.handleflags16bit(left.get, right.get, op, carry)) + lines.extend(self.handleflags16bit("a", "b", op, carry)) lines.append("t &= 0xFFFF") else: - lines.extend(self.handleflags8bit(left.get, right.get, op, carry)) + lines.extend(self.handleflags8bit("a", "b", op, carry)) lines.append("t &= 0xFF") # HAS TO BE THE LAST INSTRUCTION BECAUSE OF CP! @@ -1118,10 +1140,13 @@ def RST(self): def rotateleft(self, name, left, throughcarry=False): code = Code(name, self.opcode, self.name, False, self.length, self.cycles) left.assign = False + + code.addline(("a = %s" % left.get)) + if throughcarry: - code.addline(("t = (%s << 1)" % left.get) + " + ((cpu.F & (1 << FLAGC)) != 0)") + code.addline(("t = (a << 1)") + " | ((cpu.F & (1 << FLAGC)) != 0)") else: - code.addline("t = (%s << 1) + (%s >> 7)" % (left.get, left.get)) + code.addline("t = (a << 1) | (a >> 7)") code.addlines(self.handleflags8bit(left.get, None, None, throughcarry)) code.addline("t &= 0xFF") left.assign = True @@ -1161,17 +1186,17 @@ def RL(self): def rotateright(self, name, left, throughcarry=False): code = Code(name, self.opcode, self.name, False, self.length, self.cycles) left.assign = False + + code.addline(("a = %s" % left.get)) + if throughcarry: # Trigger "overflow" for carry flag - code.addline( - ("t = (%s >> 1)" % left.get) - + " + (((cpu.F & (1 << FLAGC)) != 0) << 7)" - + " + ((%s & 1) << 8)" % (left.get) - ) + code.addline(("t = (a >> 1)") + " | (((cpu.F & (1 << FLAGC)) != 0) << 7)") else: # Trigger "overflow" for carry flag - code.addline("t = (%s >> 1) + ((%s & 1) << 7)" % (left.get, left.get) + " + ((%s & 1) << 8)" % (left.get)) - code.addlines(self.handleflags8bit(left.get, None, None, throughcarry)) + code.addline("t = (a >> 1) | ((a & 1) << 7)") + + code.addlines(self.handleflagsrotateshift("a", None, None, throughcarry)) code.addline("t &= 0xFF") if left.operand == "(HL)": @@ -1230,9 +1255,11 @@ def SRA(self): # FIX: All documentation tells it should have carry enabled self.flag_c = "C" code = Code(self.name.split()[0], self.opcode, self.name, False, self.length, self.cycles) - # Actual shift / MSB unchanged / Trigger "overflow" for carry flag - code.addline("t = ((%s >> 1) | (%s & 0x80)) + ((%s & 1) << 8)" % (left.get, left.get, left.get)) - code.addlines(self.handleflags8bit(left.get, None, None, False)) + + code.addline(("a = %s" % left.get)) + + code.addline("t = ((a >> 1) | (a & 0x80)) | ((a & 1) << 8)") + code.addlines(self.handleflags8bit(left.get, None, None, False)) # FIX code.addline("t &= 0xFF") if left.operand == "(HL)": @@ -1249,8 +1276,10 @@ def SRL(self): r0 = self.name.split()[1] left = Operand(r0) code = Code(self.name.split()[0], self.opcode, self.name, False, self.length, self.cycles) - # Actual shift / Trigger "overflow" for carry flag - code.addline("t = (%s >> 1) + ((%s & 1) << 8)" % (left.get, left.get)) + + code.addline(("a = %s" % left.get)) + + code.addline("t = (a >> 1) + ((a & 1) << 8)") code.addlines(self.handleflags8bit(left.get, None, None, False)) code.addline("t &= 0xFF") @@ -1268,7 +1297,10 @@ def SWAP(self): r0 = self.name.split()[1] left = Operand(r0) code = Code(self.name.split()[0], self.opcode, self.name, False, self.length, self.cycles) - code.addline("t = ((%s & 0xF0) >> 4) | ((%s & 0x0F) << 4)" % (left.get, left.get)) + + code.addline(("a = %s" % left.get)) + + code.addline("t = ((a & 0xF0) >> 4) | ((a & 0x0F) << 4)") code.addlines(self.handleflags8bit(left.get, None, None, False)) code.addline("t &= 0xFF") @@ -1375,19 +1407,7 @@ def update(): f.write( """ -def execute_opcode(cpu, opcode): - oplen = OPCODE_LENGTHS[opcode] - v = 0 - pc = cpu.PC - if oplen == 2: - # 8-bit immediate - v = cpu.mb.getitem(pc+1) - elif oplen == 3: - # 16-bit immediate - # Flips order of values due to big-endian - a = cpu.mb.getitem(pc+2) - b = cpu.mb.getitem(pc+1) - v = (a << 8) + b +def execute_opcode(cpu, opcode, v): """ ) diff --git a/pyboy/core/sound.pxd b/pyboy/core/sound.pxd index 007a8ba05..dd09b15d7 100644 --- a/pyboy/core/sound.pxd +++ b/pyboy/core/sound.pxd @@ -66,7 +66,6 @@ cdef class Sound: cdef uint8_t pcm34(self) noexcept nogil cdef void clear_buffer(self) noexcept nogil cdef void reset_apu_div(self) noexcept nogil - cdef void stop(self) noexcept cdef int save_state(self, IntIOInterface) except -1 cdef int load_state(self, IntIOInterface, int) except -1 diff --git a/pyboy/core/sound.py b/pyboy/core/sound.py index 9ddd6fba1..315cf8711 100644 --- a/pyboy/core/sound.py +++ b/pyboy/core/sound.py @@ -400,9 +400,6 @@ def load_state(self, file, state_version): self.wavechannel.load_state(file, state_version) self.noisechannel.load_state(file, state_version) - def stop(self): - pass - class ToneChannel: """Second sound channel--simple square wave, no sweep""" diff --git a/pyboy/plugins/debug.pxd b/pyboy/plugins/debug.pxd index 68102cac0..f676be59f 100644 --- a/pyboy/plugins/debug.pxd +++ b/pyboy/plugins/debug.pxd @@ -64,7 +64,7 @@ cdef class BaseDebugWindow(PyBoyWindowPlugin): cdef object buf_p @cython.locals(y=int, x=int, _y=int, _x=int) - cdef void copy_tile(self, uint8_t[:,:], int, int, int, uint32_t[:,:], bint, bint, uint32_t[:]) noexcept + cdef void copy_tile(self, uint8_t[:, :, :], int, int, int, int, uint32_t[:,:], bint, bint, uint32_t[:]) noexcept @cython.locals(i=int, tw=int, th=int, xx=int, yy=int) cdef void mark_tile(self, int, int, uint32_t, int, int, bint) noexcept @@ -79,7 +79,7 @@ cdef class TileViewWindow(BaseDebugWindow): cdef TileMap tilemap cdef uint32_t color - cdef uint8_t[:,:] tilecache # Fixing Cython locals + # cdef uint8_t[:,:] tilecache # Fixing Cython locals cdef uint32_t[:] palette_rgb # Fixing Cython locals @cython.locals( mem_offset=uint16_t, @@ -106,7 +106,7 @@ cdef class TileViewWindow(BaseDebugWindow): cdef class TileDataWindow(BaseDebugWindow): cdef bint tilecache_select - cdef uint8_t[:,:] tilecache # Fixing Cython locals + # cdef uint8_t[:,:] tilecache # Fixing Cython locals cdef uint32_t[:] palette_rgb # Fixing Cython locals @cython.locals(t=int, xx=int, yy=int) cdef void post_tick(self) noexcept @@ -128,7 +128,7 @@ cdef class SpriteWindow(BaseDebugWindow): @cython.locals(title=str) cdef void update_title(self) noexcept - cdef uint8_t[:,:] spritecache # Fixing Cython locals + # cdef uint8_t[:,:] spritecache # Fixing Cython locals cdef uint32_t[:] palette_rgb # Fixing Cython locals cdef class SpriteViewWindow(BaseDebugWindow): diff --git a/pyboy/plugins/debug.py b/pyboy/plugins/debug.py index 2ff608407..6155d824b 100644 --- a/pyboy/plugins/debug.py +++ b/pyboy/plugins/debug.py @@ -285,12 +285,12 @@ def post_tick(self): ########################## # Internal functions - def copy_tile(self, from_buffer, t, xx, yy, to_buffer, hflip, vflip, palette): + def copy_tile(self, from_buffer, vbank, t, xx, yy, to_buffer, hflip, vflip, palette): for y in range(8): _y = 7 - y if vflip else y for x in range(8): _x = 7 - x if hflip else x - to_buffer[yy + y, xx + x] = palette[from_buffer[_y + t * 8, _x]] + to_buffer[yy + y, xx + x] = palette[from_buffer[vbank, _y + t * 8, _x]] def mark_tile(self, x, y, color, height, width, grid): tw = width # Tile width @@ -340,22 +340,24 @@ def post_tick(self): # tilecache = None # palette_rgb = None + vbank = 0 if self.is_cgb_renderer: palette, vbank, horiflip, vertflip, bg_priority = self.cgb_renderer._cgb_get_background_map_attributes( self.mb.lcd, n ) - self.renderer.update_tilecache1(self.mb.lcd, tile_index, 1) - self.tilecache = self.renderer._tilecache1 if vbank else self.renderer._tilecache0 + self.renderer.update_tilecache(1, self.mb.lcd, tile_index, 1) + # self.tilecache = self.renderer._tilecache1 if vbank else self.renderer._tilecache0 self.palette_rgb = self.mb.lcd.ocpd.palette_mem_rgb # TODO: Select palette by adding offset else: # Fake palette index - self.renderer.update_tilecache0(self.mb.lcd, tile_index, 0) - self.tilecache = self.renderer._tilecache0 + self.renderer.update_tilecache(0, self.mb.lcd, tile_index, 0) + # self.tilecache = self.renderer._tilecache0 horiflip, vertflip = False, False self.palette_rgb = self.mb.lcd.BGP.palette_mem_rgb self.copy_tile( - self.tilecache, + self.renderer._tilecache, + vbank, tile_index, tile_column * 8, tile_row * 8, @@ -467,10 +469,13 @@ def __init__(self, *args, **kwargs): def post_tick(self): # TODO: We could select different palettes on CGB + vbank = 0 if self.tilecache_select: - tilecache = self.renderer._tilecache1 + vbank = 1 + # tilecache = self.renderer._tilecache1 else: - tilecache = self.renderer._tilecache0 + vbank = 0 + # tilecache = self.renderer._tilecache0 if self.cgb: self.palette_rgb = self.mb.lcd.bcpd.palette_mem_rgb # TODO: Select palette by adding offset @@ -479,12 +484,12 @@ def post_tick(self): for t in range(TILES): if self.tilecache_select: - self.renderer.update_tilecache1(self.mb.lcd, t, 1) + self.renderer.update_tilecache(1, self.mb.lcd, t, 1) else: - self.renderer.update_tilecache0(self.mb.lcd, t, 0) + self.renderer.update_tilecache(0, self.mb.lcd, t, 0) xx = (t * 8) % self.width yy = ((t * 8) // self.width) * 8 - self.copy_tile(tilecache, t, xx, yy, self.buf0, False, False, self.palette_rgb) + self.copy_tile(self.renderer._tilecache, vbank, t, xx, yy, self.buf0, False, False, self.palette_rgb) self.draw_overlay() BaseDebugWindow.post_tick(self) @@ -531,36 +536,43 @@ def post_tick(self): xx = ((n // 4) * 8) % self.width yy = (((n // 4) * 8) // self.width) * sprite_height + vbank = 0 if self.cgb: if attributes & 0b1000: - self.renderer.update_spritecache1(self.mb.lcd, t, 1) + self.renderer.update_spritecache(1, self.mb.lcd, t, 1) if self.mb.lcd._LCDC.sprite_height: - self.renderer.update_spritecache1(self.mb.lcd, t + 1, 1) - self.spritecache = self.renderer._spritecache1 + self.renderer.update_spritecache(1, self.mb.lcd, t + 1, 1) + # self.spritecache = self.renderer._spritecache1 + vbank = 1 else: - self.renderer.update_spritecache0(self.mb.lcd, t, 0) + self.renderer.update_spritecache(0, self.mb.lcd, t, 0) if self.mb.lcd._LCDC.sprite_height: - self.renderer.update_spritecache0(self.mb.lcd, t + 1, 0) - self.spritecache = self.renderer._spritecache0 + self.renderer.update_spritecache(0, self.mb.lcd, t + 1, 0) + # self.spritecache = self.renderer._spritecache0 + vbank = 0 self.palette_rgb = self.mb.lcd.ocpd.palette_mem_rgb # TODO: Select palette by adding offset else: # Fake palette index if attributes & 0b10000: - self.renderer.update_spritecache1(self.mb.lcd, t, 0) + self.renderer.update_spritecache(1, self.mb.lcd, t, 0) if self.mb.lcd._LCDC.sprite_height: - self.renderer.update_spritecache1(self.mb.lcd, t + 1, 0) - self.spritecache = self.renderer._spritecache1 + self.renderer.update_spritecache(1, self.mb.lcd, t + 1, 0) + # self.spritecache = self.renderer._spritecache1 + vbank = 1 self.palette_rgb = self.mb.lcd.OBP1.palette_mem_rgb else: - self.renderer.update_spritecache0(self.mb.lcd, t, 0) + self.renderer.update_spritecache(0, self.mb.lcd, t, 0) if self.mb.lcd._LCDC.sprite_height: - self.renderer.update_spritecache0(self.mb.lcd, t + 1, 0) - self.spritecache = self.renderer._spritecache0 + self.renderer.update_spritecache(0, self.mb.lcd, t + 1, 0) + # self.spritecache = self.renderer._spritecache0 + vbank = 0 self.palette_rgb = self.mb.lcd.OBP0.palette_mem_rgb - self.copy_tile(self.spritecache, t, xx, yy, self.buf0, False, False, self.palette_rgb) + self.copy_tile(self.renderer._spritecache, vbank, t, xx, yy, self.buf0, False, False, self.palette_rgb) if sprite_height: - self.copy_tile(self.spritecache, t + 1, xx, yy + 8, self.buf0, False, False, self.palette_rgb) + self.copy_tile( + self.renderer._spritecache, vbank, t + 1, xx, yy + 8, self.buf0, False, False, self.palette_rgb + ) self.draw_overlay() BaseDebugWindow.post_tick(self) diff --git a/pyboy/plugins/window_open_gl.py b/pyboy/plugins/window_open_gl.py index e2c6a8777..0e063fb84 100644 --- a/pyboy/plugins/window_open_gl.py +++ b/pyboy/plugins/window_open_gl.py @@ -64,7 +64,8 @@ def __init__(self, pyboy, mb, pyboy_argv): raise PyBoyException("OpenGL couldn't initialize!") glutInitDisplayMode(GLUT_SINGLE | GLUT_RGBA) glutInitWindowSize(*self._scaledresolution) - glutCreateWindow("PyBoy") + if not glutCreateWindow("PyBoy"): + raise PyBoyException("OpenGL couldn't open window!") glutKeyboardFunc(self._key) glutKeyboardUpFunc(self._keyUp) glutSpecialFunc(self._spec) diff --git a/pyboy/pyboy.pxd b/pyboy/pyboy.pxd index 9d937e899..a76d03d90 100644 --- a/pyboy/pyboy.pxd +++ b/pyboy/pyboy.pxd @@ -78,7 +78,7 @@ cdef class PyBoy: cdef int64_t _tick(self, bint, bint) except -1 nogil @cython.locals(running=bint, _render=bint, _sound=bint) cpdef int64_t tick(self, int count=*, bint render=*, bint sound=*) except -1 - cpdef void stop(self, save=*) noexcept + cpdef void stop(self, save=*, ram_file=*, rtc_file=*) noexcept cpdef int save_state(self, object) except -1 cpdef int load_state(self, object) except -1 diff --git a/pyboy/pyboy.py b/pyboy/pyboy.py index 2451dd965..da0d33f3f 100644 --- a/pyboy/pyboy.py +++ b/pyboy/pyboy.py @@ -10,6 +10,7 @@ import os import re import time +from pathlib import Path import numpy as np @@ -26,6 +27,7 @@ IntIOWrapper, PyBoyException, PyBoyInvalidInputException, + PyBoyInvalidOperationException, PyBoyOutOfBoundsException, WindowEvent, cython_compiled, @@ -78,6 +80,8 @@ def __init__( self, gamerom, *, + ram_file=None, + rtc_file=None, window=defaults["window"], scale=defaults["scale"], symbols=None, @@ -105,6 +109,9 @@ def __init__( Only the `gamerom` argument is required. + If `gamerom` is a filepath and `ram_file` and `rtc_file` are not provided, filepaths will be determined + automatically next to the game ROM. If this is not wanted, provide a file-like object as argument. + Example: ```python >>> pyboy = PyBoy('game_rom.gb') @@ -116,9 +123,11 @@ def __init__( ``` Args: - gamerom (str): Filepath to a game-ROM for Game Boy or Game Boy Color. + gamerom (str or file-like object): Filepath to a game-ROM for Game Boy or Game Boy Color. Kwargs: + * ram_file (file-like object): + * rtc_file (file-like object): * window (str): "SDL2", "OpenGL", or "null" * scale (int): Window scale factor. Doesn't apply to API. * symbols (str): Filepath to a .sym file to use. If unsure, specify `None`. @@ -174,11 +183,41 @@ def __init__( kwargs[k] = v if gamerom is None: - raise FileNotFoundError("None is not a ROM file!") - - if not os.path.isfile(gamerom): - raise FileNotFoundError(f"ROM file {gamerom} was not found!") - self.gamerom = gamerom + raise FileNotFoundError("No game ROM provided!") + + gamerom_file = None + self.gamerom = None + gamerom_file_handled = False + ram_file_handled = False + rtc_file_handled = False + if isinstance(gamerom, (str, Path)): + self.gamerom = str(gamerom) + try: + gamerom_file = open(self.gamerom, "rb") + gamerom_file_handled = True + + if ram_file is None: + try: + ram_file = open(self.gamerom + ".ram", "rb") + ram_file_handled = True + except FileNotFoundError: + pass + + if rtc_file is None: + try: + rtc_file = open(self.gamerom + ".rtc", "rb") + rtc_file_handled = True + except FileNotFoundError: + pass + + except FileNotFoundError: + raise FileNotFoundError(f"ROM file {gamerom} was not found!") + except Exception: + raise + elif hasattr(gamerom, "read"): + gamerom_file = gamerom + else: + raise PyBoyInvalidInputException("Provided game ROM cannot be used. Expected str, Path or file-like object") self.rom_symbols = {} self.rom_symbols_inverse = {} @@ -200,7 +239,9 @@ def __init__( raise PyBoyInvalidInputException("Sound volume has to be between 0 and 100.") self.mb = Motherboard( - gamerom, + gamerom_file, + ram_file, + rtc_file, bootrom, color_palette, cgb_color_palette, @@ -211,6 +252,16 @@ def __init__( randomize=randomize, ) + # Close the files we opened -- i.e. not passed from args + if gamerom_file_handled: + gamerom_file.close() + + if ram_file_handled: + ram_file.close() + + if rtc_file_handled: + rtc_file.close() + # Validate all kwargs plugin_manager_keywords = [] for x in parser_arguments(): @@ -579,15 +630,21 @@ def _handle_events(self, events): self.target_emulationspeed = int(bool(self.target_emulationspeed) ^ True) logger.debug("Speed limit: %d", self.target_emulationspeed) elif event == WindowEvent.STATE_SAVE: - with open(self.gamerom + ".state", "wb") as f: - self.mb.save_state(IntIOWrapper(f)) + if self.gamerom: + with open(self.gamerom + ".state", "wb") as f: + self.mb.save_state(IntIOWrapper(f)) + else: + logger.error("Failed to save game state. PyBoy is loaded without a filepath.") elif event == WindowEvent.STATE_LOAD: - state_path = self.gamerom + ".state" - if not os.path.isfile(state_path): - logger.error("State file not found: %s", state_path) - continue - with open(state_path, "rb") as f: - self.mb.load_state(IntIOWrapper(f)) + if self.gamerom: + state_path = self.gamerom + ".state" + if not os.path.isfile(state_path): + logger.error("State file not found: %s", state_path) + continue + with open(state_path, "rb") as f: + self.mb.load_state(IntIOWrapper(f)) + else: + logger.error("Failed to load game state. PyBoy is loaded without a filepath.") elif event == WindowEvent.PASS: pass # Used in place of None in Cython, when key isn't mapped to anything elif event == WindowEvent.PAUSE_TOGGLE: @@ -661,7 +718,7 @@ def __enter__(self): def __exit__(self, type, value, traceback): self.stop() - def stop(self, save=True): + def stop(self, save=True, ram_file=None, rtc_file=None): """ Gently stops the emulator and all sub-modules. @@ -669,19 +726,42 @@ def stop(self, save=True): ```python >>> pyboy.stop() # Stop emulator and save game progress (cartridge RAM) >>> pyboy.stop(False) # Stop emulator and discard game progress (cartridge RAM) - + >>> import io + >>> sav = io.BytesIO() + >>> pyboy.stop(ram_file=sav) # Stop emulator and save game progress (cartridge RAM) ``` Args: save (bool): Specify whether to save the game upon stopping. It will always be saved in a file next to the provided game-ROM. + ram_file (file-like object): A bytes buffer to write the RAM (save) data to + rtc_file (file-like object): A bytes buffer to write the RTC (real-time clock) data to, if present on cartridge """ if self.initialized and not self.stopped: logger.info("###########################") logger.info("# Emulator is turning off #") logger.info("###########################") self._plugin_manager.stop() - self.mb.stop(save) + + # Battery implies saving RAM + ram_file_handled = False + rtc_file_handled = False + if save and self.mb.cartridge.battery and ram_file is None: + ram_file = open(self.gamerom + ".ram", "w+b") + ram_file_handled = True + + if save and self.mb.cartridge.rtc_enabled and rtc_file is None: + rtc_file = open(self.gamerom + ".rtc", "w+b") + rtc_file_handled = True + + self.mb.stop(save, ram_file, rtc_file) + + if ram_file_handled: + ram_file.close() + + if rtc_file_handled: + rtc_file.close() + self.stopped = True ################################################################### @@ -1116,8 +1196,11 @@ def _is_cpu_stuck(self): return self.mb.cpu.is_stuck def _load_symbols(self): - gamerom_file_no_ext, rom_ext = os.path.splitext(self.gamerom) - for sym_path in [self.symbols_file, gamerom_file_no_ext + ".sym", gamerom_file_no_ext + rom_ext + ".sym"]: + gamerom_paths = [] + if self.gamerom: + gamerom_file_no_ext, rom_ext = os.path.splitext(self.gamerom) + gamerom_paths = [gamerom_file_no_ext + ".sym", gamerom_file_no_ext + rom_ext + ".sym"] + for sym_path in [self.symbols_file] + gamerom_paths: if sym_path and os.path.isfile(sym_path): logger.info("Loading symbol file: %s", sym_path) with open(sym_path) as f: @@ -1631,6 +1714,19 @@ def _fix_slice(self, addr): step = addr.step return start, stop, step + def __len__(self): + raise PyBoyInvalidOperationException( + "It's not possible to define the length of the memory space. See instead https://gbdev.io/pandocs/Memory_Map.html" + ) + + def __iter__(self): + """ + Address space is overlapping, and therefore too complex to return as list or iterator. + If you want a snapshot, you should request specific memory ranges and banks. + See https://gbdev.io/pandocs/Memory_Map.html + """ + raise PyBoyInvalidOperationException("It's not possible to iterate over the memory space.") + def __getitem__(self, addr): is_bank = isinstance(addr, tuple) bank = 0 @@ -1641,12 +1737,16 @@ def __getitem__(self, addr): is_single = isinstance(addr, int) if not is_single: start, stop, step = self._fix_slice(addr) - if not (start >= 0 or stop >= 0): - raise PyBoyInvalidInputException("Start address has to come before end address") if not (start >= 0): raise PyBoyInvalidInputException("Start address required") if not (stop >= 0): raise PyBoyInvalidInputException("End address required") + if not 0 <= start <= 0xFFFF: + raise PyBoyOutOfBoundsException("Start address out of bounds") + if not 0 <= stop <= 0x10000: + raise PyBoyOutOfBoundsException("End address out of bounds") + if not (start < stop): + raise PyBoyInvalidInputException("Start address has to come before end address") return self.__getitem(start, stop, step, bank, is_single, is_bank) else: return self.__getitem(addr, 0, 1, bank, is_single, is_bank) @@ -1772,6 +1872,12 @@ def __setitem__(self, addr, v): raise PyBoyInvalidInputException("Start address required") if not (stop >= 0): raise PyBoyInvalidInputException("End address required") + if not 0 <= start <= 0xFFFF: + raise PyBoyOutOfBoundsException("Start address out of bounds") + if not 0 <= stop <= 0x10000: + raise PyBoyOutOfBoundsException("End address out of bounds") + if not (start < stop): + raise PyBoyInvalidInputException("Start address has to come before end address") self.__setitem(start, stop, step, v, bank, is_single, is_bank) else: self.__setitem(addr, 0, 0, v, bank, is_single, is_bank) diff --git a/pyboy/utils.py b/pyboy/utils.py index eb3b336c1..b8336ab78 100644 --- a/pyboy/utils.py +++ b/pyboy/utils.py @@ -81,6 +81,14 @@ class PyBoyInvalidInputException(PyBoyException): pass +class PyBoyInvalidOperationException(PyBoyException): + """ + Exception raised when the user requests an invalid operation, which cannot be performed. + """ + + pass + + class PyBoyDependencyError(PyBoyException): """ Exception raised for errors related to missing dependencies in PyBoy. diff --git a/pyproject.toml b/pyproject.toml index 571f302fe..8986d6da8 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -1,6 +1,6 @@ [project] name = "pyboy" -version = "2.6.0" +version = "2.6.1" authors = [ {name = "Mads Ynddal", email = "mads@ynddal.dk"} ] diff --git a/setup.py b/setup.py index 0d600801f..59681b9c8 100644 --- a/setup.py +++ b/setup.py @@ -48,10 +48,8 @@ def initialize_options(self): thread_count = cpu_count() # Fixing issue with nthreads in Cython - if ( - (3, 8) <= sys.version_info[:2] - and sys.platform == "darwin" - and multiprocessing.get_start_method() == "spawn" + if ((3, 8) <= sys.version_info[:2] and sys.platform == "darwin") or ( + (3, 14) <= sys.version_info[:2] and sys.platform == "linux" ): multiprocessing.set_start_method("fork", force=True) diff --git a/tests/test_basics.py b/tests/test_basics.py index 346e49290..204558d37 100644 --- a/tests/test_basics.py +++ b/tests/test_basics.py @@ -6,6 +6,9 @@ import hashlib import os import sys +import io +import tempfile +import shutil from unittest import mock import pytest @@ -22,6 +25,84 @@ sdl2 = None +def patch_cartridge(f, mbc, ram): + f.seek(0x0149) # RAM type + f.write(bytes([ram])) + f.seek(0x0147) # Cartridge type + f.write(bytes([mbc])) + + # Update checksum + x = 0 + f.seek(0x134) + for _ in range(0x134, 0x14D): + x = x - ord(f.read(1)) - 1 + x &= 0xFF + + f.seek(0x14D) # Checksum written to ROM + f.write(bytes([x])) + + f.seek(0, os.SEEK_END) + + +@pytest.mark.parametrize( + "patch_types, cart_ram, cart_rtc", + [ + ((0x10, 0x04), True, True), # MBC3+TIMER+RAM+BATT, 16 RAM banks, + ((0x06, 0x02), True, False), # MBC2+BATTERY, 1 RAM banks, + ((0x01, 0x00), False, False), # MBC1, 0 RAM banks, + ], +) +def test_gamerom_ram_rtc(any_rom, patch_types, cart_ram, cart_rtc): + tmp_path = tempfile.mkdtemp() + rom = tmp_path + "/" + "rom.gb" + ram = rom + ".ram" + rtc = rom + ".rtc" + shutil.copyfile(any_rom, rom) + with open(rom, "r+b") as f: + patch_cartridge(f, *patch_types) + + assert os.path.exists(rom) + assert not os.path.exists(ram) + assert not os.path.exists(rtc) + + p = PyBoy(rom, window="null") + p.tick() + p.stop() + + assert os.path.exists(rom) + assert os.path.exists(ram) == cart_ram + assert os.path.exists(rtc) == cart_rtc + + +@pytest.mark.parametrize( + "patch_types, cart_ram, cart_rtc", + [ + ((0x10, 0x04), True, True), # MBC3+TIMER+RAM+BATT, 16 RAM banks, + ((0x06, 0x02), True, False), # MBC2+BATTERY, 1 RAM banks, + ((0x01, 0x00), False, False), # MBC1, 0 RAM banks, + ], +) +def test_gamerom_filelike_object(any_rom, patch_types, cart_ram, cart_rtc): + rom = io.BytesIO() + with open(any_rom, "rb") as f: + rom.write(f.read()) + + rom.seek(0) + patch_cartridge(rom, *patch_types) + + rom.seek(0) + p = PyBoy(rom, window="null") + p.tick() + + save_ram = io.BytesIO() + save_rtc = io.BytesIO() + p.stop(True, save_ram, save_rtc) + + # If data written, we assert that the cartridge also has that feature + assert (save_ram.tell() > 0) == cart_ram + assert (save_rtc.tell() > 0) == cart_rtc + + def test_log_level_none(default_rom, capsys): PyBoy(default_rom, window="null") captured = capsys.readouterr() @@ -116,18 +197,26 @@ def test_record_replay(boot_rom, default_rom, capsys): assert keys[0] == WindowEvent.PRESS_ARROW_DOWN, "Check we have the right keypress" assert len(base64.b64decode(frame_data)) == 144 * 160 * 3, "Frame does not contain 160x144 of RGB data" + for e in events: + _, _, frame_data = e + all(x == 255 for x in base64.b64decode(frame_data)) + pyboy.stop(save=False) - with open(default_rom + ".replay", "rb") as f: - m = hashlib.sha256() - m.update(f.read()) - digest = m.digest() + if not (sys.version_info >= (3, 14) and sys.platform == "win32"): + with open(default_rom + ".replay", "rb") as f: + m = hashlib.sha256() + m.update(f.read()) + digest = m.digest() - os.remove(default_rom + ".replay") + os.remove(default_rom + ".replay") - assert digest == ( - b'r\x80\x19)\x1a\x88\r\xcc\xb9\xab\xa3\xda\xb1&i\xc8"\xc2\xfb\x8a\x01\x9b\xa81@\x92V=5\x92\\5' - ), "The replay did not result in the expected output" + # CPython messed up zlib, so it no longer produces matching output to the Unix platforms + # https://docs.python.org/3/whatsnew/3.14.html#zlib + # https://github.com/python/cpython/issues/91349 + assert digest == ( + b'r\x80\x19)\x1a\x88\r\xcc\xb9\xab\xa3\xda\xb1&i\xc8"\xc2\xfb\x8a\x01\x9b\xa81@\x92V=5\x92\\5' + ), "The replay did not result in the expected output" # FIXME assert "To replay input consistently later, it is recommended to load a state at boot" in capsys.readouterr().out diff --git a/tests/test_memoryview.py b/tests/test_memoryview.py index 6bfbf6340..70595da05 100644 --- a/tests/test_memoryview.py +++ b/tests/test_memoryview.py @@ -6,7 +6,7 @@ import pytest from pyboy import PyBoy -from pyboy.utils import PyBoyInvalidInputException, PyBoyOutOfBoundsException +from pyboy.utils import PyBoyInvalidInputException, PyBoyOutOfBoundsException, PyBoyInvalidOperationException def test_memoryview(default_rom, boot_rom): @@ -29,15 +29,25 @@ def test_memoryview(default_rom, boot_rom): # Requires start and end address with pytest.raises(PyBoyInvalidInputException): - p.memory[:10] == [] + p.memory[:10] with pytest.raises(PyBoyInvalidInputException): - p.memory[20:10] == [] + p.memory[10:10] with pytest.raises(PyBoyInvalidInputException): - p.memory[:10:] == [] + p.memory[-1:10] with pytest.raises(PyBoyInvalidInputException): - p.memory[0xFF00:] == [] + p.memory[0:-1] + with pytest.raises(PyBoyOutOfBoundsException): + p.memory[0:0x10001] + with pytest.raises(PyBoyOutOfBoundsException): + p.memory[0x10000:0x10001] + with pytest.raises(PyBoyInvalidInputException): + p.memory[20:10] + with pytest.raises(PyBoyInvalidInputException): + p.memory[:10:] with pytest.raises(PyBoyInvalidInputException): - p.memory[0xFF00::] == [] + p.memory[0xFF00:] + with pytest.raises(PyBoyInvalidInputException): + p.memory[0xFF00::] with pytest.raises(PyBoyInvalidInputException): p.memory[:10] = 0 with pytest.raises(PyBoyInvalidInputException): @@ -47,6 +57,9 @@ def test_memoryview(default_rom, boot_rom): with pytest.raises(PyBoyInvalidInputException): p.memory[0xFF00::] = 0 + assert len(p.memory[0xFFFF:0x10000]) == 1 + assert len(p.memory[0xFFFE:0x10000]) == 2 + # Attempt write to ROM area p.memory[0:10] = 1 assert p.memory[0:10] == bootrom_bytes[:10] @@ -96,6 +109,30 @@ def test_memoryview(default_rom, boot_rom): p.memory[0, 0x00:0x9000] +def test_memoryview_iter(default_rom, boot_rom): + p = PyBoy(default_rom, window="null", bootrom=boot_rom) + + with pytest.raises(PyBoyInvalidOperationException): + for i, _ in enumerate(p.memory): + pass + + with pytest.raises(PyBoyInvalidOperationException): + list(p.memory) + + with pytest.raises(PyBoyInvalidOperationException): + len(p.memory) + + # Extracting slice + for i, _ in enumerate(p.memory[0:11]): + pass + assert i == 10 + + # Extracting slice + for i, _ in enumerate(p.memory[-1, 0:11]): + pass + assert i == 10 + + def test_cgb_banks(cgb_acid_file): # Any CGB file p = PyBoy(cgb_acid_file, window="null") diff --git a/tests/test_results/GB Tests/sprite_suite.gb.png b/tests/test_results/GB Tests/sprite_suite.gb.png index 78c31c5d2..8652b838e 100644 Binary files a/tests/test_results/GB Tests/sprite_suite.gb.png and b/tests/test_results/GB Tests/sprite_suite.gb.png differ diff --git a/tests/test_results/blargg.json b/tests/test_results/blargg.json index e126a19e4..0117aab7f 100644 --- a/tests/test_results/blargg.json +++ b/tests/test_results/blargg.json @@ -25,7 +25,7 @@ "blargg/dmg_sound/rom_singles/11-regs after power.gb": "11-regs after power\n\n\nPowering off should clear NR13\n\nFailed #3\n", "blargg/dmg_sound/rom_singles/12-wave write while on.gb": "12-wave write while on\n\n00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF \n00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF \n00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF \n00 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF \n00 11 22 33 44 55 66 77 88 99 A", "blargg/instr_timing/instr_timing.gb": "instr_timing\n\n\nPassed\n", - "blargg/interrupt_time/interrupt_time.gb": "interrupt time\n\n00 00 00 \n00 08 08 \n00 00 00 \n00 08 08 \n5DDD9187 \nFailed\n", + "blargg/interrupt_time/interrupt_time.gb": "interrupt time\n\n00 00 00 \n00 08 0D \n00 00 00 \n00 08 0D \n7F8F4AAF \nFailed\n", "blargg/mem_timing/individual/01-read_timing.gb": "01-read_timing\n\n\nPassed\n", "blargg/mem_timing/individual/02-write_timing.gb": "02-write_timing\n\n\nPassed\n", "blargg/mem_timing/individual/03-modify_timing.gb": "03-modify_timing\n\n\nPassed\n", diff --git a/tests/test_results/mooneye/acceptance/halt_ime0_nointr_timing.gb.png b/tests/test_results/mooneye/acceptance/halt_ime0_nointr_timing.gb.png index d51c97100..7ecd8bd2b 100644 Binary files a/tests/test_results/mooneye/acceptance/halt_ime0_nointr_timing.gb.png and b/tests/test_results/mooneye/acceptance/halt_ime0_nointr_timing.gb.png differ diff --git a/tests/test_results/mooneye/acceptance/halt_ime1_timing2-GS.gb.png b/tests/test_results/mooneye/acceptance/halt_ime1_timing2-GS.gb.png index 3379528b4..9f6296dfa 100644 Binary files a/tests/test_results/mooneye/acceptance/halt_ime1_timing2-GS.gb.png and b/tests/test_results/mooneye/acceptance/halt_ime1_timing2-GS.gb.png differ diff --git a/tests/test_results/mooneye/acceptance/intr_timing.gb.png b/tests/test_results/mooneye/acceptance/intr_timing.gb.png index c76b2a754..d93181b97 100644 Binary files a/tests/test_results/mooneye/acceptance/intr_timing.gb.png and b/tests/test_results/mooneye/acceptance/intr_timing.gb.png differ diff --git a/tests/test_results/mooneye/acceptance/ppu/intr_1_2_timing-GS.gb.png b/tests/test_results/mooneye/acceptance/ppu/intr_1_2_timing-GS.gb.png index c0fe085a8..6ddaa0038 100644 Binary files a/tests/test_results/mooneye/acceptance/ppu/intr_1_2_timing-GS.gb.png and b/tests/test_results/mooneye/acceptance/ppu/intr_1_2_timing-GS.gb.png differ diff --git a/tests/test_results/mooneye/acceptance/ppu/intr_2_0_timing.gb.png b/tests/test_results/mooneye/acceptance/ppu/intr_2_0_timing.gb.png index f3b184ac1..62ede2888 100644 Binary files a/tests/test_results/mooneye/acceptance/ppu/intr_2_0_timing.gb.png and b/tests/test_results/mooneye/acceptance/ppu/intr_2_0_timing.gb.png differ diff --git a/tests/test_results/mooneye/acceptance/ppu/vblank_stat_intr-GS.gb.png b/tests/test_results/mooneye/acceptance/ppu/vblank_stat_intr-GS.gb.png index 870931630..984b7f577 100644 Binary files a/tests/test_results/mooneye/acceptance/ppu/vblank_stat_intr-GS.gb.png and b/tests/test_results/mooneye/acceptance/ppu/vblank_stat_intr-GS.gb.png differ diff --git a/tests/test_shonumi.py b/tests/test_shonumi.py index c48e5a626..be4eba303 100644 --- a/tests/test_shonumi.py +++ b/tests/test_shonumi.py @@ -11,6 +11,8 @@ from pyboy import PyBoy +OVERWRITE_PNGS = False + @pytest.mark.parametrize( "rom", @@ -32,16 +34,19 @@ def test_shonumi(rom, shonumi_dir): png_path = Path(f"tests/test_results/GB Tests/{rom}.png") png_path.parents[0].mkdir(parents=True, exist_ok=True) image = pyboy.screen.image - - # Converting to RGB as ImageChops.difference cannot handle Alpha: https://github.com/python-pillow/Pillow/issues/4849 - old_image = PIL.Image.open(png_path).convert("RGB") - old_image = old_image.resize(image.size, resample=PIL.Image.Dither.NONE) - diff = PIL.ImageChops.difference(image.convert("RGB"), old_image) - - if diff.getbbox() and os.environ.get("TEST_VERBOSE_IMAGES"): - image.show() - old_image.show() - diff.show() - assert not diff.getbbox(), f"Images are different! {rom}" + if OVERWRITE_PNGS: + png_path.parents[0].mkdir(parents=True, exist_ok=True) + image.save(png_path) + else: + # Converting to RGB as ImageChops.difference cannot handle Alpha: https://github.com/python-pillow/Pillow/issues/4849 + old_image = PIL.Image.open(png_path).convert("RGB") + old_image = old_image.resize(image.size, resample=PIL.Image.Dither.NONE) + diff = PIL.ImageChops.difference(image.convert("RGB"), old_image) + + if diff.getbbox() and os.environ.get("TEST_VERBOSE_IMAGES"): + image.show() + old_image.show() + diff.show() + assert not diff.getbbox(), f"Images are different! {rom}" pyboy.stop(save=False) diff --git a/tests/test_states.py b/tests/test_states.py index f7aa18228..9b4915f70 100644 --- a/tests/test_states.py +++ b/tests/test_states.py @@ -39,10 +39,10 @@ def progress(pyboy): ignored_attrs = [ - "_spritecache0_raw", - "_spritecache0_state", - "_tilecache0_raw", - "_tilecache0_state", + "_spritecache_raw", + "_spritecache_state", + "_tilecache_raw", + "_tilecache_state", "sprites_to_render", "serialbuffer", "serialbuffer_count",