From eb7c5c0af0f1878a0784430255d0ae105f4631e4 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 21 Sep 2022 17:14:36 +0930 Subject: [PATCH 1/3] ram/aspeed: Use device tree to configure ECC Instead of configuring ECC based on the build config, use a device tree property to selectively enable ECC at runtime. There are two properties: aspeed,ecc-enabled; aspeed,ecc-size-mb = "512"; The enabled property is a boolean that enables ECC if it is present. The size is the number of MB that should be covered by ECC. Setting it to zero, or omitting it, defaults the ECC size to "auto detect". edac: sdram@1e6e0000 { compatible = "aspeed,ast2600-sdram-edac"; reg = <0x1e6e0000 0x174>; interrupts = ; aspeed,ecc-enabled; aspeed,ecc-size-mb = "512"; }; Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20220921074439.2265651-2-joel@jms.id.au --- drivers/ram/aspeed/sdram_ast2500.c | 19 +++++++++++++------ drivers/ram/aspeed/sdram_ast2600.c | 14 ++++++++++---- 2 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c index 435e1a8cfc1d..79760975be44 100644 --- a/drivers/ram/aspeed/sdram_ast2500.c +++ b/drivers/ram/aspeed/sdram_ast2500.c @@ -279,16 +279,16 @@ static void ast2500_sdrammc_calc_size(struct dram_info *info) } #ifdef CONFIG_ASPEED_ECC -static void ast2500_sdrammc_ecc_enable(struct dram_info *info) +static void ast2500_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) { struct ast2500_sdrammc_regs *regs = info->regs; size_t conf_size; u32 reg; - conf_size = CONFIG_ASPEED_ECC_SIZE * SDRAM_SIZE_1MB; + conf_size = conf_size_mb * SDRAM_SIZE_1MB; if (conf_size > info->info.size) { printf("warning: ECC configured %dMB but actual size is %dMB\n", - CONFIG_ASPEED_ECC_SIZE, + conf_size_mb, info->info.size / SDRAM_SIZE_1MB); conf_size = info->info.size; } else if (conf_size == 0) { @@ -315,8 +315,9 @@ static void ast2500_sdrammc_ecc_enable(struct dram_info *info) } #endif -static int ast2500_sdrammc_init_ddr4(struct dram_info *info) +static int ast2500_sdrammc_init_ddr4(struct udevice *dev) { + struct dram_info *info = dev_get_priv(dev); int i; const u32 power_control = SDRAM_PCR_CKE_EN | (1 << SDRAM_PCR_CKE_DELAY_SHIFT) @@ -371,8 +372,14 @@ static int ast2500_sdrammc_init_ddr4(struct dram_info *info) writel(SDRAM_MISC_DDR4_TREFRESH, &info->regs->misc_control); #ifdef CONFIG_ASPEED_ECC - ast2500_sdrammc_ecc_enable(info); + if (dev_read_bool(dev, "aspeed,ecc-enabled")) { + u32 ecc_size; + + ecc_size = dev_read_u32_default(dev, "aspeed,ecc-size-mb", 0); + ast2500_sdrammc_ecc_enable(info, ecc_size); + } #endif + /* Enable all requests except video & display */ writel(SDRAM_REQ_USB20_EHCI1 | SDRAM_REQ_USB20_EHCI2 @@ -477,7 +484,7 @@ static int ast2500_sdrammc_probe(struct udevice *dev) ast2500_sdrammc_init_phy(priv->phy); if (readl(&priv->scu->hwstrap) & SCU_HWSTRAP_DDR4) { - ast2500_sdrammc_init_ddr4(priv); + ast2500_sdrammc_init_ddr4(dev); } else { debug("Unsupported DRAM3\n"); return -EINVAL; diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c index 97ca6a44702d..7d2fd0af3422 100644 --- a/drivers/ram/aspeed/sdram_ast2600.c +++ b/drivers/ram/aspeed/sdram_ast2600.c @@ -863,16 +863,16 @@ static void ast2600_sdrammc_update_size(struct dram_info *info) info->info.size = hw_size; } #ifdef CONFIG_ASPEED_ECC -static void ast2600_sdrammc_ecc_enable(struct dram_info *info) +static void ast2600_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) { struct ast2600_sdrammc_regs *regs = info->regs; size_t conf_size; u32 reg; - conf_size = CONFIG_ASPEED_ECC_SIZE * SDRAM_SIZE_1MB; + conf_size = conf_size_mb * SDRAM_SIZE_1MB; if (conf_size > info->info.size) { printf("warning: ECC configured %dMB but actual size is %dMB\n", - CONFIG_ASPEED_ECC_SIZE, + conf_size_mb, info->info.size / SDRAM_SIZE_1MB); conf_size = info->info.size; } else if (conf_size == 0) { @@ -987,8 +987,14 @@ static int ast2600_sdrammc_probe(struct udevice *dev) #endif #ifdef CONFIG_ASPEED_ECC - ast2600_sdrammc_ecc_enable(priv); + if (dev_read_bool(dev, "aspeed,ecc-enabled")) { + u32 ecc_size; + + ecc_size = dev_read_u32_default(dev, "aspeed,ecc-size-mb", 0); + ast2600_sdrammc_ecc_enable(priv, ecc_size); + } #endif + setbits_le32(priv->scu + AST_SCU_HANDSHAKE, SCU_HANDSHAKE_MASK); clrbits_le32(®s->intr_ctrl, MCR50_RESET_ALL_INTR); ast2600_sdrammc_lock(priv); From 90a57b53b6e56cd3dd0aee1c962b744989331581 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 21 Sep 2022 17:14:37 +0930 Subject: [PATCH 2/3] ram/aspeed: Remove ECC config option Always build the code now that it is enabled by device tree. Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20220921074439.2265651-3-joel@jms.id.au --- drivers/ram/aspeed/Kconfig | 19 ------------------- drivers/ram/aspeed/sdram_ast2500.c | 4 ---- drivers/ram/aspeed/sdram_ast2600.c | 5 +---- 3 files changed, 1 insertion(+), 27 deletions(-) diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig index 512570eb8bda..b72aceaebde8 100644 --- a/drivers/ram/aspeed/Kconfig +++ b/drivers/ram/aspeed/Kconfig @@ -127,23 +127,4 @@ config ASPEED_DDR4_WR_DATA_EYE_TRAINING_RESULT_OFFSET are not sure what is the best value in your system. endif -config ASPEED_ECC - bool "aspeed SDRAM error correcting code" - depends on DM && OF_CONTROL && ARCH_ASPEED - default n - help - enable SDRAM ECC function - -if ASPEED_ECC -config ASPEED_ECC_SIZE - int "ECC size: 0=driver auto-caluated" - depends on ASPEED_ECC - default 0 - help - SDRAM size with the error correcting code enabled. The unit is - in Megabytes. Noted that only the 8/9 of the configured size - can be used by the system. The remaining 1/9 will be used by - the ECC engine. If the size is set to 0, the sdram driver will - calculate the SDRAM size and set the whole range be ECC enabled. -endif endif diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c index 79760975be44..c8eee32da698 100644 --- a/drivers/ram/aspeed/sdram_ast2500.c +++ b/drivers/ram/aspeed/sdram_ast2500.c @@ -278,7 +278,6 @@ static void ast2500_sdrammc_calc_size(struct dram_info *info) << SDRAM_CONF_CAP_SHIFT)); } -#ifdef CONFIG_ASPEED_ECC static void ast2500_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) { struct ast2500_sdrammc_regs *regs = info->regs; @@ -313,7 +312,6 @@ static void ast2500_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) writel(0x400, ®s->ecc_test_ctrl); printf("ECC enable, "); } -#endif static int ast2500_sdrammc_init_ddr4(struct udevice *dev) { @@ -371,14 +369,12 @@ static int ast2500_sdrammc_init_ddr4(struct udevice *dev) writel(SDRAM_MISC_DDR4_TREFRESH, &info->regs->misc_control); -#ifdef CONFIG_ASPEED_ECC if (dev_read_bool(dev, "aspeed,ecc-enabled")) { u32 ecc_size; ecc_size = dev_read_u32_default(dev, "aspeed,ecc-size-mb", 0); ast2500_sdrammc_ecc_enable(info, ecc_size); } -#endif /* Enable all requests except video & display */ writel(SDRAM_REQ_USB20_EHCI1 diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c index 7d2fd0af3422..4e46370e2a57 100644 --- a/drivers/ram/aspeed/sdram_ast2600.c +++ b/drivers/ram/aspeed/sdram_ast2600.c @@ -862,7 +862,7 @@ static void ast2600_sdrammc_update_size(struct dram_info *info) info->info.size = hw_size; } -#ifdef CONFIG_ASPEED_ECC + static void ast2600_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) { struct ast2600_sdrammc_regs *regs = info->regs; @@ -893,7 +893,6 @@ static void ast2600_sdrammc_ecc_enable(struct dram_info *info, u32 conf_size_mb) writel(BIT(31), ®s->intr_ctrl); writel(0, ®s->intr_ctrl); } -#endif static int ast2600_sdrammc_probe(struct udevice *dev) { @@ -986,14 +985,12 @@ static int ast2600_sdrammc_probe(struct udevice *dev) } #endif -#ifdef CONFIG_ASPEED_ECC if (dev_read_bool(dev, "aspeed,ecc-enabled")) { u32 ecc_size; ecc_size = dev_read_u32_default(dev, "aspeed,ecc-size-mb", 0); ast2600_sdrammc_ecc_enable(priv, ecc_size); } -#endif setbits_le32(priv->scu + AST_SCU_HANDSHAKE, SCU_HANDSHAKE_MASK); clrbits_le32(®s->intr_ctrl, MCR50_RESET_ALL_INTR); From 958e2809b797042012b6500805e2574116188168 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Wed, 21 Sep 2022 17:14:38 +0930 Subject: [PATCH 3/3] ARM: dts: aspeed: p10bmc: Enable ECC Enable ECC to cover the entire DRAM by not setting the size property. Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/r/20220921074439.2265651-4-joel@jms.id.au --- arch/arm/dts/ast2600-rainier.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/ast2600-rainier.dts b/arch/arm/dts/ast2600-rainier.dts index 89114a8fd174..669a961d6cc7 100755 --- a/arch/arm/dts/ast2600-rainier.dts +++ b/arch/arm/dts/ast2600-rainier.dts @@ -41,6 +41,7 @@ &sdrammc { clock-frequency = <400000000>; + aspeed,ecc-enabled; }; &wdt2 {